Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:27:31.391872 lava-dispatcher, installed at version: 2023.01
2 12:27:31.392095 start: 0 validate
3 12:27:31.392232 Start time: 2023-03-13 12:27:31.392226+00:00 (UTC)
4 12:27:31.392376 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:27:31.392520 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230303.0%2Famd64%2Finitrd.cpio.gz exists
6 12:27:31.683283 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:27:31.683479 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:27:31.968898 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:27:31.969078 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230303.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:27:32.254902 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:27:32.255093 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:27:32.538822 validate duration: 1.15
14 12:27:32.539227 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:27:32.539382 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:27:32.539498 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:27:32.539606 Not decompressing ramdisk as can be used compressed.
18 12:27:32.539699 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230303.0/amd64/initrd.cpio.gz
19 12:27:32.539777 saving as /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/ramdisk/initrd.cpio.gz
20 12:27:32.539846 total size: 5432112 (5MB)
21 12:27:32.540824 progress 0% (0MB)
22 12:27:32.542470 progress 5% (0MB)
23 12:27:32.543959 progress 10% (0MB)
24 12:27:32.545470 progress 15% (0MB)
25 12:27:32.547108 progress 20% (1MB)
26 12:27:32.548575 progress 25% (1MB)
27 12:27:32.550025 progress 30% (1MB)
28 12:27:32.551638 progress 35% (1MB)
29 12:27:32.553067 progress 40% (2MB)
30 12:27:32.554498 progress 45% (2MB)
31 12:27:32.555932 progress 50% (2MB)
32 12:27:32.557523 progress 55% (2MB)
33 12:27:32.558946 progress 60% (3MB)
34 12:27:32.560375 progress 65% (3MB)
35 12:27:32.561970 progress 70% (3MB)
36 12:27:32.563401 progress 75% (3MB)
37 12:27:32.564824 progress 80% (4MB)
38 12:27:32.566248 progress 85% (4MB)
39 12:27:32.567852 progress 90% (4MB)
40 12:27:32.569276 progress 95% (4MB)
41 12:27:32.570719 progress 100% (5MB)
42 12:27:32.570939 5MB downloaded in 0.03s (166.64MB/s)
43 12:27:32.571102 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:27:32.571372 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:27:32.571471 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:27:32.571567 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:27:32.571683 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:27:32.571761 saving as /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/kernel/bzImage
50 12:27:32.571829 total size: 9826304 (9MB)
51 12:27:32.571896 No compression specified
52 12:27:32.572812 progress 0% (0MB)
53 12:27:32.575385 progress 5% (0MB)
54 12:27:32.578049 progress 10% (0MB)
55 12:27:32.580717 progress 15% (1MB)
56 12:27:32.583379 progress 20% (1MB)
57 12:27:32.586031 progress 25% (2MB)
58 12:27:32.588685 progress 30% (2MB)
59 12:27:32.591393 progress 35% (3MB)
60 12:27:32.594063 progress 40% (3MB)
61 12:27:32.596776 progress 45% (4MB)
62 12:27:32.599444 progress 50% (4MB)
63 12:27:32.602098 progress 55% (5MB)
64 12:27:32.604780 progress 60% (5MB)
65 12:27:32.607407 progress 65% (6MB)
66 12:27:32.610016 progress 70% (6MB)
67 12:27:32.612635 progress 75% (7MB)
68 12:27:32.615246 progress 80% (7MB)
69 12:27:32.617847 progress 85% (7MB)
70 12:27:32.620463 progress 90% (8MB)
71 12:27:32.623094 progress 95% (8MB)
72 12:27:32.625744 progress 100% (9MB)
73 12:27:32.625986 9MB downloaded in 0.05s (173.05MB/s)
74 12:27:32.626149 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:27:32.626416 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:27:32.626515 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:27:32.626613 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:27:32.626730 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230303.0/amd64/full.rootfs.tar.xz
80 12:27:32.626804 saving as /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/nfsrootfs/full.rootfs.tar
81 12:27:32.626890 total size: 207163184 (197MB)
82 12:27:32.626959 Using unxz to decompress xz
83 12:27:32.630359 progress 0% (0MB)
84 12:27:33.258581 progress 5% (9MB)
85 12:27:33.866996 progress 10% (19MB)
86 12:27:34.529284 progress 15% (29MB)
87 12:27:34.932062 progress 20% (39MB)
88 12:27:35.337630 progress 25% (49MB)
89 12:27:36.021521 progress 30% (59MB)
90 12:27:36.653737 progress 35% (69MB)
91 12:27:37.341640 progress 40% (79MB)
92 12:27:38.026842 progress 45% (88MB)
93 12:27:38.746496 progress 50% (98MB)
94 12:27:39.490592 progress 55% (108MB)
95 12:27:40.270419 progress 60% (118MB)
96 12:27:40.437625 progress 65% (128MB)
97 12:27:40.610782 progress 70% (138MB)
98 12:27:40.719629 progress 75% (148MB)
99 12:27:40.801744 progress 80% (158MB)
100 12:27:40.885907 progress 85% (167MB)
101 12:27:41.000574 progress 90% (177MB)
102 12:27:41.302598 progress 95% (187MB)
103 12:27:41.976910 progress 100% (197MB)
104 12:27:41.982644 197MB downloaded in 9.36s (21.12MB/s)
105 12:27:41.982968 end: 1.3.1 http-download (duration 00:00:09) [common]
107 12:27:41.983277 end: 1.3 download-retry (duration 00:00:09) [common]
108 12:27:41.983381 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:27:41.983480 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:27:41.983603 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:27:41.983679 saving as /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/modules/modules.tar
112 12:27:41.983747 total size: 460276 (0MB)
113 12:27:41.983816 Using unxz to decompress xz
114 12:27:41.987102 progress 7% (0MB)
115 12:27:41.987516 progress 14% (0MB)
116 12:27:41.987777 progress 21% (0MB)
117 12:27:41.989320 progress 28% (0MB)
118 12:27:41.991668 progress 35% (0MB)
119 12:27:41.994054 progress 42% (0MB)
120 12:27:41.996694 progress 49% (0MB)
121 12:27:41.998886 progress 56% (0MB)
122 12:27:42.000950 progress 64% (0MB)
123 12:27:42.003380 progress 71% (0MB)
124 12:27:42.005659 progress 78% (0MB)
125 12:27:42.008027 progress 85% (0MB)
126 12:27:42.009980 progress 92% (0MB)
127 12:27:42.012334 progress 99% (0MB)
128 12:27:42.019686 0MB downloaded in 0.04s (12.22MB/s)
129 12:27:42.020065 end: 1.4.1 http-download (duration 00:00:00) [common]
131 12:27:42.020398 end: 1.4 download-retry (duration 00:00:00) [common]
132 12:27:42.020510 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
133 12:27:42.020623 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
134 12:27:44.320051 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9584211/extract-nfsrootfs-sr94qhwg
135 12:27:44.320275 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
136 12:27:44.320391 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
137 12:27:44.320546 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2
138 12:27:44.320668 makedir: /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin
139 12:27:44.320850 makedir: /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/tests
140 12:27:44.321017 makedir: /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/results
141 12:27:44.321165 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-add-keys
142 12:27:44.321321 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-add-sources
143 12:27:44.321460 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-background-process-start
144 12:27:44.321594 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-background-process-stop
145 12:27:44.321724 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-common-functions
146 12:27:44.321852 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-echo-ipv4
147 12:27:44.321984 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-install-packages
148 12:27:44.322111 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-installed-packages
149 12:27:44.322237 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-os-build
150 12:27:44.322363 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-probe-channel
151 12:27:44.322488 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-probe-ip
152 12:27:44.322612 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-target-ip
153 12:27:44.322738 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-target-mac
154 12:27:44.322863 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-target-storage
155 12:27:44.322992 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-test-case
156 12:27:44.323130 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-test-event
157 12:27:44.323259 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-test-feedback
158 12:27:44.323388 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-test-raise
159 12:27:44.323517 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-test-reference
160 12:27:44.323643 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-test-runner
161 12:27:44.323770 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-test-set
162 12:27:44.323895 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-test-shell
163 12:27:44.324023 Updating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-add-keys (debian)
164 12:27:44.324153 Updating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-add-sources (debian)
165 12:27:44.324283 Updating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-install-packages (debian)
166 12:27:44.324412 Updating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-installed-packages (debian)
167 12:27:44.324540 Updating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/bin/lava-os-build (debian)
168 12:27:44.324651 Creating /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/environment
169 12:27:44.324751 LAVA metadata
170 12:27:44.324832 - LAVA_JOB_ID=9584211
171 12:27:44.324907 - LAVA_DISPATCHER_IP=192.168.201.1
172 12:27:44.325021 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
173 12:27:44.325097 skipped lava-vland-overlay
174 12:27:44.325184 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
175 12:27:44.325277 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
176 12:27:44.325349 skipped lava-multinode-overlay
177 12:27:44.325434 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
178 12:27:44.325529 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
179 12:27:44.325612 Loading test definitions
180 12:27:44.325715 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
181 12:27:44.325796 Using /lava-9584211 at stage 0
182 12:27:44.326057 uuid=9584211_1.5.2.3.1 testdef=None
183 12:27:44.326160 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
184 12:27:44.326260 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
185 12:27:44.326720 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
187 12:27:44.326979 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
188 12:27:44.327648 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
190 12:27:44.327918 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
191 12:27:44.328438 runner path: /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/0/tests/0_timesync-off test_uuid 9584211_1.5.2.3.1
192 12:27:44.328605 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 12:27:44.328870 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
195 12:27:44.328954 Using /lava-9584211 at stage 0
196 12:27:44.329063 Fetching tests from https://github.com/kernelci/test-definitions.git
197 12:27:44.329155 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/0/tests/1_kselftest-futex'
198 12:27:49.215615 Running '/usr/bin/git checkout kernelci.org
199 12:27:49.364805 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
200 12:27:49.365547 uuid=9584211_1.5.2.3.5 testdef=None
201 12:27:49.365737 end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
203 12:27:49.366030 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
204 12:27:49.366830 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
206 12:27:49.367108 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
207 12:27:49.368136 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
209 12:27:49.368418 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
210 12:27:49.369412 runner path: /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/0/tests/1_kselftest-futex test_uuid 9584211_1.5.2.3.5
211 12:27:49.369516 BOARD='asus-C436FA-Flip-hatch'
212 12:27:49.369594 BRANCH='cip'
213 12:27:49.369666 SKIPFILE='skipfile-lkft.yaml'
214 12:27:49.369736 SKIP_INSTALL='True'
215 12:27:49.369803 TESTPROG_URL='None'
216 12:27:49.369871 TST_CASENAME=''
217 12:27:49.369936 TST_CMDFILES='futex'
218 12:27:49.370089 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
220 12:27:49.370334 Creating lava-test-runner.conf files
221 12:27:49.370409 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584211/lava-overlay-mmt9i3j2/lava-9584211/0 for stage 0
222 12:27:49.370505 - 0_timesync-off
223 12:27:49.370584 - 1_kselftest-futex
224 12:27:49.370689 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
225 12:27:49.370789 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
226 12:27:57.749203 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
227 12:27:57.749370 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
228 12:27:57.749480 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
229 12:27:57.749592 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
230 12:27:57.749697 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
231 12:27:57.863608 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
232 12:27:57.863992 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
233 12:27:57.864223 extracting modules file /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584211/extract-nfsrootfs-sr94qhwg
234 12:27:57.876064 extracting modules file /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584211/extract-overlay-ramdisk-06s_3j45/ramdisk
235 12:27:57.887646 end: 1.5.4 extract-modules (duration 00:00:00) [common]
236 12:27:57.887818 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
237 12:27:57.887929 [common] Applying overlay to NFS
238 12:27:57.888027 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584211/compress-overlay-7sjylh2g/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584211/extract-nfsrootfs-sr94qhwg
239 12:27:58.805727 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
240 12:27:58.805926 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
241 12:27:58.806045 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
242 12:27:58.806151 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
243 12:27:58.806252 Building ramdisk /var/lib/lava/dispatcher/tmp/9584211/extract-overlay-ramdisk-06s_3j45/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584211/extract-overlay-ramdisk-06s_3j45/ramdisk
244 12:27:58.854534 >> 30003 blocks
245 12:27:59.479187 rename /var/lib/lava/dispatcher/tmp/9584211/extract-overlay-ramdisk-06s_3j45/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/ramdisk/ramdisk.cpio.gz
246 12:27:59.479628 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
247 12:27:59.479768 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
248 12:27:59.479880 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
249 12:27:59.479989 No mkimage arch provided, not using FIT.
250 12:27:59.480094 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
251 12:27:59.480191 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
252 12:27:59.480308 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
253 12:27:59.480418 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
254 12:27:59.480513 No LXC device requested
255 12:27:59.480603 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
256 12:27:59.480705 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
257 12:27:59.480800 end: 1.7 deploy-device-env (duration 00:00:00) [common]
258 12:27:59.480879 Checking files for TFTP limit of 4294967296 bytes.
259 12:27:59.481292 end: 1 tftp-deploy (duration 00:00:27) [common]
260 12:27:59.481412 start: 2 depthcharge-action (timeout 00:05:00) [common]
261 12:27:59.481519 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
262 12:27:59.481671 substitutions:
263 12:27:59.481748 - {DTB}: None
264 12:27:59.481822 - {INITRD}: 9584211/tftp-deploy-e30yq23z/ramdisk/ramdisk.cpio.gz
265 12:27:59.481906 - {KERNEL}: 9584211/tftp-deploy-e30yq23z/kernel/bzImage
266 12:27:59.481977 - {LAVA_MAC}: None
267 12:27:59.482043 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9584211/extract-nfsrootfs-sr94qhwg
268 12:27:59.482122 - {NFS_SERVER_IP}: 192.168.201.1
269 12:27:59.482200 - {PRESEED_CONFIG}: None
270 12:27:59.482268 - {PRESEED_LOCAL}: None
271 12:27:59.482332 - {RAMDISK}: 9584211/tftp-deploy-e30yq23z/ramdisk/ramdisk.cpio.gz
272 12:27:59.482395 - {ROOT_PART}: None
273 12:27:59.482457 - {ROOT}: None
274 12:27:59.482518 - {SERVER_IP}: 192.168.201.1
275 12:27:59.482580 - {TEE}: None
276 12:27:59.482642 Parsed boot commands:
277 12:27:59.482702 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
278 12:27:59.482880 Parsed boot commands: tftpboot 192.168.201.1 9584211/tftp-deploy-e30yq23z/kernel/bzImage 9584211/tftp-deploy-e30yq23z/kernel/cmdline 9584211/tftp-deploy-e30yq23z/ramdisk/ramdisk.cpio.gz
279 12:27:59.482987 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
280 12:27:59.483109 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
281 12:27:59.483222 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
282 12:27:59.483324 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
283 12:27:59.483404 Not connected, no need to disconnect.
284 12:27:59.483491 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
285 12:27:59.483591 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
286 12:27:59.483669 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
287 12:27:59.487036 Setting prompt string to ['lava-test: # ']
288 12:27:59.487417 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
289 12:27:59.487542 end: 2.2.1 reset-connection (duration 00:00:00) [common]
290 12:27:59.487655 start: 2.2.2 reset-device (timeout 00:05:00) [common]
291 12:27:59.487763 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
292 12:27:59.487959 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
293 12:28:04.623511 >> Command sent successfully.
294 12:28:04.626531 Returned 0 in 5 seconds
295 12:28:04.727235 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
297 12:28:04.727592 end: 2.2.2 reset-device (duration 00:00:05) [common]
298 12:28:04.727705 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
299 12:28:04.727804 Setting prompt string to 'Starting depthcharge on Helios...'
300 12:28:04.727880 Changing prompt to 'Starting depthcharge on Helios...'
301 12:28:04.727961 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
302 12:28:04.728257 [Enter `^Ec?' for help]
303 12:28:05.348283
304 12:28:05.348445
305 12:28:05.358122 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
306 12:28:05.361538 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
307 12:28:05.368468 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
308 12:28:05.371615 CPU: AES supported, TXT NOT supported, VT supported
309 12:28:05.378445 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
310 12:28:05.381656 PCH: device id 0284 (rev 00) is Cometlake-U Premium
311 12:28:05.388474 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
312 12:28:05.391653 VBOOT: Loading verstage.
313 12:28:05.394890 FMAP: Found "FLASH" version 1.1 at 0xc04000.
314 12:28:05.401587 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
315 12:28:05.405055 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
316 12:28:05.408449 CBFS @ c08000 size 3f8000
317 12:28:05.414503 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
318 12:28:05.417777 CBFS: Locating 'fallback/verstage'
319 12:28:05.421278 CBFS: Found @ offset 10fb80 size 1072c
320 12:28:05.425045
321 12:28:05.425146
322 12:28:05.435116 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
323 12:28:05.449192 Probing TPM: . done!
324 12:28:05.452864 TPM ready after 0 ms
325 12:28:05.456250 Connected to device vid:did:rid of 1ae0:0028:00
326 12:28:05.466428 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
327 12:28:05.469507 Initialized TPM device CR50 revision 0
328 12:28:05.512202 tlcl_send_startup: Startup return code is 0
329 12:28:05.512443 TPM: setup succeeded
330 12:28:05.524888 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
331 12:28:05.528662 Chrome EC: UHEPI supported
332 12:28:05.532120 Phase 1
333 12:28:05.535489 FMAP: area GBB found @ c05000 (12288 bytes)
334 12:28:05.542089 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
335 12:28:05.545366 Phase 2
336 12:28:05.545601 Phase 3
337 12:28:05.548332 FMAP: area GBB found @ c05000 (12288 bytes)
338 12:28:05.554959 VB2:vb2_report_dev_firmware() This is developer signed firmware
339 12:28:05.561607 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
340 12:28:05.564895 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
341 12:28:05.572043 VB2:vb2_verify_keyblock() Checking keyblock signature...
342 12:28:05.587569 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
343 12:28:05.590923 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
344 12:28:05.597264 VB2:vb2_verify_fw_preamble() Verifying preamble.
345 12:28:05.601731 Phase 4
346 12:28:05.604789 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
347 12:28:05.611766 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
348 12:28:05.790905 VB2:vb2_rsa_verify_digest() Digest check failed!
349 12:28:05.797644 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
350 12:28:05.797870 Saving nvdata
351 12:28:05.801037 Reboot requested (10020007)
352 12:28:05.804328 board_reset() called!
353 12:28:05.804528 full_reset() called!
354 12:28:10.315830
355 12:28:10.315989
356 12:28:10.325678 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
357 12:28:10.328969 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
358 12:28:10.335569 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
359 12:28:10.338870 CPU: AES supported, TXT NOT supported, VT supported
360 12:28:10.345627 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
361 12:28:10.348888 PCH: device id 0284 (rev 00) is Cometlake-U Premium
362 12:28:10.355316 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
363 12:28:10.359068 VBOOT: Loading verstage.
364 12:28:10.362239 FMAP: Found "FLASH" version 1.1 at 0xc04000.
365 12:28:10.368923 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
366 12:28:10.372140 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
367 12:28:10.375582 CBFS @ c08000 size 3f8000
368 12:28:10.382175 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
369 12:28:10.385450 CBFS: Locating 'fallback/verstage'
370 12:28:10.388403 CBFS: Found @ offset 10fb80 size 1072c
371 12:28:10.392500
372 12:28:10.392720
373 12:28:10.402034 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
374 12:28:10.416616 Probing TPM: . done!
375 12:28:10.420195 TPM ready after 0 ms
376 12:28:10.423038 Connected to device vid:did:rid of 1ae0:0028:00
377 12:28:10.433424 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
378 12:28:10.437141 Initialized TPM device CR50 revision 0
379 12:28:10.478994 tlcl_send_startup: Startup return code is 0
380 12:28:10.479269 TPM: setup succeeded
381 12:28:10.491778 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
382 12:28:10.495885 Chrome EC: UHEPI supported
383 12:28:10.499793 Phase 1
384 12:28:10.502523 FMAP: area GBB found @ c05000 (12288 bytes)
385 12:28:10.509043 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
386 12:28:10.515593 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
387 12:28:10.518886 Recovery requested (1009000e)
388 12:28:10.524899 Saving nvdata
389 12:28:10.530958 tlcl_extend: response is 0
390 12:28:10.539824 tlcl_extend: response is 0
391 12:28:10.546781 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 12:28:10.550121 CBFS @ c08000 size 3f8000
393 12:28:10.556580 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 12:28:10.560252 CBFS: Locating 'fallback/romstage'
395 12:28:10.563468 CBFS: Found @ offset 80 size 145fc
396 12:28:10.566698 Accumulated console time in verstage 98 ms
397 12:28:10.566903
398 12:28:10.567040
399 12:28:10.579926 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
400 12:28:10.586536 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
401 12:28:10.589844 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
402 12:28:10.593275 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
403 12:28:10.599702 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
404 12:28:10.602813 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
405 12:28:10.606768 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
406 12:28:10.609829 TCO_STS: 0000 0000
407 12:28:10.613130 GEN_PMCON: e0015238 00000200
408 12:28:10.616010 GBLRST_CAUSE: 00000000 00000000
409 12:28:10.616185 prev_sleep_state 5
410 12:28:10.619390 Boot Count incremented to 47813
411 12:28:10.626460 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 12:28:10.629600 CBFS @ c08000 size 3f8000
413 12:28:10.636190 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 12:28:10.636359 CBFS: Locating 'fspm.bin'
415 12:28:10.643354 CBFS: Found @ offset 5ffc0 size 71000
416 12:28:10.646517 Chrome EC: UHEPI supported
417 12:28:10.652649 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
418 12:28:10.656571 Probing TPM: done!
419 12:28:10.663097 Connected to device vid:did:rid of 1ae0:0028:00
420 12:28:10.673157 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
421 12:28:10.679304 Initialized TPM device CR50 revision 0
422 12:28:10.688072 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
423 12:28:10.694262 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
424 12:28:10.697547 MRC cache found, size 1948
425 12:28:10.701398 bootmode is set to: 2
426 12:28:10.704447 PRMRR disabled by config.
427 12:28:10.707505 SPD INDEX = 1
428 12:28:10.711019 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 12:28:10.714109 CBFS @ c08000 size 3f8000
430 12:28:10.721001 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 12:28:10.721165 CBFS: Locating 'spd.bin'
432 12:28:10.724383 CBFS: Found @ offset 5fb80 size 400
433 12:28:10.727647 SPD: module type is LPDDR3
434 12:28:10.730828 SPD: module part is
435 12:28:10.737496 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
436 12:28:10.740745 SPD: device width 4 bits, bus width 8 bits
437 12:28:10.744046 SPD: module size is 4096 MB (per channel)
438 12:28:10.747304 memory slot: 0 configuration done.
439 12:28:10.750503 memory slot: 2 configuration done.
440 12:28:10.801847 CBMEM:
441 12:28:10.805108 IMD: root @ 99fff000 254 entries.
442 12:28:10.808043 IMD: root @ 99ffec00 62 entries.
443 12:28:10.811674 External stage cache:
444 12:28:10.814733 IMD: root @ 9abff000 254 entries.
445 12:28:10.818595 IMD: root @ 9abfec00 62 entries.
446 12:28:10.825163 Chrome EC: clear events_b mask to 0x0000000020004000
447 12:28:10.837896 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
448 12:28:10.850916 tlcl_write: response is 0
449 12:28:10.860024 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
450 12:28:10.866629 MRC: TPM MRC hash updated successfully.
451 12:28:10.866800 2 DIMMs found
452 12:28:10.869851 SMM Memory Map
453 12:28:10.873540 SMRAM : 0x9a000000 0x1000000
454 12:28:10.876556 Subregion 0: 0x9a000000 0xa00000
455 12:28:10.879728 Subregion 1: 0x9aa00000 0x200000
456 12:28:10.883238 Subregion 2: 0x9ac00000 0x400000
457 12:28:10.886479 top_of_ram = 0x9a000000
458 12:28:10.889774 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
459 12:28:10.896372 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
460 12:28:10.899831 MTRR Range: Start=ff000000 End=0 (Size 1000000)
461 12:28:10.906206 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
462 12:28:10.909455 CBFS @ c08000 size 3f8000
463 12:28:10.912807 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
464 12:28:10.916095 CBFS: Locating 'fallback/postcar'
465 12:28:10.923039 CBFS: Found @ offset 107000 size 4b44
466 12:28:10.926031 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
467 12:28:10.938869 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
468 12:28:10.942319 Processing 180 relocs. Offset value of 0x97c0c000
469 12:28:10.950651 Accumulated console time in romstage 286 ms
470 12:28:10.950758
471 12:28:10.950834
472 12:28:10.960313 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
473 12:28:10.966854 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
474 12:28:10.970230 CBFS @ c08000 size 3f8000
475 12:28:10.973411 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
476 12:28:10.980170 CBFS: Locating 'fallback/ramstage'
477 12:28:10.983337 CBFS: Found @ offset 43380 size 1b9e8
478 12:28:10.989971 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
479 12:28:11.021971 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
480 12:28:11.025302 Processing 3976 relocs. Offset value of 0x98db0000
481 12:28:11.032303 Accumulated console time in postcar 52 ms
482 12:28:11.032422
483 12:28:11.032503
484 12:28:11.042282 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
485 12:28:11.048517 FMAP: area RO_VPD found @ c00000 (16384 bytes)
486 12:28:11.052252 WARNING: RO_VPD is uninitialized or empty.
487 12:28:11.055584 FMAP: area RW_VPD found @ af8000 (8192 bytes)
488 12:28:11.062150 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 12:28:11.062295 Normal boot.
490 12:28:11.068586 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
491 12:28:11.072008 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
492 12:28:11.075180 CBFS @ c08000 size 3f8000
493 12:28:11.081526 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
494 12:28:11.085005 CBFS: Locating 'cpu_microcode_blob.bin'
495 12:28:11.088144 CBFS: Found @ offset 14700 size 2ec00
496 12:28:11.091559 microcode: sig=0x806ec pf=0x4 revision=0xc9
497 12:28:11.095172 Skip microcode update
498 12:28:11.101519 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
499 12:28:11.101722 CBFS @ c08000 size 3f8000
500 12:28:11.108131 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
501 12:28:11.111534 CBFS: Locating 'fsps.bin'
502 12:28:11.114667 CBFS: Found @ offset d1fc0 size 35000
503 12:28:11.140994 Detected 4 core, 8 thread CPU.
504 12:28:11.143549 Setting up SMI for CPU
505 12:28:11.146807 IED base = 0x9ac00000
506 12:28:11.146894 IED size = 0x00400000
507 12:28:11.150564 Will perform SMM setup.
508 12:28:11.156705 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
509 12:28:11.163248 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
510 12:28:11.167042 Processing 16 relocs. Offset value of 0x00030000
511 12:28:11.170883 Attempting to start 7 APs
512 12:28:11.173651 Waiting for 10ms after sending INIT.
513 12:28:11.189942 Waiting for 1st SIPI to complete...done.
514 12:28:11.190042 AP: slot 2 apic_id 1.
515 12:28:11.196811 Waiting for 2nd SIPI to complete...done.
516 12:28:11.196910 AP: slot 6 apic_id 7.
517 12:28:11.199934 AP: slot 5 apic_id 6.
518 12:28:11.203334 AP: slot 7 apic_id 4.
519 12:28:11.203426 AP: slot 4 apic_id 5.
520 12:28:11.206455 AP: slot 3 apic_id 3.
521 12:28:11.209821 AP: slot 1 apic_id 2.
522 12:28:11.216509 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
523 12:28:11.223015 Processing 13 relocs. Offset value of 0x00038000
524 12:28:11.226349 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
525 12:28:11.232940 Installing SMM handler to 0x9a000000
526 12:28:11.239383 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
527 12:28:11.246419 Processing 658 relocs. Offset value of 0x9a010000
528 12:28:11.252873 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
529 12:28:11.256028 Processing 13 relocs. Offset value of 0x9a008000
530 12:28:11.262573 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
531 12:28:11.269384 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
532 12:28:11.276077 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
533 12:28:11.279261 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
534 12:28:11.286112 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
535 12:28:11.292525 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
536 12:28:11.296196 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
537 12:28:11.302530 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
538 12:28:11.306386 Clearing SMI status registers
539 12:28:11.309197 SMI_STS: PM1
540 12:28:11.309298 PM1_STS: PWRBTN
541 12:28:11.312993 TCO_STS: SECOND_TO
542 12:28:11.316108 New SMBASE 0x9a000000
543 12:28:11.319520 In relocation handler: CPU 0
544 12:28:11.322840 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
545 12:28:11.325780 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 12:28:11.329149 Relocation complete.
547 12:28:11.332895 New SMBASE 0x99fff800
548 12:28:11.335683 In relocation handler: CPU 2
549 12:28:11.339067 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
550 12:28:11.342366 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 12:28:11.346121 Relocation complete.
552 12:28:11.349396 New SMBASE 0x99fff400
553 12:28:11.349525 In relocation handler: CPU 3
554 12:28:11.356034 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
555 12:28:11.359088 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 12:28:11.362220 Relocation complete.
557 12:28:11.365537 New SMBASE 0x99fffc00
558 12:28:11.365643 In relocation handler: CPU 1
559 12:28:11.372099 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
560 12:28:11.375911 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 12:28:11.378669 Relocation complete.
562 12:28:11.378754 New SMBASE 0x99ffe800
563 12:28:11.382443 In relocation handler: CPU 6
564 12:28:11.388956 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
565 12:28:11.392325 Writing SMRR. base = 0x9a000006, mask=0xff000800
566 12:28:11.395591 Relocation complete.
567 12:28:11.395689 New SMBASE 0x99ffec00
568 12:28:11.398691 In relocation handler: CPU 5
569 12:28:11.405427 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
570 12:28:11.408580 Writing SMRR. base = 0x9a000006, mask=0xff000800
571 12:28:11.411780 Relocation complete.
572 12:28:11.411872 New SMBASE 0x99fff000
573 12:28:11.415572 In relocation handler: CPU 4
574 12:28:11.418380 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
575 12:28:11.425477 Writing SMRR. base = 0x9a000006, mask=0xff000800
576 12:28:11.428235 Relocation complete.
577 12:28:11.428331 New SMBASE 0x99ffe400
578 12:28:11.432041 In relocation handler: CPU 7
579 12:28:11.435288 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
580 12:28:11.441560 Writing SMRR. base = 0x9a000006, mask=0xff000800
581 12:28:11.445480 Relocation complete.
582 12:28:11.445580 Initializing CPU #0
583 12:28:11.448152 CPU: vendor Intel device 806ec
584 12:28:11.452059 CPU: family 06, model 8e, stepping 0c
585 12:28:11.455298 Clearing out pending MCEs
586 12:28:11.458739 Setting up local APIC...
587 12:28:11.461784 apic_id: 0x00 done.
588 12:28:11.461874 Turbo is available but hidden
589 12:28:11.465130 Turbo is available and visible
590 12:28:11.468281 VMX status: enabled
591 12:28:11.471502 IA32_FEATURE_CONTROL status: locked
592 12:28:11.474833 Skip microcode update
593 12:28:11.474917 CPU #0 initialized
594 12:28:11.478018 Initializing CPU #2
595 12:28:11.481657 Initializing CPU #3
596 12:28:11.481739 Initializing CPU #1
597 12:28:11.484985 CPU: vendor Intel device 806ec
598 12:28:11.488244 CPU: family 06, model 8e, stepping 0c
599 12:28:11.491486 CPU: vendor Intel device 806ec
600 12:28:11.494713 CPU: family 06, model 8e, stepping 0c
601 12:28:11.498097 Clearing out pending MCEs
602 12:28:11.501360 Clearing out pending MCEs
603 12:28:11.504535 Setting up local APIC...
604 12:28:11.504651 Initializing CPU #7
605 12:28:11.507768 Initializing CPU #4
606 12:28:11.511450 CPU: vendor Intel device 806ec
607 12:28:11.514603 CPU: family 06, model 8e, stepping 0c
608 12:28:11.517847 CPU: vendor Intel device 806ec
609 12:28:11.521372 CPU: family 06, model 8e, stepping 0c
610 12:28:11.524734 Clearing out pending MCEs
611 12:28:11.528067 Clearing out pending MCEs
612 12:28:11.531367 Setting up local APIC...
613 12:28:11.531485 CPU: vendor Intel device 806ec
614 12:28:11.537520 CPU: family 06, model 8e, stepping 0c
615 12:28:11.537624 Clearing out pending MCEs
616 12:28:11.540835 Setting up local APIC...
617 12:28:11.544209 Initializing CPU #5
618 12:28:11.544310 Initializing CPU #6
619 12:28:11.547619 CPU: vendor Intel device 806ec
620 12:28:11.554271 CPU: family 06, model 8e, stepping 0c
621 12:28:11.554375 apic_id: 0x05 done.
622 12:28:11.557648 Setting up local APIC...
623 12:28:11.560842 Setting up local APIC...
624 12:28:11.560951 apic_id: 0x04 done.
625 12:28:11.564414 VMX status: enabled
626 12:28:11.567693 VMX status: enabled
627 12:28:11.570790 IA32_FEATURE_CONTROL status: locked
628 12:28:11.570900 Clearing out pending MCEs
629 12:28:11.574003 CPU: vendor Intel device 806ec
630 12:28:11.580887 CPU: family 06, model 8e, stepping 0c
631 12:28:11.581022 Setting up local APIC...
632 12:28:11.584160 apic_id: 0x03 done.
633 12:28:11.587205 apic_id: 0x02 done.
634 12:28:11.587314 VMX status: enabled
635 12:28:11.590384 VMX status: enabled
636 12:28:11.593710 IA32_FEATURE_CONTROL status: locked
637 12:28:11.597053 IA32_FEATURE_CONTROL status: locked
638 12:28:11.600379 Skip microcode update
639 12:28:11.600489 Skip microcode update
640 12:28:11.604139 CPU #3 initialized
641 12:28:11.607361 CPU #1 initialized
642 12:28:11.607495 apic_id: 0x01 done.
643 12:28:11.611004 IA32_FEATURE_CONTROL status: locked
644 12:28:11.614223 Skip microcode update
645 12:28:11.617246 Skip microcode update
646 12:28:11.617428 CPU #4 initialized
647 12:28:11.620449 CPU #7 initialized
648 12:28:11.620616 VMX status: enabled
649 12:28:11.623757 apic_id: 0x06 done.
650 12:28:11.627160 Clearing out pending MCEs
651 12:28:11.627303 VMX status: enabled
652 12:28:11.630538 Setting up local APIC...
653 12:28:11.633778 IA32_FEATURE_CONTROL status: locked
654 12:28:11.637111 apic_id: 0x07 done.
655 12:28:11.640572 Skip microcode update
656 12:28:11.643367 IA32_FEATURE_CONTROL status: locked
657 12:28:11.643495 VMX status: enabled
658 12:28:11.646737 Skip microcode update
659 12:28:11.650271 IA32_FEATURE_CONTROL status: locked
660 12:28:11.653480 CPU #5 initialized
661 12:28:11.653578 Skip microcode update
662 12:28:11.656964 CPU #2 initialized
663 12:28:11.660100 CPU #6 initialized
664 12:28:11.663581 bsp_do_flight_plan done after 465 msecs.
665 12:28:11.666737 CPU: frequency set to 4200 MHz
666 12:28:11.666826 Enabling SMIs.
667 12:28:11.670062 Locking SMM.
668 12:28:11.683750 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
669 12:28:11.687332 CBFS @ c08000 size 3f8000
670 12:28:11.693902 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
671 12:28:11.694038 CBFS: Locating 'vbt.bin'
672 12:28:11.697100 CBFS: Found @ offset 5f5c0 size 499
673 12:28:11.704208 Found a VBT of 4608 bytes after decompression
674 12:28:11.885059 Display FSP Version Info HOB
675 12:28:11.888613 Reference Code - CPU = 9.0.1e.30
676 12:28:11.892165 uCode Version = 0.0.0.ca
677 12:28:11.895255 TXT ACM version = ff.ff.ff.ffff
678 12:28:11.898404 Display FSP Version Info HOB
679 12:28:11.901677 Reference Code - ME = 9.0.1e.30
680 12:28:11.905239 MEBx version = 0.0.0.0
681 12:28:11.908330 ME Firmware Version = Consumer SKU
682 12:28:11.911886 Display FSP Version Info HOB
683 12:28:11.914903 Reference Code - CML PCH = 9.0.1e.30
684 12:28:11.918569 PCH-CRID Status = Disabled
685 12:28:11.921884 PCH-CRID Original Value = ff.ff.ff.ffff
686 12:28:11.924978 PCH-CRID New Value = ff.ff.ff.ffff
687 12:28:11.928522 OPROM - RST - RAID = ff.ff.ff.ffff
688 12:28:11.931452 ChipsetInit Base Version = ff.ff.ff.ffff
689 12:28:11.934850 ChipsetInit Oem Version = ff.ff.ff.ffff
690 12:28:11.938188 Display FSP Version Info HOB
691 12:28:11.944800 Reference Code - SA - System Agent = 9.0.1e.30
692 12:28:11.948018 Reference Code - MRC = 0.7.1.6c
693 12:28:11.948118 SA - PCIe Version = 9.0.1e.30
694 12:28:11.951743 SA-CRID Status = Disabled
695 12:28:11.955035 SA-CRID Original Value = 0.0.0.c
696 12:28:11.958535 SA-CRID New Value = 0.0.0.c
697 12:28:11.961350 OPROM - VBIOS = ff.ff.ff.ffff
698 12:28:11.964622 RTC Init
699 12:28:11.968026 Set power on after power failure.
700 12:28:11.968124 Disabling Deep S3
701 12:28:11.971359 Disabling Deep S3
702 12:28:11.971460 Disabling Deep S4
703 12:28:11.974624 Disabling Deep S4
704 12:28:11.974721 Disabling Deep S5
705 12:28:11.977977 Disabling Deep S5
706 12:28:11.984682 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
707 12:28:11.984781 Enumerating buses...
708 12:28:11.991048 Show all devs... Before device enumeration.
709 12:28:11.991156 Root Device: enabled 1
710 12:28:11.994514 CPU_CLUSTER: 0: enabled 1
711 12:28:11.998018 DOMAIN: 0000: enabled 1
712 12:28:12.000986 APIC: 00: enabled 1
713 12:28:12.001083 PCI: 00:00.0: enabled 1
714 12:28:12.004609 PCI: 00:02.0: enabled 1
715 12:28:12.007775 PCI: 00:04.0: enabled 0
716 12:28:12.011371 PCI: 00:05.0: enabled 0
717 12:28:12.011468 PCI: 00:12.0: enabled 1
718 12:28:12.014640 PCI: 00:12.5: enabled 0
719 12:28:12.017792 PCI: 00:12.6: enabled 0
720 12:28:12.021324 PCI: 00:14.0: enabled 1
721 12:28:12.021421 PCI: 00:14.1: enabled 0
722 12:28:12.024448 PCI: 00:14.3: enabled 1
723 12:28:12.027481 PCI: 00:14.5: enabled 0
724 12:28:12.027579 PCI: 00:15.0: enabled 1
725 12:28:12.031324 PCI: 00:15.1: enabled 1
726 12:28:12.034561 PCI: 00:15.2: enabled 0
727 12:28:12.037915 PCI: 00:15.3: enabled 0
728 12:28:12.038016 PCI: 00:16.0: enabled 1
729 12:28:12.041165 PCI: 00:16.1: enabled 0
730 12:28:12.044035 PCI: 00:16.2: enabled 0
731 12:28:12.047408 PCI: 00:16.3: enabled 0
732 12:28:12.047501 PCI: 00:16.4: enabled 0
733 12:28:12.050662 PCI: 00:16.5: enabled 0
734 12:28:12.054185 PCI: 00:17.0: enabled 1
735 12:28:12.057422 PCI: 00:19.0: enabled 1
736 12:28:12.057514 PCI: 00:19.1: enabled 0
737 12:28:12.060734 PCI: 00:19.2: enabled 0
738 12:28:12.064185 PCI: 00:1a.0: enabled 0
739 12:28:12.064276 PCI: 00:1c.0: enabled 0
740 12:28:12.067546 PCI: 00:1c.1: enabled 0
741 12:28:12.070824 PCI: 00:1c.2: enabled 0
742 12:28:12.074383 PCI: 00:1c.3: enabled 0
743 12:28:12.074478 PCI: 00:1c.4: enabled 0
744 12:28:12.077557 PCI: 00:1c.5: enabled 0
745 12:28:12.080852 PCI: 00:1c.6: enabled 0
746 12:28:12.084331 PCI: 00:1c.7: enabled 0
747 12:28:12.084422 PCI: 00:1d.0: enabled 1
748 12:28:12.087688 PCI: 00:1d.1: enabled 0
749 12:28:12.090868 PCI: 00:1d.2: enabled 0
750 12:28:12.093962 PCI: 00:1d.3: enabled 0
751 12:28:12.094050 PCI: 00:1d.4: enabled 0
752 12:28:12.097596 PCI: 00:1d.5: enabled 1
753 12:28:12.100716 PCI: 00:1e.0: enabled 1
754 12:28:12.100852 PCI: 00:1e.1: enabled 0
755 12:28:12.103760 PCI: 00:1e.2: enabled 1
756 12:28:12.107554 PCI: 00:1e.3: enabled 1
757 12:28:12.110587 PCI: 00:1f.0: enabled 1
758 12:28:12.110720 PCI: 00:1f.1: enabled 1
759 12:28:12.113744 PCI: 00:1f.2: enabled 1
760 12:28:12.117244 PCI: 00:1f.3: enabled 1
761 12:28:12.120419 PCI: 00:1f.4: enabled 1
762 12:28:12.120508 PCI: 00:1f.5: enabled 1
763 12:28:12.123780 PCI: 00:1f.6: enabled 0
764 12:28:12.126935 USB0 port 0: enabled 1
765 12:28:12.127028 I2C: 00:15: enabled 1
766 12:28:12.130634 I2C: 00:5d: enabled 1
767 12:28:12.133761 GENERIC: 0.0: enabled 1
768 12:28:12.136921 I2C: 00:1a: enabled 1
769 12:28:12.137014 I2C: 00:38: enabled 1
770 12:28:12.140469 I2C: 00:39: enabled 1
771 12:28:12.143831 I2C: 00:3a: enabled 1
772 12:28:12.143929 I2C: 00:3b: enabled 1
773 12:28:12.146876 PCI: 00:00.0: enabled 1
774 12:28:12.150211 SPI: 00: enabled 1
775 12:28:12.150296 SPI: 01: enabled 1
776 12:28:12.153698 PNP: 0c09.0: enabled 1
777 12:28:12.156992 USB2 port 0: enabled 1
778 12:28:12.157076 USB2 port 1: enabled 1
779 12:28:12.160327 USB2 port 2: enabled 0
780 12:28:12.163636 USB2 port 3: enabled 0
781 12:28:12.163738 USB2 port 5: enabled 0
782 12:28:12.166433 USB2 port 6: enabled 1
783 12:28:12.170228 USB2 port 9: enabled 1
784 12:28:12.173531 USB3 port 0: enabled 1
785 12:28:12.173637 USB3 port 1: enabled 1
786 12:28:12.176923 USB3 port 2: enabled 1
787 12:28:12.180100 USB3 port 3: enabled 1
788 12:28:12.180190 USB3 port 4: enabled 0
789 12:28:12.183513 APIC: 02: enabled 1
790 12:28:12.186926 APIC: 01: enabled 1
791 12:28:12.187014 APIC: 03: enabled 1
792 12:28:12.190121 APIC: 05: enabled 1
793 12:28:12.190219 APIC: 06: enabled 1
794 12:28:12.193384 APIC: 07: enabled 1
795 12:28:12.196653 APIC: 04: enabled 1
796 12:28:12.196750 Compare with tree...
797 12:28:12.200007 Root Device: enabled 1
798 12:28:12.203161 CPU_CLUSTER: 0: enabled 1
799 12:28:12.206328 APIC: 00: enabled 1
800 12:28:12.206433 APIC: 02: enabled 1
801 12:28:12.209862 APIC: 01: enabled 1
802 12:28:12.212917 APIC: 03: enabled 1
803 12:28:12.213018 APIC: 05: enabled 1
804 12:28:12.216497 APIC: 06: enabled 1
805 12:28:12.219776 APIC: 07: enabled 1
806 12:28:12.219893 APIC: 04: enabled 1
807 12:28:12.223331 DOMAIN: 0000: enabled 1
808 12:28:12.226434 PCI: 00:00.0: enabled 1
809 12:28:12.229603 PCI: 00:02.0: enabled 1
810 12:28:12.229700 PCI: 00:04.0: enabled 0
811 12:28:12.232775 PCI: 00:05.0: enabled 0
812 12:28:12.236468 PCI: 00:12.0: enabled 1
813 12:28:12.239570 PCI: 00:12.5: enabled 0
814 12:28:12.242802 PCI: 00:12.6: enabled 0
815 12:28:12.242909 PCI: 00:14.0: enabled 1
816 12:28:12.246534 USB0 port 0: enabled 1
817 12:28:12.249549 USB2 port 0: enabled 1
818 12:28:12.252731 USB2 port 1: enabled 1
819 12:28:12.256127 USB2 port 2: enabled 0
820 12:28:12.256220 USB2 port 3: enabled 0
821 12:28:12.259541 USB2 port 5: enabled 0
822 12:28:12.262935 USB2 port 6: enabled 1
823 12:28:12.266242 USB2 port 9: enabled 1
824 12:28:12.269235 USB3 port 0: enabled 1
825 12:28:12.273044 USB3 port 1: enabled 1
826 12:28:12.273138 USB3 port 2: enabled 1
827 12:28:12.275792 USB3 port 3: enabled 1
828 12:28:12.279001 USB3 port 4: enabled 0
829 12:28:12.282404 PCI: 00:14.1: enabled 0
830 12:28:12.285733 PCI: 00:14.3: enabled 1
831 12:28:12.285836 PCI: 00:14.5: enabled 0
832 12:28:12.289059 PCI: 00:15.0: enabled 1
833 12:28:12.292388 I2C: 00:15: enabled 1
834 12:28:12.295725 PCI: 00:15.1: enabled 1
835 12:28:12.299113 I2C: 00:5d: enabled 1
836 12:28:12.299203 GENERIC: 0.0: enabled 1
837 12:28:12.302379 PCI: 00:15.2: enabled 0
838 12:28:12.305712 PCI: 00:15.3: enabled 0
839 12:28:12.309119 PCI: 00:16.0: enabled 1
840 12:28:12.312118 PCI: 00:16.1: enabled 0
841 12:28:12.312217 PCI: 00:16.2: enabled 0
842 12:28:12.315544 PCI: 00:16.3: enabled 0
843 12:28:12.318971 PCI: 00:16.4: enabled 0
844 12:28:12.322079 PCI: 00:16.5: enabled 0
845 12:28:12.325401 PCI: 00:17.0: enabled 1
846 12:28:12.325500 PCI: 00:19.0: enabled 1
847 12:28:12.328870 I2C: 00:1a: enabled 1
848 12:28:12.332219 I2C: 00:38: enabled 1
849 12:28:12.335391 I2C: 00:39: enabled 1
850 12:28:12.335490 I2C: 00:3a: enabled 1
851 12:28:12.338557 I2C: 00:3b: enabled 1
852 12:28:12.342207 PCI: 00:19.1: enabled 0
853 12:28:12.345394 PCI: 00:19.2: enabled 0
854 12:28:12.348493 PCI: 00:1a.0: enabled 0
855 12:28:12.348623 PCI: 00:1c.0: enabled 0
856 12:28:12.352114 PCI: 00:1c.1: enabled 0
857 12:28:12.355058 PCI: 00:1c.2: enabled 0
858 12:28:12.358251 PCI: 00:1c.3: enabled 0
859 12:28:12.362117 PCI: 00:1c.4: enabled 0
860 12:28:12.362208 PCI: 00:1c.5: enabled 0
861 12:28:12.364902 PCI: 00:1c.6: enabled 0
862 12:28:12.368624 PCI: 00:1c.7: enabled 0
863 12:28:12.371559 PCI: 00:1d.0: enabled 1
864 12:28:12.371640 PCI: 00:1d.1: enabled 0
865 12:28:12.374947 PCI: 00:1d.2: enabled 0
866 12:28:12.378147 PCI: 00:1d.3: enabled 0
867 12:28:12.382143 PCI: 00:1d.4: enabled 0
868 12:28:12.384894 PCI: 00:1d.5: enabled 1
869 12:28:12.384977 PCI: 00:00.0: enabled 1
870 12:28:12.388376 PCI: 00:1e.0: enabled 1
871 12:28:12.391650 PCI: 00:1e.1: enabled 0
872 12:28:12.394869 PCI: 00:1e.2: enabled 1
873 12:28:12.398195 SPI: 00: enabled 1
874 12:28:12.398298 PCI: 00:1e.3: enabled 1
875 12:28:12.401523 SPI: 01: enabled 1
876 12:28:12.405043 PCI: 00:1f.0: enabled 1
877 12:28:12.408355 PNP: 0c09.0: enabled 1
878 12:28:12.408438 PCI: 00:1f.1: enabled 1
879 12:28:12.411758 PCI: 00:1f.2: enabled 1
880 12:28:12.414967 PCI: 00:1f.3: enabled 1
881 12:28:12.418192 PCI: 00:1f.4: enabled 1
882 12:28:12.421387 PCI: 00:1f.5: enabled 1
883 12:28:12.421485 PCI: 00:1f.6: enabled 0
884 12:28:12.424889 Root Device scanning...
885 12:28:12.428369 scan_static_bus for Root Device
886 12:28:12.431586 CPU_CLUSTER: 0 enabled
887 12:28:12.431680 DOMAIN: 0000 enabled
888 12:28:12.435240 DOMAIN: 0000 scanning...
889 12:28:12.438254 PCI: pci_scan_bus for bus 00
890 12:28:12.441368 PCI: 00:00.0 [8086/0000] ops
891 12:28:12.444593 PCI: 00:00.0 [8086/9b61] enabled
892 12:28:12.448208 PCI: 00:02.0 [8086/0000] bus ops
893 12:28:12.451247 PCI: 00:02.0 [8086/9b41] enabled
894 12:28:12.454538 PCI: 00:04.0 [8086/1903] disabled
895 12:28:12.457980 PCI: 00:08.0 [8086/1911] enabled
896 12:28:12.461425 PCI: 00:12.0 [8086/02f9] enabled
897 12:28:12.464580 PCI: 00:14.0 [8086/0000] bus ops
898 12:28:12.468317 PCI: 00:14.0 [8086/02ed] enabled
899 12:28:12.471620 PCI: 00:14.2 [8086/02ef] enabled
900 12:28:12.474850 PCI: 00:14.3 [8086/02f0] enabled
901 12:28:12.478172 PCI: 00:15.0 [8086/0000] bus ops
902 12:28:12.481060 PCI: 00:15.0 [8086/02e8] enabled
903 12:28:12.484805 PCI: 00:15.1 [8086/0000] bus ops
904 12:28:12.488305 PCI: 00:15.1 [8086/02e9] enabled
905 12:28:12.491022 PCI: 00:16.0 [8086/0000] ops
906 12:28:12.494932 PCI: 00:16.0 [8086/02e0] enabled
907 12:28:12.498144 PCI: 00:17.0 [8086/0000] ops
908 12:28:12.501542 PCI: 00:17.0 [8086/02d3] enabled
909 12:28:12.504307 PCI: 00:19.0 [8086/0000] bus ops
910 12:28:12.508029 PCI: 00:19.0 [8086/02c5] enabled
911 12:28:12.510918 PCI: 00:1d.0 [8086/0000] bus ops
912 12:28:12.514803 PCI: 00:1d.0 [8086/02b0] enabled
913 12:28:12.520994 PCI: Static device PCI: 00:1d.5 not found, disabling it.
914 12:28:12.524646 PCI: 00:1e.0 [8086/0000] ops
915 12:28:12.527722 PCI: 00:1e.0 [8086/02a8] enabled
916 12:28:12.531247 PCI: 00:1e.2 [8086/0000] bus ops
917 12:28:12.534260 PCI: 00:1e.2 [8086/02aa] enabled
918 12:28:12.537440 PCI: 00:1e.3 [8086/0000] bus ops
919 12:28:12.540931 PCI: 00:1e.3 [8086/02ab] enabled
920 12:28:12.544629 PCI: 00:1f.0 [8086/0000] bus ops
921 12:28:12.547803 PCI: 00:1f.0 [8086/0284] enabled
922 12:28:12.550775 PCI: Static device PCI: 00:1f.1 not found, disabling it.
923 12:28:12.557393 PCI: Static device PCI: 00:1f.2 not found, disabling it.
924 12:28:12.561001 PCI: 00:1f.3 [8086/0000] bus ops
925 12:28:12.564329 PCI: 00:1f.3 [8086/02c8] enabled
926 12:28:12.567331 PCI: 00:1f.4 [8086/0000] bus ops
927 12:28:12.570646 PCI: 00:1f.4 [8086/02a3] enabled
928 12:28:12.574358 PCI: 00:1f.5 [8086/0000] bus ops
929 12:28:12.577506 PCI: 00:1f.5 [8086/02a4] enabled
930 12:28:12.580988 PCI: Leftover static devices:
931 12:28:12.581078 PCI: 00:05.0
932 12:28:12.584159 PCI: 00:12.5
933 12:28:12.584245 PCI: 00:12.6
934 12:28:12.587606 PCI: 00:14.1
935 12:28:12.587689 PCI: 00:14.5
936 12:28:12.587762 PCI: 00:15.2
937 12:28:12.590417 PCI: 00:15.3
938 12:28:12.590495 PCI: 00:16.1
939 12:28:12.594199 PCI: 00:16.2
940 12:28:12.594283 PCI: 00:16.3
941 12:28:12.594354 PCI: 00:16.4
942 12:28:12.597463 PCI: 00:16.5
943 12:28:12.597594 PCI: 00:19.1
944 12:28:12.600380 PCI: 00:19.2
945 12:28:12.600509 PCI: 00:1a.0
946 12:28:12.603847 PCI: 00:1c.0
947 12:28:12.603979 PCI: 00:1c.1
948 12:28:12.604103 PCI: 00:1c.2
949 12:28:12.607174 PCI: 00:1c.3
950 12:28:12.607305 PCI: 00:1c.4
951 12:28:12.610502 PCI: 00:1c.5
952 12:28:12.610602 PCI: 00:1c.6
953 12:28:12.610681 PCI: 00:1c.7
954 12:28:12.613863 PCI: 00:1d.1
955 12:28:12.613962 PCI: 00:1d.2
956 12:28:12.616969 PCI: 00:1d.3
957 12:28:12.617067 PCI: 00:1d.4
958 12:28:12.617145 PCI: 00:1d.5
959 12:28:12.620479 PCI: 00:1e.1
960 12:28:12.620578 PCI: 00:1f.1
961 12:28:12.624034 PCI: 00:1f.2
962 12:28:12.624133 PCI: 00:1f.6
963 12:28:12.627288 PCI: Check your devicetree.cb.
964 12:28:12.630389 PCI: 00:02.0 scanning...
965 12:28:12.633758 scan_generic_bus for PCI: 00:02.0
966 12:28:12.637081 scan_generic_bus for PCI: 00:02.0 done
967 12:28:12.643622 scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
968 12:28:12.647672 PCI: 00:14.0 scanning...
969 12:28:12.650038 scan_static_bus for PCI: 00:14.0
970 12:28:12.650132 USB0 port 0 enabled
971 12:28:12.653655 USB0 port 0 scanning...
972 12:28:12.656811 scan_static_bus for USB0 port 0
973 12:28:12.659899 USB2 port 0 enabled
974 12:28:12.660036 USB2 port 1 enabled
975 12:28:12.663526 USB2 port 2 disabled
976 12:28:12.666772 USB2 port 3 disabled
977 12:28:12.666864 USB2 port 5 disabled
978 12:28:12.670302 USB2 port 6 enabled
979 12:28:12.670401 USB2 port 9 enabled
980 12:28:12.673456 USB3 port 0 enabled
981 12:28:12.677074 USB3 port 1 enabled
982 12:28:12.677173 USB3 port 2 enabled
983 12:28:12.680318 USB3 port 3 enabled
984 12:28:12.683417 USB3 port 4 disabled
985 12:28:12.683516 USB2 port 0 scanning...
986 12:28:12.686656 scan_static_bus for USB2 port 0
987 12:28:12.689730 scan_static_bus for USB2 port 0 done
988 12:28:12.696359 scan_bus: scanning of bus USB2 port 0 took 9704 usecs
989 12:28:12.700167 USB2 port 1 scanning...
990 12:28:12.703555 scan_static_bus for USB2 port 1
991 12:28:12.706957 scan_static_bus for USB2 port 1 done
992 12:28:12.712998 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
993 12:28:12.713097 USB2 port 6 scanning...
994 12:28:12.716377 scan_static_bus for USB2 port 6
995 12:28:12.723057 scan_static_bus for USB2 port 6 done
996 12:28:12.726421 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
997 12:28:12.729690 USB2 port 9 scanning...
998 12:28:12.732862 scan_static_bus for USB2 port 9
999 12:28:12.736277 scan_static_bus for USB2 port 9 done
1000 12:28:12.743172 scan_bus: scanning of bus USB2 port 9 took 9707 usecs
1001 12:28:12.743279 USB3 port 0 scanning...
1002 12:28:12.746667 scan_static_bus for USB3 port 0
1003 12:28:12.752998 scan_static_bus for USB3 port 0 done
1004 12:28:12.756160 scan_bus: scanning of bus USB3 port 0 took 9689 usecs
1005 12:28:12.759810 USB3 port 1 scanning...
1006 12:28:12.762915 scan_static_bus for USB3 port 1
1007 12:28:12.766598 scan_static_bus for USB3 port 1 done
1008 12:28:12.773009 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
1009 12:28:12.773101 USB3 port 2 scanning...
1010 12:28:12.776187 scan_static_bus for USB3 port 2
1011 12:28:12.783183 scan_static_bus for USB3 port 2 done
1012 12:28:12.786394 scan_bus: scanning of bus USB3 port 2 took 9697 usecs
1013 12:28:12.789845 USB3 port 3 scanning...
1014 12:28:12.792703 scan_static_bus for USB3 port 3
1015 12:28:12.796005 scan_static_bus for USB3 port 3 done
1016 12:28:12.802783 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
1017 12:28:12.805813 scan_static_bus for USB0 port 0 done
1018 12:28:12.812682 scan_bus: scanning of bus USB0 port 0 took 155387 usecs
1019 12:28:12.815936 scan_static_bus for PCI: 00:14.0 done
1020 12:28:12.819207 scan_bus: scanning of bus PCI: 00:14.0 took 173016 usecs
1021 12:28:12.822461 PCI: 00:15.0 scanning...
1022 12:28:12.825934 scan_generic_bus for PCI: 00:15.0
1023 12:28:12.832618 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1024 12:28:12.835966 scan_generic_bus for PCI: 00:15.0 done
1025 12:28:12.839210 scan_bus: scanning of bus PCI: 00:15.0 took 14298 usecs
1026 12:28:12.842649 PCI: 00:15.1 scanning...
1027 12:28:12.845752 scan_generic_bus for PCI: 00:15.1
1028 12:28:12.852649 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1029 12:28:12.855636 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1030 12:28:12.858980 scan_generic_bus for PCI: 00:15.1 done
1031 12:28:12.865386 scan_bus: scanning of bus PCI: 00:15.1 took 18699 usecs
1032 12:28:12.865484 PCI: 00:19.0 scanning...
1033 12:28:12.872416 scan_generic_bus for PCI: 00:19.0
1034 12:28:12.875945 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1035 12:28:12.878985 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1036 12:28:12.882640 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1037 12:28:12.885781 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1038 12:28:12.892057 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1039 12:28:12.895301 scan_generic_bus for PCI: 00:19.0 done
1040 12:28:12.902478 scan_bus: scanning of bus PCI: 00:19.0 took 30747 usecs
1041 12:28:12.902577 PCI: 00:1d.0 scanning...
1042 12:28:12.905690 do_pci_scan_bridge for PCI: 00:1d.0
1043 12:28:12.908645 PCI: pci_scan_bus for bus 01
1044 12:28:12.911919 PCI: 01:00.0 [1c5c/1327] enabled
1045 12:28:12.918962 Enabling Common Clock Configuration
1046 12:28:12.922322 L1 Sub-State supported from root port 29
1047 12:28:12.925117 L1 Sub-State Support = 0xf
1048 12:28:12.928514 CommonModeRestoreTime = 0x28
1049 12:28:12.931852 Power On Value = 0x16, Power On Scale = 0x0
1050 12:28:12.931951 ASPM: Enabled L1
1051 12:28:12.938383 scan_bus: scanning of bus PCI: 00:1d.0 took 32825 usecs
1052 12:28:12.942222 PCI: 00:1e.2 scanning...
1053 12:28:12.945176 scan_generic_bus for PCI: 00:1e.2
1054 12:28:12.948517 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1055 12:28:12.951950 scan_generic_bus for PCI: 00:1e.2 done
1056 12:28:12.958591 scan_bus: scanning of bus PCI: 00:1e.2 took 14005 usecs
1057 12:28:12.961822 PCI: 00:1e.3 scanning...
1058 12:28:12.965347 scan_generic_bus for PCI: 00:1e.3
1059 12:28:12.968786 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1060 12:28:12.971742 scan_generic_bus for PCI: 00:1e.3 done
1061 12:28:12.978211 scan_bus: scanning of bus PCI: 00:1e.3 took 14013 usecs
1062 12:28:12.982026 PCI: 00:1f.0 scanning...
1063 12:28:12.985035 scan_static_bus for PCI: 00:1f.0
1064 12:28:12.985134 PNP: 0c09.0 enabled
1065 12:28:12.988233 scan_static_bus for PCI: 00:1f.0 done
1066 12:28:12.994748 scan_bus: scanning of bus PCI: 00:1f.0 took 12039 usecs
1067 12:28:12.998494 PCI: 00:1f.3 scanning...
1068 12:28:13.004608 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1069 12:28:13.004707 PCI: 00:1f.4 scanning...
1070 12:28:13.011381 scan_generic_bus for PCI: 00:1f.4
1071 12:28:13.014782 scan_generic_bus for PCI: 00:1f.4 done
1072 12:28:13.017899 scan_bus: scanning of bus PCI: 00:1f.4 took 10179 usecs
1073 12:28:13.021179 PCI: 00:1f.5 scanning...
1074 12:28:13.024619 scan_generic_bus for PCI: 00:1f.5
1075 12:28:13.027940 scan_generic_bus for PCI: 00:1f.5 done
1076 12:28:13.034691 scan_bus: scanning of bus PCI: 00:1f.5 took 10184 usecs
1077 12:28:13.041706 scan_bus: scanning of bus DOMAIN: 0000 took 605156 usecs
1078 12:28:13.044479 scan_static_bus for Root Device done
1079 12:28:13.051104 scan_bus: scanning of bus Root Device took 625036 usecs
1080 12:28:13.051201 done
1081 12:28:13.054435 Chrome EC: UHEPI supported
1082 12:28:13.061205 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1083 12:28:13.064548 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1084 12:28:13.070996 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1085 12:28:13.078386 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1086 12:28:13.081917 SPI flash protection: WPSW=0 SRP0=0
1087 12:28:13.088195 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1088 12:28:13.091713 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1089 12:28:13.094926 found VGA at PCI: 00:02.0
1090 12:28:13.098102 Setting up VGA for PCI: 00:02.0
1091 12:28:13.105284 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1092 12:28:13.108046 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1093 12:28:13.111304 Allocating resources...
1094 12:28:13.114793 Reading resources...
1095 12:28:13.118061 Root Device read_resources bus 0 link: 0
1096 12:28:13.121517 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1097 12:28:13.127977 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1098 12:28:13.131453 DOMAIN: 0000 read_resources bus 0 link: 0
1099 12:28:13.138491 PCI: 00:14.0 read_resources bus 0 link: 0
1100 12:28:13.141830 USB0 port 0 read_resources bus 0 link: 0
1101 12:28:13.149702 USB0 port 0 read_resources bus 0 link: 0 done
1102 12:28:13.153447 PCI: 00:14.0 read_resources bus 0 link: 0 done
1103 12:28:13.160899 PCI: 00:15.0 read_resources bus 1 link: 0
1104 12:28:13.164053 PCI: 00:15.0 read_resources bus 1 link: 0 done
1105 12:28:13.170261 PCI: 00:15.1 read_resources bus 2 link: 0
1106 12:28:13.173501 PCI: 00:15.1 read_resources bus 2 link: 0 done
1107 12:28:13.181345 PCI: 00:19.0 read_resources bus 3 link: 0
1108 12:28:13.187969 PCI: 00:19.0 read_resources bus 3 link: 0 done
1109 12:28:13.191298 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 12:28:13.197592 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 12:28:13.201226 PCI: 00:1e.2 read_resources bus 4 link: 0
1112 12:28:13.207907 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1113 12:28:13.210967 PCI: 00:1e.3 read_resources bus 5 link: 0
1114 12:28:13.217224 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1115 12:28:13.221016 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 12:28:13.227517 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 12:28:13.234264 DOMAIN: 0000 read_resources bus 0 link: 0 done
1118 12:28:13.237384 Root Device read_resources bus 0 link: 0 done
1119 12:28:13.240686 Done reading resources.
1120 12:28:13.247361 Show resources in subtree (Root Device)...After reading.
1121 12:28:13.250485 Root Device child on link 0 CPU_CLUSTER: 0
1122 12:28:13.253899 CPU_CLUSTER: 0 child on link 0 APIC: 00
1123 12:28:13.257254 APIC: 00
1124 12:28:13.257350 APIC: 02
1125 12:28:13.257427 APIC: 01
1126 12:28:13.260625 APIC: 03
1127 12:28:13.260722 APIC: 05
1128 12:28:13.260798 APIC: 06
1129 12:28:13.264002 APIC: 07
1130 12:28:13.264100 APIC: 04
1131 12:28:13.270524 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1132 12:28:13.277030 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1133 12:28:13.323228 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1134 12:28:13.323530 PCI: 00:00.0
1135 12:28:13.323801 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1136 12:28:13.324789 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1137 12:28:13.325268 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1138 12:28:13.328772 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1139 12:28:13.335223 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1140 12:28:13.344592 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1141 12:28:13.355196 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1142 12:28:13.364975 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1143 12:28:13.374473 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1144 12:28:13.381231 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1145 12:28:13.391102 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1146 12:28:13.401440 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1147 12:28:13.410820 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1148 12:28:13.420813 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1149 12:28:13.430709 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1150 12:28:13.440866 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1151 12:28:13.440966 PCI: 00:02.0
1152 12:28:13.450224 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1153 12:28:13.460321 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1154 12:28:13.470378 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1155 12:28:13.470479 PCI: 00:04.0
1156 12:28:13.473583 PCI: 00:08.0
1157 12:28:13.483465 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 12:28:13.483565 PCI: 00:12.0
1159 12:28:13.493527 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 12:28:13.500204 PCI: 00:14.0 child on link 0 USB0 port 0
1161 12:28:13.510119 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 12:28:13.513369 USB0 port 0 child on link 0 USB2 port 0
1163 12:28:13.516532 USB2 port 0
1164 12:28:13.516630 USB2 port 1
1165 12:28:13.519990 USB2 port 2
1166 12:28:13.520088 USB2 port 3
1167 12:28:13.523071 USB2 port 5
1168 12:28:13.523178 USB2 port 6
1169 12:28:13.526470 USB2 port 9
1170 12:28:13.526568 USB3 port 0
1171 12:28:13.529937 USB3 port 1
1172 12:28:13.530035 USB3 port 2
1173 12:28:13.533100 USB3 port 3
1174 12:28:13.533198 USB3 port 4
1175 12:28:13.536549 PCI: 00:14.2
1176 12:28:13.546808 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1177 12:28:13.556692 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 12:28:13.556792 PCI: 00:14.3
1179 12:28:13.566419 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1180 12:28:13.573012 PCI: 00:15.0 child on link 0 I2C: 01:15
1181 12:28:13.582825 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 12:28:13.582930 I2C: 01:15
1183 12:28:13.586217 PCI: 00:15.1 child on link 0 I2C: 02:5d
1184 12:28:13.596164 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 12:28:13.599570 I2C: 02:5d
1186 12:28:13.599667 GENERIC: 0.0
1187 12:28:13.602756 PCI: 00:16.0
1188 12:28:13.612720 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 12:28:13.612819 PCI: 00:17.0
1190 12:28:13.622870 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1191 12:28:13.632428 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1192 12:28:13.639091 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1193 12:28:13.649313 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1194 12:28:13.655885 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1195 12:28:13.665711 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1196 12:28:13.669052 PCI: 00:19.0 child on link 0 I2C: 03:1a
1197 12:28:13.679031 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 12:28:13.682404 I2C: 03:1a
1199 12:28:13.682502 I2C: 03:38
1200 12:28:13.685908 I2C: 03:39
1201 12:28:13.686006 I2C: 03:3a
1202 12:28:13.689205 I2C: 03:3b
1203 12:28:13.692566 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1204 12:28:13.702420 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1205 12:28:13.712268 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1206 12:28:13.718721 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1207 12:28:13.721798 PCI: 01:00.0
1208 12:28:13.731689 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1209 12:28:13.734915 PCI: 00:1e.0
1210 12:28:13.745145 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1211 12:28:13.754920 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1212 12:28:13.758381 PCI: 00:1e.2 child on link 0 SPI: 00
1213 12:28:13.768395 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:28:13.768536 SPI: 00
1215 12:28:13.774997 PCI: 00:1e.3 child on link 0 SPI: 01
1216 12:28:13.784776 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 12:28:13.784914 SPI: 01
1218 12:28:13.787982 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 12:28:13.797741 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 12:28:13.807610 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1221 12:28:13.807745 PNP: 0c09.0
1222 12:28:13.817595 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1223 12:28:13.817729 PCI: 00:1f.3
1224 12:28:13.827333 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 12:28:13.840996 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1226 12:28:13.841134 PCI: 00:1f.4
1227 12:28:13.850591 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1228 12:28:13.860357 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1229 12:28:13.860493 PCI: 00:1f.5
1230 12:28:13.870352 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1231 12:28:13.877047 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1232 12:28:13.883547 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1233 12:28:13.889897 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1234 12:28:13.893215 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1235 12:28:13.896677 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1236 12:28:13.899993 PCI: 00:17.0 18 * [0x60 - 0x67] io
1237 12:28:13.903458 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1238 12:28:13.910031 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1239 12:28:13.916477 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1240 12:28:13.926545 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 12:28:13.933119 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 12:28:13.939500 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1243 12:28:13.946590 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1244 12:28:13.952664 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1245 12:28:13.956279 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1246 12:28:13.962724 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1247 12:28:13.966115 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1248 12:28:13.972779 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1249 12:28:13.975769 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1250 12:28:13.982674 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1251 12:28:13.985916 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1252 12:28:13.992632 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1253 12:28:13.995887 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1254 12:28:14.002405 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1255 12:28:14.005638 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1256 12:28:14.012124 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1257 12:28:14.015526 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1258 12:28:14.018811 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1259 12:28:14.025412 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1260 12:28:14.028833 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1261 12:28:14.035351 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1262 12:28:14.038852 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1263 12:28:14.045283 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1264 12:28:14.048730 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1265 12:28:14.055046 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1266 12:28:14.058271 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1267 12:28:14.065029 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1268 12:28:14.071525 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1269 12:28:14.075319 avoid_fixed_resources: DOMAIN: 0000
1270 12:28:14.081564 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1271 12:28:14.088261 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1272 12:28:14.094944 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1273 12:28:14.105019 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1274 12:28:14.111836 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1275 12:28:14.118293 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1276 12:28:14.128307 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1277 12:28:14.134806 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1278 12:28:14.141501 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1279 12:28:14.148109 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1280 12:28:14.157900 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1281 12:28:14.164240 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1282 12:28:14.164374 Setting resources...
1283 12:28:14.171351 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1284 12:28:14.178031 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1285 12:28:14.181111 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1286 12:28:14.184487 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1287 12:28:14.187575 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1288 12:28:14.194560 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1289 12:28:14.200862 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1290 12:28:14.207536 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1291 12:28:14.214264 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1292 12:28:14.220820 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1293 12:28:14.224253 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1294 12:28:14.230959 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1295 12:28:14.234361 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1296 12:28:14.240897 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1297 12:28:14.244378 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1298 12:28:14.250456 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1299 12:28:14.254207 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1300 12:28:14.257062 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1301 12:28:14.263835 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1302 12:28:14.267341 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1303 12:28:14.273737 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1304 12:28:14.277042 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1305 12:28:14.283810 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1306 12:28:14.286944 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1307 12:28:14.293937 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1308 12:28:14.296844 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1309 12:28:14.303891 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1310 12:28:14.306896 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1311 12:28:14.313592 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1312 12:28:14.316904 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1313 12:28:14.323783 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1314 12:28:14.326971 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1315 12:28:14.333500 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1316 12:28:14.343148 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1317 12:28:14.349867 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1318 12:28:14.356266 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1319 12:28:14.359775 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1320 12:28:14.369912 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1321 12:28:14.373029 Root Device assign_resources, bus 0 link: 0
1322 12:28:14.376292 DOMAIN: 0000 assign_resources, bus 0 link: 0
1323 12:28:14.386863 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1324 12:28:14.393460 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1325 12:28:14.402884 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1326 12:28:14.409990 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1327 12:28:14.420026 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1328 12:28:14.426417 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1329 12:28:14.432919 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 12:28:14.436162 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 12:28:14.446266 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1332 12:28:14.452779 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1333 12:28:14.462414 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1334 12:28:14.469338 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1335 12:28:14.472509 PCI: 00:15.0 assign_resources, bus 1 link: 0
1336 12:28:14.479246 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 12:28:14.485707 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1338 12:28:14.492376 PCI: 00:15.1 assign_resources, bus 2 link: 0
1339 12:28:14.495872 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 12:28:14.505812 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1341 12:28:14.512739 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1342 12:28:14.519045 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1343 12:28:14.528977 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1344 12:28:14.535865 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1345 12:28:14.542094 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1346 12:28:14.552312 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1347 12:28:14.558700 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1348 12:28:14.565503 PCI: 00:19.0 assign_resources, bus 3 link: 0
1349 12:28:14.568856 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 12:28:14.578736 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1351 12:28:14.585328 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1352 12:28:14.594705 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1353 12:28:14.598589 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1354 12:28:14.607845 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1355 12:28:14.611409 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1356 12:28:14.621584 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1357 12:28:14.628130 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1358 12:28:14.634415 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1359 12:28:14.637616 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 12:28:14.647545 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1361 12:28:14.650831 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1362 12:28:14.654310 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 12:28:14.661036 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1364 12:28:14.664490 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 12:28:14.671092 LPC: Trying to open IO window from 800 size 1ff
1366 12:28:14.677347 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1367 12:28:14.687005 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1368 12:28:14.694038 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1369 12:28:14.703927 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1370 12:28:14.706997 DOMAIN: 0000 assign_resources, bus 0 link: 0
1371 12:28:14.713982 Root Device assign_resources, bus 0 link: 0
1372 12:28:14.714082 Done setting resources.
1373 12:28:14.720421 Show resources in subtree (Root Device)...After assigning values.
1374 12:28:14.726878 Root Device child on link 0 CPU_CLUSTER: 0
1375 12:28:14.730175 CPU_CLUSTER: 0 child on link 0 APIC: 00
1376 12:28:14.730271 APIC: 00
1377 12:28:14.733548 APIC: 02
1378 12:28:14.733644 APIC: 01
1379 12:28:14.733719 APIC: 03
1380 12:28:14.736986 APIC: 05
1381 12:28:14.737081 APIC: 06
1382 12:28:14.740126 APIC: 07
1383 12:28:14.740221 APIC: 04
1384 12:28:14.743549 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1385 12:28:14.753597 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1386 12:28:14.766899 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1387 12:28:14.766998 PCI: 00:00.0
1388 12:28:14.776479 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1389 12:28:14.786413 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1390 12:28:14.796396 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1391 12:28:14.806394 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1392 12:28:14.812760 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1393 12:28:14.823047 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1394 12:28:14.832703 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1395 12:28:14.842379 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1396 12:28:14.852668 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1397 12:28:14.859011 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1398 12:28:14.869161 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1399 12:28:14.879175 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1400 12:28:14.888596 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1401 12:28:14.898786 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1402 12:28:14.908906 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1403 12:28:14.918711 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1404 12:28:14.918817 PCI: 00:02.0
1405 12:28:14.928671 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1406 12:28:14.938418 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1407 12:28:14.948413 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1408 12:28:14.951823 PCI: 00:04.0
1409 12:28:14.951962 PCI: 00:08.0
1410 12:28:14.961723 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1411 12:28:14.964892 PCI: 00:12.0
1412 12:28:14.974909 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1413 12:28:14.977993 PCI: 00:14.0 child on link 0 USB0 port 0
1414 12:28:14.987771 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1415 12:28:14.994325 USB0 port 0 child on link 0 USB2 port 0
1416 12:28:14.994433 USB2 port 0
1417 12:28:14.997788 USB2 port 1
1418 12:28:14.997926 USB2 port 2
1419 12:28:15.001604 USB2 port 3
1420 12:28:15.001734 USB2 port 5
1421 12:28:15.004298 USB2 port 6
1422 12:28:15.004427 USB2 port 9
1423 12:28:15.007793 USB3 port 0
1424 12:28:15.010847 USB3 port 1
1425 12:28:15.010941 USB3 port 2
1426 12:28:15.014565 USB3 port 3
1427 12:28:15.014661 USB3 port 4
1428 12:28:15.017817 PCI: 00:14.2
1429 12:28:15.027467 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1430 12:28:15.037807 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1431 12:28:15.037907 PCI: 00:14.3
1432 12:28:15.047246 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1433 12:28:15.054226 PCI: 00:15.0 child on link 0 I2C: 01:15
1434 12:28:15.063895 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1435 12:28:15.063996 I2C: 01:15
1436 12:28:15.070543 PCI: 00:15.1 child on link 0 I2C: 02:5d
1437 12:28:15.080572 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1438 12:28:15.080672 I2C: 02:5d
1439 12:28:15.084308 GENERIC: 0.0
1440 12:28:15.084405 PCI: 00:16.0
1441 12:28:15.093795 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1442 12:28:15.096992 PCI: 00:17.0
1443 12:28:15.106983 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1444 12:28:15.116814 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1445 12:28:15.126677 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1446 12:28:15.136384 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1447 12:28:15.143097 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1448 12:28:15.152993 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1449 12:28:15.159944 PCI: 00:19.0 child on link 0 I2C: 03:1a
1450 12:28:15.169918 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1451 12:28:15.170024 I2C: 03:1a
1452 12:28:15.173214 I2C: 03:38
1453 12:28:15.173313 I2C: 03:39
1454 12:28:15.176439 I2C: 03:3a
1455 12:28:15.176537 I2C: 03:3b
1456 12:28:15.183056 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1457 12:28:15.189607 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1458 12:28:15.199479 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1459 12:28:15.212472 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1460 12:28:15.212574 PCI: 01:00.0
1461 12:28:15.222571 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1462 12:28:15.225893 PCI: 00:1e.0
1463 12:28:15.235912 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1464 12:28:15.245503 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1465 12:28:15.249174 PCI: 00:1e.2 child on link 0 SPI: 00
1466 12:28:15.262334 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1467 12:28:15.262434 SPI: 00
1468 12:28:15.265591 PCI: 00:1e.3 child on link 0 SPI: 01
1469 12:28:15.275274 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1470 12:28:15.278769 SPI: 01
1471 12:28:15.282137 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1472 12:28:15.292235 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1473 12:28:15.298773 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1474 12:28:15.302158 PNP: 0c09.0
1475 12:28:15.308905 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1476 12:28:15.312070 PCI: 00:1f.3
1477 12:28:15.321651 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1478 12:28:15.331591 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1479 12:28:15.334752 PCI: 00:1f.4
1480 12:28:15.341429 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1481 12:28:15.354558 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1482 12:28:15.354656 PCI: 00:1f.5
1483 12:28:15.364222 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1484 12:28:15.368077 Done allocating resources.
1485 12:28:15.374586 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1486 12:28:15.374676 Enabling resources...
1487 12:28:15.381735 PCI: 00:00.0 subsystem <- 8086/9b61
1488 12:28:15.381826 PCI: 00:00.0 cmd <- 06
1489 12:28:15.384969 PCI: 00:02.0 subsystem <- 8086/9b41
1490 12:28:15.388591 PCI: 00:02.0 cmd <- 03
1491 12:28:15.391806 PCI: 00:08.0 cmd <- 06
1492 12:28:15.394960 PCI: 00:12.0 subsystem <- 8086/02f9
1493 12:28:15.398279 PCI: 00:12.0 cmd <- 02
1494 12:28:15.401550 PCI: 00:14.0 subsystem <- 8086/02ed
1495 12:28:15.404741 PCI: 00:14.0 cmd <- 02
1496 12:28:15.407971 PCI: 00:14.2 cmd <- 02
1497 12:28:15.411617 PCI: 00:14.3 subsystem <- 8086/02f0
1498 12:28:15.414379 PCI: 00:14.3 cmd <- 02
1499 12:28:15.417736 PCI: 00:15.0 subsystem <- 8086/02e8
1500 12:28:15.417822 PCI: 00:15.0 cmd <- 02
1501 12:28:15.424858 PCI: 00:15.1 subsystem <- 8086/02e9
1502 12:28:15.424950 PCI: 00:15.1 cmd <- 02
1503 12:28:15.428127 PCI: 00:16.0 subsystem <- 8086/02e0
1504 12:28:15.431322 PCI: 00:16.0 cmd <- 02
1505 12:28:15.434620 PCI: 00:17.0 subsystem <- 8086/02d3
1506 12:28:15.437823 PCI: 00:17.0 cmd <- 03
1507 12:28:15.441376 PCI: 00:19.0 subsystem <- 8086/02c5
1508 12:28:15.444214 PCI: 00:19.0 cmd <- 02
1509 12:28:15.447679 PCI: 00:1d.0 bridge ctrl <- 0013
1510 12:28:15.451178 PCI: 00:1d.0 subsystem <- 8086/02b0
1511 12:28:15.454173 PCI: 00:1d.0 cmd <- 06
1512 12:28:15.457484 PCI: 00:1e.0 subsystem <- 8086/02a8
1513 12:28:15.460805 PCI: 00:1e.0 cmd <- 06
1514 12:28:15.464209 PCI: 00:1e.2 subsystem <- 8086/02aa
1515 12:28:15.467575 PCI: 00:1e.2 cmd <- 06
1516 12:28:15.470678 PCI: 00:1e.3 subsystem <- 8086/02ab
1517 12:28:15.474371 PCI: 00:1e.3 cmd <- 02
1518 12:28:15.477500 PCI: 00:1f.0 subsystem <- 8086/0284
1519 12:28:15.480787 PCI: 00:1f.0 cmd <- 407
1520 12:28:15.483883 PCI: 00:1f.3 subsystem <- 8086/02c8
1521 12:28:15.483973 PCI: 00:1f.3 cmd <- 02
1522 12:28:15.490731 PCI: 00:1f.4 subsystem <- 8086/02a3
1523 12:28:15.490823 PCI: 00:1f.4 cmd <- 03
1524 12:28:15.493924 PCI: 00:1f.5 subsystem <- 8086/02a4
1525 12:28:15.497242 PCI: 00:1f.5 cmd <- 406
1526 12:28:15.507261 PCI: 01:00.0 cmd <- 02
1527 12:28:15.512185 done.
1528 12:28:15.525707 ME: Version: 14.0.39.1367
1529 12:28:15.532360 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1530 12:28:15.536384 Initializing devices...
1531 12:28:15.536483 Root Device init ...
1532 12:28:15.542380 Chrome EC: Set SMI mask to 0x0000000000000000
1533 12:28:15.545266 Chrome EC: clear events_b mask to 0x0000000000000000
1534 12:28:15.552406 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1535 12:28:15.559128 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1536 12:28:15.565384 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1537 12:28:15.568775 Chrome EC: Set WAKE mask to 0x0000000000000000
1538 12:28:15.572007 Root Device init finished in 35206 usecs
1539 12:28:15.575818 CPU_CLUSTER: 0 init ...
1540 12:28:15.582564 CPU_CLUSTER: 0 init finished in 2447 usecs
1541 12:28:15.586381 PCI: 00:00.0 init ...
1542 12:28:15.590070 CPU TDP: 15 Watts
1543 12:28:15.593149 CPU PL2 = 64 Watts
1544 12:28:15.596560 PCI: 00:00.0 init finished in 7083 usecs
1545 12:28:15.599717 PCI: 00:02.0 init ...
1546 12:28:15.603110 PCI: 00:02.0 init finished in 2253 usecs
1547 12:28:15.606336 PCI: 00:08.0 init ...
1548 12:28:15.609583 PCI: 00:08.0 init finished in 2252 usecs
1549 12:28:15.612852 PCI: 00:12.0 init ...
1550 12:28:15.616138 PCI: 00:12.0 init finished in 2252 usecs
1551 12:28:15.619554 PCI: 00:14.0 init ...
1552 12:28:15.622891 PCI: 00:14.0 init finished in 2251 usecs
1553 12:28:15.626103 PCI: 00:14.2 init ...
1554 12:28:15.629489 PCI: 00:14.2 init finished in 2252 usecs
1555 12:28:15.632646 PCI: 00:14.3 init ...
1556 12:28:15.636028 PCI: 00:14.3 init finished in 2272 usecs
1557 12:28:15.639464 PCI: 00:15.0 init ...
1558 12:28:15.642554 DW I2C bus 0 at 0xd121f000 (400 KHz)
1559 12:28:15.646259 PCI: 00:15.0 init finished in 5975 usecs
1560 12:28:15.649443 PCI: 00:15.1 init ...
1561 12:28:15.652908 DW I2C bus 1 at 0xd1220000 (400 KHz)
1562 12:28:15.659342 PCI: 00:15.1 init finished in 5973 usecs
1563 12:28:15.659439 PCI: 00:16.0 init ...
1564 12:28:15.665942 PCI: 00:16.0 init finished in 2252 usecs
1565 12:28:15.668833 PCI: 00:19.0 init ...
1566 12:28:15.672725 DW I2C bus 4 at 0xd1222000 (400 KHz)
1567 12:28:15.675945 PCI: 00:19.0 init finished in 5974 usecs
1568 12:28:15.679430 PCI: 00:1d.0 init ...
1569 12:28:15.682076 Initializing PCH PCIe bridge.
1570 12:28:15.685528 PCI: 00:1d.0 init finished in 5282 usecs
1571 12:28:15.688938 PCI: 00:1f.0 init ...
1572 12:28:15.692170 IOAPIC: Initializing IOAPIC at 0xfec00000
1573 12:28:15.698774 IOAPIC: Bootstrap Processor Local APIC = 0x00
1574 12:28:15.698884 IOAPIC: ID = 0x02
1575 12:28:15.701922 IOAPIC: Dumping registers
1576 12:28:15.705403 reg 0x0000: 0x02000000
1577 12:28:15.708664 reg 0x0001: 0x00770020
1578 12:28:15.708759 reg 0x0002: 0x00000000
1579 12:28:15.715347 PCI: 00:1f.0 init finished in 23545 usecs
1580 12:28:15.718778 PCI: 00:1f.4 init ...
1581 12:28:15.721542 PCI: 00:1f.4 init finished in 2260 usecs
1582 12:28:15.732571 PCI: 01:00.0 init ...
1583 12:28:15.735857 PCI: 01:00.0 init finished in 2252 usecs
1584 12:28:15.740265 PNP: 0c09.0 init ...
1585 12:28:15.743194 Google Chrome EC uptime: 11.066 seconds
1586 12:28:15.750170 Google Chrome AP resets since EC boot: 0
1587 12:28:15.752966 Google Chrome most recent AP reset causes:
1588 12:28:15.760559 Google Chrome EC reset flags at last EC boot: reset-pin
1589 12:28:15.763277 PNP: 0c09.0 init finished in 20558 usecs
1590 12:28:15.766569 Devices initialized
1591 12:28:15.769925 Show all devs... After init.
1592 12:28:15.770014 Root Device: enabled 1
1593 12:28:15.773053 CPU_CLUSTER: 0: enabled 1
1594 12:28:15.776623 DOMAIN: 0000: enabled 1
1595 12:28:15.776725 APIC: 00: enabled 1
1596 12:28:15.779905 PCI: 00:00.0: enabled 1
1597 12:28:15.783150 PCI: 00:02.0: enabled 1
1598 12:28:15.786415 PCI: 00:04.0: enabled 0
1599 12:28:15.786513 PCI: 00:05.0: enabled 0
1600 12:28:15.789245 PCI: 00:12.0: enabled 1
1601 12:28:15.792960 PCI: 00:12.5: enabled 0
1602 12:28:15.796317 PCI: 00:12.6: enabled 0
1603 12:28:15.796417 PCI: 00:14.0: enabled 1
1604 12:28:15.799568 PCI: 00:14.1: enabled 0
1605 12:28:15.802750 PCI: 00:14.3: enabled 1
1606 12:28:15.802849 PCI: 00:14.5: enabled 0
1607 12:28:15.806038 PCI: 00:15.0: enabled 1
1608 12:28:15.809298 PCI: 00:15.1: enabled 1
1609 12:28:15.812617 PCI: 00:15.2: enabled 0
1610 12:28:15.812716 PCI: 00:15.3: enabled 0
1611 12:28:15.815864 PCI: 00:16.0: enabled 1
1612 12:28:15.819212 PCI: 00:16.1: enabled 0
1613 12:28:15.822635 PCI: 00:16.2: enabled 0
1614 12:28:15.822733 PCI: 00:16.3: enabled 0
1615 12:28:15.826149 PCI: 00:16.4: enabled 0
1616 12:28:15.829470 PCI: 00:16.5: enabled 0
1617 12:28:15.832645 PCI: 00:17.0: enabled 1
1618 12:28:15.832755 PCI: 00:19.0: enabled 1
1619 12:28:15.835860 PCI: 00:19.1: enabled 0
1620 12:28:15.839373 PCI: 00:19.2: enabled 0
1621 12:28:15.842642 PCI: 00:1a.0: enabled 0
1622 12:28:15.842755 PCI: 00:1c.0: enabled 0
1623 12:28:15.845781 PCI: 00:1c.1: enabled 0
1624 12:28:15.849367 PCI: 00:1c.2: enabled 0
1625 12:28:15.849467 PCI: 00:1c.3: enabled 0
1626 12:28:15.852518 PCI: 00:1c.4: enabled 0
1627 12:28:15.856068 PCI: 00:1c.5: enabled 0
1628 12:28:15.859360 PCI: 00:1c.6: enabled 0
1629 12:28:15.859497 PCI: 00:1c.7: enabled 0
1630 12:28:15.862555 PCI: 00:1d.0: enabled 1
1631 12:28:15.865884 PCI: 00:1d.1: enabled 0
1632 12:28:15.868990 PCI: 00:1d.2: enabled 0
1633 12:28:15.869084 PCI: 00:1d.3: enabled 0
1634 12:28:15.872513 PCI: 00:1d.4: enabled 0
1635 12:28:15.875408 PCI: 00:1d.5: enabled 0
1636 12:28:15.878683 PCI: 00:1e.0: enabled 1
1637 12:28:15.878764 PCI: 00:1e.1: enabled 0
1638 12:28:15.881902 PCI: 00:1e.2: enabled 1
1639 12:28:15.885357 PCI: 00:1e.3: enabled 1
1640 12:28:15.885435 PCI: 00:1f.0: enabled 1
1641 12:28:15.888871 PCI: 00:1f.1: enabled 0
1642 12:28:15.892170 PCI: 00:1f.2: enabled 0
1643 12:28:15.895421 PCI: 00:1f.3: enabled 1
1644 12:28:15.895497 PCI: 00:1f.4: enabled 1
1645 12:28:15.898483 PCI: 00:1f.5: enabled 1
1646 12:28:15.902033 PCI: 00:1f.6: enabled 0
1647 12:28:15.905610 USB0 port 0: enabled 1
1648 12:28:15.905704 I2C: 01:15: enabled 1
1649 12:28:15.908348 I2C: 02:5d: enabled 1
1650 12:28:15.911984 GENERIC: 0.0: enabled 1
1651 12:28:15.912077 I2C: 03:1a: enabled 1
1652 12:28:15.915582 I2C: 03:38: enabled 1
1653 12:28:15.918766 I2C: 03:39: enabled 1
1654 12:28:15.918853 I2C: 03:3a: enabled 1
1655 12:28:15.921993 I2C: 03:3b: enabled 1
1656 12:28:15.925163 PCI: 00:00.0: enabled 1
1657 12:28:15.925251 SPI: 00: enabled 1
1658 12:28:15.928415 SPI: 01: enabled 1
1659 12:28:15.931785 PNP: 0c09.0: enabled 1
1660 12:28:15.931880 USB2 port 0: enabled 1
1661 12:28:15.935167 USB2 port 1: enabled 1
1662 12:28:15.938562 USB2 port 2: enabled 0
1663 12:28:15.941869 USB2 port 3: enabled 0
1664 12:28:15.941958 USB2 port 5: enabled 0
1665 12:28:15.945161 USB2 port 6: enabled 1
1666 12:28:15.948462 USB2 port 9: enabled 1
1667 12:28:15.948572 USB3 port 0: enabled 1
1668 12:28:15.951760 USB3 port 1: enabled 1
1669 12:28:15.954934 USB3 port 2: enabled 1
1670 12:28:15.955034 USB3 port 3: enabled 1
1671 12:28:15.958609 USB3 port 4: enabled 0
1672 12:28:15.961533 APIC: 02: enabled 1
1673 12:28:15.961662 APIC: 01: enabled 1
1674 12:28:15.964784 APIC: 03: enabled 1
1675 12:28:15.968458 APIC: 05: enabled 1
1676 12:28:15.968551 APIC: 06: enabled 1
1677 12:28:15.971854 APIC: 07: enabled 1
1678 12:28:15.971944 APIC: 04: enabled 1
1679 12:28:15.974772 PCI: 00:08.0: enabled 1
1680 12:28:15.978037 PCI: 00:14.2: enabled 1
1681 12:28:15.981308 PCI: 01:00.0: enabled 1
1682 12:28:15.985002 Disabling ACPI via APMC:
1683 12:28:15.987974 done.
1684 12:28:15.991591 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1685 12:28:15.995001 ELOG: NV offset 0xaf0000 size 0x4000
1686 12:28:16.001480 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1687 12:28:16.008247 ELOG: Event(17) added with size 13 at 2023-03-13 12:28:16 UTC
1688 12:28:16.014644 ELOG: Event(92) added with size 9 at 2023-03-13 12:28:16 UTC
1689 12:28:16.021360 ELOG: Event(93) added with size 9 at 2023-03-13 12:28:16 UTC
1690 12:28:16.028446 ELOG: Event(9A) added with size 9 at 2023-03-13 12:28:16 UTC
1691 12:28:16.034851 ELOG: Event(9E) added with size 10 at 2023-03-13 12:28:16 UTC
1692 12:28:16.041745 ELOG: Event(9F) added with size 14 at 2023-03-13 12:28:16 UTC
1693 12:28:16.044374 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1694 12:28:16.052087 ELOG: Event(A1) added with size 10 at 2023-03-13 12:28:16 UTC
1695 12:28:16.061596 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1696 12:28:16.068634 ELOG: Event(A0) added with size 9 at 2023-03-13 12:28:16 UTC
1697 12:28:16.071321 elog_add_boot_reason: Logged dev mode boot
1698 12:28:16.074662 Finalize devices...
1699 12:28:16.074750 PCI: 00:17.0 final
1700 12:28:16.077998 Devices finalized
1701 12:28:16.081555 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1702 12:28:16.088206 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1703 12:28:16.091589 ME: HFSTS1 : 0x90000245
1704 12:28:16.094819 ME: HFSTS2 : 0x3B850126
1705 12:28:16.101585 ME: HFSTS3 : 0x00000020
1706 12:28:16.105391 ME: HFSTS4 : 0x00004800
1707 12:28:16.108145 ME: HFSTS5 : 0x00000000
1708 12:28:16.111088 ME: HFSTS6 : 0x40400006
1709 12:28:16.114315 ME: Manufacturing Mode : NO
1710 12:28:16.118129 ME: FW Partition Table : OK
1711 12:28:16.121179 ME: Bringup Loader Failure : NO
1712 12:28:16.124744 ME: Firmware Init Complete : YES
1713 12:28:16.127844 ME: Boot Options Present : NO
1714 12:28:16.130936 ME: Update In Progress : NO
1715 12:28:16.134509 ME: D0i3 Support : YES
1716 12:28:16.137645 ME: Low Power State Enabled : NO
1717 12:28:16.141169 ME: CPU Replaced : NO
1718 12:28:16.144687 ME: CPU Replacement Valid : YES
1719 12:28:16.147458 ME: Current Working State : 5
1720 12:28:16.150917 ME: Current Operation State : 1
1721 12:28:16.154310 ME: Current Operation Mode : 0
1722 12:28:16.157474 ME: Error Code : 0
1723 12:28:16.160778 ME: CPU Debug Disabled : YES
1724 12:28:16.164008 ME: TXT Support : NO
1725 12:28:16.170675 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1726 12:28:16.177558 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1727 12:28:16.177657 CBFS @ c08000 size 3f8000
1728 12:28:16.183774 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1729 12:28:16.187050 CBFS: Locating 'fallback/dsdt.aml'
1730 12:28:16.190182 CBFS: Found @ offset 10bb80 size 3fa5
1731 12:28:16.197003 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1732 12:28:16.200197 CBFS @ c08000 size 3f8000
1733 12:28:16.206950 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1734 12:28:16.207041 CBFS: Locating 'fallback/slic'
1735 12:28:16.212548 CBFS: 'fallback/slic' not found.
1736 12:28:16.218933 ACPI: Writing ACPI tables at 99b3e000.
1737 12:28:16.219023 ACPI: * FACS
1738 12:28:16.222142 ACPI: * DSDT
1739 12:28:16.225840 Ramoops buffer: 0x100000@0x99a3d000.
1740 12:28:16.228877 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1741 12:28:16.235766 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1742 12:28:16.238701 Google Chrome EC: version:
1743 12:28:16.242233 ro: helios_v2.0.2659-56403530b
1744 12:28:16.245285 rw: helios_v2.0.2849-c41de27e7d
1745 12:28:16.245382 running image: 1
1746 12:28:16.249739 ACPI: * FADT
1747 12:28:16.249880 SCI is IRQ9
1748 12:28:16.256316 ACPI: added table 1/32, length now 40
1749 12:28:16.256416 ACPI: * SSDT
1750 12:28:16.259586 Found 1 CPU(s) with 8 core(s) each.
1751 12:28:16.262907 Error: Could not locate 'wifi_sar' in VPD.
1752 12:28:16.269439 Checking CBFS for default SAR values
1753 12:28:16.273087 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1754 12:28:16.276100 CBFS @ c08000 size 3f8000
1755 12:28:16.282959 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1756 12:28:16.286456 CBFS: Locating 'wifi_sar_defaults.hex'
1757 12:28:16.289225 CBFS: Found @ offset 5fac0 size 77
1758 12:28:16.292775 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1759 12:28:16.299107 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1760 12:28:16.302481 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1761 12:28:16.309063 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1762 12:28:16.312515 failed to find key in VPD: dsm_calib_r0_0
1763 12:28:16.322463 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1764 12:28:16.325818 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1765 12:28:16.329041 failed to find key in VPD: dsm_calib_r0_1
1766 12:28:16.339071 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1767 12:28:16.345793 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1768 12:28:16.348888 failed to find key in VPD: dsm_calib_r0_2
1769 12:28:16.358848 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1770 12:28:16.361956 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1771 12:28:16.369301 failed to find key in VPD: dsm_calib_r0_3
1772 12:28:16.375472 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1773 12:28:16.382110 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1774 12:28:16.385459 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1775 12:28:16.388387 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1776 12:28:16.392816 EC returned error result code 1
1777 12:28:16.396773 EC returned error result code 1
1778 12:28:16.400033 EC returned error result code 1
1779 12:28:16.406794 PS2K: Bad resp from EC. Vivaldi disabled!
1780 12:28:16.410110 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1781 12:28:16.416745 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1782 12:28:16.423289 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1783 12:28:16.426908 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1784 12:28:16.433331 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1785 12:28:16.439951 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1786 12:28:16.446256 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1787 12:28:16.449716 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1788 12:28:16.456309 ACPI: added table 2/32, length now 44
1789 12:28:16.456408 ACPI: * MCFG
1790 12:28:16.460007 ACPI: added table 3/32, length now 48
1791 12:28:16.462952 ACPI: * TPM2
1792 12:28:16.466486 TPM2 log created at 99a2d000
1793 12:28:16.469513 ACPI: added table 4/32, length now 52
1794 12:28:16.469613 ACPI: * MADT
1795 12:28:16.472823 SCI is IRQ9
1796 12:28:16.476549 ACPI: added table 5/32, length now 56
1797 12:28:16.476646 current = 99b43ac0
1798 12:28:16.479821 ACPI: * DMAR
1799 12:28:16.482855 ACPI: added table 6/32, length now 60
1800 12:28:16.485970 ACPI: * IGD OpRegion
1801 12:28:16.486056 GMA: Found VBT in CBFS
1802 12:28:16.489724 GMA: Found valid VBT in CBFS
1803 12:28:16.492958 ACPI: added table 7/32, length now 64
1804 12:28:16.495876 ACPI: * HPET
1805 12:28:16.499608 ACPI: added table 8/32, length now 68
1806 12:28:16.499705 ACPI: done.
1807 12:28:16.502982 ACPI tables: 31744 bytes.
1808 12:28:16.506226 smbios_write_tables: 99a2c000
1809 12:28:16.509681 EC returned error result code 3
1810 12:28:16.512437 Couldn't obtain OEM name from CBI
1811 12:28:16.515831 Create SMBIOS type 17
1812 12:28:16.519594 PCI: 00:00.0 (Intel Cannonlake)
1813 12:28:16.523055 PCI: 00:14.3 (Intel WiFi)
1814 12:28:16.525934 SMBIOS tables: 939 bytes.
1815 12:28:16.529142 Writing table forward entry at 0x00000500
1816 12:28:16.536066 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1817 12:28:16.539420 Writing coreboot table at 0x99b62000
1818 12:28:16.546098 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1819 12:28:16.549276 1. 0000000000001000-000000000009ffff: RAM
1820 12:28:16.552526 2. 00000000000a0000-00000000000fffff: RESERVED
1821 12:28:16.559055 3. 0000000000100000-0000000099a2bfff: RAM
1822 12:28:16.565781 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1823 12:28:16.568674 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1824 12:28:16.575637 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1825 12:28:16.578779 7. 000000009a000000-000000009f7fffff: RESERVED
1826 12:28:16.585480 8. 00000000e0000000-00000000efffffff: RESERVED
1827 12:28:16.588597 9. 00000000fc000000-00000000fc000fff: RESERVED
1828 12:28:16.595016 10. 00000000fe000000-00000000fe00ffff: RESERVED
1829 12:28:16.598906 11. 00000000fed10000-00000000fed17fff: RESERVED
1830 12:28:16.601724 12. 00000000fed80000-00000000fed83fff: RESERVED
1831 12:28:16.608437 13. 00000000fed90000-00000000fed91fff: RESERVED
1832 12:28:16.611572 14. 00000000feda0000-00000000feda1fff: RESERVED
1833 12:28:16.618408 15. 0000000100000000-000000045e7fffff: RAM
1834 12:28:16.621874 Graphics framebuffer located at 0xc0000000
1835 12:28:16.624994 Passing 5 GPIOs to payload:
1836 12:28:16.628493 NAME | PORT | POLARITY | VALUE
1837 12:28:16.634854 write protect | undefined | high | low
1838 12:28:16.641525 lid | undefined | high | high
1839 12:28:16.644813 power | undefined | high | low
1840 12:28:16.651867 oprom | undefined | high | low
1841 12:28:16.654802 EC in RW | 0x000000cb | high | low
1842 12:28:16.658010 Board ID: 4
1843 12:28:16.661362 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1844 12:28:16.664981 CBFS @ c08000 size 3f8000
1845 12:28:16.671056 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1846 12:28:16.677989 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1847 12:28:16.678088 coreboot table: 1492 bytes.
1848 12:28:16.681138 IMD ROOT 0. 99fff000 00001000
1849 12:28:16.685032 IMD SMALL 1. 99ffe000 00001000
1850 12:28:16.691088 FSP MEMORY 2. 99c4e000 003b0000
1851 12:28:16.694734 CONSOLE 3. 99c2e000 00020000
1852 12:28:16.697756 FMAP 4. 99c2d000 0000054e
1853 12:28:16.701122 TIME STAMP 5. 99c2c000 00000910
1854 12:28:16.704196 VBOOT WORK 6. 99c18000 00014000
1855 12:28:16.707616 MRC DATA 7. 99c16000 00001958
1856 12:28:16.710918 ROMSTG STCK 8. 99c15000 00001000
1857 12:28:16.714265 AFTER CAR 9. 99c0b000 0000a000
1858 12:28:16.717696 RAMSTAGE 10. 99baf000 0005c000
1859 12:28:16.721001 REFCODE 11. 99b7a000 00035000
1860 12:28:16.724263 SMM BACKUP 12. 99b6a000 00010000
1861 12:28:16.727447 COREBOOT 13. 99b62000 00008000
1862 12:28:16.730961 ACPI 14. 99b3e000 00024000
1863 12:28:16.734271 ACPI GNVS 15. 99b3d000 00001000
1864 12:28:16.737568 RAMOOPS 16. 99a3d000 00100000
1865 12:28:16.741102 TPM2 TCGLOG17. 99a2d000 00010000
1866 12:28:16.744366 SMBIOS 18. 99a2c000 00000800
1867 12:28:16.744466 IMD small region:
1868 12:28:16.747689 IMD ROOT 0. 99ffec00 00000400
1869 12:28:16.751059 FSP RUNTIME 1. 99ffebe0 00000004
1870 12:28:16.753860 EC HOSTEVENT 2. 99ffebc0 00000008
1871 12:28:16.757170 POWER STATE 3. 99ffeb80 00000040
1872 12:28:16.763864 ROMSTAGE 4. 99ffeb60 00000004
1873 12:28:16.767094 MEM INFO 5. 99ffe9a0 000001b9
1874 12:28:16.770884 VPD 6. 99ffe920 0000006c
1875 12:28:16.774153 MTRR: Physical address space:
1876 12:28:16.777104 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1877 12:28:16.783498 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1878 12:28:16.790247 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1879 12:28:16.796740 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1880 12:28:16.803514 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1881 12:28:16.810338 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1882 12:28:16.816957 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1883 12:28:16.820265 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 12:28:16.823264 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 12:28:16.826562 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 12:28:16.833458 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 12:28:16.836804 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 12:28:16.840145 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 12:28:16.843386 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 12:28:16.850099 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 12:28:16.852926 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 12:28:16.856454 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 12:28:16.859762 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 12:28:16.863558 call enable_fixed_mtrr()
1895 12:28:16.866960 CPU physical address size: 39 bits
1896 12:28:16.873664 MTRR: default type WB/UC MTRR counts: 6/8.
1897 12:28:16.876872 MTRR: WB selected as default type.
1898 12:28:16.883605 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1899 12:28:16.886926 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1900 12:28:16.893610 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1901 12:28:16.900032 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1902 12:28:16.906466 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1903 12:28:16.913209 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1904 12:28:16.916465 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 12:28:16.923069 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 12:28:16.926589 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 12:28:16.929625 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 12:28:16.933185 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 12:28:16.939322 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 12:28:16.942746 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 12:28:16.945943 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 12:28:16.949410 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 12:28:16.955879 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 12:28:16.959108 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 12:28:16.959205
1916 12:28:16.959281 MTRR check
1917 12:28:16.962624 Fixed MTRRs : Enabled
1918 12:28:16.966201 Variable MTRRs: Enabled
1919 12:28:16.966297
1920 12:28:16.969502 call enable_fixed_mtrr()
1921 12:28:16.972794 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1922 12:28:16.975650 CPU physical address size: 39 bits
1923 12:28:16.982698 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1924 12:28:16.985756 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 12:28:16.989242 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 12:28:16.995402 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 12:28:16.998782 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 12:28:17.002228 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 12:28:17.005594 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 12:28:17.012166 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 12:28:17.015191 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 12:28:17.018394 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 12:28:17.022051 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 12:28:17.028416 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 12:28:17.031664 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 12:28:17.035148 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 12:28:17.038511 call enable_fixed_mtrr()
1938 12:28:17.041763 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 12:28:17.045297 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 12:28:17.051978 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 12:28:17.055179 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 12:28:17.058413 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 12:28:17.061392 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 12:28:17.068631 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 12:28:17.071767 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 12:28:17.075032 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 12:28:17.078377 CPU physical address size: 39 bits
1948 12:28:17.081976 call enable_fixed_mtrr()
1949 12:28:17.085235 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 12:28:17.091570 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 12:28:17.095103 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 12:28:17.098168 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 12:28:17.102023 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 12:28:17.105084 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 12:28:17.111971 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 12:28:17.115100 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 12:28:17.118327 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 12:28:17.121515 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 12:28:17.128466 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 12:28:17.131488 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 12:28:17.134631 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 12:28:17.137980 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 12:28:17.144436 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 12:28:17.147950 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 12:28:17.151196 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 12:28:17.154596 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 12:28:17.161270 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 12:28:17.164841 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 12:28:17.167993 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 12:28:17.171188 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 12:28:17.174049 call enable_fixed_mtrr()
1972 12:28:17.177487 call enable_fixed_mtrr()
1973 12:28:17.180854 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 12:28:17.184289 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 12:28:17.190719 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 12:28:17.194574 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 12:28:17.197783 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 12:28:17.200547 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 12:28:17.207952 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 12:28:17.210529 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 12:28:17.214509 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 12:28:17.217313 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 12:28:17.224046 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 12:28:17.227015 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 12:28:17.230307 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 12:28:17.233517 call enable_fixed_mtrr()
1987 12:28:17.237008 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 12:28:17.240242 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 12:28:17.247099 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 12:28:17.250595 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 12:28:17.253487 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 12:28:17.256777 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 12:28:17.263376 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 12:28:17.266680 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 12:28:17.269834 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 12:28:17.273409 CPU physical address size: 39 bits
1997 12:28:17.276718 call enable_fixed_mtrr()
1998 12:28:17.280003 CBFS @ c08000 size 3f8000
1999 12:28:17.286936 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2000 12:28:17.290200 CPU physical address size: 39 bits
2001 12:28:17.293573 CPU physical address size: 39 bits
2002 12:28:17.297004 CBFS: Locating 'fallback/payload'
2003 12:28:17.300195 CPU physical address size: 39 bits
2004 12:28:17.303623 CPU physical address size: 39 bits
2005 12:28:17.306812 CBFS: Found @ offset 1c96c0 size 3f798
2006 12:28:17.313407 Checking segment from ROM address 0xffdd16f8
2007 12:28:17.316775 Checking segment from ROM address 0xffdd1714
2008 12:28:17.320342 Loading segment from ROM address 0xffdd16f8
2009 12:28:17.323095 code (compression=0)
2010 12:28:17.329979 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2011 12:28:17.339957 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2012 12:28:17.343370 it's not compressed!
2013 12:28:17.434402 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2014 12:28:17.441331 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2015 12:28:17.444468 Loading segment from ROM address 0xffdd1714
2016 12:28:17.447807 Entry Point 0x30000000
2017 12:28:17.450921 Loaded segments
2018 12:28:17.456911 Finalizing chipset.
2019 12:28:17.459694 Finalizing SMM.
2020 12:28:17.463064 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2021 12:28:17.466515 mp_park_aps done after 0 msecs.
2022 12:28:17.473338 Jumping to boot code at 30000000(99b62000)
2023 12:28:17.479364 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2024 12:28:17.479513
2025 12:28:17.479643
2026 12:28:17.479763
2027 12:28:17.482693 Starting depthcharge on Helios...
2028 12:28:17.482834
2029 12:28:17.483276 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2030 12:28:17.483450 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2031 12:28:17.483599 Setting prompt string to ['hatch:']
2032 12:28:17.483747 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2033 12:28:17.492523 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2034 12:28:17.492680
2035 12:28:17.499495 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2036 12:28:17.499649
2037 12:28:17.505917 board_setup: Info: eMMC controller not present; skipping
2038 12:28:17.506071
2039 12:28:17.509348 New NVMe Controller 0x30053ac0 @ 00:1d:00
2040 12:28:17.509487
2041 12:28:17.516032 board_setup: Info: SDHCI controller not present; skipping
2042 12:28:17.516198
2043 12:28:17.522733 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2044 12:28:17.522895
2045 12:28:17.523020 Wipe memory regions:
2046 12:28:17.523153
2047 12:28:17.525732 [0x00000000001000, 0x000000000a0000)
2048 12:28:17.525875
2049 12:28:17.529054 [0x00000000100000, 0x00000030000000)
2050 12:28:17.595815
2051 12:28:17.598890 [0x00000030657430, 0x00000099a2c000)
2052 12:28:17.745480
2053 12:28:17.748971 [0x00000100000000, 0x0000045e800000)
2054 12:28:19.205133
2055 12:28:19.205296 R8152: Initializing
2056 12:28:19.205377
2057 12:28:19.208503 Version 9 (ocp_data = 6010)
2058 12:28:19.212522
2059 12:28:19.212620 R8152: Done initializing
2060 12:28:19.212697
2061 12:28:19.215822 Adding net device
2062 12:28:19.698813
2063 12:28:19.698980 R8152: Initializing
2064 12:28:19.699060
2065 12:28:19.701703 Version 6 (ocp_data = 5c30)
2066 12:28:19.701800
2067 12:28:19.705013 R8152: Done initializing
2068 12:28:19.705109
2069 12:28:19.711671 net_add_device: Attemp to include the same device
2070 12:28:19.711769
2071 12:28:19.718690 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2072 12:28:19.718788
2073 12:28:19.718862
2074 12:28:19.718935
2075 12:28:19.719223 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2077 12:28:19.820025 hatch: tftpboot 192.168.201.1 9584211/tftp-deploy-e30yq23z/kernel/bzImage 9584211/tftp-deploy-e30yq23z/kernel/cmdline 9584211/tftp-deploy-e30yq23z/ramdisk/ramdisk.cpio.gz
2078 12:28:19.820217 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2079 12:28:19.820314 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2080 12:28:19.824561 tftpboot 192.168.201.1 9584211/tftp-deploy-e30yq23z/kernel/bzImoy-e30yq23z/kernel/cmdline 9584211/tftp-deploy-e30yq23z/ramdisk/ramdisk.cpio.gz
2081 12:28:19.824661
2082 12:28:19.824739 Waiting for link
2083 12:28:20.025328
2084 12:28:20.025493 done.
2085 12:28:20.025570
2086 12:28:20.025642 MAC: 00:24:32:50:1a:59
2087 12:28:20.025712
2088 12:28:20.028463 Sending DHCP discover... done.
2089 12:28:20.028561
2090 12:28:20.031817 Waiting for reply... done.
2091 12:28:20.031916
2092 12:28:20.034935 Sending DHCP request... done.
2093 12:28:20.035033
2094 12:28:20.038109 Waiting for reply... done.
2095 12:28:20.038214
2096 12:28:20.041740 My ip is 192.168.201.14
2097 12:28:20.041838
2098 12:28:20.044829 The DHCP server ip is 192.168.201.1
2099 12:28:20.044927
2100 12:28:20.048424 TFTP server IP predefined by user: 192.168.201.1
2101 12:28:20.048522
2102 12:28:20.054722 Bootfile predefined by user: 9584211/tftp-deploy-e30yq23z/kernel/bzImage
2103 12:28:20.054820
2104 12:28:20.058082 Sending tftp read request... done.
2105 12:28:20.061716
2106 12:28:20.064423 Waiting for the transfer...
2107 12:28:20.064522
2108 12:28:20.595678 00000000 ################################################################
2109 12:28:20.595846
2110 12:28:21.128395 00080000 ################################################################
2111 12:28:21.128562
2112 12:28:21.655234 00100000 ################################################################
2113 12:28:21.655384
2114 12:28:22.214098 00180000 ################################################################
2115 12:28:22.214248
2116 12:28:22.772693 00200000 ################################################################
2117 12:28:22.772846
2118 12:28:23.318877 00280000 ################################################################
2119 12:28:23.319064
2120 12:28:23.870352 00300000 ################################################################
2121 12:28:23.870497
2122 12:28:24.409634 00380000 ################################################################
2123 12:28:24.409866
2124 12:28:24.941918 00400000 ################################################################
2125 12:28:24.942084
2126 12:28:25.485359 00480000 ################################################################
2127 12:28:25.485541
2128 12:28:26.021658 00500000 ################################################################
2129 12:28:26.021811
2130 12:28:26.547925 00580000 ################################################################
2131 12:28:26.548131
2132 12:28:27.087984 00600000 ################################################################
2133 12:28:27.088134
2134 12:28:27.626844 00680000 ################################################################
2135 12:28:27.626999
2136 12:28:28.177431 00700000 ################################################################
2137 12:28:28.177634
2138 12:28:28.709681 00780000 ################################################################
2139 12:28:28.709839
2140 12:28:29.260242 00800000 ################################################################
2141 12:28:29.260390
2142 12:28:29.811333 00880000 ################################################################
2143 12:28:29.811484
2144 12:28:30.211959 00900000 ################################################ done.
2145 12:28:30.212155
2146 12:28:30.214945 The bootfile was 9826304 bytes long.
2147 12:28:30.215043
2148 12:28:30.218326 Sending tftp read request... done.
2149 12:28:30.218414
2150 12:28:30.221089 Waiting for the transfer...
2151 12:28:30.221191
2152 12:28:30.763716 00000000 ################################################################
2153 12:28:30.763874
2154 12:28:31.294878 00080000 ################################################################
2155 12:28:31.295034
2156 12:28:31.825428 00100000 ################################################################
2157 12:28:31.825594
2158 12:28:32.358351 00180000 ################################################################
2159 12:28:32.358517
2160 12:28:32.895433 00200000 ################################################################
2161 12:28:32.895589
2162 12:28:33.437144 00280000 ################################################################
2163 12:28:33.437298
2164 12:28:33.991834 00300000 ################################################################
2165 12:28:33.992038
2166 12:28:34.552403 00380000 ################################################################
2167 12:28:34.552556
2168 12:28:35.112270 00400000 ################################################################
2169 12:28:35.112426
2170 12:28:35.654097 00480000 ################################################################
2171 12:28:35.654250
2172 12:28:36.189320 00500000 ################################################################
2173 12:28:36.189489
2174 12:28:36.546560 00580000 ########################################### done.
2175 12:28:36.546755
2176 12:28:36.549539 Sending tftp read request... done.
2177 12:28:36.549689
2178 12:28:36.552959 Waiting for the transfer...
2179 12:28:36.553110
2180 12:28:36.553224 00000000 # done.
2181 12:28:36.553337
2182 12:28:36.562962 Command line loaded dynamically from TFTP file: 9584211/tftp-deploy-e30yq23z/kernel/cmdline
2183 12:28:36.563137
2184 12:28:36.586592 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9584211/extract-nfsrootfs-sr94qhwg,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2185 12:28:36.586834
2186 12:28:36.592946 ec_init(0): CrosEC protocol v3 supported (256, 256)
2187 12:28:36.596458
2188 12:28:36.599522 Shutting down all USB controllers.
2189 12:28:36.599657
2190 12:28:36.599742 Removing current net device
2191 12:28:36.603831
2192 12:28:36.604002 Finalizing coreboot
2193 12:28:36.604121
2194 12:28:36.610544 Exiting depthcharge with code 4 at timestamp: 26458308
2195 12:28:36.610727
2196 12:28:36.610817
2197 12:28:36.610892 Starting kernel ...
2198 12:28:36.610963
2199 12:28:36.611033
2200 12:28:36.611457 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2201 12:28:36.611577 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2202 12:28:36.611664 Setting prompt string to ['Linux version [0-9]']
2203 12:28:36.611745 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2204 12:28:36.611825 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2206 12:32:59.611824 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2208 12:32:59.612068 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2210 12:32:59.612253 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2213 12:32:59.612589 end: 2 depthcharge-action (duration 00:05:00) [common]
2215 12:32:59.612848 Cleaning after the job
2216 12:32:59.612954 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/ramdisk
2217 12:32:59.613496 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/kernel
2218 12:32:59.614249 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/nfsrootfs
2219 12:32:59.653999 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584211/tftp-deploy-e30yq23z/modules
2220 12:32:59.654475 start: 4.1 power-off (timeout 00:00:30) [common]
2221 12:32:59.654655 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2222 12:32:59.730795 >> Command sent successfully.
2223 12:32:59.733167 Returned 0 in 0 seconds
2224 12:32:59.833986 end: 4.1 power-off (duration 00:00:00) [common]
2226 12:32:59.834356 start: 4.2 read-feedback (timeout 00:10:00) [common]
2227 12:32:59.834625 Listened to connection for namespace 'common' for up to 1s
2229 12:32:59.835027 Listened to connection for namespace 'common' for up to 1s
2230 12:33:00.839190 Finalising connection for namespace 'common'
2231 12:33:00.839379 Disconnecting from shell: Finalise
2232 12:33:00.839468
2233 12:33:00.940191 end: 4.2 read-feedback (duration 00:00:01) [common]
2234 12:33:00.940343 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584211
2235 12:33:01.121714 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584211
2236 12:33:01.121922 JobError: Your job cannot terminate cleanly.