Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:21:31.099386 lava-dispatcher, installed at version: 2023.01
2 12:21:31.099615 start: 0 validate
3 12:21:31.099762 Start time: 2023-03-13 12:21:31.099754+00:00 (UTC)
4 12:21:31.099906 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:21:31.100047 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230303.0%2Fx86%2Frootfs.cpio.gz exists
6 12:21:31.395892 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:21:31.396084 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:21:31.684001 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:21:31.684183 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:21:35.290277 validate duration: 4.19
12 12:21:35.290612 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:21:35.290816 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:21:35.290939 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:21:35.291074 Not decompressing ramdisk as can be used compressed.
16 12:21:35.291196 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230303.0/x86/rootfs.cpio.gz
17 12:21:35.291281 saving as /var/lib/lava/dispatcher/tmp/9584147/tftp-deploy-g56ghfbv/ramdisk/rootfs.cpio.gz
18 12:21:35.291358 total size: 8423697 (8MB)
19 12:21:36.005572 progress 0% (0MB)
20 12:21:36.008245 progress 5% (0MB)
21 12:21:36.010720 progress 10% (0MB)
22 12:21:36.013361 progress 15% (1MB)
23 12:21:36.015856 progress 20% (1MB)
24 12:21:36.018635 progress 25% (2MB)
25 12:21:36.021153 progress 30% (2MB)
26 12:21:36.023563 progress 35% (2MB)
27 12:21:36.026125 progress 40% (3MB)
28 12:21:36.028607 progress 45% (3MB)
29 12:21:36.031145 progress 50% (4MB)
30 12:21:36.033840 progress 55% (4MB)
31 12:21:36.037358 progress 60% (4MB)
32 12:21:36.040726 progress 65% (5MB)
33 12:21:36.043811 progress 70% (5MB)
34 12:21:36.047109 progress 75% (6MB)
35 12:21:36.050633 progress 80% (6MB)
36 12:21:36.054111 progress 85% (6MB)
37 12:21:36.057577 progress 90% (7MB)
38 12:21:36.060711 progress 95% (7MB)
39 12:21:36.063104 progress 100% (8MB)
40 12:21:36.063278 8MB downloaded in 0.77s (10.41MB/s)
41 12:21:36.063454 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:21:36.063738 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:21:36.063841 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:21:36.063940 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:21:36.064060 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:21:36.064138 saving as /var/lib/lava/dispatcher/tmp/9584147/tftp-deploy-g56ghfbv/kernel/bzImage
48 12:21:36.064210 total size: 9826304 (9MB)
49 12:21:36.064281 No compression specified
50 12:21:36.065356 progress 0% (0MB)
51 12:21:36.068084 progress 5% (0MB)
52 12:21:36.070793 progress 10% (0MB)
53 12:21:36.073611 progress 15% (1MB)
54 12:21:36.076420 progress 20% (1MB)
55 12:21:36.079156 progress 25% (2MB)
56 12:21:36.081906 progress 30% (2MB)
57 12:21:36.084637 progress 35% (3MB)
58 12:21:36.087416 progress 40% (3MB)
59 12:21:36.090155 progress 45% (4MB)
60 12:21:36.092921 progress 50% (4MB)
61 12:21:36.095729 progress 55% (5MB)
62 12:21:36.098670 progress 60% (5MB)
63 12:21:36.101422 progress 65% (6MB)
64 12:21:36.104107 progress 70% (6MB)
65 12:21:36.106743 progress 75% (7MB)
66 12:21:36.109369 progress 80% (7MB)
67 12:21:36.112110 progress 85% (7MB)
68 12:21:36.114772 progress 90% (8MB)
69 12:21:36.117440 progress 95% (8MB)
70 12:21:36.120129 progress 100% (9MB)
71 12:21:36.120392 9MB downloaded in 0.06s (166.81MB/s)
72 12:21:36.120557 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:21:36.120826 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:21:36.120925 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:21:36.121022 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:21:36.121144 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:21:36.121223 saving as /var/lib/lava/dispatcher/tmp/9584147/tftp-deploy-g56ghfbv/modules/modules.tar
79 12:21:36.121291 total size: 460276 (0MB)
80 12:21:36.121360 Using unxz to decompress xz
81 12:21:36.124651 progress 7% (0MB)
82 12:21:36.125081 progress 14% (0MB)
83 12:21:36.125350 progress 21% (0MB)
84 12:21:36.126896 progress 28% (0MB)
85 12:21:36.129342 progress 35% (0MB)
86 12:21:36.131802 progress 42% (0MB)
87 12:21:36.134462 progress 49% (0MB)
88 12:21:36.136653 progress 56% (0MB)
89 12:21:36.138834 progress 64% (0MB)
90 12:21:36.141244 progress 71% (0MB)
91 12:21:36.143652 progress 78% (0MB)
92 12:21:36.145918 progress 85% (0MB)
93 12:21:36.147923 progress 92% (0MB)
94 12:21:36.150379 progress 99% (0MB)
95 12:21:36.157727 0MB downloaded in 0.04s (12.05MB/s)
96 12:21:36.158098 end: 1.3.1 http-download (duration 00:00:00) [common]
98 12:21:36.158404 end: 1.3 download-retry (duration 00:00:00) [common]
99 12:21:36.158511 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
100 12:21:36.158615 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
101 12:21:36.158711 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 12:21:36.158805 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
103 12:21:36.159000 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv
104 12:21:36.159149 makedir: /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin
105 12:21:36.159251 makedir: /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/tests
106 12:21:36.159343 makedir: /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/results
107 12:21:36.159466 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-add-keys
108 12:21:36.159616 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-add-sources
109 12:21:36.159755 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-background-process-start
110 12:21:36.159884 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-background-process-stop
111 12:21:36.160015 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-common-functions
112 12:21:36.160142 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-echo-ipv4
113 12:21:36.160273 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-install-packages
114 12:21:36.160400 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-installed-packages
115 12:21:36.160524 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-os-build
116 12:21:36.160647 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-probe-channel
117 12:21:36.160772 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-probe-ip
118 12:21:36.160897 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-target-ip
119 12:21:36.161019 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-target-mac
120 12:21:36.161141 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-target-storage
121 12:21:36.161268 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-test-case
122 12:21:36.161391 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-test-event
123 12:21:36.161515 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-test-feedback
124 12:21:36.161643 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-test-raise
125 12:21:36.161772 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-test-reference
126 12:21:36.161897 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-test-runner
127 12:21:36.162037 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-test-set
128 12:21:36.162162 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-test-shell
129 12:21:36.162293 Updating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-install-packages (oe)
130 12:21:36.162422 Updating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/bin/lava-installed-packages (oe)
131 12:21:36.162538 Creating /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/environment
132 12:21:36.162637 LAVA metadata
133 12:21:36.162721 - LAVA_JOB_ID=9584147
134 12:21:36.162795 - LAVA_DISPATCHER_IP=192.168.201.1
135 12:21:36.162918 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
136 12:21:36.162997 skipped lava-vland-overlay
137 12:21:36.163093 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 12:21:36.163194 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
139 12:21:36.163270 skipped lava-multinode-overlay
140 12:21:36.163357 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 12:21:36.163453 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
142 12:21:36.163540 Loading test definitions
143 12:21:36.163652 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
144 12:21:36.163739 Using /lava-9584147 at stage 0
145 12:21:36.164077 uuid=9584147_1.4.2.3.1 testdef=None
146 12:21:36.164211 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 12:21:36.164315 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
148 12:21:36.164939 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 12:21:36.165353 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
151 12:21:36.166063 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 12:21:36.166344 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
154 12:21:36.166961 runner path: /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/0/tests/0_dmesg test_uuid 9584147_1.4.2.3.1
155 12:21:36.167145 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 12:21:36.167417 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
158 12:21:36.167501 Using /lava-9584147 at stage 1
159 12:21:36.167788 uuid=9584147_1.4.2.3.5 testdef=None
160 12:21:36.167892 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 12:21:36.167990 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
162 12:21:36.168584 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 12:21:36.168843 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
165 12:21:36.169521 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 12:21:36.169794 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
168 12:21:36.170414 runner path: /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/1/tests/1_bootrr test_uuid 9584147_1.4.2.3.5
169 12:21:36.170579 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 12:21:36.170822 Creating lava-test-runner.conf files
172 12:21:36.170895 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/0 for stage 0
173 12:21:36.170990 - 0_dmesg
174 12:21:36.171100 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584147/lava-overlay-e42yl6hv/lava-9584147/1 for stage 1
175 12:21:36.171203 - 1_bootrr
176 12:21:36.171310 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 12:21:36.171412 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
178 12:21:36.178719 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 12:21:36.178912 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
180 12:21:36.179025 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 12:21:36.179167 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 12:21:36.179305 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
183 12:21:36.393152 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 12:21:36.393532 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
185 12:21:36.393660 extracting modules file /var/lib/lava/dispatcher/tmp/9584147/tftp-deploy-g56ghfbv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584147/extract-overlay-ramdisk-xl98racd/ramdisk
186 12:21:36.406019 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 12:21:36.406208 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
188 12:21:36.406323 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584147/compress-overlay-ou7yo5ol/overlay-1.4.2.4.tar.gz to ramdisk
189 12:21:36.406409 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584147/compress-overlay-ou7yo5ol/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584147/extract-overlay-ramdisk-xl98racd/ramdisk
190 12:21:36.411162 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 12:21:36.411326 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
192 12:21:36.411436 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 12:21:36.411544 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
194 12:21:36.411639 Building ramdisk /var/lib/lava/dispatcher/tmp/9584147/extract-overlay-ramdisk-xl98racd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584147/extract-overlay-ramdisk-xl98racd/ramdisk
195 12:21:36.491771 >> 53575 blocks
196 12:21:37.507416 rename /var/lib/lava/dispatcher/tmp/9584147/extract-overlay-ramdisk-xl98racd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584147/tftp-deploy-g56ghfbv/ramdisk/ramdisk.cpio.gz
197 12:21:37.507971 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 12:21:37.508167 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
199 12:21:37.508570 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
200 12:21:37.508728 No mkimage arch provided, not using FIT.
201 12:21:37.508880 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 12:21:37.509024 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 12:21:37.509184 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 12:21:37.509347 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
205 12:21:37.509484 No LXC device requested
206 12:21:37.509628 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 12:21:37.509782 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
208 12:21:37.509930 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 12:21:37.510052 Checking files for TFTP limit of 4294967296 bytes.
210 12:21:37.510639 end: 1 tftp-deploy (duration 00:00:02) [common]
211 12:21:37.510805 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 12:21:37.510960 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 12:21:37.511169 substitutions:
214 12:21:37.511288 - {DTB}: None
215 12:21:37.511404 - {INITRD}: 9584147/tftp-deploy-g56ghfbv/ramdisk/ramdisk.cpio.gz
216 12:21:37.511516 - {KERNEL}: 9584147/tftp-deploy-g56ghfbv/kernel/bzImage
217 12:21:37.511628 - {LAVA_MAC}: None
218 12:21:37.511741 - {PRESEED_CONFIG}: None
219 12:21:37.511851 - {PRESEED_LOCAL}: None
220 12:21:37.511961 - {RAMDISK}: 9584147/tftp-deploy-g56ghfbv/ramdisk/ramdisk.cpio.gz
221 12:21:37.512072 - {ROOT_PART}: None
222 12:21:37.512182 - {ROOT}: None
223 12:21:37.512292 - {SERVER_IP}: 192.168.201.1
224 12:21:37.512403 - {TEE}: None
225 12:21:37.512513 Parsed boot commands:
226 12:21:37.512621 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 12:21:37.512880 Parsed boot commands: tftpboot 192.168.201.1 9584147/tftp-deploy-g56ghfbv/kernel/bzImage 9584147/tftp-deploy-g56ghfbv/kernel/cmdline 9584147/tftp-deploy-g56ghfbv/ramdisk/ramdisk.cpio.gz
228 12:21:37.513044 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 12:21:37.513198 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 12:21:37.513358 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 12:21:37.513508 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 12:21:37.513629 Not connected, no need to disconnect.
233 12:21:37.513762 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 12:21:37.513913 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 12:21:37.514043 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
236 12:21:37.517783 Setting prompt string to ['lava-test: # ']
237 12:21:37.518236 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 12:21:37.518422 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 12:21:37.518588 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 12:21:37.518755 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 12:21:37.519072 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
242 12:21:42.651387 >> Command sent successfully.
243 12:21:42.653743 Returned 0 in 5 seconds
244 12:21:42.754612 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 12:21:42.754982 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 12:21:42.755119 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 12:21:42.755266 Setting prompt string to 'Starting depthcharge on Helios...'
249 12:21:42.755374 Changing prompt to 'Starting depthcharge on Helios...'
250 12:21:42.755467 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
251 12:21:42.755770 [Enter `^Ec?' for help]
252 12:21:43.376078
253 12:21:43.376245
254 12:21:43.386324 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
255 12:21:43.389609 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
256 12:21:43.396453 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
257 12:21:43.399924 CPU: AES supported, TXT NOT supported, VT supported
258 12:21:43.406765 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
259 12:21:43.410091 PCH: device id 0284 (rev 00) is Cometlake-U Premium
260 12:21:43.416450 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
261 12:21:43.419926 VBOOT: Loading verstage.
262 12:21:43.422997 FMAP: Found "FLASH" version 1.1 at 0xc04000.
263 12:21:43.429928 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
264 12:21:43.433609 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
265 12:21:43.436643 CBFS @ c08000 size 3f8000
266 12:21:43.443280 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
267 12:21:43.446673 CBFS: Locating 'fallback/verstage'
268 12:21:43.449784 CBFS: Found @ offset 10fb80 size 1072c
269 12:21:43.453463
270 12:21:43.453562
271 12:21:43.462827 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
272 12:21:43.477288 Probing TPM: . done!
273 12:21:43.480978 TPM ready after 0 ms
274 12:21:43.484184 Connected to device vid:did:rid of 1ae0:0028:00
275 12:21:43.494607 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
276 12:21:43.497843 Initialized TPM device CR50 revision 0
277 12:21:43.540857 tlcl_send_startup: Startup return code is 0
278 12:21:43.541020 TPM: setup succeeded
279 12:21:43.552889 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
280 12:21:43.557220 Chrome EC: UHEPI supported
281 12:21:43.560067 Phase 1
282 12:21:43.563424 FMAP: area GBB found @ c05000 (12288 bytes)
283 12:21:43.570121 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
284 12:21:43.570241 Phase 2
285 12:21:43.573404 Phase 3
286 12:21:43.577191 FMAP: area GBB found @ c05000 (12288 bytes)
287 12:21:43.583888 VB2:vb2_report_dev_firmware() This is developer signed firmware
288 12:21:43.590113 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
289 12:21:43.593334 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 12:21:43.599862 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 12:21:43.615903 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
292 12:21:43.619092 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 12:21:43.625859 VB2:vb2_verify_fw_preamble() Verifying preamble.
294 12:21:43.630227 Phase 4
295 12:21:43.633357 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
296 12:21:43.639993 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
297 12:21:43.819269 VB2:vb2_rsa_verify_digest() Digest check failed!
298 12:21:43.825967 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
299 12:21:43.826137 Saving nvdata
300 12:21:43.829051 Reboot requested (10020007)
301 12:21:43.832385 board_reset() called!
302 12:21:43.832486 full_reset() called!
303 12:21:48.343140
304 12:21:48.343363
305 12:21:48.353441 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
306 12:21:48.357358 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
307 12:21:48.363141 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
308 12:21:48.366663 CPU: AES supported, TXT NOT supported, VT supported
309 12:21:48.373430 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
310 12:21:48.377027 PCH: device id 0284 (rev 00) is Cometlake-U Premium
311 12:21:48.383632 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
312 12:21:48.386524 VBOOT: Loading verstage.
313 12:21:48.390052 FMAP: Found "FLASH" version 1.1 at 0xc04000.
314 12:21:48.396387 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
315 12:21:48.399881 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
316 12:21:48.403433 CBFS @ c08000 size 3f8000
317 12:21:48.409824 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
318 12:21:48.413302 CBFS: Locating 'fallback/verstage'
319 12:21:48.416751 CBFS: Found @ offset 10fb80 size 1072c
320 12:21:48.420129
321 12:21:48.420228
322 12:21:48.430135 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
323 12:21:48.444277 Probing TPM: . done!
324 12:21:48.448042 TPM ready after 0 ms
325 12:21:48.451226 Connected to device vid:did:rid of 1ae0:0028:00
326 12:21:48.461372 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
327 12:21:48.464887 Initialized TPM device CR50 revision 0
328 12:21:48.506980 tlcl_send_startup: Startup return code is 0
329 12:21:48.507154 TPM: setup succeeded
330 12:21:48.519833 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
331 12:21:48.523646 Chrome EC: UHEPI supported
332 12:21:48.527210 Phase 1
333 12:21:48.530076 FMAP: area GBB found @ c05000 (12288 bytes)
334 12:21:48.536941 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
335 12:21:48.543345 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
336 12:21:48.546654 Recovery requested (1009000e)
337 12:21:48.552519 Saving nvdata
338 12:21:48.558514 tlcl_extend: response is 0
339 12:21:48.567140 tlcl_extend: response is 0
340 12:21:48.574623 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 12:21:48.577940 CBFS @ c08000 size 3f8000
342 12:21:48.584401 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 12:21:48.587538 CBFS: Locating 'fallback/romstage'
344 12:21:48.590993 CBFS: Found @ offset 80 size 145fc
345 12:21:48.594323 Accumulated console time in verstage 98 ms
346 12:21:48.594463
347 12:21:48.594583
348 12:21:48.607694 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
349 12:21:48.614021 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
350 12:21:48.617549 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
351 12:21:48.620490 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
352 12:21:48.627344 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
353 12:21:48.630912 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
354 12:21:48.633724 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
355 12:21:48.637244 TCO_STS: 0000 0000
356 12:21:48.640285 GEN_PMCON: e0015238 00000200
357 12:21:48.643779 GBLRST_CAUSE: 00000000 00000000
358 12:21:48.643924 prev_sleep_state 5
359 12:21:48.647256 Boot Count incremented to 47812
360 12:21:48.654212 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 12:21:48.657748 CBFS @ c08000 size 3f8000
362 12:21:48.663943 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 12:21:48.664078 CBFS: Locating 'fspm.bin'
364 12:21:48.670711 CBFS: Found @ offset 5ffc0 size 71000
365 12:21:48.673999 Chrome EC: UHEPI supported
366 12:21:48.680489 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
367 12:21:48.683831 Probing TPM: done!
368 12:21:48.690673 Connected to device vid:did:rid of 1ae0:0028:00
369 12:21:48.700696 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
370 12:21:48.706669 Initialized TPM device CR50 revision 0
371 12:21:48.715797 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
372 12:21:48.722300 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
373 12:21:48.725744 MRC cache found, size 1948
374 12:21:48.728607 bootmode is set to: 2
375 12:21:48.731924 PRMRR disabled by config.
376 12:21:48.735349 SPD INDEX = 1
377 12:21:48.738802 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 12:21:48.741761 CBFS @ c08000 size 3f8000
379 12:21:48.748399 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 12:21:48.748524 CBFS: Locating 'spd.bin'
381 12:21:48.751986 CBFS: Found @ offset 5fb80 size 400
382 12:21:48.755414 SPD: module type is LPDDR3
383 12:21:48.758426 SPD: module part is
384 12:21:48.764900 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
385 12:21:48.768186 SPD: device width 4 bits, bus width 8 bits
386 12:21:48.771548 SPD: module size is 4096 MB (per channel)
387 12:21:48.775063 memory slot: 0 configuration done.
388 12:21:48.778335 memory slot: 2 configuration done.
389 12:21:48.829627 CBMEM:
390 12:21:48.833013 IMD: root @ 99fff000 254 entries.
391 12:21:48.836360 IMD: root @ 99ffec00 62 entries.
392 12:21:48.839719 External stage cache:
393 12:21:48.842672 IMD: root @ 9abff000 254 entries.
394 12:21:48.846204 IMD: root @ 9abfec00 62 entries.
395 12:21:48.853156 Chrome EC: clear events_b mask to 0x0000000020004000
396 12:21:48.866151 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 12:21:48.879150 tlcl_write: response is 0
398 12:21:48.888085 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
399 12:21:48.894829 MRC: TPM MRC hash updated successfully.
400 12:21:48.894934 2 DIMMs found
401 12:21:48.897983 SMM Memory Map
402 12:21:48.901492 SMRAM : 0x9a000000 0x1000000
403 12:21:48.904855 Subregion 0: 0x9a000000 0xa00000
404 12:21:48.908046 Subregion 1: 0x9aa00000 0x200000
405 12:21:48.911661 Subregion 2: 0x9ac00000 0x400000
406 12:21:48.914814 top_of_ram = 0x9a000000
407 12:21:48.918261 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
408 12:21:48.924803 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
409 12:21:48.928178 MTRR Range: Start=ff000000 End=0 (Size 1000000)
410 12:21:48.934533 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 12:21:48.937955 CBFS @ c08000 size 3f8000
412 12:21:48.941326 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 12:21:48.944311 CBFS: Locating 'fallback/postcar'
414 12:21:48.951207 CBFS: Found @ offset 107000 size 4b44
415 12:21:48.954303 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
416 12:21:48.967016 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
417 12:21:48.970559 Processing 180 relocs. Offset value of 0x97c0c000
418 12:21:48.978556 Accumulated console time in romstage 286 ms
419 12:21:48.978752
420 12:21:48.978876
421 12:21:48.988317 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
422 12:21:48.994866 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 12:21:48.998358 CBFS @ c08000 size 3f8000
424 12:21:49.001831 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 12:21:49.008412 CBFS: Locating 'fallback/ramstage'
426 12:21:49.011754 CBFS: Found @ offset 43380 size 1b9e8
427 12:21:49.018219 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
428 12:21:49.050537 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
429 12:21:49.053977 Processing 3976 relocs. Offset value of 0x98db0000
430 12:21:49.060448 Accumulated console time in postcar 52 ms
431 12:21:49.060587
432 12:21:49.060709
433 12:21:49.070374 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
434 12:21:49.077438 FMAP: area RO_VPD found @ c00000 (16384 bytes)
435 12:21:49.080350 WARNING: RO_VPD is uninitialized or empty.
436 12:21:49.083935 FMAP: area RW_VPD found @ af8000 (8192 bytes)
437 12:21:49.090847 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 12:21:49.090983 Normal boot.
439 12:21:49.096922 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
440 12:21:49.100914 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 12:21:49.103675 CBFS @ c08000 size 3f8000
442 12:21:49.110233 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 12:21:49.113559 CBFS: Locating 'cpu_microcode_blob.bin'
444 12:21:49.117018 CBFS: Found @ offset 14700 size 2ec00
445 12:21:49.120621 microcode: sig=0x806ec pf=0x4 revision=0xc9
446 12:21:49.123951 Skip microcode update
447 12:21:49.130272 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 12:21:49.130420 CBFS @ c08000 size 3f8000
449 12:21:49.136549 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 12:21:49.139968 CBFS: Locating 'fsps.bin'
451 12:21:49.143514 CBFS: Found @ offset d1fc0 size 35000
452 12:21:49.168622 Detected 4 core, 8 thread CPU.
453 12:21:49.172068 Setting up SMI for CPU
454 12:21:49.175605 IED base = 0x9ac00000
455 12:21:49.175739 IED size = 0x00400000
456 12:21:49.178509 Will perform SMM setup.
457 12:21:49.185376 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
458 12:21:49.192281 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
459 12:21:49.195168 Processing 16 relocs. Offset value of 0x00030000
460 12:21:49.199227 Attempting to start 7 APs
461 12:21:49.201966 Waiting for 10ms after sending INIT.
462 12:21:49.218587 Waiting for 1st SIPI to complete...done.
463 12:21:49.218725 AP: slot 2 apic_id 5.
464 12:21:49.221913 AP: slot 5 apic_id 4.
465 12:21:49.225096 AP: slot 1 apic_id 3.
466 12:21:49.225227 AP: slot 4 apic_id 2.
467 12:21:49.228189 AP: slot 3 apic_id 1.
468 12:21:49.232107 Waiting for 2nd SIPI to complete...done.
469 12:21:49.235320 AP: slot 6 apic_id 6.
470 12:21:49.238567 AP: slot 7 apic_id 7.
471 12:21:49.244985 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
472 12:21:49.251897 Processing 13 relocs. Offset value of 0x00038000
473 12:21:49.254614 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
474 12:21:49.261781 Installing SMM handler to 0x9a000000
475 12:21:49.268202 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
476 12:21:49.274559 Processing 658 relocs. Offset value of 0x9a010000
477 12:21:49.281595 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
478 12:21:49.284459 Processing 13 relocs. Offset value of 0x9a008000
479 12:21:49.291352 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
480 12:21:49.297855 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
481 12:21:49.304280 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
482 12:21:49.307698 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
483 12:21:49.314825 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
484 12:21:49.321153 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
485 12:21:49.324458 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
486 12:21:49.330658 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
487 12:21:49.334578 Clearing SMI status registers
488 12:21:49.337962 SMI_STS: PM1
489 12:21:49.338103 PM1_STS: PWRBTN
490 12:21:49.341336 TCO_STS: SECOND_TO
491 12:21:49.344678 New SMBASE 0x9a000000
492 12:21:49.348156 In relocation handler: CPU 0
493 12:21:49.351578 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
494 12:21:49.354483 Writing SMRR. base = 0x9a000006, mask=0xff000800
495 12:21:49.357991 Relocation complete.
496 12:21:49.361311 New SMBASE 0x99fff400
497 12:21:49.361411 In relocation handler: CPU 3
498 12:21:49.367694 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
499 12:21:49.371277 Writing SMRR. base = 0x9a000006, mask=0xff000800
500 12:21:49.374344 Relocation complete.
501 12:21:49.377820 New SMBASE 0x99fff800
502 12:21:49.377919 In relocation handler: CPU 2
503 12:21:49.384710 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
504 12:21:49.387796 Writing SMRR. base = 0x9a000006, mask=0xff000800
505 12:21:49.391366 Relocation complete.
506 12:21:49.391464 New SMBASE 0x99ffec00
507 12:21:49.394595 In relocation handler: CPU 5
508 12:21:49.400930 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
509 12:21:49.404660 Writing SMRR. base = 0x9a000006, mask=0xff000800
510 12:21:49.407458 Relocation complete.
511 12:21:49.407555 New SMBASE 0x99ffe800
512 12:21:49.410831 In relocation handler: CPU 6
513 12:21:49.414347 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
514 12:21:49.421178 Writing SMRR. base = 0x9a000006, mask=0xff000800
515 12:21:49.424545 Relocation complete.
516 12:21:49.424670 New SMBASE 0x99ffe400
517 12:21:49.427907 In relocation handler: CPU 7
518 12:21:49.431091 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
519 12:21:49.437348 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 12:21:49.440684 Relocation complete.
521 12:21:49.440783 New SMBASE 0x99fffc00
522 12:21:49.444055 In relocation handler: CPU 1
523 12:21:49.447564 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
524 12:21:49.454202 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 12:21:49.454301 Relocation complete.
526 12:21:49.457555 New SMBASE 0x99fff000
527 12:21:49.460971 In relocation handler: CPU 4
528 12:21:49.464230 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
529 12:21:49.470541 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 12:21:49.470640 Relocation complete.
531 12:21:49.474093 Initializing CPU #0
532 12:21:49.477076 CPU: vendor Intel device 806ec
533 12:21:49.480582 CPU: family 06, model 8e, stepping 0c
534 12:21:49.484108 Clearing out pending MCEs
535 12:21:49.487589 Setting up local APIC...
536 12:21:49.487721 apic_id: 0x00 done.
537 12:21:49.490476 Turbo is available but hidden
538 12:21:49.493929 Turbo is available and visible
539 12:21:49.496954 VMX status: enabled
540 12:21:49.500444 IA32_FEATURE_CONTROL status: locked
541 12:21:49.504027 Skip microcode update
542 12:21:49.504161 CPU #0 initialized
543 12:21:49.506878 Initializing CPU #3
544 12:21:49.510430 Initializing CPU #4
545 12:21:49.510528 Initializing CPU #1
546 12:21:49.513464 CPU: vendor Intel device 806ec
547 12:21:49.517127 CPU: family 06, model 8e, stepping 0c
548 12:21:49.520531 CPU: vendor Intel device 806ec
549 12:21:49.523530 CPU: family 06, model 8e, stepping 0c
550 12:21:49.527051 Clearing out pending MCEs
551 12:21:49.530261 Clearing out pending MCEs
552 12:21:49.533483 Setting up local APIC...
553 12:21:49.533617 Initializing CPU #2
554 12:21:49.536705 Initializing CPU #5
555 12:21:49.540111 CPU: vendor Intel device 806ec
556 12:21:49.543501 CPU: family 06, model 8e, stepping 0c
557 12:21:49.546708 CPU: vendor Intel device 806ec
558 12:21:49.550327 CPU: family 06, model 8e, stepping 0c
559 12:21:49.553271 Setting up local APIC...
560 12:21:49.556927 Clearing out pending MCEs
561 12:21:49.557026 Clearing out pending MCEs
562 12:21:49.559993 Initializing CPU #6
563 12:21:49.563191 Initializing CPU #7
564 12:21:49.566728 CPU: vendor Intel device 806ec
565 12:21:49.569845 CPU: family 06, model 8e, stepping 0c
566 12:21:49.573195 CPU: vendor Intel device 806ec
567 12:21:49.576296 CPU: family 06, model 8e, stepping 0c
568 12:21:49.579852 Clearing out pending MCEs
569 12:21:49.579984 apic_id: 0x02 done.
570 12:21:49.583159 apic_id: 0x03 done.
571 12:21:49.586614 VMX status: enabled
572 12:21:49.586746 VMX status: enabled
573 12:21:49.589623 IA32_FEATURE_CONTROL status: locked
574 12:21:49.593146 IA32_FEATURE_CONTROL status: locked
575 12:21:49.596489 Skip microcode update
576 12:21:49.599546 Skip microcode update
577 12:21:49.599677 CPU #4 initialized
578 12:21:49.602934 CPU #1 initialized
579 12:21:49.606429 CPU: vendor Intel device 806ec
580 12:21:49.609726 CPU: family 06, model 8e, stepping 0c
581 12:21:49.613340 Clearing out pending MCEs
582 12:21:49.616242 Clearing out pending MCEs
583 12:21:49.616342 Setting up local APIC...
584 12:21:49.619830 Setting up local APIC...
585 12:21:49.622876 Setting up local APIC...
586 12:21:49.626240 Setting up local APIC...
587 12:21:49.626400 apic_id: 0x01 done.
588 12:21:49.629206 apic_id: 0x05 done.
589 12:21:49.632675 Setting up local APIC...
590 12:21:49.632834 VMX status: enabled
591 12:21:49.636160 apic_id: 0x06 done.
592 12:21:49.639605 VMX status: enabled
593 12:21:49.639763 apic_id: 0x04 done.
594 12:21:49.643023 IA32_FEATURE_CONTROL status: locked
595 12:21:49.645840 VMX status: enabled
596 12:21:49.649454 Skip microcode update
597 12:21:49.652810 IA32_FEATURE_CONTROL status: locked
598 12:21:49.652950 CPU #2 initialized
599 12:21:49.656117 Skip microcode update
600 12:21:49.659203 VMX status: enabled
601 12:21:49.659306 apic_id: 0x07 done.
602 12:21:49.662508 IA32_FEATURE_CONTROL status: locked
603 12:21:49.666112 VMX status: enabled
604 12:21:49.669339 Skip microcode update
605 12:21:49.672563 IA32_FEATURE_CONTROL status: locked
606 12:21:49.672667 CPU #6 initialized
607 12:21:49.675842 Skip microcode update
608 12:21:49.679587 IA32_FEATURE_CONTROL status: locked
609 12:21:49.682352 CPU #5 initialized
610 12:21:49.682445 Skip microcode update
611 12:21:49.685739 CPU #7 initialized
612 12:21:49.685838 CPU #3 initialized
613 12:21:49.692456 bsp_do_flight_plan done after 456 msecs.
614 12:21:49.696108 CPU: frequency set to 4200 MHz
615 12:21:49.696257 Enabling SMIs.
616 12:21:49.696381 Locking SMM.
617 12:21:49.712402 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
618 12:21:49.715691 CBFS @ c08000 size 3f8000
619 12:21:49.722226 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
620 12:21:49.722325 CBFS: Locating 'vbt.bin'
621 12:21:49.725606 CBFS: Found @ offset 5f5c0 size 499
622 12:21:49.731999 Found a VBT of 4608 bytes after decompression
623 12:21:49.913376 Display FSP Version Info HOB
624 12:21:49.916298 Reference Code - CPU = 9.0.1e.30
625 12:21:49.919634 uCode Version = 0.0.0.ca
626 12:21:49.923016 TXT ACM version = ff.ff.ff.ffff
627 12:21:49.926485 Display FSP Version Info HOB
628 12:21:49.929936 Reference Code - ME = 9.0.1e.30
629 12:21:49.932788 MEBx version = 0.0.0.0
630 12:21:49.936520 ME Firmware Version = Consumer SKU
631 12:21:49.939895 Display FSP Version Info HOB
632 12:21:49.942791 Reference Code - CML PCH = 9.0.1e.30
633 12:21:49.946329 PCH-CRID Status = Disabled
634 12:21:49.949809 PCH-CRID Original Value = ff.ff.ff.ffff
635 12:21:49.953393 PCH-CRID New Value = ff.ff.ff.ffff
636 12:21:49.956257 OPROM - RST - RAID = ff.ff.ff.ffff
637 12:21:49.959734 ChipsetInit Base Version = ff.ff.ff.ffff
638 12:21:49.963350 ChipsetInit Oem Version = ff.ff.ff.ffff
639 12:21:49.966643 Display FSP Version Info HOB
640 12:21:49.973337 Reference Code - SA - System Agent = 9.0.1e.30
641 12:21:49.976539 Reference Code - MRC = 0.7.1.6c
642 12:21:49.976682 SA - PCIe Version = 9.0.1e.30
643 12:21:49.979874 SA-CRID Status = Disabled
644 12:21:49.983165 SA-CRID Original Value = 0.0.0.c
645 12:21:49.986530 SA-CRID New Value = 0.0.0.c
646 12:21:49.989659 OPROM - VBIOS = ff.ff.ff.ffff
647 12:21:49.992770 RTC Init
648 12:21:49.996238 Set power on after power failure.
649 12:21:49.996478 Disabling Deep S3
650 12:21:49.999582 Disabling Deep S3
651 12:21:49.999818 Disabling Deep S4
652 12:21:50.002832 Disabling Deep S4
653 12:21:50.003064 Disabling Deep S5
654 12:21:50.006198 Disabling Deep S5
655 12:21:50.012514 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
656 12:21:50.012754 Enumerating buses...
657 12:21:50.019380 Show all devs... Before device enumeration.
658 12:21:50.019636 Root Device: enabled 1
659 12:21:50.022300 CPU_CLUSTER: 0: enabled 1
660 12:21:50.025669 DOMAIN: 0000: enabled 1
661 12:21:50.029090 APIC: 00: enabled 1
662 12:21:50.029327 PCI: 00:00.0: enabled 1
663 12:21:50.032780 PCI: 00:02.0: enabled 1
664 12:21:50.036272 PCI: 00:04.0: enabled 0
665 12:21:50.038933 PCI: 00:05.0: enabled 0
666 12:21:50.039169 PCI: 00:12.0: enabled 1
667 12:21:50.042422 PCI: 00:12.5: enabled 0
668 12:21:50.045808 PCI: 00:12.6: enabled 0
669 12:21:50.046015 PCI: 00:14.0: enabled 1
670 12:21:50.048841 PCI: 00:14.1: enabled 0
671 12:21:50.052191 PCI: 00:14.3: enabled 1
672 12:21:50.055874 PCI: 00:14.5: enabled 0
673 12:21:50.056108 PCI: 00:15.0: enabled 1
674 12:21:50.059381 PCI: 00:15.1: enabled 1
675 12:21:50.062261 PCI: 00:15.2: enabled 0
676 12:21:50.065850 PCI: 00:15.3: enabled 0
677 12:21:50.066083 PCI: 00:16.0: enabled 1
678 12:21:50.068904 PCI: 00:16.1: enabled 0
679 12:21:50.072310 PCI: 00:16.2: enabled 0
680 12:21:50.075750 PCI: 00:16.3: enabled 0
681 12:21:50.075994 PCI: 00:16.4: enabled 0
682 12:21:50.079069 PCI: 00:16.5: enabled 0
683 12:21:50.082410 PCI: 00:17.0: enabled 1
684 12:21:50.085872 PCI: 00:19.0: enabled 1
685 12:21:50.086116 PCI: 00:19.1: enabled 0
686 12:21:50.088976 PCI: 00:19.2: enabled 0
687 12:21:50.091943 PCI: 00:1a.0: enabled 0
688 12:21:50.092184 PCI: 00:1c.0: enabled 0
689 12:21:50.095371 PCI: 00:1c.1: enabled 0
690 12:21:50.098740 PCI: 00:1c.2: enabled 0
691 12:21:50.102004 PCI: 00:1c.3: enabled 0
692 12:21:50.102250 PCI: 00:1c.4: enabled 0
693 12:21:50.105606 PCI: 00:1c.5: enabled 0
694 12:21:50.108844 PCI: 00:1c.6: enabled 0
695 12:21:50.112215 PCI: 00:1c.7: enabled 0
696 12:21:50.112457 PCI: 00:1d.0: enabled 1
697 12:21:50.115498 PCI: 00:1d.1: enabled 0
698 12:21:50.118638 PCI: 00:1d.2: enabled 0
699 12:21:50.122310 PCI: 00:1d.3: enabled 0
700 12:21:50.122504 PCI: 00:1d.4: enabled 0
701 12:21:50.125049 PCI: 00:1d.5: enabled 1
702 12:21:50.128566 PCI: 00:1e.0: enabled 1
703 12:21:50.128815 PCI: 00:1e.1: enabled 0
704 12:21:50.132032 PCI: 00:1e.2: enabled 1
705 12:21:50.135371 PCI: 00:1e.3: enabled 1
706 12:21:50.138398 PCI: 00:1f.0: enabled 1
707 12:21:50.138601 PCI: 00:1f.1: enabled 1
708 12:21:50.141708 PCI: 00:1f.2: enabled 1
709 12:21:50.145246 PCI: 00:1f.3: enabled 1
710 12:21:50.148314 PCI: 00:1f.4: enabled 1
711 12:21:50.148517 PCI: 00:1f.5: enabled 1
712 12:21:50.151707 PCI: 00:1f.6: enabled 0
713 12:21:50.155220 USB0 port 0: enabled 1
714 12:21:50.155381 I2C: 00:15: enabled 1
715 12:21:50.158285 I2C: 00:5d: enabled 1
716 12:21:50.161863 GENERIC: 0.0: enabled 1
717 12:21:50.164768 I2C: 00:1a: enabled 1
718 12:21:50.164919 I2C: 00:38: enabled 1
719 12:21:50.168098 I2C: 00:39: enabled 1
720 12:21:50.171574 I2C: 00:3a: enabled 1
721 12:21:50.171729 I2C: 00:3b: enabled 1
722 12:21:50.174497 PCI: 00:00.0: enabled 1
723 12:21:50.178162 SPI: 00: enabled 1
724 12:21:50.178283 SPI: 01: enabled 1
725 12:21:50.181456 PNP: 0c09.0: enabled 1
726 12:21:50.184647 USB2 port 0: enabled 1
727 12:21:50.184779 USB2 port 1: enabled 1
728 12:21:50.187926 USB2 port 2: enabled 0
729 12:21:50.191245 USB2 port 3: enabled 0
730 12:21:50.191388 USB2 port 5: enabled 0
731 12:21:50.194909 USB2 port 6: enabled 1
732 12:21:50.197836 USB2 port 9: enabled 1
733 12:21:50.201114 USB3 port 0: enabled 1
734 12:21:50.201238 USB3 port 1: enabled 1
735 12:21:50.204391 USB3 port 2: enabled 1
736 12:21:50.207968 USB3 port 3: enabled 1
737 12:21:50.208102 USB3 port 4: enabled 0
738 12:21:50.211386 APIC: 03: enabled 1
739 12:21:50.214634 APIC: 05: enabled 1
740 12:21:50.214765 APIC: 01: enabled 1
741 12:21:50.218048 APIC: 02: enabled 1
742 12:21:50.218180 APIC: 04: enabled 1
743 12:21:50.221025 APIC: 06: enabled 1
744 12:21:50.224593 APIC: 07: enabled 1
745 12:21:50.224743 Compare with tree...
746 12:21:50.227534 Root Device: enabled 1
747 12:21:50.230898 CPU_CLUSTER: 0: enabled 1
748 12:21:50.234310 APIC: 00: enabled 1
749 12:21:50.234457 APIC: 03: enabled 1
750 12:21:50.237725 APIC: 05: enabled 1
751 12:21:50.241280 APIC: 01: enabled 1
752 12:21:50.241453 APIC: 02: enabled 1
753 12:21:50.244169 APIC: 04: enabled 1
754 12:21:50.247574 APIC: 06: enabled 1
755 12:21:50.247752 APIC: 07: enabled 1
756 12:21:50.251060 DOMAIN: 0000: enabled 1
757 12:21:50.254521 PCI: 00:00.0: enabled 1
758 12:21:50.257375 PCI: 00:02.0: enabled 1
759 12:21:50.257528 PCI: 00:04.0: enabled 0
760 12:21:50.260879 PCI: 00:05.0: enabled 0
761 12:21:50.264464 PCI: 00:12.0: enabled 1
762 12:21:50.267503 PCI: 00:12.5: enabled 0
763 12:21:50.270846 PCI: 00:12.6: enabled 0
764 12:21:50.271001 PCI: 00:14.0: enabled 1
765 12:21:50.274332 USB0 port 0: enabled 1
766 12:21:50.277192 USB2 port 0: enabled 1
767 12:21:50.280867 USB2 port 1: enabled 1
768 12:21:50.284317 USB2 port 2: enabled 0
769 12:21:50.284457 USB2 port 3: enabled 0
770 12:21:50.287617 USB2 port 5: enabled 0
771 12:21:50.290451 USB2 port 6: enabled 1
772 12:21:50.293934 USB2 port 9: enabled 1
773 12:21:50.297687 USB3 port 0: enabled 1
774 12:21:50.301004 USB3 port 1: enabled 1
775 12:21:50.301131 USB3 port 2: enabled 1
776 12:21:50.304196 USB3 port 3: enabled 1
777 12:21:50.307265 USB3 port 4: enabled 0
778 12:21:50.310757 PCI: 00:14.1: enabled 0
779 12:21:50.313891 PCI: 00:14.3: enabled 1
780 12:21:50.314102 PCI: 00:14.5: enabled 0
781 12:21:50.317429 PCI: 00:15.0: enabled 1
782 12:21:50.320687 I2C: 00:15: enabled 1
783 12:21:50.323850 PCI: 00:15.1: enabled 1
784 12:21:50.327342 I2C: 00:5d: enabled 1
785 12:21:50.327519 GENERIC: 0.0: enabled 1
786 12:21:50.330625 PCI: 00:15.2: enabled 0
787 12:21:50.333659 PCI: 00:15.3: enabled 0
788 12:21:50.337047 PCI: 00:16.0: enabled 1
789 12:21:50.340548 PCI: 00:16.1: enabled 0
790 12:21:50.340752 PCI: 00:16.2: enabled 0
791 12:21:50.343835 PCI: 00:16.3: enabled 0
792 12:21:50.346849 PCI: 00:16.4: enabled 0
793 12:21:50.350262 PCI: 00:16.5: enabled 0
794 12:21:50.350483 PCI: 00:17.0: enabled 1
795 12:21:50.353757 PCI: 00:19.0: enabled 1
796 12:21:50.357120 I2C: 00:1a: enabled 1
797 12:21:50.360171 I2C: 00:38: enabled 1
798 12:21:50.363705 I2C: 00:39: enabled 1
799 12:21:50.363937 I2C: 00:3a: enabled 1
800 12:21:50.367181 I2C: 00:3b: enabled 1
801 12:21:50.370221 PCI: 00:19.1: enabled 0
802 12:21:50.373713 PCI: 00:19.2: enabled 0
803 12:21:50.373939 PCI: 00:1a.0: enabled 0
804 12:21:50.376670 PCI: 00:1c.0: enabled 0
805 12:21:50.380075 PCI: 00:1c.1: enabled 0
806 12:21:50.383649 PCI: 00:1c.2: enabled 0
807 12:21:50.386614 PCI: 00:1c.3: enabled 0
808 12:21:50.386854 PCI: 00:1c.4: enabled 0
809 12:21:50.390235 PCI: 00:1c.5: enabled 0
810 12:21:50.393704 PCI: 00:1c.6: enabled 0
811 12:21:50.396745 PCI: 00:1c.7: enabled 0
812 12:21:50.400321 PCI: 00:1d.0: enabled 1
813 12:21:50.400475 PCI: 00:1d.1: enabled 0
814 12:21:50.403482 PCI: 00:1d.2: enabled 0
815 12:21:50.406776 PCI: 00:1d.3: enabled 0
816 12:21:50.409860 PCI: 00:1d.4: enabled 0
817 12:21:50.413201 PCI: 00:1d.5: enabled 1
818 12:21:50.413316 PCI: 00:00.0: enabled 1
819 12:21:50.416355 PCI: 00:1e.0: enabled 1
820 12:21:50.419875 PCI: 00:1e.1: enabled 0
821 12:21:50.423187 PCI: 00:1e.2: enabled 1
822 12:21:50.423330 SPI: 00: enabled 1
823 12:21:50.426299 PCI: 00:1e.3: enabled 1
824 12:21:50.429679 SPI: 01: enabled 1
825 12:21:50.432813 PCI: 00:1f.0: enabled 1
826 12:21:50.436111 PNP: 0c09.0: enabled 1
827 12:21:50.436245 PCI: 00:1f.1: enabled 1
828 12:21:50.439759 PCI: 00:1f.2: enabled 1
829 12:21:50.442707 PCI: 00:1f.3: enabled 1
830 12:21:50.446652 PCI: 00:1f.4: enabled 1
831 12:21:50.449527 PCI: 00:1f.5: enabled 1
832 12:21:50.449631 PCI: 00:1f.6: enabled 0
833 12:21:50.453109 Root Device scanning...
834 12:21:50.455996 scan_static_bus for Root Device
835 12:21:50.459400 CPU_CLUSTER: 0 enabled
836 12:21:50.459499 DOMAIN: 0000 enabled
837 12:21:50.462952 DOMAIN: 0000 scanning...
838 12:21:50.465872 PCI: pci_scan_bus for bus 00
839 12:21:50.469322 PCI: 00:00.0 [8086/0000] ops
840 12:21:50.472748 PCI: 00:00.0 [8086/9b61] enabled
841 12:21:50.476539 PCI: 00:02.0 [8086/0000] bus ops
842 12:21:50.479427 PCI: 00:02.0 [8086/9b41] enabled
843 12:21:50.482840 PCI: 00:04.0 [8086/1903] disabled
844 12:21:50.486433 PCI: 00:08.0 [8086/1911] enabled
845 12:21:50.489425 PCI: 00:12.0 [8086/02f9] enabled
846 12:21:50.492944 PCI: 00:14.0 [8086/0000] bus ops
847 12:21:50.496280 PCI: 00:14.0 [8086/02ed] enabled
848 12:21:50.499851 PCI: 00:14.2 [8086/02ef] enabled
849 12:21:50.502628 PCI: 00:14.3 [8086/02f0] enabled
850 12:21:50.506255 PCI: 00:15.0 [8086/0000] bus ops
851 12:21:50.509658 PCI: 00:15.0 [8086/02e8] enabled
852 12:21:50.512793 PCI: 00:15.1 [8086/0000] bus ops
853 12:21:50.516100 PCI: 00:15.1 [8086/02e9] enabled
854 12:21:50.519463 PCI: 00:16.0 [8086/0000] ops
855 12:21:50.522833 PCI: 00:16.0 [8086/02e0] enabled
856 12:21:50.526029 PCI: 00:17.0 [8086/0000] ops
857 12:21:50.529422 PCI: 00:17.0 [8086/02d3] enabled
858 12:21:50.532885 PCI: 00:19.0 [8086/0000] bus ops
859 12:21:50.535691 PCI: 00:19.0 [8086/02c5] enabled
860 12:21:50.538967 PCI: 00:1d.0 [8086/0000] bus ops
861 12:21:50.542792 PCI: 00:1d.0 [8086/02b0] enabled
862 12:21:50.548990 PCI: Static device PCI: 00:1d.5 not found, disabling it.
863 12:21:50.552824 PCI: 00:1e.0 [8086/0000] ops
864 12:21:50.555611 PCI: 00:1e.0 [8086/02a8] enabled
865 12:21:50.559186 PCI: 00:1e.2 [8086/0000] bus ops
866 12:21:50.562235 PCI: 00:1e.2 [8086/02aa] enabled
867 12:21:50.565898 PCI: 00:1e.3 [8086/0000] bus ops
868 12:21:50.569325 PCI: 00:1e.3 [8086/02ab] enabled
869 12:21:50.572656 PCI: 00:1f.0 [8086/0000] bus ops
870 12:21:50.575582 PCI: 00:1f.0 [8086/0284] enabled
871 12:21:50.579054 PCI: Static device PCI: 00:1f.1 not found, disabling it.
872 12:21:50.585597 PCI: Static device PCI: 00:1f.2 not found, disabling it.
873 12:21:50.589162 PCI: 00:1f.3 [8086/0000] bus ops
874 12:21:50.592636 PCI: 00:1f.3 [8086/02c8] enabled
875 12:21:50.595552 PCI: 00:1f.4 [8086/0000] bus ops
876 12:21:50.599025 PCI: 00:1f.4 [8086/02a3] enabled
877 12:21:50.602002 PCI: 00:1f.5 [8086/0000] bus ops
878 12:21:50.605257 PCI: 00:1f.5 [8086/02a4] enabled
879 12:21:50.608785 PCI: Leftover static devices:
880 12:21:50.608884 PCI: 00:05.0
881 12:21:50.612380 PCI: 00:12.5
882 12:21:50.612478 PCI: 00:12.6
883 12:21:50.615289 PCI: 00:14.1
884 12:21:50.615392 PCI: 00:14.5
885 12:21:50.615491 PCI: 00:15.2
886 12:21:50.619090 PCI: 00:15.3
887 12:21:50.619177 PCI: 00:16.1
888 12:21:50.622139 PCI: 00:16.2
889 12:21:50.622225 PCI: 00:16.3
890 12:21:50.622318 PCI: 00:16.4
891 12:21:50.625374 PCI: 00:16.5
892 12:21:50.625475 PCI: 00:19.1
893 12:21:50.628872 PCI: 00:19.2
894 12:21:50.628973 PCI: 00:1a.0
895 12:21:50.632116 PCI: 00:1c.0
896 12:21:50.632217 PCI: 00:1c.1
897 12:21:50.632321 PCI: 00:1c.2
898 12:21:50.635170 PCI: 00:1c.3
899 12:21:50.635271 PCI: 00:1c.4
900 12:21:50.638486 PCI: 00:1c.5
901 12:21:50.638576 PCI: 00:1c.6
902 12:21:50.638668 PCI: 00:1c.7
903 12:21:50.641626 PCI: 00:1d.1
904 12:21:50.641718 PCI: 00:1d.2
905 12:21:50.645034 PCI: 00:1d.3
906 12:21:50.645135 PCI: 00:1d.4
907 12:21:50.645232 PCI: 00:1d.5
908 12:21:50.648373 PCI: 00:1e.1
909 12:21:50.648474 PCI: 00:1f.1
910 12:21:50.652141 PCI: 00:1f.2
911 12:21:50.652311 PCI: 00:1f.6
912 12:21:50.655286 PCI: Check your devicetree.cb.
913 12:21:50.658406 PCI: 00:02.0 scanning...
914 12:21:50.661644 scan_generic_bus for PCI: 00:02.0
915 12:21:50.665541 scan_generic_bus for PCI: 00:02.0 done
916 12:21:50.671925 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
917 12:21:50.674847 PCI: 00:14.0 scanning...
918 12:21:50.678300 scan_static_bus for PCI: 00:14.0
919 12:21:50.678429 USB0 port 0 enabled
920 12:21:50.681775 USB0 port 0 scanning...
921 12:21:50.685249 scan_static_bus for USB0 port 0
922 12:21:50.688359 USB2 port 0 enabled
923 12:21:50.688490 USB2 port 1 enabled
924 12:21:50.691807 USB2 port 2 disabled
925 12:21:50.694775 USB2 port 3 disabled
926 12:21:50.694872 USB2 port 5 disabled
927 12:21:50.698226 USB2 port 6 enabled
928 12:21:50.698328 USB2 port 9 enabled
929 12:21:50.701650 USB3 port 0 enabled
930 12:21:50.705193 USB3 port 1 enabled
931 12:21:50.705295 USB3 port 2 enabled
932 12:21:50.708465 USB3 port 3 enabled
933 12:21:50.711252 USB3 port 4 disabled
934 12:21:50.711388 USB2 port 0 scanning...
935 12:21:50.714796 scan_static_bus for USB2 port 0
936 12:21:50.718361 scan_static_bus for USB2 port 0 done
937 12:21:50.724883 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
938 12:21:50.728199 USB2 port 1 scanning...
939 12:21:50.731382 scan_static_bus for USB2 port 1
940 12:21:50.734987 scan_static_bus for USB2 port 1 done
941 12:21:50.741267 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
942 12:21:50.741463 USB2 port 6 scanning...
943 12:21:50.744936 scan_static_bus for USB2 port 6
944 12:21:50.751165 scan_static_bus for USB2 port 6 done
945 12:21:50.754467 scan_bus: scanning of bus USB2 port 6 took 9695 usecs
946 12:21:50.758238 USB2 port 9 scanning...
947 12:21:50.761402 scan_static_bus for USB2 port 9
948 12:21:50.764590 scan_static_bus for USB2 port 9 done
949 12:21:50.771385 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
950 12:21:50.771561 USB3 port 0 scanning...
951 12:21:50.774529 scan_static_bus for USB3 port 0
952 12:21:50.781421 scan_static_bus for USB3 port 0 done
953 12:21:50.784417 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
954 12:21:50.787905 USB3 port 1 scanning...
955 12:21:50.791378 scan_static_bus for USB3 port 1
956 12:21:50.794185 scan_static_bus for USB3 port 1 done
957 12:21:50.801280 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
958 12:21:50.801426 USB3 port 2 scanning...
959 12:21:50.804294 scan_static_bus for USB3 port 2
960 12:21:50.811198 scan_static_bus for USB3 port 2 done
961 12:21:50.814629 scan_bus: scanning of bus USB3 port 2 took 9711 usecs
962 12:21:50.817545 USB3 port 3 scanning...
963 12:21:50.821136 scan_static_bus for USB3 port 3
964 12:21:50.824634 scan_static_bus for USB3 port 3 done
965 12:21:50.831043 scan_bus: scanning of bus USB3 port 3 took 9712 usecs
966 12:21:50.834585 scan_static_bus for USB0 port 0 done
967 12:21:50.840786 scan_bus: scanning of bus USB0 port 0 took 155434 usecs
968 12:21:50.843905 scan_static_bus for PCI: 00:14.0 done
969 12:21:50.847414 scan_bus: scanning of bus PCI: 00:14.0 took 173043 usecs
970 12:21:50.851184 PCI: 00:15.0 scanning...
971 12:21:50.853926 scan_generic_bus for PCI: 00:15.0
972 12:21:50.861086 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
973 12:21:50.864292 scan_generic_bus for PCI: 00:15.0 done
974 12:21:50.867468 scan_bus: scanning of bus PCI: 00:15.0 took 14332 usecs
975 12:21:50.870743 PCI: 00:15.1 scanning...
976 12:21:50.874062 scan_generic_bus for PCI: 00:15.1
977 12:21:50.877362 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
978 12:21:50.883983 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
979 12:21:50.887043 scan_generic_bus for PCI: 00:15.1 done
980 12:21:50.894058 scan_bus: scanning of bus PCI: 00:15.1 took 18604 usecs
981 12:21:50.894162 PCI: 00:19.0 scanning...
982 12:21:50.897020 scan_generic_bus for PCI: 00:19.0
983 12:21:50.903928 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
984 12:21:50.906956 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
985 12:21:50.910493 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
986 12:21:50.913985 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
987 12:21:50.920238 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
988 12:21:50.923775 scan_generic_bus for PCI: 00:19.0 done
989 12:21:50.930169 scan_bus: scanning of bus PCI: 00:19.0 took 30747 usecs
990 12:21:50.930265 PCI: 00:1d.0 scanning...
991 12:21:50.933711 do_pci_scan_bridge for PCI: 00:1d.0
992 12:21:50.937191 PCI: pci_scan_bus for bus 01
993 12:21:50.940674 PCI: 01:00.0 [1c5c/1327] enabled
994 12:21:50.943519 Enabling Common Clock Configuration
995 12:21:50.950635 L1 Sub-State supported from root port 29
996 12:21:50.953941 L1 Sub-State Support = 0xf
997 12:21:50.954047 CommonModeRestoreTime = 0x28
998 12:21:50.960410 Power On Value = 0x16, Power On Scale = 0x0
999 12:21:50.960507 ASPM: Enabled L1
1000 12:21:50.966842 scan_bus: scanning of bus PCI: 00:1d.0 took 32794 usecs
1001 12:21:50.970286 PCI: 00:1e.2 scanning...
1002 12:21:50.973444 scan_generic_bus for PCI: 00:1e.2
1003 12:21:50.976943 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1004 12:21:50.980495 scan_generic_bus for PCI: 00:1e.2 done
1005 12:21:50.987114 scan_bus: scanning of bus PCI: 00:1e.2 took 14017 usecs
1006 12:21:50.990539 PCI: 00:1e.3 scanning...
1007 12:21:50.993379 scan_generic_bus for PCI: 00:1e.3
1008 12:21:50.996846 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1009 12:21:51.000286 scan_generic_bus for PCI: 00:1e.3 done
1010 12:21:51.006859 scan_bus: scanning of bus PCI: 00:1e.3 took 14004 usecs
1011 12:21:51.010372 PCI: 00:1f.0 scanning...
1012 12:21:51.013307 scan_static_bus for PCI: 00:1f.0
1013 12:21:51.013484 PNP: 0c09.0 enabled
1014 12:21:51.016859 scan_static_bus for PCI: 00:1f.0 done
1015 12:21:51.023093 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
1016 12:21:51.026580 PCI: 00:1f.3 scanning...
1017 12:21:51.033663 scan_bus: scanning of bus PCI: 00:1f.3 took 2853 usecs
1018 12:21:51.033776 PCI: 00:1f.4 scanning...
1019 12:21:51.036689 scan_generic_bus for PCI: 00:1f.4
1020 12:21:51.042917 scan_generic_bus for PCI: 00:1f.4 done
1021 12:21:51.046373 scan_bus: scanning of bus PCI: 00:1f.4 took 10200 usecs
1022 12:21:51.049652 PCI: 00:1f.5 scanning...
1023 12:21:51.052954 scan_generic_bus for PCI: 00:1f.5
1024 12:21:51.056405 scan_generic_bus for PCI: 00:1f.5 done
1025 12:21:51.063152 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1026 12:21:51.069576 scan_bus: scanning of bus DOMAIN: 0000 took 605274 usecs
1027 12:21:51.072986 scan_static_bus for Root Device done
1028 12:21:51.079551 scan_bus: scanning of bus Root Device took 625151 usecs
1029 12:21:51.079692 done
1030 12:21:51.082980 Chrome EC: UHEPI supported
1031 12:21:51.089637 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1032 12:21:51.092910 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1033 12:21:51.099430 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1034 12:21:51.106488 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1035 12:21:51.110107 SPI flash protection: WPSW=0 SRP0=0
1036 12:21:51.116401 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1037 12:21:51.119833 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1038 12:21:51.122814 found VGA at PCI: 00:02.0
1039 12:21:51.126328 Setting up VGA for PCI: 00:02.0
1040 12:21:51.133152 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1041 12:21:51.136089 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1042 12:21:51.139581 Allocating resources...
1043 12:21:51.142587 Reading resources...
1044 12:21:51.146021 Root Device read_resources bus 0 link: 0
1045 12:21:51.149644 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1046 12:21:51.155926 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1047 12:21:51.159180 DOMAIN: 0000 read_resources bus 0 link: 0
1048 12:21:51.166643 PCI: 00:14.0 read_resources bus 0 link: 0
1049 12:21:51.169951 USB0 port 0 read_resources bus 0 link: 0
1050 12:21:51.178023 USB0 port 0 read_resources bus 0 link: 0 done
1051 12:21:51.181552 PCI: 00:14.0 read_resources bus 0 link: 0 done
1052 12:21:51.188672 PCI: 00:15.0 read_resources bus 1 link: 0
1053 12:21:51.192364 PCI: 00:15.0 read_resources bus 1 link: 0 done
1054 12:21:51.198899 PCI: 00:15.1 read_resources bus 2 link: 0
1055 12:21:51.201796 PCI: 00:15.1 read_resources bus 2 link: 0 done
1056 12:21:51.209767 PCI: 00:19.0 read_resources bus 3 link: 0
1057 12:21:51.216238 PCI: 00:19.0 read_resources bus 3 link: 0 done
1058 12:21:51.219587 PCI: 00:1d.0 read_resources bus 1 link: 0
1059 12:21:51.226029 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1060 12:21:51.229453 PCI: 00:1e.2 read_resources bus 4 link: 0
1061 12:21:51.236161 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1062 12:21:51.239108 PCI: 00:1e.3 read_resources bus 5 link: 0
1063 12:21:51.245483 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1064 12:21:51.248995 PCI: 00:1f.0 read_resources bus 0 link: 0
1065 12:21:51.255971 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1066 12:21:51.262294 DOMAIN: 0000 read_resources bus 0 link: 0 done
1067 12:21:51.265780 Root Device read_resources bus 0 link: 0 done
1068 12:21:51.268736 Done reading resources.
1069 12:21:51.275374 Show resources in subtree (Root Device)...After reading.
1070 12:21:51.278786 Root Device child on link 0 CPU_CLUSTER: 0
1071 12:21:51.281889 CPU_CLUSTER: 0 child on link 0 APIC: 00
1072 12:21:51.282003 APIC: 00
1073 12:21:51.285399 APIC: 03
1074 12:21:51.285501 APIC: 05
1075 12:21:51.289030 APIC: 01
1076 12:21:51.289172 APIC: 02
1077 12:21:51.289288 APIC: 04
1078 12:21:51.292256 APIC: 06
1079 12:21:51.292363 APIC: 07
1080 12:21:51.295397 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1081 12:21:51.305350 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1082 12:21:51.345686 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1083 12:21:51.345861 PCI: 00:00.0
1084 12:21:51.346153 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1085 12:21:51.346244 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1086 12:21:51.346507 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1087 12:21:51.355646 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1088 12:21:51.365224 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1089 12:21:51.375421 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1090 12:21:51.381912 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1091 12:21:51.391732 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1092 12:21:51.401665 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1093 12:21:51.411644 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1094 12:21:51.421421 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1095 12:21:51.428167 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1096 12:21:51.438224 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1097 12:21:51.447946 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1098 12:21:51.457856 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1099 12:21:51.467743 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1100 12:21:51.467849 PCI: 00:02.0
1101 12:21:51.481402 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1102 12:21:51.490808 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1103 12:21:51.497587 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1104 12:21:51.500851 PCI: 00:04.0
1105 12:21:51.500949 PCI: 00:08.0
1106 12:21:51.510825 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1107 12:21:51.514147 PCI: 00:12.0
1108 12:21:51.524439 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1109 12:21:51.527579 PCI: 00:14.0 child on link 0 USB0 port 0
1110 12:21:51.537419 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1111 12:21:51.541010 USB0 port 0 child on link 0 USB2 port 0
1112 12:21:51.543887 USB2 port 0
1113 12:21:51.543980 USB2 port 1
1114 12:21:51.547212 USB2 port 2
1115 12:21:51.547316 USB2 port 3
1116 12:21:51.550565 USB2 port 5
1117 12:21:51.554174 USB2 port 6
1118 12:21:51.554273 USB2 port 9
1119 12:21:51.557078 USB3 port 0
1120 12:21:51.557169 USB3 port 1
1121 12:21:51.560446 USB3 port 2
1122 12:21:51.560544 USB3 port 3
1123 12:21:51.563947 USB3 port 4
1124 12:21:51.564033 PCI: 00:14.2
1125 12:21:51.573737 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1126 12:21:51.584221 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1127 12:21:51.586989 PCI: 00:14.3
1128 12:21:51.596893 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1129 12:21:51.600303 PCI: 00:15.0 child on link 0 I2C: 01:15
1130 12:21:51.610124 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 12:21:51.610238 I2C: 01:15
1132 12:21:51.616870 PCI: 00:15.1 child on link 0 I2C: 02:5d
1133 12:21:51.626737 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 12:21:51.626860 I2C: 02:5d
1135 12:21:51.630172 GENERIC: 0.0
1136 12:21:51.630270 PCI: 00:16.0
1137 12:21:51.639896 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 12:21:51.643346 PCI: 00:17.0
1139 12:21:51.653210 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1140 12:21:51.659620 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1141 12:21:51.669786 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1142 12:21:51.676259 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1143 12:21:51.685997 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1144 12:21:51.695967 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1145 12:21:51.699417 PCI: 00:19.0 child on link 0 I2C: 03:1a
1146 12:21:51.709585 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 12:21:51.709703 I2C: 03:1a
1148 12:21:51.713005 I2C: 03:38
1149 12:21:51.713104 I2C: 03:39
1150 12:21:51.715836 I2C: 03:3a
1151 12:21:51.715978 I2C: 03:3b
1152 12:21:51.722922 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1153 12:21:51.729561 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1154 12:21:51.739396 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1155 12:21:51.749481 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1156 12:21:51.749631 PCI: 01:00.0
1157 12:21:51.759318 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1158 12:21:51.762288 PCI: 00:1e.0
1159 12:21:51.772636 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1160 12:21:51.782350 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1161 12:21:51.785760 PCI: 00:1e.2 child on link 0 SPI: 00
1162 12:21:51.795624 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 12:21:51.799122 SPI: 00
1164 12:21:51.802582 PCI: 00:1e.3 child on link 0 SPI: 01
1165 12:21:51.812084 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 12:21:51.812223 SPI: 01
1167 12:21:51.819052 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1168 12:21:51.825569 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1169 12:21:51.835413 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1170 12:21:51.835528 PNP: 0c09.0
1171 12:21:51.845771 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1172 12:21:51.848454 PCI: 00:1f.3
1173 12:21:51.858818 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 12:21:51.868616 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1175 12:21:51.868719 PCI: 00:1f.4
1176 12:21:51.878348 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1177 12:21:51.888560 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1178 12:21:51.888684 PCI: 00:1f.5
1179 12:21:51.898353 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1180 12:21:51.904798 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1181 12:21:51.911858 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1182 12:21:51.918258 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1183 12:21:51.921271 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1184 12:21:51.924794 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1185 12:21:51.928270 PCI: 00:17.0 18 * [0x60 - 0x67] io
1186 12:21:51.931443 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1187 12:21:51.937859 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1188 12:21:51.944847 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1189 12:21:51.954438 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1190 12:21:51.961383 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1191 12:21:51.967709 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1192 12:21:51.974496 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1193 12:21:51.981227 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1194 12:21:51.984574 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1195 12:21:51.990982 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1196 12:21:51.994332 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1197 12:21:52.000740 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1198 12:21:52.004323 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1199 12:21:52.010797 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1200 12:21:52.014252 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1201 12:21:52.020802 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1202 12:21:52.024269 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1203 12:21:52.030712 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1204 12:21:52.034262 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1205 12:21:52.041130 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1206 12:21:52.043992 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1207 12:21:52.047289 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1208 12:21:52.053869 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1209 12:21:52.057135 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1210 12:21:52.063789 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1211 12:21:52.067038 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1212 12:21:52.073514 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1213 12:21:52.076926 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1214 12:21:52.084019 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1215 12:21:52.087389 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1216 12:21:52.093766 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1217 12:21:52.100143 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1218 12:21:52.103689 avoid_fixed_resources: DOMAIN: 0000
1219 12:21:52.110676 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1220 12:21:52.117079 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1221 12:21:52.123476 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1222 12:21:52.133292 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1223 12:21:52.139779 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1224 12:21:52.146808 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1225 12:21:52.156652 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1226 12:21:52.163070 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1227 12:21:52.169523 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1228 12:21:52.176552 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1229 12:21:52.186178 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1230 12:21:52.192823 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1231 12:21:52.196347 Setting resources...
1232 12:21:52.199212 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1233 12:21:52.205959 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1234 12:21:52.209571 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1235 12:21:52.212658 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1236 12:21:52.216239 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1237 12:21:52.222636 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1238 12:21:52.229547 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1239 12:21:52.235954 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1240 12:21:52.242520 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1241 12:21:52.248794 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1242 12:21:52.252329 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1243 12:21:52.259199 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1244 12:21:52.262721 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1245 12:21:52.268884 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1246 12:21:52.272290 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1247 12:21:52.278831 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1248 12:21:52.282104 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1249 12:21:52.288782 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1250 12:21:52.291927 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1251 12:21:52.299013 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1252 12:21:52.301948 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1253 12:21:52.305374 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1254 12:21:52.311737 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1255 12:21:52.315280 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1256 12:21:52.321751 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1257 12:21:52.325314 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1258 12:21:52.331790 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1259 12:21:52.335161 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1260 12:21:52.342326 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1261 12:21:52.345181 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1262 12:21:52.351655 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1263 12:21:52.355394 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1264 12:21:52.361497 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1265 12:21:52.371941 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1266 12:21:52.378105 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1267 12:21:52.384682 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1268 12:21:52.391215 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1269 12:21:52.397887 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1270 12:21:52.401236 Root Device assign_resources, bus 0 link: 0
1271 12:21:52.408299 DOMAIN: 0000 assign_resources, bus 0 link: 0
1272 12:21:52.414685 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1273 12:21:52.424506 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1274 12:21:52.431151 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1275 12:21:52.441166 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1276 12:21:52.447599 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1277 12:21:52.457943 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1278 12:21:52.460838 PCI: 00:14.0 assign_resources, bus 0 link: 0
1279 12:21:52.464238 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 12:21:52.474081 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1281 12:21:52.481204 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1282 12:21:52.490750 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1283 12:21:52.497313 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1284 12:21:52.504435 PCI: 00:15.0 assign_resources, bus 1 link: 0
1285 12:21:52.507741 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 12:21:52.514231 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1287 12:21:52.520601 PCI: 00:15.1 assign_resources, bus 2 link: 0
1288 12:21:52.524083 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 12:21:52.534114 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1290 12:21:52.540868 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1291 12:21:52.550507 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1292 12:21:52.557585 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1293 12:21:52.563841 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1294 12:21:52.573800 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1295 12:21:52.580328 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1296 12:21:52.587025 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1297 12:21:52.593664 PCI: 00:19.0 assign_resources, bus 3 link: 0
1298 12:21:52.596937 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 12:21:52.607160 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1300 12:21:52.616664 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1301 12:21:52.623508 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1302 12:21:52.626866 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1303 12:21:52.636927 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1304 12:21:52.639948 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1305 12:21:52.649788 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1306 12:21:52.656292 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1307 12:21:52.663167 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1308 12:21:52.666749 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 12:21:52.676513 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1310 12:21:52.679401 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1311 12:21:52.685790 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 12:21:52.689249 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1313 12:21:52.696061 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 12:21:52.699300 LPC: Trying to open IO window from 800 size 1ff
1315 12:21:52.708933 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1316 12:21:52.715472 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1317 12:21:52.722371 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1318 12:21:52.732627 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1319 12:21:52.735572 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 12:21:52.741993 Root Device assign_resources, bus 0 link: 0
1321 12:21:52.742092 Done setting resources.
1322 12:21:52.749034 Show resources in subtree (Root Device)...After assigning values.
1323 12:21:52.755484 Root Device child on link 0 CPU_CLUSTER: 0
1324 12:21:52.759025 CPU_CLUSTER: 0 child on link 0 APIC: 00
1325 12:21:52.759162 APIC: 00
1326 12:21:52.761999 APIC: 03
1327 12:21:52.762122 APIC: 05
1328 12:21:52.765406 APIC: 01
1329 12:21:52.765532 APIC: 02
1330 12:21:52.765648 APIC: 04
1331 12:21:52.768873 APIC: 06
1332 12:21:52.768999 APIC: 07
1333 12:21:52.772443 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1334 12:21:52.782175 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1335 12:21:52.795436 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1336 12:21:52.795588 PCI: 00:00.0
1337 12:21:52.805412 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1338 12:21:52.815052 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1339 12:21:52.824880 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1340 12:21:52.834856 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1341 12:21:52.841387 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1342 12:21:52.851623 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1343 12:21:52.861667 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1344 12:21:52.871071 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1345 12:21:52.881284 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1346 12:21:52.887839 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1347 12:21:52.897607 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1348 12:21:52.907410 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1349 12:21:52.917255 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1350 12:21:52.927598 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1351 12:21:52.937521 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1352 12:21:52.947235 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1353 12:21:52.947388 PCI: 00:02.0
1354 12:21:52.957363 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1355 12:21:52.970361 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1356 12:21:52.976729 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1357 12:21:52.980123 PCI: 00:04.0
1358 12:21:52.980229 PCI: 00:08.0
1359 12:21:52.990278 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1360 12:21:52.993241 PCI: 00:12.0
1361 12:21:53.003561 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1362 12:21:53.006553 PCI: 00:14.0 child on link 0 USB0 port 0
1363 12:21:53.019739 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1364 12:21:53.023615 USB0 port 0 child on link 0 USB2 port 0
1365 12:21:53.023736 USB2 port 0
1366 12:21:53.026794 USB2 port 1
1367 12:21:53.026893 USB2 port 2
1368 12:21:53.029731 USB2 port 3
1369 12:21:53.029830 USB2 port 5
1370 12:21:53.033489 USB2 port 6
1371 12:21:53.036518 USB2 port 9
1372 12:21:53.036660 USB3 port 0
1373 12:21:53.039766 USB3 port 1
1374 12:21:53.039900 USB3 port 2
1375 12:21:53.043058 USB3 port 3
1376 12:21:53.043205 USB3 port 4
1377 12:21:53.046350 PCI: 00:14.2
1378 12:21:53.056390 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1379 12:21:53.066311 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1380 12:21:53.066473 PCI: 00:14.3
1381 12:21:53.079665 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1382 12:21:53.082574 PCI: 00:15.0 child on link 0 I2C: 01:15
1383 12:21:53.092898 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1384 12:21:53.093045 I2C: 01:15
1385 12:21:53.099293 PCI: 00:15.1 child on link 0 I2C: 02:5d
1386 12:21:53.109153 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1387 12:21:53.109298 I2C: 02:5d
1388 12:21:53.112677 GENERIC: 0.0
1389 12:21:53.112816 PCI: 00:16.0
1390 12:21:53.122659 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1391 12:21:53.125529 PCI: 00:17.0
1392 12:21:53.135822 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1393 12:21:53.145576 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1394 12:21:53.155263 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1395 12:21:53.165768 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1396 12:21:53.172340 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1397 12:21:53.181590 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1398 12:21:53.188832 PCI: 00:19.0 child on link 0 I2C: 03:1a
1399 12:21:53.198246 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1400 12:21:53.198358 I2C: 03:1a
1401 12:21:53.201643 I2C: 03:38
1402 12:21:53.201731 I2C: 03:39
1403 12:21:53.205097 I2C: 03:3a
1404 12:21:53.205223 I2C: 03:3b
1405 12:21:53.211973 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1406 12:21:53.218330 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1407 12:21:53.228300 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1408 12:21:53.241562 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1409 12:21:53.241718 PCI: 01:00.0
1410 12:21:53.251753 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1411 12:21:53.254991 PCI: 00:1e.0
1412 12:21:53.264446 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1413 12:21:53.274979 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1414 12:21:53.278185 PCI: 00:1e.2 child on link 0 SPI: 00
1415 12:21:53.291037 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1416 12:21:53.291157 SPI: 00
1417 12:21:53.294538 PCI: 00:1e.3 child on link 0 SPI: 01
1418 12:21:53.304244 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1419 12:21:53.307705 SPI: 01
1420 12:21:53.311191 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1421 12:21:53.321193 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1422 12:21:53.327765 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1423 12:21:53.330704 PNP: 0c09.0
1424 12:21:53.337691 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1425 12:21:53.340482 PCI: 00:1f.3
1426 12:21:53.350449 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1427 12:21:53.360137 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1428 12:21:53.363539 PCI: 00:1f.4
1429 12:21:53.373683 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1430 12:21:53.383714 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1431 12:21:53.383868 PCI: 00:1f.5
1432 12:21:53.393514 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1433 12:21:53.397055 Done allocating resources.
1434 12:21:53.403516 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1435 12:21:53.406467 Enabling resources...
1436 12:21:53.409995 PCI: 00:00.0 subsystem <- 8086/9b61
1437 12:21:53.413403 PCI: 00:00.0 cmd <- 06
1438 12:21:53.416841 PCI: 00:02.0 subsystem <- 8086/9b41
1439 12:21:53.419826 PCI: 00:02.0 cmd <- 03
1440 12:21:53.419927 PCI: 00:08.0 cmd <- 06
1441 12:21:53.426635 PCI: 00:12.0 subsystem <- 8086/02f9
1442 12:21:53.426736 PCI: 00:12.0 cmd <- 02
1443 12:21:53.430113 PCI: 00:14.0 subsystem <- 8086/02ed
1444 12:21:53.433125 PCI: 00:14.0 cmd <- 02
1445 12:21:53.436647 PCI: 00:14.2 cmd <- 02
1446 12:21:53.439530 PCI: 00:14.3 subsystem <- 8086/02f0
1447 12:21:53.443041 PCI: 00:14.3 cmd <- 02
1448 12:21:53.446574 PCI: 00:15.0 subsystem <- 8086/02e8
1449 12:21:53.449462 PCI: 00:15.0 cmd <- 02
1450 12:21:53.452939 PCI: 00:15.1 subsystem <- 8086/02e9
1451 12:21:53.455891 PCI: 00:15.1 cmd <- 02
1452 12:21:53.459226 PCI: 00:16.0 subsystem <- 8086/02e0
1453 12:21:53.462579 PCI: 00:16.0 cmd <- 02
1454 12:21:53.465829 PCI: 00:17.0 subsystem <- 8086/02d3
1455 12:21:53.465966 PCI: 00:17.0 cmd <- 03
1456 12:21:53.472416 PCI: 00:19.0 subsystem <- 8086/02c5
1457 12:21:53.472553 PCI: 00:19.0 cmd <- 02
1458 12:21:53.475751 PCI: 00:1d.0 bridge ctrl <- 0013
1459 12:21:53.479019 PCI: 00:1d.0 subsystem <- 8086/02b0
1460 12:21:53.482566 PCI: 00:1d.0 cmd <- 06
1461 12:21:53.485775 PCI: 00:1e.0 subsystem <- 8086/02a8
1462 12:21:53.489513 PCI: 00:1e.0 cmd <- 06
1463 12:21:53.492323 PCI: 00:1e.2 subsystem <- 8086/02aa
1464 12:21:53.496137 PCI: 00:1e.2 cmd <- 06
1465 12:21:53.498958 PCI: 00:1e.3 subsystem <- 8086/02ab
1466 12:21:53.502587 PCI: 00:1e.3 cmd <- 02
1467 12:21:53.505932 PCI: 00:1f.0 subsystem <- 8086/0284
1468 12:21:53.509260 PCI: 00:1f.0 cmd <- 407
1469 12:21:53.512726 PCI: 00:1f.3 subsystem <- 8086/02c8
1470 12:21:53.515743 PCI: 00:1f.3 cmd <- 02
1471 12:21:53.519269 PCI: 00:1f.4 subsystem <- 8086/02a3
1472 12:21:53.522175 PCI: 00:1f.4 cmd <- 03
1473 12:21:53.525516 PCI: 00:1f.5 subsystem <- 8086/02a4
1474 12:21:53.528969 PCI: 00:1f.5 cmd <- 406
1475 12:21:53.536129 PCI: 01:00.0 cmd <- 02
1476 12:21:53.541287 done.
1477 12:21:53.554059 ME: Version: 14.0.39.1367
1478 12:21:53.560457 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1479 12:21:53.563832 Initializing devices...
1480 12:21:53.563932 Root Device init ...
1481 12:21:53.570437 Chrome EC: Set SMI mask to 0x0000000000000000
1482 12:21:53.573225 Chrome EC: clear events_b mask to 0x0000000000000000
1483 12:21:53.580453 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1484 12:21:53.587165 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1485 12:21:53.593755 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1486 12:21:53.596751 Chrome EC: Set WAKE mask to 0x0000000000000000
1487 12:21:53.600152 Root Device init finished in 35166 usecs
1488 12:21:53.603729 CPU_CLUSTER: 0 init ...
1489 12:21:53.610671 CPU_CLUSTER: 0 init finished in 2448 usecs
1490 12:21:53.614775 PCI: 00:00.0 init ...
1491 12:21:53.617742 CPU TDP: 15 Watts
1492 12:21:53.621203 CPU PL2 = 64 Watts
1493 12:21:53.624648 PCI: 00:00.0 init finished in 7063 usecs
1494 12:21:53.627646 PCI: 00:02.0 init ...
1495 12:21:53.630981 PCI: 00:02.0 init finished in 2253 usecs
1496 12:21:53.634400 PCI: 00:08.0 init ...
1497 12:21:53.637969 PCI: 00:08.0 init finished in 2251 usecs
1498 12:21:53.641011 PCI: 00:12.0 init ...
1499 12:21:53.644296 PCI: 00:12.0 init finished in 2252 usecs
1500 12:21:53.647788 PCI: 00:14.0 init ...
1501 12:21:53.651153 PCI: 00:14.0 init finished in 2252 usecs
1502 12:21:53.654122 PCI: 00:14.2 init ...
1503 12:21:53.657653 PCI: 00:14.2 init finished in 2245 usecs
1504 12:21:53.660699 PCI: 00:14.3 init ...
1505 12:21:53.664234 PCI: 00:14.3 init finished in 2270 usecs
1506 12:21:53.667563 PCI: 00:15.0 init ...
1507 12:21:53.670846 DW I2C bus 0 at 0xd121f000 (400 KHz)
1508 12:21:53.674308 PCI: 00:15.0 init finished in 5976 usecs
1509 12:21:53.677477 PCI: 00:15.1 init ...
1510 12:21:53.680973 DW I2C bus 1 at 0xd1220000 (400 KHz)
1511 12:21:53.687761 PCI: 00:15.1 init finished in 5974 usecs
1512 12:21:53.687859 PCI: 00:16.0 init ...
1513 12:21:53.693893 PCI: 00:16.0 init finished in 2253 usecs
1514 12:21:53.697068 PCI: 00:19.0 init ...
1515 12:21:53.700391 DW I2C bus 4 at 0xd1222000 (400 KHz)
1516 12:21:53.703795 PCI: 00:19.0 init finished in 5973 usecs
1517 12:21:53.707045 PCI: 00:1d.0 init ...
1518 12:21:53.710128 Initializing PCH PCIe bridge.
1519 12:21:53.713454 PCI: 00:1d.0 init finished in 5277 usecs
1520 12:21:53.716843 PCI: 00:1f.0 init ...
1521 12:21:53.720410 IOAPIC: Initializing IOAPIC at 0xfec00000
1522 12:21:53.726765 IOAPIC: Bootstrap Processor Local APIC = 0x00
1523 12:21:53.726862 IOAPIC: ID = 0x02
1524 12:21:53.730316 IOAPIC: Dumping registers
1525 12:21:53.733235 reg 0x0000: 0x02000000
1526 12:21:53.736632 reg 0x0001: 0x00770020
1527 12:21:53.736742 reg 0x0002: 0x00000000
1528 12:21:53.743548 PCI: 00:1f.0 init finished in 23525 usecs
1529 12:21:53.746461 PCI: 00:1f.4 init ...
1530 12:21:53.749835 PCI: 00:1f.4 init finished in 2262 usecs
1531 12:21:53.760882 PCI: 01:00.0 init ...
1532 12:21:53.763842 PCI: 01:00.0 init finished in 2252 usecs
1533 12:21:53.767981 PNP: 0c09.0 init ...
1534 12:21:53.771586 Google Chrome EC uptime: 11.067 seconds
1535 12:21:53.778030 Google Chrome AP resets since EC boot: 0
1536 12:21:53.781346 Google Chrome most recent AP reset causes:
1537 12:21:53.788059 Google Chrome EC reset flags at last EC boot: reset-pin
1538 12:21:53.791689 PNP: 0c09.0 init finished in 20569 usecs
1539 12:21:53.794544 Devices initialized
1540 12:21:53.794642 Show all devs... After init.
1541 12:21:53.798343 Root Device: enabled 1
1542 12:21:53.801024 CPU_CLUSTER: 0: enabled 1
1543 12:21:53.804879 DOMAIN: 0000: enabled 1
1544 12:21:53.804978 APIC: 00: enabled 1
1545 12:21:53.807837 PCI: 00:00.0: enabled 1
1546 12:21:53.811203 PCI: 00:02.0: enabled 1
1547 12:21:53.814395 PCI: 00:04.0: enabled 0
1548 12:21:53.814494 PCI: 00:05.0: enabled 0
1549 12:21:53.817953 PCI: 00:12.0: enabled 1
1550 12:21:53.821234 PCI: 00:12.5: enabled 0
1551 12:21:53.821334 PCI: 00:12.6: enabled 0
1552 12:21:53.824746 PCI: 00:14.0: enabled 1
1553 12:21:53.828192 PCI: 00:14.1: enabled 0
1554 12:21:53.831028 PCI: 00:14.3: enabled 1
1555 12:21:53.831136 PCI: 00:14.5: enabled 0
1556 12:21:53.834339 PCI: 00:15.0: enabled 1
1557 12:21:53.837707 PCI: 00:15.1: enabled 1
1558 12:21:53.841069 PCI: 00:15.2: enabled 0
1559 12:21:53.841168 PCI: 00:15.3: enabled 0
1560 12:21:53.844555 PCI: 00:16.0: enabled 1
1561 12:21:53.847871 PCI: 00:16.1: enabled 0
1562 12:21:53.850977 PCI: 00:16.2: enabled 0
1563 12:21:53.851075 PCI: 00:16.3: enabled 0
1564 12:21:53.854454 PCI: 00:16.4: enabled 0
1565 12:21:53.857414 PCI: 00:16.5: enabled 0
1566 12:21:53.860806 PCI: 00:17.0: enabled 1
1567 12:21:53.860905 PCI: 00:19.0: enabled 1
1568 12:21:53.864306 PCI: 00:19.1: enabled 0
1569 12:21:53.867249 PCI: 00:19.2: enabled 0
1570 12:21:53.867348 PCI: 00:1a.0: enabled 0
1571 12:21:53.870708 PCI: 00:1c.0: enabled 0
1572 12:21:53.874159 PCI: 00:1c.1: enabled 0
1573 12:21:53.877781 PCI: 00:1c.2: enabled 0
1574 12:21:53.877878 PCI: 00:1c.3: enabled 0
1575 12:21:53.880574 PCI: 00:1c.4: enabled 0
1576 12:21:53.884050 PCI: 00:1c.5: enabled 0
1577 12:21:53.887428 PCI: 00:1c.6: enabled 0
1578 12:21:53.887527 PCI: 00:1c.7: enabled 0
1579 12:21:53.890564 PCI: 00:1d.0: enabled 1
1580 12:21:53.893719 PCI: 00:1d.1: enabled 0
1581 12:21:53.896897 PCI: 00:1d.2: enabled 0
1582 12:21:53.896996 PCI: 00:1d.3: enabled 0
1583 12:21:53.900713 PCI: 00:1d.4: enabled 0
1584 12:21:53.903935 PCI: 00:1d.5: enabled 0
1585 12:21:53.906883 PCI: 00:1e.0: enabled 1
1586 12:21:53.906981 PCI: 00:1e.1: enabled 0
1587 12:21:53.910603 PCI: 00:1e.2: enabled 1
1588 12:21:53.914061 PCI: 00:1e.3: enabled 1
1589 12:21:53.914160 PCI: 00:1f.0: enabled 1
1590 12:21:53.916854 PCI: 00:1f.1: enabled 0
1591 12:21:53.920531 PCI: 00:1f.2: enabled 0
1592 12:21:53.923715 PCI: 00:1f.3: enabled 1
1593 12:21:53.923813 PCI: 00:1f.4: enabled 1
1594 12:21:53.926936 PCI: 00:1f.5: enabled 1
1595 12:21:53.930294 PCI: 00:1f.6: enabled 0
1596 12:21:53.933653 USB0 port 0: enabled 1
1597 12:21:53.933751 I2C: 01:15: enabled 1
1598 12:21:53.937250 I2C: 02:5d: enabled 1
1599 12:21:53.940057 GENERIC: 0.0: enabled 1
1600 12:21:53.940157 I2C: 03:1a: enabled 1
1601 12:21:53.943457 I2C: 03:38: enabled 1
1602 12:21:53.946910 I2C: 03:39: enabled 1
1603 12:21:53.947015 I2C: 03:3a: enabled 1
1604 12:21:53.950430 I2C: 03:3b: enabled 1
1605 12:21:53.953414 PCI: 00:00.0: enabled 1
1606 12:21:53.953547 SPI: 00: enabled 1
1607 12:21:53.956896 SPI: 01: enabled 1
1608 12:21:53.959855 PNP: 0c09.0: enabled 1
1609 12:21:53.959952 USB2 port 0: enabled 1
1610 12:21:53.963269 USB2 port 1: enabled 1
1611 12:21:53.966805 USB2 port 2: enabled 0
1612 12:21:53.966902 USB2 port 3: enabled 0
1613 12:21:53.970240 USB2 port 5: enabled 0
1614 12:21:53.973273 USB2 port 6: enabled 1
1615 12:21:53.976541 USB2 port 9: enabled 1
1616 12:21:53.976641 USB3 port 0: enabled 1
1617 12:21:53.979872 USB3 port 1: enabled 1
1618 12:21:53.983031 USB3 port 2: enabled 1
1619 12:21:53.983127 USB3 port 3: enabled 1
1620 12:21:53.986611 USB3 port 4: enabled 0
1621 12:21:53.989592 APIC: 03: enabled 1
1622 12:21:53.989691 APIC: 05: enabled 1
1623 12:21:53.993078 APIC: 01: enabled 1
1624 12:21:53.996244 APIC: 02: enabled 1
1625 12:21:53.996344 APIC: 04: enabled 1
1626 12:21:53.999489 APIC: 06: enabled 1
1627 12:21:53.999592 APIC: 07: enabled 1
1628 12:21:54.003288 PCI: 00:08.0: enabled 1
1629 12:21:54.006217 PCI: 00:14.2: enabled 1
1630 12:21:54.009871 PCI: 01:00.0: enabled 1
1631 12:21:54.013192 Disabling ACPI via APMC:
1632 12:21:54.013294 done.
1633 12:21:54.019818 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1634 12:21:54.022660 ELOG: NV offset 0xaf0000 size 0x4000
1635 12:21:54.029968 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1636 12:21:54.036691 ELOG: Event(17) added with size 13 at 2023-03-13 12:21:54 UTC
1637 12:21:54.042987 ELOG: Event(92) added with size 9 at 2023-03-13 12:21:54 UTC
1638 12:21:54.049374 ELOG: Event(93) added with size 9 at 2023-03-13 12:21:54 UTC
1639 12:21:54.056399 ELOG: Event(9A) added with size 9 at 2023-03-13 12:21:54 UTC
1640 12:21:54.062913 ELOG: Event(9E) added with size 10 at 2023-03-13 12:21:54 UTC
1641 12:21:54.069545 ELOG: Event(9F) added with size 14 at 2023-03-13 12:21:54 UTC
1642 12:21:54.072952 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1643 12:21:54.079987 ELOG: Event(A1) added with size 10 at 2023-03-13 12:21:54 UTC
1644 12:21:54.089805 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1645 12:21:54.096320 ELOG: Event(A0) added with size 9 at 2023-03-13 12:21:54 UTC
1646 12:21:54.099796 elog_add_boot_reason: Logged dev mode boot
1647 12:21:54.103190 Finalize devices...
1648 12:21:54.103292 PCI: 00:17.0 final
1649 12:21:54.106145 Devices finalized
1650 12:21:54.109450 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1651 12:21:54.115964 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1652 12:21:54.119343 ME: HFSTS1 : 0x90000245
1653 12:21:54.122604 ME: HFSTS2 : 0x3B850126
1654 12:21:54.129525 ME: HFSTS3 : 0x00000020
1655 12:21:54.132269 ME: HFSTS4 : 0x00004800
1656 12:21:54.135563 ME: HFSTS5 : 0x00000000
1657 12:21:54.138769 ME: HFSTS6 : 0x40400006
1658 12:21:54.142087 ME: Manufacturing Mode : NO
1659 12:21:54.145327 ME: FW Partition Table : OK
1660 12:21:54.148732 ME: Bringup Loader Failure : NO
1661 12:21:54.155090 ME: Firmware Init Complete : YES
1662 12:21:54.158542 ME: Boot Options Present : NO
1663 12:21:54.162195 ME: Update In Progress : NO
1664 12:21:54.165095 ME: D0i3 Support : YES
1665 12:21:54.168767 ME: Low Power State Enabled : NO
1666 12:21:54.172238 ME: CPU Replaced : NO
1667 12:21:54.175013 ME: CPU Replacement Valid : YES
1668 12:21:54.178482 ME: Current Working State : 5
1669 12:21:54.181909 ME: Current Operation State : 1
1670 12:21:54.182011 ME: Current Operation Mode : 0
1671 12:21:54.185274 ME: Error Code : 0
1672 12:21:54.188225 ME: CPU Debug Disabled : YES
1673 12:21:54.191717 ME: TXT Support : NO
1674 12:21:54.198330 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1675 12:21:54.204821 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1676 12:21:54.208202 CBFS @ c08000 size 3f8000
1677 12:21:54.211806 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1678 12:21:54.214712 CBFS: Locating 'fallback/dsdt.aml'
1679 12:21:54.221870 CBFS: Found @ offset 10bb80 size 3fa5
1680 12:21:54.224709 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1681 12:21:54.228016 CBFS @ c08000 size 3f8000
1682 12:21:54.234880 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1683 12:21:54.238081 CBFS: Locating 'fallback/slic'
1684 12:21:54.241262 CBFS: 'fallback/slic' not found.
1685 12:21:54.244679 ACPI: Writing ACPI tables at 99b3e000.
1686 12:21:54.247987 ACPI: * FACS
1687 12:21:54.248120 ACPI: * DSDT
1688 12:21:54.254319 Ramoops buffer: 0x100000@0x99a3d000.
1689 12:21:54.258049 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1690 12:21:54.260809 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1691 12:21:54.264304 Google Chrome EC: version:
1692 12:21:54.267826 ro: helios_v2.0.2659-56403530b
1693 12:21:54.271309 rw: helios_v2.0.2849-c41de27e7d
1694 12:21:54.274810 running image: 1
1695 12:21:54.277685 ACPI: * FADT
1696 12:21:54.277784 SCI is IRQ9
1697 12:21:54.281169 ACPI: added table 1/32, length now 40
1698 12:21:54.284202 ACPI: * SSDT
1699 12:21:54.288213 Found 1 CPU(s) with 8 core(s) each.
1700 12:21:54.291153 Error: Could not locate 'wifi_sar' in VPD.
1701 12:21:54.297513 Checking CBFS for default SAR values
1702 12:21:54.301091 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1703 12:21:54.304547 CBFS @ c08000 size 3f8000
1704 12:21:54.311107 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1705 12:21:54.314044 CBFS: Locating 'wifi_sar_defaults.hex'
1706 12:21:54.317584 CBFS: Found @ offset 5fac0 size 77
1707 12:21:54.321130 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1708 12:21:54.324039 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1709 12:21:54.330837 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1710 12:21:54.337260 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1711 12:21:54.340719 failed to find key in VPD: dsm_calib_r0_0
1712 12:21:54.350823 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1713 12:21:54.354155 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1714 12:21:54.357377 failed to find key in VPD: dsm_calib_r0_1
1715 12:21:54.367039 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1716 12:21:54.373976 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1717 12:21:54.377015 failed to find key in VPD: dsm_calib_r0_2
1718 12:21:54.386765 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1719 12:21:54.390411 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1720 12:21:54.396911 failed to find key in VPD: dsm_calib_r0_3
1721 12:21:54.403428 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1722 12:21:54.409791 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1723 12:21:54.413315 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1724 12:21:54.416790 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1725 12:21:54.420362 EC returned error result code 1
1726 12:21:54.424107 EC returned error result code 1
1727 12:21:54.428215 EC returned error result code 1
1728 12:21:54.434917 PS2K: Bad resp from EC. Vivaldi disabled!
1729 12:21:54.437847 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1730 12:21:54.444817 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1731 12:21:54.451460 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1732 12:21:54.454284 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1733 12:21:54.460942 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1734 12:21:54.467555 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1735 12:21:54.474441 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1736 12:21:54.478016 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1737 12:21:54.484333 ACPI: added table 2/32, length now 44
1738 12:21:54.484472 ACPI: * MCFG
1739 12:21:54.487882 ACPI: added table 3/32, length now 48
1740 12:21:54.490704 ACPI: * TPM2
1741 12:21:54.494377 TPM2 log created at 99a2d000
1742 12:21:54.497857 ACPI: added table 4/32, length now 52
1743 12:21:54.497994 ACPI: * MADT
1744 12:21:54.500790 SCI is IRQ9
1745 12:21:54.504236 ACPI: added table 5/32, length now 56
1746 12:21:54.504369 current = 99b43ac0
1747 12:21:54.507701 ACPI: * DMAR
1748 12:21:54.510628 ACPI: added table 6/32, length now 60
1749 12:21:54.514144 ACPI: * IGD OpRegion
1750 12:21:54.514280 GMA: Found VBT in CBFS
1751 12:21:54.517165 GMA: Found valid VBT in CBFS
1752 12:21:54.520500 ACPI: added table 7/32, length now 64
1753 12:21:54.523947 ACPI: * HPET
1754 12:21:54.527535 ACPI: added table 8/32, length now 68
1755 12:21:54.527669 ACPI: done.
1756 12:21:54.530471 ACPI tables: 31744 bytes.
1757 12:21:54.533968 smbios_write_tables: 99a2c000
1758 12:21:54.537575 EC returned error result code 3
1759 12:21:54.541029 Couldn't obtain OEM name from CBI
1760 12:21:54.544198 Create SMBIOS type 17
1761 12:21:54.546930 PCI: 00:00.0 (Intel Cannonlake)
1762 12:21:54.550748 PCI: 00:14.3 (Intel WiFi)
1763 12:21:54.553571 SMBIOS tables: 939 bytes.
1764 12:21:54.556947 Writing table forward entry at 0x00000500
1765 12:21:54.563704 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1766 12:21:54.567102 Writing coreboot table at 0x99b62000
1767 12:21:54.573598 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1768 12:21:54.576771 1. 0000000000001000-000000000009ffff: RAM
1769 12:21:54.580127 2. 00000000000a0000-00000000000fffff: RESERVED
1770 12:21:54.586902 3. 0000000000100000-0000000099a2bfff: RAM
1771 12:21:54.593309 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1772 12:21:54.596933 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1773 12:21:54.603328 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1774 12:21:54.606908 7. 000000009a000000-000000009f7fffff: RESERVED
1775 12:21:54.613252 8. 00000000e0000000-00000000efffffff: RESERVED
1776 12:21:54.617036 9. 00000000fc000000-00000000fc000fff: RESERVED
1777 12:21:54.623387 10. 00000000fe000000-00000000fe00ffff: RESERVED
1778 12:21:54.626278 11. 00000000fed10000-00000000fed17fff: RESERVED
1779 12:21:54.629875 12. 00000000fed80000-00000000fed83fff: RESERVED
1780 12:21:54.636477 13. 00000000fed90000-00000000fed91fff: RESERVED
1781 12:21:54.639970 14. 00000000feda0000-00000000feda1fff: RESERVED
1782 12:21:54.646284 15. 0000000100000000-000000045e7fffff: RAM
1783 12:21:54.649804 Graphics framebuffer located at 0xc0000000
1784 12:21:54.652874 Passing 5 GPIOs to payload:
1785 12:21:54.656152 NAME | PORT | POLARITY | VALUE
1786 12:21:54.662899 write protect | undefined | high | low
1787 12:21:54.666208 lid | undefined | high | high
1788 12:21:54.673296 power | undefined | high | low
1789 12:21:54.679792 oprom | undefined | high | low
1790 12:21:54.683029 EC in RW | 0x000000cb | high | low
1791 12:21:54.686065 Board ID: 4
1792 12:21:54.689507 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1793 12:21:54.693046 CBFS @ c08000 size 3f8000
1794 12:21:54.699591 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1795 12:21:54.706101 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1796 12:21:54.706207 coreboot table: 1492 bytes.
1797 12:21:54.709715 IMD ROOT 0. 99fff000 00001000
1798 12:21:54.712526 IMD SMALL 1. 99ffe000 00001000
1799 12:21:54.715958 FSP MEMORY 2. 99c4e000 003b0000
1800 12:21:54.719500 CONSOLE 3. 99c2e000 00020000
1801 12:21:54.722560 FMAP 4. 99c2d000 0000054e
1802 12:21:54.725846 TIME STAMP 5. 99c2c000 00000910
1803 12:21:54.729391 VBOOT WORK 6. 99c18000 00014000
1804 12:21:54.732897 MRC DATA 7. 99c16000 00001958
1805 12:21:54.735835 ROMSTG STCK 8. 99c15000 00001000
1806 12:21:54.739392 AFTER CAR 9. 99c0b000 0000a000
1807 12:21:54.742412 RAMSTAGE 10. 99baf000 0005c000
1808 12:21:54.746028 REFCODE 11. 99b7a000 00035000
1809 12:21:54.749449 SMM BACKUP 12. 99b6a000 00010000
1810 12:21:54.752766 COREBOOT 13. 99b62000 00008000
1811 12:21:54.755745 ACPI 14. 99b3e000 00024000
1812 12:21:54.758945 ACPI GNVS 15. 99b3d000 00001000
1813 12:21:54.762308 RAMOOPS 16. 99a3d000 00100000
1814 12:21:54.765542 TPM2 TCGLOG17. 99a2d000 00010000
1815 12:21:54.768803 SMBIOS 18. 99a2c000 00000800
1816 12:21:54.771947 IMD small region:
1817 12:21:54.775683 IMD ROOT 0. 99ffec00 00000400
1818 12:21:54.778813 FSP RUNTIME 1. 99ffebe0 00000004
1819 12:21:54.782334 EC HOSTEVENT 2. 99ffebc0 00000008
1820 12:21:54.785609 POWER STATE 3. 99ffeb80 00000040
1821 12:21:54.789026 ROMSTAGE 4. 99ffeb60 00000004
1822 12:21:54.792218 MEM INFO 5. 99ffe9a0 000001b9
1823 12:21:54.799033 VPD 6. 99ffe920 0000006c
1824 12:21:54.799181 MTRR: Physical address space:
1825 12:21:54.805389 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1826 12:21:54.811727 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1827 12:21:54.818753 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1828 12:21:54.825153 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1829 12:21:54.831528 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1830 12:21:54.838538 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1831 12:21:54.844900 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1832 12:21:54.848516 MTRR: Fixed MSR 0x250 0x0606060606060606
1833 12:21:54.851774 MTRR: Fixed MSR 0x258 0x0606060606060606
1834 12:21:54.855210 MTRR: Fixed MSR 0x259 0x0000000000000000
1835 12:21:54.861645 MTRR: Fixed MSR 0x268 0x0606060606060606
1836 12:21:54.865037 MTRR: Fixed MSR 0x269 0x0606060606060606
1837 12:21:54.868009 MTRR: Fixed MSR 0x26a 0x0606060606060606
1838 12:21:54.871258 MTRR: Fixed MSR 0x26b 0x0606060606060606
1839 12:21:54.877851 MTRR: Fixed MSR 0x26c 0x0606060606060606
1840 12:21:54.881685 MTRR: Fixed MSR 0x26d 0x0606060606060606
1841 12:21:54.884554 MTRR: Fixed MSR 0x26e 0x0606060606060606
1842 12:21:54.887928 MTRR: Fixed MSR 0x26f 0x0606060606060606
1843 12:21:54.891601 call enable_fixed_mtrr()
1844 12:21:54.894694 CPU physical address size: 39 bits
1845 12:21:54.901330 MTRR: default type WB/UC MTRR counts: 6/8.
1846 12:21:54.904527 MTRR: WB selected as default type.
1847 12:21:54.911443 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1848 12:21:54.914353 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1849 12:21:54.921371 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1850 12:21:54.927275 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1851 12:21:54.934279 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1852 12:21:54.941152 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1853 12:21:54.947628 MTRR: Fixed MSR 0x250 0x0606060606060606
1854 12:21:54.950523 MTRR: Fixed MSR 0x258 0x0606060606060606
1855 12:21:54.954099 MTRR: Fixed MSR 0x259 0x0000000000000000
1856 12:21:54.957422 MTRR: Fixed MSR 0x268 0x0606060606060606
1857 12:21:54.960917 MTRR: Fixed MSR 0x269 0x0606060606060606
1858 12:21:54.967283 MTRR: Fixed MSR 0x26a 0x0606060606060606
1859 12:21:54.970305 MTRR: Fixed MSR 0x26b 0x0606060606060606
1860 12:21:54.973779 MTRR: Fixed MSR 0x26c 0x0606060606060606
1861 12:21:54.977550 MTRR: Fixed MSR 0x26d 0x0606060606060606
1862 12:21:54.983729 MTRR: Fixed MSR 0x26e 0x0606060606060606
1863 12:21:54.986926 MTRR: Fixed MSR 0x26f 0x0606060606060606
1864 12:21:54.987029
1865 12:21:54.987136 MTRR check
1866 12:21:54.990193 Fixed MTRRs : Enabled
1867 12:21:54.993566 Variable MTRRs: Enabled
1868 12:21:54.993664
1869 12:21:54.996865 call enable_fixed_mtrr()
1870 12:21:55.000179 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1871 12:21:55.003446 CPU physical address size: 39 bits
1872 12:21:55.009979 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1873 12:21:55.013946 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 12:21:55.016518 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 12:21:55.023055 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 12:21:55.026609 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 12:21:55.030046 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 12:21:55.032970 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 12:21:55.039996 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 12:21:55.042945 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 12:21:55.046341 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 12:21:55.049879 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 12:21:55.056433 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 12:21:55.059297 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 12:21:55.062838 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 12:21:55.066164 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 12:21:55.072772 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 12:21:55.075785 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 12:21:55.079331 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 12:21:55.082470 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 12:21:55.089094 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 12:21:55.092394 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 12:21:55.095571 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 12:21:55.098918 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 12:21:55.102091 call enable_fixed_mtrr()
1896 12:21:55.105363 call enable_fixed_mtrr()
1897 12:21:55.108640 CPU physical address size: 39 bits
1898 12:21:55.112011 CPU physical address size: 39 bits
1899 12:21:55.115376 CBFS @ c08000 size 3f8000
1900 12:21:55.122369 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1901 12:21:55.125207 MTRR: Fixed MSR 0x250 0x0606060606060606
1902 12:21:55.128590 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 12:21:55.132158 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 12:21:55.138720 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 12:21:55.141608 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 12:21:55.145178 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 12:21:55.148662 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 12:21:55.154921 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 12:21:55.158477 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 12:21:55.161404 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 12:21:55.164963 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 12:21:55.171384 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 12:21:55.174994 call enable_fixed_mtrr()
1914 12:21:55.177918 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 12:21:55.181441 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 12:21:55.184878 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 12:21:55.187860 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 12:21:55.194647 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 12:21:55.197804 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 12:21:55.201226 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 12:21:55.204372 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 12:21:55.211248 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 12:21:55.214536 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 12:21:55.218074 CPU physical address size: 39 bits
1925 12:21:55.221371 call enable_fixed_mtrr()
1926 12:21:55.224498 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 12:21:55.227981 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 12:21:55.234258 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 12:21:55.237716 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 12:21:55.241187 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 12:21:55.244226 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 12:21:55.250723 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 12:21:55.254222 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 12:21:55.257815 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 12:21:55.260570 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 12:21:55.264211 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 12:21:55.270459 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 12:21:55.273848 call enable_fixed_mtrr()
1939 12:21:55.277336 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 12:21:55.280380 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 12:21:55.283792 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 12:21:55.290252 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 12:21:55.293815 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 12:21:55.297232 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 12:21:55.300446 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 12:21:55.303650 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 12:21:55.310209 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 12:21:55.313352 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 12:21:55.316760 CPU physical address size: 39 bits
1950 12:21:55.320044 call enable_fixed_mtrr()
1951 12:21:55.323219 CPU physical address size: 39 bits
1952 12:21:55.326965 CBFS: Locating 'fallback/payload'
1953 12:21:55.330312 CPU physical address size: 39 bits
1954 12:21:55.333742 CBFS: Found @ offset 1c96c0 size 3f798
1955 12:21:55.339935 Checking segment from ROM address 0xffdd16f8
1956 12:21:55.343077 Checking segment from ROM address 0xffdd1714
1957 12:21:55.346770 Loading segment from ROM address 0xffdd16f8
1958 12:21:55.349680 code (compression=0)
1959 12:21:55.360049 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1960 12:21:55.366294 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1961 12:21:55.369736 it's not compressed!
1962 12:21:55.461474 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1963 12:21:55.467881 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1964 12:21:55.471293 Loading segment from ROM address 0xffdd1714
1965 12:21:55.474762 Entry Point 0x30000000
1966 12:21:55.477749 Loaded segments
1967 12:21:55.483553 Finalizing chipset.
1968 12:21:55.487175 Finalizing SMM.
1969 12:21:55.490027 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1970 12:21:55.493610 mp_park_aps done after 0 msecs.
1971 12:21:55.500059 Jumping to boot code at 30000000(99b62000)
1972 12:21:55.506405 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1973 12:21:55.506508
1974 12:21:55.506614
1975 12:21:55.506708
1976 12:21:55.509738 Starting depthcharge on Helios...
1977 12:21:55.509838
1978 12:21:55.510228 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1979 12:21:55.510360 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1980 12:21:55.510465 Setting prompt string to ['hatch:']
1981 12:21:55.510574 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1982 12:21:55.520146 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1983 12:21:55.520249
1984 12:21:55.526185 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1985 12:21:55.526286
1986 12:21:55.532749 board_setup: Info: eMMC controller not present; skipping
1987 12:21:55.532852
1988 12:21:55.536110 New NVMe Controller 0x30053ac0 @ 00:1d:00
1989 12:21:55.536211
1990 12:21:55.542629 board_setup: Info: SDHCI controller not present; skipping
1991 12:21:55.542730
1992 12:21:55.549161 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1993 12:21:55.549262
1994 12:21:55.549341 Wipe memory regions:
1995 12:21:55.549415
1996 12:21:55.552512 [0x00000000001000, 0x000000000a0000)
1997 12:21:55.552611
1998 12:21:55.559441 [0x00000000100000, 0x00000030000000)
1999 12:21:55.622827
2000 12:21:55.625581 [0x00000030657430, 0x00000099a2c000)
2001 12:21:55.772318
2002 12:21:55.775661 [0x00000100000000, 0x0000045e800000)
2003 12:21:57.232022
2004 12:21:57.232203 R8152: Initializing
2005 12:21:57.232347
2006 12:21:57.235283 Version 9 (ocp_data = 6010)
2007 12:21:57.239404
2008 12:21:57.239645 R8152: Done initializing
2009 12:21:57.239804
2010 12:21:57.242408 Adding net device
2011 12:21:57.725448
2012 12:21:57.725614 R8152: Initializing
2013 12:21:57.725696
2014 12:21:57.728441 Version 6 (ocp_data = 5c30)
2015 12:21:57.728539
2016 12:21:57.731837 R8152: Done initializing
2017 12:21:57.731973
2018 12:21:57.735224 net_add_device: Attemp to include the same device
2019 12:21:57.738679
2020 12:21:57.745900 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2021 12:21:57.746088
2022 12:21:57.746214
2023 12:21:57.746332
2024 12:21:57.746683 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2026 12:21:57.847589 hatch: tftpboot 192.168.201.1 9584147/tftp-deploy-g56ghfbv/kernel/bzImage 9584147/tftp-deploy-g56ghfbv/kernel/cmdline 9584147/tftp-deploy-g56ghfbv/ramdisk/ramdisk.cpio.gz
2027 12:21:57.847791 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2028 12:21:57.847888 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2029 12:21:57.852052 tftpboot 192.168.201.1 9584147/tftp-deploy-g56ghfbv/kernel/bzImaoy-g56ghfbv/kernel/cmdline 9584147/tftp-deploy-g56ghfbv/ramdisk/ramdisk.cpio.gz
2030 12:21:57.852277
2031 12:21:57.852407 Waiting for link
2032 12:21:58.052868
2033 12:21:58.053091 done.
2034 12:21:58.053217
2035 12:21:58.053337 MAC: 00:24:32:50:1a:59
2036 12:21:58.053454
2037 12:21:58.056250 Sending DHCP discover... done.
2038 12:21:58.056387
2039 12:21:58.059763 Waiting for reply... done.
2040 12:21:58.059897
2041 12:21:58.062604 Sending DHCP request... done.
2042 12:21:58.062770
2043 12:21:58.066065 Waiting for reply... done.
2044 12:21:58.066200
2045 12:21:58.069525 My ip is 192.168.201.14
2046 12:21:58.069656
2047 12:21:58.072437 The DHCP server ip is 192.168.201.1
2048 12:21:58.072572
2049 12:21:58.075963 TFTP server IP predefined by user: 192.168.201.1
2050 12:21:58.076102
2051 12:21:58.082339 Bootfile predefined by user: 9584147/tftp-deploy-g56ghfbv/kernel/bzImage
2052 12:21:58.082507
2053 12:21:58.085979 Sending tftp read request... done.
2054 12:21:58.086125
2055 12:21:58.092385 Waiting for the transfer...
2056 12:21:58.092557
2057 12:21:58.634857 00000000 ################################################################
2058 12:21:58.635019
2059 12:21:59.183715 00080000 ################################################################
2060 12:21:59.183869
2061 12:21:59.732774 00100000 ################################################################
2062 12:21:59.732982
2063 12:22:00.279298 00180000 ################################################################
2064 12:22:00.279448
2065 12:22:00.822105 00200000 ################################################################
2066 12:22:00.822255
2067 12:22:01.357938 00280000 ################################################################
2068 12:22:01.358094
2069 12:22:01.913234 00300000 ################################################################
2070 12:22:01.913386
2071 12:22:02.458958 00380000 ################################################################
2072 12:22:02.459127
2073 12:22:03.001532 00400000 ################################################################
2074 12:22:03.001733
2075 12:22:03.563665 00480000 ################################################################
2076 12:22:03.563838
2077 12:22:04.110367 00500000 ################################################################
2078 12:22:04.110590
2079 12:22:04.669684 00580000 ################################################################
2080 12:22:04.669849
2081 12:22:05.239054 00600000 ################################################################
2082 12:22:05.239214
2083 12:22:05.814014 00680000 ################################################################
2084 12:22:05.814170
2085 12:22:06.368889 00700000 ################################################################
2086 12:22:06.369053
2087 12:22:06.941584 00780000 ################################################################
2088 12:22:06.941747
2089 12:22:07.503074 00800000 ################################################################
2090 12:22:07.503246
2091 12:22:08.049466 00880000 ################################################################
2092 12:22:08.049665
2093 12:22:08.455020 00900000 ################################################ done.
2094 12:22:08.455192
2095 12:22:08.458169 The bootfile was 9826304 bytes long.
2096 12:22:08.458268
2097 12:22:08.461714 Sending tftp read request... done.
2098 12:22:08.461817
2099 12:22:08.465085 Waiting for the transfer...
2100 12:22:08.465191
2101 12:22:09.025115 00000000 ################################################################
2102 12:22:09.025277
2103 12:22:09.573378 00080000 ################################################################
2104 12:22:09.573534
2105 12:22:10.133954 00100000 ################################################################
2106 12:22:10.134111
2107 12:22:10.692638 00180000 ################################################################
2108 12:22:10.692857
2109 12:22:11.234711 00200000 ################################################################
2110 12:22:11.234855
2111 12:22:11.768938 00280000 ################################################################
2112 12:22:11.769090
2113 12:22:12.308681 00300000 ################################################################
2114 12:22:12.308845
2115 12:22:12.832274 00380000 ################################################################
2116 12:22:12.832426
2117 12:22:13.362818 00400000 ################################################################
2118 12:22:13.362972
2119 12:22:13.895548 00480000 ################################################################
2120 12:22:13.895706
2121 12:22:14.420505 00500000 ################################################################
2122 12:22:14.420660
2123 12:22:14.956835 00580000 ################################################################
2124 12:22:14.956996
2125 12:22:15.487400 00600000 ################################################################
2126 12:22:15.487556
2127 12:22:16.012926 00680000 ################################################################
2128 12:22:16.013091
2129 12:22:16.540029 00700000 ################################################################
2130 12:22:16.540183
2131 12:22:17.064316 00780000 ################################################################
2132 12:22:17.064476
2133 12:22:17.598152 00800000 ################################################################
2134 12:22:17.598304
2135 12:22:17.871624 00880000 ################################# done.
2136 12:22:17.871784
2137 12:22:17.874944 Sending tftp read request... done.
2138 12:22:17.875058
2139 12:22:17.878343 Waiting for the transfer...
2140 12:22:17.878442
2141 12:22:17.878526 00000000 # done.
2142 12:22:17.878612
2143 12:22:17.888145 Command line loaded dynamically from TFTP file: 9584147/tftp-deploy-g56ghfbv/kernel/cmdline
2144 12:22:17.888255
2145 12:22:17.905083 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2146 12:22:17.905190
2147 12:22:17.911461 ec_init(0): CrosEC protocol v3 supported (256, 256)
2148 12:22:17.916321
2149 12:22:17.919252 Shutting down all USB controllers.
2150 12:22:17.919351
2151 12:22:17.919428 Removing current net device
2152 12:22:17.923834
2153 12:22:17.923943 Finalizing coreboot
2154 12:22:17.924023
2155 12:22:17.930490 Exiting depthcharge with code 4 at timestamp: 29769134
2156 12:22:17.930639
2157 12:22:17.930760
2158 12:22:17.930871 Starting kernel ...
2159 12:22:17.930985
2160 12:22:17.931102
2161 12:22:17.931651 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2162 12:22:17.931816 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2163 12:22:17.931947 Setting prompt string to ['Linux version [0-9]']
2164 12:22:17.932071 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2165 12:22:17.932201 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2167 12:26:37.932067 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2169 12:26:37.932304 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2171 12:26:37.932490 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2174 12:26:37.932791 end: 2 depthcharge-action (duration 00:05:00) [common]
2176 12:26:37.933066 Cleaning after the job
2177 12:26:37.933169 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584147/tftp-deploy-g56ghfbv/ramdisk
2178 12:26:37.933978 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584147/tftp-deploy-g56ghfbv/kernel
2179 12:26:37.934696 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584147/tftp-deploy-g56ghfbv/modules
2180 12:26:37.935126 start: 5.1 power-off (timeout 00:00:30) [common]
2181 12:26:37.935312 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2182 12:26:38.012883 >> Command sent successfully.
2183 12:26:38.015265 Returned 0 in 0 seconds
2184 12:26:38.116088 end: 5.1 power-off (duration 00:00:00) [common]
2186 12:26:38.116605 start: 5.2 read-feedback (timeout 00:10:00) [common]
2187 12:26:38.116972 Listened to connection for namespace 'common' for up to 1s
2189 12:26:38.117508 Listened to connection for namespace 'common' for up to 1s
2190 12:26:39.119151 Finalising connection for namespace 'common'
2191 12:26:39.119327 Disconnecting from shell: Finalise
2192 12:26:39.119418
2193 12:26:39.220164 end: 5.2 read-feedback (duration 00:00:01) [common]
2194 12:26:39.220339 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584147
2195 12:26:39.226361 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584147
2196 12:26:39.226504 JobError: Your job cannot terminate cleanly.