Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 07:08:15.904520 lava-dispatcher, installed at version: 2023.01
2 07:08:15.904736 start: 0 validate
3 07:08:15.904873 Start time: 2023-03-22 07:08:15.904867+00:00 (UTC)
4 07:08:15.905012 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:08:15.905154 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 07:08:16.191888 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:08:16.192598 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.277-cip94%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:08:16.488388 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:08:16.489090 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.277-cip94%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:08:16.787612 validate duration: 0.88
12 07:08:16.789033 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:08:16.789921 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:08:16.790490 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:08:16.791064 Not decompressing ramdisk as can be used compressed.
16 07:08:16.791704 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 07:08:16.792354 saving as /var/lib/lava/dispatcher/tmp/9726714/tftp-deploy-z_lrqjd4/ramdisk/rootfs.cpio.gz
18 07:08:16.792739 total size: 8429740 (8MB)
19 07:08:16.797386 progress 0% (0MB)
20 07:08:16.810189 progress 5% (0MB)
21 07:08:16.817073 progress 10% (0MB)
22 07:08:16.822291 progress 15% (1MB)
23 07:08:16.826628 progress 20% (1MB)
24 07:08:16.830437 progress 25% (2MB)
25 07:08:16.833745 progress 30% (2MB)
26 07:08:16.836854 progress 35% (2MB)
27 07:08:16.839533 progress 40% (3MB)
28 07:08:16.842197 progress 45% (3MB)
29 07:08:16.844730 progress 50% (4MB)
30 07:08:16.847105 progress 55% (4MB)
31 07:08:16.849429 progress 60% (4MB)
32 07:08:16.851719 progress 65% (5MB)
33 07:08:16.854014 progress 70% (5MB)
34 07:08:16.856124 progress 75% (6MB)
35 07:08:16.858401 progress 80% (6MB)
36 07:08:16.860673 progress 85% (6MB)
37 07:08:16.862960 progress 90% (7MB)
38 07:08:16.865239 progress 95% (7MB)
39 07:08:16.867533 progress 100% (8MB)
40 07:08:16.867679 8MB downloaded in 0.07s (107.27MB/s)
41 07:08:16.867843 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:08:16.868119 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:08:16.868220 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:08:16.868319 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:08:16.868438 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.277-cip94/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:08:16.868516 saving as /var/lib/lava/dispatcher/tmp/9726714/tftp-deploy-z_lrqjd4/kernel/bzImage
48 07:08:16.868597 total size: 9826304 (9MB)
49 07:08:16.868669 No compression specified
50 07:08:16.869673 progress 0% (0MB)
51 07:08:16.872457 progress 5% (0MB)
52 07:08:16.875132 progress 10% (0MB)
53 07:08:16.877792 progress 15% (1MB)
54 07:08:16.880497 progress 20% (1MB)
55 07:08:16.883191 progress 25% (2MB)
56 07:08:16.885853 progress 30% (2MB)
57 07:08:16.888518 progress 35% (3MB)
58 07:08:16.891192 progress 40% (3MB)
59 07:08:16.893882 progress 45% (4MB)
60 07:08:16.896558 progress 50% (4MB)
61 07:08:16.899256 progress 55% (5MB)
62 07:08:16.901891 progress 60% (5MB)
63 07:08:16.904510 progress 65% (6MB)
64 07:08:16.907152 progress 70% (6MB)
65 07:08:16.909793 progress 75% (7MB)
66 07:08:16.912405 progress 80% (7MB)
67 07:08:16.915094 progress 85% (7MB)
68 07:08:16.917956 progress 90% (8MB)
69 07:08:16.920633 progress 95% (8MB)
70 07:08:16.923283 progress 100% (9MB)
71 07:08:16.923559 9MB downloaded in 0.05s (170.52MB/s)
72 07:08:16.923723 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:08:16.923991 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:08:16.924093 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:08:16.924193 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:08:16.924314 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.277-cip94/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:08:16.924395 saving as /var/lib/lava/dispatcher/tmp/9726714/tftp-deploy-z_lrqjd4/modules/modules.tar
79 07:08:16.924465 total size: 461712 (0MB)
80 07:08:16.924534 Using unxz to decompress xz
81 07:08:16.927849 progress 7% (0MB)
82 07:08:16.928262 progress 14% (0MB)
83 07:08:16.928525 progress 21% (0MB)
84 07:08:16.930065 progress 28% (0MB)
85 07:08:16.932372 progress 35% (0MB)
86 07:08:16.934753 progress 42% (0MB)
87 07:08:16.937433 progress 49% (0MB)
88 07:08:16.939602 progress 56% (0MB)
89 07:08:16.941781 progress 63% (0MB)
90 07:08:16.944150 progress 70% (0MB)
91 07:08:16.946239 progress 78% (0MB)
92 07:08:16.948466 progress 85% (0MB)
93 07:08:16.950450 progress 92% (0MB)
94 07:08:16.952703 progress 99% (0MB)
95 07:08:16.959972 0MB downloaded in 0.04s (12.40MB/s)
96 07:08:16.960265 end: 1.3.1 http-download (duration 00:00:00) [common]
98 07:08:16.960564 end: 1.3 download-retry (duration 00:00:00) [common]
99 07:08:16.960673 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
100 07:08:16.960778 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
101 07:08:16.960876 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 07:08:16.960969 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
103 07:08:16.961173 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk
104 07:08:16.961296 makedir: /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin
105 07:08:16.961396 makedir: /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/tests
106 07:08:16.961489 makedir: /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/results
107 07:08:16.961613 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-add-keys
108 07:08:16.961769 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-add-sources
109 07:08:16.961906 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-background-process-start
110 07:08:16.962037 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-background-process-stop
111 07:08:16.962166 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-common-functions
112 07:08:16.962295 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-echo-ipv4
113 07:08:16.962424 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-install-packages
114 07:08:16.962551 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-installed-packages
115 07:08:16.962675 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-os-build
116 07:08:16.962800 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-probe-channel
117 07:08:16.962928 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-probe-ip
118 07:08:16.963053 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-target-ip
119 07:08:16.963193 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-target-mac
120 07:08:16.963320 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-target-storage
121 07:08:16.963450 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-test-case
122 07:08:16.963577 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-test-event
123 07:08:16.963701 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-test-feedback
124 07:08:16.963829 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-test-raise
125 07:08:16.963960 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-test-reference
126 07:08:16.964088 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-test-runner
127 07:08:16.964213 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-test-set
128 07:08:16.964338 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-test-shell
129 07:08:16.964491 Updating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-install-packages (oe)
130 07:08:16.964683 Updating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/bin/lava-installed-packages (oe)
131 07:08:16.964851 Creating /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/environment
132 07:08:16.964997 LAVA metadata
133 07:08:16.965119 - LAVA_JOB_ID=9726714
134 07:08:16.965228 - LAVA_DISPATCHER_IP=192.168.201.1
135 07:08:16.965392 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
136 07:08:16.965491 skipped lava-vland-overlay
137 07:08:16.965583 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 07:08:16.965678 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
139 07:08:16.965757 skipped lava-multinode-overlay
140 07:08:16.965845 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 07:08:16.965944 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
142 07:08:16.966034 Loading test definitions
143 07:08:16.966148 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
144 07:08:16.966234 Using /lava-9726714 at stage 0
145 07:08:16.966523 uuid=9726714_1.4.2.3.1 testdef=None
146 07:08:16.966644 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 07:08:16.966746 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
148 07:08:16.967322 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 07:08:16.967587 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
151 07:08:16.968253 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 07:08:16.968546 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
154 07:08:16.969163 runner path: /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/0/tests/0_dmesg test_uuid 9726714_1.4.2.3.1
155 07:08:16.969334 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 07:08:16.969599 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
158 07:08:16.969681 Using /lava-9726714 at stage 1
159 07:08:16.969953 uuid=9726714_1.4.2.3.5 testdef=None
160 07:08:16.970054 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 07:08:16.970151 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
162 07:08:16.970727 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 07:08:16.970983 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
165 07:08:16.971705 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 07:08:16.971974 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
168 07:08:16.972601 runner path: /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/1/tests/1_bootrr test_uuid 9726714_1.4.2.3.5
169 07:08:16.972763 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 07:08:16.973001 Creating lava-test-runner.conf files
172 07:08:16.973073 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/0 for stage 0
173 07:08:16.973164 - 0_dmesg
174 07:08:16.973249 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726714/lava-overlay-gmeag4bk/lava-9726714/1 for stage 1
175 07:08:16.973342 - 1_bootrr
176 07:08:16.973444 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 07:08:16.973540 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
178 07:08:16.980764 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 07:08:16.980895 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
180 07:08:16.980999 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 07:08:16.981099 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 07:08:16.981199 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
183 07:08:17.185992 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 07:08:17.186375 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
185 07:08:17.186501 extracting modules file /var/lib/lava/dispatcher/tmp/9726714/tftp-deploy-z_lrqjd4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726714/extract-overlay-ramdisk-3etfh0_c/ramdisk
186 07:08:17.198740 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 07:08:17.198898 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
188 07:08:17.199010 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726714/compress-overlay-dblu8lku/overlay-1.4.2.4.tar.gz to ramdisk
189 07:08:17.199105 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726714/compress-overlay-dblu8lku/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9726714/extract-overlay-ramdisk-3etfh0_c/ramdisk
190 07:08:17.203703 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 07:08:17.203833 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
192 07:08:17.203937 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 07:08:17.204040 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
194 07:08:17.204127 Building ramdisk /var/lib/lava/dispatcher/tmp/9726714/extract-overlay-ramdisk-3etfh0_c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9726714/extract-overlay-ramdisk-3etfh0_c/ramdisk
195 07:08:17.282810 >> 53632 blocks
196 07:08:18.186217 rename /var/lib/lava/dispatcher/tmp/9726714/extract-overlay-ramdisk-3etfh0_c/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9726714/tftp-deploy-z_lrqjd4/ramdisk/ramdisk.cpio.gz
197 07:08:18.186647 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 07:08:18.186790 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
199 07:08:18.187100 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
200 07:08:18.187208 No mkimage arch provided, not using FIT.
201 07:08:18.187311 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 07:08:18.187409 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 07:08:18.187512 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 07:08:18.187619 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
205 07:08:18.187711 No LXC device requested
206 07:08:18.187815 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 07:08:18.187915 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
208 07:08:18.188009 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 07:08:18.188091 Checking files for TFTP limit of 4294967296 bytes.
210 07:08:18.188527 end: 1 tftp-deploy (duration 00:00:01) [common]
211 07:08:18.188651 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 07:08:18.188758 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 07:08:18.188899 substitutions:
214 07:08:18.188976 - {DTB}: None
215 07:08:18.189051 - {INITRD}: 9726714/tftp-deploy-z_lrqjd4/ramdisk/ramdisk.cpio.gz
216 07:08:18.189119 - {KERNEL}: 9726714/tftp-deploy-z_lrqjd4/kernel/bzImage
217 07:08:18.189186 - {LAVA_MAC}: None
218 07:08:18.189251 - {PRESEED_CONFIG}: None
219 07:08:18.189317 - {PRESEED_LOCAL}: None
220 07:08:18.189380 - {RAMDISK}: 9726714/tftp-deploy-z_lrqjd4/ramdisk/ramdisk.cpio.gz
221 07:08:18.189445 - {ROOT_PART}: None
222 07:08:18.189507 - {ROOT}: None
223 07:08:18.189571 - {SERVER_IP}: 192.168.201.1
224 07:08:18.189635 - {TEE}: None
225 07:08:18.189697 Parsed boot commands:
226 07:08:18.189759 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 07:08:18.189926 Parsed boot commands: tftpboot 192.168.201.1 9726714/tftp-deploy-z_lrqjd4/kernel/bzImage 9726714/tftp-deploy-z_lrqjd4/kernel/cmdline 9726714/tftp-deploy-z_lrqjd4/ramdisk/ramdisk.cpio.gz
228 07:08:18.190027 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 07:08:18.190124 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 07:08:18.190228 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 07:08:18.190324 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 07:08:18.190401 Not connected, no need to disconnect.
233 07:08:18.190487 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 07:08:18.190580 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 07:08:18.190652 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
236 07:08:18.193810 Setting prompt string to ['lava-test: # ']
237 07:08:18.194134 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 07:08:18.194262 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 07:08:18.194376 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 07:08:18.194482 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 07:08:18.194679 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
242 07:08:23.337749 >> Command sent successfully.
243 07:08:23.340260 Returned 0 in 5 seconds
244 07:08:23.441424 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 07:08:23.442980 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 07:08:23.443542 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 07:08:23.443966 Setting prompt string to 'Starting depthcharge on Helios...'
249 07:08:23.444293 Changing prompt to 'Starting depthcharge on Helios...'
250 07:08:23.444636 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
251 07:08:23.446010 [Enter `^Ec?' for help]
252 07:08:24.064143
253 07:08:24.064668
254 07:08:24.074315 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
255 07:08:24.077566 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
256 07:08:24.084811 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
257 07:08:24.087640 CPU: AES supported, TXT NOT supported, VT supported
258 07:08:24.094089 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
259 07:08:24.097662 PCH: device id 0284 (rev 00) is Cometlake-U Premium
260 07:08:24.104374 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
261 07:08:24.107573 VBOOT: Loading verstage.
262 07:08:24.110902 FMAP: Found "FLASH" version 1.1 at 0xc04000.
263 07:08:24.117496 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
264 07:08:24.121200 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
265 07:08:24.123820 CBFS @ c08000 size 3f8000
266 07:08:24.131048 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
267 07:08:24.133741 CBFS: Locating 'fallback/verstage'
268 07:08:24.137478 CBFS: Found @ offset 10fb80 size 1072c
269 07:08:24.140927
270 07:08:24.141361
271 07:08:24.151358 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
272 07:08:24.165203 Probing TPM: . done!
273 07:08:24.168450 TPM ready after 0 ms
274 07:08:24.171933 Connected to device vid:did:rid of 1ae0:0028:00
275 07:08:24.182535 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
276 07:08:24.185539 Initialized TPM device CR50 revision 0
277 07:08:24.229612 tlcl_send_startup: Startup return code is 0
278 07:08:24.230159 TPM: setup succeeded
279 07:08:24.241505 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
280 07:08:24.245790 Chrome EC: UHEPI supported
281 07:08:24.248927 Phase 1
282 07:08:24.252243 FMAP: area GBB found @ c05000 (12288 bytes)
283 07:08:24.258631 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
284 07:08:24.261997 Phase 2
285 07:08:24.262546 Phase 3
286 07:08:24.265226 FMAP: area GBB found @ c05000 (12288 bytes)
287 07:08:24.271902 VB2:vb2_report_dev_firmware() This is developer signed firmware
288 07:08:24.278980 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
289 07:08:24.282197 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 07:08:24.288876 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 07:08:24.304302 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
292 07:08:24.307605 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 07:08:24.314337 VB2:vb2_verify_fw_preamble() Verifying preamble.
294 07:08:24.318484 Phase 4
295 07:08:24.321926 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
296 07:08:24.328733 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
297 07:08:24.507815 VB2:vb2_rsa_verify_digest() Digest check failed!
298 07:08:24.514536 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
299 07:08:24.515117 Saving nvdata
300 07:08:24.517740 Reboot requested (10020007)
301 07:08:24.521701 board_reset() called!
302 07:08:24.522247 full_reset() called!
303 07:08:29.031543
304 07:08:29.032079
305 07:08:29.041364 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
306 07:08:29.044171 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
307 07:08:29.050820 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
308 07:08:29.054292 CPU: AES supported, TXT NOT supported, VT supported
309 07:08:29.060912 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
310 07:08:29.063961 PCH: device id 0284 (rev 00) is Cometlake-U Premium
311 07:08:29.070652 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
312 07:08:29.073949 VBOOT: Loading verstage.
313 07:08:29.077725 FMAP: Found "FLASH" version 1.1 at 0xc04000.
314 07:08:29.084017 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
315 07:08:29.090279 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
316 07:08:29.090721 CBFS @ c08000 size 3f8000
317 07:08:29.097335 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
318 07:08:29.100367 CBFS: Locating 'fallback/verstage'
319 07:08:29.103707 CBFS: Found @ offset 10fb80 size 1072c
320 07:08:29.107684
321 07:08:29.108119
322 07:08:29.118180 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
323 07:08:29.132070 Probing TPM: . done!
324 07:08:29.135645 TPM ready after 0 ms
325 07:08:29.138830 Connected to device vid:did:rid of 1ae0:0028:00
326 07:08:29.149077 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
327 07:08:29.152716 Initialized TPM device CR50 revision 0
328 07:08:29.195784 tlcl_send_startup: Startup return code is 0
329 07:08:29.196313 TPM: setup succeeded
330 07:08:29.208550 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
331 07:08:29.212517 Chrome EC: UHEPI supported
332 07:08:29.215910 Phase 1
333 07:08:29.218955 FMAP: area GBB found @ c05000 (12288 bytes)
334 07:08:29.225706 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
335 07:08:29.232830 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
336 07:08:29.235549 Recovery requested (1009000e)
337 07:08:29.241831 Saving nvdata
338 07:08:29.247954 tlcl_extend: response is 0
339 07:08:29.256267 tlcl_extend: response is 0
340 07:08:29.263366 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 07:08:29.267194 CBFS @ c08000 size 3f8000
342 07:08:29.273572 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 07:08:29.276871 CBFS: Locating 'fallback/romstage'
344 07:08:29.279657 CBFS: Found @ offset 80 size 145fc
345 07:08:29.283076 Accumulated console time in verstage 98 ms
346 07:08:29.283556
347 07:08:29.283903
348 07:08:29.296629 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
349 07:08:29.303441 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
350 07:08:29.306706 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
351 07:08:29.310117 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
352 07:08:29.316183 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
353 07:08:29.319512 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
354 07:08:29.322807 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
355 07:08:29.326525 TCO_STS: 0000 0000
356 07:08:29.329550 GEN_PMCON: e0015238 00000200
357 07:08:29.333314 GBLRST_CAUSE: 00000000 00000000
358 07:08:29.333864 prev_sleep_state 5
359 07:08:29.335961 Boot Count incremented to 48630
360 07:08:29.343686 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 07:08:29.346610 CBFS @ c08000 size 3f8000
362 07:08:29.352919 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 07:08:29.353469 CBFS: Locating 'fspm.bin'
364 07:08:29.359398 CBFS: Found @ offset 5ffc0 size 71000
365 07:08:29.362775 Chrome EC: UHEPI supported
366 07:08:29.369360 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
367 07:08:29.372928 Probing TPM: done!
368 07:08:29.380464 Connected to device vid:did:rid of 1ae0:0028:00
369 07:08:29.389588 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
370 07:08:29.395536 Initialized TPM device CR50 revision 0
371 07:08:29.404431 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
372 07:08:29.411430 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
373 07:08:29.414655 MRC cache found, size 1948
374 07:08:29.418183 bootmode is set to: 2
375 07:08:29.421241 PRMRR disabled by config.
376 07:08:29.424521 SPD INDEX = 1
377 07:08:29.427722 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 07:08:29.431010 CBFS @ c08000 size 3f8000
379 07:08:29.437695 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 07:08:29.438249 CBFS: Locating 'spd.bin'
381 07:08:29.441059 CBFS: Found @ offset 5fb80 size 400
382 07:08:29.444512 SPD: module type is LPDDR3
383 07:08:29.447637 SPD: module part is
384 07:08:29.454604 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
385 07:08:29.457884 SPD: device width 4 bits, bus width 8 bits
386 07:08:29.460603 SPD: module size is 4096 MB (per channel)
387 07:08:29.464505 memory slot: 0 configuration done.
388 07:08:29.467710 memory slot: 2 configuration done.
389 07:08:29.518730 CBMEM:
390 07:08:29.521810 IMD: root @ 99fff000 254 entries.
391 07:08:29.525198 IMD: root @ 99ffec00 62 entries.
392 07:08:29.528573 External stage cache:
393 07:08:29.532208 IMD: root @ 9abff000 254 entries.
394 07:08:29.535193 IMD: root @ 9abfec00 62 entries.
395 07:08:29.541617 Chrome EC: clear events_b mask to 0x0000000020004000
396 07:08:29.554545 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 07:08:29.567826 tlcl_write: response is 0
398 07:08:29.576531 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
399 07:08:29.583456 MRC: TPM MRC hash updated successfully.
400 07:08:29.584053 2 DIMMs found
401 07:08:29.586889 SMM Memory Map
402 07:08:29.589781 SMRAM : 0x9a000000 0x1000000
403 07:08:29.593260 Subregion 0: 0x9a000000 0xa00000
404 07:08:29.596701 Subregion 1: 0x9aa00000 0x200000
405 07:08:29.599807 Subregion 2: 0x9ac00000 0x400000
406 07:08:29.603272 top_of_ram = 0x9a000000
407 07:08:29.606498 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
408 07:08:29.613040 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
409 07:08:29.616683 MTRR Range: Start=ff000000 End=0 (Size 1000000)
410 07:08:29.622949 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 07:08:29.626372 CBFS @ c08000 size 3f8000
412 07:08:29.629420 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 07:08:29.632962 CBFS: Locating 'fallback/postcar'
414 07:08:29.640056 CBFS: Found @ offset 107000 size 4b44
415 07:08:29.643134 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
416 07:08:29.655579 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
417 07:08:29.658552 Processing 180 relocs. Offset value of 0x97c0c000
418 07:08:29.667307 Accumulated console time in romstage 286 ms
419 07:08:29.667847
420 07:08:29.668197
421 07:08:29.676797 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
422 07:08:29.683351 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 07:08:29.686821 CBFS @ c08000 size 3f8000
424 07:08:29.693401 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 07:08:29.696738 CBFS: Locating 'fallback/ramstage'
426 07:08:29.700744 CBFS: Found @ offset 43380 size 1b9e8
427 07:08:29.706164 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
428 07:08:29.738685 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
429 07:08:29.741891 Processing 3976 relocs. Offset value of 0x98db0000
430 07:08:29.748434 Accumulated console time in postcar 52 ms
431 07:08:29.748879
432 07:08:29.749221
433 07:08:29.758247 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
434 07:08:29.765396 FMAP: area RO_VPD found @ c00000 (16384 bytes)
435 07:08:29.768343 WARNING: RO_VPD is uninitialized or empty.
436 07:08:29.771731 FMAP: area RW_VPD found @ af8000 (8192 bytes)
437 07:08:29.778771 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 07:08:29.779370 Normal boot.
439 07:08:29.785345 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
440 07:08:29.788305 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 07:08:29.791777 CBFS @ c08000 size 3f8000
442 07:08:29.798459 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 07:08:29.801670 CBFS: Locating 'cpu_microcode_blob.bin'
444 07:08:29.805148 CBFS: Found @ offset 14700 size 2ec00
445 07:08:29.808142 microcode: sig=0x806ec pf=0x4 revision=0xc9
446 07:08:29.811208 Skip microcode update
447 07:08:29.818757 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 07:08:29.819348 CBFS @ c08000 size 3f8000
449 07:08:29.824705 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 07:08:29.827979 CBFS: Locating 'fsps.bin'
451 07:08:29.831413 CBFS: Found @ offset d1fc0 size 35000
452 07:08:29.856795 Detected 4 core, 8 thread CPU.
453 07:08:29.860335 Setting up SMI for CPU
454 07:08:29.863203 IED base = 0x9ac00000
455 07:08:29.863646 IED size = 0x00400000
456 07:08:29.866810 Will perform SMM setup.
457 07:08:29.873894 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
458 07:08:29.880526 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
459 07:08:29.883716 Processing 16 relocs. Offset value of 0x00030000
460 07:08:29.887250 Attempting to start 7 APs
461 07:08:29.890222 Waiting for 10ms after sending INIT.
462 07:08:29.906884 Waiting for 1st SIPI to complete...done.
463 07:08:29.907478 AP: slot 4 apic_id 3.
464 07:08:29.909689 AP: slot 1 apic_id 2.
465 07:08:29.913614 AP: slot 2 apic_id 1.
466 07:08:29.916312 Waiting for 2nd SIPI to complete...done.
467 07:08:29.920193 AP: slot 7 apic_id 4.
468 07:08:29.920633 AP: slot 6 apic_id 5.
469 07:08:29.923060 AP: slot 5 apic_id 7.
470 07:08:29.926529 AP: slot 3 apic_id 6.
471 07:08:29.933269 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
472 07:08:29.939636 Processing 13 relocs. Offset value of 0x00038000
473 07:08:29.942822 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
474 07:08:29.949420 Installing SMM handler to 0x9a000000
475 07:08:29.956307 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
476 07:08:29.962644 Processing 658 relocs. Offset value of 0x9a010000
477 07:08:29.969356 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
478 07:08:29.972877 Processing 13 relocs. Offset value of 0x9a008000
479 07:08:29.979275 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
480 07:08:29.985998 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
481 07:08:29.992768 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
482 07:08:29.996135 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
483 07:08:30.002678 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
484 07:08:30.009606 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
485 07:08:30.012353 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
486 07:08:30.019193 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
487 07:08:30.022807 Clearing SMI status registers
488 07:08:30.026317 SMI_STS: PM1
489 07:08:30.026858 PM1_STS: PWRBTN
490 07:08:30.029036 TCO_STS: SECOND_TO
491 07:08:30.033001 New SMBASE 0x9a000000
492 07:08:30.035801 In relocation handler: CPU 0
493 07:08:30.039339 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
494 07:08:30.042561 Writing SMRR. base = 0x9a000006, mask=0xff000800
495 07:08:30.046006 Relocation complete.
496 07:08:30.049072 New SMBASE 0x99fff800
497 07:08:30.052414 In relocation handler: CPU 2
498 07:08:30.055997 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
499 07:08:30.058778 Writing SMRR. base = 0x9a000006, mask=0xff000800
500 07:08:30.062551 Relocation complete.
501 07:08:30.065693 New SMBASE 0x99fff000
502 07:08:30.066163 In relocation handler: CPU 4
503 07:08:30.072612 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
504 07:08:30.076041 Writing SMRR. base = 0x9a000006, mask=0xff000800
505 07:08:30.078940 Relocation complete.
506 07:08:30.079427 New SMBASE 0x99fffc00
507 07:08:30.082594 In relocation handler: CPU 1
508 07:08:30.089024 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
509 07:08:30.092259 Writing SMRR. base = 0x9a000006, mask=0xff000800
510 07:08:30.095772 Relocation complete.
511 07:08:30.096222 New SMBASE 0x99ffe800
512 07:08:30.099270 In relocation handler: CPU 6
513 07:08:30.106067 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
514 07:08:30.108732 Writing SMRR. base = 0x9a000006, mask=0xff000800
515 07:08:30.112297 Relocation complete.
516 07:08:30.112739 New SMBASE 0x99ffe400
517 07:08:30.115426 In relocation handler: CPU 7
518 07:08:30.119056 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
519 07:08:30.125906 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 07:08:30.129016 Relocation complete.
521 07:08:30.129522 New SMBASE 0x99fff400
522 07:08:30.131900 In relocation handler: CPU 3
523 07:08:30.135797 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
524 07:08:30.141821 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 07:08:30.145686 Relocation complete.
526 07:08:30.146235 New SMBASE 0x99ffec00
527 07:08:30.148419 In relocation handler: CPU 5
528 07:08:30.151912 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
529 07:08:30.158348 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 07:08:30.158800 Relocation complete.
531 07:08:30.161683 Initializing CPU #0
532 07:08:30.165041 CPU: vendor Intel device 806ec
533 07:08:30.168540 CPU: family 06, model 8e, stepping 0c
534 07:08:30.171846 Clearing out pending MCEs
535 07:08:30.175070 Setting up local APIC...
536 07:08:30.175556 apic_id: 0x00 done.
537 07:08:30.178309 Turbo is available but hidden
538 07:08:30.182047 Turbo is available and visible
539 07:08:30.185253 VMX status: enabled
540 07:08:30.188580 IA32_FEATURE_CONTROL status: locked
541 07:08:30.191468 Skip microcode update
542 07:08:30.191899 CPU #0 initialized
543 07:08:30.195286 Initializing CPU #2
544 07:08:30.198321 Initializing CPU #1
545 07:08:30.198883 Initializing CPU #4
546 07:08:30.201833 CPU: vendor Intel device 806ec
547 07:08:30.205234 CPU: family 06, model 8e, stepping 0c
548 07:08:30.208077 CPU: vendor Intel device 806ec
549 07:08:30.211831 CPU: family 06, model 8e, stepping 0c
550 07:08:30.214823 Clearing out pending MCEs
551 07:08:30.218611 Clearing out pending MCEs
552 07:08:30.221782 Setting up local APIC...
553 07:08:30.222328 Initializing CPU #7
554 07:08:30.225167 Initializing CPU #6
555 07:08:30.228179 CPU: vendor Intel device 806ec
556 07:08:30.231317 CPU: family 06, model 8e, stepping 0c
557 07:08:30.235143 CPU: vendor Intel device 806ec
558 07:08:30.238373 CPU: family 06, model 8e, stepping 0c
559 07:08:30.241016 Clearing out pending MCEs
560 07:08:30.244755 Clearing out pending MCEs
561 07:08:30.245199 Setting up local APIC...
562 07:08:30.247974 CPU: vendor Intel device 806ec
563 07:08:30.255076 CPU: family 06, model 8e, stepping 0c
564 07:08:30.255640 Clearing out pending MCEs
565 07:08:30.257789 Initializing CPU #3
566 07:08:30.261124 Initializing CPU #5
567 07:08:30.261567 Setting up local APIC...
568 07:08:30.264433 apic_id: 0x04 done.
569 07:08:30.267979 Setting up local APIC...
570 07:08:30.268423 apic_id: 0x01 done.
571 07:08:30.271330 apic_id: 0x02 done.
572 07:08:30.274461 Setting up local APIC...
573 07:08:30.274906 VMX status: enabled
574 07:08:30.277916 CPU: vendor Intel device 806ec
575 07:08:30.284471 CPU: family 06, model 8e, stepping 0c
576 07:08:30.285028 CPU: vendor Intel device 806ec
577 07:08:30.291213 CPU: family 06, model 8e, stepping 0c
578 07:08:30.291655 Clearing out pending MCEs
579 07:08:30.294279 Clearing out pending MCEs
580 07:08:30.297470 Setting up local APIC...
581 07:08:30.301346 apic_id: 0x05 done.
582 07:08:30.301894 VMX status: enabled
583 07:08:30.304435 VMX status: enabled
584 07:08:30.307630 IA32_FEATURE_CONTROL status: locked
585 07:08:30.310812 IA32_FEATURE_CONTROL status: locked
586 07:08:30.314749 VMX status: enabled
587 07:08:30.315339 apic_id: 0x03 done.
588 07:08:30.317720 IA32_FEATURE_CONTROL status: locked
589 07:08:30.321305 VMX status: enabled
590 07:08:30.324768 Skip microcode update
591 07:08:30.327658 IA32_FEATURE_CONTROL status: locked
592 07:08:30.328098 CPU #1 initialized
593 07:08:30.330605 Skip microcode update
594 07:08:30.334333 Setting up local APIC...
595 07:08:30.334771 CPU #4 initialized
596 07:08:30.337657 IA32_FEATURE_CONTROL status: locked
597 07:08:30.340757 Skip microcode update
598 07:08:30.344706 Skip microcode update
599 07:08:30.345244 CPU #7 initialized
600 07:08:30.347166 CPU #6 initialized
601 07:08:30.350700 apic_id: 0x07 done.
602 07:08:30.351175 apic_id: 0x06 done.
603 07:08:30.354540 VMX status: enabled
604 07:08:30.357835 VMX status: enabled
605 07:08:30.360619 IA32_FEATURE_CONTROL status: locked
606 07:08:30.364072 IA32_FEATURE_CONTROL status: locked
607 07:08:30.364569 Skip microcode update
608 07:08:30.367570 Skip microcode update
609 07:08:30.370589 CPU #5 initialized
610 07:08:30.371023 CPU #3 initialized
611 07:08:30.374230 Skip microcode update
612 07:08:30.377421 CPU #2 initialized
613 07:08:30.380594 bsp_do_flight_plan done after 461 msecs.
614 07:08:30.383981 CPU: frequency set to 4200 MHz
615 07:08:30.384524 Enabling SMIs.
616 07:08:30.387436 Locking SMM.
617 07:08:30.400664 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
618 07:08:30.404013 CBFS @ c08000 size 3f8000
619 07:08:30.410779 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
620 07:08:30.411408 CBFS: Locating 'vbt.bin'
621 07:08:30.414283 CBFS: Found @ offset 5f5c0 size 499
622 07:08:30.420489 Found a VBT of 4608 bytes after decompression
623 07:08:30.603448 Display FSP Version Info HOB
624 07:08:30.606991 Reference Code - CPU = 9.0.1e.30
625 07:08:30.610458 uCode Version = 0.0.0.ca
626 07:08:30.613233 TXT ACM version = ff.ff.ff.ffff
627 07:08:30.616496 Display FSP Version Info HOB
628 07:08:30.620269 Reference Code - ME = 9.0.1e.30
629 07:08:30.623543 MEBx version = 0.0.0.0
630 07:08:30.626466 ME Firmware Version = Consumer SKU
631 07:08:30.630136 Display FSP Version Info HOB
632 07:08:30.633394 Reference Code - CML PCH = 9.0.1e.30
633 07:08:30.636589 PCH-CRID Status = Disabled
634 07:08:30.640079 PCH-CRID Original Value = ff.ff.ff.ffff
635 07:08:30.643608 PCH-CRID New Value = ff.ff.ff.ffff
636 07:08:30.646595 OPROM - RST - RAID = ff.ff.ff.ffff
637 07:08:30.649648 ChipsetInit Base Version = ff.ff.ff.ffff
638 07:08:30.653298 ChipsetInit Oem Version = ff.ff.ff.ffff
639 07:08:30.656165 Display FSP Version Info HOB
640 07:08:30.662873 Reference Code - SA - System Agent = 9.0.1e.30
641 07:08:30.666357 Reference Code - MRC = 0.7.1.6c
642 07:08:30.666548 SA - PCIe Version = 9.0.1e.30
643 07:08:30.669454 SA-CRID Status = Disabled
644 07:08:30.673079 SA-CRID Original Value = 0.0.0.c
645 07:08:30.676058 SA-CRID New Value = 0.0.0.c
646 07:08:30.679680 OPROM - VBIOS = ff.ff.ff.ffff
647 07:08:30.682888 RTC Init
648 07:08:30.685708 Set power on after power failure.
649 07:08:30.685816 Disabling Deep S3
650 07:08:30.689546 Disabling Deep S3
651 07:08:30.689643 Disabling Deep S4
652 07:08:30.692306 Disabling Deep S4
653 07:08:30.692406 Disabling Deep S5
654 07:08:30.695920 Disabling Deep S5
655 07:08:30.702603 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
656 07:08:30.702705 Enumerating buses...
657 07:08:30.709054 Show all devs... Before device enumeration.
658 07:08:30.709155 Root Device: enabled 1
659 07:08:30.712347 CPU_CLUSTER: 0: enabled 1
660 07:08:30.715745 DOMAIN: 0000: enabled 1
661 07:08:30.719038 APIC: 00: enabled 1
662 07:08:30.719146 PCI: 00:00.0: enabled 1
663 07:08:30.722476 PCI: 00:02.0: enabled 1
664 07:08:30.725667 PCI: 00:04.0: enabled 0
665 07:08:30.729020 PCI: 00:05.0: enabled 0
666 07:08:30.729127 PCI: 00:12.0: enabled 1
667 07:08:30.732313 PCI: 00:12.5: enabled 0
668 07:08:30.735591 PCI: 00:12.6: enabled 0
669 07:08:30.735706 PCI: 00:14.0: enabled 1
670 07:08:30.739075 PCI: 00:14.1: enabled 0
671 07:08:30.742391 PCI: 00:14.3: enabled 1
672 07:08:30.745609 PCI: 00:14.5: enabled 0
673 07:08:30.745731 PCI: 00:15.0: enabled 1
674 07:08:30.748920 PCI: 00:15.1: enabled 1
675 07:08:30.752377 PCI: 00:15.2: enabled 0
676 07:08:30.755439 PCI: 00:15.3: enabled 0
677 07:08:30.755544 PCI: 00:16.0: enabled 1
678 07:08:30.758958 PCI: 00:16.1: enabled 0
679 07:08:30.762041 PCI: 00:16.2: enabled 0
680 07:08:30.765182 PCI: 00:16.3: enabled 0
681 07:08:30.765279 PCI: 00:16.4: enabled 0
682 07:08:30.768839 PCI: 00:16.5: enabled 0
683 07:08:30.771949 PCI: 00:17.0: enabled 1
684 07:08:30.775589 PCI: 00:19.0: enabled 1
685 07:08:30.775686 PCI: 00:19.1: enabled 0
686 07:08:30.778779 PCI: 00:19.2: enabled 0
687 07:08:30.781949 PCI: 00:1a.0: enabled 0
688 07:08:30.782046 PCI: 00:1c.0: enabled 0
689 07:08:30.784893 PCI: 00:1c.1: enabled 0
690 07:08:30.788559 PCI: 00:1c.2: enabled 0
691 07:08:30.791902 PCI: 00:1c.3: enabled 0
692 07:08:30.792003 PCI: 00:1c.4: enabled 0
693 07:08:30.795060 PCI: 00:1c.5: enabled 0
694 07:08:30.798882 PCI: 00:1c.6: enabled 0
695 07:08:30.802042 PCI: 00:1c.7: enabled 0
696 07:08:30.802218 PCI: 00:1d.0: enabled 1
697 07:08:30.804959 PCI: 00:1d.1: enabled 0
698 07:08:30.808710 PCI: 00:1d.2: enabled 0
699 07:08:30.811653 PCI: 00:1d.3: enabled 0
700 07:08:30.811834 PCI: 00:1d.4: enabled 0
701 07:08:30.815075 PCI: 00:1d.5: enabled 1
702 07:08:30.818495 PCI: 00:1e.0: enabled 1
703 07:08:30.818682 PCI: 00:1e.1: enabled 0
704 07:08:30.822063 PCI: 00:1e.2: enabled 1
705 07:08:30.825046 PCI: 00:1e.3: enabled 1
706 07:08:30.828429 PCI: 00:1f.0: enabled 1
707 07:08:30.828617 PCI: 00:1f.1: enabled 1
708 07:08:30.831871 PCI: 00:1f.2: enabled 1
709 07:08:30.835467 PCI: 00:1f.3: enabled 1
710 07:08:30.838114 PCI: 00:1f.4: enabled 1
711 07:08:30.838322 PCI: 00:1f.5: enabled 1
712 07:08:30.841645 PCI: 00:1f.6: enabled 0
713 07:08:30.845031 USB0 port 0: enabled 1
714 07:08:30.845304 I2C: 00:15: enabled 1
715 07:08:30.848369 I2C: 00:5d: enabled 1
716 07:08:30.851546 GENERIC: 0.0: enabled 1
717 07:08:30.854598 I2C: 00:1a: enabled 1
718 07:08:30.854888 I2C: 00:38: enabled 1
719 07:08:30.858024 I2C: 00:39: enabled 1
720 07:08:30.861998 I2C: 00:3a: enabled 1
721 07:08:30.862398 I2C: 00:3b: enabled 1
722 07:08:30.865158 PCI: 00:00.0: enabled 1
723 07:08:30.868373 SPI: 00: enabled 1
724 07:08:30.868818 SPI: 01: enabled 1
725 07:08:30.871539 PNP: 0c09.0: enabled 1
726 07:08:30.874479 USB2 port 0: enabled 1
727 07:08:30.874925 USB2 port 1: enabled 1
728 07:08:30.878248 USB2 port 2: enabled 0
729 07:08:30.881272 USB2 port 3: enabled 0
730 07:08:30.881716 USB2 port 5: enabled 0
731 07:08:30.884784 USB2 port 6: enabled 1
732 07:08:30.888154 USB2 port 9: enabled 1
733 07:08:30.891485 USB3 port 0: enabled 1
734 07:08:30.891930 USB3 port 1: enabled 1
735 07:08:30.894552 USB3 port 2: enabled 1
736 07:08:30.898170 USB3 port 3: enabled 1
737 07:08:30.898611 USB3 port 4: enabled 0
738 07:08:30.900955 APIC: 02: enabled 1
739 07:08:30.904530 APIC: 01: enabled 1
740 07:08:30.904768 APIC: 06: enabled 1
741 07:08:30.907431 APIC: 03: enabled 1
742 07:08:30.907670 APIC: 07: enabled 1
743 07:08:30.911011 APIC: 05: enabled 1
744 07:08:30.914128 APIC: 04: enabled 1
745 07:08:30.914319 Compare with tree...
746 07:08:30.917760 Root Device: enabled 1
747 07:08:30.920805 CPU_CLUSTER: 0: enabled 1
748 07:08:30.924218 APIC: 00: enabled 1
749 07:08:30.924360 APIC: 02: enabled 1
750 07:08:30.927379 APIC: 01: enabled 1
751 07:08:30.930651 APIC: 06: enabled 1
752 07:08:30.930761 APIC: 03: enabled 1
753 07:08:30.933842 APIC: 07: enabled 1
754 07:08:30.937136 APIC: 05: enabled 1
755 07:08:30.937235 APIC: 04: enabled 1
756 07:08:30.940914 DOMAIN: 0000: enabled 1
757 07:08:30.943662 PCI: 00:00.0: enabled 1
758 07:08:30.947044 PCI: 00:02.0: enabled 1
759 07:08:30.947150 PCI: 00:04.0: enabled 0
760 07:08:30.950378 PCI: 00:05.0: enabled 0
761 07:08:30.953816 PCI: 00:12.0: enabled 1
762 07:08:30.957074 PCI: 00:12.5: enabled 0
763 07:08:30.960523 PCI: 00:12.6: enabled 0
764 07:08:30.960620 PCI: 00:14.0: enabled 1
765 07:08:30.964069 USB0 port 0: enabled 1
766 07:08:30.966865 USB2 port 0: enabled 1
767 07:08:30.970151 USB2 port 1: enabled 1
768 07:08:30.973465 USB2 port 2: enabled 0
769 07:08:30.973572 USB2 port 3: enabled 0
770 07:08:30.976949 USB2 port 5: enabled 0
771 07:08:30.980576 USB2 port 6: enabled 1
772 07:08:30.983569 USB2 port 9: enabled 1
773 07:08:30.987252 USB3 port 0: enabled 1
774 07:08:30.990247 USB3 port 1: enabled 1
775 07:08:30.990349 USB3 port 2: enabled 1
776 07:08:30.993963 USB3 port 3: enabled 1
777 07:08:30.996947 USB3 port 4: enabled 0
778 07:08:30.999947 PCI: 00:14.1: enabled 0
779 07:08:31.003701 PCI: 00:14.3: enabled 1
780 07:08:31.003801 PCI: 00:14.5: enabled 0
781 07:08:31.006739 PCI: 00:15.0: enabled 1
782 07:08:31.010217 I2C: 00:15: enabled 1
783 07:08:31.013298 PCI: 00:15.1: enabled 1
784 07:08:31.016968 I2C: 00:5d: enabled 1
785 07:08:31.017065 GENERIC: 0.0: enabled 1
786 07:08:31.020016 PCI: 00:15.2: enabled 0
787 07:08:31.023695 PCI: 00:15.3: enabled 0
788 07:08:31.026956 PCI: 00:16.0: enabled 1
789 07:08:31.030427 PCI: 00:16.1: enabled 0
790 07:08:31.030546 PCI: 00:16.2: enabled 0
791 07:08:31.033161 PCI: 00:16.3: enabled 0
792 07:08:31.036453 PCI: 00:16.4: enabled 0
793 07:08:31.039725 PCI: 00:16.5: enabled 0
794 07:08:31.039815 PCI: 00:17.0: enabled 1
795 07:08:31.043224 PCI: 00:19.0: enabled 1
796 07:08:31.046386 I2C: 00:1a: enabled 1
797 07:08:31.050089 I2C: 00:38: enabled 1
798 07:08:31.053291 I2C: 00:39: enabled 1
799 07:08:31.053387 I2C: 00:3a: enabled 1
800 07:08:31.056780 I2C: 00:3b: enabled 1
801 07:08:31.060156 PCI: 00:19.1: enabled 0
802 07:08:31.063455 PCI: 00:19.2: enabled 0
803 07:08:31.063550 PCI: 00:1a.0: enabled 0
804 07:08:31.066840 PCI: 00:1c.0: enabled 0
805 07:08:31.070454 PCI: 00:1c.1: enabled 0
806 07:08:31.073442 PCI: 00:1c.2: enabled 0
807 07:08:31.076568 PCI: 00:1c.3: enabled 0
808 07:08:31.076775 PCI: 00:1c.4: enabled 0
809 07:08:31.079930 PCI: 00:1c.5: enabled 0
810 07:08:31.082976 PCI: 00:1c.6: enabled 0
811 07:08:31.086633 PCI: 00:1c.7: enabled 0
812 07:08:31.090445 PCI: 00:1d.0: enabled 1
813 07:08:31.090681 PCI: 00:1d.1: enabled 0
814 07:08:31.093153 PCI: 00:1d.2: enabled 0
815 07:08:31.096409 PCI: 00:1d.3: enabled 0
816 07:08:31.100174 PCI: 00:1d.4: enabled 0
817 07:08:31.103051 PCI: 00:1d.5: enabled 1
818 07:08:31.103336 PCI: 00:00.0: enabled 1
819 07:08:31.106974 PCI: 00:1e.0: enabled 1
820 07:08:31.110063 PCI: 00:1e.1: enabled 0
821 07:08:31.113088 PCI: 00:1e.2: enabled 1
822 07:08:31.113475 SPI: 00: enabled 1
823 07:08:31.116361 PCI: 00:1e.3: enabled 1
824 07:08:31.120282 SPI: 01: enabled 1
825 07:08:31.123546 PCI: 00:1f.0: enabled 1
826 07:08:31.126358 PNP: 0c09.0: enabled 1
827 07:08:31.126799 PCI: 00:1f.1: enabled 1
828 07:08:31.130535 PCI: 00:1f.2: enabled 1
829 07:08:31.133350 PCI: 00:1f.3: enabled 1
830 07:08:31.136361 PCI: 00:1f.4: enabled 1
831 07:08:31.136909 PCI: 00:1f.5: enabled 1
832 07:08:31.140035 PCI: 00:1f.6: enabled 0
833 07:08:31.143189 Root Device scanning...
834 07:08:31.146163 scan_static_bus for Root Device
835 07:08:31.149387 CPU_CLUSTER: 0 enabled
836 07:08:31.149829 DOMAIN: 0000 enabled
837 07:08:31.152846 DOMAIN: 0000 scanning...
838 07:08:31.156601 PCI: pci_scan_bus for bus 00
839 07:08:31.159618 PCI: 00:00.0 [8086/0000] ops
840 07:08:31.162790 PCI: 00:00.0 [8086/9b61] enabled
841 07:08:31.166094 PCI: 00:02.0 [8086/0000] bus ops
842 07:08:31.169604 PCI: 00:02.0 [8086/9b41] enabled
843 07:08:31.172341 PCI: 00:04.0 [8086/1903] disabled
844 07:08:31.175710 PCI: 00:08.0 [8086/1911] enabled
845 07:08:31.179000 PCI: 00:12.0 [8086/02f9] enabled
846 07:08:31.182310 PCI: 00:14.0 [8086/0000] bus ops
847 07:08:31.185735 PCI: 00:14.0 [8086/02ed] enabled
848 07:08:31.188934 PCI: 00:14.2 [8086/02ef] enabled
849 07:08:31.192148 PCI: 00:14.3 [8086/02f0] enabled
850 07:08:31.195624 PCI: 00:15.0 [8086/0000] bus ops
851 07:08:31.198710 PCI: 00:15.0 [8086/02e8] enabled
852 07:08:31.202416 PCI: 00:15.1 [8086/0000] bus ops
853 07:08:31.205448 PCI: 00:15.1 [8086/02e9] enabled
854 07:08:31.208916 PCI: 00:16.0 [8086/0000] ops
855 07:08:31.212193 PCI: 00:16.0 [8086/02e0] enabled
856 07:08:31.215958 PCI: 00:17.0 [8086/0000] ops
857 07:08:31.219362 PCI: 00:17.0 [8086/02d3] enabled
858 07:08:31.222317 PCI: 00:19.0 [8086/0000] bus ops
859 07:08:31.226098 PCI: 00:19.0 [8086/02c5] enabled
860 07:08:31.229281 PCI: 00:1d.0 [8086/0000] bus ops
861 07:08:31.232123 PCI: 00:1d.0 [8086/02b0] enabled
862 07:08:31.239678 PCI: Static device PCI: 00:1d.5 not found, disabling it.
863 07:08:31.242693 PCI: 00:1e.0 [8086/0000] ops
864 07:08:31.246190 PCI: 00:1e.0 [8086/02a8] enabled
865 07:08:31.249176 PCI: 00:1e.2 [8086/0000] bus ops
866 07:08:31.252448 PCI: 00:1e.2 [8086/02aa] enabled
867 07:08:31.255628 PCI: 00:1e.3 [8086/0000] bus ops
868 07:08:31.259206 PCI: 00:1e.3 [8086/02ab] enabled
869 07:08:31.261977 PCI: 00:1f.0 [8086/0000] bus ops
870 07:08:31.265943 PCI: 00:1f.0 [8086/0284] enabled
871 07:08:31.269744 PCI: Static device PCI: 00:1f.1 not found, disabling it.
872 07:08:31.276109 PCI: Static device PCI: 00:1f.2 not found, disabling it.
873 07:08:31.279299 PCI: 00:1f.3 [8086/0000] bus ops
874 07:08:31.282654 PCI: 00:1f.3 [8086/02c8] enabled
875 07:08:31.285418 PCI: 00:1f.4 [8086/0000] bus ops
876 07:08:31.288877 PCI: 00:1f.4 [8086/02a3] enabled
877 07:08:31.292159 PCI: 00:1f.5 [8086/0000] bus ops
878 07:08:31.295565 PCI: 00:1f.5 [8086/02a4] enabled
879 07:08:31.298875 PCI: Leftover static devices:
880 07:08:31.299360 PCI: 00:05.0
881 07:08:31.302285 PCI: 00:12.5
882 07:08:31.302821 PCI: 00:12.6
883 07:08:31.303215 PCI: 00:14.1
884 07:08:31.305634 PCI: 00:14.5
885 07:08:31.306176 PCI: 00:15.2
886 07:08:31.309286 PCI: 00:15.3
887 07:08:31.309823 PCI: 00:16.1
888 07:08:31.312160 PCI: 00:16.2
889 07:08:31.312592 PCI: 00:16.3
890 07:08:31.312936 PCI: 00:16.4
891 07:08:31.315308 PCI: 00:16.5
892 07:08:31.315742 PCI: 00:19.1
893 07:08:31.319184 PCI: 00:19.2
894 07:08:31.319726 PCI: 00:1a.0
895 07:08:31.320072 PCI: 00:1c.0
896 07:08:31.321999 PCI: 00:1c.1
897 07:08:31.322432 PCI: 00:1c.2
898 07:08:31.325473 PCI: 00:1c.3
899 07:08:31.325909 PCI: 00:1c.4
900 07:08:31.326257 PCI: 00:1c.5
901 07:08:31.328621 PCI: 00:1c.6
902 07:08:31.329060 PCI: 00:1c.7
903 07:08:31.332270 PCI: 00:1d.1
904 07:08:31.332706 PCI: 00:1d.2
905 07:08:31.335252 PCI: 00:1d.3
906 07:08:31.335689 PCI: 00:1d.4
907 07:08:31.336035 PCI: 00:1d.5
908 07:08:31.339282 PCI: 00:1e.1
909 07:08:31.339823 PCI: 00:1f.1
910 07:08:31.342107 PCI: 00:1f.2
911 07:08:31.342651 PCI: 00:1f.6
912 07:08:31.345813 PCI: Check your devicetree.cb.
913 07:08:31.348508 PCI: 00:02.0 scanning...
914 07:08:31.352219 scan_generic_bus for PCI: 00:02.0
915 07:08:31.355120 scan_generic_bus for PCI: 00:02.0 done
916 07:08:31.362229 scan_bus: scanning of bus PCI: 00:02.0 took 10180 usecs
917 07:08:31.362790 PCI: 00:14.0 scanning...
918 07:08:31.365320 scan_static_bus for PCI: 00:14.0
919 07:08:31.368736 USB0 port 0 enabled
920 07:08:31.372061 USB0 port 0 scanning...
921 07:08:31.375200 scan_static_bus for USB0 port 0
922 07:08:31.378366 USB2 port 0 enabled
923 07:08:31.378802 USB2 port 1 enabled
924 07:08:31.381838 USB2 port 2 disabled
925 07:08:31.382409 USB2 port 3 disabled
926 07:08:31.385132 USB2 port 5 disabled
927 07:08:31.388503 USB2 port 6 enabled
928 07:08:31.389014 USB2 port 9 enabled
929 07:08:31.391813 USB3 port 0 enabled
930 07:08:31.395159 USB3 port 1 enabled
931 07:08:31.395597 USB3 port 2 enabled
932 07:08:31.398393 USB3 port 3 enabled
933 07:08:31.398838 USB3 port 4 disabled
934 07:08:31.401803 USB2 port 0 scanning...
935 07:08:31.404948 scan_static_bus for USB2 port 0
936 07:08:31.408338 scan_static_bus for USB2 port 0 done
937 07:08:31.414742 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
938 07:08:31.418713 USB2 port 1 scanning...
939 07:08:31.421424 scan_static_bus for USB2 port 1
940 07:08:31.425117 scan_static_bus for USB2 port 1 done
941 07:08:31.428262 scan_bus: scanning of bus USB2 port 1 took 9693 usecs
942 07:08:31.431984 USB2 port 6 scanning...
943 07:08:31.434899 scan_static_bus for USB2 port 6
944 07:08:31.438502 scan_static_bus for USB2 port 6 done
945 07:08:31.445305 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
946 07:08:31.448209 USB2 port 9 scanning...
947 07:08:31.451997 scan_static_bus for USB2 port 9
948 07:08:31.455051 scan_static_bus for USB2 port 9 done
949 07:08:31.458791 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
950 07:08:31.461434 USB3 port 0 scanning...
951 07:08:31.465317 scan_static_bus for USB3 port 0
952 07:08:31.467983 scan_static_bus for USB3 port 0 done
953 07:08:31.474862 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
954 07:08:31.478313 USB3 port 1 scanning...
955 07:08:31.481211 scan_static_bus for USB3 port 1
956 07:08:31.484419 scan_static_bus for USB3 port 1 done
957 07:08:31.491278 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
958 07:08:31.491726 USB3 port 2 scanning...
959 07:08:31.494610 scan_static_bus for USB3 port 2
960 07:08:31.497962 scan_static_bus for USB3 port 2 done
961 07:08:31.504638 scan_bus: scanning of bus USB3 port 2 took 9693 usecs
962 07:08:31.508220 USB3 port 3 scanning...
963 07:08:31.511220 scan_static_bus for USB3 port 3
964 07:08:31.514438 scan_static_bus for USB3 port 3 done
965 07:08:31.520914 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
966 07:08:31.524361 scan_static_bus for USB0 port 0 done
967 07:08:31.528051 scan_bus: scanning of bus USB0 port 0 took 155313 usecs
968 07:08:31.534688 scan_static_bus for PCI: 00:14.0 done
969 07:08:31.537916 scan_bus: scanning of bus PCI: 00:14.0 took 172904 usecs
970 07:08:31.541645 PCI: 00:15.0 scanning...
971 07:08:31.544628 scan_generic_bus for PCI: 00:15.0
972 07:08:31.547804 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
973 07:08:31.554672 scan_generic_bus for PCI: 00:15.0 done
974 07:08:31.557834 scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs
975 07:08:31.561417 PCI: 00:15.1 scanning...
976 07:08:31.564131 scan_generic_bus for PCI: 00:15.1
977 07:08:31.567858 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
978 07:08:31.574300 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
979 07:08:31.577163 scan_generic_bus for PCI: 00:15.1 done
980 07:08:31.581161 scan_bus: scanning of bus PCI: 00:15.1 took 18633 usecs
981 07:08:31.584043 PCI: 00:19.0 scanning...
982 07:08:31.588071 scan_generic_bus for PCI: 00:19.0
983 07:08:31.593611 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
984 07:08:31.597270 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
985 07:08:31.600485 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
986 07:08:31.604088 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
987 07:08:31.607519 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
988 07:08:31.613591 scan_generic_bus for PCI: 00:19.0 done
989 07:08:31.616950 scan_bus: scanning of bus PCI: 00:19.0 took 30725 usecs
990 07:08:31.620324 PCI: 00:1d.0 scanning...
991 07:08:31.624045 do_pci_scan_bridge for PCI: 00:1d.0
992 07:08:31.627213 PCI: pci_scan_bus for bus 01
993 07:08:31.630603 PCI: 01:00.0 [1c5c/1327] enabled
994 07:08:31.634145 Enabling Common Clock Configuration
995 07:08:31.640670 L1 Sub-State supported from root port 29
996 07:08:31.641191 L1 Sub-State Support = 0xf
997 07:08:31.643707 CommonModeRestoreTime = 0x28
998 07:08:31.650460 Power On Value = 0x16, Power On Scale = 0x0
999 07:08:31.650992 ASPM: Enabled L1
1000 07:08:31.657390 scan_bus: scanning of bus PCI: 00:1d.0 took 32761 usecs
1001 07:08:31.660651 PCI: 00:1e.2 scanning...
1002 07:08:31.663527 scan_generic_bus for PCI: 00:1e.2
1003 07:08:31.666979 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1004 07:08:31.670265 scan_generic_bus for PCI: 00:1e.2 done
1005 07:08:31.677659 scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs
1006 07:08:31.678208 PCI: 00:1e.3 scanning...
1007 07:08:31.684050 scan_generic_bus for PCI: 00:1e.3
1008 07:08:31.687454 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1009 07:08:31.690540 scan_generic_bus for PCI: 00:1e.3 done
1010 07:08:31.693820 scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
1011 07:08:31.697327 PCI: 00:1f.0 scanning...
1012 07:08:31.700396 scan_static_bus for PCI: 00:1f.0
1013 07:08:31.703740 PNP: 0c09.0 enabled
1014 07:08:31.707258 scan_static_bus for PCI: 00:1f.0 done
1015 07:08:31.713471 scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs
1016 07:08:31.717077 PCI: 00:1f.3 scanning...
1017 07:08:31.720323 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1018 07:08:31.723591 PCI: 00:1f.4 scanning...
1019 07:08:31.726706 scan_generic_bus for PCI: 00:1f.4
1020 07:08:31.729892 scan_generic_bus for PCI: 00:1f.4 done
1021 07:08:31.736819 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1022 07:08:31.740082 PCI: 00:1f.5 scanning...
1023 07:08:31.743990 scan_generic_bus for PCI: 00:1f.5
1024 07:08:31.746967 scan_generic_bus for PCI: 00:1f.5 done
1025 07:08:31.753999 scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
1026 07:08:31.756973 scan_bus: scanning of bus DOMAIN: 0000 took 604739 usecs
1027 07:08:31.763631 scan_static_bus for Root Device done
1028 07:08:31.766967 scan_bus: scanning of bus Root Device took 624606 usecs
1029 07:08:31.769726 done
1030 07:08:31.770262 Chrome EC: UHEPI supported
1031 07:08:31.776798 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1032 07:08:31.783265 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1033 07:08:31.789660 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1034 07:08:31.796413 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1035 07:08:31.799587 SPI flash protection: WPSW=0 SRP0=0
1036 07:08:31.806438 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1037 07:08:31.809470 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1038 07:08:31.813361 found VGA at PCI: 00:02.0
1039 07:08:31.816629 Setting up VGA for PCI: 00:02.0
1040 07:08:31.822722 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1041 07:08:31.826063 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1042 07:08:31.829473 Allocating resources...
1043 07:08:31.829921 Reading resources...
1044 07:08:31.836502 Root Device read_resources bus 0 link: 0
1045 07:08:31.839534 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1046 07:08:31.846394 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1047 07:08:31.849424 DOMAIN: 0000 read_resources bus 0 link: 0
1048 07:08:31.856377 PCI: 00:14.0 read_resources bus 0 link: 0
1049 07:08:31.859591 USB0 port 0 read_resources bus 0 link: 0
1050 07:08:31.867728 USB0 port 0 read_resources bus 0 link: 0 done
1051 07:08:31.870763 PCI: 00:14.0 read_resources bus 0 link: 0 done
1052 07:08:31.878153 PCI: 00:15.0 read_resources bus 1 link: 0
1053 07:08:31.881822 PCI: 00:15.0 read_resources bus 1 link: 0 done
1054 07:08:31.888343 PCI: 00:15.1 read_resources bus 2 link: 0
1055 07:08:31.891188 PCI: 00:15.1 read_resources bus 2 link: 0 done
1056 07:08:31.898574 PCI: 00:19.0 read_resources bus 3 link: 0
1057 07:08:31.905746 PCI: 00:19.0 read_resources bus 3 link: 0 done
1058 07:08:31.908560 PCI: 00:1d.0 read_resources bus 1 link: 0
1059 07:08:31.915261 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1060 07:08:31.918569 PCI: 00:1e.2 read_resources bus 4 link: 0
1061 07:08:31.924817 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1062 07:08:31.928322 PCI: 00:1e.3 read_resources bus 5 link: 0
1063 07:08:31.935157 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1064 07:08:31.938554 PCI: 00:1f.0 read_resources bus 0 link: 0
1065 07:08:31.945305 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1066 07:08:31.951742 DOMAIN: 0000 read_resources bus 0 link: 0 done
1067 07:08:31.954985 Root Device read_resources bus 0 link: 0 done
1068 07:08:31.957810 Done reading resources.
1069 07:08:31.964559 Show resources in subtree (Root Device)...After reading.
1070 07:08:31.968490 Root Device child on link 0 CPU_CLUSTER: 0
1071 07:08:31.971581 CPU_CLUSTER: 0 child on link 0 APIC: 00
1072 07:08:31.974959 APIC: 00
1073 07:08:31.975456 APIC: 02
1074 07:08:31.975807 APIC: 01
1075 07:08:31.978332 APIC: 06
1076 07:08:31.978889 APIC: 03
1077 07:08:31.979355 APIC: 07
1078 07:08:31.981102 APIC: 05
1079 07:08:31.981541 APIC: 04
1080 07:08:31.988411 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1081 07:08:31.995174 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1082 07:08:32.047614 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1083 07:08:32.048169 PCI: 00:00.0
1084 07:08:32.048876 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1085 07:08:32.049242 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1086 07:08:32.049578 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1087 07:08:32.050221 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1088 07:08:32.076353 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1089 07:08:32.077266 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1090 07:08:32.077670 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1091 07:08:32.083606 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1092 07:08:32.090815 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1093 07:08:32.100617 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1094 07:08:32.110651 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1095 07:08:32.119989 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1096 07:08:32.130481 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1097 07:08:32.139958 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1098 07:08:32.146540 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1099 07:08:32.156608 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1100 07:08:32.159896 PCI: 00:02.0
1101 07:08:32.169485 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1102 07:08:32.179643 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1103 07:08:32.186477 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1104 07:08:32.189196 PCI: 00:04.0
1105 07:08:32.189643 PCI: 00:08.0
1106 07:08:32.199197 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1107 07:08:32.202597 PCI: 00:12.0
1108 07:08:32.212669 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1109 07:08:32.215698 PCI: 00:14.0 child on link 0 USB0 port 0
1110 07:08:32.225991 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1111 07:08:32.232019 USB0 port 0 child on link 0 USB2 port 0
1112 07:08:32.232550 USB2 port 0
1113 07:08:32.235603 USB2 port 1
1114 07:08:32.236043 USB2 port 2
1115 07:08:32.239006 USB2 port 3
1116 07:08:32.239595 USB2 port 5
1117 07:08:32.242455 USB2 port 6
1118 07:08:32.242995 USB2 port 9
1119 07:08:32.246239 USB3 port 0
1120 07:08:32.246856 USB3 port 1
1121 07:08:32.248837 USB3 port 2
1122 07:08:32.249385 USB3 port 3
1123 07:08:32.252216 USB3 port 4
1124 07:08:32.252766 PCI: 00:14.2
1125 07:08:32.261943 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1126 07:08:32.272163 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1127 07:08:32.275246 PCI: 00:14.3
1128 07:08:32.285457 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1129 07:08:32.289107 PCI: 00:15.0 child on link 0 I2C: 01:15
1130 07:08:32.298587 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 07:08:32.301885 I2C: 01:15
1132 07:08:32.305210 PCI: 00:15.1 child on link 0 I2C: 02:5d
1133 07:08:32.315262 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 07:08:32.318724 I2C: 02:5d
1135 07:08:32.319323 GENERIC: 0.0
1136 07:08:32.321599 PCI: 00:16.0
1137 07:08:32.331782 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 07:08:32.332347 PCI: 00:17.0
1139 07:08:32.341483 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1140 07:08:32.351634 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1141 07:08:32.358094 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1142 07:08:32.367810 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1143 07:08:32.374394 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1144 07:08:32.384685 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1145 07:08:32.387545 PCI: 00:19.0 child on link 0 I2C: 03:1a
1146 07:08:32.398129 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 07:08:32.401150 I2C: 03:1a
1148 07:08:32.401688 I2C: 03:38
1149 07:08:32.402037 I2C: 03:39
1150 07:08:32.404556 I2C: 03:3a
1151 07:08:32.404993 I2C: 03:3b
1152 07:08:32.411368 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1153 07:08:32.417317 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1154 07:08:32.427862 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1155 07:08:32.437489 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1156 07:08:32.441215 PCI: 01:00.0
1157 07:08:32.450719 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1158 07:08:32.451298 PCI: 00:1e.0
1159 07:08:32.460797 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1160 07:08:32.470730 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1161 07:08:32.477161 PCI: 00:1e.2 child on link 0 SPI: 00
1162 07:08:32.487012 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 07:08:32.487617 SPI: 00
1164 07:08:32.490167 PCI: 00:1e.3 child on link 0 SPI: 01
1165 07:08:32.500385 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 07:08:32.503354 SPI: 01
1167 07:08:32.506860 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1168 07:08:32.516895 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1169 07:08:32.523747 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1170 07:08:32.526727 PNP: 0c09.0
1171 07:08:32.533388 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1172 07:08:32.536407 PCI: 00:1f.3
1173 07:08:32.546765 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 07:08:32.556695 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1175 07:08:32.557285 PCI: 00:1f.4
1176 07:08:32.566710 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1177 07:08:32.576425 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1178 07:08:32.579568 PCI: 00:1f.5
1179 07:08:32.585870 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1180 07:08:32.593346 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1181 07:08:32.599886 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1182 07:08:32.606386 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1183 07:08:32.610013 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1184 07:08:32.612957 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1185 07:08:32.619355 PCI: 00:17.0 18 * [0x60 - 0x67] io
1186 07:08:32.622739 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1187 07:08:32.629547 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1188 07:08:32.636377 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1189 07:08:32.642432 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1190 07:08:32.653003 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1191 07:08:32.659063 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1192 07:08:32.662403 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1193 07:08:32.669288 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1194 07:08:32.675711 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1195 07:08:32.679205 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1196 07:08:32.685359 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1197 07:08:32.688541 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1198 07:08:32.695365 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1199 07:08:32.698778 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1200 07:08:32.702500 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1201 07:08:32.708410 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1202 07:08:32.711805 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1203 07:08:32.718771 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1204 07:08:32.722062 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1205 07:08:32.728602 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1206 07:08:32.731625 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1207 07:08:32.738515 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1208 07:08:32.742157 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1209 07:08:32.748697 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1210 07:08:32.751763 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1211 07:08:32.758236 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1212 07:08:32.761566 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1213 07:08:32.768402 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1214 07:08:32.771818 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1215 07:08:32.778584 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1216 07:08:32.781247 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1217 07:08:32.791674 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1218 07:08:32.794766 avoid_fixed_resources: DOMAIN: 0000
1219 07:08:32.798140 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1220 07:08:32.804437 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1221 07:08:32.814788 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1222 07:08:32.820954 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1223 07:08:32.827760 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1224 07:08:32.837579 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1225 07:08:32.843952 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1226 07:08:32.850880 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1227 07:08:32.857389 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1228 07:08:32.867492 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1229 07:08:32.874430 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1230 07:08:32.880312 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1231 07:08:32.883794 Setting resources...
1232 07:08:32.890577 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1233 07:08:32.893847 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1234 07:08:32.897099 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1235 07:08:32.900174 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1236 07:08:32.907141 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1237 07:08:32.910690 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1238 07:08:32.916983 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1239 07:08:32.923351 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1240 07:08:32.933724 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1241 07:08:32.936481 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1242 07:08:32.943464 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1243 07:08:32.946566 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1244 07:08:32.953432 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1245 07:08:32.957062 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1246 07:08:32.960210 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1247 07:08:32.966652 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1248 07:08:32.969764 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1249 07:08:32.976906 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1250 07:08:32.979841 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1251 07:08:32.986901 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1252 07:08:32.989794 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1253 07:08:32.996209 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1254 07:08:32.999731 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1255 07:08:33.006266 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1256 07:08:33.009591 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1257 07:08:33.016314 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1258 07:08:33.019585 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1259 07:08:33.026119 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1260 07:08:33.029104 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1261 07:08:33.032398 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1262 07:08:33.039327 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1263 07:08:33.043006 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1264 07:08:33.052425 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1265 07:08:33.058896 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1266 07:08:33.065586 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1267 07:08:33.072301 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1268 07:08:33.079057 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1269 07:08:33.085967 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1270 07:08:33.089016 Root Device assign_resources, bus 0 link: 0
1271 07:08:33.096000 DOMAIN: 0000 assign_resources, bus 0 link: 0
1272 07:08:33.102607 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1273 07:08:33.112066 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1274 07:08:33.118669 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1275 07:08:33.128880 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1276 07:08:33.135270 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1277 07:08:33.144917 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1278 07:08:33.148468 PCI: 00:14.0 assign_resources, bus 0 link: 0
1279 07:08:33.155586 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 07:08:33.161885 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1281 07:08:33.172126 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1282 07:08:33.178935 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1283 07:08:33.188307 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1284 07:08:33.191787 PCI: 00:15.0 assign_resources, bus 1 link: 0
1285 07:08:33.194605 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 07:08:33.205294 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1287 07:08:33.208210 PCI: 00:15.1 assign_resources, bus 2 link: 0
1288 07:08:33.214539 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 07:08:33.222393 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1290 07:08:33.231284 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1291 07:08:33.238137 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1292 07:08:33.244289 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1293 07:08:33.254451 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1294 07:08:33.261139 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1295 07:08:33.267537 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1296 07:08:33.277962 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1297 07:08:33.280698 PCI: 00:19.0 assign_resources, bus 3 link: 0
1298 07:08:33.287387 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 07:08:33.294192 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1300 07:08:33.304240 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1301 07:08:33.311264 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1302 07:08:33.317418 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1303 07:08:33.323855 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1304 07:08:33.330206 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1305 07:08:33.336895 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1306 07:08:33.346883 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1307 07:08:33.350300 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1308 07:08:33.356551 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 07:08:33.363204 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1310 07:08:33.366579 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1311 07:08:33.373574 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 07:08:33.376390 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1313 07:08:33.383017 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 07:08:33.386518 LPC: Trying to open IO window from 800 size 1ff
1315 07:08:33.396581 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1316 07:08:33.403577 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1317 07:08:33.413503 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1318 07:08:33.419938 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1319 07:08:33.426447 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 07:08:33.429544 Root Device assign_resources, bus 0 link: 0
1321 07:08:33.432547 Done setting resources.
1322 07:08:33.439642 Show resources in subtree (Root Device)...After assigning values.
1323 07:08:33.442637 Root Device child on link 0 CPU_CLUSTER: 0
1324 07:08:33.445961 CPU_CLUSTER: 0 child on link 0 APIC: 00
1325 07:08:33.449460 APIC: 00
1326 07:08:33.449992 APIC: 02
1327 07:08:33.450332 APIC: 01
1328 07:08:33.452758 APIC: 06
1329 07:08:33.453185 APIC: 03
1330 07:08:33.456190 APIC: 07
1331 07:08:33.456618 APIC: 05
1332 07:08:33.456950 APIC: 04
1333 07:08:33.462797 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1334 07:08:33.472858 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1335 07:08:33.482713 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1336 07:08:33.486177 PCI: 00:00.0
1337 07:08:33.492542 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1338 07:08:33.502185 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1339 07:08:33.512286 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1340 07:08:33.522340 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1341 07:08:33.531695 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1342 07:08:33.542299 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1343 07:08:33.548657 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1344 07:08:33.558179 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1345 07:08:33.567721 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1346 07:08:33.578274 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1347 07:08:33.587850 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1348 07:08:33.597945 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1349 07:08:33.604370 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1350 07:08:33.614625 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1351 07:08:33.624482 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1352 07:08:33.634715 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1353 07:08:33.637534 PCI: 00:02.0
1354 07:08:33.647700 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1355 07:08:33.657648 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1356 07:08:33.666964 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1357 07:08:33.667534 PCI: 00:04.0
1358 07:08:33.670203 PCI: 00:08.0
1359 07:08:33.680018 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1360 07:08:33.680552 PCI: 00:12.0
1361 07:08:33.690286 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1362 07:08:33.696816 PCI: 00:14.0 child on link 0 USB0 port 0
1363 07:08:33.706864 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1364 07:08:33.710079 USB0 port 0 child on link 0 USB2 port 0
1365 07:08:33.713371 USB2 port 0
1366 07:08:33.713815 USB2 port 1
1367 07:08:33.716750 USB2 port 2
1368 07:08:33.717191 USB2 port 3
1369 07:08:33.719831 USB2 port 5
1370 07:08:33.720271 USB2 port 6
1371 07:08:33.723233 USB2 port 9
1372 07:08:33.726973 USB3 port 0
1373 07:08:33.727587 USB3 port 1
1374 07:08:33.729659 USB3 port 2
1375 07:08:33.730107 USB3 port 3
1376 07:08:33.733272 USB3 port 4
1377 07:08:33.733749 PCI: 00:14.2
1378 07:08:33.743375 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1379 07:08:33.753289 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1380 07:08:33.756443 PCI: 00:14.3
1381 07:08:33.766234 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1382 07:08:33.769520 PCI: 00:15.0 child on link 0 I2C: 01:15
1383 07:08:33.779417 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1384 07:08:33.782976 I2C: 01:15
1385 07:08:33.786126 PCI: 00:15.1 child on link 0 I2C: 02:5d
1386 07:08:33.795814 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1387 07:08:33.799592 I2C: 02:5d
1388 07:08:33.800210 GENERIC: 0.0
1389 07:08:33.802551 PCI: 00:16.0
1390 07:08:33.812606 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1391 07:08:33.813060 PCI: 00:17.0
1392 07:08:33.825855 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1393 07:08:33.836069 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1394 07:08:33.842286 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1395 07:08:33.852270 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1396 07:08:33.861990 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1397 07:08:33.871964 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1398 07:08:33.875298 PCI: 00:19.0 child on link 0 I2C: 03:1a
1399 07:08:33.885258 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1400 07:08:33.888581 I2C: 03:1a
1401 07:08:33.889125 I2C: 03:38
1402 07:08:33.892053 I2C: 03:39
1403 07:08:33.892606 I2C: 03:3a
1404 07:08:33.895418 I2C: 03:3b
1405 07:08:33.898206 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1406 07:08:33.908741 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1407 07:08:33.918371 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1408 07:08:33.928399 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1409 07:08:33.931513 PCI: 01:00.0
1410 07:08:33.941516 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1411 07:08:33.942093 PCI: 00:1e.0
1412 07:08:33.954696 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1413 07:08:33.964798 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1414 07:08:33.968151 PCI: 00:1e.2 child on link 0 SPI: 00
1415 07:08:33.978072 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1416 07:08:33.978633 SPI: 00
1417 07:08:33.984152 PCI: 00:1e.3 child on link 0 SPI: 01
1418 07:08:33.994642 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1419 07:08:33.995254 SPI: 01
1420 07:08:33.997539 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1421 07:08:34.007238 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1422 07:08:34.017348 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1423 07:08:34.017799 PNP: 0c09.0
1424 07:08:34.027506 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1425 07:08:34.028047 PCI: 00:1f.3
1426 07:08:34.040571 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1427 07:08:34.050494 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1428 07:08:34.051041 PCI: 00:1f.4
1429 07:08:34.060568 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1430 07:08:34.070430 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1431 07:08:34.073658 PCI: 00:1f.5
1432 07:08:34.083259 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1433 07:08:34.086766 Done allocating resources.
1434 07:08:34.089970 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1435 07:08:34.093159 Enabling resources...
1436 07:08:34.096460 PCI: 00:00.0 subsystem <- 8086/9b61
1437 07:08:34.099836 PCI: 00:00.0 cmd <- 06
1438 07:08:34.103544 PCI: 00:02.0 subsystem <- 8086/9b41
1439 07:08:34.106254 PCI: 00:02.0 cmd <- 03
1440 07:08:34.109484 PCI: 00:08.0 cmd <- 06
1441 07:08:34.112950 PCI: 00:12.0 subsystem <- 8086/02f9
1442 07:08:34.116429 PCI: 00:12.0 cmd <- 02
1443 07:08:34.119368 PCI: 00:14.0 subsystem <- 8086/02ed
1444 07:08:34.122620 PCI: 00:14.0 cmd <- 02
1445 07:08:34.123056 PCI: 00:14.2 cmd <- 02
1446 07:08:34.129462 PCI: 00:14.3 subsystem <- 8086/02f0
1447 07:08:34.130011 PCI: 00:14.3 cmd <- 02
1448 07:08:34.132485 PCI: 00:15.0 subsystem <- 8086/02e8
1449 07:08:34.136150 PCI: 00:15.0 cmd <- 02
1450 07:08:34.139197 PCI: 00:15.1 subsystem <- 8086/02e9
1451 07:08:34.143299 PCI: 00:15.1 cmd <- 02
1452 07:08:34.146398 PCI: 00:16.0 subsystem <- 8086/02e0
1453 07:08:34.149998 PCI: 00:16.0 cmd <- 02
1454 07:08:34.152853 PCI: 00:17.0 subsystem <- 8086/02d3
1455 07:08:34.156435 PCI: 00:17.0 cmd <- 03
1456 07:08:34.159687 PCI: 00:19.0 subsystem <- 8086/02c5
1457 07:08:34.162661 PCI: 00:19.0 cmd <- 02
1458 07:08:34.166366 PCI: 00:1d.0 bridge ctrl <- 0013
1459 07:08:34.169253 PCI: 00:1d.0 subsystem <- 8086/02b0
1460 07:08:34.172308 PCI: 00:1d.0 cmd <- 06
1461 07:08:34.175984 PCI: 00:1e.0 subsystem <- 8086/02a8
1462 07:08:34.178757 PCI: 00:1e.0 cmd <- 06
1463 07:08:34.182221 PCI: 00:1e.2 subsystem <- 8086/02aa
1464 07:08:34.182659 PCI: 00:1e.2 cmd <- 06
1465 07:08:34.189014 PCI: 00:1e.3 subsystem <- 8086/02ab
1466 07:08:34.189452 PCI: 00:1e.3 cmd <- 02
1467 07:08:34.192282 PCI: 00:1f.0 subsystem <- 8086/0284
1468 07:08:34.195829 PCI: 00:1f.0 cmd <- 407
1469 07:08:34.199163 PCI: 00:1f.3 subsystem <- 8086/02c8
1470 07:08:34.202598 PCI: 00:1f.3 cmd <- 02
1471 07:08:34.205391 PCI: 00:1f.4 subsystem <- 8086/02a3
1472 07:08:34.208670 PCI: 00:1f.4 cmd <- 03
1473 07:08:34.211971 PCI: 00:1f.5 subsystem <- 8086/02a4
1474 07:08:34.215135 PCI: 00:1f.5 cmd <- 406
1475 07:08:34.224146 PCI: 01:00.0 cmd <- 02
1476 07:08:34.229665 done.
1477 07:08:34.243041 ME: Version: 14.0.39.1367
1478 07:08:34.248661 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1479 07:08:34.252804 Initializing devices...
1480 07:08:34.253349 Root Device init ...
1481 07:08:34.258894 Chrome EC: Set SMI mask to 0x0000000000000000
1482 07:08:34.262579 Chrome EC: clear events_b mask to 0x0000000000000000
1483 07:08:34.268483 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1484 07:08:34.275454 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1485 07:08:34.282418 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1486 07:08:34.285243 Chrome EC: Set WAKE mask to 0x0000000000000000
1487 07:08:34.288629 Root Device init finished in 35182 usecs
1488 07:08:34.292450 CPU_CLUSTER: 0 init ...
1489 07:08:34.298464 CPU_CLUSTER: 0 init finished in 2447 usecs
1490 07:08:34.302939 PCI: 00:00.0 init ...
1491 07:08:34.306183 CPU TDP: 15 Watts
1492 07:08:34.309412 CPU PL2 = 64 Watts
1493 07:08:34.312691 PCI: 00:00.0 init finished in 7073 usecs
1494 07:08:34.316117 PCI: 00:02.0 init ...
1495 07:08:34.319626 PCI: 00:02.0 init finished in 2254 usecs
1496 07:08:34.322698 PCI: 00:08.0 init ...
1497 07:08:34.326120 PCI: 00:08.0 init finished in 2254 usecs
1498 07:08:34.329516 PCI: 00:12.0 init ...
1499 07:08:34.332981 PCI: 00:12.0 init finished in 2253 usecs
1500 07:08:34.336335 PCI: 00:14.0 init ...
1501 07:08:34.339622 PCI: 00:14.0 init finished in 2252 usecs
1502 07:08:34.342470 PCI: 00:14.2 init ...
1503 07:08:34.345719 PCI: 00:14.2 init finished in 2252 usecs
1504 07:08:34.349173 PCI: 00:14.3 init ...
1505 07:08:34.352781 PCI: 00:14.3 init finished in 2272 usecs
1506 07:08:34.355797 PCI: 00:15.0 init ...
1507 07:08:34.359055 DW I2C bus 0 at 0xd121f000 (400 KHz)
1508 07:08:34.362049 PCI: 00:15.0 init finished in 5976 usecs
1509 07:08:34.365632 PCI: 00:15.1 init ...
1510 07:08:34.369259 DW I2C bus 1 at 0xd1220000 (400 KHz)
1511 07:08:34.375797 PCI: 00:15.1 init finished in 5977 usecs
1512 07:08:34.376359 PCI: 00:16.0 init ...
1513 07:08:34.382647 PCI: 00:16.0 init finished in 2242 usecs
1514 07:08:34.385761 PCI: 00:19.0 init ...
1515 07:08:34.388935 DW I2C bus 4 at 0xd1222000 (400 KHz)
1516 07:08:34.392476 PCI: 00:19.0 init finished in 5976 usecs
1517 07:08:34.395723 PCI: 00:1d.0 init ...
1518 07:08:34.399296 Initializing PCH PCIe bridge.
1519 07:08:34.402271 PCI: 00:1d.0 init finished in 5286 usecs
1520 07:08:34.405134 PCI: 00:1f.0 init ...
1521 07:08:34.408537 IOAPIC: Initializing IOAPIC at 0xfec00000
1522 07:08:34.414958 IOAPIC: Bootstrap Processor Local APIC = 0x00
1523 07:08:34.415502 IOAPIC: ID = 0x02
1524 07:08:34.418640 IOAPIC: Dumping registers
1525 07:08:34.421742 reg 0x0000: 0x02000000
1526 07:08:34.425255 reg 0x0001: 0x00770020
1527 07:08:34.425703 reg 0x0002: 0x00000000
1528 07:08:34.431954 PCI: 00:1f.0 init finished in 23538 usecs
1529 07:08:34.434892 PCI: 00:1f.4 init ...
1530 07:08:34.438255 PCI: 00:1f.4 init finished in 2262 usecs
1531 07:08:34.448906 PCI: 01:00.0 init ...
1532 07:08:34.452461 PCI: 01:00.0 init finished in 2245 usecs
1533 07:08:34.457052 PNP: 0c09.0 init ...
1534 07:08:34.459844 Google Chrome EC uptime: 11.051 seconds
1535 07:08:34.466968 Google Chrome AP resets since EC boot: 0
1536 07:08:34.470067 Google Chrome most recent AP reset causes:
1537 07:08:34.476767 Google Chrome EC reset flags at last EC boot: reset-pin
1538 07:08:34.479579 PNP: 0c09.0 init finished in 20577 usecs
1539 07:08:34.483159 Devices initialized
1540 07:08:34.486232 Show all devs... After init.
1541 07:08:34.486683 Root Device: enabled 1
1542 07:08:34.489289 CPU_CLUSTER: 0: enabled 1
1543 07:08:34.492967 DOMAIN: 0000: enabled 1
1544 07:08:34.493487 APIC: 00: enabled 1
1545 07:08:34.495972 PCI: 00:00.0: enabled 1
1546 07:08:34.499995 PCI: 00:02.0: enabled 1
1547 07:08:34.502683 PCI: 00:04.0: enabled 0
1548 07:08:34.503165 PCI: 00:05.0: enabled 0
1549 07:08:34.506214 PCI: 00:12.0: enabled 1
1550 07:08:34.509130 PCI: 00:12.5: enabled 0
1551 07:08:34.512604 PCI: 00:12.6: enabled 0
1552 07:08:34.513047 PCI: 00:14.0: enabled 1
1553 07:08:34.516025 PCI: 00:14.1: enabled 0
1554 07:08:34.519512 PCI: 00:14.3: enabled 1
1555 07:08:34.522397 PCI: 00:14.5: enabled 0
1556 07:08:34.522843 PCI: 00:15.0: enabled 1
1557 07:08:34.525696 PCI: 00:15.1: enabled 1
1558 07:08:34.529390 PCI: 00:15.2: enabled 0
1559 07:08:34.529934 PCI: 00:15.3: enabled 0
1560 07:08:34.532467 PCI: 00:16.0: enabled 1
1561 07:08:34.536149 PCI: 00:16.1: enabled 0
1562 07:08:34.539147 PCI: 00:16.2: enabled 0
1563 07:08:34.539617 PCI: 00:16.3: enabled 0
1564 07:08:34.542267 PCI: 00:16.4: enabled 0
1565 07:08:34.545697 PCI: 00:16.5: enabled 0
1566 07:08:34.549103 PCI: 00:17.0: enabled 1
1567 07:08:34.549610 PCI: 00:19.0: enabled 1
1568 07:08:34.552461 PCI: 00:19.1: enabled 0
1569 07:08:34.555401 PCI: 00:19.2: enabled 0
1570 07:08:34.558966 PCI: 00:1a.0: enabled 0
1571 07:08:34.559577 PCI: 00:1c.0: enabled 0
1572 07:08:34.562183 PCI: 00:1c.1: enabled 0
1573 07:08:34.565495 PCI: 00:1c.2: enabled 0
1574 07:08:34.566039 PCI: 00:1c.3: enabled 0
1575 07:08:34.569040 PCI: 00:1c.4: enabled 0
1576 07:08:34.572341 PCI: 00:1c.5: enabled 0
1577 07:08:34.576000 PCI: 00:1c.6: enabled 0
1578 07:08:34.576543 PCI: 00:1c.7: enabled 0
1579 07:08:34.579003 PCI: 00:1d.0: enabled 1
1580 07:08:34.581966 PCI: 00:1d.1: enabled 0
1581 07:08:34.585618 PCI: 00:1d.2: enabled 0
1582 07:08:34.586066 PCI: 00:1d.3: enabled 0
1583 07:08:34.588596 PCI: 00:1d.4: enabled 0
1584 07:08:34.592643 PCI: 00:1d.5: enabled 0
1585 07:08:34.595547 PCI: 00:1e.0: enabled 1
1586 07:08:34.596045 PCI: 00:1e.1: enabled 0
1587 07:08:34.598885 PCI: 00:1e.2: enabled 1
1588 07:08:34.602536 PCI: 00:1e.3: enabled 1
1589 07:08:34.605195 PCI: 00:1f.0: enabled 1
1590 07:08:34.605644 PCI: 00:1f.1: enabled 0
1591 07:08:34.608760 PCI: 00:1f.2: enabled 0
1592 07:08:34.612017 PCI: 00:1f.3: enabled 1
1593 07:08:34.612466 PCI: 00:1f.4: enabled 1
1594 07:08:34.615152 PCI: 00:1f.5: enabled 1
1595 07:08:34.618747 PCI: 00:1f.6: enabled 0
1596 07:08:34.622067 USB0 port 0: enabled 1
1597 07:08:34.622515 I2C: 01:15: enabled 1
1598 07:08:34.625791 I2C: 02:5d: enabled 1
1599 07:08:34.628575 GENERIC: 0.0: enabled 1
1600 07:08:34.629023 I2C: 03:1a: enabled 1
1601 07:08:34.631688 I2C: 03:38: enabled 1
1602 07:08:34.635296 I2C: 03:39: enabled 1
1603 07:08:34.635744 I2C: 03:3a: enabled 1
1604 07:08:34.638028 I2C: 03:3b: enabled 1
1605 07:08:34.641728 PCI: 00:00.0: enabled 1
1606 07:08:34.642177 SPI: 00: enabled 1
1607 07:08:34.645140 SPI: 01: enabled 1
1608 07:08:34.648402 PNP: 0c09.0: enabled 1
1609 07:08:34.648848 USB2 port 0: enabled 1
1610 07:08:34.651753 USB2 port 1: enabled 1
1611 07:08:34.654833 USB2 port 2: enabled 0
1612 07:08:34.658261 USB2 port 3: enabled 0
1613 07:08:34.658803 USB2 port 5: enabled 0
1614 07:08:34.661490 USB2 port 6: enabled 1
1615 07:08:34.664943 USB2 port 9: enabled 1
1616 07:08:34.665396 USB3 port 0: enabled 1
1617 07:08:34.668277 USB3 port 1: enabled 1
1618 07:08:34.671662 USB3 port 2: enabled 1
1619 07:08:34.672109 USB3 port 3: enabled 1
1620 07:08:34.674523 USB3 port 4: enabled 0
1621 07:08:34.678448 APIC: 02: enabled 1
1622 07:08:34.678895 APIC: 01: enabled 1
1623 07:08:34.681161 APIC: 06: enabled 1
1624 07:08:34.684799 APIC: 03: enabled 1
1625 07:08:34.685244 APIC: 07: enabled 1
1626 07:08:34.688080 APIC: 05: enabled 1
1627 07:08:34.691666 APIC: 04: enabled 1
1628 07:08:34.692208 PCI: 00:08.0: enabled 1
1629 07:08:34.695195 PCI: 00:14.2: enabled 1
1630 07:08:34.697794 PCI: 01:00.0: enabled 1
1631 07:08:34.701363 Disabling ACPI via APMC:
1632 07:08:34.704725 done.
1633 07:08:34.708173 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1634 07:08:34.711040 ELOG: NV offset 0xaf0000 size 0x4000
1635 07:08:34.717879 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1636 07:08:34.725048 ELOG: Event(17) added with size 13 at 2023-03-22 07:08:34 UTC
1637 07:08:34.731448 ELOG: Event(92) added with size 9 at 2023-03-22 07:08:34 UTC
1638 07:08:34.738135 ELOG: Event(93) added with size 9 at 2023-03-22 07:08:34 UTC
1639 07:08:34.744501 ELOG: Event(9A) added with size 9 at 2023-03-22 07:08:34 UTC
1640 07:08:34.751335 ELOG: Event(9E) added with size 10 at 2023-03-22 07:08:34 UTC
1641 07:08:34.758189 ELOG: Event(9F) added with size 14 at 2023-03-22 07:08:34 UTC
1642 07:08:34.760891 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1643 07:08:34.768793 ELOG: Event(A1) added with size 10 at 2023-03-22 07:08:34 UTC
1644 07:08:34.778528 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1645 07:08:34.785913 ELOG: Event(A0) added with size 9 at 2023-03-22 07:08:34 UTC
1646 07:08:34.788813 elog_add_boot_reason: Logged dev mode boot
1647 07:08:34.791499 Finalize devices...
1648 07:08:34.791962 PCI: 00:17.0 final
1649 07:08:34.795239 Devices finalized
1650 07:08:34.798516 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1651 07:08:34.805235 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1652 07:08:34.808071 ME: HFSTS1 : 0x90000245
1653 07:08:34.811629 ME: HFSTS2 : 0x3B850126
1654 07:08:34.818524 ME: HFSTS3 : 0x00000020
1655 07:08:34.821740 ME: HFSTS4 : 0x00004800
1656 07:08:34.824871 ME: HFSTS5 : 0x00000000
1657 07:08:34.828259 ME: HFSTS6 : 0x40400006
1658 07:08:34.831217 ME: Manufacturing Mode : NO
1659 07:08:34.835228 ME: FW Partition Table : OK
1660 07:08:34.838009 ME: Bringup Loader Failure : NO
1661 07:08:34.841174 ME: Firmware Init Complete : YES
1662 07:08:34.844570 ME: Boot Options Present : NO
1663 07:08:34.847882 ME: Update In Progress : NO
1664 07:08:34.851530 ME: D0i3 Support : YES
1665 07:08:34.854312 ME: Low Power State Enabled : NO
1666 07:08:34.857844 ME: CPU Replaced : NO
1667 07:08:34.861086 ME: CPU Replacement Valid : YES
1668 07:08:34.864068 ME: Current Working State : 5
1669 07:08:34.867670 ME: Current Operation State : 1
1670 07:08:34.870973 ME: Current Operation Mode : 0
1671 07:08:34.874498 ME: Error Code : 0
1672 07:08:34.877805 ME: CPU Debug Disabled : YES
1673 07:08:34.880827 ME: TXT Support : NO
1674 07:08:34.887517 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1675 07:08:34.894279 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1676 07:08:34.894823 CBFS @ c08000 size 3f8000
1677 07:08:34.901168 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1678 07:08:34.903949 CBFS: Locating 'fallback/dsdt.aml'
1679 07:08:34.907118 CBFS: Found @ offset 10bb80 size 3fa5
1680 07:08:34.914221 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1681 07:08:34.917320 CBFS @ c08000 size 3f8000
1682 07:08:34.924430 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1683 07:08:34.925013 CBFS: Locating 'fallback/slic'
1684 07:08:34.932894 CBFS: 'fallback/slic' not found.
1685 07:08:34.936012 ACPI: Writing ACPI tables at 99b3e000.
1686 07:08:34.936471 ACPI: * FACS
1687 07:08:34.939308 ACPI: * DSDT
1688 07:08:34.942768 Ramoops buffer: 0x100000@0x99a3d000.
1689 07:08:34.946278 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1690 07:08:34.952519 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1691 07:08:34.955885 Google Chrome EC: version:
1692 07:08:34.958706 ro: helios_v2.0.2659-56403530b
1693 07:08:34.962084 rw: helios_v2.0.2849-c41de27e7d
1694 07:08:34.962524 running image: 1
1695 07:08:34.966716 ACPI: * FADT
1696 07:08:34.967302 SCI is IRQ9
1697 07:08:34.972805 ACPI: added table 1/32, length now 40
1698 07:08:34.973331 ACPI: * SSDT
1699 07:08:34.976556 Found 1 CPU(s) with 8 core(s) each.
1700 07:08:34.979786 Error: Could not locate 'wifi_sar' in VPD.
1701 07:08:34.986272 Checking CBFS for default SAR values
1702 07:08:34.990020 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1703 07:08:34.993384 CBFS @ c08000 size 3f8000
1704 07:08:34.999789 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1705 07:08:35.002799 CBFS: Locating 'wifi_sar_defaults.hex'
1706 07:08:35.006557 CBFS: Found @ offset 5fac0 size 77
1707 07:08:35.009550 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1708 07:08:35.016417 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1709 07:08:35.019396 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1710 07:08:35.026568 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1711 07:08:35.029566 failed to find key in VPD: dsm_calib_r0_0
1712 07:08:35.039394 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1713 07:08:35.043035 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1714 07:08:35.046166 failed to find key in VPD: dsm_calib_r0_1
1715 07:08:35.055957 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1716 07:08:35.062424 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1717 07:08:35.065772 failed to find key in VPD: dsm_calib_r0_2
1718 07:08:35.075277 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1719 07:08:35.078872 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1720 07:08:35.085275 failed to find key in VPD: dsm_calib_r0_3
1721 07:08:35.092293 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1722 07:08:35.098769 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1723 07:08:35.101716 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1724 07:08:35.108633 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1725 07:08:35.112128 EC returned error result code 1
1726 07:08:35.115444 EC returned error result code 1
1727 07:08:35.118582 EC returned error result code 1
1728 07:08:35.121995 PS2K: Bad resp from EC. Vivaldi disabled!
1729 07:08:35.128928 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1730 07:08:35.135542 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1731 07:08:35.138949 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1732 07:08:35.145278 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1733 07:08:35.149026 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1734 07:08:35.155590 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1735 07:08:35.161572 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1736 07:08:35.168597 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1737 07:08:35.171698 ACPI: added table 2/32, length now 44
1738 07:08:35.172149 ACPI: * MCFG
1739 07:08:35.178440 ACPI: added table 3/32, length now 48
1740 07:08:35.178993 ACPI: * TPM2
1741 07:08:35.181441 TPM2 log created at 99a2d000
1742 07:08:35.185088 ACPI: added table 4/32, length now 52
1743 07:08:35.188190 ACPI: * MADT
1744 07:08:35.188634 SCI is IRQ9
1745 07:08:35.191285 ACPI: added table 5/32, length now 56
1746 07:08:35.194574 current = 99b43ac0
1747 07:08:35.195021 ACPI: * DMAR
1748 07:08:35.197783 ACPI: added table 6/32, length now 60
1749 07:08:35.201109 ACPI: * IGD OpRegion
1750 07:08:35.204358 GMA: Found VBT in CBFS
1751 07:08:35.207842 GMA: Found valid VBT in CBFS
1752 07:08:35.211331 ACPI: added table 7/32, length now 64
1753 07:08:35.211798 ACPI: * HPET
1754 07:08:35.217706 ACPI: added table 8/32, length now 68
1755 07:08:35.218155 ACPI: done.
1756 07:08:35.221662 ACPI tables: 31744 bytes.
1757 07:08:35.224648 smbios_write_tables: 99a2c000
1758 07:08:35.228115 EC returned error result code 3
1759 07:08:35.231166 Couldn't obtain OEM name from CBI
1760 07:08:35.234255 Create SMBIOS type 17
1761 07:08:35.237909 PCI: 00:00.0 (Intel Cannonlake)
1762 07:08:35.238360 PCI: 00:14.3 (Intel WiFi)
1763 07:08:35.240884 SMBIOS tables: 939 bytes.
1764 07:08:35.245091 Writing table forward entry at 0x00000500
1765 07:08:35.251080 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1766 07:08:35.254790 Writing coreboot table at 0x99b62000
1767 07:08:35.261410 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1768 07:08:35.264259 1. 0000000000001000-000000000009ffff: RAM
1769 07:08:35.270868 2. 00000000000a0000-00000000000fffff: RESERVED
1770 07:08:35.274492 3. 0000000000100000-0000000099a2bfff: RAM
1771 07:08:35.280908 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1772 07:08:35.283819 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1773 07:08:35.290520 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1774 07:08:35.297275 7. 000000009a000000-000000009f7fffff: RESERVED
1775 07:08:35.300502 8. 00000000e0000000-00000000efffffff: RESERVED
1776 07:08:35.307269 9. 00000000fc000000-00000000fc000fff: RESERVED
1777 07:08:35.310804 10. 00000000fe000000-00000000fe00ffff: RESERVED
1778 07:08:35.313851 11. 00000000fed10000-00000000fed17fff: RESERVED
1779 07:08:35.320876 12. 00000000fed80000-00000000fed83fff: RESERVED
1780 07:08:35.323881 13. 00000000fed90000-00000000fed91fff: RESERVED
1781 07:08:35.330346 14. 00000000feda0000-00000000feda1fff: RESERVED
1782 07:08:35.333464 15. 0000000100000000-000000045e7fffff: RAM
1783 07:08:35.337255 Graphics framebuffer located at 0xc0000000
1784 07:08:35.340101 Passing 5 GPIOs to payload:
1785 07:08:35.347175 NAME | PORT | POLARITY | VALUE
1786 07:08:35.350270 write protect | undefined | high | low
1787 07:08:35.356663 lid | undefined | high | high
1788 07:08:35.363526 power | undefined | high | low
1789 07:08:35.366530 oprom | undefined | high | low
1790 07:08:35.373391 EC in RW | 0x000000cb | high | low
1791 07:08:35.373936 Board ID: 4
1792 07:08:35.379921 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1793 07:08:35.380458 CBFS @ c08000 size 3f8000
1794 07:08:35.386558 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1795 07:08:35.393638 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1796 07:08:35.396100 coreboot table: 1492 bytes.
1797 07:08:35.399550 IMD ROOT 0. 99fff000 00001000
1798 07:08:35.402923 IMD SMALL 1. 99ffe000 00001000
1799 07:08:35.406474 FSP MEMORY 2. 99c4e000 003b0000
1800 07:08:35.409756 CONSOLE 3. 99c2e000 00020000
1801 07:08:35.412936 FMAP 4. 99c2d000 0000054e
1802 07:08:35.416392 TIME STAMP 5. 99c2c000 00000910
1803 07:08:35.419648 VBOOT WORK 6. 99c18000 00014000
1804 07:08:35.423034 MRC DATA 7. 99c16000 00001958
1805 07:08:35.425880 ROMSTG STCK 8. 99c15000 00001000
1806 07:08:35.429171 AFTER CAR 9. 99c0b000 0000a000
1807 07:08:35.432408 RAMSTAGE 10. 99baf000 0005c000
1808 07:08:35.435633 REFCODE 11. 99b7a000 00035000
1809 07:08:35.439295 SMM BACKUP 12. 99b6a000 00010000
1810 07:08:35.442346 COREBOOT 13. 99b62000 00008000
1811 07:08:35.446774 ACPI 14. 99b3e000 00024000
1812 07:08:35.449354 ACPI GNVS 15. 99b3d000 00001000
1813 07:08:35.452926 RAMOOPS 16. 99a3d000 00100000
1814 07:08:35.455492 TPM2 TCGLOG17. 99a2d000 00010000
1815 07:08:35.459866 SMBIOS 18. 99a2c000 00000800
1816 07:08:35.462550 IMD small region:
1817 07:08:35.465759 IMD ROOT 0. 99ffec00 00000400
1818 07:08:35.469196 FSP RUNTIME 1. 99ffebe0 00000004
1819 07:08:35.472197 EC HOSTEVENT 2. 99ffebc0 00000008
1820 07:08:35.475741 POWER STATE 3. 99ffeb80 00000040
1821 07:08:35.478754 ROMSTAGE 4. 99ffeb60 00000004
1822 07:08:35.482813 MEM INFO 5. 99ffe9a0 000001b9
1823 07:08:35.485787 VPD 6. 99ffe920 0000006c
1824 07:08:35.489369 MTRR: Physical address space:
1825 07:08:35.495610 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1826 07:08:35.502238 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1827 07:08:35.508708 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1828 07:08:35.515484 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1829 07:08:35.518582 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1830 07:08:35.525197 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1831 07:08:35.531571 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1832 07:08:35.538122 MTRR: Fixed MSR 0x250 0x0606060606060606
1833 07:08:35.541430 MTRR: Fixed MSR 0x258 0x0606060606060606
1834 07:08:35.545052 MTRR: Fixed MSR 0x259 0x0000000000000000
1835 07:08:35.548403 MTRR: Fixed MSR 0x268 0x0606060606060606
1836 07:08:35.551500 MTRR: Fixed MSR 0x269 0x0606060606060606
1837 07:08:35.557927 MTRR: Fixed MSR 0x26a 0x0606060606060606
1838 07:08:35.561411 MTRR: Fixed MSR 0x26b 0x0606060606060606
1839 07:08:35.564458 MTRR: Fixed MSR 0x26c 0x0606060606060606
1840 07:08:35.568141 MTRR: Fixed MSR 0x26d 0x0606060606060606
1841 07:08:35.574386 MTRR: Fixed MSR 0x26e 0x0606060606060606
1842 07:08:35.577977 MTRR: Fixed MSR 0x26f 0x0606060606060606
1843 07:08:35.581331 call enable_fixed_mtrr()
1844 07:08:35.584386 CPU physical address size: 39 bits
1845 07:08:35.587980 MTRR: default type WB/UC MTRR counts: 6/8.
1846 07:08:35.590846 MTRR: WB selected as default type.
1847 07:08:35.597445 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1848 07:08:35.604398 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1849 07:08:35.610491 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1850 07:08:35.617236 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1851 07:08:35.624392 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1852 07:08:35.630274 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1853 07:08:35.633634 MTRR: Fixed MSR 0x250 0x0606060606060606
1854 07:08:35.637107 MTRR: Fixed MSR 0x258 0x0606060606060606
1855 07:08:35.643512 MTRR: Fixed MSR 0x259 0x0000000000000000
1856 07:08:35.647214 MTRR: Fixed MSR 0x268 0x0606060606060606
1857 07:08:35.650290 MTRR: Fixed MSR 0x269 0x0606060606060606
1858 07:08:35.653457 MTRR: Fixed MSR 0x26a 0x0606060606060606
1859 07:08:35.660082 MTRR: Fixed MSR 0x26b 0x0606060606060606
1860 07:08:35.663401 MTRR: Fixed MSR 0x26c 0x0606060606060606
1861 07:08:35.666396 MTRR: Fixed MSR 0x26d 0x0606060606060606
1862 07:08:35.670241 MTRR: Fixed MSR 0x26e 0x0606060606060606
1863 07:08:35.676727 MTRR: Fixed MSR 0x26f 0x0606060606060606
1864 07:08:35.676834
1865 07:08:35.676912 MTRR check
1866 07:08:35.679750 Fixed MTRRs : Enabled
1867 07:08:35.683269 Variable MTRRs: Enabled
1868 07:08:35.683368
1869 07:08:35.683445 call enable_fixed_mtrr()
1870 07:08:35.689708 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1871 07:08:35.693401 CPU physical address size: 39 bits
1872 07:08:35.700005 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1873 07:08:35.703291 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 07:08:35.706062 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 07:08:35.709664 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 07:08:35.716191 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 07:08:35.719708 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 07:08:35.722724 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 07:08:35.726093 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 07:08:35.732625 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 07:08:35.735979 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 07:08:35.739279 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 07:08:35.742784 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 07:08:35.749399 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 07:08:35.749575 call enable_fixed_mtrr()
1886 07:08:35.756188 MTRR: Fixed MSR 0x258 0x0606060606060606
1887 07:08:35.759539 MTRR: Fixed MSR 0x259 0x0000000000000000
1888 07:08:35.762942 MTRR: Fixed MSR 0x268 0x0606060606060606
1889 07:08:35.765958 MTRR: Fixed MSR 0x269 0x0606060606060606
1890 07:08:35.772474 MTRR: Fixed MSR 0x26a 0x0606060606060606
1891 07:08:35.775748 MTRR: Fixed MSR 0x26b 0x0606060606060606
1892 07:08:35.779111 MTRR: Fixed MSR 0x26c 0x0606060606060606
1893 07:08:35.782235 MTRR: Fixed MSR 0x26d 0x0606060606060606
1894 07:08:35.785950 MTRR: Fixed MSR 0x26e 0x0606060606060606
1895 07:08:35.792485 MTRR: Fixed MSR 0x26f 0x0606060606060606
1896 07:08:35.795548 CPU physical address size: 39 bits
1897 07:08:35.799011 call enable_fixed_mtrr()
1898 07:08:35.802003 CBFS @ c08000 size 3f8000
1899 07:08:35.805647 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1900 07:08:35.812268 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 07:08:35.815112 MTRR: Fixed MSR 0x250 0x0606060606060606
1902 07:08:35.819048 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 07:08:35.822475 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 07:08:35.825773 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 07:08:35.831941 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 07:08:35.835488 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 07:08:35.838837 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 07:08:35.842121 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 07:08:35.848276 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 07:08:35.851788 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 07:08:35.855242 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 07:08:35.858314 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 07:08:35.861817 call enable_fixed_mtrr()
1914 07:08:35.865183 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 07:08:35.871974 MTRR: Fixed MSR 0x268 0x0606060606060606
1916 07:08:35.875209 MTRR: Fixed MSR 0x269 0x0606060606060606
1917 07:08:35.878675 MTRR: Fixed MSR 0x26a 0x0606060606060606
1918 07:08:35.881874 MTRR: Fixed MSR 0x26b 0x0606060606060606
1919 07:08:35.888477 MTRR: Fixed MSR 0x26c 0x0606060606060606
1920 07:08:35.891501 MTRR: Fixed MSR 0x26d 0x0606060606060606
1921 07:08:35.895212 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 07:08:35.898083 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 07:08:35.904763 CPU physical address size: 39 bits
1924 07:08:35.905317 call enable_fixed_mtrr()
1925 07:08:35.908370 CPU physical address size: 39 bits
1926 07:08:35.915271 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 07:08:35.918119 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 07:08:35.921322 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 07:08:35.925245 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 07:08:35.931325 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 07:08:35.935209 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 07:08:35.938367 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 07:08:35.941056 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 07:08:35.947857 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 07:08:35.951415 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 07:08:35.954713 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 07:08:35.957422 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 07:08:35.964707 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 07:08:35.965154 call enable_fixed_mtrr()
1940 07:08:35.971493 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 07:08:35.974105 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 07:08:35.977393 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 07:08:35.980948 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 07:08:35.987108 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 07:08:35.990773 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 07:08:35.993760 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 07:08:35.997475 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 07:08:36.000407 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 07:08:36.006861 CPU physical address size: 39 bits
1950 07:08:36.010527 call enable_fixed_mtrr()
1951 07:08:36.013560 CPU physical address size: 39 bits
1952 07:08:36.017249 CBFS: Locating 'fallback/payload'
1953 07:08:36.020275 CPU physical address size: 39 bits
1954 07:08:36.023802 CBFS: Found @ offset 1c96c0 size 3f798
1955 07:08:36.026672 Checking segment from ROM address 0xffdd16f8
1956 07:08:36.033258 Checking segment from ROM address 0xffdd1714
1957 07:08:36.037215 Loading segment from ROM address 0xffdd16f8
1958 07:08:36.040112 code (compression=0)
1959 07:08:36.046449 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1960 07:08:36.056808 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1961 07:08:36.056910 it's not compressed!
1962 07:08:36.150494 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1963 07:08:36.157308 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1964 07:08:36.160230 Loading segment from ROM address 0xffdd1714
1965 07:08:36.163902 Entry Point 0x30000000
1966 07:08:36.166581 Loaded segments
1967 07:08:36.172582 Finalizing chipset.
1968 07:08:36.175894 Finalizing SMM.
1969 07:08:36.179344 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1970 07:08:36.182639 mp_park_aps done after 0 msecs.
1971 07:08:36.188970 Jumping to boot code at 30000000(99b62000)
1972 07:08:36.195661 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1973 07:08:36.196378
1974 07:08:36.196975
1975 07:08:36.197566
1976 07:08:36.198675 Starting depthcharge on Helios...
1977 07:08:36.199067
1978 07:08:36.200435 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1979 07:08:36.201224 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1980 07:08:36.201878 Setting prompt string to ['hatch:']
1981 07:08:36.202423 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1982 07:08:36.208648 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1983 07:08:36.209140
1984 07:08:36.215255 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1985 07:08:36.215706
1986 07:08:36.221936 board_setup: Info: eMMC controller not present; skipping
1987 07:08:36.222486
1988 07:08:36.225260 New NVMe Controller 0x30053ac0 @ 00:1d:00
1989 07:08:36.225844
1990 07:08:36.231897 board_setup: Info: SDHCI controller not present; skipping
1991 07:08:36.232399
1992 07:08:36.238607 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1993 07:08:36.239045
1994 07:08:36.239446 Wipe memory regions:
1995 07:08:36.239777
1996 07:08:36.241450 [0x00000000001000, 0x000000000a0000)
1997 07:08:36.241761
1998 07:08:36.245093 [0x00000000100000, 0x00000030000000)
1999 07:08:36.311281
2000 07:08:36.314693 [0x00000030657430, 0x00000099a2c000)
2001 07:08:36.461965
2002 07:08:36.464926 [0x00000100000000, 0x0000045e800000)
2003 07:08:37.920911
2004 07:08:37.921071 R8152: Initializing
2005 07:08:37.921155
2006 07:08:37.923915 Version 9 (ocp_data = 6010)
2007 07:08:37.928510
2008 07:08:37.928607 R8152: Done initializing
2009 07:08:37.928684
2010 07:08:37.931275 Adding net device
2011 07:08:38.414404
2012 07:08:38.414561 R8152: Initializing
2013 07:08:38.414649
2014 07:08:38.417516 Version 6 (ocp_data = 5c30)
2015 07:08:38.417612
2016 07:08:38.420604 R8152: Done initializing
2017 07:08:38.420699
2018 07:08:38.427788 net_add_device: Attemp to include the same device
2019 07:08:38.427889
2020 07:08:38.434626 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2021 07:08:38.434731
2022 07:08:38.434847
2023 07:08:38.434947
2024 07:08:38.435254 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2026 07:08:38.536039 hatch: tftpboot 192.168.201.1 9726714/tftp-deploy-z_lrqjd4/kernel/bzImage 9726714/tftp-deploy-z_lrqjd4/kernel/cmdline 9726714/tftp-deploy-z_lrqjd4/ramdisk/ramdisk.cpio.gz
2027 07:08:38.536214 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2028 07:08:38.536339 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2029 07:08:38.540382 tftpboot 192.168.201.1 9726714/tftp-deploy-z_lrqjd4/kernel/bzImoy-z_lrqjd4/kernel/cmdline 9726714/tftp-deploy-z_lrqjd4/ramdisk/ramdisk.cpio.gz
2030 07:08:38.540484
2031 07:08:38.540581 Waiting for link
2032 07:08:38.741354
2033 07:08:38.741520 done.
2034 07:08:38.741601
2035 07:08:38.741673 MAC: 00:24:32:50:1a:59
2036 07:08:38.741743
2037 07:08:38.744757 Sending DHCP discover... done.
2038 07:08:38.744856
2039 07:08:38.747691 Waiting for reply... done.
2040 07:08:38.747788
2041 07:08:38.751367 Sending DHCP request... done.
2042 07:08:38.751465
2043 07:08:38.754479 Waiting for reply... done.
2044 07:08:38.754575
2045 07:08:38.757870 My ip is 192.168.201.14
2046 07:08:38.757967
2047 07:08:38.761092 The DHCP server ip is 192.168.201.1
2048 07:08:38.761189
2049 07:08:38.764554 TFTP server IP predefined by user: 192.168.201.1
2050 07:08:38.764654
2051 07:08:38.770779 Bootfile predefined by user: 9726714/tftp-deploy-z_lrqjd4/kernel/bzImage
2052 07:08:38.770877
2053 07:08:38.774537 Sending tftp read request... done.
2054 07:08:38.774634
2055 07:08:38.781035 Waiting for the transfer...
2056 07:08:38.781137
2057 07:08:39.361308 00000000 ################################################################
2058 07:08:39.361479
2059 07:08:39.944326 00080000 ################################################################
2060 07:08:39.944477
2061 07:08:40.529642 00100000 ################################################################
2062 07:08:40.529801
2063 07:08:41.103947 00180000 ################################################################
2064 07:08:41.104101
2065 07:08:41.674171 00200000 ################################################################
2066 07:08:41.674319
2067 07:08:42.242706 00280000 ################################################################
2068 07:08:42.242868
2069 07:08:42.787886 00300000 ################################################################
2070 07:08:42.788032
2071 07:08:43.339786 00380000 ################################################################
2072 07:08:43.339949
2073 07:08:43.889332 00400000 ################################################################
2074 07:08:43.889481
2075 07:08:44.434804 00480000 ################################################################
2076 07:08:44.434970
2077 07:08:44.977218 00500000 ################################################################
2078 07:08:44.977365
2079 07:08:45.527420 00580000 ################################################################
2080 07:08:45.527575
2081 07:08:46.076946 00600000 ################################################################
2082 07:08:46.077102
2083 07:08:46.623207 00680000 ################################################################
2084 07:08:46.623365
2085 07:08:47.179852 00700000 ################################################################
2086 07:08:47.179999
2087 07:08:47.723645 00780000 ################################################################
2088 07:08:47.723795
2089 07:08:48.264879 00800000 ################################################################
2090 07:08:48.265033
2091 07:08:48.810306 00880000 ################################################################
2092 07:08:48.810457
2093 07:08:49.281390 00900000 ################################################ done.
2094 07:08:49.281845
2095 07:08:49.284385 The bootfile was 9826304 bytes long.
2096 07:08:49.284482
2097 07:08:49.287363 Sending tftp read request... done.
2098 07:08:49.287457
2099 07:08:49.290647 Waiting for the transfer...
2100 07:08:49.290740
2101 07:08:49.844853 00000000 ################################################################
2102 07:08:49.845064
2103 07:08:50.392261 00080000 ################################################################
2104 07:08:50.392437
2105 07:08:50.920443 00100000 ################################################################
2106 07:08:50.920592
2107 07:08:51.453980 00180000 ################################################################
2108 07:08:51.454171
2109 07:08:52.031538 00200000 ################################################################
2110 07:08:52.031704
2111 07:08:52.577556 00280000 ################################################################
2112 07:08:52.577711
2113 07:08:53.117452 00300000 ################################################################
2114 07:08:53.117609
2115 07:08:53.669637 00380000 ################################################################
2116 07:08:53.669790
2117 07:08:54.211383 00400000 ################################################################
2118 07:08:54.211529
2119 07:08:54.742843 00480000 ################################################################
2120 07:08:54.742996
2121 07:08:55.281133 00500000 ################################################################
2122 07:08:55.281288
2123 07:08:55.799487 00580000 ################################################################
2124 07:08:55.799638
2125 07:08:56.316436 00600000 ################################################################
2126 07:08:56.316596
2127 07:08:56.837838 00680000 ################################################################
2128 07:08:56.837985
2129 07:08:57.366784 00700000 ################################################################
2130 07:08:57.366930
2131 07:08:57.895306 00780000 ################################################################
2132 07:08:57.895460
2133 07:08:58.452960 00800000 ################################################################
2134 07:08:58.453114
2135 07:08:58.735545 00880000 ################################# done.
2136 07:08:58.735699
2137 07:08:58.738424 Sending tftp read request... done.
2138 07:08:58.738520
2139 07:08:58.742112 Waiting for the transfer...
2140 07:08:58.742208
2141 07:08:58.742284 00000000 # done.
2142 07:08:58.742358
2143 07:08:58.751732 Command line loaded dynamically from TFTP file: 9726714/tftp-deploy-z_lrqjd4/kernel/cmdline
2144 07:08:58.751830
2145 07:08:58.768401 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2146 07:08:58.768506
2147 07:08:58.775229 ec_init(0): CrosEC protocol v3 supported (256, 256)
2148 07:08:58.779760
2149 07:08:58.783570 Shutting down all USB controllers.
2150 07:08:58.783666
2151 07:08:58.783741 Removing current net device
2152 07:08:58.786590
2153 07:08:58.786696 Finalizing coreboot
2154 07:08:58.786779
2155 07:08:58.793202 Exiting depthcharge with code 4 at timestamp: 29946332
2156 07:08:58.793309
2157 07:08:58.793387
2158 07:08:58.793459 Starting kernel ...
2159 07:08:58.793528
2160 07:08:58.793940 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2161 07:08:58.794054 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2162 07:08:58.794154 Setting prompt string to ['Linux version [0-9]']
2163 07:08:58.794258 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 07:08:58.794359 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2165 07:08:58.796701
2167 07:13:17.795075 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2169 07:13:17.796194 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2171 07:13:17.796987 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2174 07:13:17.798327 end: 2 depthcharge-action (duration 00:05:00) [common]
2176 07:13:17.799530 Cleaning after the job
2177 07:13:17.799955 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726714/tftp-deploy-z_lrqjd4/ramdisk
2178 07:13:17.802923 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726714/tftp-deploy-z_lrqjd4/kernel
2179 07:13:17.806234 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726714/tftp-deploy-z_lrqjd4/modules
2180 07:13:17.807948 start: 5.1 power-off (timeout 00:00:30) [common]
2181 07:13:17.808707 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2182 07:13:17.926936 >> Command sent successfully.
2183 07:13:17.931279 Returned 0 in 0 seconds
2184 07:13:18.032566 end: 5.1 power-off (duration 00:00:00) [common]
2186 07:13:18.033955 start: 5.2 read-feedback (timeout 00:10:00) [common]
2187 07:13:18.035029 Listened to connection for namespace 'common' for up to 1s
2189 07:13:18.036411 Listened to connection for namespace 'common' for up to 1s
2190 07:13:19.039348 Finalising connection for namespace 'common'
2191 07:13:19.040086 Disconnecting from shell: Finalise
2192 07:13:19.040507
2193 07:13:19.141898 end: 5.2 read-feedback (duration 00:00:01) [common]
2194 07:13:19.142472 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9726714
2195 07:13:19.170782 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9726714
2196 07:13:19.171684 JobError: Your job cannot terminate cleanly.