Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 07:04:50.603082 lava-dispatcher, installed at version: 2023.01
2 07:04:50.603286 start: 0 validate
3 07:04:50.603422 Start time: 2023-03-22 07:04:50.603414+00:00 (UTC)
4 07:04:50.603559 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:04:50.603703 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 07:04:50.892425 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:04:50.893173 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.277-cip94%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:04:51.187655 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:04:51.188389 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.277-cip94%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:04:51.482633 validate duration: 0.88
12 07:04:51.482985 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:04:51.483159 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:04:51.483268 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:04:51.483383 Not decompressing ramdisk as can be used compressed.
16 07:04:51.483519 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 07:04:51.483596 saving as /var/lib/lava/dispatcher/tmp/9726785/tftp-deploy-48w8xpqu/ramdisk/rootfs.cpio.gz
18 07:04:51.483666 total size: 8429740 (8MB)
19 07:04:51.484631 progress 0% (0MB)
20 07:04:51.486909 progress 5% (0MB)
21 07:04:51.489072 progress 10% (0MB)
22 07:04:51.491286 progress 15% (1MB)
23 07:04:51.493491 progress 20% (1MB)
24 07:04:51.495707 progress 25% (2MB)
25 07:04:51.497970 progress 30% (2MB)
26 07:04:51.500134 progress 35% (2MB)
27 07:04:51.502216 progress 40% (3MB)
28 07:04:51.504377 progress 45% (3MB)
29 07:04:51.506595 progress 50% (4MB)
30 07:04:51.509050 progress 55% (4MB)
31 07:04:51.511229 progress 60% (4MB)
32 07:04:51.513399 progress 65% (5MB)
33 07:04:51.515649 progress 70% (5MB)
34 07:04:51.517778 progress 75% (6MB)
35 07:04:51.519933 progress 80% (6MB)
36 07:04:51.522188 progress 85% (6MB)
37 07:04:51.524506 progress 90% (7MB)
38 07:04:51.526680 progress 95% (7MB)
39 07:04:51.529076 progress 100% (8MB)
40 07:04:51.529248 8MB downloaded in 0.05s (176.39MB/s)
41 07:04:51.529419 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:04:51.529673 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:04:51.529767 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:04:51.529858 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:04:51.529969 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.277-cip94/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:04:51.530044 saving as /var/lib/lava/dispatcher/tmp/9726785/tftp-deploy-48w8xpqu/kernel/bzImage
48 07:04:51.530110 total size: 9826304 (9MB)
49 07:04:51.530174 No compression specified
50 07:04:51.531192 progress 0% (0MB)
51 07:04:51.533766 progress 5% (0MB)
52 07:04:51.536366 progress 10% (0MB)
53 07:04:51.539089 progress 15% (1MB)
54 07:04:51.541662 progress 20% (1MB)
55 07:04:51.544264 progress 25% (2MB)
56 07:04:51.546925 progress 30% (2MB)
57 07:04:51.549598 progress 35% (3MB)
58 07:04:51.552187 progress 40% (3MB)
59 07:04:51.554817 progress 45% (4MB)
60 07:04:51.557407 progress 50% (4MB)
61 07:04:51.559877 progress 55% (5MB)
62 07:04:51.562408 progress 60% (5MB)
63 07:04:51.564833 progress 65% (6MB)
64 07:04:51.567399 progress 70% (6MB)
65 07:04:51.569843 progress 75% (7MB)
66 07:04:51.572265 progress 80% (7MB)
67 07:04:51.574701 progress 85% (7MB)
68 07:04:51.577135 progress 90% (8MB)
69 07:04:51.579642 progress 95% (8MB)
70 07:04:51.582244 progress 100% (9MB)
71 07:04:51.582476 9MB downloaded in 0.05s (178.97MB/s)
72 07:04:51.582636 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:04:51.582892 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:04:51.582990 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:04:51.583086 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:04:51.583205 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.277-cip94/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:04:51.583284 saving as /var/lib/lava/dispatcher/tmp/9726785/tftp-deploy-48w8xpqu/modules/modules.tar
79 07:04:51.583350 total size: 461712 (0MB)
80 07:04:51.583417 Using unxz to decompress xz
81 07:04:51.586853 progress 7% (0MB)
82 07:04:51.587249 progress 14% (0MB)
83 07:04:51.587504 progress 21% (0MB)
84 07:04:51.589005 progress 28% (0MB)
85 07:04:51.591286 progress 35% (0MB)
86 07:04:51.593644 progress 42% (0MB)
87 07:04:51.596235 progress 49% (0MB)
88 07:04:51.598384 progress 56% (0MB)
89 07:04:51.600499 progress 63% (0MB)
90 07:04:51.602893 progress 70% (0MB)
91 07:04:51.604919 progress 78% (0MB)
92 07:04:51.607100 progress 85% (0MB)
93 07:04:51.609079 progress 92% (0MB)
94 07:04:51.611282 progress 99% (0MB)
95 07:04:51.618487 0MB downloaded in 0.04s (12.54MB/s)
96 07:04:51.618772 end: 1.3.1 http-download (duration 00:00:00) [common]
98 07:04:51.619066 end: 1.3 download-retry (duration 00:00:00) [common]
99 07:04:51.619171 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
100 07:04:51.619276 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
101 07:04:51.619371 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 07:04:51.619467 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
103 07:04:51.619657 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7
104 07:04:51.619779 makedir: /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin
105 07:04:51.619874 makedir: /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/tests
106 07:04:51.619962 makedir: /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/results
107 07:04:51.620078 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-add-keys
108 07:04:51.620223 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-add-sources
109 07:04:51.620352 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-background-process-start
110 07:04:51.620478 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-background-process-stop
111 07:04:51.620600 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-common-functions
112 07:04:51.620720 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-echo-ipv4
113 07:04:51.620843 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-install-packages
114 07:04:51.620964 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-installed-packages
115 07:04:51.621083 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-os-build
116 07:04:51.621208 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-probe-channel
117 07:04:51.621367 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-probe-ip
118 07:04:51.621485 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-target-ip
119 07:04:51.621603 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-target-mac
120 07:04:51.621721 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-target-storage
121 07:04:51.621844 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-test-case
122 07:04:51.621962 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-test-event
123 07:04:51.622080 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-test-feedback
124 07:04:51.622200 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-test-raise
125 07:04:51.622323 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-test-reference
126 07:04:51.622442 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-test-runner
127 07:04:51.622561 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-test-set
128 07:04:51.622679 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-test-shell
129 07:04:51.622802 Updating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-install-packages (oe)
130 07:04:51.622925 Updating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/bin/lava-installed-packages (oe)
131 07:04:51.623035 Creating /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/environment
132 07:04:51.623130 LAVA metadata
133 07:04:51.623209 - LAVA_JOB_ID=9726785
134 07:04:51.623279 - LAVA_DISPATCHER_IP=192.168.201.1
135 07:04:51.623389 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
136 07:04:51.623459 skipped lava-vland-overlay
137 07:04:51.623545 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 07:04:51.623639 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
139 07:04:51.623710 skipped lava-multinode-overlay
140 07:04:51.623791 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 07:04:51.623888 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
142 07:04:51.623969 Loading test definitions
143 07:04:51.624077 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
144 07:04:51.624158 Using /lava-9726785 at stage 0
145 07:04:51.624432 uuid=9726785_1.4.2.3.1 testdef=None
146 07:04:51.624529 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 07:04:51.624657 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
148 07:04:51.625302 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 07:04:51.625557 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
151 07:04:51.626169 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 07:04:51.626428 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
154 07:04:51.627017 runner path: /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/0/tests/0_dmesg test_uuid 9726785_1.4.2.3.1
155 07:04:51.627211 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 07:04:51.627462 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
158 07:04:51.627542 Using /lava-9726785 at stage 1
159 07:04:51.627806 uuid=9726785_1.4.2.3.5 testdef=None
160 07:04:51.627903 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 07:04:51.627999 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
162 07:04:51.628553 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 07:04:51.628799 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
165 07:04:51.629500 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 07:04:51.629759 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
168 07:04:51.630353 runner path: /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/1/tests/1_bootrr test_uuid 9726785_1.4.2.3.5
169 07:04:51.630507 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 07:04:51.630735 Creating lava-test-runner.conf files
172 07:04:51.630803 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/0 for stage 0
173 07:04:51.630892 - 0_dmesg
174 07:04:51.630972 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726785/lava-overlay-4h9g_iu7/lava-9726785/1 for stage 1
175 07:04:51.631062 - 1_bootrr
176 07:04:51.631240 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 07:04:51.631408 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
178 07:04:51.638538 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 07:04:51.638660 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
180 07:04:51.638761 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 07:04:51.638858 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 07:04:51.638953 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
183 07:04:51.842885 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 07:04:51.843279 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
185 07:04:51.843402 extracting modules file /var/lib/lava/dispatcher/tmp/9726785/tftp-deploy-48w8xpqu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726785/extract-overlay-ramdisk-_33iq6il/ramdisk
186 07:04:51.855604 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 07:04:51.855755 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
188 07:04:51.855853 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726785/compress-overlay-yezu7l3h/overlay-1.4.2.4.tar.gz to ramdisk
189 07:04:51.855938 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726785/compress-overlay-yezu7l3h/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9726785/extract-overlay-ramdisk-_33iq6il/ramdisk
190 07:04:51.860468 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 07:04:51.860596 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
192 07:04:51.860702 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 07:04:51.860806 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
194 07:04:51.860897 Building ramdisk /var/lib/lava/dispatcher/tmp/9726785/extract-overlay-ramdisk-_33iq6il/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9726785/extract-overlay-ramdisk-_33iq6il/ramdisk
195 07:04:51.938918 >> 53632 blocks
196 07:04:52.907851 rename /var/lib/lava/dispatcher/tmp/9726785/extract-overlay-ramdisk-_33iq6il/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9726785/tftp-deploy-48w8xpqu/ramdisk/ramdisk.cpio.gz
197 07:04:52.908301 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 07:04:52.908441 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
199 07:04:52.908750 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
200 07:04:52.908865 No mkimage arch provided, not using FIT.
201 07:04:52.908968 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 07:04:52.909064 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 07:04:52.909167 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 07:04:52.909283 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
205 07:04:52.909373 No LXC device requested
206 07:04:52.909461 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 07:04:52.909561 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
208 07:04:52.909652 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 07:04:52.909730 Checking files for TFTP limit of 4294967296 bytes.
210 07:04:52.910181 end: 1 tftp-deploy (duration 00:00:01) [common]
211 07:04:52.910304 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 07:04:52.910411 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 07:04:52.910547 substitutions:
214 07:04:52.910622 - {DTB}: None
215 07:04:52.910695 - {INITRD}: 9726785/tftp-deploy-48w8xpqu/ramdisk/ramdisk.cpio.gz
216 07:04:52.910763 - {KERNEL}: 9726785/tftp-deploy-48w8xpqu/kernel/bzImage
217 07:04:52.910837 - {LAVA_MAC}: None
218 07:04:52.910940 - {PRESEED_CONFIG}: None
219 07:04:52.911017 - {PRESEED_LOCAL}: None
220 07:04:52.911082 - {RAMDISK}: 9726785/tftp-deploy-48w8xpqu/ramdisk/ramdisk.cpio.gz
221 07:04:52.911147 - {ROOT_PART}: None
222 07:04:52.911210 - {ROOT}: None
223 07:04:52.911273 - {SERVER_IP}: 192.168.201.1
224 07:04:52.911335 - {TEE}: None
225 07:04:52.911398 Parsed boot commands:
226 07:04:52.911459 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 07:04:52.911628 Parsed boot commands: tftpboot 192.168.201.1 9726785/tftp-deploy-48w8xpqu/kernel/bzImage 9726785/tftp-deploy-48w8xpqu/kernel/cmdline 9726785/tftp-deploy-48w8xpqu/ramdisk/ramdisk.cpio.gz
228 07:04:52.911728 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 07:04:52.911834 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 07:04:52.911942 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 07:04:52.912041 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 07:04:52.912118 Not connected, no need to disconnect.
233 07:04:52.912204 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 07:04:52.912295 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 07:04:52.912370 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
236 07:04:52.915561 Setting prompt string to ['lava-test: # ']
237 07:04:52.915883 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 07:04:52.916005 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 07:04:52.916117 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 07:04:52.916222 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 07:04:52.916423 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
242 07:04:58.048944 >> Command sent successfully.
243 07:04:58.051300 Returned 0 in 5 seconds
244 07:04:58.152103 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 07:04:58.152465 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 07:04:58.152575 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 07:04:58.152676 Setting prompt string to 'Starting depthcharge on Voema...'
249 07:04:58.152752 Changing prompt to 'Starting depthcharge on Voema...'
250 07:04:58.152833 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
251 07:04:58.153133 [Enter `^Ec?' for help]
252 07:04:59.716091
253 07:04:59.716332
254 07:04:59.725645 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
255 07:04:59.732324 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
256 07:04:59.735406 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
257 07:04:59.738684 CPU: AES supported, TXT NOT supported, VT supported
258 07:04:59.745781 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
259 07:04:59.749541 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
260 07:04:59.756713 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
261 07:04:59.760348 VBOOT: Loading verstage.
262 07:04:59.763132 FMAP: Found "FLASH" version 1.1 at 0x1804000.
263 07:04:59.770370 FMAP: base = 0x0 size = 0x2000000 #areas = 32
264 07:04:59.773481 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
265 07:04:59.783186 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
266 07:04:59.789855 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
267 07:04:59.789980
268 07:04:59.790093
269 07:04:59.800135 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
270 07:04:59.816345 Probing TPM: . done!
271 07:04:59.819652 TPM ready after 0 ms
272 07:04:59.823088 Connected to device vid:did:rid of 1ae0:0028:00
273 07:04:59.834031 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
274 07:04:59.841019 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 07:04:59.844152 Initialized TPM device CR50 revision 0
276 07:04:59.901699 tlcl_send_startup: Startup return code is 0
277 07:04:59.901885 TPM: setup succeeded
278 07:04:59.916781 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 07:04:59.931518 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 07:04:59.944087 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 07:04:59.954256 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 07:04:59.957672 Chrome EC: UHEPI supported
283 07:04:59.961009 Phase 1
284 07:04:59.964042 FMAP: area GBB found @ 1805000 (458752 bytes)
285 07:04:59.973778 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 07:04:59.980471 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 07:04:59.987554 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
288 07:04:59.993576 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
289 07:04:59.996896 Recovery requested (1009000e)
290 07:05:00.000505 TPM: Extending digest for VBOOT: boot mode into PCR 0
291 07:05:00.011805 tlcl_extend: response is 0
292 07:05:00.018569 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
293 07:05:00.028707 tlcl_extend: response is 0
294 07:05:00.034960 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 07:05:00.041555 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
296 07:05:00.048441 BS: verstage times (exec / console): total (unknown) / 142 ms
297 07:05:00.048542
298 07:05:00.048619
299 07:05:00.061450 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
300 07:05:00.068170 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
301 07:05:00.071433 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
302 07:05:00.074595 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
303 07:05:00.081550 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
304 07:05:00.084437 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
305 07:05:00.087901 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
306 07:05:00.091348 TCO_STS: 0000 0000
307 07:05:00.094479 GEN_PMCON: d0015038 00002200
308 07:05:00.098202 GBLRST_CAUSE: 00000000 00000000
309 07:05:00.101190 HPR_CAUSE0: 00000000
310 07:05:00.101328 prev_sleep_state 5
311 07:05:00.104767 Boot Count incremented to 15436
312 07:05:00.110933 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
313 07:05:00.117696 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
314 07:05:00.127668 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
315 07:05:00.134063 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
316 07:05:00.137537 Chrome EC: UHEPI supported
317 07:05:00.144069 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
318 07:05:00.155261 Probing TPM: done!
319 07:05:00.161792 Connected to device vid:did:rid of 1ae0:0028:00
320 07:05:00.171646 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
321 07:05:00.175825 Initialized TPM device CR50 revision 0
322 07:05:00.190239 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
323 07:05:00.196946 MRC: Hash idx 0x100b comparison successful.
324 07:05:00.199859 MRC cache found, size faa8
325 07:05:00.199969 bootmode is set to: 2
326 07:05:00.203319 SPD index = 2
327 07:05:00.209689 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
328 07:05:00.213130 SPD: module type is LPDDR4X
329 07:05:00.216886 SPD: module part number is MT53D1G64D4NW-046
330 07:05:00.223185 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
331 07:05:00.226628 SPD: device width 16 bits, bus width 16 bits
332 07:05:00.232964 SPD: module size is 2048 MB (per channel)
333 07:05:00.663390 CBMEM:
334 07:05:00.666443 IMD: root @ 0x76fff000 254 entries.
335 07:05:00.669743 IMD: root @ 0x76ffec00 62 entries.
336 07:05:00.673220 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
337 07:05:00.679932 FMAP: area RW_VPD found @ f35000 (8192 bytes)
338 07:05:00.683333 External stage cache:
339 07:05:00.686268 IMD: root @ 0x7b3ff000 254 entries.
340 07:05:00.689538 IMD: root @ 0x7b3fec00 62 entries.
341 07:05:00.704634 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
342 07:05:00.711356 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
343 07:05:00.717915 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
344 07:05:00.731621 MRC: 'RECOVERY_MRC_CACHE' does not need update.
345 07:05:00.737830 cse_lite: Skip switching to RW in the recovery path
346 07:05:00.737956 8 DIMMs found
347 07:05:00.738032 SMM Memory Map
348 07:05:00.744435 SMRAM : 0x7b000000 0x800000
349 07:05:00.747967 Subregion 0: 0x7b000000 0x200000
350 07:05:00.750930 Subregion 1: 0x7b200000 0x200000
351 07:05:00.754381 Subregion 2: 0x7b400000 0x400000
352 07:05:00.754502 top_of_ram = 0x77000000
353 07:05:00.760890 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
354 07:05:00.768025 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
355 07:05:00.770893 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
356 07:05:00.777558 MTRR Range: Start=ff000000 End=0 (Size 1000000)
357 07:05:00.784303 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
358 07:05:00.790605 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
359 07:05:00.800812 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
360 07:05:00.807624 Processing 211 relocs. Offset value of 0x74c0b000
361 07:05:00.814326 BS: romstage times (exec / console): total (unknown) / 277 ms
362 07:05:00.820466
363 07:05:00.820564
364 07:05:00.830456 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
365 07:05:00.833715 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
366 07:05:00.843437 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
367 07:05:00.850349 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
368 07:05:00.856740 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
369 07:05:00.863673 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
370 07:05:00.907020 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
371 07:05:00.914134 Processing 5008 relocs. Offset value of 0x75d98000
372 07:05:00.916928 BS: postcar times (exec / console): total (unknown) / 59 ms
373 07:05:00.920149
374 07:05:00.920244
375 07:05:00.930473 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
376 07:05:00.930577 Normal boot
377 07:05:00.933388 FW_CONFIG value is 0x804c02
378 07:05:00.936794 PCI: 00:07.0 disabled by fw_config
379 07:05:00.939974 PCI: 00:07.1 disabled by fw_config
380 07:05:00.943176 PCI: 00:0d.2 disabled by fw_config
381 07:05:00.949936 PCI: 00:1c.7 disabled by fw_config
382 07:05:00.952931 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
383 07:05:00.960068 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 07:05:00.966367 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 07:05:00.969843 GENERIC: 0.0 disabled by fw_config
386 07:05:00.972844 GENERIC: 1.0 disabled by fw_config
387 07:05:00.976583 fw_config match found: DB_USB=USB3_ACTIVE
388 07:05:00.979522 fw_config match found: DB_USB=USB3_ACTIVE
389 07:05:00.983222 fw_config match found: DB_USB=USB3_ACTIVE
390 07:05:00.989491 fw_config match found: DB_USB=USB3_ACTIVE
391 07:05:00.992891 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
392 07:05:01.002685 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
393 07:05:01.009524 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
394 07:05:01.015820 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
395 07:05:01.022721 microcode: sig=0x806c1 pf=0x80 revision=0x86
396 07:05:01.025886 microcode: Update skipped, already up-to-date
397 07:05:01.032579 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
398 07:05:01.060759 Detected 4 core, 8 thread CPU.
399 07:05:01.064168 Setting up SMI for CPU
400 07:05:01.067023 IED base = 0x7b400000
401 07:05:01.067118 IED size = 0x00400000
402 07:05:01.070397 Will perform SMM setup.
403 07:05:01.077409 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
404 07:05:01.084258 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
405 07:05:01.090840 Processing 16 relocs. Offset value of 0x00030000
406 07:05:01.094292 Attempting to start 7 APs
407 07:05:01.096995 Waiting for 10ms after sending INIT.
408 07:05:01.112444 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
409 07:05:01.115982 AP: slot 6 apic_id 6.
410 07:05:01.119089 AP: slot 3 apic_id 7.
411 07:05:01.119182 AP: slot 5 apic_id 4.
412 07:05:01.122204 AP: slot 2 apic_id 5.
413 07:05:01.125593 AP: slot 7 apic_id 3.
414 07:05:01.125687 AP: slot 4 apic_id 2.
415 07:05:01.125761 done.
416 07:05:01.132501 Waiting for 2nd SIPI to complete...done.
417 07:05:01.139142 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
418 07:05:01.145815 Processing 13 relocs. Offset value of 0x00038000
419 07:05:01.148863 Unable to locate Global NVS
420 07:05:01.155500 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
421 07:05:01.158806 Installing permanent SMM handler to 0x7b000000
422 07:05:01.169211 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
423 07:05:01.171906 Processing 794 relocs. Offset value of 0x7b010000
424 07:05:01.181916 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
425 07:05:01.185426 Processing 13 relocs. Offset value of 0x7b008000
426 07:05:01.192064 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
427 07:05:01.198801 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
428 07:05:01.202164 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
429 07:05:01.208774 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
430 07:05:01.215297 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
431 07:05:01.221908 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
432 07:05:01.228420 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
433 07:05:01.228545 Unable to locate Global NVS
434 07:05:01.238453 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
435 07:05:01.241988 Clearing SMI status registers
436 07:05:01.242082 SMI_STS: PM1
437 07:05:01.245094 PM1_STS: PWRBTN
438 07:05:01.251725 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
439 07:05:01.255060 In relocation handler: CPU 0
440 07:05:01.258084 New SMBASE=0x7b000000 IEDBASE=0x7b400000
441 07:05:01.264967 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 07:05:01.265060 Relocation complete.
443 07:05:01.274942 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
444 07:05:01.278039 In relocation handler: CPU 1
445 07:05:01.281500 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
446 07:05:01.281597 Relocation complete.
447 07:05:01.291469 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
448 07:05:01.291565 In relocation handler: CPU 3
449 07:05:01.297993 New SMBASE=0x7afff400 IEDBASE=0x7b400000
450 07:05:01.298088 Relocation complete.
451 07:05:01.308161 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
452 07:05:01.308257 In relocation handler: CPU 6
453 07:05:01.314284 New SMBASE=0x7affe800 IEDBASE=0x7b400000
454 07:05:01.317836 Writing SMRR. base = 0x7b000006, mask=0xff800c00
455 07:05:01.321002 Relocation complete.
456 07:05:01.327835 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
457 07:05:01.331011 In relocation handler: CPU 2
458 07:05:01.334169 New SMBASE=0x7afff800 IEDBASE=0x7b400000
459 07:05:01.338010 Relocation complete.
460 07:05:01.344315 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
461 07:05:01.348139 In relocation handler: CPU 5
462 07:05:01.350976 New SMBASE=0x7affec00 IEDBASE=0x7b400000
463 07:05:01.357225 Writing SMRR. base = 0x7b000006, mask=0xff800c00
464 07:05:01.357319 Relocation complete.
465 07:05:01.363910 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
466 07:05:01.367678 In relocation handler: CPU 4
467 07:05:01.373854 New SMBASE=0x7afff000 IEDBASE=0x7b400000
468 07:05:01.377580 Writing SMRR. base = 0x7b000006, mask=0xff800c00
469 07:05:01.380688 Relocation complete.
470 07:05:01.387127 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
471 07:05:01.390403 In relocation handler: CPU 7
472 07:05:01.393801 New SMBASE=0x7affe400 IEDBASE=0x7b400000
473 07:05:01.397160 Relocation complete.
474 07:05:01.397285 Initializing CPU #0
475 07:05:01.400326 CPU: vendor Intel device 806c1
476 07:05:01.404309 CPU: family 06, model 8c, stepping 01
477 07:05:01.406906 Clearing out pending MCEs
478 07:05:01.410469 Setting up local APIC...
479 07:05:01.413895 apic_id: 0x00 done.
480 07:05:01.417013 Turbo is available but hidden
481 07:05:01.420164 Turbo is available and visible
482 07:05:01.423571 microcode: Update skipped, already up-to-date
483 07:05:01.426978 CPU #0 initialized
484 07:05:01.427072 Initializing CPU #7
485 07:05:01.430350 Initializing CPU #2
486 07:05:01.433560 Initializing CPU #5
487 07:05:01.433653 CPU: vendor Intel device 806c1
488 07:05:01.440027 CPU: family 06, model 8c, stepping 01
489 07:05:01.443481 CPU: vendor Intel device 806c1
490 07:05:01.446688 CPU: family 06, model 8c, stepping 01
491 07:05:01.449959 Clearing out pending MCEs
492 07:05:01.450052 Clearing out pending MCEs
493 07:05:01.453454 Setting up local APIC...
494 07:05:01.457128 Initializing CPU #6
495 07:05:01.457243 Initializing CPU #3
496 07:05:01.460280 CPU: vendor Intel device 806c1
497 07:05:01.463885 CPU: family 06, model 8c, stepping 01
498 07:05:01.466606 CPU: vendor Intel device 806c1
499 07:05:01.470036 CPU: family 06, model 8c, stepping 01
500 07:05:01.473336 Clearing out pending MCEs
501 07:05:01.476840 Clearing out pending MCEs
502 07:05:01.480330 Setting up local APIC...
503 07:05:01.480422 apic_id: 0x05 done.
504 07:05:01.483994 Setting up local APIC...
505 07:05:01.487174 Initializing CPU #1
506 07:05:01.487266 apic_id: 0x04 done.
507 07:05:01.494241 microcode: Update skipped, already up-to-date
508 07:05:01.497709 microcode: Update skipped, already up-to-date
509 07:05:01.500732 Setting up local APIC...
510 07:05:01.500824 Initializing CPU #4
511 07:05:01.503822 CPU: vendor Intel device 806c1
512 07:05:01.511173 CPU: family 06, model 8c, stepping 01
513 07:05:01.511267 CPU: vendor Intel device 806c1
514 07:05:01.517117 CPU: family 06, model 8c, stepping 01
515 07:05:01.517234 Clearing out pending MCEs
516 07:05:01.520500 Clearing out pending MCEs
517 07:05:01.523744 Setting up local APIC...
518 07:05:01.527458 apic_id: 0x06 done.
519 07:05:01.527551 apic_id: 0x07 done.
520 07:05:01.533922 microcode: Update skipped, already up-to-date
521 07:05:01.537122 microcode: Update skipped, already up-to-date
522 07:05:01.540503 CPU #6 initialized
523 07:05:01.540611 CPU #3 initialized
524 07:05:01.543749 CPU #2 initialized
525 07:05:01.543841 CPU #5 initialized
526 07:05:01.547075 apic_id: 0x03 done.
527 07:05:01.550630 CPU: vendor Intel device 806c1
528 07:05:01.554138 CPU: family 06, model 8c, stepping 01
529 07:05:01.557038 Setting up local APIC...
530 07:05:01.560622 Clearing out pending MCEs
531 07:05:01.563887 microcode: Update skipped, already up-to-date
532 07:05:01.567198 apic_id: 0x02 done.
533 07:05:01.567291 CPU #7 initialized
534 07:05:01.573680 microcode: Update skipped, already up-to-date
535 07:05:01.573773 Setting up local APIC...
536 07:05:01.577051 CPU #4 initialized
537 07:05:01.580247 apic_id: 0x01 done.
538 07:05:01.583842 microcode: Update skipped, already up-to-date
539 07:05:01.586826 CPU #1 initialized
540 07:05:01.590542 bsp_do_flight_plan done after 454 msecs.
541 07:05:01.593894 CPU: frequency set to 4400 MHz
542 07:05:01.593989 Enabling SMIs.
543 07:05:01.600070 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
544 07:05:01.617174 SATAXPCIE1 indicates PCIe NVMe is present
545 07:05:01.620562 Probing TPM: done!
546 07:05:01.624075 Connected to device vid:did:rid of 1ae0:0028:00
547 07:05:01.635006 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
548 07:05:01.638236 Initialized TPM device CR50 revision 0
549 07:05:01.641381 Enabling S0i3.4
550 07:05:01.647512 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
551 07:05:01.650992 Found a VBT of 8704 bytes after decompression
552 07:05:01.657648 cse_lite: CSE RO boot. HybridStorageMode disabled
553 07:05:01.664356 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
554 07:05:01.739367 FSPS returned 0
555 07:05:01.742652 Executing Phase 1 of FspMultiPhaseSiInit
556 07:05:01.752507 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
557 07:05:01.755979 port C0 DISC req: usage 1 usb3 1 usb2 5
558 07:05:01.759251 Raw Buffer output 0 00000511
559 07:05:01.762869 Raw Buffer output 1 00000000
560 07:05:01.766429 pmc_send_ipc_cmd succeeded
561 07:05:01.772560 port C1 DISC req: usage 1 usb3 2 usb2 3
562 07:05:01.772936 Raw Buffer output 0 00000321
563 07:05:01.775895 Raw Buffer output 1 00000000
564 07:05:01.780364 pmc_send_ipc_cmd succeeded
565 07:05:01.785419 Detected 4 core, 8 thread CPU.
566 07:05:01.789155 Detected 4 core, 8 thread CPU.
567 07:05:01.989505 Display FSP Version Info HOB
568 07:05:01.992167 Reference Code - CPU = a.0.4c.31
569 07:05:01.995963 uCode Version = 0.0.0.86
570 07:05:01.998744 TXT ACM version = ff.ff.ff.ffff
571 07:05:02.002183 Reference Code - ME = a.0.4c.31
572 07:05:02.005887 MEBx version = 0.0.0.0
573 07:05:02.008868 ME Firmware Version = Consumer SKU
574 07:05:02.012686 Reference Code - PCH = a.0.4c.31
575 07:05:02.015974 PCH-CRID Status = Disabled
576 07:05:02.019141 PCH-CRID Original Value = ff.ff.ff.ffff
577 07:05:02.022060 PCH-CRID New Value = ff.ff.ff.ffff
578 07:05:02.025514 OPROM - RST - RAID = ff.ff.ff.ffff
579 07:05:02.028982 PCH Hsio Version = 4.0.0.0
580 07:05:02.032386 Reference Code - SA - System Agent = a.0.4c.31
581 07:05:02.035407 Reference Code - MRC = 2.0.0.1
582 07:05:02.038983 SA - PCIe Version = a.0.4c.31
583 07:05:02.041874 SA-CRID Status = Disabled
584 07:05:02.045774 SA-CRID Original Value = 0.0.0.1
585 07:05:02.048709 SA-CRID New Value = 0.0.0.1
586 07:05:02.052258 OPROM - VBIOS = ff.ff.ff.ffff
587 07:05:02.055616 IO Manageability Engine FW Version = 11.1.4.0
588 07:05:02.058870 PHY Build Version = 0.0.0.e0
589 07:05:02.062430 Thunderbolt(TM) FW Version = 0.0.0.0
590 07:05:02.070161 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
591 07:05:02.070689 ITSS IRQ Polarities Before:
592 07:05:02.073759 IPC0: 0xffffffff
593 07:05:02.074254 IPC1: 0xffffffff
594 07:05:02.077146 IPC2: 0xffffffff
595 07:05:02.077696 IPC3: 0xffffffff
596 07:05:02.079909 ITSS IRQ Polarities After:
597 07:05:02.083398 IPC0: 0xffffffff
598 07:05:02.083936 IPC1: 0xffffffff
599 07:05:02.086759 IPC2: 0xffffffff
600 07:05:02.087178 IPC3: 0xffffffff
601 07:05:02.093241 Found PCIe Root Port #9 at PCI: 00:1d.0.
602 07:05:02.103214 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
603 07:05:02.116547 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
604 07:05:02.126708 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
605 07:05:02.132985 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
606 07:05:02.136839 Enumerating buses...
607 07:05:02.139975 Show all devs... Before device enumeration.
608 07:05:02.143334 Root Device: enabled 1
609 07:05:02.146562 DOMAIN: 0000: enabled 1
610 07:05:02.149846 CPU_CLUSTER: 0: enabled 1
611 07:05:02.150245 PCI: 00:00.0: enabled 1
612 07:05:02.153345 PCI: 00:02.0: enabled 1
613 07:05:02.156618 PCI: 00:04.0: enabled 1
614 07:05:02.159955 PCI: 00:05.0: enabled 1
615 07:05:02.160451 PCI: 00:06.0: enabled 0
616 07:05:02.163097 PCI: 00:07.0: enabled 0
617 07:05:02.166151 PCI: 00:07.1: enabled 0
618 07:05:02.169782 PCI: 00:07.2: enabled 0
619 07:05:02.170280 PCI: 00:07.3: enabled 0
620 07:05:02.172734 PCI: 00:08.0: enabled 1
621 07:05:02.176570 PCI: 00:09.0: enabled 0
622 07:05:02.177060 PCI: 00:0a.0: enabled 0
623 07:05:02.179808 PCI: 00:0d.0: enabled 1
624 07:05:02.183192 PCI: 00:0d.1: enabled 0
625 07:05:02.186000 PCI: 00:0d.2: enabled 0
626 07:05:02.186398 PCI: 00:0d.3: enabled 0
627 07:05:02.190059 PCI: 00:0e.0: enabled 0
628 07:05:02.193006 PCI: 00:10.2: enabled 1
629 07:05:02.196047 PCI: 00:10.6: enabled 0
630 07:05:02.196441 PCI: 00:10.7: enabled 0
631 07:05:02.199700 PCI: 00:12.0: enabled 0
632 07:05:02.202803 PCI: 00:12.6: enabled 0
633 07:05:02.206332 PCI: 00:13.0: enabled 0
634 07:05:02.206728 PCI: 00:14.0: enabled 1
635 07:05:02.209805 PCI: 00:14.1: enabled 0
636 07:05:02.212903 PCI: 00:14.2: enabled 1
637 07:05:02.213349 PCI: 00:14.3: enabled 1
638 07:05:02.216411 PCI: 00:15.0: enabled 1
639 07:05:02.219932 PCI: 00:15.1: enabled 1
640 07:05:02.222510 PCI: 00:15.2: enabled 1
641 07:05:02.222909 PCI: 00:15.3: enabled 1
642 07:05:02.225943 PCI: 00:16.0: enabled 1
643 07:05:02.229012 PCI: 00:16.1: enabled 0
644 07:05:02.232640 PCI: 00:16.2: enabled 0
645 07:05:02.233108 PCI: 00:16.3: enabled 0
646 07:05:02.235828 PCI: 00:16.4: enabled 0
647 07:05:02.239259 PCI: 00:16.5: enabled 0
648 07:05:02.242538 PCI: 00:17.0: enabled 1
649 07:05:02.243009 PCI: 00:19.0: enabled 0
650 07:05:02.245882 PCI: 00:19.1: enabled 1
651 07:05:02.249179 PCI: 00:19.2: enabled 0
652 07:05:02.252162 PCI: 00:1c.0: enabled 1
653 07:05:02.252528 PCI: 00:1c.1: enabled 0
654 07:05:02.255919 PCI: 00:1c.2: enabled 0
655 07:05:02.259090 PCI: 00:1c.3: enabled 0
656 07:05:02.259557 PCI: 00:1c.4: enabled 0
657 07:05:02.262328 PCI: 00:1c.5: enabled 0
658 07:05:02.265461 PCI: 00:1c.6: enabled 1
659 07:05:02.269059 PCI: 00:1c.7: enabled 0
660 07:05:02.269563 PCI: 00:1d.0: enabled 1
661 07:05:02.272433 PCI: 00:1d.1: enabled 0
662 07:05:02.275591 PCI: 00:1d.2: enabled 1
663 07:05:02.279648 PCI: 00:1d.3: enabled 0
664 07:05:02.280124 PCI: 00:1e.0: enabled 1
665 07:05:02.282797 PCI: 00:1e.1: enabled 0
666 07:05:02.285855 PCI: 00:1e.2: enabled 1
667 07:05:02.288941 PCI: 00:1e.3: enabled 1
668 07:05:02.289449 PCI: 00:1f.0: enabled 1
669 07:05:02.292510 PCI: 00:1f.1: enabled 0
670 07:05:02.295206 PCI: 00:1f.2: enabled 1
671 07:05:02.298949 PCI: 00:1f.3: enabled 1
672 07:05:02.299452 PCI: 00:1f.4: enabled 0
673 07:05:02.302185 PCI: 00:1f.5: enabled 1
674 07:05:02.305127 PCI: 00:1f.6: enabled 0
675 07:05:02.305701 PCI: 00:1f.7: enabled 0
676 07:05:02.308652 APIC: 00: enabled 1
677 07:05:02.312098 GENERIC: 0.0: enabled 1
678 07:05:02.315519 GENERIC: 0.0: enabled 1
679 07:05:02.316014 GENERIC: 1.0: enabled 1
680 07:05:02.318997 GENERIC: 0.0: enabled 1
681 07:05:02.322529 GENERIC: 1.0: enabled 1
682 07:05:02.323027 USB0 port 0: enabled 1
683 07:05:02.325422 GENERIC: 0.0: enabled 1
684 07:05:02.329607 USB0 port 0: enabled 1
685 07:05:02.332350 GENERIC: 0.0: enabled 1
686 07:05:02.332885 I2C: 00:1a: enabled 1
687 07:05:02.335322 I2C: 00:31: enabled 1
688 07:05:02.338701 I2C: 00:32: enabled 1
689 07:05:02.339236 I2C: 00:10: enabled 1
690 07:05:02.342173 I2C: 00:15: enabled 1
691 07:05:02.345098 GENERIC: 0.0: enabled 0
692 07:05:02.348829 GENERIC: 1.0: enabled 0
693 07:05:02.349406 GENERIC: 0.0: enabled 1
694 07:05:02.351990 SPI: 00: enabled 1
695 07:05:02.352521 SPI: 00: enabled 1
696 07:05:02.355190 PNP: 0c09.0: enabled 1
697 07:05:02.358830 GENERIC: 0.0: enabled 1
698 07:05:02.362284 USB3 port 0: enabled 1
699 07:05:02.362817 USB3 port 1: enabled 1
700 07:05:02.365181 USB3 port 2: enabled 0
701 07:05:02.368550 USB3 port 3: enabled 0
702 07:05:02.369084 USB2 port 0: enabled 0
703 07:05:02.372320 USB2 port 1: enabled 1
704 07:05:02.375218 USB2 port 2: enabled 1
705 07:05:02.378698 USB2 port 3: enabled 0
706 07:05:02.379229 USB2 port 4: enabled 1
707 07:05:02.381981 USB2 port 5: enabled 0
708 07:05:02.385310 USB2 port 6: enabled 0
709 07:05:02.385842 USB2 port 7: enabled 0
710 07:05:02.388638 USB2 port 8: enabled 0
711 07:05:02.391588 USB2 port 9: enabled 0
712 07:05:02.392020 USB3 port 0: enabled 0
713 07:05:02.395678 USB3 port 1: enabled 1
714 07:05:02.398230 USB3 port 2: enabled 0
715 07:05:02.401913 USB3 port 3: enabled 0
716 07:05:02.402445 GENERIC: 0.0: enabled 1
717 07:05:02.404881 GENERIC: 1.0: enabled 1
718 07:05:02.408255 APIC: 01: enabled 1
719 07:05:02.408685 APIC: 05: enabled 1
720 07:05:02.411724 APIC: 07: enabled 1
721 07:05:02.414783 APIC: 02: enabled 1
722 07:05:02.415222 APIC: 04: enabled 1
723 07:05:02.418398 APIC: 06: enabled 1
724 07:05:02.418801 APIC: 03: enabled 1
725 07:05:02.421639 Compare with tree...
726 07:05:02.424646 Root Device: enabled 1
727 07:05:02.428703 DOMAIN: 0000: enabled 1
728 07:05:02.429224 PCI: 00:00.0: enabled 1
729 07:05:02.431897 PCI: 00:02.0: enabled 1
730 07:05:02.434804 PCI: 00:04.0: enabled 1
731 07:05:02.437807 GENERIC: 0.0: enabled 1
732 07:05:02.441831 PCI: 00:05.0: enabled 1
733 07:05:02.442325 PCI: 00:06.0: enabled 0
734 07:05:02.444900 PCI: 00:07.0: enabled 0
735 07:05:02.448219 GENERIC: 0.0: enabled 1
736 07:05:02.451735 PCI: 00:07.1: enabled 0
737 07:05:02.454908 GENERIC: 1.0: enabled 1
738 07:05:02.455411 PCI: 00:07.2: enabled 0
739 07:05:02.458081 GENERIC: 0.0: enabled 1
740 07:05:02.461584 PCI: 00:07.3: enabled 0
741 07:05:02.464894 GENERIC: 1.0: enabled 1
742 07:05:02.468226 PCI: 00:08.0: enabled 1
743 07:05:02.468757 PCI: 00:09.0: enabled 0
744 07:05:02.471858 PCI: 00:0a.0: enabled 0
745 07:05:02.474827 PCI: 00:0d.0: enabled 1
746 07:05:02.478153 USB0 port 0: enabled 1
747 07:05:02.481161 USB3 port 0: enabled 1
748 07:05:02.481624 USB3 port 1: enabled 1
749 07:05:02.485023 USB3 port 2: enabled 0
750 07:05:02.488100 USB3 port 3: enabled 0
751 07:05:02.491378 PCI: 00:0d.1: enabled 0
752 07:05:02.494987 PCI: 00:0d.2: enabled 0
753 07:05:02.495521 GENERIC: 0.0: enabled 1
754 07:05:02.498061 PCI: 00:0d.3: enabled 0
755 07:05:02.501440 PCI: 00:0e.0: enabled 0
756 07:05:02.504458 PCI: 00:10.2: enabled 1
757 07:05:02.507941 PCI: 00:10.6: enabled 0
758 07:05:02.508377 PCI: 00:10.7: enabled 0
759 07:05:02.511279 PCI: 00:12.0: enabled 0
760 07:05:02.514266 PCI: 00:12.6: enabled 0
761 07:05:02.517875 PCI: 00:13.0: enabled 0
762 07:05:02.520832 PCI: 00:14.0: enabled 1
763 07:05:02.521303 USB0 port 0: enabled 1
764 07:05:02.524854 USB2 port 0: enabled 0
765 07:05:02.527742 USB2 port 1: enabled 1
766 07:05:02.531014 USB2 port 2: enabled 1
767 07:05:02.534458 USB2 port 3: enabled 0
768 07:05:02.537648 USB2 port 4: enabled 1
769 07:05:02.538092 USB2 port 5: enabled 0
770 07:05:02.541058 USB2 port 6: enabled 0
771 07:05:02.544715 USB2 port 7: enabled 0
772 07:05:02.547677 USB2 port 8: enabled 0
773 07:05:02.551159 USB2 port 9: enabled 0
774 07:05:02.551693 USB3 port 0: enabled 0
775 07:05:02.554403 USB3 port 1: enabled 1
776 07:05:02.558015 USB3 port 2: enabled 0
777 07:05:02.561150 USB3 port 3: enabled 0
778 07:05:02.564852 PCI: 00:14.1: enabled 0
779 07:05:02.567760 PCI: 00:14.2: enabled 1
780 07:05:02.568291 PCI: 00:14.3: enabled 1
781 07:05:02.570809 GENERIC: 0.0: enabled 1
782 07:05:02.574414 PCI: 00:15.0: enabled 1
783 07:05:02.578011 I2C: 00:1a: enabled 1
784 07:05:02.578549 I2C: 00:31: enabled 1
785 07:05:02.581146 I2C: 00:32: enabled 1
786 07:05:02.584265 PCI: 00:15.1: enabled 1
787 07:05:02.587626 I2C: 00:10: enabled 1
788 07:05:02.591210 PCI: 00:15.2: enabled 1
789 07:05:02.591743 PCI: 00:15.3: enabled 1
790 07:05:02.594201 PCI: 00:16.0: enabled 1
791 07:05:02.597794 PCI: 00:16.1: enabled 0
792 07:05:02.600952 PCI: 00:16.2: enabled 0
793 07:05:02.604122 PCI: 00:16.3: enabled 0
794 07:05:02.604567 PCI: 00:16.4: enabled 0
795 07:05:02.607663 PCI: 00:16.5: enabled 0
796 07:05:02.611060 PCI: 00:17.0: enabled 1
797 07:05:02.614173 PCI: 00:19.0: enabled 0
798 07:05:02.617746 PCI: 00:19.1: enabled 1
799 07:05:02.618189 I2C: 00:15: enabled 1
800 07:05:02.620963 PCI: 00:19.2: enabled 0
801 07:05:02.624132 PCI: 00:1d.0: enabled 1
802 07:05:02.627467 GENERIC: 0.0: enabled 1
803 07:05:02.628051 PCI: 00:1e.0: enabled 1
804 07:05:02.630471 PCI: 00:1e.1: enabled 0
805 07:05:02.634208 PCI: 00:1e.2: enabled 1
806 07:05:02.637369 SPI: 00: enabled 1
807 07:05:02.640597 PCI: 00:1e.3: enabled 1
808 07:05:02.641096 SPI: 00: enabled 1
809 07:05:02.644356 PCI: 00:1f.0: enabled 1
810 07:05:02.647750 PNP: 0c09.0: enabled 1
811 07:05:02.651328 PCI: 00:1f.1: enabled 0
812 07:05:02.651863 PCI: 00:1f.2: enabled 1
813 07:05:02.653857 GENERIC: 0.0: enabled 1
814 07:05:02.657861 GENERIC: 0.0: enabled 1
815 07:05:02.660645 GENERIC: 1.0: enabled 1
816 07:05:02.663995 PCI: 00:1f.3: enabled 1
817 07:05:02.667221 PCI: 00:1f.4: enabled 0
818 07:05:02.667755 PCI: 00:1f.5: enabled 1
819 07:05:02.670576 PCI: 00:1f.6: enabled 0
820 07:05:02.673956 PCI: 00:1f.7: enabled 0
821 07:05:02.677413 CPU_CLUSTER: 0: enabled 1
822 07:05:02.677862 APIC: 00: enabled 1
823 07:05:02.680574 APIC: 01: enabled 1
824 07:05:02.732185 APIC: 05: enabled 1
825 07:05:02.732715 APIC: 07: enabled 1
826 07:05:02.733069 APIC: 02: enabled 1
827 07:05:02.733445 APIC: 04: enabled 1
828 07:05:02.733769 APIC: 06: enabled 1
829 07:05:02.734079 APIC: 03: enabled 1
830 07:05:02.734720 Root Device scanning...
831 07:05:02.735069 scan_static_bus for Root Device
832 07:05:02.735376 DOMAIN: 0000 enabled
833 07:05:02.735674 CPU_CLUSTER: 0 enabled
834 07:05:02.735990 DOMAIN: 0000 scanning...
835 07:05:02.736288 PCI: pci_scan_bus for bus 00
836 07:05:02.736574 PCI: 00:00.0 [8086/0000] ops
837 07:05:02.736859 PCI: 00:00.0 [8086/9a12] enabled
838 07:05:02.737175 PCI: 00:02.0 [8086/0000] bus ops
839 07:05:02.737557 PCI: 00:02.0 [8086/9a40] enabled
840 07:05:02.737853 PCI: 00:04.0 [8086/0000] bus ops
841 07:05:02.738144 PCI: 00:04.0 [8086/9a03] enabled
842 07:05:02.775761 PCI: 00:05.0 [8086/9a19] enabled
843 07:05:02.776348 PCI: 00:07.0 [0000/0000] hidden
844 07:05:02.776712 PCI: 00:08.0 [8086/9a11] enabled
845 07:05:02.777037 PCI: 00:0a.0 [8086/9a0d] disabled
846 07:05:02.777407 PCI: 00:0d.0 [8086/0000] bus ops
847 07:05:02.777713 PCI: 00:0d.0 [8086/9a13] enabled
848 07:05:02.778371 PCI: 00:14.0 [8086/0000] bus ops
849 07:05:02.778710 PCI: 00:14.0 [8086/a0ed] enabled
850 07:05:02.779012 PCI: 00:14.2 [8086/a0ef] enabled
851 07:05:02.779303 PCI: 00:14.3 [8086/0000] bus ops
852 07:05:02.779599 PCI: 00:14.3 [8086/a0f0] enabled
853 07:05:02.779889 PCI: 00:15.0 [8086/0000] bus ops
854 07:05:02.780484 PCI: 00:15.0 [8086/a0e8] enabled
855 07:05:02.782825 PCI: 00:15.1 [8086/0000] bus ops
856 07:05:02.783370 PCI: 00:15.1 [8086/a0e9] enabled
857 07:05:02.786092 PCI: 00:15.2 [8086/0000] bus ops
858 07:05:02.789832 PCI: 00:15.2 [8086/a0ea] enabled
859 07:05:02.792849 PCI: 00:15.3 [8086/0000] bus ops
860 07:05:02.795830 PCI: 00:15.3 [8086/a0eb] enabled
861 07:05:02.799076 PCI: 00:16.0 [8086/0000] ops
862 07:05:02.802968 PCI: 00:16.0 [8086/a0e0] enabled
863 07:05:02.805830 PCI: Static device PCI: 00:17.0 not found, disabling it.
864 07:05:02.809032 PCI: 00:19.0 [8086/0000] bus ops
865 07:05:02.812972 PCI: 00:19.0 [8086/a0c5] disabled
866 07:05:02.816282 PCI: 00:19.1 [8086/0000] bus ops
867 07:05:02.819156 PCI: 00:19.1 [8086/a0c6] enabled
868 07:05:02.822724 PCI: 00:1d.0 [8086/0000] bus ops
869 07:05:02.825663 PCI: 00:1d.0 [8086/a0b0] enabled
870 07:05:02.829143 PCI: 00:1e.0 [8086/0000] ops
871 07:05:02.832369 PCI: 00:1e.0 [8086/a0a8] enabled
872 07:05:02.835805 PCI: 00:1e.2 [8086/0000] bus ops
873 07:05:02.839408 PCI: 00:1e.2 [8086/a0aa] enabled
874 07:05:02.842182 PCI: 00:1e.3 [8086/0000] bus ops
875 07:05:02.845836 PCI: 00:1e.3 [8086/a0ab] enabled
876 07:05:02.849178 PCI: 00:1f.0 [8086/0000] bus ops
877 07:05:02.852611 PCI: 00:1f.0 [8086/a087] enabled
878 07:05:02.856268 RTC Init
879 07:05:02.859088 Set power on after power failure.
880 07:05:02.859617 Disabling Deep S3
881 07:05:02.862297 Disabling Deep S3
882 07:05:02.862829 Disabling Deep S4
883 07:05:02.865838 Disabling Deep S4
884 07:05:02.868934 Disabling Deep S5
885 07:05:02.869520 Disabling Deep S5
886 07:05:02.872256 PCI: 00:1f.2 [0000/0000] hidden
887 07:05:02.875699 PCI: 00:1f.3 [8086/0000] bus ops
888 07:05:02.879021 PCI: 00:1f.3 [8086/a0c8] enabled
889 07:05:02.881803 PCI: 00:1f.5 [8086/0000] bus ops
890 07:05:02.885579 PCI: 00:1f.5 [8086/a0a4] enabled
891 07:05:02.889273 PCI: Leftover static devices:
892 07:05:02.889813 PCI: 00:10.2
893 07:05:02.892286 PCI: 00:10.6
894 07:05:02.892813 PCI: 00:10.7
895 07:05:02.895432 PCI: 00:06.0
896 07:05:02.895965 PCI: 00:07.1
897 07:05:02.899304 PCI: 00:07.2
898 07:05:02.899834 PCI: 00:07.3
899 07:05:02.900182 PCI: 00:09.0
900 07:05:02.901705 PCI: 00:0d.1
901 07:05:02.902140 PCI: 00:0d.2
902 07:05:02.905186 PCI: 00:0d.3
903 07:05:02.905766 PCI: 00:0e.0
904 07:05:02.906185 PCI: 00:12.0
905 07:05:02.908322 PCI: 00:12.6
906 07:05:02.908761 PCI: 00:13.0
907 07:05:02.911895 PCI: 00:14.1
908 07:05:02.912425 PCI: 00:16.1
909 07:05:02.912774 PCI: 00:16.2
910 07:05:02.915431 PCI: 00:16.3
911 07:05:02.915964 PCI: 00:16.4
912 07:05:02.918503 PCI: 00:16.5
913 07:05:02.919036 PCI: 00:17.0
914 07:05:02.921965 PCI: 00:19.2
915 07:05:02.922401 PCI: 00:1e.1
916 07:05:02.922745 PCI: 00:1f.1
917 07:05:02.925463 PCI: 00:1f.4
918 07:05:02.925983 PCI: 00:1f.6
919 07:05:02.928447 PCI: 00:1f.7
920 07:05:02.932190 PCI: Check your devicetree.cb.
921 07:05:02.932673 PCI: 00:02.0 scanning...
922 07:05:02.935556 scan_generic_bus for PCI: 00:02.0
923 07:05:02.942192 scan_generic_bus for PCI: 00:02.0 done
924 07:05:02.944928 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
925 07:05:02.948245 PCI: 00:04.0 scanning...
926 07:05:02.951400 scan_generic_bus for PCI: 00:04.0
927 07:05:02.954643 GENERIC: 0.0 enabled
928 07:05:02.958092 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
929 07:05:02.964860 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
930 07:05:02.968747 PCI: 00:0d.0 scanning...
931 07:05:02.971495 scan_static_bus for PCI: 00:0d.0
932 07:05:02.971978 USB0 port 0 enabled
933 07:05:02.974784 USB0 port 0 scanning...
934 07:05:02.978256 scan_static_bus for USB0 port 0
935 07:05:02.981273 USB3 port 0 enabled
936 07:05:02.981774 USB3 port 1 enabled
937 07:05:02.985004 USB3 port 2 disabled
938 07:05:02.987845 USB3 port 3 disabled
939 07:05:02.988269 USB3 port 0 scanning...
940 07:05:02.991222 scan_static_bus for USB3 port 0
941 07:05:02.994567 scan_static_bus for USB3 port 0 done
942 07:05:03.001358 scan_bus: bus USB3 port 0 finished in 6 msecs
943 07:05:03.004547 USB3 port 1 scanning...
944 07:05:03.007602 scan_static_bus for USB3 port 1
945 07:05:03.011264 scan_static_bus for USB3 port 1 done
946 07:05:03.014532 scan_bus: bus USB3 port 1 finished in 6 msecs
947 07:05:03.018142 scan_static_bus for USB0 port 0 done
948 07:05:03.024405 scan_bus: bus USB0 port 0 finished in 43 msecs
949 07:05:03.027912 scan_static_bus for PCI: 00:0d.0 done
950 07:05:03.031102 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
951 07:05:03.034480 PCI: 00:14.0 scanning...
952 07:05:03.037481 scan_static_bus for PCI: 00:14.0
953 07:05:03.040942 USB0 port 0 enabled
954 07:05:03.041501 USB0 port 0 scanning...
955 07:05:03.044527 scan_static_bus for USB0 port 0
956 07:05:03.047685 USB2 port 0 disabled
957 07:05:03.051192 USB2 port 1 enabled
958 07:05:03.051613 USB2 port 2 enabled
959 07:05:03.054310 USB2 port 3 disabled
960 07:05:03.057797 USB2 port 4 enabled
961 07:05:03.058319 USB2 port 5 disabled
962 07:05:03.061075 USB2 port 6 disabled
963 07:05:03.064623 USB2 port 7 disabled
964 07:05:03.065146 USB2 port 8 disabled
965 07:05:03.067900 USB2 port 9 disabled
966 07:05:03.068418 USB3 port 0 disabled
967 07:05:03.071544 USB3 port 1 enabled
968 07:05:03.074748 USB3 port 2 disabled
969 07:05:03.075252 USB3 port 3 disabled
970 07:05:03.077700 USB2 port 1 scanning...
971 07:05:03.080955 scan_static_bus for USB2 port 1
972 07:05:03.084297 scan_static_bus for USB2 port 1 done
973 07:05:03.090880 scan_bus: bus USB2 port 1 finished in 6 msecs
974 07:05:03.091413 USB2 port 2 scanning...
975 07:05:03.094376 scan_static_bus for USB2 port 2
976 07:05:03.101243 scan_static_bus for USB2 port 2 done
977 07:05:03.104274 scan_bus: bus USB2 port 2 finished in 6 msecs
978 07:05:03.107241 USB2 port 4 scanning...
979 07:05:03.110755 scan_static_bus for USB2 port 4
980 07:05:03.114577 scan_static_bus for USB2 port 4 done
981 07:05:03.117300 scan_bus: bus USB2 port 4 finished in 6 msecs
982 07:05:03.120906 USB3 port 1 scanning...
983 07:05:03.124229 scan_static_bus for USB3 port 1
984 07:05:03.127745 scan_static_bus for USB3 port 1 done
985 07:05:03.133936 scan_bus: bus USB3 port 1 finished in 6 msecs
986 07:05:03.137766 scan_static_bus for USB0 port 0 done
987 07:05:03.140998 scan_bus: bus USB0 port 0 finished in 93 msecs
988 07:05:03.144341 scan_static_bus for PCI: 00:14.0 done
989 07:05:03.150341 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
990 07:05:03.150899 PCI: 00:14.3 scanning...
991 07:05:03.153799 scan_static_bus for PCI: 00:14.3
992 07:05:03.157666 GENERIC: 0.0 enabled
993 07:05:03.160582 scan_static_bus for PCI: 00:14.3 done
994 07:05:03.167444 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
995 07:05:03.167985 PCI: 00:15.0 scanning...
996 07:05:03.170863 scan_static_bus for PCI: 00:15.0
997 07:05:03.174513 I2C: 00:1a enabled
998 07:05:03.177255 I2C: 00:31 enabled
999 07:05:03.177792 I2C: 00:32 enabled
1000 07:05:03.180928 scan_static_bus for PCI: 00:15.0 done
1001 07:05:03.187489 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1002 07:05:03.190313 PCI: 00:15.1 scanning...
1003 07:05:03.193810 scan_static_bus for PCI: 00:15.1
1004 07:05:03.194362 I2C: 00:10 enabled
1005 07:05:03.197023 scan_static_bus for PCI: 00:15.1 done
1006 07:05:03.203752 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1007 07:05:03.206599 PCI: 00:15.2 scanning...
1008 07:05:03.209988 scan_static_bus for PCI: 00:15.2
1009 07:05:03.214090 scan_static_bus for PCI: 00:15.2 done
1010 07:05:03.216963 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1011 07:05:03.220211 PCI: 00:15.3 scanning...
1012 07:05:03.223516 scan_static_bus for PCI: 00:15.3
1013 07:05:03.226693 scan_static_bus for PCI: 00:15.3 done
1014 07:05:03.233403 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1015 07:05:03.233933 PCI: 00:19.1 scanning...
1016 07:05:03.237189 scan_static_bus for PCI: 00:19.1
1017 07:05:03.240390 I2C: 00:15 enabled
1018 07:05:03.243787 scan_static_bus for PCI: 00:19.1 done
1019 07:05:03.249963 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1020 07:05:03.250559 PCI: 00:1d.0 scanning...
1021 07:05:03.257370 do_pci_scan_bridge for PCI: 00:1d.0
1022 07:05:03.257903 PCI: pci_scan_bus for bus 01
1023 07:05:03.260615 PCI: 01:00.0 [15b7/5009] enabled
1024 07:05:03.263657 GENERIC: 0.0 enabled
1025 07:05:03.266814 Enabling Common Clock Configuration
1026 07:05:03.273398 L1 Sub-State supported from root port 29
1027 07:05:03.273932 L1 Sub-State Support = 0x5
1028 07:05:03.276430 CommonModeRestoreTime = 0x28
1029 07:05:03.283705 Power On Value = 0x16, Power On Scale = 0x0
1030 07:05:03.284236 ASPM: Enabled L1
1031 07:05:03.286427 PCIe: Max_Payload_Size adjusted to 128
1032 07:05:03.293093 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1033 07:05:03.296382 PCI: 00:1e.2 scanning...
1034 07:05:03.299810 scan_generic_bus for PCI: 00:1e.2
1035 07:05:03.300246 SPI: 00 enabled
1036 07:05:03.306248 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1037 07:05:03.309887 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1038 07:05:03.313476 PCI: 00:1e.3 scanning...
1039 07:05:03.316811 scan_generic_bus for PCI: 00:1e.3
1040 07:05:03.320337 SPI: 00 enabled
1041 07:05:03.324060 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1042 07:05:03.330549 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1043 07:05:03.333326 PCI: 00:1f.0 scanning...
1044 07:05:03.336998 scan_static_bus for PCI: 00:1f.0
1045 07:05:03.337583 PNP: 0c09.0 enabled
1046 07:05:03.340089 PNP: 0c09.0 scanning...
1047 07:05:03.343700 scan_static_bus for PNP: 0c09.0
1048 07:05:03.346869 scan_static_bus for PNP: 0c09.0 done
1049 07:05:03.353762 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1050 07:05:03.356700 scan_static_bus for PCI: 00:1f.0 done
1051 07:05:03.360009 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1052 07:05:03.363399 PCI: 00:1f.2 scanning...
1053 07:05:03.367023 scan_static_bus for PCI: 00:1f.2
1054 07:05:03.369882 GENERIC: 0.0 enabled
1055 07:05:03.370326 GENERIC: 0.0 scanning...
1056 07:05:03.373767 scan_static_bus for GENERIC: 0.0
1057 07:05:03.376734 GENERIC: 0.0 enabled
1058 07:05:03.380523 GENERIC: 1.0 enabled
1059 07:05:03.383408 scan_static_bus for GENERIC: 0.0 done
1060 07:05:03.386679 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1061 07:05:03.393575 scan_static_bus for PCI: 00:1f.2 done
1062 07:05:03.396897 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1063 07:05:03.399838 PCI: 00:1f.3 scanning...
1064 07:05:03.403514 scan_static_bus for PCI: 00:1f.3
1065 07:05:03.406439 scan_static_bus for PCI: 00:1f.3 done
1066 07:05:03.409579 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1067 07:05:03.413260 PCI: 00:1f.5 scanning...
1068 07:05:03.416964 scan_generic_bus for PCI: 00:1f.5
1069 07:05:03.420112 scan_generic_bus for PCI: 00:1f.5 done
1070 07:05:03.426640 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1071 07:05:03.429654 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1072 07:05:03.432982 scan_static_bus for Root Device done
1073 07:05:03.439399 scan_bus: bus Root Device finished in 736 msecs
1074 07:05:03.439930 done
1075 07:05:03.446432 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1076 07:05:03.449747 Chrome EC: UHEPI supported
1077 07:05:03.456735 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1078 07:05:03.462985 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1079 07:05:03.466570 SPI flash protection: WPSW=0 SRP0=1
1080 07:05:03.469611 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1081 07:05:03.475655 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1082 07:05:03.479723 found VGA at PCI: 00:02.0
1083 07:05:03.482739 Setting up VGA for PCI: 00:02.0
1084 07:05:03.489338 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1085 07:05:03.492820 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1086 07:05:03.495852 Allocating resources...
1087 07:05:03.496385 Reading resources...
1088 07:05:03.502561 Root Device read_resources bus 0 link: 0
1089 07:05:03.506040 DOMAIN: 0000 read_resources bus 0 link: 0
1090 07:05:03.512648 PCI: 00:04.0 read_resources bus 1 link: 0
1091 07:05:03.515600 PCI: 00:04.0 read_resources bus 1 link: 0 done
1092 07:05:03.522110 PCI: 00:0d.0 read_resources bus 0 link: 0
1093 07:05:03.525596 USB0 port 0 read_resources bus 0 link: 0
1094 07:05:03.532679 USB0 port 0 read_resources bus 0 link: 0 done
1095 07:05:03.535976 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1096 07:05:03.538604 PCI: 00:14.0 read_resources bus 0 link: 0
1097 07:05:03.545828 USB0 port 0 read_resources bus 0 link: 0
1098 07:05:03.548666 USB0 port 0 read_resources bus 0 link: 0 done
1099 07:05:03.555633 PCI: 00:14.0 read_resources bus 0 link: 0 done
1100 07:05:03.558861 PCI: 00:14.3 read_resources bus 0 link: 0
1101 07:05:03.565656 PCI: 00:14.3 read_resources bus 0 link: 0 done
1102 07:05:03.569307 PCI: 00:15.0 read_resources bus 0 link: 0
1103 07:05:03.575976 PCI: 00:15.0 read_resources bus 0 link: 0 done
1104 07:05:03.579020 PCI: 00:15.1 read_resources bus 0 link: 0
1105 07:05:03.585641 PCI: 00:15.1 read_resources bus 0 link: 0 done
1106 07:05:03.588929 PCI: 00:19.1 read_resources bus 0 link: 0
1107 07:05:03.595711 PCI: 00:19.1 read_resources bus 0 link: 0 done
1108 07:05:03.599667 PCI: 00:1d.0 read_resources bus 1 link: 0
1109 07:05:03.605855 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1110 07:05:03.608867 PCI: 00:1e.2 read_resources bus 2 link: 0
1111 07:05:03.615434 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1112 07:05:03.619050 PCI: 00:1e.3 read_resources bus 3 link: 0
1113 07:05:03.625840 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1114 07:05:03.629370 PCI: 00:1f.0 read_resources bus 0 link: 0
1115 07:05:03.635617 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1116 07:05:03.639009 PCI: 00:1f.2 read_resources bus 0 link: 0
1117 07:05:03.642661 GENERIC: 0.0 read_resources bus 0 link: 0
1118 07:05:03.649082 GENERIC: 0.0 read_resources bus 0 link: 0 done
1119 07:05:03.652612 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1120 07:05:03.660022 DOMAIN: 0000 read_resources bus 0 link: 0 done
1121 07:05:03.663256 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1122 07:05:03.669679 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1123 07:05:03.672930 Root Device read_resources bus 0 link: 0 done
1124 07:05:03.676671 Done reading resources.
1125 07:05:03.682605 Show resources in subtree (Root Device)...After reading.
1126 07:05:03.686292 Root Device child on link 0 DOMAIN: 0000
1127 07:05:03.689740 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1128 07:05:03.699447 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1129 07:05:03.709376 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1130 07:05:03.713010 PCI: 00:00.0
1131 07:05:03.722755 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1132 07:05:03.729095 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1133 07:05:03.739538 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1134 07:05:03.749404 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1135 07:05:03.759114 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1136 07:05:03.769728 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1137 07:05:03.779314 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1138 07:05:03.786013 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1139 07:05:03.795844 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1140 07:05:03.805848 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1141 07:05:03.815530 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1142 07:05:03.825155 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1143 07:05:03.832395 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1144 07:05:03.842233 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1145 07:05:03.852056 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1146 07:05:03.862150 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1147 07:05:03.871979 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1148 07:05:03.882253 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1149 07:05:03.891499 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1150 07:05:03.898553 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1151 07:05:03.901686 PCI: 00:02.0
1152 07:05:03.911870 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1153 07:05:03.921870 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1154 07:05:03.931813 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1155 07:05:03.934940 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1156 07:05:03.945309 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1157 07:05:03.948230 GENERIC: 0.0
1158 07:05:03.948776 PCI: 00:05.0
1159 07:05:03.958629 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1160 07:05:03.964817 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1161 07:05:03.965405 GENERIC: 0.0
1162 07:05:03.968163 PCI: 00:08.0
1163 07:05:03.978140 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 07:05:03.978691 PCI: 00:0a.0
1165 07:05:03.981969 PCI: 00:0d.0 child on link 0 USB0 port 0
1166 07:05:03.991342 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1167 07:05:03.997753 USB0 port 0 child on link 0 USB3 port 0
1168 07:05:03.998319 USB3 port 0
1169 07:05:04.001171 USB3 port 1
1170 07:05:04.001760 USB3 port 2
1171 07:05:04.004177 USB3 port 3
1172 07:05:04.008252 PCI: 00:14.0 child on link 0 USB0 port 0
1173 07:05:04.017719 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1174 07:05:04.024697 USB0 port 0 child on link 0 USB2 port 0
1175 07:05:04.025301 USB2 port 0
1176 07:05:04.027361 USB2 port 1
1177 07:05:04.027801 USB2 port 2
1178 07:05:04.031009 USB2 port 3
1179 07:05:04.031554 USB2 port 4
1180 07:05:04.033830 USB2 port 5
1181 07:05:04.034286 USB2 port 6
1182 07:05:04.037369 USB2 port 7
1183 07:05:04.037811 USB2 port 8
1184 07:05:04.040569 USB2 port 9
1185 07:05:04.043962 USB3 port 0
1186 07:05:04.044493 USB3 port 1
1187 07:05:04.047454 USB3 port 2
1188 07:05:04.047986 USB3 port 3
1189 07:05:04.050730 PCI: 00:14.2
1190 07:05:04.060875 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 07:05:04.070748 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 07:05:04.074222 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1193 07:05:04.084107 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1194 07:05:04.087149 GENERIC: 0.0
1195 07:05:04.090586 PCI: 00:15.0 child on link 0 I2C: 00:1a
1196 07:05:04.100765 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 07:05:04.101343 I2C: 00:1a
1198 07:05:04.103880 I2C: 00:31
1199 07:05:04.104413 I2C: 00:32
1200 07:05:04.110086 PCI: 00:15.1 child on link 0 I2C: 00:10
1201 07:05:04.120528 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 07:05:04.121067 I2C: 00:10
1203 07:05:04.123427 PCI: 00:15.2
1204 07:05:04.133641 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 07:05:04.134182 PCI: 00:15.3
1206 07:05:04.143336 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 07:05:04.147415 PCI: 00:16.0
1208 07:05:04.156816 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 07:05:04.157390 PCI: 00:19.0
1210 07:05:04.160462 PCI: 00:19.1 child on link 0 I2C: 00:15
1211 07:05:04.170142 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 07:05:04.173776 I2C: 00:15
1213 07:05:04.177118 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1214 07:05:04.186742 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1215 07:05:04.196734 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1216 07:05:04.203181 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1217 07:05:04.206431 GENERIC: 0.0
1218 07:05:04.210180 PCI: 01:00.0
1219 07:05:04.219707 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 07:05:04.229568 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1221 07:05:04.230025 PCI: 00:1e.0
1222 07:05:04.239567 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1223 07:05:04.246591 PCI: 00:1e.2 child on link 0 SPI: 00
1224 07:05:04.256276 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 07:05:04.256952 SPI: 00
1226 07:05:04.259404 PCI: 00:1e.3 child on link 0 SPI: 00
1227 07:05:04.269639 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 07:05:04.273086 SPI: 00
1229 07:05:04.276015 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1230 07:05:04.286029 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1231 07:05:04.286570 PNP: 0c09.0
1232 07:05:04.296184 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1233 07:05:04.299603 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1234 07:05:04.309168 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1235 07:05:04.319233 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1236 07:05:04.322750 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1237 07:05:04.325626 GENERIC: 0.0
1238 07:05:04.326080 GENERIC: 1.0
1239 07:05:04.329034 PCI: 00:1f.3
1240 07:05:04.339344 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1241 07:05:04.349166 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1242 07:05:04.349753 PCI: 00:1f.5
1243 07:05:04.359023 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1244 07:05:04.362465 CPU_CLUSTER: 0 child on link 0 APIC: 00
1245 07:05:04.365819 APIC: 00
1246 07:05:04.366350 APIC: 01
1247 07:05:04.366691 APIC: 05
1248 07:05:04.368488 APIC: 07
1249 07:05:04.368922 APIC: 02
1250 07:05:04.372229 APIC: 04
1251 07:05:04.372919 APIC: 06
1252 07:05:04.373396 APIC: 03
1253 07:05:04.382083 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1254 07:05:04.385473 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1255 07:05:04.391976 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1256 07:05:04.398651 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1257 07:05:04.402180 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1258 07:05:04.408901 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1259 07:05:04.414998 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1260 07:05:04.422135 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1261 07:05:04.428458 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1262 07:05:04.438678 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1263 07:05:04.441762 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1264 07:05:04.452014 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 07:05:04.458097 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1266 07:05:04.464716 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1267 07:05:04.468121 DOMAIN: 0000: Resource ranges:
1268 07:05:04.471470 * Base: 1000, Size: 800, Tag: 100
1269 07:05:04.474924 * Base: 1900, Size: e700, Tag: 100
1270 07:05:04.481474 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1271 07:05:04.488514 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1272 07:05:04.494696 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1273 07:05:04.501626 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1274 07:05:04.511202 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1275 07:05:04.518033 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1276 07:05:04.525000 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1277 07:05:04.534801 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1278 07:05:04.541313 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1279 07:05:04.547681 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1280 07:05:04.557416 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1281 07:05:04.564318 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1282 07:05:04.570897 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1283 07:05:04.581015 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1284 07:05:04.587753 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1285 07:05:04.594209 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1286 07:05:04.604140 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1287 07:05:04.610721 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1288 07:05:04.617266 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1289 07:05:04.627447 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1290 07:05:04.634095 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1291 07:05:04.641263 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1292 07:05:04.650247 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1293 07:05:04.657292 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1294 07:05:04.664075 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1295 07:05:04.667278 DOMAIN: 0000: Resource ranges:
1296 07:05:04.673642 * Base: 7fc00000, Size: 40400000, Tag: 200
1297 07:05:04.676820 * Base: d0000000, Size: 28000000, Tag: 200
1298 07:05:04.680077 * Base: fa000000, Size: 1000000, Tag: 200
1299 07:05:04.683473 * Base: fb001000, Size: 2fff000, Tag: 200
1300 07:05:04.690423 * Base: fe010000, Size: 2e000, Tag: 200
1301 07:05:04.694080 * Base: fe03f000, Size: d41000, Tag: 200
1302 07:05:04.696939 * Base: fed88000, Size: 8000, Tag: 200
1303 07:05:04.700441 * Base: fed93000, Size: d000, Tag: 200
1304 07:05:04.706605 * Base: feda2000, Size: 1e000, Tag: 200
1305 07:05:04.710089 * Base: fede0000, Size: 1220000, Tag: 200
1306 07:05:04.713238 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1307 07:05:04.723247 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1308 07:05:04.729756 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1309 07:05:04.736665 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1310 07:05:04.742868 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1311 07:05:04.750121 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1312 07:05:04.756610 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1313 07:05:04.763410 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1314 07:05:04.769699 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1315 07:05:04.776276 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1316 07:05:04.783292 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1317 07:05:04.789947 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1318 07:05:04.796154 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1319 07:05:04.802738 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1320 07:05:04.809614 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1321 07:05:04.816126 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1322 07:05:04.822681 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1323 07:05:04.829580 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1324 07:05:04.835738 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1325 07:05:04.842636 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1326 07:05:04.849279 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1327 07:05:04.855809 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1328 07:05:04.863109 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1329 07:05:04.869046 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1330 07:05:04.875966 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1331 07:05:04.878987 PCI: 00:1d.0: Resource ranges:
1332 07:05:04.882177 * Base: 7fc00000, Size: 100000, Tag: 200
1333 07:05:04.888685 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1334 07:05:04.895347 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1335 07:05:04.905667 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1336 07:05:04.912290 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1337 07:05:04.915684 Root Device assign_resources, bus 0 link: 0
1338 07:05:04.922112 DOMAIN: 0000 assign_resources, bus 0 link: 0
1339 07:05:04.928785 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1340 07:05:04.938346 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1341 07:05:04.945272 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1342 07:05:04.955454 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1343 07:05:04.958655 PCI: 00:04.0 assign_resources, bus 1 link: 0
1344 07:05:04.965331 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 07:05:04.971698 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1346 07:05:04.982128 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1347 07:05:04.988608 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1348 07:05:04.991374 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1349 07:05:04.998090 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 07:05:05.004725 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1351 07:05:05.011752 PCI: 00:14.0 assign_resources, bus 0 link: 0
1352 07:05:05.014832 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 07:05:05.024622 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1354 07:05:05.031388 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1355 07:05:05.037597 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1356 07:05:05.044624 PCI: 00:14.3 assign_resources, bus 0 link: 0
1357 07:05:05.048123 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 07:05:05.058127 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1359 07:05:05.060927 PCI: 00:15.0 assign_resources, bus 0 link: 0
1360 07:05:05.067375 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 07:05:05.073965 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1362 07:05:05.077621 PCI: 00:15.1 assign_resources, bus 0 link: 0
1363 07:05:05.084176 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 07:05:05.090798 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1365 07:05:05.100804 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1366 07:05:05.107051 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1367 07:05:05.117285 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1368 07:05:05.120308 PCI: 00:19.1 assign_resources, bus 0 link: 0
1369 07:05:05.127095 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 07:05:05.133595 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1371 07:05:05.143617 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1372 07:05:05.153877 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1373 07:05:05.157183 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1374 07:05:05.167230 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1375 07:05:05.173324 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1376 07:05:05.180120 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1377 07:05:05.186524 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1378 07:05:05.189868 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1379 07:05:05.196188 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 07:05:05.203085 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1381 07:05:05.210198 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1382 07:05:05.212933 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 07:05:05.219575 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1384 07:05:05.222957 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 07:05:05.229562 LPC: Trying to open IO window from 800 size 1ff
1386 07:05:05.236240 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1387 07:05:05.246181 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1388 07:05:05.252689 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1389 07:05:05.256182 DOMAIN: 0000 assign_resources, bus 0 link: 0
1390 07:05:05.262713 Root Device assign_resources, bus 0 link: 0
1391 07:05:05.265933 Done setting resources.
1392 07:05:05.272746 Show resources in subtree (Root Device)...After assigning values.
1393 07:05:05.275941 Root Device child on link 0 DOMAIN: 0000
1394 07:05:05.279215 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1395 07:05:05.289368 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1396 07:05:05.298708 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1397 07:05:05.299272 PCI: 00:00.0
1398 07:05:05.308999 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1399 07:05:05.318492 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1400 07:05:05.328844 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1401 07:05:05.338696 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1402 07:05:05.348653 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1403 07:05:05.355514 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1404 07:05:05.365842 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1405 07:05:05.375331 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1406 07:05:05.385264 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1407 07:05:05.395591 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1408 07:05:05.405144 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1409 07:05:05.411444 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1410 07:05:05.421540 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1411 07:05:05.431210 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1412 07:05:05.441635 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1413 07:05:05.451307 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1414 07:05:05.461307 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1415 07:05:05.471329 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1416 07:05:05.477807 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1417 07:05:05.487716 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1418 07:05:05.490956 PCI: 00:02.0
1419 07:05:05.501112 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1420 07:05:05.510987 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1421 07:05:05.520913 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1422 07:05:05.524280 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1423 07:05:05.534046 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1424 07:05:05.537334 GENERIC: 0.0
1425 07:05:05.537778 PCI: 00:05.0
1426 07:05:05.550607 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1427 07:05:05.553939 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1428 07:05:05.557579 GENERIC: 0.0
1429 07:05:05.558150 PCI: 00:08.0
1430 07:05:05.567317 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1431 07:05:05.570780 PCI: 00:0a.0
1432 07:05:05.574129 PCI: 00:0d.0 child on link 0 USB0 port 0
1433 07:05:05.583944 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1434 07:05:05.586982 USB0 port 0 child on link 0 USB3 port 0
1435 07:05:05.590891 USB3 port 0
1436 07:05:05.594177 USB3 port 1
1437 07:05:05.594712 USB3 port 2
1438 07:05:05.597297 USB3 port 3
1439 07:05:05.600768 PCI: 00:14.0 child on link 0 USB0 port 0
1440 07:05:05.610147 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1441 07:05:05.613862 USB0 port 0 child on link 0 USB2 port 0
1442 07:05:05.616877 USB2 port 0
1443 07:05:05.617445 USB2 port 1
1444 07:05:05.620153 USB2 port 2
1445 07:05:05.623367 USB2 port 3
1446 07:05:05.623812 USB2 port 4
1447 07:05:05.626845 USB2 port 5
1448 07:05:05.627290 USB2 port 6
1449 07:05:05.630161 USB2 port 7
1450 07:05:05.630656 USB2 port 8
1451 07:05:05.633167 USB2 port 9
1452 07:05:05.633685 USB3 port 0
1453 07:05:05.636506 USB3 port 1
1454 07:05:05.636963 USB3 port 2
1455 07:05:05.640641 USB3 port 3
1456 07:05:05.641179 PCI: 00:14.2
1457 07:05:05.653702 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1458 07:05:05.663714 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1459 07:05:05.666642 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1460 07:05:05.676721 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1461 07:05:05.680100 GENERIC: 0.0
1462 07:05:05.684233 PCI: 00:15.0 child on link 0 I2C: 00:1a
1463 07:05:05.693158 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1464 07:05:05.696766 I2C: 00:1a
1465 07:05:05.697344 I2C: 00:31
1466 07:05:05.697705 I2C: 00:32
1467 07:05:05.703130 PCI: 00:15.1 child on link 0 I2C: 00:10
1468 07:05:05.712886 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1469 07:05:05.713466 I2C: 00:10
1470 07:05:05.716493 PCI: 00:15.2
1471 07:05:05.726633 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1472 07:05:05.727088 PCI: 00:15.3
1473 07:05:05.739536 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1474 07:05:05.740105 PCI: 00:16.0
1475 07:05:05.749645 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1476 07:05:05.752620 PCI: 00:19.0
1477 07:05:05.756028 PCI: 00:19.1 child on link 0 I2C: 00:15
1478 07:05:05.766170 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1479 07:05:05.769716 I2C: 00:15
1480 07:05:05.772831 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1481 07:05:05.782782 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1482 07:05:05.792759 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1483 07:05:05.802587 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1484 07:05:05.806143 GENERIC: 0.0
1485 07:05:05.806720 PCI: 01:00.0
1486 07:05:05.819387 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1487 07:05:05.829281 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1488 07:05:05.829819 PCI: 00:1e.0
1489 07:05:05.842126 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1490 07:05:05.845576 PCI: 00:1e.2 child on link 0 SPI: 00
1491 07:05:05.855855 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1492 07:05:05.856414 SPI: 00
1493 07:05:05.862288 PCI: 00:1e.3 child on link 0 SPI: 00
1494 07:05:05.872724 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1495 07:05:05.873353 SPI: 00
1496 07:05:05.875751 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1497 07:05:05.885849 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1498 07:05:05.886436 PNP: 0c09.0
1499 07:05:05.895964 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1500 07:05:05.899351 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1501 07:05:05.909269 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1502 07:05:05.919019 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1503 07:05:05.921667 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1504 07:05:05.925391 GENERIC: 0.0
1505 07:05:05.928936 GENERIC: 1.0
1506 07:05:05.929516 PCI: 00:1f.3
1507 07:05:05.938337 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1508 07:05:05.948378 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1509 07:05:05.951897 PCI: 00:1f.5
1510 07:05:05.961595 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1511 07:05:05.965099 CPU_CLUSTER: 0 child on link 0 APIC: 00
1512 07:05:05.968123 APIC: 00
1513 07:05:05.968659 APIC: 01
1514 07:05:05.969005 APIC: 05
1515 07:05:05.971822 APIC: 07
1516 07:05:05.972359 APIC: 02
1517 07:05:05.975010 APIC: 04
1518 07:05:05.975546 APIC: 06
1519 07:05:05.975895 APIC: 03
1520 07:05:05.978168 Done allocating resources.
1521 07:05:05.984998 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1522 07:05:05.991749 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1523 07:05:05.994730 Configure GPIOs for I2S audio on UP4.
1524 07:05:06.001833 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1525 07:05:06.005384 Enabling resources...
1526 07:05:06.008342 PCI: 00:00.0 subsystem <- 8086/9a12
1527 07:05:06.011442 PCI: 00:00.0 cmd <- 06
1528 07:05:06.015234 PCI: 00:02.0 subsystem <- 8086/9a40
1529 07:05:06.017941 PCI: 00:02.0 cmd <- 03
1530 07:05:06.021337 PCI: 00:04.0 subsystem <- 8086/9a03
1531 07:05:06.021946 PCI: 00:04.0 cmd <- 02
1532 07:05:06.027955 PCI: 00:05.0 subsystem <- 8086/9a19
1533 07:05:06.028499 PCI: 00:05.0 cmd <- 02
1534 07:05:06.031038 PCI: 00:08.0 subsystem <- 8086/9a11
1535 07:05:06.034346 PCI: 00:08.0 cmd <- 06
1536 07:05:06.037611 PCI: 00:0d.0 subsystem <- 8086/9a13
1537 07:05:06.041106 PCI: 00:0d.0 cmd <- 02
1538 07:05:06.044226 PCI: 00:14.0 subsystem <- 8086/a0ed
1539 07:05:06.047313 PCI: 00:14.0 cmd <- 02
1540 07:05:06.050788 PCI: 00:14.2 subsystem <- 8086/a0ef
1541 07:05:06.053902 PCI: 00:14.2 cmd <- 02
1542 07:05:06.057329 PCI: 00:14.3 subsystem <- 8086/a0f0
1543 07:05:06.060800 PCI: 00:14.3 cmd <- 02
1544 07:05:06.064758 PCI: 00:15.0 subsystem <- 8086/a0e8
1545 07:05:06.067480 PCI: 00:15.0 cmd <- 02
1546 07:05:06.070761 PCI: 00:15.1 subsystem <- 8086/a0e9
1547 07:05:06.071214 PCI: 00:15.1 cmd <- 02
1548 07:05:06.077435 PCI: 00:15.2 subsystem <- 8086/a0ea
1549 07:05:06.077967 PCI: 00:15.2 cmd <- 02
1550 07:05:06.080845 PCI: 00:15.3 subsystem <- 8086/a0eb
1551 07:05:06.084277 PCI: 00:15.3 cmd <- 02
1552 07:05:06.087084 PCI: 00:16.0 subsystem <- 8086/a0e0
1553 07:05:06.090794 PCI: 00:16.0 cmd <- 02
1554 07:05:06.094139 PCI: 00:19.1 subsystem <- 8086/a0c6
1555 07:05:06.097550 PCI: 00:19.1 cmd <- 02
1556 07:05:06.100697 PCI: 00:1d.0 bridge ctrl <- 0013
1557 07:05:06.104106 PCI: 00:1d.0 subsystem <- 8086/a0b0
1558 07:05:06.107818 PCI: 00:1d.0 cmd <- 06
1559 07:05:06.110547 PCI: 00:1e.0 subsystem <- 8086/a0a8
1560 07:05:06.114075 PCI: 00:1e.0 cmd <- 06
1561 07:05:06.117522 PCI: 00:1e.2 subsystem <- 8086/a0aa
1562 07:05:06.120338 PCI: 00:1e.2 cmd <- 06
1563 07:05:06.123365 PCI: 00:1e.3 subsystem <- 8086/a0ab
1564 07:05:06.123802 PCI: 00:1e.3 cmd <- 02
1565 07:05:06.130620 PCI: 00:1f.0 subsystem <- 8086/a087
1566 07:05:06.131155 PCI: 00:1f.0 cmd <- 407
1567 07:05:06.133549 PCI: 00:1f.3 subsystem <- 8086/a0c8
1568 07:05:06.137363 PCI: 00:1f.3 cmd <- 02
1569 07:05:06.140708 PCI: 00:1f.5 subsystem <- 8086/a0a4
1570 07:05:06.143902 PCI: 00:1f.5 cmd <- 406
1571 07:05:06.148331 PCI: 01:00.0 cmd <- 02
1572 07:05:06.152755 done.
1573 07:05:06.156371 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1574 07:05:06.159369 Initializing devices...
1575 07:05:06.162295 Root Device init
1576 07:05:06.165732 Chrome EC: Set SMI mask to 0x0000000000000000
1577 07:05:06.172498 Chrome EC: clear events_b mask to 0x0000000000000000
1578 07:05:06.179078 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1579 07:05:06.185694 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1580 07:05:06.189408 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1581 07:05:06.195482 Chrome EC: Set WAKE mask to 0x0000000000000000
1582 07:05:06.198880 fw_config match found: DB_USB=USB3_ACTIVE
1583 07:05:06.205456 Configure Right Type-C port orientation for retimer
1584 07:05:06.208741 Root Device init finished in 42 msecs
1585 07:05:06.212562 PCI: 00:00.0 init
1586 07:05:06.215506 CPU TDP = 9 Watts
1587 07:05:06.216087 CPU PL1 = 9 Watts
1588 07:05:06.219088 CPU PL2 = 40 Watts
1589 07:05:06.219627 CPU PL4 = 83 Watts
1590 07:05:06.221865 PCI: 00:00.0 init finished in 8 msecs
1591 07:05:06.225502 PCI: 00:02.0 init
1592 07:05:06.229138 GMA: Found VBT in CBFS
1593 07:05:06.232076 GMA: Found valid VBT in CBFS
1594 07:05:06.235221 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1595 07:05:06.245945 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1596 07:05:06.248776 PCI: 00:02.0 init finished in 18 msecs
1597 07:05:06.252435 PCI: 00:05.0 init
1598 07:05:06.255787 PCI: 00:05.0 init finished in 0 msecs
1599 07:05:06.256353 PCI: 00:08.0 init
1600 07:05:06.261921 PCI: 00:08.0 init finished in 0 msecs
1601 07:05:06.262442 PCI: 00:14.0 init
1602 07:05:06.268453 PCI: 00:14.0 init finished in 0 msecs
1603 07:05:06.268990 PCI: 00:14.2 init
1604 07:05:06.271986 PCI: 00:14.2 init finished in 0 msecs
1605 07:05:06.275579 PCI: 00:15.0 init
1606 07:05:06.279108 I2C bus 0 version 0x3230302a
1607 07:05:06.282253 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1608 07:05:06.285512 PCI: 00:15.0 init finished in 6 msecs
1609 07:05:06.288756 PCI: 00:15.1 init
1610 07:05:06.292419 I2C bus 1 version 0x3230302a
1611 07:05:06.296085 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1612 07:05:06.299374 PCI: 00:15.1 init finished in 6 msecs
1613 07:05:06.302616 PCI: 00:15.2 init
1614 07:05:06.305883 I2C bus 2 version 0x3230302a
1615 07:05:06.309143 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1616 07:05:06.312477 PCI: 00:15.2 init finished in 6 msecs
1617 07:05:06.312915 PCI: 00:15.3 init
1618 07:05:06.315455 I2C bus 3 version 0x3230302a
1619 07:05:06.319037 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1620 07:05:06.324939 PCI: 00:15.3 init finished in 6 msecs
1621 07:05:06.325480 PCI: 00:16.0 init
1622 07:05:06.328713 PCI: 00:16.0 init finished in 0 msecs
1623 07:05:06.332589 PCI: 00:19.1 init
1624 07:05:06.336076 I2C bus 5 version 0x3230302a
1625 07:05:06.339034 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1626 07:05:06.342275 PCI: 00:19.1 init finished in 6 msecs
1627 07:05:06.345382 PCI: 00:1d.0 init
1628 07:05:06.349080 Initializing PCH PCIe bridge.
1629 07:05:06.352173 PCI: 00:1d.0 init finished in 3 msecs
1630 07:05:06.355666 PCI: 00:1f.0 init
1631 07:05:06.358331 IOAPIC: Initializing IOAPIC at 0xfec00000
1632 07:05:06.365160 IOAPIC: Bootstrap Processor Local APIC = 0x00
1633 07:05:06.365776 IOAPIC: ID = 0x02
1634 07:05:06.368308 IOAPIC: Dumping registers
1635 07:05:06.372296 reg 0x0000: 0x02000000
1636 07:05:06.375403 reg 0x0001: 0x00770020
1637 07:05:06.375939 reg 0x0002: 0x00000000
1638 07:05:06.381716 PCI: 00:1f.0 init finished in 21 msecs
1639 07:05:06.382272 PCI: 00:1f.2 init
1640 07:05:06.385174 Disabling ACPI via APMC.
1641 07:05:06.389434 APMC done.
1642 07:05:06.392487 PCI: 00:1f.2 init finished in 6 msecs
1643 07:05:06.404173 PCI: 01:00.0 init
1644 07:05:06.407046 PCI: 01:00.0 init finished in 0 msecs
1645 07:05:06.410554 PNP: 0c09.0 init
1646 07:05:06.413832 Google Chrome EC uptime: 8.260 seconds
1647 07:05:06.420431 Google Chrome AP resets since EC boot: 1
1648 07:05:06.423727 Google Chrome most recent AP reset causes:
1649 07:05:06.427112 0.451: 32775 shutdown: entering G3
1650 07:05:06.433940 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1651 07:05:06.437038 PNP: 0c09.0 init finished in 22 msecs
1652 07:05:06.442428 Devices initialized
1653 07:05:06.445876 Show all devs... After init.
1654 07:05:06.449143 Root Device: enabled 1
1655 07:05:06.449761 DOMAIN: 0000: enabled 1
1656 07:05:06.452419 CPU_CLUSTER: 0: enabled 1
1657 07:05:06.455978 PCI: 00:00.0: enabled 1
1658 07:05:06.459270 PCI: 00:02.0: enabled 1
1659 07:05:06.459816 PCI: 00:04.0: enabled 1
1660 07:05:06.462570 PCI: 00:05.0: enabled 1
1661 07:05:06.465842 PCI: 00:06.0: enabled 0
1662 07:05:06.469340 PCI: 00:07.0: enabled 0
1663 07:05:06.469886 PCI: 00:07.1: enabled 0
1664 07:05:06.472252 PCI: 00:07.2: enabled 0
1665 07:05:06.475699 PCI: 00:07.3: enabled 0
1666 07:05:06.478903 PCI: 00:08.0: enabled 1
1667 07:05:06.479446 PCI: 00:09.0: enabled 0
1668 07:05:06.481829 PCI: 00:0a.0: enabled 0
1669 07:05:06.485462 PCI: 00:0d.0: enabled 1
1670 07:05:06.488747 PCI: 00:0d.1: enabled 0
1671 07:05:06.489189 PCI: 00:0d.2: enabled 0
1672 07:05:06.492195 PCI: 00:0d.3: enabled 0
1673 07:05:06.495466 PCI: 00:0e.0: enabled 0
1674 07:05:06.495908 PCI: 00:10.2: enabled 1
1675 07:05:06.498714 PCI: 00:10.6: enabled 0
1676 07:05:06.502164 PCI: 00:10.7: enabled 0
1677 07:05:06.505640 PCI: 00:12.0: enabled 0
1678 07:05:06.506082 PCI: 00:12.6: enabled 0
1679 07:05:06.508722 PCI: 00:13.0: enabled 0
1680 07:05:06.512234 PCI: 00:14.0: enabled 1
1681 07:05:06.515810 PCI: 00:14.1: enabled 0
1682 07:05:06.516340 PCI: 00:14.2: enabled 1
1683 07:05:06.518616 PCI: 00:14.3: enabled 1
1684 07:05:06.522057 PCI: 00:15.0: enabled 1
1685 07:05:06.525067 PCI: 00:15.1: enabled 1
1686 07:05:06.525554 PCI: 00:15.2: enabled 1
1687 07:05:06.528727 PCI: 00:15.3: enabled 1
1688 07:05:06.532079 PCI: 00:16.0: enabled 1
1689 07:05:06.532621 PCI: 00:16.1: enabled 0
1690 07:05:06.535365 PCI: 00:16.2: enabled 0
1691 07:05:06.538790 PCI: 00:16.3: enabled 0
1692 07:05:06.541982 PCI: 00:16.4: enabled 0
1693 07:05:06.542418 PCI: 00:16.5: enabled 0
1694 07:05:06.545317 PCI: 00:17.0: enabled 0
1695 07:05:06.549006 PCI: 00:19.0: enabled 0
1696 07:05:06.552138 PCI: 00:19.1: enabled 1
1697 07:05:06.552678 PCI: 00:19.2: enabled 0
1698 07:05:06.555011 PCI: 00:1c.0: enabled 1
1699 07:05:06.558798 PCI: 00:1c.1: enabled 0
1700 07:05:06.561980 PCI: 00:1c.2: enabled 0
1701 07:05:06.562518 PCI: 00:1c.3: enabled 0
1702 07:05:06.565410 PCI: 00:1c.4: enabled 0
1703 07:05:06.568535 PCI: 00:1c.5: enabled 0
1704 07:05:06.572075 PCI: 00:1c.6: enabled 1
1705 07:05:06.572747 PCI: 00:1c.7: enabled 0
1706 07:05:06.575001 PCI: 00:1d.0: enabled 1
1707 07:05:06.578808 PCI: 00:1d.1: enabled 0
1708 07:05:06.579402 PCI: 00:1d.2: enabled 1
1709 07:05:06.581726 PCI: 00:1d.3: enabled 0
1710 07:05:06.585420 PCI: 00:1e.0: enabled 1
1711 07:05:06.588400 PCI: 00:1e.1: enabled 0
1712 07:05:06.588996 PCI: 00:1e.2: enabled 1
1713 07:05:06.591632 PCI: 00:1e.3: enabled 1
1714 07:05:06.594828 PCI: 00:1f.0: enabled 1
1715 07:05:06.598027 PCI: 00:1f.1: enabled 0
1716 07:05:06.598489 PCI: 00:1f.2: enabled 1
1717 07:05:06.602336 PCI: 00:1f.3: enabled 1
1718 07:05:06.604861 PCI: 00:1f.4: enabled 0
1719 07:05:06.608013 PCI: 00:1f.5: enabled 1
1720 07:05:06.608448 PCI: 00:1f.6: enabled 0
1721 07:05:06.612075 PCI: 00:1f.7: enabled 0
1722 07:05:06.614712 APIC: 00: enabled 1
1723 07:05:06.615210 GENERIC: 0.0: enabled 1
1724 07:05:06.618719 GENERIC: 0.0: enabled 1
1725 07:05:06.621670 GENERIC: 1.0: enabled 1
1726 07:05:06.625187 GENERIC: 0.0: enabled 1
1727 07:05:06.625815 GENERIC: 1.0: enabled 1
1728 07:05:06.628326 USB0 port 0: enabled 1
1729 07:05:06.631831 GENERIC: 0.0: enabled 1
1730 07:05:06.632369 USB0 port 0: enabled 1
1731 07:05:06.634763 GENERIC: 0.0: enabled 1
1732 07:05:06.637844 I2C: 00:1a: enabled 1
1733 07:05:06.641361 I2C: 00:31: enabled 1
1734 07:05:06.641897 I2C: 00:32: enabled 1
1735 07:05:06.644833 I2C: 00:10: enabled 1
1736 07:05:06.648289 I2C: 00:15: enabled 1
1737 07:05:06.648830 GENERIC: 0.0: enabled 0
1738 07:05:06.651542 GENERIC: 1.0: enabled 0
1739 07:05:06.654833 GENERIC: 0.0: enabled 1
1740 07:05:06.655409 SPI: 00: enabled 1
1741 07:05:06.657889 SPI: 00: enabled 1
1742 07:05:06.661419 PNP: 0c09.0: enabled 1
1743 07:05:06.661861 GENERIC: 0.0: enabled 1
1744 07:05:06.664922 USB3 port 0: enabled 1
1745 07:05:06.668160 USB3 port 1: enabled 1
1746 07:05:06.671731 USB3 port 2: enabled 0
1747 07:05:06.672270 USB3 port 3: enabled 0
1748 07:05:06.674932 USB2 port 0: enabled 0
1749 07:05:06.678178 USB2 port 1: enabled 1
1750 07:05:06.678617 USB2 port 2: enabled 1
1751 07:05:06.681325 USB2 port 3: enabled 0
1752 07:05:06.684973 USB2 port 4: enabled 1
1753 07:05:06.685630 USB2 port 5: enabled 0
1754 07:05:06.687975 USB2 port 6: enabled 0
1755 07:05:06.691103 USB2 port 7: enabled 0
1756 07:05:06.694384 USB2 port 8: enabled 0
1757 07:05:06.694823 USB2 port 9: enabled 0
1758 07:05:06.697889 USB3 port 0: enabled 0
1759 07:05:06.701092 USB3 port 1: enabled 1
1760 07:05:06.701560 USB3 port 2: enabled 0
1761 07:05:06.704661 USB3 port 3: enabled 0
1762 07:05:06.707543 GENERIC: 0.0: enabled 1
1763 07:05:06.711047 GENERIC: 1.0: enabled 1
1764 07:05:06.711485 APIC: 01: enabled 1
1765 07:05:06.714476 APIC: 05: enabled 1
1766 07:05:06.714925 APIC: 07: enabled 1
1767 07:05:06.717600 APIC: 02: enabled 1
1768 07:05:06.721182 APIC: 04: enabled 1
1769 07:05:06.721772 APIC: 06: enabled 1
1770 07:05:06.724539 APIC: 03: enabled 1
1771 07:05:06.727896 PCI: 01:00.0: enabled 1
1772 07:05:06.731000 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1773 07:05:06.737875 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1774 07:05:06.740936 ELOG: NV offset 0xf30000 size 0x1000
1775 07:05:06.747626 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1776 07:05:06.754219 ELOG: Event(17) added with size 13 at 2023-03-22 07:05:06 UTC
1777 07:05:06.761010 ELOG: Event(92) added with size 9 at 2023-03-22 07:05:06 UTC
1778 07:05:06.767553 ELOG: Event(93) added with size 9 at 2023-03-22 07:05:06 UTC
1779 07:05:06.774158 ELOG: Event(9E) added with size 10 at 2023-03-22 07:05:06 UTC
1780 07:05:06.780721 ELOG: Event(9F) added with size 14 at 2023-03-22 07:05:06 UTC
1781 07:05:06.787253 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1782 07:05:06.794074 ELOG: Event(A1) added with size 10 at 2023-03-22 07:05:06 UTC
1783 07:05:06.800789 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1784 07:05:06.807515 ELOG: Event(A0) added with size 9 at 2023-03-22 07:05:06 UTC
1785 07:05:06.810099 elog_add_boot_reason: Logged dev mode boot
1786 07:05:06.816986 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1787 07:05:06.817695 Finalize devices...
1788 07:05:06.820254 Devices finalized
1789 07:05:06.826950 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1790 07:05:06.830467 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1791 07:05:06.836660 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1792 07:05:06.840224 ME: HFSTS1 : 0x80030055
1793 07:05:06.846736 ME: HFSTS2 : 0x30280116
1794 07:05:06.849852 ME: HFSTS3 : 0x00000050
1795 07:05:06.853345 ME: HFSTS4 : 0x00004000
1796 07:05:06.860124 ME: HFSTS5 : 0x00000000
1797 07:05:06.863485 ME: HFSTS6 : 0x40400006
1798 07:05:06.866879 ME: Manufacturing Mode : YES
1799 07:05:06.869810 ME: SPI Protection Mode Enabled : NO
1800 07:05:06.876400 ME: FW Partition Table : OK
1801 07:05:06.879746 ME: Bringup Loader Failure : NO
1802 07:05:06.883051 ME: Firmware Init Complete : NO
1803 07:05:06.886541 ME: Boot Options Present : NO
1804 07:05:06.889493 ME: Update In Progress : NO
1805 07:05:06.893009 ME: D0i3 Support : YES
1806 07:05:06.896384 ME: Low Power State Enabled : NO
1807 07:05:06.899720 ME: CPU Replaced : YES
1808 07:05:06.906854 ME: CPU Replacement Valid : YES
1809 07:05:06.909388 ME: Current Working State : 5
1810 07:05:06.913113 ME: Current Operation State : 1
1811 07:05:06.916065 ME: Current Operation Mode : 3
1812 07:05:06.919593 ME: Error Code : 0
1813 07:05:06.923038 ME: Enhanced Debug Mode : NO
1814 07:05:06.926127 ME: CPU Debug Disabled : YES
1815 07:05:06.929166 ME: TXT Support : NO
1816 07:05:06.936190 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1817 07:05:06.942607 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1818 07:05:06.946169 CBFS: 'fallback/slic' not found.
1819 07:05:06.952663 ACPI: Writing ACPI tables at 76b01000.
1820 07:05:06.953240 ACPI: * FACS
1821 07:05:06.955932 ACPI: * DSDT
1822 07:05:06.959520 Ramoops buffer: 0x100000@0x76a00000.
1823 07:05:06.962963 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1824 07:05:06.969088 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1825 07:05:06.972357 Google Chrome EC: version:
1826 07:05:06.975917 ro: voema_v2.0.10114-a447f03e46
1827 07:05:06.979894 rw: voema_v2.0.10114-a447f03e46
1828 07:05:06.980424 running image: 2
1829 07:05:06.985836 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1830 07:05:06.990358 ACPI: * FADT
1831 07:05:06.990796 SCI is IRQ9
1832 07:05:06.997082 ACPI: added table 1/32, length now 40
1833 07:05:06.997637 ACPI: * SSDT
1834 07:05:07.000437 Found 1 CPU(s) with 8 core(s) each.
1835 07:05:07.007239 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1836 07:05:07.010142 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1837 07:05:07.013490 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1838 07:05:07.016882 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1839 07:05:07.023951 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1840 07:05:07.030019 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1841 07:05:07.033611 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1842 07:05:07.040310 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1843 07:05:07.046769 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1844 07:05:07.050002 \_SB.PCI0.RP09: Added StorageD3Enable property
1845 07:05:07.057171 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1846 07:05:07.060388 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1847 07:05:07.067091 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1848 07:05:07.070054 PS2K: Passing 80 keymaps to kernel
1849 07:05:07.076586 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1850 07:05:07.083532 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1851 07:05:07.089932 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1852 07:05:07.096866 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1853 07:05:07.103544 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1854 07:05:07.109498 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1855 07:05:07.116145 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1856 07:05:07.123051 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1857 07:05:07.126624 ACPI: added table 2/32, length now 44
1858 07:05:07.127175 ACPI: * MCFG
1859 07:05:07.129623 ACPI: added table 3/32, length now 48
1860 07:05:07.132735 ACPI: * TPM2
1861 07:05:07.136222 TPM2 log created at 0x769f0000
1862 07:05:07.139354 ACPI: added table 4/32, length now 52
1863 07:05:07.139802 ACPI: * MADT
1864 07:05:07.143018 SCI is IRQ9
1865 07:05:07.146697 ACPI: added table 5/32, length now 56
1866 07:05:07.149425 current = 76b09850
1867 07:05:07.149867 ACPI: * DMAR
1868 07:05:07.152594 ACPI: added table 6/32, length now 60
1869 07:05:07.156033 ACPI: added table 7/32, length now 64
1870 07:05:07.159632 ACPI: * HPET
1871 07:05:07.162728 ACPI: added table 8/32, length now 68
1872 07:05:07.163180 ACPI: done.
1873 07:05:07.165959 ACPI tables: 35216 bytes.
1874 07:05:07.169611 smbios_write_tables: 769ef000
1875 07:05:07.173189 EC returned error result code 3
1876 07:05:07.176379 Couldn't obtain OEM name from CBI
1877 07:05:07.179266 Create SMBIOS type 16
1878 07:05:07.182893 Create SMBIOS type 17
1879 07:05:07.185827 GENERIC: 0.0 (WIFI Device)
1880 07:05:07.186270 SMBIOS tables: 1734 bytes.
1881 07:05:07.192773 Writing table forward entry at 0x00000500
1882 07:05:07.199554 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1883 07:05:07.203026 Writing coreboot table at 0x76b25000
1884 07:05:07.209414 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1885 07:05:07.212577 1. 0000000000001000-000000000009ffff: RAM
1886 07:05:07.215652 2. 00000000000a0000-00000000000fffff: RESERVED
1887 07:05:07.222651 3. 0000000000100000-00000000769eefff: RAM
1888 07:05:07.225761 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1889 07:05:07.232370 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1890 07:05:07.239403 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1891 07:05:07.242066 7. 0000000077000000-000000007fbfffff: RESERVED
1892 07:05:07.245339 8. 00000000c0000000-00000000cfffffff: RESERVED
1893 07:05:07.252381 9. 00000000f8000000-00000000f9ffffff: RESERVED
1894 07:05:07.255512 10. 00000000fb000000-00000000fb000fff: RESERVED
1895 07:05:07.262017 11. 00000000fe000000-00000000fe00ffff: RESERVED
1896 07:05:07.265502 12. 00000000fed80000-00000000fed87fff: RESERVED
1897 07:05:07.271819 13. 00000000fed90000-00000000fed92fff: RESERVED
1898 07:05:07.275604 14. 00000000feda0000-00000000feda1fff: RESERVED
1899 07:05:07.282120 15. 00000000fedc0000-00000000feddffff: RESERVED
1900 07:05:07.285768 16. 0000000100000000-00000004803fffff: RAM
1901 07:05:07.289052 Passing 4 GPIOs to payload:
1902 07:05:07.292034 NAME | PORT | POLARITY | VALUE
1903 07:05:07.298576 lid | undefined | high | high
1904 07:05:07.305513 power | undefined | high | low
1905 07:05:07.308649 oprom | undefined | high | low
1906 07:05:07.315776 EC in RW | 0x000000e5 | high | high
1907 07:05:07.322059 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1908 07:05:07.322646 coreboot table: 1576 bytes.
1909 07:05:07.328533 IMD ROOT 0. 0x76fff000 0x00001000
1910 07:05:07.331620 IMD SMALL 1. 0x76ffe000 0x00001000
1911 07:05:07.335051 FSP MEMORY 2. 0x76c4e000 0x003b0000
1912 07:05:07.338333 VPD 3. 0x76c4d000 0x00000367
1913 07:05:07.342063 RO MCACHE 4. 0x76c4c000 0x00000fdc
1914 07:05:07.344855 CONSOLE 5. 0x76c2c000 0x00020000
1915 07:05:07.348134 FMAP 6. 0x76c2b000 0x00000578
1916 07:05:07.352133 TIME STAMP 7. 0x76c2a000 0x00000910
1917 07:05:07.358348 VBOOT WORK 8. 0x76c16000 0x00014000
1918 07:05:07.361684 ROMSTG STCK 9. 0x76c15000 0x00001000
1919 07:05:07.365377 AFTER CAR 10. 0x76c0a000 0x0000b000
1920 07:05:07.368470 RAMSTAGE 11. 0x76b97000 0x00073000
1921 07:05:07.371908 REFCODE 12. 0x76b42000 0x00055000
1922 07:05:07.375098 SMM BACKUP 13. 0x76b32000 0x00010000
1923 07:05:07.378186 4f444749 14. 0x76b30000 0x00002000
1924 07:05:07.381398 EXT VBT15. 0x76b2d000 0x0000219f
1925 07:05:07.384834 COREBOOT 16. 0x76b25000 0x00008000
1926 07:05:07.391400 ACPI 17. 0x76b01000 0x00024000
1927 07:05:07.395012 ACPI GNVS 18. 0x76b00000 0x00001000
1928 07:05:07.397820 RAMOOPS 19. 0x76a00000 0x00100000
1929 07:05:07.401261 TPM2 TCGLOG20. 0x769f0000 0x00010000
1930 07:05:07.404727 SMBIOS 21. 0x769ef000 0x00000800
1931 07:05:07.408049 IMD small region:
1932 07:05:07.411652 IMD ROOT 0. 0x76ffec00 0x00000400
1933 07:05:07.414559 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1934 07:05:07.418191 POWER STATE 2. 0x76ffeb80 0x00000044
1935 07:05:07.421419 ROMSTAGE 3. 0x76ffeb60 0x00000004
1936 07:05:07.427501 MEM INFO 4. 0x76ffe980 0x000001e0
1937 07:05:07.430863 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1938 07:05:07.434598 MTRR: Physical address space:
1939 07:05:07.440808 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1940 07:05:07.447631 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1941 07:05:07.454664 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1942 07:05:07.460973 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1943 07:05:07.467443 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1944 07:05:07.474615 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1945 07:05:07.478103 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1946 07:05:07.484325 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 07:05:07.487340 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 07:05:07.491215 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 07:05:07.494173 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 07:05:07.500779 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 07:05:07.503921 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 07:05:07.507514 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 07:05:07.510878 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 07:05:07.517571 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 07:05:07.520858 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 07:05:07.524037 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 07:05:07.528020 call enable_fixed_mtrr()
1958 07:05:07.531734 CPU physical address size: 39 bits
1959 07:05:07.538420 MTRR: default type WB/UC MTRR counts: 6/7.
1960 07:05:07.541302 MTRR: WB selected as default type.
1961 07:05:07.548438 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1962 07:05:07.551162 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1963 07:05:07.557838 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1964 07:05:07.564718 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1965 07:05:07.571517 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1966 07:05:07.577718 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1967 07:05:07.581632
1968 07:05:07.582138 MTRR check
1969 07:05:07.585035 Fixed MTRRs : Enabled
1970 07:05:07.585578 Variable MTRRs: Enabled
1971 07:05:07.585922
1972 07:05:07.591601 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 07:05:07.595502 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 07:05:07.598603 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 07:05:07.601908 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 07:05:07.608794 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 07:05:07.611914 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 07:05:07.615282 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 07:05:07.618148 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 07:05:07.625000 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 07:05:07.628540 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 07:05:07.631698 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 07:05:07.639291 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1984 07:05:07.642159 call enable_fixed_mtrr()
1985 07:05:07.645712 Checking cr50 for pending updates
1986 07:05:07.649684 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 07:05:07.652498 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 07:05:07.659430 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 07:05:07.662668 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 07:05:07.666347 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 07:05:07.669394 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 07:05:07.673074 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 07:05:07.679727 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 07:05:07.683278 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 07:05:07.686068 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 07:05:07.689196 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 07:05:07.695829 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 07:05:07.702820 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 07:05:07.703357 call enable_fixed_mtrr()
2000 07:05:07.709333 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 07:05:07.712561 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 07:05:07.716091 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 07:05:07.718968 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 07:05:07.722091 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 07:05:07.729097 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 07:05:07.732031 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 07:05:07.735801 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 07:05:07.738711 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 07:05:07.744384 CPU physical address size: 39 bits
2010 07:05:07.751343 call enable_fixed_mtrr()
2011 07:05:07.753890 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 07:05:07.757566 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 07:05:07.764665 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 07:05:07.768282 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 07:05:07.770808 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 07:05:07.774603 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 07:05:07.781172 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 07:05:07.783961 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 07:05:07.787579 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 07:05:07.790513 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 07:05:07.797770 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 07:05:07.801366 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 07:05:07.807231 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 07:05:07.810689 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 07:05:07.814149 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 07:05:07.817541 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 07:05:07.824231 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 07:05:07.827747 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 07:05:07.830628 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 07:05:07.833504 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 07:05:07.840341 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 07:05:07.843708 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 07:05:07.847257 call enable_fixed_mtrr()
2034 07:05:07.850380 call enable_fixed_mtrr()
2035 07:05:07.853814 CPU physical address size: 39 bits
2036 07:05:07.857375 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 07:05:07.860079 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 07:05:07.867358 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 07:05:07.870320 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 07:05:07.873655 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 07:05:07.877064 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 07:05:07.883919 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 07:05:07.886951 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 07:05:07.890079 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 07:05:07.893500 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 07:05:07.899950 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 07:05:07.904126 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 07:05:07.910367 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 07:05:07.913756 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 07:05:07.917073 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 07:05:07.920409 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 07:05:07.927125 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 07:05:07.930622 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 07:05:07.933273 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 07:05:07.936764 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 07:05:07.943241 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 07:05:07.946887 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 07:05:07.950001 call enable_fixed_mtrr()
2059 07:05:07.953888 call enable_fixed_mtrr()
2060 07:05:07.956865 CPU physical address size: 39 bits
2061 07:05:07.961314 CPU physical address size: 39 bits
2062 07:05:07.967647 CPU physical address size: 39 bits
2063 07:05:07.970743 CPU physical address size: 39 bits
2064 07:05:07.974841 Reading cr50 TPM mode
2065 07:05:07.978263 CPU physical address size: 39 bits
2066 07:05:07.986752 BS: BS_PAYLOAD_LOAD entry times (exec / console): 335 / 6 ms
2067 07:05:07.996439 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2068 07:05:08.000097 Checking segment from ROM address 0xffc02b38
2069 07:05:08.003153 Checking segment from ROM address 0xffc02b54
2070 07:05:08.010572 Loading segment from ROM address 0xffc02b38
2071 07:05:08.011104 code (compression=0)
2072 07:05:08.020094 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2073 07:05:08.030121 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2074 07:05:08.030656 it's not compressed!
2075 07:05:08.179889 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2076 07:05:08.186469 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2077 07:05:08.193022 Loading segment from ROM address 0xffc02b54
2078 07:05:08.196663 Entry Point 0x30000000
2079 07:05:08.197199 Loaded segments
2080 07:05:08.202818 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2081 07:05:08.249106 Finalizing chipset.
2082 07:05:08.252487 Finalizing SMM.
2083 07:05:08.253025 APMC done.
2084 07:05:08.258437 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2085 07:05:08.262053 mp_park_aps done after 0 msecs.
2086 07:05:08.265256 Jumping to boot code at 0x30000000(0x76b25000)
2087 07:05:08.274982 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2088 07:05:08.275520
2089 07:05:08.278083
2090 07:05:08.278532
2091 07:05:08.279562 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2092 07:05:08.280069 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2093 07:05:08.280477 Setting prompt string to ['volteer:']
2094 07:05:08.280875 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2095 07:05:08.281630 Starting depthcharge on Voema...
2096 07:05:08.281999
2097 07:05:08.288012 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2098 07:05:08.288553
2099 07:05:08.295081 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2100 07:05:08.295636
2101 07:05:08.301880 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2102 07:05:08.302419
2103 07:05:08.304893 Failed to find eMMC card reader
2104 07:05:08.305375
2105 07:05:08.308100 Wipe memory regions:
2106 07:05:08.308689
2107 07:05:08.311238 [0x00000000001000, 0x000000000a0000)
2108 07:05:08.311679
2109 07:05:08.314447 [0x00000000100000, 0x00000030000000)
2110 07:05:08.353562
2111 07:05:08.357466 [0x00000032662db0, 0x000000769ef000)
2112 07:05:08.411472
2113 07:05:08.415357 [0x00000100000000, 0x00000480400000)
2114 07:05:09.094932
2115 07:05:09.098327 ec_init: CrosEC protocol v3 supported (256, 256)
2116 07:05:09.530450
2117 07:05:09.531024 R8152: Initializing
2118 07:05:09.531407
2119 07:05:09.532884 Version 6 (ocp_data = 5c30)
2120 07:05:09.533425
2121 07:05:09.536604 R8152: Done initializing
2122 07:05:09.537135
2123 07:05:09.539504 Adding net device
2124 07:05:09.840889
2125 07:05:09.844096 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2126 07:05:09.844537
2127 07:05:09.844883
2128 07:05:09.845282
2129 07:05:09.847692 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2131 07:05:09.949397 volteer: tftpboot 192.168.201.1 9726785/tftp-deploy-48w8xpqu/kernel/bzImage 9726785/tftp-deploy-48w8xpqu/kernel/cmdline 9726785/tftp-deploy-48w8xpqu/ramdisk/ramdisk.cpio.gz
2132 07:05:09.950028 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2133 07:05:09.950486 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2134 07:05:09.955038 tftpboot 192.168.201.1 9726785/tftp-deploy-48w8xpqu/kernel/bzImoy-48w8xpqu/kernel/cmdline 9726785/tftp-deploy-48w8xpqu/ramdisk/ramdisk.cpio.gz
2135 07:05:09.955492
2136 07:05:09.955835 Waiting for link
2137 07:05:10.158156
2138 07:05:10.158692 done.
2139 07:05:10.159038
2140 07:05:10.159354 MAC: 00:24:32:30:77:d1
2141 07:05:10.159659
2142 07:05:10.161656 Sending DHCP discover... done.
2143 07:05:10.162085
2144 07:05:10.164938 Waiting for reply... done.
2145 07:05:10.165491
2146 07:05:10.168108 Sending DHCP request... done.
2147 07:05:10.168542
2148 07:05:10.175723 Waiting for reply... done.
2149 07:05:10.176254
2150 07:05:10.176602 My ip is 192.168.201.13
2151 07:05:10.176924
2152 07:05:10.178878 The DHCP server ip is 192.168.201.1
2153 07:05:10.181717
2154 07:05:10.185262 TFTP server IP predefined by user: 192.168.201.1
2155 07:05:10.185796
2156 07:05:10.191821 Bootfile predefined by user: 9726785/tftp-deploy-48w8xpqu/kernel/bzImage
2157 07:05:10.192346
2158 07:05:10.195012 Sending tftp read request... done.
2159 07:05:10.195444
2160 07:05:10.202514 Waiting for the transfer...
2161 07:05:10.203108
2162 07:05:10.907697 00000000 ################################################################
2163 07:05:10.908264
2164 07:05:11.615870 00080000 ################################################################
2165 07:05:11.616388
2166 07:05:12.312067 00100000 ################################################################
2167 07:05:12.312587
2168 07:05:13.019555 00180000 ################################################################
2169 07:05:13.020064
2170 07:05:13.738479 00200000 ################################################################
2171 07:05:13.739019
2172 07:05:14.374455 00280000 ################################################################
2173 07:05:14.374603
2174 07:05:14.943792 00300000 ################################################################
2175 07:05:14.943949
2176 07:05:15.480226 00380000 ################################################################
2177 07:05:15.480381
2178 07:05:16.017916 00400000 ################################################################
2179 07:05:16.018066
2180 07:05:16.555116 00480000 ################################################################
2181 07:05:16.555274
2182 07:05:17.096436 00500000 ################################################################
2183 07:05:17.096594
2184 07:05:17.668162 00580000 ################################################################
2185 07:05:17.668319
2186 07:05:18.245289 00600000 ################################################################
2187 07:05:18.245445
2188 07:05:18.806095 00680000 ################################################################
2189 07:05:18.806248
2190 07:05:19.351832 00700000 ################################################################
2191 07:05:19.351990
2192 07:05:19.869695 00780000 ################################################################
2193 07:05:19.869856
2194 07:05:20.403712 00800000 ################################################################
2195 07:05:20.403872
2196 07:05:20.936999 00880000 ################################################################
2197 07:05:20.937152
2198 07:05:21.349082 00900000 ################################################ done.
2199 07:05:21.349243
2200 07:05:21.352165 The bootfile was 9826304 bytes long.
2201 07:05:21.352254
2202 07:05:21.355414 Sending tftp read request... done.
2203 07:05:21.355511
2204 07:05:21.359173 Waiting for the transfer...
2205 07:05:21.359270
2206 07:05:21.913875 00000000 ################################################################
2207 07:05:21.914036
2208 07:05:22.489552 00080000 ################################################################
2209 07:05:22.490103
2210 07:05:23.215965 00100000 ################################################################
2211 07:05:23.216606
2212 07:05:23.924268 00180000 ################################################################
2213 07:05:23.924815
2214 07:05:24.615780 00200000 ################################################################
2215 07:05:24.616353
2216 07:05:25.320746 00280000 ################################################################
2217 07:05:25.321297
2218 07:05:26.025302 00300000 ################################################################
2219 07:05:26.025855
2220 07:05:26.748697 00380000 ################################################################
2221 07:05:26.749280
2222 07:05:27.471857 00400000 ################################################################
2223 07:05:27.472407
2224 07:05:28.211586 00480000 ################################################################
2225 07:05:28.212144
2226 07:05:28.939988 00500000 ################################################################
2227 07:05:28.940541
2228 07:05:29.653224 00580000 ################################################################
2229 07:05:29.653779
2230 07:05:30.370565 00600000 ################################################################
2231 07:05:30.371111
2232 07:05:31.083757 00680000 ################################################################
2233 07:05:31.084294
2234 07:05:31.743663 00700000 ################################################################
2235 07:05:31.744201
2236 07:05:32.346882 00780000 ################################################################
2237 07:05:32.347047
2238 07:05:33.047979 00800000 ################################################################
2239 07:05:33.048506
2240 07:05:33.384031 00880000 ################################# done.
2241 07:05:33.384196
2242 07:05:33.387197 Sending tftp read request... done.
2243 07:05:33.387296
2244 07:05:33.390634 Waiting for the transfer...
2245 07:05:33.390729
2246 07:05:33.390803 00000000 # done.
2247 07:05:33.390875
2248 07:05:33.400526 Command line loaded dynamically from TFTP file: 9726785/tftp-deploy-48w8xpqu/kernel/cmdline
2249 07:05:33.400621
2250 07:05:33.413553 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2251 07:05:33.417843
2252 07:05:33.421354 Shutting down all USB controllers.
2253 07:05:33.421456
2254 07:05:33.421536 Removing current net device
2255 07:05:33.421611
2256 07:05:33.424471 Finalizing coreboot
2257 07:05:33.424582
2258 07:05:33.431029 Exiting depthcharge with code 4 at timestamp: 33741939
2259 07:05:33.431151
2260 07:05:33.431246
2261 07:05:33.431335 Starting kernel ...
2262 07:05:33.431421
2263 07:05:33.431504
2264 07:05:33.431966 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2265 07:05:33.432109 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2266 07:05:33.432216 Setting prompt string to ['Linux version [0-9]']
2267 07:05:33.432314 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2268 07:05:33.432412 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2270 07:09:52.433307 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2272 07:09:52.434462 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2274 07:09:52.435323 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2277 07:09:52.436757 end: 2 depthcharge-action (duration 00:05:00) [common]
2279 07:09:52.437723 Cleaning after the job
2280 07:09:52.437817 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726785/tftp-deploy-48w8xpqu/ramdisk
2281 07:09:52.438535 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726785/tftp-deploy-48w8xpqu/kernel
2282 07:09:52.439246 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726785/tftp-deploy-48w8xpqu/modules
2283 07:09:52.439619 start: 5.1 power-off (timeout 00:00:30) [common]
2284 07:09:52.439783 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2285 07:09:52.517369 >> Command sent successfully.
2286 07:09:52.523532 Returned 0 in 0 seconds
2287 07:09:52.625109 end: 5.1 power-off (duration 00:00:00) [common]
2289 07:09:52.626674 start: 5.2 read-feedback (timeout 00:10:00) [common]
2290 07:09:52.627854 Listened to connection for namespace 'common' for up to 1s
2291 07:09:53.629519 Finalising connection for namespace 'common'
2292 07:09:53.630197 Disconnecting from shell: Finalise
2293 07:09:53.630642
2294 07:09:53.732187 end: 5.2 read-feedback (duration 00:00:01) [common]
2295 07:09:53.732816 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9726785
2296 07:09:53.742825 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9726785
2297 07:09:53.742959 JobError: Your job cannot terminate cleanly.