Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 07:04:38.752427 lava-dispatcher, installed at version: 2023.01
2 07:04:38.752597 start: 0 validate
3 07:04:38.752710 Start time: 2023-03-22 07:04:38.752704+00:00 (UTC)
4 07:04:38.752820 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:04:38.752945 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230317.0%2Famd64%2Frootfs.cpio.gz exists
6 07:04:39.045516 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:04:39.046414 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.277-cip94%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:04:42.051746 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:04:42.052483 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.277-cip94%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:04:42.353570 validate duration: 3.60
12 07:04:42.354948 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:04:42.356115 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:04:42.356784 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:04:42.357391 Not decompressing ramdisk as can be used compressed.
16 07:04:42.357906 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230317.0/amd64/rootfs.cpio.gz
17 07:04:42.358281 saving as /var/lib/lava/dispatcher/tmp/9726731/tftp-deploy-__28l00g/ramdisk/rootfs.cpio.gz
18 07:04:42.358633 total size: 35758894 (34MB)
19 07:04:43.077076 progress 0% (0MB)
20 07:04:43.088776 progress 5% (1MB)
21 07:04:43.097210 progress 10% (3MB)
22 07:04:43.105458 progress 15% (5MB)
23 07:04:43.113845 progress 20% (6MB)
24 07:04:43.122060 progress 25% (8MB)
25 07:04:43.130576 progress 30% (10MB)
26 07:04:43.138925 progress 35% (11MB)
27 07:04:43.147342 progress 40% (13MB)
28 07:04:43.155789 progress 45% (15MB)
29 07:04:43.164267 progress 50% (17MB)
30 07:04:43.172806 progress 55% (18MB)
31 07:04:43.181163 progress 60% (20MB)
32 07:04:43.189817 progress 65% (22MB)
33 07:04:43.198237 progress 70% (23MB)
34 07:04:43.206877 progress 75% (25MB)
35 07:04:43.215369 progress 80% (27MB)
36 07:04:43.223635 progress 85% (29MB)
37 07:04:43.232380 progress 90% (30MB)
38 07:04:43.240689 progress 95% (32MB)
39 07:04:43.249319 progress 100% (34MB)
40 07:04:43.249494 34MB downloaded in 0.89s (38.28MB/s)
41 07:04:43.249656 end: 1.1.1 http-download (duration 00:00:01) [common]
43 07:04:43.249935 end: 1.1 download-retry (duration 00:00:01) [common]
44 07:04:43.250042 start: 1.2 download-retry (timeout 00:09:59) [common]
45 07:04:43.250168 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 07:04:43.250291 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.277-cip94/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:04:43.250378 saving as /var/lib/lava/dispatcher/tmp/9726731/tftp-deploy-__28l00g/kernel/bzImage
48 07:04:43.250442 total size: 9826304 (9MB)
49 07:04:43.250506 No compression specified
50 07:04:43.251507 progress 0% (0MB)
51 07:04:43.253852 progress 5% (0MB)
52 07:04:43.256283 progress 10% (0MB)
53 07:04:43.258985 progress 15% (1MB)
54 07:04:43.261542 progress 20% (1MB)
55 07:04:43.264062 progress 25% (2MB)
56 07:04:43.266493 progress 30% (2MB)
57 07:04:43.268900 progress 35% (3MB)
58 07:04:43.271329 progress 40% (3MB)
59 07:04:43.273750 progress 45% (4MB)
60 07:04:43.276170 progress 50% (4MB)
61 07:04:43.278539 progress 55% (5MB)
62 07:04:43.280963 progress 60% (5MB)
63 07:04:43.283355 progress 65% (6MB)
64 07:04:43.285744 progress 70% (6MB)
65 07:04:43.288119 progress 75% (7MB)
66 07:04:43.290452 progress 80% (7MB)
67 07:04:43.292813 progress 85% (7MB)
68 07:04:43.295135 progress 90% (8MB)
69 07:04:43.297498 progress 95% (8MB)
70 07:04:43.299915 progress 100% (9MB)
71 07:04:43.300133 9MB downloaded in 0.05s (188.60MB/s)
72 07:04:43.300285 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:04:43.300527 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:04:43.300617 start: 1.3 download-retry (timeout 00:09:59) [common]
76 07:04:43.300709 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 07:04:43.300820 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.277-cip94/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:04:43.300890 saving as /var/lib/lava/dispatcher/tmp/9726731/tftp-deploy-__28l00g/modules/modules.tar
79 07:04:43.300953 total size: 461712 (0MB)
80 07:04:43.301015 Using unxz to decompress xz
81 07:04:43.304212 progress 7% (0MB)
82 07:04:43.304574 progress 14% (0MB)
83 07:04:43.304809 progress 21% (0MB)
84 07:04:43.306180 progress 28% (0MB)
85 07:04:43.308288 progress 35% (0MB)
86 07:04:43.310516 progress 42% (0MB)
87 07:04:43.312953 progress 49% (0MB)
88 07:04:43.314935 progress 56% (0MB)
89 07:04:43.316881 progress 63% (0MB)
90 07:04:43.319139 progress 70% (0MB)
91 07:04:43.321011 progress 78% (0MB)
92 07:04:43.323025 progress 85% (0MB)
93 07:04:43.324827 progress 92% (0MB)
94 07:04:43.326845 progress 99% (0MB)
95 07:04:43.333405 0MB downloaded in 0.03s (13.57MB/s)
96 07:04:43.333687 end: 1.3.1 http-download (duration 00:00:00) [common]
98 07:04:43.333957 end: 1.3 download-retry (duration 00:00:00) [common]
99 07:04:43.334055 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
100 07:04:43.334151 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
101 07:04:43.334237 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 07:04:43.334328 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
103 07:04:43.334513 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq
104 07:04:43.334619 makedir: /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin
105 07:04:43.334707 makedir: /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/tests
106 07:04:43.334788 makedir: /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/results
107 07:04:43.334901 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-add-keys
108 07:04:43.335034 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-add-sources
109 07:04:43.335152 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-background-process-start
110 07:04:43.335263 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-background-process-stop
111 07:04:43.335374 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-common-functions
112 07:04:43.335483 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-echo-ipv4
113 07:04:43.335594 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-install-packages
114 07:04:43.335731 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-installed-packages
115 07:04:43.335859 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-os-build
116 07:04:43.335970 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-probe-channel
117 07:04:43.336080 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-probe-ip
118 07:04:43.336187 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-target-ip
119 07:04:43.336293 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-target-mac
120 07:04:43.336415 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-target-storage
121 07:04:43.336543 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-test-case
122 07:04:43.336651 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-test-event
123 07:04:43.336758 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-test-feedback
124 07:04:43.336865 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-test-raise
125 07:04:43.336977 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-test-reference
126 07:04:43.337085 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-test-runner
127 07:04:43.337192 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-test-set
128 07:04:43.337301 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-test-shell
129 07:04:43.337414 Updating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-install-packages (oe)
130 07:04:43.337525 Updating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/bin/lava-installed-packages (oe)
131 07:04:43.337626 Creating /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/environment
132 07:04:43.337716 LAVA metadata
133 07:04:43.337789 - LAVA_JOB_ID=9726731
134 07:04:43.337854 - LAVA_DISPATCHER_IP=192.168.201.1
135 07:04:43.337957 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
136 07:04:43.338024 skipped lava-vland-overlay
137 07:04:43.338104 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 07:04:43.338190 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
139 07:04:43.338254 skipped lava-multinode-overlay
140 07:04:43.338329 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 07:04:43.338414 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
142 07:04:43.338516 Loading test definitions
143 07:04:43.338612 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
144 07:04:43.338686 Using /lava-9726731 at stage 0
145 07:04:43.338936 uuid=9726731_1.4.2.3.1 testdef=None
146 07:04:43.339026 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 07:04:43.339116 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
148 07:04:43.339581 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 07:04:43.339854 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
151 07:04:43.340391 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 07:04:43.340665 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
154 07:04:43.341171 runner path: /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/0/tests/0_cros-ec test_uuid 9726731_1.4.2.3.1
155 07:04:43.341316 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 07:04:43.341528 Creating lava-test-runner.conf files
158 07:04:43.341592 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726731/lava-overlay-tjf69riq/lava-9726731/0 for stage 0
159 07:04:43.341674 - 0_cros-ec
160 07:04:43.341767 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
161 07:04:43.341857 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
162 07:04:43.347409 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
163 07:04:43.347530 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
164 07:04:43.347624 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
165 07:04:43.347748 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
166 07:04:43.347841 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
167 07:04:44.112715 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
168 07:04:44.113072 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
169 07:04:44.113187 extracting modules file /var/lib/lava/dispatcher/tmp/9726731/tftp-deploy-__28l00g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726731/extract-overlay-ramdisk-m40fa2tv/ramdisk
170 07:04:44.124278 end: 1.4.4 extract-modules (duration 00:00:00) [common]
171 07:04:44.124442 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
172 07:04:44.124542 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726731/compress-overlay-giju_1_h/overlay-1.4.2.4.tar.gz to ramdisk
173 07:04:44.124613 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726731/compress-overlay-giju_1_h/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9726731/extract-overlay-ramdisk-m40fa2tv/ramdisk
174 07:04:44.127868 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
175 07:04:44.127976 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
176 07:04:44.128067 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
177 07:04:44.128160 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
178 07:04:44.128241 Building ramdisk /var/lib/lava/dispatcher/tmp/9726731/extract-overlay-ramdisk-m40fa2tv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9726731/extract-overlay-ramdisk-m40fa2tv/ramdisk
179 07:04:44.386686 >> 187900 blocks
180 07:04:47.622060 rename /var/lib/lava/dispatcher/tmp/9726731/extract-overlay-ramdisk-m40fa2tv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9726731/tftp-deploy-__28l00g/ramdisk/ramdisk.cpio.gz
181 07:04:47.622521 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
182 07:04:47.622650 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
183 07:04:47.622757 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
184 07:04:47.622850 No mkimage arch provided, not using FIT.
185 07:04:47.622944 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
186 07:04:47.623033 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
187 07:04:47.623129 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
188 07:04:47.623224 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
189 07:04:47.623305 No LXC device requested
190 07:04:47.623388 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
191 07:04:47.623479 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
192 07:04:47.623562 end: 1.6 deploy-device-env (duration 00:00:00) [common]
193 07:04:47.623636 Checking files for TFTP limit of 4294967296 bytes.
194 07:04:47.624142 end: 1 tftp-deploy (duration 00:00:05) [common]
195 07:04:47.624255 start: 2 depthcharge-action (timeout 00:05:00) [common]
196 07:04:47.624353 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
197 07:04:47.624516 substitutions:
198 07:04:47.624585 - {DTB}: None
199 07:04:47.624657 - {INITRD}: 9726731/tftp-deploy-__28l00g/ramdisk/ramdisk.cpio.gz
200 07:04:47.624718 - {KERNEL}: 9726731/tftp-deploy-__28l00g/kernel/bzImage
201 07:04:47.624777 - {LAVA_MAC}: None
202 07:04:47.624834 - {PRESEED_CONFIG}: None
203 07:04:47.624890 - {PRESEED_LOCAL}: None
204 07:04:47.624947 - {RAMDISK}: 9726731/tftp-deploy-__28l00g/ramdisk/ramdisk.cpio.gz
205 07:04:47.625033 - {ROOT_PART}: None
206 07:04:47.625094 - {ROOT}: None
207 07:04:47.625150 - {SERVER_IP}: 192.168.201.1
208 07:04:47.625205 - {TEE}: None
209 07:04:47.625261 Parsed boot commands:
210 07:04:47.625315 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
211 07:04:47.625468 Parsed boot commands: tftpboot 192.168.201.1 9726731/tftp-deploy-__28l00g/kernel/bzImage 9726731/tftp-deploy-__28l00g/kernel/cmdline 9726731/tftp-deploy-__28l00g/ramdisk/ramdisk.cpio.gz
212 07:04:47.625627 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
213 07:04:47.625749 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
214 07:04:47.625999 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
215 07:04:47.626108 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
216 07:04:47.626209 Not connected, no need to disconnect.
217 07:04:47.626303 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
218 07:04:47.626384 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
219 07:04:47.626456 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
220 07:04:47.629503 Setting prompt string to ['lava-test: # ']
221 07:04:47.629839 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
222 07:04:47.629959 end: 2.2.1 reset-connection (duration 00:00:00) [common]
223 07:04:47.630059 start: 2.2.2 reset-device (timeout 00:05:00) [common]
224 07:04:47.630153 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
225 07:04:47.630371 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
226 07:04:52.772468 >> Command sent successfully.
227 07:04:52.780797 Returned 0 in 5 seconds
228 07:04:52.882289 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
230 07:04:52.883572 end: 2.2.2 reset-device (duration 00:00:05) [common]
231 07:04:52.884048 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
232 07:04:52.884425 Setting prompt string to 'Starting depthcharge on Voema...'
233 07:04:52.884724 Changing prompt to 'Starting depthcharge on Voema...'
234 07:04:52.885041 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
235 07:04:52.886096 [Enter `^Ec?' for help]
236 07:04:54.478229
237 07:04:54.478811
238 07:04:54.488797 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
239 07:04:54.491620 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
240 07:04:54.498351 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
241 07:04:54.501644 CPU: AES supported, TXT NOT supported, VT supported
242 07:04:54.508090 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
243 07:04:54.515077 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
244 07:04:54.517889 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
245 07:04:54.521716 VBOOT: Loading verstage.
246 07:04:54.528043 FMAP: Found "FLASH" version 1.1 at 0x1804000.
247 07:04:54.531249 FMAP: base = 0x0 size = 0x2000000 #areas = 32
248 07:04:54.534724 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
249 07:04:54.546058 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
250 07:04:54.552008 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
251 07:04:54.552543
252 07:04:54.553001
253 07:04:54.565335 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
254 07:04:54.579333 Probing TPM: . done!
255 07:04:54.582916 TPM ready after 0 ms
256 07:04:54.585583 Connected to device vid:did:rid of 1ae0:0028:00
257 07:04:54.597171 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
258 07:04:54.603490 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
259 07:04:54.607011 Initialized TPM device CR50 revision 0
260 07:04:54.658431 tlcl_send_startup: Startup return code is 0
261 07:04:54.658972 TPM: setup succeeded
262 07:04:54.674446 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
263 07:04:54.688311 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
264 07:04:54.701341 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
265 07:04:54.710557 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
266 07:04:54.714592 Chrome EC: UHEPI supported
267 07:04:54.718506 Phase 1
268 07:04:54.721001 FMAP: area GBB found @ 1805000 (458752 bytes)
269 07:04:54.730764 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
270 07:04:54.737810 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
271 07:04:54.744626 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
272 07:04:54.751164 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
273 07:04:54.754298 Recovery requested (1009000e)
274 07:04:54.757496 TPM: Extending digest for VBOOT: boot mode into PCR 0
275 07:04:54.769227 tlcl_extend: response is 0
276 07:04:54.777285 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
277 07:04:54.785194 tlcl_extend: response is 0
278 07:04:54.792034 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
279 07:04:54.798432 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
280 07:04:54.805499 BS: verstage times (exec / console): total (unknown) / 142 ms
281 07:04:54.806054
282 07:04:54.806409
283 07:04:54.818861 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
284 07:04:54.825482 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
285 07:04:54.828858 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
286 07:04:54.831575 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
287 07:04:54.839023 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
288 07:04:54.841635 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
289 07:04:54.844862 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
290 07:04:54.847978 TCO_STS: 0000 0000
291 07:04:54.852066 GEN_PMCON: d0015038 00002200
292 07:04:54.855913 GBLRST_CAUSE: 00000000 00000000
293 07:04:54.858678 HPR_CAUSE0: 00000000
294 07:04:54.859223 prev_sleep_state 5
295 07:04:54.861279 Boot Count incremented to 17283
296 07:04:54.867953 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
297 07:04:54.874779 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
298 07:04:54.884219 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
299 07:04:54.891611 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
300 07:04:54.894409 Chrome EC: UHEPI supported
301 07:04:54.901089 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
302 07:04:54.914201 Probing TPM: done!
303 07:04:54.918510 Connected to device vid:did:rid of 1ae0:0028:00
304 07:04:54.928787 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
305 07:04:54.932285 Initialized TPM device CR50 revision 0
306 07:04:54.947850 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
307 07:04:54.954172 MRC: Hash idx 0x100b comparison successful.
308 07:04:54.957238 MRC cache found, size faa8
309 07:04:54.957685 bootmode is set to: 2
310 07:04:54.961227 SPD index = 0
311 07:04:54.967139 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
312 07:04:54.971627 SPD: module type is LPDDR4X
313 07:04:54.973707 SPD: module part number is MT53E512M64D4NW-046
314 07:04:54.980485 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
315 07:04:54.987725 SPD: device width 16 bits, bus width 16 bits
316 07:04:54.990090 SPD: module size is 1024 MB (per channel)
317 07:04:55.424289 CBMEM:
318 07:04:55.426019 IMD: root @ 0x76fff000 254 entries.
319 07:04:55.429885 IMD: root @ 0x76ffec00 62 entries.
320 07:04:55.432956 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
321 07:04:55.439591 FMAP: area RW_VPD found @ f35000 (8192 bytes)
322 07:04:55.443424 External stage cache:
323 07:04:55.446233 IMD: root @ 0x7b3ff000 254 entries.
324 07:04:55.449603 IMD: root @ 0x7b3fec00 62 entries.
325 07:04:55.464429 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
326 07:04:55.471192 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
327 07:04:55.478050 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
328 07:04:55.492666 MRC: 'RECOVERY_MRC_CACHE' does not need update.
329 07:04:55.496025 cse_lite: Skip switching to RW in the recovery path
330 07:04:55.499640 8 DIMMs found
331 07:04:55.500115 SMM Memory Map
332 07:04:55.503071 SMRAM : 0x7b000000 0x800000
333 07:04:55.506387 Subregion 0: 0x7b000000 0x200000
334 07:04:55.509046 Subregion 1: 0x7b200000 0x200000
335 07:04:55.512145 Subregion 2: 0x7b400000 0x400000
336 07:04:55.515679 top_of_ram = 0x77000000
337 07:04:55.522776 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
338 07:04:55.526760 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
339 07:04:55.532326 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
340 07:04:55.539327 MTRR Range: Start=ff000000 End=0 (Size 1000000)
341 07:04:55.545161 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
342 07:04:55.552070 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
343 07:04:55.561986 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
344 07:04:55.565232 Processing 211 relocs. Offset value of 0x74c0b000
345 07:04:55.574924 BS: romstage times (exec / console): total (unknown) / 277 ms
346 07:04:55.580985
347 07:04:55.581428
348 07:04:55.590778 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
349 07:04:55.593938 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
350 07:04:55.604433 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
351 07:04:55.610513 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
352 07:04:55.617718 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
353 07:04:55.624061 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
354 07:04:55.670666 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
355 07:04:55.677381 Processing 5008 relocs. Offset value of 0x75d98000
356 07:04:55.680828 BS: postcar times (exec / console): total (unknown) / 59 ms
357 07:04:55.683970
358 07:04:55.684439
359 07:04:55.694499 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
360 07:04:55.695021 Normal boot
361 07:04:55.698024 FW_CONFIG value is 0x804c02
362 07:04:55.701182 PCI: 00:07.0 disabled by fw_config
363 07:04:55.704502 PCI: 00:07.1 disabled by fw_config
364 07:04:55.708251 PCI: 00:0d.2 disabled by fw_config
365 07:04:55.711529 PCI: 00:1c.7 disabled by fw_config
366 07:04:55.717639 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
367 07:04:55.724447 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 07:04:55.727231 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 07:04:55.731010 GENERIC: 0.0 disabled by fw_config
370 07:04:55.734344 GENERIC: 1.0 disabled by fw_config
371 07:04:55.740556 fw_config match found: DB_USB=USB3_ACTIVE
372 07:04:55.744320 fw_config match found: DB_USB=USB3_ACTIVE
373 07:04:55.748055 fw_config match found: DB_USB=USB3_ACTIVE
374 07:04:55.753935 fw_config match found: DB_USB=USB3_ACTIVE
375 07:04:55.757340 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
376 07:04:55.763935 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
377 07:04:55.773876 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
378 07:04:55.781728 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
379 07:04:55.783992 microcode: sig=0x806c1 pf=0x80 revision=0x86
380 07:04:55.790481 microcode: Update skipped, already up-to-date
381 07:04:55.797229 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
382 07:04:55.824258 Detected 4 core, 8 thread CPU.
383 07:04:55.827626 Setting up SMI for CPU
384 07:04:55.831209 IED base = 0x7b400000
385 07:04:55.834403 IED size = 0x00400000
386 07:04:55.834852 Will perform SMM setup.
387 07:04:55.840784 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
388 07:04:55.847384 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
389 07:04:55.854081 Processing 16 relocs. Offset value of 0x00030000
390 07:04:55.857637 Attempting to start 7 APs
391 07:04:55.860450 Waiting for 10ms after sending INIT.
392 07:04:55.876602 Waiting for 1st SIPI to complete...done.
393 07:04:55.877054 AP: slot 2 apic_id 3.
394 07:04:55.879760 AP: slot 6 apic_id 2.
395 07:04:55.883196 AP: slot 1 apic_id 1.
396 07:04:55.883656 AP: slot 5 apic_id 5.
397 07:04:55.886681 AP: slot 4 apic_id 4.
398 07:04:55.889982 AP: slot 3 apic_id 6.
399 07:04:55.890433 AP: slot 7 apic_id 7.
400 07:04:55.896595 Waiting for 2nd SIPI to complete...done.
401 07:04:55.903136 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 07:04:55.909591 Processing 13 relocs. Offset value of 0x00038000
403 07:04:55.913018 Unable to locate Global NVS
404 07:04:55.919324 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
405 07:04:55.923242 Installing permanent SMM handler to 0x7b000000
406 07:04:55.932799 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
407 07:04:55.936540 Processing 794 relocs. Offset value of 0x7b010000
408 07:04:55.946073 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 07:04:55.949594 Processing 13 relocs. Offset value of 0x7b008000
410 07:04:55.955902 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 07:04:55.962684 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
412 07:04:55.966255 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
413 07:04:55.972415 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
414 07:04:55.979422 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
415 07:04:55.985522 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
416 07:04:55.992614 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
417 07:04:55.995992 Unable to locate Global NVS
418 07:04:56.002358 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
419 07:04:56.005680 Clearing SMI status registers
420 07:04:56.009602 SMI_STS: PM1
421 07:04:56.010051 PM1_STS: PWRBTN
422 07:04:56.016094 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
423 07:04:56.018908 In relocation handler: CPU 0
424 07:04:56.022899 New SMBASE=0x7b000000 IEDBASE=0x7b400000
425 07:04:56.028670 Writing SMRR. base = 0x7b000006, mask=0xff800c00
426 07:04:56.031976 Relocation complete.
427 07:04:56.039081 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
428 07:04:56.041754 In relocation handler: CPU 1
429 07:04:56.045385 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
430 07:04:56.048544 Relocation complete.
431 07:04:56.055007 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
432 07:04:56.059142 In relocation handler: CPU 6
433 07:04:56.061855 New SMBASE=0x7affe800 IEDBASE=0x7b400000
434 07:04:56.065054 Writing SMRR. base = 0x7b000006, mask=0xff800c00
435 07:04:56.068504 Relocation complete.
436 07:04:56.075565 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
437 07:04:56.078182 In relocation handler: CPU 2
438 07:04:56.081452 New SMBASE=0x7afff800 IEDBASE=0x7b400000
439 07:04:56.084767 Relocation complete.
440 07:04:56.091366 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
441 07:04:56.095419 In relocation handler: CPU 3
442 07:04:56.097794 New SMBASE=0x7afff400 IEDBASE=0x7b400000
443 07:04:56.104626 Writing SMRR. base = 0x7b000006, mask=0xff800c00
444 07:04:56.105071 Relocation complete.
445 07:04:56.114337 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
446 07:04:56.117632 In relocation handler: CPU 7
447 07:04:56.121138 New SMBASE=0x7affe400 IEDBASE=0x7b400000
448 07:04:56.121587 Relocation complete.
449 07:04:56.130949 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
450 07:04:56.134176 In relocation handler: CPU 5
451 07:04:56.137693 New SMBASE=0x7affec00 IEDBASE=0x7b400000
452 07:04:56.138144 Relocation complete.
453 07:04:56.147558 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
454 07:04:56.148053 In relocation handler: CPU 4
455 07:04:56.154885 New SMBASE=0x7afff000 IEDBASE=0x7b400000
456 07:04:56.158967 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 07:04:56.161902 Relocation complete.
458 07:04:56.162346 Initializing CPU #0
459 07:04:56.165511 CPU: vendor Intel device 806c1
460 07:04:56.169040 CPU: family 06, model 8c, stepping 01
461 07:04:56.171673 Clearing out pending MCEs
462 07:04:56.175536 Setting up local APIC...
463 07:04:56.178945 apic_id: 0x00 done.
464 07:04:56.181996 Turbo is available but hidden
465 07:04:56.182444 Turbo is available and visible
466 07:04:56.188240 microcode: Update skipped, already up-to-date
467 07:04:56.191671 CPU #0 initialized
468 07:04:56.192164 Initializing CPU #1
469 07:04:56.194900 Initializing CPU #5
470 07:04:56.195348 Initializing CPU #4
471 07:04:56.198478 CPU: vendor Intel device 806c1
472 07:04:56.201758 CPU: family 06, model 8c, stepping 01
473 07:04:56.204873 CPU: vendor Intel device 806c1
474 07:04:56.211970 CPU: family 06, model 8c, stepping 01
475 07:04:56.212442 Clearing out pending MCEs
476 07:04:56.214991 Clearing out pending MCEs
477 07:04:56.218081 Setting up local APIC...
478 07:04:56.221530 Initializing CPU #7
479 07:04:56.221982 Initializing CPU #3
480 07:04:56.224537 CPU: vendor Intel device 806c1
481 07:04:56.227855 CPU: family 06, model 8c, stepping 01
482 07:04:56.231249 CPU: vendor Intel device 806c1
483 07:04:56.234948 CPU: family 06, model 8c, stepping 01
484 07:04:56.238614 Clearing out pending MCEs
485 07:04:56.241324 Clearing out pending MCEs
486 07:04:56.244647 Setting up local APIC...
487 07:04:56.245101 Setting up local APIC...
488 07:04:56.247873 Initializing CPU #2
489 07:04:56.251583 Initializing CPU #6
490 07:04:56.252169 Setting up local APIC...
491 07:04:56.254403 apic_id: 0x04 done.
492 07:04:56.258419 apic_id: 0x05 done.
493 07:04:56.260923 microcode: Update skipped, already up-to-date
494 07:04:56.268246 microcode: Update skipped, already up-to-date
495 07:04:56.268851 CPU #4 initialized
496 07:04:56.271114 CPU #5 initialized
497 07:04:56.271509 apic_id: 0x06 done.
498 07:04:56.274266 apic_id: 0x07 done.
499 07:04:56.277830 microcode: Update skipped, already up-to-date
500 07:04:56.284813 microcode: Update skipped, already up-to-date
501 07:04:56.285286 CPU #3 initialized
502 07:04:56.287447 CPU #7 initialized
503 07:04:56.290949 CPU: vendor Intel device 806c1
504 07:04:56.294025 CPU: family 06, model 8c, stepping 01
505 07:04:56.297876 CPU: vendor Intel device 806c1
506 07:04:56.300636 CPU: family 06, model 8c, stepping 01
507 07:04:56.303879 Clearing out pending MCEs
508 07:04:56.307448 Clearing out pending MCEs
509 07:04:56.310554 CPU: vendor Intel device 806c1
510 07:04:56.314003 CPU: family 06, model 8c, stepping 01
511 07:04:56.316864 Clearing out pending MCEs
512 07:04:56.316985 Setting up local APIC...
513 07:04:56.320377 Setting up local APIC...
514 07:04:56.323530 Setting up local APIC...
515 07:04:56.326961 apic_id: 0x01 done.
516 07:04:56.327053 apic_id: 0x03 done.
517 07:04:56.330344 apic_id: 0x02 done.
518 07:04:56.333437 microcode: Update skipped, already up-to-date
519 07:04:56.340078 microcode: Update skipped, already up-to-date
520 07:04:56.340198 CPU #2 initialized
521 07:04:56.343846 CPU #6 initialized
522 07:04:56.347125 microcode: Update skipped, already up-to-date
523 07:04:56.350817 CPU #1 initialized
524 07:04:56.353793 bsp_do_flight_plan done after 455 msecs.
525 07:04:56.357136 CPU: frequency set to 4000 MHz
526 07:04:56.360396 Enabling SMIs.
527 07:04:56.367504 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
528 07:04:56.381528 SATAXPCIE1 indicates PCIe NVMe is present
529 07:04:56.384872 Probing TPM: done!
530 07:04:56.388349 Connected to device vid:did:rid of 1ae0:0028:00
531 07:04:56.398841 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
532 07:04:56.401966 Initialized TPM device CR50 revision 0
533 07:04:56.405285 Enabling S0i3.4
534 07:04:56.413053 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
535 07:04:56.415572 Found a VBT of 8704 bytes after decompression
536 07:04:56.422024 cse_lite: CSE RO boot. HybridStorageMode disabled
537 07:04:56.428328 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
538 07:04:56.504695 FSPS returned 0
539 07:04:56.507543 Executing Phase 1 of FspMultiPhaseSiInit
540 07:04:56.517272 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
541 07:04:56.520520 port C0 DISC req: usage 1 usb3 1 usb2 5
542 07:04:56.523467 Raw Buffer output 0 00000511
543 07:04:56.527415 Raw Buffer output 1 00000000
544 07:04:56.530968 pmc_send_ipc_cmd succeeded
545 07:04:56.537135 port C1 DISC req: usage 1 usb3 2 usb2 3
546 07:04:56.537477 Raw Buffer output 0 00000321
547 07:04:56.540853 Raw Buffer output 1 00000000
548 07:04:56.544831 pmc_send_ipc_cmd succeeded
549 07:04:56.550189 Detected 4 core, 8 thread CPU.
550 07:04:56.553590 Detected 4 core, 8 thread CPU.
551 07:04:56.788148 Display FSP Version Info HOB
552 07:04:56.791065 Reference Code - CPU = a.0.4c.31
553 07:04:56.794682 uCode Version = 0.0.0.86
554 07:04:56.797523 TXT ACM version = ff.ff.ff.ffff
555 07:04:56.801360 Reference Code - ME = a.0.4c.31
556 07:04:56.804497 MEBx version = 0.0.0.0
557 07:04:56.807465 ME Firmware Version = Consumer SKU
558 07:04:56.811370 Reference Code - PCH = a.0.4c.31
559 07:04:56.814348 PCH-CRID Status = Disabled
560 07:04:56.817323 PCH-CRID Original Value = ff.ff.ff.ffff
561 07:04:56.820698 PCH-CRID New Value = ff.ff.ff.ffff
562 07:04:56.824234 OPROM - RST - RAID = ff.ff.ff.ffff
563 07:04:56.827320 PCH Hsio Version = 4.0.0.0
564 07:04:56.830853 Reference Code - SA - System Agent = a.0.4c.31
565 07:04:56.833713 Reference Code - MRC = 2.0.0.1
566 07:04:56.837104 SA - PCIe Version = a.0.4c.31
567 07:04:56.840576 SA-CRID Status = Disabled
568 07:04:56.844207 SA-CRID Original Value = 0.0.0.1
569 07:04:56.847971 SA-CRID New Value = 0.0.0.1
570 07:04:56.850081 OPROM - VBIOS = ff.ff.ff.ffff
571 07:04:56.853725 IO Manageability Engine FW Version = 11.1.4.0
572 07:04:56.856885 PHY Build Version = 0.0.0.e0
573 07:04:56.860365 Thunderbolt(TM) FW Version = 0.0.0.0
574 07:04:56.867037 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
575 07:04:56.870258 ITSS IRQ Polarities Before:
576 07:04:56.870571 IPC0: 0xffffffff
577 07:04:56.873575 IPC1: 0xffffffff
578 07:04:56.873889 IPC2: 0xffffffff
579 07:04:56.876923 IPC3: 0xffffffff
580 07:04:56.879917 ITSS IRQ Polarities After:
581 07:04:56.880236 IPC0: 0xffffffff
582 07:04:56.883369 IPC1: 0xffffffff
583 07:04:56.883711 IPC2: 0xffffffff
584 07:04:56.886498 IPC3: 0xffffffff
585 07:04:56.890321 Found PCIe Root Port #9 at PCI: 00:1d.0.
586 07:04:56.903478 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
587 07:04:56.913053 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
588 07:04:56.927382 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
589 07:04:56.933907 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
590 07:04:56.936471 Enumerating buses...
591 07:04:56.939851 Show all devs... Before device enumeration.
592 07:04:56.943367 Root Device: enabled 1
593 07:04:56.946824 DOMAIN: 0000: enabled 1
594 07:04:56.947297 CPU_CLUSTER: 0: enabled 1
595 07:04:56.949765 PCI: 00:00.0: enabled 1
596 07:04:56.952848 PCI: 00:02.0: enabled 1
597 07:04:56.956396 PCI: 00:04.0: enabled 1
598 07:04:56.956840 PCI: 00:05.0: enabled 1
599 07:04:56.959506 PCI: 00:06.0: enabled 0
600 07:04:56.962642 PCI: 00:07.0: enabled 0
601 07:04:56.963118 PCI: 00:07.1: enabled 0
602 07:04:56.965972 PCI: 00:07.2: enabled 0
603 07:04:56.969725 PCI: 00:07.3: enabled 0
604 07:04:56.973008 PCI: 00:08.0: enabled 1
605 07:04:56.973456 PCI: 00:09.0: enabled 0
606 07:04:56.976000 PCI: 00:0a.0: enabled 0
607 07:04:56.979363 PCI: 00:0d.0: enabled 1
608 07:04:56.983060 PCI: 00:0d.1: enabled 0
609 07:04:56.983551 PCI: 00:0d.2: enabled 0
610 07:04:56.986194 PCI: 00:0d.3: enabled 0
611 07:04:56.989292 PCI: 00:0e.0: enabled 0
612 07:04:56.993120 PCI: 00:10.2: enabled 1
613 07:04:56.993738 PCI: 00:10.6: enabled 0
614 07:04:56.996155 PCI: 00:10.7: enabled 0
615 07:04:56.999414 PCI: 00:12.0: enabled 0
616 07:04:57.003120 PCI: 00:12.6: enabled 0
617 07:04:57.003583 PCI: 00:13.0: enabled 0
618 07:04:57.006349 PCI: 00:14.0: enabled 1
619 07:04:57.009009 PCI: 00:14.1: enabled 0
620 07:04:57.012979 PCI: 00:14.2: enabled 1
621 07:04:57.013455 PCI: 00:14.3: enabled 1
622 07:04:57.015582 PCI: 00:15.0: enabled 1
623 07:04:57.018669 PCI: 00:15.1: enabled 1
624 07:04:57.022154 PCI: 00:15.2: enabled 1
625 07:04:57.022595 PCI: 00:15.3: enabled 1
626 07:04:57.025736 PCI: 00:16.0: enabled 1
627 07:04:57.029106 PCI: 00:16.1: enabled 0
628 07:04:57.029570 PCI: 00:16.2: enabled 0
629 07:04:57.032262 PCI: 00:16.3: enabled 0
630 07:04:57.035569 PCI: 00:16.4: enabled 0
631 07:04:57.038635 PCI: 00:16.5: enabled 0
632 07:04:57.039079 PCI: 00:17.0: enabled 1
633 07:04:57.042184 PCI: 00:19.0: enabled 0
634 07:04:57.045940 PCI: 00:19.1: enabled 1
635 07:04:57.048918 PCI: 00:19.2: enabled 0
636 07:04:57.049361 PCI: 00:1c.0: enabled 1
637 07:04:57.052032 PCI: 00:1c.1: enabled 0
638 07:04:57.055205 PCI: 00:1c.2: enabled 0
639 07:04:57.058364 PCI: 00:1c.3: enabled 0
640 07:04:57.058811 PCI: 00:1c.4: enabled 0
641 07:04:57.061727 PCI: 00:1c.5: enabled 0
642 07:04:57.065413 PCI: 00:1c.6: enabled 1
643 07:04:57.068311 PCI: 00:1c.7: enabled 0
644 07:04:57.068756 PCI: 00:1d.0: enabled 1
645 07:04:57.071953 PCI: 00:1d.1: enabled 0
646 07:04:57.075442 PCI: 00:1d.2: enabled 1
647 07:04:57.078333 PCI: 00:1d.3: enabled 0
648 07:04:57.078883 PCI: 00:1e.0: enabled 1
649 07:04:57.081446 PCI: 00:1e.1: enabled 0
650 07:04:57.084846 PCI: 00:1e.2: enabled 1
651 07:04:57.087968 PCI: 00:1e.3: enabled 1
652 07:04:57.088536 PCI: 00:1f.0: enabled 1
653 07:04:57.091847 PCI: 00:1f.1: enabled 0
654 07:04:57.095068 PCI: 00:1f.2: enabled 1
655 07:04:57.095510 PCI: 00:1f.3: enabled 1
656 07:04:57.098434 PCI: 00:1f.4: enabled 0
657 07:04:57.101282 PCI: 00:1f.5: enabled 1
658 07:04:57.104830 PCI: 00:1f.6: enabled 0
659 07:04:57.105290 PCI: 00:1f.7: enabled 0
660 07:04:57.108242 APIC: 00: enabled 1
661 07:04:57.111400 GENERIC: 0.0: enabled 1
662 07:04:57.114663 GENERIC: 0.0: enabled 1
663 07:04:57.115136 GENERIC: 1.0: enabled 1
664 07:04:57.118454 GENERIC: 0.0: enabled 1
665 07:04:57.121275 GENERIC: 1.0: enabled 1
666 07:04:57.121756 USB0 port 0: enabled 1
667 07:04:57.124885 GENERIC: 0.0: enabled 1
668 07:04:57.128324 USB0 port 0: enabled 1
669 07:04:57.131036 GENERIC: 0.0: enabled 1
670 07:04:57.131482 I2C: 00:1a: enabled 1
671 07:04:57.134748 I2C: 00:31: enabled 1
672 07:04:57.137963 I2C: 00:32: enabled 1
673 07:04:57.138409 I2C: 00:10: enabled 1
674 07:04:57.140986 I2C: 00:15: enabled 1
675 07:04:57.144346 GENERIC: 0.0: enabled 0
676 07:04:57.147671 GENERIC: 1.0: enabled 0
677 07:04:57.148153 GENERIC: 0.0: enabled 1
678 07:04:57.151191 SPI: 00: enabled 1
679 07:04:57.151635 SPI: 00: enabled 1
680 07:04:57.154145 PNP: 0c09.0: enabled 1
681 07:04:57.157591 GENERIC: 0.0: enabled 1
682 07:04:57.161729 USB3 port 0: enabled 1
683 07:04:57.162275 USB3 port 1: enabled 1
684 07:04:57.164642 USB3 port 2: enabled 0
685 07:04:57.167390 USB3 port 3: enabled 0
686 07:04:57.167859 USB2 port 0: enabled 0
687 07:04:57.171203 USB2 port 1: enabled 1
688 07:04:57.174374 USB2 port 2: enabled 1
689 07:04:57.177543 USB2 port 3: enabled 0
690 07:04:57.177988 USB2 port 4: enabled 1
691 07:04:57.180935 USB2 port 5: enabled 0
692 07:04:57.184062 USB2 port 6: enabled 0
693 07:04:57.184510 USB2 port 7: enabled 0
694 07:04:57.187583 USB2 port 8: enabled 0
695 07:04:57.191345 USB2 port 9: enabled 0
696 07:04:57.193684 USB3 port 0: enabled 0
697 07:04:57.194132 USB3 port 1: enabled 1
698 07:04:57.197081 USB3 port 2: enabled 0
699 07:04:57.200545 USB3 port 3: enabled 0
700 07:04:57.200990 GENERIC: 0.0: enabled 1
701 07:04:57.204024 GENERIC: 1.0: enabled 1
702 07:04:57.207224 APIC: 01: enabled 1
703 07:04:57.207826 APIC: 03: enabled 1
704 07:04:57.210435 APIC: 06: enabled 1
705 07:04:57.213910 APIC: 04: enabled 1
706 07:04:57.214360 APIC: 05: enabled 1
707 07:04:57.217095 APIC: 02: enabled 1
708 07:04:57.220533 APIC: 07: enabled 1
709 07:04:57.221016 Compare with tree...
710 07:04:57.223889 Root Device: enabled 1
711 07:04:57.227109 DOMAIN: 0000: enabled 1
712 07:04:57.227558 PCI: 00:00.0: enabled 1
713 07:04:57.230577 PCI: 00:02.0: enabled 1
714 07:04:57.233752 PCI: 00:04.0: enabled 1
715 07:04:57.236932 GENERIC: 0.0: enabled 1
716 07:04:57.240233 PCI: 00:05.0: enabled 1
717 07:04:57.240682 PCI: 00:06.0: enabled 0
718 07:04:57.243619 PCI: 00:07.0: enabled 0
719 07:04:57.246681 GENERIC: 0.0: enabled 1
720 07:04:57.250449 PCI: 00:07.1: enabled 0
721 07:04:57.253478 GENERIC: 1.0: enabled 1
722 07:04:57.256562 PCI: 00:07.2: enabled 0
723 07:04:57.257011 GENERIC: 0.0: enabled 1
724 07:04:57.260317 PCI: 00:07.3: enabled 0
725 07:04:57.263739 GENERIC: 1.0: enabled 1
726 07:04:57.266414 PCI: 00:08.0: enabled 1
727 07:04:57.269861 PCI: 00:09.0: enabled 0
728 07:04:57.270313 PCI: 00:0a.0: enabled 0
729 07:04:57.273394 PCI: 00:0d.0: enabled 1
730 07:04:57.276758 USB0 port 0: enabled 1
731 07:04:57.279954 USB3 port 0: enabled 1
732 07:04:57.283451 USB3 port 1: enabled 1
733 07:04:57.283946 USB3 port 2: enabled 0
734 07:04:57.286614 USB3 port 3: enabled 0
735 07:04:57.289433 PCI: 00:0d.1: enabled 0
736 07:04:57.293316 PCI: 00:0d.2: enabled 0
737 07:04:57.296369 GENERIC: 0.0: enabled 1
738 07:04:57.299851 PCI: 00:0d.3: enabled 0
739 07:04:57.300298 PCI: 00:0e.0: enabled 0
740 07:04:57.302858 PCI: 00:10.2: enabled 1
741 07:04:57.306022 PCI: 00:10.6: enabled 0
742 07:04:57.309835 PCI: 00:10.7: enabled 0
743 07:04:57.312621 PCI: 00:12.0: enabled 0
744 07:04:57.313069 PCI: 00:12.6: enabled 0
745 07:04:57.316102 PCI: 00:13.0: enabled 0
746 07:04:57.319402 PCI: 00:14.0: enabled 1
747 07:04:57.322777 USB0 port 0: enabled 1
748 07:04:57.326187 USB2 port 0: enabled 0
749 07:04:57.326635 USB2 port 1: enabled 1
750 07:04:57.329298 USB2 port 2: enabled 1
751 07:04:57.333188 USB2 port 3: enabled 0
752 07:04:57.336576 USB2 port 4: enabled 1
753 07:04:57.339675 USB2 port 5: enabled 0
754 07:04:57.340164 USB2 port 6: enabled 0
755 07:04:57.342802 USB2 port 7: enabled 0
756 07:04:57.346170 USB2 port 8: enabled 0
757 07:04:57.349525 USB2 port 9: enabled 0
758 07:04:57.352227 USB3 port 0: enabled 0
759 07:04:57.355675 USB3 port 1: enabled 1
760 07:04:57.356142 USB3 port 2: enabled 0
761 07:04:57.358924 USB3 port 3: enabled 0
762 07:04:57.362218 PCI: 00:14.1: enabled 0
763 07:04:57.365423 PCI: 00:14.2: enabled 1
764 07:04:57.369142 PCI: 00:14.3: enabled 1
765 07:04:57.372684 GENERIC: 0.0: enabled 1
766 07:04:57.373221 PCI: 00:15.0: enabled 1
767 07:04:57.375777 I2C: 00:1a: enabled 1
768 07:04:57.379018 I2C: 00:31: enabled 1
769 07:04:57.382272 I2C: 00:32: enabled 1
770 07:04:57.382744 PCI: 00:15.1: enabled 1
771 07:04:57.385319 I2C: 00:10: enabled 1
772 07:04:57.388993 PCI: 00:15.2: enabled 1
773 07:04:57.392137 PCI: 00:15.3: enabled 1
774 07:04:57.395732 PCI: 00:16.0: enabled 1
775 07:04:57.396188 PCI: 00:16.1: enabled 0
776 07:04:57.399405 PCI: 00:16.2: enabled 0
777 07:04:57.402790 PCI: 00:16.3: enabled 0
778 07:04:57.406116 PCI: 00:16.4: enabled 0
779 07:04:57.406571 PCI: 00:16.5: enabled 0
780 07:04:57.409290 PCI: 00:17.0: enabled 1
781 07:04:57.412631 PCI: 00:19.0: enabled 0
782 07:04:57.415985 PCI: 00:19.1: enabled 1
783 07:04:57.416440 I2C: 00:15: enabled 1
784 07:04:57.420190 PCI: 00:19.2: enabled 0
785 07:04:57.422790 PCI: 00:1d.0: enabled 1
786 07:04:57.472832 GENERIC: 0.0: enabled 1
787 07:04:57.473495 PCI: 00:1e.0: enabled 1
788 07:04:57.474330 PCI: 00:1e.1: enabled 0
789 07:04:57.474734 PCI: 00:1e.2: enabled 1
790 07:04:57.475156 SPI: 00: enabled 1
791 07:04:57.475564 PCI: 00:1e.3: enabled 1
792 07:04:57.475993 SPI: 00: enabled 1
793 07:04:57.476404 PCI: 00:1f.0: enabled 1
794 07:04:57.476802 PNP: 0c09.0: enabled 1
795 07:04:57.477199 PCI: 00:1f.1: enabled 0
796 07:04:57.477589 PCI: 00:1f.2: enabled 1
797 07:04:57.478011 GENERIC: 0.0: enabled 1
798 07:04:57.478404 GENERIC: 0.0: enabled 1
799 07:04:57.478792 GENERIC: 1.0: enabled 1
800 07:04:57.479510 PCI: 00:1f.3: enabled 1
801 07:04:57.479928 PCI: 00:1f.4: enabled 0
802 07:04:57.480338 PCI: 00:1f.5: enabled 1
803 07:04:57.480745 PCI: 00:1f.6: enabled 0
804 07:04:57.481133 PCI: 00:1f.7: enabled 0
805 07:04:57.524733 CPU_CLUSTER: 0: enabled 1
806 07:04:57.525250 APIC: 00: enabled 1
807 07:04:57.525614 APIC: 01: enabled 1
808 07:04:57.525950 APIC: 03: enabled 1
809 07:04:57.526333 APIC: 06: enabled 1
810 07:04:57.526744 APIC: 04: enabled 1
811 07:04:57.527445 APIC: 05: enabled 1
812 07:04:57.527947 APIC: 02: enabled 1
813 07:04:57.528327 APIC: 07: enabled 1
814 07:04:57.528644 Root Device scanning...
815 07:04:57.528952 scan_static_bus for Root Device
816 07:04:57.529257 DOMAIN: 0000 enabled
817 07:04:57.529568 CPU_CLUSTER: 0 enabled
818 07:04:57.529784 DOMAIN: 0000 scanning...
819 07:04:57.529997 PCI: pci_scan_bus for bus 00
820 07:04:57.530294 PCI: 00:00.0 [8086/0000] ops
821 07:04:57.530523 PCI: 00:00.0 [8086/9a12] enabled
822 07:04:57.530780 PCI: 00:02.0 [8086/0000] bus ops
823 07:04:57.531076 PCI: 00:02.0 [8086/9a40] enabled
824 07:04:57.575201 PCI: 00:04.0 [8086/0000] bus ops
825 07:04:57.575773 PCI: 00:04.0 [8086/9a03] enabled
826 07:04:57.576504 PCI: 00:05.0 [8086/9a19] enabled
827 07:04:57.576999 PCI: 00:07.0 [0000/0000] hidden
828 07:04:57.577358 PCI: 00:08.0 [8086/9a11] enabled
829 07:04:57.577684 PCI: 00:0a.0 [8086/9a0d] disabled
830 07:04:57.578143 PCI: 00:0d.0 [8086/0000] bus ops
831 07:04:57.578561 PCI: 00:0d.0 [8086/9a13] enabled
832 07:04:57.578999 PCI: 00:14.0 [8086/0000] bus ops
833 07:04:57.579401 PCI: 00:14.0 [8086/a0ed] enabled
834 07:04:57.580169 PCI: 00:14.2 [8086/a0ef] enabled
835 07:04:57.580529 PCI: 00:14.3 [8086/0000] bus ops
836 07:04:57.580848 PCI: 00:14.3 [8086/a0f0] enabled
837 07:04:57.581159 PCI: 00:15.0 [8086/0000] bus ops
838 07:04:57.581523 PCI: 00:15.0 [8086/a0e8] enabled
839 07:04:57.594447 PCI: 00:15.1 [8086/0000] bus ops
840 07:04:57.594902 PCI: 00:15.1 [8086/a0e9] enabled
841 07:04:57.595306 PCI: 00:15.2 [8086/0000] bus ops
842 07:04:57.595652 PCI: 00:15.2 [8086/a0ea] enabled
843 07:04:57.596312 PCI: 00:15.3 [8086/0000] bus ops
844 07:04:57.596642 PCI: 00:15.3 [8086/a0eb] enabled
845 07:04:57.597749 PCI: 00:16.0 [8086/0000] ops
846 07:04:57.601396 PCI: 00:16.0 [8086/a0e0] enabled
847 07:04:57.607825 PCI: Static device PCI: 00:17.0 not found, disabling it.
848 07:04:57.611135 PCI: 00:19.0 [8086/0000] bus ops
849 07:04:57.614281 PCI: 00:19.0 [8086/a0c5] disabled
850 07:04:57.617282 PCI: 00:19.1 [8086/0000] bus ops
851 07:04:57.620771 PCI: 00:19.1 [8086/a0c6] enabled
852 07:04:57.624368 PCI: 00:1d.0 [8086/0000] bus ops
853 07:04:57.627296 PCI: 00:1d.0 [8086/a0b0] enabled
854 07:04:57.630632 PCI: 00:1e.0 [8086/0000] ops
855 07:04:57.633724 PCI: 00:1e.0 [8086/a0a8] enabled
856 07:04:57.637498 PCI: 00:1e.2 [8086/0000] bus ops
857 07:04:57.641363 PCI: 00:1e.2 [8086/a0aa] enabled
858 07:04:57.643679 PCI: 00:1e.3 [8086/0000] bus ops
859 07:04:57.647219 PCI: 00:1e.3 [8086/a0ab] enabled
860 07:04:57.650305 PCI: 00:1f.0 [8086/0000] bus ops
861 07:04:57.653753 PCI: 00:1f.0 [8086/a087] enabled
862 07:04:57.654209 RTC Init
863 07:04:57.656813 Set power on after power failure.
864 07:04:57.660588 Disabling Deep S3
865 07:04:57.661022 Disabling Deep S3
866 07:04:57.663783 Disabling Deep S4
867 07:04:57.664237 Disabling Deep S4
868 07:04:57.666819 Disabling Deep S5
869 07:04:57.669964 Disabling Deep S5
870 07:04:57.673570 PCI: 00:1f.2 [0000/0000] hidden
871 07:04:57.676830 PCI: 00:1f.3 [8086/0000] bus ops
872 07:04:57.679631 PCI: 00:1f.3 [8086/a0c8] enabled
873 07:04:57.682908 PCI: 00:1f.5 [8086/0000] bus ops
874 07:04:57.686531 PCI: 00:1f.5 [8086/a0a4] enabled
875 07:04:57.689357 PCI: Leftover static devices:
876 07:04:57.689668 PCI: 00:10.2
877 07:04:57.689939 PCI: 00:10.6
878 07:04:57.692725 PCI: 00:10.7
879 07:04:57.693072 PCI: 00:06.0
880 07:04:57.695882 PCI: 00:07.1
881 07:04:57.696192 PCI: 00:07.2
882 07:04:57.696437 PCI: 00:07.3
883 07:04:57.699638 PCI: 00:09.0
884 07:04:57.700007 PCI: 00:0d.1
885 07:04:57.703218 PCI: 00:0d.2
886 07:04:57.703570 PCI: 00:0d.3
887 07:04:57.706031 PCI: 00:0e.0
888 07:04:57.706367 PCI: 00:12.0
889 07:04:57.706614 PCI: 00:12.6
890 07:04:57.709212 PCI: 00:13.0
891 07:04:57.709523 PCI: 00:14.1
892 07:04:57.712759 PCI: 00:16.1
893 07:04:57.713096 PCI: 00:16.2
894 07:04:57.713346 PCI: 00:16.3
895 07:04:57.715799 PCI: 00:16.4
896 07:04:57.716111 PCI: 00:16.5
897 07:04:57.719195 PCI: 00:17.0
898 07:04:57.719506 PCI: 00:19.2
899 07:04:57.722942 PCI: 00:1e.1
900 07:04:57.723360 PCI: 00:1f.1
901 07:04:57.723645 PCI: 00:1f.4
902 07:04:57.726064 PCI: 00:1f.6
903 07:04:57.726376 PCI: 00:1f.7
904 07:04:57.729434 PCI: Check your devicetree.cb.
905 07:04:57.732593 PCI: 00:02.0 scanning...
906 07:04:57.736583 scan_generic_bus for PCI: 00:02.0
907 07:04:57.739348 scan_generic_bus for PCI: 00:02.0 done
908 07:04:57.746009 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
909 07:04:57.746323 PCI: 00:04.0 scanning...
910 07:04:57.749129 scan_generic_bus for PCI: 00:04.0
911 07:04:57.752357 GENERIC: 0.0 enabled
912 07:04:57.758783 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
913 07:04:57.761872 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
914 07:04:57.765646 PCI: 00:0d.0 scanning...
915 07:04:57.768951 scan_static_bus for PCI: 00:0d.0
916 07:04:57.772240 USB0 port 0 enabled
917 07:04:57.775620 USB0 port 0 scanning...
918 07:04:57.778529 scan_static_bus for USB0 port 0
919 07:04:57.778840 USB3 port 0 enabled
920 07:04:57.782110 USB3 port 1 enabled
921 07:04:57.785466 USB3 port 2 disabled
922 07:04:57.785782 USB3 port 3 disabled
923 07:04:57.788699 USB3 port 0 scanning...
924 07:04:57.792190 scan_static_bus for USB3 port 0
925 07:04:57.795386 scan_static_bus for USB3 port 0 done
926 07:04:57.801879 scan_bus: bus USB3 port 0 finished in 6 msecs
927 07:04:57.802206 USB3 port 1 scanning...
928 07:04:57.805236 scan_static_bus for USB3 port 1
929 07:04:57.809259 scan_static_bus for USB3 port 1 done
930 07:04:57.815667 scan_bus: bus USB3 port 1 finished in 6 msecs
931 07:04:57.818499 scan_static_bus for USB0 port 0 done
932 07:04:57.821397 scan_bus: bus USB0 port 0 finished in 43 msecs
933 07:04:57.825496 scan_static_bus for PCI: 00:0d.0 done
934 07:04:57.831631 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
935 07:04:57.835125 PCI: 00:14.0 scanning...
936 07:04:57.838265 scan_static_bus for PCI: 00:14.0
937 07:04:57.838593 USB0 port 0 enabled
938 07:04:57.841503 USB0 port 0 scanning...
939 07:04:57.845007 scan_static_bus for USB0 port 0
940 07:04:57.848016 USB2 port 0 disabled
941 07:04:57.848346 USB2 port 1 enabled
942 07:04:57.851890 USB2 port 2 enabled
943 07:04:57.855044 USB2 port 3 disabled
944 07:04:57.855370 USB2 port 4 enabled
945 07:04:57.857783 USB2 port 5 disabled
946 07:04:57.861677 USB2 port 6 disabled
947 07:04:57.862002 USB2 port 7 disabled
948 07:04:57.864833 USB2 port 8 disabled
949 07:04:57.867912 USB2 port 9 disabled
950 07:04:57.868236 USB3 port 0 disabled
951 07:04:57.871996 USB3 port 1 enabled
952 07:04:57.874745 USB3 port 2 disabled
953 07:04:57.875202 USB3 port 3 disabled
954 07:04:57.878301 USB2 port 1 scanning...
955 07:04:57.882503 scan_static_bus for USB2 port 1
956 07:04:57.884760 scan_static_bus for USB2 port 1 done
957 07:04:57.888046 scan_bus: bus USB2 port 1 finished in 6 msecs
958 07:04:57.890843 USB2 port 2 scanning...
959 07:04:57.894700 scan_static_bus for USB2 port 2
960 07:04:57.897896 scan_static_bus for USB2 port 2 done
961 07:04:57.904348 scan_bus: bus USB2 port 2 finished in 6 msecs
962 07:04:57.908010 USB2 port 4 scanning...
963 07:04:57.911535 scan_static_bus for USB2 port 4
964 07:04:57.914555 scan_static_bus for USB2 port 4 done
965 07:04:57.917729 scan_bus: bus USB2 port 4 finished in 6 msecs
966 07:04:57.921117 USB3 port 1 scanning...
967 07:04:57.924510 scan_static_bus for USB3 port 1
968 07:04:57.927392 scan_static_bus for USB3 port 1 done
969 07:04:57.931333 scan_bus: bus USB3 port 1 finished in 6 msecs
970 07:04:57.937227 scan_static_bus for USB0 port 0 done
971 07:04:57.940887 scan_bus: bus USB0 port 0 finished in 93 msecs
972 07:04:57.944322 scan_static_bus for PCI: 00:14.0 done
973 07:04:57.950556 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
974 07:04:57.951019 PCI: 00:14.3 scanning...
975 07:04:57.953677 scan_static_bus for PCI: 00:14.3
976 07:04:57.957615 GENERIC: 0.0 enabled
977 07:04:57.960702 scan_static_bus for PCI: 00:14.3 done
978 07:04:57.967456 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
979 07:04:57.967963 PCI: 00:15.0 scanning...
980 07:04:57.973510 scan_static_bus for PCI: 00:15.0
981 07:04:57.974012 I2C: 00:1a enabled
982 07:04:57.977447 I2C: 00:31 enabled
983 07:04:57.977902 I2C: 00:32 enabled
984 07:04:57.980598 scan_static_bus for PCI: 00:15.0 done
985 07:04:57.987089 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
986 07:04:57.990206 PCI: 00:15.1 scanning...
987 07:04:57.993524 scan_static_bus for PCI: 00:15.1
988 07:04:57.993982 I2C: 00:10 enabled
989 07:04:57.997073 scan_static_bus for PCI: 00:15.1 done
990 07:04:58.003681 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
991 07:04:58.006806 PCI: 00:15.2 scanning...
992 07:04:58.010108 scan_static_bus for PCI: 00:15.2
993 07:04:58.013251 scan_static_bus for PCI: 00:15.2 done
994 07:04:58.016481 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
995 07:04:58.019792 PCI: 00:15.3 scanning...
996 07:04:58.023343 scan_static_bus for PCI: 00:15.3
997 07:04:58.027308 scan_static_bus for PCI: 00:15.3 done
998 07:04:58.033472 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
999 07:04:58.034056 PCI: 00:19.1 scanning...
1000 07:04:58.036849 scan_static_bus for PCI: 00:19.1
1001 07:04:58.040159 I2C: 00:15 enabled
1002 07:04:58.043061 scan_static_bus for PCI: 00:19.1 done
1003 07:04:58.050495 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1004 07:04:58.050945 PCI: 00:1d.0 scanning...
1005 07:04:58.056489 do_pci_scan_bridge for PCI: 00:1d.0
1006 07:04:58.056940 PCI: pci_scan_bus for bus 01
1007 07:04:58.059981 PCI: 01:00.0 [1c5c/174a] enabled
1008 07:04:58.063242 GENERIC: 0.0 enabled
1009 07:04:58.066654 Enabling Common Clock Configuration
1010 07:04:58.073236 L1 Sub-State supported from root port 29
1011 07:04:58.073685 L1 Sub-State Support = 0xf
1012 07:04:58.076872 CommonModeRestoreTime = 0x28
1013 07:04:58.083122 Power On Value = 0x16, Power On Scale = 0x0
1014 07:04:58.083573 ASPM: Enabled L1
1015 07:04:58.087290 PCIe: Max_Payload_Size adjusted to 128
1016 07:04:58.093412 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1017 07:04:58.096277 PCI: 00:1e.2 scanning...
1018 07:04:58.099578 scan_generic_bus for PCI: 00:1e.2
1019 07:04:58.100074 SPI: 00 enabled
1020 07:04:58.106088 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1021 07:04:58.109902 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1022 07:04:58.113362 PCI: 00:1e.3 scanning...
1023 07:04:58.115799 scan_generic_bus for PCI: 00:1e.3
1024 07:04:58.119563 SPI: 00 enabled
1025 07:04:58.126124 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1026 07:04:58.129245 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1027 07:04:58.132497 PCI: 00:1f.0 scanning...
1028 07:04:58.135746 scan_static_bus for PCI: 00:1f.0
1029 07:04:58.139804 PNP: 0c09.0 enabled
1030 07:04:58.140318 PNP: 0c09.0 scanning...
1031 07:04:58.142958 scan_static_bus for PNP: 0c09.0
1032 07:04:58.145611 scan_static_bus for PNP: 0c09.0 done
1033 07:04:58.152874 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1034 07:04:58.155638 scan_static_bus for PCI: 00:1f.0 done
1035 07:04:58.159650 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1036 07:04:58.162126 PCI: 00:1f.2 scanning...
1037 07:04:58.165673 scan_static_bus for PCI: 00:1f.2
1038 07:04:58.169050 GENERIC: 0.0 enabled
1039 07:04:58.172645 GENERIC: 0.0 scanning...
1040 07:04:58.175524 scan_static_bus for GENERIC: 0.0
1041 07:04:58.176018 GENERIC: 0.0 enabled
1042 07:04:58.178822 GENERIC: 1.0 enabled
1043 07:04:58.182015 scan_static_bus for GENERIC: 0.0 done
1044 07:04:58.188996 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1045 07:04:58.191941 scan_static_bus for PCI: 00:1f.2 done
1046 07:04:58.195588 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1047 07:04:58.198393 PCI: 00:1f.3 scanning...
1048 07:04:58.202035 scan_static_bus for PCI: 00:1f.3
1049 07:04:58.205471 scan_static_bus for PCI: 00:1f.3 done
1050 07:04:58.211897 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1051 07:04:58.212382 PCI: 00:1f.5 scanning...
1052 07:04:58.218739 scan_generic_bus for PCI: 00:1f.5
1053 07:04:58.221960 scan_generic_bus for PCI: 00:1f.5 done
1054 07:04:58.225477 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1055 07:04:58.232370 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1056 07:04:58.235149 scan_static_bus for Root Device done
1057 07:04:58.238688 scan_bus: bus Root Device finished in 737 msecs
1058 07:04:58.239141 done
1059 07:04:58.245941 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1060 07:04:58.249060 Chrome EC: UHEPI supported
1061 07:04:58.255338 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1062 07:04:58.261539 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1063 07:04:58.265093 SPI flash protection: WPSW=0 SRP0=0
1064 07:04:58.267865 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1065 07:04:58.274871 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1066 07:04:58.277838 found VGA at PCI: 00:02.0
1067 07:04:58.281570 Setting up VGA for PCI: 00:02.0
1068 07:04:58.287772 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1069 07:04:58.291570 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1070 07:04:58.294419 Allocating resources...
1071 07:04:58.298121 Reading resources...
1072 07:04:58.301581 Root Device read_resources bus 0 link: 0
1073 07:04:58.304507 DOMAIN: 0000 read_resources bus 0 link: 0
1074 07:04:58.310840 PCI: 00:04.0 read_resources bus 1 link: 0
1075 07:04:58.315197 PCI: 00:04.0 read_resources bus 1 link: 0 done
1076 07:04:58.320837 PCI: 00:0d.0 read_resources bus 0 link: 0
1077 07:04:58.324333 USB0 port 0 read_resources bus 0 link: 0
1078 07:04:58.330658 USB0 port 0 read_resources bus 0 link: 0 done
1079 07:04:58.334201 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1080 07:04:58.340814 PCI: 00:14.0 read_resources bus 0 link: 0
1081 07:04:58.344043 USB0 port 0 read_resources bus 0 link: 0
1082 07:04:58.350911 USB0 port 0 read_resources bus 0 link: 0 done
1083 07:04:58.353762 PCI: 00:14.0 read_resources bus 0 link: 0 done
1084 07:04:58.360544 PCI: 00:14.3 read_resources bus 0 link: 0
1085 07:04:58.363842 PCI: 00:14.3 read_resources bus 0 link: 0 done
1086 07:04:58.370161 PCI: 00:15.0 read_resources bus 0 link: 0
1087 07:04:58.373434 PCI: 00:15.0 read_resources bus 0 link: 0 done
1088 07:04:58.380447 PCI: 00:15.1 read_resources bus 0 link: 0
1089 07:04:58.383333 PCI: 00:15.1 read_resources bus 0 link: 0 done
1090 07:04:58.390269 PCI: 00:19.1 read_resources bus 0 link: 0
1091 07:04:58.393584 PCI: 00:19.1 read_resources bus 0 link: 0 done
1092 07:04:58.400225 PCI: 00:1d.0 read_resources bus 1 link: 0
1093 07:04:58.403593 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1094 07:04:58.410348 PCI: 00:1e.2 read_resources bus 2 link: 0
1095 07:04:58.413377 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1096 07:04:58.419844 PCI: 00:1e.3 read_resources bus 3 link: 0
1097 07:04:58.423296 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1098 07:04:58.430782 PCI: 00:1f.0 read_resources bus 0 link: 0
1099 07:04:58.433671 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1100 07:04:58.440578 PCI: 00:1f.2 read_resources bus 0 link: 0
1101 07:04:58.443062 GENERIC: 0.0 read_resources bus 0 link: 0
1102 07:04:58.449659 GENERIC: 0.0 read_resources bus 0 link: 0 done
1103 07:04:58.453136 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1104 07:04:58.459817 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 07:04:58.462860 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1106 07:04:58.469853 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1107 07:04:58.472847 Root Device read_resources bus 0 link: 0 done
1108 07:04:58.476024 Done reading resources.
1109 07:04:58.482536 Show resources in subtree (Root Device)...After reading.
1110 07:04:58.486187 Root Device child on link 0 DOMAIN: 0000
1111 07:04:58.489444 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 07:04:58.499388 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 07:04:58.509576 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1114 07:04:58.512200 PCI: 00:00.0
1115 07:04:58.522499 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 07:04:58.528616 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 07:04:58.538980 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 07:04:58.548590 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 07:04:58.558570 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 07:04:58.568628 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 07:04:58.574982 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 07:04:58.585058 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 07:04:58.595393 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 07:04:58.604997 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1125 07:04:58.615218 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1126 07:04:58.624541 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1127 07:04:58.631177 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1128 07:04:58.641270 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1129 07:04:58.651277 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1130 07:04:58.660942 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1131 07:04:58.671012 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1132 07:04:58.680977 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1133 07:04:58.687897 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1134 07:04:58.697361 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1135 07:04:58.701117 PCI: 00:02.0
1136 07:04:58.710832 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1137 07:04:58.720692 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1138 07:04:58.730766 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1139 07:04:58.734578 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1140 07:04:58.744094 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1141 07:04:58.747642 GENERIC: 0.0
1142 07:04:58.747812 PCI: 00:05.0
1143 07:04:58.757323 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1144 07:04:58.764585 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1145 07:04:58.764681 GENERIC: 0.0
1146 07:04:58.766904 PCI: 00:08.0
1147 07:04:58.776769 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 07:04:58.776865 PCI: 00:0a.0
1149 07:04:58.780370 PCI: 00:0d.0 child on link 0 USB0 port 0
1150 07:04:58.793389 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1151 07:04:58.796679 USB0 port 0 child on link 0 USB3 port 0
1152 07:04:58.796772 USB3 port 0
1153 07:04:58.799931 USB3 port 1
1154 07:04:58.800019 USB3 port 2
1155 07:04:58.803260 USB3 port 3
1156 07:04:58.806718 PCI: 00:14.0 child on link 0 USB0 port 0
1157 07:04:58.816510 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1158 07:04:58.823419 USB0 port 0 child on link 0 USB2 port 0
1159 07:04:58.823519 USB2 port 0
1160 07:04:58.826833 USB2 port 1
1161 07:04:58.826929 USB2 port 2
1162 07:04:58.829507 USB2 port 3
1163 07:04:58.829597 USB2 port 4
1164 07:04:58.832940 USB2 port 5
1165 07:04:58.833028 USB2 port 6
1166 07:04:58.836113 USB2 port 7
1167 07:04:58.839445 USB2 port 8
1168 07:04:58.839535 USB2 port 9
1169 07:04:58.842926 USB3 port 0
1170 07:04:58.843015 USB3 port 1
1171 07:04:58.846614 USB3 port 2
1172 07:04:58.846710 USB3 port 3
1173 07:04:58.849874 PCI: 00:14.2
1174 07:04:58.859422 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 07:04:58.869618 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1176 07:04:58.872850 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1177 07:04:58.882913 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1178 07:04:58.886321 GENERIC: 0.0
1179 07:04:58.889658 PCI: 00:15.0 child on link 0 I2C: 00:1a
1180 07:04:58.899017 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 07:04:58.899135 I2C: 00:1a
1182 07:04:58.902511 I2C: 00:31
1183 07:04:58.902600 I2C: 00:32
1184 07:04:58.909238 PCI: 00:15.1 child on link 0 I2C: 00:10
1185 07:04:58.919252 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 07:04:58.919380 I2C: 00:10
1187 07:04:58.922949 PCI: 00:15.2
1188 07:04:58.932157 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 07:04:58.932300 PCI: 00:15.3
1190 07:04:58.942283 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 07:04:58.945322 PCI: 00:16.0
1192 07:04:58.955132 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 07:04:58.955222 PCI: 00:19.0
1194 07:04:58.961892 PCI: 00:19.1 child on link 0 I2C: 00:15
1195 07:04:58.972117 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 07:04:58.972209 I2C: 00:15
1197 07:04:58.975564 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1198 07:04:58.984990 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 07:04:58.994504 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 07:04:59.004838 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 07:04:59.004927 GENERIC: 0.0
1202 07:04:59.007809 PCI: 01:00.0
1203 07:04:59.017773 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 07:04:59.028123 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1205 07:04:59.034992 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1206 07:04:59.037651 PCI: 00:1e.0
1207 07:04:59.047575 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 07:04:59.054428 PCI: 00:1e.2 child on link 0 SPI: 00
1209 07:04:59.063963 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 07:04:59.064051 SPI: 00
1211 07:04:59.067731 PCI: 00:1e.3 child on link 0 SPI: 00
1212 07:04:59.077147 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 07:04:59.080323 SPI: 00
1214 07:04:59.084200 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1215 07:04:59.093792 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1216 07:04:59.093881 PNP: 0c09.0
1217 07:04:59.103703 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1218 07:04:59.107009 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1219 07:04:59.117230 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1220 07:04:59.126797 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1221 07:04:59.130033 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1222 07:04:59.133408 GENERIC: 0.0
1223 07:04:59.133496 GENERIC: 1.0
1224 07:04:59.136993 PCI: 00:1f.3
1225 07:04:59.146672 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 07:04:59.156559 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 07:04:59.156649 PCI: 00:1f.5
1228 07:04:59.166510 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1229 07:04:59.169572 CPU_CLUSTER: 0 child on link 0 APIC: 00
1230 07:04:59.173704 APIC: 00
1231 07:04:59.173795 APIC: 01
1232 07:04:59.176400 APIC: 03
1233 07:04:59.176488 APIC: 06
1234 07:04:59.176557 APIC: 04
1235 07:04:59.179732 APIC: 05
1236 07:04:59.179834 APIC: 02
1237 07:04:59.183149 APIC: 07
1238 07:04:59.189995 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1239 07:04:59.196609 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1240 07:04:59.199581 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1241 07:04:59.206035 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1242 07:04:59.209606 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1243 07:04:59.215814 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1244 07:04:59.219354 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1245 07:04:59.225848 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 07:04:59.232479 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1247 07:04:59.242414 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1248 07:04:59.249078 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1249 07:04:59.255589 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1250 07:04:59.262796 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1251 07:04:59.269424 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1252 07:04:59.278855 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1253 07:04:59.282155 DOMAIN: 0000: Resource ranges:
1254 07:04:59.285346 * Base: 1000, Size: 800, Tag: 100
1255 07:04:59.289050 * Base: 1900, Size: e700, Tag: 100
1256 07:04:59.291819 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1257 07:04:59.298954 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1258 07:04:59.308569 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1259 07:04:59.314845 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1260 07:04:59.321948 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1261 07:04:59.332210 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1262 07:04:59.338498 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1263 07:04:59.345871 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1264 07:04:59.355220 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1265 07:04:59.361955 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1266 07:04:59.368482 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1267 07:04:59.378388 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1268 07:04:59.384470 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1269 07:04:59.391354 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1270 07:04:59.401208 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1271 07:04:59.407832 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1272 07:04:59.414153 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1273 07:04:59.424614 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1274 07:04:59.430476 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1275 07:04:59.437171 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1276 07:04:59.447093 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1277 07:04:59.453911 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1278 07:04:59.460696 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1279 07:04:59.470493 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1280 07:04:59.476960 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1281 07:04:59.480518 DOMAIN: 0000: Resource ranges:
1282 07:04:59.483581 * Base: 7fc00000, Size: 40400000, Tag: 200
1283 07:04:59.490421 * Base: d0000000, Size: 28000000, Tag: 200
1284 07:04:59.494119 * Base: fa000000, Size: 1000000, Tag: 200
1285 07:04:59.496558 * Base: fb001000, Size: 2fff000, Tag: 200
1286 07:04:59.500048 * Base: fe010000, Size: 2e000, Tag: 200
1287 07:04:59.506995 * Base: fe03f000, Size: d41000, Tag: 200
1288 07:04:59.509830 * Base: fed88000, Size: 8000, Tag: 200
1289 07:04:59.513765 * Base: fed93000, Size: d000, Tag: 200
1290 07:04:59.516868 * Base: feda2000, Size: 1e000, Tag: 200
1291 07:04:59.523733 * Base: fede0000, Size: 1220000, Tag: 200
1292 07:04:59.526959 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1293 07:04:59.533494 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1294 07:04:59.539700 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1295 07:04:59.546204 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1296 07:04:59.552868 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1297 07:04:59.559590 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1298 07:04:59.566417 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1299 07:04:59.572744 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1300 07:04:59.579504 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1301 07:04:59.586076 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1302 07:04:59.592486 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1303 07:04:59.599399 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1304 07:04:59.606001 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1305 07:04:59.612291 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1306 07:04:59.619130 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1307 07:04:59.626189 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1308 07:04:59.631879 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1309 07:04:59.639076 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1310 07:04:59.645223 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1311 07:04:59.652239 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1312 07:04:59.658704 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1313 07:04:59.665474 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1314 07:04:59.673079 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1315 07:04:59.681739 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1316 07:04:59.688493 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1317 07:04:59.692308 PCI: 00:1d.0: Resource ranges:
1318 07:04:59.695594 * Base: 7fc00000, Size: 100000, Tag: 200
1319 07:04:59.701623 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1320 07:04:59.708274 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1321 07:04:59.715103 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1322 07:04:59.724736 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1323 07:04:59.731343 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1324 07:04:59.734480 Root Device assign_resources, bus 0 link: 0
1325 07:04:59.741455 DOMAIN: 0000 assign_resources, bus 0 link: 0
1326 07:04:59.748370 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1327 07:04:59.757866 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1328 07:04:59.764175 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1329 07:04:59.773926 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1330 07:04:59.777798 PCI: 00:04.0 assign_resources, bus 1 link: 0
1331 07:04:59.784161 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 07:04:59.790955 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1333 07:04:59.800599 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1334 07:04:59.807387 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1335 07:04:59.810651 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1336 07:04:59.817344 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 07:04:59.824054 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1338 07:04:59.830279 PCI: 00:14.0 assign_resources, bus 0 link: 0
1339 07:04:59.833809 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 07:04:59.843652 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1341 07:04:59.850414 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1342 07:04:59.860397 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1343 07:04:59.863969 PCI: 00:14.3 assign_resources, bus 0 link: 0
1344 07:04:59.866762 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 07:04:59.877070 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1346 07:04:59.879721 PCI: 00:15.0 assign_resources, bus 0 link: 0
1347 07:04:59.886402 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 07:04:59.893663 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1349 07:04:59.899392 PCI: 00:15.1 assign_resources, bus 0 link: 0
1350 07:04:59.903191 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 07:04:59.909608 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1352 07:04:59.919642 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1353 07:04:59.926152 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1354 07:04:59.935995 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1355 07:04:59.939060 PCI: 00:19.1 assign_resources, bus 0 link: 0
1356 07:04:59.945591 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 07:04:59.952302 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1358 07:04:59.962276 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1359 07:04:59.972552 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1360 07:04:59.975652 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1361 07:04:59.985271 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1362 07:04:59.992620 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1363 07:05:00.001994 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1364 07:05:00.005665 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 07:05:00.015093 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1366 07:05:00.018446 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 07:05:00.021807 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 07:05:00.031651 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1369 07:05:00.035035 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 07:05:00.041669 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 07:05:00.045019 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 07:05:00.051628 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 07:05:00.055359 LPC: Trying to open IO window from 800 size 1ff
1374 07:05:00.064613 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1375 07:05:00.071090 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1376 07:05:00.077679 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1377 07:05:00.084741 DOMAIN: 0000 assign_resources, bus 0 link: 0
1378 07:05:00.087794 Root Device assign_resources, bus 0 link: 0
1379 07:05:00.091789 Done setting resources.
1380 07:05:00.098175 Show resources in subtree (Root Device)...After assigning values.
1381 07:05:00.101487 Root Device child on link 0 DOMAIN: 0000
1382 07:05:00.107888 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 07:05:00.114743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1384 07:05:00.125130 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1385 07:05:00.127385 PCI: 00:00.0
1386 07:05:00.137367 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1387 07:05:00.147582 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1388 07:05:00.157952 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1389 07:05:00.163651 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1390 07:05:00.173673 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1391 07:05:00.183686 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1392 07:05:00.195157 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1393 07:05:00.203449 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1394 07:05:00.213666 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1395 07:05:00.220057 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1396 07:05:00.230144 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1397 07:05:00.239657 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1398 07:05:00.249650 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1399 07:05:00.256361 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1400 07:05:00.266561 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1401 07:05:00.276256 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1402 07:05:00.286267 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1403 07:05:00.296124 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1404 07:05:00.306640 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1405 07:05:00.315725 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1406 07:05:00.315813 PCI: 00:02.0
1407 07:05:00.329001 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1408 07:05:00.338967 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1409 07:05:00.349343 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1410 07:05:00.352314 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1411 07:05:00.362583 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1412 07:05:00.365917 GENERIC: 0.0
1413 07:05:00.366004 PCI: 00:05.0
1414 07:05:00.375327 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1415 07:05:00.382001 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1416 07:05:00.382089 GENERIC: 0.0
1417 07:05:00.385465 PCI: 00:08.0
1418 07:05:00.395406 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1419 07:05:00.395496 PCI: 00:0a.0
1420 07:05:00.401809 PCI: 00:0d.0 child on link 0 USB0 port 0
1421 07:05:00.411755 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1422 07:05:00.415250 USB0 port 0 child on link 0 USB3 port 0
1423 07:05:00.418219 USB3 port 0
1424 07:05:00.418306 USB3 port 1
1425 07:05:00.421898 USB3 port 2
1426 07:05:00.421985 USB3 port 3
1427 07:05:00.428191 PCI: 00:14.0 child on link 0 USB0 port 0
1428 07:05:00.438427 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1429 07:05:00.441962 USB0 port 0 child on link 0 USB2 port 0
1430 07:05:00.444953 USB2 port 0
1431 07:05:00.445040 USB2 port 1
1432 07:05:00.448111 USB2 port 2
1433 07:05:00.448198 USB2 port 3
1434 07:05:00.451531 USB2 port 4
1435 07:05:00.451618 USB2 port 5
1436 07:05:00.454906 USB2 port 6
1437 07:05:00.454994 USB2 port 7
1438 07:05:00.458182 USB2 port 8
1439 07:05:00.461214 USB2 port 9
1440 07:05:00.461301 USB3 port 0
1441 07:05:00.464541 USB3 port 1
1442 07:05:00.464628 USB3 port 2
1443 07:05:00.467828 USB3 port 3
1444 07:05:00.467915 PCI: 00:14.2
1445 07:05:00.477574 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1446 07:05:00.487909 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1447 07:05:00.494258 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1448 07:05:00.504577 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1449 07:05:00.504667 GENERIC: 0.0
1450 07:05:00.511177 PCI: 00:15.0 child on link 0 I2C: 00:1a
1451 07:05:00.520739 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1452 07:05:00.520827 I2C: 00:1a
1453 07:05:00.524113 I2C: 00:31
1454 07:05:00.524200 I2C: 00:32
1455 07:05:00.531092 PCI: 00:15.1 child on link 0 I2C: 00:10
1456 07:05:00.541117 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1457 07:05:00.541208 I2C: 00:10
1458 07:05:00.544084 PCI: 00:15.2
1459 07:05:00.553742 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1460 07:05:00.553833 PCI: 00:15.3
1461 07:05:00.563749 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1462 07:05:00.567156 PCI: 00:16.0
1463 07:05:00.577183 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1464 07:05:00.580546 PCI: 00:19.0
1465 07:05:00.583359 PCI: 00:19.1 child on link 0 I2C: 00:15
1466 07:05:00.593465 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1467 07:05:00.596965 I2C: 00:15
1468 07:05:00.600201 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1469 07:05:00.609836 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1470 07:05:00.620053 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1471 07:05:00.630100 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1472 07:05:00.633423 GENERIC: 0.0
1473 07:05:00.633511 PCI: 01:00.0
1474 07:05:00.646626 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1475 07:05:00.656250 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1476 07:05:00.666245 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1477 07:05:00.666336 PCI: 00:1e.0
1478 07:05:00.679566 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1479 07:05:00.683122 PCI: 00:1e.2 child on link 0 SPI: 00
1480 07:05:00.692958 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1481 07:05:00.693057 SPI: 00
1482 07:05:00.699907 PCI: 00:1e.3 child on link 0 SPI: 00
1483 07:05:00.709392 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1484 07:05:00.709489 SPI: 00
1485 07:05:00.715876 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1486 07:05:00.722621 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1487 07:05:00.725947 PNP: 0c09.0
1488 07:05:00.732598 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1489 07:05:00.739516 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1490 07:05:00.745686 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1491 07:05:00.756161 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1492 07:05:00.762322 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1493 07:05:00.762423 GENERIC: 0.0
1494 07:05:00.765658 GENERIC: 1.0
1495 07:05:00.765754 PCI: 00:1f.3
1496 07:05:00.775743 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1497 07:05:00.788982 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1498 07:05:00.789088 PCI: 00:1f.5
1499 07:05:00.798761 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1500 07:05:00.805634 CPU_CLUSTER: 0 child on link 0 APIC: 00
1501 07:05:00.805727 APIC: 00
1502 07:05:00.805817 APIC: 01
1503 07:05:00.808570 APIC: 03
1504 07:05:00.808661 APIC: 06
1505 07:05:00.808750 APIC: 04
1506 07:05:00.812624 APIC: 05
1507 07:05:00.812715 APIC: 02
1508 07:05:00.814951 APIC: 07
1509 07:05:00.815042 Done allocating resources.
1510 07:05:00.821739 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1511 07:05:00.828294 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1512 07:05:00.831676 Configure GPIOs for I2S audio on UP4.
1513 07:05:00.839466 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1514 07:05:00.842953 Enabling resources...
1515 07:05:00.845745 PCI: 00:00.0 subsystem <- 8086/9a12
1516 07:05:00.849069 PCI: 00:00.0 cmd <- 06
1517 07:05:00.852242 PCI: 00:02.0 subsystem <- 8086/9a40
1518 07:05:00.856185 PCI: 00:02.0 cmd <- 03
1519 07:05:00.858956 PCI: 00:04.0 subsystem <- 8086/9a03
1520 07:05:00.862032 PCI: 00:04.0 cmd <- 02
1521 07:05:00.865586 PCI: 00:05.0 subsystem <- 8086/9a19
1522 07:05:00.865677 PCI: 00:05.0 cmd <- 02
1523 07:05:00.872327 PCI: 00:08.0 subsystem <- 8086/9a11
1524 07:05:00.872419 PCI: 00:08.0 cmd <- 06
1525 07:05:00.875408 PCI: 00:0d.0 subsystem <- 8086/9a13
1526 07:05:00.878648 PCI: 00:0d.0 cmd <- 02
1527 07:05:00.882135 PCI: 00:14.0 subsystem <- 8086/a0ed
1528 07:05:00.885488 PCI: 00:14.0 cmd <- 02
1529 07:05:00.888390 PCI: 00:14.2 subsystem <- 8086/a0ef
1530 07:05:00.892186 PCI: 00:14.2 cmd <- 02
1531 07:05:00.895218 PCI: 00:14.3 subsystem <- 8086/a0f0
1532 07:05:00.898779 PCI: 00:14.3 cmd <- 02
1533 07:05:00.902070 PCI: 00:15.0 subsystem <- 8086/a0e8
1534 07:05:00.904835 PCI: 00:15.0 cmd <- 02
1535 07:05:00.908690 PCI: 00:15.1 subsystem <- 8086/a0e9
1536 07:05:00.911880 PCI: 00:15.1 cmd <- 02
1537 07:05:00.915017 PCI: 00:15.2 subsystem <- 8086/a0ea
1538 07:05:00.915107 PCI: 00:15.2 cmd <- 02
1539 07:05:00.921754 PCI: 00:15.3 subsystem <- 8086/a0eb
1540 07:05:00.921845 PCI: 00:15.3 cmd <- 02
1541 07:05:00.925139 PCI: 00:16.0 subsystem <- 8086/a0e0
1542 07:05:00.928689 PCI: 00:16.0 cmd <- 02
1543 07:05:00.931643 PCI: 00:19.1 subsystem <- 8086/a0c6
1544 07:05:00.935060 PCI: 00:19.1 cmd <- 02
1545 07:05:00.938555 PCI: 00:1d.0 bridge ctrl <- 0013
1546 07:05:00.941517 PCI: 00:1d.0 subsystem <- 8086/a0b0
1547 07:05:00.945223 PCI: 00:1d.0 cmd <- 06
1548 07:05:00.948219 PCI: 00:1e.0 subsystem <- 8086/a0a8
1549 07:05:00.951102 PCI: 00:1e.0 cmd <- 06
1550 07:05:00.954726 PCI: 00:1e.2 subsystem <- 8086/a0aa
1551 07:05:00.958867 PCI: 00:1e.2 cmd <- 06
1552 07:05:00.961335 PCI: 00:1e.3 subsystem <- 8086/a0ab
1553 07:05:00.964438 PCI: 00:1e.3 cmd <- 02
1554 07:05:00.967965 PCI: 00:1f.0 subsystem <- 8086/a087
1555 07:05:00.971506 PCI: 00:1f.0 cmd <- 407
1556 07:05:00.974451 PCI: 00:1f.3 subsystem <- 8086/a0c8
1557 07:05:00.974541 PCI: 00:1f.3 cmd <- 02
1558 07:05:00.981753 PCI: 00:1f.5 subsystem <- 8086/a0a4
1559 07:05:00.981843 PCI: 00:1f.5 cmd <- 406
1560 07:05:00.986830 PCI: 01:00.0 cmd <- 02
1561 07:05:00.990958 done.
1562 07:05:00.994751 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1563 07:05:00.997713 Initializing devices...
1564 07:05:01.001105 Root Device init
1565 07:05:01.004223 Chrome EC: Set SMI mask to 0x0000000000000000
1566 07:05:01.010555 Chrome EC: clear events_b mask to 0x0000000000000000
1567 07:05:01.017371 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1568 07:05:01.024013 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1569 07:05:01.030791 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1570 07:05:01.033721 Chrome EC: Set WAKE mask to 0x0000000000000000
1571 07:05:01.041348 fw_config match found: DB_USB=USB3_ACTIVE
1572 07:05:01.044547 Configure Right Type-C port orientation for retimer
1573 07:05:01.048019 Root Device init finished in 45 msecs
1574 07:05:01.052146 PCI: 00:00.0 init
1575 07:05:01.056049 CPU TDP = 9 Watts
1576 07:05:01.058931 CPU PL1 = 9 Watts
1577 07:05:01.059021 CPU PL2 = 40 Watts
1578 07:05:01.062501 CPU PL4 = 83 Watts
1579 07:05:01.065610 PCI: 00:00.0 init finished in 8 msecs
1580 07:05:01.068928 PCI: 00:02.0 init
1581 07:05:01.069018 GMA: Found VBT in CBFS
1582 07:05:01.072034 GMA: Found valid VBT in CBFS
1583 07:05:01.078644 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1584 07:05:01.085268 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1585 07:05:01.088431 PCI: 00:02.0 init finished in 18 msecs
1586 07:05:01.091856 PCI: 00:05.0 init
1587 07:05:01.094896 PCI: 00:05.0 init finished in 0 msecs
1588 07:05:01.098409 PCI: 00:08.0 init
1589 07:05:01.102235 PCI: 00:08.0 init finished in 0 msecs
1590 07:05:01.105447 PCI: 00:14.0 init
1591 07:05:01.108072 PCI: 00:14.0 init finished in 0 msecs
1592 07:05:01.111808 PCI: 00:14.2 init
1593 07:05:01.114804 PCI: 00:14.2 init finished in 0 msecs
1594 07:05:01.118267 PCI: 00:15.0 init
1595 07:05:01.121446 I2C bus 0 version 0x3230302a
1596 07:05:01.124832 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1597 07:05:01.127947 PCI: 00:15.0 init finished in 6 msecs
1598 07:05:01.131212 PCI: 00:15.1 init
1599 07:05:01.131302 I2C bus 1 version 0x3230302a
1600 07:05:01.138203 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1601 07:05:01.141461 PCI: 00:15.1 init finished in 6 msecs
1602 07:05:01.141552 PCI: 00:15.2 init
1603 07:05:01.144638 I2C bus 2 version 0x3230302a
1604 07:05:01.147653 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1605 07:05:01.154277 PCI: 00:15.2 init finished in 6 msecs
1606 07:05:01.154367 PCI: 00:15.3 init
1607 07:05:01.158534 I2C bus 3 version 0x3230302a
1608 07:05:01.160947 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1609 07:05:01.165349 PCI: 00:15.3 init finished in 6 msecs
1610 07:05:01.167671 PCI: 00:16.0 init
1611 07:05:01.170888 PCI: 00:16.0 init finished in 0 msecs
1612 07:05:01.174250 PCI: 00:19.1 init
1613 07:05:01.177960 I2C bus 5 version 0x3230302a
1614 07:05:01.180895 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1615 07:05:01.184374 PCI: 00:19.1 init finished in 6 msecs
1616 07:05:01.187609 PCI: 00:1d.0 init
1617 07:05:01.190710 Initializing PCH PCIe bridge.
1618 07:05:01.193904 PCI: 00:1d.0 init finished in 3 msecs
1619 07:05:01.197182 PCI: 00:1f.0 init
1620 07:05:01.200754 IOAPIC: Initializing IOAPIC at 0xfec00000
1621 07:05:01.203651 IOAPIC: Bootstrap Processor Local APIC = 0x00
1622 07:05:01.207068 IOAPIC: ID = 0x02
1623 07:05:01.210463 IOAPIC: Dumping registers
1624 07:05:01.214115 reg 0x0000: 0x02000000
1625 07:05:01.214204 reg 0x0001: 0x00770020
1626 07:05:01.216827 reg 0x0002: 0x00000000
1627 07:05:01.220043 PCI: 00:1f.0 init finished in 21 msecs
1628 07:05:01.224305 PCI: 00:1f.2 init
1629 07:05:01.227136 Disabling ACPI via APMC.
1630 07:05:01.230557 APMC done.
1631 07:05:01.233796 PCI: 00:1f.2 init finished in 5 msecs
1632 07:05:01.245093 PCI: 01:00.0 init
1633 07:05:01.248858 PCI: 01:00.0 init finished in 0 msecs
1634 07:05:01.251516 PNP: 0c09.0 init
1635 07:05:01.254736 Google Chrome EC uptime: 8.428 seconds
1636 07:05:01.261592 Google Chrome AP resets since EC boot: 1
1637 07:05:01.264987 Google Chrome most recent AP reset causes:
1638 07:05:01.268091 0.349: 32775 shutdown: entering G3
1639 07:05:01.274903 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1640 07:05:01.278140 PNP: 0c09.0 init finished in 22 msecs
1641 07:05:01.283852 Devices initialized
1642 07:05:01.287273 Show all devs... After init.
1643 07:05:01.290319 Root Device: enabled 1
1644 07:05:01.290407 DOMAIN: 0000: enabled 1
1645 07:05:01.293579 CPU_CLUSTER: 0: enabled 1
1646 07:05:01.296913 PCI: 00:00.0: enabled 1
1647 07:05:01.300186 PCI: 00:02.0: enabled 1
1648 07:05:01.300274 PCI: 00:04.0: enabled 1
1649 07:05:01.303256 PCI: 00:05.0: enabled 1
1650 07:05:01.306925 PCI: 00:06.0: enabled 0
1651 07:05:01.310015 PCI: 00:07.0: enabled 0
1652 07:05:01.310107 PCI: 00:07.1: enabled 0
1653 07:05:01.313222 PCI: 00:07.2: enabled 0
1654 07:05:01.317096 PCI: 00:07.3: enabled 0
1655 07:05:01.320437 PCI: 00:08.0: enabled 1
1656 07:05:01.320524 PCI: 00:09.0: enabled 0
1657 07:05:01.323142 PCI: 00:0a.0: enabled 0
1658 07:05:01.326772 PCI: 00:0d.0: enabled 1
1659 07:05:01.329764 PCI: 00:0d.1: enabled 0
1660 07:05:01.329879 PCI: 00:0d.2: enabled 0
1661 07:05:01.333516 PCI: 00:0d.3: enabled 0
1662 07:05:01.336709 PCI: 00:0e.0: enabled 0
1663 07:05:01.339835 PCI: 00:10.2: enabled 1
1664 07:05:01.339922 PCI: 00:10.6: enabled 0
1665 07:05:01.343273 PCI: 00:10.7: enabled 0
1666 07:05:01.346298 PCI: 00:12.0: enabled 0
1667 07:05:01.349736 PCI: 00:12.6: enabled 0
1668 07:05:01.349819 PCI: 00:13.0: enabled 0
1669 07:05:01.352841 PCI: 00:14.0: enabled 1
1670 07:05:01.356272 PCI: 00:14.1: enabled 0
1671 07:05:01.356353 PCI: 00:14.2: enabled 1
1672 07:05:01.359521 PCI: 00:14.3: enabled 1
1673 07:05:01.362873 PCI: 00:15.0: enabled 1
1674 07:05:01.366736 PCI: 00:15.1: enabled 1
1675 07:05:01.366820 PCI: 00:15.2: enabled 1
1676 07:05:01.369512 PCI: 00:15.3: enabled 1
1677 07:05:01.372855 PCI: 00:16.0: enabled 1
1678 07:05:01.376162 PCI: 00:16.1: enabled 0
1679 07:05:01.376265 PCI: 00:16.2: enabled 0
1680 07:05:01.379613 PCI: 00:16.3: enabled 0
1681 07:05:01.382803 PCI: 00:16.4: enabled 0
1682 07:05:01.386006 PCI: 00:16.5: enabled 0
1683 07:05:01.386127 PCI: 00:17.0: enabled 0
1684 07:05:01.389420 PCI: 00:19.0: enabled 0
1685 07:05:01.392501 PCI: 00:19.1: enabled 1
1686 07:05:01.395847 PCI: 00:19.2: enabled 0
1687 07:05:01.395988 PCI: 00:1c.0: enabled 1
1688 07:05:01.399244 PCI: 00:1c.1: enabled 0
1689 07:05:01.402734 PCI: 00:1c.2: enabled 0
1690 07:05:01.402822 PCI: 00:1c.3: enabled 0
1691 07:05:01.406899 PCI: 00:1c.4: enabled 0
1692 07:05:01.409412 PCI: 00:1c.5: enabled 0
1693 07:05:01.412915 PCI: 00:1c.6: enabled 1
1694 07:05:01.413002 PCI: 00:1c.7: enabled 0
1695 07:05:01.415668 PCI: 00:1d.0: enabled 1
1696 07:05:01.419498 PCI: 00:1d.1: enabled 0
1697 07:05:01.422514 PCI: 00:1d.2: enabled 1
1698 07:05:01.422634 PCI: 00:1d.3: enabled 0
1699 07:05:01.425807 PCI: 00:1e.0: enabled 1
1700 07:05:01.429154 PCI: 00:1e.1: enabled 0
1701 07:05:01.432830 PCI: 00:1e.2: enabled 1
1702 07:05:01.432927 PCI: 00:1e.3: enabled 1
1703 07:05:01.435676 PCI: 00:1f.0: enabled 1
1704 07:05:01.439145 PCI: 00:1f.1: enabled 0
1705 07:05:01.442693 PCI: 00:1f.2: enabled 1
1706 07:05:01.442780 PCI: 00:1f.3: enabled 1
1707 07:05:01.445494 PCI: 00:1f.4: enabled 0
1708 07:05:01.449047 PCI: 00:1f.5: enabled 1
1709 07:05:01.452284 PCI: 00:1f.6: enabled 0
1710 07:05:01.452371 PCI: 00:1f.7: enabled 0
1711 07:05:01.455685 APIC: 00: enabled 1
1712 07:05:01.458877 GENERIC: 0.0: enabled 1
1713 07:05:01.458972 GENERIC: 0.0: enabled 1
1714 07:05:01.462263 GENERIC: 1.0: enabled 1
1715 07:05:01.465648 GENERIC: 0.0: enabled 1
1716 07:05:01.469562 GENERIC: 1.0: enabled 1
1717 07:05:01.469651 USB0 port 0: enabled 1
1718 07:05:01.472044 GENERIC: 0.0: enabled 1
1719 07:05:01.475513 USB0 port 0: enabled 1
1720 07:05:01.475599 GENERIC: 0.0: enabled 1
1721 07:05:01.478690 I2C: 00:1a: enabled 1
1722 07:05:01.482147 I2C: 00:31: enabled 1
1723 07:05:01.482242 I2C: 00:32: enabled 1
1724 07:05:01.485200 I2C: 00:10: enabled 1
1725 07:05:01.488965 I2C: 00:15: enabled 1
1726 07:05:01.491821 GENERIC: 0.0: enabled 0
1727 07:05:01.491907 GENERIC: 1.0: enabled 0
1728 07:05:01.495293 GENERIC: 0.0: enabled 1
1729 07:05:01.499072 SPI: 00: enabled 1
1730 07:05:01.499159 SPI: 00: enabled 1
1731 07:05:01.501687 PNP: 0c09.0: enabled 1
1732 07:05:01.505219 GENERIC: 0.0: enabled 1
1733 07:05:01.505305 USB3 port 0: enabled 1
1734 07:05:01.509255 USB3 port 1: enabled 1
1735 07:05:01.511944 USB3 port 2: enabled 0
1736 07:05:01.515225 USB3 port 3: enabled 0
1737 07:05:01.515311 USB2 port 0: enabled 0
1738 07:05:01.518265 USB2 port 1: enabled 1
1739 07:05:01.521689 USB2 port 2: enabled 1
1740 07:05:01.521776 USB2 port 3: enabled 0
1741 07:05:01.525043 USB2 port 4: enabled 1
1742 07:05:01.528866 USB2 port 5: enabled 0
1743 07:05:01.528953 USB2 port 6: enabled 0
1744 07:05:01.531723 USB2 port 7: enabled 0
1745 07:05:01.535123 USB2 port 8: enabled 0
1746 07:05:01.538520 USB2 port 9: enabled 0
1747 07:05:01.538607 USB3 port 0: enabled 0
1748 07:05:01.541371 USB3 port 1: enabled 1
1749 07:05:01.544993 USB3 port 2: enabled 0
1750 07:05:01.545079 USB3 port 3: enabled 0
1751 07:05:01.548295 GENERIC: 0.0: enabled 1
1752 07:05:01.551484 GENERIC: 1.0: enabled 1
1753 07:05:01.554539 APIC: 01: enabled 1
1754 07:05:01.554628 APIC: 03: enabled 1
1755 07:05:01.558132 APIC: 06: enabled 1
1756 07:05:01.558220 APIC: 04: enabled 1
1757 07:05:01.561593 APIC: 05: enabled 1
1758 07:05:01.564643 APIC: 02: enabled 1
1759 07:05:01.564731 APIC: 07: enabled 1
1760 07:05:01.567970 PCI: 01:00.0: enabled 1
1761 07:05:01.574732 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1762 07:05:01.577900 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1763 07:05:01.581174 ELOG: NV offset 0xf30000 size 0x1000
1764 07:05:01.589417 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1765 07:05:01.595395 ELOG: Event(17) added with size 13 at 2023-03-22 07:04:57 UTC
1766 07:05:01.601911 ELOG: Event(92) added with size 9 at 2023-03-22 07:04:57 UTC
1767 07:05:01.608849 ELOG: Event(93) added with size 9 at 2023-03-22 07:04:57 UTC
1768 07:05:01.615181 ELOG: Event(9E) added with size 10 at 2023-03-22 07:04:57 UTC
1769 07:05:01.621970 ELOG: Event(9F) added with size 14 at 2023-03-22 07:04:57 UTC
1770 07:05:01.628175 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1771 07:05:01.634657 ELOG: Event(A1) added with size 10 at 2023-03-22 07:04:57 UTC
1772 07:05:01.638421 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1773 07:05:01.644771 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1774 07:05:01.648026 Finalize devices...
1775 07:05:01.648113 Devices finalized
1776 07:05:01.654849 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1777 07:05:01.661275 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1778 07:05:01.664298 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1779 07:05:01.671289 ME: HFSTS1 : 0x80030055
1780 07:05:01.674420 ME: HFSTS2 : 0x30280116
1781 07:05:01.680837 ME: HFSTS3 : 0x00000050
1782 07:05:01.684714 ME: HFSTS4 : 0x00004000
1783 07:05:01.687512 ME: HFSTS5 : 0x00000000
1784 07:05:01.694281 ME: HFSTS6 : 0x00400006
1785 07:05:01.697704 ME: Manufacturing Mode : YES
1786 07:05:01.700949 ME: SPI Protection Mode Enabled : NO
1787 07:05:01.704284 ME: FW Partition Table : OK
1788 07:05:01.707347 ME: Bringup Loader Failure : NO
1789 07:05:01.710804 ME: Firmware Init Complete : NO
1790 07:05:01.713870 ME: Boot Options Present : NO
1791 07:05:01.720750 ME: Update In Progress : NO
1792 07:05:01.723662 ME: D0i3 Support : YES
1793 07:05:01.727821 ME: Low Power State Enabled : NO
1794 07:05:01.730666 ME: CPU Replaced : YES
1795 07:05:01.734003 ME: CPU Replacement Valid : YES
1796 07:05:01.737556 ME: Current Working State : 5
1797 07:05:01.740497 ME: Current Operation State : 1
1798 07:05:01.744197 ME: Current Operation Mode : 3
1799 07:05:01.750351 ME: Error Code : 0
1800 07:05:01.753549 ME: Enhanced Debug Mode : NO
1801 07:05:01.756830 ME: CPU Debug Disabled : YES
1802 07:05:01.760251 ME: TXT Support : NO
1803 07:05:01.767089 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1804 07:05:01.773662 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1805 07:05:01.777060 CBFS: 'fallback/slic' not found.
1806 07:05:01.779974 ACPI: Writing ACPI tables at 76b01000.
1807 07:05:01.783282 ACPI: * FACS
1808 07:05:01.783369 ACPI: * DSDT
1809 07:05:01.786686 Ramoops buffer: 0x100000@0x76a00000.
1810 07:05:01.793349 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1811 07:05:01.796146 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1812 07:05:01.799725 Google Chrome EC: version:
1813 07:05:01.803514 ro: voema_v2.0.7540-147f8d37d1
1814 07:05:01.806593 rw: voema_v2.0.7540-147f8d37d1
1815 07:05:01.809711 running image: 2
1816 07:05:01.816284 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1817 07:05:01.819642 ACPI: * FADT
1818 07:05:01.819769 SCI is IRQ9
1819 07:05:01.826376 ACPI: added table 1/32, length now 40
1820 07:05:01.826463 ACPI: * SSDT
1821 07:05:01.829286 Found 1 CPU(s) with 8 core(s) each.
1822 07:05:01.836112 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1823 07:05:01.839637 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1824 07:05:01.842990 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1825 07:05:01.848874 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1826 07:05:01.852788 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1827 07:05:01.859422 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1828 07:05:01.862344 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1829 07:05:01.868886 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1830 07:05:01.875513 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1831 07:05:01.878981 \_SB.PCI0.RP09: Added StorageD3Enable property
1832 07:05:01.885490 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1833 07:05:01.888294 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1834 07:05:01.895403 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1835 07:05:01.898623 PS2K: Passing 80 keymaps to kernel
1836 07:05:01.906120 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1837 07:05:01.911681 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1838 07:05:01.918690 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1839 07:05:01.925293 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1840 07:05:01.931605 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1841 07:05:01.938124 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1842 07:05:01.944686 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1843 07:05:01.951554 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1844 07:05:01.955169 ACPI: added table 2/32, length now 44
1845 07:05:01.958270 ACPI: * MCFG
1846 07:05:01.961580 ACPI: added table 3/32, length now 48
1847 07:05:01.961667 ACPI: * TPM2
1848 07:05:01.965051 TPM2 log created at 0x769f0000
1849 07:05:01.968233 ACPI: added table 4/32, length now 52
1850 07:05:01.971196 ACPI: * MADT
1851 07:05:01.971282 SCI is IRQ9
1852 07:05:01.974316 ACPI: added table 5/32, length now 56
1853 07:05:01.977641 current = 76b09850
1854 07:05:01.981113 ACPI: * DMAR
1855 07:05:01.984415 ACPI: added table 6/32, length now 60
1856 07:05:01.987990 ACPI: added table 7/32, length now 64
1857 07:05:01.988077 ACPI: * HPET
1858 07:05:01.990904 ACPI: added table 8/32, length now 68
1859 07:05:01.994206 ACPI: done.
1860 07:05:01.998081 ACPI tables: 35216 bytes.
1861 07:05:02.000883 smbios_write_tables: 769ef000
1862 07:05:02.004142 EC returned error result code 3
1863 07:05:02.007646 Couldn't obtain OEM name from CBI
1864 07:05:02.010788 Create SMBIOS type 16
1865 07:05:02.014128 Create SMBIOS type 17
1866 07:05:02.014213 GENERIC: 0.0 (WIFI Device)
1867 07:05:02.017618 SMBIOS tables: 1750 bytes.
1868 07:05:02.024000 Writing table forward entry at 0x00000500
1869 07:05:02.027835 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1870 07:05:02.034271 Writing coreboot table at 0x76b25000
1871 07:05:02.037216 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1872 07:05:02.043790 1. 0000000000001000-000000000009ffff: RAM
1873 07:05:02.047091 2. 00000000000a0000-00000000000fffff: RESERVED
1874 07:05:02.050451 3. 0000000000100000-00000000769eefff: RAM
1875 07:05:02.057241 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1876 07:05:02.063656 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1877 07:05:02.066714 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1878 07:05:02.073429 7. 0000000077000000-000000007fbfffff: RESERVED
1879 07:05:02.077252 8. 00000000c0000000-00000000cfffffff: RESERVED
1880 07:05:02.083623 9. 00000000f8000000-00000000f9ffffff: RESERVED
1881 07:05:02.086456 10. 00000000fb000000-00000000fb000fff: RESERVED
1882 07:05:02.093844 11. 00000000fe000000-00000000fe00ffff: RESERVED
1883 07:05:02.096405 12. 00000000fed80000-00000000fed87fff: RESERVED
1884 07:05:02.103400 13. 00000000fed90000-00000000fed92fff: RESERVED
1885 07:05:02.106788 14. 00000000feda0000-00000000feda1fff: RESERVED
1886 07:05:02.109883 15. 00000000fedc0000-00000000feddffff: RESERVED
1887 07:05:02.116182 16. 0000000100000000-00000002803fffff: RAM
1888 07:05:02.119756 Passing 4 GPIOs to payload:
1889 07:05:02.122837 NAME | PORT | POLARITY | VALUE
1890 07:05:02.129644 lid | undefined | high | high
1891 07:05:02.132836 power | undefined | high | low
1892 07:05:02.139363 oprom | undefined | high | low
1893 07:05:02.146047 EC in RW | 0x000000e5 | high | high
1894 07:05:02.152771 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum b1db
1895 07:05:02.152857 coreboot table: 1576 bytes.
1896 07:05:02.159891 IMD ROOT 0. 0x76fff000 0x00001000
1897 07:05:02.163070 IMD SMALL 1. 0x76ffe000 0x00001000
1898 07:05:02.165870 FSP MEMORY 2. 0x76c4e000 0x003b0000
1899 07:05:02.169895 VPD 3. 0x76c4d000 0x00000367
1900 07:05:02.172923 RO MCACHE 4. 0x76c4c000 0x00000fdc
1901 07:05:02.175866 CONSOLE 5. 0x76c2c000 0x00020000
1902 07:05:02.179180 FMAP 6. 0x76c2b000 0x00000578
1903 07:05:02.182815 TIME STAMP 7. 0x76c2a000 0x00000910
1904 07:05:02.189367 VBOOT WORK 8. 0x76c16000 0x00014000
1905 07:05:02.192318 ROMSTG STCK 9. 0x76c15000 0x00001000
1906 07:05:02.195996 AFTER CAR 10. 0x76c0a000 0x0000b000
1907 07:05:02.198806 RAMSTAGE 11. 0x76b97000 0x00073000
1908 07:05:02.202667 REFCODE 12. 0x76b42000 0x00055000
1909 07:05:02.205611 SMM BACKUP 13. 0x76b32000 0x00010000
1910 07:05:02.209014 4f444749 14. 0x76b30000 0x00002000
1911 07:05:02.211962 EXT VBT15. 0x76b2d000 0x0000219f
1912 07:05:02.218637 COREBOOT 16. 0x76b25000 0x00008000
1913 07:05:02.221804 ACPI 17. 0x76b01000 0x00024000
1914 07:05:02.225584 ACPI GNVS 18. 0x76b00000 0x00001000
1915 07:05:02.228390 RAMOOPS 19. 0x76a00000 0x00100000
1916 07:05:02.231713 TPM2 TCGLOG20. 0x769f0000 0x00010000
1917 07:05:02.235359 SMBIOS 21. 0x769ef000 0x00000800
1918 07:05:02.238717 IMD small region:
1919 07:05:02.242126 IMD ROOT 0. 0x76ffec00 0x00000400
1920 07:05:02.244765 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1921 07:05:02.248374 POWER STATE 2. 0x76ffeb80 0x00000044
1922 07:05:02.254768 ROMSTAGE 3. 0x76ffeb60 0x00000004
1923 07:05:02.258320 MEM INFO 4. 0x76ffe980 0x000001e0
1924 07:05:02.261765 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1925 07:05:02.264790 MTRR: Physical address space:
1926 07:05:02.271530 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1927 07:05:02.278267 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1928 07:05:02.284877 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1929 07:05:02.291247 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1930 07:05:02.298195 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1931 07:05:02.304439 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1932 07:05:02.311021 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1933 07:05:02.314661 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 07:05:02.317609 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 07:05:02.321507 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 07:05:02.327648 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 07:05:02.331135 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 07:05:02.334510 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 07:05:02.337565 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 07:05:02.341096 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 07:05:02.347533 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 07:05:02.350798 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 07:05:02.354782 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 07:05:02.358698 call enable_fixed_mtrr()
1945 07:05:02.361164 CPU physical address size: 39 bits
1946 07:05:02.368217 MTRR: default type WB/UC MTRR counts: 6/6.
1947 07:05:02.371067 MTRR: UC selected as default type.
1948 07:05:02.377837 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1949 07:05:02.381162 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1950 07:05:02.388113 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1951 07:05:02.394250 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1952 07:05:02.401159 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1953 07:05:02.407631 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1954 07:05:02.407742
1955 07:05:02.411159 MTRR check
1956 07:05:02.414294 Fixed MTRRs : Enabled
1957 07:05:02.414382 Variable MTRRs: Enabled
1958 07:05:02.414451
1959 07:05:02.421130 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 07:05:02.424165 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 07:05:02.427684 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 07:05:02.430984 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 07:05:02.437745 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 07:05:02.440766 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 07:05:02.444063 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 07:05:02.447517 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 07:05:02.450780 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 07:05:02.457531 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 07:05:02.460948 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 07:05:02.467265 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1971 07:05:02.471019 call enable_fixed_mtrr()
1972 07:05:02.474106 Checking cr50 for pending updates
1973 07:05:02.477516 CPU physical address size: 39 bits
1974 07:05:02.481889 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 07:05:02.484413 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 07:05:02.487655 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 07:05:02.494598 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 07:05:02.497765 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 07:05:02.500994 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 07:05:02.503830 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 07:05:02.510387 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 07:05:02.513833 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 07:05:02.517614 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 07:05:02.520838 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 07:05:02.527048 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 07:05:02.530751 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 07:05:02.533779 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 07:05:02.540292 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 07:05:02.543705 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 07:05:02.546727 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 07:05:02.550231 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 07:05:02.556673 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 07:05:02.560091 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 07:05:02.563353 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 07:05:02.566702 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 07:05:02.571357 call enable_fixed_mtrr()
1997 07:05:02.575012 call enable_fixed_mtrr()
1998 07:05:02.577708 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 07:05:02.581267 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 07:05:02.587721 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 07:05:02.591269 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 07:05:02.593977 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 07:05:02.597627 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 07:05:02.604354 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 07:05:02.607413 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 07:05:02.610782 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 07:05:02.614198 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 07:05:02.620518 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 07:05:02.623871 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 07:05:02.627515 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 07:05:02.630680 call enable_fixed_mtrr()
2012 07:05:02.634088 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 07:05:02.640596 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 07:05:02.643945 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 07:05:02.647068 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 07:05:02.650592 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 07:05:02.657102 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 07:05:02.660312 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 07:05:02.663970 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 07:05:02.666752 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 07:05:02.671083 CPU physical address size: 39 bits
2022 07:05:02.677965 call enable_fixed_mtrr()
2023 07:05:02.678056 Reading cr50 TPM mode
2024 07:05:02.681508 CPU physical address size: 39 bits
2025 07:05:02.685237 CPU physical address size: 39 bits
2026 07:05:02.691196 CPU physical address size: 39 bits
2027 07:05:02.694584 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms
2028 07:05:02.701918 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 07:05:02.704992 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 07:05:02.707880 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 07:05:02.711169 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 07:05:02.717894 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 07:05:02.722241 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 07:05:02.724887 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 07:05:02.728268 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 07:05:02.734292 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 07:05:02.737744 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 07:05:02.740926 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 07:05:02.744211 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 07:05:02.751218 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 07:05:02.751306 call enable_fixed_mtrr()
2042 07:05:02.757949 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 07:05:02.761880 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 07:05:02.764821 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 07:05:02.767950 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 07:05:02.774415 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 07:05:02.777830 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 07:05:02.781939 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 07:05:02.784554 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 07:05:02.791314 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 07:05:02.794606 CPU physical address size: 39 bits
2052 07:05:02.797931 call enable_fixed_mtrr()
2053 07:05:02.804420 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2054 07:05:02.807287 CPU physical address size: 39 bits
2055 07:05:02.814039 Checking segment from ROM address 0xffc02b38
2056 07:05:02.817529 Checking segment from ROM address 0xffc02b54
2057 07:05:02.820484 Loading segment from ROM address 0xffc02b38
2058 07:05:02.824004 code (compression=0)
2059 07:05:02.833610 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2060 07:05:02.840366 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2061 07:05:02.843830 it's not compressed!
2062 07:05:02.983064 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2063 07:05:02.989802 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2064 07:05:02.996523 Loading segment from ROM address 0xffc02b54
2065 07:05:02.999665 Entry Point 0x30000000
2066 07:05:02.999766 Loaded segments
2067 07:05:03.005997 BS: BS_PAYLOAD_LOAD run times (exec / console): 241 / 63 ms
2068 07:05:03.049041 Finalizing chipset.
2069 07:05:03.052259 Finalizing SMM.
2070 07:05:03.052354 APMC done.
2071 07:05:03.058816 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2072 07:05:03.062871 mp_park_aps done after 0 msecs.
2073 07:05:03.065259 Jumping to boot code at 0x30000000(0x76b25000)
2074 07:05:03.075547 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2075 07:05:03.075639
2076 07:05:03.078759
2077 07:05:03.078848
2078 07:05:03.079221 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2079 07:05:03.079339 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2080 07:05:03.079433 Setting prompt string to ['volteer:']
2081 07:05:03.079527 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2082 07:05:03.081880 Starting depthcharge on Voema...
2083 07:05:03.081971
2084 07:05:03.088662 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2085 07:05:03.088752
2086 07:05:03.095320 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2087 07:05:03.095411
2088 07:05:03.101643 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2089 07:05:03.101733
2090 07:05:03.104836 Failed to find eMMC card reader
2091 07:05:03.104927
2092 07:05:03.108882 Wipe memory regions:
2093 07:05:03.108972
2094 07:05:03.111879 [0x00000000001000, 0x000000000a0000)
2095 07:05:03.111968
2096 07:05:03.115399 [0x00000000100000, 0x00000030000000)
2097 07:05:03.140330
2098 07:05:03.143528 [0x00000032662db0, 0x000000769ef000)
2099 07:05:03.178862
2100 07:05:03.181960 [0x00000100000000, 0x00000280400000)
2101 07:05:03.382942
2102 07:05:03.386704 ec_init: CrosEC protocol v3 supported (256, 256)
2103 07:05:03.386801
2104 07:05:03.393346 update_port_state: port C0 state: usb enable 1 mux conn 0
2105 07:05:03.393438
2106 07:05:03.399585 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2107 07:05:03.403985
2108 07:05:03.407667 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2109 07:05:03.407764
2110 07:05:03.411106 send_conn_disc_msg: pmc_send_cmd succeeded
2111 07:05:03.842953
2112 07:05:03.843098 R8152: Initializing
2113 07:05:03.843197
2114 07:05:03.846250 Version 6 (ocp_data = 5c30)
2115 07:05:03.846341
2116 07:05:03.849550 R8152: Done initializing
2117 07:05:03.849640
2118 07:05:03.852718 Adding net device
2119 07:05:04.154535
2120 07:05:04.157509 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2121 07:05:04.157605
2122 07:05:04.157693
2123 07:05:04.157776
2124 07:05:04.161129 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2126 07:05:04.261964 volteer: tftpboot 192.168.201.1 9726731/tftp-deploy-__28l00g/kernel/bzImage 9726731/tftp-deploy-__28l00g/kernel/cmdline 9726731/tftp-deploy-__28l00g/ramdisk/ramdisk.cpio.gz
2127 07:05:04.262113 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2128 07:05:04.262276 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2129 07:05:04.266597 tftpboot 192.168.201.1 9726731/tftp-deploy-__28l00g/kernel/bzImy-__28l00g/kernel/cmdline 9726731/tftp-deploy-__28l00g/ramdisk/ramdisk.cpio.gz
2130 07:05:04.266688
2131 07:05:04.266775 Waiting for link
2132 07:05:04.469344
2133 07:05:04.469483 done.
2134 07:05:04.469579
2135 07:05:04.469662 MAC: 00:24:32:30:79:42
2136 07:05:04.469743
2137 07:05:04.473032 Sending DHCP discover... done.
2138 07:05:04.473123
2139 07:05:04.476277 Waiting for reply... done.
2140 07:05:04.476365
2141 07:05:04.479725 Sending DHCP request... done.
2142 07:05:04.479827
2143 07:05:04.482860 Waiting for reply... done.
2144 07:05:04.482948
2145 07:05:04.485803 My ip is 192.168.201.13
2146 07:05:04.485891
2147 07:05:04.489066 The DHCP server ip is 192.168.201.1
2148 07:05:04.489155
2149 07:05:04.492951 TFTP server IP predefined by user: 192.168.201.1
2150 07:05:04.493053
2151 07:05:04.499229 Bootfile predefined by user: 9726731/tftp-deploy-__28l00g/kernel/bzImage
2152 07:05:04.502326
2153 07:05:04.505362 Sending tftp read request... done.
2154 07:05:04.505450
2155 07:05:04.509412 Waiting for the transfer...
2156 07:05:04.509500
2157 07:05:05.074152 00000000 ################################################################
2158 07:05:05.074294
2159 07:05:05.638858 00080000 ################################################################
2160 07:05:05.639011
2161 07:05:06.169616 00100000 ################################################################
2162 07:05:06.169768
2163 07:05:06.706040 00180000 ################################################################
2164 07:05:06.706193
2165 07:05:07.225831 00200000 ################################################################
2166 07:05:07.225981
2167 07:05:07.745438 00280000 ################################################################
2168 07:05:07.745599
2169 07:05:08.273969 00300000 ################################################################
2170 07:05:08.274120
2171 07:05:08.806838 00380000 ################################################################
2172 07:05:08.806987
2173 07:05:09.349945 00400000 ################################################################
2174 07:05:09.350100
2175 07:05:09.893578 00480000 ################################################################
2176 07:05:09.893727
2177 07:05:10.454412 00500000 ################################################################
2178 07:05:10.454567
2179 07:05:11.009505 00580000 ################################################################
2180 07:05:11.009658
2181 07:05:11.549955 00600000 ################################################################
2182 07:05:11.550109
2183 07:05:12.113659 00680000 ################################################################
2184 07:05:12.113809
2185 07:05:12.673539 00700000 ################################################################
2186 07:05:12.673692
2187 07:05:13.263350 00780000 ################################################################
2188 07:05:13.263925
2189 07:05:13.919942 00800000 ################################################################
2190 07:05:13.920542
2191 07:05:14.557178 00880000 ################################################################
2192 07:05:14.557336
2193 07:05:14.994623 00900000 ################################################ done.
2194 07:05:14.994762
2195 07:05:14.998106 The bootfile was 9826304 bytes long.
2196 07:05:14.998200
2197 07:05:15.000996 Sending tftp read request... done.
2198 07:05:15.001096
2199 07:05:15.004292 Waiting for the transfer...
2200 07:05:15.004385
2201 07:05:15.612301 00000000 ################################################################
2202 07:05:15.612444
2203 07:05:16.212672 00080000 ################################################################
2204 07:05:16.212824
2205 07:05:16.827490 00100000 ################################################################
2206 07:05:16.827628
2207 07:05:17.415767 00180000 ################################################################
2208 07:05:17.415914
2209 07:05:18.008683 00200000 ################################################################
2210 07:05:18.008824
2211 07:05:18.582357 00280000 ################################################################
2212 07:05:18.582499
2213 07:05:19.168617 00300000 ################################################################
2214 07:05:19.168762
2215 07:05:19.772117 00380000 ################################################################
2216 07:05:19.772259
2217 07:05:20.373153 00400000 ################################################################
2218 07:05:20.373295
2219 07:05:20.951585 00480000 ################################################################
2220 07:05:20.951758
2221 07:05:21.535840 00500000 ################################################################
2222 07:05:21.535981
2223 07:05:22.104948 00580000 ################################################################
2224 07:05:22.105087
2225 07:05:22.679042 00600000 ################################################################
2226 07:05:22.679184
2227 07:05:23.306601 00680000 ################################################################
2228 07:05:23.307131
2229 07:05:24.016799 00700000 ################################################################
2230 07:05:24.017373
2231 07:05:24.714822 00780000 ################################################################
2232 07:05:24.715367
2233 07:05:25.392438 00800000 ################################################################
2234 07:05:25.392581
2235 07:05:25.966371 00880000 ################################################################
2236 07:05:25.966509
2237 07:05:26.551810 00900000 ################################################################
2238 07:05:26.551948
2239 07:05:27.133213 00980000 ################################################################
2240 07:05:27.133354
2241 07:05:27.711875 00a00000 ################################################################
2242 07:05:27.712027
2243 07:05:28.372087 00a80000 ################################################################
2244 07:05:28.372678
2245 07:05:28.965617 00b00000 ################################################################
2246 07:05:28.965761
2247 07:05:29.567272 00b80000 ################################################################
2248 07:05:29.567462
2249 07:05:30.169555 00c00000 ################################################################
2250 07:05:30.169702
2251 07:05:30.738808 00c80000 ################################################################
2252 07:05:30.738957
2253 07:05:31.303143 00d00000 ################################################################
2254 07:05:31.303298
2255 07:05:31.876776 00d80000 ################################################################
2256 07:05:31.876916
2257 07:05:32.426604 00e00000 ################################################################
2258 07:05:32.426760
2259 07:05:32.979309 00e80000 ################################################################
2260 07:05:32.979466
2261 07:05:33.533863 00f00000 ################################################################
2262 07:05:33.534009
2263 07:05:34.107512 00f80000 ################################################################
2264 07:05:34.107652
2265 07:05:34.666987 01000000 ################################################################
2266 07:05:34.667130
2267 07:05:35.214015 01080000 ################################################################
2268 07:05:35.214181
2269 07:05:35.750879 01100000 ################################################################
2270 07:05:35.751024
2271 07:05:36.269074 01180000 ################################################################
2272 07:05:36.269219
2273 07:05:36.786270 01200000 ################################################################
2274 07:05:36.786419
2275 07:05:37.298744 01280000 ################################################################
2276 07:05:37.298901
2277 07:05:37.817618 01300000 ################################################################
2278 07:05:37.817774
2279 07:05:38.356035 01380000 ################################################################
2280 07:05:38.356193
2281 07:05:38.879694 01400000 ################################################################
2282 07:05:38.879836
2283 07:05:39.395930 01480000 ################################################################
2284 07:05:39.396081
2285 07:05:39.923481 01500000 ################################################################
2286 07:05:39.923633
2287 07:05:40.453800 01580000 ################################################################
2288 07:05:40.453942
2289 07:05:40.998986 01600000 ################################################################
2290 07:05:40.999129
2291 07:05:41.523789 01680000 ################################################################
2292 07:05:41.523927
2293 07:05:42.075552 01700000 ################################################################
2294 07:05:42.075699
2295 07:05:42.647788 01780000 ################################################################
2296 07:05:42.648332
2297 07:05:43.307868 01800000 ################################################################
2298 07:05:43.308396
2299 07:05:43.984993 01880000 ################################################################
2300 07:05:43.985539
2301 07:05:44.707737 01900000 ################################################################
2302 07:05:44.707893
2303 07:05:45.398329 01980000 ################################################################
2304 07:05:45.398896
2305 07:05:46.129754 01a00000 ################################################################
2306 07:05:46.130292
2307 07:05:46.866718 01a80000 ################################################################
2308 07:05:46.867289
2309 07:05:47.593523 01b00000 ################################################################
2310 07:05:47.594129
2311 07:05:48.286613 01b80000 ################################################################
2312 07:05:48.286765
2313 07:05:48.894433 01c00000 ################################################################
2314 07:05:48.894590
2315 07:05:49.499531 01c80000 ################################################################
2316 07:05:49.499684
2317 07:05:50.113432 01d00000 ################################################################
2318 07:05:50.113586
2319 07:05:50.734533 01d80000 ################################################################
2320 07:05:50.734688
2321 07:05:51.319747 01e00000 ################################################################
2322 07:05:51.319906
2323 07:05:51.880474 01e80000 ################################################################
2324 07:05:51.880641
2325 07:05:52.454024 01f00000 ################################################################
2326 07:05:52.454608
2327 07:05:53.040394 01f80000 ################################################################
2328 07:05:53.040549
2329 07:05:53.636375 02000000 ################################################################
2330 07:05:53.636532
2331 07:05:54.273468 02080000 ################################################################
2332 07:05:54.274048
2333 07:05:54.947145 02100000 ################################################################
2334 07:05:54.947307
2335 07:05:55.576515 02180000 ################################################################
2336 07:05:55.577075
2337 07:05:56.296574 02200000 ################################################################
2338 07:05:56.297115
2339 07:05:56.661536 02280000 ################################### done.
2340 07:05:56.662072
2341 07:05:56.665216 Sending tftp read request... done.
2342 07:05:56.665668
2343 07:05:56.668569 Waiting for the transfer...
2344 07:05:56.669021
2345 07:05:56.669377 00000000 # done.
2346 07:05:56.669728
2347 07:05:56.678353 Command line loaded dynamically from TFTP file: 9726731/tftp-deploy-__28l00g/kernel/cmdline
2348 07:05:56.678900
2349 07:05:56.691957 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2350 07:05:56.699212
2351 07:05:56.702293 Shutting down all USB controllers.
2352 07:05:56.702886
2353 07:05:56.703279 Removing current net device
2354 07:05:56.703649
2355 07:05:56.705663 Finalizing coreboot
2356 07:05:56.706163
2357 07:05:56.712369 Exiting depthcharge with code 4 at timestamp: 62287734
2358 07:05:56.712964
2359 07:05:56.713361
2360 07:05:56.713727 Starting kernel ...
2361 07:05:56.714080
2362 07:05:56.714428
2363 07:05:56.715983 end: 2.2.4 bootloader-commands (duration 00:00:54) [common]
2364 07:05:56.716523 start: 2.2.5 auto-login-action (timeout 00:03:51) [common]
2365 07:05:56.716951 Setting prompt string to ['Linux version [0-9]']
2366 07:05:56.717388 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2367 07:05:56.717824 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2369 07:09:47.716775 end: 2.2.5 auto-login-action (duration 00:03:51) [common]
2371 07:09:47.716992 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 231 seconds'
2373 07:09:47.717158 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2376 07:09:47.717427 end: 2 depthcharge-action (duration 00:05:00) [common]
2378 07:09:47.717653 Cleaning after the job
2379 07:09:47.717741 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726731/tftp-deploy-__28l00g/ramdisk
2380 07:09:47.720252 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726731/tftp-deploy-__28l00g/kernel
2381 07:09:47.720951 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726731/tftp-deploy-__28l00g/modules
2382 07:09:47.721332 start: 4.1 power-off (timeout 00:00:30) [common]
2383 07:09:47.721488 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2384 07:09:47.798267 >> Command sent successfully.
2385 07:09:47.800361 Returned 0 in 0 seconds
2386 07:09:47.901157 end: 4.1 power-off (duration 00:00:00) [common]
2388 07:09:47.901503 start: 4.2 read-feedback (timeout 00:10:00) [common]
2389 07:09:47.901743 Listened to connection for namespace 'common' for up to 1s
2390 07:09:48.904158 Finalising connection for namespace 'common'
2391 07:09:48.904821 Disconnecting from shell: Finalise
2392 07:09:48.905238
2393 07:09:49.006623 end: 4.2 read-feedback (duration 00:00:01) [common]
2394 07:09:49.007357 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9726731
2395 07:09:49.061608 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9726731
2396 07:09:49.061802 JobError: Your job cannot terminate cleanly.