Boot log: acer-cb317-1h-c3z6-dedede
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 07:04:37.119130 lava-dispatcher, installed at version: 2023.01
2 07:04:37.119318 start: 0 validate
3 07:04:37.119438 Start time: 2023-03-22 07:04:37.119424+00:00 (UTC)
4 07:04:37.119554 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:04:37.119682 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 07:04:37.410473 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:04:37.410681 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.277-cip94%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:04:37.699342 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:04:37.699496 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:04:53.689402 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:04:53.690158 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.277-cip94%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:04:53.988731 validate duration: 16.87
14 07:04:53.990104 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:04:53.990987 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:04:53.991539 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:04:53.992052 Not decompressing ramdisk as can be used compressed.
18 07:04:53.992512 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/initrd.cpio.gz
19 07:04:53.992873 saving as /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/ramdisk/initrd.cpio.gz
20 07:04:53.993214 total size: 5432123 (5MB)
21 07:04:54.998499 progress 0% (0MB)
22 07:04:55.006107 progress 5% (0MB)
23 07:04:55.012884 progress 10% (0MB)
24 07:04:55.019678 progress 15% (0MB)
25 07:04:55.026797 progress 20% (1MB)
26 07:04:55.031381 progress 25% (1MB)
27 07:04:55.034947 progress 30% (1MB)
28 07:04:55.038356 progress 35% (1MB)
29 07:04:55.041155 progress 40% (2MB)
30 07:04:55.043542 progress 45% (2MB)
31 07:04:55.045911 progress 50% (2MB)
32 07:04:55.048202 progress 55% (2MB)
33 07:04:55.050236 progress 60% (3MB)
34 07:04:55.052135 progress 65% (3MB)
35 07:04:55.054152 progress 70% (3MB)
36 07:04:55.055949 progress 75% (3MB)
37 07:04:55.057549 progress 80% (4MB)
38 07:04:55.059167 progress 85% (4MB)
39 07:04:55.060952 progress 90% (4MB)
40 07:04:55.062394 progress 95% (4MB)
41 07:04:55.063865 progress 100% (5MB)
42 07:04:55.064090 5MB downloaded in 1.07s (4.84MB/s)
43 07:04:55.064257 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:04:55.064534 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:04:55.064636 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:04:55.064738 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:04:55.064861 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.277-cip94/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:04:55.064943 saving as /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/kernel/bzImage
50 07:04:55.065014 total size: 9826304 (9MB)
51 07:04:55.065082 No compression specified
52 07:04:55.355641 progress 0% (0MB)
53 07:04:55.368628 progress 5% (0MB)
54 07:04:55.381789 progress 10% (0MB)
55 07:04:55.389697 progress 15% (1MB)
56 07:04:55.395505 progress 20% (1MB)
57 07:04:55.400208 progress 25% (2MB)
58 07:04:55.404328 progress 30% (2MB)
59 07:04:55.408058 progress 35% (3MB)
60 07:04:55.411465 progress 40% (3MB)
61 07:04:55.414554 progress 45% (4MB)
62 07:04:55.417552 progress 50% (4MB)
63 07:04:55.420286 progress 55% (5MB)
64 07:04:55.422906 progress 60% (5MB)
65 07:04:55.425342 progress 65% (6MB)
66 07:04:55.427793 progress 70% (6MB)
67 07:04:55.430144 progress 75% (7MB)
68 07:04:55.432580 progress 80% (7MB)
69 07:04:55.434958 progress 85% (7MB)
70 07:04:55.437309 progress 90% (8MB)
71 07:04:55.439703 progress 95% (8MB)
72 07:04:55.442128 progress 100% (9MB)
73 07:04:55.442346 9MB downloaded in 0.38s (24.84MB/s)
74 07:04:55.442500 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:04:55.442777 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:04:55.442867 start: 1.3 download-retry (timeout 00:09:59) [common]
78 07:04:55.442958 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 07:04:55.443069 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/full.rootfs.tar.xz
80 07:04:55.443138 saving as /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/nfsrootfs/full.rootfs.tar
81 07:04:55.443200 total size: 133351768 (127MB)
82 07:04:55.443260 Using unxz to decompress xz
83 07:04:55.446441 progress 0% (0MB)
84 07:04:55.783277 progress 5% (6MB)
85 07:04:56.143976 progress 10% (12MB)
86 07:04:56.422107 progress 15% (19MB)
87 07:04:56.611893 progress 20% (25MB)
88 07:04:56.862728 progress 25% (31MB)
89 07:04:57.202392 progress 30% (38MB)
90 07:04:57.551473 progress 35% (44MB)
91 07:04:57.943439 progress 40% (50MB)
92 07:04:58.325535 progress 45% (57MB)
93 07:04:58.677234 progress 50% (63MB)
94 07:04:59.043986 progress 55% (69MB)
95 07:04:59.399071 progress 60% (76MB)
96 07:04:59.756594 progress 65% (82MB)
97 07:05:00.112916 progress 70% (89MB)
98 07:05:00.472972 progress 75% (95MB)
99 07:05:00.906905 progress 80% (101MB)
100 07:05:01.337215 progress 85% (108MB)
101 07:05:01.611250 progress 90% (114MB)
102 07:05:01.953855 progress 95% (120MB)
103 07:05:02.344709 progress 100% (127MB)
104 07:05:02.350369 127MB downloaded in 6.91s (18.41MB/s)
105 07:05:02.350670 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:05:02.350933 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:05:02.351025 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:05:02.351113 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:05:02.351230 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.277-cip94/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:05:02.351310 saving as /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/modules/modules.tar
112 07:05:02.351381 total size: 461712 (0MB)
113 07:05:02.351450 Using unxz to decompress xz
114 07:05:02.354362 progress 7% (0MB)
115 07:05:02.354743 progress 14% (0MB)
116 07:05:02.354971 progress 21% (0MB)
117 07:05:02.356319 progress 28% (0MB)
118 07:05:02.358322 progress 35% (0MB)
119 07:05:02.360452 progress 42% (0MB)
120 07:05:02.362827 progress 49% (0MB)
121 07:05:02.364717 progress 56% (0MB)
122 07:05:02.366504 progress 63% (0MB)
123 07:05:02.368681 progress 70% (0MB)
124 07:05:02.370664 progress 78% (0MB)
125 07:05:02.372623 progress 85% (0MB)
126 07:05:02.374334 progress 92% (0MB)
127 07:05:02.376316 progress 99% (0MB)
128 07:05:02.382738 0MB downloaded in 0.03s (14.05MB/s)
129 07:05:02.382983 end: 1.4.1 http-download (duration 00:00:00) [common]
131 07:05:02.383244 end: 1.4 download-retry (duration 00:00:00) [common]
132 07:05:02.383338 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
133 07:05:02.383440 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
134 07:05:03.506426 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9726720/extract-nfsrootfs-dk1z4ow7
135 07:05:03.506658 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
136 07:05:03.506770 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
137 07:05:03.506915 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz
138 07:05:03.507016 makedir: /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin
139 07:05:03.507101 makedir: /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/tests
140 07:05:03.507182 makedir: /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/results
141 07:05:03.507281 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-add-keys
142 07:05:03.507406 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-add-sources
143 07:05:03.507521 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-background-process-start
144 07:05:03.507632 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-background-process-stop
145 07:05:03.507741 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-common-functions
146 07:05:03.507849 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-echo-ipv4
147 07:05:03.507957 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-install-packages
148 07:05:03.508067 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-installed-packages
149 07:05:03.508175 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-os-build
150 07:05:03.508282 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-probe-channel
151 07:05:03.508419 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-probe-ip
152 07:05:03.508555 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-target-ip
153 07:05:03.508661 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-target-mac
154 07:05:03.508768 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-target-storage
155 07:05:03.508876 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-test-case
156 07:05:03.508985 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-test-event
157 07:05:03.509091 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-test-feedback
158 07:05:03.509200 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-test-raise
159 07:05:03.509305 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-test-reference
160 07:05:03.509412 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-test-runner
161 07:05:03.509518 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-test-set
162 07:05:03.509624 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-test-shell
163 07:05:03.509733 Updating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-install-packages (oe)
164 07:05:03.509844 Updating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/bin/lava-installed-packages (oe)
165 07:05:03.509940 Creating /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/environment
166 07:05:03.510026 LAVA metadata
167 07:05:03.510095 - LAVA_JOB_ID=9726720
168 07:05:03.510160 - LAVA_DISPATCHER_IP=192.168.201.1
169 07:05:03.510257 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
170 07:05:03.510322 skipped lava-vland-overlay
171 07:05:03.510397 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
172 07:05:03.510477 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
173 07:05:03.510540 skipped lava-multinode-overlay
174 07:05:03.510657 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
175 07:05:03.510739 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
176 07:05:03.510812 Loading test definitions
177 07:05:03.510902 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
178 07:05:03.510973 Using /lava-9726720 at stage 0
179 07:05:03.511219 uuid=9726720_1.5.2.3.1 testdef=None
180 07:05:03.511310 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
181 07:05:03.511397 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
182 07:05:03.511868 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
184 07:05:03.512098 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
185 07:05:03.512678 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
187 07:05:03.512915 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
188 07:05:03.513448 runner path: /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/0/tests/0_dmesg test_uuid 9726720_1.5.2.3.1
189 07:05:03.513591 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
191 07:05:03.513820 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
192 07:05:03.513894 Using /lava-9726720 at stage 1
193 07:05:03.514128 uuid=9726720_1.5.2.3.5 testdef=None
194 07:05:03.514217 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
195 07:05:03.514304 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
196 07:05:03.514788 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
198 07:05:03.515010 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
199 07:05:03.515572 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
201 07:05:03.515807 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
202 07:05:03.516362 runner path: /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/1/tests/1_bootrr test_uuid 9726720_1.5.2.3.5
203 07:05:03.516503 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
205 07:05:03.516713 Creating lava-test-runner.conf files
206 07:05:03.516776 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/0 for stage 0
207 07:05:03.516855 - 0_dmesg
208 07:05:03.516928 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726720/lava-overlay-g2_ek0yz/lava-9726720/1 for stage 1
209 07:05:03.517010 - 1_bootrr
210 07:05:03.517100 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
211 07:05:03.517185 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
212 07:05:03.522694 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
213 07:05:03.522800 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
214 07:05:03.522891 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
215 07:05:03.522979 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
216 07:05:03.523065 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
217 07:05:03.623056 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
218 07:05:03.623379 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
219 07:05:03.623622 extracting modules file /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726720/extract-nfsrootfs-dk1z4ow7
220 07:05:03.633334 extracting modules file /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726720/extract-overlay-ramdisk-09mv8biy/ramdisk
221 07:05:03.642795 end: 1.5.4 extract-modules (duration 00:00:00) [common]
222 07:05:03.642929 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
223 07:05:03.643016 [common] Applying overlay to NFS
224 07:05:03.643088 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726720/compress-overlay-fanx8t00/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9726720/extract-nfsrootfs-dk1z4ow7
225 07:05:03.646641 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
226 07:05:03.646749 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
227 07:05:03.646842 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
228 07:05:03.646930 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
229 07:05:03.647007 Building ramdisk /var/lib/lava/dispatcher/tmp/9726720/extract-overlay-ramdisk-09mv8biy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9726720/extract-overlay-ramdisk-09mv8biy/ramdisk
230 07:05:03.684274 >> 30003 blocks
231 07:05:04.219703 rename /var/lib/lava/dispatcher/tmp/9726720/extract-overlay-ramdisk-09mv8biy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/ramdisk/ramdisk.cpio.gz
232 07:05:04.220077 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
233 07:05:04.220197 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
234 07:05:04.220300 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
235 07:05:04.220398 No mkimage arch provided, not using FIT.
236 07:05:04.220490 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
237 07:05:04.220579 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
238 07:05:04.220678 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
239 07:05:04.220771 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
240 07:05:04.220846 No LXC device requested
241 07:05:04.220925 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
242 07:05:04.221019 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
243 07:05:04.221106 end: 1.7 deploy-device-env (duration 00:00:00) [common]
244 07:05:04.221175 Checking files for TFTP limit of 4294967296 bytes.
245 07:05:04.221555 end: 1 tftp-deploy (duration 00:00:10) [common]
246 07:05:04.221666 start: 2 depthcharge-action (timeout 00:05:00) [common]
247 07:05:04.221761 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
248 07:05:04.221880 substitutions:
249 07:05:04.221949 - {DTB}: None
250 07:05:04.222009 - {INITRD}: 9726720/tftp-deploy-3eqd7zv5/ramdisk/ramdisk.cpio.gz
251 07:05:04.222069 - {KERNEL}: 9726720/tftp-deploy-3eqd7zv5/kernel/bzImage
252 07:05:04.222126 - {LAVA_MAC}: None
253 07:05:04.222181 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9726720/extract-nfsrootfs-dk1z4ow7
254 07:05:04.222237 - {NFS_SERVER_IP}: 192.168.201.1
255 07:05:04.222292 - {PRESEED_CONFIG}: None
256 07:05:04.222345 - {PRESEED_LOCAL}: None
257 07:05:04.222399 - {RAMDISK}: 9726720/tftp-deploy-3eqd7zv5/ramdisk/ramdisk.cpio.gz
258 07:05:04.222454 - {ROOT_PART}: None
259 07:05:04.222510 - {ROOT}: None
260 07:05:04.222568 - {SERVER_IP}: 192.168.201.1
261 07:05:04.222661 - {TEE}: None
262 07:05:04.222715 Parsed boot commands:
263 07:05:04.222772 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
264 07:05:04.222926 Parsed boot commands: tftpboot 192.168.201.1 9726720/tftp-deploy-3eqd7zv5/kernel/bzImage 9726720/tftp-deploy-3eqd7zv5/kernel/cmdline 9726720/tftp-deploy-3eqd7zv5/ramdisk/ramdisk.cpio.gz
265 07:05:04.223018 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
266 07:05:04.223106 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
267 07:05:04.223200 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
268 07:05:04.223287 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
269 07:05:04.223355 Not connected, no need to disconnect.
270 07:05:04.223428 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
271 07:05:04.223506 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
272 07:05:04.223572 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-9'
273 07:05:04.226346 Setting prompt string to ['lava-test: # ']
274 07:05:04.226660 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
275 07:05:04.226766 end: 2.2.1 reset-connection (duration 00:00:00) [common]
276 07:05:04.226862 start: 2.2.2 reset-device (timeout 00:05:00) [common]
277 07:05:04.226952 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
278 07:05:04.227124 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=reboot'
279 07:05:09.369333 >> Command sent successfully.
280 07:05:09.378619 Returned 0 in 5 seconds
281 07:05:09.480203 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
283 07:05:09.481598 end: 2.2.2 reset-device (duration 00:00:05) [common]
284 07:05:09.482101 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
285 07:05:09.482531 Setting prompt string to 'Starting depthcharge on Magolor...'
286 07:05:09.482916 Changing prompt to 'Starting depthcharge on Magolor...'
287 07:05:09.483279 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
288 07:05:09.484519 [Enter `^Ec?' for help]
289 07:05:10.617438
290 07:05:10.618005
291 07:05:10.628354 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
292 07:05:10.631580 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
293 07:05:10.635353 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
294 07:05:10.641591 CPU: AES supported, TXT NOT supported, VT supported
295 07:05:10.644958 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
296 07:05:10.651608 PCH: device id 4d87 (rev 01) is Jasperlake Super
297 07:05:10.654694 IGD: device id 4e55 (rev 01) is Jasperlake GT4
298 07:05:10.658164 VBOOT: Loading verstage.
299 07:05:10.665145 FMAP: Found "FLASH" version 1.1 at 0xc04000.
300 07:05:10.668114 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
301 07:05:10.674835 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
302 07:05:10.678088 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
303 07:05:10.681714
304 07:05:10.682178
305 07:05:10.692094 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
306 07:05:10.705878 Probing TPM: . done!
307 07:05:10.709036 TPM ready after 0 ms
308 07:05:10.712329 Connected to device vid:did:rid of 1ae0:0028:00
309 07:05:10.723170 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
310 07:05:10.730693 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
311 07:05:10.734443 Initialized TPM device CR50 revision 0
312 07:05:10.790790 tlcl_send_startup: Startup return code is 0
313 07:05:10.791322 TPM: setup succeeded
314 07:05:10.805767 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
315 07:05:10.821042 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
316 07:05:10.835369 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
317 07:05:10.845812 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 07:05:10.851348 Chrome EC: UHEPI supported
319 07:05:10.855300 Phase 1
320 07:05:10.859387 FMAP: area GBB found @ c05000 (12288 bytes)
321 07:05:10.865586 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
322 07:05:10.872534 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
323 07:05:10.875654 Recovery requested (1009000e)
324 07:05:10.878853 TPM: Extending digest for VBOOT: boot mode into PCR 0
325 07:05:10.890459 tlcl_extend: response is 0
326 07:05:10.896943 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
327 07:05:10.906769 tlcl_extend: response is 0
328 07:05:10.913169 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 07:05:10.916344 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
330 07:05:10.923029 BS: verstage times (exec / console): total (unknown) / 124 ms
331 07:05:10.923484
332 07:05:10.926670
333 07:05:10.936119 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
334 07:05:10.942797 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
335 07:05:10.946163 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
336 07:05:10.949785 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
337 07:05:10.956353 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
338 07:05:10.960103 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
339 07:05:10.964147 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
340 07:05:10.967719 TCO_STS: 0000 0001
341 07:05:10.968276 GEN_PMCON: d0015038 00002200
342 07:05:10.971292 GBLRST_CAUSE: 00000000 00000000
343 07:05:10.974786 prev_sleep_state 5
344 07:05:10.978363 Boot Count incremented to 4038
345 07:05:10.982212 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 07:05:10.989599 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
347 07:05:10.993739 Chrome EC: UHEPI supported
348 07:05:10.996765 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
349 07:05:11.003481 Probing TPM: done!
350 07:05:11.009837 Connected to device vid:did:rid of 1ae0:0028:00
351 07:05:11.019671 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
352 07:05:11.022878 Initialized TPM device CR50 revision 0
353 07:05:11.038262 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 07:05:11.044764 MRC: Hash idx 0x100b comparison successful.
355 07:05:11.047729 MRC cache found, size 5458
356 07:05:11.048189 bootmode is set to: 2
357 07:05:11.051265 SPD INDEX = 0
358 07:05:11.054401 CBFS: Found 'spd.bin' @0x40c40 size 0x600
359 07:05:11.057479 SPD: module type is LPDDR4X
360 07:05:11.064310 SPD: module part number is MT53E512M32D2NP-046 WT:E
361 07:05:11.070619 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
362 07:05:11.074033 SPD: device width 16 bits, bus width 32 bits
363 07:05:11.077320 SPD: module size is 4096 MB (per channel)
364 07:05:11.080642 meminit_channels: DRAM half-populated
365 07:05:11.163351 CBMEM:
366 07:05:11.167060 IMD: root @ 0x76fff000 254 entries.
367 07:05:11.170461 IMD: root @ 0x76ffec00 62 entries.
368 07:05:11.173802 FMAP: area RO_VPD found @ c00000 (16384 bytes)
369 07:05:11.179918 WARNING: RO_VPD is uninitialized or empty.
370 07:05:11.183225 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
371 07:05:11.186491 WARNING: RW_VPD is uninitialized or empty.
372 07:05:11.191165 External stage cache:
373 07:05:11.194481 IMD: root @ 0x7b3ff000 254 entries.
374 07:05:11.197942 IMD: root @ 0x7b3fec00 62 entries.
375 07:05:11.207584 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
376 07:05:11.214885 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
377 07:05:11.221351 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
378 07:05:11.229376 MRC: 'RECOVERY_MRC_CACHE' does not need update.
379 07:05:11.235644 cse_lite: Skip switching to RW in the recovery path
380 07:05:11.236111 1 DIMMs found
381 07:05:11.236547 SMM Memory Map
382 07:05:11.239024 SMRAM : 0x7b000000 0x800000
383 07:05:11.245778 Subregion 0: 0x7b000000 0x200000
384 07:05:11.248870 Subregion 1: 0x7b200000 0x200000
385 07:05:11.252419 Subregion 2: 0x7b400000 0x400000
386 07:05:11.252872 top_of_ram = 0x77000000
387 07:05:11.258773 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
388 07:05:11.265437 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
389 07:05:11.268903 MTRR Range: Start=ff000000 End=0 (Size 1000000)
390 07:05:11.275364 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
391 07:05:11.281927 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
392 07:05:11.292404 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
393 07:05:11.295097 Processing 188 relocs. Offset value of 0x74c0e000
394 07:05:11.304492 BS: romstage times (exec / console): total (unknown) / 259 ms
395 07:05:11.309350
396 07:05:11.309921
397 07:05:11.319088 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
398 07:05:11.325800 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 07:05:11.329358 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
400 07:05:11.335741 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
401 07:05:11.392020 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
402 07:05:11.398608 Processing 4805 relocs. Offset value of 0x75da8000
403 07:05:11.405003 BS: postcar times (exec / console): total (unknown) / 42 ms
404 07:05:11.405460
405 07:05:11.405814
406 07:05:11.415029 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
407 07:05:11.415487 Normal boot
408 07:05:11.418819 EC returned error result code 3
409 07:05:11.422030 FW_CONFIG value is 0x204
410 07:05:11.425741 GENERIC: 0.0 disabled by fw_config
411 07:05:11.432195 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
412 07:05:11.435448 I2C: 00:10 disabled by fw_config
413 07:05:11.438678 I2C: 00:10 disabled by fw_config
414 07:05:11.442150 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
415 07:05:11.448495 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
416 07:05:11.451808 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
417 07:05:11.458797 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
418 07:05:11.462339 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
419 07:05:11.465297 I2C: 00:10 disabled by fw_config
420 07:05:11.471514 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
421 07:05:11.478198 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
422 07:05:11.481880 I2C: 00:1a disabled by fw_config
423 07:05:11.485284 I2C: 00:1a disabled by fw_config
424 07:05:11.491706 fw_config match found: AUDIO_AMP=UNPROVISIONED
425 07:05:11.495108 fw_config match found: AUDIO_AMP=UNPROVISIONED
426 07:05:11.498381 GENERIC: 0.0 disabled by fw_config
427 07:05:11.505048 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 07:05:11.508024 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
429 07:05:11.514928 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
430 07:05:11.518108 microcode: Update skipped, already up-to-date
431 07:05:11.524351 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
432 07:05:11.550484 Detected 2 core, 2 thread CPU.
433 07:05:11.553914 Setting up SMI for CPU
434 07:05:11.557357 IED base = 0x7b400000
435 07:05:11.557888 IED size = 0x00400000
436 07:05:11.560441 Will perform SMM setup.
437 07:05:11.563855 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
438 07:05:11.573630 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
439 07:05:11.576932 Processing 16 relocs. Offset value of 0x00030000
440 07:05:11.580840 Attempting to start 1 APs
441 07:05:11.584123 Waiting for 10ms after sending INIT.
442 07:05:11.600473 Waiting for 1st SIPI to complete...done.
443 07:05:11.600921 AP: slot 1 apic_id 2.
444 07:05:11.606823 Waiting for 2nd SIPI to complete...done.
445 07:05:11.613313 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
446 07:05:11.620163 Processing 13 relocs. Offset value of 0x00038000
447 07:05:11.620331 Unable to locate Global NVS
448 07:05:11.629780 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
449 07:05:11.633407 Installing permanent SMM handler to 0x7b000000
450 07:05:11.643288 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
451 07:05:11.646544 Processing 704 relocs. Offset value of 0x7b010000
452 07:05:11.656169 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
453 07:05:11.659824 Processing 13 relocs. Offset value of 0x7b008000
454 07:05:11.666237 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
455 07:05:11.669566 Unable to locate Global NVS
456 07:05:11.676144 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
457 07:05:11.679381 Clearing SMI status registers
458 07:05:11.679557 SMI_STS: PM1
459 07:05:11.682693 PM1_STS: PWRBTN
460 07:05:11.682855 TCO_STS: INTRD_DET
461 07:05:11.686025 GPE0 STD STS:
462 07:05:11.692882 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
463 07:05:11.696091 In relocation handler: CPU 0
464 07:05:11.699386 New SMBASE=0x7b000000 IEDBASE=0x7b400000
465 07:05:11.705977 Writing SMRR. base = 0x7b000006, mask=0xff800800
466 07:05:11.706387 Relocation complete.
467 07:05:11.715927 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
468 07:05:11.716395 In relocation handler: CPU 1
469 07:05:11.722554 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
470 07:05:11.725766 Writing SMRR. base = 0x7b000006, mask=0xff800800
471 07:05:11.729643 Relocation complete.
472 07:05:11.730096 Initializing CPU #0
473 07:05:11.732619 CPU: vendor Intel device 906c0
474 07:05:11.739103 CPU: family 06, model 9c, stepping 00
475 07:05:11.739649 Clearing out pending MCEs
476 07:05:11.742465 Setting up local APIC...
477 07:05:11.745798 apic_id: 0x00 done.
478 07:05:11.749143 Turbo is available but hidden
479 07:05:11.752386 Turbo is available and visible
480 07:05:11.755712 microcode: Update skipped, already up-to-date
481 07:05:11.759017 CPU #0 initialized
482 07:05:11.759486 Initializing CPU #1
483 07:05:11.762402 CPU: vendor Intel device 906c0
484 07:05:11.765583 CPU: family 06, model 9c, stepping 00
485 07:05:11.768805 Clearing out pending MCEs
486 07:05:11.772324 Setting up local APIC...
487 07:05:11.775586 apic_id: 0x02 done.
488 07:05:11.778705 microcode: Update skipped, already up-to-date
489 07:05:11.781997 CPU #1 initialized
490 07:05:11.785389 bsp_do_flight_plan done after 175 msecs.
491 07:05:11.788734 CPU: frequency set to 2800 MHz
492 07:05:11.789207 Enabling SMIs.
493 07:05:11.795451 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 288 ms
494 07:05:11.806338 Probing TPM: done!
495 07:05:11.813159 Connected to device vid:did:rid of 1ae0:0028:00
496 07:05:11.823212 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
497 07:05:11.826314 Initialized TPM device CR50 revision 0
498 07:05:11.832752 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
499 07:05:11.836163 Found a VBT of 7680 bytes after decompression
500 07:05:11.845839 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
501 07:05:11.878224 Detected 2 core, 2 thread CPU.
502 07:05:11.881622 Detected 2 core, 2 thread CPU.
503 07:05:12.243764 Display FSP Version Info HOB
504 07:05:12.246989 Reference Code - CPU = 8.7.22.30
505 07:05:12.250543 uCode Version = 24.0.0.1f
506 07:05:12.253582 TXT ACM version = ff.ff.ff.ffff
507 07:05:12.257127 Reference Code - ME = 8.7.22.30
508 07:05:12.260142 MEBx version = 0.0.0.0
509 07:05:12.263650 ME Firmware Version = Consumer SKU
510 07:05:12.266959 Reference Code - PCH = 8.7.22.30
511 07:05:12.270244 PCH-CRID Status = Disabled
512 07:05:12.273459 PCH-CRID Original Value = ff.ff.ff.ffff
513 07:05:12.276901 PCH-CRID New Value = ff.ff.ff.ffff
514 07:05:12.280144 OPROM - RST - RAID = ff.ff.ff.ffff
515 07:05:12.283407 PCH Hsio Version = 4.0.0.0
516 07:05:12.286904 Reference Code - SA - System Agent = 8.7.22.30
517 07:05:12.289919 Reference Code - MRC = 0.0.4.68
518 07:05:12.293418 SA - PCIe Version = 8.7.22.30
519 07:05:12.296770 SA-CRID Status = Disabled
520 07:05:12.300161 SA-CRID Original Value = 0.0.0.0
521 07:05:12.303422 SA-CRID New Value = 0.0.0.0
522 07:05:12.306542 OPROM - VBIOS = ff.ff.ff.ffff
523 07:05:12.310046 IO Manageability Engine FW Version = ff.ff.ff.ffff
524 07:05:12.313480 PHY Build Version = ff.ff.ff.ffff
525 07:05:12.320221 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
526 07:05:12.323091 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
527 07:05:12.326531 ITSS IRQ Polarities Before:
528 07:05:12.329791 IPC0: 0xffffffff
529 07:05:12.330032 IPC1: 0xffffffff
530 07:05:12.332988 IPC2: 0xffffffff
531 07:05:12.333218 IPC3: 0xffffffff
532 07:05:12.336274 ITSS IRQ Polarities After:
533 07:05:12.339877 IPC0: 0xffffffff
534 07:05:12.340106 IPC1: 0xffffffff
535 07:05:12.343038 IPC2: 0xffffffff
536 07:05:12.343267 IPC3: 0xffffffff
537 07:05:12.356089 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
538 07:05:12.362926 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
539 07:05:12.366021 Enumerating buses...
540 07:05:12.369276 Show all devs... Before device enumeration.
541 07:05:12.372699 Root Device: enabled 1
542 07:05:12.372932 CPU_CLUSTER: 0: enabled 1
543 07:05:12.376067 DOMAIN: 0000: enabled 1
544 07:05:12.379377 PCI: 00:00.0: enabled 1
545 07:05:12.382634 PCI: 00:02.0: enabled 1
546 07:05:12.382862 PCI: 00:04.0: enabled 1
547 07:05:12.386034 PCI: 00:05.0: enabled 1
548 07:05:12.389142 PCI: 00:09.0: enabled 0
549 07:05:12.389368 PCI: 00:12.6: enabled 0
550 07:05:12.392552 PCI: 00:14.0: enabled 1
551 07:05:12.396311 PCI: 00:14.1: enabled 0
552 07:05:12.399411 PCI: 00:14.2: enabled 0
553 07:05:12.399760 PCI: 00:14.3: enabled 1
554 07:05:12.402619 PCI: 00:14.5: enabled 1
555 07:05:12.405840 PCI: 00:15.0: enabled 1
556 07:05:12.409151 PCI: 00:15.1: enabled 1
557 07:05:12.409514 PCI: 00:15.2: enabled 1
558 07:05:12.412348 PCI: 00:15.3: enabled 1
559 07:05:12.415824 PCI: 00:16.0: enabled 1
560 07:05:12.419127 PCI: 00:16.1: enabled 0
561 07:05:12.419472 PCI: 00:16.4: enabled 0
562 07:05:12.422355 PCI: 00:16.5: enabled 0
563 07:05:12.425643 PCI: 00:17.0: enabled 0
564 07:05:12.429456 PCI: 00:19.0: enabled 1
565 07:05:12.429799 PCI: 00:19.1: enabled 0
566 07:05:12.432351 PCI: 00:19.2: enabled 1
567 07:05:12.435554 PCI: 00:1a.0: enabled 1
568 07:05:12.435913 PCI: 00:1c.0: enabled 0
569 07:05:12.439070 PCI: 00:1c.1: enabled 0
570 07:05:12.442382 PCI: 00:1c.2: enabled 0
571 07:05:12.445473 PCI: 00:1c.3: enabled 0
572 07:05:12.445855 PCI: 00:1c.4: enabled 0
573 07:05:12.448662 PCI: 00:1c.5: enabled 0
574 07:05:12.452204 PCI: 00:1c.6: enabled 0
575 07:05:12.455344 PCI: 00:1c.7: enabled 1
576 07:05:12.455692 PCI: 00:1e.0: enabled 0
577 07:05:12.458601 PCI: 00:1e.1: enabled 0
578 07:05:12.461939 PCI: 00:1e.2: enabled 1
579 07:05:12.465393 PCI: 00:1e.3: enabled 0
580 07:05:12.465858 PCI: 00:1f.0: enabled 1
581 07:05:12.468545 PCI: 00:1f.1: enabled 1
582 07:05:12.471863 PCI: 00:1f.2: enabled 1
583 07:05:12.472225 PCI: 00:1f.3: enabled 1
584 07:05:12.475100 PCI: 00:1f.4: enabled 0
585 07:05:12.478404 PCI: 00:1f.5: enabled 1
586 07:05:12.481769 PCI: 00:1f.7: enabled 0
587 07:05:12.482110 GENERIC: 0.0: enabled 1
588 07:05:12.485142 GENERIC: 0.0: enabled 1
589 07:05:12.488417 USB0 port 0: enabled 1
590 07:05:12.491640 GENERIC: 0.0: enabled 1
591 07:05:12.491893 I2C: 00:2c: enabled 1
592 07:05:12.495136 I2C: 00:15: enabled 1
593 07:05:12.498192 GENERIC: 0.0: enabled 0
594 07:05:12.498394 I2C: 00:15: enabled 1
595 07:05:12.501855 I2C: 00:10: enabled 0
596 07:05:12.504849 I2C: 00:10: enabled 0
597 07:05:12.505052 I2C: 00:2c: enabled 1
598 07:05:12.508025 I2C: 00:40: enabled 1
599 07:05:12.511357 I2C: 00:10: enabled 1
600 07:05:12.511592 I2C: 00:39: enabled 1
601 07:05:12.514799 I2C: 00:36: enabled 1
602 07:05:12.518218 I2C: 00:10: enabled 0
603 07:05:12.518428 I2C: 00:0c: enabled 1
604 07:05:12.521533 I2C: 00:50: enabled 1
605 07:05:12.524812 I2C: 00:1a: enabled 1
606 07:05:12.525015 I2C: 00:1a: enabled 0
607 07:05:12.528300 I2C: 00:1a: enabled 0
608 07:05:12.531346 I2C: 00:28: enabled 1
609 07:05:12.534519 I2C: 00:29: enabled 1
610 07:05:12.534762 PCI: 00:00.0: enabled 1
611 07:05:12.538055 SPI: 00: enabled 1
612 07:05:12.541418 PNP: 0c09.0: enabled 1
613 07:05:12.541630 GENERIC: 0.0: enabled 0
614 07:05:12.544552 USB2 port 0: enabled 1
615 07:05:12.548111 USB2 port 1: enabled 1
616 07:05:12.548400 USB2 port 2: enabled 1
617 07:05:12.551193 USB2 port 3: enabled 1
618 07:05:12.554643 USB2 port 4: enabled 0
619 07:05:12.557842 USB2 port 5: enabled 1
620 07:05:12.558043 USB2 port 6: enabled 0
621 07:05:12.561021 USB2 port 7: enabled 1
622 07:05:12.564573 USB3 port 0: enabled 1
623 07:05:12.564799 USB3 port 1: enabled 1
624 07:05:12.567983 USB3 port 2: enabled 1
625 07:05:12.570957 USB3 port 3: enabled 1
626 07:05:12.571160 APIC: 00: enabled 1
627 07:05:12.574192 APIC: 02: enabled 1
628 07:05:12.577981 Compare with tree...
629 07:05:12.578282 Root Device: enabled 1
630 07:05:12.581132 CPU_CLUSTER: 0: enabled 1
631 07:05:12.584235 APIC: 00: enabled 1
632 07:05:12.587550 APIC: 02: enabled 1
633 07:05:12.587763 DOMAIN: 0000: enabled 1
634 07:05:12.591394 PCI: 00:00.0: enabled 1
635 07:05:12.594094 PCI: 00:02.0: enabled 1
636 07:05:12.597377 PCI: 00:04.0: enabled 1
637 07:05:12.597585 GENERIC: 0.0: enabled 1
638 07:05:12.600960 PCI: 00:05.0: enabled 1
639 07:05:12.604164 GENERIC: 0.0: enabled 1
640 07:05:12.607482 PCI: 00:09.0: enabled 0
641 07:05:12.610623 PCI: 00:12.6: enabled 0
642 07:05:12.610827 PCI: 00:14.0: enabled 1
643 07:05:12.614068 USB0 port 0: enabled 1
644 07:05:12.617506 USB2 port 0: enabled 1
645 07:05:12.620908 USB2 port 1: enabled 1
646 07:05:12.623878 USB2 port 2: enabled 1
647 07:05:12.627350 USB2 port 3: enabled 1
648 07:05:12.627554 USB2 port 4: enabled 0
649 07:05:12.630616 USB2 port 5: enabled 1
650 07:05:12.634028 USB2 port 6: enabled 0
651 07:05:12.637201 USB2 port 7: enabled 1
652 07:05:12.640457 USB3 port 0: enabled 1
653 07:05:12.643760 USB3 port 1: enabled 1
654 07:05:12.643962 USB3 port 2: enabled 1
655 07:05:12.646922 USB3 port 3: enabled 1
656 07:05:12.650282 PCI: 00:14.1: enabled 0
657 07:05:12.653847 PCI: 00:14.2: enabled 0
658 07:05:12.657081 PCI: 00:14.3: enabled 1
659 07:05:12.657294 GENERIC: 0.0: enabled 1
660 07:05:12.660742 PCI: 00:14.5: enabled 1
661 07:05:12.663883 PCI: 00:15.0: enabled 1
662 07:05:12.667041 I2C: 00:2c: enabled 1
663 07:05:12.667246 I2C: 00:15: enabled 1
664 07:05:12.670199 PCI: 00:15.1: enabled 1
665 07:05:12.673761 PCI: 00:15.2: enabled 1
666 07:05:12.676954 GENERIC: 0.0: enabled 0
667 07:05:12.680019 I2C: 00:15: enabled 1
668 07:05:12.680222 I2C: 00:10: enabled 0
669 07:05:12.683582 I2C: 00:10: enabled 0
670 07:05:12.686771 I2C: 00:2c: enabled 1
671 07:05:12.690228 I2C: 00:40: enabled 1
672 07:05:12.690430 I2C: 00:10: enabled 1
673 07:05:12.693530 I2C: 00:39: enabled 1
674 07:05:12.696755 PCI: 00:15.3: enabled 1
675 07:05:12.700034 I2C: 00:36: enabled 1
676 07:05:12.703367 I2C: 00:10: enabled 0
677 07:05:12.703577 I2C: 00:0c: enabled 1
678 07:05:12.706522 I2C: 00:50: enabled 1
679 07:05:12.710150 PCI: 00:16.0: enabled 1
680 07:05:12.713244 PCI: 00:16.1: enabled 0
681 07:05:12.713446 PCI: 00:16.4: enabled 0
682 07:05:12.716400 PCI: 00:16.5: enabled 0
683 07:05:12.719817 PCI: 00:17.0: enabled 0
684 07:05:12.722977 PCI: 00:19.0: enabled 1
685 07:05:12.726633 I2C: 00:1a: enabled 1
686 07:05:12.726872 I2C: 00:1a: enabled 0
687 07:05:12.729683 I2C: 00:1a: enabled 0
688 07:05:12.733332 I2C: 00:28: enabled 1
689 07:05:12.736483 I2C: 00:29: enabled 1
690 07:05:12.736755 PCI: 00:19.1: enabled 0
691 07:05:12.739629 PCI: 00:19.2: enabled 1
692 07:05:12.743186 PCI: 00:1a.0: enabled 1
693 07:05:12.746310 PCI: 00:1e.0: enabled 0
694 07:05:12.749770 PCI: 00:1e.1: enabled 0
695 07:05:12.750081 PCI: 00:1e.2: enabled 1
696 07:05:12.753038 SPI: 00: enabled 1
697 07:05:12.756349 PCI: 00:1e.3: enabled 0
698 07:05:12.759581 PCI: 00:1f.0: enabled 1
699 07:05:12.763033 PNP: 0c09.0: enabled 1
700 07:05:12.763273 PCI: 00:1f.1: enabled 1
701 07:05:12.766143 PCI: 00:1f.2: enabled 1
702 07:05:12.769359 PCI: 00:1f.3: enabled 1
703 07:05:12.772722 GENERIC: 0.0: enabled 0
704 07:05:12.776312 PCI: 00:1f.4: enabled 0
705 07:05:12.776651 PCI: 00:1f.5: enabled 1
706 07:05:12.779587 PCI: 00:1f.7: enabled 0
707 07:05:12.782843 Root Device scanning...
708 07:05:12.786277 scan_static_bus for Root Device
709 07:05:12.789330 CPU_CLUSTER: 0 enabled
710 07:05:12.789580 DOMAIN: 0000 enabled
711 07:05:12.792896 DOMAIN: 0000 scanning...
712 07:05:12.796339 PCI: pci_scan_bus for bus 00
713 07:05:12.799782 PCI: 00:00.0 [8086/0000] ops
714 07:05:12.802844 PCI: 00:00.0 [8086/4e22] enabled
715 07:05:12.806031 PCI: 00:02.0 [8086/0000] bus ops
716 07:05:12.809653 PCI: 00:02.0 [8086/4e55] enabled
717 07:05:12.812744 PCI: 00:04.0 [8086/0000] bus ops
718 07:05:12.816139 PCI: 00:04.0 [8086/4e03] enabled
719 07:05:12.819442 PCI: 00:05.0 [8086/0000] bus ops
720 07:05:12.822763 PCI: 00:05.0 [8086/4e19] enabled
721 07:05:12.825808 PCI: 00:08.0 [8086/4e11] enabled
722 07:05:12.829557 PCI: 00:14.0 [8086/0000] bus ops
723 07:05:12.832966 PCI: 00:14.0 [8086/4ded] enabled
724 07:05:12.835964 PCI: 00:14.2 [8086/4def] disabled
725 07:05:12.839741 PCI: 00:14.3 [8086/0000] bus ops
726 07:05:12.842661 PCI: 00:14.3 [8086/4df0] enabled
727 07:05:12.846108 PCI: 00:14.5 [8086/0000] ops
728 07:05:12.849564 PCI: 00:14.5 [8086/4df8] enabled
729 07:05:12.852957 PCI: 00:15.0 [8086/0000] bus ops
730 07:05:12.855732 PCI: 00:15.0 [8086/4de8] enabled
731 07:05:12.859450 PCI: 00:15.1 [8086/0000] bus ops
732 07:05:12.862503 PCI: 00:15.1 [8086/4de9] enabled
733 07:05:12.865761 PCI: 00:15.2 [8086/0000] bus ops
734 07:05:12.868919 PCI: 00:15.2 [8086/4dea] enabled
735 07:05:12.872253 PCI: 00:15.3 [8086/0000] bus ops
736 07:05:12.875936 PCI: 00:15.3 [8086/4deb] enabled
737 07:05:12.879343 PCI: 00:16.0 [8086/0000] ops
738 07:05:12.882026 PCI: 00:16.0 [8086/4de0] enabled
739 07:05:12.885765 PCI: 00:19.0 [8086/0000] bus ops
740 07:05:12.888700 PCI: 00:19.0 [8086/4dc5] enabled
741 07:05:12.892050 PCI: 00:19.2 [8086/0000] ops
742 07:05:12.895263 PCI: 00:19.2 [8086/4dc7] enabled
743 07:05:12.895710 PCI: 00:1a.0 [8086/0000] ops
744 07:05:12.898809 PCI: 00:1a.0 [8086/4dc4] enabled
745 07:05:12.902054 PCI: 00:1e.0 [8086/0000] ops
746 07:05:12.905436 PCI: 00:1e.0 [8086/4da8] disabled
747 07:05:12.908689 PCI: 00:1e.2 [8086/0000] bus ops
748 07:05:12.912098 PCI: 00:1e.2 [8086/4daa] enabled
749 07:05:12.915148 PCI: 00:1f.0 [8086/0000] bus ops
750 07:05:12.918268 PCI: 00:1f.0 [8086/4d87] enabled
751 07:05:12.924932 PCI: Static device PCI: 00:1f.1 not found, disabling it.
752 07:05:12.925164 RTC Init
753 07:05:12.928192 Set power on after power failure.
754 07:05:12.931317 Disabling Deep S3
755 07:05:12.934812 Disabling Deep S3
756 07:05:12.934990 Disabling Deep S4
757 07:05:12.938107 Disabling Deep S4
758 07:05:12.938252 Disabling Deep S5
759 07:05:12.941394 Disabling Deep S5
760 07:05:12.944588 PCI: 00:1f.2 [0000/0000] hidden
761 07:05:12.947881 PCI: 00:1f.3 [8086/0000] bus ops
762 07:05:12.951415 PCI: 00:1f.3 [8086/4dc8] enabled
763 07:05:12.954856 PCI: 00:1f.5 [8086/0000] bus ops
764 07:05:12.958219 PCI: 00:1f.5 [8086/4da4] enabled
765 07:05:12.961481 PCI: Leftover static devices:
766 07:05:12.961652 PCI: 00:12.6
767 07:05:12.964763 PCI: 00:09.0
768 07:05:12.964930 PCI: 00:14.1
769 07:05:12.965037 PCI: 00:16.1
770 07:05:12.967832 PCI: 00:16.4
771 07:05:12.968009 PCI: 00:16.5
772 07:05:12.971050 PCI: 00:17.0
773 07:05:12.971151 PCI: 00:19.1
774 07:05:12.971240 PCI: 00:1e.1
775 07:05:12.974448 PCI: 00:1e.3
776 07:05:12.974538 PCI: 00:1f.1
777 07:05:12.977843 PCI: 00:1f.4
778 07:05:12.977920 PCI: 00:1f.7
779 07:05:12.981160 PCI: Check your devicetree.cb.
780 07:05:12.984573 PCI: 00:02.0 scanning...
781 07:05:12.988187 scan_generic_bus for PCI: 00:02.0
782 07:05:12.991096 scan_generic_bus for PCI: 00:02.0 done
783 07:05:12.994340 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
784 07:05:12.997844 PCI: 00:04.0 scanning...
785 07:05:13.001278 scan_generic_bus for PCI: 00:04.0
786 07:05:13.004636 GENERIC: 0.0 enabled
787 07:05:13.010846 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
788 07:05:13.014083 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
789 07:05:13.017420 PCI: 00:05.0 scanning...
790 07:05:13.020902 scan_generic_bus for PCI: 00:05.0
791 07:05:13.024167 GENERIC: 0.0 enabled
792 07:05:13.030587 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
793 07:05:13.034049 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
794 07:05:13.037057 PCI: 00:14.0 scanning...
795 07:05:13.040783 scan_static_bus for PCI: 00:14.0
796 07:05:13.040974 USB0 port 0 enabled
797 07:05:13.044304 USB0 port 0 scanning...
798 07:05:13.047388 scan_static_bus for USB0 port 0
799 07:05:13.050832 USB2 port 0 enabled
800 07:05:13.051023 USB2 port 1 enabled
801 07:05:13.054050 USB2 port 2 enabled
802 07:05:13.057467 USB2 port 3 enabled
803 07:05:13.057655 USB2 port 4 disabled
804 07:05:13.060867 USB2 port 5 enabled
805 07:05:13.064026 USB2 port 6 disabled
806 07:05:13.064213 USB2 port 7 enabled
807 07:05:13.067304 USB3 port 0 enabled
808 07:05:13.067504 USB3 port 1 enabled
809 07:05:13.070546 USB3 port 2 enabled
810 07:05:13.074010 USB3 port 3 enabled
811 07:05:13.074216 USB2 port 0 scanning...
812 07:05:13.077236 scan_static_bus for USB2 port 0
813 07:05:13.083431 scan_static_bus for USB2 port 0 done
814 07:05:13.087097 scan_bus: bus USB2 port 0 finished in 6 msecs
815 07:05:13.090368 USB2 port 1 scanning...
816 07:05:13.093833 scan_static_bus for USB2 port 1
817 07:05:13.096990 scan_static_bus for USB2 port 1 done
818 07:05:13.100506 scan_bus: bus USB2 port 1 finished in 6 msecs
819 07:05:13.103649 USB2 port 2 scanning...
820 07:05:13.106667 scan_static_bus for USB2 port 2
821 07:05:13.110430 scan_static_bus for USB2 port 2 done
822 07:05:13.113596 scan_bus: bus USB2 port 2 finished in 6 msecs
823 07:05:13.116855 USB2 port 3 scanning...
824 07:05:13.120558 scan_static_bus for USB2 port 3
825 07:05:13.123431 scan_static_bus for USB2 port 3 done
826 07:05:13.130516 scan_bus: bus USB2 port 3 finished in 6 msecs
827 07:05:13.131143 USB2 port 5 scanning...
828 07:05:13.133640 scan_static_bus for USB2 port 5
829 07:05:13.140477 scan_static_bus for USB2 port 5 done
830 07:05:13.143589 scan_bus: bus USB2 port 5 finished in 6 msecs
831 07:05:13.146836 USB2 port 7 scanning...
832 07:05:13.150391 scan_static_bus for USB2 port 7
833 07:05:13.153431 scan_static_bus for USB2 port 7 done
834 07:05:13.156942 scan_bus: bus USB2 port 7 finished in 6 msecs
835 07:05:13.160142 USB3 port 0 scanning...
836 07:05:13.163504 scan_static_bus for USB3 port 0
837 07:05:13.166758 scan_static_bus for USB3 port 0 done
838 07:05:13.173429 scan_bus: bus USB3 port 0 finished in 6 msecs
839 07:05:13.173998 USB3 port 1 scanning...
840 07:05:13.176544 scan_static_bus for USB3 port 1
841 07:05:13.180241 scan_static_bus for USB3 port 1 done
842 07:05:13.186751 scan_bus: bus USB3 port 1 finished in 6 msecs
843 07:05:13.189698 USB3 port 2 scanning...
844 07:05:13.193079 scan_static_bus for USB3 port 2
845 07:05:13.196784 scan_static_bus for USB3 port 2 done
846 07:05:13.199702 scan_bus: bus USB3 port 2 finished in 6 msecs
847 07:05:13.203234 USB3 port 3 scanning...
848 07:05:13.206396 scan_static_bus for USB3 port 3
849 07:05:13.209449 scan_static_bus for USB3 port 3 done
850 07:05:13.213092 scan_bus: bus USB3 port 3 finished in 6 msecs
851 07:05:13.216278 scan_static_bus for USB0 port 0 done
852 07:05:13.222701 scan_bus: bus USB0 port 0 finished in 172 msecs
853 07:05:13.226155 scan_static_bus for PCI: 00:14.0 done
854 07:05:13.229724 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
855 07:05:13.233028 PCI: 00:14.3 scanning...
856 07:05:13.236213 scan_static_bus for PCI: 00:14.3
857 07:05:13.239299 GENERIC: 0.0 enabled
858 07:05:13.242852 scan_static_bus for PCI: 00:14.3 done
859 07:05:13.249279 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
860 07:05:13.249735 PCI: 00:15.0 scanning...
861 07:05:13.252564 scan_static_bus for PCI: 00:15.0
862 07:05:13.255763 I2C: 00:2c enabled
863 07:05:13.259199 I2C: 00:15 enabled
864 07:05:13.262543 scan_static_bus for PCI: 00:15.0 done
865 07:05:13.266110 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
866 07:05:13.269177 PCI: 00:15.1 scanning...
867 07:05:13.272264 scan_static_bus for PCI: 00:15.1
868 07:05:13.275824 scan_static_bus for PCI: 00:15.1 done
869 07:05:13.279145 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
870 07:05:13.282505 PCI: 00:15.2 scanning...
871 07:05:13.285969 scan_static_bus for PCI: 00:15.2
872 07:05:13.289149 GENERIC: 0.0 disabled
873 07:05:13.292550 I2C: 00:15 enabled
874 07:05:13.293095 I2C: 00:10 disabled
875 07:05:13.295348 I2C: 00:10 disabled
876 07:05:13.295799 I2C: 00:2c enabled
877 07:05:13.299108 I2C: 00:40 enabled
878 07:05:13.302452 I2C: 00:10 enabled
879 07:05:13.303035 I2C: 00:39 enabled
880 07:05:13.305770 scan_static_bus for PCI: 00:15.2 done
881 07:05:13.312243 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
882 07:05:13.315266 PCI: 00:15.3 scanning...
883 07:05:13.318743 scan_static_bus for PCI: 00:15.3
884 07:05:13.319292 I2C: 00:36 enabled
885 07:05:13.321933 I2C: 00:10 disabled
886 07:05:13.322378 I2C: 00:0c enabled
887 07:05:13.325664 I2C: 00:50 enabled
888 07:05:13.329315 scan_static_bus for PCI: 00:15.3 done
889 07:05:13.335454 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
890 07:05:13.336078 PCI: 00:19.0 scanning...
891 07:05:13.338454 scan_static_bus for PCI: 00:19.0
892 07:05:13.341855 I2C: 00:1a enabled
893 07:05:13.345606 I2C: 00:1a disabled
894 07:05:13.346155 I2C: 00:1a disabled
895 07:05:13.348699 I2C: 00:28 enabled
896 07:05:13.349139 I2C: 00:29 enabled
897 07:05:13.355006 scan_static_bus for PCI: 00:19.0 done
898 07:05:13.358701 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
899 07:05:13.362326 PCI: 00:1e.2 scanning...
900 07:05:13.365191 scan_generic_bus for PCI: 00:1e.2
901 07:05:13.365748 SPI: 00 enabled
902 07:05:13.371885 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
903 07:05:13.378629 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
904 07:05:13.379177 PCI: 00:1f.0 scanning...
905 07:05:13.381433 scan_static_bus for PCI: 00:1f.0
906 07:05:13.384872 PNP: 0c09.0 enabled
907 07:05:13.388252 PNP: 0c09.0 scanning...
908 07:05:13.391308 scan_static_bus for PNP: 0c09.0
909 07:05:13.394655 scan_static_bus for PNP: 0c09.0 done
910 07:05:13.398108 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
911 07:05:13.401821 scan_static_bus for PCI: 00:1f.0 done
912 07:05:13.408291 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
913 07:05:13.411259 PCI: 00:1f.3 scanning...
914 07:05:13.414642 scan_static_bus for PCI: 00:1f.3
915 07:05:13.415098 GENERIC: 0.0 disabled
916 07:05:13.421089 scan_static_bus for PCI: 00:1f.3 done
917 07:05:13.424530 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
918 07:05:13.427904 PCI: 00:1f.5 scanning...
919 07:05:13.431055 scan_generic_bus for PCI: 00:1f.5
920 07:05:13.434221 scan_generic_bus for PCI: 00:1f.5 done
921 07:05:13.437654 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
922 07:05:13.444514 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
923 07:05:13.447679 scan_static_bus for Root Device done
924 07:05:13.450875 scan_bus: bus Root Device finished in 665 msecs
925 07:05:13.454370 done
926 07:05:13.457443 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1084 ms
927 07:05:13.461383 Chrome EC: UHEPI supported
928 07:05:13.467673 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
929 07:05:13.474330 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
930 07:05:13.477419 SPI flash protection: WPSW=0 SRP0=1
931 07:05:13.484109 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
932 07:05:13.487699 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
933 07:05:13.491053 found VGA at PCI: 00:02.0
934 07:05:13.494349 Setting up VGA for PCI: 00:02.0
935 07:05:13.500787 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
936 07:05:13.504233 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
937 07:05:13.507347 Allocating resources...
938 07:05:13.510442 Reading resources...
939 07:05:13.514156 Root Device read_resources bus 0 link: 0
940 07:05:13.516961 CPU_CLUSTER: 0 read_resources bus 0 link: 0
941 07:05:13.523632 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
942 07:05:13.527164 DOMAIN: 0000 read_resources bus 0 link: 0
943 07:05:13.533839 PCI: 00:04.0 read_resources bus 1 link: 0
944 07:05:13.537127 PCI: 00:04.0 read_resources bus 1 link: 0 done
945 07:05:13.540647 PCI: 00:05.0 read_resources bus 2 link: 0
946 07:05:13.547206 PCI: 00:05.0 read_resources bus 2 link: 0 done
947 07:05:13.550851 PCI: 00:14.0 read_resources bus 0 link: 0
948 07:05:13.556926 USB0 port 0 read_resources bus 0 link: 0
949 07:05:13.563819 USB0 port 0 read_resources bus 0 link: 0 done
950 07:05:13.566806 PCI: 00:14.0 read_resources bus 0 link: 0 done
951 07:05:13.570454 PCI: 00:14.3 read_resources bus 0 link: 0
952 07:05:13.623468 PCI: 00:14.3 read_resources bus 0 link: 0 done
953 07:05:13.624175 PCI: 00:15.0 read_resources bus 0 link: 0
954 07:05:13.624640 PCI: 00:15.0 read_resources bus 0 link: 0 done
955 07:05:13.625379 PCI: 00:15.2 read_resources bus 0 link: 0
956 07:05:13.625743 PCI: 00:15.2 read_resources bus 0 link: 0 done
957 07:05:13.626075 PCI: 00:15.3 read_resources bus 0 link: 0
958 07:05:13.626483 PCI: 00:15.3 read_resources bus 0 link: 0 done
959 07:05:13.626855 PCI: 00:19.0 read_resources bus 0 link: 0
960 07:05:13.627171 PCI: 00:19.0 read_resources bus 0 link: 0 done
961 07:05:13.627480 PCI: 00:1e.2 read_resources bus 3 link: 0
962 07:05:13.628182 PCI: 00:1e.2 read_resources bus 3 link: 0 done
963 07:05:13.631182 PCI: 00:1f.0 read_resources bus 0 link: 0
964 07:05:13.634935 PCI: 00:1f.0 read_resources bus 0 link: 0 done
965 07:05:13.641874 PCI: 00:1f.3 read_resources bus 0 link: 0
966 07:05:13.645568 PCI: 00:1f.3 read_resources bus 0 link: 0 done
967 07:05:13.651764 DOMAIN: 0000 read_resources bus 0 link: 0 done
968 07:05:13.654903 Root Device read_resources bus 0 link: 0 done
969 07:05:13.658287 Done reading resources.
970 07:05:13.664623 Show resources in subtree (Root Device)...After reading.
971 07:05:13.668293 Root Device child on link 0 CPU_CLUSTER: 0
972 07:05:13.671323 CPU_CLUSTER: 0 child on link 0 APIC: 00
973 07:05:13.674820 APIC: 00
974 07:05:13.675376 APIC: 02
975 07:05:13.678271 DOMAIN: 0000 child on link 0 PCI: 00:00.0
976 07:05:13.687964 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
977 07:05:13.697836 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
978 07:05:13.701525 PCI: 00:00.0
979 07:05:13.711213 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
980 07:05:13.717850 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
981 07:05:13.727179 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
982 07:05:13.737803 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
983 07:05:13.747375 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
984 07:05:13.757424 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
985 07:05:13.763963 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
986 07:05:13.773555 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
987 07:05:13.783809 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
988 07:05:13.793891 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
989 07:05:13.803465 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
990 07:05:13.813861 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
991 07:05:13.820290 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
992 07:05:13.830106 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
993 07:05:13.839613 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
994 07:05:13.849689 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
995 07:05:13.859497 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
996 07:05:13.869770 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
997 07:05:13.875992 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
998 07:05:13.879470 PCI: 00:02.0
999 07:05:13.889352 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1000 07:05:13.899543 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1001 07:05:13.909459 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1002 07:05:13.912750 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1003 07:05:13.922678 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1004 07:05:13.925778 GENERIC: 0.0
1005 07:05:13.929466 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1006 07:05:13.938940 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1007 07:05:13.942241 GENERIC: 0.0
1008 07:05:13.942829 PCI: 00:08.0
1009 07:05:13.952354 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 07:05:13.955488 PCI: 00:14.0 child on link 0 USB0 port 0
1011 07:05:13.965804 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1012 07:05:13.971901 USB0 port 0 child on link 0 USB2 port 0
1013 07:05:13.972448 USB2 port 0
1014 07:05:13.975161 USB2 port 1
1015 07:05:13.975751 USB2 port 2
1016 07:05:13.978426 USB2 port 3
1017 07:05:13.978924 USB2 port 4
1018 07:05:13.981545 USB2 port 5
1019 07:05:13.981997 USB2 port 6
1020 07:05:13.985183 USB2 port 7
1021 07:05:13.985727 USB3 port 0
1022 07:05:13.988364 USB3 port 1
1023 07:05:13.992025 USB3 port 2
1024 07:05:13.992572 USB3 port 3
1025 07:05:13.995467 PCI: 00:14.2
1026 07:05:13.998802 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1027 07:05:14.008489 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1028 07:05:14.009037 GENERIC: 0.0
1029 07:05:14.011969 PCI: 00:14.5
1030 07:05:14.021794 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1031 07:05:14.024829 PCI: 00:15.0 child on link 0 I2C: 00:2c
1032 07:05:14.035097 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1033 07:05:14.038355 I2C: 00:2c
1034 07:05:14.038930 I2C: 00:15
1035 07:05:14.041678 PCI: 00:15.1
1036 07:05:14.051443 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1037 07:05:14.054935 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1038 07:05:14.064962 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1039 07:05:14.068036 GENERIC: 0.0
1040 07:05:14.068585 I2C: 00:15
1041 07:05:14.068948 I2C: 00:10
1042 07:05:14.071471 I2C: 00:10
1043 07:05:14.072019 I2C: 00:2c
1044 07:05:14.074722 I2C: 00:40
1045 07:05:14.075261 I2C: 00:10
1046 07:05:14.078074 I2C: 00:39
1047 07:05:14.081243 PCI: 00:15.3 child on link 0 I2C: 00:36
1048 07:05:14.091241 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1049 07:05:14.094549 I2C: 00:36
1050 07:05:14.095122 I2C: 00:10
1051 07:05:14.097814 I2C: 00:0c
1052 07:05:14.098358 I2C: 00:50
1053 07:05:14.101216 PCI: 00:16.0
1054 07:05:14.111143 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1055 07:05:14.114415 PCI: 00:19.0 child on link 0 I2C: 00:1a
1056 07:05:14.124241 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1057 07:05:14.124816 I2C: 00:1a
1058 07:05:14.127319 I2C: 00:1a
1059 07:05:14.127773 I2C: 00:1a
1060 07:05:14.130778 I2C: 00:28
1061 07:05:14.131242 I2C: 00:29
1062 07:05:14.134333 PCI: 00:19.2
1063 07:05:14.143866 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1064 07:05:14.153804 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1065 07:05:14.157168 PCI: 00:1a.0
1066 07:05:14.167345 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1067 07:05:14.167908 PCI: 00:1e.0
1068 07:05:14.170791 PCI: 00:1e.2 child on link 0 SPI: 00
1069 07:05:14.180864 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1070 07:05:14.183742 SPI: 00
1071 07:05:14.187284 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1072 07:05:14.197164 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1073 07:05:14.197716 PNP: 0c09.0
1074 07:05:14.207237 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1075 07:05:14.207792 PCI: 00:1f.2
1076 07:05:14.216863 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1077 07:05:14.226635 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1078 07:05:14.230051 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1079 07:05:14.240052 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1080 07:05:14.249911 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1081 07:05:14.252981 GENERIC: 0.0
1082 07:05:14.253522 PCI: 00:1f.5
1083 07:05:14.263073 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1084 07:05:14.269730 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1085 07:05:14.279407 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1086 07:05:14.282931 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1087 07:05:14.292563 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1088 07:05:14.299399 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1089 07:05:14.306209 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1090 07:05:14.309612 DOMAIN: 0000: Resource ranges:
1091 07:05:14.312401 * Base: 1000, Size: 800, Tag: 100
1092 07:05:14.315783 * Base: 1900, Size: e700, Tag: 100
1093 07:05:14.322236 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1094 07:05:14.328802 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1095 07:05:14.335806 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1096 07:05:14.342387 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1097 07:05:14.352011 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1098 07:05:14.358631 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1099 07:05:14.365337 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1100 07:05:14.375146 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1101 07:05:14.381910 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1102 07:05:14.388610 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1103 07:05:14.398756 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1104 07:05:14.405165 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1105 07:05:14.411924 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1106 07:05:14.421766 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1107 07:05:14.427840 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1108 07:05:14.434910 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1109 07:05:14.444473 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1110 07:05:14.451092 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1111 07:05:14.458031 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1112 07:05:14.467996 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1113 07:05:14.474552 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1114 07:05:14.481332 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1115 07:05:14.490969 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1116 07:05:14.497862 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1117 07:05:14.500980 DOMAIN: 0000: Resource ranges:
1118 07:05:14.504046 * Base: 7fc00000, Size: 40400000, Tag: 200
1119 07:05:14.507413 * Base: d0000000, Size: 2b000000, Tag: 200
1120 07:05:14.514432 * Base: fb001000, Size: 2fff000, Tag: 200
1121 07:05:14.517615 * Base: fe010000, Size: 22000, Tag: 200
1122 07:05:14.521212 * Base: fe033000, Size: a4d000, Tag: 200
1123 07:05:14.527263 * Base: fea88000, Size: 2f8000, Tag: 200
1124 07:05:14.530476 * Base: fed88000, Size: 8000, Tag: 200
1125 07:05:14.533571 * Base: fed93000, Size: d000, Tag: 200
1126 07:05:14.537338 * Base: feda2000, Size: 125e000, Tag: 200
1127 07:05:14.543648 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1128 07:05:14.550618 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1129 07:05:14.557228 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1130 07:05:14.563443 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1131 07:05:14.570059 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1132 07:05:14.576844 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1133 07:05:14.583577 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1134 07:05:14.590062 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1135 07:05:14.596540 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1136 07:05:14.603151 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1137 07:05:14.610247 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1138 07:05:14.616183 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1139 07:05:14.623263 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1140 07:05:14.629675 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1141 07:05:14.636359 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1142 07:05:14.642931 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1143 07:05:14.649689 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1144 07:05:14.656096 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1145 07:05:14.663308 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1146 07:05:14.669266 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1147 07:05:14.676094 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1148 07:05:14.682361 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1149 07:05:14.689423 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1150 07:05:14.695719 Root Device assign_resources, bus 0 link: 0
1151 07:05:14.698856 DOMAIN: 0000 assign_resources, bus 0 link: 0
1152 07:05:14.705666 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1153 07:05:14.715478 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1154 07:05:14.722094 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1155 07:05:14.732279 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1156 07:05:14.735024 PCI: 00:04.0 assign_resources, bus 1 link: 0
1157 07:05:14.741869 PCI: 00:04.0 assign_resources, bus 1 link: 0
1158 07:05:14.748255 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1159 07:05:14.751686 PCI: 00:05.0 assign_resources, bus 2 link: 0
1160 07:05:14.758235 PCI: 00:05.0 assign_resources, bus 2 link: 0
1161 07:05:14.765081 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1162 07:05:14.774779 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1163 07:05:14.777937 PCI: 00:14.0 assign_resources, bus 0 link: 0
1164 07:05:14.785056 PCI: 00:14.0 assign_resources, bus 0 link: 0
1165 07:05:14.791128 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1166 07:05:14.794470 PCI: 00:14.3 assign_resources, bus 0 link: 0
1167 07:05:14.801597 PCI: 00:14.3 assign_resources, bus 0 link: 0
1168 07:05:14.807858 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1169 07:05:14.817550 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1170 07:05:14.820861 PCI: 00:15.0 assign_resources, bus 0 link: 0
1171 07:05:14.827161 PCI: 00:15.0 assign_resources, bus 0 link: 0
1172 07:05:14.834457 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1173 07:05:14.840501 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1174 07:05:14.847068 PCI: 00:15.2 assign_resources, bus 0 link: 0
1175 07:05:14.850376 PCI: 00:15.2 assign_resources, bus 0 link: 0
1176 07:05:14.860234 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1177 07:05:14.864143 PCI: 00:15.3 assign_resources, bus 0 link: 0
1178 07:05:14.870706 PCI: 00:15.3 assign_resources, bus 0 link: 0
1179 07:05:14.877014 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1180 07:05:14.883369 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1181 07:05:14.889933 PCI: 00:19.0 assign_resources, bus 0 link: 0
1182 07:05:14.893020 PCI: 00:19.0 assign_resources, bus 0 link: 0
1183 07:05:14.903120 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1184 07:05:14.909779 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1185 07:05:14.919794 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1186 07:05:14.923348 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1187 07:05:14.925931 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1188 07:05:14.933249 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1189 07:05:14.936609 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1190 07:05:14.943037 LPC: Trying to open IO window from 800 size 1ff
1191 07:05:14.949274 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1192 07:05:14.959195 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1193 07:05:14.962218 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1194 07:05:14.965810 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1195 07:05:14.975784 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1196 07:05:14.978998 DOMAIN: 0000 assign_resources, bus 0 link: 0
1197 07:05:14.985291 Root Device assign_resources, bus 0 link: 0
1198 07:05:14.985740 Done setting resources.
1199 07:05:14.992477 Show resources in subtree (Root Device)...After assigning values.
1200 07:05:14.998815 Root Device child on link 0 CPU_CLUSTER: 0
1201 07:05:15.002752 CPU_CLUSTER: 0 child on link 0 APIC: 00
1202 07:05:15.003316 APIC: 00
1203 07:05:15.005663 APIC: 02
1204 07:05:15.008767 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1205 07:05:15.018434 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1206 07:05:15.028423 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1207 07:05:15.028990 PCI: 00:00.0
1208 07:05:15.038398 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1209 07:05:15.048142 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1210 07:05:15.058452 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1211 07:05:15.068008 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1212 07:05:15.078338 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1213 07:05:15.084689 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1214 07:05:15.094675 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1215 07:05:15.104325 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1216 07:05:15.114288 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1217 07:05:15.124410 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1218 07:05:15.130693 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1219 07:05:15.140548 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1220 07:05:15.150787 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1221 07:05:15.160690 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1222 07:05:15.170529 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1223 07:05:15.180237 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1224 07:05:15.190380 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1225 07:05:15.196996 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1226 07:05:15.206828 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1227 07:05:15.209908 PCI: 00:02.0
1228 07:05:15.220383 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1229 07:05:15.229621 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1230 07:05:15.239983 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1231 07:05:15.243086 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1232 07:05:15.252878 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1233 07:05:15.256606 GENERIC: 0.0
1234 07:05:15.259743 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1235 07:05:15.269671 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1236 07:05:15.272781 GENERIC: 0.0
1237 07:05:15.273246 PCI: 00:08.0
1238 07:05:15.286420 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1239 07:05:15.289406 PCI: 00:14.0 child on link 0 USB0 port 0
1240 07:05:15.299391 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1241 07:05:15.302645 USB0 port 0 child on link 0 USB2 port 0
1242 07:05:15.305904 USB2 port 0
1243 07:05:15.306362 USB2 port 1
1244 07:05:15.309541 USB2 port 2
1245 07:05:15.310113 USB2 port 3
1246 07:05:15.312788 USB2 port 4
1247 07:05:15.315801 USB2 port 5
1248 07:05:15.316258 USB2 port 6
1249 07:05:15.319249 USB2 port 7
1250 07:05:15.319815 USB3 port 0
1251 07:05:15.322381 USB3 port 1
1252 07:05:15.322886 USB3 port 2
1253 07:05:15.325683 USB3 port 3
1254 07:05:15.326258 PCI: 00:14.2
1255 07:05:15.332607 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1256 07:05:15.342449 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1257 07:05:15.343072 GENERIC: 0.0
1258 07:05:15.346078 PCI: 00:14.5
1259 07:05:15.355602 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1260 07:05:15.358749 PCI: 00:15.0 child on link 0 I2C: 00:2c
1261 07:05:15.369122 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1262 07:05:15.372385 I2C: 00:2c
1263 07:05:15.372928 I2C: 00:15
1264 07:05:15.375219 PCI: 00:15.1
1265 07:05:15.385679 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1266 07:05:15.388481 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1267 07:05:15.398803 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1268 07:05:15.401796 GENERIC: 0.0
1269 07:05:15.402339 I2C: 00:15
1270 07:05:15.404909 I2C: 00:10
1271 07:05:15.405359 I2C: 00:10
1272 07:05:15.408848 I2C: 00:2c
1273 07:05:15.409392 I2C: 00:40
1274 07:05:15.411863 I2C: 00:10
1275 07:05:15.412406 I2C: 00:39
1276 07:05:15.415050 PCI: 00:15.3 child on link 0 I2C: 00:36
1277 07:05:15.425243 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1278 07:05:15.428122 I2C: 00:36
1279 07:05:15.428575 I2C: 00:10
1280 07:05:15.431584 I2C: 00:0c
1281 07:05:15.432038 I2C: 00:50
1282 07:05:15.435084 PCI: 00:16.0
1283 07:05:15.444925 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1284 07:05:15.448080 PCI: 00:19.0 child on link 0 I2C: 00:1a
1285 07:05:15.457927 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1286 07:05:15.461591 I2C: 00:1a
1287 07:05:15.462135 I2C: 00:1a
1288 07:05:15.464686 I2C: 00:1a
1289 07:05:15.465231 I2C: 00:28
1290 07:05:15.468095 I2C: 00:29
1291 07:05:15.468636 PCI: 00:19.2
1292 07:05:15.480941 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1293 07:05:15.491111 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1294 07:05:15.491659 PCI: 00:1a.0
1295 07:05:15.500957 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1296 07:05:15.504379 PCI: 00:1e.0
1297 07:05:15.507974 PCI: 00:1e.2 child on link 0 SPI: 00
1298 07:05:15.517664 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1299 07:05:15.521101 SPI: 00
1300 07:05:15.524195 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1301 07:05:15.530638 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1302 07:05:15.534527 PNP: 0c09.0
1303 07:05:15.544237 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1304 07:05:15.544797 PCI: 00:1f.2
1305 07:05:15.553707 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1306 07:05:15.563924 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1307 07:05:15.567195 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1308 07:05:15.577153 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1309 07:05:15.586925 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1310 07:05:15.590357 GENERIC: 0.0
1311 07:05:15.590967 PCI: 00:1f.5
1312 07:05:15.603372 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1313 07:05:15.603930 Done allocating resources.
1314 07:05:15.610031 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2096 ms
1315 07:05:15.613869 Enabling resources...
1316 07:05:15.616274 PCI: 00:00.0 subsystem <- 8086/4e22
1317 07:05:15.619745 PCI: 00:00.0 cmd <- 06
1318 07:05:15.623139 PCI: 00:02.0 subsystem <- 8086/4e55
1319 07:05:15.626550 PCI: 00:02.0 cmd <- 03
1320 07:05:15.629978 PCI: 00:04.0 subsystem <- 8086/4e03
1321 07:05:15.633434 PCI: 00:04.0 cmd <- 02
1322 07:05:15.636290 PCI: 00:05.0 bridge ctrl <- 0003
1323 07:05:15.639938 PCI: 00:05.0 subsystem <- 8086/4e19
1324 07:05:15.642937 PCI: 00:05.0 cmd <- 02
1325 07:05:15.643404 PCI: 00:08.0 cmd <- 06
1326 07:05:15.646125 PCI: 00:14.0 subsystem <- 8086/4ded
1327 07:05:15.649806 PCI: 00:14.0 cmd <- 02
1328 07:05:15.653135 PCI: 00:14.3 subsystem <- 8086/4df0
1329 07:05:15.656131 PCI: 00:14.3 cmd <- 02
1330 07:05:15.659286 PCI: 00:14.5 subsystem <- 8086/4df8
1331 07:05:15.663063 PCI: 00:14.5 cmd <- 06
1332 07:05:15.666323 PCI: 00:15.0 subsystem <- 8086/4de8
1333 07:05:15.669677 PCI: 00:15.0 cmd <- 02
1334 07:05:15.673059 PCI: 00:15.1 subsystem <- 8086/4de9
1335 07:05:15.675966 PCI: 00:15.1 cmd <- 02
1336 07:05:15.679490 PCI: 00:15.2 subsystem <- 8086/4dea
1337 07:05:15.680035 PCI: 00:15.2 cmd <- 02
1338 07:05:15.685996 PCI: 00:15.3 subsystem <- 8086/4deb
1339 07:05:15.686544 PCI: 00:15.3 cmd <- 02
1340 07:05:15.689248 PCI: 00:16.0 subsystem <- 8086/4de0
1341 07:05:15.692738 PCI: 00:16.0 cmd <- 02
1342 07:05:15.695743 PCI: 00:19.0 subsystem <- 8086/4dc5
1343 07:05:15.698991 PCI: 00:19.0 cmd <- 02
1344 07:05:15.702073 PCI: 00:19.2 subsystem <- 8086/4dc7
1345 07:05:15.705591 PCI: 00:19.2 cmd <- 06
1346 07:05:15.709242 PCI: 00:1a.0 subsystem <- 8086/4dc4
1347 07:05:15.712378 PCI: 00:1a.0 cmd <- 06
1348 07:05:15.715691 PCI: 00:1e.2 subsystem <- 8086/4daa
1349 07:05:15.716143 PCI: 00:1e.2 cmd <- 06
1350 07:05:15.722805 PCI: 00:1f.0 subsystem <- 8086/4d87
1351 07:05:15.723385 PCI: 00:1f.0 cmd <- 407
1352 07:05:15.725825 PCI: 00:1f.3 subsystem <- 8086/4dc8
1353 07:05:15.729178 PCI: 00:1f.3 cmd <- 02
1354 07:05:15.732424 PCI: 00:1f.5 subsystem <- 8086/4da4
1355 07:05:15.735625 PCI: 00:1f.5 cmd <- 406
1356 07:05:15.740321 done.
1357 07:05:15.743392 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1358 07:05:15.746474 Initializing devices...
1359 07:05:15.749783 Root Device init
1360 07:05:15.750236 mainboard: EC init
1361 07:05:15.756859 Chrome EC: Set SMI mask to 0x0000000000000000
1362 07:05:15.759889 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1363 07:05:15.763296 ELOG: NV offset 0xbfa000 size 0x1000
1364 07:05:15.771446 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1365 07:05:15.778613 ELOG: Event(17) added with size 13 at 2023-03-22 07:05:14 UTC
1366 07:05:15.785047 ELOG: Event(91) added with size 10 at 2023-03-22 07:05:14 UTC
1367 07:05:15.791376 Chrome EC: clear events_b mask to 0x0000000000800000
1368 07:05:15.798041 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1369 07:05:15.801410 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1370 07:05:15.807856 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1371 07:05:15.814717 Chrome EC: Set WAKE mask to 0x0000000000000000
1372 07:05:15.817721 Root Device init finished in 64 msecs
1373 07:05:15.820938 PCI: 00:00.0 init
1374 07:05:15.824636 CPU TDP = 6 Watts
1375 07:05:15.825177 CPU PL1 = 7 Watts
1376 07:05:15.827533 CPU PL2 = 12 Watts
1377 07:05:15.830671 PCI: 00:00.0 init finished in 6 msecs
1378 07:05:15.834216 PCI: 00:02.0 init
1379 07:05:15.834694 GMA: Found VBT in CBFS
1380 07:05:15.837518 GMA: Found valid VBT in CBFS
1381 07:05:15.844132 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1382 07:05:15.850730 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1383 07:05:15.854015 PCI: 00:02.0 init finished in 18 msecs
1384 07:05:15.857900 PCI: 00:08.0 init
1385 07:05:15.861187 PCI: 00:08.0 init finished in 0 msecs
1386 07:05:15.864153 PCI: 00:14.0 init
1387 07:05:15.867853 XHCI: Updated LFPS sampling OFF time to 9 ms
1388 07:05:15.870914 PCI: 00:14.0 init finished in 4 msecs
1389 07:05:15.874800 PCI: 00:15.0 init
1390 07:05:15.878123 I2C bus 0 version 0x3230302a
1391 07:05:15.881383 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1392 07:05:15.885021 PCI: 00:15.0 init finished in 6 msecs
1393 07:05:15.888348 PCI: 00:15.1 init
1394 07:05:15.891301 I2C bus 1 version 0x3230302a
1395 07:05:15.894600 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1396 07:05:15.897877 PCI: 00:15.1 init finished in 6 msecs
1397 07:05:15.901179 PCI: 00:15.2 init
1398 07:05:15.904716 I2C bus 2 version 0x3230302a
1399 07:05:15.907498 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1400 07:05:15.911074 PCI: 00:15.2 init finished in 6 msecs
1401 07:05:15.911628 PCI: 00:15.3 init
1402 07:05:15.914128 I2C bus 3 version 0x3230302a
1403 07:05:15.917688 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1404 07:05:15.924109 PCI: 00:15.3 init finished in 6 msecs
1405 07:05:15.924664 PCI: 00:16.0 init
1406 07:05:15.927759 PCI: 00:16.0 init finished in 0 msecs
1407 07:05:15.930620 PCI: 00:19.0 init
1408 07:05:15.933804 I2C bus 4 version 0x3230302a
1409 07:05:15.937544 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1410 07:05:15.940968 PCI: 00:19.0 init finished in 6 msecs
1411 07:05:15.943764 PCI: 00:1a.0 init
1412 07:05:15.947348 PCI: 00:1a.0 init finished in 0 msecs
1413 07:05:15.950658 PCI: 00:1f.0 init
1414 07:05:15.953690 IOAPIC: Initializing IOAPIC at 0xfec00000
1415 07:05:15.957556 IOAPIC: Bootstrap Processor Local APIC = 0x00
1416 07:05:15.960501 IOAPIC: ID = 0x02
1417 07:05:15.963995 IOAPIC: Dumping registers
1418 07:05:15.967453 reg 0x0000: 0x02000000
1419 07:05:15.968002 reg 0x0001: 0x00770020
1420 07:05:15.970647 reg 0x0002: 0x00000000
1421 07:05:15.973478 PCI: 00:1f.0 init finished in 21 msecs
1422 07:05:15.976818 PCI: 00:1f.2 init
1423 07:05:15.980649 Disabling ACPI via APMC.
1424 07:05:15.983587 APMC done.
1425 07:05:15.986830 PCI: 00:1f.2 init finished in 5 msecs
1426 07:05:15.997541 PNP: 0c09.0 init
1427 07:05:16.015922 Google Chrome EC uptime: 6.551 seconds
1428 07:05:16.019217 Google Chrome AP resets since EC boot: 0
1429 07:05:16.022635 Google Chrome most recent AP reset causes:
1430 07:05:16.028956 Google Chrome EC reset flags at last EC boot: reset-pin
1431 07:05:16.032292 PNP: 0c09.0 init finished in 30 msecs
1432 07:05:16.035757 Devices initialized
1433 07:05:16.039210 Show all devs... After init.
1434 07:05:16.039757 Root Device: enabled 1
1435 07:05:16.042530 CPU_CLUSTER: 0: enabled 1
1436 07:05:16.045789 DOMAIN: 0000: enabled 1
1437 07:05:16.048992 PCI: 00:00.0: enabled 1
1438 07:05:16.049534 PCI: 00:02.0: enabled 1
1439 07:05:16.052475 PCI: 00:04.0: enabled 1
1440 07:05:16.056177 PCI: 00:05.0: enabled 1
1441 07:05:16.056726 PCI: 00:09.0: enabled 0
1442 07:05:16.059150 PCI: 00:12.6: enabled 0
1443 07:05:16.062777 PCI: 00:14.0: enabled 1
1444 07:05:16.066191 PCI: 00:14.1: enabled 0
1445 07:05:16.066779 PCI: 00:14.2: enabled 0
1446 07:05:16.069430 PCI: 00:14.3: enabled 1
1447 07:05:16.072540 PCI: 00:14.5: enabled 1
1448 07:05:16.075880 PCI: 00:15.0: enabled 1
1449 07:05:16.076437 PCI: 00:15.1: enabled 1
1450 07:05:16.079206 PCI: 00:15.2: enabled 1
1451 07:05:16.082498 PCI: 00:15.3: enabled 1
1452 07:05:16.083078 PCI: 00:16.0: enabled 1
1453 07:05:16.085966 PCI: 00:16.1: enabled 0
1454 07:05:16.089353 PCI: 00:16.4: enabled 0
1455 07:05:16.092176 PCI: 00:16.5: enabled 0
1456 07:05:16.092631 PCI: 00:17.0: enabled 0
1457 07:05:16.095513 PCI: 00:19.0: enabled 1
1458 07:05:16.099093 PCI: 00:19.1: enabled 0
1459 07:05:16.102702 PCI: 00:19.2: enabled 1
1460 07:05:16.103241 PCI: 00:1a.0: enabled 1
1461 07:05:16.105888 PCI: 00:1c.0: enabled 0
1462 07:05:16.109203 PCI: 00:1c.1: enabled 0
1463 07:05:16.109769 PCI: 00:1c.2: enabled 0
1464 07:05:16.113351 PCI: 00:1c.3: enabled 0
1465 07:05:16.116261 PCI: 00:1c.4: enabled 0
1466 07:05:16.119540 PCI: 00:1c.5: enabled 0
1467 07:05:16.120089 PCI: 00:1c.6: enabled 0
1468 07:05:16.123119 PCI: 00:1c.7: enabled 1
1469 07:05:16.126502 PCI: 00:1e.0: enabled 0
1470 07:05:16.127094 PCI: 00:1e.1: enabled 0
1471 07:05:16.129933 PCI: 00:1e.2: enabled 1
1472 07:05:16.132952 PCI: 00:1e.3: enabled 0
1473 07:05:16.136385 PCI: 00:1f.0: enabled 1
1474 07:05:16.136831 PCI: 00:1f.1: enabled 0
1475 07:05:16.140062 PCI: 00:1f.2: enabled 1
1476 07:05:16.143776 PCI: 00:1f.3: enabled 1
1477 07:05:16.144324 PCI: 00:1f.4: enabled 0
1478 07:05:16.146785 PCI: 00:1f.5: enabled 1
1479 07:05:16.150395 PCI: 00:1f.7: enabled 0
1480 07:05:16.153792 GENERIC: 0.0: enabled 1
1481 07:05:16.154332 GENERIC: 0.0: enabled 1
1482 07:05:16.157148 USB0 port 0: enabled 1
1483 07:05:16.160338 GENERIC: 0.0: enabled 1
1484 07:05:16.160885 I2C: 00:2c: enabled 1
1485 07:05:16.163389 I2C: 00:15: enabled 1
1486 07:05:16.167182 GENERIC: 0.0: enabled 0
1487 07:05:16.167732 I2C: 00:15: enabled 1
1488 07:05:16.170545 I2C: 00:10: enabled 0
1489 07:05:16.173816 I2C: 00:10: enabled 0
1490 07:05:16.176564 I2C: 00:2c: enabled 1
1491 07:05:16.177012 I2C: 00:40: enabled 1
1492 07:05:16.180219 I2C: 00:10: enabled 1
1493 07:05:16.183445 I2C: 00:39: enabled 1
1494 07:05:16.183991 I2C: 00:36: enabled 1
1495 07:05:16.186962 I2C: 00:10: enabled 0
1496 07:05:16.190328 I2C: 00:0c: enabled 1
1497 07:05:16.190901 I2C: 00:50: enabled 1
1498 07:05:16.192987 I2C: 00:1a: enabled 1
1499 07:05:16.196417 I2C: 00:1a: enabled 0
1500 07:05:16.196858 I2C: 00:1a: enabled 0
1501 07:05:16.199682 I2C: 00:28: enabled 1
1502 07:05:16.203058 I2C: 00:29: enabled 1
1503 07:05:16.203521 PCI: 00:00.0: enabled 1
1504 07:05:16.206337 SPI: 00: enabled 1
1505 07:05:16.209958 PNP: 0c09.0: enabled 1
1506 07:05:16.210505 GENERIC: 0.0: enabled 0
1507 07:05:16.213033 USB2 port 0: enabled 1
1508 07:05:16.216502 USB2 port 1: enabled 1
1509 07:05:16.219629 USB2 port 2: enabled 1
1510 07:05:16.220082 USB2 port 3: enabled 1
1511 07:05:16.223339 USB2 port 4: enabled 0
1512 07:05:16.226212 USB2 port 5: enabled 1
1513 07:05:16.226785 USB2 port 6: enabled 0
1514 07:05:16.229725 USB2 port 7: enabled 1
1515 07:05:16.232742 USB3 port 0: enabled 1
1516 07:05:16.233185 USB3 port 1: enabled 1
1517 07:05:16.236035 USB3 port 2: enabled 1
1518 07:05:16.239310 USB3 port 3: enabled 1
1519 07:05:16.239757 APIC: 00: enabled 1
1520 07:05:16.243079 APIC: 02: enabled 1
1521 07:05:16.246431 PCI: 00:08.0: enabled 1
1522 07:05:16.249805 BS: BS_DEV_INIT run times (exec / console): 37 / 464 ms
1523 07:05:16.256243 ELOG: Event(92) added with size 9 at 2023-03-22 07:05:15 UTC
1524 07:05:16.263183 ELOG: Event(93) added with size 9 at 2023-03-22 07:05:15 UTC
1525 07:05:16.270088 ELOG: Event(9E) added with size 10 at 2023-03-22 07:05:15 UTC
1526 07:05:16.276226 ELOG: Event(9F) added with size 14 at 2023-03-22 07:05:15 UTC
1527 07:05:16.282818 BS: BS_DEV_INIT exit times (exec / console): 1 / 24 ms
1528 07:05:16.289739 ELOG: Event(A1) added with size 10 at 2023-03-22 07:05:15 UTC
1529 07:05:16.296202 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1530 07:05:16.302667 ELOG: Event(A0) added with size 9 at 2023-03-22 07:05:15 UTC
1531 07:05:16.305819 elog_add_boot_reason: Logged dev mode boot
1532 07:05:16.313415 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1533 07:05:16.313954 Finalize devices...
1534 07:05:16.316350 Devices finalized
1535 07:05:16.322345 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1536 07:05:16.325856 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1537 07:05:16.332293 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1538 07:05:16.335687 ME: HFSTS1 : 0x80030045
1539 07:05:16.338660 ME: HFSTS2 : 0x30280136
1540 07:05:16.345767 ME: HFSTS3 : 0x00000050
1541 07:05:16.349057 ME: HFSTS4 : 0x00004000
1542 07:05:16.352806 ME: HFSTS5 : 0x00000000
1543 07:05:16.356232 ME: HFSTS6 : 0x40400006
1544 07:05:16.360124 ME: Manufacturing Mode : NO
1545 07:05:16.363609 ME: FW Partition Table : OK
1546 07:05:16.367095 ME: Bringup Loader Failure : NO
1547 07:05:16.370729 ME: Firmware Init Complete : NO
1548 07:05:16.373726 ME: Boot Options Present : NO
1549 07:05:16.376986 ME: Update In Progress : NO
1550 07:05:16.380639 ME: D0i3 Support : YES
1551 07:05:16.383452 ME: Low Power State Enabled : NO
1552 07:05:16.386794 ME: CPU Replaced : YES
1553 07:05:16.390321 ME: CPU Replacement Valid : YES
1554 07:05:16.393507 ME: Current Working State : 5
1555 07:05:16.396854 ME: Current Operation State : 1
1556 07:05:16.400251 ME: Current Operation Mode : 3
1557 07:05:16.403476 ME: Error Code : 0
1558 07:05:16.406523 ME: CPU Debug Disabled : YES
1559 07:05:16.410089 ME: TXT Support : NO
1560 07:05:16.416692 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1561 07:05:16.419868 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1562 07:05:16.426338 ACPI: Writing ACPI tables at 76b27000.
1563 07:05:16.426897 ACPI: * FACS
1564 07:05:16.429795 ACPI: * DSDT
1565 07:05:16.433290 Ramoops buffer: 0x100000@0x76a26000.
1566 07:05:16.436267 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1567 07:05:16.442980 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1568 07:05:16.446541 Google Chrome EC: version:
1569 07:05:16.449813 ro: magolor_1.1.9999-103b6f9
1570 07:05:16.453136 rw: magolor_1.1.9999-103b6f9
1571 07:05:16.453680 running image: 1
1572 07:05:16.459179 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1573 07:05:16.463166 ACPI: * FADT
1574 07:05:16.463707 SCI is IRQ9
1575 07:05:16.465984 ACPI: added table 1/32, length now 40
1576 07:05:16.469632 ACPI: * SSDT
1577 07:05:16.472825 Found 1 CPU(s) with 2 core(s) each.
1578 07:05:16.476089 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1579 07:05:16.482393 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1580 07:05:16.489287 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1581 07:05:16.492393 WARNING: RO_VPD is uninitialized or empty.
1582 07:05:16.495671 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1583 07:05:16.502558 WARNING: RW_VPD is uninitialized or empty.
1584 07:05:16.505957 Could not locate 'wifi_sar' in VPD.
1585 07:05:16.509263 Checking CBFS for default SAR values
1586 07:05:16.512375 wifi_sar_defaults.hex has bad len in CBFS
1587 07:05:16.515644 failed from getting SAR limits!
1588 07:05:16.519108 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1589 07:05:16.525550 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1590 07:05:16.528777 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1591 07:05:16.535402 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1592 07:05:16.542255 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1593 07:05:16.545553 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1594 07:05:16.551872 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1595 07:05:16.555174 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1596 07:05:16.562264 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1597 07:05:16.568926 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1598 07:05:16.575357 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1599 07:05:16.578696 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1600 07:05:16.585331 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1601 07:05:16.591843 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1602 07:05:16.595003 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1603 07:05:16.601970 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1604 07:05:16.605254 PS2K: Passing 101 keymaps to kernel
1605 07:05:16.611870 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1606 07:05:16.615113 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1607 07:05:16.621693 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1608 07:05:16.628054 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1609 07:05:16.631528 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1610 07:05:16.638092 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1611 07:05:16.645112 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1612 07:05:16.647988 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1613 07:05:16.654705 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1614 07:05:16.661591 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1615 07:05:16.664632 ACPI: added table 2/32, length now 44
1616 07:05:16.668450 ACPI: * MCFG
1617 07:05:16.671416 ACPI: added table 3/32, length now 48
1618 07:05:16.671971 ACPI: * TPM2
1619 07:05:16.675175 TPM2 log created at 0x76a16000
1620 07:05:16.677786 ACPI: added table 4/32, length now 52
1621 07:05:16.681169 ACPI: * MADT
1622 07:05:16.681723 SCI is IRQ9
1623 07:05:16.684677 ACPI: added table 5/32, length now 56
1624 07:05:16.687761 current = 76b2d580
1625 07:05:16.688315 ACPI: * DMAR
1626 07:05:16.694610 ACPI: added table 6/32, length now 60
1627 07:05:16.697694 ACPI: added table 7/32, length now 64
1628 07:05:16.698152 ACPI: * HPET
1629 07:05:16.701148 ACPI: added table 8/32, length now 68
1630 07:05:16.704622 ACPI: done.
1631 07:05:16.707651 ACPI tables: 26304 bytes.
1632 07:05:16.711002 smbios_write_tables: 76a15000
1633 07:05:16.714652 EC returned error result code 3
1634 07:05:16.717914 Couldn't obtain OEM name from CBI
1635 07:05:16.720825 Create SMBIOS type 16
1636 07:05:16.721289 Create SMBIOS type 17
1637 07:05:16.724322 GENERIC: 0.0 (WIFI Device)
1638 07:05:16.727729 SMBIOS tables: 913 bytes.
1639 07:05:16.730849 Writing table forward entry at 0x00000500
1640 07:05:16.737778 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1641 07:05:16.740800 Writing coreboot table at 0x76b4b000
1642 07:05:16.747248 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1643 07:05:16.750868 1. 0000000000001000-000000000009ffff: RAM
1644 07:05:16.757454 2. 00000000000a0000-00000000000fffff: RESERVED
1645 07:05:16.760649 3. 0000000000100000-0000000076a14fff: RAM
1646 07:05:16.767292 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1647 07:05:16.771110 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1648 07:05:16.777154 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1649 07:05:16.781073 7. 0000000077000000-000000007fbfffff: RESERVED
1650 07:05:16.787269 8. 00000000c0000000-00000000cfffffff: RESERVED
1651 07:05:16.790404 9. 00000000fb000000-00000000fb000fff: RESERVED
1652 07:05:16.796883 10. 00000000fe000000-00000000fe00ffff: RESERVED
1653 07:05:16.800290 11. 00000000fea80000-00000000fea87fff: RESERVED
1654 07:05:16.806996 12. 00000000fed80000-00000000fed87fff: RESERVED
1655 07:05:16.810533 13. 00000000fed90000-00000000fed92fff: RESERVED
1656 07:05:16.816901 14. 00000000feda0000-00000000feda1fff: RESERVED
1657 07:05:16.819801 15. 0000000100000000-00000001803fffff: RAM
1658 07:05:16.823412 Passing 4 GPIOs to payload:
1659 07:05:16.826388 NAME | PORT | POLARITY | VALUE
1660 07:05:16.833355 lid | undefined | high | high
1661 07:05:16.836696 power | undefined | high | low
1662 07:05:16.843431 oprom | undefined | high | low
1663 07:05:16.850202 EC in RW | 0x000000b9 | high | low
1664 07:05:16.856423 Wrote coreboot table at: 0x76b4b000, 0x5a0 bytes, checksum 89a5
1665 07:05:16.856989 coreboot table: 1464 bytes.
1666 07:05:16.862839 IMD ROOT 0. 0x76fff000 0x00001000
1667 07:05:16.866419 IMD SMALL 1. 0x76ffe000 0x00001000
1668 07:05:16.869426 FSP MEMORY 2. 0x76c4e000 0x003b0000
1669 07:05:16.873226 CONSOLE 3. 0x76c2e000 0x00020000
1670 07:05:16.876067 FMAP 4. 0x76c2d000 0x00000578
1671 07:05:16.879498 TIME STAMP 5. 0x76c2c000 0x00000910
1672 07:05:16.883026 VBOOT WORK 6. 0x76c18000 0x00014000
1673 07:05:16.886700 ROMSTG STCK 7. 0x76c17000 0x00001000
1674 07:05:16.889720 AFTER CAR 8. 0x76c0d000 0x0000a000
1675 07:05:16.896272 RAMSTAGE 9. 0x76ba7000 0x00066000
1676 07:05:16.899672 REFCODE 10. 0x76b67000 0x00040000
1677 07:05:16.902691 SMM BACKUP 11. 0x76b57000 0x00010000
1678 07:05:16.906183 4f444749 12. 0x76b55000 0x00002000
1679 07:05:16.909690 EXT VBT13. 0x76b53000 0x00001c43
1680 07:05:16.912944 COREBOOT 14. 0x76b4b000 0x00008000
1681 07:05:16.916474 ACPI 15. 0x76b27000 0x00024000
1682 07:05:16.919411 ACPI GNVS 16. 0x76b26000 0x00001000
1683 07:05:16.922881 RAMOOPS 17. 0x76a26000 0x00100000
1684 07:05:16.929154 TPM2 TCGLOG18. 0x76a16000 0x00010000
1685 07:05:16.932549 SMBIOS 19. 0x76a15000 0x00000800
1686 07:05:16.933000 IMD small region:
1687 07:05:16.936098 IMD ROOT 0. 0x76ffec00 0x00000400
1688 07:05:16.942517 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1689 07:05:16.945991 POWER STATE 2. 0x76ffeba0 0x00000040
1690 07:05:16.949247 ROMSTAGE 3. 0x76ffeb80 0x00000004
1691 07:05:16.952259 MEM INFO 4. 0x76ffe9a0 0x000001e0
1692 07:05:16.959202 BS: BS_WRITE_TABLES run times (exec / console): 6 / 531 ms
1693 07:05:16.962326 MTRR: Physical address space:
1694 07:05:16.969139 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1695 07:05:16.975269 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1696 07:05:16.978884 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1697 07:05:16.985237 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1698 07:05:16.992074 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1699 07:05:16.998736 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1700 07:05:17.005135 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1701 07:05:17.008529 MTRR: Fixed MSR 0x250 0x0606060606060606
1702 07:05:17.012204 MTRR: Fixed MSR 0x258 0x0606060606060606
1703 07:05:17.018940 MTRR: Fixed MSR 0x259 0x0000000000000000
1704 07:05:17.021930 MTRR: Fixed MSR 0x268 0x0606060606060606
1705 07:05:17.025280 MTRR: Fixed MSR 0x269 0x0606060606060606
1706 07:05:17.028168 MTRR: Fixed MSR 0x26a 0x0606060606060606
1707 07:05:17.034835 MTRR: Fixed MSR 0x26b 0x0606060606060606
1708 07:05:17.038415 MTRR: Fixed MSR 0x26c 0x0606060606060606
1709 07:05:17.041779 MTRR: Fixed MSR 0x26d 0x0606060606060606
1710 07:05:17.044913 MTRR: Fixed MSR 0x26e 0x0606060606060606
1711 07:05:17.051417 MTRR: Fixed MSR 0x26f 0x0606060606060606
1712 07:05:17.051970 call enable_fixed_mtrr()
1713 07:05:17.058267 CPU physical address size: 39 bits
1714 07:05:17.061466 MTRR: default type WB/UC MTRR counts: 6/5.
1715 07:05:17.065003 MTRR: UC selected as default type.
1716 07:05:17.071398 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1717 07:05:17.078137 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1718 07:05:17.084870 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1719 07:05:17.087654 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1720 07:05:17.094539 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1721 07:05:17.097605
1722 07:05:17.098055 MTRR check
1723 07:05:17.101088 Fixed MTRRs : Enabled
1724 07:05:17.101644 Variable MTRRs: Enabled
1725 07:05:17.102008
1726 07:05:17.107730 MTRR: Fixed MSR 0x250 0x0606060606060606
1727 07:05:17.110944 MTRR: Fixed MSR 0x258 0x0606060606060606
1728 07:05:17.113991 MTRR: Fixed MSR 0x259 0x0000000000000000
1729 07:05:17.117785 MTRR: Fixed MSR 0x268 0x0606060606060606
1730 07:05:17.124025 MTRR: Fixed MSR 0x269 0x0606060606060606
1731 07:05:17.127454 MTRR: Fixed MSR 0x26a 0x0606060606060606
1732 07:05:17.130875 MTRR: Fixed MSR 0x26b 0x0606060606060606
1733 07:05:17.134144 MTRR: Fixed MSR 0x26c 0x0606060606060606
1734 07:05:17.140859 MTRR: Fixed MSR 0x26d 0x0606060606060606
1735 07:05:17.144273 MTRR: Fixed MSR 0x26e 0x0606060606060606
1736 07:05:17.147205 MTRR: Fixed MSR 0x26f 0x0606060606060606
1737 07:05:17.153741 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1738 07:05:17.157465 call enable_fixed_mtrr()
1739 07:05:17.161281 Checking cr50 for pending updates
1740 07:05:17.161842 CPU physical address size: 39 bits
1741 07:05:17.166146 Reading cr50 TPM mode
1742 07:05:17.176535 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1743 07:05:17.183469 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1744 07:05:17.187062 Checking segment from ROM address 0xfff9d5b8
1745 07:05:17.193259 Checking segment from ROM address 0xfff9d5d4
1746 07:05:17.196612 Loading segment from ROM address 0xfff9d5b8
1747 07:05:17.200592 code (compression=0)
1748 07:05:17.206671 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1749 07:05:17.216537 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1750 07:05:17.219693 it's not compressed!
1751 07:05:17.345518 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1752 07:05:17.351588 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1753 07:05:17.359122 Loading segment from ROM address 0xfff9d5d4
1754 07:05:17.362664 Entry Point 0x30000000
1755 07:05:17.363225 Loaded segments
1756 07:05:17.369025 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1757 07:05:17.385261 Finalizing chipset.
1758 07:05:17.388631 Finalizing SMM.
1759 07:05:17.389191 APMC done.
1760 07:05:17.395247 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1761 07:05:17.398298 mp_park_aps done after 0 msecs.
1762 07:05:17.401889 Jumping to boot code at 0x30000000(0x76b4b000)
1763 07:05:17.411396 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1764 07:05:17.411982
1765 07:05:17.412364
1766 07:05:17.412692
1767 07:05:17.414519 Starting depthcharge on Magolor...
1768 07:05:17.415008
1769 07:05:17.416048 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1770 07:05:17.416561 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1771 07:05:17.416991 Setting prompt string to ['dedede:']
1772 07:05:17.417427 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1773 07:05:17.424825 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1774 07:05:17.425379
1775 07:05:17.431453 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1776 07:05:17.431998
1777 07:05:17.434512 fw_config match found: AUDIO_AMP=UNPROVISIONED
1778 07:05:17.435001
1779 07:05:17.437858 Wipe memory regions:
1780 07:05:17.438306
1781 07:05:17.441899 [0x00000000001000, 0x000000000a0000)
1782 07:05:17.442441
1783 07:05:17.444631 [0x00000000100000, 0x00000030000000)
1784 07:05:17.573560
1785 07:05:17.576494 [0x00000031062170, 0x00000076a15000)
1786 07:05:17.745922
1787 07:05:17.748948 [0x00000100000000, 0x00000180400000)
1788 07:05:18.510898
1789 07:05:18.511434 R8152: Initializing
1790 07:05:18.511821
1791 07:05:18.514307 Version 9 (ocp_data = 6010)
1792 07:05:18.518835
1793 07:05:18.519281 R8152: Done initializing
1794 07:05:18.519631
1795 07:05:18.522302 Adding net device
1796 07:05:18.878244
1797 07:05:18.881348 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1798 07:05:18.881888
1799 07:05:18.882244
1800 07:05:18.882602
1801 07:05:18.883416 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1803 07:05:18.984906 dedede:tftpboot 192.168.201.1 9726720/tftp-deploy-3eqd7zv5/kernel/bzImage 9726720/tftp-deploy-3eqd7zv5/kernel/cmdline 9726720/tftp-deploy-3eqd7zv5/ramdisk/ramdisk.cpio.gz
1804 07:05:18.985590 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1805 07:05:18.986003 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1806 07:05:18.990654 tftpboot 192.168.201.1 9726720/tftp-deploy-3eqd7zv5/kernel/bzImay-3eqd7zv5/kernel/cmdline 9726720/tftp-deploy-3eqd7zv5/ramdisk/ramdisk.cpio.gz
1807 07:05:18.991108
1808 07:05:18.991456 Waiting for link
1809 07:05:19.192663
1810 07:05:19.193206 done.
1811 07:05:19.193559
1812 07:05:19.193882 MAC: 00:e0:4c:72:3d:b7
1813 07:05:19.194202
1814 07:05:19.195798 Sending DHCP discover... done.
1815 07:05:19.196240
1816 07:05:19.199187 Waiting for reply... done.
1817 07:05:19.199630
1818 07:05:19.202347 Sending DHCP request... done.
1819 07:05:19.202857
1820 07:05:19.206072 Waiting for reply... done.
1821 07:05:19.209332
1822 07:05:19.209875 My ip is 192.168.201.22
1823 07:05:19.210227
1824 07:05:19.212296 The DHCP server ip is 192.168.201.1
1825 07:05:19.212739
1826 07:05:19.219237 TFTP server IP predefined by user: 192.168.201.1
1827 07:05:19.219681
1828 07:05:19.225734 Bootfile predefined by user: 9726720/tftp-deploy-3eqd7zv5/kernel/bzImage
1829 07:05:19.226278
1830 07:05:19.229217 Sending tftp read request... done.
1831 07:05:19.229781
1832 07:05:19.237483 Waiting for the transfer...
1833 07:05:19.237929
1834 07:05:19.682781 00000000 ################################################################
1835 07:05:19.683278
1836 07:05:20.123612 00080000 ################################################################
1837 07:05:20.124176
1838 07:05:20.507973 00100000 ################################################################
1839 07:05:20.508118
1840 07:05:20.838375 00180000 ################################################################
1841 07:05:20.838519
1842 07:05:21.160079 00200000 ################################################################
1843 07:05:21.160224
1844 07:05:21.490080 00280000 ################################################################
1845 07:05:21.490225
1846 07:05:21.821425 00300000 ################################################################
1847 07:05:21.821569
1848 07:05:22.144625 00380000 ################################################################
1849 07:05:22.144795
1850 07:05:22.466505 00400000 ################################################################
1851 07:05:22.466674
1852 07:05:22.793894 00480000 ################################################################
1853 07:05:22.794041
1854 07:05:23.114414 00500000 ################################################################
1855 07:05:23.114561
1856 07:05:23.446522 00580000 ################################################################
1857 07:05:23.446674
1858 07:05:23.774407 00600000 ################################################################
1859 07:05:23.774551
1860 07:05:24.102138 00680000 ################################################################
1861 07:05:24.102282
1862 07:05:24.425932 00700000 ################################################################
1863 07:05:24.426101
1864 07:05:24.749235 00780000 ################################################################
1865 07:05:24.749385
1866 07:05:25.078756 00800000 ################################################################
1867 07:05:25.078905
1868 07:05:25.407609 00880000 ################################################################
1869 07:05:25.407755
1870 07:05:25.648296 00900000 ################################################ done.
1871 07:05:25.651932
1872 07:05:25.655016 The bootfile was 9826304 bytes long.
1873 07:05:25.655470
1874 07:05:25.658720 Sending tftp read request... done.
1875 07:05:25.659267
1876 07:05:25.661931 Waiting for the transfer...
1877 07:05:25.662458
1878 07:05:26.128560 00000000 ################################################################
1879 07:05:26.129157
1880 07:05:26.553445 00080000 ################################################################
1881 07:05:26.553987
1882 07:05:27.008469 00100000 ################################################################
1883 07:05:27.009081
1884 07:05:27.476070 00180000 ################################################################
1885 07:05:27.476618
1886 07:05:27.929073 00200000 ################################################################
1887 07:05:27.929229
1888 07:05:28.263623 00280000 ################################################################
1889 07:05:28.263764
1890 07:05:28.599324 00300000 ################################################################
1891 07:05:28.599574
1892 07:05:29.022255 00380000 ################################################################
1893 07:05:29.022865
1894 07:05:29.492638 00400000 ################################################################
1895 07:05:29.493200
1896 07:05:29.930892 00480000 ################################################################
1897 07:05:29.931462
1898 07:05:30.398344 00500000 ################################################################
1899 07:05:30.398926
1900 07:05:30.714634 00580000 ########################################### done.
1901 07:05:30.715336
1902 07:05:30.717617 Sending tftp read request... done.
1903 07:05:30.718097
1904 07:05:30.720959 Waiting for the transfer...
1905 07:05:30.721416
1906 07:05:30.721851 00000000 # done.
1907 07:05:30.722276
1908 07:05:30.731060 Command line loaded dynamically from TFTP file: 9726720/tftp-deploy-3eqd7zv5/kernel/cmdline
1909 07:05:30.731601
1910 07:05:30.750975 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9726720/extract-nfsrootfs-dk1z4ow7,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1911 07:05:30.751537
1912 07:05:30.754090 ec_init: CrosEC protocol v3 supported (256, 256)
1913 07:05:30.761812
1914 07:05:30.764599 Shutting down all USB controllers.
1915 07:05:30.765137
1916 07:05:30.765626 Removing current net device
1917 07:05:30.766041
1918 07:05:30.768021 Finalizing coreboot
1919 07:05:30.768475
1920 07:05:30.774515 Exiting depthcharge with code 4 at timestamp: 20196240
1921 07:05:30.775012
1922 07:05:30.775493
1923 07:05:30.775911 Starting kernel ...
1924 07:05:30.776316
1925 07:05:30.776714
1926 07:05:30.777996 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
1927 07:05:30.778544 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
1928 07:05:30.778994 Setting prompt string to ['Linux version [0-9]']
1929 07:05:30.779445 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1930 07:05:30.779875 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1932 07:10:03.778773 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
1934 07:10:03.779084 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
1936 07:10:03.779360 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1939 07:10:03.779765 end: 2 depthcharge-action (duration 00:05:00) [common]
1941 07:10:03.779994 Cleaning after the job
1942 07:10:03.780082 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/ramdisk
1943 07:10:03.780651 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/kernel
1944 07:10:03.781317 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/nfsrootfs
1945 07:10:03.817413 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726720/tftp-deploy-3eqd7zv5/modules
1946 07:10:03.817914 start: 5.1 power-off (timeout 00:00:30) [common]
1947 07:10:03.818076 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-9' '--port=1' '--command=off'
1948 07:10:03.892464 >> Command sent successfully.
1949 07:10:03.894609 Returned 0 in 0 seconds
1950 07:10:03.995400 end: 5.1 power-off (duration 00:00:00) [common]
1952 07:10:03.995724 start: 5.2 read-feedback (timeout 00:10:00) [common]
1953 07:10:03.995963 Listened to connection for namespace 'common' for up to 1s
1955 07:10:03.996339 Listened to connection for namespace 'common' for up to 1s
1956 07:10:04.998694 Finalising connection for namespace 'common'
1957 07:10:04.998865 Disconnecting from shell: Finalise
1958 07:10:04.998943