Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 08:57:20.136564 lava-dispatcher, installed at version: 2023.01
2 08:57:20.136764 start: 0 validate
3 08:57:20.136893 Start time: 2023-03-24 08:57:20.136887+00:00 (UTC)
4 08:57:20.137020 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:57:20.137148 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 08:57:20.433469 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:57:20.434216 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.279-cip95%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:57:23.936694 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:57:23.937372 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.279-cip95%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 08:57:24.943620 validate duration: 4.81
12 08:57:24.943965 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:57:24.944144 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:57:24.944271 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:57:24.944409 Not decompressing ramdisk as can be used compressed.
16 08:57:24.944534 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 08:57:24.944615 saving as /var/lib/lava/dispatcher/tmp/9759480/tftp-deploy-6xvjrds4/ramdisk/rootfs.cpio.gz
18 08:57:24.944692 total size: 8429740 (8MB)
19 08:57:24.945649 progress 0% (0MB)
20 08:57:24.947935 progress 5% (0MB)
21 08:57:24.950153 progress 10% (0MB)
22 08:57:24.952363 progress 15% (1MB)
23 08:57:24.954601 progress 20% (1MB)
24 08:57:24.956722 progress 25% (2MB)
25 08:57:24.958879 progress 30% (2MB)
26 08:57:24.960998 progress 35% (2MB)
27 08:57:24.962958 progress 40% (3MB)
28 08:57:24.965056 progress 45% (3MB)
29 08:57:24.967202 progress 50% (4MB)
30 08:57:24.969272 progress 55% (4MB)
31 08:57:24.971372 progress 60% (4MB)
32 08:57:24.973500 progress 65% (5MB)
33 08:57:24.975578 progress 70% (5MB)
34 08:57:24.977452 progress 75% (6MB)
35 08:57:24.979528 progress 80% (6MB)
36 08:57:24.981551 progress 85% (6MB)
37 08:57:24.983632 progress 90% (7MB)
38 08:57:24.985664 progress 95% (7MB)
39 08:57:24.987742 progress 100% (8MB)
40 08:57:24.987881 8MB downloaded in 0.04s (186.16MB/s)
41 08:57:24.988028 end: 1.1.1 http-download (duration 00:00:00) [common]
43 08:57:24.988322 end: 1.1 download-retry (duration 00:00:00) [common]
44 08:57:24.988413 start: 1.2 download-retry (timeout 00:10:00) [common]
45 08:57:24.988499 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 08:57:24.988602 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.279-cip95/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 08:57:24.988673 saving as /var/lib/lava/dispatcher/tmp/9759480/tftp-deploy-6xvjrds4/kernel/bzImage
48 08:57:24.988735 total size: 9826304 (9MB)
49 08:57:24.988794 No compression specified
50 08:57:24.989712 progress 0% (0MB)
51 08:57:24.992122 progress 5% (0MB)
52 08:57:24.994487 progress 10% (0MB)
53 08:57:24.996933 progress 15% (1MB)
54 08:57:24.999369 progress 20% (1MB)
55 08:57:25.001736 progress 25% (2MB)
56 08:57:25.004182 progress 30% (2MB)
57 08:57:25.006637 progress 35% (3MB)
58 08:57:25.009006 progress 40% (3MB)
59 08:57:25.011528 progress 45% (4MB)
60 08:57:25.013949 progress 50% (4MB)
61 08:57:25.016496 progress 55% (5MB)
62 08:57:25.018914 progress 60% (5MB)
63 08:57:25.021247 progress 65% (6MB)
64 08:57:25.023608 progress 70% (6MB)
65 08:57:25.025936 progress 75% (7MB)
66 08:57:25.028299 progress 80% (7MB)
67 08:57:25.030655 progress 85% (7MB)
68 08:57:25.032978 progress 90% (8MB)
69 08:57:25.035339 progress 95% (8MB)
70 08:57:25.037680 progress 100% (9MB)
71 08:57:25.037895 9MB downloaded in 0.05s (190.64MB/s)
72 08:57:25.038044 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:57:25.038287 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:57:25.038376 start: 1.3 download-retry (timeout 00:10:00) [common]
76 08:57:25.038466 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 08:57:25.038613 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.279-cip95/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 08:57:25.038683 saving as /var/lib/lava/dispatcher/tmp/9759480/tftp-deploy-6xvjrds4/modules/modules.tar
79 08:57:25.038745 total size: 461352 (0MB)
80 08:57:25.038807 Using unxz to decompress xz
81 08:57:25.041796 progress 7% (0MB)
82 08:57:25.042173 progress 14% (0MB)
83 08:57:25.042420 progress 21% (0MB)
84 08:57:25.043769 progress 28% (0MB)
85 08:57:25.045824 progress 35% (0MB)
86 08:57:25.048185 progress 42% (0MB)
87 08:57:25.050319 progress 49% (0MB)
88 08:57:25.052539 progress 56% (0MB)
89 08:57:25.054495 progress 63% (0MB)
90 08:57:25.056581 progress 71% (0MB)
91 08:57:25.058649 progress 78% (0MB)
92 08:57:25.060587 progress 85% (0MB)
93 08:57:25.062646 progress 92% (0MB)
94 08:57:25.064977 progress 99% (0MB)
95 08:57:25.072359 0MB downloaded in 0.03s (13.09MB/s)
96 08:57:25.072678 end: 1.3.1 http-download (duration 00:00:00) [common]
98 08:57:25.072950 end: 1.3 download-retry (duration 00:00:00) [common]
99 08:57:25.073048 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
100 08:57:25.073145 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
101 08:57:25.073232 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 08:57:25.073317 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
103 08:57:25.073493 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p
104 08:57:25.073603 makedir: /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin
105 08:57:25.073689 makedir: /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/tests
106 08:57:25.073770 makedir: /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/results
107 08:57:25.073877 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-add-keys
108 08:57:25.074013 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-add-sources
109 08:57:25.074161 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-background-process-start
110 08:57:25.074279 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-background-process-stop
111 08:57:25.074390 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-common-functions
112 08:57:25.074499 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-echo-ipv4
113 08:57:25.074651 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-install-packages
114 08:57:25.074763 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-installed-packages
115 08:57:25.074871 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-os-build
116 08:57:25.074980 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-probe-channel
117 08:57:25.075089 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-probe-ip
118 08:57:25.075196 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-target-ip
119 08:57:25.075302 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-target-mac
120 08:57:25.075410 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-target-storage
121 08:57:25.075521 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-test-case
122 08:57:25.075647 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-test-event
123 08:57:25.075761 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-test-feedback
124 08:57:25.075884 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-test-raise
125 08:57:25.075997 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-test-reference
126 08:57:25.076122 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-test-runner
127 08:57:25.076292 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-test-set
128 08:57:25.076414 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-test-shell
129 08:57:25.076526 Updating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-install-packages (oe)
130 08:57:25.076638 Updating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/bin/lava-installed-packages (oe)
131 08:57:25.076757 Creating /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/environment
132 08:57:25.076847 LAVA metadata
133 08:57:25.076936 - LAVA_JOB_ID=9759480
134 08:57:25.077005 - LAVA_DISPATCHER_IP=192.168.201.1
135 08:57:25.077111 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
136 08:57:25.077195 skipped lava-vland-overlay
137 08:57:25.077288 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 08:57:25.077374 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
139 08:57:25.077438 skipped lava-multinode-overlay
140 08:57:25.077513 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 08:57:25.077596 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
142 08:57:25.077701 Loading test definitions
143 08:57:25.077800 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
144 08:57:25.077877 Using /lava-9759480 at stage 0
145 08:57:25.078165 uuid=9759480_1.4.2.3.1 testdef=None
146 08:57:25.078255 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 08:57:25.078367 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
148 08:57:25.078919 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 08:57:25.079186 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
151 08:57:25.079750 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 08:57:25.080029 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
154 08:57:25.080716 runner path: /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/0/tests/0_dmesg test_uuid 9759480_1.4.2.3.1
155 08:57:25.080866 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 08:57:25.081115 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
158 08:57:25.081204 Using /lava-9759480 at stage 1
159 08:57:25.081447 uuid=9759480_1.4.2.3.5 testdef=None
160 08:57:25.081536 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 08:57:25.081623 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
162 08:57:25.082149 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 08:57:25.082404 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
165 08:57:25.082999 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 08:57:25.083276 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
168 08:57:25.083814 runner path: /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/1/tests/1_bootrr test_uuid 9759480_1.4.2.3.5
169 08:57:25.083956 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 08:57:25.084167 Creating lava-test-runner.conf files
172 08:57:25.084231 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/0 for stage 0
173 08:57:25.084312 - 0_dmesg
174 08:57:25.084386 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9759480/lava-overlay-2wk6pc8p/lava-9759480/1 for stage 1
175 08:57:25.084467 - 1_bootrr
176 08:57:25.084560 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 08:57:25.084646 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
178 08:57:25.091112 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 08:57:25.091236 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
180 08:57:25.091328 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 08:57:25.091417 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 08:57:25.091509 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
183 08:57:25.280752 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 08:57:25.281186 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
185 08:57:25.281352 extracting modules file /var/lib/lava/dispatcher/tmp/9759480/tftp-deploy-6xvjrds4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9759480/extract-overlay-ramdisk-rntoxz04/ramdisk
186 08:57:25.297456 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 08:57:25.297661 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
188 08:57:25.297801 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9759480/compress-overlay-fwugzdf1/overlay-1.4.2.4.tar.gz to ramdisk
189 08:57:25.297912 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9759480/compress-overlay-fwugzdf1/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9759480/extract-overlay-ramdisk-rntoxz04/ramdisk
190 08:57:25.304274 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 08:57:25.304453 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
192 08:57:25.304591 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 08:57:25.304732 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
194 08:57:25.304860 Building ramdisk /var/lib/lava/dispatcher/tmp/9759480/extract-overlay-ramdisk-rntoxz04/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9759480/extract-overlay-ramdisk-rntoxz04/ramdisk
195 08:57:25.378236 >> 53632 blocks
196 08:57:26.219113 rename /var/lib/lava/dispatcher/tmp/9759480/extract-overlay-ramdisk-rntoxz04/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9759480/tftp-deploy-6xvjrds4/ramdisk/ramdisk.cpio.gz
197 08:57:26.219614 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 08:57:26.219793 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
199 08:57:26.220139 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
200 08:57:26.220270 No mkimage arch provided, not using FIT.
201 08:57:26.220404 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 08:57:26.220536 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 08:57:26.220652 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 08:57:26.220771 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
205 08:57:26.220853 No LXC device requested
206 08:57:26.220959 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 08:57:26.221054 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
208 08:57:26.221152 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 08:57:26.221230 Checking files for TFTP limit of 4294967296 bytes.
210 08:57:26.221654 end: 1 tftp-deploy (duration 00:00:01) [common]
211 08:57:26.221790 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 08:57:26.221919 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 08:57:26.222094 substitutions:
214 08:57:26.222196 - {DTB}: None
215 08:57:26.222295 - {INITRD}: 9759480/tftp-deploy-6xvjrds4/ramdisk/ramdisk.cpio.gz
216 08:57:26.222390 - {KERNEL}: 9759480/tftp-deploy-6xvjrds4/kernel/bzImage
217 08:57:26.222485 - {LAVA_MAC}: None
218 08:57:26.222589 - {PRESEED_CONFIG}: None
219 08:57:26.222684 - {PRESEED_LOCAL}: None
220 08:57:26.222779 - {RAMDISK}: 9759480/tftp-deploy-6xvjrds4/ramdisk/ramdisk.cpio.gz
221 08:57:26.222873 - {ROOT_PART}: None
222 08:57:26.222965 - {ROOT}: None
223 08:57:26.223058 - {SERVER_IP}: 192.168.201.1
224 08:57:26.223151 - {TEE}: None
225 08:57:26.223244 Parsed boot commands:
226 08:57:26.223336 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 08:57:26.223550 Parsed boot commands: tftpboot 192.168.201.1 9759480/tftp-deploy-6xvjrds4/kernel/bzImage 9759480/tftp-deploy-6xvjrds4/kernel/cmdline 9759480/tftp-deploy-6xvjrds4/ramdisk/ramdisk.cpio.gz
228 08:57:26.223683 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 08:57:26.223813 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 08:57:26.223949 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 08:57:26.224079 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 08:57:26.224185 Not connected, no need to disconnect.
233 08:57:26.224303 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 08:57:26.224429 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 08:57:26.224532 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
236 08:57:26.228015 Setting prompt string to ['lava-test: # ']
237 08:57:26.228457 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 08:57:26.228611 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 08:57:26.228751 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 08:57:26.228883 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 08:57:26.229156 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
242 08:57:31.360140 >> Command sent successfully.
243 08:57:31.362295 Returned 0 in 5 seconds
244 08:57:31.462710 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 08:57:31.463175 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 08:57:31.463274 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 08:57:31.463362 Setting prompt string to 'Starting depthcharge on Voema...'
249 08:57:31.463429 Changing prompt to 'Starting depthcharge on Voema...'
250 08:57:31.463497 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
251 08:57:31.463825 [Enter `^Ec?' for help]
252 08:57:33.068066
253 08:57:33.068243
254 08:57:33.078284 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
255 08:57:33.084917 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
256 08:57:33.088160 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
257 08:57:33.091163 CPU: AES supported, TXT NOT supported, VT supported
258 08:57:33.098012 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
259 08:57:33.104561 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
260 08:57:33.107895 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
261 08:57:33.111275 VBOOT: Loading verstage.
262 08:57:33.117780 FMAP: Found "FLASH" version 1.1 at 0x1804000.
263 08:57:33.121204 FMAP: base = 0x0 size = 0x2000000 #areas = 32
264 08:57:33.124806 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
265 08:57:33.135078 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
266 08:57:33.141642 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
267 08:57:33.141793
268 08:57:33.141861
269 08:57:33.155067 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
270 08:57:33.169020 Probing TPM: . done!
271 08:57:33.172513 TPM ready after 0 ms
272 08:57:33.175429 Connected to device vid:did:rid of 1ae0:0028:00
273 08:57:33.187012 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
274 08:57:33.193590 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 08:57:33.196603 Initialized TPM device CR50 revision 0
276 08:57:33.249610 tlcl_send_startup: Startup return code is 0
277 08:57:33.249766 TPM: setup succeeded
278 08:57:33.264965 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 08:57:33.279332 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 08:57:33.292469 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 08:57:33.302164 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 08:57:33.305743 Chrome EC: UHEPI supported
283 08:57:33.308719 Phase 1
284 08:57:33.312109 FMAP: area GBB found @ 1805000 (458752 bytes)
285 08:57:33.321956 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 08:57:33.328424 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 08:57:33.335197 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
288 08:57:33.341830 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
289 08:57:33.345423 Recovery requested (1009000e)
290 08:57:33.348167 TPM: Extending digest for VBOOT: boot mode into PCR 0
291 08:57:33.360249 tlcl_extend: response is 0
292 08:57:33.366666 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
293 08:57:33.376602 tlcl_extend: response is 0
294 08:57:33.383474 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 08:57:33.390545 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
296 08:57:33.396765 BS: verstage times (exec / console): total (unknown) / 142 ms
297 08:57:33.396858
298 08:57:33.396967
299 08:57:33.409859 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
300 08:57:33.416570 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
301 08:57:33.419629 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
302 08:57:33.422978 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
303 08:57:33.429630 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
304 08:57:33.433015 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
305 08:57:33.436035 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
306 08:57:33.439735 TCO_STS: 0000 0000
307 08:57:33.442879 GEN_PMCON: d0015038 00002200
308 08:57:33.445964 GBLRST_CAUSE: 00000000 00000000
309 08:57:33.450078 HPR_CAUSE0: 00000000
310 08:57:33.450167 prev_sleep_state 5
311 08:57:33.452838 Boot Count incremented to 18681
312 08:57:33.459161 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
313 08:57:33.465948 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
314 08:57:33.476038 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
315 08:57:33.482485 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
316 08:57:33.485607 Chrome EC: UHEPI supported
317 08:57:33.492408 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
318 08:57:33.503893 Probing TPM: done!
319 08:57:33.510442 Connected to device vid:did:rid of 1ae0:0028:00
320 08:57:33.521800 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
321 08:57:33.528480 Initialized TPM device CR50 revision 0
322 08:57:33.538208 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
323 08:57:33.544997 MRC: Hash idx 0x100b comparison successful.
324 08:57:33.548263 MRC cache found, size faa8
325 08:57:33.548370 bootmode is set to: 2
326 08:57:33.552005 SPD index = 0
327 08:57:33.558787 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
328 08:57:33.561339 SPD: module type is LPDDR4X
329 08:57:33.567980 SPD: module part number is MT53E512M64D4NW-046
330 08:57:33.574980 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
331 08:57:33.578130 SPD: device width 16 bits, bus width 16 bits
332 08:57:33.581129 SPD: module size is 1024 MB (per channel)
333 08:57:34.015875 CBMEM:
334 08:57:34.019124 IMD: root @ 0x76fff000 254 entries.
335 08:57:34.022489 IMD: root @ 0x76ffec00 62 entries.
336 08:57:34.025729 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
337 08:57:34.032639 FMAP: area RW_VPD found @ f35000 (8192 bytes)
338 08:57:34.036323 External stage cache:
339 08:57:34.039201 IMD: root @ 0x7b3ff000 254 entries.
340 08:57:34.042556 IMD: root @ 0x7b3fec00 62 entries.
341 08:57:34.057752 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
342 08:57:34.064164 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
343 08:57:34.070929 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
344 08:57:34.084885 MRC: 'RECOVERY_MRC_CACHE' does not need update.
345 08:57:34.091317 cse_lite: Skip switching to RW in the recovery path
346 08:57:34.091405 8 DIMMs found
347 08:57:34.091474 SMM Memory Map
348 08:57:34.094990 SMRAM : 0x7b000000 0x800000
349 08:57:34.098438 Subregion 0: 0x7b000000 0x200000
350 08:57:34.101815 Subregion 1: 0x7b200000 0x200000
351 08:57:34.105205 Subregion 2: 0x7b400000 0x400000
352 08:57:34.108685 top_of_ram = 0x77000000
353 08:57:34.114854 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
354 08:57:34.118638 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
355 08:57:34.124972 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
356 08:57:34.132147 MTRR Range: Start=ff000000 End=0 (Size 1000000)
357 08:57:34.138152 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
358 08:57:34.144633 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
359 08:57:34.155004 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
360 08:57:34.158182 Processing 211 relocs. Offset value of 0x74c0b000
361 08:57:34.167792 BS: romstage times (exec / console): total (unknown) / 277 ms
362 08:57:34.174029
363 08:57:34.174125
364 08:57:34.183961 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
365 08:57:34.187241 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
366 08:57:34.197296 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
367 08:57:34.203808 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
368 08:57:34.210715 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
369 08:57:34.216694 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
370 08:57:34.264445 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
371 08:57:34.270957 Processing 5008 relocs. Offset value of 0x75d98000
372 08:57:34.274236 BS: postcar times (exec / console): total (unknown) / 59 ms
373 08:57:34.277266
374 08:57:34.277683
375 08:57:34.287577 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
376 08:57:34.288137 Normal boot
377 08:57:34.291053 FW_CONFIG value is 0x804c02
378 08:57:34.294614 PCI: 00:07.0 disabled by fw_config
379 08:57:34.297603 PCI: 00:07.1 disabled by fw_config
380 08:57:34.301069 PCI: 00:0d.2 disabled by fw_config
381 08:57:34.304406 PCI: 00:1c.7 disabled by fw_config
382 08:57:34.310832 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
383 08:57:34.318022 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 08:57:34.320920 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 08:57:34.324355 GENERIC: 0.0 disabled by fw_config
386 08:57:34.327978 GENERIC: 1.0 disabled by fw_config
387 08:57:34.334159 fw_config match found: DB_USB=USB3_ACTIVE
388 08:57:34.337907 fw_config match found: DB_USB=USB3_ACTIVE
389 08:57:34.341378 fw_config match found: DB_USB=USB3_ACTIVE
390 08:57:34.347808 fw_config match found: DB_USB=USB3_ACTIVE
391 08:57:34.351307 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
392 08:57:34.357944 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
393 08:57:34.367837 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
394 08:57:34.374061 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
395 08:57:34.377368 microcode: sig=0x806c1 pf=0x80 revision=0x86
396 08:57:34.384083 microcode: Update skipped, already up-to-date
397 08:57:34.390730 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
398 08:57:34.417958 Detected 4 core, 8 thread CPU.
399 08:57:34.421603 Setting up SMI for CPU
400 08:57:34.424719 IED base = 0x7b400000
401 08:57:34.425314 IED size = 0x00400000
402 08:57:34.428064 Will perform SMM setup.
403 08:57:34.434679 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
404 08:57:34.441551 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
405 08:57:34.447523 Processing 16 relocs. Offset value of 0x00030000
406 08:57:34.451412 Attempting to start 7 APs
407 08:57:34.454263 Waiting for 10ms after sending INIT.
408 08:57:34.470207 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
409 08:57:34.470776 done.
410 08:57:34.473282 AP: slot 5 apic_id 6.
411 08:57:34.476946 AP: slot 4 apic_id 7.
412 08:57:34.477484 AP: slot 2 apic_id 3.
413 08:57:34.479708 AP: slot 6 apic_id 2.
414 08:57:34.483236 AP: slot 7 apic_id 4.
415 08:57:34.483679 AP: slot 3 apic_id 5.
416 08:57:34.489681 Waiting for 2nd SIPI to complete...done.
417 08:57:34.496406 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
418 08:57:34.502676 Processing 13 relocs. Offset value of 0x00038000
419 08:57:34.502968 Unable to locate Global NVS
420 08:57:34.512707 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
421 08:57:34.516325 Installing permanent SMM handler to 0x7b000000
422 08:57:34.525902 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
423 08:57:34.529494 Processing 794 relocs. Offset value of 0x7b010000
424 08:57:34.539166 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
425 08:57:34.542778 Processing 13 relocs. Offset value of 0x7b008000
426 08:57:34.548739 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
427 08:57:34.555518 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
428 08:57:34.562464 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
429 08:57:34.565768 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
430 08:57:34.572056 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
431 08:57:34.578939 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
432 08:57:34.585500 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
433 08:57:34.588894 Unable to locate Global NVS
434 08:57:34.595325 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
435 08:57:34.598443 Clearing SMI status registers
436 08:57:34.601866 SMI_STS: PM1
437 08:57:34.602123 PM1_STS: PWRBTN
438 08:57:34.608318 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
439 08:57:34.611880 In relocation handler: CPU 0
440 08:57:34.615285 New SMBASE=0x7b000000 IEDBASE=0x7b400000
441 08:57:34.622148 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 08:57:34.624935 Relocation complete.
443 08:57:34.631912 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
444 08:57:34.635166 In relocation handler: CPU 1
445 08:57:34.637920 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
446 08:57:34.641667 Relocation complete.
447 08:57:34.648414 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
448 08:57:34.652001 In relocation handler: CPU 3
449 08:57:34.655205 New SMBASE=0x7afff400 IEDBASE=0x7b400000
450 08:57:34.658120 Relocation complete.
451 08:57:34.664502 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
452 08:57:34.668245 In relocation handler: CPU 7
453 08:57:34.671052 New SMBASE=0x7affe400 IEDBASE=0x7b400000
454 08:57:34.674920 Writing SMRR. base = 0x7b000006, mask=0xff800c00
455 08:57:34.678582 Relocation complete.
456 08:57:34.684224 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
457 08:57:34.687968 In relocation handler: CPU 5
458 08:57:34.690865 New SMBASE=0x7affec00 IEDBASE=0x7b400000
459 08:57:34.697610 Writing SMRR. base = 0x7b000006, mask=0xff800c00
460 08:57:34.701078 Relocation complete.
461 08:57:34.707749 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
462 08:57:34.710573 In relocation handler: CPU 4
463 08:57:34.714606 New SMBASE=0x7afff000 IEDBASE=0x7b400000
464 08:57:34.717846 Relocation complete.
465 08:57:34.724082 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
466 08:57:34.727246 In relocation handler: CPU 2
467 08:57:34.730335 New SMBASE=0x7afff800 IEDBASE=0x7b400000
468 08:57:34.734147 Relocation complete.
469 08:57:34.740056 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
470 08:57:34.743687 In relocation handler: CPU 6
471 08:57:34.747222 New SMBASE=0x7affe800 IEDBASE=0x7b400000
472 08:57:34.750408 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 08:57:34.753424 Relocation complete.
474 08:57:34.757169 Initializing CPU #0
475 08:57:34.760020 CPU: vendor Intel device 806c1
476 08:57:34.763351 CPU: family 06, model 8c, stepping 01
477 08:57:34.766507 Clearing out pending MCEs
478 08:57:34.767117 Setting up local APIC...
479 08:57:34.770362 apic_id: 0x00 done.
480 08:57:34.774304 Turbo is available but hidden
481 08:57:34.777411 Turbo is available and visible
482 08:57:34.780553 microcode: Update skipped, already up-to-date
483 08:57:34.784172 CPU #0 initialized
484 08:57:34.784758 Initializing CPU #3
485 08:57:34.787073 Initializing CPU #7
486 08:57:34.790378 CPU: vendor Intel device 806c1
487 08:57:34.794245 CPU: family 06, model 8c, stepping 01
488 08:57:34.797333 CPU: vendor Intel device 806c1
489 08:57:34.800333 CPU: family 06, model 8c, stepping 01
490 08:57:34.803741 Initializing CPU #6
491 08:57:34.804219 Initializing CPU #2
492 08:57:34.807220 CPU: vendor Intel device 806c1
493 08:57:34.814108 CPU: family 06, model 8c, stepping 01
494 08:57:34.814708 Initializing CPU #5
495 08:57:34.817598 Initializing CPU #4
496 08:57:34.820536 CPU: vendor Intel device 806c1
497 08:57:34.823560 CPU: family 06, model 8c, stepping 01
498 08:57:34.826949 CPU: vendor Intel device 806c1
499 08:57:34.830427 CPU: family 06, model 8c, stepping 01
500 08:57:34.833729 Clearing out pending MCEs
501 08:57:34.836807 Clearing out pending MCEs
502 08:57:34.837250 Setting up local APIC...
503 08:57:34.840317 Initializing CPU #1
504 08:57:34.843478 apic_id: 0x06 done.
505 08:57:34.843939 Setting up local APIC...
506 08:57:34.850734 microcode: Update skipped, already up-to-date
507 08:57:34.851324 apic_id: 0x07 done.
508 08:57:34.853933 CPU #5 initialized
509 08:57:34.856965 CPU: vendor Intel device 806c1
510 08:57:34.860377 CPU: family 06, model 8c, stepping 01
511 08:57:34.863651 Clearing out pending MCEs
512 08:57:34.866657 Clearing out pending MCEs
513 08:57:34.867100 Setting up local APIC...
514 08:57:34.870212 Clearing out pending MCEs
515 08:57:34.873778 Clearing out pending MCEs
516 08:57:34.877144 Setting up local APIC...
517 08:57:34.880032 Setting up local APIC...
518 08:57:34.880483 apic_id: 0x02 done.
519 08:57:34.883425 Setting up local APIC...
520 08:57:34.886834 CPU: vendor Intel device 806c1
521 08:57:34.890159 CPU: family 06, model 8c, stepping 01
522 08:57:34.893596 microcode: Update skipped, already up-to-date
523 08:57:34.900203 microcode: Update skipped, already up-to-date
524 08:57:34.903185 Clearing out pending MCEs
525 08:57:34.903628 apic_id: 0x05 done.
526 08:57:34.906481 apic_id: 0x04 done.
527 08:57:34.910121 microcode: Update skipped, already up-to-date
528 08:57:34.916547 microcode: Update skipped, already up-to-date
529 08:57:34.916995 CPU #3 initialized
530 08:57:34.919662 CPU #7 initialized
531 08:57:34.920103 CPU #4 initialized
532 08:57:34.923373 CPU #6 initialized
533 08:57:34.926484 apic_id: 0x03 done.
534 08:57:34.927021 Setting up local APIC...
535 08:57:34.932907 microcode: Update skipped, already up-to-date
536 08:57:34.932996 apic_id: 0x01 done.
537 08:57:34.936618 CPU #2 initialized
538 08:57:34.939697 microcode: Update skipped, already up-to-date
539 08:57:34.943157 CPU #1 initialized
540 08:57:34.946638 bsp_do_flight_plan done after 455 msecs.
541 08:57:34.949671 CPU: frequency set to 4000 MHz
542 08:57:34.953312 Enabling SMIs.
543 08:57:34.959771 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
544 08:57:34.974822 SATAXPCIE1 indicates PCIe NVMe is present
545 08:57:34.978308 Probing TPM: done!
546 08:57:34.981015 Connected to device vid:did:rid of 1ae0:0028:00
547 08:57:34.991852 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
548 08:57:34.995287 Initialized TPM device CR50 revision 0
549 08:57:34.999290 Enabling S0i3.4
550 08:57:35.005018 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
551 08:57:35.008304 Found a VBT of 8704 bytes after decompression
552 08:57:35.014942 cse_lite: CSE RO boot. HybridStorageMode disabled
553 08:57:35.021422 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
554 08:57:35.097344 FSPS returned 0
555 08:57:35.100437 Executing Phase 1 of FspMultiPhaseSiInit
556 08:57:35.110555 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
557 08:57:35.113626 port C0 DISC req: usage 1 usb3 1 usb2 5
558 08:57:35.117104 Raw Buffer output 0 00000511
559 08:57:35.120570 Raw Buffer output 1 00000000
560 08:57:35.124237 pmc_send_ipc_cmd succeeded
561 08:57:35.130909 port C1 DISC req: usage 1 usb3 2 usb2 3
562 08:57:35.131351 Raw Buffer output 0 00000321
563 08:57:35.134502 Raw Buffer output 1 00000000
564 08:57:35.138109 pmc_send_ipc_cmd succeeded
565 08:57:35.143551 Detected 4 core, 8 thread CPU.
566 08:57:35.147121 Detected 4 core, 8 thread CPU.
567 08:57:35.381103 Display FSP Version Info HOB
568 08:57:35.384348 Reference Code - CPU = a.0.4c.31
569 08:57:35.387051 uCode Version = 0.0.0.86
570 08:57:35.390969 TXT ACM version = ff.ff.ff.ffff
571 08:57:35.393835 Reference Code - ME = a.0.4c.31
572 08:57:35.397794 MEBx version = 0.0.0.0
573 08:57:35.400512 ME Firmware Version = Consumer SKU
574 08:57:35.403905 Reference Code - PCH = a.0.4c.31
575 08:57:35.407070 PCH-CRID Status = Disabled
576 08:57:35.411045 PCH-CRID Original Value = ff.ff.ff.ffff
577 08:57:35.413945 PCH-CRID New Value = ff.ff.ff.ffff
578 08:57:35.417361 OPROM - RST - RAID = ff.ff.ff.ffff
579 08:57:35.420208 PCH Hsio Version = 4.0.0.0
580 08:57:35.423622 Reference Code - SA - System Agent = a.0.4c.31
581 08:57:35.427345 Reference Code - MRC = 2.0.0.1
582 08:57:35.430850 SA - PCIe Version = a.0.4c.31
583 08:57:35.434071 SA-CRID Status = Disabled
584 08:57:35.437393 SA-CRID Original Value = 0.0.0.1
585 08:57:35.440466 SA-CRID New Value = 0.0.0.1
586 08:57:35.443706 OPROM - VBIOS = ff.ff.ff.ffff
587 08:57:35.447643 IO Manageability Engine FW Version = 11.1.4.0
588 08:57:35.450430 PHY Build Version = 0.0.0.e0
589 08:57:35.453518 Thunderbolt(TM) FW Version = 0.0.0.0
590 08:57:35.460395 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
591 08:57:35.463818 ITSS IRQ Polarities Before:
592 08:57:35.464267 IPC0: 0xffffffff
593 08:57:35.466979 IPC1: 0xffffffff
594 08:57:35.467451 IPC2: 0xffffffff
595 08:57:35.470281 IPC3: 0xffffffff
596 08:57:35.473699 ITSS IRQ Polarities After:
597 08:57:35.474165 IPC0: 0xffffffff
598 08:57:35.477227 IPC1: 0xffffffff
599 08:57:35.477675 IPC2: 0xffffffff
600 08:57:35.480831 IPC3: 0xffffffff
601 08:57:35.483784 Found PCIe Root Port #9 at PCI: 00:1d.0.
602 08:57:35.496802 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
603 08:57:35.506654 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
604 08:57:35.520270 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
605 08:57:35.526838 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
606 08:57:35.530144 Enumerating buses...
607 08:57:35.533448 Show all devs... Before device enumeration.
608 08:57:35.536938 Root Device: enabled 1
609 08:57:35.537389 DOMAIN: 0000: enabled 1
610 08:57:35.539763 CPU_CLUSTER: 0: enabled 1
611 08:57:35.543325 PCI: 00:00.0: enabled 1
612 08:57:35.546638 PCI: 00:02.0: enabled 1
613 08:57:35.547081 PCI: 00:04.0: enabled 1
614 08:57:35.550066 PCI: 00:05.0: enabled 1
615 08:57:35.553148 PCI: 00:06.0: enabled 0
616 08:57:35.553615 PCI: 00:07.0: enabled 0
617 08:57:35.556608 PCI: 00:07.1: enabled 0
618 08:57:35.559630 PCI: 00:07.2: enabled 0
619 08:57:35.563193 PCI: 00:07.3: enabled 0
620 08:57:35.563433 PCI: 00:08.0: enabled 1
621 08:57:35.566546 PCI: 00:09.0: enabled 0
622 08:57:35.569774 PCI: 00:0a.0: enabled 0
623 08:57:35.573273 PCI: 00:0d.0: enabled 1
624 08:57:35.573532 PCI: 00:0d.1: enabled 0
625 08:57:35.576252 PCI: 00:0d.2: enabled 0
626 08:57:35.579259 PCI: 00:0d.3: enabled 0
627 08:57:35.582789 PCI: 00:0e.0: enabled 0
628 08:57:35.583235 PCI: 00:10.2: enabled 1
629 08:57:35.586496 PCI: 00:10.6: enabled 0
630 08:57:35.589748 PCI: 00:10.7: enabled 0
631 08:57:35.592714 PCI: 00:12.0: enabled 0
632 08:57:35.593160 PCI: 00:12.6: enabled 0
633 08:57:35.596199 PCI: 00:13.0: enabled 0
634 08:57:35.599743 PCI: 00:14.0: enabled 1
635 08:57:35.602657 PCI: 00:14.1: enabled 0
636 08:57:35.603108 PCI: 00:14.2: enabled 1
637 08:57:35.606203 PCI: 00:14.3: enabled 1
638 08:57:35.609753 PCI: 00:15.0: enabled 1
639 08:57:35.610267 PCI: 00:15.1: enabled 1
640 08:57:35.612656 PCI: 00:15.2: enabled 1
641 08:57:35.616045 PCI: 00:15.3: enabled 1
642 08:57:35.619393 PCI: 00:16.0: enabled 1
643 08:57:35.619841 PCI: 00:16.1: enabled 0
644 08:57:35.622620 PCI: 00:16.2: enabled 0
645 08:57:35.625926 PCI: 00:16.3: enabled 0
646 08:57:35.629592 PCI: 00:16.4: enabled 0
647 08:57:35.630039 PCI: 00:16.5: enabled 0
648 08:57:35.633305 PCI: 00:17.0: enabled 1
649 08:57:35.636369 PCI: 00:19.0: enabled 0
650 08:57:35.639208 PCI: 00:19.1: enabled 1
651 08:57:35.639658 PCI: 00:19.2: enabled 0
652 08:57:35.642557 PCI: 00:1c.0: enabled 1
653 08:57:35.646389 PCI: 00:1c.1: enabled 0
654 08:57:35.649456 PCI: 00:1c.2: enabled 0
655 08:57:35.649902 PCI: 00:1c.3: enabled 0
656 08:57:35.652793 PCI: 00:1c.4: enabled 0
657 08:57:35.656066 PCI: 00:1c.5: enabled 0
658 08:57:35.656606 PCI: 00:1c.6: enabled 1
659 08:57:35.658931 PCI: 00:1c.7: enabled 0
660 08:57:35.662312 PCI: 00:1d.0: enabled 1
661 08:57:35.666019 PCI: 00:1d.1: enabled 0
662 08:57:35.666463 PCI: 00:1d.2: enabled 1
663 08:57:35.669396 PCI: 00:1d.3: enabled 0
664 08:57:35.672725 PCI: 00:1e.0: enabled 1
665 08:57:35.676161 PCI: 00:1e.1: enabled 0
666 08:57:35.676606 PCI: 00:1e.2: enabled 1
667 08:57:35.679078 PCI: 00:1e.3: enabled 1
668 08:57:35.682134 PCI: 00:1f.0: enabled 1
669 08:57:35.685560 PCI: 00:1f.1: enabled 0
670 08:57:35.686036 PCI: 00:1f.2: enabled 1
671 08:57:35.688921 PCI: 00:1f.3: enabled 1
672 08:57:35.692115 PCI: 00:1f.4: enabled 0
673 08:57:35.695306 PCI: 00:1f.5: enabled 1
674 08:57:35.695750 PCI: 00:1f.6: enabled 0
675 08:57:35.698979 PCI: 00:1f.7: enabled 0
676 08:57:35.702427 APIC: 00: enabled 1
677 08:57:35.702913 GENERIC: 0.0: enabled 1
678 08:57:35.705839 GENERIC: 0.0: enabled 1
679 08:57:35.708758 GENERIC: 1.0: enabled 1
680 08:57:35.712249 GENERIC: 0.0: enabled 1
681 08:57:35.712696 GENERIC: 1.0: enabled 1
682 08:57:35.715029 USB0 port 0: enabled 1
683 08:57:35.718599 GENERIC: 0.0: enabled 1
684 08:57:35.722120 USB0 port 0: enabled 1
685 08:57:35.722597 GENERIC: 0.0: enabled 1
686 08:57:35.725050 I2C: 00:1a: enabled 1
687 08:57:35.728481 I2C: 00:31: enabled 1
688 08:57:35.728955 I2C: 00:32: enabled 1
689 08:57:35.732367 I2C: 00:10: enabled 1
690 08:57:35.735220 I2C: 00:15: enabled 1
691 08:57:35.735663 GENERIC: 0.0: enabled 0
692 08:57:35.738734 GENERIC: 1.0: enabled 0
693 08:57:35.741673 GENERIC: 0.0: enabled 1
694 08:57:35.742119 SPI: 00: enabled 1
695 08:57:35.745154 SPI: 00: enabled 1
696 08:57:35.748121 PNP: 0c09.0: enabled 1
697 08:57:35.751394 GENERIC: 0.0: enabled 1
698 08:57:35.751840 USB3 port 0: enabled 1
699 08:57:35.754945 USB3 port 1: enabled 1
700 08:57:35.758274 USB3 port 2: enabled 0
701 08:57:35.758816 USB3 port 3: enabled 0
702 08:57:35.762052 USB2 port 0: enabled 0
703 08:57:35.764673 USB2 port 1: enabled 1
704 08:57:35.765121 USB2 port 2: enabled 1
705 08:57:35.768167 USB2 port 3: enabled 0
706 08:57:35.771768 USB2 port 4: enabled 1
707 08:57:35.774728 USB2 port 5: enabled 0
708 08:57:35.775172 USB2 port 6: enabled 0
709 08:57:35.777898 USB2 port 7: enabled 0
710 08:57:35.781246 USB2 port 8: enabled 0
711 08:57:35.781693 USB2 port 9: enabled 0
712 08:57:35.784483 USB3 port 0: enabled 0
713 08:57:35.787964 USB3 port 1: enabled 1
714 08:57:35.791273 USB3 port 2: enabled 0
715 08:57:35.791720 USB3 port 3: enabled 0
716 08:57:35.794460 GENERIC: 0.0: enabled 1
717 08:57:35.797785 GENERIC: 1.0: enabled 1
718 08:57:35.798281 APIC: 01: enabled 1
719 08:57:35.801266 APIC: 03: enabled 1
720 08:57:35.804547 APIC: 05: enabled 1
721 08:57:35.804999 APIC: 07: enabled 1
722 08:57:35.807672 APIC: 06: enabled 1
723 08:57:35.808126 APIC: 02: enabled 1
724 08:57:35.811140 APIC: 04: enabled 1
725 08:57:35.814689 Compare with tree...
726 08:57:35.815161 Root Device: enabled 1
727 08:57:35.818037 DOMAIN: 0000: enabled 1
728 08:57:35.821077 PCI: 00:00.0: enabled 1
729 08:57:35.824237 PCI: 00:02.0: enabled 1
730 08:57:35.827680 PCI: 00:04.0: enabled 1
731 08:57:35.828150 GENERIC: 0.0: enabled 1
732 08:57:35.831496 PCI: 00:05.0: enabled 1
733 08:57:35.834475 PCI: 00:06.0: enabled 0
734 08:57:35.837862 PCI: 00:07.0: enabled 0
735 08:57:35.841219 GENERIC: 0.0: enabled 1
736 08:57:35.841666 PCI: 00:07.1: enabled 0
737 08:57:35.844617 GENERIC: 1.0: enabled 1
738 08:57:35.847553 PCI: 00:07.2: enabled 0
739 08:57:35.851043 GENERIC: 0.0: enabled 1
740 08:57:35.854413 PCI: 00:07.3: enabled 0
741 08:57:35.857413 GENERIC: 1.0: enabled 1
742 08:57:35.857864 PCI: 00:08.0: enabled 1
743 08:57:35.860824 PCI: 00:09.0: enabled 0
744 08:57:35.864337 PCI: 00:0a.0: enabled 0
745 08:57:35.867728 PCI: 00:0d.0: enabled 1
746 08:57:35.870941 USB0 port 0: enabled 1
747 08:57:35.871527 USB3 port 0: enabled 1
748 08:57:35.874030 USB3 port 1: enabled 1
749 08:57:35.876961 USB3 port 2: enabled 0
750 08:57:35.880469 USB3 port 3: enabled 0
751 08:57:35.883872 PCI: 00:0d.1: enabled 0
752 08:57:35.884354 PCI: 00:0d.2: enabled 0
753 08:57:35.887029 GENERIC: 0.0: enabled 1
754 08:57:35.890505 PCI: 00:0d.3: enabled 0
755 08:57:35.894009 PCI: 00:0e.0: enabled 0
756 08:57:35.897303 PCI: 00:10.2: enabled 1
757 08:57:35.897623 PCI: 00:10.6: enabled 0
758 08:57:35.900630 PCI: 00:10.7: enabled 0
759 08:57:35.904315 PCI: 00:12.0: enabled 0
760 08:57:35.907340 PCI: 00:12.6: enabled 0
761 08:57:35.910446 PCI: 00:13.0: enabled 0
762 08:57:35.910797 PCI: 00:14.0: enabled 1
763 08:57:35.913480 USB0 port 0: enabled 1
764 08:57:35.917214 USB2 port 0: enabled 0
765 08:57:35.920357 USB2 port 1: enabled 1
766 08:57:35.923692 USB2 port 2: enabled 1
767 08:57:35.926837 USB2 port 3: enabled 0
768 08:57:35.927154 USB2 port 4: enabled 1
769 08:57:35.930423 USB2 port 5: enabled 0
770 08:57:35.933696 USB2 port 6: enabled 0
771 08:57:35.937026 USB2 port 7: enabled 0
772 08:57:35.939971 USB2 port 8: enabled 0
773 08:57:35.940288 USB2 port 9: enabled 0
774 08:57:35.943756 USB3 port 0: enabled 0
775 08:57:35.946968 USB3 port 1: enabled 1
776 08:57:35.950198 USB3 port 2: enabled 0
777 08:57:35.953506 USB3 port 3: enabled 0
778 08:57:35.957024 PCI: 00:14.1: enabled 0
779 08:57:35.957341 PCI: 00:14.2: enabled 1
780 08:57:35.959894 PCI: 00:14.3: enabled 1
781 08:57:35.963267 GENERIC: 0.0: enabled 1
782 08:57:35.966958 PCI: 00:15.0: enabled 1
783 08:57:35.970069 I2C: 00:1a: enabled 1
784 08:57:35.970389 I2C: 00:31: enabled 1
785 08:57:35.973285 I2C: 00:32: enabled 1
786 08:57:35.976765 PCI: 00:15.1: enabled 1
787 08:57:35.979639 I2C: 00:10: enabled 1
788 08:57:35.983363 PCI: 00:15.2: enabled 1
789 08:57:35.983729 PCI: 00:15.3: enabled 1
790 08:57:35.986347 PCI: 00:16.0: enabled 1
791 08:57:35.990011 PCI: 00:16.1: enabled 0
792 08:57:35.992926 PCI: 00:16.2: enabled 0
793 08:57:35.993244 PCI: 00:16.3: enabled 0
794 08:57:35.996572 PCI: 00:16.4: enabled 0
795 08:57:35.999754 PCI: 00:16.5: enabled 0
796 08:57:36.003301 PCI: 00:17.0: enabled 1
797 08:57:36.006160 PCI: 00:19.0: enabled 0
798 08:57:36.006497 PCI: 00:19.1: enabled 1
799 08:57:36.009432 I2C: 00:15: enabled 1
800 08:57:36.013024 PCI: 00:19.2: enabled 0
801 08:57:36.017158 PCI: 00:1d.0: enabled 1
802 08:57:36.020527 GENERIC: 0.0: enabled 1
803 08:57:36.020845 PCI: 00:1e.0: enabled 1
804 08:57:36.070339 PCI: 00:1e.1: enabled 0
805 08:57:36.070920 PCI: 00:1e.2: enabled 1
806 08:57:36.071671 SPI: 00: enabled 1
807 08:57:36.072068 PCI: 00:1e.3: enabled 1
808 08:57:36.072430 SPI: 00: enabled 1
809 08:57:36.072772 PCI: 00:1f.0: enabled 1
810 08:57:36.073119 PNP: 0c09.0: enabled 1
811 08:57:36.073448 PCI: 00:1f.1: enabled 0
812 08:57:36.073787 PCI: 00:1f.2: enabled 1
813 08:57:36.074101 GENERIC: 0.0: enabled 1
814 08:57:36.074405 GENERIC: 0.0: enabled 1
815 08:57:36.074770 GENERIC: 1.0: enabled 1
816 08:57:36.075406 PCI: 00:1f.3: enabled 1
817 08:57:36.075754 PCI: 00:1f.4: enabled 0
818 08:57:36.076252 PCI: 00:1f.5: enabled 1
819 08:57:36.076581 PCI: 00:1f.6: enabled 0
820 08:57:36.076901 PCI: 00:1f.7: enabled 0
821 08:57:36.077199 CPU_CLUSTER: 0: enabled 1
822 08:57:36.077496 APIC: 00: enabled 1
823 08:57:36.092579 APIC: 01: enabled 1
824 08:57:36.093043 APIC: 03: enabled 1
825 08:57:36.093543 APIC: 05: enabled 1
826 08:57:36.094588 APIC: 07: enabled 1
827 08:57:36.095230 APIC: 06: enabled 1
828 08:57:36.095812 APIC: 02: enabled 1
829 08:57:36.096208 APIC: 04: enabled 1
830 08:57:36.096547 Root Device scanning...
831 08:57:36.097281 scan_static_bus for Root Device
832 08:57:36.097716 DOMAIN: 0000 enabled
833 08:57:36.098954 CPU_CLUSTER: 0 enabled
834 08:57:36.099396 DOMAIN: 0000 scanning...
835 08:57:36.102439 PCI: pci_scan_bus for bus 00
836 08:57:36.105626 PCI: 00:00.0 [8086/0000] ops
837 08:57:36.109054 PCI: 00:00.0 [8086/9a12] enabled
838 08:57:36.112501 PCI: 00:02.0 [8086/0000] bus ops
839 08:57:36.115981 PCI: 00:02.0 [8086/9a40] enabled
840 08:57:36.118946 PCI: 00:04.0 [8086/0000] bus ops
841 08:57:36.122490 PCI: 00:04.0 [8086/9a03] enabled
842 08:57:36.125920 PCI: 00:05.0 [8086/9a19] enabled
843 08:57:36.129255 PCI: 00:07.0 [0000/0000] hidden
844 08:57:36.132926 PCI: 00:08.0 [8086/9a11] enabled
845 08:57:36.135956 PCI: 00:0a.0 [8086/9a0d] disabled
846 08:57:36.138851 PCI: 00:0d.0 [8086/0000] bus ops
847 08:57:36.142510 PCI: 00:0d.0 [8086/9a13] enabled
848 08:57:36.145887 PCI: 00:14.0 [8086/0000] bus ops
849 08:57:36.148978 PCI: 00:14.0 [8086/a0ed] enabled
850 08:57:36.152364 PCI: 00:14.2 [8086/a0ef] enabled
851 08:57:36.155804 PCI: 00:14.3 [8086/0000] bus ops
852 08:57:36.158740 PCI: 00:14.3 [8086/a0f0] enabled
853 08:57:36.162051 PCI: 00:15.0 [8086/0000] bus ops
854 08:57:36.165644 PCI: 00:15.0 [8086/a0e8] enabled
855 08:57:36.169303 PCI: 00:15.1 [8086/0000] bus ops
856 08:57:36.172126 PCI: 00:15.1 [8086/a0e9] enabled
857 08:57:36.175669 PCI: 00:15.2 [8086/0000] bus ops
858 08:57:36.179103 PCI: 00:15.2 [8086/a0ea] enabled
859 08:57:36.181925 PCI: 00:15.3 [8086/0000] bus ops
860 08:57:36.185793 PCI: 00:15.3 [8086/a0eb] enabled
861 08:57:36.188972 PCI: 00:16.0 [8086/0000] ops
862 08:57:36.192007 PCI: 00:16.0 [8086/a0e0] enabled
863 08:57:36.198906 PCI: Static device PCI: 00:17.0 not found, disabling it.
864 08:57:36.201852 PCI: 00:19.0 [8086/0000] bus ops
865 08:57:36.205319 PCI: 00:19.0 [8086/a0c5] disabled
866 08:57:36.208870 PCI: 00:19.1 [8086/0000] bus ops
867 08:57:36.211655 PCI: 00:19.1 [8086/a0c6] enabled
868 08:57:36.215617 PCI: 00:1d.0 [8086/0000] bus ops
869 08:57:36.218413 PCI: 00:1d.0 [8086/a0b0] enabled
870 08:57:36.221905 PCI: 00:1e.0 [8086/0000] ops
871 08:57:36.225025 PCI: 00:1e.0 [8086/a0a8] enabled
872 08:57:36.228192 PCI: 00:1e.2 [8086/0000] bus ops
873 08:57:36.231700 PCI: 00:1e.2 [8086/a0aa] enabled
874 08:57:36.235132 PCI: 00:1e.3 [8086/0000] bus ops
875 08:57:36.238628 PCI: 00:1e.3 [8086/a0ab] enabled
876 08:57:36.241713 PCI: 00:1f.0 [8086/0000] bus ops
877 08:57:36.245126 PCI: 00:1f.0 [8086/a087] enabled
878 08:57:36.245717 RTC Init
879 08:57:36.251854 Set power on after power failure.
880 08:57:36.252304 Disabling Deep S3
881 08:57:36.254905 Disabling Deep S3
882 08:57:36.255349 Disabling Deep S4
883 08:57:36.258493 Disabling Deep S4
884 08:57:36.258970 Disabling Deep S5
885 08:57:36.262014 Disabling Deep S5
886 08:57:36.264544 PCI: 00:1f.2 [0000/0000] hidden
887 08:57:36.267899 PCI: 00:1f.3 [8086/0000] bus ops
888 08:57:36.271522 PCI: 00:1f.3 [8086/a0c8] enabled
889 08:57:36.274953 PCI: 00:1f.5 [8086/0000] bus ops
890 08:57:36.277982 PCI: 00:1f.5 [8086/a0a4] enabled
891 08:57:36.281412 PCI: Leftover static devices:
892 08:57:36.281945 PCI: 00:10.2
893 08:57:36.284410 PCI: 00:10.6
894 08:57:36.284841 PCI: 00:10.7
895 08:57:36.288121 PCI: 00:06.0
896 08:57:36.288552 PCI: 00:07.1
897 08:57:36.288916 PCI: 00:07.2
898 08:57:36.290906 PCI: 00:07.3
899 08:57:36.291336 PCI: 00:09.0
900 08:57:36.294512 PCI: 00:0d.1
901 08:57:36.294985 PCI: 00:0d.2
902 08:57:36.295323 PCI: 00:0d.3
903 08:57:36.298007 PCI: 00:0e.0
904 08:57:36.298435 PCI: 00:12.0
905 08:57:36.301591 PCI: 00:12.6
906 08:57:36.302019 PCI: 00:13.0
907 08:57:36.304660 PCI: 00:14.1
908 08:57:36.305162 PCI: 00:16.1
909 08:57:36.305567 PCI: 00:16.2
910 08:57:36.307618 PCI: 00:16.3
911 08:57:36.308054 PCI: 00:16.4
912 08:57:36.310982 PCI: 00:16.5
913 08:57:36.311416 PCI: 00:17.0
914 08:57:36.311755 PCI: 00:19.2
915 08:57:36.314698 PCI: 00:1e.1
916 08:57:36.315174 PCI: 00:1f.1
917 08:57:36.318084 PCI: 00:1f.4
918 08:57:36.318698 PCI: 00:1f.6
919 08:57:36.321014 PCI: 00:1f.7
920 08:57:36.321448 PCI: Check your devicetree.cb.
921 08:57:36.324366 PCI: 00:02.0 scanning...
922 08:57:36.327576 scan_generic_bus for PCI: 00:02.0
923 08:57:36.334242 scan_generic_bus for PCI: 00:02.0 done
924 08:57:36.337427 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
925 08:57:36.341053 PCI: 00:04.0 scanning...
926 08:57:36.344664 scan_generic_bus for PCI: 00:04.0
927 08:57:36.345203 GENERIC: 0.0 enabled
928 08:57:36.351126 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
929 08:57:36.357693 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
930 08:57:36.361017 PCI: 00:0d.0 scanning...
931 08:57:36.363974 scan_static_bus for PCI: 00:0d.0
932 08:57:36.364413 USB0 port 0 enabled
933 08:57:36.367381 USB0 port 0 scanning...
934 08:57:36.370450 scan_static_bus for USB0 port 0
935 08:57:36.374066 USB3 port 0 enabled
936 08:57:36.374502 USB3 port 1 enabled
937 08:57:36.377187 USB3 port 2 disabled
938 08:57:36.380657 USB3 port 3 disabled
939 08:57:36.381212 USB3 port 0 scanning...
940 08:57:36.383875 scan_static_bus for USB3 port 0
941 08:57:36.387269 scan_static_bus for USB3 port 0 done
942 08:57:36.393925 scan_bus: bus USB3 port 0 finished in 6 msecs
943 08:57:36.397193 USB3 port 1 scanning...
944 08:57:36.400551 scan_static_bus for USB3 port 1
945 08:57:36.403695 scan_static_bus for USB3 port 1 done
946 08:57:36.407069 scan_bus: bus USB3 port 1 finished in 6 msecs
947 08:57:36.410478 scan_static_bus for USB0 port 0 done
948 08:57:36.417175 scan_bus: bus USB0 port 0 finished in 43 msecs
949 08:57:36.420398 scan_static_bus for PCI: 00:0d.0 done
950 08:57:36.423838 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
951 08:57:36.426995 PCI: 00:14.0 scanning...
952 08:57:36.430074 scan_static_bus for PCI: 00:14.0
953 08:57:36.433310 USB0 port 0 enabled
954 08:57:36.433928 USB0 port 0 scanning...
955 08:57:36.437191 scan_static_bus for USB0 port 0
956 08:57:36.440226 USB2 port 0 disabled
957 08:57:36.443750 USB2 port 1 enabled
958 08:57:36.444332 USB2 port 2 enabled
959 08:57:36.447289 USB2 port 3 disabled
960 08:57:36.450773 USB2 port 4 enabled
961 08:57:36.451326 USB2 port 5 disabled
962 08:57:36.453608 USB2 port 6 disabled
963 08:57:36.456385 USB2 port 7 disabled
964 08:57:36.456856 USB2 port 8 disabled
965 08:57:36.459941 USB2 port 9 disabled
966 08:57:36.463405 USB3 port 0 disabled
967 08:57:36.463853 USB3 port 1 enabled
968 08:57:36.466508 USB3 port 2 disabled
969 08:57:36.467020 USB3 port 3 disabled
970 08:57:36.470228 USB2 port 1 scanning...
971 08:57:36.472878 scan_static_bus for USB2 port 1
972 08:57:36.476486 scan_static_bus for USB2 port 1 done
973 08:57:36.483002 scan_bus: bus USB2 port 1 finished in 6 msecs
974 08:57:36.486759 USB2 port 2 scanning...
975 08:57:36.489525 scan_static_bus for USB2 port 2
976 08:57:36.492985 scan_static_bus for USB2 port 2 done
977 08:57:36.496489 scan_bus: bus USB2 port 2 finished in 6 msecs
978 08:57:36.500060 USB2 port 4 scanning...
979 08:57:36.502795 scan_static_bus for USB2 port 4
980 08:57:36.506832 scan_static_bus for USB2 port 4 done
981 08:57:36.509459 scan_bus: bus USB2 port 4 finished in 6 msecs
982 08:57:36.513028 USB3 port 1 scanning...
983 08:57:36.516308 scan_static_bus for USB3 port 1
984 08:57:36.519341 scan_static_bus for USB3 port 1 done
985 08:57:36.526032 scan_bus: bus USB3 port 1 finished in 6 msecs
986 08:57:36.529502 scan_static_bus for USB0 port 0 done
987 08:57:36.532987 scan_bus: bus USB0 port 0 finished in 93 msecs
988 08:57:36.535999 scan_static_bus for PCI: 00:14.0 done
989 08:57:36.542646 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
990 08:57:36.545982 PCI: 00:14.3 scanning...
991 08:57:36.549086 scan_static_bus for PCI: 00:14.3
992 08:57:36.549536 GENERIC: 0.0 enabled
993 08:57:36.552511 scan_static_bus for PCI: 00:14.3 done
994 08:57:36.559238 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
995 08:57:36.562236 PCI: 00:15.0 scanning...
996 08:57:36.565770 scan_static_bus for PCI: 00:15.0
997 08:57:36.566238 I2C: 00:1a enabled
998 08:57:36.569046 I2C: 00:31 enabled
999 08:57:36.572254 I2C: 00:32 enabled
1000 08:57:36.575593 scan_static_bus for PCI: 00:15.0 done
1001 08:57:36.579282 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1002 08:57:36.582002 PCI: 00:15.1 scanning...
1003 08:57:36.585911 scan_static_bus for PCI: 00:15.1
1004 08:57:36.589077 I2C: 00:10 enabled
1005 08:57:36.592110 scan_static_bus for PCI: 00:15.1 done
1006 08:57:36.595553 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1007 08:57:36.599888 PCI: 00:15.2 scanning...
1008 08:57:36.602783 scan_static_bus for PCI: 00:15.2
1009 08:57:36.605828 scan_static_bus for PCI: 00:15.2 done
1010 08:57:36.609763 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1011 08:57:36.612727 PCI: 00:15.3 scanning...
1012 08:57:36.615793 scan_static_bus for PCI: 00:15.3
1013 08:57:36.619109 scan_static_bus for PCI: 00:15.3 done
1014 08:57:36.625705 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1015 08:57:36.629209 PCI: 00:19.1 scanning...
1016 08:57:36.631972 scan_static_bus for PCI: 00:19.1
1017 08:57:36.632411 I2C: 00:15 enabled
1018 08:57:36.635583 scan_static_bus for PCI: 00:19.1 done
1019 08:57:36.641903 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1020 08:57:36.645582 PCI: 00:1d.0 scanning...
1021 08:57:36.649110 do_pci_scan_bridge for PCI: 00:1d.0
1022 08:57:36.652263 PCI: pci_scan_bus for bus 01
1023 08:57:36.655511 PCI: 01:00.0 [1c5c/174a] enabled
1024 08:57:36.656083 GENERIC: 0.0 enabled
1025 08:57:36.662090 Enabling Common Clock Configuration
1026 08:57:36.665036 L1 Sub-State supported from root port 29
1027 08:57:36.668596 L1 Sub-State Support = 0xf
1028 08:57:36.671596 CommonModeRestoreTime = 0x28
1029 08:57:36.675250 Power On Value = 0x16, Power On Scale = 0x0
1030 08:57:36.675825 ASPM: Enabled L1
1031 08:57:36.681906 PCIe: Max_Payload_Size adjusted to 128
1032 08:57:36.685117 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1033 08:57:36.688405 PCI: 00:1e.2 scanning...
1034 08:57:36.691589 scan_generic_bus for PCI: 00:1e.2
1035 08:57:36.692042 SPI: 00 enabled
1036 08:57:36.698325 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1037 08:57:36.704775 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1038 08:57:36.708123 PCI: 00:1e.3 scanning...
1039 08:57:36.711507 scan_generic_bus for PCI: 00:1e.3
1040 08:57:36.711948 SPI: 00 enabled
1041 08:57:36.718463 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1042 08:57:36.721356 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1043 08:57:36.724538 PCI: 00:1f.0 scanning...
1044 08:57:36.727881 scan_static_bus for PCI: 00:1f.0
1045 08:57:36.731112 PNP: 0c09.0 enabled
1046 08:57:36.734866 PNP: 0c09.0 scanning...
1047 08:57:36.737416 scan_static_bus for PNP: 0c09.0
1048 08:57:36.740767 scan_static_bus for PNP: 0c09.0 done
1049 08:57:36.744368 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1050 08:57:36.747521 scan_static_bus for PCI: 00:1f.0 done
1051 08:57:36.753924 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1052 08:57:36.757058 PCI: 00:1f.2 scanning...
1053 08:57:36.761095 scan_static_bus for PCI: 00:1f.2
1054 08:57:36.761602 GENERIC: 0.0 enabled
1055 08:57:36.764317 GENERIC: 0.0 scanning...
1056 08:57:36.766958 scan_static_bus for GENERIC: 0.0
1057 08:57:36.770488 GENERIC: 0.0 enabled
1058 08:57:36.770969 GENERIC: 1.0 enabled
1059 08:57:36.777486 scan_static_bus for GENERIC: 0.0 done
1060 08:57:36.780661 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1061 08:57:36.783837 scan_static_bus for PCI: 00:1f.2 done
1062 08:57:36.790246 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1063 08:57:36.790919 PCI: 00:1f.3 scanning...
1064 08:57:36.793647 scan_static_bus for PCI: 00:1f.3
1065 08:57:36.800200 scan_static_bus for PCI: 00:1f.3 done
1066 08:57:36.803920 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1067 08:57:36.807540 PCI: 00:1f.5 scanning...
1068 08:57:36.810706 scan_generic_bus for PCI: 00:1f.5
1069 08:57:36.813558 scan_generic_bus for PCI: 00:1f.5 done
1070 08:57:36.820604 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1071 08:57:36.823544 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1072 08:57:36.827064 scan_static_bus for Root Device done
1073 08:57:36.833844 scan_bus: bus Root Device finished in 737 msecs
1074 08:57:36.834292 done
1075 08:57:36.839817 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1076 08:57:36.843303 Chrome EC: UHEPI supported
1077 08:57:36.850231 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1078 08:57:36.852803 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1079 08:57:36.859585 SPI flash protection: WPSW=0 SRP0=0
1080 08:57:36.862949 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1081 08:57:36.869734 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1082 08:57:36.872891 found VGA at PCI: 00:02.0
1083 08:57:36.876633 Setting up VGA for PCI: 00:02.0
1084 08:57:36.879762 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1085 08:57:36.886113 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1086 08:57:36.886603 Allocating resources...
1087 08:57:36.889468 Reading resources...
1088 08:57:36.893139 Root Device read_resources bus 0 link: 0
1089 08:57:36.898992 DOMAIN: 0000 read_resources bus 0 link: 0
1090 08:57:36.902366 PCI: 00:04.0 read_resources bus 1 link: 0
1091 08:57:36.909169 PCI: 00:04.0 read_resources bus 1 link: 0 done
1092 08:57:36.912499 PCI: 00:0d.0 read_resources bus 0 link: 0
1093 08:57:36.918676 USB0 port 0 read_resources bus 0 link: 0
1094 08:57:36.922331 USB0 port 0 read_resources bus 0 link: 0 done
1095 08:57:36.929343 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1096 08:57:36.932224 PCI: 00:14.0 read_resources bus 0 link: 0
1097 08:57:36.935720 USB0 port 0 read_resources bus 0 link: 0
1098 08:57:36.942677 USB0 port 0 read_resources bus 0 link: 0 done
1099 08:57:36.946236 PCI: 00:14.0 read_resources bus 0 link: 0 done
1100 08:57:36.952741 PCI: 00:14.3 read_resources bus 0 link: 0
1101 08:57:36.956063 PCI: 00:14.3 read_resources bus 0 link: 0 done
1102 08:57:36.962657 PCI: 00:15.0 read_resources bus 0 link: 0
1103 08:57:36.965786 PCI: 00:15.0 read_resources bus 0 link: 0 done
1104 08:57:36.973058 PCI: 00:15.1 read_resources bus 0 link: 0
1105 08:57:36.975841 PCI: 00:15.1 read_resources bus 0 link: 0 done
1106 08:57:36.983500 PCI: 00:19.1 read_resources bus 0 link: 0
1107 08:57:36.987104 PCI: 00:19.1 read_resources bus 0 link: 0 done
1108 08:57:36.993581 PCI: 00:1d.0 read_resources bus 1 link: 0
1109 08:57:36.996783 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1110 08:57:37.003482 PCI: 00:1e.2 read_resources bus 2 link: 0
1111 08:57:37.006557 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1112 08:57:37.013809 PCI: 00:1e.3 read_resources bus 3 link: 0
1113 08:57:37.016645 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1114 08:57:37.023374 PCI: 00:1f.0 read_resources bus 0 link: 0
1115 08:57:37.026371 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1116 08:57:37.030149 PCI: 00:1f.2 read_resources bus 0 link: 0
1117 08:57:37.036883 GENERIC: 0.0 read_resources bus 0 link: 0
1118 08:57:37.039859 GENERIC: 0.0 read_resources bus 0 link: 0 done
1119 08:57:37.046758 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1120 08:57:37.053321 DOMAIN: 0000 read_resources bus 0 link: 0 done
1121 08:57:37.056394 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1122 08:57:37.063211 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1123 08:57:37.066331 Root Device read_resources bus 0 link: 0 done
1124 08:57:37.069521 Done reading resources.
1125 08:57:37.072894 Show resources in subtree (Root Device)...After reading.
1126 08:57:37.079611 Root Device child on link 0 DOMAIN: 0000
1127 08:57:37.082710 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1128 08:57:37.093069 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1129 08:57:37.102511 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1130 08:57:37.103021 PCI: 00:00.0
1131 08:57:37.112968 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1132 08:57:37.122686 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1133 08:57:37.133047 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1134 08:57:37.142742 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1135 08:57:37.152543 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1136 08:57:37.158819 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1137 08:57:37.168920 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1138 08:57:37.178768 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1139 08:57:37.188745 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1140 08:57:37.198496 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1141 08:57:37.208584 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1142 08:57:37.215750 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1143 08:57:37.225437 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1144 08:57:37.235533 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1145 08:57:37.245147 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1146 08:57:37.255054 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1147 08:57:37.265156 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1148 08:57:37.275052 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1149 08:57:37.281580 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1150 08:57:37.291828 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1151 08:57:37.295145 PCI: 00:02.0
1152 08:57:37.304749 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1153 08:57:37.314581 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1154 08:57:37.324906 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1155 08:57:37.327777 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1156 08:57:37.338188 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1157 08:57:37.338839 GENERIC: 0.0
1158 08:57:37.341530 PCI: 00:05.0
1159 08:57:37.351430 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1160 08:57:37.354292 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1161 08:57:37.357514 GENERIC: 0.0
1162 08:57:37.357963 PCI: 00:08.0
1163 08:57:37.367411 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 08:57:37.371149 PCI: 00:0a.0
1165 08:57:37.374469 PCI: 00:0d.0 child on link 0 USB0 port 0
1166 08:57:37.383933 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1167 08:57:37.391321 USB0 port 0 child on link 0 USB3 port 0
1168 08:57:37.391767 USB3 port 0
1169 08:57:37.393820 USB3 port 1
1170 08:57:37.394325 USB3 port 2
1171 08:57:37.397433 USB3 port 3
1172 08:57:37.400424 PCI: 00:14.0 child on link 0 USB0 port 0
1173 08:57:37.410797 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1174 08:57:37.417274 USB0 port 0 child on link 0 USB2 port 0
1175 08:57:37.417719 USB2 port 0
1176 08:57:37.420864 USB2 port 1
1177 08:57:37.421307 USB2 port 2
1178 08:57:37.423963 USB2 port 3
1179 08:57:37.424408 USB2 port 4
1180 08:57:37.427124 USB2 port 5
1181 08:57:37.427592 USB2 port 6
1182 08:57:37.430652 USB2 port 7
1183 08:57:37.431133 USB2 port 8
1184 08:57:37.434026 USB2 port 9
1185 08:57:37.434468 USB3 port 0
1186 08:57:37.437281 USB3 port 1
1187 08:57:37.437727 USB3 port 2
1188 08:57:37.440395 USB3 port 3
1189 08:57:37.440842 PCI: 00:14.2
1190 08:57:37.450137 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 08:57:37.460166 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 08:57:37.466951 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1193 08:57:37.476635 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1194 08:57:37.477097 GENERIC: 0.0
1195 08:57:37.483769 PCI: 00:15.0 child on link 0 I2C: 00:1a
1196 08:57:37.493138 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 08:57:37.493688 I2C: 00:1a
1198 08:57:37.496500 I2C: 00:31
1199 08:57:37.497099 I2C: 00:32
1200 08:57:37.499822 PCI: 00:15.1 child on link 0 I2C: 00:10
1201 08:57:37.510014 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 08:57:37.513395 I2C: 00:10
1203 08:57:37.513995 PCI: 00:15.2
1204 08:57:37.523540 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 08:57:37.526464 PCI: 00:15.3
1206 08:57:37.536174 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 08:57:37.536621 PCI: 00:16.0
1208 08:57:37.546552 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 08:57:37.549825 PCI: 00:19.0
1210 08:57:37.552859 PCI: 00:19.1 child on link 0 I2C: 00:15
1211 08:57:37.562650 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 08:57:37.566233 I2C: 00:15
1213 08:57:37.569628 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1214 08:57:37.579941 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1215 08:57:37.589438 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1216 08:57:37.596010 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1217 08:57:37.599504 GENERIC: 0.0
1218 08:57:37.600109 PCI: 01:00.0
1219 08:57:37.609302 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 08:57:37.618997 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1221 08:57:37.629182 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1222 08:57:37.632165 PCI: 00:1e.0
1223 08:57:37.642326 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 08:57:37.645765 PCI: 00:1e.2 child on link 0 SPI: 00
1225 08:57:37.655850 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 08:57:37.658791 SPI: 00
1227 08:57:37.661813 PCI: 00:1e.3 child on link 0 SPI: 00
1228 08:57:37.672007 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 08:57:37.672479 SPI: 00
1230 08:57:37.678423 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 08:57:37.684985 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 08:57:37.689198 PNP: 0c09.0
1233 08:57:37.695300 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 08:57:37.701776 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 08:57:37.711270 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 08:57:37.717943 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 08:57:37.725160 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 08:57:37.725538 GENERIC: 0.0
1239 08:57:37.728295 GENERIC: 1.0
1240 08:57:37.728611 PCI: 00:1f.3
1241 08:57:37.738230 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 08:57:37.748069 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 08:57:37.751072 PCI: 00:1f.5
1244 08:57:37.761033 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 08:57:37.764711 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 08:57:37.765122 APIC: 00
1247 08:57:37.768146 APIC: 01
1248 08:57:37.768462 APIC: 03
1249 08:57:37.768711 APIC: 05
1250 08:57:37.770910 APIC: 07
1251 08:57:37.771226 APIC: 06
1252 08:57:37.774311 APIC: 02
1253 08:57:37.774650 APIC: 04
1254 08:57:37.781102 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 08:57:37.787501 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 08:57:37.794105 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 08:57:37.800819 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 08:57:37.804082 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 08:57:37.807265 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1260 08:57:37.814089 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1261 08:57:37.820746 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1262 08:57:37.827311 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1263 08:57:37.833778 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1264 08:57:37.840881 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1265 08:57:37.847414 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1266 08:57:37.857371 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1267 08:57:37.864480 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1268 08:57:37.870974 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1269 08:57:37.873626 DOMAIN: 0000: Resource ranges:
1270 08:57:37.877362 * Base: 1000, Size: 800, Tag: 100
1271 08:57:37.880464 * Base: 1900, Size: e700, Tag: 100
1272 08:57:37.886608 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1273 08:57:37.893732 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1274 08:57:37.900223 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1275 08:57:37.906934 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1276 08:57:37.917125 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1277 08:57:37.923522 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1278 08:57:37.930144 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1279 08:57:37.939971 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1280 08:57:37.946413 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1281 08:57:37.953160 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1282 08:57:37.962916 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1283 08:57:37.969709 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1284 08:57:37.976472 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1285 08:57:37.986543 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1286 08:57:37.992853 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1287 08:57:37.999778 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1288 08:57:38.009623 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1289 08:57:38.016342 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1290 08:57:38.022693 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1291 08:57:38.032628 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1292 08:57:38.039049 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1293 08:57:38.045750 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1294 08:57:38.055845 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1295 08:57:38.061967 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1296 08:57:38.069094 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1297 08:57:38.071890 DOMAIN: 0000: Resource ranges:
1298 08:57:38.078912 * Base: 7fc00000, Size: 40400000, Tag: 200
1299 08:57:38.081847 * Base: d0000000, Size: 28000000, Tag: 200
1300 08:57:38.085336 * Base: fa000000, Size: 1000000, Tag: 200
1301 08:57:38.092129 * Base: fb001000, Size: 2fff000, Tag: 200
1302 08:57:38.095002 * Base: fe010000, Size: 2e000, Tag: 200
1303 08:57:38.098360 * Base: fe03f000, Size: d41000, Tag: 200
1304 08:57:38.102282 * Base: fed88000, Size: 8000, Tag: 200
1305 08:57:38.105159 * Base: fed93000, Size: d000, Tag: 200
1306 08:57:38.111569 * Base: feda2000, Size: 1e000, Tag: 200
1307 08:57:38.114970 * Base: fede0000, Size: 1220000, Tag: 200
1308 08:57:38.122037 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1309 08:57:38.128280 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1310 08:57:38.134870 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1311 08:57:38.141620 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1312 08:57:38.148077 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1313 08:57:38.154795 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1314 08:57:38.161812 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1315 08:57:38.168341 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1316 08:57:38.174673 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1317 08:57:38.181136 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1318 08:57:38.187558 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1319 08:57:38.194304 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1320 08:57:38.201337 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1321 08:57:38.207769 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1322 08:57:38.214131 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1323 08:57:38.220484 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1324 08:57:38.227287 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1325 08:57:38.234073 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1326 08:57:38.240809 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1327 08:57:38.247404 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1328 08:57:38.253650 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1329 08:57:38.260766 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1330 08:57:38.267128 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1331 08:57:38.273766 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1332 08:57:38.280629 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1333 08:57:38.283478 PCI: 00:1d.0: Resource ranges:
1334 08:57:38.290395 * Base: 7fc00000, Size: 100000, Tag: 200
1335 08:57:38.297091 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1336 08:57:38.303451 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1337 08:57:38.310387 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1338 08:57:38.316862 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1339 08:57:38.323158 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1340 08:57:38.329855 Root Device assign_resources, bus 0 link: 0
1341 08:57:38.333423 DOMAIN: 0000 assign_resources, bus 0 link: 0
1342 08:57:38.343046 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1343 08:57:38.350230 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1344 08:57:38.359872 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1345 08:57:38.366151 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1346 08:57:38.369586 PCI: 00:04.0 assign_resources, bus 1 link: 0
1347 08:57:38.376260 PCI: 00:04.0 assign_resources, bus 1 link: 0
1348 08:57:38.382629 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1349 08:57:38.392545 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1350 08:57:38.399384 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1351 08:57:38.406241 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1352 08:57:38.409002 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1353 08:57:38.418911 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1354 08:57:38.422193 PCI: 00:14.0 assign_resources, bus 0 link: 0
1355 08:57:38.426037 PCI: 00:14.0 assign_resources, bus 0 link: 0
1356 08:57:38.435967 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1357 08:57:38.442229 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1358 08:57:38.451950 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1359 08:57:38.455324 PCI: 00:14.3 assign_resources, bus 0 link: 0
1360 08:57:38.461924 PCI: 00:14.3 assign_resources, bus 0 link: 0
1361 08:57:38.468677 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1362 08:57:38.475708 PCI: 00:15.0 assign_resources, bus 0 link: 0
1363 08:57:38.478863 PCI: 00:15.0 assign_resources, bus 0 link: 0
1364 08:57:38.485207 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1365 08:57:38.491999 PCI: 00:15.1 assign_resources, bus 0 link: 0
1366 08:57:38.495006 PCI: 00:15.1 assign_resources, bus 0 link: 0
1367 08:57:38.505051 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1368 08:57:38.511630 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1369 08:57:38.521718 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1370 08:57:38.528369 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1371 08:57:38.534553 PCI: 00:19.1 assign_resources, bus 0 link: 0
1372 08:57:38.537916 PCI: 00:19.1 assign_resources, bus 0 link: 0
1373 08:57:38.548671 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1374 08:57:38.558080 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1375 08:57:38.564484 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1376 08:57:38.571008 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1377 08:57:38.577749 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1378 08:57:38.584294 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1379 08:57:38.594164 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1380 08:57:38.597751 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1381 08:57:38.607516 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1382 08:57:38.610914 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1383 08:57:38.617265 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1384 08:57:38.624102 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1385 08:57:38.627766 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1386 08:57:38.634132 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1387 08:57:38.637463 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1388 08:57:38.643749 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1389 08:57:38.646990 LPC: Trying to open IO window from 800 size 1ff
1390 08:57:38.657293 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1391 08:57:38.663907 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1392 08:57:38.673495 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1393 08:57:38.676848 DOMAIN: 0000 assign_resources, bus 0 link: 0
1394 08:57:38.684307 Root Device assign_resources, bus 0 link: 0
1395 08:57:38.684880 Done setting resources.
1396 08:57:38.690222 Show resources in subtree (Root Device)...After assigning values.
1397 08:57:38.696702 Root Device child on link 0 DOMAIN: 0000
1398 08:57:38.700048 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1399 08:57:38.709883 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1400 08:57:38.719763 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1401 08:57:38.720216 PCI: 00:00.0
1402 08:57:38.729710 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1403 08:57:38.739640 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1404 08:57:38.750497 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1405 08:57:38.760128 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1406 08:57:38.766117 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1407 08:57:38.775864 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1408 08:57:38.786293 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1409 08:57:38.796019 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1410 08:57:38.805818 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1411 08:57:38.816043 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1412 08:57:38.822375 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1413 08:57:38.832266 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1414 08:57:38.842365 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1415 08:57:38.851838 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1416 08:57:38.862263 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1417 08:57:38.872252 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1418 08:57:38.881826 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1419 08:57:38.888902 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1420 08:57:38.898777 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1421 08:57:38.908615 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1422 08:57:38.912133 PCI: 00:02.0
1423 08:57:38.921402 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1424 08:57:38.931590 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1425 08:57:38.941859 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1426 08:57:38.945358 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1427 08:57:38.954787 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1428 08:57:38.958393 GENERIC: 0.0
1429 08:57:38.958864 PCI: 00:05.0
1430 08:57:38.971448 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1431 08:57:38.974772 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1432 08:57:38.977659 GENERIC: 0.0
1433 08:57:38.978100 PCI: 00:08.0
1434 08:57:38.987787 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1435 08:57:38.991406 PCI: 00:0a.0
1436 08:57:38.994603 PCI: 00:0d.0 child on link 0 USB0 port 0
1437 08:57:39.004016 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1438 08:57:39.007414 USB0 port 0 child on link 0 USB3 port 0
1439 08:57:39.010970 USB3 port 0
1440 08:57:39.013993 USB3 port 1
1441 08:57:39.014509 USB3 port 2
1442 08:57:39.017700 USB3 port 3
1443 08:57:39.021225 PCI: 00:14.0 child on link 0 USB0 port 0
1444 08:57:39.030937 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1445 08:57:39.033896 USB0 port 0 child on link 0 USB2 port 0
1446 08:57:39.037180 USB2 port 0
1447 08:57:39.037759 USB2 port 1
1448 08:57:39.040555 USB2 port 2
1449 08:57:39.043703 USB2 port 3
1450 08:57:39.044282 USB2 port 4
1451 08:57:39.047261 USB2 port 5
1452 08:57:39.047698 USB2 port 6
1453 08:57:39.050828 USB2 port 7
1454 08:57:39.051268 USB2 port 8
1455 08:57:39.053921 USB2 port 9
1456 08:57:39.054358 USB3 port 0
1457 08:57:39.057304 USB3 port 1
1458 08:57:39.057749 USB3 port 2
1459 08:57:39.060633 USB3 port 3
1460 08:57:39.061093 PCI: 00:14.2
1461 08:57:39.073431 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1462 08:57:39.083818 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1463 08:57:39.086814 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1464 08:57:39.097266 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1465 08:57:39.100231 GENERIC: 0.0
1466 08:57:39.103565 PCI: 00:15.0 child on link 0 I2C: 00:1a
1467 08:57:39.113437 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1468 08:57:39.116988 I2C: 00:1a
1469 08:57:39.117568 I2C: 00:31
1470 08:57:39.118089 I2C: 00:32
1471 08:57:39.123363 PCI: 00:15.1 child on link 0 I2C: 00:10
1472 08:57:39.133155 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1473 08:57:39.133726 I2C: 00:10
1474 08:57:39.136428 PCI: 00:15.2
1475 08:57:39.146626 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1476 08:57:39.147043 PCI: 00:15.3
1477 08:57:39.159915 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1478 08:57:39.160296 PCI: 00:16.0
1479 08:57:39.169433 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1480 08:57:39.172765 PCI: 00:19.0
1481 08:57:39.175995 PCI: 00:19.1 child on link 0 I2C: 00:15
1482 08:57:39.186068 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1483 08:57:39.189307 I2C: 00:15
1484 08:57:39.192944 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1485 08:57:39.203118 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1486 08:57:39.212790 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1487 08:57:39.222447 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1488 08:57:39.225993 GENERIC: 0.0
1489 08:57:39.229109 PCI: 01:00.0
1490 08:57:39.239377 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1491 08:57:39.249076 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1492 08:57:39.259376 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1493 08:57:39.262433 PCI: 00:1e.0
1494 08:57:39.272009 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1495 08:57:39.275341 PCI: 00:1e.2 child on link 0 SPI: 00
1496 08:57:39.285610 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1497 08:57:39.289107 SPI: 00
1498 08:57:39.291972 PCI: 00:1e.3 child on link 0 SPI: 00
1499 08:57:39.302048 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1500 08:57:39.302468 SPI: 00
1501 08:57:39.308435 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1502 08:57:39.315211 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1503 08:57:39.318624 PNP: 0c09.0
1504 08:57:39.325058 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1505 08:57:39.332355 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1506 08:57:39.341470 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1507 08:57:39.348220 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1508 08:57:39.354793 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1509 08:57:39.355209 GENERIC: 0.0
1510 08:57:39.358596 GENERIC: 1.0
1511 08:57:39.359137 PCI: 00:1f.3
1512 08:57:39.371285 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1513 08:57:39.381647 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1514 08:57:39.382121 PCI: 00:1f.5
1515 08:57:39.391171 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1516 08:57:39.397833 CPU_CLUSTER: 0 child on link 0 APIC: 00
1517 08:57:39.398283 APIC: 00
1518 08:57:39.398713 APIC: 01
1519 08:57:39.401570 APIC: 03
1520 08:57:39.402035 APIC: 05
1521 08:57:39.404676 APIC: 07
1522 08:57:39.405167 APIC: 06
1523 08:57:39.405500 APIC: 02
1524 08:57:39.407976 APIC: 04
1525 08:57:39.411302 Done allocating resources.
1526 08:57:39.414512 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1527 08:57:39.421396 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1528 08:57:39.425063 Configure GPIOs for I2S audio on UP4.
1529 08:57:39.432091 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1530 08:57:39.435938 Enabling resources...
1531 08:57:39.439235 PCI: 00:00.0 subsystem <- 8086/9a12
1532 08:57:39.442287 PCI: 00:00.0 cmd <- 06
1533 08:57:39.445833 PCI: 00:02.0 subsystem <- 8086/9a40
1534 08:57:39.448625 PCI: 00:02.0 cmd <- 03
1535 08:57:39.451842 PCI: 00:04.0 subsystem <- 8086/9a03
1536 08:57:39.455237 PCI: 00:04.0 cmd <- 02
1537 08:57:39.458476 PCI: 00:05.0 subsystem <- 8086/9a19
1538 08:57:39.458932 PCI: 00:05.0 cmd <- 02
1539 08:57:39.465111 PCI: 00:08.0 subsystem <- 8086/9a11
1540 08:57:39.465593 PCI: 00:08.0 cmd <- 06
1541 08:57:39.468955 PCI: 00:0d.0 subsystem <- 8086/9a13
1542 08:57:39.471658 PCI: 00:0d.0 cmd <- 02
1543 08:57:39.475300 PCI: 00:14.0 subsystem <- 8086/a0ed
1544 08:57:39.478869 PCI: 00:14.0 cmd <- 02
1545 08:57:39.482476 PCI: 00:14.2 subsystem <- 8086/a0ef
1546 08:57:39.485169 PCI: 00:14.2 cmd <- 02
1547 08:57:39.488391 PCI: 00:14.3 subsystem <- 8086/a0f0
1548 08:57:39.491489 PCI: 00:14.3 cmd <- 02
1549 08:57:39.494931 PCI: 00:15.0 subsystem <- 8086/a0e8
1550 08:57:39.498263 PCI: 00:15.0 cmd <- 02
1551 08:57:39.501720 PCI: 00:15.1 subsystem <- 8086/a0e9
1552 08:57:39.505033 PCI: 00:15.1 cmd <- 02
1553 08:57:39.508159 PCI: 00:15.2 subsystem <- 8086/a0ea
1554 08:57:39.508572 PCI: 00:15.2 cmd <- 02
1555 08:57:39.515117 PCI: 00:15.3 subsystem <- 8086/a0eb
1556 08:57:39.515529 PCI: 00:15.3 cmd <- 02
1557 08:57:39.518156 PCI: 00:16.0 subsystem <- 8086/a0e0
1558 08:57:39.521389 PCI: 00:16.0 cmd <- 02
1559 08:57:39.524884 PCI: 00:19.1 subsystem <- 8086/a0c6
1560 08:57:39.528154 PCI: 00:19.1 cmd <- 02
1561 08:57:39.531830 PCI: 00:1d.0 bridge ctrl <- 0013
1562 08:57:39.534693 PCI: 00:1d.0 subsystem <- 8086/a0b0
1563 08:57:39.538666 PCI: 00:1d.0 cmd <- 06
1564 08:57:39.541359 PCI: 00:1e.0 subsystem <- 8086/a0a8
1565 08:57:39.544470 PCI: 00:1e.0 cmd <- 06
1566 08:57:39.548201 PCI: 00:1e.2 subsystem <- 8086/a0aa
1567 08:57:39.551956 PCI: 00:1e.2 cmd <- 06
1568 08:57:39.554769 PCI: 00:1e.3 subsystem <- 8086/a0ab
1569 08:57:39.557704 PCI: 00:1e.3 cmd <- 02
1570 08:57:39.561497 PCI: 00:1f.0 subsystem <- 8086/a087
1571 08:57:39.564769 PCI: 00:1f.0 cmd <- 407
1572 08:57:39.567588 PCI: 00:1f.3 subsystem <- 8086/a0c8
1573 08:57:39.568186 PCI: 00:1f.3 cmd <- 02
1574 08:57:39.574123 PCI: 00:1f.5 subsystem <- 8086/a0a4
1575 08:57:39.574668 PCI: 00:1f.5 cmd <- 406
1576 08:57:39.580091 PCI: 01:00.0 cmd <- 02
1577 08:57:39.584463 done.
1578 08:57:39.587699 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1579 08:57:39.590869 Initializing devices...
1580 08:57:39.594187 Root Device init
1581 08:57:39.597884 Chrome EC: Set SMI mask to 0x0000000000000000
1582 08:57:39.604547 Chrome EC: clear events_b mask to 0x0000000000000000
1583 08:57:39.611425 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1584 08:57:39.617811 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1585 08:57:39.624582 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1586 08:57:39.627843 Chrome EC: Set WAKE mask to 0x0000000000000000
1587 08:57:39.635734 fw_config match found: DB_USB=USB3_ACTIVE
1588 08:57:39.638983 Configure Right Type-C port orientation for retimer
1589 08:57:39.641907 Root Device init finished in 46 msecs
1590 08:57:39.645931 PCI: 00:00.0 init
1591 08:57:39.649745 CPU TDP = 9 Watts
1592 08:57:39.650240 CPU PL1 = 9 Watts
1593 08:57:39.652795 CPU PL2 = 40 Watts
1594 08:57:39.656336 CPU PL4 = 83 Watts
1595 08:57:39.659366 PCI: 00:00.0 init finished in 8 msecs
1596 08:57:39.659862 PCI: 00:02.0 init
1597 08:57:39.662890 GMA: Found VBT in CBFS
1598 08:57:39.666206 GMA: Found valid VBT in CBFS
1599 08:57:39.673063 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1600 08:57:39.679177 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1601 08:57:39.683291 PCI: 00:02.0 init finished in 18 msecs
1602 08:57:39.686367 PCI: 00:05.0 init
1603 08:57:39.689158 PCI: 00:05.0 init finished in 0 msecs
1604 08:57:39.692709 PCI: 00:08.0 init
1605 08:57:39.695925 PCI: 00:08.0 init finished in 0 msecs
1606 08:57:39.699069 PCI: 00:14.0 init
1607 08:57:39.702644 PCI: 00:14.0 init finished in 0 msecs
1608 08:57:39.705881 PCI: 00:14.2 init
1609 08:57:39.709187 PCI: 00:14.2 init finished in 0 msecs
1610 08:57:39.712451 PCI: 00:15.0 init
1611 08:57:39.713161 I2C bus 0 version 0x3230302a
1612 08:57:39.719043 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1613 08:57:39.722343 PCI: 00:15.0 init finished in 6 msecs
1614 08:57:39.722949 PCI: 00:15.1 init
1615 08:57:39.725744 I2C bus 1 version 0x3230302a
1616 08:57:39.729035 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1617 08:57:39.735832 PCI: 00:15.1 init finished in 6 msecs
1618 08:57:39.736330 PCI: 00:15.2 init
1619 08:57:39.738660 I2C bus 2 version 0x3230302a
1620 08:57:39.742369 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1621 08:57:39.745310 PCI: 00:15.2 init finished in 6 msecs
1622 08:57:39.748812 PCI: 00:15.3 init
1623 08:57:39.751746 I2C bus 3 version 0x3230302a
1624 08:57:39.755236 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1625 08:57:39.758810 PCI: 00:15.3 init finished in 6 msecs
1626 08:57:39.762133 PCI: 00:16.0 init
1627 08:57:39.765456 PCI: 00:16.0 init finished in 0 msecs
1628 08:57:39.768740 PCI: 00:19.1 init
1629 08:57:39.771885 I2C bus 5 version 0x3230302a
1630 08:57:39.775381 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1631 08:57:39.778812 PCI: 00:19.1 init finished in 6 msecs
1632 08:57:39.782118 PCI: 00:1d.0 init
1633 08:57:39.785028 Initializing PCH PCIe bridge.
1634 08:57:39.788268 PCI: 00:1d.0 init finished in 3 msecs
1635 08:57:39.791929 PCI: 00:1f.0 init
1636 08:57:39.794896 IOAPIC: Initializing IOAPIC at 0xfec00000
1637 08:57:39.798247 IOAPIC: Bootstrap Processor Local APIC = 0x00
1638 08:57:39.801631 IOAPIC: ID = 0x02
1639 08:57:39.804713 IOAPIC: Dumping registers
1640 08:57:39.805328 reg 0x0000: 0x02000000
1641 08:57:39.808221 reg 0x0001: 0x00770020
1642 08:57:39.811715 reg 0x0002: 0x00000000
1643 08:57:39.814847 PCI: 00:1f.0 init finished in 21 msecs
1644 08:57:39.818364 PCI: 00:1f.2 init
1645 08:57:39.821648 Disabling ACPI via APMC.
1646 08:57:39.825038 APMC done.
1647 08:57:39.828213 PCI: 00:1f.2 init finished in 5 msecs
1648 08:57:39.839521 PCI: 01:00.0 init
1649 08:57:39.842347 PCI: 01:00.0 init finished in 0 msecs
1650 08:57:39.846085 PNP: 0c09.0 init
1651 08:57:39.849226 Google Chrome EC uptime: 8.373 seconds
1652 08:57:39.855889 Google Chrome AP resets since EC boot: 1
1653 08:57:39.859091 Google Chrome most recent AP reset causes:
1654 08:57:39.861927 0.346: 32775 shutdown: entering G3
1655 08:57:39.869077 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1656 08:57:39.872058 PNP: 0c09.0 init finished in 22 msecs
1657 08:57:39.877829 Devices initialized
1658 08:57:39.881255 Show all devs... After init.
1659 08:57:39.884595 Root Device: enabled 1
1660 08:57:39.884686 DOMAIN: 0000: enabled 1
1661 08:57:39.887672 CPU_CLUSTER: 0: enabled 1
1662 08:57:39.891285 PCI: 00:00.0: enabled 1
1663 08:57:39.894652 PCI: 00:02.0: enabled 1
1664 08:57:39.894750 PCI: 00:04.0: enabled 1
1665 08:57:39.897666 PCI: 00:05.0: enabled 1
1666 08:57:39.901239 PCI: 00:06.0: enabled 0
1667 08:57:39.904380 PCI: 00:07.0: enabled 0
1668 08:57:39.904479 PCI: 00:07.1: enabled 0
1669 08:57:39.907665 PCI: 00:07.2: enabled 0
1670 08:57:39.911087 PCI: 00:07.3: enabled 0
1671 08:57:39.914332 PCI: 00:08.0: enabled 1
1672 08:57:39.914425 PCI: 00:09.0: enabled 0
1673 08:57:39.917852 PCI: 00:0a.0: enabled 0
1674 08:57:39.921124 PCI: 00:0d.0: enabled 1
1675 08:57:39.924512 PCI: 00:0d.1: enabled 0
1676 08:57:39.924617 PCI: 00:0d.2: enabled 0
1677 08:57:39.927726 PCI: 00:0d.3: enabled 0
1678 08:57:39.931399 PCI: 00:0e.0: enabled 0
1679 08:57:39.931490 PCI: 00:10.2: enabled 1
1680 08:57:39.934109 PCI: 00:10.6: enabled 0
1681 08:57:39.937528 PCI: 00:10.7: enabled 0
1682 08:57:39.940796 PCI: 00:12.0: enabled 0
1683 08:57:39.940900 PCI: 00:12.6: enabled 0
1684 08:57:39.944235 PCI: 00:13.0: enabled 0
1685 08:57:39.947907 PCI: 00:14.0: enabled 1
1686 08:57:39.950831 PCI: 00:14.1: enabled 0
1687 08:57:39.950924 PCI: 00:14.2: enabled 1
1688 08:57:39.954379 PCI: 00:14.3: enabled 1
1689 08:57:39.957381 PCI: 00:15.0: enabled 1
1690 08:57:39.961141 PCI: 00:15.1: enabled 1
1691 08:57:39.961232 PCI: 00:15.2: enabled 1
1692 08:57:39.964367 PCI: 00:15.3: enabled 1
1693 08:57:39.967482 PCI: 00:16.0: enabled 1
1694 08:57:39.967582 PCI: 00:16.1: enabled 0
1695 08:57:39.970797 PCI: 00:16.2: enabled 0
1696 08:57:39.974490 PCI: 00:16.3: enabled 0
1697 08:57:39.977729 PCI: 00:16.4: enabled 0
1698 08:57:39.977816 PCI: 00:16.5: enabled 0
1699 08:57:39.980664 PCI: 00:17.0: enabled 0
1700 08:57:39.984328 PCI: 00:19.0: enabled 0
1701 08:57:39.987320 PCI: 00:19.1: enabled 1
1702 08:57:39.987501 PCI: 00:19.2: enabled 0
1703 08:57:39.990713 PCI: 00:1c.0: enabled 1
1704 08:57:39.994175 PCI: 00:1c.1: enabled 0
1705 08:57:39.997561 PCI: 00:1c.2: enabled 0
1706 08:57:39.997657 PCI: 00:1c.3: enabled 0
1707 08:57:40.000986 PCI: 00:1c.4: enabled 0
1708 08:57:40.003771 PCI: 00:1c.5: enabled 0
1709 08:57:40.007630 PCI: 00:1c.6: enabled 1
1710 08:57:40.007736 PCI: 00:1c.7: enabled 0
1711 08:57:40.010926 PCI: 00:1d.0: enabled 1
1712 08:57:40.014309 PCI: 00:1d.1: enabled 0
1713 08:57:40.014401 PCI: 00:1d.2: enabled 1
1714 08:57:40.017324 PCI: 00:1d.3: enabled 0
1715 08:57:40.020756 PCI: 00:1e.0: enabled 1
1716 08:57:40.023923 PCI: 00:1e.1: enabled 0
1717 08:57:40.024036 PCI: 00:1e.2: enabled 1
1718 08:57:40.027221 PCI: 00:1e.3: enabled 1
1719 08:57:40.030655 PCI: 00:1f.0: enabled 1
1720 08:57:40.034020 PCI: 00:1f.1: enabled 0
1721 08:57:40.034108 PCI: 00:1f.2: enabled 1
1722 08:57:40.037089 PCI: 00:1f.3: enabled 1
1723 08:57:40.040616 PCI: 00:1f.4: enabled 0
1724 08:57:40.043870 PCI: 00:1f.5: enabled 1
1725 08:57:40.044065 PCI: 00:1f.6: enabled 0
1726 08:57:40.047098 PCI: 00:1f.7: enabled 0
1727 08:57:40.050724 APIC: 00: enabled 1
1728 08:57:40.050848 GENERIC: 0.0: enabled 1
1729 08:57:40.054094 GENERIC: 0.0: enabled 1
1730 08:57:40.056855 GENERIC: 1.0: enabled 1
1731 08:57:40.060485 GENERIC: 0.0: enabled 1
1732 08:57:40.060573 GENERIC: 1.0: enabled 1
1733 08:57:40.063951 USB0 port 0: enabled 1
1734 08:57:40.066795 GENERIC: 0.0: enabled 1
1735 08:57:40.066881 USB0 port 0: enabled 1
1736 08:57:40.070509 GENERIC: 0.0: enabled 1
1737 08:57:40.073517 I2C: 00:1a: enabled 1
1738 08:57:40.077662 I2C: 00:31: enabled 1
1739 08:57:40.077813 I2C: 00:32: enabled 1
1740 08:57:40.080846 I2C: 00:10: enabled 1
1741 08:57:40.083685 I2C: 00:15: enabled 1
1742 08:57:40.083840 GENERIC: 0.0: enabled 0
1743 08:57:40.087178 GENERIC: 1.0: enabled 0
1744 08:57:40.090208 GENERIC: 0.0: enabled 1
1745 08:57:40.090307 SPI: 00: enabled 1
1746 08:57:40.093347 SPI: 00: enabled 1
1747 08:57:40.096742 PNP: 0c09.0: enabled 1
1748 08:57:40.096876 GENERIC: 0.0: enabled 1
1749 08:57:40.100283 USB3 port 0: enabled 1
1750 08:57:40.103682 USB3 port 1: enabled 1
1751 08:57:40.106660 USB3 port 2: enabled 0
1752 08:57:40.106805 USB3 port 3: enabled 0
1753 08:57:40.110342 USB2 port 0: enabled 0
1754 08:57:40.113204 USB2 port 1: enabled 1
1755 08:57:40.113364 USB2 port 2: enabled 1
1756 08:57:40.116525 USB2 port 3: enabled 0
1757 08:57:40.119833 USB2 port 4: enabled 1
1758 08:57:40.123116 USB2 port 5: enabled 0
1759 08:57:40.123450 USB2 port 6: enabled 0
1760 08:57:40.126422 USB2 port 7: enabled 0
1761 08:57:40.129836 USB2 port 8: enabled 0
1762 08:57:40.130265 USB2 port 9: enabled 0
1763 08:57:40.133565 USB3 port 0: enabled 0
1764 08:57:40.136797 USB3 port 1: enabled 1
1765 08:57:40.139809 USB3 port 2: enabled 0
1766 08:57:40.140214 USB3 port 3: enabled 0
1767 08:57:40.143990 GENERIC: 0.0: enabled 1
1768 08:57:40.146641 GENERIC: 1.0: enabled 1
1769 08:57:40.147128 APIC: 01: enabled 1
1770 08:57:40.150336 APIC: 03: enabled 1
1771 08:57:40.153264 APIC: 05: enabled 1
1772 08:57:40.153756 APIC: 07: enabled 1
1773 08:57:40.156522 APIC: 06: enabled 1
1774 08:57:40.157007 APIC: 02: enabled 1
1775 08:57:40.160153 APIC: 04: enabled 1
1776 08:57:40.163193 PCI: 01:00.0: enabled 1
1777 08:57:40.166940 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1778 08:57:40.173479 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1779 08:57:40.176832 ELOG: NV offset 0xf30000 size 0x1000
1780 08:57:40.183659 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1781 08:57:40.190070 ELOG: Event(17) added with size 13 at 2023-03-24 08:57:39 UTC
1782 08:57:40.196559 ELOG: Event(92) added with size 9 at 2023-03-24 08:57:39 UTC
1783 08:57:40.202729 ELOG: Event(93) added with size 9 at 2023-03-24 08:57:39 UTC
1784 08:57:40.209221 ELOG: Event(9E) added with size 10 at 2023-03-24 08:57:39 UTC
1785 08:57:40.216431 ELOG: Event(9F) added with size 14 at 2023-03-24 08:57:39 UTC
1786 08:57:40.222574 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1787 08:57:40.229113 ELOG: Event(A1) added with size 10 at 2023-03-24 08:57:39 UTC
1788 08:57:40.236024 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1789 08:57:40.242192 ELOG: Event(A0) added with size 9 at 2023-03-24 08:57:39 UTC
1790 08:57:40.245729 elog_add_boot_reason: Logged dev mode boot
1791 08:57:40.252478 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1792 08:57:40.255747 Finalize devices...
1793 08:57:40.256344 Devices finalized
1794 08:57:40.262353 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1795 08:57:40.265947 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1796 08:57:40.272371 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1797 08:57:40.278823 ME: HFSTS1 : 0x80030055
1798 08:57:40.282357 ME: HFSTS2 : 0x30280116
1799 08:57:40.285880 ME: HFSTS3 : 0x00000050
1800 08:57:40.292357 ME: HFSTS4 : 0x00004000
1801 08:57:40.295219 ME: HFSTS5 : 0x00000000
1802 08:57:40.298626 ME: HFSTS6 : 0x00400006
1803 08:57:40.302043 ME: Manufacturing Mode : YES
1804 08:57:40.308431 ME: SPI Protection Mode Enabled : NO
1805 08:57:40.312190 ME: FW Partition Table : OK
1806 08:57:40.315490 ME: Bringup Loader Failure : NO
1807 08:57:40.318616 ME: Firmware Init Complete : NO
1808 08:57:40.322047 ME: Boot Options Present : NO
1809 08:57:40.324925 ME: Update In Progress : NO
1810 08:57:40.328246 ME: D0i3 Support : YES
1811 08:57:40.331544 ME: Low Power State Enabled : NO
1812 08:57:40.338182 ME: CPU Replaced : YES
1813 08:57:40.341244 ME: CPU Replacement Valid : YES
1814 08:57:40.344745 ME: Current Working State : 5
1815 08:57:40.348091 ME: Current Operation State : 1
1816 08:57:40.352145 ME: Current Operation Mode : 3
1817 08:57:40.354854 ME: Error Code : 0
1818 08:57:40.358154 ME: Enhanced Debug Mode : NO
1819 08:57:40.361513 ME: CPU Debug Disabled : YES
1820 08:57:40.367986 ME: TXT Support : NO
1821 08:57:40.371662 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1822 08:57:40.381431 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1823 08:57:40.384597 CBFS: 'fallback/slic' not found.
1824 08:57:40.388143 ACPI: Writing ACPI tables at 76b01000.
1825 08:57:40.388831 ACPI: * FACS
1826 08:57:40.390945 ACPI: * DSDT
1827 08:57:40.394584 Ramoops buffer: 0x100000@0x76a00000.
1828 08:57:40.397923 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1829 08:57:40.404971 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1830 08:57:40.407547 Google Chrome EC: version:
1831 08:57:40.411844 ro: voema_v2.0.7540-147f8d37d1
1832 08:57:40.414465 rw: voema_v2.0.7540-147f8d37d1
1833 08:57:40.415004 running image: 2
1834 08:57:40.420949 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1835 08:57:40.425942 ACPI: * FADT
1836 08:57:40.426434 SCI is IRQ9
1837 08:57:40.433182 ACPI: added table 1/32, length now 40
1838 08:57:40.433770 ACPI: * SSDT
1839 08:57:40.436468 Found 1 CPU(s) with 8 core(s) each.
1840 08:57:40.442964 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1841 08:57:40.446281 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1842 08:57:40.448992 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1843 08:57:40.452864 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1844 08:57:40.459175 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1845 08:57:40.465972 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1846 08:57:40.469515 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1847 08:57:40.476146 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1848 08:57:40.482446 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1849 08:57:40.486143 \_SB.PCI0.RP09: Added StorageD3Enable property
1850 08:57:40.492489 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1851 08:57:40.495748 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1852 08:57:40.502206 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1853 08:57:40.505750 PS2K: Passing 80 keymaps to kernel
1854 08:57:40.512057 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1855 08:57:40.519032 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1856 08:57:40.525346 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1857 08:57:40.532505 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1858 08:57:40.538478 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1859 08:57:40.545522 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1860 08:57:40.552210 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1861 08:57:40.558819 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1862 08:57:40.562352 ACPI: added table 2/32, length now 44
1863 08:57:40.563245 ACPI: * MCFG
1864 08:57:40.568404 ACPI: added table 3/32, length now 48
1865 08:57:40.568899 ACPI: * TPM2
1866 08:57:40.572105 TPM2 log created at 0x769f0000
1867 08:57:40.575043 ACPI: added table 4/32, length now 52
1868 08:57:40.578837 ACPI: * MADT
1869 08:57:40.579552 SCI is IRQ9
1870 08:57:40.581614 ACPI: added table 5/32, length now 56
1871 08:57:40.585402 current = 76b09850
1872 08:57:40.585894 ACPI: * DMAR
1873 08:57:40.588492 ACPI: added table 6/32, length now 60
1874 08:57:40.595424 ACPI: added table 7/32, length now 64
1875 08:57:40.595923 ACPI: * HPET
1876 08:57:40.598163 ACPI: added table 8/32, length now 68
1877 08:57:40.601478 ACPI: done.
1878 08:57:40.601972 ACPI tables: 35216 bytes.
1879 08:57:40.605151 smbios_write_tables: 769ef000
1880 08:57:40.608146 EC returned error result code 3
1881 08:57:40.612024 Couldn't obtain OEM name from CBI
1882 08:57:40.615785 Create SMBIOS type 16
1883 08:57:40.618979 Create SMBIOS type 17
1884 08:57:40.621828 GENERIC: 0.0 (WIFI Device)
1885 08:57:40.625123 SMBIOS tables: 1750 bytes.
1886 08:57:40.628439 Writing table forward entry at 0x00000500
1887 08:57:40.635027 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1888 08:57:40.638318 Writing coreboot table at 0x76b25000
1889 08:57:40.644969 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1890 08:57:40.648515 1. 0000000000001000-000000000009ffff: RAM
1891 08:57:40.651750 2. 00000000000a0000-00000000000fffff: RESERVED
1892 08:57:40.658491 3. 0000000000100000-00000000769eefff: RAM
1893 08:57:40.661680 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1894 08:57:40.668577 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1895 08:57:40.674580 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1896 08:57:40.678044 7. 0000000077000000-000000007fbfffff: RESERVED
1897 08:57:40.684989 8. 00000000c0000000-00000000cfffffff: RESERVED
1898 08:57:40.687919 9. 00000000f8000000-00000000f9ffffff: RESERVED
1899 08:57:40.691353 10. 00000000fb000000-00000000fb000fff: RESERVED
1900 08:57:40.698371 11. 00000000fe000000-00000000fe00ffff: RESERVED
1901 08:57:40.701230 12. 00000000fed80000-00000000fed87fff: RESERVED
1902 08:57:40.708357 13. 00000000fed90000-00000000fed92fff: RESERVED
1903 08:57:40.711314 14. 00000000feda0000-00000000feda1fff: RESERVED
1904 08:57:40.718209 15. 00000000fedc0000-00000000feddffff: RESERVED
1905 08:57:40.720944 16. 0000000100000000-00000002803fffff: RAM
1906 08:57:40.724376 Passing 4 GPIOs to payload:
1907 08:57:40.727814 NAME | PORT | POLARITY | VALUE
1908 08:57:40.734576 lid | undefined | high | high
1909 08:57:40.741183 power | undefined | high | low
1910 08:57:40.744856 oprom | undefined | high | low
1911 08:57:40.750870 EC in RW | 0x000000e5 | high | high
1912 08:57:40.757991 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5c5f
1913 08:57:40.760912 coreboot table: 1576 bytes.
1914 08:57:40.763910 IMD ROOT 0. 0x76fff000 0x00001000
1915 08:57:40.767382 IMD SMALL 1. 0x76ffe000 0x00001000
1916 08:57:40.770729 FSP MEMORY 2. 0x76c4e000 0x003b0000
1917 08:57:40.774146 VPD 3. 0x76c4d000 0x00000367
1918 08:57:40.777354 RO MCACHE 4. 0x76c4c000 0x00000fdc
1919 08:57:40.780744 CONSOLE 5. 0x76c2c000 0x00020000
1920 08:57:40.787406 FMAP 6. 0x76c2b000 0x00000578
1921 08:57:40.790286 TIME STAMP 7. 0x76c2a000 0x00000910
1922 08:57:40.794119 VBOOT WORK 8. 0x76c16000 0x00014000
1923 08:57:40.797516 ROMSTG STCK 9. 0x76c15000 0x00001000
1924 08:57:40.800428 AFTER CAR 10. 0x76c0a000 0x0000b000
1925 08:57:40.803941 RAMSTAGE 11. 0x76b97000 0x00073000
1926 08:57:40.807391 REFCODE 12. 0x76b42000 0x00055000
1927 08:57:40.810487 SMM BACKUP 13. 0x76b32000 0x00010000
1928 08:57:40.817309 4f444749 14. 0x76b30000 0x00002000
1929 08:57:40.820296 EXT VBT15. 0x76b2d000 0x0000219f
1930 08:57:40.823775 COREBOOT 16. 0x76b25000 0x00008000
1931 08:57:40.827136 ACPI 17. 0x76b01000 0x00024000
1932 08:57:40.830604 ACPI GNVS 18. 0x76b00000 0x00001000
1933 08:57:40.833858 RAMOOPS 19. 0x76a00000 0x00100000
1934 08:57:40.837340 TPM2 TCGLOG20. 0x769f0000 0x00010000
1935 08:57:40.840361 SMBIOS 21. 0x769ef000 0x00000800
1936 08:57:40.843983 IMD small region:
1937 08:57:40.846977 IMD ROOT 0. 0x76ffec00 0x00000400
1938 08:57:40.850549 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1939 08:57:40.853837 POWER STATE 2. 0x76ffeb80 0x00000044
1940 08:57:40.860123 ROMSTAGE 3. 0x76ffeb60 0x00000004
1941 08:57:40.863441 MEM INFO 4. 0x76ffe980 0x000001e0
1942 08:57:40.870474 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1943 08:57:40.871019 MTRR: Physical address space:
1944 08:57:40.876854 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1945 08:57:40.883080 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1946 08:57:40.890144 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1947 08:57:40.896715 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1948 08:57:40.903069 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1949 08:57:40.909723 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1950 08:57:40.916839 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1951 08:57:40.919516 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 08:57:40.923258 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 08:57:40.926398 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 08:57:40.933338 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 08:57:40.936398 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 08:57:40.939726 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 08:57:40.942639 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 08:57:40.949467 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 08:57:40.952457 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 08:57:40.955717 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 08:57:40.959287 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 08:57:40.963546 call enable_fixed_mtrr()
1963 08:57:40.967069 CPU physical address size: 39 bits
1964 08:57:40.973731 MTRR: default type WB/UC MTRR counts: 6/6.
1965 08:57:40.976894 MTRR: UC selected as default type.
1966 08:57:40.983889 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1967 08:57:40.987041 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1968 08:57:40.993426 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1969 08:57:41.000358 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1970 08:57:41.006589 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1971 08:57:41.013118 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1972 08:57:41.013649
1973 08:57:41.016946 MTRR check
1974 08:57:41.020154 Fixed MTRRs : Enabled
1975 08:57:41.020759 Variable MTRRs: Enabled
1976 08:57:41.021279
1977 08:57:41.026878 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 08:57:41.030025 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 08:57:41.033468 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 08:57:41.036821 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 08:57:41.043347 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 08:57:41.046352 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 08:57:41.050234 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 08:57:41.053224 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 08:57:41.056427 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 08:57:41.062834 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 08:57:41.066283 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 08:57:41.072882 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1989 08:57:41.076238 call enable_fixed_mtrr()
1990 08:57:41.079463 Checking cr50 for pending updates
1991 08:57:41.084490 CPU physical address size: 39 bits
1992 08:57:41.087289 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 08:57:41.090596 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 08:57:41.094007 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 08:57:41.097651 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 08:57:41.104504 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 08:57:41.107232 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 08:57:41.110706 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 08:57:41.113896 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 08:57:41.121039 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 08:57:41.123679 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 08:57:41.127425 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 08:57:41.130107 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 08:57:41.137723 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 08:57:41.141655 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 08:57:41.144836 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 08:57:41.148106 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 08:57:41.154509 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 08:57:41.157620 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 08:57:41.161003 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 08:57:41.164775 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 08:57:41.171114 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 08:57:41.174743 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 08:57:41.177848 call enable_fixed_mtrr()
2015 08:57:41.181290 call enable_fixed_mtrr()
2016 08:57:41.184215 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 08:57:41.187730 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 08:57:41.191149 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 08:57:41.197580 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 08:57:41.200956 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 08:57:41.204189 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 08:57:41.207609 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 08:57:41.214117 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 08:57:41.217460 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 08:57:41.220485 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 08:57:41.223876 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 08:57:41.230576 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 08:57:41.234048 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 08:57:41.237087 call enable_fixed_mtrr()
2030 08:57:41.240616 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 08:57:41.243852 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 08:57:41.250306 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 08:57:41.253578 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 08:57:41.256742 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 08:57:41.260272 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 08:57:41.266661 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 08:57:41.269796 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 08:57:41.273900 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 08:57:41.276680 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 08:57:41.280020 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 08:57:41.286710 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 08:57:41.290238 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 08:57:41.296520 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 08:57:41.299864 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 08:57:41.303124 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 08:57:41.306732 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 08:57:41.309723 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 08:57:41.316614 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 08:57:41.319486 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 08:57:41.323184 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 08:57:41.326130 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 08:57:41.330896 call enable_fixed_mtrr()
2053 08:57:41.333666 call enable_fixed_mtrr()
2054 08:57:41.337030 CPU physical address size: 39 bits
2055 08:57:41.340538 CPU physical address size: 39 bits
2056 08:57:41.344035 CPU physical address size: 39 bits
2057 08:57:41.350328 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 08:57:41.353554 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 08:57:41.357252 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 08:57:41.363523 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 08:57:41.366938 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 08:57:41.370279 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 08:57:41.373901 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 08:57:41.380493 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 08:57:41.383486 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 08:57:41.386795 CPU physical address size: 39 bits
2067 08:57:41.390283 CPU physical address size: 39 bits
2068 08:57:41.393532 Reading cr50 TPM mode
2069 08:57:41.397509 call enable_fixed_mtrr()
2070 08:57:41.400589 CPU physical address size: 39 bits
2071 08:57:41.407104 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2072 08:57:41.414124 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2073 08:57:41.417434 Checking segment from ROM address 0xffc02b38
2074 08:57:41.423691 Checking segment from ROM address 0xffc02b54
2075 08:57:41.427356 Loading segment from ROM address 0xffc02b38
2076 08:57:41.430340 code (compression=0)
2077 08:57:41.437108 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2078 08:57:41.447257 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2079 08:57:41.447352 it's not compressed!
2080 08:57:41.587084 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2081 08:57:41.593890 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2082 08:57:41.600523 Loading segment from ROM address 0xffc02b54
2083 08:57:41.603758 Entry Point 0x30000000
2084 08:57:41.603852 Loaded segments
2085 08:57:41.610172 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2086 08:57:41.653767 Finalizing chipset.
2087 08:57:41.656529 Finalizing SMM.
2088 08:57:41.656622 APMC done.
2089 08:57:41.663587 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2090 08:57:41.666716 mp_park_aps done after 0 msecs.
2091 08:57:41.669976 Jumping to boot code at 0x30000000(0x76b25000)
2092 08:57:41.679743 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2093 08:57:41.679836
2094 08:57:41.679915
2095 08:57:41.683154
2096 08:57:41.683236 Starting depthcharge on Voema...
2097 08:57:41.683624 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2098 08:57:41.683743 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2099 08:57:41.683834 Setting prompt string to ['volteer:']
2100 08:57:41.683917 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2101 08:57:41.686479
2102 08:57:41.693142 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2103 08:57:41.693228
2104 08:57:41.699628 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2105 08:57:41.699714
2106 08:57:41.706429 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2107 08:57:41.706532
2108 08:57:41.709550 Failed to find eMMC card reader
2109 08:57:41.709629
2110 08:57:41.709693 Wipe memory regions:
2111 08:57:41.712680
2112 08:57:41.716149 [0x00000000001000, 0x000000000a0000)
2113 08:57:41.716231
2114 08:57:41.719467 [0x00000000100000, 0x00000030000000)
2115 08:57:41.745773
2116 08:57:41.749024 [0x00000032662db0, 0x000000769ef000)
2117 08:57:41.785416
2118 08:57:41.788467 [0x00000100000000, 0x00000280400000)
2119 08:57:41.992867
2120 08:57:41.995760 ec_init: CrosEC protocol v3 supported (256, 256)
2121 08:57:41.999780
2122 08:57:42.002920 update_port_state: port C0 state: usb enable 1 mux conn 0
2123 08:57:42.006396
2124 08:57:42.013031 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2125 08:57:42.016567
2126 08:57:42.020005 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2127 08:57:42.020127
2128 08:57:42.023643 send_conn_disc_msg: pmc_send_cmd succeeded
2129 08:57:42.456118
2130 08:57:42.456269 R8152: Initializing
2131 08:57:42.456365
2132 08:57:42.459126 Version 6 (ocp_data = 5c30)
2133 08:57:42.459218
2134 08:57:42.462851 R8152: Done initializing
2135 08:57:42.462943
2136 08:57:42.465626 Adding net device
2137 08:57:42.768489
2138 08:57:42.771921 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2139 08:57:42.772057
2140 08:57:42.772157
2141 08:57:42.772264
2142 08:57:42.775149 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2144 08:57:42.875965 volteer: tftpboot 192.168.201.1 9759480/tftp-deploy-6xvjrds4/kernel/bzImage 9759480/tftp-deploy-6xvjrds4/kernel/cmdline 9759480/tftp-deploy-6xvjrds4/ramdisk/ramdisk.cpio.gz
2145 08:57:42.876167 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2146 08:57:42.876266 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2147 08:57:42.880451 tftpboot 192.168.201.1 9759480/tftp-deploy-6xvjrds4/kernel/bzImoy-6xvjrds4/kernel/cmdline 9759480/tftp-deploy-6xvjrds4/ramdisk/ramdisk.cpio.gz
2148 08:57:42.880542
2149 08:57:42.880613 Waiting for link
2150 08:57:43.084697
2151 08:57:43.084838 done.
2152 08:57:43.084910
2153 08:57:43.084975 MAC: 00:24:32:30:79:06
2154 08:57:43.085038
2155 08:57:43.088167 Sending DHCP discover... done.
2156 08:57:43.088245
2157 08:57:43.091134 Waiting for reply... done.
2158 08:57:43.091214
2159 08:57:43.094293 Sending DHCP request... done.
2160 08:57:43.094376
2161 08:57:43.098025 Waiting for reply... done.
2162 08:57:43.098111
2163 08:57:43.101034 My ip is 192.168.201.23
2164 08:57:43.101110
2165 08:57:43.104316 The DHCP server ip is 192.168.201.1
2166 08:57:43.104397
2167 08:57:43.107534 TFTP server IP predefined by user: 192.168.201.1
2168 08:57:43.107612
2169 08:57:43.114019 Bootfile predefined by user: 9759480/tftp-deploy-6xvjrds4/kernel/bzImage
2170 08:57:43.117641
2171 08:57:43.120646 Sending tftp read request... done.
2172 08:57:43.120727
2173 08:57:43.124609 Waiting for the transfer...
2174 08:57:43.124693
2175 08:57:43.647581 00000000 ################################################################
2176 08:57:43.647727
2177 08:57:44.165326 00080000 ################################################################
2178 08:57:44.165508
2179 08:57:44.682742 00100000 ################################################################
2180 08:57:44.682882
2181 08:57:45.205894 00180000 ################################################################
2182 08:57:45.206038
2183 08:57:45.724325 00200000 ################################################################
2184 08:57:45.724472
2185 08:57:46.242904 00280000 ################################################################
2186 08:57:46.243092
2187 08:57:46.761830 00300000 ################################################################
2188 08:57:46.761972
2189 08:57:47.278924 00380000 ################################################################
2190 08:57:47.279068
2191 08:57:47.796643 00400000 ################################################################
2192 08:57:47.796837
2193 08:57:48.320914 00480000 ################################################################
2194 08:57:48.321060
2195 08:57:48.844271 00500000 ################################################################
2196 08:57:48.844419
2197 08:57:49.365250 00580000 ################################################################
2198 08:57:49.365399
2199 08:57:49.888340 00600000 ################################################################
2200 08:57:49.888483
2201 08:57:50.419971 00680000 ################################################################
2202 08:57:50.420114
2203 08:57:50.950469 00700000 ################################################################
2204 08:57:50.950634
2205 08:57:51.472267 00780000 ################################################################
2206 08:57:51.472429
2207 08:57:52.005891 00800000 ################################################################
2208 08:57:52.006035
2209 08:57:52.571837 00880000 ################################################################
2210 08:57:52.572348
2211 08:57:52.982447 00900000 ################################################ done.
2212 08:57:52.982622
2213 08:57:52.985929 The bootfile was 9826304 bytes long.
2214 08:57:52.986032
2215 08:57:52.989228 Sending tftp read request... done.
2216 08:57:52.989324
2217 08:57:52.992800 Waiting for the transfer...
2218 08:57:52.992895
2219 08:57:53.506430 00000000 ################################################################
2220 08:57:53.506577
2221 08:57:54.035504 00080000 ################################################################
2222 08:57:54.035649
2223 08:57:54.562400 00100000 ################################################################
2224 08:57:54.562551
2225 08:57:55.085245 00180000 ################################################################
2226 08:57:55.085391
2227 08:57:55.593177 00200000 ################################################################
2228 08:57:55.593318
2229 08:57:56.102726 00280000 ################################################################
2230 08:57:56.102876
2231 08:57:56.611512 00300000 ################################################################
2232 08:57:56.611650
2233 08:57:57.121513 00380000 ################################################################
2234 08:57:57.121669
2235 08:57:57.633328 00400000 ################################################################
2236 08:57:57.633483
2237 08:57:58.141219 00480000 ################################################################
2238 08:57:58.141361
2239 08:57:58.649414 00500000 ################################################################
2240 08:57:58.649560
2241 08:57:59.158488 00580000 ################################################################
2242 08:57:59.158677
2243 08:57:59.666644 00600000 ################################################################
2244 08:57:59.666789
2245 08:58:00.175052 00680000 ################################################################
2246 08:58:00.175207
2247 08:58:00.683659 00700000 ################################################################
2248 08:58:00.683814
2249 08:58:01.192774 00780000 ################################################################
2250 08:58:01.192919
2251 08:58:01.702959 00800000 ################################################################
2252 08:58:01.703102
2253 08:58:01.963567 00880000 ################################# done.
2254 08:58:01.963708
2255 08:58:01.967016 Sending tftp read request... done.
2256 08:58:01.967128
2257 08:58:01.969994 Waiting for the transfer...
2258 08:58:01.970082
2259 08:58:01.970191 00000000 # done.
2260 08:58:01.970257
2261 08:58:01.979920 Command line loaded dynamically from TFTP file: 9759480/tftp-deploy-6xvjrds4/kernel/cmdline
2262 08:58:01.980010
2263 08:58:01.993017 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2264 08:58:01.997287
2265 08:58:02.001082 Shutting down all USB controllers.
2266 08:58:02.001242
2267 08:58:02.001312 Removing current net device
2268 08:58:02.001377
2269 08:58:02.004042 Finalizing coreboot
2270 08:58:02.004130
2271 08:58:02.010665 Exiting depthcharge with code 4 at timestamp: 28981926
2272 08:58:02.010753
2273 08:58:02.010822
2274 08:58:02.010886 Starting kernel ...
2275 08:58:02.010949
2276 08:58:02.011008
2277 08:58:02.011398 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2278 08:58:02.011528 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2279 08:58:02.011607 Setting prompt string to ['Linux version [0-9]']
2280 08:58:02.011678 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2281 08:58:02.011749 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2283 09:02:26.011805 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2285 09:02:26.012134 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2287 09:02:26.012309 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2290 09:02:26.012597 end: 2 depthcharge-action (duration 00:05:00) [common]
2292 09:02:26.012827 Cleaning after the job
2293 09:02:26.012917 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9759480/tftp-deploy-6xvjrds4/ramdisk
2294 09:02:26.013643 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9759480/tftp-deploy-6xvjrds4/kernel
2295 09:02:26.014345 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9759480/tftp-deploy-6xvjrds4/modules
2296 09:02:26.014745 start: 5.1 power-off (timeout 00:00:30) [common]
2297 09:02:26.014939 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2298 09:02:26.092223 >> Command sent successfully.
2299 09:02:26.094366 Returned 0 in 0 seconds
2300 09:02:26.194680 end: 5.1 power-off (duration 00:00:00) [common]
2302 09:02:26.195018 start: 5.2 read-feedback (timeout 00:10:00) [common]
2303 09:02:26.195256 Listened to connection for namespace 'common' for up to 1s
2304 09:02:27.198627 Finalising connection for namespace 'common'
2305 09:02:27.198807 Disconnecting from shell: Finalise
2306 09:02:27.198923
2307 09:02:27.299672 end: 5.2 read-feedback (duration 00:00:01) [common]
2308 09:02:27.299836 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9759480
2309 09:02:27.305501 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9759480
2310 09:02:27.305631 JobError: Your job cannot terminate cleanly.