Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 08:57:13.616391 lava-dispatcher, installed at version: 2023.01
2 08:57:13.616616 start: 0 validate
3 08:57:13.616758 Start time: 2023-03-24 08:57:13.616750+00:00 (UTC)
4 08:57:13.616901 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:57:13.617043 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 08:57:13.910691 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:57:13.911487 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.279-cip95%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:57:14.209051 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:57:14.209762 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.279-cip95%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 08:57:18.018791 validate duration: 4.40
12 08:57:18.019113 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:57:18.019298 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:57:18.019411 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:57:18.019537 Not decompressing ramdisk as can be used compressed.
16 08:57:18.019644 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 08:57:18.019721 saving as /var/lib/lava/dispatcher/tmp/9759483/tftp-deploy-l95p4f3d/ramdisk/rootfs.cpio.gz
18 08:57:18.019790 total size: 8429740 (8MB)
19 08:57:18.743630 progress 0% (0MB)
20 08:57:18.746062 progress 5% (0MB)
21 08:57:18.748438 progress 10% (0MB)
22 08:57:18.750763 progress 15% (1MB)
23 08:57:18.753103 progress 20% (1MB)
24 08:57:18.755434 progress 25% (2MB)
25 08:57:18.757776 progress 30% (2MB)
26 08:57:18.760108 progress 35% (2MB)
27 08:57:18.762260 progress 40% (3MB)
28 08:57:18.764594 progress 45% (3MB)
29 08:57:18.766908 progress 50% (4MB)
30 08:57:18.769232 progress 55% (4MB)
31 08:57:18.771525 progress 60% (4MB)
32 08:57:18.773805 progress 65% (5MB)
33 08:57:18.776084 progress 70% (5MB)
34 08:57:18.778195 progress 75% (6MB)
35 08:57:18.780508 progress 80% (6MB)
36 08:57:18.782787 progress 85% (6MB)
37 08:57:18.785069 progress 90% (7MB)
38 08:57:18.787343 progress 95% (7MB)
39 08:57:18.789628 progress 100% (8MB)
40 08:57:18.789773 8MB downloaded in 0.77s (10.44MB/s)
41 08:57:18.789935 end: 1.1.1 http-download (duration 00:00:01) [common]
43 08:57:18.790211 end: 1.1 download-retry (duration 00:00:01) [common]
44 08:57:18.790312 start: 1.2 download-retry (timeout 00:09:59) [common]
45 08:57:18.790407 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 08:57:18.790523 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.279-cip95/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 08:57:18.790597 saving as /var/lib/lava/dispatcher/tmp/9759483/tftp-deploy-l95p4f3d/kernel/bzImage
48 08:57:18.790664 total size: 9826304 (9MB)
49 08:57:18.790730 No compression specified
50 08:57:18.791705 progress 0% (0MB)
51 08:57:18.794269 progress 5% (0MB)
52 08:57:18.796934 progress 10% (0MB)
53 08:57:18.799598 progress 15% (1MB)
54 08:57:18.802253 progress 20% (1MB)
55 08:57:18.804904 progress 25% (2MB)
56 08:57:18.807576 progress 30% (2MB)
57 08:57:18.810215 progress 35% (3MB)
58 08:57:18.812904 progress 40% (3MB)
59 08:57:18.815579 progress 45% (4MB)
60 08:57:18.818231 progress 50% (4MB)
61 08:57:18.820896 progress 55% (5MB)
62 08:57:18.823549 progress 60% (5MB)
63 08:57:18.826205 progress 65% (6MB)
64 08:57:18.828810 progress 70% (6MB)
65 08:57:18.831439 progress 75% (7MB)
66 08:57:18.834039 progress 80% (7MB)
67 08:57:18.836705 progress 85% (7MB)
68 08:57:18.839380 progress 90% (8MB)
69 08:57:18.841981 progress 95% (8MB)
70 08:57:18.844611 progress 100% (9MB)
71 08:57:18.844853 9MB downloaded in 0.05s (172.95MB/s)
72 08:57:18.845020 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:57:18.845288 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:57:18.845389 start: 1.3 download-retry (timeout 00:09:59) [common]
76 08:57:18.845487 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 08:57:18.845608 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.279-cip95/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 08:57:18.845687 saving as /var/lib/lava/dispatcher/tmp/9759483/tftp-deploy-l95p4f3d/modules/modules.tar
79 08:57:18.845757 total size: 461352 (0MB)
80 08:57:18.845826 Using unxz to decompress xz
81 08:57:18.849032 progress 7% (0MB)
82 08:57:18.849433 progress 14% (0MB)
83 08:57:18.849696 progress 21% (0MB)
84 08:57:18.851170 progress 28% (0MB)
85 08:57:18.853444 progress 35% (0MB)
86 08:57:18.855685 progress 42% (0MB)
87 08:57:18.857700 progress 49% (0MB)
88 08:57:18.860169 progress 56% (0MB)
89 08:57:18.862243 progress 63% (0MB)
90 08:57:18.864440 progress 71% (0MB)
91 08:57:18.866509 progress 78% (0MB)
92 08:57:18.868593 progress 85% (0MB)
93 08:57:18.870639 progress 92% (0MB)
94 08:57:18.873143 progress 99% (0MB)
95 08:57:18.881133 0MB downloaded in 0.04s (12.44MB/s)
96 08:57:18.881438 end: 1.3.1 http-download (duration 00:00:00) [common]
98 08:57:18.881736 end: 1.3 download-retry (duration 00:00:00) [common]
99 08:57:18.881844 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
100 08:57:18.881951 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
101 08:57:18.882047 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 08:57:18.882144 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
103 08:57:18.882343 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx
104 08:57:18.882464 makedir: /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin
105 08:57:18.882563 makedir: /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/tests
106 08:57:18.882655 makedir: /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/results
107 08:57:18.882773 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-add-keys
108 08:57:18.882922 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-add-sources
109 08:57:18.883059 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-background-process-start
110 08:57:18.883197 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-background-process-stop
111 08:57:18.883324 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-common-functions
112 08:57:18.883450 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-echo-ipv4
113 08:57:18.883579 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-install-packages
114 08:57:18.883707 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-installed-packages
115 08:57:18.883831 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-os-build
116 08:57:18.883955 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-probe-channel
117 08:57:18.884081 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-probe-ip
118 08:57:18.884204 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-target-ip
119 08:57:18.884327 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-target-mac
120 08:57:18.884450 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-target-storage
121 08:57:18.884575 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-test-case
122 08:57:18.884700 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-test-event
123 08:57:18.884822 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-test-feedback
124 08:57:18.884948 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-test-raise
125 08:57:18.885079 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-test-reference
126 08:57:18.885217 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-test-runner
127 08:57:18.885353 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-test-set
128 08:57:18.885491 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-test-shell
129 08:57:18.885631 Updating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-install-packages (oe)
130 08:57:18.885766 Updating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/bin/lava-installed-packages (oe)
131 08:57:18.885885 Creating /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/environment
132 08:57:18.885986 LAVA metadata
133 08:57:18.886072 - LAVA_JOB_ID=9759483
134 08:57:18.886150 - LAVA_DISPATCHER_IP=192.168.201.1
135 08:57:18.886264 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
136 08:57:18.886342 skipped lava-vland-overlay
137 08:57:18.886430 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 08:57:18.886527 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
139 08:57:18.886601 skipped lava-multinode-overlay
140 08:57:18.886686 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 08:57:18.886780 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
142 08:57:18.886865 Loading test definitions
143 08:57:18.886976 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
144 08:57:18.887069 Using /lava-9759483 at stage 0
145 08:57:18.887368 uuid=9759483_1.4.2.3.1 testdef=None
146 08:57:18.887496 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 08:57:18.887602 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
148 08:57:18.888198 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 08:57:18.888460 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
151 08:57:18.889103 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 08:57:18.889376 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
154 08:57:18.889997 runner path: /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/0/tests/0_dmesg test_uuid 9759483_1.4.2.3.1
155 08:57:18.890168 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 08:57:18.890429 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
158 08:57:18.890512 Using /lava-9759483 at stage 1
159 08:57:18.890787 uuid=9759483_1.4.2.3.5 testdef=None
160 08:57:18.890890 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 08:57:18.890990 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
162 08:57:18.891573 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 08:57:18.891829 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
165 08:57:18.892479 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 08:57:18.892745 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
168 08:57:18.893368 runner path: /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/1/tests/1_bootrr test_uuid 9759483_1.4.2.3.5
169 08:57:18.893528 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 08:57:18.893765 Creating lava-test-runner.conf files
172 08:57:18.893836 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/0 for stage 0
173 08:57:18.893928 - 0_dmesg
174 08:57:18.894011 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9759483/lava-overlay-338v2ahx/lava-9759483/1 for stage 1
175 08:57:18.894105 - 1_bootrr
176 08:57:18.894207 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 08:57:18.894303 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
178 08:57:18.901439 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 08:57:18.901566 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
180 08:57:18.901668 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 08:57:18.901768 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 08:57:18.901868 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
183 08:57:19.108260 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 08:57:19.108677 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
185 08:57:19.108800 extracting modules file /var/lib/lava/dispatcher/tmp/9759483/tftp-deploy-l95p4f3d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9759483/extract-overlay-ramdisk-08mevucp/ramdisk
186 08:57:19.121172 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 08:57:19.121327 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
188 08:57:19.121433 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9759483/compress-overlay-e5lnb4eb/overlay-1.4.2.4.tar.gz to ramdisk
189 08:57:19.121515 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9759483/compress-overlay-e5lnb4eb/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9759483/extract-overlay-ramdisk-08mevucp/ramdisk
190 08:57:19.126153 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 08:57:19.126280 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
192 08:57:19.126385 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 08:57:19.126489 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
194 08:57:19.126579 Building ramdisk /var/lib/lava/dispatcher/tmp/9759483/extract-overlay-ramdisk-08mevucp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9759483/extract-overlay-ramdisk-08mevucp/ramdisk
195 08:57:19.206857 >> 53632 blocks
196 08:57:20.117076 rename /var/lib/lava/dispatcher/tmp/9759483/extract-overlay-ramdisk-08mevucp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9759483/tftp-deploy-l95p4f3d/ramdisk/ramdisk.cpio.gz
197 08:57:20.117514 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 08:57:20.117646 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
199 08:57:20.117950 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
200 08:57:20.118055 No mkimage arch provided, not using FIT.
201 08:57:20.118157 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 08:57:20.118253 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 08:57:20.118357 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 08:57:20.118461 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
205 08:57:20.118549 No LXC device requested
206 08:57:20.118643 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 08:57:20.118742 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
208 08:57:20.118832 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 08:57:20.118910 Checking files for TFTP limit of 4294967296 bytes.
210 08:57:20.119348 end: 1 tftp-deploy (duration 00:00:02) [common]
211 08:57:20.119473 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 08:57:20.119579 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 08:57:20.119721 substitutions:
214 08:57:20.119798 - {DTB}: None
215 08:57:20.119873 - {INITRD}: 9759483/tftp-deploy-l95p4f3d/ramdisk/ramdisk.cpio.gz
216 08:57:20.119943 - {KERNEL}: 9759483/tftp-deploy-l95p4f3d/kernel/bzImage
217 08:57:20.120024 - {LAVA_MAC}: None
218 08:57:20.120095 - {PRESEED_CONFIG}: None
219 08:57:20.120168 - {PRESEED_LOCAL}: None
220 08:57:20.120266 - {RAMDISK}: 9759483/tftp-deploy-l95p4f3d/ramdisk/ramdisk.cpio.gz
221 08:57:20.120336 - {ROOT_PART}: None
222 08:57:20.120402 - {ROOT}: None
223 08:57:20.120466 - {SERVER_IP}: 192.168.201.1
224 08:57:20.120530 - {TEE}: None
225 08:57:20.120594 Parsed boot commands:
226 08:57:20.120656 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 08:57:20.120830 Parsed boot commands: tftpboot 192.168.201.1 9759483/tftp-deploy-l95p4f3d/kernel/bzImage 9759483/tftp-deploy-l95p4f3d/kernel/cmdline 9759483/tftp-deploy-l95p4f3d/ramdisk/ramdisk.cpio.gz
228 08:57:20.120940 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 08:57:20.121041 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 08:57:20.121146 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 08:57:20.121247 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 08:57:20.121326 Not connected, no need to disconnect.
233 08:57:20.121413 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 08:57:20.121505 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 08:57:20.121579 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
236 08:57:20.124639 Setting prompt string to ['lava-test: # ']
237 08:57:20.124955 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 08:57:20.125077 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 08:57:20.125188 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 08:57:20.125297 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 08:57:20.125494 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
242 08:57:25.259059 >> Command sent successfully.
243 08:57:25.261362 Returned 0 in 5 seconds
244 08:57:25.362173 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 08:57:25.362535 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 08:57:25.362648 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 08:57:25.362747 Setting prompt string to 'Starting depthcharge on Helios...'
249 08:57:25.362822 Changing prompt to 'Starting depthcharge on Helios...'
250 08:57:25.362900 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
251 08:57:25.363214 [Enter `^Ec?' for help]
252 08:57:25.982782
253 08:57:25.982950
254 08:57:25.992689 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
255 08:57:25.996200 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
256 08:57:26.002282 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
257 08:57:26.005783 CPU: AES supported, TXT NOT supported, VT supported
258 08:57:26.012268 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
259 08:57:26.015875 PCH: device id 0284 (rev 00) is Cometlake-U Premium
260 08:57:26.022377 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
261 08:57:26.026098 VBOOT: Loading verstage.
262 08:57:26.028973 FMAP: Found "FLASH" version 1.1 at 0xc04000.
263 08:57:26.036108 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
264 08:57:26.042753 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
265 08:57:26.042851 CBFS @ c08000 size 3f8000
266 08:57:26.049816 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
267 08:57:26.052610 CBFS: Locating 'fallback/verstage'
268 08:57:26.055646 CBFS: Found @ offset 10fb80 size 1072c
269 08:57:26.059903
270 08:57:26.060002
271 08:57:26.069439 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
272 08:57:26.083940 Probing TPM: . done!
273 08:57:26.087509 TPM ready after 0 ms
274 08:57:26.090377 Connected to device vid:did:rid of 1ae0:0028:00
275 08:57:26.100908 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
276 08:57:26.104182 Initialized TPM device CR50 revision 0
277 08:57:26.148003 tlcl_send_startup: Startup return code is 0
278 08:57:26.148131 TPM: setup succeeded
279 08:57:26.160371 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
280 08:57:26.164018 Chrome EC: UHEPI supported
281 08:57:26.167895 Phase 1
282 08:57:26.171004 FMAP: area GBB found @ c05000 (12288 bytes)
283 08:57:26.177819 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
284 08:57:26.181107 Phase 2
285 08:57:26.181193 Phase 3
286 08:57:26.184479 FMAP: area GBB found @ c05000 (12288 bytes)
287 08:57:26.190736 VB2:vb2_report_dev_firmware() This is developer signed firmware
288 08:57:26.197184 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
289 08:57:26.200912 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 08:57:26.207226 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 08:57:26.223049 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
292 08:57:26.226102 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 08:57:26.232993 VB2:vb2_verify_fw_preamble() Verifying preamble.
294 08:57:26.236807 Phase 4
295 08:57:26.240314 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
296 08:57:26.246793 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
297 08:57:26.426535 VB2:vb2_rsa_verify_digest() Digest check failed!
298 08:57:26.433217 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
299 08:57:26.433323 Saving nvdata
300 08:57:26.436746 Reboot requested (10020007)
301 08:57:26.439642 board_reset() called!
302 08:57:26.439739 full_reset() called!
303 08:57:30.949840
304 08:57:30.950000
305 08:57:30.960189 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
306 08:57:30.962932 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
307 08:57:30.969872 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
308 08:57:30.973104 CPU: AES supported, TXT NOT supported, VT supported
309 08:57:30.980132 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
310 08:57:30.982961 PCH: device id 0284 (rev 00) is Cometlake-U Premium
311 08:57:30.990143 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
312 08:57:30.993162 VBOOT: Loading verstage.
313 08:57:30.996438 FMAP: Found "FLASH" version 1.1 at 0xc04000.
314 08:57:31.002826 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
315 08:57:31.006235 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
316 08:57:31.009339 CBFS @ c08000 size 3f8000
317 08:57:31.015900 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
318 08:57:31.019756 CBFS: Locating 'fallback/verstage'
319 08:57:31.022915 CBFS: Found @ offset 10fb80 size 1072c
320 08:57:31.026619
321 08:57:31.026717
322 08:57:31.036272 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
323 08:57:31.050713 Probing TPM: . done!
324 08:57:31.054248 TPM ready after 0 ms
325 08:57:31.057286 Connected to device vid:did:rid of 1ae0:0028:00
326 08:57:31.068079 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
327 08:57:31.070956 Initialized TPM device CR50 revision 0
328 08:57:31.113313 tlcl_send_startup: Startup return code is 0
329 08:57:31.113419 TPM: setup succeeded
330 08:57:31.126084 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
331 08:57:31.130261 Chrome EC: UHEPI supported
332 08:57:31.133667 Phase 1
333 08:57:31.136967 FMAP: area GBB found @ c05000 (12288 bytes)
334 08:57:31.143747 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
335 08:57:31.150098 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
336 08:57:31.153463 Recovery requested (1009000e)
337 08:57:31.159284 Saving nvdata
338 08:57:31.165193 tlcl_extend: response is 0
339 08:57:31.174054 tlcl_extend: response is 0
340 08:57:31.180804 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 08:57:31.184097 CBFS @ c08000 size 3f8000
342 08:57:31.190779 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 08:57:31.194471 CBFS: Locating 'fallback/romstage'
344 08:57:31.197406 CBFS: Found @ offset 80 size 145fc
345 08:57:31.200993 Accumulated console time in verstage 98 ms
346 08:57:31.201086
347 08:57:31.201160
348 08:57:31.214594 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
349 08:57:31.220776 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
350 08:57:31.224124 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
351 08:57:31.227445 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
352 08:57:31.233986 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
353 08:57:31.237311 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
354 08:57:31.240862 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
355 08:57:31.244156 TCO_STS: 0000 0000
356 08:57:31.247008 GEN_PMCON: e0015238 00000200
357 08:57:31.251132 GBLRST_CAUSE: 00000000 00000000
358 08:57:31.251226 prev_sleep_state 5
359 08:57:31.253868 Boot Count incremented to 48853
360 08:57:31.260971 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 08:57:31.263899 CBFS @ c08000 size 3f8000
362 08:57:31.270536 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 08:57:31.270632 CBFS: Locating 'fspm.bin'
364 08:57:31.277082 CBFS: Found @ offset 5ffc0 size 71000
365 08:57:31.280371 Chrome EC: UHEPI supported
366 08:57:31.286901 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
367 08:57:31.290569 Probing TPM: done!
368 08:57:31.297590 Connected to device vid:did:rid of 1ae0:0028:00
369 08:57:31.307261 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
370 08:57:31.313327 Initialized TPM device CR50 revision 0
371 08:57:31.322474 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
372 08:57:31.328634 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
373 08:57:31.332106 MRC cache found, size 1948
374 08:57:31.335577 bootmode is set to: 2
375 08:57:31.338923 PRMRR disabled by config.
376 08:57:31.341740 SPD INDEX = 1
377 08:57:31.345276 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 08:57:31.348715 CBFS @ c08000 size 3f8000
379 08:57:31.355043 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 08:57:31.355152 CBFS: Locating 'spd.bin'
381 08:57:31.358528 CBFS: Found @ offset 5fb80 size 400
382 08:57:31.361830 SPD: module type is LPDDR3
383 08:57:31.365663 SPD: module part is
384 08:57:31.371618 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
385 08:57:31.375036 SPD: device width 4 bits, bus width 8 bits
386 08:57:31.378362 SPD: module size is 4096 MB (per channel)
387 08:57:31.381589 memory slot: 0 configuration done.
388 08:57:31.385194 memory slot: 2 configuration done.
389 08:57:31.436599 CBMEM:
390 08:57:31.439697 IMD: root @ 99fff000 254 entries.
391 08:57:31.443262 IMD: root @ 99ffec00 62 entries.
392 08:57:31.446202 External stage cache:
393 08:57:31.449920 IMD: root @ 9abff000 254 entries.
394 08:57:31.453222 IMD: root @ 9abfec00 62 entries.
395 08:57:31.456377 Chrome EC: clear events_b mask to 0x0000000020004000
396 08:57:31.472639 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 08:57:31.485755 tlcl_write: response is 0
398 08:57:31.494682 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
399 08:57:31.501187 MRC: TPM MRC hash updated successfully.
400 08:57:31.501282 2 DIMMs found
401 08:57:31.504424 SMM Memory Map
402 08:57:31.507724 SMRAM : 0x9a000000 0x1000000
403 08:57:31.511257 Subregion 0: 0x9a000000 0xa00000
404 08:57:31.514322 Subregion 1: 0x9aa00000 0x200000
405 08:57:31.517794 Subregion 2: 0x9ac00000 0x400000
406 08:57:31.521372 top_of_ram = 0x9a000000
407 08:57:31.524580 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
408 08:57:31.530960 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
409 08:57:31.534240 MTRR Range: Start=ff000000 End=0 (Size 1000000)
410 08:57:31.541333 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 08:57:31.544146 CBFS @ c08000 size 3f8000
412 08:57:31.547278 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 08:57:31.551095 CBFS: Locating 'fallback/postcar'
414 08:57:31.557462 CBFS: Found @ offset 107000 size 4b44
415 08:57:31.560627 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
416 08:57:31.573287 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
417 08:57:31.576191 Processing 180 relocs. Offset value of 0x97c0c000
418 08:57:31.585681 Accumulated console time in romstage 286 ms
419 08:57:31.585778
420 08:57:31.585854
421 08:57:31.594958 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
422 08:57:31.601291 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 08:57:31.604781 CBFS @ c08000 size 3f8000
424 08:57:31.611090 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 08:57:31.614206 CBFS: Locating 'fallback/ramstage'
426 08:57:31.617573 CBFS: Found @ offset 43380 size 1b9e8
427 08:57:31.624293 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
428 08:57:31.656399 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
429 08:57:31.659734 Processing 3976 relocs. Offset value of 0x98db0000
430 08:57:31.666538 Accumulated console time in postcar 52 ms
431 08:57:31.666636
432 08:57:31.666712
433 08:57:31.676245 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
434 08:57:31.683122 FMAP: area RO_VPD found @ c00000 (16384 bytes)
435 08:57:31.686292 WARNING: RO_VPD is uninitialized or empty.
436 08:57:31.689821 FMAP: area RW_VPD found @ af8000 (8192 bytes)
437 08:57:31.696448 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 08:57:31.696545 Normal boot.
439 08:57:31.703046 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
440 08:57:31.706202 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 08:57:31.709606 CBFS @ c08000 size 3f8000
442 08:57:31.716183 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 08:57:31.719329 CBFS: Locating 'cpu_microcode_blob.bin'
444 08:57:31.722578 CBFS: Found @ offset 14700 size 2ec00
445 08:57:31.726352 microcode: sig=0x806ec pf=0x4 revision=0xc9
446 08:57:31.729591 Skip microcode update
447 08:57:31.736592 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 08:57:31.736691 CBFS @ c08000 size 3f8000
449 08:57:31.742736 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 08:57:31.746052 CBFS: Locating 'fsps.bin'
451 08:57:31.749042 CBFS: Found @ offset d1fc0 size 35000
452 08:57:31.774527 Detected 4 core, 8 thread CPU.
453 08:57:31.778283 Setting up SMI for CPU
454 08:57:31.781153 IED base = 0x9ac00000
455 08:57:31.781249 IED size = 0x00400000
456 08:57:31.784462 Will perform SMM setup.
457 08:57:31.791306 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
458 08:57:31.797826 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
459 08:57:31.801160 Processing 16 relocs. Offset value of 0x00030000
460 08:57:31.805058 Attempting to start 7 APs
461 08:57:31.808121 Waiting for 10ms after sending INIT.
462 08:57:31.824108 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
463 08:57:31.824210 done.
464 08:57:31.827987 AP: slot 2 apic_id 2.
465 08:57:31.831012 AP: slot 1 apic_id 3.
466 08:57:31.831114 AP: slot 4 apic_id 5.
467 08:57:31.834215 AP: slot 5 apic_id 4.
468 08:57:31.837510 Waiting for 2nd SIPI to complete...done.
469 08:57:31.841184 AP: slot 6 apic_id 6.
470 08:57:31.844282 AP: slot 7 apic_id 7.
471 08:57:31.850879 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
472 08:57:31.858063 Processing 13 relocs. Offset value of 0x00038000
473 08:57:31.861066 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
474 08:57:31.867628 Installing SMM handler to 0x9a000000
475 08:57:31.874476 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
476 08:57:31.880762 Processing 658 relocs. Offset value of 0x9a010000
477 08:57:31.887031 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
478 08:57:31.890672 Processing 13 relocs. Offset value of 0x9a008000
479 08:57:31.897468 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
480 08:57:31.903742 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
481 08:57:31.910421 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
482 08:57:31.913937 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
483 08:57:31.920548 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
484 08:57:31.926735 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
485 08:57:31.930132 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
486 08:57:31.937063 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
487 08:57:31.940157 Clearing SMI status registers
488 08:57:31.943768 SMI_STS: PM1
489 08:57:31.943865 PM1_STS: PWRBTN
490 08:57:31.947022 TCO_STS: SECOND_TO
491 08:57:31.950497 New SMBASE 0x9a000000
492 08:57:31.953643 In relocation handler: CPU 0
493 08:57:31.956942 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
494 08:57:31.960143 Writing SMRR. base = 0x9a000006, mask=0xff000800
495 08:57:31.963849 Relocation complete.
496 08:57:31.966725 New SMBASE 0x99fff400
497 08:57:31.970285 In relocation handler: CPU 3
498 08:57:31.973557 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
499 08:57:31.976928 Writing SMRR. base = 0x9a000006, mask=0xff000800
500 08:57:31.980270 Relocation complete.
501 08:57:31.983620 New SMBASE 0x99ffe400
502 08:57:31.983717 In relocation handler: CPU 7
503 08:57:31.990223 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
504 08:57:31.993213 Writing SMRR. base = 0x9a000006, mask=0xff000800
505 08:57:31.996966 Relocation complete.
506 08:57:31.997063 New SMBASE 0x99ffe800
507 08:57:32.000603 In relocation handler: CPU 6
508 08:57:32.006717 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
509 08:57:32.009900 Writing SMRR. base = 0x9a000006, mask=0xff000800
510 08:57:32.013586 Relocation complete.
511 08:57:32.013683 New SMBASE 0x99fff000
512 08:57:32.016455 In relocation handler: CPU 4
513 08:57:32.023079 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
514 08:57:32.026675 Writing SMRR. base = 0x9a000006, mask=0xff000800
515 08:57:32.029759 Relocation complete.
516 08:57:32.029855 New SMBASE 0x99ffec00
517 08:57:32.033314 In relocation handler: CPU 5
518 08:57:32.036514 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
519 08:57:32.043388 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 08:57:32.046493 Relocation complete.
521 08:57:32.046589 New SMBASE 0x99fff800
522 08:57:32.050097 In relocation handler: CPU 2
523 08:57:32.052984 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
524 08:57:32.059503 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 08:57:32.063005 Relocation complete.
526 08:57:32.063111 New SMBASE 0x99fffc00
527 08:57:32.066478 In relocation handler: CPU 1
528 08:57:32.069910 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
529 08:57:32.076591 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 08:57:32.076693 Relocation complete.
531 08:57:32.080074 Initializing CPU #0
532 08:57:32.082951 CPU: vendor Intel device 806ec
533 08:57:32.086561 CPU: family 06, model 8e, stepping 0c
534 08:57:32.089528 Clearing out pending MCEs
535 08:57:32.092817 Setting up local APIC...
536 08:57:32.092914 apic_id: 0x00 done.
537 08:57:32.096300 Turbo is available but hidden
538 08:57:32.099804 Turbo is available and visible
539 08:57:32.102520 VMX status: enabled
540 08:57:32.106000 IA32_FEATURE_CONTROL status: locked
541 08:57:32.109280 Skip microcode update
542 08:57:32.109376 CPU #0 initialized
543 08:57:32.112451 Initializing CPU #3
544 08:57:32.116098 Initializing CPU #2
545 08:57:32.116194 Initializing CPU #1
546 08:57:32.119580 CPU: vendor Intel device 806ec
547 08:57:32.122595 CPU: family 06, model 8e, stepping 0c
548 08:57:32.125958 CPU: vendor Intel device 806ec
549 08:57:32.129306 CPU: family 06, model 8e, stepping 0c
550 08:57:32.132487 Clearing out pending MCEs
551 08:57:32.135843 Clearing out pending MCEs
552 08:57:32.139099 Setting up local APIC...
553 08:57:32.142478 CPU: vendor Intel device 806ec
554 08:57:32.145922 CPU: family 06, model 8e, stepping 0c
555 08:57:32.149301 Clearing out pending MCEs
556 08:57:32.149398 Initializing CPU #4
557 08:57:32.152297 Initializing CPU #5
558 08:57:32.156006 CPU: vendor Intel device 806ec
559 08:57:32.159221 CPU: family 06, model 8e, stepping 0c
560 08:57:32.162227 CPU: vendor Intel device 806ec
561 08:57:32.165396 CPU: family 06, model 8e, stepping 0c
562 08:57:32.168985 Clearing out pending MCEs
563 08:57:32.172411 Clearing out pending MCEs
564 08:57:32.172508 Setting up local APIC...
565 08:57:32.175472 Setting up local APIC...
566 08:57:32.178670 apic_id: 0x04 done.
567 08:57:32.181936 Setting up local APIC...
568 08:57:32.182034 apic_id: 0x03 done.
569 08:57:32.185489 Setting up local APIC...
570 08:57:32.188927 Initializing CPU #6
571 08:57:32.189027 VMX status: enabled
572 08:57:32.192034 apic_id: 0x02 done.
573 08:57:32.196037 IA32_FEATURE_CONTROL status: locked
574 08:57:32.198698 VMX status: enabled
575 08:57:32.198795 Skip microcode update
576 08:57:32.202532 IA32_FEATURE_CONTROL status: locked
577 08:57:32.205149 CPU #1 initialized
578 08:57:32.208366 Skip microcode update
579 08:57:32.208463 apic_id: 0x01 done.
580 08:57:32.211950 CPU #2 initialized
581 08:57:32.212047 VMX status: enabled
582 08:57:32.215603 apic_id: 0x05 done.
583 08:57:32.218669 VMX status: enabled
584 08:57:32.218765 VMX status: enabled
585 08:57:32.222085 IA32_FEATURE_CONTROL status: locked
586 08:57:32.225291 Initializing CPU #7
587 08:57:32.228577 CPU: vendor Intel device 806ec
588 08:57:32.231964 CPU: family 06, model 8e, stepping 0c
589 08:57:32.235207 Skip microcode update
590 08:57:32.238869 IA32_FEATURE_CONTROL status: locked
591 08:57:32.241914 IA32_FEATURE_CONTROL status: locked
592 08:57:32.244822 Clearing out pending MCEs
593 08:57:32.248238 CPU: vendor Intel device 806ec
594 08:57:32.251496 CPU: family 06, model 8e, stepping 0c
595 08:57:32.254810 Setting up local APIC...
596 08:57:32.254907 CPU #3 initialized
597 08:57:32.258155 Skip microcode update
598 08:57:32.261356 Skip microcode update
599 08:57:32.261454 CPU #5 initialized
600 08:57:32.264988 CPU #4 initialized
601 08:57:32.268207 Clearing out pending MCEs
602 08:57:32.268304 apic_id: 0x06 done.
603 08:57:32.271292 Setting up local APIC...
604 08:57:32.274913 VMX status: enabled
605 08:57:32.275010 apic_id: 0x07 done.
606 08:57:32.277905 IA32_FEATURE_CONTROL status: locked
607 08:57:32.281278 VMX status: enabled
608 08:57:32.284702 Skip microcode update
609 08:57:32.288286 IA32_FEATURE_CONTROL status: locked
610 08:57:32.288384 CPU #6 initialized
611 08:57:32.291778 Skip microcode update
612 08:57:32.294714 CPU #7 initialized
613 08:57:32.298157 bsp_do_flight_plan done after 456 msecs.
614 08:57:32.301165 CPU: frequency set to 4200 MHz
615 08:57:32.301263 Enabling SMIs.
616 08:57:32.304266 Locking SMM.
617 08:57:32.318346 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
618 08:57:32.321544 CBFS @ c08000 size 3f8000
619 08:57:32.328375 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
620 08:57:32.328473 CBFS: Locating 'vbt.bin'
621 08:57:32.331344 CBFS: Found @ offset 5f5c0 size 499
622 08:57:32.338151 Found a VBT of 4608 bytes after decompression
623 08:57:32.520659 Display FSP Version Info HOB
624 08:57:32.524400 Reference Code - CPU = 9.0.1e.30
625 08:57:32.527864 uCode Version = 0.0.0.ca
626 08:57:32.530571 TXT ACM version = ff.ff.ff.ffff
627 08:57:32.534026 Display FSP Version Info HOB
628 08:57:32.537513 Reference Code - ME = 9.0.1e.30
629 08:57:32.540560 MEBx version = 0.0.0.0
630 08:57:32.543868 ME Firmware Version = Consumer SKU
631 08:57:32.547537 Display FSP Version Info HOB
632 08:57:32.550902 Reference Code - CML PCH = 9.0.1e.30
633 08:57:32.554268 PCH-CRID Status = Disabled
634 08:57:32.557303 PCH-CRID Original Value = ff.ff.ff.ffff
635 08:57:32.560607 PCH-CRID New Value = ff.ff.ff.ffff
636 08:57:32.564090 OPROM - RST - RAID = ff.ff.ff.ffff
637 08:57:32.567528 ChipsetInit Base Version = ff.ff.ff.ffff
638 08:57:32.571008 ChipsetInit Oem Version = ff.ff.ff.ffff
639 08:57:32.573912 Display FSP Version Info HOB
640 08:57:32.580536 Reference Code - SA - System Agent = 9.0.1e.30
641 08:57:32.583982 Reference Code - MRC = 0.7.1.6c
642 08:57:32.584120 SA - PCIe Version = 9.0.1e.30
643 08:57:32.587379 SA-CRID Status = Disabled
644 08:57:32.590290 SA-CRID Original Value = 0.0.0.c
645 08:57:32.593694 SA-CRID New Value = 0.0.0.c
646 08:57:32.597093 OPROM - VBIOS = ff.ff.ff.ffff
647 08:57:32.600674 RTC Init
648 08:57:32.603652 Set power on after power failure.
649 08:57:32.603855 Disabling Deep S3
650 08:57:32.608089 Disabling Deep S3
651 08:57:32.608421 Disabling Deep S4
652 08:57:32.610408 Disabling Deep S4
653 08:57:32.610680 Disabling Deep S5
654 08:57:32.613940 Disabling Deep S5
655 08:57:32.620946 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
656 08:57:32.621439 Enumerating buses...
657 08:57:32.627422 Show all devs... Before device enumeration.
658 08:57:32.627849 Root Device: enabled 1
659 08:57:32.630313 CPU_CLUSTER: 0: enabled 1
660 08:57:32.634259 DOMAIN: 0000: enabled 1
661 08:57:32.636962 APIC: 00: enabled 1
662 08:57:32.637345 PCI: 00:00.0: enabled 1
663 08:57:32.640852 PCI: 00:02.0: enabled 1
664 08:57:32.644265 PCI: 00:04.0: enabled 0
665 08:57:32.647419 PCI: 00:05.0: enabled 0
666 08:57:32.647913 PCI: 00:12.0: enabled 1
667 08:57:32.650455 PCI: 00:12.5: enabled 0
668 08:57:32.653868 PCI: 00:12.6: enabled 0
669 08:57:32.656653 PCI: 00:14.0: enabled 1
670 08:57:32.657229 PCI: 00:14.1: enabled 0
671 08:57:32.660745 PCI: 00:14.3: enabled 1
672 08:57:32.663669 PCI: 00:14.5: enabled 0
673 08:57:32.664051 PCI: 00:15.0: enabled 1
674 08:57:32.667348 PCI: 00:15.1: enabled 1
675 08:57:32.670545 PCI: 00:15.2: enabled 0
676 08:57:32.673348 PCI: 00:15.3: enabled 0
677 08:57:32.673772 PCI: 00:16.0: enabled 1
678 08:57:32.676785 PCI: 00:16.1: enabled 0
679 08:57:32.680761 PCI: 00:16.2: enabled 0
680 08:57:32.683697 PCI: 00:16.3: enabled 0
681 08:57:32.684214 PCI: 00:16.4: enabled 0
682 08:57:32.687246 PCI: 00:16.5: enabled 0
683 08:57:32.690130 PCI: 00:17.0: enabled 1
684 08:57:32.693653 PCI: 00:19.0: enabled 1
685 08:57:32.694168 PCI: 00:19.1: enabled 0
686 08:57:32.696738 PCI: 00:19.2: enabled 0
687 08:57:32.700000 PCI: 00:1a.0: enabled 0
688 08:57:32.700413 PCI: 00:1c.0: enabled 0
689 08:57:32.703450 PCI: 00:1c.1: enabled 0
690 08:57:32.706432 PCI: 00:1c.2: enabled 0
691 08:57:32.710359 PCI: 00:1c.3: enabled 0
692 08:57:32.710896 PCI: 00:1c.4: enabled 0
693 08:57:32.712920 PCI: 00:1c.5: enabled 0
694 08:57:32.716409 PCI: 00:1c.6: enabled 0
695 08:57:32.719985 PCI: 00:1c.7: enabled 0
696 08:57:32.720366 PCI: 00:1d.0: enabled 1
697 08:57:32.723416 PCI: 00:1d.1: enabled 0
698 08:57:32.726281 PCI: 00:1d.2: enabled 0
699 08:57:32.729891 PCI: 00:1d.3: enabled 0
700 08:57:32.730271 PCI: 00:1d.4: enabled 0
701 08:57:32.733553 PCI: 00:1d.5: enabled 1
702 08:57:32.736487 PCI: 00:1e.0: enabled 1
703 08:57:32.736868 PCI: 00:1e.1: enabled 0
704 08:57:32.740317 PCI: 00:1e.2: enabled 1
705 08:57:32.743132 PCI: 00:1e.3: enabled 1
706 08:57:32.746702 PCI: 00:1f.0: enabled 1
707 08:57:32.747107 PCI: 00:1f.1: enabled 1
708 08:57:32.750389 PCI: 00:1f.2: enabled 1
709 08:57:32.752971 PCI: 00:1f.3: enabled 1
710 08:57:32.756328 PCI: 00:1f.4: enabled 1
711 08:57:32.756716 PCI: 00:1f.5: enabled 1
712 08:57:32.759371 PCI: 00:1f.6: enabled 0
713 08:57:32.763473 USB0 port 0: enabled 1
714 08:57:32.763959 I2C: 00:15: enabled 1
715 08:57:32.766296 I2C: 00:5d: enabled 1
716 08:57:32.769823 GENERIC: 0.0: enabled 1
717 08:57:32.773364 I2C: 00:1a: enabled 1
718 08:57:32.773858 I2C: 00:38: enabled 1
719 08:57:32.776177 I2C: 00:39: enabled 1
720 08:57:32.779492 I2C: 00:3a: enabled 1
721 08:57:32.779877 I2C: 00:3b: enabled 1
722 08:57:32.783191 PCI: 00:00.0: enabled 1
723 08:57:32.786407 SPI: 00: enabled 1
724 08:57:32.786793 SPI: 01: enabled 1
725 08:57:32.789577 PNP: 0c09.0: enabled 1
726 08:57:32.793181 USB2 port 0: enabled 1
727 08:57:32.793672 USB2 port 1: enabled 1
728 08:57:32.796676 USB2 port 2: enabled 0
729 08:57:32.799209 USB2 port 3: enabled 0
730 08:57:32.799594 USB2 port 5: enabled 0
731 08:57:32.802870 USB2 port 6: enabled 1
732 08:57:32.805926 USB2 port 9: enabled 1
733 08:57:32.809178 USB3 port 0: enabled 1
734 08:57:32.809561 USB3 port 1: enabled 1
735 08:57:32.812858 USB3 port 2: enabled 1
736 08:57:32.816129 USB3 port 3: enabled 1
737 08:57:32.816516 USB3 port 4: enabled 0
738 08:57:32.819452 APIC: 03: enabled 1
739 08:57:32.822929 APIC: 02: enabled 1
740 08:57:32.823481 APIC: 01: enabled 1
741 08:57:32.826328 APIC: 05: enabled 1
742 08:57:32.826710 APIC: 04: enabled 1
743 08:57:32.829019 APIC: 06: enabled 1
744 08:57:32.832743 APIC: 07: enabled 1
745 08:57:32.833127 Compare with tree...
746 08:57:32.836228 Root Device: enabled 1
747 08:57:32.839260 CPU_CLUSTER: 0: enabled 1
748 08:57:32.842903 APIC: 00: enabled 1
749 08:57:32.843425 APIC: 03: enabled 1
750 08:57:32.845946 APIC: 02: enabled 1
751 08:57:32.849376 APIC: 01: enabled 1
752 08:57:32.849869 APIC: 05: enabled 1
753 08:57:32.852424 APIC: 04: enabled 1
754 08:57:32.856174 APIC: 06: enabled 1
755 08:57:32.856665 APIC: 07: enabled 1
756 08:57:32.859005 DOMAIN: 0000: enabled 1
757 08:57:32.862540 PCI: 00:00.0: enabled 1
758 08:57:32.866428 PCI: 00:02.0: enabled 1
759 08:57:32.866917 PCI: 00:04.0: enabled 0
760 08:57:32.869084 PCI: 00:05.0: enabled 0
761 08:57:32.872107 PCI: 00:12.0: enabled 1
762 08:57:32.875621 PCI: 00:12.5: enabled 0
763 08:57:32.878916 PCI: 00:12.6: enabled 0
764 08:57:32.879325 PCI: 00:14.0: enabled 1
765 08:57:32.882766 USB0 port 0: enabled 1
766 08:57:32.885376 USB2 port 0: enabled 1
767 08:57:32.888801 USB2 port 1: enabled 1
768 08:57:32.892587 USB2 port 2: enabled 0
769 08:57:32.893082 USB2 port 3: enabled 0
770 08:57:32.896003 USB2 port 5: enabled 0
771 08:57:32.898799 USB2 port 6: enabled 1
772 08:57:32.902397 USB2 port 9: enabled 1
773 08:57:32.905722 USB3 port 0: enabled 1
774 08:57:32.909469 USB3 port 1: enabled 1
775 08:57:32.910002 USB3 port 2: enabled 1
776 08:57:32.911893 USB3 port 3: enabled 1
777 08:57:32.915284 USB3 port 4: enabled 0
778 08:57:32.918801 PCI: 00:14.1: enabled 0
779 08:57:32.922281 PCI: 00:14.3: enabled 1
780 08:57:32.922709 PCI: 00:14.5: enabled 0
781 08:57:32.925718 PCI: 00:15.0: enabled 1
782 08:57:32.928636 I2C: 00:15: enabled 1
783 08:57:32.932083 PCI: 00:15.1: enabled 1
784 08:57:32.932463 I2C: 00:5d: enabled 1
785 08:57:32.935459 GENERIC: 0.0: enabled 1
786 08:57:32.938814 PCI: 00:15.2: enabled 0
787 08:57:32.942103 PCI: 00:15.3: enabled 0
788 08:57:32.945402 PCI: 00:16.0: enabled 1
789 08:57:32.945906 PCI: 00:16.1: enabled 0
790 08:57:32.948437 PCI: 00:16.2: enabled 0
791 08:57:32.951818 PCI: 00:16.3: enabled 0
792 08:57:32.955371 PCI: 00:16.4: enabled 0
793 08:57:32.958678 PCI: 00:16.5: enabled 0
794 08:57:32.959110 PCI: 00:17.0: enabled 1
795 08:57:32.961505 PCI: 00:19.0: enabled 1
796 08:57:32.966023 I2C: 00:1a: enabled 1
797 08:57:32.968725 I2C: 00:38: enabled 1
798 08:57:32.971641 I2C: 00:39: enabled 1
799 08:57:32.972020 I2C: 00:3a: enabled 1
800 08:57:32.975048 I2C: 00:3b: enabled 1
801 08:57:32.978711 PCI: 00:19.1: enabled 0
802 08:57:32.982032 PCI: 00:19.2: enabled 0
803 08:57:32.982567 PCI: 00:1a.0: enabled 0
804 08:57:32.985456 PCI: 00:1c.0: enabled 0
805 08:57:32.988178 PCI: 00:1c.1: enabled 0
806 08:57:32.991757 PCI: 00:1c.2: enabled 0
807 08:57:32.995118 PCI: 00:1c.3: enabled 0
808 08:57:32.995635 PCI: 00:1c.4: enabled 0
809 08:57:32.998040 PCI: 00:1c.5: enabled 0
810 08:57:33.001984 PCI: 00:1c.6: enabled 0
811 08:57:33.005303 PCI: 00:1c.7: enabled 0
812 08:57:33.008060 PCI: 00:1d.0: enabled 1
813 08:57:33.008475 PCI: 00:1d.1: enabled 0
814 08:57:33.011246 PCI: 00:1d.2: enabled 0
815 08:57:33.014963 PCI: 00:1d.3: enabled 0
816 08:57:33.017786 PCI: 00:1d.4: enabled 0
817 08:57:33.021717 PCI: 00:1d.5: enabled 1
818 08:57:33.022263 PCI: 00:00.0: enabled 1
819 08:57:33.024667 PCI: 00:1e.0: enabled 1
820 08:57:33.028180 PCI: 00:1e.1: enabled 0
821 08:57:33.031171 PCI: 00:1e.2: enabled 1
822 08:57:33.031583 SPI: 00: enabled 1
823 08:57:33.034918 PCI: 00:1e.3: enabled 1
824 08:57:33.037813 SPI: 01: enabled 1
825 08:57:33.041419 PCI: 00:1f.0: enabled 1
826 08:57:33.041826 PNP: 0c09.0: enabled 1
827 08:57:33.044727 PCI: 00:1f.1: enabled 1
828 08:57:33.047761 PCI: 00:1f.2: enabled 1
829 08:57:33.051029 PCI: 00:1f.3: enabled 1
830 08:57:33.054496 PCI: 00:1f.4: enabled 1
831 08:57:33.054868 PCI: 00:1f.5: enabled 1
832 08:57:33.057902 PCI: 00:1f.6: enabled 0
833 08:57:33.061206 Root Device scanning...
834 08:57:33.064385 scan_static_bus for Root Device
835 08:57:33.067939 CPU_CLUSTER: 0 enabled
836 08:57:33.068320 DOMAIN: 0000 enabled
837 08:57:33.071527 DOMAIN: 0000 scanning...
838 08:57:33.074674 PCI: pci_scan_bus for bus 00
839 08:57:33.078336 PCI: 00:00.0 [8086/0000] ops
840 08:57:33.081187 PCI: 00:00.0 [8086/9b61] enabled
841 08:57:33.084837 PCI: 00:02.0 [8086/0000] bus ops
842 08:57:33.088072 PCI: 00:02.0 [8086/9b41] enabled
843 08:57:33.090944 PCI: 00:04.0 [8086/1903] disabled
844 08:57:33.094925 PCI: 00:08.0 [8086/1911] enabled
845 08:57:33.097659 PCI: 00:12.0 [8086/02f9] enabled
846 08:57:33.101280 PCI: 00:14.0 [8086/0000] bus ops
847 08:57:33.104695 PCI: 00:14.0 [8086/02ed] enabled
848 08:57:33.107464 PCI: 00:14.2 [8086/02ef] enabled
849 08:57:33.111573 PCI: 00:14.3 [8086/02f0] enabled
850 08:57:33.115062 PCI: 00:15.0 [8086/0000] bus ops
851 08:57:33.117815 PCI: 00:15.0 [8086/02e8] enabled
852 08:57:33.121169 PCI: 00:15.1 [8086/0000] bus ops
853 08:57:33.124080 PCI: 00:15.1 [8086/02e9] enabled
854 08:57:33.127646 PCI: 00:16.0 [8086/0000] ops
855 08:57:33.131318 PCI: 00:16.0 [8086/02e0] enabled
856 08:57:33.134232 PCI: 00:17.0 [8086/0000] ops
857 08:57:33.137544 PCI: 00:17.0 [8086/02d3] enabled
858 08:57:33.140814 PCI: 00:19.0 [8086/0000] bus ops
859 08:57:33.144229 PCI: 00:19.0 [8086/02c5] enabled
860 08:57:33.147471 PCI: 00:1d.0 [8086/0000] bus ops
861 08:57:33.150839 PCI: 00:1d.0 [8086/02b0] enabled
862 08:57:33.157359 PCI: Static device PCI: 00:1d.5 not found, disabling it.
863 08:57:33.157771 PCI: 00:1e.0 [8086/0000] ops
864 08:57:33.161170 PCI: 00:1e.0 [8086/02a8] enabled
865 08:57:33.164203 PCI: 00:1e.2 [8086/0000] bus ops
866 08:57:33.167495 PCI: 00:1e.2 [8086/02aa] enabled
867 08:57:33.170878 PCI: 00:1e.3 [8086/0000] bus ops
868 08:57:33.174748 PCI: 00:1e.3 [8086/02ab] enabled
869 08:57:33.177912 PCI: 00:1f.0 [8086/0000] bus ops
870 08:57:33.181102 PCI: 00:1f.0 [8086/0284] enabled
871 08:57:33.187757 PCI: Static device PCI: 00:1f.1 not found, disabling it.
872 08:57:33.194349 PCI: Static device PCI: 00:1f.2 not found, disabling it.
873 08:57:33.197483 PCI: 00:1f.3 [8086/0000] bus ops
874 08:57:33.201320 PCI: 00:1f.3 [8086/02c8] enabled
875 08:57:33.204358 PCI: 00:1f.4 [8086/0000] bus ops
876 08:57:33.207417 PCI: 00:1f.4 [8086/02a3] enabled
877 08:57:33.211102 PCI: 00:1f.5 [8086/0000] bus ops
878 08:57:33.213982 PCI: 00:1f.5 [8086/02a4] enabled
879 08:57:33.217727 PCI: Leftover static devices:
880 08:57:33.218163 PCI: 00:05.0
881 08:57:33.221348 PCI: 00:12.5
882 08:57:33.221864 PCI: 00:12.6
883 08:57:33.222188 PCI: 00:14.1
884 08:57:33.223847 PCI: 00:14.5
885 08:57:33.224252 PCI: 00:15.2
886 08:57:33.227425 PCI: 00:15.3
887 08:57:33.227958 PCI: 00:16.1
888 08:57:33.228285 PCI: 00:16.2
889 08:57:33.230643 PCI: 00:16.3
890 08:57:33.230988 PCI: 00:16.4
891 08:57:33.234186 PCI: 00:16.5
892 08:57:33.234590 PCI: 00:19.1
893 08:57:33.234908 PCI: 00:19.2
894 08:57:33.237853 PCI: 00:1a.0
895 08:57:33.238365 PCI: 00:1c.0
896 08:57:33.241152 PCI: 00:1c.1
897 08:57:33.241668 PCI: 00:1c.2
898 08:57:33.244023 PCI: 00:1c.3
899 08:57:33.244431 PCI: 00:1c.4
900 08:57:33.244749 PCI: 00:1c.5
901 08:57:33.247183 PCI: 00:1c.6
902 08:57:33.247589 PCI: 00:1c.7
903 08:57:33.250747 PCI: 00:1d.1
904 08:57:33.251291 PCI: 00:1d.2
905 08:57:33.251621 PCI: 00:1d.3
906 08:57:33.253800 PCI: 00:1d.4
907 08:57:33.254204 PCI: 00:1d.5
908 08:57:33.257062 PCI: 00:1e.1
909 08:57:33.257535 PCI: 00:1f.1
910 08:57:33.257858 PCI: 00:1f.2
911 08:57:33.260850 PCI: 00:1f.6
912 08:57:33.263705 PCI: Check your devicetree.cb.
913 08:57:33.266997 PCI: 00:02.0 scanning...
914 08:57:33.270216 scan_generic_bus for PCI: 00:02.0
915 08:57:33.273630 scan_generic_bus for PCI: 00:02.0 done
916 08:57:33.280655 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
917 08:57:33.281171 PCI: 00:14.0 scanning...
918 08:57:33.284243 scan_static_bus for PCI: 00:14.0
919 08:57:33.287211 USB0 port 0 enabled
920 08:57:33.290537 USB0 port 0 scanning...
921 08:57:33.293916 scan_static_bus for USB0 port 0
922 08:57:33.294441 USB2 port 0 enabled
923 08:57:33.297005 USB2 port 1 enabled
924 08:57:33.300446 USB2 port 2 disabled
925 08:57:33.300956 USB2 port 3 disabled
926 08:57:33.304039 USB2 port 5 disabled
927 08:57:33.307430 USB2 port 6 enabled
928 08:57:33.307941 USB2 port 9 enabled
929 08:57:33.310339 USB3 port 0 enabled
930 08:57:33.310843 USB3 port 1 enabled
931 08:57:33.313796 USB3 port 2 enabled
932 08:57:33.317455 USB3 port 3 enabled
933 08:57:33.318000 USB3 port 4 disabled
934 08:57:33.320049 USB2 port 0 scanning...
935 08:57:33.323874 scan_static_bus for USB2 port 0
936 08:57:33.327115 scan_static_bus for USB2 port 0 done
937 08:57:33.333519 scan_bus: scanning of bus USB2 port 0 took 9708 usecs
938 08:57:33.337000 USB2 port 1 scanning...
939 08:57:33.339957 scan_static_bus for USB2 port 1
940 08:57:33.343848 scan_static_bus for USB2 port 1 done
941 08:57:33.346889 scan_bus: scanning of bus USB2 port 1 took 9701 usecs
942 08:57:33.350235 USB2 port 6 scanning...
943 08:57:33.353854 scan_static_bus for USB2 port 6
944 08:57:33.356804 scan_static_bus for USB2 port 6 done
945 08:57:33.363523 scan_bus: scanning of bus USB2 port 6 took 9699 usecs
946 08:57:33.366493 USB2 port 9 scanning...
947 08:57:33.370120 scan_static_bus for USB2 port 9
948 08:57:33.372945 scan_static_bus for USB2 port 9 done
949 08:57:33.376218 scan_bus: scanning of bus USB2 port 9 took 9709 usecs
950 08:57:33.379468 USB3 port 0 scanning...
951 08:57:33.383394 scan_static_bus for USB3 port 0
952 08:57:33.386980 scan_static_bus for USB3 port 0 done
953 08:57:33.393259 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
954 08:57:33.396503 USB3 port 1 scanning...
955 08:57:33.400328 scan_static_bus for USB3 port 1
956 08:57:33.402800 scan_static_bus for USB3 port 1 done
957 08:57:33.409750 scan_bus: scanning of bus USB3 port 1 took 9710 usecs
958 08:57:33.410267 USB3 port 2 scanning...
959 08:57:33.412912 scan_static_bus for USB3 port 2
960 08:57:33.416191 scan_static_bus for USB3 port 2 done
961 08:57:33.422936 scan_bus: scanning of bus USB3 port 2 took 9710 usecs
962 08:57:33.426186 USB3 port 3 scanning...
963 08:57:33.429400 scan_static_bus for USB3 port 3
964 08:57:33.433108 scan_static_bus for USB3 port 3 done
965 08:57:33.439628 scan_bus: scanning of bus USB3 port 3 took 9711 usecs
966 08:57:33.442844 scan_static_bus for USB0 port 0 done
967 08:57:33.446256 scan_bus: scanning of bus USB0 port 0 took 155440 usecs
968 08:57:33.453207 scan_static_bus for PCI: 00:14.0 done
969 08:57:33.455641 scan_bus: scanning of bus PCI: 00:14.0 took 173057 usecs
970 08:57:33.459371 PCI: 00:15.0 scanning...
971 08:57:33.462749 scan_generic_bus for PCI: 00:15.0
972 08:57:33.466243 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
973 08:57:33.472505 scan_generic_bus for PCI: 00:15.0 done
974 08:57:33.475718 scan_bus: scanning of bus PCI: 00:15.0 took 14311 usecs
975 08:57:33.479099 PCI: 00:15.1 scanning...
976 08:57:33.482499 scan_generic_bus for PCI: 00:15.1
977 08:57:33.485854 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
978 08:57:33.492299 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
979 08:57:33.495931 scan_generic_bus for PCI: 00:15.1 done
980 08:57:33.499040 scan_bus: scanning of bus PCI: 00:15.1 took 18670 usecs
981 08:57:33.502496 PCI: 00:19.0 scanning...
982 08:57:33.505818 scan_generic_bus for PCI: 00:19.0
983 08:57:33.512337 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
984 08:57:33.515217 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
985 08:57:33.518564 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
986 08:57:33.522085 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
987 08:57:33.525173 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
988 08:57:33.532340 scan_generic_bus for PCI: 00:19.0 done
989 08:57:33.535195 scan_bus: scanning of bus PCI: 00:19.0 took 30757 usecs
990 08:57:33.538460 PCI: 00:1d.0 scanning...
991 08:57:33.542105 do_pci_scan_bridge for PCI: 00:1d.0
992 08:57:33.545505 PCI: pci_scan_bus for bus 01
993 08:57:33.548597 PCI: 01:00.0 [1c5c/1327] enabled
994 08:57:33.551614 Enabling Common Clock Configuration
995 08:57:33.558587 L1 Sub-State supported from root port 29
996 08:57:33.558691 L1 Sub-State Support = 0xf
997 08:57:33.561577 CommonModeRestoreTime = 0x28
998 08:57:33.568267 Power On Value = 0x16, Power On Scale = 0x0
999 08:57:33.568383 ASPM: Enabled L1
1000 08:57:33.575073 scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs
1001 08:57:33.578218 PCI: 00:1e.2 scanning...
1002 08:57:33.581380 scan_generic_bus for PCI: 00:1e.2
1003 08:57:33.584720 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1004 08:57:33.588122 scan_generic_bus for PCI: 00:1e.2 done
1005 08:57:33.594700 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1006 08:57:33.598123 PCI: 00:1e.3 scanning...
1007 08:57:33.601409 scan_generic_bus for PCI: 00:1e.3
1008 08:57:33.605016 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1009 08:57:33.608080 scan_generic_bus for PCI: 00:1e.3 done
1010 08:57:33.614518 scan_bus: scanning of bus PCI: 00:1e.3 took 14005 usecs
1011 08:57:33.614645 PCI: 00:1f.0 scanning...
1012 08:57:33.617920 scan_static_bus for PCI: 00:1f.0
1013 08:57:33.621268 PNP: 0c09.0 enabled
1014 08:57:33.624686 scan_static_bus for PCI: 00:1f.0 done
1015 08:57:33.631549 scan_bus: scanning of bus PCI: 00:1f.0 took 12060 usecs
1016 08:57:33.634413 PCI: 00:1f.3 scanning...
1017 08:57:33.637929 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1018 08:57:33.641374 PCI: 00:1f.4 scanning...
1019 08:57:33.644793 scan_generic_bus for PCI: 00:1f.4
1020 08:57:33.648071 scan_generic_bus for PCI: 00:1f.4 done
1021 08:57:33.654274 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1022 08:57:33.657866 PCI: 00:1f.5 scanning...
1023 08:57:33.661326 scan_generic_bus for PCI: 00:1f.5
1024 08:57:33.664500 scan_generic_bus for PCI: 00:1f.5 done
1025 08:57:33.670860 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1026 08:57:33.677507 scan_bus: scanning of bus DOMAIN: 0000 took 605328 usecs
1027 08:57:33.680896 scan_static_bus for Root Device done
1028 08:57:33.684538 scan_bus: scanning of bus Root Device took 625209 usecs
1029 08:57:33.687868 done
1030 08:57:33.690747 Chrome EC: UHEPI supported
1031 08:57:33.694531 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1032 08:57:33.701061 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1033 08:57:33.707609 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1034 08:57:33.714231 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1035 08:57:33.717785 SPI flash protection: WPSW=0 SRP0=0
1036 08:57:33.724376 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1037 08:57:33.727585 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1038 08:57:33.730712 found VGA at PCI: 00:02.0
1039 08:57:33.734071 Setting up VGA for PCI: 00:02.0
1040 08:57:33.740871 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1041 08:57:33.744320 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1042 08:57:33.747315 Allocating resources...
1043 08:57:33.750583 Reading resources...
1044 08:57:33.753922 Root Device read_resources bus 0 link: 0
1045 08:57:33.757374 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1046 08:57:33.764363 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1047 08:57:33.767277 DOMAIN: 0000 read_resources bus 0 link: 0
1048 08:57:33.774390 PCI: 00:14.0 read_resources bus 0 link: 0
1049 08:57:33.777802 USB0 port 0 read_resources bus 0 link: 0
1050 08:57:33.785903 USB0 port 0 read_resources bus 0 link: 0 done
1051 08:57:33.789198 PCI: 00:14.0 read_resources bus 0 link: 0 done
1052 08:57:33.796800 PCI: 00:15.0 read_resources bus 1 link: 0
1053 08:57:33.800170 PCI: 00:15.0 read_resources bus 1 link: 0 done
1054 08:57:33.806781 PCI: 00:15.1 read_resources bus 2 link: 0
1055 08:57:33.809960 PCI: 00:15.1 read_resources bus 2 link: 0 done
1056 08:57:33.817665 PCI: 00:19.0 read_resources bus 3 link: 0
1057 08:57:33.823881 PCI: 00:19.0 read_resources bus 3 link: 0 done
1058 08:57:33.827328 PCI: 00:1d.0 read_resources bus 1 link: 0
1059 08:57:33.834704 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1060 08:57:33.837815 PCI: 00:1e.2 read_resources bus 4 link: 0
1061 08:57:33.844026 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1062 08:57:33.847838 PCI: 00:1e.3 read_resources bus 5 link: 0
1063 08:57:33.854045 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1064 08:57:33.857418 PCI: 00:1f.0 read_resources bus 0 link: 0
1065 08:57:33.863694 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1066 08:57:33.870302 DOMAIN: 0000 read_resources bus 0 link: 0 done
1067 08:57:33.874233 Root Device read_resources bus 0 link: 0 done
1068 08:57:33.876815 Done reading resources.
1069 08:57:33.883932 Show resources in subtree (Root Device)...After reading.
1070 08:57:33.887617 Root Device child on link 0 CPU_CLUSTER: 0
1071 08:57:33.890274 CPU_CLUSTER: 0 child on link 0 APIC: 00
1072 08:57:33.890811 APIC: 00
1073 08:57:33.893553 APIC: 03
1074 08:57:33.893988 APIC: 02
1075 08:57:33.896869 APIC: 01
1076 08:57:33.897275 APIC: 05
1077 08:57:33.897590 APIC: 04
1078 08:57:33.900087 APIC: 06
1079 08:57:33.900489 APIC: 07
1080 08:57:33.904006 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1081 08:57:33.913784 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1082 08:57:33.968268 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1083 08:57:33.968816 PCI: 00:00.0
1084 08:57:33.969527 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1085 08:57:33.969904 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1086 08:57:33.970237 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1087 08:57:33.970865 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1088 08:57:33.976537 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1089 08:57:33.983433 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1090 08:57:33.992865 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1091 08:57:33.999292 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1092 08:57:34.009078 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1093 08:57:34.019288 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1094 08:57:34.029029 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1095 08:57:34.039229 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1096 08:57:34.048739 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1097 08:57:34.058718 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1098 08:57:34.065486 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1099 08:57:34.075596 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1100 08:57:34.078618 PCI: 00:02.0
1101 08:57:34.088999 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1102 08:57:34.099019 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1103 08:57:34.105076 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1104 08:57:34.108621 PCI: 00:04.0
1105 08:57:34.109191 PCI: 00:08.0
1106 08:57:34.118611 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1107 08:57:34.121383 PCI: 00:12.0
1108 08:57:34.131556 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1109 08:57:34.135114 PCI: 00:14.0 child on link 0 USB0 port 0
1110 08:57:34.144489 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1111 08:57:34.151069 USB0 port 0 child on link 0 USB2 port 0
1112 08:57:34.151679 USB2 port 0
1113 08:57:34.154299 USB2 port 1
1114 08:57:34.154854 USB2 port 2
1115 08:57:34.157834 USB2 port 3
1116 08:57:34.158283 USB2 port 5
1117 08:57:34.160748 USB2 port 6
1118 08:57:34.161199 USB2 port 9
1119 08:57:34.164370 USB3 port 0
1120 08:57:34.164823 USB3 port 1
1121 08:57:34.168010 USB3 port 2
1122 08:57:34.170682 USB3 port 3
1123 08:57:34.171161 USB3 port 4
1124 08:57:34.174419 PCI: 00:14.2
1125 08:57:34.184821 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1126 08:57:34.194535 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1127 08:57:34.195127 PCI: 00:14.3
1128 08:57:34.204124 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1129 08:57:34.207558 PCI: 00:15.0 child on link 0 I2C: 01:15
1130 08:57:34.217943 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 08:57:34.220340 I2C: 01:15
1132 08:57:34.223832 PCI: 00:15.1 child on link 0 I2C: 02:5d
1133 08:57:34.234190 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 08:57:34.237145 I2C: 02:5d
1135 08:57:34.237598 GENERIC: 0.0
1136 08:57:34.240637 PCI: 00:16.0
1137 08:57:34.250377 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 08:57:34.250922 PCI: 00:17.0
1139 08:57:34.260447 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1140 08:57:34.270722 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1141 08:57:34.277004 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1142 08:57:34.287777 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1143 08:57:34.293949 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1144 08:57:34.304023 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1145 08:57:34.306634 PCI: 00:19.0 child on link 0 I2C: 03:1a
1146 08:57:34.316821 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 08:57:34.320074 I2C: 03:1a
1148 08:57:34.320523 I2C: 03:38
1149 08:57:34.322940 I2C: 03:39
1150 08:57:34.323429 I2C: 03:3a
1151 08:57:34.323786 I2C: 03:3b
1152 08:57:34.330056 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1153 08:57:34.336555 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1154 08:57:34.346220 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1155 08:57:34.356410 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1156 08:57:34.359330 PCI: 01:00.0
1157 08:57:34.369545 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1158 08:57:34.370004 PCI: 00:1e.0
1159 08:57:34.382920 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1160 08:57:34.392889 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1161 08:57:34.396512 PCI: 00:1e.2 child on link 0 SPI: 00
1162 08:57:34.406044 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 08:57:34.406604 SPI: 00
1164 08:57:34.409390 PCI: 00:1e.3 child on link 0 SPI: 01
1165 08:57:34.418916 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 08:57:34.422469 SPI: 01
1167 08:57:34.425839 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1168 08:57:34.435763 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1169 08:57:34.442343 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1170 08:57:34.446086 PNP: 0c09.0
1171 08:57:34.455157 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1172 08:57:34.455707 PCI: 00:1f.3
1173 08:57:34.465129 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 08:57:34.475250 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1175 08:57:34.478792 PCI: 00:1f.4
1176 08:57:34.485659 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1177 08:57:34.494796 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1178 08:57:34.498880 PCI: 00:1f.5
1179 08:57:34.508383 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1180 08:57:34.514496 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1181 08:57:34.518577 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1182 08:57:34.528026 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1183 08:57:34.531525 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1184 08:57:34.534870 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1185 08:57:34.537917 PCI: 00:17.0 18 * [0x60 - 0x67] io
1186 08:57:34.541541 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1187 08:57:34.547919 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1188 08:57:34.554222 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1189 08:57:34.561361 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1190 08:57:34.571009 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1191 08:57:34.577782 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1192 08:57:34.581011 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1193 08:57:34.587909 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1194 08:57:34.594407 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1195 08:57:34.597197 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1196 08:57:34.604311 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1197 08:57:34.607941 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1198 08:57:34.614096 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1199 08:57:34.617506 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1200 08:57:34.624628 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1201 08:57:34.627701 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1202 08:57:34.634147 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1203 08:57:34.637296 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1204 08:57:34.643601 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1205 08:57:34.646953 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1206 08:57:34.650731 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1207 08:57:34.656871 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1208 08:57:34.660296 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1209 08:57:34.666862 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1210 08:57:34.669964 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1211 08:57:34.676776 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1212 08:57:34.680184 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1213 08:57:34.686664 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1214 08:57:34.689798 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1215 08:57:34.696500 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1216 08:57:34.699836 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1217 08:57:34.709624 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1218 08:57:34.713306 avoid_fixed_resources: DOMAIN: 0000
1219 08:57:34.719884 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1220 08:57:34.722748 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1221 08:57:34.733130 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1222 08:57:34.739414 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1223 08:57:34.745948 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1224 08:57:34.756080 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1225 08:57:34.762330 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1226 08:57:34.769192 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1227 08:57:34.779299 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1228 08:57:34.785747 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1229 08:57:34.792434 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1230 08:57:34.798738 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1231 08:57:34.802090 Setting resources...
1232 08:57:34.808659 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1233 08:57:34.811943 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1234 08:57:34.815531 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1235 08:57:34.819090 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1236 08:57:34.825422 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1237 08:57:34.831965 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1238 08:57:34.835384 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1239 08:57:34.841989 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1240 08:57:34.852150 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1241 08:57:34.855362 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1242 08:57:34.861701 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1243 08:57:34.865328 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1244 08:57:34.871658 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1245 08:57:34.875342 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1246 08:57:34.881855 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1247 08:57:34.885349 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1248 08:57:34.891399 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1249 08:57:34.894951 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1250 08:57:34.898084 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1251 08:57:34.904626 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1252 08:57:34.908084 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1253 08:57:34.914700 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1254 08:57:34.918299 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1255 08:57:34.924827 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1256 08:57:34.928290 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1257 08:57:34.934983 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1258 08:57:34.937840 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1259 08:57:34.944608 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1260 08:57:34.948204 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1261 08:57:34.954845 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1262 08:57:34.958222 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1263 08:57:34.964677 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1264 08:57:34.971038 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1265 08:57:34.977494 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1266 08:57:34.984363 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1267 08:57:34.994564 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1268 08:57:34.997933 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1269 08:57:35.004359 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1270 08:57:35.010529 Root Device assign_resources, bus 0 link: 0
1271 08:57:35.013870 DOMAIN: 0000 assign_resources, bus 0 link: 0
1272 08:57:35.023860 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1273 08:57:35.030783 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1274 08:57:35.037069 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1275 08:57:35.047251 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1276 08:57:35.053719 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1277 08:57:35.063827 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1278 08:57:35.067135 PCI: 00:14.0 assign_resources, bus 0 link: 0
1279 08:57:35.074171 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 08:57:35.080374 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1281 08:57:35.090253 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1282 08:57:35.097642 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1283 08:57:35.107194 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1284 08:57:35.110421 PCI: 00:15.0 assign_resources, bus 1 link: 0
1285 08:57:35.113749 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 08:57:35.123940 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1287 08:57:35.126758 PCI: 00:15.1 assign_resources, bus 2 link: 0
1288 08:57:35.133615 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 08:57:35.140253 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1290 08:57:35.150245 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1291 08:57:35.156786 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1292 08:57:35.163327 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1293 08:57:35.173274 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1294 08:57:35.179811 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1295 08:57:35.186576 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1296 08:57:35.196496 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1297 08:57:35.199656 PCI: 00:19.0 assign_resources, bus 3 link: 0
1298 08:57:35.206616 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 08:57:35.213123 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1300 08:57:35.223035 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1301 08:57:35.229210 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1302 08:57:35.235918 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1303 08:57:35.242887 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1304 08:57:35.249283 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1305 08:57:35.255851 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1306 08:57:35.266140 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1307 08:57:35.268956 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1308 08:57:35.275572 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 08:57:35.282061 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1310 08:57:35.288585 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1311 08:57:35.292423 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 08:57:35.295252 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1313 08:57:35.302859 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 08:57:35.305930 LPC: Trying to open IO window from 800 size 1ff
1315 08:57:35.315653 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1316 08:57:35.322349 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1317 08:57:35.331923 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1318 08:57:35.338721 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1319 08:57:35.345255 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 08:57:35.348994 Root Device assign_resources, bus 0 link: 0
1321 08:57:35.352490 Done setting resources.
1322 08:57:35.358402 Show resources in subtree (Root Device)...After assigning values.
1323 08:57:35.361872 Root Device child on link 0 CPU_CLUSTER: 0
1324 08:57:35.365454 CPU_CLUSTER: 0 child on link 0 APIC: 00
1325 08:57:35.368788 APIC: 00
1326 08:57:35.368919 APIC: 03
1327 08:57:35.369030 APIC: 02
1328 08:57:35.372274 APIC: 01
1329 08:57:35.372398 APIC: 05
1330 08:57:35.375025 APIC: 04
1331 08:57:35.375156 APIC: 06
1332 08:57:35.375265 APIC: 07
1333 08:57:35.381647 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1334 08:57:35.392015 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1335 08:57:35.402047 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1336 08:57:35.404966 PCI: 00:00.0
1337 08:57:35.411341 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1338 08:57:35.421423 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1339 08:57:35.431432 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1340 08:57:35.441034 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1341 08:57:35.451263 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1342 08:57:35.460905 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1343 08:57:35.468004 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1344 08:57:35.477888 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1345 08:57:35.487655 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1346 08:57:35.497173 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1347 08:57:35.507781 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1348 08:57:35.513964 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1349 08:57:35.523709 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1350 08:57:35.533820 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1351 08:57:35.543661 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1352 08:57:35.553493 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1353 08:57:35.553618 PCI: 00:02.0
1354 08:57:35.566913 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1355 08:57:35.576666 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1356 08:57:35.586800 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1357 08:57:35.586929 PCI: 00:04.0
1358 08:57:35.590282 PCI: 00:08.0
1359 08:57:35.599686 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1360 08:57:35.599819 PCI: 00:12.0
1361 08:57:35.609590 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1362 08:57:35.616172 PCI: 00:14.0 child on link 0 USB0 port 0
1363 08:57:35.626340 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1364 08:57:35.629573 USB0 port 0 child on link 0 USB2 port 0
1365 08:57:35.632778 USB2 port 0
1366 08:57:35.632910 USB2 port 1
1367 08:57:35.636141 USB2 port 2
1368 08:57:35.636270 USB2 port 3
1369 08:57:35.639832 USB2 port 5
1370 08:57:35.639962 USB2 port 6
1371 08:57:35.642711 USB2 port 9
1372 08:57:35.642837 USB3 port 0
1373 08:57:35.646575 USB3 port 1
1374 08:57:35.646703 USB3 port 2
1375 08:57:35.649811 USB3 port 3
1376 08:57:35.653027 USB3 port 4
1377 08:57:35.653125 PCI: 00:14.2
1378 08:57:35.662850 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1379 08:57:35.672640 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1380 08:57:35.676091 PCI: 00:14.3
1381 08:57:35.685797 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1382 08:57:35.689079 PCI: 00:15.0 child on link 0 I2C: 01:15
1383 08:57:35.698873 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1384 08:57:35.702439 I2C: 01:15
1385 08:57:35.705874 PCI: 00:15.1 child on link 0 I2C: 02:5d
1386 08:57:35.715781 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1387 08:57:35.718790 I2C: 02:5d
1388 08:57:35.718888 GENERIC: 0.0
1389 08:57:35.722355 PCI: 00:16.0
1390 08:57:35.732368 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1391 08:57:35.732471 PCI: 00:17.0
1392 08:57:35.742050 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1393 08:57:35.752217 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1394 08:57:35.762034 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1395 08:57:35.772016 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1396 08:57:35.781930 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1397 08:57:35.791762 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1398 08:57:35.795384 PCI: 00:19.0 child on link 0 I2C: 03:1a
1399 08:57:35.805419 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1400 08:57:35.808298 I2C: 03:1a
1401 08:57:35.808398 I2C: 03:38
1402 08:57:35.811360 I2C: 03:39
1403 08:57:35.811458 I2C: 03:3a
1404 08:57:35.814858 I2C: 03:3b
1405 08:57:35.818419 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1406 08:57:35.828318 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1407 08:57:35.838156 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1408 08:57:35.847978 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1409 08:57:35.848087 PCI: 01:00.0
1410 08:57:35.860994 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1411 08:57:35.861107 PCI: 00:1e.0
1412 08:57:35.871138 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1413 08:57:35.884275 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1414 08:57:35.887856 PCI: 00:1e.2 child on link 0 SPI: 00
1415 08:57:35.897699 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1416 08:57:35.897840 SPI: 00
1417 08:57:35.900790 PCI: 00:1e.3 child on link 0 SPI: 01
1418 08:57:35.914002 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1419 08:57:35.914108 SPI: 01
1420 08:57:35.917254 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1421 08:57:35.927424 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1422 08:57:35.937175 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1423 08:57:35.937282 PNP: 0c09.0
1424 08:57:35.947332 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1425 08:57:35.947435 PCI: 00:1f.3
1426 08:57:35.957020 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1427 08:57:35.970504 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1428 08:57:35.970645 PCI: 00:1f.4
1429 08:57:35.980301 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1430 08:57:35.990648 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1431 08:57:35.990755 PCI: 00:1f.5
1432 08:57:36.003551 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1433 08:57:36.003657 Done allocating resources.
1434 08:57:36.010058 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1435 08:57:36.013322 Enabling resources...
1436 08:57:36.017042 PCI: 00:00.0 subsystem <- 8086/9b61
1437 08:57:36.019920 PCI: 00:00.0 cmd <- 06
1438 08:57:36.023613 PCI: 00:02.0 subsystem <- 8086/9b41
1439 08:57:36.026827 PCI: 00:02.0 cmd <- 03
1440 08:57:36.029620 PCI: 00:08.0 cmd <- 06
1441 08:57:36.033334 PCI: 00:12.0 subsystem <- 8086/02f9
1442 08:57:36.036283 PCI: 00:12.0 cmd <- 02
1443 08:57:36.039249 PCI: 00:14.0 subsystem <- 8086/02ed
1444 08:57:36.039349 PCI: 00:14.0 cmd <- 02
1445 08:57:36.042862 PCI: 00:14.2 cmd <- 02
1446 08:57:36.046462 PCI: 00:14.3 subsystem <- 8086/02f0
1447 08:57:36.049925 PCI: 00:14.3 cmd <- 02
1448 08:57:36.052821 PCI: 00:15.0 subsystem <- 8086/02e8
1449 08:57:36.056916 PCI: 00:15.0 cmd <- 02
1450 08:57:36.059346 PCI: 00:15.1 subsystem <- 8086/02e9
1451 08:57:36.062753 PCI: 00:15.1 cmd <- 02
1452 08:57:36.066195 PCI: 00:16.0 subsystem <- 8086/02e0
1453 08:57:36.069666 PCI: 00:16.0 cmd <- 02
1454 08:57:36.072604 PCI: 00:17.0 subsystem <- 8086/02d3
1455 08:57:36.075992 PCI: 00:17.0 cmd <- 03
1456 08:57:36.079577 PCI: 00:19.0 subsystem <- 8086/02c5
1457 08:57:36.082450 PCI: 00:19.0 cmd <- 02
1458 08:57:36.086084 PCI: 00:1d.0 bridge ctrl <- 0013
1459 08:57:36.089441 PCI: 00:1d.0 subsystem <- 8086/02b0
1460 08:57:36.089539 PCI: 00:1d.0 cmd <- 06
1461 08:57:36.095869 PCI: 00:1e.0 subsystem <- 8086/02a8
1462 08:57:36.095969 PCI: 00:1e.0 cmd <- 06
1463 08:57:36.099579 PCI: 00:1e.2 subsystem <- 8086/02aa
1464 08:57:36.102594 PCI: 00:1e.2 cmd <- 06
1465 08:57:36.106263 PCI: 00:1e.3 subsystem <- 8086/02ab
1466 08:57:36.109729 PCI: 00:1e.3 cmd <- 02
1467 08:57:36.112830 PCI: 00:1f.0 subsystem <- 8086/0284
1468 08:57:36.115894 PCI: 00:1f.0 cmd <- 407
1469 08:57:36.119462 PCI: 00:1f.3 subsystem <- 8086/02c8
1470 08:57:36.122282 PCI: 00:1f.3 cmd <- 02
1471 08:57:36.126288 PCI: 00:1f.4 subsystem <- 8086/02a3
1472 08:57:36.129165 PCI: 00:1f.4 cmd <- 03
1473 08:57:36.132628 PCI: 00:1f.5 subsystem <- 8086/02a4
1474 08:57:36.135597 PCI: 00:1f.5 cmd <- 406
1475 08:57:36.143624 PCI: 01:00.0 cmd <- 02
1476 08:57:36.149127 done.
1477 08:57:36.160711 ME: Version: 14.0.39.1367
1478 08:57:36.167220 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1479 08:57:36.170379 Initializing devices...
1480 08:57:36.170479 Root Device init ...
1481 08:57:36.177275 Chrome EC: Set SMI mask to 0x0000000000000000
1482 08:57:36.180124 Chrome EC: clear events_b mask to 0x0000000000000000
1483 08:57:36.186891 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1484 08:57:36.193577 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1485 08:57:36.200417 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1486 08:57:36.203800 Chrome EC: Set WAKE mask to 0x0000000000000000
1487 08:57:36.206680 Root Device init finished in 35340 usecs
1488 08:57:36.211068 CPU_CLUSTER: 0 init ...
1489 08:57:36.216906 CPU_CLUSTER: 0 init finished in 2449 usecs
1490 08:57:36.221309 PCI: 00:00.0 init ...
1491 08:57:36.224880 CPU TDP: 15 Watts
1492 08:57:36.227923 CPU PL2 = 64 Watts
1493 08:57:36.231361 PCI: 00:00.0 init finished in 7081 usecs
1494 08:57:36.234925 PCI: 00:02.0 init ...
1495 08:57:36.237923 PCI: 00:02.0 init finished in 2252 usecs
1496 08:57:36.241546 PCI: 00:08.0 init ...
1497 08:57:36.244618 PCI: 00:08.0 init finished in 2251 usecs
1498 08:57:36.248260 PCI: 00:12.0 init ...
1499 08:57:36.251302 PCI: 00:12.0 init finished in 2252 usecs
1500 08:57:36.254390 PCI: 00:14.0 init ...
1501 08:57:36.257970 PCI: 00:14.0 init finished in 2252 usecs
1502 08:57:36.261054 PCI: 00:14.2 init ...
1503 08:57:36.264119 PCI: 00:14.2 init finished in 2253 usecs
1504 08:57:36.267864 PCI: 00:14.3 init ...
1505 08:57:36.270788 PCI: 00:14.3 init finished in 2272 usecs
1506 08:57:36.274471 PCI: 00:15.0 init ...
1507 08:57:36.277955 DW I2C bus 0 at 0xd121f000 (400 KHz)
1508 08:57:36.280821 PCI: 00:15.0 init finished in 5970 usecs
1509 08:57:36.284311 PCI: 00:15.1 init ...
1510 08:57:36.287584 DW I2C bus 1 at 0xd1220000 (400 KHz)
1511 08:57:36.293999 PCI: 00:15.1 init finished in 5975 usecs
1512 08:57:36.294097 PCI: 00:16.0 init ...
1513 08:57:36.300872 PCI: 00:16.0 init finished in 2253 usecs
1514 08:57:36.303685 PCI: 00:19.0 init ...
1515 08:57:36.307035 DW I2C bus 4 at 0xd1222000 (400 KHz)
1516 08:57:36.310349 PCI: 00:19.0 init finished in 5978 usecs
1517 08:57:36.314052 PCI: 00:1d.0 init ...
1518 08:57:36.317049 Initializing PCH PCIe bridge.
1519 08:57:36.320635 PCI: 00:1d.0 init finished in 5286 usecs
1520 08:57:36.323664 PCI: 00:1f.0 init ...
1521 08:57:36.327102 IOAPIC: Initializing IOAPIC at 0xfec00000
1522 08:57:36.333382 IOAPIC: Bootstrap Processor Local APIC = 0x00
1523 08:57:36.333484 IOAPIC: ID = 0x02
1524 08:57:36.337016 IOAPIC: Dumping registers
1525 08:57:36.339912 reg 0x0000: 0x02000000
1526 08:57:36.343529 reg 0x0001: 0x00770020
1527 08:57:36.343627 reg 0x0002: 0x00000000
1528 08:57:36.350161 PCI: 00:1f.0 init finished in 23539 usecs
1529 08:57:36.353219 PCI: 00:1f.4 init ...
1530 08:57:36.357158 PCI: 00:1f.4 init finished in 2262 usecs
1531 08:57:36.367213 PCI: 01:00.0 init ...
1532 08:57:36.370896 PCI: 01:00.0 init finished in 2254 usecs
1533 08:57:36.375104 PNP: 0c09.0 init ...
1534 08:57:36.378216 Google Chrome EC uptime: 11.051 seconds
1535 08:57:36.384615 Google Chrome AP resets since EC boot: 0
1536 08:57:36.388149 Google Chrome most recent AP reset causes:
1537 08:57:36.394965 Google Chrome EC reset flags at last EC boot: reset-pin
1538 08:57:36.397956 PNP: 0c09.0 init finished in 20565 usecs
1539 08:57:36.401371 Devices initialized
1540 08:57:36.404683 Show all devs... After init.
1541 08:57:36.404781 Root Device: enabled 1
1542 08:57:36.408204 CPU_CLUSTER: 0: enabled 1
1543 08:57:36.411523 DOMAIN: 0000: enabled 1
1544 08:57:36.411621 APIC: 00: enabled 1
1545 08:57:36.414447 PCI: 00:00.0: enabled 1
1546 08:57:36.418289 PCI: 00:02.0: enabled 1
1547 08:57:36.421341 PCI: 00:04.0: enabled 0
1548 08:57:36.421439 PCI: 00:05.0: enabled 0
1549 08:57:36.424414 PCI: 00:12.0: enabled 1
1550 08:57:36.428068 PCI: 00:12.5: enabled 0
1551 08:57:36.431061 PCI: 00:12.6: enabled 0
1552 08:57:36.431165 PCI: 00:14.0: enabled 1
1553 08:57:36.434415 PCI: 00:14.1: enabled 0
1554 08:57:36.438099 PCI: 00:14.3: enabled 1
1555 08:57:36.438196 PCI: 00:14.5: enabled 0
1556 08:57:36.441023 PCI: 00:15.0: enabled 1
1557 08:57:36.444506 PCI: 00:15.1: enabled 1
1558 08:57:36.447481 PCI: 00:15.2: enabled 0
1559 08:57:36.447578 PCI: 00:15.3: enabled 0
1560 08:57:36.451185 PCI: 00:16.0: enabled 1
1561 08:57:36.454197 PCI: 00:16.1: enabled 0
1562 08:57:36.457849 PCI: 00:16.2: enabled 0
1563 08:57:36.457948 PCI: 00:16.3: enabled 0
1564 08:57:36.460990 PCI: 00:16.4: enabled 0
1565 08:57:36.464046 PCI: 00:16.5: enabled 0
1566 08:57:36.467113 PCI: 00:17.0: enabled 1
1567 08:57:36.467211 PCI: 00:19.0: enabled 1
1568 08:57:36.470933 PCI: 00:19.1: enabled 0
1569 08:57:36.474221 PCI: 00:19.2: enabled 0
1570 08:57:36.477560 PCI: 00:1a.0: enabled 0
1571 08:57:36.477657 PCI: 00:1c.0: enabled 0
1572 08:57:36.480615 PCI: 00:1c.1: enabled 0
1573 08:57:36.483771 PCI: 00:1c.2: enabled 0
1574 08:57:36.483869 PCI: 00:1c.3: enabled 0
1575 08:57:36.487353 PCI: 00:1c.4: enabled 0
1576 08:57:36.490392 PCI: 00:1c.5: enabled 0
1577 08:57:36.493882 PCI: 00:1c.6: enabled 0
1578 08:57:36.493980 PCI: 00:1c.7: enabled 0
1579 08:57:36.497471 PCI: 00:1d.0: enabled 1
1580 08:57:36.500265 PCI: 00:1d.1: enabled 0
1581 08:57:36.503697 PCI: 00:1d.2: enabled 0
1582 08:57:36.503795 PCI: 00:1d.3: enabled 0
1583 08:57:36.507262 PCI: 00:1d.4: enabled 0
1584 08:57:36.510046 PCI: 00:1d.5: enabled 0
1585 08:57:36.513566 PCI: 00:1e.0: enabled 1
1586 08:57:36.513657 PCI: 00:1e.1: enabled 0
1587 08:57:36.516938 PCI: 00:1e.2: enabled 1
1588 08:57:36.520315 PCI: 00:1e.3: enabled 1
1589 08:57:36.523651 PCI: 00:1f.0: enabled 1
1590 08:57:36.523750 PCI: 00:1f.1: enabled 0
1591 08:57:36.527216 PCI: 00:1f.2: enabled 0
1592 08:57:36.530410 PCI: 00:1f.3: enabled 1
1593 08:57:36.530512 PCI: 00:1f.4: enabled 1
1594 08:57:36.533412 PCI: 00:1f.5: enabled 1
1595 08:57:36.536991 PCI: 00:1f.6: enabled 0
1596 08:57:36.540016 USB0 port 0: enabled 1
1597 08:57:36.540121 I2C: 01:15: enabled 1
1598 08:57:36.543122 I2C: 02:5d: enabled 1
1599 08:57:36.546895 GENERIC: 0.0: enabled 1
1600 08:57:36.546992 I2C: 03:1a: enabled 1
1601 08:57:36.549842 I2C: 03:38: enabled 1
1602 08:57:36.553488 I2C: 03:39: enabled 1
1603 08:57:36.553587 I2C: 03:3a: enabled 1
1604 08:57:36.556605 I2C: 03:3b: enabled 1
1605 08:57:36.559677 PCI: 00:00.0: enabled 1
1606 08:57:36.559774 SPI: 00: enabled 1
1607 08:57:36.563276 SPI: 01: enabled 1
1608 08:57:36.566309 PNP: 0c09.0: enabled 1
1609 08:57:36.566407 USB2 port 0: enabled 1
1610 08:57:36.570026 USB2 port 1: enabled 1
1611 08:57:36.573022 USB2 port 2: enabled 0
1612 08:57:36.576887 USB2 port 3: enabled 0
1613 08:57:36.576985 USB2 port 5: enabled 0
1614 08:57:36.579704 USB2 port 6: enabled 1
1615 08:57:36.582812 USB2 port 9: enabled 1
1616 08:57:36.582910 USB3 port 0: enabled 1
1617 08:57:36.586423 USB3 port 1: enabled 1
1618 08:57:36.589558 USB3 port 2: enabled 1
1619 08:57:36.592540 USB3 port 3: enabled 1
1620 08:57:36.592638 USB3 port 4: enabled 0
1621 08:57:36.596020 APIC: 03: enabled 1
1622 08:57:36.599342 APIC: 02: enabled 1
1623 08:57:36.599440 APIC: 01: enabled 1
1624 08:57:36.602842 APIC: 05: enabled 1
1625 08:57:36.602940 APIC: 04: enabled 1
1626 08:57:36.606274 APIC: 06: enabled 1
1627 08:57:36.609148 APIC: 07: enabled 1
1628 08:57:36.609245 PCI: 00:08.0: enabled 1
1629 08:57:36.612657 PCI: 00:14.2: enabled 1
1630 08:57:36.616019 PCI: 01:00.0: enabled 1
1631 08:57:36.618804 Disabling ACPI via APMC:
1632 08:57:36.622399 done.
1633 08:57:36.625817 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1634 08:57:36.629014 ELOG: NV offset 0xaf0000 size 0x4000
1635 08:57:36.636666 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1636 08:57:36.643268 ELOG: Event(17) added with size 13 at 2023-03-24 08:57:35 UTC
1637 08:57:36.649949 ELOG: Event(92) added with size 9 at 2023-03-24 08:57:35 UTC
1638 08:57:36.656507 ELOG: Event(93) added with size 9 at 2023-03-24 08:57:35 UTC
1639 08:57:36.663216 ELOG: Event(9A) added with size 9 at 2023-03-24 08:57:35 UTC
1640 08:57:36.669345 ELOG: Event(9E) added with size 10 at 2023-03-24 08:57:35 UTC
1641 08:57:36.676613 ELOG: Event(9F) added with size 14 at 2023-03-24 08:57:35 UTC
1642 08:57:36.679467 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1643 08:57:36.686841 ELOG: Event(A1) added with size 10 at 2023-03-24 08:57:35 UTC
1644 08:57:36.696637 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1645 08:57:36.703230 ELOG: Event(A0) added with size 9 at 2023-03-24 08:57:35 UTC
1646 08:57:36.707347 elog_add_boot_reason: Logged dev mode boot
1647 08:57:36.709799 Finalize devices...
1648 08:57:36.709901 PCI: 00:17.0 final
1649 08:57:36.713106 Devices finalized
1650 08:57:36.716688 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1651 08:57:36.722965 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1652 08:57:36.726540 ME: HFSTS1 : 0x90000245
1653 08:57:36.729970 ME: HFSTS2 : 0x3B850126
1654 08:57:36.736208 ME: HFSTS3 : 0x00000020
1655 08:57:36.739944 ME: HFSTS4 : 0x00004800
1656 08:57:36.742903 ME: HFSTS5 : 0x00000000
1657 08:57:36.746486 ME: HFSTS6 : 0x40400006
1658 08:57:36.749431 ME: Manufacturing Mode : NO
1659 08:57:36.752918 ME: FW Partition Table : OK
1660 08:57:36.755946 ME: Bringup Loader Failure : NO
1661 08:57:36.759325 ME: Firmware Init Complete : YES
1662 08:57:36.762965 ME: Boot Options Present : NO
1663 08:57:36.766035 ME: Update In Progress : NO
1664 08:57:36.769058 ME: D0i3 Support : YES
1665 08:57:36.772734 ME: Low Power State Enabled : NO
1666 08:57:36.775660 ME: CPU Replaced : NO
1667 08:57:36.779444 ME: CPU Replacement Valid : YES
1668 08:57:36.782818 ME: Current Working State : 5
1669 08:57:36.785956 ME: Current Operation State : 1
1670 08:57:36.789022 ME: Current Operation Mode : 0
1671 08:57:36.792647 ME: Error Code : 0
1672 08:57:36.795751 ME: CPU Debug Disabled : YES
1673 08:57:36.798844 ME: TXT Support : NO
1674 08:57:36.805520 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1675 08:57:36.812103 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1676 08:57:36.812203 CBFS @ c08000 size 3f8000
1677 08:57:36.819001 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1678 08:57:36.822091 CBFS: Locating 'fallback/dsdt.aml'
1679 08:57:36.825402 CBFS: Found @ offset 10bb80 size 3fa5
1680 08:57:36.832350 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1681 08:57:36.835899 CBFS @ c08000 size 3f8000
1682 08:57:36.841982 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1683 08:57:36.842080 CBFS: Locating 'fallback/slic'
1684 08:57:36.850423 CBFS: 'fallback/slic' not found.
1685 08:57:36.853957 ACPI: Writing ACPI tables at 99b3e000.
1686 08:57:36.854055 ACPI: * FACS
1687 08:57:36.857271 ACPI: * DSDT
1688 08:57:36.860884 Ramoops buffer: 0x100000@0x99a3d000.
1689 08:57:36.864104 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1690 08:57:36.870568 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1691 08:57:36.873719 Google Chrome EC: version:
1692 08:57:36.876773 ro: helios_v2.0.2659-56403530b
1693 08:57:36.880498 rw: helios_v2.0.2849-c41de27e7d
1694 08:57:36.880595 running image: 1
1695 08:57:36.884734 ACPI: * FADT
1696 08:57:36.884832 SCI is IRQ9
1697 08:57:36.891420 ACPI: added table 1/32, length now 40
1698 08:57:36.891517 ACPI: * SSDT
1699 08:57:36.895069 Found 1 CPU(s) with 8 core(s) each.
1700 08:57:36.898217 Error: Could not locate 'wifi_sar' in VPD.
1701 08:57:36.904952 Checking CBFS for default SAR values
1702 08:57:36.907995 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1703 08:57:36.911071 CBFS @ c08000 size 3f8000
1704 08:57:36.918189 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1705 08:57:36.921287 CBFS: Locating 'wifi_sar_defaults.hex'
1706 08:57:36.924355 CBFS: Found @ offset 5fac0 size 77
1707 08:57:36.927989 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1708 08:57:36.934476 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1709 08:57:36.937653 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1710 08:57:36.944459 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1711 08:57:36.947529 failed to find key in VPD: dsm_calib_r0_0
1712 08:57:36.957805 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1713 08:57:36.961222 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1714 08:57:36.967503 failed to find key in VPD: dsm_calib_r0_1
1715 08:57:36.974140 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1716 08:57:36.980776 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1717 08:57:36.983848 failed to find key in VPD: dsm_calib_r0_2
1718 08:57:36.993542 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1719 08:57:36.997196 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1720 08:57:37.003769 failed to find key in VPD: dsm_calib_r0_3
1721 08:57:37.010416 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1722 08:57:37.017182 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1723 08:57:37.020059 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1724 08:57:37.027306 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1725 08:57:37.030309 EC returned error result code 1
1726 08:57:37.034045 EC returned error result code 1
1727 08:57:37.037561 EC returned error result code 1
1728 08:57:37.040932 PS2K: Bad resp from EC. Vivaldi disabled!
1729 08:57:37.047241 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1730 08:57:37.053975 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1731 08:57:37.056929 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1732 08:57:37.063693 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1733 08:57:37.067068 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1734 08:57:37.073501 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1735 08:57:37.080602 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1736 08:57:37.087383 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1737 08:57:37.090131 ACPI: added table 2/32, length now 44
1738 08:57:37.090231 ACPI: * MCFG
1739 08:57:37.096842 ACPI: added table 3/32, length now 48
1740 08:57:37.096942 ACPI: * TPM2
1741 08:57:37.099869 TPM2 log created at 99a2d000
1742 08:57:37.103568 ACPI: added table 4/32, length now 52
1743 08:57:37.106592 ACPI: * MADT
1744 08:57:37.106692 SCI is IRQ9
1745 08:57:37.110286 ACPI: added table 5/32, length now 56
1746 08:57:37.113339 current = 99b43ac0
1747 08:57:37.113438 ACPI: * DMAR
1748 08:57:37.116914 ACPI: added table 6/32, length now 60
1749 08:57:37.119948 ACPI: * IGD OpRegion
1750 08:57:37.123504 GMA: Found VBT in CBFS
1751 08:57:37.126948 GMA: Found valid VBT in CBFS
1752 08:57:37.129891 ACPI: added table 7/32, length now 64
1753 08:57:37.129991 ACPI: * HPET
1754 08:57:37.132952 ACPI: added table 8/32, length now 68
1755 08:57:37.136478 ACPI: done.
1756 08:57:37.140128 ACPI tables: 31744 bytes.
1757 08:57:37.143480 smbios_write_tables: 99a2c000
1758 08:57:37.146868 EC returned error result code 3
1759 08:57:37.149984 Couldn't obtain OEM name from CBI
1760 08:57:37.153107 Create SMBIOS type 17
1761 08:57:37.156354 PCI: 00:00.0 (Intel Cannonlake)
1762 08:57:37.156456 PCI: 00:14.3 (Intel WiFi)
1763 08:57:37.159792 SMBIOS tables: 939 bytes.
1764 08:57:37.163251 Writing table forward entry at 0x00000500
1765 08:57:37.169682 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1766 08:57:37.172843 Writing coreboot table at 0x99b62000
1767 08:57:37.179539 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1768 08:57:37.182927 1. 0000000000001000-000000000009ffff: RAM
1769 08:57:37.189719 2. 00000000000a0000-00000000000fffff: RESERVED
1770 08:57:37.192666 3. 0000000000100000-0000000099a2bfff: RAM
1771 08:57:37.199191 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1772 08:57:37.202858 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1773 08:57:37.208980 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1774 08:57:37.215888 7. 000000009a000000-000000009f7fffff: RESERVED
1775 08:57:37.218994 8. 00000000e0000000-00000000efffffff: RESERVED
1776 08:57:37.225578 9. 00000000fc000000-00000000fc000fff: RESERVED
1777 08:57:37.229107 10. 00000000fe000000-00000000fe00ffff: RESERVED
1778 08:57:37.232576 11. 00000000fed10000-00000000fed17fff: RESERVED
1779 08:57:37.238718 12. 00000000fed80000-00000000fed83fff: RESERVED
1780 08:57:37.242385 13. 00000000fed90000-00000000fed91fff: RESERVED
1781 08:57:37.248920 14. 00000000feda0000-00000000feda1fff: RESERVED
1782 08:57:37.252243 15. 0000000100000000-000000045e7fffff: RAM
1783 08:57:37.255807 Graphics framebuffer located at 0xc0000000
1784 08:57:37.258827 Passing 5 GPIOs to payload:
1785 08:57:37.265108 NAME | PORT | POLARITY | VALUE
1786 08:57:37.268673 write protect | undefined | high | low
1787 08:57:37.275364 lid | undefined | high | high
1788 08:57:37.281697 power | undefined | high | low
1789 08:57:37.285160 oprom | undefined | high | low
1790 08:57:37.291990 EC in RW | 0x000000cb | high | low
1791 08:57:37.292109 Board ID: 4
1792 08:57:37.298680 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1793 08:57:37.298781 CBFS @ c08000 size 3f8000
1794 08:57:37.304812 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1795 08:57:37.311539 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1796 08:57:37.314685 coreboot table: 1492 bytes.
1797 08:57:37.318334 IMD ROOT 0. 99fff000 00001000
1798 08:57:37.321353 IMD SMALL 1. 99ffe000 00001000
1799 08:57:37.325183 FSP MEMORY 2. 99c4e000 003b0000
1800 08:57:37.328153 CONSOLE 3. 99c2e000 00020000
1801 08:57:37.331550 FMAP 4. 99c2d000 0000054e
1802 08:57:37.335015 TIME STAMP 5. 99c2c000 00000910
1803 08:57:37.338025 VBOOT WORK 6. 99c18000 00014000
1804 08:57:37.341671 MRC DATA 7. 99c16000 00001958
1805 08:57:37.344705 ROMSTG STCK 8. 99c15000 00001000
1806 08:57:37.348402 AFTER CAR 9. 99c0b000 0000a000
1807 08:57:37.351469 RAMSTAGE 10. 99baf000 0005c000
1808 08:57:37.354923 REFCODE 11. 99b7a000 00035000
1809 08:57:37.358090 SMM BACKUP 12. 99b6a000 00010000
1810 08:57:37.361130 COREBOOT 13. 99b62000 00008000
1811 08:57:37.364983 ACPI 14. 99b3e000 00024000
1812 08:57:37.368254 ACPI GNVS 15. 99b3d000 00001000
1813 08:57:37.371446 RAMOOPS 16. 99a3d000 00100000
1814 08:57:37.374356 TPM2 TCGLOG17. 99a2d000 00010000
1815 08:57:37.378113 SMBIOS 18. 99a2c000 00000800
1816 08:57:37.381475 IMD small region:
1817 08:57:37.384409 IMD ROOT 0. 99ffec00 00000400
1818 08:57:37.388019 FSP RUNTIME 1. 99ffebe0 00000004
1819 08:57:37.391192 EC HOSTEVENT 2. 99ffebc0 00000008
1820 08:57:37.394665 POWER STATE 3. 99ffeb80 00000040
1821 08:57:37.398144 ROMSTAGE 4. 99ffeb60 00000004
1822 08:57:37.401042 MEM INFO 5. 99ffe9a0 000001b9
1823 08:57:37.404435 VPD 6. 99ffe920 0000006c
1824 08:57:37.408038 MTRR: Physical address space:
1825 08:57:37.414181 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1826 08:57:37.420989 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1827 08:57:37.427694 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1828 08:57:37.430826 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1829 08:57:37.437401 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1830 08:57:37.444338 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1831 08:57:37.450832 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1832 08:57:37.453919 MTRR: Fixed MSR 0x250 0x0606060606060606
1833 08:57:37.461023 MTRR: Fixed MSR 0x258 0x0606060606060606
1834 08:57:37.464070 MTRR: Fixed MSR 0x259 0x0000000000000000
1835 08:57:37.467248 MTRR: Fixed MSR 0x268 0x0606060606060606
1836 08:57:37.470324 MTRR: Fixed MSR 0x269 0x0606060606060606
1837 08:57:37.477028 MTRR: Fixed MSR 0x26a 0x0606060606060606
1838 08:57:37.480342 MTRR: Fixed MSR 0x26b 0x0606060606060606
1839 08:57:37.484076 MTRR: Fixed MSR 0x26c 0x0606060606060606
1840 08:57:37.487029 MTRR: Fixed MSR 0x26d 0x0606060606060606
1841 08:57:37.493934 MTRR: Fixed MSR 0x26e 0x0606060606060606
1842 08:57:37.496790 MTRR: Fixed MSR 0x26f 0x0606060606060606
1843 08:57:37.500097 call enable_fixed_mtrr()
1844 08:57:37.503410 CPU physical address size: 39 bits
1845 08:57:37.507051 MTRR: default type WB/UC MTRR counts: 6/8.
1846 08:57:37.510081 MTRR: WB selected as default type.
1847 08:57:37.516859 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1848 08:57:37.523638 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1849 08:57:37.529860 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1850 08:57:37.536614 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1851 08:57:37.542996 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1852 08:57:37.549645 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1853 08:57:37.553283 MTRR: Fixed MSR 0x250 0x0606060606060606
1854 08:57:37.556188 MTRR: Fixed MSR 0x258 0x0606060606060606
1855 08:57:37.562807 MTRR: Fixed MSR 0x259 0x0000000000000000
1856 08:57:37.566373 MTRR: Fixed MSR 0x268 0x0606060606060606
1857 08:57:37.569895 MTRR: Fixed MSR 0x269 0x0606060606060606
1858 08:57:37.572892 MTRR: Fixed MSR 0x26a 0x0606060606060606
1859 08:57:37.576057 MTRR: Fixed MSR 0x26b 0x0606060606060606
1860 08:57:37.582809 MTRR: Fixed MSR 0x26c 0x0606060606060606
1861 08:57:37.586326 MTRR: Fixed MSR 0x26d 0x0606060606060606
1862 08:57:37.589623 MTRR: Fixed MSR 0x26e 0x0606060606060606
1863 08:57:37.592532 MTRR: Fixed MSR 0x26f 0x0606060606060606
1864 08:57:37.592632
1865 08:57:37.596007 MTRR check
1866 08:57:37.599401 Fixed MTRRs : Enabled
1867 08:57:37.599499 Variable MTRRs: Enabled
1868 08:57:37.599577
1869 08:57:37.602886 call enable_fixed_mtrr()
1870 08:57:37.609051 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1871 08:57:37.612520 CPU physical address size: 39 bits
1872 08:57:37.619103 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1873 08:57:37.622146 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 08:57:37.625957 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 08:57:37.629047 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 08:57:37.635814 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 08:57:37.638842 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 08:57:37.642403 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 08:57:37.645192 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 08:57:37.648589 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 08:57:37.655415 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 08:57:37.658949 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 08:57:37.661803 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 08:57:37.668551 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 08:57:37.668651 call enable_fixed_mtrr()
1886 08:57:37.674956 MTRR: Fixed MSR 0x258 0x0606060606060606
1887 08:57:37.678006 MTRR: Fixed MSR 0x259 0x0000000000000000
1888 08:57:37.681676 MTRR: Fixed MSR 0x268 0x0606060606060606
1889 08:57:37.684819 MTRR: Fixed MSR 0x269 0x0606060606060606
1890 08:57:37.691561 MTRR: Fixed MSR 0x26a 0x0606060606060606
1891 08:57:37.695046 MTRR: Fixed MSR 0x26b 0x0606060606060606
1892 08:57:37.698033 MTRR: Fixed MSR 0x26c 0x0606060606060606
1893 08:57:37.701619 MTRR: Fixed MSR 0x26d 0x0606060606060606
1894 08:57:37.704505 MTRR: Fixed MSR 0x26e 0x0606060606060606
1895 08:57:37.711504 MTRR: Fixed MSR 0x26f 0x0606060606060606
1896 08:57:37.714988 CPU physical address size: 39 bits
1897 08:57:37.717964 call enable_fixed_mtrr()
1898 08:57:37.721508 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 08:57:37.724658 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 08:57:37.727844 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 08:57:37.734071 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 08:57:37.737796 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 08:57:37.740990 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 08:57:37.744626 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 08:57:37.750947 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 08:57:37.754046 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 08:57:37.757199 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 08:57:37.761050 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 08:57:37.767712 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 08:57:37.770811 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 08:57:37.773937 call enable_fixed_mtrr()
1912 08:57:37.777524 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 08:57:37.780405 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 08:57:37.784444 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 08:57:37.790703 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 08:57:37.793926 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 08:57:37.796868 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 08:57:37.800347 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 08:57:37.807005 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 08:57:37.810357 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 08:57:37.813638 CPU physical address size: 39 bits
1922 08:57:37.816970 call enable_fixed_mtrr()
1923 08:57:37.820342 CPU physical address size: 39 bits
1924 08:57:37.823771 CPU physical address size: 39 bits
1925 08:57:37.826990 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 08:57:37.830191 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 08:57:37.836972 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 08:57:37.840070 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 08:57:37.843071 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 08:57:37.846675 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 08:57:37.853327 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 08:57:37.856779 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 08:57:37.859809 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 08:57:37.863408 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 08:57:37.870022 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 08:57:37.873097 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 08:57:37.876172 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 08:57:37.879832 call enable_fixed_mtrr()
1939 08:57:37.883211 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 08:57:37.886060 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 08:57:37.893147 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 08:57:37.896267 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 08:57:37.899225 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 08:57:37.902879 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 08:57:37.909463 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 08:57:37.912867 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 08:57:37.916073 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 08:57:37.919333 CPU physical address size: 39 bits
1949 08:57:37.922875 call enable_fixed_mtrr()
1950 08:57:37.925820 CBFS @ c08000 size 3f8000
1951 08:57:37.932591 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1952 08:57:37.935885 CBFS: Locating 'fallback/payload'
1953 08:57:37.939411 CPU physical address size: 39 bits
1954 08:57:37.942543 CBFS: Found @ offset 1c96c0 size 3f798
1955 08:57:37.945646 Checking segment from ROM address 0xffdd16f8
1956 08:57:37.952290 Checking segment from ROM address 0xffdd1714
1957 08:57:37.955953 Loading segment from ROM address 0xffdd16f8
1958 08:57:37.958815 code (compression=0)
1959 08:57:37.965970 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1960 08:57:37.975835 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1961 08:57:37.975942 it's not compressed!
1962 08:57:38.069108 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1963 08:57:38.075345 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1964 08:57:38.079013 Loading segment from ROM address 0xffdd1714
1965 08:57:38.082141 Entry Point 0x30000000
1966 08:57:38.085255 Loaded segments
1967 08:57:38.091355 Finalizing chipset.
1968 08:57:38.094753 Finalizing SMM.
1969 08:57:38.097544 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1970 08:57:38.101407 mp_park_aps done after 0 msecs.
1971 08:57:38.107415 Jumping to boot code at 30000000(99b62000)
1972 08:57:38.114345 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1973 08:57:38.114443
1974 08:57:38.114526
1975 08:57:38.114598
1976 08:57:38.117419 Starting depthcharge on Helios...
1977 08:57:38.117515
1978 08:57:38.117888 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1979 08:57:38.118002 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1980 08:57:38.118095 Setting prompt string to ['hatch:']
1981 08:57:38.118184 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1982 08:57:38.127434 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1983 08:57:38.127534
1984 08:57:38.133807 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1985 08:57:38.133904
1986 08:57:38.140925 board_setup: Info: eMMC controller not present; skipping
1987 08:57:38.141023
1988 08:57:38.144523 New NVMe Controller 0x30053ac0 @ 00:1d:00
1989 08:57:38.144622
1990 08:57:38.150496 board_setup: Info: SDHCI controller not present; skipping
1991 08:57:38.150594
1992 08:57:38.157025 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1993 08:57:38.157122
1994 08:57:38.157198 Wipe memory regions:
1995 08:57:38.157269
1996 08:57:38.160704 [0x00000000001000, 0x000000000a0000)
1997 08:57:38.160802
1998 08:57:38.164013 [0x00000000100000, 0x00000030000000)
1999 08:57:38.230011
2000 08:57:38.233668 [0x00000030657430, 0x00000099a2c000)
2001 08:57:38.380386
2002 08:57:38.383224 [0x00000100000000, 0x0000045e800000)
2003 08:57:39.839797
2004 08:57:39.839964 R8152: Initializing
2005 08:57:39.840044
2006 08:57:39.842801 Version 9 (ocp_data = 6010)
2007 08:57:39.847277
2008 08:57:39.847381 R8152: Done initializing
2009 08:57:39.847458
2010 08:57:39.850060 Adding net device
2011 08:57:40.333207
2012 08:57:40.333376 R8152: Initializing
2013 08:57:40.333455
2014 08:57:40.336240 Version 6 (ocp_data = 5c30)
2015 08:57:40.336338
2016 08:57:40.339819 R8152: Done initializing
2017 08:57:40.339914
2018 08:57:40.342763 net_add_device: Attemp to include the same device
2019 08:57:40.346420
2020 08:57:40.353543 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2021 08:57:40.353642
2022 08:57:40.353715
2023 08:57:40.353784
2024 08:57:40.354068 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2026 08:57:40.454825 hatch: tftpboot 192.168.201.1 9759483/tftp-deploy-l95p4f3d/kernel/bzImage 9759483/tftp-deploy-l95p4f3d/kernel/cmdline 9759483/tftp-deploy-l95p4f3d/ramdisk/ramdisk.cpio.gz
2027 08:57:40.455023 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2028 08:57:40.455129 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2029 08:57:40.459812 tftpboot 192.168.201.1 9759483/tftp-deploy-l95p4f3d/kernel/bzImaoy-l95p4f3d/kernel/cmdline 9759483/tftp-deploy-l95p4f3d/ramdisk/ramdisk.cpio.gz
2030 08:57:40.459951
2031 08:57:40.460054 Waiting for link
2032 08:57:40.660844
2033 08:57:40.661006 done.
2034 08:57:40.661084
2035 08:57:40.661154 MAC: 00:24:32:50:1a:59
2036 08:57:40.661222
2037 08:57:40.663693 Sending DHCP discover... done.
2038 08:57:40.663789
2039 08:57:40.667314 Waiting for reply... done.
2040 08:57:40.667410
2041 08:57:40.670804 Sending DHCP request... done.
2042 08:57:40.670902
2043 08:57:40.673735 Waiting for reply... done.
2044 08:57:40.673834
2045 08:57:40.677132 My ip is 192.168.201.14
2046 08:57:40.677229
2047 08:57:40.680200 The DHCP server ip is 192.168.201.1
2048 08:57:40.680297
2049 08:57:40.683830 TFTP server IP predefined by user: 192.168.201.1
2050 08:57:40.683927
2051 08:57:40.689998 Bootfile predefined by user: 9759483/tftp-deploy-l95p4f3d/kernel/bzImage
2052 08:57:40.690095
2053 08:57:40.693517 Sending tftp read request... done.
2054 08:57:40.693613
2055 08:57:40.699991 Waiting for the transfer...
2056 08:57:40.700088
2057 08:57:41.255011 00000000 ################################################################
2058 08:57:41.255183
2059 08:57:41.812318 00080000 ################################################################
2060 08:57:41.812485
2061 08:57:42.379195 00100000 ################################################################
2062 08:57:42.379356
2063 08:57:42.940594 00180000 ################################################################
2064 08:57:42.940757
2065 08:57:43.506502 00200000 ################################################################
2066 08:57:43.506666
2067 08:57:44.065354 00280000 ################################################################
2068 08:57:44.065531
2069 08:57:44.624231 00300000 ################################################################
2070 08:57:44.624379
2071 08:57:45.211115 00380000 ################################################################
2072 08:57:45.211571
2073 08:57:45.891758 00400000 ################################################################
2074 08:57:45.892216
2075 08:57:46.554777 00480000 ################################################################
2076 08:57:46.554930
2077 08:57:47.117735 00500000 ################################################################
2078 08:57:47.117887
2079 08:57:47.677444 00580000 ################################################################
2080 08:57:47.677596
2081 08:57:48.227549 00600000 ################################################################
2082 08:57:48.227704
2083 08:57:48.852816 00680000 ################################################################
2084 08:57:48.853461
2085 08:57:49.450245 00700000 ################################################################
2086 08:57:49.450429
2087 08:57:50.020663 00780000 ################################################################
2088 08:57:50.020816
2089 08:57:50.581834 00800000 ################################################################
2090 08:57:50.581995
2091 08:57:51.171901 00880000 ################################################################
2092 08:57:51.172049
2093 08:57:51.600101 00900000 ################################################ done.
2094 08:57:51.600254
2095 08:57:51.603094 The bootfile was 9826304 bytes long.
2096 08:57:51.603196
2097 08:57:51.606326 Sending tftp read request... done.
2098 08:57:51.606424
2099 08:57:51.609963 Waiting for the transfer...
2100 08:57:51.610062
2101 08:57:52.167904 00000000 ################################################################
2102 08:57:52.168251
2103 08:57:52.760682 00080000 ################################################################
2104 08:57:52.761260
2105 08:57:53.324695 00100000 ################################################################
2106 08:57:53.324848
2107 08:57:53.858489 00180000 ################################################################
2108 08:57:53.858646
2109 08:57:54.434347 00200000 ################################################################
2110 08:57:54.434495
2111 08:57:54.986891 00280000 ################################################################
2112 08:57:54.987042
2113 08:57:55.566464 00300000 ################################################################
2114 08:57:55.566617
2115 08:57:56.188882 00380000 ################################################################
2116 08:57:56.189045
2117 08:57:56.827326 00400000 ################################################################
2118 08:57:56.827849
2119 08:57:57.374817 00480000 ################################################################
2120 08:57:57.374973
2121 08:57:57.926098 00500000 ################################################################
2122 08:57:57.926259
2123 08:57:58.467351 00580000 ################################################################
2124 08:57:58.467513
2125 08:57:59.004989 00600000 ################################################################
2126 08:57:59.005142
2127 08:57:59.546382 00680000 ################################################################
2128 08:57:59.546551
2129 08:58:00.101835 00700000 ################################################################
2130 08:58:00.101985
2131 08:58:00.644841 00780000 ################################################################
2132 08:58:00.644999
2133 08:58:01.182272 00800000 ################################################################
2134 08:58:01.182424
2135 08:58:01.454343 00880000 ################################# done.
2136 08:58:01.454509
2137 08:58:01.457426 Sending tftp read request... done.
2138 08:58:01.457523
2139 08:58:01.460921 Waiting for the transfer...
2140 08:58:01.461016
2141 08:58:01.461090 00000000 # done.
2142 08:58:01.461161
2143 08:58:01.470792 Command line loaded dynamically from TFTP file: 9759483/tftp-deploy-l95p4f3d/kernel/cmdline
2144 08:58:01.470889
2145 08:58:01.487455 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2146 08:58:01.487557
2147 08:58:01.493659 ec_init(0): CrosEC protocol v3 supported (256, 256)
2148 08:58:01.498865
2149 08:58:01.501877 Shutting down all USB controllers.
2150 08:58:01.501974
2151 08:58:01.502050 Removing current net device
2152 08:58:01.506213
2153 08:58:01.506310 Finalizing coreboot
2154 08:58:01.506387
2155 08:58:01.512761 Exiting depthcharge with code 4 at timestamp: 30750752
2156 08:58:01.512859
2157 08:58:01.512934
2158 08:58:01.513003 Starting kernel ...
2159 08:58:01.513071
2160 08:58:01.513136
2161 08:58:01.513539 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2162 08:58:01.513652 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2163 08:58:01.513736 Setting prompt string to ['Linux version [0-9]']
2164 08:58:01.513816 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2165 08:58:01.513905 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2167 09:02:20.513920 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2169 09:02:20.514158 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2171 09:02:20.514343 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2174 09:02:20.514646 end: 2 depthcharge-action (duration 00:05:00) [common]
2176 09:02:20.514893 Cleaning after the job
2177 09:02:20.514991 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9759483/tftp-deploy-l95p4f3d/ramdisk
2178 09:02:20.515752 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9759483/tftp-deploy-l95p4f3d/kernel
2179 09:02:20.516458 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9759483/tftp-deploy-l95p4f3d/modules
2180 09:02:20.516840 start: 5.1 power-off (timeout 00:00:30) [common]
2181 09:02:20.517008 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2182 09:02:20.593699 >> Command sent successfully.
2183 09:02:20.596109 Returned 0 in 0 seconds
2184 09:02:20.696890 end: 5.1 power-off (duration 00:00:00) [common]
2186 09:02:20.697244 start: 5.2 read-feedback (timeout 00:10:00) [common]
2187 09:02:20.697528 Listened to connection for namespace 'common' for up to 1s
2189 09:02:20.697941 Listened to connection for namespace 'common' for up to 1s
2190 09:02:21.702433 Finalising connection for namespace 'common'
2191 09:02:21.702645 Disconnecting from shell: Finalise
2192 09:02:21.702741
2193 09:02:21.803204 end: 5.2 read-feedback (duration 00:00:01) [common]
2194 09:02:21.803373 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9759483
2195 09:02:21.809656 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9759483
2196 09:02:21.809792 JobError: Your job cannot terminate cleanly.