Boot log: acer-cb317-1h-c3z6-dedede
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:24:39.839092 lava-dispatcher, installed at version: 2023.03
2 14:24:39.839315 start: 0 validate
3 14:24:39.839448 Start time: 2023-05-19 14:24:39.839440+00:00 (UTC)
4 14:24:39.839581 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:24:39.839707 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230512.0%2Fx86%2Frootfs.cpio.gz exists
6 14:24:40.118141 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:24:40.118334 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.283-cip98%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:24:40.399760 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:24:40.399956 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.283-cip98%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:24:40.689006 validate duration: 0.85
12 14:24:40.689333 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:24:40.689431 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:24:40.689533 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:24:40.689660 Not decompressing ramdisk as can be used compressed.
16 14:24:40.689753 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230512.0/x86/rootfs.cpio.gz
17 14:24:40.689825 saving as /var/lib/lava/dispatcher/tmp/10389497/tftp-deploy-b1ny4l2_/ramdisk/rootfs.cpio.gz
18 14:24:40.689894 total size: 8430071 (8MB)
19 14:24:40.691049 progress 0% (0MB)
20 14:24:40.693451 progress 5% (0MB)
21 14:24:40.695788 progress 10% (0MB)
22 14:24:40.698230 progress 15% (1MB)
23 14:24:40.700522 progress 20% (1MB)
24 14:24:40.702760 progress 25% (2MB)
25 14:24:40.704976 progress 30% (2MB)
26 14:24:40.707278 progress 35% (2MB)
27 14:24:40.709399 progress 40% (3MB)
28 14:24:40.711624 progress 45% (3MB)
29 14:24:40.713882 progress 50% (4MB)
30 14:24:40.716080 progress 55% (4MB)
31 14:24:40.718304 progress 60% (4MB)
32 14:24:40.720535 progress 65% (5MB)
33 14:24:40.722720 progress 70% (5MB)
34 14:24:40.724773 progress 75% (6MB)
35 14:24:40.726935 progress 80% (6MB)
36 14:24:40.729148 progress 85% (6MB)
37 14:24:40.731318 progress 90% (7MB)
38 14:24:40.733540 progress 95% (7MB)
39 14:24:40.735730 progress 100% (8MB)
40 14:24:40.735878 8MB downloaded in 0.05s (174.85MB/s)
41 14:24:40.736033 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:24:40.736269 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:24:40.736411 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:24:40.736499 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:24:40.736637 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.283-cip98/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:24:40.736709 saving as /var/lib/lava/dispatcher/tmp/10389497/tftp-deploy-b1ny4l2_/kernel/bzImage
48 14:24:40.736772 total size: 10858496 (10MB)
49 14:24:40.736831 No compression specified
50 14:24:40.737979 progress 0% (0MB)
51 14:24:40.740800 progress 5% (0MB)
52 14:24:40.743641 progress 10% (1MB)
53 14:24:40.746401 progress 15% (1MB)
54 14:24:40.749262 progress 20% (2MB)
55 14:24:40.752018 progress 25% (2MB)
56 14:24:40.754904 progress 30% (3MB)
57 14:24:40.757638 progress 35% (3MB)
58 14:24:40.760549 progress 40% (4MB)
59 14:24:40.763560 progress 45% (4MB)
60 14:24:40.766508 progress 50% (5MB)
61 14:24:40.769552 progress 55% (5MB)
62 14:24:40.772551 progress 60% (6MB)
63 14:24:40.775586 progress 65% (6MB)
64 14:24:40.778339 progress 70% (7MB)
65 14:24:40.781152 progress 75% (7MB)
66 14:24:40.784022 progress 80% (8MB)
67 14:24:40.786752 progress 85% (8MB)
68 14:24:40.789610 progress 90% (9MB)
69 14:24:40.792257 progress 95% (9MB)
70 14:24:40.795065 progress 100% (10MB)
71 14:24:40.795231 10MB downloaded in 0.06s (177.15MB/s)
72 14:24:40.795379 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:24:40.795611 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:24:40.795696 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:24:40.795783 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:24:40.795922 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.283-cip98/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:24:40.795991 saving as /var/lib/lava/dispatcher/tmp/10389497/tftp-deploy-b1ny4l2_/modules/modules.tar
79 14:24:40.796052 total size: 484124 (0MB)
80 14:24:40.796111 Using unxz to decompress xz
81 14:24:40.799766 progress 6% (0MB)
82 14:24:40.800177 progress 13% (0MB)
83 14:24:40.800457 progress 20% (0MB)
84 14:24:40.801856 progress 27% (0MB)
85 14:24:40.803857 progress 33% (0MB)
86 14:24:40.805897 progress 40% (0MB)
87 14:24:40.807858 progress 47% (0MB)
88 14:24:40.809993 progress 54% (0MB)
89 14:24:40.812093 progress 60% (0MB)
90 14:24:40.814029 progress 67% (0MB)
91 14:24:40.816572 progress 74% (0MB)
92 14:24:40.818721 progress 81% (0MB)
93 14:24:40.820758 progress 87% (0MB)
94 14:24:40.822737 progress 94% (0MB)
95 14:24:40.824847 progress 100% (0MB)
96 14:24:40.831011 0MB downloaded in 0.03s (13.21MB/s)
97 14:24:40.831398 end: 1.3.1 http-download (duration 00:00:00) [common]
99 14:24:40.831782 end: 1.3 download-retry (duration 00:00:00) [common]
100 14:24:40.831919 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 14:24:40.832050 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 14:24:40.832166 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 14:24:40.832286 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 14:24:40.832591 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb
105 14:24:40.832775 makedir: /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin
106 14:24:40.832920 makedir: /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/tests
107 14:24:40.833061 makedir: /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/results
108 14:24:40.833210 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-add-keys
109 14:24:40.833412 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-add-sources
110 14:24:40.833587 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-background-process-start
111 14:24:40.833751 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-background-process-stop
112 14:24:40.833920 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-common-functions
113 14:24:40.834087 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-echo-ipv4
114 14:24:40.834251 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-install-packages
115 14:24:40.834418 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-installed-packages
116 14:24:40.834588 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-os-build
117 14:24:40.834753 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-probe-channel
118 14:24:40.834917 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-probe-ip
119 14:24:40.835086 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-target-ip
120 14:24:40.835255 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-target-mac
121 14:24:40.835422 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-target-storage
122 14:24:40.835602 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-test-case
123 14:24:40.835769 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-test-event
124 14:24:40.835929 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-test-feedback
125 14:24:40.836098 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-test-raise
126 14:24:40.836269 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-test-reference
127 14:24:40.836467 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-test-runner
128 14:24:40.836678 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-test-set
129 14:24:40.836860 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-test-shell
130 14:24:40.837052 Updating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-install-packages (oe)
131 14:24:40.837263 Updating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/bin/lava-installed-packages (oe)
132 14:24:40.837449 Creating /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/environment
133 14:24:40.837618 LAVA metadata
134 14:24:40.837740 - LAVA_JOB_ID=10389497
135 14:24:40.837877 - LAVA_DISPATCHER_IP=192.168.201.1
136 14:24:40.838039 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 14:24:40.838135 skipped lava-vland-overlay
138 14:24:40.838255 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 14:24:40.838385 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 14:24:40.838492 skipped lava-multinode-overlay
141 14:24:40.838614 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 14:24:40.838738 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 14:24:40.838868 Loading test definitions
144 14:24:40.839001 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 14:24:40.839132 Using /lava-10389497 at stage 0
146 14:24:40.839660 uuid=10389497_1.4.2.3.1 testdef=None
147 14:24:40.839793 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 14:24:40.839945 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 14:24:40.840805 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 14:24:40.841179 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 14:24:40.842173 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 14:24:40.842551 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 14:24:40.843554 runner path: /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/0/tests/0_dmesg test_uuid 10389497_1.4.2.3.1
156 14:24:40.843771 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 14:24:40.844149 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 14:24:40.844270 Using /lava-10389497 at stage 1
160 14:24:40.844757 uuid=10389497_1.4.2.3.5 testdef=None
161 14:24:40.844901 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 14:24:40.844992 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 14:24:40.845765 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 14:24:40.846139 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 14:24:40.847139 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 14:24:40.847523 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 14:24:40.848587 runner path: /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/1/tests/1_bootrr test_uuid 10389497_1.4.2.3.5
170 14:24:40.848808 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 14:24:40.849161 Creating lava-test-runner.conf files
173 14:24:40.849265 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/0 for stage 0
174 14:24:40.849392 - 0_dmesg
175 14:24:40.849512 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10389497/lava-overlay-enx11snb/lava-10389497/1 for stage 1
176 14:24:40.849639 - 1_bootrr
177 14:24:40.849778 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 14:24:40.849896 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 14:24:40.861736 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 14:24:40.861935 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 14:24:40.862060 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 14:24:40.862183 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 14:24:40.862306 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 14:24:41.109884 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 14:24:41.110337 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 14:24:41.110500 extracting modules file /var/lib/lava/dispatcher/tmp/10389497/tftp-deploy-b1ny4l2_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10389497/extract-overlay-ramdisk-corlu692/ramdisk
187 14:24:41.139637 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 14:24:41.139868 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 14:24:41.140021 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10389497/compress-overlay-aemrwumv/overlay-1.4.2.4.tar.gz to ramdisk
190 14:24:41.140142 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10389497/compress-overlay-aemrwumv/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10389497/extract-overlay-ramdisk-corlu692/ramdisk
191 14:24:41.153950 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 14:24:41.154118 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 14:24:41.154221 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 14:24:41.154339 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 14:24:41.154435 Building ramdisk /var/lib/lava/dispatcher/tmp/10389497/extract-overlay-ramdisk-corlu692/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10389497/extract-overlay-ramdisk-corlu692/ramdisk
196 14:24:41.296157 >> 53976 blocks
197 14:24:42.206503 rename /var/lib/lava/dispatcher/tmp/10389497/extract-overlay-ramdisk-corlu692/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10389497/tftp-deploy-b1ny4l2_/ramdisk/ramdisk.cpio.gz
198 14:24:42.206970 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 14:24:42.207102 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 14:24:42.207234 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 14:24:42.207388 No mkimage arch provided, not using FIT.
202 14:24:42.207512 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 14:24:42.207643 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 14:24:42.207780 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 14:24:42.207910 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 14:24:42.208022 No LXC device requested
207 14:24:42.208115 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 14:24:42.208205 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 14:24:42.208287 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 14:24:42.208430 Checking files for TFTP limit of 4294967296 bytes.
211 14:24:42.209039 end: 1 tftp-deploy (duration 00:00:02) [common]
212 14:24:42.209164 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 14:24:42.209276 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 14:24:42.209481 substitutions:
215 14:24:42.209622 - {DTB}: None
216 14:24:42.209711 - {INITRD}: 10389497/tftp-deploy-b1ny4l2_/ramdisk/ramdisk.cpio.gz
217 14:24:42.209817 - {KERNEL}: 10389497/tftp-deploy-b1ny4l2_/kernel/bzImage
218 14:24:42.209893 - {LAVA_MAC}: None
219 14:24:42.209963 - {PRESEED_CONFIG}: None
220 14:24:42.210026 - {PRESEED_LOCAL}: None
221 14:24:42.210084 - {RAMDISK}: 10389497/tftp-deploy-b1ny4l2_/ramdisk/ramdisk.cpio.gz
222 14:24:42.210155 - {ROOT_PART}: None
223 14:24:42.210211 - {ROOT}: None
224 14:24:42.210266 - {SERVER_IP}: 192.168.201.1
225 14:24:42.210328 - {TEE}: None
226 14:24:42.210382 Parsed boot commands:
227 14:24:42.210442 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 14:24:42.210668 Parsed boot commands: tftpboot 192.168.201.1 10389497/tftp-deploy-b1ny4l2_/kernel/bzImage 10389497/tftp-deploy-b1ny4l2_/kernel/cmdline 10389497/tftp-deploy-b1ny4l2_/ramdisk/ramdisk.cpio.gz
229 14:24:42.210793 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 14:24:42.210930 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 14:24:42.211107 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 14:24:42.211231 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 14:24:42.211329 Not connected, no need to disconnect.
234 14:24:42.211434 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 14:24:42.211551 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 14:24:42.211632 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-7'
237 14:24:42.215317 Setting prompt string to ['lava-test: # ']
238 14:24:42.215739 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 14:24:42.215853 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 14:24:42.215978 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 14:24:42.216084 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 14:24:42.216284 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=reboot'
243 14:24:47.350934 >> Command sent successfully.
244 14:24:47.353375 Returned 0 in 5 seconds
245 14:24:47.453741 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 14:24:47.454186 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 14:24:47.454318 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 14:24:47.454436 Setting prompt string to 'Starting depthcharge on Magolor...'
250 14:24:47.454532 Changing prompt to 'Starting depthcharge on Magolor...'
251 14:24:47.454631 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 14:24:47.454990 [Enter `^Ec?' for help]
253 14:24:48.599294
254 14:24:48.599449
255 14:24:48.605972 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 14:24:48.613743 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 14:24:48.617150 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 14:24:48.620551 CPU: AES supported, TXT NOT supported, VT supported
259 14:24:48.627397 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 14:24:48.630872 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 14:24:48.634387 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 14:24:48.639135 VBOOT: Loading verstage.
263 14:24:48.642655 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 14:24:48.650382 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 14:24:48.653948 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 14:24:48.661942 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 14:24:48.662027
268 14:24:48.662093
269 14:24:48.671980 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 14:24:48.686847 Probing TPM: . done!
271 14:24:48.690170 TPM ready after 0 ms
272 14:24:48.694353 Connected to device vid:did:rid of 1ae0:0028:00
273 14:24:48.705091 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
274 14:24:48.711777 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 14:24:48.760353 Initialized TPM device CR50 revision 0
276 14:24:48.770261 tlcl_send_startup: Startup return code is 0
277 14:24:48.770384 TPM: setup succeeded
278 14:24:48.789131 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 14:24:48.802352 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 14:24:48.814375 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 14:24:48.824273 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 14:24:48.827533 Chrome EC: UHEPI supported
283 14:24:48.830938 Phase 1
284 14:24:48.834448 FMAP: area GBB found @ c05000 (12288 bytes)
285 14:24:48.840902 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 14:24:48.848478 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 14:24:48.851413 Recovery requested (1009000e)
288 14:24:48.855513 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 14:24:48.870267 tlcl_extend: response is 0
290 14:24:48.880106 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 14:24:48.885973 tlcl_extend: response is 0
292 14:24:48.892791 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 14:24:48.895805 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 14:24:48.902465 BS: verstage times (exec / console): total (unknown) / 124 ms
295 14:24:48.902554
296 14:24:48.906275
297 14:24:48.916009 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 14:24:48.922753 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 14:24:48.925805 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 14:24:48.929062 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 14:24:48.935789 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 14:24:48.939278 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 14:24:48.942191 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
304 14:24:48.945619 TCO_STS: 0000 0001
305 14:24:48.949070 GEN_PMCON: d0015038 00002200
306 14:24:48.952115 GBLRST_CAUSE: 00000000 00000000
307 14:24:48.952225 prev_sleep_state 5
308 14:24:48.955556 Boot Count incremented to 9856
309 14:24:48.962547 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 14:24:48.966099 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 14:24:48.970145 Chrome EC: UHEPI supported
312 14:24:48.976352 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 14:24:48.982662 Probing TPM: done!
314 14:24:48.989682 Connected to device vid:did:rid of 1ae0:0028:00
315 14:24:48.999508 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
316 14:24:49.003365 Initialized TPM device CR50 revision 0
317 14:24:49.017295 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 14:24:49.023567 MRC: Hash idx 0x100b comparison successful.
319 14:24:49.027167 MRC cache found, size 5458
320 14:24:49.027297 bootmode is set to: 2
321 14:24:49.030391 SPD INDEX = 0
322 14:24:49.033862 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 14:24:49.037040 SPD: module type is LPDDR4X
324 14:24:49.044561 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 14:24:49.048058 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 14:24:49.051580 SPD: device width 16 bits, bus width 32 bits
327 14:24:49.058175 SPD: module size is 4096 MB (per channel)
328 14:24:49.061653 meminit_channels: DRAM half-populated
329 14:24:49.143108 CBMEM:
330 14:24:49.146381 IMD: root @ 0x76fff000 254 entries.
331 14:24:49.149905 IMD: root @ 0x76ffec00 62 entries.
332 14:24:49.153073 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 14:24:49.159915 WARNING: RO_VPD is uninitialized or empty.
334 14:24:49.162688 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 14:24:49.166249 External stage cache:
336 14:24:49.169896 IMD: root @ 0x7b3ff000 254 entries.
337 14:24:49.172939 IMD: root @ 0x7b3fec00 62 entries.
338 14:24:49.183074 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 14:24:49.189442 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 14:24:49.195837 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 14:24:49.204680 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 14:24:49.211012 cse_lite: Skip switching to RW in the recovery path
343 14:24:49.211124 1 DIMMs found
344 14:24:49.211197 SMM Memory Map
345 14:24:49.214380 SMRAM : 0x7b000000 0x800000
346 14:24:49.217978 Subregion 0: 0x7b000000 0x200000
347 14:24:49.224310 Subregion 1: 0x7b200000 0x200000
348 14:24:49.227396 Subregion 2: 0x7b400000 0x400000
349 14:24:49.227525 top_of_ram = 0x77000000
350 14:24:49.234091 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 14:24:49.241116 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 14:24:49.244306 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 14:24:49.250830 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 14:24:49.253950 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 14:24:49.266080 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 14:24:49.273015 Processing 188 relocs. Offset value of 0x74c0e000
357 14:24:49.279747 BS: romstage times (exec / console): total (unknown) / 255 ms
358 14:24:49.283941
359 14:24:49.284053
360 14:24:49.294278 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 14:24:49.300641 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 14:24:49.304224 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 14:24:49.310661 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 14:24:49.366792 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 14:24:49.373389 Processing 4805 relocs. Offset value of 0x75da8000
366 14:24:49.377120 BS: postcar times (exec / console): total (unknown) / 42 ms
367 14:24:49.380097
368 14:24:49.380240
369 14:24:49.390135 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 14:24:49.390325 Normal boot
371 14:24:49.394209 EC returned error result code 3
372 14:24:49.397252 FW_CONFIG value is 0x204
373 14:24:49.400556 GENERIC: 0.0 disabled by fw_config
374 14:24:49.407007 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 14:24:49.410588 I2C: 00:10 disabled by fw_config
376 14:24:49.414466 I2C: 00:10 disabled by fw_config
377 14:24:49.417291 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 14:24:49.423720 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 14:24:49.427305 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 14:24:49.433770 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 14:24:49.437078 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 14:24:49.440605 I2C: 00:10 disabled by fw_config
383 14:24:49.448098 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 14:24:49.454415 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 14:24:49.457978 I2C: 00:1a disabled by fw_config
386 14:24:49.461005 I2C: 00:1a disabled by fw_config
387 14:24:49.464647 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 14:24:49.471163 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 14:24:49.474455 GENERIC: 0.0 disabled by fw_config
390 14:24:49.477880 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 14:24:49.484303 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 14:24:49.487781 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 14:24:49.494769 microcode: Update skipped, already up-to-date
394 14:24:49.497706 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 14:24:49.525204 Detected 2 core, 2 thread CPU.
396 14:24:49.528802 Setting up SMI for CPU
397 14:24:49.532173 IED base = 0x7b400000
398 14:24:49.532315 IED size = 0x00400000
399 14:24:49.535766 Will perform SMM setup.
400 14:24:49.538638 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 14:24:49.548812 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 14:24:49.551961 Processing 16 relocs. Offset value of 0x00030000
403 14:24:49.555810 Attempting to start 1 APs
404 14:24:49.558778 Waiting for 10ms after sending INIT.
405 14:24:49.575162 Waiting for 1st SIPI to complete...done.
406 14:24:49.575334 AP: slot 1 apic_id 2.
407 14:24:49.582126 Waiting for 2nd SIPI to complete...done.
408 14:24:49.588222 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 14:24:49.595031 Processing 13 relocs. Offset value of 0x00038000
410 14:24:49.595202 Unable to locate Global NVS
411 14:24:49.604738 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 14:24:49.608084 Installing permanent SMM handler to 0x7b000000
413 14:24:49.618174 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 14:24:49.621502 Processing 704 relocs. Offset value of 0x7b010000
415 14:24:49.631363 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 14:24:49.634903 Processing 13 relocs. Offset value of 0x7b008000
417 14:24:49.641283 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 14:24:49.644849 Unable to locate Global NVS
419 14:24:49.650940 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 14:24:49.654462 Clearing SMI status registers
421 14:24:49.654597 SMI_STS: PM1
422 14:24:49.657638 PM1_STS: PWRBTN
423 14:24:49.657729 TCO_STS: INTRD_DET
424 14:24:49.667601 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 14:24:49.670864 In relocation handler: CPU 0
426 14:24:49.674196 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 14:24:49.678195 Writing SMRR. base = 0x7b000006, mask=0xff800800
428 14:24:49.681212 Relocation complete.
429 14:24:49.687901 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 14:24:49.690806 In relocation handler: CPU 1
431 14:24:49.694501 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 14:24:49.701131 Writing SMRR. base = 0x7b000006, mask=0xff800800
433 14:24:49.701295 Relocation complete.
434 14:24:49.703891 Initializing CPU #0
435 14:24:49.707418 CPU: vendor Intel device 906c0
436 14:24:49.710917 CPU: family 06, model 9c, stepping 00
437 14:24:49.713844 Clearing out pending MCEs
438 14:24:49.717343 Setting up local APIC...
439 14:24:49.717446 apic_id: 0x00 done.
440 14:24:49.720776 Turbo is available but hidden
441 14:24:49.724329 Turbo is available and visible
442 14:24:49.727239 microcode: Update skipped, already up-to-date
443 14:24:49.730771 CPU #0 initialized
444 14:24:49.734326 Initializing CPU #1
445 14:24:49.737237 CPU: vendor Intel device 906c0
446 14:24:49.740678 CPU: family 06, model 9c, stepping 00
447 14:24:49.744207 Clearing out pending MCEs
448 14:24:49.744316 Setting up local APIC...
449 14:24:49.747160 apic_id: 0x02 done.
450 14:24:49.750699 microcode: Update skipped, already up-to-date
451 14:24:49.754116 CPU #1 initialized
452 14:24:49.757114 bsp_do_flight_plan done after 173 msecs.
453 14:24:49.760684 CPU: frequency set to 2800 MHz
454 14:24:49.763782 Enabling SMIs.
455 14:24:49.770192 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
456 14:24:49.779459 Probing TPM: done!
457 14:24:49.785953 Connected to device vid:did:rid of 1ae0:0028:00
458 14:24:49.796134 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
459 14:24:49.799201 Initialized TPM device CR50 revision 0
460 14:24:49.802766 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
461 14:24:49.809442 Found a VBT of 7680 bytes after decompression
462 14:24:49.815979 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
463 14:24:49.851101 Detected 2 core, 2 thread CPU.
464 14:24:49.854477 Detected 2 core, 2 thread CPU.
465 14:24:50.216106 Display FSP Version Info HOB
466 14:24:50.219252 Reference Code - CPU = 8.7.22.30
467 14:24:50.222428 uCode Version = 24.0.0.1f
468 14:24:50.226260 TXT ACM version = ff.ff.ff.ffff
469 14:24:50.229441 Reference Code - ME = 8.7.22.30
470 14:24:50.232937 MEBx version = 0.0.0.0
471 14:24:50.236152 ME Firmware Version = Consumer SKU
472 14:24:50.239167 Reference Code - PCH = 8.7.22.30
473 14:24:50.242651 PCH-CRID Status = Disabled
474 14:24:50.246182 PCH-CRID Original Value = ff.ff.ff.ffff
475 14:24:50.249110 PCH-CRID New Value = ff.ff.ff.ffff
476 14:24:50.252600 OPROM - RST - RAID = ff.ff.ff.ffff
477 14:24:50.256155 PCH Hsio Version = 4.0.0.0
478 14:24:50.259050 Reference Code - SA - System Agent = 8.7.22.30
479 14:24:50.262742 Reference Code - MRC = 0.0.4.68
480 14:24:50.266192 SA - PCIe Version = 8.7.22.30
481 14:24:50.269160 SA-CRID Status = Disabled
482 14:24:50.272527 SA-CRID Original Value = 0.0.0.0
483 14:24:50.276005 SA-CRID New Value = 0.0.0.0
484 14:24:50.279262 OPROM - VBIOS = ff.ff.ff.ffff
485 14:24:50.282311 IO Manageability Engine FW Version = ff.ff.ff.ffff
486 14:24:50.285949 PHY Build Version = ff.ff.ff.ffff
487 14:24:50.289190 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
488 14:24:50.295462 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
489 14:24:50.298765 ITSS IRQ Polarities Before:
490 14:24:50.302560 IPC0: 0xffffffff
491 14:24:50.302671 IPC1: 0xffffffff
492 14:24:50.306004 IPC2: 0xffffffff
493 14:24:50.306098 IPC3: 0xffffffff
494 14:24:50.308841 ITSS IRQ Polarities After:
495 14:24:50.312114 IPC0: 0xffffffff
496 14:24:50.312243 IPC1: 0xffffffff
497 14:24:50.315576 IPC2: 0xffffffff
498 14:24:50.315685 IPC3: 0xffffffff
499 14:24:50.328812 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
500 14:24:50.335493 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
501 14:24:50.335622 Enumerating buses...
502 14:24:50.341990 Show all devs... Before device enumeration.
503 14:24:50.342135 Root Device: enabled 1
504 14:24:50.345545 CPU_CLUSTER: 0: enabled 1
505 14:24:50.348326 DOMAIN: 0000: enabled 1
506 14:24:50.351969 PCI: 00:00.0: enabled 1
507 14:24:50.352103 PCI: 00:02.0: enabled 1
508 14:24:50.355277 PCI: 00:04.0: enabled 1
509 14:24:50.358802 PCI: 00:05.0: enabled 1
510 14:24:50.361709 PCI: 00:09.0: enabled 0
511 14:24:50.361832 PCI: 00:12.6: enabled 0
512 14:24:50.365243 PCI: 00:14.0: enabled 1
513 14:24:50.368790 PCI: 00:14.1: enabled 0
514 14:24:50.371742 PCI: 00:14.2: enabled 0
515 14:24:50.371867 PCI: 00:14.3: enabled 1
516 14:24:50.375265 PCI: 00:14.5: enabled 1
517 14:24:50.378133 PCI: 00:15.0: enabled 1
518 14:24:50.381740 PCI: 00:15.1: enabled 1
519 14:24:50.381871 PCI: 00:15.2: enabled 1
520 14:24:50.385438 PCI: 00:15.3: enabled 1
521 14:24:50.388106 PCI: 00:16.0: enabled 1
522 14:24:50.388240 PCI: 00:16.1: enabled 0
523 14:24:50.391695 PCI: 00:16.4: enabled 0
524 14:24:50.395203 PCI: 00:16.5: enabled 0
525 14:24:50.398006 PCI: 00:17.0: enabled 0
526 14:24:50.398135 PCI: 00:19.0: enabled 1
527 14:24:50.401343 PCI: 00:19.1: enabled 0
528 14:24:50.404864 PCI: 00:19.2: enabled 1
529 14:24:50.407842 PCI: 00:1a.0: enabled 1
530 14:24:50.407965 PCI: 00:1c.0: enabled 0
531 14:24:50.411489 PCI: 00:1c.1: enabled 0
532 14:24:50.414837 PCI: 00:1c.2: enabled 0
533 14:24:50.418109 PCI: 00:1c.3: enabled 0
534 14:24:50.418246 PCI: 00:1c.4: enabled 0
535 14:24:50.421396 PCI: 00:1c.5: enabled 0
536 14:24:50.424400 PCI: 00:1c.6: enabled 0
537 14:24:50.424516 PCI: 00:1c.7: enabled 1
538 14:24:50.427849 PCI: 00:1e.0: enabled 0
539 14:24:50.431098 PCI: 00:1e.1: enabled 0
540 14:24:50.434432 PCI: 00:1e.2: enabled 1
541 14:24:50.434561 PCI: 00:1e.3: enabled 0
542 14:24:50.437847 PCI: 00:1f.0: enabled 1
543 14:24:50.441163 PCI: 00:1f.1: enabled 1
544 14:24:50.444237 PCI: 00:1f.2: enabled 1
545 14:24:50.444391 PCI: 00:1f.3: enabled 1
546 14:24:50.447686 PCI: 00:1f.4: enabled 0
547 14:24:50.451011 PCI: 00:1f.5: enabled 1
548 14:24:50.454557 PCI: 00:1f.7: enabled 0
549 14:24:50.454678 GENERIC: 0.0: enabled 1
550 14:24:50.457635 GENERIC: 0.0: enabled 1
551 14:24:50.461103 USB0 port 0: enabled 1
552 14:24:50.461224 GENERIC: 0.0: enabled 1
553 14:24:50.464032 I2C: 00:2c: enabled 1
554 14:24:50.467500 I2C: 00:15: enabled 1
555 14:24:50.471078 GENERIC: 0.0: enabled 0
556 14:24:50.471215 I2C: 00:15: enabled 1
557 14:24:50.474640 I2C: 00:10: enabled 0
558 14:24:50.477529 I2C: 00:10: enabled 0
559 14:24:50.477647 I2C: 00:2c: enabled 1
560 14:24:50.480812 I2C: 00:40: enabled 1
561 14:24:50.484338 I2C: 00:10: enabled 1
562 14:24:50.484479 I2C: 00:39: enabled 1
563 14:24:50.487893 I2C: 00:36: enabled 1
564 14:24:50.491063 I2C: 00:10: enabled 0
565 14:24:50.491189 I2C: 00:0c: enabled 1
566 14:24:50.494258 I2C: 00:50: enabled 1
567 14:24:50.497844 I2C: 00:1a: enabled 1
568 14:24:50.497969 I2C: 00:1a: enabled 0
569 14:24:50.500635 I2C: 00:1a: enabled 0
570 14:24:50.503996 I2C: 00:28: enabled 1
571 14:24:50.504094 I2C: 00:29: enabled 1
572 14:24:50.507395 PCI: 00:00.0: enabled 1
573 14:24:50.510796 SPI: 00: enabled 1
574 14:24:50.510895 PNP: 0c09.0: enabled 1
575 14:24:50.514078 GENERIC: 0.0: enabled 0
576 14:24:50.517322 USB2 port 0: enabled 1
577 14:24:50.517429 USB2 port 1: enabled 1
578 14:24:50.520753 USB2 port 2: enabled 1
579 14:24:50.524095 USB2 port 3: enabled 1
580 14:24:50.527234 USB2 port 4: enabled 0
581 14:24:50.527344 USB2 port 5: enabled 1
582 14:24:50.530981 USB2 port 6: enabled 0
583 14:24:50.534270 USB2 port 7: enabled 1
584 14:24:50.534359 USB3 port 0: enabled 1
585 14:24:50.537914 USB3 port 1: enabled 1
586 14:24:50.540609 USB3 port 2: enabled 1
587 14:24:50.540695 USB3 port 3: enabled 1
588 14:24:50.543933 APIC: 00: enabled 1
589 14:24:50.547130 APIC: 02: enabled 1
590 14:24:50.547230 Compare with tree...
591 14:24:50.550224 Root Device: enabled 1
592 14:24:50.554165 CPU_CLUSTER: 0: enabled 1
593 14:24:50.557878 APIC: 00: enabled 1
594 14:24:50.557983 APIC: 02: enabled 1
595 14:24:50.560443 DOMAIN: 0000: enabled 1
596 14:24:50.563947 PCI: 00:00.0: enabled 1
597 14:24:50.567494 PCI: 00:02.0: enabled 1
598 14:24:50.567594 PCI: 00:04.0: enabled 1
599 14:24:50.570495 GENERIC: 0.0: enabled 1
600 14:24:50.574082 PCI: 00:05.0: enabled 1
601 14:24:50.577054 GENERIC: 0.0: enabled 1
602 14:24:50.580605 PCI: 00:09.0: enabled 0
603 14:24:50.580730 PCI: 00:12.6: enabled 0
604 14:24:50.584012 PCI: 00:14.0: enabled 1
605 14:24:50.586848 USB0 port 0: enabled 1
606 14:24:50.590455 USB2 port 0: enabled 1
607 14:24:50.594089 USB2 port 1: enabled 1
608 14:24:50.594221 USB2 port 2: enabled 1
609 14:24:50.596928 USB2 port 3: enabled 1
610 14:24:50.600341 USB2 port 4: enabled 0
611 14:24:50.603854 USB2 port 5: enabled 1
612 14:24:50.606814 USB2 port 6: enabled 0
613 14:24:50.606933 USB2 port 7: enabled 1
614 14:24:50.610390 USB3 port 0: enabled 1
615 14:24:50.613508 USB3 port 1: enabled 1
616 14:24:50.616860 USB3 port 2: enabled 1
617 14:24:50.620293 USB3 port 3: enabled 1
618 14:24:50.623474 PCI: 00:14.1: enabled 0
619 14:24:50.623611 PCI: 00:14.2: enabled 0
620 14:24:50.626719 PCI: 00:14.3: enabled 1
621 14:24:50.630404 GENERIC: 0.0: enabled 1
622 14:24:50.633710 PCI: 00:14.5: enabled 1
623 14:24:50.636895 PCI: 00:15.0: enabled 1
624 14:24:50.637012 I2C: 00:2c: enabled 1
625 14:24:50.640228 I2C: 00:15: enabled 1
626 14:24:50.643696 PCI: 00:15.1: enabled 1
627 14:24:50.646910 PCI: 00:15.2: enabled 1
628 14:24:50.647029 GENERIC: 0.0: enabled 0
629 14:24:50.650189 I2C: 00:15: enabled 1
630 14:24:50.653449 I2C: 00:10: enabled 0
631 14:24:50.656599 I2C: 00:10: enabled 0
632 14:24:50.659955 I2C: 00:2c: enabled 1
633 14:24:50.660071 I2C: 00:40: enabled 1
634 14:24:50.663150 I2C: 00:10: enabled 1
635 14:24:50.666553 I2C: 00:39: enabled 1
636 14:24:50.670184 PCI: 00:15.3: enabled 1
637 14:24:50.670304 I2C: 00:36: enabled 1
638 14:24:50.673080 I2C: 00:10: enabled 0
639 14:24:50.676762 I2C: 00:0c: enabled 1
640 14:24:50.679928 I2C: 00:50: enabled 1
641 14:24:50.680044 PCI: 00:16.0: enabled 1
642 14:24:50.683095 PCI: 00:16.1: enabled 0
643 14:24:50.686721 PCI: 00:16.4: enabled 0
644 14:24:50.690117 PCI: 00:16.5: enabled 0
645 14:24:50.692999 PCI: 00:17.0: enabled 0
646 14:24:50.693139 PCI: 00:19.0: enabled 1
647 14:24:50.696510 I2C: 00:1a: enabled 1
648 14:24:50.700004 I2C: 00:1a: enabled 0
649 14:24:50.702955 I2C: 00:1a: enabled 0
650 14:24:50.703068 I2C: 00:28: enabled 1
651 14:24:50.707098 I2C: 00:29: enabled 1
652 14:24:50.710713 PCI: 00:19.1: enabled 0
653 14:24:50.710841 PCI: 00:19.2: enabled 1
654 14:24:50.714328 PCI: 00:1a.0: enabled 1
655 14:24:50.718064 PCI: 00:1e.0: enabled 0
656 14:24:50.720898 PCI: 00:1e.1: enabled 0
657 14:24:50.724272 PCI: 00:1e.2: enabled 1
658 14:24:50.724442 SPI: 00: enabled 1
659 14:24:50.727718 PCI: 00:1e.3: enabled 0
660 14:24:50.731028 PCI: 00:1f.0: enabled 1
661 14:24:50.734114 PNP: 0c09.0: enabled 1
662 14:24:50.734218 PCI: 00:1f.1: enabled 1
663 14:24:50.737280 PCI: 00:1f.2: enabled 1
664 14:24:50.740922 PCI: 00:1f.3: enabled 1
665 14:24:50.744132 GENERIC: 0.0: enabled 0
666 14:24:50.747611 PCI: 00:1f.4: enabled 0
667 14:24:50.747711 PCI: 00:1f.5: enabled 1
668 14:24:50.750748 PCI: 00:1f.7: enabled 0
669 14:24:50.753918 Root Device scanning...
670 14:24:50.757142 scan_static_bus for Root Device
671 14:24:50.761054 CPU_CLUSTER: 0 enabled
672 14:24:50.761165 DOMAIN: 0000 enabled
673 14:24:50.764184 DOMAIN: 0000 scanning...
674 14:24:50.767217 PCI: pci_scan_bus for bus 00
675 14:24:50.770819 PCI: 00:00.0 [8086/0000] ops
676 14:24:50.773849 PCI: 00:00.0 [8086/4e22] enabled
677 14:24:50.777356 PCI: 00:02.0 [8086/0000] bus ops
678 14:24:50.780891 PCI: 00:02.0 [8086/4e55] enabled
679 14:24:50.783868 PCI: 00:04.0 [8086/0000] bus ops
680 14:24:50.787502 PCI: 00:04.0 [8086/4e03] enabled
681 14:24:50.790294 PCI: 00:05.0 [8086/0000] bus ops
682 14:24:50.793607 PCI: 00:05.0 [8086/4e19] enabled
683 14:24:50.797113 PCI: 00:08.0 [8086/4e11] enabled
684 14:24:50.800633 PCI: 00:14.0 [8086/0000] bus ops
685 14:24:50.804128 PCI: 00:14.0 [8086/4ded] enabled
686 14:24:50.807051 PCI: 00:14.2 [8086/4def] disabled
687 14:24:50.810741 PCI: 00:14.3 [8086/0000] bus ops
688 14:24:50.813744 PCI: 00:14.3 [8086/4df0] enabled
689 14:24:50.817347 PCI: 00:14.5 [8086/0000] ops
690 14:24:50.820082 PCI: 00:14.5 [8086/4df8] enabled
691 14:24:50.824066 PCI: 00:15.0 [8086/0000] bus ops
692 14:24:50.826777 PCI: 00:15.0 [8086/4de8] enabled
693 14:24:50.830564 PCI: 00:15.1 [8086/0000] bus ops
694 14:24:50.833697 PCI: 00:15.1 [8086/4de9] enabled
695 14:24:50.837195 PCI: 00:15.2 [8086/0000] bus ops
696 14:24:50.840259 PCI: 00:15.2 [8086/4dea] enabled
697 14:24:50.843688 PCI: 00:15.3 [8086/0000] bus ops
698 14:24:50.846930 PCI: 00:15.3 [8086/4deb] enabled
699 14:24:50.850165 PCI: 00:16.0 [8086/0000] ops
700 14:24:50.853402 PCI: 00:16.0 [8086/4de0] enabled
701 14:24:50.856817 PCI: 00:19.0 [8086/0000] bus ops
702 14:24:50.860156 PCI: 00:19.0 [8086/4dc5] enabled
703 14:24:50.860276 PCI: 00:19.2 [8086/0000] ops
704 14:24:50.863506 PCI: 00:19.2 [8086/4dc7] enabled
705 14:24:50.866633 PCI: 00:1a.0 [8086/0000] ops
706 14:24:50.870310 PCI: 00:1a.0 [8086/4dc4] enabled
707 14:24:50.873494 PCI: 00:1e.0 [8086/0000] ops
708 14:24:50.877000 PCI: 00:1e.0 [8086/4da8] disabled
709 14:24:50.879871 PCI: 00:1e.2 [8086/0000] bus ops
710 14:24:50.883389 PCI: 00:1e.2 [8086/4daa] enabled
711 14:24:50.886797 PCI: 00:1f.0 [8086/0000] bus ops
712 14:24:50.889749 PCI: 00:1f.0 [8086/4d87] enabled
713 14:24:50.896754 PCI: Static device PCI: 00:1f.1 not found, disabling it.
714 14:24:50.896972 RTC Init
715 14:24:50.900030 Set power on after power failure.
716 14:24:50.902982 Disabling Deep S3
717 14:24:50.906492 Disabling Deep S3
718 14:24:50.906611 Disabling Deep S4
719 14:24:50.910074 Disabling Deep S4
720 14:24:50.910191 Disabling Deep S5
721 14:24:50.912965 Disabling Deep S5
722 14:24:50.916497 PCI: 00:1f.2 [0000/0000] hidden
723 14:24:50.919708 PCI: 00:1f.3 [8086/0000] bus ops
724 14:24:50.923223 PCI: 00:1f.3 [8086/4dc8] enabled
725 14:24:50.926202 PCI: 00:1f.5 [8086/0000] bus ops
726 14:24:50.929731 PCI: 00:1f.5 [8086/4da4] enabled
727 14:24:50.932874 PCI: Leftover static devices:
728 14:24:50.932997 PCI: 00:12.6
729 14:24:50.933108 PCI: 00:09.0
730 14:24:50.936093 PCI: 00:14.1
731 14:24:50.936248 PCI: 00:16.1
732 14:24:50.939545 PCI: 00:16.4
733 14:24:50.939670 PCI: 00:16.5
734 14:24:50.942859 PCI: 00:17.0
735 14:24:50.942974 PCI: 00:19.1
736 14:24:50.943068 PCI: 00:1e.1
737 14:24:50.946301 PCI: 00:1e.3
738 14:24:50.946411 PCI: 00:1f.1
739 14:24:50.949352 PCI: 00:1f.4
740 14:24:50.949465 PCI: 00:1f.7
741 14:24:50.953133 PCI: Check your devicetree.cb.
742 14:24:50.956665 PCI: 00:02.0 scanning...
743 14:24:50.959635 scan_generic_bus for PCI: 00:02.0
744 14:24:50.963252 scan_generic_bus for PCI: 00:02.0 done
745 14:24:50.966154 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
746 14:24:50.969349 PCI: 00:04.0 scanning...
747 14:24:50.972756 scan_generic_bus for PCI: 00:04.0
748 14:24:50.975814 GENERIC: 0.0 enabled
749 14:24:50.983068 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
750 14:24:50.985977 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
751 14:24:50.989488 PCI: 00:05.0 scanning...
752 14:24:50.992342 scan_generic_bus for PCI: 00:05.0
753 14:24:50.995864 GENERIC: 0.0 enabled
754 14:24:50.999371 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
755 14:24:51.006090 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
756 14:24:51.008957 PCI: 00:14.0 scanning...
757 14:24:51.012588 scan_static_bus for PCI: 00:14.0
758 14:24:51.012683 USB0 port 0 enabled
759 14:24:51.015996 USB0 port 0 scanning...
760 14:24:51.018918 scan_static_bus for USB0 port 0
761 14:24:51.022311 USB2 port 0 enabled
762 14:24:51.022420 USB2 port 1 enabled
763 14:24:51.025719 USB2 port 2 enabled
764 14:24:51.029319 USB2 port 3 enabled
765 14:24:51.029432 USB2 port 4 disabled
766 14:24:51.032082 USB2 port 5 enabled
767 14:24:51.032197 USB2 port 6 disabled
768 14:24:51.035760 USB2 port 7 enabled
769 14:24:51.038715 USB3 port 0 enabled
770 14:24:51.038820 USB3 port 1 enabled
771 14:24:51.042082 USB3 port 2 enabled
772 14:24:51.045756 USB3 port 3 enabled
773 14:24:51.045871 USB2 port 0 scanning...
774 14:24:51.049196 scan_static_bus for USB2 port 0
775 14:24:51.051932 scan_static_bus for USB2 port 0 done
776 14:24:51.058831 scan_bus: bus USB2 port 0 finished in 6 msecs
777 14:24:51.062099 USB2 port 1 scanning...
778 14:24:51.065355 scan_static_bus for USB2 port 1
779 14:24:51.068659 scan_static_bus for USB2 port 1 done
780 14:24:51.071907 scan_bus: bus USB2 port 1 finished in 6 msecs
781 14:24:51.075713 USB2 port 2 scanning...
782 14:24:51.078933 scan_static_bus for USB2 port 2
783 14:24:51.082230 scan_static_bus for USB2 port 2 done
784 14:24:51.085366 scan_bus: bus USB2 port 2 finished in 6 msecs
785 14:24:51.088378 USB2 port 3 scanning...
786 14:24:51.091919 scan_static_bus for USB2 port 3
787 14:24:51.095396 scan_static_bus for USB2 port 3 done
788 14:24:51.098321 scan_bus: bus USB2 port 3 finished in 6 msecs
789 14:24:51.102012 USB2 port 5 scanning...
790 14:24:51.105382 scan_static_bus for USB2 port 5
791 14:24:51.108194 scan_static_bus for USB2 port 5 done
792 14:24:51.115185 scan_bus: bus USB2 port 5 finished in 6 msecs
793 14:24:51.115272 USB2 port 7 scanning...
794 14:24:51.118757 scan_static_bus for USB2 port 7
795 14:24:51.125180 scan_static_bus for USB2 port 7 done
796 14:24:51.128688 scan_bus: bus USB2 port 7 finished in 6 msecs
797 14:24:51.131758 USB3 port 0 scanning...
798 14:24:51.135076 scan_static_bus for USB3 port 0
799 14:24:51.138610 scan_static_bus for USB3 port 0 done
800 14:24:51.141613 scan_bus: bus USB3 port 0 finished in 6 msecs
801 14:24:51.145328 USB3 port 1 scanning...
802 14:24:51.148301 scan_static_bus for USB3 port 1
803 14:24:51.151451 scan_static_bus for USB3 port 1 done
804 14:24:51.154880 scan_bus: bus USB3 port 1 finished in 6 msecs
805 14:24:51.158169 USB3 port 2 scanning...
806 14:24:51.161534 scan_static_bus for USB3 port 2
807 14:24:51.164831 scan_static_bus for USB3 port 2 done
808 14:24:51.171352 scan_bus: bus USB3 port 2 finished in 6 msecs
809 14:24:51.171442 USB3 port 3 scanning...
810 14:24:51.174712 scan_static_bus for USB3 port 3
811 14:24:51.181558 scan_static_bus for USB3 port 3 done
812 14:24:51.185086 scan_bus: bus USB3 port 3 finished in 6 msecs
813 14:24:51.188195 scan_static_bus for USB0 port 0 done
814 14:24:51.191458 scan_bus: bus USB0 port 0 finished in 172 msecs
815 14:24:51.197942 scan_static_bus for PCI: 00:14.0 done
816 14:24:51.201482 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
817 14:24:51.204430 PCI: 00:14.3 scanning...
818 14:24:51.207903 scan_static_bus for PCI: 00:14.3
819 14:24:51.211180 GENERIC: 0.0 enabled
820 14:24:51.214780 scan_static_bus for PCI: 00:14.3 done
821 14:24:51.217756 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
822 14:24:51.221256 PCI: 00:15.0 scanning...
823 14:24:51.224607 scan_static_bus for PCI: 00:15.0
824 14:24:51.224692 I2C: 00:2c enabled
825 14:24:51.228267 I2C: 00:15 enabled
826 14:24:51.231227 scan_static_bus for PCI: 00:15.0 done
827 14:24:51.237571 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
828 14:24:51.237687 PCI: 00:15.1 scanning...
829 14:24:51.241211 scan_static_bus for PCI: 00:15.1
830 14:24:51.247525 scan_static_bus for PCI: 00:15.1 done
831 14:24:51.251093 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
832 14:24:51.254351 PCI: 00:15.2 scanning...
833 14:24:51.257575 scan_static_bus for PCI: 00:15.2
834 14:24:51.260916 GENERIC: 0.0 disabled
835 14:24:51.261015 I2C: 00:15 enabled
836 14:24:51.264245 I2C: 00:10 disabled
837 14:24:51.264387 I2C: 00:10 disabled
838 14:24:51.267776 I2C: 00:2c enabled
839 14:24:51.270879 I2C: 00:40 enabled
840 14:24:51.271006 I2C: 00:10 enabled
841 14:24:51.273728 I2C: 00:39 enabled
842 14:24:51.277556 scan_static_bus for PCI: 00:15.2 done
843 14:24:51.280833 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
844 14:24:51.284113 PCI: 00:15.3 scanning...
845 14:24:51.287214 scan_static_bus for PCI: 00:15.3
846 14:24:51.291166 I2C: 00:36 enabled
847 14:24:51.291311 I2C: 00:10 disabled
848 14:24:51.294825 I2C: 00:0c enabled
849 14:24:51.294932 I2C: 00:50 enabled
850 14:24:51.298332 scan_static_bus for PCI: 00:15.3 done
851 14:24:51.305861 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
852 14:24:51.305967 PCI: 00:19.0 scanning...
853 14:24:51.309348 scan_static_bus for PCI: 00:19.0
854 14:24:51.312455 I2C: 00:1a enabled
855 14:24:51.312556 I2C: 00:1a disabled
856 14:24:51.315710 I2C: 00:1a disabled
857 14:24:51.319202 I2C: 00:28 enabled
858 14:24:51.319300 I2C: 00:29 enabled
859 14:24:51.322685 scan_static_bus for PCI: 00:19.0 done
860 14:24:51.329102 scan_bus: bus PCI: 00:19.0 finished in 16 msecs
861 14:24:51.332531 PCI: 00:1e.2 scanning...
862 14:24:51.335359 scan_generic_bus for PCI: 00:1e.2
863 14:24:51.335458 SPI: 00 enabled
864 14:24:51.342344 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
865 14:24:51.345738 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
866 14:24:51.348845 PCI: 00:1f.0 scanning...
867 14:24:51.352048 scan_static_bus for PCI: 00:1f.0
868 14:24:51.355624 PNP: 0c09.0 enabled
869 14:24:51.358532 PNP: 0c09.0 scanning...
870 14:24:51.361991 scan_static_bus for PNP: 0c09.0
871 14:24:51.365149 scan_static_bus for PNP: 0c09.0 done
872 14:24:51.368342 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
873 14:24:51.371670 scan_static_bus for PCI: 00:1f.0 done
874 14:24:51.378663 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
875 14:24:51.382045 PCI: 00:1f.3 scanning...
876 14:24:51.385055 scan_static_bus for PCI: 00:1f.3
877 14:24:51.385172 GENERIC: 0.0 disabled
878 14:24:51.388172 scan_static_bus for PCI: 00:1f.3 done
879 14:24:51.395055 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
880 14:24:51.398423 PCI: 00:1f.5 scanning...
881 14:24:51.401719 scan_generic_bus for PCI: 00:1f.5
882 14:24:51.404968 scan_generic_bus for PCI: 00:1f.5 done
883 14:24:51.407910 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
884 14:24:51.414854 scan_bus: bus DOMAIN: 0000 finished in 644 msecs
885 14:24:51.418220 scan_static_bus for Root Device done
886 14:24:51.421648 scan_bus: bus Root Device finished in 663 msecs
887 14:24:51.424580 done
888 14:24:51.428008 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1083 ms
889 14:24:51.431598 Chrome EC: UHEPI supported
890 14:24:51.438244 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
891 14:24:51.444854 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
892 14:24:51.448182 SPI flash protection: WPSW=0 SRP0=1
893 14:24:51.451476 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
894 14:24:51.458073 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 23 ms
895 14:24:51.461517 found VGA at PCI: 00:02.0
896 14:24:51.464259 Setting up VGA for PCI: 00:02.0
897 14:24:51.471167 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
898 14:24:51.474687 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
899 14:24:51.477866 Allocating resources...
900 14:24:51.477953 Reading resources...
901 14:24:51.484115 Root Device read_resources bus 0 link: 0
902 14:24:51.487959 CPU_CLUSTER: 0 read_resources bus 0 link: 0
903 14:24:51.491232 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
904 14:24:51.497688 DOMAIN: 0000 read_resources bus 0 link: 0
905 14:24:51.501457 PCI: 00:04.0 read_resources bus 1 link: 0
906 14:24:51.507690 PCI: 00:04.0 read_resources bus 1 link: 0 done
907 14:24:51.510961 PCI: 00:05.0 read_resources bus 2 link: 0
908 14:24:51.518130 PCI: 00:05.0 read_resources bus 2 link: 0 done
909 14:24:51.521083 PCI: 00:14.0 read_resources bus 0 link: 0
910 14:24:51.524422 USB0 port 0 read_resources bus 0 link: 0
911 14:24:51.532488 USB0 port 0 read_resources bus 0 link: 0 done
912 14:24:51.536081 PCI: 00:14.0 read_resources bus 0 link: 0 done
913 14:24:51.542567 PCI: 00:14.3 read_resources bus 0 link: 0
914 14:24:51.598229 PCI: 00:14.3 read_resources bus 0 link: 0 done
915 14:24:51.598862 PCI: 00:15.0 read_resources bus 0 link: 0
916 14:24:51.598954 PCI: 00:15.0 read_resources bus 0 link: 0 done
917 14:24:51.599200 PCI: 00:15.2 read_resources bus 0 link: 0
918 14:24:51.599446 PCI: 00:15.2 read_resources bus 0 link: 0 done
919 14:24:51.599515 PCI: 00:15.3 read_resources bus 0 link: 0
920 14:24:51.599592 PCI: 00:15.3 read_resources bus 0 link: 0 done
921 14:24:51.600022 PCI: 00:19.0 read_resources bus 0 link: 0
922 14:24:51.600283 PCI: 00:19.0 read_resources bus 0 link: 0 done
923 14:24:51.600360 PCI: 00:1e.2 read_resources bus 3 link: 0
924 14:24:51.600438 PCI: 00:1e.2 read_resources bus 3 link: 0 done
925 14:24:51.649531 PCI: 00:1f.0 read_resources bus 0 link: 0
926 14:24:51.649737 PCI: 00:1f.0 read_resources bus 0 link: 0 done
927 14:24:51.650031 PCI: 00:1f.3 read_resources bus 0 link: 0
928 14:24:51.650112 PCI: 00:1f.3 read_resources bus 0 link: 0 done
929 14:24:51.650173 DOMAIN: 0000 read_resources bus 0 link: 0 done
930 14:24:51.650231 Root Device read_resources bus 0 link: 0 done
931 14:24:51.650318 Done reading resources.
932 14:24:51.650384 Show resources in subtree (Root Device)...After reading.
933 14:24:51.650442 Root Device child on link 0 CPU_CLUSTER: 0
934 14:24:51.650498 CPU_CLUSTER: 0 child on link 0 APIC: 00
935 14:24:51.650554 APIC: 00
936 14:24:51.650607 APIC: 02
937 14:24:51.650959 DOMAIN: 0000 child on link 0 PCI: 00:00.0
938 14:24:51.659699 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
939 14:24:51.666594 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
940 14:24:51.669534 PCI: 00:00.0
941 14:24:51.679520 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
942 14:24:51.689429 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
943 14:24:51.696324 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
944 14:24:51.706147 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
945 14:24:51.716308 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
946 14:24:51.725782 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
947 14:24:51.735615 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
948 14:24:51.742871 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
949 14:24:51.752516 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
950 14:24:51.762507 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
951 14:24:51.772567 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
952 14:24:51.782416 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
953 14:24:51.788789 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
954 14:24:51.798661 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
955 14:24:51.808870 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
956 14:24:51.818553 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
957 14:24:51.828811 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
958 14:24:51.838113 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
959 14:24:51.844991 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
960 14:24:51.848637 PCI: 00:02.0
961 14:24:51.858345 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 14:24:51.868293 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
963 14:24:51.877851 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
964 14:24:51.881286 PCI: 00:04.0 child on link 0 GENERIC: 0.0
965 14:24:51.891085 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
966 14:24:51.894716 GENERIC: 0.0
967 14:24:51.898199 PCI: 00:05.0 child on link 0 GENERIC: 0.0
968 14:24:51.908331 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
969 14:24:51.910987 GENERIC: 0.0
970 14:24:51.911077 PCI: 00:08.0
971 14:24:51.921034 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 14:24:51.924095 PCI: 00:14.0 child on link 0 USB0 port 0
973 14:24:51.933970 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
974 14:24:51.940724 USB0 port 0 child on link 0 USB2 port 0
975 14:24:51.940823 USB2 port 0
976 14:24:51.943932 USB2 port 1
977 14:24:51.944017 USB2 port 2
978 14:24:51.947432 USB2 port 3
979 14:24:51.947516 USB2 port 4
980 14:24:51.950259 USB2 port 5
981 14:24:51.950345 USB2 port 6
982 14:24:51.953865 USB2 port 7
983 14:24:51.957234 USB3 port 0
984 14:24:51.957327 USB3 port 1
985 14:24:51.960965 USB3 port 2
986 14:24:51.961050 USB3 port 3
987 14:24:51.963726 PCI: 00:14.2
988 14:24:51.967148 PCI: 00:14.3 child on link 0 GENERIC: 0.0
989 14:24:51.977542 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
990 14:24:51.977683 GENERIC: 0.0
991 14:24:51.981176 PCI: 00:14.5
992 14:24:51.991078 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 14:24:51.994556 PCI: 00:15.0 child on link 0 I2C: 00:2c
994 14:24:52.004492 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 14:24:52.004626 I2C: 00:2c
996 14:24:52.007940 I2C: 00:15
997 14:24:52.008061 PCI: 00:15.1
998 14:24:52.017532 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 14:24:52.024091 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1000 14:24:52.034505 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1001 14:24:52.034619 GENERIC: 0.0
1002 14:24:52.037704 I2C: 00:15
1003 14:24:52.037789 I2C: 00:10
1004 14:24:52.040964 I2C: 00:10
1005 14:24:52.041048 I2C: 00:2c
1006 14:24:52.044189 I2C: 00:40
1007 14:24:52.044307 I2C: 00:10
1008 14:24:52.047530 I2C: 00:39
1009 14:24:52.050813 PCI: 00:15.3 child on link 0 I2C: 00:36
1010 14:24:52.060869 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 14:24:52.060968 I2C: 00:36
1012 14:24:52.063961 I2C: 00:10
1013 14:24:52.064045 I2C: 00:0c
1014 14:24:52.067278 I2C: 00:50
1015 14:24:52.067362 PCI: 00:16.0
1016 14:24:52.077203 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 14:24:52.083868 PCI: 00:19.0 child on link 0 I2C: 00:1a
1018 14:24:52.093561 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1019 14:24:52.093657 I2C: 00:1a
1020 14:24:52.093727 I2C: 00:1a
1021 14:24:52.097050 I2C: 00:1a
1022 14:24:52.097134 I2C: 00:28
1023 14:24:52.100368 I2C: 00:29
1024 14:24:52.100453 PCI: 00:19.2
1025 14:24:52.113113 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 14:24:52.123424 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 14:24:52.123554 PCI: 00:1a.0
1028 14:24:52.133161 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 14:24:52.136934 PCI: 00:1e.0
1030 14:24:52.140077 PCI: 00:1e.2 child on link 0 SPI: 00
1031 14:24:52.149792 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 14:24:52.149914 SPI: 00
1033 14:24:52.156421 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1034 14:24:52.163296 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1035 14:24:52.166642 PNP: 0c09.0
1036 14:24:52.172984 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1037 14:24:52.176366 PCI: 00:1f.2
1038 14:24:52.186642 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1039 14:24:52.193183 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1040 14:24:52.199637 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1041 14:24:52.210060 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 14:24:52.219327 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1043 14:24:52.219442 GENERIC: 0.0
1044 14:24:52.222757 PCI: 00:1f.5
1045 14:24:52.232941 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 14:24:52.239446 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1047 14:24:52.245930 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1048 14:24:52.252426 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 14:24:52.259453 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1050 14:24:52.266018 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1051 14:24:52.276150 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1052 14:24:52.278709 DOMAIN: 0000: Resource ranges:
1053 14:24:52.282204 * Base: 1000, Size: 800, Tag: 100
1054 14:24:52.285794 * Base: 1900, Size: e700, Tag: 100
1055 14:24:52.289034 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1056 14:24:52.295433 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1057 14:24:52.302398 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1058 14:24:52.312248 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1059 14:24:52.318773 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1060 14:24:52.325858 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1061 14:24:52.335598 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1062 14:24:52.341933 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1063 14:24:52.348770 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1064 14:24:52.358571 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1065 14:24:52.364839 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1066 14:24:52.371764 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1067 14:24:52.381923 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1068 14:24:52.387981 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1069 14:24:52.395124 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1070 14:24:52.404841 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1071 14:24:52.411269 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1072 14:24:52.418127 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1073 14:24:52.427920 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1074 14:24:52.434229 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1075 14:24:52.441145 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1076 14:24:52.451115 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1077 14:24:52.457410 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1078 14:24:52.464712 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1079 14:24:52.467391 DOMAIN: 0000: Resource ranges:
1080 14:24:52.470543 * Base: 7fc00000, Size: 40400000, Tag: 200
1081 14:24:52.477486 * Base: d0000000, Size: 2b000000, Tag: 200
1082 14:24:52.480530 * Base: fb001000, Size: 2fff000, Tag: 200
1083 14:24:52.483925 * Base: fe010000, Size: 22000, Tag: 200
1084 14:24:52.490711 * Base: fe033000, Size: a4d000, Tag: 200
1085 14:24:52.493993 * Base: fea88000, Size: 2f8000, Tag: 200
1086 14:24:52.497218 * Base: fed88000, Size: 8000, Tag: 200
1087 14:24:52.500710 * Base: fed93000, Size: d000, Tag: 200
1088 14:24:52.507074 * Base: feda2000, Size: 125e000, Tag: 200
1089 14:24:52.510452 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1090 14:24:52.517243 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1091 14:24:52.523766 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1092 14:24:52.530537 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1093 14:24:52.537022 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1094 14:24:52.543255 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1095 14:24:52.550294 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1096 14:24:52.557180 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1097 14:24:52.564068 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1098 14:24:52.571017 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1099 14:24:52.577654 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1100 14:24:52.584199 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1101 14:24:52.590702 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1102 14:24:52.597345 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1103 14:24:52.604014 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1104 14:24:52.610668 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1105 14:24:52.617251 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1106 14:24:52.623953 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1107 14:24:52.630338 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1108 14:24:52.636900 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1109 14:24:52.643572 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1110 14:24:52.650702 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1111 14:24:52.657086 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1112 14:24:52.660333 Root Device assign_resources, bus 0 link: 0
1113 14:24:52.667228 DOMAIN: 0000 assign_resources, bus 0 link: 0
1114 14:24:52.673975 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1115 14:24:52.683831 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1116 14:24:52.690437 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1117 14:24:52.700374 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1118 14:24:52.703598 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 14:24:52.706889 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 14:24:52.716746 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1121 14:24:52.720180 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 14:24:52.726419 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 14:24:52.732965 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1124 14:24:52.740001 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1125 14:24:52.746289 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 14:24:52.749617 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 14:24:52.759373 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1128 14:24:52.762945 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 14:24:52.766480 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 14:24:52.776045 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1131 14:24:52.782809 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1132 14:24:52.789249 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 14:24:52.793064 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 14:24:52.802935 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1135 14:24:52.809060 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1136 14:24:52.812240 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 14:24:52.818857 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 14:24:52.825933 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1139 14:24:52.832069 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 14:24:52.835642 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 14:24:52.842174 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1142 14:24:52.852247 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1143 14:24:52.855252 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 14:24:52.862293 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 14:24:52.868599 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1146 14:24:52.878452 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1147 14:24:52.885435 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1148 14:24:52.888238 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 14:24:52.895503 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 14:24:52.898469 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 14:24:52.904807 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 14:24:52.908482 LPC: Trying to open IO window from 800 size 1ff
1153 14:24:52.918555 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1154 14:24:52.924966 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1155 14:24:52.928651 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 14:24:52.935239 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 14:24:52.941735 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1158 14:24:52.948147 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 14:24:52.951380 Root Device assign_resources, bus 0 link: 0
1160 14:24:52.954684 Done setting resources.
1161 14:24:52.961759 Show resources in subtree (Root Device)...After assigning values.
1162 14:24:52.964450 Root Device child on link 0 CPU_CLUSTER: 0
1163 14:24:52.967919 CPU_CLUSTER: 0 child on link 0 APIC: 00
1164 14:24:52.971616 APIC: 00
1165 14:24:52.971718 APIC: 02
1166 14:24:52.974832 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1167 14:24:52.984811 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1168 14:24:52.994106 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1169 14:24:52.997592 PCI: 00:00.0
1170 14:24:53.004269 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1171 14:24:53.014321 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1172 14:24:53.024134 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1173 14:24:53.034295 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1174 14:24:53.044465 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1175 14:24:53.050999 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1176 14:24:53.060486 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1177 14:24:53.070481 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1178 14:24:53.080256 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1179 14:24:53.090750 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1180 14:24:53.100639 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1181 14:24:53.107130 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1182 14:24:53.116824 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1183 14:24:53.126803 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1184 14:24:53.136435 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1185 14:24:53.146484 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1186 14:24:53.156252 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1187 14:24:53.163061 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1188 14:24:53.173307 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1189 14:24:53.176494 PCI: 00:02.0
1190 14:24:53.186318 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1191 14:24:53.196459 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1192 14:24:53.206314 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1193 14:24:53.209592 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 14:24:53.219582 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1195 14:24:53.222781 GENERIC: 0.0
1196 14:24:53.225923 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1197 14:24:53.236407 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1198 14:24:53.239679 GENERIC: 0.0
1199 14:24:53.240096 PCI: 00:08.0
1200 14:24:53.249529 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1201 14:24:53.256320 PCI: 00:14.0 child on link 0 USB0 port 0
1202 14:24:53.266142 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1203 14:24:53.269431 USB0 port 0 child on link 0 USB2 port 0
1204 14:24:53.272877 USB2 port 0
1205 14:24:53.273511 USB2 port 1
1206 14:24:53.275894 USB2 port 2
1207 14:24:53.276540 USB2 port 3
1208 14:24:53.279278 USB2 port 4
1209 14:24:53.279892 USB2 port 5
1210 14:24:53.282861 USB2 port 6
1211 14:24:53.283438 USB2 port 7
1212 14:24:53.285608 USB3 port 0
1213 14:24:53.289088 USB3 port 1
1214 14:24:53.289654 USB3 port 2
1215 14:24:53.292470 USB3 port 3
1216 14:24:53.292895 PCI: 00:14.2
1217 14:24:53.295864 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 14:24:53.308582 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1219 14:24:53.308821 GENERIC: 0.0
1220 14:24:53.312119 PCI: 00:14.5
1221 14:24:53.321991 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1222 14:24:53.325242 PCI: 00:15.0 child on link 0 I2C: 00:2c
1223 14:24:53.335485 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1224 14:24:53.338803 I2C: 00:2c
1225 14:24:53.338901 I2C: 00:15
1226 14:24:53.342134 PCI: 00:15.1
1227 14:24:53.351716 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1228 14:24:53.354906 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1229 14:24:53.365382 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1230 14:24:53.368197 GENERIC: 0.0
1231 14:24:53.368327 I2C: 00:15
1232 14:24:53.371495 I2C: 00:10
1233 14:24:53.371606 I2C: 00:10
1234 14:24:53.375104 I2C: 00:2c
1235 14:24:53.375209 I2C: 00:40
1236 14:24:53.375315 I2C: 00:10
1237 14:24:53.378120 I2C: 00:39
1238 14:24:53.381567 PCI: 00:15.3 child on link 0 I2C: 00:36
1239 14:24:53.391460 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1240 14:24:53.394808 I2C: 00:36
1241 14:24:53.394926 I2C: 00:10
1242 14:24:53.398311 I2C: 00:0c
1243 14:24:53.398411 I2C: 00:50
1244 14:24:53.401812 PCI: 00:16.0
1245 14:24:53.411823 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1246 14:24:53.414510 PCI: 00:19.0 child on link 0 I2C: 00:1a
1247 14:24:53.424550 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1248 14:24:53.428029 I2C: 00:1a
1249 14:24:53.428152 I2C: 00:1a
1250 14:24:53.431428 I2C: 00:1a
1251 14:24:53.431571 I2C: 00:28
1252 14:24:53.434577 I2C: 00:29
1253 14:24:53.434699 PCI: 00:19.2
1254 14:24:53.444278 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 14:24:53.454281 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1256 14:24:53.457475 PCI: 00:1a.0
1257 14:24:53.467963 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1258 14:24:53.470974 PCI: 00:1e.0
1259 14:24:53.474434 PCI: 00:1e.2 child on link 0 SPI: 00
1260 14:24:53.483998 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1261 14:24:53.484116 SPI: 00
1262 14:24:53.490967 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 14:24:53.497331 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 14:24:53.500789 PNP: 0c09.0
1265 14:24:53.507199 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 14:24:53.510773 PCI: 00:1f.2
1267 14:24:53.520845 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 14:24:53.527398 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1269 14:24:53.533868 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1270 14:24:53.543536 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1271 14:24:53.553423 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1272 14:24:53.556714 GENERIC: 0.0
1273 14:24:53.556821 PCI: 00:1f.5
1274 14:24:53.566569 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1275 14:24:53.569908 Done allocating resources.
1276 14:24:53.577001 BS: BS_DEV_RESOURCES run times (exec / console): 20 / 2092 ms
1277 14:24:53.579770 Enabling resources...
1278 14:24:53.583660 PCI: 00:00.0 subsystem <- 8086/4e22
1279 14:24:53.586742 PCI: 00:00.0 cmd <- 06
1280 14:24:53.589656 PCI: 00:02.0 subsystem <- 8086/4e55
1281 14:24:53.589764 PCI: 00:02.0 cmd <- 03
1282 14:24:53.596774 PCI: 00:04.0 subsystem <- 8086/4e03
1283 14:24:53.596859 PCI: 00:04.0 cmd <- 02
1284 14:24:53.599678 PCI: 00:05.0 bridge ctrl <- 0003
1285 14:24:53.602951 PCI: 00:05.0 subsystem <- 8086/4e19
1286 14:24:53.606430 PCI: 00:05.0 cmd <- 02
1287 14:24:53.609796 PCI: 00:08.0 cmd <- 06
1288 14:24:53.613345 PCI: 00:14.0 subsystem <- 8086/4ded
1289 14:24:53.616239 PCI: 00:14.0 cmd <- 02
1290 14:24:53.619735 PCI: 00:14.3 subsystem <- 8086/4df0
1291 14:24:53.622966 PCI: 00:14.3 cmd <- 02
1292 14:24:53.626123 PCI: 00:14.5 subsystem <- 8086/4df8
1293 14:24:53.626247 PCI: 00:14.5 cmd <- 06
1294 14:24:53.633328 PCI: 00:15.0 subsystem <- 8086/4de8
1295 14:24:53.633500 PCI: 00:15.0 cmd <- 02
1296 14:24:53.636116 PCI: 00:15.1 subsystem <- 8086/4de9
1297 14:24:53.639946 PCI: 00:15.1 cmd <- 02
1298 14:24:53.642927 PCI: 00:15.2 subsystem <- 8086/4dea
1299 14:24:53.646297 PCI: 00:15.2 cmd <- 02
1300 14:24:53.649568 PCI: 00:15.3 subsystem <- 8086/4deb
1301 14:24:53.653015 PCI: 00:15.3 cmd <- 02
1302 14:24:53.656161 PCI: 00:16.0 subsystem <- 8086/4de0
1303 14:24:53.659406 PCI: 00:16.0 cmd <- 02
1304 14:24:53.662580 PCI: 00:19.0 subsystem <- 8086/4dc5
1305 14:24:53.666277 PCI: 00:19.0 cmd <- 02
1306 14:24:53.669574 PCI: 00:19.2 subsystem <- 8086/4dc7
1307 14:24:53.669700 PCI: 00:19.2 cmd <- 06
1308 14:24:53.672834 PCI: 00:1a.0 subsystem <- 8086/4dc4
1309 14:24:53.676012 PCI: 00:1a.0 cmd <- 06
1310 14:24:53.679305 PCI: 00:1e.2 subsystem <- 8086/4daa
1311 14:24:53.682518 PCI: 00:1e.2 cmd <- 06
1312 14:24:53.685843 PCI: 00:1f.0 subsystem <- 8086/4d87
1313 14:24:53.689542 PCI: 00:1f.0 cmd <- 407
1314 14:24:53.692864 PCI: 00:1f.3 subsystem <- 8086/4dc8
1315 14:24:53.695843 PCI: 00:1f.3 cmd <- 02
1316 14:24:53.699347 PCI: 00:1f.5 subsystem <- 8086/4da4
1317 14:24:53.702292 PCI: 00:1f.5 cmd <- 406
1318 14:24:53.705705 done.
1319 14:24:53.709552 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1320 14:24:53.712442 Initializing devices...
1321 14:24:53.715861 Root Device init
1322 14:24:53.715984 mainboard: EC init
1323 14:24:53.722693 Chrome EC: Set SMI mask to 0x0000000000000000
1324 14:24:53.729137 Chrome EC: clear events_b mask to 0x0000000000000000
1325 14:24:53.732047 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1326 14:24:53.739109 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1327 14:24:53.745947 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1328 14:24:53.749749 Chrome EC: Set WAKE mask to 0x0000000000000000
1329 14:24:53.757024 Root Device init finished in 37 msecs
1330 14:24:53.760309 PCI: 00:00.0 init
1331 14:24:53.760426 CPU TDP = 6 Watts
1332 14:24:53.763761 CPU PL1 = 7 Watts
1333 14:24:53.766950 CPU PL2 = 12 Watts
1334 14:24:53.770343 PCI: 00:00.0 init finished in 6 msecs
1335 14:24:53.770450 PCI: 00:02.0 init
1336 14:24:53.773576 GMA: Found VBT in CBFS
1337 14:24:53.776938 GMA: Found valid VBT in CBFS
1338 14:24:53.783423 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1339 14:24:53.790363 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1340 14:24:53.793730 PCI: 00:02.0 init finished in 18 msecs
1341 14:24:53.796984 PCI: 00:08.0 init
1342 14:24:53.799879 PCI: 00:08.0 init finished in 0 msecs
1343 14:24:53.803409 PCI: 00:14.0 init
1344 14:24:53.806898 XHCI: Updated LFPS sampling OFF time to 9 ms
1345 14:24:53.810338 PCI: 00:14.0 init finished in 4 msecs
1346 14:24:53.813602 PCI: 00:15.0 init
1347 14:24:53.817137 I2C bus 0 version 0x3230302a
1348 14:24:53.820009 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1349 14:24:53.823520 PCI: 00:15.0 init finished in 6 msecs
1350 14:24:53.826904 PCI: 00:15.1 init
1351 14:24:53.829871 I2C bus 1 version 0x3230302a
1352 14:24:53.833348 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1353 14:24:53.836825 PCI: 00:15.1 init finished in 6 msecs
1354 14:24:53.836929 PCI: 00:15.2 init
1355 14:24:53.839816 I2C bus 2 version 0x3230302a
1356 14:24:53.843289 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1357 14:24:53.850205 PCI: 00:15.2 init finished in 6 msecs
1358 14:24:53.850338 PCI: 00:15.3 init
1359 14:24:53.853266 I2C bus 3 version 0x3230302a
1360 14:24:53.856732 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1361 14:24:53.860194 PCI: 00:15.3 init finished in 6 msecs
1362 14:24:53.863140 PCI: 00:16.0 init
1363 14:24:53.866376 PCI: 00:16.0 init finished in 0 msecs
1364 14:24:53.869848 PCI: 00:19.0 init
1365 14:24:53.873201 I2C bus 4 version 0x3230302a
1366 14:24:53.876550 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1367 14:24:53.879913 PCI: 00:19.0 init finished in 6 msecs
1368 14:24:53.883191 PCI: 00:1a.0 init
1369 14:24:53.886406 PCI: 00:1a.0 init finished in 0 msecs
1370 14:24:53.889776 PCI: 00:1f.0 init
1371 14:24:53.893490 IOAPIC: Initializing IOAPIC at 0xfec00000
1372 14:24:53.897138 IOAPIC: Bootstrap Processor Local APIC = 0x00
1373 14:24:53.899966 IOAPIC: ID = 0x02
1374 14:24:53.902838 IOAPIC: Dumping registers
1375 14:24:53.902940 reg 0x0000: 0x02000000
1376 14:24:53.906312 reg 0x0001: 0x00770020
1377 14:24:53.909797 reg 0x0002: 0x00000000
1378 14:24:53.913092 PCI: 00:1f.0 init finished in 21 msecs
1379 14:24:53.916505 PCI: 00:1f.2 init
1380 14:24:53.916594 Disabling ACPI via APMC.
1381 14:24:53.922735 APMC done.
1382 14:24:53.926120 PCI: 00:1f.2 init finished in 6 msecs
1383 14:24:53.937554 PNP: 0c09.0 init
1384 14:24:53.940943 Google Chrome EC uptime: 6.492 seconds
1385 14:24:53.947345 Google Chrome AP resets since EC boot: 0
1386 14:24:53.950668 Google Chrome most recent AP reset causes:
1387 14:24:53.957065 Google Chrome EC reset flags at last EC boot: reset-pin
1388 14:24:53.960643 PNP: 0c09.0 init finished in 18 msecs
1389 14:24:53.960751 Devices initialized
1390 14:24:53.963543 Show all devs... After init.
1391 14:24:53.966847 Root Device: enabled 1
1392 14:24:53.970476 CPU_CLUSTER: 0: enabled 1
1393 14:24:53.973720 DOMAIN: 0000: enabled 1
1394 14:24:53.973828 PCI: 00:00.0: enabled 1
1395 14:24:53.976894 PCI: 00:02.0: enabled 1
1396 14:24:53.980017 PCI: 00:04.0: enabled 1
1397 14:24:53.980168 PCI: 00:05.0: enabled 1
1398 14:24:53.983782 PCI: 00:09.0: enabled 0
1399 14:24:53.986809 PCI: 00:12.6: enabled 0
1400 14:24:53.990281 PCI: 00:14.0: enabled 1
1401 14:24:53.990386 PCI: 00:14.1: enabled 0
1402 14:24:53.993560 PCI: 00:14.2: enabled 0
1403 14:24:53.996904 PCI: 00:14.3: enabled 1
1404 14:24:54.000093 PCI: 00:14.5: enabled 1
1405 14:24:54.000237 PCI: 00:15.0: enabled 1
1406 14:24:54.003485 PCI: 00:15.1: enabled 1
1407 14:24:54.006838 PCI: 00:15.2: enabled 1
1408 14:24:54.009926 PCI: 00:15.3: enabled 1
1409 14:24:54.010049 PCI: 00:16.0: enabled 1
1410 14:24:54.013573 PCI: 00:16.1: enabled 0
1411 14:24:54.016737 PCI: 00:16.4: enabled 0
1412 14:24:54.016835 PCI: 00:16.5: enabled 0
1413 14:24:54.020081 PCI: 00:17.0: enabled 0
1414 14:24:54.023384 PCI: 00:19.0: enabled 1
1415 14:24:54.026725 PCI: 00:19.1: enabled 0
1416 14:24:54.026943 PCI: 00:19.2: enabled 1
1417 14:24:54.030137 PCI: 00:1a.0: enabled 1
1418 14:24:54.033228 PCI: 00:1c.0: enabled 0
1419 14:24:54.036794 PCI: 00:1c.1: enabled 0
1420 14:24:54.036895 PCI: 00:1c.2: enabled 0
1421 14:24:54.039707 PCI: 00:1c.3: enabled 0
1422 14:24:54.043272 PCI: 00:1c.4: enabled 0
1423 14:24:54.046142 PCI: 00:1c.5: enabled 0
1424 14:24:54.046250 PCI: 00:1c.6: enabled 0
1425 14:24:54.049696 PCI: 00:1c.7: enabled 1
1426 14:24:54.053195 PCI: 00:1e.0: enabled 0
1427 14:24:54.053279 PCI: 00:1e.1: enabled 0
1428 14:24:54.056564 PCI: 00:1e.2: enabled 1
1429 14:24:54.059447 PCI: 00:1e.3: enabled 0
1430 14:24:54.062986 PCI: 00:1f.0: enabled 1
1431 14:24:54.063088 PCI: 00:1f.1: enabled 0
1432 14:24:54.066596 PCI: 00:1f.2: enabled 1
1433 14:24:54.069756 PCI: 00:1f.3: enabled 1
1434 14:24:54.072976 PCI: 00:1f.4: enabled 0
1435 14:24:54.073084 PCI: 00:1f.5: enabled 1
1436 14:24:54.076254 PCI: 00:1f.7: enabled 0
1437 14:24:54.079635 GENERIC: 0.0: enabled 1
1438 14:24:54.079743 GENERIC: 0.0: enabled 1
1439 14:24:54.082821 USB0 port 0: enabled 1
1440 14:24:54.085972 GENERIC: 0.0: enabled 1
1441 14:24:54.089213 I2C: 00:2c: enabled 1
1442 14:24:54.089292 I2C: 00:15: enabled 1
1443 14:24:54.092894 GENERIC: 0.0: enabled 0
1444 14:24:54.095929 I2C: 00:15: enabled 1
1445 14:24:54.096022 I2C: 00:10: enabled 0
1446 14:24:54.099245 I2C: 00:10: enabled 0
1447 14:24:54.103042 I2C: 00:2c: enabled 1
1448 14:24:54.103149 I2C: 00:40: enabled 1
1449 14:24:54.106273 I2C: 00:10: enabled 1
1450 14:24:54.109385 I2C: 00:39: enabled 1
1451 14:24:54.109484 I2C: 00:36: enabled 1
1452 14:24:54.112610 I2C: 00:10: enabled 0
1453 14:24:54.115949 I2C: 00:0c: enabled 1
1454 14:24:54.116048 I2C: 00:50: enabled 1
1455 14:24:54.119463 I2C: 00:1a: enabled 1
1456 14:24:54.122428 I2C: 00:1a: enabled 0
1457 14:24:54.122524 I2C: 00:1a: enabled 0
1458 14:24:54.125886 I2C: 00:28: enabled 1
1459 14:24:54.129116 I2C: 00:29: enabled 1
1460 14:24:54.132361 PCI: 00:00.0: enabled 1
1461 14:24:54.132473 SPI: 00: enabled 1
1462 14:24:54.136068 PNP: 0c09.0: enabled 1
1463 14:24:54.138754 GENERIC: 0.0: enabled 0
1464 14:24:54.138842 USB2 port 0: enabled 1
1465 14:24:54.142353 USB2 port 1: enabled 1
1466 14:24:54.145944 USB2 port 2: enabled 1
1467 14:24:54.146043 USB2 port 3: enabled 1
1468 14:24:54.148776 USB2 port 4: enabled 0
1469 14:24:54.152275 USB2 port 5: enabled 1
1470 14:24:54.155738 USB2 port 6: enabled 0
1471 14:24:54.155836 USB2 port 7: enabled 1
1472 14:24:54.158578 USB3 port 0: enabled 1
1473 14:24:54.162243 USB3 port 1: enabled 1
1474 14:24:54.162328 USB3 port 2: enabled 1
1475 14:24:54.165845 USB3 port 3: enabled 1
1476 14:24:54.168651 APIC: 00: enabled 1
1477 14:24:54.168734 APIC: 02: enabled 1
1478 14:24:54.172089 PCI: 00:08.0: enabled 1
1479 14:24:54.178460 BS: BS_DEV_INIT run times (exec / console): 26 / 436 ms
1480 14:24:54.181919 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1481 14:24:54.185483 ELOG: NV offset 0xbfa000 size 0x1000
1482 14:24:54.192943 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1483 14:24:54.199644 ELOG: Event(17) added with size 13 at 2023-05-19 14:24:54 UTC
1484 14:24:54.206157 ELOG: Event(92) added with size 9 at 2023-05-19 14:24:54 UTC
1485 14:24:54.212459 ELOG: Event(93) added with size 9 at 2023-05-19 14:24:54 UTC
1486 14:24:54.219290 ELOG: Event(9E) added with size 10 at 2023-05-19 14:24:54 UTC
1487 14:24:54.225820 ELOG: Event(9F) added with size 14 at 2023-05-19 14:24:54 UTC
1488 14:24:54.232531 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1489 14:24:54.235912 ELOG: Event(A1) added with size 10 at 2023-05-19 14:24:54 UTC
1490 14:24:54.246181 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1491 14:24:54.252401 ELOG: Event(A0) added with size 9 at 2023-05-19 14:24:54 UTC
1492 14:24:54.256059 elog_add_boot_reason: Logged dev mode boot
1493 14:24:54.262327 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1494 14:24:54.262635 Finalize devices...
1495 14:24:54.265897 Devices finalized
1496 14:24:54.272423 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1497 14:24:54.275886 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1498 14:24:54.282180 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1499 14:24:54.285742 ME: HFSTS1 : 0x80030045
1500 14:24:54.289176 ME: HFSTS2 : 0x30280136
1501 14:24:54.295756 ME: HFSTS3 : 0x00000050
1502 14:24:54.298598 ME: HFSTS4 : 0x00004000
1503 14:24:54.302273 ME: HFSTS5 : 0x00000000
1504 14:24:54.305512 ME: HFSTS6 : 0x40400006
1505 14:24:54.308649 ME: Manufacturing Mode : NO
1506 14:24:54.311919 ME: FW Partition Table : OK
1507 14:24:54.315283 ME: Bringup Loader Failure : NO
1508 14:24:54.318537 ME: Firmware Init Complete : NO
1509 14:24:54.321625 ME: Boot Options Present : NO
1510 14:24:54.325310 ME: Update In Progress : NO
1511 14:24:54.328464 ME: D0i3 Support : YES
1512 14:24:54.331574 ME: Low Power State Enabled : NO
1513 14:24:54.334699 ME: CPU Replaced : YES
1514 14:24:54.338610 ME: CPU Replacement Valid : YES
1515 14:24:54.341584 ME: Current Working State : 5
1516 14:24:54.344895 ME: Current Operation State : 1
1517 14:24:54.347775 ME: Current Operation Mode : 3
1518 14:24:54.351201 ME: Error Code : 0
1519 14:24:54.354772 ME: CPU Debug Disabled : YES
1520 14:24:54.358265 ME: TXT Support : NO
1521 14:24:54.364823 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1522 14:24:54.371556 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1523 14:24:54.374494 ACPI: Writing ACPI tables at 76b27000.
1524 14:24:54.374724 ACPI: * FACS
1525 14:24:54.378095 ACPI: * DSDT
1526 14:24:54.381549 Ramoops buffer: 0x100000@0x76a26000.
1527 14:24:54.388023 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1528 14:24:54.391085 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1529 14:24:54.394548 Google Chrome EC: version:
1530 14:24:54.398121 ro: magolor_1.1.9999-103b6f9
1531 14:24:54.401318 rw: magolor_1.1.9999-103b6f9
1532 14:24:54.401650 running image: 1
1533 14:24:54.407738 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1534 14:24:54.412277 ACPI: * FADT
1535 14:24:54.412632 SCI is IRQ9
1536 14:24:54.418290 ACPI: added table 1/32, length now 40
1537 14:24:54.418529 ACPI: * SSDT
1538 14:24:54.422010 Found 1 CPU(s) with 2 core(s) each.
1539 14:24:54.425327 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1540 14:24:54.431721 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1541 14:24:54.434990 Could not locate 'wifi_sar' in VPD.
1542 14:24:54.438269 Checking CBFS for default SAR values
1543 14:24:54.444725 wifi_sar_defaults.hex has bad len in CBFS
1544 14:24:54.447890 failed from getting SAR limits!
1545 14:24:54.451219 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1546 14:24:54.458180 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1547 14:24:54.461526 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1548 14:24:54.468029 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1549 14:24:54.471336 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1550 14:24:54.477770 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1551 14:24:54.481307 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1552 14:24:54.487952 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1553 14:24:54.494497 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1554 14:24:54.501246 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1555 14:24:54.504393 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1556 14:24:54.510748 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1557 14:24:54.517449 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1558 14:24:54.521113 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1559 14:24:54.524480 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1560 14:24:54.532007 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1561 14:24:54.535540 PS2K: Passing 101 keymaps to kernel
1562 14:24:54.542058 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1563 14:24:54.548812 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1564 14:24:54.551756 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1565 14:24:54.558443 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1566 14:24:54.562130 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1567 14:24:54.568281 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1568 14:24:54.575217 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1569 14:24:54.578132 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1570 14:24:54.585181 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1571 14:24:54.591679 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1572 14:24:54.595247 ACPI: added table 2/32, length now 44
1573 14:24:54.598676 ACPI: * MCFG
1574 14:24:54.601546 ACPI: added table 3/32, length now 48
1575 14:24:54.601633 ACPI: * TPM2
1576 14:24:54.605033 TPM2 log created at 0x76a16000
1577 14:24:54.608369 ACPI: added table 4/32, length now 52
1578 14:24:54.611510 ACPI: * MADT
1579 14:24:54.611609 SCI is IRQ9
1580 14:24:54.614986 ACPI: added table 5/32, length now 56
1581 14:24:54.618355 current = 76b2d580
1582 14:24:54.618469 ACPI: * DMAR
1583 14:24:54.624588 ACPI: added table 6/32, length now 60
1584 14:24:54.628264 ACPI: added table 7/32, length now 64
1585 14:24:54.628394 ACPI: * HPET
1586 14:24:54.631677 ACPI: added table 8/32, length now 68
1587 14:24:54.634901 ACPI: done.
1588 14:24:54.638180 ACPI tables: 26304 bytes.
1589 14:24:54.638274 smbios_write_tables: 76a15000
1590 14:24:54.642372 EC returned error result code 3
1591 14:24:54.645576 Couldn't obtain OEM name from CBI
1592 14:24:54.649381 Create SMBIOS type 16
1593 14:24:54.652701 Create SMBIOS type 17
1594 14:24:54.656079 GENERIC: 0.0 (WIFI Device)
1595 14:24:54.656165 SMBIOS tables: 913 bytes.
1596 14:24:54.662534 Writing table forward entry at 0x00000500
1597 14:24:54.669374 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1598 14:24:54.672848 Writing coreboot table at 0x76b4b000
1599 14:24:54.679181 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1600 14:24:54.682319 1. 0000000000001000-000000000009ffff: RAM
1601 14:24:54.685886 2. 00000000000a0000-00000000000fffff: RESERVED
1602 14:24:54.692244 3. 0000000000100000-0000000076a14fff: RAM
1603 14:24:54.695908 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1604 14:24:54.702382 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1605 14:24:54.708778 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1606 14:24:54.712241 7. 0000000077000000-000000007fbfffff: RESERVED
1607 14:24:54.715636 8. 00000000c0000000-00000000cfffffff: RESERVED
1608 14:24:54.721977 9. 00000000fb000000-00000000fb000fff: RESERVED
1609 14:24:54.725199 10. 00000000fe000000-00000000fe00ffff: RESERVED
1610 14:24:54.731819 11. 00000000fea80000-00000000fea87fff: RESERVED
1611 14:24:54.735642 12. 00000000fed80000-00000000fed87fff: RESERVED
1612 14:24:54.742311 13. 00000000fed90000-00000000fed92fff: RESERVED
1613 14:24:54.745588 14. 00000000feda0000-00000000feda1fff: RESERVED
1614 14:24:54.748913 15. 0000000100000000-00000001803fffff: RAM
1615 14:24:54.752192 Passing 4 GPIOs to payload:
1616 14:24:54.758501 NAME | PORT | POLARITY | VALUE
1617 14:24:54.761720 lid | undefined | high | high
1618 14:24:54.768783 power | undefined | high | low
1619 14:24:54.771840 oprom | undefined | high | low
1620 14:24:54.778281 EC in RW | 0x000000b9 | high | low
1621 14:24:54.785013 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 3f69
1622 14:24:54.788526 coreboot table: 1504 bytes.
1623 14:24:54.791968 IMD ROOT 0. 0x76fff000 0x00001000
1624 14:24:54.794787 IMD SMALL 1. 0x76ffe000 0x00001000
1625 14:24:54.798545 FSP MEMORY 2. 0x76c4e000 0x003b0000
1626 14:24:54.801442 CONSOLE 3. 0x76c2e000 0x00020000
1627 14:24:54.804946 FMAP 4. 0x76c2d000 0x00000578
1628 14:24:54.811307 TIME STAMP 5. 0x76c2c000 0x00000910
1629 14:24:54.814741 VBOOT WORK 6. 0x76c18000 0x00014000
1630 14:24:54.818243 ROMSTG STCK 7. 0x76c17000 0x00001000
1631 14:24:54.821100 AFTER CAR 8. 0x76c0d000 0x0000a000
1632 14:24:54.824519 RAMSTAGE 9. 0x76ba7000 0x00066000
1633 14:24:54.827945 REFCODE 10. 0x76b67000 0x00040000
1634 14:24:54.831317 SMM BACKUP 11. 0x76b57000 0x00010000
1635 14:24:54.834548 4f444749 12. 0x76b55000 0x00002000
1636 14:24:54.837729 EXT VBT13. 0x76b53000 0x00001c43
1637 14:24:54.844726 COREBOOT 14. 0x76b4b000 0x00008000
1638 14:24:54.847959 ACPI 15. 0x76b27000 0x00024000
1639 14:24:54.851342 ACPI GNVS 16. 0x76b26000 0x00001000
1640 14:24:54.854482 RAMOOPS 17. 0x76a26000 0x00100000
1641 14:24:54.857797 TPM2 TCGLOG18. 0x76a16000 0x00010000
1642 14:24:54.861049 SMBIOS 19. 0x76a15000 0x00000800
1643 14:24:54.864493 IMD small region:
1644 14:24:54.867765 IMD ROOT 0. 0x76ffec00 0x00000400
1645 14:24:54.870937 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1646 14:24:54.874235 VPD 2. 0x76ffeb80 0x0000004c
1647 14:24:54.877305 POWER STATE 3. 0x76ffeb40 0x00000040
1648 14:24:54.884272 ROMSTAGE 4. 0x76ffeb20 0x00000004
1649 14:24:54.887683 MEM INFO 5. 0x76ffe940 0x000001e0
1650 14:24:54.893895 BS: BS_WRITE_TABLES run times (exec / console): 6 / 516 ms
1651 14:24:54.893983 MTRR: Physical address space:
1652 14:24:54.901090 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1653 14:24:54.907887 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1654 14:24:54.913658 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1655 14:24:54.920730 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1656 14:24:54.926859 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1657 14:24:54.933701 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1658 14:24:54.940200 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1659 14:24:54.943380 MTRR: Fixed MSR 0x250 0x0606060606060606
1660 14:24:54.946933 MTRR: Fixed MSR 0x258 0x0606060606060606
1661 14:24:54.950298 MTRR: Fixed MSR 0x259 0x0000000000000000
1662 14:24:54.954021 MTRR: Fixed MSR 0x268 0x0606060606060606
1663 14:24:54.960204 MTRR: Fixed MSR 0x269 0x0606060606060606
1664 14:24:54.963539 MTRR: Fixed MSR 0x26a 0x0606060606060606
1665 14:24:54.966986 MTRR: Fixed MSR 0x26b 0x0606060606060606
1666 14:24:54.970863 MTRR: Fixed MSR 0x26c 0x0606060606060606
1667 14:24:54.976675 MTRR: Fixed MSR 0x26d 0x0606060606060606
1668 14:24:54.980482 MTRR: Fixed MSR 0x26e 0x0606060606060606
1669 14:24:54.992143 MTRR: Fixed MSR 0x26f 0x0606060606060606
1670 14:24:54.992483 call enable_fixed_mtrr()
1671 14:24:54.992562 CPU physical address size: 39 bits
1672 14:24:54.993480 MTRR: default type WB/UC MTRR counts: 6/5.
1673 14:24:54.996396 MTRR: UC selected as default type.
1674 14:24:55.003475 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1675 14:24:55.009974 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1676 14:24:55.016363 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1677 14:24:55.023000 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1678 14:24:55.029596 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1679 14:24:55.029721
1680 14:24:55.029826 MTRR check
1681 14:24:55.033135 Fixed MTRRs : Enabled
1682 14:24:55.036749 Variable MTRRs: Enabled
1683 14:24:55.036930
1684 14:24:55.039645 MTRR: Fixed MSR 0x250 0x0606060606060606
1685 14:24:55.043090 MTRR: Fixed MSR 0x258 0x0606060606060606
1686 14:24:55.049824 MTRR: Fixed MSR 0x259 0x0000000000000000
1687 14:24:55.053050 MTRR: Fixed MSR 0x268 0x0606060606060606
1688 14:24:55.056491 MTRR: Fixed MSR 0x269 0x0606060606060606
1689 14:24:55.060138 MTRR: Fixed MSR 0x26a 0x0606060606060606
1690 14:24:55.066658 MTRR: Fixed MSR 0x26b 0x0606060606060606
1691 14:24:55.069525 MTRR: Fixed MSR 0x26c 0x0606060606060606
1692 14:24:55.072897 MTRR: Fixed MSR 0x26d 0x0606060606060606
1693 14:24:55.076279 MTRR: Fixed MSR 0x26e 0x0606060606060606
1694 14:24:55.079790 MTRR: Fixed MSR 0x26f 0x0606060606060606
1695 14:24:55.086495 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1696 14:24:55.089467 call enable_fixed_mtrr()
1697 14:24:55.093117 Checking cr50 for pending updates
1698 14:24:55.096868 CPU physical address size: 39 bits
1699 14:24:55.100401 Reading cr50 TPM mode
1700 14:24:55.109873 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1701 14:24:55.117673 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1702 14:24:55.121248 Checking segment from ROM address 0xfff9d5b8
1703 14:24:55.127682 Checking segment from ROM address 0xfff9d5d4
1704 14:24:55.130705 Loading segment from ROM address 0xfff9d5b8
1705 14:24:55.134200 code (compression=0)
1706 14:24:55.140775 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1707 14:24:55.150627 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1708 14:24:55.153847 it's not compressed!
1709 14:24:55.279245 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1710 14:24:55.285715 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1711 14:24:55.292695 Loading segment from ROM address 0xfff9d5d4
1712 14:24:55.296072 Entry Point 0x30000000
1713 14:24:55.296160 Loaded segments
1714 14:24:55.303080 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1715 14:24:55.318838 Finalizing chipset.
1716 14:24:55.322423 Finalizing SMM.
1717 14:24:55.322518 APMC done.
1718 14:24:55.328975 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1719 14:24:55.332301 mp_park_aps done after 0 msecs.
1720 14:24:55.335902 Jumping to boot code at 0x30000000(0x76b4b000)
1721 14:24:55.345204 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1722 14:24:55.345300
1723 14:24:55.345374
1724 14:24:55.345441
1725 14:24:55.348684 Starting depthcharge on Magolor...
1726 14:24:55.348777
1727 14:24:55.349124 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 14:24:55.349239 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1729 14:24:55.349333 Setting prompt string to ['dedede:']
1730 14:24:55.349420 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1731 14:24:55.358952 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1732 14:24:55.359066
1733 14:24:55.365430 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1734 14:24:55.365572
1735 14:24:55.368615 fw_config match found: AUDIO_AMP=UNPROVISIONED
1736 14:24:55.368752
1737 14:24:55.371957 Wipe memory regions:
1738 14:24:55.372094
1739 14:24:55.375391 [0x00000000001000, 0x000000000a0000)
1740 14:24:55.375528
1741 14:24:55.378517 [0x00000000100000, 0x00000030000000)
1742 14:24:55.507929
1743 14:24:55.510960 [0x00000031062170, 0x00000076a15000)
1744 14:24:55.680237
1745 14:24:55.683622 [0x00000100000000, 0x00000180400000)
1746 14:24:56.747211
1747 14:24:56.747381 R8152: Initializing
1748 14:24:56.747478
1749 14:24:56.750791 Version 6 (ocp_data = 5c30)
1750 14:24:56.753693
1751 14:24:56.753785 R8152: Done initializing
1752 14:24:56.753850
1753 14:24:56.757256 Adding net device
1754 14:24:56.757330
1755 14:24:56.760144 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1756 14:24:56.763758
1757 14:24:56.763834
1758 14:24:56.763964
1759 14:24:56.764281 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 14:24:56.864663 dedede: tftpboot 192.168.201.1 10389497/tftp-deploy-b1ny4l2_/kernel/bzImage 10389497/tftp-deploy-b1ny4l2_/kernel/cmdline 10389497/tftp-deploy-b1ny4l2_/ramdisk/ramdisk.cpio.gz
1762 14:24:56.864837 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1763 14:24:56.864946 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1764 14:24:56.869144 tftpboot 192.168.201.1 10389497/tftp-deploy-b1ny4l2_/kernel/bzImloy-b1ny4l2_/kernel/cmdline 10389497/tftp-deploy-b1ny4l2_/ramdisk/ramdisk.cpio.gz
1765 14:24:56.869252
1766 14:24:56.869351 Waiting for link
1767 14:24:57.071315
1768 14:24:57.071493 done.
1769 14:24:57.071565
1770 14:24:57.071627 MAC: 00:24:32:30:79:17
1771 14:24:57.071700
1772 14:24:57.074304 Sending DHCP discover... done.
1773 14:24:57.074406
1774 14:24:57.077692 Waiting for reply... done.
1775 14:24:57.077792
1776 14:24:57.081298 Sending DHCP request... done.
1777 14:24:57.081398
1778 14:24:57.282396 Waiting for reply... done.
1779 14:24:57.282595
1780 14:24:57.282711 My ip is 192.168.201.10
1781 14:24:57.282814
1782 14:24:57.285725 The DHCP server ip is 192.168.201.1
1783 14:24:57.288662
1784 14:24:57.292169 TFTP server IP predefined by user: 192.168.201.1
1785 14:24:57.292279
1786 14:24:57.298782 Bootfile predefined by user: 10389497/tftp-deploy-b1ny4l2_/kernel/bzImage
1787 14:24:57.298910
1788 14:24:57.302262 Sending tftp read request... done.
1789 14:24:57.302401
1790 14:24:57.305509 Waiting for the transfer...
1791 14:24:57.309089
1792 14:24:57.852030 00000000 ################################################################
1793 14:24:57.852219
1794 14:24:58.387412 00080000 ################################################################
1795 14:24:58.387582
1796 14:24:58.933986 00100000 ################################################################
1797 14:24:58.934133
1798 14:24:59.463654 00180000 ################################################################
1799 14:24:59.463806
1800 14:25:00.006958 00200000 ################################################################
1801 14:25:00.007111
1802 14:25:00.548596 00280000 ################################################################
1803 14:25:00.548761
1804 14:25:01.095299 00300000 ################################################################
1805 14:25:01.095467
1806 14:25:01.639680 00380000 ################################################################
1807 14:25:01.639833
1808 14:25:02.193462 00400000 ################################################################
1809 14:25:02.193612
1810 14:25:02.746626 00480000 ################################################################
1811 14:25:02.746809
1812 14:25:03.285457 00500000 ################################################################
1813 14:25:03.285607
1814 14:25:03.824932 00580000 ################################################################
1815 14:25:03.825104
1816 14:25:04.368289 00600000 ################################################################
1817 14:25:04.368499
1818 14:25:04.903343 00680000 ################################################################
1819 14:25:04.903503
1820 14:25:05.430727 00700000 ################################################################
1821 14:25:05.430876
1822 14:25:05.963090 00780000 ################################################################
1823 14:25:05.963246
1824 14:25:06.493065 00800000 ################################################################
1825 14:25:06.493196
1826 14:25:07.034258 00880000 ################################################################
1827 14:25:07.034396
1828 14:25:07.568586 00900000 ################################################################
1829 14:25:07.568749
1830 14:25:08.107235 00980000 ################################################################
1831 14:25:08.107440
1832 14:25:08.498928 00a00000 ############################################## done.
1833 14:25:08.499060
1834 14:25:08.501862 The bootfile was 10858496 bytes long.
1835 14:25:08.501962
1836 14:25:08.505419 Sending tftp read request... done.
1837 14:25:08.505498
1838 14:25:08.508768 Waiting for the transfer...
1839 14:25:08.508844
1840 14:25:09.043721 00000000 ################################################################
1841 14:25:09.043855
1842 14:25:09.581984 00080000 ################################################################
1843 14:25:09.582170
1844 14:25:10.127415 00100000 ################################################################
1845 14:25:10.127571
1846 14:25:10.670391 00180000 ################################################################
1847 14:25:10.670586
1848 14:25:11.213893 00200000 ################################################################
1849 14:25:11.214071
1850 14:25:11.741805 00280000 ################################################################
1851 14:25:11.741958
1852 14:25:12.275188 00300000 ################################################################
1853 14:25:12.275367
1854 14:25:12.809227 00380000 ################################################################
1855 14:25:12.809391
1856 14:25:13.347384 00400000 ################################################################
1857 14:25:13.347533
1858 14:25:13.877749 00480000 ################################################################
1859 14:25:13.877932
1860 14:25:14.411884 00500000 ################################################################
1861 14:25:14.412067
1862 14:25:14.947601 00580000 ################################################################
1863 14:25:14.947767
1864 14:25:15.484634 00600000 ################################################################
1865 14:25:15.484779
1866 14:25:16.033793 00680000 ################################################################
1867 14:25:16.033941
1868 14:25:16.586840 00700000 ################################################################
1869 14:25:16.587024
1870 14:25:17.150813 00780000 ################################################################
1871 14:25:17.150947
1872 14:25:17.794032 00800000 ################################################################
1873 14:25:17.794725
1874 14:25:18.147863 00880000 ##################################### done.
1875 14:25:18.148009
1876 14:25:18.150863 Sending tftp read request... done.
1877 14:25:18.150936
1878 14:25:18.154424 Waiting for the transfer...
1879 14:25:18.154505
1880 14:25:18.154569 00000000 # done.
1881 14:25:18.154629
1882 14:25:18.164020 Command line loaded dynamically from TFTP file: 10389497/tftp-deploy-b1ny4l2_/kernel/cmdline
1883 14:25:18.164103
1884 14:25:18.177377 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1885 14:25:18.177470
1886 14:25:18.180825 ec_init: CrosEC protocol v3 supported (256, 256)
1887 14:25:18.189032
1888 14:25:18.192009 Shutting down all USB controllers.
1889 14:25:18.192110
1890 14:25:18.192208 Removing current net device
1891 14:25:18.192304
1892 14:25:18.195475 Finalizing coreboot
1893 14:25:18.195603
1894 14:25:18.202027 Exiting depthcharge with code 4 at timestamp: 29647373
1895 14:25:18.202118
1896 14:25:18.202184
1897 14:25:18.202245 Starting kernel ...
1898 14:25:18.202305
1899 14:25:18.202361
1900 14:25:18.202734 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
1901 14:25:18.202830 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
1902 14:25:18.202903 Setting prompt string to ['Linux version [0-9]']
1903 14:25:18.202970 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1904 14:25:18.203036 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1906 14:29:42.203110 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
1908 14:29:42.203362 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
1910 14:29:42.203530 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1913 14:29:42.203778 end: 2 depthcharge-action (duration 00:05:00) [common]
1915 14:29:42.203993 Cleaning after the job
1916 14:29:42.204080 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389497/tftp-deploy-b1ny4l2_/ramdisk
1917 14:29:42.205289 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389497/tftp-deploy-b1ny4l2_/kernel
1918 14:29:42.206664 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389497/tftp-deploy-b1ny4l2_/modules
1919 14:29:42.207264 start: 5.1 power-off (timeout 00:00:30) [common]
1920 14:29:42.207427 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=off'
1921 14:29:42.282505 >> Command sent successfully.
1922 14:29:42.284892 Returned 0 in 0 seconds
1923 14:29:42.385312 end: 5.1 power-off (duration 00:00:00) [common]
1925 14:29:42.385669 start: 5.2 read-feedback (timeout 00:10:00) [common]
1926 14:29:42.385973 Listened to connection for namespace 'common' for up to 1s
1928 14:29:42.386349 Listened to connection for namespace 'common' for up to 1s
1929 14:29:43.387027 Finalising connection for namespace 'common'
1930 14:29:43.387623 Disconnecting from shell: Finalise
1931 14:29:43.388083
1932 14:29:43.489146 end: 5.2 read-feedback (duration 00:00:01) [common]
1933 14:29:43.489689 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10389497
1934 14:29:43.537504 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10389497
1935 14:29:43.537735 JobError: Your job cannot terminate cleanly.