Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 14:02:08.052523 lava-dispatcher, installed at version: 2023.03
2 14:02:08.052746 start: 0 validate
3 14:02:08.052881 Start time: 2023-05-19 14:02:08.052874+00:00 (UTC)
4 14:02:08.053009 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:02:08.053137 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230512.0%2Fx86%2Frootfs.cpio.gz exists
6 14:02:08.350691 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:02:08.350912 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.283-cip98%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:02:08.642997 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:02:08.643749 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.283-cip98%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:02:09.276337 validate duration: 1.22
12 14:02:09.276926 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:02:09.277145 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:02:09.277337 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:02:09.616713 Not decompressing ramdisk as can be used compressed.
16 14:02:09.617040 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230512.0/x86/rootfs.cpio.gz
17 14:02:09.617242 saving as /var/lib/lava/dispatcher/tmp/10389521/tftp-deploy-raf2ulbk/ramdisk/rootfs.cpio.gz
18 14:02:09.617378 total size: 8430071 (8MB)
19 14:02:09.619635 progress 0% (0MB)
20 14:02:09.623378 progress 5% (0MB)
21 14:02:09.626178 progress 10% (0MB)
22 14:02:09.650691 progress 15% (1MB)
23 14:02:09.653149 progress 20% (1MB)
24 14:02:09.701817 progress 25% (2MB)
25 14:02:09.713410 progress 30% (2MB)
26 14:02:09.724678 progress 35% (2MB)
27 14:02:09.734889 progress 40% (3MB)
28 14:02:09.740814 progress 45% (3MB)
29 14:02:09.793913 progress 50% (4MB)
30 14:02:09.805353 progress 55% (4MB)
31 14:02:09.816581 progress 60% (4MB)
32 14:02:09.844461 progress 65% (5MB)
33 14:02:09.848680 progress 70% (5MB)
34 14:02:09.886664 progress 75% (6MB)
35 14:02:09.897783 progress 80% (6MB)
36 14:02:09.908966 progress 85% (6MB)
37 14:02:09.916644 progress 90% (7MB)
38 14:02:09.922085 progress 95% (7MB)
39 14:02:09.976502 progress 100% (8MB)
40 14:02:09.977450 8MB downloaded in 0.36s (22.33MB/s)
41 14:02:09.978240 end: 1.1.1 http-download (duration 00:00:01) [common]
43 14:02:09.979938 end: 1.1 download-retry (duration 00:00:01) [common]
44 14:02:09.980480 start: 1.2 download-retry (timeout 00:09:59) [common]
45 14:02:09.980963 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 14:02:09.981598 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.283-cip98/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:02:09.981983 saving as /var/lib/lava/dispatcher/tmp/10389521/tftp-deploy-raf2ulbk/kernel/bzImage
48 14:02:09.982313 total size: 10858496 (10MB)
49 14:02:09.982639 No compression specified
50 14:02:09.987468 progress 0% (0MB)
51 14:02:10.001411 progress 5% (0MB)
52 14:02:10.018417 progress 10% (1MB)
53 14:02:10.022982 progress 15% (1MB)
54 14:02:10.062934 progress 20% (2MB)
55 14:02:10.077614 progress 25% (2MB)
56 14:02:10.087836 progress 30% (3MB)
57 14:02:10.094186 progress 35% (3MB)
58 14:02:10.145382 progress 40% (4MB)
59 14:02:10.160512 progress 45% (4MB)
60 14:02:10.171353 progress 50% (5MB)
61 14:02:10.178334 progress 55% (5MB)
62 14:02:10.219866 progress 60% (6MB)
63 14:02:10.223116 progress 65% (6MB)
64 14:02:10.261049 progress 70% (7MB)
65 14:02:10.297749 progress 75% (7MB)
66 14:02:10.312084 progress 80% (8MB)
67 14:02:10.325858 progress 85% (8MB)
68 14:02:10.334641 progress 90% (9MB)
69 14:02:10.370391 progress 95% (9MB)
70 14:02:10.377070 progress 100% (10MB)
71 14:02:10.377365 10MB downloaded in 0.40s (26.21MB/s)
72 14:02:10.377609 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:02:10.377990 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:02:10.378130 start: 1.3 download-retry (timeout 00:09:59) [common]
76 14:02:10.378270 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 14:02:10.378477 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.283-cip98/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:02:10.378589 saving as /var/lib/lava/dispatcher/tmp/10389521/tftp-deploy-raf2ulbk/modules/modules.tar
79 14:02:10.378686 total size: 484124 (0MB)
80 14:02:10.378781 Using unxz to decompress xz
81 14:02:10.384360 progress 6% (0MB)
82 14:02:10.385000 progress 13% (0MB)
83 14:02:10.385381 progress 20% (0MB)
84 14:02:10.387506 progress 27% (0MB)
85 14:02:10.390795 progress 33% (0MB)
86 14:02:10.394260 progress 40% (0MB)
87 14:02:10.397207 progress 47% (0MB)
88 14:02:10.400501 progress 54% (0MB)
89 14:02:10.403873 progress 60% (0MB)
90 14:02:10.406399 progress 67% (0MB)
91 14:02:10.437815 progress 74% (0MB)
92 14:02:10.451267 progress 81% (0MB)
93 14:02:10.460288 progress 87% (0MB)
94 14:02:10.465812 progress 94% (0MB)
95 14:02:10.470375 progress 100% (0MB)
96 14:02:10.481505 0MB downloaded in 0.10s (4.49MB/s)
97 14:02:10.481897 end: 1.3.1 http-download (duration 00:00:00) [common]
99 14:02:10.482265 end: 1.3 download-retry (duration 00:00:00) [common]
100 14:02:10.482403 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 14:02:10.482535 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 14:02:10.482648 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 14:02:10.482767 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 14:02:10.483056 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v
105 14:02:10.483280 makedir: /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin
106 14:02:10.483466 makedir: /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/tests
107 14:02:10.483649 makedir: /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/results
108 14:02:10.483852 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-add-keys
109 14:02:10.484097 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-add-sources
110 14:02:10.484318 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-background-process-start
111 14:02:10.484545 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-background-process-stop
112 14:02:10.484763 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-common-functions
113 14:02:10.484977 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-echo-ipv4
114 14:02:10.485193 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-install-packages
115 14:02:10.485397 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-installed-packages
116 14:02:10.485606 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-os-build
117 14:02:10.485819 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-probe-channel
118 14:02:10.485979 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-probe-ip
119 14:02:10.486133 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-target-ip
120 14:02:10.486288 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-target-mac
121 14:02:10.486438 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-target-storage
122 14:02:10.486606 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-test-case
123 14:02:10.486798 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-test-event
124 14:02:10.486987 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-test-feedback
125 14:02:10.487177 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-test-raise
126 14:02:10.487371 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-test-reference
127 14:02:10.487566 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-test-runner
128 14:02:10.487757 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-test-set
129 14:02:10.487948 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-test-shell
130 14:02:10.488142 Updating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-install-packages (oe)
131 14:02:10.671333 Updating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/bin/lava-installed-packages (oe)
132 14:02:10.671737 Creating /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/environment
133 14:02:10.671991 LAVA metadata
134 14:02:10.672166 - LAVA_JOB_ID=10389521
135 14:02:10.672322 - LAVA_DISPATCHER_IP=192.168.201.1
136 14:02:10.672573 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 14:02:10.672729 skipped lava-vland-overlay
138 14:02:10.672911 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 14:02:10.673095 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 14:02:10.673241 skipped lava-multinode-overlay
141 14:02:10.673410 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 14:02:10.673624 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 14:02:10.673799 Loading test definitions
144 14:02:10.674017 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 14:02:10.674186 Using /lava-10389521 at stage 0
146 14:02:10.674872 uuid=10389521_1.4.2.3.1 testdef=None
147 14:02:10.675076 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 14:02:10.675281 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 14:02:10.676312 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 14:02:10.676740 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 14:02:10.678385 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 14:02:10.679312 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 14:02:15.585043 runner path: /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/0/tests/0_dmesg test_uuid 10389521_1.4.2.3.1
156 14:02:15.592215 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:05) [common]
158 14:02:15.592513 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:54) [common]
159 14:02:15.592592 Using /lava-10389521 at stage 1
160 14:02:15.592917 uuid=10389521_1.4.2.3.5 testdef=None
161 14:02:15.593010 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 14:02:15.593099 start: 1.4.2.3.6 test-overlay (timeout 00:09:54) [common]
163 14:02:15.593749 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 14:02:15.593982 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:54) [common]
166 14:02:15.848710 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 14:02:15.849368 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:53) [common]
169 14:02:15.853450 runner path: /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/1/tests/1_bootrr test_uuid 10389521_1.4.2.3.5
170 14:02:15.853698 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 14:02:15.854010 Creating lava-test-runner.conf files
173 14:02:15.854105 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/0 for stage 0
174 14:02:15.854235 - 0_dmesg
175 14:02:15.854348 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10389521/lava-overlay-l2eze48v/lava-10389521/1 for stage 1
176 14:02:15.854479 - 1_bootrr
177 14:02:15.854615 end: 1.4.2.3 test-definition (duration 00:00:05) [common]
178 14:02:15.854739 start: 1.4.2.4 compress-overlay (timeout 00:09:53) [common]
179 14:02:15.864724 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 14:02:15.864862 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:53) [common]
181 14:02:15.864963 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 14:02:15.865062 end: 1.4.2 lava-overlay (duration 00:00:05) [common]
183 14:02:15.865163 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:53) [common]
184 14:02:18.988572 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:03) [common]
185 14:02:18.988991 start: 1.4.4 extract-modules (timeout 00:09:50) [common]
186 14:02:18.989128 extracting modules file /var/lib/lava/dispatcher/tmp/10389521/tftp-deploy-raf2ulbk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10389521/extract-overlay-ramdisk-v3580ufk/ramdisk
187 14:02:19.163710 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 14:02:19.163891 start: 1.4.5 apply-overlay-tftp (timeout 00:09:50) [common]
189 14:02:19.164008 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10389521/compress-overlay-nzgktmiu/overlay-1.4.2.4.tar.gz to ramdisk
190 14:02:19.164107 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10389521/compress-overlay-nzgktmiu/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10389521/extract-overlay-ramdisk-v3580ufk/ramdisk
191 14:02:19.174277 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 14:02:19.174440 start: 1.4.6 configure-preseed-file (timeout 00:09:50) [common]
193 14:02:19.174569 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 14:02:19.174695 start: 1.4.7 compress-ramdisk (timeout 00:09:50) [common]
195 14:02:19.174811 Building ramdisk /var/lib/lava/dispatcher/tmp/10389521/extract-overlay-ramdisk-v3580ufk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10389521/extract-overlay-ramdisk-v3580ufk/ramdisk
196 14:02:20.669365 >> 53976 blocks
197 14:02:21.876975 rename /var/lib/lava/dispatcher/tmp/10389521/extract-overlay-ramdisk-v3580ufk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10389521/tftp-deploy-raf2ulbk/ramdisk/ramdisk.cpio.gz
198 14:02:21.877440 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
199 14:02:21.877634 start: 1.4.8 prepare-kernel (timeout 00:09:47) [common]
200 14:02:21.877732 start: 1.4.8.1 prepare-fit (timeout 00:09:47) [common]
201 14:02:21.877829 No mkimage arch provided, not using FIT.
202 14:02:21.877917 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 14:02:21.878003 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 14:02:21.878109 end: 1.4 prepare-tftp-overlay (duration 00:00:11) [common]
205 14:02:21.878203 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:47) [common]
206 14:02:21.878287 No LXC device requested
207 14:02:21.878369 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 14:02:21.878460 start: 1.6 deploy-device-env (timeout 00:09:47) [common]
209 14:02:21.878541 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 14:02:21.878620 Checking files for TFTP limit of 4294967296 bytes.
211 14:02:21.879157 end: 1 tftp-deploy (duration 00:00:13) [common]
212 14:02:21.879290 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 14:02:21.879411 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 14:02:21.879577 substitutions:
215 14:02:21.879673 - {DTB}: None
216 14:02:21.879768 - {INITRD}: 10389521/tftp-deploy-raf2ulbk/ramdisk/ramdisk.cpio.gz
217 14:02:21.879858 - {KERNEL}: 10389521/tftp-deploy-raf2ulbk/kernel/bzImage
218 14:02:21.879961 - {LAVA_MAC}: None
219 14:02:21.880051 - {PRESEED_CONFIG}: None
220 14:02:21.880139 - {PRESEED_LOCAL}: None
221 14:02:21.880227 - {RAMDISK}: 10389521/tftp-deploy-raf2ulbk/ramdisk/ramdisk.cpio.gz
222 14:02:21.880327 - {ROOT_PART}: None
223 14:02:21.880415 - {ROOT}: None
224 14:02:21.880503 - {SERVER_IP}: 192.168.201.1
225 14:02:21.880589 - {TEE}: None
226 14:02:21.880676 Parsed boot commands:
227 14:02:21.880763 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 14:02:21.880954 Parsed boot commands: tftpboot 192.168.201.1 10389521/tftp-deploy-raf2ulbk/kernel/bzImage 10389521/tftp-deploy-raf2ulbk/kernel/cmdline 10389521/tftp-deploy-raf2ulbk/ramdisk/ramdisk.cpio.gz
229 14:02:21.881046 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 14:02:21.881134 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 14:02:21.881226 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 14:02:21.881314 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 14:02:21.881389 Not connected, no need to disconnect.
234 14:02:21.881466 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 14:02:21.881570 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 14:02:21.881675 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
237 14:02:21.885071 Setting prompt string to ['lava-test: # ']
238 14:02:21.885421 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 14:02:21.885556 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 14:02:21.885669 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 14:02:21.885763 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 14:02:21.885963 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
243 14:02:27.031825 >> Command sent successfully.
244 14:02:27.042570 Returned 0 in 5 seconds
245 14:02:27.143601 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 14:02:27.144693 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 14:02:27.145024 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 14:02:27.145319 Setting prompt string to 'Starting depthcharge on Helios...'
250 14:02:27.145592 Changing prompt to 'Starting depthcharge on Helios...'
251 14:02:27.145879 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 14:02:27.146734 [Enter `^Ec?' for help]
253 14:02:27.755367
254 14:02:27.756035
255 14:02:27.765982 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 14:02:27.769336 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 14:02:27.772999 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 14:02:27.779729 CPU: AES supported, TXT NOT supported, VT supported
259 14:02:27.782719 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 14:02:27.912688 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 14:02:27.913043 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 14:02:27.913137 VBOOT: Loading verstage.
263 14:02:27.913205 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 14:02:27.913271 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 14:02:27.913335 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 14:02:27.913397 CBFS @ c08000 size 3f8000
267 14:02:27.913459 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 14:02:27.913532 CBFS: Locating 'fallback/verstage'
269 14:02:27.913607 CBFS: Found @ offset 10fb80 size 1072c
270 14:02:27.913667
271 14:02:27.913725
272 14:02:27.913783 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 14:02:27.913843 Probing TPM: . done!
274 14:02:27.913917 TPM ready after 0 ms
275 14:02:27.913991 Connected to device vid:did:rid of 1ae0:0028:00
276 14:02:27.914047 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
277 14:02:27.914108 Initialized TPM device CR50 revision 0
278 14:02:27.920744 tlcl_send_startup: Startup return code is 0
279 14:02:27.920901 TPM: setup succeeded
280 14:02:27.933470 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 14:02:27.937392 Chrome EC: UHEPI supported
282 14:02:27.940959 Phase 1
283 14:02:27.944140 FMAP: area GBB found @ c05000 (12288 bytes)
284 14:02:27.951180 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 14:02:27.951431 Phase 2
286 14:02:27.954216 Phase 3
287 14:02:27.957707 FMAP: area GBB found @ c05000 (12288 bytes)
288 14:02:27.964080 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 14:02:27.971131 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 14:02:27.974075 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 14:02:27.980961 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 14:02:27.995978 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 14:02:27.999710 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 14:02:28.005887 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 14:02:28.010681 Phase 4
296 14:02:28.013840 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 14:02:28.020027 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 14:02:28.199857 VB2:vb2_rsa_verify_digest() Digest check failed!
299 14:02:28.206662 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 14:02:28.207113 Saving nvdata
301 14:02:28.210041 Reboot requested (10020007)
302 14:02:28.213449 board_reset() called!
303 14:02:28.214077 full_reset() called!
304 14:02:32.722306
305 14:02:32.722484
306 14:02:32.732177 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 14:02:32.735397 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 14:02:32.741990 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 14:02:32.745082 CPU: AES supported, TXT NOT supported, VT supported
310 14:02:32.752291 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 14:02:32.755501 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 14:02:32.762026 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 14:02:32.765014 VBOOT: Loading verstage.
314 14:02:32.768629 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 14:02:32.775010 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 14:02:32.781369 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 14:02:32.781492 CBFS @ c08000 size 3f8000
318 14:02:32.788340 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 14:02:32.791523 CBFS: Locating 'fallback/verstage'
320 14:02:32.794539 CBFS: Found @ offset 10fb80 size 1072c
321 14:02:32.799137
322 14:02:32.799263
323 14:02:32.808983 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 14:02:32.823287 Probing TPM: . done!
325 14:02:32.826899 TPM ready after 0 ms
326 14:02:32.830077 Connected to device vid:did:rid of 1ae0:0028:00
327 14:02:32.839888 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 14:02:32.843452 Initialized TPM device CR50 revision 0
329 14:02:32.888313 tlcl_send_startup: Startup return code is 0
330 14:02:32.888505 TPM: setup succeeded
331 14:02:32.901000 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 14:02:32.904611 Chrome EC: UHEPI supported
333 14:02:32.907692 Phase 1
334 14:02:32.911487 FMAP: area GBB found @ c05000 (12288 bytes)
335 14:02:32.918299 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 14:02:32.924687 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 14:02:32.927714 Recovery requested (1009000e)
338 14:02:32.933277 Saving nvdata
339 14:02:32.939772 tlcl_extend: response is 0
340 14:02:32.948315 tlcl_extend: response is 0
341 14:02:32.955889 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 14:02:32.959024 CBFS @ c08000 size 3f8000
343 14:02:32.965385 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 14:02:32.968603 CBFS: Locating 'fallback/romstage'
345 14:02:32.972339 CBFS: Found @ offset 80 size 145fc
346 14:02:32.975346 Accumulated console time in verstage 98 ms
347 14:02:32.975694
348 14:02:32.976033
349 14:02:32.988366 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 14:02:32.995284 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 14:02:32.998501 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 14:02:33.002013 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 14:02:33.008342 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 14:02:33.011541 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 14:02:33.015287 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 14:02:33.018542 TCO_STS: 0000 0000
357 14:02:33.021589 GEN_PMCON: e0015238 00000200
358 14:02:33.025152 GBLRST_CAUSE: 00000000 00000000
359 14:02:33.025623 prev_sleep_state 5
360 14:02:33.028325 Boot Count incremented to 56691
361 14:02:33.035605 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 14:02:33.038705 CBFS @ c08000 size 3f8000
363 14:02:33.045591 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 14:02:33.045951 CBFS: Locating 'fspm.bin'
365 14:02:33.048752 CBFS: Found @ offset 5ffc0 size 71000
366 14:02:33.052976 Chrome EC: UHEPI supported
367 14:02:33.059926 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 14:02:33.065496 Probing TPM: done!
369 14:02:33.071957 Connected to device vid:did:rid of 1ae0:0028:00
370 14:02:33.081837 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
371 14:02:33.087775 Initialized TPM device CR50 revision 0
372 14:02:33.096390 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 14:02:33.103558 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 14:02:33.106603 MRC cache found, size 1948
375 14:02:33.109753 bootmode is set to: 2
376 14:02:33.112958 PRMRR disabled by config.
377 14:02:33.113422 SPD INDEX = 1
378 14:02:33.119991 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 14:02:33.123000 CBFS @ c08000 size 3f8000
380 14:02:33.129467 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 14:02:33.129996 CBFS: Locating 'spd.bin'
382 14:02:33.133101 CBFS: Found @ offset 5fb80 size 400
383 14:02:33.136281 SPD: module type is LPDDR3
384 14:02:33.139669 SPD: module part is
385 14:02:33.146498 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 14:02:33.149574 SPD: device width 4 bits, bus width 8 bits
387 14:02:33.152829 SPD: module size is 4096 MB (per channel)
388 14:02:33.156361 memory slot: 0 configuration done.
389 14:02:33.159265 memory slot: 2 configuration done.
390 14:02:33.211558 CBMEM:
391 14:02:33.214509 IMD: root @ 99fff000 254 entries.
392 14:02:33.218393 IMD: root @ 99ffec00 62 entries.
393 14:02:33.221573 External stage cache:
394 14:02:33.224827 IMD: root @ 9abff000 254 entries.
395 14:02:33.228439 IMD: root @ 9abfec00 62 entries.
396 14:02:33.231250 Chrome EC: clear events_b mask to 0x0000000020004000
397 14:02:33.247320 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 14:02:33.260387 tlcl_write: response is 0
399 14:02:33.269914 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 14:02:33.276562 MRC: TPM MRC hash updated successfully.
401 14:02:33.276722 2 DIMMs found
402 14:02:33.279519 SMM Memory Map
403 14:02:33.282783 SMRAM : 0x9a000000 0x1000000
404 14:02:33.286476 Subregion 0: 0x9a000000 0xa00000
405 14:02:33.289705 Subregion 1: 0x9aa00000 0x200000
406 14:02:33.292964 Subregion 2: 0x9ac00000 0x400000
407 14:02:33.296240 top_of_ram = 0x9a000000
408 14:02:33.299275 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 14:02:33.305867 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 14:02:33.309261 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 14:02:33.315837 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 14:02:33.319096 CBFS @ c08000 size 3f8000
413 14:02:33.322736 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 14:02:33.325936 CBFS: Locating 'fallback/postcar'
415 14:02:33.332680 CBFS: Found @ offset 107000 size 4b44
416 14:02:33.335527 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 14:02:33.348466 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 14:02:33.352069 Processing 180 relocs. Offset value of 0x97c0c000
419 14:02:33.360580 Accumulated console time in romstage 286 ms
420 14:02:33.360694
421 14:02:33.360766
422 14:02:33.370476 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 14:02:33.377429 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 14:02:33.380689 CBFS @ c08000 size 3f8000
425 14:02:33.383837 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 14:02:33.386935 CBFS: Locating 'fallback/ramstage'
427 14:02:33.394111 CBFS: Found @ offset 43380 size 1b9e8
428 14:02:33.400406 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 14:02:33.431890 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 14:02:33.435561 Processing 3976 relocs. Offset value of 0x98db0000
431 14:02:33.442501 Accumulated console time in postcar 52 ms
432 14:02:33.442614
433 14:02:33.442687
434 14:02:33.452300 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 14:02:33.458933 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 14:02:33.462057 WARNING: RO_VPD is uninitialized or empty.
437 14:02:33.465172 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 14:02:33.472082 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 14:02:33.472223 Normal boot.
440 14:02:33.478841 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 14:02:33.482057 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 14:02:33.485335 CBFS @ c08000 size 3f8000
443 14:02:33.491841 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 14:02:33.495046 CBFS: Locating 'cpu_microcode_blob.bin'
445 14:02:33.498832 CBFS: Found @ offset 14700 size 2ec00
446 14:02:33.502028 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 14:02:33.505150 Skip microcode update
448 14:02:33.511649 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 14:02:33.511762 CBFS @ c08000 size 3f8000
450 14:02:33.518267 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 14:02:33.521896 CBFS: Locating 'fsps.bin'
452 14:02:33.525029 CBFS: Found @ offset d1fc0 size 35000
453 14:02:33.550724 Detected 4 core, 8 thread CPU.
454 14:02:33.553835 Setting up SMI for CPU
455 14:02:33.556790 IED base = 0x9ac00000
456 14:02:33.556880 IED size = 0x00400000
457 14:02:33.560377 Will perform SMM setup.
458 14:02:33.567536 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 14:02:33.573699 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 14:02:33.576646 Processing 16 relocs. Offset value of 0x00030000
461 14:02:33.580809 Attempting to start 7 APs
462 14:02:33.584056 Waiting for 10ms after sending INIT.
463 14:02:33.600053 Waiting for 1st SIPI to complete...AP: slot 4 apic_id 1.
464 14:02:33.600184 done.
465 14:02:33.603226 AP: slot 3 apic_id 6.
466 14:02:33.607163 AP: slot 7 apic_id 7.
467 14:02:33.607258 AP: slot 6 apic_id 3.
468 14:02:33.610226 AP: slot 1 apic_id 2.
469 14:02:33.613352 AP: slot 2 apic_id 5.
470 14:02:33.613473 AP: slot 5 apic_id 4.
471 14:02:33.620119 Waiting for 2nd SIPI to complete...done.
472 14:02:33.626396 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 14:02:33.633442 Processing 13 relocs. Offset value of 0x00038000
474 14:02:33.636533 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 14:02:33.642880 Installing SMM handler to 0x9a000000
476 14:02:33.649703 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 14:02:33.656386 Processing 658 relocs. Offset value of 0x9a010000
478 14:02:33.662738 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 14:02:33.666147 Processing 13 relocs. Offset value of 0x9a008000
480 14:02:33.672964 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 14:02:33.679435 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 14:02:33.685911 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 14:02:33.689721 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 14:02:33.696130 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 14:02:33.702571 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 14:02:33.705767 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 14:02:33.712529 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 14:02:33.716030 Clearing SMI status registers
489 14:02:33.719302 SMI_STS: PM1
490 14:02:33.719421 PM1_STS: PWRBTN
491 14:02:33.722934 TCO_STS: SECOND_TO
492 14:02:33.726205 New SMBASE 0x9a000000
493 14:02:33.729324 In relocation handler: CPU 0
494 14:02:33.732579 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 14:02:33.736257 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 14:02:33.739269 Relocation complete.
497 14:02:33.742741 New SMBASE 0x99fff000
498 14:02:33.742841 In relocation handler: CPU 4
499 14:02:33.749416 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
500 14:02:33.752736 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 14:02:33.756440 Relocation complete.
502 14:02:33.759594 New SMBASE 0x99fff800
503 14:02:33.759725 In relocation handler: CPU 2
504 14:02:33.766291 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
505 14:02:33.770008 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 14:02:33.772986 Relocation complete.
507 14:02:33.773135 New SMBASE 0x99fff400
508 14:02:33.776105 In relocation handler: CPU 3
509 14:02:33.782723 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
510 14:02:33.786296 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 14:02:33.789198 Relocation complete.
512 14:02:33.789312 New SMBASE 0x99ffe400
513 14:02:33.793021 In relocation handler: CPU 7
514 14:02:33.795870 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
515 14:02:33.802339 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 14:02:33.805781 Relocation complete.
517 14:02:33.805889 New SMBASE 0x99fffc00
518 14:02:33.809342 In relocation handler: CPU 1
519 14:02:33.812733 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
520 14:02:33.818955 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 14:02:33.822784 Relocation complete.
522 14:02:33.822872 New SMBASE 0x99ffe800
523 14:02:33.825960 In relocation handler: CPU 6
524 14:02:33.828949 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
525 14:02:33.835919 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 14:02:33.839068 Relocation complete.
527 14:02:33.839199 New SMBASE 0x99ffec00
528 14:02:33.842333 In relocation handler: CPU 5
529 14:02:33.845886 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
530 14:02:33.852407 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 14:02:33.852552 Relocation complete.
532 14:02:33.855383 Initializing CPU #0
533 14:02:33.858659 CPU: vendor Intel device 806ec
534 14:02:33.861969 CPU: family 06, model 8e, stepping 0c
535 14:02:33.865217 Clearing out pending MCEs
536 14:02:33.868794 Setting up local APIC...
537 14:02:33.868903 apic_id: 0x00 done.
538 14:02:33.871840 Turbo is available but hidden
539 14:02:33.875547 Turbo is available and visible
540 14:02:33.878713 VMX status: enabled
541 14:02:33.881970 IA32_FEATURE_CONTROL status: locked
542 14:02:33.884979 Skip microcode update
543 14:02:33.885094 CPU #0 initialized
544 14:02:33.888649 Initializing CPU #4
545 14:02:33.891778 Initializing CPU #7
546 14:02:33.891899 Initializing CPU #1
547 14:02:33.895290 Initializing CPU #6
548 14:02:33.898392 CPU: vendor Intel device 806ec
549 14:02:33.902024 CPU: family 06, model 8e, stepping 0c
550 14:02:33.905244 CPU: vendor Intel device 806ec
551 14:02:33.908449 CPU: family 06, model 8e, stepping 0c
552 14:02:33.911606 Clearing out pending MCEs
553 14:02:33.914828 Clearing out pending MCEs
554 14:02:33.914920 Setting up local APIC...
555 14:02:33.918611 Initializing CPU #3
556 14:02:33.921680 CPU: vendor Intel device 806ec
557 14:02:33.924838 CPU: family 06, model 8e, stepping 0c
558 14:02:33.928055 CPU: vendor Intel device 806ec
559 14:02:33.931236 CPU: family 06, model 8e, stepping 0c
560 14:02:33.935012 Clearing out pending MCEs
561 14:02:33.938243 apic_id: 0x02 done.
562 14:02:33.938443 Setting up local APIC...
563 14:02:33.941438 Setting up local APIC...
564 14:02:33.944752 VMX status: enabled
565 14:02:33.944911 apic_id: 0x03 done.
566 14:02:33.951668 IA32_FEATURE_CONTROL status: locked
567 14:02:33.951796 VMX status: enabled
568 14:02:33.954760 Skip microcode update
569 14:02:33.958032 IA32_FEATURE_CONTROL status: locked
570 14:02:33.958152 CPU #1 initialized
571 14:02:33.961371 Skip microcode update
572 14:02:33.964481 Clearing out pending MCEs
573 14:02:33.967714 CPU: vendor Intel device 806ec
574 14:02:33.971490 CPU: family 06, model 8e, stepping 0c
575 14:02:33.974588 Setting up local APIC...
576 14:02:33.974686 CPU #6 initialized
577 14:02:33.977770 apic_id: 0x01 done.
578 14:02:33.981407 Initializing CPU #5
579 14:02:33.981562 Initializing CPU #2
580 14:02:33.984350 CPU: vendor Intel device 806ec
581 14:02:33.987956 CPU: family 06, model 8e, stepping 0c
582 14:02:33.991158 VMX status: enabled
583 14:02:33.994211 Clearing out pending MCEs
584 14:02:33.997902 CPU: vendor Intel device 806ec
585 14:02:34.001028 CPU: family 06, model 8e, stepping 0c
586 14:02:34.003981 Setting up local APIC...
587 14:02:34.004071 apic_id: 0x07 done.
588 14:02:34.007529 Clearing out pending MCEs
589 14:02:34.010677 VMX status: enabled
590 14:02:34.010762 Setting up local APIC...
591 14:02:34.017637 IA32_FEATURE_CONTROL status: locked
592 14:02:34.017749 apic_id: 0x04 done.
593 14:02:34.020764 Clearing out pending MCEs
594 14:02:34.023962 VMX status: enabled
595 14:02:34.024049 Setting up local APIC...
596 14:02:34.027122 Skip microcode update
597 14:02:34.030906 apic_id: 0x06 done.
598 14:02:34.034067 IA32_FEATURE_CONTROL status: locked
599 14:02:34.034165 VMX status: enabled
600 14:02:34.037082 Skip microcode update
601 14:02:34.040466 IA32_FEATURE_CONTROL status: locked
602 14:02:34.044178 CPU #7 initialized
603 14:02:34.044324 Skip microcode update
604 14:02:34.047325 CPU #4 initialized
605 14:02:34.050476 apic_id: 0x05 done.
606 14:02:34.053673 IA32_FEATURE_CONTROL status: locked
607 14:02:34.053774 VMX status: enabled
608 14:02:34.057238 Skip microcode update
609 14:02:34.060506 IA32_FEATURE_CONTROL status: locked
610 14:02:34.063636 CPU #5 initialized
611 14:02:34.063726 Skip microcode update
612 14:02:34.067487 CPU #3 initialized
613 14:02:34.070408 CPU #2 initialized
614 14:02:34.073923 bsp_do_flight_plan done after 452 msecs.
615 14:02:34.076962 CPU: frequency set to 4200 MHz
616 14:02:34.077058 Enabling SMIs.
617 14:02:34.080210 Locking SMM.
618 14:02:34.094330 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 14:02:34.097282 CBFS @ c08000 size 3f8000
620 14:02:34.103926 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 14:02:34.104031 CBFS: Locating 'vbt.bin'
622 14:02:34.106984 CBFS: Found @ offset 5f5c0 size 499
623 14:02:34.114353 Found a VBT of 4608 bytes after decompression
624 14:02:34.300601 Display FSP Version Info HOB
625 14:02:34.303491 Reference Code - CPU = 9.0.1e.30
626 14:02:34.307097 uCode Version = 0.0.0.ca
627 14:02:34.310468 TXT ACM version = ff.ff.ff.ffff
628 14:02:34.313422 Display FSP Version Info HOB
629 14:02:34.317186 Reference Code - ME = 9.0.1e.30
630 14:02:34.320538 MEBx version = 0.0.0.0
631 14:02:34.323664 ME Firmware Version = Consumer SKU
632 14:02:34.326684 Display FSP Version Info HOB
633 14:02:34.330213 Reference Code - CML PCH = 9.0.1e.30
634 14:02:34.333731 PCH-CRID Status = Disabled
635 14:02:34.336822 PCH-CRID Original Value = ff.ff.ff.ffff
636 14:02:34.339955 PCH-CRID New Value = ff.ff.ff.ffff
637 14:02:34.343694 OPROM - RST - RAID = ff.ff.ff.ffff
638 14:02:34.346914 ChipsetInit Base Version = ff.ff.ff.ffff
639 14:02:34.350069 ChipsetInit Oem Version = ff.ff.ff.ffff
640 14:02:34.353274 Display FSP Version Info HOB
641 14:02:34.360448 Reference Code - SA - System Agent = 9.0.1e.30
642 14:02:34.363554 Reference Code - MRC = 0.7.1.6c
643 14:02:34.363679 SA - PCIe Version = 9.0.1e.30
644 14:02:34.366515 SA-CRID Status = Disabled
645 14:02:34.370132 SA-CRID Original Value = 0.0.0.c
646 14:02:34.373213 SA-CRID New Value = 0.0.0.c
647 14:02:34.376332 OPROM - VBIOS = ff.ff.ff.ffff
648 14:02:34.380101 RTC Init
649 14:02:34.383330 Set power on after power failure.
650 14:02:34.383450 Disabling Deep S3
651 14:02:34.386364 Disabling Deep S3
652 14:02:34.386477 Disabling Deep S4
653 14:02:34.389628 Disabling Deep S4
654 14:02:34.389790 Disabling Deep S5
655 14:02:34.393247 Disabling Deep S5
656 14:02:34.399404 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 197 exit 1
657 14:02:34.399546 Enumerating buses...
658 14:02:34.406326 Show all devs... Before device enumeration.
659 14:02:34.409352 Root Device: enabled 1
660 14:02:34.409463 CPU_CLUSTER: 0: enabled 1
661 14:02:34.412594 DOMAIN: 0000: enabled 1
662 14:02:34.416455 APIC: 00: enabled 1
663 14:02:34.416568 PCI: 00:00.0: enabled 1
664 14:02:34.419510 PCI: 00:02.0: enabled 1
665 14:02:34.422603 PCI: 00:04.0: enabled 0
666 14:02:34.426333 PCI: 00:05.0: enabled 0
667 14:02:34.426463 PCI: 00:12.0: enabled 1
668 14:02:34.429296 PCI: 00:12.5: enabled 0
669 14:02:34.433099 PCI: 00:12.6: enabled 0
670 14:02:34.435980 PCI: 00:14.0: enabled 1
671 14:02:34.436098 PCI: 00:14.1: enabled 0
672 14:02:34.439423 PCI: 00:14.3: enabled 1
673 14:02:34.442637 PCI: 00:14.5: enabled 0
674 14:02:34.442758 PCI: 00:15.0: enabled 1
675 14:02:34.446078 PCI: 00:15.1: enabled 1
676 14:02:34.449125 PCI: 00:15.2: enabled 0
677 14:02:34.452836 PCI: 00:15.3: enabled 0
678 14:02:34.452954 PCI: 00:16.0: enabled 1
679 14:02:34.455936 PCI: 00:16.1: enabled 0
680 14:02:34.459100 PCI: 00:16.2: enabled 0
681 14:02:34.462412 PCI: 00:16.3: enabled 0
682 14:02:34.462503 PCI: 00:16.4: enabled 0
683 14:02:34.465735 PCI: 00:16.5: enabled 0
684 14:02:34.468909 PCI: 00:17.0: enabled 1
685 14:02:34.472071 PCI: 00:19.0: enabled 1
686 14:02:34.472185 PCI: 00:19.1: enabled 0
687 14:02:34.475963 PCI: 00:19.2: enabled 0
688 14:02:34.478948 PCI: 00:1a.0: enabled 0
689 14:02:34.482053 PCI: 00:1c.0: enabled 0
690 14:02:34.482165 PCI: 00:1c.1: enabled 0
691 14:02:34.485842 PCI: 00:1c.2: enabled 0
692 14:02:34.488664 PCI: 00:1c.3: enabled 0
693 14:02:34.488780 PCI: 00:1c.4: enabled 0
694 14:02:34.492439 PCI: 00:1c.5: enabled 0
695 14:02:34.495480 PCI: 00:1c.6: enabled 0
696 14:02:34.498715 PCI: 00:1c.7: enabled 0
697 14:02:34.498825 PCI: 00:1d.0: enabled 1
698 14:02:34.502314 PCI: 00:1d.1: enabled 0
699 14:02:34.505236 PCI: 00:1d.2: enabled 0
700 14:02:34.508388 PCI: 00:1d.3: enabled 0
701 14:02:34.508494 PCI: 00:1d.4: enabled 0
702 14:02:34.512138 PCI: 00:1d.5: enabled 1
703 14:02:34.515281 PCI: 00:1e.0: enabled 1
704 14:02:34.518468 PCI: 00:1e.1: enabled 0
705 14:02:34.518628 PCI: 00:1e.2: enabled 1
706 14:02:34.522235 PCI: 00:1e.3: enabled 1
707 14:02:34.525264 PCI: 00:1f.0: enabled 1
708 14:02:34.528472 PCI: 00:1f.1: enabled 1
709 14:02:34.528557 PCI: 00:1f.2: enabled 1
710 14:02:34.531512 PCI: 00:1f.3: enabled 1
711 14:02:34.535074 PCI: 00:1f.4: enabled 1
712 14:02:34.538262 PCI: 00:1f.5: enabled 1
713 14:02:34.538353 PCI: 00:1f.6: enabled 0
714 14:02:34.541729 USB0 port 0: enabled 1
715 14:02:34.544633 I2C: 00:15: enabled 1
716 14:02:34.544722 I2C: 00:5d: enabled 1
717 14:02:34.548549 GENERIC: 0.0: enabled 1
718 14:02:34.551673 I2C: 00:1a: enabled 1
719 14:02:34.551787 I2C: 00:38: enabled 1
720 14:02:34.554863 I2C: 00:39: enabled 1
721 14:02:34.558434 I2C: 00:3a: enabled 1
722 14:02:34.558569 I2C: 00:3b: enabled 1
723 14:02:34.561757 PCI: 00:00.0: enabled 1
724 14:02:34.564757 SPI: 00: enabled 1
725 14:02:34.564840 SPI: 01: enabled 1
726 14:02:34.567949 PNP: 0c09.0: enabled 1
727 14:02:34.571088 USB2 port 0: enabled 1
728 14:02:34.571180 USB2 port 1: enabled 1
729 14:02:34.574361 USB2 port 2: enabled 0
730 14:02:34.578115 USB2 port 3: enabled 0
731 14:02:34.581056 USB2 port 5: enabled 0
732 14:02:34.581161 USB2 port 6: enabled 1
733 14:02:34.584771 USB2 port 9: enabled 1
734 14:02:34.587864 USB3 port 0: enabled 1
735 14:02:34.587975 USB3 port 1: enabled 1
736 14:02:34.591107 USB3 port 2: enabled 1
737 14:02:34.594285 USB3 port 3: enabled 1
738 14:02:34.597407 USB3 port 4: enabled 0
739 14:02:34.597489 APIC: 02: enabled 1
740 14:02:34.601236 APIC: 05: enabled 1
741 14:02:34.601322 APIC: 06: enabled 1
742 14:02:34.604374 APIC: 01: enabled 1
743 14:02:34.607672 APIC: 04: enabled 1
744 14:02:34.607764 APIC: 03: enabled 1
745 14:02:34.611207 APIC: 07: enabled 1
746 14:02:34.614631 Compare with tree...
747 14:02:34.614732 Root Device: enabled 1
748 14:02:34.617679 CPU_CLUSTER: 0: enabled 1
749 14:02:34.620720 APIC: 00: enabled 1
750 14:02:34.620848 APIC: 02: enabled 1
751 14:02:34.623926 APIC: 05: enabled 1
752 14:02:34.627609 APIC: 06: enabled 1
753 14:02:34.627724 APIC: 01: enabled 1
754 14:02:34.630757 APIC: 04: enabled 1
755 14:02:34.633810 APIC: 03: enabled 1
756 14:02:34.637034 APIC: 07: enabled 1
757 14:02:34.637152 DOMAIN: 0000: enabled 1
758 14:02:34.640686 PCI: 00:00.0: enabled 1
759 14:02:34.644259 PCI: 00:02.0: enabled 1
760 14:02:34.647248 PCI: 00:04.0: enabled 0
761 14:02:34.647343 PCI: 00:05.0: enabled 0
762 14:02:34.650756 PCI: 00:12.0: enabled 1
763 14:02:34.653908 PCI: 00:12.5: enabled 0
764 14:02:34.657043 PCI: 00:12.6: enabled 0
765 14:02:34.660643 PCI: 00:14.0: enabled 1
766 14:02:34.660758 USB0 port 0: enabled 1
767 14:02:34.663788 USB2 port 0: enabled 1
768 14:02:34.667126 USB2 port 1: enabled 1
769 14:02:34.670186 USB2 port 2: enabled 0
770 14:02:34.673990 USB2 port 3: enabled 0
771 14:02:34.677044 USB2 port 5: enabled 0
772 14:02:34.677155 USB2 port 6: enabled 1
773 14:02:34.680350 USB2 port 9: enabled 1
774 14:02:34.683571 USB3 port 0: enabled 1
775 14:02:34.687132 USB3 port 1: enabled 1
776 14:02:34.690269 USB3 port 2: enabled 1
777 14:02:34.690362 USB3 port 3: enabled 1
778 14:02:34.693377 USB3 port 4: enabled 0
779 14:02:34.697274 PCI: 00:14.1: enabled 0
780 14:02:34.700416 PCI: 00:14.3: enabled 1
781 14:02:34.703495 PCI: 00:14.5: enabled 0
782 14:02:34.703583 PCI: 00:15.0: enabled 1
783 14:02:34.706726 I2C: 00:15: enabled 1
784 14:02:34.709880 PCI: 00:15.1: enabled 1
785 14:02:34.713239 I2C: 00:5d: enabled 1
786 14:02:34.716553 GENERIC: 0.0: enabled 1
787 14:02:34.716677 PCI: 00:15.2: enabled 0
788 14:02:34.720312 PCI: 00:15.3: enabled 0
789 14:02:34.723631 PCI: 00:16.0: enabled 1
790 14:02:34.726743 PCI: 00:16.1: enabled 0
791 14:02:34.729796 PCI: 00:16.2: enabled 0
792 14:02:34.729910 PCI: 00:16.3: enabled 0
793 14:02:34.733091 PCI: 00:16.4: enabled 0
794 14:02:34.736589 PCI: 00:16.5: enabled 0
795 14:02:34.739642 PCI: 00:17.0: enabled 1
796 14:02:34.743385 PCI: 00:19.0: enabled 1
797 14:02:34.743502 I2C: 00:1a: enabled 1
798 14:02:34.746478 I2C: 00:38: enabled 1
799 14:02:34.749528 I2C: 00:39: enabled 1
800 14:02:34.753196 I2C: 00:3a: enabled 1
801 14:02:34.753311 I2C: 00:3b: enabled 1
802 14:02:34.756218 PCI: 00:19.1: enabled 0
803 14:02:34.759896 PCI: 00:19.2: enabled 0
804 14:02:34.763114 PCI: 00:1a.0: enabled 0
805 14:02:34.766504 PCI: 00:1c.0: enabled 0
806 14:02:34.766598 PCI: 00:1c.1: enabled 0
807 14:02:34.769702 PCI: 00:1c.2: enabled 0
808 14:02:34.772995 PCI: 00:1c.3: enabled 0
809 14:02:34.776111 PCI: 00:1c.4: enabled 0
810 14:02:34.779231 PCI: 00:1c.5: enabled 0
811 14:02:34.779334 PCI: 00:1c.6: enabled 0
812 14:02:34.782418 PCI: 00:1c.7: enabled 0
813 14:02:34.786202 PCI: 00:1d.0: enabled 1
814 14:02:34.789319 PCI: 00:1d.1: enabled 0
815 14:02:34.792222 PCI: 00:1d.2: enabled 0
816 14:02:34.792350 PCI: 00:1d.3: enabled 0
817 14:02:34.795873 PCI: 00:1d.4: enabled 0
818 14:02:34.799071 PCI: 00:1d.5: enabled 1
819 14:02:34.802312 PCI: 00:00.0: enabled 1
820 14:02:34.806042 PCI: 00:1e.0: enabled 1
821 14:02:34.806179 PCI: 00:1e.1: enabled 0
822 14:02:34.809135 PCI: 00:1e.2: enabled 1
823 14:02:34.812365 SPI: 00: enabled 1
824 14:02:34.815694 PCI: 00:1e.3: enabled 1
825 14:02:34.815836 SPI: 01: enabled 1
826 14:02:34.818751 PCI: 00:1f.0: enabled 1
827 14:02:34.821833 PNP: 0c09.0: enabled 1
828 14:02:34.825695 PCI: 00:1f.1: enabled 1
829 14:02:34.828811 PCI: 00:1f.2: enabled 1
830 14:02:34.828933 PCI: 00:1f.3: enabled 1
831 14:02:34.832050 PCI: 00:1f.4: enabled 1
832 14:02:34.835071 PCI: 00:1f.5: enabled 1
833 14:02:34.838943 PCI: 00:1f.6: enabled 0
834 14:02:34.839058 Root Device scanning...
835 14:02:34.842096 scan_static_bus for Root Device
836 14:02:34.845861 CPU_CLUSTER: 0 enabled
837 14:02:34.849089 DOMAIN: 0000 enabled
838 14:02:34.852375 DOMAIN: 0000 scanning...
839 14:02:34.855418 PCI: pci_scan_bus for bus 00
840 14:02:34.855508 PCI: 00:00.0 [8086/0000] ops
841 14:02:34.858881 PCI: 00:00.0 [8086/9b61] enabled
842 14:02:34.861943 PCI: 00:02.0 [8086/0000] bus ops
843 14:02:34.865075 PCI: 00:02.0 [8086/9b41] enabled
844 14:02:34.871827 PCI: 00:04.0 [8086/1903] disabled
845 14:02:34.875117 PCI: 00:08.0 [8086/1911] enabled
846 14:02:34.879056 PCI: 00:12.0 [8086/02f9] enabled
847 14:02:34.882183 PCI: 00:14.0 [8086/0000] bus ops
848 14:02:34.885247 PCI: 00:14.0 [8086/02ed] enabled
849 14:02:34.888600 PCI: 00:14.2 [8086/02ef] enabled
850 14:02:34.891718 PCI: 00:14.3 [8086/02f0] enabled
851 14:02:34.895432 PCI: 00:15.0 [8086/0000] bus ops
852 14:02:34.898385 PCI: 00:15.0 [8086/02e8] enabled
853 14:02:34.902112 PCI: 00:15.1 [8086/0000] bus ops
854 14:02:34.905302 PCI: 00:15.1 [8086/02e9] enabled
855 14:02:34.905394 PCI: 00:16.0 [8086/0000] ops
856 14:02:34.908608 PCI: 00:16.0 [8086/02e0] enabled
857 14:02:34.911722 PCI: 00:17.0 [8086/0000] ops
858 14:02:34.914986 PCI: 00:17.0 [8086/02d3] enabled
859 14:02:34.918867 PCI: 00:19.0 [8086/0000] bus ops
860 14:02:34.922043 PCI: 00:19.0 [8086/02c5] enabled
861 14:02:34.925262 PCI: 00:1d.0 [8086/0000] bus ops
862 14:02:34.928616 PCI: 00:1d.0 [8086/02b0] enabled
863 14:02:34.934982 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 14:02:34.938723 PCI: 00:1e.0 [8086/0000] ops
865 14:02:34.942016 PCI: 00:1e.0 [8086/02a8] enabled
866 14:02:34.945110 PCI: 00:1e.2 [8086/0000] bus ops
867 14:02:34.948311 PCI: 00:1e.2 [8086/02aa] enabled
868 14:02:34.951961 PCI: 00:1e.3 [8086/0000] bus ops
869 14:02:34.955085 PCI: 00:1e.3 [8086/02ab] enabled
870 14:02:34.958326 PCI: 00:1f.0 [8086/0000] bus ops
871 14:02:34.961499 PCI: 00:1f.0 [8086/0284] enabled
872 14:02:34.968135 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 14:02:34.971672 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 14:02:34.975234 PCI: 00:1f.3 [8086/0000] bus ops
875 14:02:34.978244 PCI: 00:1f.3 [8086/02c8] enabled
876 14:02:34.981447 PCI: 00:1f.4 [8086/0000] bus ops
877 14:02:34.984628 PCI: 00:1f.4 [8086/02a3] enabled
878 14:02:34.988613 PCI: 00:1f.5 [8086/0000] bus ops
879 14:02:34.991791 PCI: 00:1f.5 [8086/02a4] enabled
880 14:02:34.994890 PCI: Leftover static devices:
881 14:02:34.998173 PCI: 00:05.0
882 14:02:34.998269 PCI: 00:12.5
883 14:02:34.998345 PCI: 00:12.6
884 14:02:35.001370 PCI: 00:14.1
885 14:02:35.001458 PCI: 00:14.5
886 14:02:35.004959 PCI: 00:15.2
887 14:02:35.005055 PCI: 00:15.3
888 14:02:35.007996 PCI: 00:16.1
889 14:02:35.008111 PCI: 00:16.2
890 14:02:35.008209 PCI: 00:16.3
891 14:02:35.011326 PCI: 00:16.4
892 14:02:35.011414 PCI: 00:16.5
893 14:02:35.015098 PCI: 00:19.1
894 14:02:35.015187 PCI: 00:19.2
895 14:02:35.015257 PCI: 00:1a.0
896 14:02:35.018423 PCI: 00:1c.0
897 14:02:35.018514 PCI: 00:1c.1
898 14:02:35.021415 PCI: 00:1c.2
899 14:02:35.021504 PCI: 00:1c.3
900 14:02:35.021586 PCI: 00:1c.4
901 14:02:35.024599 PCI: 00:1c.5
902 14:02:35.024689 PCI: 00:1c.6
903 14:02:35.027873 PCI: 00:1c.7
904 14:02:35.027966 PCI: 00:1d.1
905 14:02:35.031079 PCI: 00:1d.2
906 14:02:35.031166 PCI: 00:1d.3
907 14:02:35.031237 PCI: 00:1d.4
908 14:02:35.034934 PCI: 00:1d.5
909 14:02:35.035022 PCI: 00:1e.1
910 14:02:35.037986 PCI: 00:1f.1
911 14:02:35.038074 PCI: 00:1f.2
912 14:02:35.038144 PCI: 00:1f.6
913 14:02:35.041690 PCI: Check your devicetree.cb.
914 14:02:35.044291 PCI: 00:02.0 scanning...
915 14:02:35.048252 scan_generic_bus for PCI: 00:02.0
916 14:02:35.051327 scan_generic_bus for PCI: 00:02.0 done
917 14:02:35.057544 scan_bus: scanning of bus PCI: 00:02.0 took 10175 usecs
918 14:02:35.061239 PCI: 00:14.0 scanning...
919 14:02:35.064535 scan_static_bus for PCI: 00:14.0
920 14:02:35.067682 USB0 port 0 enabled
921 14:02:35.067775 USB0 port 0 scanning...
922 14:02:35.070831 scan_static_bus for USB0 port 0
923 14:02:35.074584 USB2 port 0 enabled
924 14:02:35.077673 USB2 port 1 enabled
925 14:02:35.077768 USB2 port 2 disabled
926 14:02:35.081211 USB2 port 3 disabled
927 14:02:35.084321 USB2 port 5 disabled
928 14:02:35.084407 USB2 port 6 enabled
929 14:02:35.087366 USB2 port 9 enabled
930 14:02:35.087492 USB3 port 0 enabled
931 14:02:35.090682 USB3 port 1 enabled
932 14:02:35.094594 USB3 port 2 enabled
933 14:02:35.094687 USB3 port 3 enabled
934 14:02:35.097843 USB3 port 4 disabled
935 14:02:35.101040 USB2 port 0 scanning...
936 14:02:35.104437 scan_static_bus for USB2 port 0
937 14:02:35.107360 scan_static_bus for USB2 port 0 done
938 14:02:35.110645 scan_bus: scanning of bus USB2 port 0 took 9713 usecs
939 14:02:35.114280 USB2 port 1 scanning...
940 14:02:35.117542 scan_static_bus for USB2 port 1
941 14:02:35.120762 scan_static_bus for USB2 port 1 done
942 14:02:35.127295 scan_bus: scanning of bus USB2 port 1 took 9717 usecs
943 14:02:35.130437 USB2 port 6 scanning...
944 14:02:35.133851 scan_static_bus for USB2 port 6
945 14:02:35.137560 scan_static_bus for USB2 port 6 done
946 14:02:35.140721 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
947 14:02:35.143851 USB2 port 9 scanning...
948 14:02:35.147461 scan_static_bus for USB2 port 9
949 14:02:35.150661 scan_static_bus for USB2 port 9 done
950 14:02:35.156918 scan_bus: scanning of bus USB2 port 9 took 9710 usecs
951 14:02:35.160763 USB3 port 0 scanning...
952 14:02:35.163845 scan_static_bus for USB3 port 0
953 14:02:35.166978 scan_static_bus for USB3 port 0 done
954 14:02:35.173945 scan_bus: scanning of bus USB3 port 0 took 9712 usecs
955 14:02:35.174130 USB3 port 1 scanning...
956 14:02:35.176941 scan_static_bus for USB3 port 1
957 14:02:35.180730 scan_static_bus for USB3 port 1 done
958 14:02:35.186945 scan_bus: scanning of bus USB3 port 1 took 9711 usecs
959 14:02:35.190167 USB3 port 2 scanning...
960 14:02:35.193794 scan_static_bus for USB3 port 2
961 14:02:35.196985 scan_static_bus for USB3 port 2 done
962 14:02:35.203454 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
963 14:02:35.203574 USB3 port 3 scanning...
964 14:02:35.207278 scan_static_bus for USB3 port 3
965 14:02:35.210385 scan_static_bus for USB3 port 3 done
966 14:02:35.216714 scan_bus: scanning of bus USB3 port 3 took 9710 usecs
967 14:02:35.220513 scan_static_bus for USB0 port 0 done
968 14:02:35.226880 scan_bus: scanning of bus USB0 port 0 took 155434 usecs
969 14:02:35.230186 scan_static_bus for PCI: 00:14.0 done
970 14:02:35.237227 scan_bus: scanning of bus PCI: 00:14.0 took 173051 usecs
971 14:02:35.237381 PCI: 00:15.0 scanning...
972 14:02:35.243656 scan_generic_bus for PCI: 00:15.0
973 14:02:35.247413 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 14:02:35.250489 scan_generic_bus for PCI: 00:15.0 done
975 14:02:35.257196 scan_bus: scanning of bus PCI: 00:15.0 took 14307 usecs
976 14:02:35.257338 PCI: 00:15.1 scanning...
977 14:02:35.260503 scan_generic_bus for PCI: 00:15.1
978 14:02:35.266996 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 14:02:35.270140 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 14:02:35.273861 scan_generic_bus for PCI: 00:15.1 done
981 14:02:35.280132 scan_bus: scanning of bus PCI: 00:15.1 took 18653 usecs
982 14:02:35.283379 PCI: 00:19.0 scanning...
983 14:02:35.287230 scan_generic_bus for PCI: 00:19.0
984 14:02:35.290100 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 14:02:35.293437 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 14:02:35.296541 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 14:02:35.303579 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 14:02:35.306729 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 14:02:35.310031 scan_generic_bus for PCI: 00:19.0 done
990 14:02:35.316716 scan_bus: scanning of bus PCI: 00:19.0 took 30755 usecs
991 14:02:35.320023 PCI: 00:1d.0 scanning...
992 14:02:35.323150 do_pci_scan_bridge for PCI: 00:1d.0
993 14:02:35.327011 PCI: pci_scan_bus for bus 01
994 14:02:35.330079 PCI: 01:00.0 [1c5c/1327] enabled
995 14:02:35.333523 Enabling Common Clock Configuration
996 14:02:35.336688 L1 Sub-State supported from root port 29
997 14:02:35.340065 L1 Sub-State Support = 0xf
998 14:02:35.343315 CommonModeRestoreTime = 0x28
999 14:02:35.346560 Power On Value = 0x16, Power On Scale = 0x0
1000 14:02:35.349791 ASPM: Enabled L1
1001 14:02:35.353071 scan_bus: scanning of bus PCI: 00:1d.0 took 32800 usecs
1002 14:02:35.356862 PCI: 00:1e.2 scanning...
1003 14:02:35.359946 scan_generic_bus for PCI: 00:1e.2
1004 14:02:35.362833 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 14:02:35.366198 scan_generic_bus for PCI: 00:1e.2 done
1006 14:02:35.373480 scan_bus: scanning of bus PCI: 00:1e.2 took 14006 usecs
1007 14:02:35.376864 PCI: 00:1e.3 scanning...
1008 14:02:35.379864 scan_generic_bus for PCI: 00:1e.3
1009 14:02:35.382797 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 14:02:35.386447 scan_generic_bus for PCI: 00:1e.3 done
1011 14:02:35.392532 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1012 14:02:35.396330 PCI: 00:1f.0 scanning...
1013 14:02:35.399526 scan_static_bus for PCI: 00:1f.0
1014 14:02:35.402680 PNP: 0c09.0 enabled
1015 14:02:35.406205 scan_static_bus for PCI: 00:1f.0 done
1016 14:02:35.409294 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1017 14:02:35.412478 PCI: 00:1f.3 scanning...
1018 14:02:35.419423 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1019 14:02:35.422641 PCI: 00:1f.4 scanning...
1020 14:02:35.426177 scan_generic_bus for PCI: 00:1f.4
1021 14:02:35.429483 scan_generic_bus for PCI: 00:1f.4 done
1022 14:02:35.436105 scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs
1023 14:02:35.436217 PCI: 00:1f.5 scanning...
1024 14:02:35.442703 scan_generic_bus for PCI: 00:1f.5
1025 14:02:35.445964 scan_generic_bus for PCI: 00:1f.5 done
1026 14:02:35.449208 scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs
1027 14:02:35.455607 scan_bus: scanning of bus DOMAIN: 0000 took 605266 usecs
1028 14:02:35.458904 scan_static_bus for Root Device done
1029 14:02:35.465300 scan_bus: scanning of bus Root Device took 625144 usecs
1030 14:02:35.465431 done
1031 14:02:35.468851 Chrome EC: UHEPI supported
1032 14:02:35.475302 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 14:02:35.481828 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 14:02:35.488534 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 14:02:35.495275 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 14:02:35.498264 SPI flash protection: WPSW=0 SRP0=1
1037 14:02:35.502005 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 14:02:35.508629 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 14:02:35.511798 found VGA at PCI: 00:02.0
1040 14:02:35.514804 Setting up VGA for PCI: 00:02.0
1041 14:02:35.518361 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 14:02:35.525327 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 14:02:35.525430 Allocating resources...
1044 14:02:35.528265 Reading resources...
1045 14:02:35.531635 Root Device read_resources bus 0 link: 0
1046 14:02:35.538580 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 14:02:35.541749 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 14:02:35.548065 DOMAIN: 0000 read_resources bus 0 link: 0
1049 14:02:35.551411 PCI: 00:14.0 read_resources bus 0 link: 0
1050 14:02:35.558573 USB0 port 0 read_resources bus 0 link: 0
1051 14:02:35.564990 USB0 port 0 read_resources bus 0 link: 0 done
1052 14:02:35.568787 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 14:02:35.575757 PCI: 00:15.0 read_resources bus 1 link: 0
1054 14:02:35.579668 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 14:02:35.586054 PCI: 00:15.1 read_resources bus 2 link: 0
1056 14:02:35.589051 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 14:02:35.596643 PCI: 00:19.0 read_resources bus 3 link: 0
1058 14:02:35.603272 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 14:02:35.606892 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 14:02:35.613023 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 14:02:35.616619 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 14:02:35.623212 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 14:02:35.626795 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 14:02:35.633042 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 14:02:35.636500 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 14:02:35.643263 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 14:02:35.649789 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 14:02:35.652815 Root Device read_resources bus 0 link: 0 done
1069 14:02:35.656788 Done reading resources.
1070 14:02:35.659840 Show resources in subtree (Root Device)...After reading.
1071 14:02:35.666434 Root Device child on link 0 CPU_CLUSTER: 0
1072 14:02:35.669629 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 14:02:35.669728 APIC: 00
1074 14:02:35.672790 APIC: 02
1075 14:02:35.672880 APIC: 05
1076 14:02:35.676664 APIC: 06
1077 14:02:35.676750 APIC: 01
1078 14:02:35.676819 APIC: 04
1079 14:02:35.679708 APIC: 03
1080 14:02:35.679791 APIC: 07
1081 14:02:35.682930 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 14:02:35.736037 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 14:02:35.736367 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 14:02:35.736470 PCI: 00:00.0
1085 14:02:35.736553 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 14:02:35.736801 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 14:02:35.737219 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 14:02:35.757790 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 14:02:35.758107 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 14:02:35.761679 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 14:02:35.771238 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 14:02:35.781121 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 14:02:35.787986 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 14:02:35.798021 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 14:02:35.807891 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 14:02:35.817335 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 14:02:35.827560 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 14:02:35.837088 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 14:02:35.847495 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 14:02:35.853659 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 14:02:35.856978 PCI: 00:02.0
1102 14:02:35.867434 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 14:02:35.877612 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 14:02:35.887341 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 14:02:35.887494 PCI: 00:04.0
1106 14:02:35.890555 PCI: 00:08.0
1107 14:02:35.900251 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 14:02:35.900373 PCI: 00:12.0
1109 14:02:35.910599 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 14:02:35.913615 PCI: 00:14.0 child on link 0 USB0 port 0
1111 14:02:35.923441 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 14:02:35.930347 USB0 port 0 child on link 0 USB2 port 0
1113 14:02:35.930513 USB2 port 0
1114 14:02:35.933982 USB2 port 1
1115 14:02:35.934119 USB2 port 2
1116 14:02:35.937020 USB2 port 3
1117 14:02:35.937178 USB2 port 5
1118 14:02:35.939937 USB2 port 6
1119 14:02:35.940049 USB2 port 9
1120 14:02:35.943751 USB3 port 0
1121 14:02:35.943898 USB3 port 1
1122 14:02:35.946755 USB3 port 2
1123 14:02:35.946901 USB3 port 3
1124 14:02:35.950313 USB3 port 4
1125 14:02:35.953299 PCI: 00:14.2
1126 14:02:35.963663 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 14:02:35.973468 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 14:02:35.973657 PCI: 00:14.3
1129 14:02:35.983233 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 14:02:35.986413 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 14:02:35.996466 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 14:02:36.000071 I2C: 01:15
1133 14:02:36.003088 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 14:02:36.013300 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 14:02:36.016435 I2C: 02:5d
1136 14:02:36.016634 GENERIC: 0.0
1137 14:02:36.019699 PCI: 00:16.0
1138 14:02:36.029829 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 14:02:36.029970 PCI: 00:17.0
1140 14:02:36.039776 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 14:02:36.049763 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 14:02:36.056209 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 14:02:36.066212 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 14:02:36.072984 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 14:02:36.082650 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 14:02:36.085912 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 14:02:36.095820 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 14:02:36.099150 I2C: 03:1a
1149 14:02:36.099243 I2C: 03:38
1150 14:02:36.099312 I2C: 03:39
1151 14:02:36.102352 I2C: 03:3a
1152 14:02:36.102444 I2C: 03:3b
1153 14:02:36.109335 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 14:02:36.115770 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 14:02:36.125406 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 14:02:36.135760 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 14:02:36.138941 PCI: 01:00.0
1158 14:02:36.148891 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 14:02:36.149015 PCI: 00:1e.0
1160 14:02:36.161923 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 14:02:36.171623 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 14:02:36.175265 PCI: 00:1e.2 child on link 0 SPI: 00
1163 14:02:36.184865 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 14:02:36.184986 SPI: 00
1165 14:02:36.188664 PCI: 00:1e.3 child on link 0 SPI: 01
1166 14:02:36.198479 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 14:02:36.201656 SPI: 01
1168 14:02:36.204706 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 14:02:36.214919 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 14:02:36.221821 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 14:02:36.224909 PNP: 0c09.0
1172 14:02:36.231224 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 14:02:36.235099 PCI: 00:1f.3
1174 14:02:36.244620 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 14:02:36.254719 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 14:02:36.257830 PCI: 00:1f.4
1177 14:02:36.264368 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 14:02:36.274310 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 14:02:36.277790 PCI: 00:1f.5
1180 14:02:36.287532 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 14:02:36.290681 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 14:02:36.297752 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 14:02:36.304497 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 14:02:36.307643 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 14:02:36.313963 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 14:02:36.317191 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 14:02:36.320959 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 14:02:36.327343 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 14:02:36.334312 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 14:02:36.340179 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 14:02:36.350371 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 14:02:36.356970 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 14:02:36.360527 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 14:02:36.367178 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 14:02:36.374068 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 14:02:36.377052 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 14:02:36.383957 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 14:02:36.387063 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 14:02:36.393897 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 14:02:36.397074 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 14:02:36.403619 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 14:02:36.406765 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 14:02:36.413096 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 14:02:36.416956 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 14:02:36.420086 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 14:02:36.426597 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 14:02:36.430192 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 14:02:36.436351 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 14:02:36.439895 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 14:02:36.446215 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 14:02:36.449401 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 14:02:36.456650 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 14:02:36.459840 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 14:02:36.466032 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 14:02:36.469738 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 14:02:36.476375 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 14:02:36.479667 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 14:02:36.489670 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 14:02:36.492448 avoid_fixed_resources: DOMAIN: 0000
1220 14:02:36.499185 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 14:02:36.502453 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 14:02:36.512188 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 14:02:36.518742 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 14:02:36.525889 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 14:02:36.535506 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 14:02:36.542286 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 14:02:36.548497 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 14:02:36.558848 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 14:02:36.565185 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 14:02:36.571724 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 14:02:36.578527 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 14:02:36.581505 Setting resources...
1233 14:02:36.588283 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 14:02:36.591728 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 14:02:36.594887 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 14:02:36.601733 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 14:02:36.605088 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 14:02:36.611664 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 14:02:36.618032 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 14:02:36.621203 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 14:02:36.631008 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 14:02:36.634206 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 14:02:36.641404 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 14:02:36.644492 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 14:02:36.651265 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 14:02:36.654176 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 14:02:36.660826 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 14:02:36.664110 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 14:02:36.671267 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 14:02:36.674287 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 14:02:36.680564 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 14:02:36.683763 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 14:02:36.690927 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 14:02:36.694266 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 14:02:36.697373 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 14:02:36.703992 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 14:02:36.707065 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 14:02:36.714055 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 14:02:36.717166 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 14:02:36.723953 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 14:02:36.727086 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 14:02:36.734171 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 14:02:36.737234 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 14:02:36.743657 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 14:02:36.750207 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 14:02:36.756430 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 14:02:36.763342 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 14:02:36.773157 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 14:02:36.776303 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 14:02:36.782859 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 14:02:36.789849 Root Device assign_resources, bus 0 link: 0
1272 14:02:36.793177 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 14:02:36.802645 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 14:02:36.809852 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 14:02:36.819087 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 14:02:36.826045 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 14:02:36.835855 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 14:02:36.842249 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 14:02:36.848732 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 14:02:36.852592 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 14:02:36.862212 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 14:02:36.869096 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 14:02:36.875764 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 14:02:36.885883 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 14:02:36.889086 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 14:02:36.895469 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 14:02:36.902541 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 14:02:36.908839 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 14:02:36.911940 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 14:02:36.921882 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 14:02:36.928805 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 14:02:36.935334 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 14:02:36.945161 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 14:02:36.952140 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 14:02:36.958661 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 14:02:36.968769 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 14:02:36.975506 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 14:02:36.978519 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 14:02:36.985067 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 14:02:36.991534 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 14:02:37.001811 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 14:02:37.011675 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 14:02:37.015015 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 14:02:37.024938 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 14:02:37.028111 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 14:02:37.038013 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 14:02:37.044852 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 14:02:37.047538 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 14:02:37.054918 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 14:02:37.061357 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 14:02:37.068052 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 14:02:37.071408 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 14:02:37.078006 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 14:02:37.081216 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 14:02:37.087901 LPC: Trying to open IO window from 800 size 1ff
1316 14:02:37.094057 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 14:02:37.100830 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 14:02:37.111269 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 14:02:37.117887 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 14:02:37.124500 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 14:02:37.127836 Root Device assign_resources, bus 0 link: 0
1322 14:02:37.131054 Done setting resources.
1323 14:02:37.137285 Show resources in subtree (Root Device)...After assigning values.
1324 14:02:37.140912 Root Device child on link 0 CPU_CLUSTER: 0
1325 14:02:37.147701 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 14:02:37.147820 APIC: 00
1327 14:02:37.147919 APIC: 02
1328 14:02:37.150777 APIC: 05
1329 14:02:37.150888 APIC: 06
1330 14:02:37.150982 APIC: 01
1331 14:02:37.154215 APIC: 04
1332 14:02:37.154299 APIC: 03
1333 14:02:37.157488 APIC: 07
1334 14:02:37.160820 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 14:02:37.170860 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 14:02:37.180693 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 14:02:37.184009 PCI: 00:00.0
1338 14:02:37.193773 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 14:02:37.200648 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 14:02:37.210531 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 14:02:37.220364 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 14:02:37.230398 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 14:02:37.240272 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 14:02:37.250092 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 14:02:37.256437 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 14:02:37.266403 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 14:02:37.276164 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 14:02:37.286198 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 14:02:37.296270 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 14:02:37.305969 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 14:02:37.315873 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 14:02:37.322638 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 14:02:37.332499 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 14:02:37.335616 PCI: 00:02.0
1355 14:02:37.345812 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 14:02:37.355817 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 14:02:37.365859 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 14:02:37.366008 PCI: 00:04.0
1359 14:02:37.369077 PCI: 00:08.0
1360 14:02:37.378987 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 14:02:37.379131 PCI: 00:12.0
1362 14:02:37.392142 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 14:02:37.395487 PCI: 00:14.0 child on link 0 USB0 port 0
1364 14:02:37.405223 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 14:02:37.408461 USB0 port 0 child on link 0 USB2 port 0
1366 14:02:37.411700 USB2 port 0
1367 14:02:37.411802 USB2 port 1
1368 14:02:37.415313 USB2 port 2
1369 14:02:37.415441 USB2 port 3
1370 14:02:37.418674 USB2 port 5
1371 14:02:37.421626 USB2 port 6
1372 14:02:37.421712 USB2 port 9
1373 14:02:37.425796 USB3 port 0
1374 14:02:37.426243 USB3 port 1
1375 14:02:37.429037 USB3 port 2
1376 14:02:37.429406 USB3 port 3
1377 14:02:37.432095 USB3 port 4
1378 14:02:37.432433 PCI: 00:14.2
1379 14:02:37.442012 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 14:02:37.451661 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 14:02:37.454890 PCI: 00:14.3
1382 14:02:37.464767 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 14:02:37.468362 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 14:02:37.478339 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 14:02:37.481806 I2C: 01:15
1386 14:02:37.484987 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 14:02:37.494353 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 14:02:37.497717 I2C: 02:5d
1389 14:02:37.497805 GENERIC: 0.0
1390 14:02:37.501035 PCI: 00:16.0
1391 14:02:37.511423 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 14:02:37.511533 PCI: 00:17.0
1393 14:02:37.524318 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 14:02:37.534921 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 14:02:37.541225 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 14:02:37.550902 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 14:02:37.560664 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 14:02:37.570572 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 14:02:37.574158 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 14:02:37.583927 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 14:02:37.587015 I2C: 03:1a
1402 14:02:37.587124 I2C: 03:38
1403 14:02:37.590128 I2C: 03:39
1404 14:02:37.590216 I2C: 03:3a
1405 14:02:37.593946 I2C: 03:3b
1406 14:02:37.597242 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 14:02:37.607015 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 14:02:37.617052 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 14:02:37.626860 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 14:02:37.629944 PCI: 01:00.0
1411 14:02:37.640081 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 14:02:37.640267 PCI: 00:1e.0
1413 14:02:37.653131 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 14:02:37.663024 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 14:02:37.666487 PCI: 00:1e.2 child on link 0 SPI: 00
1416 14:02:37.676625 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 14:02:37.676838 SPI: 00
1418 14:02:37.683281 PCI: 00:1e.3 child on link 0 SPI: 01
1419 14:02:37.692850 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 14:02:37.692992 SPI: 01
1421 14:02:37.696701 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 14:02:37.706516 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 14:02:37.716001 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 14:02:37.716170 PNP: 0c09.0
1425 14:02:37.725984 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 14:02:37.726139 PCI: 00:1f.3
1427 14:02:37.739124 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 14:02:37.748770 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 14:02:37.748922 PCI: 00:1f.4
1430 14:02:37.759407 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 14:02:37.768739 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 14:02:37.772106 PCI: 00:1f.5
1433 14:02:37.782314 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 14:02:37.785303 Done allocating resources.
1435 14:02:37.788990 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 14:02:37.792063 Enabling resources...
1437 14:02:37.795325 PCI: 00:00.0 subsystem <- 8086/9b61
1438 14:02:37.798831 PCI: 00:00.0 cmd <- 06
1439 14:02:37.802042 PCI: 00:02.0 subsystem <- 8086/9b41
1440 14:02:37.805238 PCI: 00:02.0 cmd <- 03
1441 14:02:37.808442 PCI: 00:08.0 cmd <- 06
1442 14:02:37.811798 PCI: 00:12.0 subsystem <- 8086/02f9
1443 14:02:37.814977 PCI: 00:12.0 cmd <- 02
1444 14:02:37.818241 PCI: 00:14.0 subsystem <- 8086/02ed
1445 14:02:37.821823 PCI: 00:14.0 cmd <- 02
1446 14:02:37.821915 PCI: 00:14.2 cmd <- 02
1447 14:02:37.828313 PCI: 00:14.3 subsystem <- 8086/02f0
1448 14:02:37.828451 PCI: 00:14.3 cmd <- 02
1449 14:02:37.831757 PCI: 00:15.0 subsystem <- 8086/02e8
1450 14:02:37.834605 PCI: 00:15.0 cmd <- 02
1451 14:02:37.838502 PCI: 00:15.1 subsystem <- 8086/02e9
1452 14:02:37.841819 PCI: 00:15.1 cmd <- 02
1453 14:02:37.844960 PCI: 00:16.0 subsystem <- 8086/02e0
1454 14:02:37.848120 PCI: 00:16.0 cmd <- 02
1455 14:02:37.851308 PCI: 00:17.0 subsystem <- 8086/02d3
1456 14:02:37.854772 PCI: 00:17.0 cmd <- 03
1457 14:02:37.858002 PCI: 00:19.0 subsystem <- 8086/02c5
1458 14:02:37.861672 PCI: 00:19.0 cmd <- 02
1459 14:02:37.865057 PCI: 00:1d.0 bridge ctrl <- 0013
1460 14:02:37.867880 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 14:02:37.871311 PCI: 00:1d.0 cmd <- 06
1462 14:02:37.874607 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 14:02:37.874705 PCI: 00:1e.0 cmd <- 06
1464 14:02:37.881768 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 14:02:37.881868 PCI: 00:1e.2 cmd <- 06
1466 14:02:37.885069 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 14:02:37.888543 PCI: 00:1e.3 cmd <- 02
1468 14:02:37.891576 PCI: 00:1f.0 subsystem <- 8086/0284
1469 14:02:37.895035 PCI: 00:1f.0 cmd <- 407
1470 14:02:37.898430 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 14:02:37.901550 PCI: 00:1f.3 cmd <- 02
1472 14:02:37.904711 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 14:02:37.908502 PCI: 00:1f.4 cmd <- 03
1474 14:02:37.911720 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 14:02:37.914870 PCI: 00:1f.5 cmd <- 406
1476 14:02:37.922793 PCI: 01:00.0 cmd <- 02
1477 14:02:37.928254 done.
1478 14:02:37.940580 ME: Version: 14.0.39.1367
1479 14:02:37.945275 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1480 14:02:37.948750 Initializing devices...
1481 14:02:37.948851 Root Device init ...
1482 14:02:37.955134 Chrome EC: Set SMI mask to 0x0000000000000000
1483 14:02:37.958225 Chrome EC: clear events_b mask to 0x0000000000000000
1484 14:02:37.965272 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 14:02:37.971587 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 14:02:37.978218 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 14:02:37.981626 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 14:02:37.984756 Root Device init finished in 35151 usecs
1489 14:02:37.988941 CPU_CLUSTER: 0 init ...
1490 14:02:37.994906 CPU_CLUSTER: 0 init finished in 2446 usecs
1491 14:02:37.999401 PCI: 00:00.0 init ...
1492 14:02:38.002474 CPU TDP: 15 Watts
1493 14:02:38.006263 CPU PL2 = 64 Watts
1494 14:02:38.009250 PCI: 00:00.0 init finished in 7079 usecs
1495 14:02:38.012961 PCI: 00:02.0 init ...
1496 14:02:38.015883 PCI: 00:02.0 init finished in 2242 usecs
1497 14:02:38.019638 PCI: 00:08.0 init ...
1498 14:02:38.022954 PCI: 00:08.0 init finished in 2252 usecs
1499 14:02:38.026049 PCI: 00:12.0 init ...
1500 14:02:38.029605 PCI: 00:12.0 init finished in 2251 usecs
1501 14:02:38.032966 PCI: 00:14.0 init ...
1502 14:02:38.035569 PCI: 00:14.0 init finished in 2252 usecs
1503 14:02:38.039447 PCI: 00:14.2 init ...
1504 14:02:38.042271 PCI: 00:14.2 init finished in 2251 usecs
1505 14:02:38.046135 PCI: 00:14.3 init ...
1506 14:02:38.048947 PCI: 00:14.3 init finished in 2270 usecs
1507 14:02:38.052770 PCI: 00:15.0 init ...
1508 14:02:38.055496 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 14:02:38.058815 PCI: 00:15.0 init finished in 5974 usecs
1510 14:02:38.062794 PCI: 00:15.1 init ...
1511 14:02:38.065944 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 14:02:38.069074 PCI: 00:15.1 init finished in 5973 usecs
1513 14:02:38.072954 PCI: 00:16.0 init ...
1514 14:02:38.075602 PCI: 00:16.0 init finished in 2251 usecs
1515 14:02:38.079656 PCI: 00:19.0 init ...
1516 14:02:38.082894 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 14:02:38.089533 PCI: 00:19.0 init finished in 5974 usecs
1518 14:02:38.089651 PCI: 00:1d.0 init ...
1519 14:02:38.092811 Initializing PCH PCIe bridge.
1520 14:02:38.096206 PCI: 00:1d.0 init finished in 5280 usecs
1521 14:02:38.100954 PCI: 00:1f.0 init ...
1522 14:02:38.104638 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 14:02:38.111326 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 14:02:38.111439 IOAPIC: ID = 0x02
1525 14:02:38.114439 IOAPIC: Dumping registers
1526 14:02:38.117750 reg 0x0000: 0x02000000
1527 14:02:38.120953 reg 0x0001: 0x00770020
1528 14:02:38.121074 reg 0x0002: 0x00000000
1529 14:02:38.127841 PCI: 00:1f.0 init finished in 23530 usecs
1530 14:02:38.131118 PCI: 00:1f.4 init ...
1531 14:02:38.134339 PCI: 00:1f.4 init finished in 2260 usecs
1532 14:02:38.145637 PCI: 01:00.0 init ...
1533 14:02:38.148882 PCI: 01:00.0 init finished in 2243 usecs
1534 14:02:38.152915 PNP: 0c09.0 init ...
1535 14:02:38.156111 Google Chrome EC uptime: 11.100 seconds
1536 14:02:38.162787 Google Chrome AP resets since EC boot: 0
1537 14:02:38.166200 Google Chrome most recent AP reset causes:
1538 14:02:38.172630 Google Chrome EC reset flags at last EC boot: reset-pin
1539 14:02:38.175948 PNP: 0c09.0 init finished in 20563 usecs
1540 14:02:38.179698 Devices initialized
1541 14:02:38.179803 Show all devs... After init.
1542 14:02:38.182922 Root Device: enabled 1
1543 14:02:38.186056 CPU_CLUSTER: 0: enabled 1
1544 14:02:38.189346 DOMAIN: 0000: enabled 1
1545 14:02:38.189455 APIC: 00: enabled 1
1546 14:02:38.192555 PCI: 00:00.0: enabled 1
1547 14:02:38.195883 PCI: 00:02.0: enabled 1
1548 14:02:38.199244 PCI: 00:04.0: enabled 0
1549 14:02:38.199338 PCI: 00:05.0: enabled 0
1550 14:02:38.202543 PCI: 00:12.0: enabled 1
1551 14:02:38.205669 PCI: 00:12.5: enabled 0
1552 14:02:38.205759 PCI: 00:12.6: enabled 0
1553 14:02:38.209519 PCI: 00:14.0: enabled 1
1554 14:02:38.212744 PCI: 00:14.1: enabled 0
1555 14:02:38.216246 PCI: 00:14.3: enabled 1
1556 14:02:38.216336 PCI: 00:14.5: enabled 0
1557 14:02:38.219294 PCI: 00:15.0: enabled 1
1558 14:02:38.222538 PCI: 00:15.1: enabled 1
1559 14:02:38.225568 PCI: 00:15.2: enabled 0
1560 14:02:38.225743 PCI: 00:15.3: enabled 0
1561 14:02:38.229244 PCI: 00:16.0: enabled 1
1562 14:02:38.232317 PCI: 00:16.1: enabled 0
1563 14:02:38.235396 PCI: 00:16.2: enabled 0
1564 14:02:38.235528 PCI: 00:16.3: enabled 0
1565 14:02:38.238629 PCI: 00:16.4: enabled 0
1566 14:02:38.242543 PCI: 00:16.5: enabled 0
1567 14:02:38.245910 PCI: 00:17.0: enabled 1
1568 14:02:38.246040 PCI: 00:19.0: enabled 1
1569 14:02:38.248564 PCI: 00:19.1: enabled 0
1570 14:02:38.251992 PCI: 00:19.2: enabled 0
1571 14:02:38.252114 PCI: 00:1a.0: enabled 0
1572 14:02:38.255366 PCI: 00:1c.0: enabled 0
1573 14:02:38.258621 PCI: 00:1c.1: enabled 0
1574 14:02:38.261930 PCI: 00:1c.2: enabled 0
1575 14:02:38.262052 PCI: 00:1c.3: enabled 0
1576 14:02:38.265332 PCI: 00:1c.4: enabled 0
1577 14:02:38.268925 PCI: 00:1c.5: enabled 0
1578 14:02:38.272078 PCI: 00:1c.6: enabled 0
1579 14:02:38.272210 PCI: 00:1c.7: enabled 0
1580 14:02:38.275149 PCI: 00:1d.0: enabled 1
1581 14:02:38.278483 PCI: 00:1d.1: enabled 0
1582 14:02:38.281884 PCI: 00:1d.2: enabled 0
1583 14:02:38.281994 PCI: 00:1d.3: enabled 0
1584 14:02:38.285063 PCI: 00:1d.4: enabled 0
1585 14:02:38.288283 PCI: 00:1d.5: enabled 0
1586 14:02:38.288381 PCI: 00:1e.0: enabled 1
1587 14:02:38.291523 PCI: 00:1e.1: enabled 0
1588 14:02:38.295474 PCI: 00:1e.2: enabled 1
1589 14:02:38.298701 PCI: 00:1e.3: enabled 1
1590 14:02:38.298801 PCI: 00:1f.0: enabled 1
1591 14:02:38.301952 PCI: 00:1f.1: enabled 0
1592 14:02:38.305300 PCI: 00:1f.2: enabled 0
1593 14:02:38.308694 PCI: 00:1f.3: enabled 1
1594 14:02:38.308788 PCI: 00:1f.4: enabled 1
1595 14:02:38.311949 PCI: 00:1f.5: enabled 1
1596 14:02:38.315058 PCI: 00:1f.6: enabled 0
1597 14:02:38.318198 USB0 port 0: enabled 1
1598 14:02:38.318288 I2C: 01:15: enabled 1
1599 14:02:38.321649 I2C: 02:5d: enabled 1
1600 14:02:38.324941 GENERIC: 0.0: enabled 1
1601 14:02:38.325032 I2C: 03:1a: enabled 1
1602 14:02:38.328189 I2C: 03:38: enabled 1
1603 14:02:38.331347 I2C: 03:39: enabled 1
1604 14:02:38.331509 I2C: 03:3a: enabled 1
1605 14:02:38.335118 I2C: 03:3b: enabled 1
1606 14:02:38.338323 PCI: 00:00.0: enabled 1
1607 14:02:38.338432 SPI: 00: enabled 1
1608 14:02:38.341463 SPI: 01: enabled 1
1609 14:02:38.344609 PNP: 0c09.0: enabled 1
1610 14:02:38.344707 USB2 port 0: enabled 1
1611 14:02:38.347845 USB2 port 1: enabled 1
1612 14:02:38.351705 USB2 port 2: enabled 0
1613 14:02:38.351804 USB2 port 3: enabled 0
1614 14:02:38.354491 USB2 port 5: enabled 0
1615 14:02:38.357805 USB2 port 6: enabled 1
1616 14:02:38.361042 USB2 port 9: enabled 1
1617 14:02:38.361130 USB3 port 0: enabled 1
1618 14:02:38.364495 USB3 port 1: enabled 1
1619 14:02:38.367905 USB3 port 2: enabled 1
1620 14:02:38.367997 USB3 port 3: enabled 1
1621 14:02:38.371252 USB3 port 4: enabled 0
1622 14:02:38.374421 APIC: 02: enabled 1
1623 14:02:38.374514 APIC: 05: enabled 1
1624 14:02:38.377696 APIC: 06: enabled 1
1625 14:02:38.380893 APIC: 01: enabled 1
1626 14:02:38.380997 APIC: 04: enabled 1
1627 14:02:38.384176 APIC: 03: enabled 1
1628 14:02:38.384374 APIC: 07: enabled 1
1629 14:02:38.388035 PCI: 00:08.0: enabled 1
1630 14:02:38.391298 PCI: 00:14.2: enabled 1
1631 14:02:38.394652 PCI: 01:00.0: enabled 1
1632 14:02:38.397917 Disabling ACPI via APMC:
1633 14:02:38.398070 done.
1634 14:02:38.404824 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 14:02:38.408296 ELOG: NV offset 0xaf0000 size 0x4000
1636 14:02:38.414281 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 14:02:38.420869 ELOG: Event(17) added with size 13 at 2023-05-19 14:02:37 UTC
1638 14:02:38.427355 POST: Unexpected post code in previous boot: 0x73
1639 14:02:38.434557 ELOG: Event(A3) added with size 11 at 2023-05-19 14:02:37 UTC
1640 14:02:38.440942 ELOG: Event(A6) added with size 13 at 2023-05-19 14:02:37 UTC
1641 14:02:38.447404 ELOG: Event(92) added with size 9 at 2023-05-19 14:02:37 UTC
1642 14:02:38.451071 ELOG: Event(93) added with size 9 at 2023-05-19 14:02:37 UTC
1643 14:02:38.457590 ELOG: Event(9A) added with size 9 at 2023-05-19 14:02:37 UTC
1644 14:02:38.464269 ELOG: Event(9E) added with size 10 at 2023-05-19 14:02:37 UTC
1645 14:02:38.470939 ELOG: Event(9F) added with size 14 at 2023-05-19 14:02:37 UTC
1646 14:02:38.477451 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1647 14:02:38.484317 ELOG: Event(A1) added with size 10 at 2023-05-19 14:02:37 UTC
1648 14:02:38.491019 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1649 14:02:38.497574 ELOG: Event(A0) added with size 9 at 2023-05-19 14:02:37 UTC
1650 14:02:38.500933 elog_add_boot_reason: Logged dev mode boot
1651 14:02:38.504229 Finalize devices...
1652 14:02:38.507208 PCI: 00:17.0 final
1653 14:02:38.507357 Devices finalized
1654 14:02:38.513563 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1655 14:02:38.516961 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1656 14:02:38.523570 ME: HFSTS1 : 0x90000245
1657 14:02:38.526775 ME: HFSTS2 : 0x3B850126
1658 14:02:38.530104 ME: HFSTS3 : 0x00000020
1659 14:02:38.533362 ME: HFSTS4 : 0x00004800
1660 14:02:38.536739 ME: HFSTS5 : 0x00000000
1661 14:02:38.543767 ME: HFSTS6 : 0x40400006
1662 14:02:38.546915 ME: Manufacturing Mode : NO
1663 14:02:38.549981 ME: FW Partition Table : OK
1664 14:02:38.553664 ME: Bringup Loader Failure : NO
1665 14:02:38.556814 ME: Firmware Init Complete : YES
1666 14:02:38.559973 ME: Boot Options Present : NO
1667 14:02:38.563146 ME: Update In Progress : NO
1668 14:02:38.566579 ME: D0i3 Support : YES
1669 14:02:38.569984 ME: Low Power State Enabled : NO
1670 14:02:38.573192 ME: CPU Replaced : NO
1671 14:02:38.576586 ME: CPU Replacement Valid : YES
1672 14:02:38.579937 ME: Current Working State : 5
1673 14:02:38.583285 ME: Current Operation State : 1
1674 14:02:38.586496 ME: Current Operation Mode : 0
1675 14:02:38.589655 ME: Error Code : 0
1676 14:02:38.592783 ME: CPU Debug Disabled : YES
1677 14:02:38.596319 ME: TXT Support : NO
1678 14:02:38.599542 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1679 14:02:38.606050 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1680 14:02:38.609405 CBFS @ c08000 size 3f8000
1681 14:02:38.616363 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1682 14:02:38.619493 CBFS: Locating 'fallback/dsdt.aml'
1683 14:02:38.622745 CBFS: Found @ offset 10bb80 size 3fa5
1684 14:02:38.625973 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1685 14:02:38.629586 CBFS @ c08000 size 3f8000
1686 14:02:38.636221 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1687 14:02:38.639351 CBFS: Locating 'fallback/slic'
1688 14:02:38.642659 CBFS: 'fallback/slic' not found.
1689 14:02:38.649182 ACPI: Writing ACPI tables at 99b3e000.
1690 14:02:38.649306 ACPI: * FACS
1691 14:02:38.652404 ACPI: * DSDT
1692 14:02:38.655850 Ramoops buffer: 0x100000@0x99a3d000.
1693 14:02:38.658922 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1694 14:02:38.665810 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1695 14:02:38.668847 Google Chrome EC: version:
1696 14:02:38.672275 ro: helios_v2.0.2659-56403530b
1697 14:02:38.675548 rw: helios_v2.0.2849-c41de27e7d
1698 14:02:38.675661 running image: 1
1699 14:02:38.680143 ACPI: * FADT
1700 14:02:38.680230 SCI is IRQ9
1701 14:02:38.686742 ACPI: added table 1/32, length now 40
1702 14:02:38.686832 ACPI: * SSDT
1703 14:02:38.690082 Found 1 CPU(s) with 8 core(s) each.
1704 14:02:38.693272 Error: Could not locate 'wifi_sar' in VPD.
1705 14:02:38.699711 Checking CBFS for default SAR values
1706 14:02:38.703020 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 14:02:38.706206 CBFS @ c08000 size 3f8000
1708 14:02:38.713184 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 14:02:38.716472 CBFS: Locating 'wifi_sar_defaults.hex'
1710 14:02:38.719724 CBFS: Found @ offset 5fac0 size 77
1711 14:02:38.722965 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1712 14:02:38.729389 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1713 14:02:38.732655 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1714 14:02:38.739640 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1715 14:02:38.742960 failed to find key in VPD: dsm_calib_r0_0
1716 14:02:38.752645 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1717 14:02:38.755895 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1718 14:02:38.759368 failed to find key in VPD: dsm_calib_r0_1
1719 14:02:38.769070 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1720 14:02:38.776127 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1721 14:02:38.778832 failed to find key in VPD: dsm_calib_r0_2
1722 14:02:38.789373 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1723 14:02:38.792026 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1724 14:02:38.798769 failed to find key in VPD: dsm_calib_r0_3
1725 14:02:38.805813 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1726 14:02:38.812455 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1727 14:02:38.815673 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1728 14:02:38.818796 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1729 14:02:38.822561 EC returned error result code 1
1730 14:02:38.826472 EC returned error result code 1
1731 14:02:38.830521 EC returned error result code 1
1732 14:02:38.837014 PS2K: Bad resp from EC. Vivaldi disabled!
1733 14:02:38.840102 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1734 14:02:38.846445 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1735 14:02:38.853499 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1736 14:02:38.856763 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1737 14:02:38.863459 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1738 14:02:38.870012 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1739 14:02:38.876645 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1740 14:02:38.879792 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1741 14:02:38.886410 ACPI: added table 2/32, length now 44
1742 14:02:38.886506 ACPI: * MCFG
1743 14:02:38.889696 ACPI: added table 3/32, length now 48
1744 14:02:38.893310 ACPI: * TPM2
1745 14:02:38.896545 TPM2 log created at 99a2d000
1746 14:02:38.899837 ACPI: added table 4/32, length now 52
1747 14:02:38.900083 ACPI: * MADT
1748 14:02:38.903093 SCI is IRQ9
1749 14:02:38.906323 ACPI: added table 5/32, length now 56
1750 14:02:38.906518 current = 99b43ac0
1751 14:02:38.909507 ACPI: * DMAR
1752 14:02:38.912918 ACPI: added table 6/32, length now 60
1753 14:02:38.916203 ACPI: * IGD OpRegion
1754 14:02:38.916340 GMA: Found VBT in CBFS
1755 14:02:38.919433 GMA: Found valid VBT in CBFS
1756 14:02:38.922836 ACPI: added table 7/32, length now 64
1757 14:02:38.926596 ACPI: * HPET
1758 14:02:38.929675 ACPI: added table 8/32, length now 68
1759 14:02:38.929773 ACPI: done.
1760 14:02:38.932913 ACPI tables: 31744 bytes.
1761 14:02:38.936190 smbios_write_tables: 99a2c000
1762 14:02:38.940096 EC returned error result code 3
1763 14:02:38.943209 Couldn't obtain OEM name from CBI
1764 14:02:38.946425 Create SMBIOS type 17
1765 14:02:38.949886 PCI: 00:00.0 (Intel Cannonlake)
1766 14:02:38.953066 PCI: 00:14.3 (Intel WiFi)
1767 14:02:38.956191 SMBIOS tables: 939 bytes.
1768 14:02:38.959758 Writing table forward entry at 0x00000500
1769 14:02:38.966317 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1770 14:02:38.969581 Writing coreboot table at 0x99b62000
1771 14:02:38.976097 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1772 14:02:38.979261 1. 0000000000001000-000000000009ffff: RAM
1773 14:02:38.983033 2. 00000000000a0000-00000000000fffff: RESERVED
1774 14:02:38.989156 3. 0000000000100000-0000000099a2bfff: RAM
1775 14:02:38.992439 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1776 14:02:38.999224 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1777 14:02:39.005825 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1778 14:02:39.008973 7. 000000009a000000-000000009f7fffff: RESERVED
1779 14:02:39.015803 8. 00000000e0000000-00000000efffffff: RESERVED
1780 14:02:39.019002 9. 00000000fc000000-00000000fc000fff: RESERVED
1781 14:02:39.022237 10. 00000000fe000000-00000000fe00ffff: RESERVED
1782 14:02:39.028897 11. 00000000fed10000-00000000fed17fff: RESERVED
1783 14:02:39.032118 12. 00000000fed80000-00000000fed83fff: RESERVED
1784 14:02:39.039063 13. 00000000fed90000-00000000fed91fff: RESERVED
1785 14:02:39.042206 14. 00000000feda0000-00000000feda1fff: RESERVED
1786 14:02:39.048790 15. 0000000100000000-000000045e7fffff: RAM
1787 14:02:39.051978 Graphics framebuffer located at 0xc0000000
1788 14:02:39.055700 Passing 5 GPIOs to payload:
1789 14:02:39.058836 NAME | PORT | POLARITY | VALUE
1790 14:02:39.065200 write protect | undefined | high | low
1791 14:02:39.069065 lid | undefined | high | high
1792 14:02:39.075102 power | undefined | high | low
1793 14:02:39.081875 oprom | undefined | high | low
1794 14:02:39.085214 EC in RW | 0x000000cb | high | low
1795 14:02:39.088379 Board ID: 4
1796 14:02:39.091631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1797 14:02:39.094978 CBFS @ c08000 size 3f8000
1798 14:02:39.101417 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1799 14:02:39.108090 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1800 14:02:39.108191 coreboot table: 1492 bytes.
1801 14:02:39.111312 IMD ROOT 0. 99fff000 00001000
1802 14:02:39.115085 IMD SMALL 1. 99ffe000 00001000
1803 14:02:39.118336 FSP MEMORY 2. 99c4e000 003b0000
1804 14:02:39.121634 CONSOLE 3. 99c2e000 00020000
1805 14:02:39.124930 FMAP 4. 99c2d000 0000054e
1806 14:02:39.127694 TIME STAMP 5. 99c2c000 00000910
1807 14:02:39.131110 VBOOT WORK 6. 99c18000 00014000
1808 14:02:39.134329 MRC DATA 7. 99c16000 00001958
1809 14:02:39.138099 ROMSTG STCK 8. 99c15000 00001000
1810 14:02:39.141281 AFTER CAR 9. 99c0b000 0000a000
1811 14:02:39.144411 RAMSTAGE 10. 99baf000 0005c000
1812 14:02:39.147542 REFCODE 11. 99b7a000 00035000
1813 14:02:39.150941 SMM BACKUP 12. 99b6a000 00010000
1814 14:02:39.157497 COREBOOT 13. 99b62000 00008000
1815 14:02:39.161345 ACPI 14. 99b3e000 00024000
1816 14:02:39.164487 ACPI GNVS 15. 99b3d000 00001000
1817 14:02:39.167893 RAMOOPS 16. 99a3d000 00100000
1818 14:02:39.171194 TPM2 TCGLOG17. 99a2d000 00010000
1819 14:02:39.174197 SMBIOS 18. 99a2c000 00000800
1820 14:02:39.174284 IMD small region:
1821 14:02:39.177374 IMD ROOT 0. 99ffec00 00000400
1822 14:02:39.180844 FSP RUNTIME 1. 99ffebe0 00000004
1823 14:02:39.184147 EC HOSTEVENT 2. 99ffebc0 00000008
1824 14:02:39.187378 POWER STATE 3. 99ffeb80 00000040
1825 14:02:39.190626 ROMSTAGE 4. 99ffeb60 00000004
1826 14:02:39.194543 MEM INFO 5. 99ffe9a0 000001b9
1827 14:02:39.201032 VPD 6. 99ffe920 0000006c
1828 14:02:39.201161 MTRR: Physical address space:
1829 14:02:39.207610 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1830 14:02:39.214297 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1831 14:02:39.220886 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1832 14:02:39.227508 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1833 14:02:39.234107 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1834 14:02:39.240793 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1835 14:02:39.247240 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1836 14:02:39.250683 MTRR: Fixed MSR 0x250 0x0606060606060606
1837 14:02:39.253403 MTRR: Fixed MSR 0x258 0x0606060606060606
1838 14:02:39.256815 MTRR: Fixed MSR 0x259 0x0000000000000000
1839 14:02:39.263362 MTRR: Fixed MSR 0x268 0x0606060606060606
1840 14:02:39.267170 MTRR: Fixed MSR 0x269 0x0606060606060606
1841 14:02:39.270536 MTRR: Fixed MSR 0x26a 0x0606060606060606
1842 14:02:39.273761 MTRR: Fixed MSR 0x26b 0x0606060606060606
1843 14:02:39.280036 MTRR: Fixed MSR 0x26c 0x0606060606060606
1844 14:02:39.283256 MTRR: Fixed MSR 0x26d 0x0606060606060606
1845 14:02:39.286538 MTRR: Fixed MSR 0x26e 0x0606060606060606
1846 14:02:39.289989 MTRR: Fixed MSR 0x26f 0x0606060606060606
1847 14:02:39.293339 call enable_fixed_mtrr()
1848 14:02:39.296611 CPU physical address size: 39 bits
1849 14:02:39.303317 MTRR: default type WB/UC MTRR counts: 6/8.
1850 14:02:39.306563 MTRR: WB selected as default type.
1851 14:02:39.313187 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1852 14:02:39.316493 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1853 14:02:39.322874 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1854 14:02:39.330101 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1855 14:02:39.336775 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1856 14:02:39.342680 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1857 14:02:39.346080 MTRR: Fixed MSR 0x250 0x0606060606060606
1858 14:02:39.353028 MTRR: Fixed MSR 0x258 0x0606060606060606
1859 14:02:39.356116 MTRR: Fixed MSR 0x259 0x0000000000000000
1860 14:02:39.359953 MTRR: Fixed MSR 0x268 0x0606060606060606
1861 14:02:39.363233 MTRR: Fixed MSR 0x269 0x0606060606060606
1862 14:02:39.369401 MTRR: Fixed MSR 0x26a 0x0606060606060606
1863 14:02:39.372650 MTRR: Fixed MSR 0x26b 0x0606060606060606
1864 14:02:39.375916 MTRR: Fixed MSR 0x26c 0x0606060606060606
1865 14:02:39.379189 MTRR: Fixed MSR 0x26d 0x0606060606060606
1866 14:02:39.386052 MTRR: Fixed MSR 0x26e 0x0606060606060606
1867 14:02:39.389393 MTRR: Fixed MSR 0x26f 0x0606060606060606
1868 14:02:39.389500
1869 14:02:39.389622 MTRR check
1870 14:02:39.392735 Fixed MTRRs : Enabled
1871 14:02:39.396039 Variable MTRRs: Enabled
1872 14:02:39.396159
1873 14:02:39.399375 call enable_fixed_mtrr()
1874 14:02:39.402782 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1875 14:02:39.405960 CPU physical address size: 39 bits
1876 14:02:39.412425 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1877 14:02:39.415830 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 14:02:39.419109 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 14:02:39.426086 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 14:02:39.429056 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 14:02:39.432529 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 14:02:39.435780 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 14:02:39.442315 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 14:02:39.445869 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 14:02:39.449023 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 14:02:39.452340 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 14:02:39.455812 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 14:02:39.462699 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 14:02:39.465637 MTRR: Fixed MSR 0x258 0x0606060606060606
1890 14:02:39.468797 MTRR: Fixed MSR 0x259 0x0000000000000000
1891 14:02:39.475381 MTRR: Fixed MSR 0x268 0x0606060606060606
1892 14:02:39.478801 MTRR: Fixed MSR 0x269 0x0606060606060606
1893 14:02:39.482005 MTRR: Fixed MSR 0x26a 0x0606060606060606
1894 14:02:39.485280 MTRR: Fixed MSR 0x26b 0x0606060606060606
1895 14:02:39.488586 MTRR: Fixed MSR 0x26c 0x0606060606060606
1896 14:02:39.495496 MTRR: Fixed MSR 0x26d 0x0606060606060606
1897 14:02:39.498934 MTRR: Fixed MSR 0x26e 0x0606060606060606
1898 14:02:39.501646 MTRR: Fixed MSR 0x26f 0x0606060606060606
1899 14:02:39.505244 call enable_fixed_mtrr()
1900 14:02:39.508538 call enable_fixed_mtrr()
1901 14:02:39.511803 CPU physical address size: 39 bits
1902 14:02:39.515151 CPU physical address size: 39 bits
1903 14:02:39.518295 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 14:02:39.524916 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 14:02:39.528220 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 14:02:39.531392 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 14:02:39.535150 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 14:02:39.538351 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 14:02:39.544914 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 14:02:39.548343 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 14:02:39.551648 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 14:02:39.555053 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 14:02:39.561535 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 14:02:39.564971 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 14:02:39.568209 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 14:02:39.571225 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 14:02:39.577727 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 14:02:39.581452 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 14:02:39.584542 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 14:02:39.587771 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 14:02:39.594392 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 14:02:39.597728 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 14:02:39.600658 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 14:02:39.604592 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 14:02:39.608357 call enable_fixed_mtrr()
1926 14:02:39.611453 call enable_fixed_mtrr()
1927 14:02:39.614789 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 14:02:39.617986 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 14:02:39.624258 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 14:02:39.627648 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 14:02:39.630968 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 14:02:39.634193 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 14:02:39.637956 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 14:02:39.644423 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 14:02:39.647840 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 14:02:39.651091 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 14:02:39.654350 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 14:02:39.660915 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 14:02:39.664176 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 14:02:39.667594 call enable_fixed_mtrr()
1941 14:02:39.670879 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 14:02:39.674187 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 14:02:39.677410 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 14:02:39.684175 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 14:02:39.687247 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 14:02:39.690666 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 14:02:39.694139 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 14:02:39.700695 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 14:02:39.703787 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 14:02:39.707125 CPU physical address size: 39 bits
1951 14:02:39.710257 call enable_fixed_mtrr()
1952 14:02:39.714062 CBFS @ c08000 size 3f8000
1953 14:02:39.717195 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1954 14:02:39.720200 CBFS: Locating 'fallback/payload'
1955 14:02:39.726962 CPU physical address size: 39 bits
1956 14:02:39.730354 CPU physical address size: 39 bits
1957 14:02:39.733521 CPU physical address size: 39 bits
1958 14:02:39.736767 CBFS: Found @ offset 1c96c0 size 3f798
1959 14:02:39.740071 Checking segment from ROM address 0xffdd16f8
1960 14:02:39.746814 Checking segment from ROM address 0xffdd1714
1961 14:02:39.749970 Loading segment from ROM address 0xffdd16f8
1962 14:02:39.753310 code (compression=0)
1963 14:02:39.759930 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1964 14:02:39.769911 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1965 14:02:39.770029 it's not compressed!
1966 14:02:39.863890 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1967 14:02:39.870409 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1968 14:02:39.873873 Loading segment from ROM address 0xffdd1714
1969 14:02:39.877077 Entry Point 0x30000000
1970 14:02:39.880399 Loaded segments
1971 14:02:39.886257 Finalizing chipset.
1972 14:02:39.889409 Finalizing SMM.
1973 14:02:39.892587 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1974 14:02:39.895788 mp_park_aps done after 0 msecs.
1975 14:02:39.902354 Jumping to boot code at 30000000(99b62000)
1976 14:02:39.909123 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1977 14:02:39.909207
1978 14:02:39.909274
1979 14:02:39.909336
1980 14:02:39.912385 Starting depthcharge on Helios...
1981 14:02:39.912471
1982 14:02:39.912810 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1983 14:02:39.912909 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1984 14:02:39.912991 Setting prompt string to ['hatch:']
1985 14:02:39.913069 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1986 14:02:39.922177 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1987 14:02:39.922433
1988 14:02:39.928688 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1989 14:02:39.928937
1990 14:02:39.935777 board_setup: Info: eMMC controller not present; skipping
1991 14:02:39.936043
1992 14:02:39.939047 New NVMe Controller 0x30053ac0 @ 00:1d:00
1993 14:02:39.939416
1994 14:02:39.946026 board_setup: Info: SDHCI controller not present; skipping
1995 14:02:39.946434
1996 14:02:39.952097 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1997 14:02:39.952392
1998 14:02:39.952604 Wipe memory regions:
1999 14:02:39.952808
2000 14:02:39.955422 [0x00000000001000, 0x000000000a0000)
2001 14:02:39.955688
2002 14:02:39.962057 [0x00000000100000, 0x00000030000000)
2003 14:02:40.025043
2004 14:02:40.028241 [0x00000030657430, 0x00000099a2c000)
2005 14:02:40.165381
2006 14:02:40.168626 [0x00000100000000, 0x0000045e800000)
2007 14:02:41.551521
2008 14:02:41.551678 R8152: Initializing
2009 14:02:41.551750
2010 14:02:41.554853 Version 9 (ocp_data = 6010)
2011 14:02:41.558908
2012 14:02:41.558993 R8152: Done initializing
2013 14:02:41.559061
2014 14:02:41.562148 Adding net device
2015 14:02:42.044956
2016 14:02:42.045115 R8152: Initializing
2017 14:02:42.045186
2018 14:02:42.048311 Version 6 (ocp_data = 5c30)
2019 14:02:42.048398
2020 14:02:42.051731 R8152: Done initializing
2021 14:02:42.051855
2022 14:02:42.058620 net_add_device: Attemp to include the same device
2023 14:02:42.058708
2024 14:02:42.065392 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2025 14:02:42.065501
2026 14:02:42.065613
2027 14:02:42.065675
2028 14:02:42.065950 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2030 14:02:42.166245 hatch: tftpboot 192.168.201.1 10389521/tftp-deploy-raf2ulbk/kernel/bzImage 10389521/tftp-deploy-raf2ulbk/kernel/cmdline 10389521/tftp-deploy-raf2ulbk/ramdisk/ramdisk.cpio.gz
2031 14:02:42.166405 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2032 14:02:42.166513 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2033 14:02:42.170468 tftpboot 192.168.201.1 10389521/tftp-deploy-raf2ulbk/kernel/bzImploy-raf2ulbk/kernel/cmdline 10389521/tftp-deploy-raf2ulbk/ramdisk/ramdisk.cpio.gz
2034 14:02:42.170558
2035 14:02:42.170625 Waiting for link
2036 14:02:42.371748
2037 14:02:42.371933 done.
2038 14:02:42.372007
2039 14:02:42.372069 MAC: 00:24:32:50:19:be
2040 14:02:42.372129
2041 14:02:42.374439 Sending DHCP discover... done.
2042 14:02:42.374524
2043 14:02:43.084829 Waiting for reply... done.
2044 14:02:43.085014
2045 14:02:43.088268 Sending DHCP request... done.
2046 14:02:43.088390
2047 14:02:43.299451 Waiting for reply... done.
2048 14:02:43.299639
2049 14:02:43.299715 My ip is 192.168.201.15
2050 14:02:43.299810
2051 14:02:43.302715 The DHCP server ip is 192.168.201.1
2052 14:02:43.306121
2053 14:02:43.309455 TFTP server IP predefined by user: 192.168.201.1
2054 14:02:43.309638
2055 14:02:43.315907 Bootfile predefined by user: 10389521/tftp-deploy-raf2ulbk/kernel/bzImage
2056 14:02:43.316030
2057 14:02:43.319357 Sending tftp read request... done.
2058 14:02:43.319472
2059 14:02:43.322602 Waiting for the transfer...
2060 14:02:43.325402
2061 14:02:43.982843 00000000 ################################################################
2062 14:02:43.983056
2063 14:02:44.407348 00080000 ################################################################
2064 14:02:44.407546
2065 14:02:44.952455 00100000 ################################################################
2066 14:02:44.952639
2067 14:02:45.495661 00180000 ################################################################
2068 14:02:45.495803
2069 14:02:46.015049 00200000 ################################################################
2070 14:02:46.015211
2071 14:02:46.547833 00280000 ################################################################
2072 14:02:46.547974
2073 14:02:47.072417 00300000 ################################################################
2074 14:02:47.072589
2075 14:02:47.598265 00380000 ################################################################
2076 14:02:47.598415
2077 14:02:48.131073 00400000 ################################################################
2078 14:02:48.131239
2079 14:02:48.659222 00480000 ################################################################
2080 14:02:48.659420
2081 14:02:49.182900 00500000 ################################################################
2082 14:02:49.183068
2083 14:02:49.747150 00580000 ################################################################
2084 14:02:49.747323
2085 14:02:50.269997 00600000 ################################################################
2086 14:02:50.270171
2087 14:02:50.846209 00680000 ################################################################
2088 14:02:50.846728
2089 14:02:51.445298 00700000 ################################################################
2090 14:02:51.446044
2091 14:02:52.037977 00780000 ################################################################
2092 14:02:52.038524
2093 14:02:52.629805 00800000 ################################################################
2094 14:02:52.629954
2095 14:02:53.205201 00880000 ################################################################
2096 14:02:53.205976
2097 14:02:53.768013 00900000 ################################################################
2098 14:02:53.768154
2099 14:02:54.352623 00980000 ################################################################
2100 14:02:54.353206
2101 14:02:54.785477 00a00000 ############################################## done.
2102 14:02:54.786022
2103 14:02:54.788792 The bootfile was 10858496 bytes long.
2104 14:02:54.789389
2105 14:02:54.792180 Sending tftp read request... done.
2106 14:02:54.792759
2107 14:02:54.795543 Waiting for the transfer...
2108 14:02:54.796239
2109 14:02:55.597700 00000000 ################################################################
2110 14:02:55.597920
2111 14:02:55.977707 00080000 ################################################################
2112 14:02:55.977877
2113 14:02:56.496008 00100000 ################################################################
2114 14:02:56.496181
2115 14:02:57.014138 00180000 ################################################################
2116 14:02:57.014305
2117 14:02:57.541681 00200000 ################################################################
2118 14:02:57.541851
2119 14:02:58.052517 00280000 ################################################################
2120 14:02:58.052716
2121 14:02:58.564552 00300000 ################################################################
2122 14:02:58.564736
2123 14:02:59.075108 00380000 ################################################################
2124 14:02:59.075284
2125 14:02:59.586215 00400000 ################################################################
2126 14:02:59.586382
2127 14:03:00.097290 00480000 ################################################################
2128 14:03:00.097465
2129 14:03:00.609413 00500000 ################################################################
2130 14:03:00.609597
2131 14:03:01.123060 00580000 ################################################################
2132 14:03:01.123225
2133 14:03:01.645490 00600000 ################################################################
2134 14:03:01.645684
2135 14:03:02.171998 00680000 ################################################################
2136 14:03:02.172168
2137 14:03:02.698507 00700000 ################################################################
2138 14:03:02.698683
2139 14:03:03.229606 00780000 ################################################################
2140 14:03:03.229776
2141 14:03:03.761533 00800000 ################################################################
2142 14:03:03.761700
2143 14:03:04.088948 00880000 ####################################### done.
2144 14:03:04.089086
2145 14:03:04.092284 Sending tftp read request... done.
2146 14:03:04.092393
2147 14:03:04.095757 Waiting for the transfer...
2148 14:03:04.095853
2149 14:03:04.095921 00000000 # done.
2150 14:03:04.095986
2151 14:03:04.106040 Command line loaded dynamically from TFTP file: 10389521/tftp-deploy-raf2ulbk/kernel/cmdline
2152 14:03:04.106129
2153 14:03:04.122498 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2154 14:03:04.122594
2155 14:03:04.128857 ec_init(0): CrosEC protocol v3 supported (256, 256)
2156 14:03:04.133635
2157 14:03:04.137182 Shutting down all USB controllers.
2158 14:03:04.137289
2159 14:03:04.137385 Removing current net device
2160 14:03:04.140676
2161 14:03:04.140786 Finalizing coreboot
2162 14:03:04.140892
2163 14:03:04.147314 Exiting depthcharge with code 4 at timestamp: 31618340
2164 14:03:04.147438
2165 14:03:04.147538
2166 14:03:04.147637 Starting kernel ...
2167 14:03:04.147728
2168 14:03:04.147826
2169 14:03:04.148481 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2170 14:03:04.148614 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2171 14:03:04.148713 Setting prompt string to ['Linux version [0-9]']
2172 14:03:04.148810 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 14:03:04.148919 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2175 14:07:22.148879 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2177 14:07:22.149145 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2179 14:07:22.149327 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 14:07:22.149637 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 14:07:22.149885 Cleaning after the job
2185 14:07:22.150012 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389521/tftp-deploy-raf2ulbk/ramdisk
2186 14:07:22.151379 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389521/tftp-deploy-raf2ulbk/kernel
2187 14:07:22.152793 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389521/tftp-deploy-raf2ulbk/modules
2188 14:07:22.153381 start: 5.1 power-off (timeout 00:00:30) [common]
2189 14:07:22.153578 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2190 14:07:22.230645 >> Command sent successfully.
2191 14:07:22.233129 Returned 0 in 0 seconds
2192 14:07:22.333558 end: 5.1 power-off (duration 00:00:00) [common]
2194 14:07:22.333963 start: 5.2 read-feedback (timeout 00:10:00) [common]
2195 14:07:22.334246 Listened to connection for namespace 'common' for up to 1s
2197 14:07:22.334621 Listened to connection for namespace 'common' for up to 1s
2198 14:07:23.335337 Finalising connection for namespace 'common'
2199 14:07:23.335892 Disconnecting from shell: Finalise
2200 14:07:23.336218
2201 14:07:23.437087 end: 5.2 read-feedback (duration 00:00:01) [common]
2202 14:07:23.437681 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10389521
2203 14:07:23.483383 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10389521
2204 14:07:23.483663 JobError: Your job cannot terminate cleanly.