Boot log: asus-C436FA-Flip-hatch

    1 14:07:48.150143  lava-dispatcher, installed at version: 2023.03
    2 14:07:48.150363  start: 0 validate
    3 14:07:48.150501  Start time: 2023-05-19 14:07:48.150494+00:00 (UTC)
    4 14:07:48.150632  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:07:48.150764  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230512.0%2Famd64%2Finitrd.cpio.gz exists
    6 14:07:48.443642  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:07:48.443839  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.283-cip98%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:07:48.730290  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:07:48.730524  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230512.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 14:07:49.015335  Using caching service: 'http://localhost/cache/?uri=%s'
   11 14:07:49.015571  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.283-cip98%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 14:07:49.305191  validate duration: 1.15
   14 14:07:49.305593  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 14:07:49.305734  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 14:07:49.305861  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 14:07:49.306025  Not decompressing ramdisk as can be used compressed.
   18 14:07:49.306144  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230512.0/amd64/initrd.cpio.gz
   19 14:07:49.306245  saving as /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/ramdisk/initrd.cpio.gz
   20 14:07:49.306340  total size: 5671581 (5MB)
   21 14:07:49.307912  progress   0% (0MB)
   22 14:07:49.309684  progress   5% (0MB)
   23 14:07:49.311385  progress  10% (0MB)
   24 14:07:49.312891  progress  15% (0MB)
   25 14:07:49.314557  progress  20% (1MB)
   26 14:07:49.316243  progress  25% (1MB)
   27 14:07:49.317743  progress  30% (1MB)
   28 14:07:49.319395  progress  35% (1MB)
   29 14:07:49.321049  progress  40% (2MB)
   30 14:07:49.322540  progress  45% (2MB)
   31 14:07:49.324173  progress  50% (2MB)
   32 14:07:49.325877  progress  55% (3MB)
   33 14:07:49.327364  progress  60% (3MB)
   34 14:07:49.329029  progress  65% (3MB)
   35 14:07:49.330630  progress  70% (3MB)
   36 14:07:49.332034  progress  75% (4MB)
   37 14:07:49.333684  progress  80% (4MB)
   38 14:07:49.335320  progress  85% (4MB)
   39 14:07:49.336783  progress  90% (4MB)
   40 14:07:49.338508  progress  95% (5MB)
   41 14:07:49.340161  progress 100% (5MB)
   42 14:07:49.340304  5MB downloaded in 0.03s (159.27MB/s)
   43 14:07:49.340509  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 14:07:49.340889  end: 1.1 download-retry (duration 00:00:00) [common]
   46 14:07:49.341007  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 14:07:49.341123  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 14:07:49.341291  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.283-cip98/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 14:07:49.341391  saving as /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/kernel/bzImage
   50 14:07:49.341484  total size: 10858496 (10MB)
   51 14:07:49.341565  No compression specified
   52 14:07:49.343205  progress   0% (0MB)
   53 14:07:49.346442  progress   5% (0MB)
   54 14:07:49.349547  progress  10% (1MB)
   55 14:07:49.352480  progress  15% (1MB)
   56 14:07:49.355656  progress  20% (2MB)
   57 14:07:49.358628  progress  25% (2MB)
   58 14:07:49.361803  progress  30% (3MB)
   59 14:07:49.364682  progress  35% (3MB)
   60 14:07:49.367756  progress  40% (4MB)
   61 14:07:49.370846  progress  45% (4MB)
   62 14:07:49.373624  progress  50% (5MB)
   63 14:07:49.376507  progress  55% (5MB)
   64 14:07:49.379224  progress  60% (6MB)
   65 14:07:49.382070  progress  65% (6MB)
   66 14:07:49.384746  progress  70% (7MB)
   67 14:07:49.387583  progress  75% (7MB)
   68 14:07:49.390452  progress  80% (8MB)
   69 14:07:49.393130  progress  85% (8MB)
   70 14:07:49.395967  progress  90% (9MB)
   71 14:07:49.398654  progress  95% (9MB)
   72 14:07:49.401523  progress 100% (10MB)
   73 14:07:49.401682  10MB downloaded in 0.06s (172.03MB/s)
   74 14:07:49.401831  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 14:07:49.402071  end: 1.2 download-retry (duration 00:00:00) [common]
   77 14:07:49.402159  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 14:07:49.402247  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 14:07:49.402382  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230512.0/amd64/full.rootfs.tar.xz
   80 14:07:49.402453  saving as /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/nfsrootfs/full.rootfs.tar
   81 14:07:49.402517  total size: 125882924 (120MB)
   82 14:07:49.402580  Using unxz to decompress xz
   83 14:07:49.406209  progress   0% (0MB)
   84 14:07:49.921431  progress   5% (6MB)
   85 14:07:50.431254  progress  10% (12MB)
   86 14:07:50.962957  progress  15% (18MB)
   87 14:07:51.500516  progress  20% (24MB)
   88 14:07:51.877128  progress  25% (30MB)
   89 14:07:52.232909  progress  30% (36MB)
   90 14:07:52.511767  progress  35% (42MB)
   91 14:07:52.728803  progress  40% (48MB)
   92 14:07:53.119791  progress  45% (54MB)
   93 14:07:53.516754  progress  50% (60MB)
   94 14:07:53.880417  progress  55% (66MB)
   95 14:07:54.273055  progress  60% (72MB)
   96 14:07:54.654737  progress  65% (78MB)
   97 14:07:55.078334  progress  70% (84MB)
   98 14:07:55.554988  progress  75% (90MB)
   99 14:07:56.028305  progress  80% (96MB)
  100 14:07:56.123577  progress  85% (102MB)
  101 14:07:56.287811  progress  90% (108MB)
  102 14:07:56.626224  progress  95% (114MB)
  103 14:07:56.997582  progress 100% (120MB)
  104 14:07:57.003411  120MB downloaded in 7.60s (15.79MB/s)
  105 14:07:57.003707  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 14:07:57.003994  end: 1.3 download-retry (duration 00:00:08) [common]
  108 14:07:57.004088  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 14:07:57.004180  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 14:07:57.004374  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.283-cip98/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 14:07:57.004482  saving as /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/modules/modules.tar
  112 14:07:57.004578  total size: 484124 (0MB)
  113 14:07:57.004672  Using unxz to decompress xz
  114 14:07:57.008087  progress   6% (0MB)
  115 14:07:57.008495  progress  13% (0MB)
  116 14:07:57.008748  progress  20% (0MB)
  117 14:07:57.010154  progress  27% (0MB)
  118 14:07:57.012268  progress  33% (0MB)
  119 14:07:57.014340  progress  40% (0MB)
  120 14:07:57.016267  progress  47% (0MB)
  121 14:07:57.018426  progress  54% (0MB)
  122 14:07:57.020563  progress  60% (0MB)
  123 14:07:57.022530  progress  67% (0MB)
  124 14:07:57.025115  progress  74% (0MB)
  125 14:07:57.027363  progress  81% (0MB)
  126 14:07:57.029535  progress  87% (0MB)
  127 14:07:57.031593  progress  94% (0MB)
  128 14:07:57.033713  progress 100% (0MB)
  129 14:07:57.040046  0MB downloaded in 0.04s (13.02MB/s)
  130 14:07:57.040355  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 14:07:57.040674  end: 1.4 download-retry (duration 00:00:00) [common]
  133 14:07:57.040770  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  134 14:07:57.040870  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  135 14:07:59.828358  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10389421/extract-nfsrootfs-ml02ou60
  136 14:07:59.828594  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  137 14:07:59.828697  start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
  138 14:07:59.828868  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx
  139 14:07:59.828999  makedir: /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin
  140 14:07:59.829133  makedir: /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/tests
  141 14:07:59.829269  makedir: /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/results
  142 14:07:59.829399  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-add-keys
  143 14:07:59.829739  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-add-sources
  144 14:07:59.829869  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-background-process-start
  145 14:07:59.829998  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-background-process-stop
  146 14:07:59.830126  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-common-functions
  147 14:07:59.830247  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-echo-ipv4
  148 14:07:59.830383  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-install-packages
  149 14:07:59.830537  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-installed-packages
  150 14:07:59.830692  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-os-build
  151 14:07:59.830850  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-probe-channel
  152 14:07:59.831014  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-probe-ip
  153 14:07:59.831171  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-target-ip
  154 14:07:59.831323  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-target-mac
  155 14:07:59.831479  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-target-storage
  156 14:07:59.831640  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-test-case
  157 14:07:59.831800  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-test-event
  158 14:07:59.831956  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-test-feedback
  159 14:07:59.832112  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-test-raise
  160 14:07:59.832266  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-test-reference
  161 14:07:59.832422  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-test-runner
  162 14:07:59.832574  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-test-set
  163 14:07:59.832710  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-test-shell
  164 14:07:59.832837  Updating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-install-packages (oe)
  165 14:07:59.832984  Updating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/bin/lava-installed-packages (oe)
  166 14:07:59.833144  Creating /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/environment
  167 14:07:59.833275  LAVA metadata
  168 14:07:59.833373  - LAVA_JOB_ID=10389421
  169 14:07:59.833471  - LAVA_DISPATCHER_IP=192.168.201.1
  170 14:07:59.833601  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  171 14:07:59.833670  skipped lava-vland-overlay
  172 14:07:59.833746  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 14:07:59.833833  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  174 14:07:59.833917  skipped lava-multinode-overlay
  175 14:07:59.834025  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 14:07:59.834136  start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
  177 14:07:59.834238  Loading test definitions
  178 14:07:59.834367  start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
  179 14:07:59.834470  Using /lava-10389421 at stage 0
  180 14:07:59.834607  Fetching tests from https://github.com/kernelci/test-definitions
  181 14:07:59.834714  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/0/tests/0_ltp-mm'
  182 14:08:07.266079  Running '/usr/bin/git checkout kernelci.org
  183 14:08:07.413786  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
  184 14:08:07.414586  uuid=10389421_1.5.2.3.1 testdef=None
  185 14:08:07.414739  end: 1.5.2.3.1 git-repo-action (duration 00:00:08) [common]
  187 14:08:07.414998  start: 1.5.2.3.2 test-overlay (timeout 00:09:42) [common]
  188 14:08:07.416061  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  190 14:08:07.416450  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:42) [common]
  191 14:08:07.418354  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  193 14:08:07.418616  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:42) [common]
  194 14:08:07.419906  runner path: /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/0/tests/0_ltp-mm test_uuid 10389421_1.5.2.3.1
  195 14:08:07.419996  SKIPFILE='skipfile-lkft.yaml'
  196 14:08:07.420062  SKIP_INSTALL='true'
  197 14:08:07.420139  TST_CMDFILES='mm'
  198 14:08:07.420281  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  200 14:08:07.420505  Creating lava-test-runner.conf files
  201 14:08:07.420580  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10389421/lava-overlay-kgbqxgdx/lava-10389421/0 for stage 0
  202 14:08:07.420675  - 0_ltp-mm
  203 14:08:07.420777  end: 1.5.2.3 test-definition (duration 00:00:08) [common]
  204 14:08:07.420887  start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
  205 14:08:15.241104  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  206 14:08:15.241265  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
  207 14:08:15.241361  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  208 14:08:15.241465  end: 1.5.2 lava-overlay (duration 00:00:15) [common]
  209 14:08:15.241600  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
  210 14:08:15.382932  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  211 14:08:15.383314  start: 1.5.4 extract-modules (timeout 00:09:34) [common]
  212 14:08:15.383428  extracting modules file /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10389421/extract-nfsrootfs-ml02ou60
  213 14:08:15.407036  extracting modules file /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10389421/extract-overlay-ramdisk-wel_x_n7/ramdisk
  214 14:08:15.426563  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  215 14:08:15.426718  start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
  216 14:08:15.426811  [common] Applying overlay to NFS
  217 14:08:15.426882  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10389421/compress-overlay-9zanbhgj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10389421/extract-nfsrootfs-ml02ou60
  218 14:08:16.333763  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  219 14:08:16.333949  start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
  220 14:08:16.334052  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  221 14:08:16.334148  start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
  222 14:08:16.334237  Building ramdisk /var/lib/lava/dispatcher/tmp/10389421/extract-overlay-ramdisk-wel_x_n7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10389421/extract-overlay-ramdisk-wel_x_n7/ramdisk
  223 14:08:16.894842  >> 31366 blocks

  224 14:08:17.570099  rename /var/lib/lava/dispatcher/tmp/10389421/extract-overlay-ramdisk-wel_x_n7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/ramdisk/ramdisk.cpio.gz
  225 14:08:17.570526  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  226 14:08:17.570654  start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
  227 14:08:17.570756  start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
  228 14:08:17.570850  No mkimage arch provided, not using FIT.
  229 14:08:17.570941  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  230 14:08:17.571024  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  231 14:08:17.571130  end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
  232 14:08:17.571225  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
  233 14:08:17.571328  No LXC device requested
  234 14:08:17.571437  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  235 14:08:17.571533  start: 1.7 deploy-device-env (timeout 00:09:32) [common]
  236 14:08:17.571618  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  237 14:08:17.571693  Checking files for TFTP limit of 4294967296 bytes.
  238 14:08:17.572094  end: 1 tftp-deploy (duration 00:00:28) [common]
  239 14:08:17.572198  start: 2 depthcharge-action (timeout 00:05:00) [common]
  240 14:08:17.572288  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  241 14:08:17.572417  substitutions:
  242 14:08:17.572485  - {DTB}: None
  243 14:08:17.572547  - {INITRD}: 10389421/tftp-deploy-b0268f50/ramdisk/ramdisk.cpio.gz
  244 14:08:17.572609  - {KERNEL}: 10389421/tftp-deploy-b0268f50/kernel/bzImage
  245 14:08:17.572668  - {LAVA_MAC}: None
  246 14:08:17.572725  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10389421/extract-nfsrootfs-ml02ou60
  247 14:08:17.572784  - {NFS_SERVER_IP}: 192.168.201.1
  248 14:08:17.572841  - {PRESEED_CONFIG}: None
  249 14:08:17.572896  - {PRESEED_LOCAL}: None
  250 14:08:17.572951  - {RAMDISK}: 10389421/tftp-deploy-b0268f50/ramdisk/ramdisk.cpio.gz
  251 14:08:17.573007  - {ROOT_PART}: None
  252 14:08:17.573062  - {ROOT}: None
  253 14:08:17.573117  - {SERVER_IP}: 192.168.201.1
  254 14:08:17.573171  - {TEE}: None
  255 14:08:17.573226  Parsed boot commands:
  256 14:08:17.573280  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  257 14:08:17.573453  Parsed boot commands: tftpboot 192.168.201.1 10389421/tftp-deploy-b0268f50/kernel/bzImage 10389421/tftp-deploy-b0268f50/kernel/cmdline 10389421/tftp-deploy-b0268f50/ramdisk/ramdisk.cpio.gz
  258 14:08:17.573552  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  259 14:08:17.573639  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  260 14:08:17.573732  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  261 14:08:17.573819  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  262 14:08:17.573891  Not connected, no need to disconnect.
  263 14:08:17.573966  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  264 14:08:17.574050  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  265 14:08:17.574118  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
  266 14:08:17.577332  Setting prompt string to ['lava-test: # ']
  267 14:08:17.577683  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  268 14:08:17.577792  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  269 14:08:17.577894  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  270 14:08:17.577989  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  271 14:08:17.578184  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  272 14:08:22.707970  >> Command sent successfully.

  273 14:08:22.710410  Returned 0 in 5 seconds
  274 14:08:22.810783  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  276 14:08:22.811161  end: 2.2.2 reset-device (duration 00:00:05) [common]
  277 14:08:22.811296  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  278 14:08:22.811386  Setting prompt string to 'Starting depthcharge on Helios...'
  279 14:08:22.811455  Changing prompt to 'Starting depthcharge on Helios...'
  280 14:08:22.811523  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  281 14:08:22.811820  [Enter `^Ec?' for help]

  282 14:08:23.437661  

  283 14:08:23.437870  

  284 14:08:23.447384  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  285 14:08:23.451339  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  286 14:08:23.457445  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  287 14:08:23.460767  CPU: AES supported, TXT NOT supported, VT supported

  288 14:08:23.467595  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  289 14:08:23.471025  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  290 14:08:23.477776  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  291 14:08:23.481166  VBOOT: Loading verstage.

  292 14:08:23.483852  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  293 14:08:23.490597  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  294 14:08:23.497464  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  295 14:08:23.497576  CBFS @ c08000 size 3f8000

  296 14:08:23.503761  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  297 14:08:23.507030  CBFS: Locating 'fallback/verstage'

  298 14:08:23.510403  CBFS: Found @ offset 10fb80 size 1072c

  299 14:08:23.514452  

  300 14:08:23.514536  

  301 14:08:23.524637  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  302 14:08:23.539116  Probing TPM: . done!

  303 14:08:23.542506  TPM ready after 0 ms

  304 14:08:23.545718  Connected to device vid:did:rid of 1ae0:0028:00

  305 14:08:23.555677  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  306 14:08:23.558983  Initialized TPM device CR50 revision 0

  307 14:08:23.603526  tlcl_send_startup: Startup return code is 0

  308 14:08:23.603666  TPM: setup succeeded

  309 14:08:23.616503  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  310 14:08:23.620605  Chrome EC: UHEPI supported

  311 14:08:23.623311  Phase 1

  312 14:08:23.626730  FMAP: area GBB found @ c05000 (12288 bytes)

  313 14:08:23.633456  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  314 14:08:23.633580  Phase 2

  315 14:08:23.636831  Phase 3

  316 14:08:23.640083  FMAP: area GBB found @ c05000 (12288 bytes)

  317 14:08:23.646638  VB2:vb2_report_dev_firmware() This is developer signed firmware

  318 14:08:23.653475  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  319 14:08:23.656893  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  320 14:08:23.663454  VB2:vb2_verify_keyblock() Checking keyblock signature...

  321 14:08:23.678790  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  322 14:08:23.682212  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  323 14:08:23.689177  VB2:vb2_verify_fw_preamble() Verifying preamble.

  324 14:08:23.693400  Phase 4

  325 14:08:23.696569  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  326 14:08:23.703356  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  327 14:08:23.882880  VB2:vb2_rsa_verify_digest() Digest check failed!

  328 14:08:23.889263  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  329 14:08:23.889380  Saving nvdata

  330 14:08:23.892723  Reboot requested (10020007)

  331 14:08:23.896153  board_reset() called!

  332 14:08:23.896242  full_reset() called!

  333 14:08:28.405250  

  334 14:08:28.405412  

  335 14:08:28.415203  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  336 14:08:28.418642  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  337 14:08:28.424664  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  338 14:08:28.428075  CPU: AES supported, TXT NOT supported, VT supported

  339 14:08:28.434842  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  340 14:08:28.437839  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  341 14:08:28.444421  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  342 14:08:28.447870  VBOOT: Loading verstage.

  343 14:08:28.451056  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  344 14:08:28.457669  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  345 14:08:28.464510  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  346 14:08:28.464602  CBFS @ c08000 size 3f8000

  347 14:08:28.471374  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  348 14:08:28.474607  CBFS: Locating 'fallback/verstage'

  349 14:08:28.477358  CBFS: Found @ offset 10fb80 size 1072c

  350 14:08:28.481922  

  351 14:08:28.482009  

  352 14:08:28.491620  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  353 14:08:28.506087  Probing TPM: . done!

  354 14:08:28.509321  TPM ready after 0 ms

  355 14:08:28.512665  Connected to device vid:did:rid of 1ae0:0028:00

  356 14:08:28.523043  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  357 14:08:28.526410  Initialized TPM device CR50 revision 0

  358 14:08:28.570700  tlcl_send_startup: Startup return code is 0

  359 14:08:28.570804  TPM: setup succeeded

  360 14:08:28.584122  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  361 14:08:28.587547  Chrome EC: UHEPI supported

  362 14:08:28.591015  Phase 1

  363 14:08:28.594356  FMAP: area GBB found @ c05000 (12288 bytes)

  364 14:08:28.601205  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  365 14:08:28.607759  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  366 14:08:28.610567  Recovery requested (1009000e)

  367 14:08:28.616383  Saving nvdata

  368 14:08:28.623129  tlcl_extend: response is 0

  369 14:08:28.631299  tlcl_extend: response is 0

  370 14:08:28.638195  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  371 14:08:28.641781  CBFS @ c08000 size 3f8000

  372 14:08:28.648489  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  373 14:08:28.651851  CBFS: Locating 'fallback/romstage'

  374 14:08:28.655248  CBFS: Found @ offset 80 size 145fc

  375 14:08:28.658640  Accumulated console time in verstage 98 ms

  376 14:08:28.658737  

  377 14:08:28.658826  

  378 14:08:28.671444  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  379 14:08:28.678013  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  380 14:08:28.681244  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  381 14:08:28.685174  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  382 14:08:28.691237  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  383 14:08:28.694647  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  384 14:08:28.698038  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  385 14:08:28.701416  TCO_STS:   0000 0000

  386 14:08:28.704782  GEN_PMCON: e0015238 00000200

  387 14:08:28.708010  GBLRST_CAUSE: 00000000 00000000

  388 14:08:28.708098  prev_sleep_state 5

  389 14:08:28.711365  Boot Count incremented to 56692

  390 14:08:28.718523  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  391 14:08:28.721592  CBFS @ c08000 size 3f8000

  392 14:08:28.727926  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  393 14:08:28.728047  CBFS: Locating 'fspm.bin'

  394 14:08:28.731335  CBFS: Found @ offset 5ffc0 size 71000

  395 14:08:28.735473  Chrome EC: UHEPI supported

  396 14:08:28.742894  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  397 14:08:28.748445  Probing TPM:  done!

  398 14:08:28.755187  Connected to device vid:did:rid of 1ae0:0028:00

  399 14:08:28.764835  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  400 14:08:28.770821  Initialized TPM device CR50 revision 0

  401 14:08:28.779594  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  402 14:08:28.786274  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  403 14:08:28.790182  MRC cache found, size 1948

  404 14:08:28.793231  bootmode is set to: 2

  405 14:08:28.796681  PRMRR disabled by config.

  406 14:08:28.797140  SPD INDEX = 1

  407 14:08:28.802572  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  408 14:08:28.806030  CBFS @ c08000 size 3f8000

  409 14:08:28.812903  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  410 14:08:28.812991  CBFS: Locating 'spd.bin'

  411 14:08:28.816319  CBFS: Found @ offset 5fb80 size 400

  412 14:08:28.819839  SPD: module type is LPDDR3

  413 14:08:28.822462  SPD: module part is 

  414 14:08:28.829474  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  415 14:08:28.832330  SPD: device width 4 bits, bus width 8 bits

  416 14:08:28.835641  SPD: module size is 4096 MB (per channel)

  417 14:08:28.839164  memory slot: 0 configuration done.

  418 14:08:28.842596  memory slot: 2 configuration done.

  419 14:08:28.893910  CBMEM:

  420 14:08:28.897557  IMD: root @ 99fff000 254 entries.

  421 14:08:28.900923  IMD: root @ 99ffec00 62 entries.

  422 14:08:28.904048  External stage cache:

  423 14:08:28.907693  IMD: root @ 9abff000 254 entries.

  424 14:08:28.910544  IMD: root @ 9abfec00 62 entries.

  425 14:08:28.913982  Chrome EC: clear events_b mask to 0x0000000020004000

  426 14:08:28.930735  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  427 14:08:28.943191  tlcl_write: response is 0

  428 14:08:28.952800  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  429 14:08:28.958911  MRC: TPM MRC hash updated successfully.

  430 14:08:28.958996  2 DIMMs found

  431 14:08:28.962453  SMM Memory Map

  432 14:08:28.965884  SMRAM       : 0x9a000000 0x1000000

  433 14:08:28.969386   Subregion 0: 0x9a000000 0xa00000

  434 14:08:28.972857   Subregion 1: 0x9aa00000 0x200000

  435 14:08:28.975752   Subregion 2: 0x9ac00000 0x400000

  436 14:08:28.978931  top_of_ram = 0x9a000000

  437 14:08:28.982164  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  438 14:08:28.988679  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  439 14:08:28.992114  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  440 14:08:28.998750  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  441 14:08:29.002046  CBFS @ c08000 size 3f8000

  442 14:08:29.005238  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  443 14:08:29.009062  CBFS: Locating 'fallback/postcar'

  444 14:08:29.015157  CBFS: Found @ offset 107000 size 4b44

  445 14:08:29.018667  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  446 14:08:29.031488  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  447 14:08:29.034942  Processing 180 relocs. Offset value of 0x97c0c000

  448 14:08:29.043404  Accumulated console time in romstage 285 ms

  449 14:08:29.043513  

  450 14:08:29.043609  

  451 14:08:29.053619  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  452 14:08:29.059717  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  453 14:08:29.063176  CBFS @ c08000 size 3f8000

  454 14:08:29.066588  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  455 14:08:29.073353  CBFS: Locating 'fallback/ramstage'

  456 14:08:29.076805  CBFS: Found @ offset 43380 size 1b9e8

  457 14:08:29.082905  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  458 14:08:29.114792  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  459 14:08:29.118059  Processing 3976 relocs. Offset value of 0x98db0000

  460 14:08:29.124782  Accumulated console time in postcar 52 ms

  461 14:08:29.124904  

  462 14:08:29.125007  

  463 14:08:29.135033  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  464 14:08:29.141803  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  465 14:08:29.145198  WARNING: RO_VPD is uninitialized or empty.

  466 14:08:29.147992  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  467 14:08:29.154624  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  468 14:08:29.154708  Normal boot.

  469 14:08:29.161280  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  470 14:08:29.164801  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  471 14:08:29.168241  CBFS @ c08000 size 3f8000

  472 14:08:29.175083  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  473 14:08:29.177845  CBFS: Locating 'cpu_microcode_blob.bin'

  474 14:08:29.181213  CBFS: Found @ offset 14700 size 2ec00

  475 14:08:29.184470  microcode: sig=0x806ec pf=0x4 revision=0xc9

  476 14:08:29.187799  Skip microcode update

  477 14:08:29.191269  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  478 14:08:29.194676  CBFS @ c08000 size 3f8000

  479 14:08:29.201295  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  480 14:08:29.204621  CBFS: Locating 'fsps.bin'

  481 14:08:29.207847  CBFS: Found @ offset d1fc0 size 35000

  482 14:08:29.233403  Detected 4 core, 8 thread CPU.

  483 14:08:29.236208  Setting up SMI for CPU

  484 14:08:29.239615  IED base = 0x9ac00000

  485 14:08:29.239705  IED size = 0x00400000

  486 14:08:29.243002  Will perform SMM setup.

  487 14:08:29.249656  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  488 14:08:29.256367  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  489 14:08:29.259705  Processing 16 relocs. Offset value of 0x00030000

  490 14:08:29.263028  Attempting to start 7 APs

  491 14:08:29.266432  Waiting for 10ms after sending INIT.

  492 14:08:29.282839  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.

  493 14:08:29.282928  done.

  494 14:08:29.286100  AP: slot 1 apic_id 2.

  495 14:08:29.289398  AP: slot 4 apic_id 3.

  496 14:08:29.292701  Waiting for 2nd SIPI to complete...done.

  497 14:08:29.296070  AP: slot 7 apic_id 5.

  498 14:08:29.296156  AP: slot 6 apic_id 4.

  499 14:08:29.299564  AP: slot 3 apic_id 6.

  500 14:08:29.303038  AP: slot 5 apic_id 7.

  501 14:08:29.309656  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  502 14:08:29.312702  Processing 13 relocs. Offset value of 0x00038000

  503 14:08:29.319239  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  504 14:08:29.325852  Installing SMM handler to 0x9a000000

  505 14:08:29.332354  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  506 14:08:29.335646  Processing 658 relocs. Offset value of 0x9a010000

  507 14:08:29.345773  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  508 14:08:29.348918  Processing 13 relocs. Offset value of 0x9a008000

  509 14:08:29.355640  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  510 14:08:29.362482  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  511 14:08:29.368966  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  512 14:08:29.372451  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  513 14:08:29.378677  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  514 14:08:29.385433  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  515 14:08:29.388747  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  516 14:08:29.395524  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  517 14:08:29.398870  Clearing SMI status registers

  518 14:08:29.402369  SMI_STS: PM1 

  519 14:08:29.402444  PM1_STS: PWRBTN 

  520 14:08:29.405786  TCO_STS: SECOND_TO 

  521 14:08:29.409107  New SMBASE 0x9a000000

  522 14:08:29.412346  In relocation handler: CPU 0

  523 14:08:29.415232  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  524 14:08:29.419010  Writing SMRR. base = 0x9a000006, mask=0xff000800

  525 14:08:29.422437  Relocation complete.

  526 14:08:29.425614  New SMBASE 0x99fff800

  527 14:08:29.425711  In relocation handler: CPU 2

  528 14:08:29.432375  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  529 14:08:29.435555  Writing SMRR. base = 0x9a000006, mask=0xff000800

  530 14:08:29.438888  Relocation complete.

  531 14:08:29.442305  New SMBASE 0x99ffec00

  532 14:08:29.442390  In relocation handler: CPU 5

  533 14:08:29.449050  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  534 14:08:29.451912  Writing SMRR. base = 0x9a000006, mask=0xff000800

  535 14:08:29.455192  Relocation complete.

  536 14:08:29.455271  New SMBASE 0x99fff400

  537 14:08:29.458557  In relocation handler: CPU 3

  538 14:08:29.465428  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  539 14:08:29.468792  Writing SMRR. base = 0x9a000006, mask=0xff000800

  540 14:08:29.472243  Relocation complete.

  541 14:08:29.472321  New SMBASE 0x99fffc00

  542 14:08:29.475614  In relocation handler: CPU 1

  543 14:08:29.478361  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  544 14:08:29.485431  Writing SMRR. base = 0x9a000006, mask=0xff000800

  545 14:08:29.488943  Relocation complete.

  546 14:08:29.489021  New SMBASE 0x99fff000

  547 14:08:29.491719  In relocation handler: CPU 4

  548 14:08:29.495296  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  549 14:08:29.502141  Writing SMRR. base = 0x9a000006, mask=0xff000800

  550 14:08:29.504967  Relocation complete.

  551 14:08:29.505078  New SMBASE 0x99ffe800

  552 14:08:29.508404  In relocation handler: CPU 6

  553 14:08:29.511798  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  554 14:08:29.518825  Writing SMRR. base = 0x9a000006, mask=0xff000800

  555 14:08:29.518942  Relocation complete.

  556 14:08:29.521648  New SMBASE 0x99ffe400

  557 14:08:29.525077  In relocation handler: CPU 7

  558 14:08:29.528311  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  559 14:08:29.535392  Writing SMRR. base = 0x9a000006, mask=0xff000800

  560 14:08:29.535517  Relocation complete.

  561 14:08:29.538282  Initializing CPU #0

  562 14:08:29.541623  CPU: vendor Intel device 806ec

  563 14:08:29.544966  CPU: family 06, model 8e, stepping 0c

  564 14:08:29.548203  Clearing out pending MCEs

  565 14:08:29.552245  Setting up local APIC...

  566 14:08:29.552331   apic_id: 0x00 done.

  567 14:08:29.554957  Turbo is available but hidden

  568 14:08:29.558439  Turbo is available and visible

  569 14:08:29.561633  VMX status: enabled

  570 14:08:29.565346  IA32_FEATURE_CONTROL status: locked

  571 14:08:29.568790  Skip microcode update

  572 14:08:29.568870  CPU #0 initialized

  573 14:08:29.571524  Initializing CPU #2

  574 14:08:29.571602  Initializing CPU #6

  575 14:08:29.574951  Initializing CPU #7

  576 14:08:29.578296  CPU: vendor Intel device 806ec

  577 14:08:29.581625  CPU: family 06, model 8e, stepping 0c

  578 14:08:29.584951  CPU: vendor Intel device 806ec

  579 14:08:29.588447  CPU: family 06, model 8e, stepping 0c

  580 14:08:29.591853  Clearing out pending MCEs

  581 14:08:29.595295  Clearing out pending MCEs

  582 14:08:29.598019  Setting up local APIC...

  583 14:08:29.598105  CPU: vendor Intel device 806ec

  584 14:08:29.604674  CPU: family 06, model 8e, stepping 0c

  585 14:08:29.604753  Clearing out pending MCEs

  586 14:08:29.607878  Initializing CPU #5

  587 14:08:29.611425  Initializing CPU #3

  588 14:08:29.614805  CPU: vendor Intel device 806ec

  589 14:08:29.618373  CPU: family 06, model 8e, stepping 0c

  590 14:08:29.618457  Setting up local APIC...

  591 14:08:29.621749  Initializing CPU #1

  592 14:08:29.625145  Initializing CPU #4

  593 14:08:29.627880  CPU: vendor Intel device 806ec

  594 14:08:29.631308  CPU: family 06, model 8e, stepping 0c

  595 14:08:29.634686  CPU: vendor Intel device 806ec

  596 14:08:29.637936  CPU: family 06, model 8e, stepping 0c

  597 14:08:29.641264  Clearing out pending MCEs

  598 14:08:29.641346  Clearing out pending MCEs

  599 14:08:29.644486  Setting up local APIC...

  600 14:08:29.647739   apic_id: 0x04 done.

  601 14:08:29.651319   apic_id: 0x05 done.

  602 14:08:29.651401  VMX status: enabled

  603 14:08:29.654485  VMX status: enabled

  604 14:08:29.657745  IA32_FEATURE_CONTROL status: locked

  605 14:08:29.661032  IA32_FEATURE_CONTROL status: locked

  606 14:08:29.664329  Skip microcode update

  607 14:08:29.664406  Skip microcode update

  608 14:08:29.667675  CPU #6 initialized

  609 14:08:29.671090  CPU #7 initialized

  610 14:08:29.671175  CPU: vendor Intel device 806ec

  611 14:08:29.677390  CPU: family 06, model 8e, stepping 0c

  612 14:08:29.677498  Clearing out pending MCEs

  613 14:08:29.680797  Clearing out pending MCEs

  614 14:08:29.684168  Setting up local APIC...

  615 14:08:29.687560  Setting up local APIC...

  616 14:08:29.687646   apic_id: 0x07 done.

  617 14:08:29.691000  Setting up local APIC...

  618 14:08:29.694406   apic_id: 0x01 done.

  619 14:08:29.697762  Setting up local APIC...

  620 14:08:29.697853  VMX status: enabled

  621 14:08:29.700483   apic_id: 0x03 done.

  622 14:08:29.700602   apic_id: 0x02 done.

  623 14:08:29.703864  VMX status: enabled

  624 14:08:29.707287  VMX status: enabled

  625 14:08:29.710587  IA32_FEATURE_CONTROL status: locked

  626 14:08:29.714021  IA32_FEATURE_CONTROL status: locked

  627 14:08:29.717372  Skip microcode update

  628 14:08:29.717469  Skip microcode update

  629 14:08:29.720790  CPU #4 initialized

  630 14:08:29.720867  CPU #1 initialized

  631 14:08:29.727016  IA32_FEATURE_CONTROL status: locked

  632 14:08:29.727102   apic_id: 0x06 done.

  633 14:08:29.730367  VMX status: enabled

  634 14:08:29.730451  VMX status: enabled

  635 14:08:29.737042  IA32_FEATURE_CONTROL status: locked

  636 14:08:29.740579  IA32_FEATURE_CONTROL status: locked

  637 14:08:29.740663  Skip microcode update

  638 14:08:29.743990  Skip microcode update

  639 14:08:29.747213  CPU #5 initialized

  640 14:08:29.747297  CPU #3 initialized

  641 14:08:29.750455  Skip microcode update

  642 14:08:29.750549  CPU #2 initialized

  643 14:08:29.757210  bsp_do_flight_plan done after 461 msecs.

  644 14:08:29.760499  CPU: frequency set to 4200 MHz

  645 14:08:29.760584  Enabling SMIs.

  646 14:08:29.763240  Locking SMM.

  647 14:08:29.777021  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  648 14:08:29.780322  CBFS @ c08000 size 3f8000

  649 14:08:29.786882  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  650 14:08:29.786967  CBFS: Locating 'vbt.bin'

  651 14:08:29.790295  CBFS: Found @ offset 5f5c0 size 499

  652 14:08:29.797317  Found a VBT of 4608 bytes after decompression

  653 14:08:29.982593  Display FSP Version Info HOB

  654 14:08:29.986438  Reference Code - CPU = 9.0.1e.30

  655 14:08:29.989776  uCode Version = 0.0.0.ca

  656 14:08:29.993041  TXT ACM version = ff.ff.ff.ffff

  657 14:08:29.996433  Display FSP Version Info HOB

  658 14:08:29.999741  Reference Code - ME = 9.0.1e.30

  659 14:08:30.002963  MEBx version = 0.0.0.0

  660 14:08:30.006392  ME Firmware Version = Consumer SKU

  661 14:08:30.009708  Display FSP Version Info HOB

  662 14:08:30.012430  Reference Code - CML PCH = 9.0.1e.30

  663 14:08:30.015848  PCH-CRID Status = Disabled

  664 14:08:30.019298  PCH-CRID Original Value = ff.ff.ff.ffff

  665 14:08:30.022610  PCH-CRID New Value = ff.ff.ff.ffff

  666 14:08:30.025782  OPROM - RST - RAID = ff.ff.ff.ffff

  667 14:08:30.029084  ChipsetInit Base Version = ff.ff.ff.ffff

  668 14:08:30.032498  ChipsetInit Oem Version = ff.ff.ff.ffff

  669 14:08:30.035783  Display FSP Version Info HOB

  670 14:08:30.042626  Reference Code - SA - System Agent = 9.0.1e.30

  671 14:08:30.046142  Reference Code - MRC = 0.7.1.6c

  672 14:08:30.046227  SA - PCIe Version = 9.0.1e.30

  673 14:08:30.049451  SA-CRID Status = Disabled

  674 14:08:30.052815  SA-CRID Original Value = 0.0.0.c

  675 14:08:30.055517  SA-CRID New Value = 0.0.0.c

  676 14:08:30.058846  OPROM - VBIOS = ff.ff.ff.ffff

  677 14:08:30.062590  RTC Init

  678 14:08:30.066003  Set power on after power failure.

  679 14:08:30.066085  Disabling Deep S3

  680 14:08:30.069369  Disabling Deep S3

  681 14:08:30.069473  Disabling Deep S4

  682 14:08:30.072616  Disabling Deep S4

  683 14:08:30.072694  Disabling Deep S5

  684 14:08:30.075821  Disabling Deep S5

  685 14:08:30.082295  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1

  686 14:08:30.082378  Enumerating buses...

  687 14:08:30.088746  Show all devs... Before device enumeration.

  688 14:08:30.088830  Root Device: enabled 1

  689 14:08:30.092460  CPU_CLUSTER: 0: enabled 1

  690 14:08:30.095606  DOMAIN: 0000: enabled 1

  691 14:08:30.099009  APIC: 00: enabled 1

  692 14:08:30.099098  PCI: 00:00.0: enabled 1

  693 14:08:30.102296  PCI: 00:02.0: enabled 1

  694 14:08:30.105367  PCI: 00:04.0: enabled 0

  695 14:08:30.108763  PCI: 00:05.0: enabled 0

  696 14:08:30.108850  PCI: 00:12.0: enabled 1

  697 14:08:30.111981  PCI: 00:12.5: enabled 0

  698 14:08:30.115252  PCI: 00:12.6: enabled 0

  699 14:08:30.115336  PCI: 00:14.0: enabled 1

  700 14:08:30.118647  PCI: 00:14.1: enabled 0

  701 14:08:30.122003  PCI: 00:14.3: enabled 1

  702 14:08:30.125417  PCI: 00:14.5: enabled 0

  703 14:08:30.125548  PCI: 00:15.0: enabled 1

  704 14:08:30.128672  PCI: 00:15.1: enabled 1

  705 14:08:30.132012  PCI: 00:15.2: enabled 0

  706 14:08:30.135369  PCI: 00:15.3: enabled 0

  707 14:08:30.135463  PCI: 00:16.0: enabled 1

  708 14:08:30.138704  PCI: 00:16.1: enabled 0

  709 14:08:30.142061  PCI: 00:16.2: enabled 0

  710 14:08:30.145416  PCI: 00:16.3: enabled 0

  711 14:08:30.145531  PCI: 00:16.4: enabled 0

  712 14:08:30.148841  PCI: 00:16.5: enabled 0

  713 14:08:30.152230  PCI: 00:17.0: enabled 1

  714 14:08:30.152309  PCI: 00:19.0: enabled 1

  715 14:08:30.154980  PCI: 00:19.1: enabled 0

  716 14:08:30.158412  PCI: 00:19.2: enabled 0

  717 14:08:30.161758  PCI: 00:1a.0: enabled 0

  718 14:08:30.161845  PCI: 00:1c.0: enabled 0

  719 14:08:30.165065  PCI: 00:1c.1: enabled 0

  720 14:08:30.168424  PCI: 00:1c.2: enabled 0

  721 14:08:30.171928  PCI: 00:1c.3: enabled 0

  722 14:08:30.172030  PCI: 00:1c.4: enabled 0

  723 14:08:30.175330  PCI: 00:1c.5: enabled 0

  724 14:08:30.178027  PCI: 00:1c.6: enabled 0

  725 14:08:30.181422  PCI: 00:1c.7: enabled 0

  726 14:08:30.181565  PCI: 00:1d.0: enabled 1

  727 14:08:30.184692  PCI: 00:1d.1: enabled 0

  728 14:08:30.188497  PCI: 00:1d.2: enabled 0

  729 14:08:30.191836  PCI: 00:1d.3: enabled 0

  730 14:08:30.191921  PCI: 00:1d.4: enabled 0

  731 14:08:30.194955  PCI: 00:1d.5: enabled 1

  732 14:08:30.198183  PCI: 00:1e.0: enabled 1

  733 14:08:30.198267  PCI: 00:1e.1: enabled 0

  734 14:08:30.201289  PCI: 00:1e.2: enabled 1

  735 14:08:30.204524  PCI: 00:1e.3: enabled 1

  736 14:08:30.207938  PCI: 00:1f.0: enabled 1

  737 14:08:30.208023  PCI: 00:1f.1: enabled 1

  738 14:08:30.211192  PCI: 00:1f.2: enabled 1

  739 14:08:30.215124  PCI: 00:1f.3: enabled 1

  740 14:08:30.217787  PCI: 00:1f.4: enabled 1

  741 14:08:30.217895  PCI: 00:1f.5: enabled 1

  742 14:08:30.221082  PCI: 00:1f.6: enabled 0

  743 14:08:30.224404  USB0 port 0: enabled 1

  744 14:08:30.224509  I2C: 00:15: enabled 1

  745 14:08:30.227786  I2C: 00:5d: enabled 1

  746 14:08:30.231236  GENERIC: 0.0: enabled 1

  747 14:08:30.234563  I2C: 00:1a: enabled 1

  748 14:08:30.234675  I2C: 00:38: enabled 1

  749 14:08:30.237823  I2C: 00:39: enabled 1

  750 14:08:30.241173  I2C: 00:3a: enabled 1

  751 14:08:30.241290  I2C: 00:3b: enabled 1

  752 14:08:30.244698  PCI: 00:00.0: enabled 1

  753 14:08:30.248078  SPI: 00: enabled 1

  754 14:08:30.248163  SPI: 01: enabled 1

  755 14:08:30.251370  PNP: 0c09.0: enabled 1

  756 14:08:30.254093  USB2 port 0: enabled 1

  757 14:08:30.254178  USB2 port 1: enabled 1

  758 14:08:30.257347  USB2 port 2: enabled 0

  759 14:08:30.260732  USB2 port 3: enabled 0

  760 14:08:30.260822  USB2 port 5: enabled 0

  761 14:08:30.263979  USB2 port 6: enabled 1

  762 14:08:30.267376  USB2 port 9: enabled 1

  763 14:08:30.270743  USB3 port 0: enabled 1

  764 14:08:30.270895  USB3 port 1: enabled 1

  765 14:08:30.273935  USB3 port 2: enabled 1

  766 14:08:30.277233  USB3 port 3: enabled 1

  767 14:08:30.277343  USB3 port 4: enabled 0

  768 14:08:30.280553  APIC: 02: enabled 1

  769 14:08:30.283959  APIC: 01: enabled 1

  770 14:08:30.284081  APIC: 06: enabled 1

  771 14:08:30.287154  APIC: 03: enabled 1

  772 14:08:30.290282  APIC: 07: enabled 1

  773 14:08:30.290391  APIC: 04: enabled 1

  774 14:08:30.293480  APIC: 05: enabled 1

  775 14:08:30.293619  Compare with tree...

  776 14:08:30.297278  Root Device: enabled 1

  777 14:08:30.300383   CPU_CLUSTER: 0: enabled 1

  778 14:08:30.303496    APIC: 00: enabled 1

  779 14:08:30.303649    APIC: 02: enabled 1

  780 14:08:30.307308    APIC: 01: enabled 1

  781 14:08:30.310506    APIC: 06: enabled 1

  782 14:08:30.310613    APIC: 03: enabled 1

  783 14:08:30.313438    APIC: 07: enabled 1

  784 14:08:30.316605    APIC: 04: enabled 1

  785 14:08:30.316740    APIC: 05: enabled 1

  786 14:08:30.320519   DOMAIN: 0000: enabled 1

  787 14:08:30.323629    PCI: 00:00.0: enabled 1

  788 14:08:30.326830    PCI: 00:02.0: enabled 1

  789 14:08:30.326959    PCI: 00:04.0: enabled 0

  790 14:08:30.329950    PCI: 00:05.0: enabled 0

  791 14:08:30.333702    PCI: 00:12.0: enabled 1

  792 14:08:30.336898    PCI: 00:12.5: enabled 0

  793 14:08:30.340213    PCI: 00:12.6: enabled 0

  794 14:08:30.340336    PCI: 00:14.0: enabled 1

  795 14:08:30.343494     USB0 port 0: enabled 1

  796 14:08:30.346818      USB2 port 0: enabled 1

  797 14:08:30.350151      USB2 port 1: enabled 1

  798 14:08:30.353595      USB2 port 2: enabled 0

  799 14:08:30.356705      USB2 port 3: enabled 0

  800 14:08:30.356800      USB2 port 5: enabled 0

  801 14:08:30.360060      USB2 port 6: enabled 1

  802 14:08:30.363275      USB2 port 9: enabled 1

  803 14:08:30.366552      USB3 port 0: enabled 1

  804 14:08:30.369819      USB3 port 1: enabled 1

  805 14:08:30.369934      USB3 port 2: enabled 1

  806 14:08:30.373184      USB3 port 3: enabled 1

  807 14:08:30.376280      USB3 port 4: enabled 0

  808 14:08:30.379600    PCI: 00:14.1: enabled 0

  809 14:08:30.382881    PCI: 00:14.3: enabled 1

  810 14:08:30.386212    PCI: 00:14.5: enabled 0

  811 14:08:30.386349    PCI: 00:15.0: enabled 1

  812 14:08:30.389468     I2C: 00:15: enabled 1

  813 14:08:30.392682    PCI: 00:15.1: enabled 1

  814 14:08:30.396665     I2C: 00:5d: enabled 1

  815 14:08:30.396787     GENERIC: 0.0: enabled 1

  816 14:08:30.399301    PCI: 00:15.2: enabled 0

  817 14:08:30.403260    PCI: 00:15.3: enabled 0

  818 14:08:30.406205    PCI: 00:16.0: enabled 1

  819 14:08:30.409158    PCI: 00:16.1: enabled 0

  820 14:08:30.409282    PCI: 00:16.2: enabled 0

  821 14:08:30.412817    PCI: 00:16.3: enabled 0

  822 14:08:30.415869    PCI: 00:16.4: enabled 0

  823 14:08:30.419464    PCI: 00:16.5: enabled 0

  824 14:08:30.422488    PCI: 00:17.0: enabled 1

  825 14:08:30.422628    PCI: 00:19.0: enabled 1

  826 14:08:30.425957     I2C: 00:1a: enabled 1

  827 14:08:30.429165     I2C: 00:38: enabled 1

  828 14:08:30.432439     I2C: 00:39: enabled 1

  829 14:08:30.432554     I2C: 00:3a: enabled 1

  830 14:08:30.436053     I2C: 00:3b: enabled 1

  831 14:08:30.439198    PCI: 00:19.1: enabled 0

  832 14:08:30.442329    PCI: 00:19.2: enabled 0

  833 14:08:30.446032    PCI: 00:1a.0: enabled 0

  834 14:08:30.446149    PCI: 00:1c.0: enabled 0

  835 14:08:30.449209    PCI: 00:1c.1: enabled 0

  836 14:08:30.452451    PCI: 00:1c.2: enabled 0

  837 14:08:30.455680    PCI: 00:1c.3: enabled 0

  838 14:08:30.459001    PCI: 00:1c.4: enabled 0

  839 14:08:30.459112    PCI: 00:1c.5: enabled 0

  840 14:08:30.462464    PCI: 00:1c.6: enabled 0

  841 14:08:30.465641    PCI: 00:1c.7: enabled 0

  842 14:08:30.468841    PCI: 00:1d.0: enabled 1

  843 14:08:30.472123    PCI: 00:1d.1: enabled 0

  844 14:08:30.472239    PCI: 00:1d.2: enabled 0

  845 14:08:30.475394    PCI: 00:1d.3: enabled 0

  846 14:08:30.478672    PCI: 00:1d.4: enabled 0

  847 14:08:30.481919    PCI: 00:1d.5: enabled 1

  848 14:08:30.485335     PCI: 00:00.0: enabled 1

  849 14:08:30.485427    PCI: 00:1e.0: enabled 1

  850 14:08:30.488635    PCI: 00:1e.1: enabled 0

  851 14:08:30.491956    PCI: 00:1e.2: enabled 1

  852 14:08:30.495196     SPI: 00: enabled 1

  853 14:08:30.495287    PCI: 00:1e.3: enabled 1

  854 14:08:30.498483     SPI: 01: enabled 1

  855 14:08:30.501837    PCI: 00:1f.0: enabled 1

  856 14:08:30.504992     PNP: 0c09.0: enabled 1

  857 14:08:30.508249    PCI: 00:1f.1: enabled 1

  858 14:08:30.508337    PCI: 00:1f.2: enabled 1

  859 14:08:30.511625    PCI: 00:1f.3: enabled 1

  860 14:08:30.514835    PCI: 00:1f.4: enabled 1

  861 14:08:30.518652    PCI: 00:1f.5: enabled 1

  862 14:08:30.518785    PCI: 00:1f.6: enabled 0

  863 14:08:30.521500  Root Device scanning...

  864 14:08:30.525314  scan_static_bus for Root Device

  865 14:08:30.528489  CPU_CLUSTER: 0 enabled

  866 14:08:30.531558  DOMAIN: 0000 enabled

  867 14:08:30.531700  DOMAIN: 0000 scanning...

  868 14:08:30.535317  PCI: pci_scan_bus for bus 00

  869 14:08:30.538391  PCI: 00:00.0 [8086/0000] ops

  870 14:08:30.541682  PCI: 00:00.0 [8086/9b61] enabled

  871 14:08:30.544744  PCI: 00:02.0 [8086/0000] bus ops

  872 14:08:30.547771  PCI: 00:02.0 [8086/9b41] enabled

  873 14:08:30.551553  PCI: 00:04.0 [8086/1903] disabled

  874 14:08:30.554657  PCI: 00:08.0 [8086/1911] enabled

  875 14:08:30.557914  PCI: 00:12.0 [8086/02f9] enabled

  876 14:08:30.561338  PCI: 00:14.0 [8086/0000] bus ops

  877 14:08:30.564685  PCI: 00:14.0 [8086/02ed] enabled

  878 14:08:30.567945  PCI: 00:14.2 [8086/02ef] enabled

  879 14:08:30.571279  PCI: 00:14.3 [8086/02f0] enabled

  880 14:08:30.574597  PCI: 00:15.0 [8086/0000] bus ops

  881 14:08:30.577859  PCI: 00:15.0 [8086/02e8] enabled

  882 14:08:30.581258  PCI: 00:15.1 [8086/0000] bus ops

  883 14:08:30.584516  PCI: 00:15.1 [8086/02e9] enabled

  884 14:08:30.587787  PCI: 00:16.0 [8086/0000] ops

  885 14:08:30.591050  PCI: 00:16.0 [8086/02e0] enabled

  886 14:08:30.594859  PCI: 00:17.0 [8086/0000] ops

  887 14:08:30.598184  PCI: 00:17.0 [8086/02d3] enabled

  888 14:08:30.601284  PCI: 00:19.0 [8086/0000] bus ops

  889 14:08:30.604492  PCI: 00:19.0 [8086/02c5] enabled

  890 14:08:30.607799  PCI: 00:1d.0 [8086/0000] bus ops

  891 14:08:30.611054  PCI: 00:1d.0 [8086/02b0] enabled

  892 14:08:30.617527  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  893 14:08:30.621464  PCI: 00:1e.0 [8086/0000] ops

  894 14:08:30.624402  PCI: 00:1e.0 [8086/02a8] enabled

  895 14:08:30.627745  PCI: 00:1e.2 [8086/0000] bus ops

  896 14:08:30.630850  PCI: 00:1e.2 [8086/02aa] enabled

  897 14:08:30.634430  PCI: 00:1e.3 [8086/0000] bus ops

  898 14:08:30.637640  PCI: 00:1e.3 [8086/02ab] enabled

  899 14:08:30.641310  PCI: 00:1f.0 [8086/0000] bus ops

  900 14:08:30.644412  PCI: 00:1f.0 [8086/0284] enabled

  901 14:08:30.648001  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  902 14:08:30.654347  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  903 14:08:30.657591  PCI: 00:1f.3 [8086/0000] bus ops

  904 14:08:30.660804  PCI: 00:1f.3 [8086/02c8] enabled

  905 14:08:30.664581  PCI: 00:1f.4 [8086/0000] bus ops

  906 14:08:30.667717  PCI: 00:1f.4 [8086/02a3] enabled

  907 14:08:30.670889  PCI: 00:1f.5 [8086/0000] bus ops

  908 14:08:30.674338  PCI: 00:1f.5 [8086/02a4] enabled

  909 14:08:30.677864  PCI: Leftover static devices:

  910 14:08:30.680578  PCI: 00:05.0

  911 14:08:30.680743  PCI: 00:12.5

  912 14:08:30.680851  PCI: 00:12.6

  913 14:08:30.683896  PCI: 00:14.1

  914 14:08:30.684048  PCI: 00:14.5

  915 14:08:30.687192  PCI: 00:15.2

  916 14:08:30.687357  PCI: 00:15.3

  917 14:08:30.687430  PCI: 00:16.1

  918 14:08:30.690636  PCI: 00:16.2

  919 14:08:30.690781  PCI: 00:16.3

  920 14:08:30.693986  PCI: 00:16.4

  921 14:08:30.694134  PCI: 00:16.5

  922 14:08:30.694211  PCI: 00:19.1

  923 14:08:30.697332  PCI: 00:19.2

  924 14:08:30.697468  PCI: 00:1a.0

  925 14:08:30.700645  PCI: 00:1c.0

  926 14:08:30.700807  PCI: 00:1c.1

  927 14:08:30.703920  PCI: 00:1c.2

  928 14:08:30.704081  PCI: 00:1c.3

  929 14:08:30.704160  PCI: 00:1c.4

  930 14:08:30.707111  PCI: 00:1c.5

  931 14:08:30.707269  PCI: 00:1c.6

  932 14:08:30.710500  PCI: 00:1c.7

  933 14:08:30.710665  PCI: 00:1d.1

  934 14:08:30.710744  PCI: 00:1d.2

  935 14:08:30.713735  PCI: 00:1d.3

  936 14:08:30.713887  PCI: 00:1d.4

  937 14:08:30.717031  PCI: 00:1d.5

  938 14:08:30.717238  PCI: 00:1e.1

  939 14:08:30.717344  PCI: 00:1f.1

  940 14:08:30.720344  PCI: 00:1f.2

  941 14:08:30.720509  PCI: 00:1f.6

  942 14:08:30.724262  PCI: Check your devicetree.cb.

  943 14:08:30.727452  PCI: 00:02.0 scanning...

  944 14:08:30.730663  scan_generic_bus for PCI: 00:02.0

  945 14:08:30.733902  scan_generic_bus for PCI: 00:02.0 done

  946 14:08:30.740371  scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs

  947 14:08:30.744019  PCI: 00:14.0 scanning...

  948 14:08:30.747195  scan_static_bus for PCI: 00:14.0

  949 14:08:30.747413  USB0 port 0 enabled

  950 14:08:30.750366  USB0 port 0 scanning...

  951 14:08:30.753485  scan_static_bus for USB0 port 0

  952 14:08:30.756798  USB2 port 0 enabled

  953 14:08:30.756977  USB2 port 1 enabled

  954 14:08:30.760508  USB2 port 2 disabled

  955 14:08:30.763779  USB2 port 3 disabled

  956 14:08:30.763967  USB2 port 5 disabled

  957 14:08:30.766916  USB2 port 6 enabled

  958 14:08:30.770107  USB2 port 9 enabled

  959 14:08:30.770263  USB3 port 0 enabled

  960 14:08:30.773875  USB3 port 1 enabled

  961 14:08:30.774058  USB3 port 2 enabled

  962 14:08:30.777159  USB3 port 3 enabled

  963 14:08:30.780464  USB3 port 4 disabled

  964 14:08:30.780645  USB2 port 0 scanning...

  965 14:08:30.783794  scan_static_bus for USB2 port 0

  966 14:08:30.790283  scan_static_bus for USB2 port 0 done

  967 14:08:30.793974  scan_bus: scanning of bus USB2 port 0 took 9704 usecs

  968 14:08:30.797212  USB2 port 1 scanning...

  969 14:08:30.800492  scan_static_bus for USB2 port 1

  970 14:08:30.803907  scan_static_bus for USB2 port 1 done

  971 14:08:30.810463  scan_bus: scanning of bus USB2 port 1 took 9697 usecs

  972 14:08:30.810631  USB2 port 6 scanning...

  973 14:08:30.813772  scan_static_bus for USB2 port 6

  974 14:08:30.820294  scan_static_bus for USB2 port 6 done

  975 14:08:30.823579  scan_bus: scanning of bus USB2 port 6 took 9702 usecs

  976 14:08:30.827340  USB2 port 9 scanning...

  977 14:08:30.830062  scan_static_bus for USB2 port 9

  978 14:08:30.834033  scan_static_bus for USB2 port 9 done

  979 14:08:30.840509  scan_bus: scanning of bus USB2 port 9 took 9703 usecs

  980 14:08:30.840686  USB3 port 0 scanning...

  981 14:08:30.843780  scan_static_bus for USB3 port 0

  982 14:08:30.850282  scan_static_bus for USB3 port 0 done

  983 14:08:30.854128  scan_bus: scanning of bus USB3 port 0 took 9704 usecs

  984 14:08:30.857274  USB3 port 1 scanning...

  985 14:08:30.860393  scan_static_bus for USB3 port 1

  986 14:08:30.863719  scan_static_bus for USB3 port 1 done

  987 14:08:30.870402  scan_bus: scanning of bus USB3 port 1 took 9705 usecs

  988 14:08:30.870569  USB3 port 2 scanning...

  989 14:08:30.873693  scan_static_bus for USB3 port 2

  990 14:08:30.880603  scan_static_bus for USB3 port 2 done

  991 14:08:30.883887  scan_bus: scanning of bus USB3 port 2 took 9688 usecs

  992 14:08:30.887320  USB3 port 3 scanning...

  993 14:08:30.890652  scan_static_bus for USB3 port 3

  994 14:08:30.894018  scan_static_bus for USB3 port 3 done

  995 14:08:30.900381  scan_bus: scanning of bus USB3 port 3 took 9687 usecs

  996 14:08:30.903661  scan_static_bus for USB0 port 0 done

  997 14:08:30.906910  scan_bus: scanning of bus USB0 port 0 took 155332 usecs

  998 14:08:30.913995  scan_static_bus for PCI: 00:14.0 done

  999 14:08:30.917213  scan_bus: scanning of bus PCI: 00:14.0 took 172938 usecs

 1000 14:08:30.920517  PCI: 00:15.0 scanning...

 1001 14:08:30.923772  scan_generic_bus for PCI: 00:15.0

 1002 14:08:30.927079  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1003 14:08:30.933505  scan_generic_bus for PCI: 00:15.0 done

 1004 14:08:30.936721  scan_bus: scanning of bus PCI: 00:15.0 took 14289 usecs

 1005 14:08:30.939961  PCI: 00:15.1 scanning...

 1006 14:08:30.943366  scan_generic_bus for PCI: 00:15.1

 1007 14:08:30.946567  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1008 14:08:30.953698  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1009 14:08:30.956890  scan_generic_bus for PCI: 00:15.1 done

 1010 14:08:30.963237  scan_bus: scanning of bus PCI: 00:15.1 took 18582 usecs

 1011 14:08:30.963430  PCI: 00:19.0 scanning...

 1012 14:08:30.966432  scan_generic_bus for PCI: 00:19.0

 1013 14:08:30.973380  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1014 14:08:30.977060  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1015 14:08:30.980246  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1016 14:08:30.983452  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1017 14:08:30.989866  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1018 14:08:30.993297  scan_generic_bus for PCI: 00:19.0 done

 1019 14:08:30.996546  scan_bus: scanning of bus PCI: 00:19.0 took 30743 usecs

 1020 14:08:30.999928  PCI: 00:1d.0 scanning...

 1021 14:08:31.003277  do_pci_scan_bridge for PCI: 00:1d.0

 1022 14:08:31.006553  PCI: pci_scan_bus for bus 01

 1023 14:08:31.009807  PCI: 01:00.0 [1c5c/1327] enabled

 1024 14:08:31.013073  Enabling Common Clock Configuration

 1025 14:08:31.020104  L1 Sub-State supported from root port 29

 1026 14:08:31.020304  L1 Sub-State Support = 0xf

 1027 14:08:31.023258  CommonModeRestoreTime = 0x28

 1028 14:08:31.029713  Power On Value = 0x16, Power On Scale = 0x0

 1029 14:08:31.029922  ASPM: Enabled L1

 1030 14:08:31.036306  scan_bus: scanning of bus PCI: 00:1d.0 took 32780 usecs

 1031 14:08:31.039583  PCI: 00:1e.2 scanning...

 1032 14:08:31.043369  scan_generic_bus for PCI: 00:1e.2

 1033 14:08:31.046636  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1034 14:08:31.049933  scan_generic_bus for PCI: 00:1e.2 done

 1035 14:08:31.056018  scan_bus: scanning of bus PCI: 00:1e.2 took 13986 usecs

 1036 14:08:31.059240  PCI: 00:1e.3 scanning...

 1037 14:08:31.063120  scan_generic_bus for PCI: 00:1e.3

 1038 14:08:31.066222  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1039 14:08:31.069343  scan_generic_bus for PCI: 00:1e.3 done

 1040 14:08:31.076369  scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs

 1041 14:08:31.076577  PCI: 00:1f.0 scanning...

 1042 14:08:31.079522  scan_static_bus for PCI: 00:1f.0

 1043 14:08:31.082647  PNP: 0c09.0 enabled

 1044 14:08:31.086298  scan_static_bus for PCI: 00:1f.0 done

 1045 14:08:31.092606  scan_bus: scanning of bus PCI: 00:1f.0 took 12030 usecs

 1046 14:08:31.095816  PCI: 00:1f.3 scanning...

 1047 14:08:31.099100  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs

 1048 14:08:31.102413  PCI: 00:1f.4 scanning...

 1049 14:08:31.105681  scan_generic_bus for PCI: 00:1f.4

 1050 14:08:31.109663  scan_generic_bus for PCI: 00:1f.4 done

 1051 14:08:31.116122  scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs

 1052 14:08:31.119296  PCI: 00:1f.5 scanning...

 1053 14:08:31.122412  scan_generic_bus for PCI: 00:1f.5

 1054 14:08:31.126212  scan_generic_bus for PCI: 00:1f.5 done

 1055 14:08:31.132667  scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs

 1056 14:08:31.139282  scan_bus: scanning of bus DOMAIN: 0000 took 604866 usecs

 1057 14:08:31.142521  scan_static_bus for Root Device done

 1058 14:08:31.145790  scan_bus: scanning of bus Root Device took 624743 usecs

 1059 14:08:31.148993  done

 1060 14:08:31.152766  Chrome EC: UHEPI supported

 1061 14:08:31.156134  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1062 14:08:31.162757  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1063 14:08:31.169218  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1064 14:08:31.175592  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1065 14:08:31.178841  SPI flash protection: WPSW=0 SRP0=1

 1066 14:08:31.185309  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1067 14:08:31.188561  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1068 14:08:31.192224  found VGA at PCI: 00:02.0

 1069 14:08:31.195340  Setting up VGA for PCI: 00:02.0

 1070 14:08:31.202348  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1071 14:08:31.205530  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1072 14:08:31.208732  Allocating resources...

 1073 14:08:31.212086  Reading resources...

 1074 14:08:31.215368  Root Device read_resources bus 0 link: 0

 1075 14:08:31.218738  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1076 14:08:31.225013  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1077 14:08:31.228372  DOMAIN: 0000 read_resources bus 0 link: 0

 1078 14:08:31.235613  PCI: 00:14.0 read_resources bus 0 link: 0

 1079 14:08:31.238833  USB0 port 0 read_resources bus 0 link: 0

 1080 14:08:31.247389  USB0 port 0 read_resources bus 0 link: 0 done

 1081 14:08:31.250680  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1082 14:08:31.257834  PCI: 00:15.0 read_resources bus 1 link: 0

 1083 14:08:31.261055  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1084 14:08:31.267497  PCI: 00:15.1 read_resources bus 2 link: 0

 1085 14:08:31.270907  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1086 14:08:31.278567  PCI: 00:19.0 read_resources bus 3 link: 0

 1087 14:08:31.284689  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1088 14:08:31.288520  PCI: 00:1d.0 read_resources bus 1 link: 0

 1089 14:08:31.294939  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1090 14:08:31.298419  PCI: 00:1e.2 read_resources bus 4 link: 0

 1091 14:08:31.304647  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1092 14:08:31.308504  PCI: 00:1e.3 read_resources bus 5 link: 0

 1093 14:08:31.314837  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1094 14:08:31.318133  PCI: 00:1f.0 read_resources bus 0 link: 0

 1095 14:08:31.324616  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1096 14:08:31.331282  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1097 14:08:31.334486  Root Device read_resources bus 0 link: 0 done

 1098 14:08:31.338367  Done reading resources.

 1099 14:08:31.341673  Show resources in subtree (Root Device)...After reading.

 1100 14:08:31.348228   Root Device child on link 0 CPU_CLUSTER: 0

 1101 14:08:31.351569    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1102 14:08:31.351731     APIC: 00

 1103 14:08:31.354845     APIC: 02

 1104 14:08:31.355002     APIC: 01

 1105 14:08:31.357968     APIC: 06

 1106 14:08:31.358116     APIC: 03

 1107 14:08:31.358215     APIC: 07

 1108 14:08:31.361243     APIC: 04

 1109 14:08:31.361419     APIC: 05

 1110 14:08:31.364697    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1111 14:08:31.417699    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1112 14:08:31.418318    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1113 14:08:31.418431     PCI: 00:00.0

 1114 14:08:31.418708     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1115 14:08:31.418787     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1116 14:08:31.419460     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1117 14:08:31.440669     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1118 14:08:31.441046     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1119 14:08:31.444057     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1120 14:08:31.450684     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1121 14:08:31.461103     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1122 14:08:31.470821     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1123 14:08:31.480856     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1124 14:08:31.490659     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1125 14:08:31.497421     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1126 14:08:31.506969     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1127 14:08:31.517244     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1128 14:08:31.527353     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1129 14:08:31.536723     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1130 14:08:31.536905     PCI: 00:02.0

 1131 14:08:31.546865     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1132 14:08:31.559956     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1133 14:08:31.566585     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1134 14:08:31.569926     PCI: 00:04.0

 1135 14:08:31.570116     PCI: 00:08.0

 1136 14:08:31.579782     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1137 14:08:31.583127     PCI: 00:12.0

 1138 14:08:31.593081     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1139 14:08:31.596414     PCI: 00:14.0 child on link 0 USB0 port 0

 1140 14:08:31.606600     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1141 14:08:31.609799      USB0 port 0 child on link 0 USB2 port 0

 1142 14:08:31.613185       USB2 port 0

 1143 14:08:31.613376       USB2 port 1

 1144 14:08:31.616366       USB2 port 2

 1145 14:08:31.616543       USB2 port 3

 1146 14:08:31.619653       USB2 port 5

 1147 14:08:31.623166       USB2 port 6

 1148 14:08:31.623360       USB2 port 9

 1149 14:08:31.626084       USB3 port 0

 1150 14:08:31.626227       USB3 port 1

 1151 14:08:31.629281       USB3 port 2

 1152 14:08:31.629462       USB3 port 3

 1153 14:08:31.633133       USB3 port 4

 1154 14:08:31.633321     PCI: 00:14.2

 1155 14:08:31.642702     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1156 14:08:31.652902     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1157 14:08:31.655990     PCI: 00:14.3

 1158 14:08:31.665946     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1159 14:08:31.669267     PCI: 00:15.0 child on link 0 I2C: 01:15

 1160 14:08:31.678990     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 14:08:31.679158      I2C: 01:15

 1162 14:08:31.685659     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1163 14:08:31.695635     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1164 14:08:31.695822      I2C: 02:5d

 1165 14:08:31.698943      GENERIC: 0.0

 1166 14:08:31.699117     PCI: 00:16.0

 1167 14:08:31.708931     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1168 14:08:31.712317     PCI: 00:17.0

 1169 14:08:31.719241     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1170 14:08:31.729060     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1171 14:08:31.738543     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1172 14:08:31.745351     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1173 14:08:31.755669     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1174 14:08:31.762175     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1175 14:08:31.768852     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1176 14:08:31.778595     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1177 14:08:31.778755      I2C: 03:1a

 1178 14:08:31.781860      I2C: 03:38

 1179 14:08:31.781996      I2C: 03:39

 1180 14:08:31.785094      I2C: 03:3a

 1181 14:08:31.785214      I2C: 03:3b

 1182 14:08:31.788485     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1183 14:08:31.798420     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1184 14:08:31.808215     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1185 14:08:31.818503     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1186 14:08:31.818610      PCI: 01:00.0

 1187 14:08:31.828195      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1188 14:08:31.831456     PCI: 00:1e.0

 1189 14:08:31.841141     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1190 14:08:31.851122     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1191 14:08:31.854902     PCI: 00:1e.2 child on link 0 SPI: 00

 1192 14:08:31.864271     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1193 14:08:31.867474      SPI: 00

 1194 14:08:31.871328     PCI: 00:1e.3 child on link 0 SPI: 01

 1195 14:08:31.881180     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1196 14:08:31.881265      SPI: 01

 1197 14:08:31.887596     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1198 14:08:31.894313     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1199 14:08:31.904358     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1200 14:08:31.904443      PNP: 0c09.0

 1201 14:08:31.914253      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1202 14:08:31.917370     PCI: 00:1f.3

 1203 14:08:31.926891     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1204 14:08:31.937164     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1205 14:08:31.937250     PCI: 00:1f.4

 1206 14:08:31.947149     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1207 14:08:31.956932     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1208 14:08:31.957032     PCI: 00:1f.5

 1209 14:08:31.967103     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1210 14:08:31.973381  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1211 14:08:31.979909  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1212 14:08:31.986473  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1213 14:08:31.989684  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1214 14:08:31.993583  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1215 14:08:31.996883  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1216 14:08:32.000081  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1217 14:08:32.006763  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1218 14:08:32.013273  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1219 14:08:32.023107  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1220 14:08:32.029466  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1221 14:08:32.036425  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1222 14:08:32.042759  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1223 14:08:32.049190  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1224 14:08:32.052405  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1225 14:08:32.059585  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1226 14:08:32.062500  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1227 14:08:32.069283  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1228 14:08:32.072572  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1229 14:08:32.079636  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1230 14:08:32.082762  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1231 14:08:32.089044  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1232 14:08:32.092225  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1233 14:08:32.099424  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1234 14:08:32.102127  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1235 14:08:32.109317  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1236 14:08:32.112633  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1237 14:08:32.115928  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1238 14:08:32.122405  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1239 14:08:32.125917  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1240 14:08:32.132069  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1241 14:08:32.135325  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1242 14:08:32.142104  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1243 14:08:32.145283  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1244 14:08:32.152520  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1245 14:08:32.155753  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1246 14:08:32.162397  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1247 14:08:32.168664  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1248 14:08:32.171843  avoid_fixed_resources: DOMAIN: 0000

 1249 14:08:32.178715  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1250 14:08:32.185101  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1251 14:08:32.191944  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1252 14:08:32.201411  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1253 14:08:32.208129  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1254 14:08:32.215312  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1255 14:08:32.224690  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1256 14:08:32.231357  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1257 14:08:32.237746  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1258 14:08:32.244697  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1259 14:08:32.254633  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1260 14:08:32.261364  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1261 14:08:32.264684  Setting resources...

 1262 14:08:32.267900  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1263 14:08:32.274130  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1264 14:08:32.277357  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1265 14:08:32.281007  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1266 14:08:32.284234  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1267 14:08:32.291238  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1268 14:08:32.297515  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1269 14:08:32.303882  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1270 14:08:32.310355  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1271 14:08:32.317565  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1272 14:08:32.320295  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1273 14:08:32.327012  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1274 14:08:32.330291  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1275 14:08:32.336916  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1276 14:08:32.340180  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1277 14:08:32.347095  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1278 14:08:32.350287  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1279 14:08:32.356901  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1280 14:08:32.360002  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1281 14:08:32.366562  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1282 14:08:32.369764  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1283 14:08:32.376792  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1284 14:08:32.379830  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1285 14:08:32.383021  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1286 14:08:32.389896  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1287 14:08:32.393069  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1288 14:08:32.399584  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1289 14:08:32.402867  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1290 14:08:32.409703  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1291 14:08:32.412873  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1292 14:08:32.419310  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1293 14:08:32.423153  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1294 14:08:32.432994  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1295 14:08:32.439620  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1296 14:08:32.445685  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1297 14:08:32.452599  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1298 14:08:32.458958  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1299 14:08:32.465736  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1300 14:08:32.469046  Root Device assign_resources, bus 0 link: 0

 1301 14:08:32.475694  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1302 14:08:32.482698  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1303 14:08:32.492685  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1304 14:08:32.498876  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1305 14:08:32.508928  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1306 14:08:32.515372  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1307 14:08:32.525663  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1308 14:08:32.529021  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1309 14:08:32.532371  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1310 14:08:32.542274  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1311 14:08:32.548941  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1312 14:08:32.558527  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1313 14:08:32.565434  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1314 14:08:32.572165  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1315 14:08:32.575498  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1316 14:08:32.585377  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1317 14:08:32.588504  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1318 14:08:32.591768  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1319 14:08:32.601757  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1320 14:08:32.608438  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1321 14:08:32.618532  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1322 14:08:32.624982  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1323 14:08:32.631426  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1324 14:08:32.641332  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1325 14:08:32.647974  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1326 14:08:32.657860  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1327 14:08:32.661253  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1328 14:08:32.664371  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1329 14:08:32.674455  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1330 14:08:32.684585  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1331 14:08:32.690816  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1332 14:08:32.697242  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1333 14:08:32.703876  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1334 14:08:32.707227  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1335 14:08:32.717697  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1336 14:08:32.724096  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1337 14:08:32.731090  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1338 14:08:32.734091  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1339 14:08:32.744313  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1340 14:08:32.747674  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1341 14:08:32.750978  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1342 14:08:32.757651  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1343 14:08:32.760945  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1344 14:08:32.767710  LPC: Trying to open IO window from 800 size 1ff

 1345 14:08:32.774421  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1346 14:08:32.784501  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1347 14:08:32.790861  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1348 14:08:32.801255  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1349 14:08:32.804477  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1350 14:08:32.811016  Root Device assign_resources, bus 0 link: 0

 1351 14:08:32.811101  Done setting resources.

 1352 14:08:32.817405  Show resources in subtree (Root Device)...After assigning values.

 1353 14:08:32.823742   Root Device child on link 0 CPU_CLUSTER: 0

 1354 14:08:32.827634    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1355 14:08:32.827720     APIC: 00

 1356 14:08:32.830814     APIC: 02

 1357 14:08:32.830895     APIC: 01

 1358 14:08:32.830959     APIC: 06

 1359 14:08:32.834001     APIC: 03

 1360 14:08:32.834081     APIC: 07

 1361 14:08:32.834145     APIC: 04

 1362 14:08:32.837093     APIC: 05

 1363 14:08:32.840872    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1364 14:08:32.850862    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1365 14:08:32.860198    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1366 14:08:32.863678     PCI: 00:00.0

 1367 14:08:32.873597     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1368 14:08:32.883429     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1369 14:08:32.893489     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1370 14:08:32.900071     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1371 14:08:32.909827     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1372 14:08:32.920258     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1373 14:08:32.929911     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1374 14:08:32.939471     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1375 14:08:32.949857     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1376 14:08:32.956447     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1377 14:08:32.966101     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1378 14:08:32.976095     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1379 14:08:32.986255     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1380 14:08:32.995815     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1381 14:08:33.005785     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1382 14:08:33.012485     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1383 14:08:33.015587     PCI: 00:02.0

 1384 14:08:33.025595     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1385 14:08:33.035757     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1386 14:08:33.045547     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1387 14:08:33.048849     PCI: 00:04.0

 1388 14:08:33.048950     PCI: 00:08.0

 1389 14:08:33.058565     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1390 14:08:33.061841     PCI: 00:12.0

 1391 14:08:33.071887     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1392 14:08:33.075200     PCI: 00:14.0 child on link 0 USB0 port 0

 1393 14:08:33.084960     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1394 14:08:33.091564      USB0 port 0 child on link 0 USB2 port 0

 1395 14:08:33.091644       USB2 port 0

 1396 14:08:33.095279       USB2 port 1

 1397 14:08:33.095350       USB2 port 2

 1398 14:08:33.098302       USB2 port 3

 1399 14:08:33.098374       USB2 port 5

 1400 14:08:33.101404       USB2 port 6

 1401 14:08:33.101506       USB2 port 9

 1402 14:08:33.105234       USB3 port 0

 1403 14:08:33.105333       USB3 port 1

 1404 14:08:33.108256       USB3 port 2

 1405 14:08:33.108361       USB3 port 3

 1406 14:08:33.111892       USB3 port 4

 1407 14:08:33.111991     PCI: 00:14.2

 1408 14:08:33.124708     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1409 14:08:33.134609     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1410 14:08:33.134695     PCI: 00:14.3

 1411 14:08:33.144388     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1412 14:08:33.151308     PCI: 00:15.0 child on link 0 I2C: 01:15

 1413 14:08:33.161522     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1414 14:08:33.161620      I2C: 01:15

 1415 14:08:33.164783     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1416 14:08:33.177974     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1417 14:08:33.178057      I2C: 02:5d

 1418 14:08:33.181253      GENERIC: 0.0

 1419 14:08:33.181360     PCI: 00:16.0

 1420 14:08:33.191074     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1421 14:08:33.194414     PCI: 00:17.0

 1422 14:08:33.204219     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1423 14:08:33.214246     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1424 14:08:33.224276     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1425 14:08:33.230929     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1426 14:08:33.240950     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1427 14:08:33.250253     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1428 14:08:33.254190     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1429 14:08:33.266891     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1430 14:08:33.266980      I2C: 03:1a

 1431 14:08:33.270128      I2C: 03:38

 1432 14:08:33.270210      I2C: 03:39

 1433 14:08:33.270276      I2C: 03:3a

 1434 14:08:33.274017      I2C: 03:3b

 1435 14:08:33.277269     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1436 14:08:33.287041     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1437 14:08:33.296888     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1438 14:08:33.306688     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1439 14:08:33.310013      PCI: 01:00.0

 1440 14:08:33.319950      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1441 14:08:33.322970     PCI: 00:1e.0

 1442 14:08:33.332837     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1443 14:08:33.342958     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1444 14:08:33.346172     PCI: 00:1e.2 child on link 0 SPI: 00

 1445 14:08:33.356436     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1446 14:08:33.359572      SPI: 00

 1447 14:08:33.362782     PCI: 00:1e.3 child on link 0 SPI: 01

 1448 14:08:33.372705     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1449 14:08:33.372795      SPI: 01

 1450 14:08:33.379258     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1451 14:08:33.385910     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1452 14:08:33.395773     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1453 14:08:33.399060      PNP: 0c09.0

 1454 14:08:33.405645      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1455 14:08:33.408851     PCI: 00:1f.3

 1456 14:08:33.418637     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1457 14:08:33.428653     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1458 14:08:33.431921     PCI: 00:1f.4

 1459 14:08:33.438763     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1460 14:08:33.448449     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1461 14:08:33.451798     PCI: 00:1f.5

 1462 14:08:33.461658     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1463 14:08:33.464887  Done allocating resources.

 1464 14:08:33.468314  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1465 14:08:33.472286  Enabling resources...

 1466 14:08:33.478553  PCI: 00:00.0 subsystem <- 8086/9b61

 1467 14:08:33.478700  PCI: 00:00.0 cmd <- 06

 1468 14:08:33.481996  PCI: 00:02.0 subsystem <- 8086/9b41

 1469 14:08:33.485243  PCI: 00:02.0 cmd <- 03

 1470 14:08:33.488504  PCI: 00:08.0 cmd <- 06

 1471 14:08:33.491944  PCI: 00:12.0 subsystem <- 8086/02f9

 1472 14:08:33.495332  PCI: 00:12.0 cmd <- 02

 1473 14:08:33.498735  PCI: 00:14.0 subsystem <- 8086/02ed

 1474 14:08:33.502076  PCI: 00:14.0 cmd <- 02

 1475 14:08:33.502161  PCI: 00:14.2 cmd <- 02

 1476 14:08:33.508865  PCI: 00:14.3 subsystem <- 8086/02f0

 1477 14:08:33.508950  PCI: 00:14.3 cmd <- 02

 1478 14:08:33.512204  PCI: 00:15.0 subsystem <- 8086/02e8

 1479 14:08:33.515453  PCI: 00:15.0 cmd <- 02

 1480 14:08:33.518900  PCI: 00:15.1 subsystem <- 8086/02e9

 1481 14:08:33.522309  PCI: 00:15.1 cmd <- 02

 1482 14:08:33.525480  PCI: 00:16.0 subsystem <- 8086/02e0

 1483 14:08:33.528781  PCI: 00:16.0 cmd <- 02

 1484 14:08:33.532018  PCI: 00:17.0 subsystem <- 8086/02d3

 1485 14:08:33.535345  PCI: 00:17.0 cmd <- 03

 1486 14:08:33.538581  PCI: 00:19.0 subsystem <- 8086/02c5

 1487 14:08:33.541994  PCI: 00:19.0 cmd <- 02

 1488 14:08:33.545028  PCI: 00:1d.0 bridge ctrl <- 0013

 1489 14:08:33.548761  PCI: 00:1d.0 subsystem <- 8086/02b0

 1490 14:08:33.551881  PCI: 00:1d.0 cmd <- 06

 1491 14:08:33.555100  PCI: 00:1e.0 subsystem <- 8086/02a8

 1492 14:08:33.555185  PCI: 00:1e.0 cmd <- 06

 1493 14:08:33.562282  PCI: 00:1e.2 subsystem <- 8086/02aa

 1494 14:08:33.562367  PCI: 00:1e.2 cmd <- 06

 1495 14:08:33.565685  PCI: 00:1e.3 subsystem <- 8086/02ab

 1496 14:08:33.568917  PCI: 00:1e.3 cmd <- 02

 1497 14:08:33.572130  PCI: 00:1f.0 subsystem <- 8086/0284

 1498 14:08:33.575371  PCI: 00:1f.0 cmd <- 407

 1499 14:08:33.578672  PCI: 00:1f.3 subsystem <- 8086/02c8

 1500 14:08:33.581992  PCI: 00:1f.3 cmd <- 02

 1501 14:08:33.585261  PCI: 00:1f.4 subsystem <- 8086/02a3

 1502 14:08:33.588944  PCI: 00:1f.4 cmd <- 03

 1503 14:08:33.592242  PCI: 00:1f.5 subsystem <- 8086/02a4

 1504 14:08:33.595283  PCI: 00:1f.5 cmd <- 406

 1505 14:08:33.603656  PCI: 01:00.0 cmd <- 02

 1506 14:08:33.608906  done.

 1507 14:08:33.621422  ME: Version: 14.0.39.1367

 1508 14:08:33.627957  BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 12

 1509 14:08:33.631277  Initializing devices...

 1510 14:08:33.631364  Root Device init ...

 1511 14:08:33.637635  Chrome EC: Set SMI mask to 0x0000000000000000

 1512 14:08:33.640838  Chrome EC: clear events_b mask to 0x0000000000000000

 1513 14:08:33.647983  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1514 14:08:33.654266  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1515 14:08:33.660923  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1516 14:08:33.664794  Chrome EC: Set WAKE mask to 0x0000000000000000

 1517 14:08:33.667963  Root Device init finished in 35187 usecs

 1518 14:08:33.671319  CPU_CLUSTER: 0 init ...

 1519 14:08:33.677489  CPU_CLUSTER: 0 init finished in 2447 usecs

 1520 14:08:33.682000  PCI: 00:00.0 init ...

 1521 14:08:33.685243  CPU TDP: 15 Watts

 1522 14:08:33.688611  CPU PL2 = 64 Watts

 1523 14:08:33.691974  PCI: 00:00.0 init finished in 7074 usecs

 1524 14:08:33.695696  PCI: 00:02.0 init ...

 1525 14:08:33.698913  PCI: 00:02.0 init finished in 2252 usecs

 1526 14:08:33.701956  PCI: 00:08.0 init ...

 1527 14:08:33.705159  PCI: 00:08.0 init finished in 2253 usecs

 1528 14:08:33.708658  PCI: 00:12.0 init ...

 1529 14:08:33.712087  PCI: 00:12.0 init finished in 2253 usecs

 1530 14:08:33.715224  PCI: 00:14.0 init ...

 1531 14:08:33.718416  PCI: 00:14.0 init finished in 2252 usecs

 1532 14:08:33.721648  PCI: 00:14.2 init ...

 1533 14:08:33.724980  PCI: 00:14.2 init finished in 2252 usecs

 1534 14:08:33.728297  PCI: 00:14.3 init ...

 1535 14:08:33.731608  PCI: 00:14.3 init finished in 2262 usecs

 1536 14:08:33.735467  PCI: 00:15.0 init ...

 1537 14:08:33.738618  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1538 14:08:33.741830  PCI: 00:15.0 init finished in 5968 usecs

 1539 14:08:33.745292  PCI: 00:15.1 init ...

 1540 14:08:33.748426  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1541 14:08:33.754991  PCI: 00:15.1 init finished in 5975 usecs

 1542 14:08:33.755077  PCI: 00:16.0 init ...

 1543 14:08:33.761341  PCI: 00:16.0 init finished in 2251 usecs

 1544 14:08:33.764912  PCI: 00:19.0 init ...

 1545 14:08:33.767970  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1546 14:08:33.771288  PCI: 00:19.0 init finished in 5976 usecs

 1547 14:08:33.774960  PCI: 00:1d.0 init ...

 1548 14:08:33.778177  Initializing PCH PCIe bridge.

 1549 14:08:33.781311  PCI: 00:1d.0 init finished in 5284 usecs

 1550 14:08:33.784828  PCI: 00:1f.0 init ...

 1551 14:08:33.788007  IOAPIC: Initializing IOAPIC at 0xfec00000

 1552 14:08:33.794484  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1553 14:08:33.794575  IOAPIC: ID = 0x02

 1554 14:08:33.797848  IOAPIC: Dumping registers

 1555 14:08:33.800748    reg 0x0000: 0x02000000

 1556 14:08:33.804648    reg 0x0001: 0x00770020

 1557 14:08:33.804722    reg 0x0002: 0x00000000

 1558 14:08:33.810985  PCI: 00:1f.0 init finished in 23525 usecs

 1559 14:08:33.814479  PCI: 00:1f.4 init ...

 1560 14:08:33.817715  PCI: 00:1f.4 init finished in 2262 usecs

 1561 14:08:33.828409  PCI: 01:00.0 init ...

 1562 14:08:33.831105  PCI: 01:00.0 init finished in 2250 usecs

 1563 14:08:33.835814  PNP: 0c09.0 init ...

 1564 14:08:33.839210  Google Chrome EC uptime: 11.100 seconds

 1565 14:08:33.845272  Google Chrome AP resets since EC boot: 0

 1566 14:08:33.848665  Google Chrome most recent AP reset causes:

 1567 14:08:33.855377  Google Chrome EC reset flags at last EC boot: reset-pin

 1568 14:08:33.859254  PNP: 0c09.0 init finished in 20598 usecs

 1569 14:08:33.861914  Devices initialized

 1570 14:08:33.865223  Show all devs... After init.

 1571 14:08:33.865327  Root Device: enabled 1

 1572 14:08:33.869112  CPU_CLUSTER: 0: enabled 1

 1573 14:08:33.872264  DOMAIN: 0000: enabled 1

 1574 14:08:33.872374  APIC: 00: enabled 1

 1575 14:08:33.875590  PCI: 00:00.0: enabled 1

 1576 14:08:33.878722  PCI: 00:02.0: enabled 1

 1577 14:08:33.881904  PCI: 00:04.0: enabled 0

 1578 14:08:33.882013  PCI: 00:05.0: enabled 0

 1579 14:08:33.885122  PCI: 00:12.0: enabled 1

 1580 14:08:33.888495  PCI: 00:12.5: enabled 0

 1581 14:08:33.891872  PCI: 00:12.6: enabled 0

 1582 14:08:33.891957  PCI: 00:14.0: enabled 1

 1583 14:08:33.895054  PCI: 00:14.1: enabled 0

 1584 14:08:33.898299  PCI: 00:14.3: enabled 1

 1585 14:08:33.898376  PCI: 00:14.5: enabled 0

 1586 14:08:33.902016  PCI: 00:15.0: enabled 1

 1587 14:08:33.905149  PCI: 00:15.1: enabled 1

 1588 14:08:33.908477  PCI: 00:15.2: enabled 0

 1589 14:08:33.908576  PCI: 00:15.3: enabled 0

 1590 14:08:33.911785  PCI: 00:16.0: enabled 1

 1591 14:08:33.915070  PCI: 00:16.1: enabled 0

 1592 14:08:33.918334  PCI: 00:16.2: enabled 0

 1593 14:08:33.918445  PCI: 00:16.3: enabled 0

 1594 14:08:33.921763  PCI: 00:16.4: enabled 0

 1595 14:08:33.925167  PCI: 00:16.5: enabled 0

 1596 14:08:33.928311  PCI: 00:17.0: enabled 1

 1597 14:08:33.928395  PCI: 00:19.0: enabled 1

 1598 14:08:33.931560  PCI: 00:19.1: enabled 0

 1599 14:08:33.934928  PCI: 00:19.2: enabled 0

 1600 14:08:33.935012  PCI: 00:1a.0: enabled 0

 1601 14:08:33.938155  PCI: 00:1c.0: enabled 0

 1602 14:08:33.941482  PCI: 00:1c.1: enabled 0

 1603 14:08:33.944782  PCI: 00:1c.2: enabled 0

 1604 14:08:33.944868  PCI: 00:1c.3: enabled 0

 1605 14:08:33.947996  PCI: 00:1c.4: enabled 0

 1606 14:08:33.951416  PCI: 00:1c.5: enabled 0

 1607 14:08:33.954750  PCI: 00:1c.6: enabled 0

 1608 14:08:33.954836  PCI: 00:1c.7: enabled 0

 1609 14:08:33.958026  PCI: 00:1d.0: enabled 1

 1610 14:08:33.961338  PCI: 00:1d.1: enabled 0

 1611 14:08:33.964776  PCI: 00:1d.2: enabled 0

 1612 14:08:33.964862  PCI: 00:1d.3: enabled 0

 1613 14:08:33.967979  PCI: 00:1d.4: enabled 0

 1614 14:08:33.971231  PCI: 00:1d.5: enabled 0

 1615 14:08:33.974428  PCI: 00:1e.0: enabled 1

 1616 14:08:33.974536  PCI: 00:1e.1: enabled 0

 1617 14:08:33.977694  PCI: 00:1e.2: enabled 1

 1618 14:08:33.981068  PCI: 00:1e.3: enabled 1

 1619 14:08:33.981153  PCI: 00:1f.0: enabled 1

 1620 14:08:33.984290  PCI: 00:1f.1: enabled 0

 1621 14:08:33.987463  PCI: 00:1f.2: enabled 0

 1622 14:08:33.991268  PCI: 00:1f.3: enabled 1

 1623 14:08:33.991355  PCI: 00:1f.4: enabled 1

 1624 14:08:33.994564  PCI: 00:1f.5: enabled 1

 1625 14:08:33.997868  PCI: 00:1f.6: enabled 0

 1626 14:08:34.001278  USB0 port 0: enabled 1

 1627 14:08:34.001390  I2C: 01:15: enabled 1

 1628 14:08:34.004394  I2C: 02:5d: enabled 1

 1629 14:08:34.007511  GENERIC: 0.0: enabled 1

 1630 14:08:34.007614  I2C: 03:1a: enabled 1

 1631 14:08:34.010662  I2C: 03:38: enabled 1

 1632 14:08:34.014476  I2C: 03:39: enabled 1

 1633 14:08:34.014562  I2C: 03:3a: enabled 1

 1634 14:08:34.017842  I2C: 03:3b: enabled 1

 1635 14:08:34.021227  PCI: 00:00.0: enabled 1

 1636 14:08:34.021314  SPI: 00: enabled 1

 1637 14:08:34.024308  SPI: 01: enabled 1

 1638 14:08:34.027565  PNP: 0c09.0: enabled 1

 1639 14:08:34.027657  USB2 port 0: enabled 1

 1640 14:08:34.030795  USB2 port 1: enabled 1

 1641 14:08:34.034005  USB2 port 2: enabled 0

 1642 14:08:34.034091  USB2 port 3: enabled 0

 1643 14:08:34.037350  USB2 port 5: enabled 0

 1644 14:08:34.040533  USB2 port 6: enabled 1

 1645 14:08:34.043830  USB2 port 9: enabled 1

 1646 14:08:34.043915  USB3 port 0: enabled 1

 1647 14:08:34.047207  USB3 port 1: enabled 1

 1648 14:08:34.050888  USB3 port 2: enabled 1

 1649 14:08:34.050974  USB3 port 3: enabled 1

 1650 14:08:34.054265  USB3 port 4: enabled 0

 1651 14:08:34.057550  APIC: 02: enabled 1

 1652 14:08:34.057636  APIC: 01: enabled 1

 1653 14:08:34.060840  APIC: 06: enabled 1

 1654 14:08:34.064045  APIC: 03: enabled 1

 1655 14:08:34.064130  APIC: 07: enabled 1

 1656 14:08:34.067343  APIC: 04: enabled 1

 1657 14:08:34.067429  APIC: 05: enabled 1

 1658 14:08:34.070450  PCI: 00:08.0: enabled 1

 1659 14:08:34.073902  PCI: 00:14.2: enabled 1

 1660 14:08:34.077064  PCI: 01:00.0: enabled 1

 1661 14:08:34.080812  Disabling ACPI via APMC:

 1662 14:08:34.080899  done.

 1663 14:08:34.087396  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1664 14:08:34.090655  ELOG: NV offset 0xaf0000 size 0x4000

 1665 14:08:34.097221  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1666 14:08:34.104146  ELOG: Event(17) added with size 13 at 2023-05-19 14:08:33 UTC

 1667 14:08:34.110556  POST: Unexpected post code in previous boot: 0x73

 1668 14:08:34.116962  ELOG: Event(A3) added with size 11 at 2023-05-19 14:08:33 UTC

 1669 14:08:34.123529  ELOG: Event(A6) added with size 13 at 2023-05-19 14:08:33 UTC

 1670 14:08:34.130535  ELOG: Event(92) added with size 9 at 2023-05-19 14:08:33 UTC

 1671 14:08:34.136866  ELOG: Event(93) added with size 9 at 2023-05-19 14:08:33 UTC

 1672 14:08:34.139975  ELOG: Event(9A) added with size 9 at 2023-05-19 14:08:33 UTC

 1673 14:08:34.146670  ELOG: Event(9E) added with size 10 at 2023-05-19 14:08:33 UTC

 1674 14:08:34.153207  ELOG: Event(9F) added with size 14 at 2023-05-19 14:08:33 UTC

 1675 14:08:34.160375  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1676 14:08:34.166900  ELOG: Event(A1) added with size 10 at 2023-05-19 14:08:33 UTC

 1677 14:08:34.173275  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1678 14:08:34.179891  ELOG: Event(A0) added with size 9 at 2023-05-19 14:08:33 UTC

 1679 14:08:34.183243  elog_add_boot_reason: Logged dev mode boot

 1680 14:08:34.186293  Finalize devices...

 1681 14:08:34.189645  PCI: 00:17.0 final

 1682 14:08:34.189727  Devices finalized

 1683 14:08:34.196750  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1684 14:08:34.199895  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1685 14:08:34.206542  ME: HFSTS1                  : 0x90000245

 1686 14:08:34.209683  ME: HFSTS2                  : 0x3B850126

 1687 14:08:34.212622  ME: HFSTS3                  : 0x00000020

 1688 14:08:34.216307  ME: HFSTS4                  : 0x00004800

 1689 14:08:34.222695  ME: HFSTS5                  : 0x00000000

 1690 14:08:34.226349  ME: HFSTS6                  : 0x40400006

 1691 14:08:34.229582  ME: Manufacturing Mode      : NO

 1692 14:08:34.232751  ME: FW Partition Table      : OK

 1693 14:08:34.235944  ME: Bringup Loader Failure  : NO

 1694 14:08:34.239170  ME: Firmware Init Complete  : YES

 1695 14:08:34.242976  ME: Boot Options Present    : NO

 1696 14:08:34.246180  ME: Update In Progress      : NO

 1697 14:08:34.249387  ME: D0i3 Support            : YES

 1698 14:08:34.252599  ME: Low Power State Enabled : NO

 1699 14:08:34.255944  ME: CPU Replaced            : NO

 1700 14:08:34.259158  ME: CPU Replacement Valid   : YES

 1701 14:08:34.262253  ME: Current Working State   : 5

 1702 14:08:34.266185  ME: Current Operation State : 1

 1703 14:08:34.268865  ME: Current Operation Mode  : 0

 1704 14:08:34.272741  ME: Error Code              : 0

 1705 14:08:34.275916  ME: CPU Debug Disabled      : YES

 1706 14:08:34.279247  ME: TXT Support             : NO

 1707 14:08:34.285889  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1708 14:08:34.289036  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1709 14:08:34.292269  CBFS @ c08000 size 3f8000

 1710 14:08:34.298801  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1711 14:08:34.302051  CBFS: Locating 'fallback/dsdt.aml'

 1712 14:08:34.305962  CBFS: Found @ offset 10bb80 size 3fa5

 1713 14:08:34.309325  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1714 14:08:34.312560  CBFS @ c08000 size 3f8000

 1715 14:08:34.318979  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1716 14:08:34.322005  CBFS: Locating 'fallback/slic'

 1717 14:08:34.325890  CBFS: 'fallback/slic' not found.

 1718 14:08:34.332405  ACPI: Writing ACPI tables at 99b3e000.

 1719 14:08:34.332527  ACPI:    * FACS

 1720 14:08:34.336039  ACPI:    * DSDT

 1721 14:08:34.339086  Ramoops buffer: 0x100000@0x99a3d000.

 1722 14:08:34.342303  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1723 14:08:34.349150  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1724 14:08:34.352350  Google Chrome EC: version:

 1725 14:08:34.355799  	ro: helios_v2.0.2659-56403530b

 1726 14:08:34.359040  	rw: helios_v2.0.2849-c41de27e7d

 1727 14:08:34.359147    running image: 1

 1728 14:08:34.362981  ACPI:    * FADT

 1729 14:08:34.363080  SCI is IRQ9

 1730 14:08:34.369985  ACPI: added table 1/32, length now 40

 1731 14:08:34.370090  ACPI:     * SSDT

 1732 14:08:34.373217  Found 1 CPU(s) with 8 core(s) each.

 1733 14:08:34.376471  Error: Could not locate 'wifi_sar' in VPD.

 1734 14:08:34.382818  Checking CBFS for default SAR values

 1735 14:08:34.386102  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1736 14:08:34.389302  CBFS @ c08000 size 3f8000

 1737 14:08:34.396343  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1738 14:08:34.399624  CBFS: Locating 'wifi_sar_defaults.hex'

 1739 14:08:34.402929  CBFS: Found @ offset 5fac0 size 77

 1740 14:08:34.406221  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1741 14:08:34.412843  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1742 14:08:34.416008  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1743 14:08:34.422556  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1744 14:08:34.425857  failed to find key in VPD: dsm_calib_r0_0

 1745 14:08:34.435941  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1746 14:08:34.439203  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1747 14:08:34.442329  failed to find key in VPD: dsm_calib_r0_1

 1748 14:08:34.452230  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1749 14:08:34.459132  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1750 14:08:34.462273  failed to find key in VPD: dsm_calib_r0_2

 1751 14:08:34.472487  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1752 14:08:34.475691  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1753 14:08:34.482184  failed to find key in VPD: dsm_calib_r0_3

 1754 14:08:34.488790  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1755 14:08:34.495204  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1756 14:08:34.498381  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1757 14:08:34.501622  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1758 14:08:34.505650  EC returned error result code 1

 1759 14:08:34.509626  EC returned error result code 1

 1760 14:08:34.513530  EC returned error result code 1

 1761 14:08:34.520152  PS2K: Bad resp from EC. Vivaldi disabled!

 1762 14:08:34.523473  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1763 14:08:34.530256  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1764 14:08:34.536720  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1765 14:08:34.540000  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1766 14:08:34.546882  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1767 14:08:34.553144  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1768 14:08:34.559989  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1769 14:08:34.563144  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1770 14:08:34.569593  ACPI: added table 2/32, length now 44

 1771 14:08:34.569671  ACPI:    * MCFG

 1772 14:08:34.573152  ACPI: added table 3/32, length now 48

 1773 14:08:34.576331  ACPI:    * TPM2

 1774 14:08:34.579619  TPM2 log created at 99a2d000

 1775 14:08:34.582860  ACPI: added table 4/32, length now 52

 1776 14:08:34.582935  ACPI:    * MADT

 1777 14:08:34.586095  SCI is IRQ9

 1778 14:08:34.589276  ACPI: added table 5/32, length now 56

 1779 14:08:34.589348  current = 99b43ac0

 1780 14:08:34.592590  ACPI:    * DMAR

 1781 14:08:34.596471  ACPI: added table 6/32, length now 60

 1782 14:08:34.599630  ACPI:    * IGD OpRegion

 1783 14:08:34.599702  GMA: Found VBT in CBFS

 1784 14:08:34.602845  GMA: Found valid VBT in CBFS

 1785 14:08:34.606090  ACPI: added table 7/32, length now 64

 1786 14:08:34.609426  ACPI:    * HPET

 1787 14:08:34.612599  ACPI: added table 8/32, length now 68

 1788 14:08:34.615881  ACPI: done.

 1789 14:08:34.615964  ACPI tables: 31744 bytes.

 1790 14:08:34.619858  smbios_write_tables: 99a2c000

 1791 14:08:34.623227  EC returned error result code 3

 1792 14:08:34.626450  Couldn't obtain OEM name from CBI

 1793 14:08:34.629697  Create SMBIOS type 17

 1794 14:08:34.632997  PCI: 00:00.0 (Intel Cannonlake)

 1795 14:08:34.636249  PCI: 00:14.3 (Intel WiFi)

 1796 14:08:34.639489  SMBIOS tables: 939 bytes.

 1797 14:08:34.643353  Writing table forward entry at 0x00000500

 1798 14:08:34.649972  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1799 14:08:34.652969  Writing coreboot table at 0x99b62000

 1800 14:08:34.659500   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1801 14:08:34.662759   1. 0000000000001000-000000000009ffff: RAM

 1802 14:08:34.666551   2. 00000000000a0000-00000000000fffff: RESERVED

 1803 14:08:34.672598   3. 0000000000100000-0000000099a2bfff: RAM

 1804 14:08:34.676318   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1805 14:08:34.682562   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1806 14:08:34.689046   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1807 14:08:34.692309   7. 000000009a000000-000000009f7fffff: RESERVED

 1808 14:08:34.699165   8. 00000000e0000000-00000000efffffff: RESERVED

 1809 14:08:34.702332   9. 00000000fc000000-00000000fc000fff: RESERVED

 1810 14:08:34.706082  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1811 14:08:34.712552  11. 00000000fed10000-00000000fed17fff: RESERVED

 1812 14:08:34.715813  12. 00000000fed80000-00000000fed83fff: RESERVED

 1813 14:08:34.722249  13. 00000000fed90000-00000000fed91fff: RESERVED

 1814 14:08:34.725456  14. 00000000feda0000-00000000feda1fff: RESERVED

 1815 14:08:34.732046  15. 0000000100000000-000000045e7fffff: RAM

 1816 14:08:34.735322  Graphics framebuffer located at 0xc0000000

 1817 14:08:34.738601  Passing 5 GPIOs to payload:

 1818 14:08:34.741949              NAME |       PORT | POLARITY |     VALUE

 1819 14:08:34.749066     write protect |  undefined |     high |       low

 1820 14:08:34.752306               lid |  undefined |     high |      high

 1821 14:08:34.758696             power |  undefined |     high |       low

 1822 14:08:34.765267             oprom |  undefined |     high |       low

 1823 14:08:34.768886          EC in RW | 0x000000cb |     high |       low

 1824 14:08:34.772037  Board ID: 4

 1825 14:08:34.775129  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1826 14:08:34.778849  CBFS @ c08000 size 3f8000

 1827 14:08:34.785319  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1828 14:08:34.788280  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1829 14:08:34.791869  coreboot table: 1492 bytes.

 1830 14:08:34.795034  IMD ROOT    0. 99fff000 00001000

 1831 14:08:34.798286  IMD SMALL   1. 99ffe000 00001000

 1832 14:08:34.801645  FSP MEMORY  2. 99c4e000 003b0000

 1833 14:08:34.804928  CONSOLE     3. 99c2e000 00020000

 1834 14:08:34.808209  FMAP        4. 99c2d000 0000054e

 1835 14:08:34.811533  TIME STAMP  5. 99c2c000 00000910

 1836 14:08:34.814850  VBOOT WORK  6. 99c18000 00014000

 1837 14:08:34.818223  MRC DATA    7. 99c16000 00001958

 1838 14:08:34.821500  ROMSTG STCK 8. 99c15000 00001000

 1839 14:08:34.825381  AFTER CAR   9. 99c0b000 0000a000

 1840 14:08:34.828677  RAMSTAGE   10. 99baf000 0005c000

 1841 14:08:34.831938  REFCODE    11. 99b7a000 00035000

 1842 14:08:34.835226  SMM BACKUP 12. 99b6a000 00010000

 1843 14:08:34.838417  COREBOOT   13. 99b62000 00008000

 1844 14:08:34.841848  ACPI       14. 99b3e000 00024000

 1845 14:08:34.845244  ACPI GNVS  15. 99b3d000 00001000

 1846 14:08:34.848577  RAMOOPS    16. 99a3d000 00100000

 1847 14:08:34.851770  TPM2 TCGLOG17. 99a2d000 00010000

 1848 14:08:34.855021  SMBIOS     18. 99a2c000 00000800

 1849 14:08:34.858425  IMD small region:

 1850 14:08:34.861727    IMD ROOT    0. 99ffec00 00000400

 1851 14:08:34.865333    FSP RUNTIME 1. 99ffebe0 00000004

 1852 14:08:34.868541    EC HOSTEVENT 2. 99ffebc0 00000008

 1853 14:08:34.871568    POWER STATE 3. 99ffeb80 00000040

 1854 14:08:34.874859    ROMSTAGE    4. 99ffeb60 00000004

 1855 14:08:34.878652    MEM INFO    5. 99ffe9a0 000001b9

 1856 14:08:34.881847    VPD         6. 99ffe920 0000006c

 1857 14:08:34.885012  MTRR: Physical address space:

 1858 14:08:34.891509  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1859 14:08:34.898471  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1860 14:08:34.904868  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1861 14:08:34.911316  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1862 14:08:34.917799  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1863 14:08:34.925040  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1864 14:08:34.928470  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1865 14:08:34.934742  MTRR: Fixed MSR 0x250 0x0606060606060606

 1866 14:08:34.937877  MTRR: Fixed MSR 0x258 0x0606060606060606

 1867 14:08:34.941060  MTRR: Fixed MSR 0x259 0x0000000000000000

 1868 14:08:34.944310  MTRR: Fixed MSR 0x268 0x0606060606060606

 1869 14:08:34.950852  MTRR: Fixed MSR 0x269 0x0606060606060606

 1870 14:08:34.954197  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1871 14:08:34.957433  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1872 14:08:34.960764  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1873 14:08:34.967896  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1874 14:08:34.971046  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1875 14:08:34.974180  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1876 14:08:34.977385  call enable_fixed_mtrr()

 1877 14:08:34.981269  CPU physical address size: 39 bits

 1878 14:08:34.984529  MTRR: default type WB/UC MTRR counts: 6/8.

 1879 14:08:34.987843  MTRR: WB selected as default type.

 1880 14:08:34.993932  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1881 14:08:35.001032  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1882 14:08:35.007635  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1883 14:08:35.013849  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1884 14:08:35.020990  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1885 14:08:35.027579  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1886 14:08:35.030821  MTRR: Fixed MSR 0x250 0x0606060606060606

 1887 14:08:35.037396  MTRR: Fixed MSR 0x258 0x0606060606060606

 1888 14:08:35.040749  MTRR: Fixed MSR 0x259 0x0000000000000000

 1889 14:08:35.043947  MTRR: Fixed MSR 0x268 0x0606060606060606

 1890 14:08:35.047259  MTRR: Fixed MSR 0x269 0x0606060606060606

 1891 14:08:35.053867  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1892 14:08:35.057206  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1893 14:08:35.060247  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1894 14:08:35.063764  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1895 14:08:35.066996  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1896 14:08:35.073999  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1897 14:08:35.074483  

 1898 14:08:35.074853  MTRR check

 1899 14:08:35.077232  Fixed MTRRs   : Enabled

 1900 14:08:35.080386  Variable MTRRs: Enabled

 1901 14:08:35.080817  

 1902 14:08:35.083556  call enable_fixed_mtrr()

 1903 14:08:35.086687  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3

 1904 14:08:35.090025  CPU physical address size: 39 bits

 1905 14:08:35.097155  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1906 14:08:35.100399  MTRR: Fixed MSR 0x250 0x0606060606060606

 1907 14:08:35.103554  MTRR: Fixed MSR 0x250 0x0606060606060606

 1908 14:08:35.109894  MTRR: Fixed MSR 0x258 0x0606060606060606

 1909 14:08:35.113076  MTRR: Fixed MSR 0x259 0x0000000000000000

 1910 14:08:35.116836  MTRR: Fixed MSR 0x268 0x0606060606060606

 1911 14:08:35.120073  MTRR: Fixed MSR 0x269 0x0606060606060606

 1912 14:08:35.123279  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1913 14:08:35.130179  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1914 14:08:35.133434  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1915 14:08:35.136751  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1916 14:08:35.140092  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1917 14:08:35.146687  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1918 14:08:35.149891  MTRR: Fixed MSR 0x258 0x0606060606060606

 1919 14:08:35.153187  call enable_fixed_mtrr()

 1920 14:08:35.156389  MTRR: Fixed MSR 0x259 0x0000000000000000

 1921 14:08:35.159758  MTRR: Fixed MSR 0x268 0x0606060606060606

 1922 14:08:35.163043  MTRR: Fixed MSR 0x269 0x0606060606060606

 1923 14:08:35.169632  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1924 14:08:35.172981  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1925 14:08:35.176130  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1926 14:08:35.179256  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1927 14:08:35.186255  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1928 14:08:35.189295  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1929 14:08:35.192679  CPU physical address size: 39 bits

 1930 14:08:35.195918  call enable_fixed_mtrr()

 1931 14:08:35.199189  MTRR: Fixed MSR 0x250 0x0606060606060606

 1932 14:08:35.202874  MTRR: Fixed MSR 0x250 0x0606060606060606

 1933 14:08:35.209256  MTRR: Fixed MSR 0x258 0x0606060606060606

 1934 14:08:35.212411  MTRR: Fixed MSR 0x259 0x0000000000000000

 1935 14:08:35.216074  MTRR: Fixed MSR 0x268 0x0606060606060606

 1936 14:08:35.219230  MTRR: Fixed MSR 0x269 0x0606060606060606

 1937 14:08:35.225741  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1938 14:08:35.228796  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1939 14:08:35.232525  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1940 14:08:35.235712  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1941 14:08:35.242204  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1942 14:08:35.245374  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1943 14:08:35.248630  MTRR: Fixed MSR 0x258 0x0606060606060606

 1944 14:08:35.252542  MTRR: Fixed MSR 0x259 0x0000000000000000

 1945 14:08:35.258981  MTRR: Fixed MSR 0x268 0x0606060606060606

 1946 14:08:35.262259  MTRR: Fixed MSR 0x269 0x0606060606060606

 1947 14:08:35.265506  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1948 14:08:35.268730  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1949 14:08:35.275310  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1950 14:08:35.278479  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1951 14:08:35.281823  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1952 14:08:35.285261  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1953 14:08:35.289017  call enable_fixed_mtrr()

 1954 14:08:35.292332  call enable_fixed_mtrr()

 1955 14:08:35.295394  CPU physical address size: 39 bits

 1956 14:08:35.298478  CPU physical address size: 39 bits

 1957 14:08:35.301724  MTRR: Fixed MSR 0x250 0x0606060606060606

 1958 14:08:35.308642  MTRR: Fixed MSR 0x250 0x0606060606060606

 1959 14:08:35.311882  MTRR: Fixed MSR 0x258 0x0606060606060606

 1960 14:08:35.315220  MTRR: Fixed MSR 0x259 0x0000000000000000

 1961 14:08:35.318358  MTRR: Fixed MSR 0x268 0x0606060606060606

 1962 14:08:35.321733  MTRR: Fixed MSR 0x269 0x0606060606060606

 1963 14:08:35.328405  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1964 14:08:35.331502  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1965 14:08:35.334790  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1966 14:08:35.337836  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1967 14:08:35.344685  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1968 14:08:35.347801  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1969 14:08:35.351751  MTRR: Fixed MSR 0x258 0x0606060606060606

 1970 14:08:35.354954  call enable_fixed_mtrr()

 1971 14:08:35.358266  MTRR: Fixed MSR 0x259 0x0000000000000000

 1972 14:08:35.361451  MTRR: Fixed MSR 0x268 0x0606060606060606

 1973 14:08:35.368003  MTRR: Fixed MSR 0x269 0x0606060606060606

 1974 14:08:35.371150  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1975 14:08:35.374305  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1976 14:08:35.377605  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1977 14:08:35.384355  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1978 14:08:35.387647  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1979 14:08:35.390863  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1980 14:08:35.394148  CPU physical address size: 39 bits

 1981 14:08:35.397351  call enable_fixed_mtrr()

 1982 14:08:35.400590  CPU physical address size: 39 bits

 1983 14:08:35.403811  CBFS @ c08000 size 3f8000

 1984 14:08:35.410741  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1985 14:08:35.414065  CPU physical address size: 39 bits

 1986 14:08:35.417160  CBFS: Locating 'fallback/payload'

 1987 14:08:35.420582  CBFS: Found @ offset 1c96c0 size 3f798

 1988 14:08:35.426995  Checking segment from ROM address 0xffdd16f8

 1989 14:08:35.430330  Checking segment from ROM address 0xffdd1714

 1990 14:08:35.433431  Loading segment from ROM address 0xffdd16f8

 1991 14:08:35.437030    code (compression=0)

 1992 14:08:35.446761    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1993 14:08:35.453564  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1994 14:08:35.456452  it's not compressed!

 1995 14:08:35.548427  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1996 14:08:35.555323  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1997 14:08:35.559184  Loading segment from ROM address 0xffdd1714

 1998 14:08:35.561763    Entry Point 0x30000000

 1999 14:08:35.565400  Loaded segments

 2000 14:08:35.570581  Finalizing chipset.

 2001 14:08:35.574035  Finalizing SMM.

 2002 14:08:35.577317  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5

 2003 14:08:35.580634  mp_park_aps done after 0 msecs.

 2004 14:08:35.587632  Jumping to boot code at 30000000(99b62000)

 2005 14:08:35.594276  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2006 14:08:35.594397  

 2007 14:08:35.594497  

 2008 14:08:35.594598  

 2009 14:08:35.597410  Starting depthcharge on Helios...

 2010 14:08:35.597539  

 2011 14:08:35.597980  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2012 14:08:35.598129  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2013 14:08:35.598252  Setting prompt string to ['hatch:']
 2014 14:08:35.598363  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2015 14:08:35.607295  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2016 14:08:35.607403  

 2017 14:08:35.613860  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2018 14:08:35.613972  

 2019 14:08:35.620375  board_setup: Info: eMMC controller not present; skipping

 2020 14:08:35.620482  

 2021 14:08:35.623626  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2022 14:08:35.623738  

 2023 14:08:35.630383  board_setup: Info: SDHCI controller not present; skipping

 2024 14:08:35.630496  

 2025 14:08:35.636897  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2026 14:08:35.637009  

 2027 14:08:35.637104  Wipe memory regions:

 2028 14:08:35.637198  

 2029 14:08:35.640284  	[0x00000000001000, 0x000000000a0000)

 2030 14:08:35.640388  

 2031 14:08:35.643483  	[0x00000000100000, 0x00000030000000)

 2032 14:08:35.709055  

 2033 14:08:35.712343  	[0x00000030657430, 0x00000099a2c000)

 2034 14:08:35.849728  

 2035 14:08:35.852716  	[0x00000100000000, 0x0000045e800000)

 2036 14:08:37.235585  

 2037 14:08:37.235741  R8152: Initializing

 2038 14:08:37.235815  

 2039 14:08:37.238660  Version 9 (ocp_data = 6010)

 2040 14:08:37.242928  

 2041 14:08:37.243015  R8152: Done initializing

 2042 14:08:37.243083  

 2043 14:08:37.246140  Adding net device

 2044 14:08:37.729110  

 2045 14:08:37.729277  R8152: Initializing

 2046 14:08:37.729375  

 2047 14:08:37.732372  Version 6 (ocp_data = 5c30)

 2048 14:08:37.732479  

 2049 14:08:37.735754  R8152: Done initializing

 2050 14:08:37.735949  

 2051 14:08:37.738954  net_add_device: Attemp to include the same device

 2052 14:08:37.742681  

 2053 14:08:37.749847  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2054 14:08:37.749964  

 2055 14:08:37.750061  

 2056 14:08:37.750160  

 2057 14:08:37.750473  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2059 14:08:37.851093  hatch: tftpboot 192.168.201.1 10389421/tftp-deploy-b0268f50/kernel/bzImage 10389421/tftp-deploy-b0268f50/kernel/cmdline 10389421/tftp-deploy-b0268f50/ramdisk/ramdisk.cpio.gz

 2060 14:08:37.851859  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2061 14:08:37.852446  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2062 14:08:37.857446  tftpboot 192.168.201.1 10389421/tftp-deploy-b0268f50/kernel/bzIploy-b0268f50/kernel/cmdline 10389421/tftp-deploy-b0268f50/ramdisk/ramdisk.cpio.gz

 2063 14:08:37.858213  

 2064 14:08:37.858863  Waiting for link

 2065 14:08:38.057242  

 2066 14:08:38.057441  done.

 2067 14:08:38.057570  

 2068 14:08:38.057644  MAC: 00:24:32:50:19:be

 2069 14:08:38.057706  

 2070 14:08:38.059967  Sending DHCP discover... done.

 2071 14:08:38.060078  

 2072 14:08:38.063219  Waiting for reply... done.

 2073 14:08:38.063323  

 2074 14:08:38.066682  Sending DHCP request... done.

 2075 14:08:38.066783  

 2076 14:08:38.069826  Waiting for reply... done.

 2077 14:08:38.069904  

 2078 14:08:38.073196  My ip is 192.168.201.15

 2079 14:08:38.073307  

 2080 14:08:38.076819  The DHCP server ip is 192.168.201.1

 2081 14:08:38.076927  

 2082 14:08:38.083207  TFTP server IP predefined by user: 192.168.201.1

 2083 14:08:38.083320  

 2084 14:08:38.090070  Bootfile predefined by user: 10389421/tftp-deploy-b0268f50/kernel/bzImage

 2085 14:08:38.090180  

 2086 14:08:38.093330  Sending tftp read request... done.

 2087 14:08:38.093466  

 2088 14:08:38.096591  Waiting for the transfer... 

 2089 14:08:38.096702  

 2090 14:08:38.620976  00000000 ################################################################

 2091 14:08:38.621157  

 2092 14:08:39.146878  00080000 ################################################################

 2093 14:08:39.147029  

 2094 14:08:39.685839  00100000 ################################################################

 2095 14:08:39.685999  

 2096 14:08:40.268789  00180000 ################################################################

 2097 14:08:40.269316  

 2098 14:08:40.929381  00200000 ################################################################

 2099 14:08:40.929993  

 2100 14:08:41.518445  00280000 ################################################################

 2101 14:08:41.518605  

 2102 14:08:42.063990  00300000 ################################################################

 2103 14:08:42.064183  

 2104 14:08:42.625480  00380000 ################################################################

 2105 14:08:42.626107  

 2106 14:08:43.268942  00400000 ################################################################

 2107 14:08:43.269086  

 2108 14:08:43.870302  00480000 ################################################################

 2109 14:08:43.870460  

 2110 14:08:44.419075  00500000 ################################################################

 2111 14:08:44.419214  

 2112 14:08:44.961938  00580000 ################################################################

 2113 14:08:44.962090  

 2114 14:08:45.495069  00600000 ################################################################

 2115 14:08:45.495235  

 2116 14:08:46.062403  00680000 ################################################################

 2117 14:08:46.062558  

 2118 14:08:46.631572  00700000 ################################################################

 2119 14:08:46.631741  

 2120 14:08:47.175880  00780000 ################################################################

 2121 14:08:47.176034  

 2122 14:08:47.736318  00800000 ################################################################

 2123 14:08:47.736464  

 2124 14:08:48.316224  00880000 ################################################################

 2125 14:08:48.316376  

 2126 14:08:48.862493  00900000 ################################################################

 2127 14:08:48.862690  

 2128 14:08:49.424196  00980000 ################################################################

 2129 14:08:49.424349  

 2130 14:08:49.803350  00a00000 ############################################## done.

 2131 14:08:49.803526  

 2132 14:08:49.806608  The bootfile was 10858496 bytes long.

 2133 14:08:49.806707  

 2134 14:08:49.809820  Sending tftp read request... done.

 2135 14:08:49.809921  

 2136 14:08:49.813059  Waiting for the transfer... 

 2137 14:08:49.813151  

 2138 14:08:50.347316  00000000 ################################################################

 2139 14:08:50.347463  

 2140 14:08:50.878756  00080000 ################################################################

 2141 14:08:50.878959  

 2142 14:08:51.409233  00100000 ################################################################

 2143 14:08:51.409417  

 2144 14:08:51.974351  00180000 ################################################################

 2145 14:08:51.974510  

 2146 14:08:52.514771  00200000 ################################################################

 2147 14:08:52.514939  

 2148 14:08:53.056546  00280000 ################################################################

 2149 14:08:53.056749  

 2150 14:08:53.663547  00300000 ################################################################

 2151 14:08:53.663745  

 2152 14:08:54.221148  00380000 ################################################################

 2153 14:08:54.221299  

 2154 14:08:54.764129  00400000 ################################################################

 2155 14:08:54.764284  

 2156 14:08:55.318212  00480000 ################################################################

 2157 14:08:55.318347  

 2158 14:08:55.896350  00500000 ################################################################

 2159 14:08:55.896509  

 2160 14:08:56.455179  00580000 ################################################################

 2161 14:08:56.455358  

 2162 14:08:56.561631  00600000 ############# done.

 2163 14:08:56.561857  

 2164 14:08:56.564731  Sending tftp read request... done.

 2165 14:08:56.564853  

 2166 14:08:56.568190  Waiting for the transfer... 

 2167 14:08:56.568274  

 2168 14:08:56.568341  00000000 # done.

 2169 14:08:56.568406  

 2170 14:08:56.578643  Command line loaded dynamically from TFTP file: 10389421/tftp-deploy-b0268f50/kernel/cmdline

 2171 14:08:56.578729  

 2172 14:08:56.604604  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10389421/extract-nfsrootfs-ml02ou60,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2173 14:08:56.604697  

 2174 14:08:56.610967  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2175 14:08:56.615325  

 2176 14:08:56.619080  Shutting down all USB controllers.

 2177 14:08:56.619174  

 2178 14:08:56.619244  Removing current net device

 2179 14:08:56.622938  

 2180 14:08:56.623020  Finalizing coreboot

 2181 14:08:56.623097  

 2182 14:08:56.629298  Exiting depthcharge with code 4 at timestamp: 28398649

 2183 14:08:56.629381  

 2184 14:08:56.629462  

 2185 14:08:56.629575  Starting kernel ...

 2186 14:08:56.629639  

 2187 14:08:56.629707  

 2188 14:08:56.630083  end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
 2189 14:08:56.630187  start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
 2190 14:08:56.630312  Setting prompt string to ['Linux version [0-9]']
 2191 14:08:56.630400  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2192 14:08:56.630472  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2194 14:13:17.630445  end: 2.2.5 auto-login-action (duration 00:04:21) [common]
 2196 14:13:17.630661  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
 2198 14:13:17.630829  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2201 14:13:17.631111  end: 2 depthcharge-action (duration 00:05:00) [common]
 2203 14:13:17.631349  Cleaning after the job
 2204 14:13:17.631447  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/ramdisk
 2205 14:13:17.632423  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/kernel
 2206 14:13:17.632757  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/nfsrootfs
 2207 14:13:17.658483  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10389421/tftp-deploy-b0268f50/modules
 2208 14:13:17.659273  start: 4.1 power-off (timeout 00:00:30) [common]
 2209 14:13:17.659479  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2210 14:13:17.739561  >> Command sent successfully.

 2211 14:13:17.742338  Returned 0 in 0 seconds
 2212 14:13:17.842756  end: 4.1 power-off (duration 00:00:00) [common]
 2214 14:13:17.843216  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2215 14:13:17.843521  Listened to connection for namespace 'common' for up to 1s
 2217 14:13:17.843990  Listened to connection for namespace 'common' for up to 1s
 2218 14:13:18.844447  Finalising connection for namespace 'common'
 2219 14:13:18.844662  Disconnecting from shell: Finalise
 2220 14:13:18.844756  
 2221 14:13:18.945119  end: 4.2 read-feedback (duration 00:00:01) [common]
 2222 14:13:18.945285  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10389421
 2223 14:13:19.265142  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10389421
 2224 14:13:19.265341  JobError: Your job cannot terminate cleanly.