Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 15:07:19.391971 lava-dispatcher, installed at version: 2023.05.1
2 15:07:19.392237 start: 0 validate
3 15:07:19.392403 Start time: 2023-06-09 15:07:19.392395+00:00 (UTC)
4 15:07:19.392563 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:07:19.392734 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 15:07:19.661983 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:07:19.662208 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.284-cip99%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:07:19.929053 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:07:19.929891 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.284-cip99%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:07:23.234603 validate duration: 3.84
12 15:07:23.234946 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:07:23.235075 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:07:23.235193 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:07:23.235369 Not decompressing ramdisk as can be used compressed.
16 15:07:23.235504 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 15:07:23.235616 saving as /var/lib/lava/dispatcher/tmp/10660918/tftp-deploy-2_4k_u8d/ramdisk/rootfs.cpio.gz
18 15:07:23.235721 total size: 8430069 (8MB)
19 15:07:23.895570 progress 0% (0MB)
20 15:07:23.897889 progress 5% (0MB)
21 15:07:23.900140 progress 10% (0MB)
22 15:07:23.902359 progress 15% (1MB)
23 15:07:23.904621 progress 20% (1MB)
24 15:07:23.906803 progress 25% (2MB)
25 15:07:23.909140 progress 30% (2MB)
26 15:07:23.911458 progress 35% (2MB)
27 15:07:23.913709 progress 40% (3MB)
28 15:07:23.916038 progress 45% (3MB)
29 15:07:23.918251 progress 50% (4MB)
30 15:07:23.920503 progress 55% (4MB)
31 15:07:23.922715 progress 60% (4MB)
32 15:07:23.924942 progress 65% (5MB)
33 15:07:23.927117 progress 70% (5MB)
34 15:07:23.929153 progress 75% (6MB)
35 15:07:23.931309 progress 80% (6MB)
36 15:07:23.933528 progress 85% (6MB)
37 15:07:23.935732 progress 90% (7MB)
38 15:07:23.937877 progress 95% (7MB)
39 15:07:23.940067 progress 100% (8MB)
40 15:07:23.940204 8MB downloaded in 0.70s (11.41MB/s)
41 15:07:23.940352 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:07:23.940626 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:07:23.940710 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:07:23.940795 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:07:23.940924 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.284-cip99/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:07:23.941024 saving as /var/lib/lava/dispatcher/tmp/10660918/tftp-deploy-2_4k_u8d/kernel/bzImage
48 15:07:23.941084 total size: 10858496 (10MB)
49 15:07:23.941142 No compression specified
50 15:07:23.942268 progress 0% (0MB)
51 15:07:23.945185 progress 5% (0MB)
52 15:07:23.948109 progress 10% (1MB)
53 15:07:23.950789 progress 15% (1MB)
54 15:07:23.953630 progress 20% (2MB)
55 15:07:23.956443 progress 25% (2MB)
56 15:07:23.959241 progress 30% (3MB)
57 15:07:23.961946 progress 35% (3MB)
58 15:07:23.964763 progress 40% (4MB)
59 15:07:23.967616 progress 45% (4MB)
60 15:07:23.970243 progress 50% (5MB)
61 15:07:23.973177 progress 55% (5MB)
62 15:07:23.976009 progress 60% (6MB)
63 15:07:23.979005 progress 65% (6MB)
64 15:07:23.981925 progress 70% (7MB)
65 15:07:23.984835 progress 75% (7MB)
66 15:07:23.987787 progress 80% (8MB)
67 15:07:23.990440 progress 85% (8MB)
68 15:07:23.993239 progress 90% (9MB)
69 15:07:23.996054 progress 95% (9MB)
70 15:07:23.998900 progress 100% (10MB)
71 15:07:23.999061 10MB downloaded in 0.06s (178.63MB/s)
72 15:07:23.999202 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:07:23.999444 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:07:23.999534 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:07:23.999618 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:07:23.999754 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.284-cip99/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:07:23.999823 saving as /var/lib/lava/dispatcher/tmp/10660918/tftp-deploy-2_4k_u8d/modules/modules.tar
79 15:07:23.999884 total size: 483884 (0MB)
80 15:07:23.999945 Using unxz to decompress xz
81 15:07:24.003609 progress 6% (0MB)
82 15:07:24.003999 progress 13% (0MB)
83 15:07:24.004232 progress 20% (0MB)
84 15:07:24.005708 progress 27% (0MB)
85 15:07:24.007712 progress 33% (0MB)
86 15:07:24.009486 progress 40% (0MB)
87 15:07:24.011589 progress 47% (0MB)
88 15:07:24.013560 progress 54% (0MB)
89 15:07:24.015603 progress 60% (0MB)
90 15:07:24.017504 progress 67% (0MB)
91 15:07:24.019528 progress 74% (0MB)
92 15:07:24.021925 progress 81% (0MB)
93 15:07:24.023837 progress 88% (0MB)
94 15:07:24.025748 progress 94% (0MB)
95 15:07:24.028159 progress 100% (0MB)
96 15:07:24.034226 0MB downloaded in 0.03s (13.44MB/s)
97 15:07:24.034503 end: 1.3.1 http-download (duration 00:00:00) [common]
99 15:07:24.034769 end: 1.3 download-retry (duration 00:00:00) [common]
100 15:07:24.034862 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 15:07:24.034956 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 15:07:24.035037 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 15:07:24.035121 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 15:07:24.035341 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_
105 15:07:24.035511 makedir: /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin
106 15:07:24.035613 makedir: /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/tests
107 15:07:24.035708 makedir: /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/results
108 15:07:24.035820 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-add-keys
109 15:07:24.035965 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-add-sources
110 15:07:24.036092 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-background-process-start
111 15:07:24.036220 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-background-process-stop
112 15:07:24.036341 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-common-functions
113 15:07:24.036460 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-echo-ipv4
114 15:07:24.036583 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-install-packages
115 15:07:24.036703 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-installed-packages
116 15:07:24.036823 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-os-build
117 15:07:24.036943 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-probe-channel
118 15:07:24.037067 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-probe-ip
119 15:07:24.037188 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-target-ip
120 15:07:24.037307 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-target-mac
121 15:07:24.037425 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-target-storage
122 15:07:24.037547 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-test-case
123 15:07:24.037667 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-test-event
124 15:07:24.037786 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-test-feedback
125 15:07:24.037908 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-test-raise
126 15:07:24.038032 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-test-reference
127 15:07:24.038153 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-test-runner
128 15:07:24.038273 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-test-set
129 15:07:24.038394 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-test-shell
130 15:07:24.038518 Updating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-install-packages (oe)
131 15:07:24.038666 Updating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/bin/lava-installed-packages (oe)
132 15:07:24.038786 Creating /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/environment
133 15:07:24.038890 LAVA metadata
134 15:07:24.038964 - LAVA_JOB_ID=10660918
135 15:07:24.039033 - LAVA_DISPATCHER_IP=192.168.201.1
136 15:07:24.039132 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 15:07:24.039202 skipped lava-vland-overlay
138 15:07:24.039276 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 15:07:24.039362 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 15:07:24.039458 skipped lava-multinode-overlay
141 15:07:24.039532 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 15:07:24.039611 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 15:07:24.039687 Loading test definitions
144 15:07:24.039778 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 15:07:24.039854 Using /lava-10660918 at stage 0
146 15:07:24.040153 uuid=10660918_1.4.2.3.1 testdef=None
147 15:07:24.040241 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 15:07:24.040326 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 15:07:24.040851 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 15:07:24.041074 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 15:07:24.041697 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 15:07:24.041930 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 15:07:24.042541 runner path: /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/0/tests/0_dmesg test_uuid 10660918_1.4.2.3.1
156 15:07:24.042692 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 15:07:24.042919 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 15:07:24.042992 Using /lava-10660918 at stage 1
160 15:07:24.043274 uuid=10660918_1.4.2.3.5 testdef=None
161 15:07:24.043392 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 15:07:24.043493 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 15:07:24.043957 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 15:07:24.044175 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 15:07:24.044810 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 15:07:24.045038 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 15:07:24.045651 runner path: /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/1/tests/1_bootrr test_uuid 10660918_1.4.2.3.5
170 15:07:24.045798 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 15:07:24.046003 Creating lava-test-runner.conf files
173 15:07:24.046065 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/0 for stage 0
174 15:07:24.046151 - 0_dmesg
175 15:07:24.046228 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10660918/lava-overlay-a2hejom_/lava-10660918/1 for stage 1
176 15:07:24.046316 - 1_bootrr
177 15:07:24.046407 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 15:07:24.046494 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 15:07:24.054819 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 15:07:24.054949 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 15:07:24.055036 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 15:07:24.055121 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 15:07:24.055208 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 15:07:24.299166 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 15:07:24.299584 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 15:07:24.299709 extracting modules file /var/lib/lava/dispatcher/tmp/10660918/tftp-deploy-2_4k_u8d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10660918/extract-overlay-ramdisk-jc171s1v/ramdisk
187 15:07:24.320163 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 15:07:24.320336 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 15:07:24.320434 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10660918/compress-overlay-ho16e3rz/overlay-1.4.2.4.tar.gz to ramdisk
190 15:07:24.320508 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10660918/compress-overlay-ho16e3rz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10660918/extract-overlay-ramdisk-jc171s1v/ramdisk
191 15:07:24.328707 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 15:07:24.328835 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 15:07:24.328924 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 15:07:24.329015 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 15:07:24.329097 Building ramdisk /var/lib/lava/dispatcher/tmp/10660918/extract-overlay-ramdisk-jc171s1v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10660918/extract-overlay-ramdisk-jc171s1v/ramdisk
196 15:07:24.461023 >> 53979 blocks
197 15:07:25.362066 rename /var/lib/lava/dispatcher/tmp/10660918/extract-overlay-ramdisk-jc171s1v/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10660918/tftp-deploy-2_4k_u8d/ramdisk/ramdisk.cpio.gz
198 15:07:25.362496 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 15:07:25.362622 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 15:07:25.362722 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 15:07:25.362821 No mkimage arch provided, not using FIT.
202 15:07:25.362911 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 15:07:25.362996 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 15:07:25.363100 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 15:07:25.363188 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 15:07:25.363268 No LXC device requested
207 15:07:25.363351 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 15:07:25.363470 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 15:07:25.363553 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 15:07:25.363624 Checking files for TFTP limit of 4294967296 bytes.
211 15:07:25.364028 end: 1 tftp-deploy (duration 00:00:02) [common]
212 15:07:25.364136 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 15:07:25.364227 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 15:07:25.364347 substitutions:
215 15:07:25.364413 - {DTB}: None
216 15:07:25.364475 - {INITRD}: 10660918/tftp-deploy-2_4k_u8d/ramdisk/ramdisk.cpio.gz
217 15:07:25.364534 - {KERNEL}: 10660918/tftp-deploy-2_4k_u8d/kernel/bzImage
218 15:07:25.364592 - {LAVA_MAC}: None
219 15:07:25.364649 - {PRESEED_CONFIG}: None
220 15:07:25.364705 - {PRESEED_LOCAL}: None
221 15:07:25.364759 - {RAMDISK}: 10660918/tftp-deploy-2_4k_u8d/ramdisk/ramdisk.cpio.gz
222 15:07:25.364814 - {ROOT_PART}: None
223 15:07:25.364868 - {ROOT}: None
224 15:07:25.364922 - {SERVER_IP}: 192.168.201.1
225 15:07:25.364975 - {TEE}: None
226 15:07:25.365029 Parsed boot commands:
227 15:07:25.365084 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 15:07:25.365248 Parsed boot commands: tftpboot 192.168.201.1 10660918/tftp-deploy-2_4k_u8d/kernel/bzImage 10660918/tftp-deploy-2_4k_u8d/kernel/cmdline 10660918/tftp-deploy-2_4k_u8d/ramdisk/ramdisk.cpio.gz
229 15:07:25.365337 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 15:07:25.365424 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 15:07:25.365516 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 15:07:25.365601 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 15:07:25.365703 Not connected, no need to disconnect.
234 15:07:25.365778 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 15:07:25.365856 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 15:07:25.365919 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-3'
237 15:07:25.369390 Setting prompt string to ['lava-test: # ']
238 15:07:25.369740 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 15:07:25.369864 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 15:07:25.369980 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 15:07:25.370089 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 15:07:25.370277 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=reboot'
243 15:07:30.502916 >> Command sent successfully.
244 15:07:30.505353 Returned 0 in 5 seconds
245 15:07:30.605728 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 15:07:30.606075 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 15:07:30.606192 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 15:07:30.606281 Setting prompt string to 'Starting depthcharge on Magolor...'
250 15:07:30.606351 Changing prompt to 'Starting depthcharge on Magolor...'
251 15:07:30.606421 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 15:07:30.606678 [Enter `^Ec?' for help]
253 15:07:31.748855
254 15:07:31.749006
255 15:07:31.759250 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 15:07:31.761999 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 15:07:31.765522 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 15:07:31.772075 CPU: AES supported, TXT NOT supported, VT supported
259 15:07:31.775548 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 15:07:31.782438 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 15:07:31.785351 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 15:07:31.788820 VBOOT: Loading verstage.
263 15:07:31.795859 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 15:07:31.799383 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 15:07:31.806361 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 15:07:31.809901 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 15:07:31.810017
268 15:07:31.813599
269 15:07:31.823174 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 15:07:31.836835 Probing TPM: . done!
271 15:07:31.840690 TPM ready after 0 ms
272 15:07:31.843501 Connected to device vid:did:rid of 1ae0:0028:00
273 15:07:31.855261 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
274 15:07:31.861427 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 15:07:31.865357 Initialized TPM device CR50 revision 0
276 15:07:31.923210 tlcl_send_startup: Startup return code is 0
277 15:07:31.923360 TPM: setup succeeded
278 15:07:31.938000 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 15:07:31.951676 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 15:07:31.967311 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 15:07:31.977788 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 15:07:31.981414 Chrome EC: UHEPI supported
283 15:07:31.984607 Phase 1
284 15:07:31.987946 FMAP: area GBB found @ c05000 (12288 bytes)
285 15:07:31.994371 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 15:07:32.001720 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 15:07:32.005340 Recovery requested (1009000e)
288 15:07:32.014440 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 15:07:32.020025 tlcl_extend: response is 0
290 15:07:32.027611 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 15:07:32.036561 tlcl_extend: response is 0
292 15:07:32.043463 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 15:07:32.046315 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 15:07:32.053767 BS: verstage times (exec / console): total (unknown) / 124 ms
295 15:07:32.053883
296 15:07:32.053953
297 15:07:32.068039 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 15:07:32.070825 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 15:07:32.076970 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 15:07:32.080391 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 15:07:32.083633 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 15:07:32.090566 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 15:07:32.094016 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
304 15:07:32.097031 TCO_STS: 0000 0001
305 15:07:32.100309 GEN_PMCON: d0015038 00002200
306 15:07:32.103386 GBLRST_CAUSE: 00000000 00000000
307 15:07:32.103473 prev_sleep_state 5
308 15:07:32.107053 Boot Count incremented to 2511
309 15:07:32.113597 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 15:07:32.117084 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 15:07:32.121593 Chrome EC: UHEPI supported
312 15:07:32.127229 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 15:07:32.134588 Probing TPM: done!
314 15:07:32.140631 Connected to device vid:did:rid of 1ae0:0028:00
315 15:07:32.150958 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
316 15:07:32.157522 Initialized TPM device CR50 revision 0
317 15:07:32.167838 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 15:07:32.175353 MRC: Hash idx 0x100b comparison successful.
319 15:07:32.175491 MRC cache found, size 5458
320 15:07:32.178723 bootmode is set to: 2
321 15:07:32.178814 SPD INDEX = 0
322 15:07:32.185125 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 15:07:32.189203 SPD: module type is LPDDR4X
324 15:07:32.192230 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 15:07:32.198490 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 15:07:32.204873 SPD: device width 16 bits, bus width 32 bits
327 15:07:32.208721 SPD: module size is 4096 MB (per channel)
328 15:07:32.211549 meminit_channels: DRAM half-populated
329 15:07:32.294078 CBMEM:
330 15:07:32.296912 IMD: root @ 0x76fff000 254 entries.
331 15:07:32.300993 IMD: root @ 0x76ffec00 62 entries.
332 15:07:32.303976 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 15:07:32.310159 WARNING: RO_VPD is uninitialized or empty.
334 15:07:32.313710 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 15:07:32.317421 External stage cache:
336 15:07:32.320759 IMD: root @ 0x7b3ff000 254 entries.
337 15:07:32.324135 IMD: root @ 0x7b3fec00 62 entries.
338 15:07:32.334515 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 15:07:32.341237 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 15:07:32.347056 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 15:07:32.355277 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 15:07:32.358527 cse_lite: Skip switching to RW in the recovery path
343 15:07:32.362437 1 DIMMs found
344 15:07:32.362553 SMM Memory Map
345 15:07:32.365544 SMRAM : 0x7b000000 0x800000
346 15:07:32.369204 Subregion 0: 0x7b000000 0x200000
347 15:07:32.372233 Subregion 1: 0x7b200000 0x200000
348 15:07:32.379007 Subregion 2: 0x7b400000 0x400000
349 15:07:32.379154 top_of_ram = 0x77000000
350 15:07:32.385814 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 15:07:32.392416 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 15:07:32.395614 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 15:07:32.401631 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 15:07:32.405857 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 15:07:32.417726 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 15:07:32.424827 Processing 188 relocs. Offset value of 0x74c0e000
357 15:07:32.430725 BS: romstage times (exec / console): total (unknown) / 255 ms
358 15:07:32.435245
359 15:07:32.435405
360 15:07:32.445250 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 15:07:32.451982 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 15:07:32.455844 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 15:07:32.463278 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 15:07:32.517915 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 15:07:32.524544 Processing 4805 relocs. Offset value of 0x75da8000
366 15:07:32.527797 BS: postcar times (exec / console): total (unknown) / 42 ms
367 15:07:32.531824
368 15:07:32.531956
369 15:07:32.541609 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 15:07:32.541750 Normal boot
371 15:07:32.546288 EC returned error result code 3
372 15:07:32.548753 FW_CONFIG value is 0x204
373 15:07:32.552316 GENERIC: 0.0 disabled by fw_config
374 15:07:32.558772 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 15:07:32.562120 I2C: 00:10 disabled by fw_config
376 15:07:32.565860 I2C: 00:10 disabled by fw_config
377 15:07:32.569549 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 15:07:32.575556 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 15:07:32.578966 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 15:07:32.585408 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 15:07:32.588912 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 15:07:32.591921 I2C: 00:10 disabled by fw_config
383 15:07:32.598575 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 15:07:32.605343 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 15:07:32.608873 I2C: 00:1a disabled by fw_config
386 15:07:32.611929 I2C: 00:1a disabled by fw_config
387 15:07:32.618470 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 15:07:32.621670 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 15:07:32.625143 GENERIC: 0.0 disabled by fw_config
390 15:07:32.631695 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 15:07:32.635722 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 15:07:32.642194 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 15:07:32.645494 microcode: Update skipped, already up-to-date
394 15:07:32.651748 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 15:07:32.678291 Detected 2 core, 2 thread CPU.
396 15:07:32.680993 Setting up SMI for CPU
397 15:07:32.684593 IED base = 0x7b400000
398 15:07:32.684722 IED size = 0x00400000
399 15:07:32.687475 Will perform SMM setup.
400 15:07:32.691663 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 15:07:32.700859 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 15:07:32.703770 Processing 16 relocs. Offset value of 0x00030000
403 15:07:32.708151 Attempting to start 1 APs
404 15:07:32.711263 Waiting for 10ms after sending INIT.
405 15:07:32.727334 Waiting for 1st SIPI to complete...done.
406 15:07:32.727530 AP: slot 1 apic_id 2.
407 15:07:32.734283 Waiting for 2nd SIPI to complete...done.
408 15:07:32.740669 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 15:07:32.747611 Processing 13 relocs. Offset value of 0x00038000
410 15:07:32.747760 Unable to locate Global NVS
411 15:07:32.757840 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 15:07:32.760969 Installing permanent SMM handler to 0x7b000000
413 15:07:32.767544 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 15:07:32.773879 Processing 704 relocs. Offset value of 0x7b010000
415 15:07:32.780932 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 15:07:32.787798 Processing 13 relocs. Offset value of 0x7b008000
417 15:07:32.794323 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 15:07:32.796992 Unable to locate Global NVS
419 15:07:32.803826 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 15:07:32.808189 Clearing SMI status registers
421 15:07:32.808335 SMI_STS: PM1
422 15:07:32.810754 PM1_STS: PWRBTN
423 15:07:32.810857 TCO_STS: INTRD_DET
424 15:07:32.820482 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 15:07:32.820659 In relocation handler: CPU 0
426 15:07:32.827093 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 15:07:32.830621 Writing SMRR. base = 0x7b000006, mask=0xff800800
428 15:07:32.833978 Relocation complete.
429 15:07:32.840595 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 15:07:32.844606 In relocation handler: CPU 1
431 15:07:32.849202 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 15:07:32.851626 Writing SMRR. base = 0x7b000006, mask=0xff800800
433 15:07:32.855913 Relocation complete.
434 15:07:32.855999 Initializing CPU #0
435 15:07:32.858755 CPU: vendor Intel device 906c0
436 15:07:32.865273 CPU: family 06, model 9c, stepping 00
437 15:07:32.865359 Clearing out pending MCEs
438 15:07:32.868413 Setting up local APIC...
439 15:07:32.872138 apic_id: 0x00 done.
440 15:07:32.875608 Turbo is available but hidden
441 15:07:32.878622 Turbo is available and visible
442 15:07:32.881830 microcode: Update skipped, already up-to-date
443 15:07:32.885679 CPU #0 initialized
444 15:07:32.885769 Initializing CPU #1
445 15:07:32.888439 CPU: vendor Intel device 906c0
446 15:07:32.892104 CPU: family 06, model 9c, stepping 00
447 15:07:32.895073 Clearing out pending MCEs
448 15:07:32.898639 Setting up local APIC...
449 15:07:32.901471 apic_id: 0x02 done.
450 15:07:32.905316 microcode: Update skipped, already up-to-date
451 15:07:32.908689 CPU #1 initialized
452 15:07:32.911651 bsp_do_flight_plan done after 174 msecs.
453 15:07:32.914870 CPU: frequency set to 2800 MHz
454 15:07:32.914960 Enabling SMIs.
455 15:07:32.921387 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 87 / 287 ms
456 15:07:32.932437 Probing TPM: done!
457 15:07:32.939044 Connected to device vid:did:rid of 1ae0:0028:00
458 15:07:32.948509 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
459 15:07:32.951893 Initialized TPM device CR50 revision 0
460 15:07:32.954902 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
461 15:07:32.962821 Found a VBT of 7680 bytes after decompression
462 15:07:32.968954 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
463 15:07:33.003369 Detected 2 core, 2 thread CPU.
464 15:07:33.006676 Detected 2 core, 2 thread CPU.
465 15:07:33.369381 Display FSP Version Info HOB
466 15:07:33.371985 Reference Code - CPU = 8.7.22.30
467 15:07:33.374683 uCode Version = 24.0.0.1f
468 15:07:33.378042 TXT ACM version = ff.ff.ff.ffff
469 15:07:33.381434 Reference Code - ME = 8.7.22.30
470 15:07:33.384587 MEBx version = 0.0.0.0
471 15:07:33.387995 ME Firmware Version = Consumer SKU
472 15:07:33.391209 Reference Code - PCH = 8.7.22.30
473 15:07:33.395038 PCH-CRID Status = Disabled
474 15:07:33.398030 PCH-CRID Original Value = ff.ff.ff.ffff
475 15:07:33.401037 PCH-CRID New Value = ff.ff.ff.ffff
476 15:07:33.404705 OPROM - RST - RAID = ff.ff.ff.ffff
477 15:07:33.408170 PCH Hsio Version = 4.0.0.0
478 15:07:33.410968 Reference Code - SA - System Agent = 8.7.22.30
479 15:07:33.414427 Reference Code - MRC = 0.0.4.68
480 15:07:33.417675 SA - PCIe Version = 8.7.22.30
481 15:07:33.420832 SA-CRID Status = Disabled
482 15:07:33.424935 SA-CRID Original Value = 0.0.0.0
483 15:07:33.429064 SA-CRID New Value = 0.0.0.0
484 15:07:33.429148 OPROM - VBIOS = ff.ff.ff.ffff
485 15:07:33.435618 IO Manageability Engine FW Version = ff.ff.ff.ffff
486 15:07:33.439245 PHY Build Version = ff.ff.ff.ffff
487 15:07:33.442860 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
488 15:07:33.449370 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
489 15:07:33.453666 ITSS IRQ Polarities Before:
490 15:07:33.453776 IPC0: 0xffffffff
491 15:07:33.456317 IPC1: 0xffffffff
492 15:07:33.456429 IPC2: 0xffffffff
493 15:07:33.459930 IPC3: 0xffffffff
494 15:07:33.462767 ITSS IRQ Polarities After:
495 15:07:33.462850 IPC0: 0xffffffff
496 15:07:33.466345 IPC1: 0xffffffff
497 15:07:33.466427 IPC2: 0xffffffff
498 15:07:33.469924 IPC3: 0xffffffff
499 15:07:33.479196 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
500 15:07:33.485990 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
501 15:07:33.489429 Enumerating buses...
502 15:07:33.493003 Show all devs... Before device enumeration.
503 15:07:33.496086 Root Device: enabled 1
504 15:07:33.498972 CPU_CLUSTER: 0: enabled 1
505 15:07:33.499055 DOMAIN: 0000: enabled 1
506 15:07:33.502971 PCI: 00:00.0: enabled 1
507 15:07:33.505939 PCI: 00:02.0: enabled 1
508 15:07:33.509208 PCI: 00:04.0: enabled 1
509 15:07:33.509291 PCI: 00:05.0: enabled 1
510 15:07:33.512916 PCI: 00:09.0: enabled 0
511 15:07:33.515652 PCI: 00:12.6: enabled 0
512 15:07:33.519661 PCI: 00:14.0: enabled 1
513 15:07:33.519745 PCI: 00:14.1: enabled 0
514 15:07:33.522258 PCI: 00:14.2: enabled 0
515 15:07:33.525693 PCI: 00:14.3: enabled 1
516 15:07:33.529344 PCI: 00:14.5: enabled 1
517 15:07:33.529426 PCI: 00:15.0: enabled 1
518 15:07:33.532450 PCI: 00:15.1: enabled 1
519 15:07:33.535665 PCI: 00:15.2: enabled 1
520 15:07:33.539325 PCI: 00:15.3: enabled 1
521 15:07:33.539435 PCI: 00:16.0: enabled 1
522 15:07:33.542376 PCI: 00:16.1: enabled 0
523 15:07:33.545524 PCI: 00:16.4: enabled 0
524 15:07:33.545608 PCI: 00:16.5: enabled 0
525 15:07:33.548827 PCI: 00:17.0: enabled 0
526 15:07:33.552124 PCI: 00:19.0: enabled 1
527 15:07:33.555632 PCI: 00:19.1: enabled 0
528 15:07:33.555715 PCI: 00:19.2: enabled 1
529 15:07:33.558954 PCI: 00:1a.0: enabled 1
530 15:07:33.562070 PCI: 00:1c.0: enabled 0
531 15:07:33.565240 PCI: 00:1c.1: enabled 0
532 15:07:33.565324 PCI: 00:1c.2: enabled 0
533 15:07:33.568532 PCI: 00:1c.3: enabled 0
534 15:07:33.572054 PCI: 00:1c.4: enabled 0
535 15:07:33.575305 PCI: 00:1c.5: enabled 0
536 15:07:33.575445 PCI: 00:1c.6: enabled 0
537 15:07:33.579616 PCI: 00:1c.7: enabled 1
538 15:07:33.581666 PCI: 00:1e.0: enabled 0
539 15:07:33.581751 PCI: 00:1e.1: enabled 0
540 15:07:33.586184 PCI: 00:1e.2: enabled 1
541 15:07:33.588731 PCI: 00:1e.3: enabled 0
542 15:07:33.592168 PCI: 00:1f.0: enabled 1
543 15:07:33.592251 PCI: 00:1f.1: enabled 1
544 15:07:33.595747 PCI: 00:1f.2: enabled 1
545 15:07:33.598478 PCI: 00:1f.3: enabled 1
546 15:07:33.601931 PCI: 00:1f.4: enabled 0
547 15:07:33.602015 PCI: 00:1f.5: enabled 1
548 15:07:33.605144 PCI: 00:1f.7: enabled 0
549 15:07:33.608671 GENERIC: 0.0: enabled 1
550 15:07:33.611659 GENERIC: 0.0: enabled 1
551 15:07:33.611759 USB0 port 0: enabled 1
552 15:07:33.615169 GENERIC: 0.0: enabled 1
553 15:07:33.618571 I2C: 00:2c: enabled 1
554 15:07:33.618654 I2C: 00:15: enabled 1
555 15:07:33.621583 GENERIC: 0.0: enabled 0
556 15:07:33.624939 I2C: 00:15: enabled 1
557 15:07:33.625022 I2C: 00:10: enabled 0
558 15:07:33.628357 I2C: 00:10: enabled 0
559 15:07:33.631469 I2C: 00:2c: enabled 1
560 15:07:33.631603 I2C: 00:40: enabled 1
561 15:07:33.635047 I2C: 00:10: enabled 1
562 15:07:33.638616 I2C: 00:39: enabled 1
563 15:07:33.641412 I2C: 00:36: enabled 1
564 15:07:33.641500 I2C: 00:10: enabled 0
565 15:07:33.645048 I2C: 00:0c: enabled 1
566 15:07:33.647851 I2C: 00:50: enabled 1
567 15:07:33.647938 I2C: 00:1a: enabled 1
568 15:07:33.651303 I2C: 00:1a: enabled 0
569 15:07:33.654864 I2C: 00:1a: enabled 0
570 15:07:33.654949 I2C: 00:28: enabled 1
571 15:07:33.658191 I2C: 00:29: enabled 1
572 15:07:33.662002 PCI: 00:00.0: enabled 1
573 15:07:33.662087 SPI: 00: enabled 1
574 15:07:33.665646 PNP: 0c09.0: enabled 1
575 15:07:33.668024 GENERIC: 0.0: enabled 0
576 15:07:33.668108 USB2 port 0: enabled 1
577 15:07:33.671922 USB2 port 1: enabled 1
578 15:07:33.674737 USB2 port 2: enabled 1
579 15:07:33.674822 USB2 port 3: enabled 1
580 15:07:33.678280 USB2 port 4: enabled 0
581 15:07:33.681947 USB2 port 5: enabled 1
582 15:07:33.684375 USB2 port 6: enabled 0
583 15:07:33.684460 USB2 port 7: enabled 1
584 15:07:33.688028 USB3 port 0: enabled 1
585 15:07:33.691201 USB3 port 1: enabled 1
586 15:07:33.691285 USB3 port 2: enabled 1
587 15:07:33.694576 USB3 port 3: enabled 1
588 15:07:33.697749 APIC: 00: enabled 1
589 15:07:33.697850 APIC: 02: enabled 1
590 15:07:33.701021 Compare with tree...
591 15:07:33.704688 Root Device: enabled 1
592 15:07:33.707909 CPU_CLUSTER: 0: enabled 1
593 15:07:33.707997 APIC: 00: enabled 1
594 15:07:33.711155 APIC: 02: enabled 1
595 15:07:33.714780 DOMAIN: 0000: enabled 1
596 15:07:33.714864 PCI: 00:00.0: enabled 1
597 15:07:33.717653 PCI: 00:02.0: enabled 1
598 15:07:33.721011 PCI: 00:04.0: enabled 1
599 15:07:33.724774 GENERIC: 0.0: enabled 1
600 15:07:33.728238 PCI: 00:05.0: enabled 1
601 15:07:33.728342 GENERIC: 0.0: enabled 1
602 15:07:33.731710 PCI: 00:09.0: enabled 0
603 15:07:33.734286 PCI: 00:12.6: enabled 0
604 15:07:33.737911 PCI: 00:14.0: enabled 1
605 15:07:33.741451 USB0 port 0: enabled 1
606 15:07:33.741533 USB2 port 0: enabled 1
607 15:07:33.744626 USB2 port 1: enabled 1
608 15:07:33.747872 USB2 port 2: enabled 1
609 15:07:33.751244 USB2 port 3: enabled 1
610 15:07:33.754415 USB2 port 4: enabled 0
611 15:07:33.757659 USB2 port 5: enabled 1
612 15:07:33.757743 USB2 port 6: enabled 0
613 15:07:33.761256 USB2 port 7: enabled 1
614 15:07:33.764208 USB3 port 0: enabled 1
615 15:07:33.767784 USB3 port 1: enabled 1
616 15:07:33.771478 USB3 port 2: enabled 1
617 15:07:33.771559 USB3 port 3: enabled 1
618 15:07:33.773994 PCI: 00:14.1: enabled 0
619 15:07:33.777448 PCI: 00:14.2: enabled 0
620 15:07:33.781339 PCI: 00:14.3: enabled 1
621 15:07:33.784065 GENERIC: 0.0: enabled 1
622 15:07:33.784146 PCI: 00:14.5: enabled 1
623 15:07:33.787540 PCI: 00:15.0: enabled 1
624 15:07:33.791295 I2C: 00:2c: enabled 1
625 15:07:33.794231 I2C: 00:15: enabled 1
626 15:07:33.797847 PCI: 00:15.1: enabled 1
627 15:07:33.797930 PCI: 00:15.2: enabled 1
628 15:07:33.800536 GENERIC: 0.0: enabled 0
629 15:07:33.804098 I2C: 00:15: enabled 1
630 15:07:33.807579 I2C: 00:10: enabled 0
631 15:07:33.807656 I2C: 00:10: enabled 0
632 15:07:33.811046 I2C: 00:2c: enabled 1
633 15:07:33.814532 I2C: 00:40: enabled 1
634 15:07:33.817436 I2C: 00:10: enabled 1
635 15:07:33.820936 I2C: 00:39: enabled 1
636 15:07:33.821038 PCI: 00:15.3: enabled 1
637 15:07:33.824188 I2C: 00:36: enabled 1
638 15:07:33.827231 I2C: 00:10: enabled 0
639 15:07:33.830339 I2C: 00:0c: enabled 1
640 15:07:33.830450 I2C: 00:50: enabled 1
641 15:07:33.833819 PCI: 00:16.0: enabled 1
642 15:07:33.836787 PCI: 00:16.1: enabled 0
643 15:07:33.840423 PCI: 00:16.4: enabled 0
644 15:07:33.843918 PCI: 00:16.5: enabled 0
645 15:07:33.844002 PCI: 00:17.0: enabled 0
646 15:07:33.847192 PCI: 00:19.0: enabled 1
647 15:07:33.850686 I2C: 00:1a: enabled 1
648 15:07:33.853609 I2C: 00:1a: enabled 0
649 15:07:33.853693 I2C: 00:1a: enabled 0
650 15:07:33.857338 I2C: 00:28: enabled 1
651 15:07:33.860765 I2C: 00:29: enabled 1
652 15:07:33.863954 PCI: 00:19.1: enabled 0
653 15:07:33.867117 PCI: 00:19.2: enabled 1
654 15:07:33.867258 PCI: 00:1a.0: enabled 1
655 15:07:33.870110 PCI: 00:1e.0: enabled 0
656 15:07:33.873767 PCI: 00:1e.1: enabled 0
657 15:07:33.876986 PCI: 00:1e.2: enabled 1
658 15:07:33.877070 SPI: 00: enabled 1
659 15:07:33.880402 PCI: 00:1e.3: enabled 0
660 15:07:33.883511 PCI: 00:1f.0: enabled 1
661 15:07:33.886406 PNP: 0c09.0: enabled 1
662 15:07:33.890141 PCI: 00:1f.1: enabled 1
663 15:07:33.890225 PCI: 00:1f.2: enabled 1
664 15:07:33.893269 PCI: 00:1f.3: enabled 1
665 15:07:33.896451 GENERIC: 0.0: enabled 0
666 15:07:33.899732 PCI: 00:1f.4: enabled 0
667 15:07:33.903522 PCI: 00:1f.5: enabled 1
668 15:07:33.903627 PCI: 00:1f.7: enabled 0
669 15:07:33.906666 Root Device scanning...
670 15:07:33.909728 scan_static_bus for Root Device
671 15:07:33.912878 CPU_CLUSTER: 0 enabled
672 15:07:33.916829 DOMAIN: 0000 enabled
673 15:07:33.916930 DOMAIN: 0000 scanning...
674 15:07:33.919930 PCI: pci_scan_bus for bus 00
675 15:07:33.922961 PCI: 00:00.0 [8086/0000] ops
676 15:07:33.926422 PCI: 00:00.0 [8086/4e22] enabled
677 15:07:33.929869 PCI: 00:02.0 [8086/0000] bus ops
678 15:07:33.933985 PCI: 00:02.0 [8086/4e55] enabled
679 15:07:33.936085 PCI: 00:04.0 [8086/0000] bus ops
680 15:07:33.939552 PCI: 00:04.0 [8086/4e03] enabled
681 15:07:33.943139 PCI: 00:05.0 [8086/0000] bus ops
682 15:07:33.946355 PCI: 00:05.0 [8086/4e19] enabled
683 15:07:33.949600 PCI: 00:08.0 [8086/4e11] enabled
684 15:07:33.953248 PCI: 00:14.0 [8086/0000] bus ops
685 15:07:33.956458 PCI: 00:14.0 [8086/4ded] enabled
686 15:07:33.959582 PCI: 00:14.2 [8086/4def] disabled
687 15:07:33.965259 PCI: 00:14.3 [8086/0000] bus ops
688 15:07:33.966802 PCI: 00:14.3 [8086/4df0] enabled
689 15:07:33.969866 PCI: 00:14.5 [8086/0000] ops
690 15:07:33.972529 PCI: 00:14.5 [8086/4df8] enabled
691 15:07:33.976227 PCI: 00:15.0 [8086/0000] bus ops
692 15:07:33.980030 PCI: 00:15.0 [8086/4de8] enabled
693 15:07:33.982600 PCI: 00:15.1 [8086/0000] bus ops
694 15:07:33.986114 PCI: 00:15.1 [8086/4de9] enabled
695 15:07:33.989287 PCI: 00:15.2 [8086/0000] bus ops
696 15:07:33.992746 PCI: 00:15.2 [8086/4dea] enabled
697 15:07:33.996484 PCI: 00:15.3 [8086/0000] bus ops
698 15:07:33.999288 PCI: 00:15.3 [8086/4deb] enabled
699 15:07:34.003051 PCI: 00:16.0 [8086/0000] ops
700 15:07:34.005991 PCI: 00:16.0 [8086/4de0] enabled
701 15:07:34.009607 PCI: 00:19.0 [8086/0000] bus ops
702 15:07:34.012391 PCI: 00:19.0 [8086/4dc5] enabled
703 15:07:34.015708 PCI: 00:19.2 [8086/0000] ops
704 15:07:34.018842 PCI: 00:19.2 [8086/4dc7] enabled
705 15:07:34.022752 PCI: 00:1a.0 [8086/0000] ops
706 15:07:34.025323 PCI: 00:1a.0 [8086/4dc4] enabled
707 15:07:34.028923 PCI: 00:1e.0 [8086/0000] ops
708 15:07:34.032204 PCI: 00:1e.0 [8086/4da8] disabled
709 15:07:34.035892 PCI: 00:1e.2 [8086/0000] bus ops
710 15:07:34.039092 PCI: 00:1e.2 [8086/4daa] enabled
711 15:07:34.042668 PCI: 00:1f.0 [8086/0000] bus ops
712 15:07:34.045579 PCI: 00:1f.0 [8086/4d87] enabled
713 15:07:34.048868 PCI: Static device PCI: 00:1f.1 not found, disabling it.
714 15:07:34.052518 RTC Init
715 15:07:34.055607 Set power on after power failure.
716 15:07:34.055734 Disabling Deep S3
717 15:07:34.058884 Disabling Deep S3
718 15:07:34.062785 Disabling Deep S4
719 15:07:34.062869 Disabling Deep S4
720 15:07:34.065764 Disabling Deep S5
721 15:07:34.065849 Disabling Deep S5
722 15:07:34.069035 PCI: 00:1f.2 [0000/0000] hidden
723 15:07:34.072345 PCI: 00:1f.3 [8086/0000] bus ops
724 15:07:34.075692 PCI: 00:1f.3 [8086/4dc8] enabled
725 15:07:34.078703 PCI: 00:1f.5 [8086/0000] bus ops
726 15:07:34.081815 PCI: 00:1f.5 [8086/4da4] enabled
727 15:07:34.085862 PCI: Leftover static devices:
728 15:07:34.088647 PCI: 00:12.6
729 15:07:34.088747 PCI: 00:09.0
730 15:07:34.088814 PCI: 00:14.1
731 15:07:34.091875 PCI: 00:16.1
732 15:07:34.091948 PCI: 00:16.4
733 15:07:34.095524 PCI: 00:16.5
734 15:07:34.095596 PCI: 00:17.0
735 15:07:34.095677 PCI: 00:19.1
736 15:07:34.099042 PCI: 00:1e.1
737 15:07:34.099116 PCI: 00:1e.3
738 15:07:34.101946 PCI: 00:1f.1
739 15:07:34.102035 PCI: 00:1f.4
740 15:07:34.102106 PCI: 00:1f.7
741 15:07:34.105265 PCI: Check your devicetree.cb.
742 15:07:34.109618 PCI: 00:02.0 scanning...
743 15:07:34.113664 scan_generic_bus for PCI: 00:02.0
744 15:07:34.116605 scan_generic_bus for PCI: 00:02.0 done
745 15:07:34.120041 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
746 15:07:34.122818 PCI: 00:04.0 scanning...
747 15:07:34.126562 scan_generic_bus for PCI: 00:04.0
748 15:07:34.129840 GENERIC: 0.0 enabled
749 15:07:34.136489 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
750 15:07:34.139569 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
751 15:07:34.142620 PCI: 00:05.0 scanning...
752 15:07:34.145979 scan_generic_bus for PCI: 00:05.0
753 15:07:34.149392 GENERIC: 0.0 enabled
754 15:07:34.156260 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
755 15:07:34.159592 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
756 15:07:34.162706 PCI: 00:14.0 scanning...
757 15:07:34.166338 scan_static_bus for PCI: 00:14.0
758 15:07:34.166672 USB0 port 0 enabled
759 15:07:34.170200 USB0 port 0 scanning...
760 15:07:34.172834 scan_static_bus for USB0 port 0
761 15:07:34.176070 USB2 port 0 enabled
762 15:07:34.176465 USB2 port 1 enabled
763 15:07:34.179376 USB2 port 2 enabled
764 15:07:34.183023 USB2 port 3 enabled
765 15:07:34.183474 USB2 port 4 disabled
766 15:07:34.186171 USB2 port 5 enabled
767 15:07:34.189788 USB2 port 6 disabled
768 15:07:34.190267 USB2 port 7 enabled
769 15:07:34.192952 USB3 port 0 enabled
770 15:07:34.193405 USB3 port 1 enabled
771 15:07:34.196266 USB3 port 2 enabled
772 15:07:34.199553 USB3 port 3 enabled
773 15:07:34.199884 USB2 port 0 scanning...
774 15:07:34.202364 scan_static_bus for USB2 port 0
775 15:07:34.209845 scan_static_bus for USB2 port 0 done
776 15:07:34.212837 scan_bus: bus USB2 port 0 finished in 6 msecs
777 15:07:34.215939 USB2 port 1 scanning...
778 15:07:34.219434 scan_static_bus for USB2 port 1
779 15:07:34.222438 scan_static_bus for USB2 port 1 done
780 15:07:34.225658 scan_bus: bus USB2 port 1 finished in 6 msecs
781 15:07:34.229459 USB2 port 2 scanning...
782 15:07:34.232768 scan_static_bus for USB2 port 2
783 15:07:34.235981 scan_static_bus for USB2 port 2 done
784 15:07:34.239018 scan_bus: bus USB2 port 2 finished in 6 msecs
785 15:07:34.243095 USB2 port 3 scanning...
786 15:07:34.245834 scan_static_bus for USB2 port 3
787 15:07:34.248970 scan_static_bus for USB2 port 3 done
788 15:07:34.255410 scan_bus: bus USB2 port 3 finished in 6 msecs
789 15:07:34.255747 USB2 port 5 scanning...
790 15:07:34.258719 scan_static_bus for USB2 port 5
791 15:07:34.265836 scan_static_bus for USB2 port 5 done
792 15:07:34.268850 scan_bus: bus USB2 port 5 finished in 6 msecs
793 15:07:34.272310 USB2 port 7 scanning...
794 15:07:34.275974 scan_static_bus for USB2 port 7
795 15:07:34.278803 scan_static_bus for USB2 port 7 done
796 15:07:34.282081 scan_bus: bus USB2 port 7 finished in 6 msecs
797 15:07:34.286129 USB3 port 0 scanning...
798 15:07:34.289172 scan_static_bus for USB3 port 0
799 15:07:34.292425 scan_static_bus for USB3 port 0 done
800 15:07:34.295662 scan_bus: bus USB3 port 0 finished in 6 msecs
801 15:07:34.298518 USB3 port 1 scanning...
802 15:07:34.302003 scan_static_bus for USB3 port 1
803 15:07:34.305183 scan_static_bus for USB3 port 1 done
804 15:07:34.311994 scan_bus: bus USB3 port 1 finished in 6 msecs
805 15:07:34.312327 USB3 port 2 scanning...
806 15:07:34.315430 scan_static_bus for USB3 port 2
807 15:07:34.321967 scan_static_bus for USB3 port 2 done
808 15:07:34.325796 scan_bus: bus USB3 port 2 finished in 6 msecs
809 15:07:34.328959 USB3 port 3 scanning...
810 15:07:34.332225 scan_static_bus for USB3 port 3
811 15:07:34.335397 scan_static_bus for USB3 port 3 done
812 15:07:34.338929 scan_bus: bus USB3 port 3 finished in 6 msecs
813 15:07:34.342187 scan_static_bus for USB0 port 0 done
814 15:07:34.348704 scan_bus: bus USB0 port 0 finished in 172 msecs
815 15:07:34.351779 scan_static_bus for PCI: 00:14.0 done
816 15:07:34.355306 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
817 15:07:34.358639 PCI: 00:14.3 scanning...
818 15:07:34.362142 scan_static_bus for PCI: 00:14.3
819 15:07:34.365278 GENERIC: 0.0 enabled
820 15:07:34.368809 scan_static_bus for PCI: 00:14.3 done
821 15:07:34.371852 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
822 15:07:34.374918 PCI: 00:15.0 scanning...
823 15:07:34.378625 scan_static_bus for PCI: 00:15.0
824 15:07:34.381780 I2C: 00:2c enabled
825 15:07:34.382110 I2C: 00:15 enabled
826 15:07:34.388784 scan_static_bus for PCI: 00:15.0 done
827 15:07:34.392461 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
828 15:07:34.395037 PCI: 00:15.1 scanning...
829 15:07:34.398602 scan_static_bus for PCI: 00:15.1
830 15:07:34.401462 scan_static_bus for PCI: 00:15.1 done
831 15:07:34.404970 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
832 15:07:34.408069 PCI: 00:15.2 scanning...
833 15:07:34.411816 scan_static_bus for PCI: 00:15.2
834 15:07:34.414620 GENERIC: 0.0 disabled
835 15:07:34.414950 I2C: 00:15 enabled
836 15:07:34.418373 I2C: 00:10 disabled
837 15:07:34.421287 I2C: 00:10 disabled
838 15:07:34.421618 I2C: 00:2c enabled
839 15:07:34.424722 I2C: 00:40 enabled
840 15:07:34.425157 I2C: 00:10 enabled
841 15:07:34.428105 I2C: 00:39 enabled
842 15:07:34.431211 scan_static_bus for PCI: 00:15.2 done
843 15:07:34.438521 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
844 15:07:34.438861 PCI: 00:15.3 scanning...
845 15:07:34.441142 scan_static_bus for PCI: 00:15.3
846 15:07:34.444837 I2C: 00:36 enabled
847 15:07:34.447975 I2C: 00:10 disabled
848 15:07:34.448309 I2C: 00:0c enabled
849 15:07:34.450894 I2C: 00:50 enabled
850 15:07:34.454390 scan_static_bus for PCI: 00:15.3 done
851 15:07:34.460721 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
852 15:07:34.461197 PCI: 00:19.0 scanning...
853 15:07:34.464259 scan_static_bus for PCI: 00:19.0
854 15:07:34.467303 I2C: 00:1a enabled
855 15:07:34.471047 I2C: 00:1a disabled
856 15:07:34.471416 I2C: 00:1a disabled
857 15:07:34.474208 I2C: 00:28 enabled
858 15:07:34.474610 I2C: 00:29 enabled
859 15:07:34.477676 scan_static_bus for PCI: 00:19.0 done
860 15:07:34.483897 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
861 15:07:34.487395 PCI: 00:1e.2 scanning...
862 15:07:34.490800 scan_generic_bus for PCI: 00:1e.2
863 15:07:34.491294 SPI: 00 enabled
864 15:07:34.497044 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
865 15:07:34.503632 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
866 15:07:34.504000 PCI: 00:1f.0 scanning...
867 15:07:34.507398 scan_static_bus for PCI: 00:1f.0
868 15:07:34.510822 PNP: 0c09.0 enabled
869 15:07:34.514106 PNP: 0c09.0 scanning...
870 15:07:34.517406 scan_static_bus for PNP: 0c09.0
871 15:07:34.520385 scan_static_bus for PNP: 0c09.0 done
872 15:07:34.523521 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
873 15:07:34.527022 scan_static_bus for PCI: 00:1f.0 done
874 15:07:34.533558 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
875 15:07:34.537366 PCI: 00:1f.3 scanning...
876 15:07:34.540297 scan_static_bus for PCI: 00:1f.3
877 15:07:34.540666 GENERIC: 0.0 disabled
878 15:07:34.546624 scan_static_bus for PCI: 00:1f.3 done
879 15:07:34.550346 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
880 15:07:34.553171 PCI: 00:1f.5 scanning...
881 15:07:34.556421 scan_generic_bus for PCI: 00:1f.5
882 15:07:34.559632 scan_generic_bus for PCI: 00:1f.5 done
883 15:07:34.562941 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
884 15:07:34.570008 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
885 15:07:34.572828 scan_static_bus for Root Device done
886 15:07:34.576118 scan_bus: bus Root Device finished in 665 msecs
887 15:07:34.579854 done
888 15:07:34.583106 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1086 ms
889 15:07:34.586978 Chrome EC: UHEPI supported
890 15:07:34.595002 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
891 15:07:34.599934 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
892 15:07:34.603172 SPI flash protection: WPSW=0 SRP0=1
893 15:07:34.610054 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
894 15:07:34.613217 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
895 15:07:34.617035 found VGA at PCI: 00:02.0
896 15:07:34.620191 Setting up VGA for PCI: 00:02.0
897 15:07:34.626142 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
898 15:07:34.629709 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
899 15:07:34.633370 Allocating resources...
900 15:07:34.636297 Reading resources...
901 15:07:34.639798 Root Device read_resources bus 0 link: 0
902 15:07:34.643663 CPU_CLUSTER: 0 read_resources bus 0 link: 0
903 15:07:34.649543 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
904 15:07:34.653106 DOMAIN: 0000 read_resources bus 0 link: 0
905 15:07:34.659531 PCI: 00:04.0 read_resources bus 1 link: 0
906 15:07:34.662945 PCI: 00:04.0 read_resources bus 1 link: 0 done
907 15:07:34.666154 PCI: 00:05.0 read_resources bus 2 link: 0
908 15:07:34.673293 PCI: 00:05.0 read_resources bus 2 link: 0 done
909 15:07:34.676248 PCI: 00:14.0 read_resources bus 0 link: 0
910 15:07:34.682741 USB0 port 0 read_resources bus 0 link: 0
911 15:07:34.686377 USB0 port 0 read_resources bus 0 link: 0 done
912 15:07:34.694388 PCI: 00:14.0 read_resources bus 0 link: 0 done
913 15:07:34.697139 PCI: 00:14.3 read_resources bus 0 link: 0
914 15:07:34.753724 PCI: 00:14.3 read_resources bus 0 link: 0 done
915 15:07:34.754152 PCI: 00:15.0 read_resources bus 0 link: 0
916 15:07:34.754427 PCI: 00:15.0 read_resources bus 0 link: 0 done
917 15:07:34.754951 PCI: 00:15.2 read_resources bus 0 link: 0
918 15:07:34.755217 PCI: 00:15.2 read_resources bus 0 link: 0 done
919 15:07:34.755493 PCI: 00:15.3 read_resources bus 0 link: 0
920 15:07:34.755745 PCI: 00:15.3 read_resources bus 0 link: 0 done
921 15:07:34.756031 PCI: 00:19.0 read_resources bus 0 link: 0
922 15:07:34.756278 PCI: 00:19.0 read_resources bus 0 link: 0 done
923 15:07:34.756585 PCI: 00:1e.2 read_resources bus 3 link: 0
924 15:07:34.756960 PCI: 00:1e.2 read_resources bus 3 link: 0 done
925 15:07:34.801064 PCI: 00:1f.0 read_resources bus 0 link: 0
926 15:07:34.801510 PCI: 00:1f.0 read_resources bus 0 link: 0 done
927 15:07:34.801783 PCI: 00:1f.3 read_resources bus 0 link: 0
928 15:07:34.802927 PCI: 00:1f.3 read_resources bus 0 link: 0 done
929 15:07:34.803257 DOMAIN: 0000 read_resources bus 0 link: 0 done
930 15:07:34.803549 Root Device read_resources bus 0 link: 0 done
931 15:07:34.803799 Done reading resources.
932 15:07:34.804036 Show resources in subtree (Root Device)...After reading.
933 15:07:34.804272 Root Device child on link 0 CPU_CLUSTER: 0
934 15:07:34.804562 CPU_CLUSTER: 0 child on link 0 APIC: 00
935 15:07:34.804892 APIC: 00
936 15:07:34.805495 APIC: 02
937 15:07:34.805755 DOMAIN: 0000 child on link 0 PCI: 00:00.0
938 15:07:34.815810 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
939 15:07:34.825375 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
940 15:07:34.825622 PCI: 00:00.0
941 15:07:34.835310 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
942 15:07:34.845326 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
943 15:07:34.855231 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
944 15:07:34.861698 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
945 15:07:34.872109 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
946 15:07:34.881741 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
947 15:07:34.891406 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
948 15:07:34.901394 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
949 15:07:34.911191 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
950 15:07:34.917828 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
951 15:07:34.927902 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
952 15:07:34.938290 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
953 15:07:34.948044 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
954 15:07:34.954258 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
955 15:07:34.964962 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
956 15:07:34.974446 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
957 15:07:34.983826 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
958 15:07:34.994193 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
959 15:07:35.003858 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
960 15:07:35.004259 PCI: 00:02.0
961 15:07:35.014453 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 15:07:35.027562 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
963 15:07:35.033746 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
964 15:07:35.037286 PCI: 00:04.0 child on link 0 GENERIC: 0.0
965 15:07:35.046805 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
966 15:07:35.049926 GENERIC: 0.0
967 15:07:35.053284 PCI: 00:05.0 child on link 0 GENERIC: 0.0
968 15:07:35.063099 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
969 15:07:35.067306 GENERIC: 0.0
970 15:07:35.067688 PCI: 00:08.0
971 15:07:35.076813 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 15:07:35.083519 PCI: 00:14.0 child on link 0 USB0 port 0
973 15:07:35.093248 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
974 15:07:35.096640 USB0 port 0 child on link 0 USB2 port 0
975 15:07:35.099970 USB2 port 0
976 15:07:35.100374 USB2 port 1
977 15:07:35.103182 USB2 port 2
978 15:07:35.103610 USB2 port 3
979 15:07:35.106501 USB2 port 4
980 15:07:35.106815 USB2 port 5
981 15:07:35.109774 USB2 port 6
982 15:07:35.110081 USB2 port 7
983 15:07:35.113044 USB3 port 0
984 15:07:35.113426 USB3 port 1
985 15:07:35.116712 USB3 port 2
986 15:07:35.117051 USB3 port 3
987 15:07:35.119723 PCI: 00:14.2
988 15:07:35.123321 PCI: 00:14.3 child on link 0 GENERIC: 0.0
989 15:07:35.133019 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
990 15:07:35.136381 GENERIC: 0.0
991 15:07:35.136836 PCI: 00:14.5
992 15:07:35.146778 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 15:07:35.153840 PCI: 00:15.0 child on link 0 I2C: 00:2c
994 15:07:35.162489 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 15:07:35.162891 I2C: 00:2c
996 15:07:35.166399 I2C: 00:15
997 15:07:35.166817 PCI: 00:15.1
998 15:07:35.175820 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 15:07:35.182660 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1000 15:07:35.193469 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1001 15:07:35.193782 GENERIC: 0.0
1002 15:07:35.195546 I2C: 00:15
1003 15:07:35.195999 I2C: 00:10
1004 15:07:35.196292 I2C: 00:10
1005 15:07:35.199376 I2C: 00:2c
1006 15:07:35.199688 I2C: 00:40
1007 15:07:35.202414 I2C: 00:10
1008 15:07:35.202778 I2C: 00:39
1009 15:07:35.208900 PCI: 00:15.3 child on link 0 I2C: 00:36
1010 15:07:35.219184 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 15:07:35.219594 I2C: 00:36
1012 15:07:35.222350 I2C: 00:10
1013 15:07:35.222788 I2C: 00:0c
1014 15:07:35.225412 I2C: 00:50
1015 15:07:35.225719 PCI: 00:16.0
1016 15:07:35.235534 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 15:07:35.238541 PCI: 00:19.0 child on link 0 I2C: 00:1a
1018 15:07:35.248778 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1019 15:07:35.252942 I2C: 00:1a
1020 15:07:35.253353 I2C: 00:1a
1021 15:07:35.255318 I2C: 00:1a
1022 15:07:35.255674 I2C: 00:28
1023 15:07:35.259464 I2C: 00:29
1024 15:07:35.259858 PCI: 00:19.2
1025 15:07:35.271891 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 15:07:35.281766 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 15:07:35.282252 PCI: 00:1a.0
1028 15:07:35.291804 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 15:07:35.295404 PCI: 00:1e.0
1030 15:07:35.297889 PCI: 00:1e.2 child on link 0 SPI: 00
1031 15:07:35.307948 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 15:07:35.308231 SPI: 00
1033 15:07:35.311652 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1034 15:07:35.321501 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1035 15:07:35.325111 PNP: 0c09.0
1036 15:07:35.330963 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1037 15:07:35.334415 PCI: 00:1f.2
1038 15:07:35.344916 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1039 15:07:35.351004 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1040 15:07:35.357316 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1041 15:07:35.367708 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 15:07:35.374976 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1043 15:07:35.379111 GENERIC: 0.0
1044 15:07:35.379414 PCI: 00:1f.5
1045 15:07:35.388281 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 15:07:35.398802 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1047 15:07:35.404720 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1048 15:07:35.411648 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 15:07:35.418011 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1050 15:07:35.425359 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1051 15:07:35.431283 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1052 15:07:35.434535 DOMAIN: 0000: Resource ranges:
1053 15:07:35.438001 * Base: 1000, Size: 800, Tag: 100
1054 15:07:35.444817 * Base: 1900, Size: e700, Tag: 100
1055 15:07:35.448464 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1056 15:07:35.454764 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1057 15:07:35.461024 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1058 15:07:35.471050 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1059 15:07:35.477646 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1060 15:07:35.484594 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1061 15:07:35.494582 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1062 15:07:35.501044 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1063 15:07:35.507558 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1064 15:07:35.514370 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1065 15:07:35.524312 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1066 15:07:35.530698 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1067 15:07:35.537414 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1068 15:07:35.547481 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1069 15:07:35.554268 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1070 15:07:35.560485 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1071 15:07:35.570638 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1072 15:07:35.577080 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1073 15:07:35.583360 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1074 15:07:35.593465 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1075 15:07:35.600163 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1076 15:07:35.606439 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1077 15:07:35.616524 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1078 15:07:35.623591 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1079 15:07:35.626781 DOMAIN: 0000: Resource ranges:
1080 15:07:35.629989 * Base: 7fc00000, Size: 40400000, Tag: 200
1081 15:07:35.636570 * Base: d0000000, Size: 2b000000, Tag: 200
1082 15:07:35.639934 * Base: fb001000, Size: 2fff000, Tag: 200
1083 15:07:35.643112 * Base: fe010000, Size: 22000, Tag: 200
1084 15:07:35.646726 * Base: fe033000, Size: a4d000, Tag: 200
1085 15:07:35.653537 * Base: fea88000, Size: 2f8000, Tag: 200
1086 15:07:35.656546 * Base: fed88000, Size: 8000, Tag: 200
1087 15:07:35.659746 * Base: fed93000, Size: d000, Tag: 200
1088 15:07:35.663179 * Base: feda2000, Size: 125e000, Tag: 200
1089 15:07:35.669665 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1090 15:07:35.676684 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1091 15:07:35.682797 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1092 15:07:35.690216 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1093 15:07:35.696057 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1094 15:07:35.703195 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1095 15:07:35.709730 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1096 15:07:35.715736 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1097 15:07:35.722919 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1098 15:07:35.729492 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1099 15:07:35.736545 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1100 15:07:35.742586 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1101 15:07:35.749297 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1102 15:07:35.756698 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1103 15:07:35.762729 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1104 15:07:35.769576 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1105 15:07:35.775763 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1106 15:07:35.782171 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1107 15:07:35.790534 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1108 15:07:35.795600 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1109 15:07:35.802246 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1110 15:07:35.808900 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1111 15:07:35.815401 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1112 15:07:35.822083 Root Device assign_resources, bus 0 link: 0
1113 15:07:35.826069 DOMAIN: 0000 assign_resources, bus 0 link: 0
1114 15:07:35.835777 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1115 15:07:35.842369 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1116 15:07:35.848630 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1117 15:07:35.859225 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1118 15:07:35.862307 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 15:07:35.868604 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 15:07:35.875796 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1121 15:07:35.878369 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 15:07:35.884994 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 15:07:35.892323 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1124 15:07:35.902245 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1125 15:07:35.905165 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 15:07:35.911806 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 15:07:35.918892 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1128 15:07:35.922038 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 15:07:35.928383 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 15:07:35.935186 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1131 15:07:35.944979 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1132 15:07:35.948920 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 15:07:35.951960 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 15:07:35.962297 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1135 15:07:35.968681 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1136 15:07:35.975041 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 15:07:35.978433 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 15:07:35.985694 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1139 15:07:35.991458 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 15:07:35.995052 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 15:07:36.004673 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1142 15:07:36.011236 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1143 15:07:36.018016 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 15:07:36.021882 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 15:07:36.027836 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1146 15:07:36.038021 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1147 15:07:36.044389 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1148 15:07:36.051293 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 15:07:36.054793 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 15:07:36.061213 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 15:07:36.064404 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 15:07:36.067782 LPC: Trying to open IO window from 800 size 1ff
1153 15:07:36.077880 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1154 15:07:36.084458 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1155 15:07:36.092129 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 15:07:36.094448 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 15:07:36.101067 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1158 15:07:36.107887 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 15:07:36.111186 Root Device assign_resources, bus 0 link: 0
1160 15:07:36.114368 Done setting resources.
1161 15:07:36.120961 Show resources in subtree (Root Device)...After assigning values.
1162 15:07:36.124397 Root Device child on link 0 CPU_CLUSTER: 0
1163 15:07:36.130680 CPU_CLUSTER: 0 child on link 0 APIC: 00
1164 15:07:36.131104 APIC: 00
1165 15:07:36.131466 APIC: 02
1166 15:07:36.137339 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1167 15:07:36.144234 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1168 15:07:36.153798 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1169 15:07:36.157621 PCI: 00:00.0
1170 15:07:36.167270 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1171 15:07:36.177877 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1172 15:07:36.184022 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1173 15:07:36.193985 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1174 15:07:36.203534 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1175 15:07:36.213400 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1176 15:07:36.223420 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1177 15:07:36.233100 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1178 15:07:36.240256 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1179 15:07:36.250240 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1180 15:07:36.259655 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1181 15:07:36.269790 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1182 15:07:36.279904 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1183 15:07:36.286403 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1184 15:07:36.296410 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1185 15:07:36.306257 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1186 15:07:36.316236 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1187 15:07:36.326153 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1188 15:07:36.335903 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1189 15:07:36.336413 PCI: 00:02.0
1190 15:07:36.345825 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1191 15:07:36.358811 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1192 15:07:36.365598 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1193 15:07:36.372193 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 15:07:36.381999 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1195 15:07:36.382428 GENERIC: 0.0
1196 15:07:36.389384 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1197 15:07:36.398448 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1198 15:07:36.398970 GENERIC: 0.0
1199 15:07:36.402251 PCI: 00:08.0
1200 15:07:36.411783 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1201 15:07:36.415475 PCI: 00:14.0 child on link 0 USB0 port 0
1202 15:07:36.428256 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1203 15:07:36.431642 USB0 port 0 child on link 0 USB2 port 0
1204 15:07:36.432172 USB2 port 0
1205 15:07:36.434832 USB2 port 1
1206 15:07:36.435254 USB2 port 2
1207 15:07:36.438286 USB2 port 3
1208 15:07:36.441320 USB2 port 4
1209 15:07:36.441930 USB2 port 5
1210 15:07:36.445007 USB2 port 6
1211 15:07:36.445427 USB2 port 7
1212 15:07:36.448300 USB3 port 0
1213 15:07:36.448906 USB3 port 1
1214 15:07:36.451432 USB3 port 2
1215 15:07:36.451802 USB3 port 3
1216 15:07:36.454810 PCI: 00:14.2
1217 15:07:36.458495 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 15:07:36.468756 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1219 15:07:36.472190 GENERIC: 0.0
1220 15:07:36.472712 PCI: 00:14.5
1221 15:07:36.481561 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1222 15:07:36.488448 PCI: 00:15.0 child on link 0 I2C: 00:2c
1223 15:07:36.497782 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1224 15:07:36.498302 I2C: 00:2c
1225 15:07:36.501168 I2C: 00:15
1226 15:07:36.501594 PCI: 00:15.1
1227 15:07:36.511804 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1228 15:07:36.517885 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1229 15:07:36.527776 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1230 15:07:36.528207 GENERIC: 0.0
1231 15:07:36.530982 I2C: 00:15
1232 15:07:36.531549 I2C: 00:10
1233 15:07:36.534750 I2C: 00:10
1234 15:07:36.535171 I2C: 00:2c
1235 15:07:36.537935 I2C: 00:40
1236 15:07:36.538356 I2C: 00:10
1237 15:07:36.540919 I2C: 00:39
1238 15:07:36.544723 PCI: 00:15.3 child on link 0 I2C: 00:36
1239 15:07:36.554395 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1240 15:07:36.554823 I2C: 00:36
1241 15:07:36.557666 I2C: 00:10
1242 15:07:36.558086 I2C: 00:0c
1243 15:07:36.561157 I2C: 00:50
1244 15:07:36.561580 PCI: 00:16.0
1245 15:07:36.574483 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1246 15:07:36.577674 PCI: 00:19.0 child on link 0 I2C: 00:1a
1247 15:07:36.588010 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1248 15:07:36.588521 I2C: 00:1a
1249 15:07:36.590858 I2C: 00:1a
1250 15:07:36.591284 I2C: 00:1a
1251 15:07:36.594212 I2C: 00:28
1252 15:07:36.594741 I2C: 00:29
1253 15:07:36.598167 PCI: 00:19.2
1254 15:07:36.607586 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 15:07:36.617291 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1256 15:07:36.620634 PCI: 00:1a.0
1257 15:07:36.630886 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1258 15:07:36.631313 PCI: 00:1e.0
1259 15:07:36.637505 PCI: 00:1e.2 child on link 0 SPI: 00
1260 15:07:36.647096 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1261 15:07:36.647677 SPI: 00
1262 15:07:36.650377 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 15:07:36.660314 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 15:07:36.660823 PNP: 0c09.0
1265 15:07:36.670510 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 15:07:36.673934 PCI: 00:1f.2
1267 15:07:36.680242 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 15:07:36.690848 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1269 15:07:36.696490 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1270 15:07:36.706549 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1271 15:07:36.716877 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1272 15:07:36.717461 GENERIC: 0.0
1273 15:07:36.719587 PCI: 00:1f.5
1274 15:07:36.729617 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1275 15:07:36.733186 Done allocating resources.
1276 15:07:36.739666 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1277 15:07:36.743513 Enabling resources...
1278 15:07:36.746418 PCI: 00:00.0 subsystem <- 8086/4e22
1279 15:07:36.746838 PCI: 00:00.0 cmd <- 06
1280 15:07:36.753101 PCI: 00:02.0 subsystem <- 8086/4e55
1281 15:07:36.753519 PCI: 00:02.0 cmd <- 03
1282 15:07:36.756335 PCI: 00:04.0 subsystem <- 8086/4e03
1283 15:07:36.760017 PCI: 00:04.0 cmd <- 02
1284 15:07:36.762976 PCI: 00:05.0 bridge ctrl <- 0003
1285 15:07:36.766340 PCI: 00:05.0 subsystem <- 8086/4e19
1286 15:07:36.769384 PCI: 00:05.0 cmd <- 02
1287 15:07:36.772930 PCI: 00:08.0 cmd <- 06
1288 15:07:36.776283 PCI: 00:14.0 subsystem <- 8086/4ded
1289 15:07:36.779526 PCI: 00:14.0 cmd <- 02
1290 15:07:36.782949 PCI: 00:14.3 subsystem <- 8086/4df0
1291 15:07:36.783627 PCI: 00:14.3 cmd <- 02
1292 15:07:36.789426 PCI: 00:14.5 subsystem <- 8086/4df8
1293 15:07:36.789844 PCI: 00:14.5 cmd <- 06
1294 15:07:36.792653 PCI: 00:15.0 subsystem <- 8086/4de8
1295 15:07:36.796149 PCI: 00:15.0 cmd <- 02
1296 15:07:36.799301 PCI: 00:15.1 subsystem <- 8086/4de9
1297 15:07:36.802555 PCI: 00:15.1 cmd <- 02
1298 15:07:36.806063 PCI: 00:15.2 subsystem <- 8086/4dea
1299 15:07:36.809729 PCI: 00:15.2 cmd <- 02
1300 15:07:36.812710 PCI: 00:15.3 subsystem <- 8086/4deb
1301 15:07:36.816423 PCI: 00:15.3 cmd <- 02
1302 15:07:36.819020 PCI: 00:16.0 subsystem <- 8086/4de0
1303 15:07:36.822595 PCI: 00:16.0 cmd <- 02
1304 15:07:36.825793 PCI: 00:19.0 subsystem <- 8086/4dc5
1305 15:07:36.826379 PCI: 00:19.0 cmd <- 02
1306 15:07:36.832183 PCI: 00:19.2 subsystem <- 8086/4dc7
1307 15:07:36.832668 PCI: 00:19.2 cmd <- 06
1308 15:07:36.835734 PCI: 00:1a.0 subsystem <- 8086/4dc4
1309 15:07:36.839022 PCI: 00:1a.0 cmd <- 06
1310 15:07:36.842618 PCI: 00:1e.2 subsystem <- 8086/4daa
1311 15:07:36.845297 PCI: 00:1e.2 cmd <- 06
1312 15:07:36.848890 PCI: 00:1f.0 subsystem <- 8086/4d87
1313 15:07:36.852380 PCI: 00:1f.0 cmd <- 407
1314 15:07:36.855295 PCI: 00:1f.3 subsystem <- 8086/4dc8
1315 15:07:36.859044 PCI: 00:1f.3 cmd <- 02
1316 15:07:36.862446 PCI: 00:1f.5 subsystem <- 8086/4da4
1317 15:07:36.865772 PCI: 00:1f.5 cmd <- 406
1318 15:07:36.868640 done.
1319 15:07:36.871769 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1320 15:07:36.875506 Initializing devices...
1321 15:07:36.878828 Root Device init
1322 15:07:36.879246 mainboard: EC init
1323 15:07:36.885391 Chrome EC: Set SMI mask to 0x0000000000000000
1324 15:07:36.888185 Chrome EC: clear events_b mask to 0x0000000000000000
1325 15:07:36.895230 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1326 15:07:36.901351 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1327 15:07:36.908347 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1328 15:07:36.911834 Chrome EC: Set WAKE mask to 0x0000000000000000
1329 15:07:36.918596 Root Device init finished in 35 msecs
1330 15:07:36.921581 PCI: 00:00.0 init
1331 15:07:36.922031 CPU TDP = 6 Watts
1332 15:07:36.924854 CPU PL1 = 7 Watts
1333 15:07:36.928145 CPU PL2 = 12 Watts
1334 15:07:36.931160 PCI: 00:00.0 init finished in 6 msecs
1335 15:07:36.931675 PCI: 00:02.0 init
1336 15:07:36.934996 GMA: Found VBT in CBFS
1337 15:07:36.938388 GMA: Found valid VBT in CBFS
1338 15:07:36.945194 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1339 15:07:36.951251 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1340 15:07:36.954333 PCI: 00:02.0 init finished in 18 msecs
1341 15:07:36.957895 PCI: 00:08.0 init
1342 15:07:36.961579 PCI: 00:08.0 init finished in 0 msecs
1343 15:07:36.964601 PCI: 00:14.0 init
1344 15:07:36.967831 XHCI: Updated LFPS sampling OFF time to 9 ms
1345 15:07:36.970895 PCI: 00:14.0 init finished in 4 msecs
1346 15:07:36.974688 PCI: 00:15.0 init
1347 15:07:36.977746 I2C bus 0 version 0x3230302a
1348 15:07:36.981414 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1349 15:07:36.984576 PCI: 00:15.0 init finished in 6 msecs
1350 15:07:36.987799 PCI: 00:15.1 init
1351 15:07:36.991439 I2C bus 1 version 0x3230302a
1352 15:07:36.994310 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1353 15:07:36.997817 PCI: 00:15.1 init finished in 6 msecs
1354 15:07:37.001253 PCI: 00:15.2 init
1355 15:07:37.001796 I2C bus 2 version 0x3230302a
1356 15:07:37.007516 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1357 15:07:37.011115 PCI: 00:15.2 init finished in 6 msecs
1358 15:07:37.011581 PCI: 00:15.3 init
1359 15:07:37.014351 I2C bus 3 version 0x3230302a
1360 15:07:37.017411 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1361 15:07:37.024046 PCI: 00:15.3 init finished in 6 msecs
1362 15:07:37.024495 PCI: 00:16.0 init
1363 15:07:37.027184 PCI: 00:16.0 init finished in 0 msecs
1364 15:07:37.030783 PCI: 00:19.0 init
1365 15:07:37.033839 I2C bus 4 version 0x3230302a
1366 15:07:37.037532 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1367 15:07:37.040853 PCI: 00:19.0 init finished in 6 msecs
1368 15:07:37.043838 PCI: 00:1a.0 init
1369 15:07:37.047518 PCI: 00:1a.0 init finished in 0 msecs
1370 15:07:37.050549 PCI: 00:1f.0 init
1371 15:07:37.054673 IOAPIC: Initializing IOAPIC at 0xfec00000
1372 15:07:37.057104 IOAPIC: Bootstrap Processor Local APIC = 0x00
1373 15:07:37.061096 IOAPIC: ID = 0x02
1374 15:07:37.063528 IOAPIC: Dumping registers
1375 15:07:37.066704 reg 0x0000: 0x02000000
1376 15:07:37.067271 reg 0x0001: 0x00770020
1377 15:07:37.070715 reg 0x0002: 0x00000000
1378 15:07:37.073777 PCI: 00:1f.0 init finished in 21 msecs
1379 15:07:37.076829 PCI: 00:1f.2 init
1380 15:07:37.080578 Disabling ACPI via APMC.
1381 15:07:37.083819 APMC done.
1382 15:07:37.086791 PCI: 00:1f.2 init finished in 6 msecs
1383 15:07:37.098527 PNP: 0c09.0 init
1384 15:07:37.101858 Google Chrome EC uptime: 6.516 seconds
1385 15:07:37.107983 Google Chrome AP resets since EC boot: 0
1386 15:07:37.111898 Google Chrome most recent AP reset causes:
1387 15:07:37.118702 Google Chrome EC reset flags at last EC boot: reset-pin
1388 15:07:37.121961 PNP: 0c09.0 init finished in 18 msecs
1389 15:07:37.122386 Devices initialized
1390 15:07:37.124734 Show all devs... After init.
1391 15:07:37.128048 Root Device: enabled 1
1392 15:07:37.131296 CPU_CLUSTER: 0: enabled 1
1393 15:07:37.134436 DOMAIN: 0000: enabled 1
1394 15:07:37.134862 PCI: 00:00.0: enabled 1
1395 15:07:37.138465 PCI: 00:02.0: enabled 1
1396 15:07:37.141458 PCI: 00:04.0: enabled 1
1397 15:07:37.144605 PCI: 00:05.0: enabled 1
1398 15:07:37.145178 PCI: 00:09.0: enabled 0
1399 15:07:37.147951 PCI: 00:12.6: enabled 0
1400 15:07:37.151043 PCI: 00:14.0: enabled 1
1401 15:07:37.151489 PCI: 00:14.1: enabled 0
1402 15:07:37.154447 PCI: 00:14.2: enabled 0
1403 15:07:37.157682 PCI: 00:14.3: enabled 1
1404 15:07:37.161291 PCI: 00:14.5: enabled 1
1405 15:07:37.161712 PCI: 00:15.0: enabled 1
1406 15:07:37.164788 PCI: 00:15.1: enabled 1
1407 15:07:37.167830 PCI: 00:15.2: enabled 1
1408 15:07:37.170973 PCI: 00:15.3: enabled 1
1409 15:07:37.171417 PCI: 00:16.0: enabled 1
1410 15:07:37.174500 PCI: 00:16.1: enabled 0
1411 15:07:37.177476 PCI: 00:16.4: enabled 0
1412 15:07:37.180907 PCI: 00:16.5: enabled 0
1413 15:07:37.181427 PCI: 00:17.0: enabled 0
1414 15:07:37.184457 PCI: 00:19.0: enabled 1
1415 15:07:37.187637 PCI: 00:19.1: enabled 0
1416 15:07:37.188167 PCI: 00:19.2: enabled 1
1417 15:07:37.191155 PCI: 00:1a.0: enabled 1
1418 15:07:37.194497 PCI: 00:1c.0: enabled 0
1419 15:07:37.197622 PCI: 00:1c.1: enabled 0
1420 15:07:37.198046 PCI: 00:1c.2: enabled 0
1421 15:07:37.201151 PCI: 00:1c.3: enabled 0
1422 15:07:37.204180 PCI: 00:1c.4: enabled 0
1423 15:07:37.207110 PCI: 00:1c.5: enabled 0
1424 15:07:37.207568 PCI: 00:1c.6: enabled 0
1425 15:07:37.210621 PCI: 00:1c.7: enabled 1
1426 15:07:37.214192 PCI: 00:1e.0: enabled 0
1427 15:07:37.217167 PCI: 00:1e.1: enabled 0
1428 15:07:37.217588 PCI: 00:1e.2: enabled 1
1429 15:07:37.220700 PCI: 00:1e.3: enabled 0
1430 15:07:37.223808 PCI: 00:1f.0: enabled 1
1431 15:07:37.227254 PCI: 00:1f.1: enabled 0
1432 15:07:37.227692 PCI: 00:1f.2: enabled 1
1433 15:07:37.230579 PCI: 00:1f.3: enabled 1
1434 15:07:37.234280 PCI: 00:1f.4: enabled 0
1435 15:07:37.234880 PCI: 00:1f.5: enabled 1
1436 15:07:37.237443 PCI: 00:1f.7: enabled 0
1437 15:07:37.240477 GENERIC: 0.0: enabled 1
1438 15:07:37.244507 GENERIC: 0.0: enabled 1
1439 15:07:37.245020 USB0 port 0: enabled 1
1440 15:07:37.247305 GENERIC: 0.0: enabled 1
1441 15:07:37.250223 I2C: 00:2c: enabled 1
1442 15:07:37.250645 I2C: 00:15: enabled 1
1443 15:07:37.253640 GENERIC: 0.0: enabled 0
1444 15:07:37.257034 I2C: 00:15: enabled 1
1445 15:07:37.260875 I2C: 00:10: enabled 0
1446 15:07:37.261295 I2C: 00:10: enabled 0
1447 15:07:37.264023 I2C: 00:2c: enabled 1
1448 15:07:37.267877 I2C: 00:40: enabled 1
1449 15:07:37.268300 I2C: 00:10: enabled 1
1450 15:07:37.270198 I2C: 00:39: enabled 1
1451 15:07:37.273761 I2C: 00:36: enabled 1
1452 15:07:37.274180 I2C: 00:10: enabled 0
1453 15:07:37.276917 I2C: 00:0c: enabled 1
1454 15:07:37.280139 I2C: 00:50: enabled 1
1455 15:07:37.280568 I2C: 00:1a: enabled 1
1456 15:07:37.283679 I2C: 00:1a: enabled 0
1457 15:07:37.287191 I2C: 00:1a: enabled 0
1458 15:07:37.287748 I2C: 00:28: enabled 1
1459 15:07:37.290186 I2C: 00:29: enabled 1
1460 15:07:37.293935 PCI: 00:00.0: enabled 1
1461 15:07:37.294445 SPI: 00: enabled 1
1462 15:07:37.297392 PNP: 0c09.0: enabled 1
1463 15:07:37.300023 GENERIC: 0.0: enabled 0
1464 15:07:37.300538 USB2 port 0: enabled 1
1465 15:07:37.303322 USB2 port 1: enabled 1
1466 15:07:37.306889 USB2 port 2: enabled 1
1467 15:07:37.310255 USB2 port 3: enabled 1
1468 15:07:37.310865 USB2 port 4: enabled 0
1469 15:07:37.314367 USB2 port 5: enabled 1
1470 15:07:37.317014 USB2 port 6: enabled 0
1471 15:07:37.317544 USB2 port 7: enabled 1
1472 15:07:37.319775 USB3 port 0: enabled 1
1473 15:07:37.323468 USB3 port 1: enabled 1
1474 15:07:37.326932 USB3 port 2: enabled 1
1475 15:07:37.327388 USB3 port 3: enabled 1
1476 15:07:37.330074 APIC: 00: enabled 1
1477 15:07:37.330565 APIC: 02: enabled 1
1478 15:07:37.333659 PCI: 00:08.0: enabled 1
1479 15:07:37.339622 BS: BS_DEV_INIT run times (exec / console): 24 / 437 ms
1480 15:07:37.343198 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1481 15:07:37.346167 ELOG: NV offset 0xbfa000 size 0x1000
1482 15:07:37.354708 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1483 15:07:37.361434 ELOG: Event(17) added with size 13 at 2023-06-09 15:07:36 UTC
1484 15:07:37.368227 ELOG: Event(92) added with size 9 at 2023-06-09 15:07:36 UTC
1485 15:07:37.375309 ELOG: Event(93) added with size 9 at 2023-06-09 15:07:36 UTC
1486 15:07:37.381700 ELOG: Event(9E) added with size 10 at 2023-06-09 15:07:36 UTC
1487 15:07:37.387729 ELOG: Event(9F) added with size 14 at 2023-06-09 15:07:36 UTC
1488 15:07:37.391305 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1489 15:07:37.398459 ELOG: Event(A1) added with size 10 at 2023-06-09 15:07:36 UTC
1490 15:07:37.408212 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1491 15:07:37.415092 ELOG: Event(A0) added with size 9 at 2023-06-09 15:07:36 UTC
1492 15:07:37.418242 elog_add_boot_reason: Logged dev mode boot
1493 15:07:37.424425 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1494 15:07:37.424859 Finalize devices...
1495 15:07:37.428046 Devices finalized
1496 15:07:37.431294 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1497 15:07:37.438298 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1498 15:07:37.444990 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1499 15:07:37.447774 ME: HFSTS1 : 0x80030045
1500 15:07:37.451021 ME: HFSTS2 : 0x30280136
1501 15:07:37.454565 ME: HFSTS3 : 0x00000050
1502 15:07:37.461012 ME: HFSTS4 : 0x00004000
1503 15:07:37.464035 ME: HFSTS5 : 0x00000000
1504 15:07:37.467654 ME: HFSTS6 : 0x40400006
1505 15:07:37.470869 ME: Manufacturing Mode : NO
1506 15:07:37.474192 ME: FW Partition Table : OK
1507 15:07:37.477761 ME: Bringup Loader Failure : NO
1508 15:07:37.481366 ME: Firmware Init Complete : NO
1509 15:07:37.484176 ME: Boot Options Present : NO
1510 15:07:37.487442 ME: Update In Progress : NO
1511 15:07:37.491406 ME: D0i3 Support : YES
1512 15:07:37.494138 ME: Low Power State Enabled : NO
1513 15:07:37.497593 ME: CPU Replaced : YES
1514 15:07:37.501043 ME: CPU Replacement Valid : YES
1515 15:07:37.503901 ME: Current Working State : 5
1516 15:07:37.507759 ME: Current Operation State : 1
1517 15:07:37.510510 ME: Current Operation Mode : 3
1518 15:07:37.513973 ME: Error Code : 0
1519 15:07:37.517441 ME: CPU Debug Disabled : YES
1520 15:07:37.520866 ME: TXT Support : NO
1521 15:07:37.527502 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1522 15:07:37.534176 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1523 15:07:37.538084 ACPI: Writing ACPI tables at 76b27000.
1524 15:07:37.538504 ACPI: * FACS
1525 15:07:37.540751 ACPI: * DSDT
1526 15:07:37.543872 Ramoops buffer: 0x100000@0x76a26000.
1527 15:07:37.546972 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1528 15:07:37.553834 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1529 15:07:37.557355 Google Chrome EC: version:
1530 15:07:37.560358 ro: magolor_1.1.9999-103b6f9
1531 15:07:37.563930 rw: magolor_1.1.9999-103b6f9
1532 15:07:37.564465 running image: 1
1533 15:07:37.569891 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1534 15:07:37.574407 ACPI: * FADT
1535 15:07:37.575047 SCI is IRQ9
1536 15:07:37.581138 ACPI: added table 1/32, length now 40
1537 15:07:37.581693 ACPI: * SSDT
1538 15:07:37.584613 Found 1 CPU(s) with 2 core(s) each.
1539 15:07:37.587654 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1540 15:07:37.594594 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1541 15:07:37.597290 Could not locate 'wifi_sar' in VPD.
1542 15:07:37.600660 Checking CBFS for default SAR values
1543 15:07:37.607704 wifi_sar_defaults.hex has bad len in CBFS
1544 15:07:37.610453 failed from getting SAR limits!
1545 15:07:37.614285 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1546 15:07:37.620461 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1547 15:07:37.623743 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1548 15:07:37.630807 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1549 15:07:37.634421 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1550 15:07:37.640374 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1551 15:07:37.643704 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1552 15:07:37.650799 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1553 15:07:37.657479 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1554 15:07:37.664043 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1555 15:07:37.667310 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1556 15:07:37.674277 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1557 15:07:37.680405 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1558 15:07:37.684264 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1559 15:07:37.687346 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1560 15:07:37.695632 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1561 15:07:37.698441 PS2K: Passing 101 keymaps to kernel
1562 15:07:37.705267 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1563 15:07:37.712026 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1564 15:07:37.715291 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1565 15:07:37.721317 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1566 15:07:37.728098 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1567 15:07:37.732199 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1568 15:07:37.738402 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1569 15:07:37.744705 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1570 15:07:37.748373 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1571 15:07:37.755344 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1572 15:07:37.758328 ACPI: added table 2/32, length now 44
1573 15:07:37.761656 ACPI: * MCFG
1574 15:07:37.765040 ACPI: added table 3/32, length now 48
1575 15:07:37.765466 ACPI: * TPM2
1576 15:07:37.768387 TPM2 log created at 0x76a16000
1577 15:07:37.771955 ACPI: added table 4/32, length now 52
1578 15:07:37.775137 ACPI: * MADT
1579 15:07:37.775605 SCI is IRQ9
1580 15:07:37.778759 ACPI: added table 5/32, length now 56
1581 15:07:37.781937 current = 76b2d580
1582 15:07:37.784878 ACPI: * DMAR
1583 15:07:37.789019 ACPI: added table 6/32, length now 60
1584 15:07:37.791439 ACPI: added table 7/32, length now 64
1585 15:07:37.791870 ACPI: * HPET
1586 15:07:37.794552 ACPI: added table 8/32, length now 68
1587 15:07:37.798169 ACPI: done.
1588 15:07:37.801233 ACPI tables: 26304 bytes.
1589 15:07:37.804859 smbios_write_tables: 76a15000
1590 15:07:37.808304 EC returned error result code 3
1591 15:07:37.811878 Couldn't obtain OEM name from CBI
1592 15:07:37.812305 Create SMBIOS type 16
1593 15:07:37.814901 Create SMBIOS type 17
1594 15:07:37.818000 GENERIC: 0.0 (WIFI Device)
1595 15:07:37.821891 SMBIOS tables: 913 bytes.
1596 15:07:37.825007 Writing table forward entry at 0x00000500
1597 15:07:37.831562 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1598 15:07:37.834880 Writing coreboot table at 0x76b4b000
1599 15:07:37.841566 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1600 15:07:37.844914 1. 0000000000001000-000000000009ffff: RAM
1601 15:07:37.851338 2. 00000000000a0000-00000000000fffff: RESERVED
1602 15:07:37.854698 3. 0000000000100000-0000000076a14fff: RAM
1603 15:07:37.861186 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1604 15:07:37.864339 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1605 15:07:37.871315 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1606 15:07:37.874581 7. 0000000077000000-000000007fbfffff: RESERVED
1607 15:07:37.880797 8. 00000000c0000000-00000000cfffffff: RESERVED
1608 15:07:37.884602 9. 00000000fb000000-00000000fb000fff: RESERVED
1609 15:07:37.891027 10. 00000000fe000000-00000000fe00ffff: RESERVED
1610 15:07:37.894255 11. 00000000fea80000-00000000fea87fff: RESERVED
1611 15:07:37.900676 12. 00000000fed80000-00000000fed87fff: RESERVED
1612 15:07:37.904384 13. 00000000fed90000-00000000fed92fff: RESERVED
1613 15:07:37.907438 14. 00000000feda0000-00000000feda1fff: RESERVED
1614 15:07:37.913761 15. 0000000100000000-00000001803fffff: RAM
1615 15:07:37.917187 Passing 4 GPIOs to payload:
1616 15:07:37.920503 NAME | PORT | POLARITY | VALUE
1617 15:07:37.927209 lid | undefined | high | high
1618 15:07:37.930694 power | undefined | high | low
1619 15:07:37.937690 oprom | undefined | high | low
1620 15:07:37.940639 EC in RW | 0x000000b9 | high | low
1621 15:07:37.947301 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 7b98
1622 15:07:37.950966 coreboot table: 1504 bytes.
1623 15:07:37.954099 IMD ROOT 0. 0x76fff000 0x00001000
1624 15:07:37.957575 IMD SMALL 1. 0x76ffe000 0x00001000
1625 15:07:37.963863 FSP MEMORY 2. 0x76c4e000 0x003b0000
1626 15:07:37.967956 CONSOLE 3. 0x76c2e000 0x00020000
1627 15:07:37.970997 FMAP 4. 0x76c2d000 0x00000578
1628 15:07:37.973676 TIME STAMP 5. 0x76c2c000 0x00000910
1629 15:07:37.976827 VBOOT WORK 6. 0x76c18000 0x00014000
1630 15:07:37.980123 ROMSTG STCK 7. 0x76c17000 0x00001000
1631 15:07:37.983965 AFTER CAR 8. 0x76c0d000 0x0000a000
1632 15:07:37.987444 RAMSTAGE 9. 0x76ba7000 0x00066000
1633 15:07:37.993356 REFCODE 10. 0x76b67000 0x00040000
1634 15:07:37.996930 SMM BACKUP 11. 0x76b57000 0x00010000
1635 15:07:38.000404 4f444749 12. 0x76b55000 0x00002000
1636 15:07:38.003559 EXT VBT13. 0x76b53000 0x00001c43
1637 15:07:38.006823 COREBOOT 14. 0x76b4b000 0x00008000
1638 15:07:38.010368 ACPI 15. 0x76b27000 0x00024000
1639 15:07:38.013777 ACPI GNVS 16. 0x76b26000 0x00001000
1640 15:07:38.016895 RAMOOPS 17. 0x76a26000 0x00100000
1641 15:07:38.019972 TPM2 TCGLOG18. 0x76a16000 0x00010000
1642 15:07:38.026879 SMBIOS 19. 0x76a15000 0x00000800
1643 15:07:38.027412 IMD small region:
1644 15:07:38.030380 IMD ROOT 0. 0x76ffec00 0x00000400
1645 15:07:38.033831 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1646 15:07:38.040055 VPD 2. 0x76ffeb60 0x0000006c
1647 15:07:38.043170 POWER STATE 3. 0x76ffeb20 0x00000040
1648 15:07:38.046710 ROMSTAGE 4. 0x76ffeb00 0x00000004
1649 15:07:38.050296 MEM INFO 5. 0x76ffe920 0x000001e0
1650 15:07:38.056660 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1651 15:07:38.059889 MTRR: Physical address space:
1652 15:07:38.066546 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1653 15:07:38.073036 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1654 15:07:38.076610 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1655 15:07:38.083574 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1656 15:07:38.090330 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1657 15:07:38.096496 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1658 15:07:38.102979 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1659 15:07:38.106269 MTRR: Fixed MSR 0x250 0x0606060606060606
1660 15:07:38.109923 MTRR: Fixed MSR 0x258 0x0606060606060606
1661 15:07:38.116276 MTRR: Fixed MSR 0x259 0x0000000000000000
1662 15:07:38.120223 MTRR: Fixed MSR 0x268 0x0606060606060606
1663 15:07:38.123055 MTRR: Fixed MSR 0x269 0x0606060606060606
1664 15:07:38.126547 MTRR: Fixed MSR 0x26a 0x0606060606060606
1665 15:07:38.133263 MTRR: Fixed MSR 0x26b 0x0606060606060606
1666 15:07:38.136210 MTRR: Fixed MSR 0x26c 0x0606060606060606
1667 15:07:38.139283 MTRR: Fixed MSR 0x26d 0x0606060606060606
1668 15:07:38.142810 MTRR: Fixed MSR 0x26e 0x0606060606060606
1669 15:07:38.149134 MTRR: Fixed MSR 0x26f 0x0606060606060606
1670 15:07:38.153119 call enable_fixed_mtrr()
1671 15:07:38.156168 CPU physical address size: 39 bits
1672 15:07:38.160526 MTRR: default type WB/UC MTRR counts: 6/5.
1673 15:07:38.162481 MTRR: UC selected as default type.
1674 15:07:38.169233 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1675 15:07:38.175533 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1676 15:07:38.182766 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1677 15:07:38.185941 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1678 15:07:38.192402 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1679 15:07:38.195863
1680 15:07:38.196442 MTRR check
1681 15:07:38.199257 Fixed MTRRs : Enabled
1682 15:07:38.199907 Variable MTRRs: Enabled
1683 15:07:38.200438
1684 15:07:38.205945 MTRR: Fixed MSR 0x250 0x0606060606060606
1685 15:07:38.209553 MTRR: Fixed MSR 0x258 0x0606060606060606
1686 15:07:38.213004 MTRR: Fixed MSR 0x259 0x0000000000000000
1687 15:07:38.215571 MTRR: Fixed MSR 0x268 0x0606060606060606
1688 15:07:38.222071 MTRR: Fixed MSR 0x269 0x0606060606060606
1689 15:07:38.225908 MTRR: Fixed MSR 0x26a 0x0606060606060606
1690 15:07:38.229025 MTRR: Fixed MSR 0x26b 0x0606060606060606
1691 15:07:38.232107 MTRR: Fixed MSR 0x26c 0x0606060606060606
1692 15:07:38.238806 MTRR: Fixed MSR 0x26d 0x0606060606060606
1693 15:07:38.242558 MTRR: Fixed MSR 0x26e 0x0606060606060606
1694 15:07:38.245337 MTRR: Fixed MSR 0x26f 0x0606060606060606
1695 15:07:38.252337 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1696 15:07:38.255041 call enable_fixed_mtrr()
1697 15:07:38.259753 Checking cr50 for pending updates
1698 15:07:38.260344 CPU physical address size: 39 bits
1699 15:07:38.264335 Reading cr50 TPM mode
1700 15:07:38.274362 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1701 15:07:38.282306 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1702 15:07:38.285119 Checking segment from ROM address 0xfff9d5b8
1703 15:07:38.291727 Checking segment from ROM address 0xfff9d5d4
1704 15:07:38.294976 Loading segment from ROM address 0xfff9d5b8
1705 15:07:38.298124 code (compression=0)
1706 15:07:38.304836 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1707 15:07:38.315151 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1708 15:07:38.318026 it's not compressed!
1709 15:07:38.443572 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1710 15:07:38.450121 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1711 15:07:38.457368 Loading segment from ROM address 0xfff9d5d4
1712 15:07:38.460687 Entry Point 0x30000000
1713 15:07:38.461148 Loaded segments
1714 15:07:38.466979 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1715 15:07:38.483446 Finalizing chipset.
1716 15:07:38.486506 Finalizing SMM.
1717 15:07:38.486929 APMC done.
1718 15:07:38.493472 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1719 15:07:38.497042 mp_park_aps done after 0 msecs.
1720 15:07:38.500231 Jumping to boot code at 0x30000000(0x76b4b000)
1721 15:07:38.510015 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1722 15:07:38.510764
1723 15:07:38.511324
1724 15:07:38.511857
1725 15:07:38.513148 Starting depthcharge on Magolor...
1726 15:07:38.513571
1727 15:07:38.514617 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 15:07:38.515157 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1729 15:07:38.515621 Setting prompt string to ['dedede:']
1730 15:07:38.516015 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1731 15:07:38.523567 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1732 15:07:38.524001
1733 15:07:38.530702 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1734 15:07:38.531145
1735 15:07:38.533063 fw_config match found: AUDIO_AMP=UNPROVISIONED
1736 15:07:38.533488
1737 15:07:38.536334 Wipe memory regions:
1738 15:07:38.536904
1739 15:07:38.539389 [0x00000000001000, 0x000000000a0000)
1740 15:07:38.539770
1741 15:07:38.543341 [0x00000000100000, 0x00000030000000)
1742 15:07:38.672209
1743 15:07:38.675261 [0x00000031062170, 0x00000076a15000)
1744 15:07:38.844444
1745 15:07:38.847572 [0x00000100000000, 0x00000180400000)
1746 15:07:39.909725
1747 15:07:39.909936 R8152: Initializing
1748 15:07:39.910050
1749 15:07:39.912798 Version 9 (ocp_data = 6010)
1750 15:07:39.912916
1751 15:07:39.915798 R8152: Done initializing
1752 15:07:39.915914
1753 15:07:39.919191 Adding net device
1754 15:07:39.919310
1755 15:07:39.922353 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1756 15:07:39.922484
1757 15:07:39.925352
1758 15:07:39.925464
1759 15:07:39.925797 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 15:07:40.026252 dedede: tftpboot 192.168.201.1 10660918/tftp-deploy-2_4k_u8d/kernel/bzImage 10660918/tftp-deploy-2_4k_u8d/kernel/cmdline 10660918/tftp-deploy-2_4k_u8d/ramdisk/ramdisk.cpio.gz
1762 15:07:40.026436 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1763 15:07:40.026548 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1764 15:07:40.031003 tftpboot 192.168.201.1 10660918/tftp-deploy-2_4k_u8d/kernel/bzImploy-2_4k_u8d/kernel/cmdline 10660918/tftp-deploy-2_4k_u8d/ramdisk/ramdisk.cpio.gz
1765 15:07:40.031090
1766 15:07:40.031156 Waiting for link
1767 15:07:40.232680
1768 15:07:40.232861 done.
1769 15:07:40.232929
1770 15:07:40.233018 MAC: 00:e0:4c:75:0d:b4
1771 15:07:40.233105
1772 15:07:40.236181 Sending DHCP discover... done.
1773 15:07:40.236282
1774 15:07:40.239614 Waiting for reply... done.
1775 15:07:40.239712
1776 15:07:40.242975 Sending DHCP request... done.
1777 15:07:40.243060
1778 15:07:40.246376 Waiting for reply... done.
1779 15:07:40.246473
1780 15:07:40.249824 My ip is 192.168.201.20
1781 15:07:40.249920
1782 15:07:40.252647 The DHCP server ip is 192.168.201.1
1783 15:07:40.252729
1784 15:07:40.259012 TFTP server IP predefined by user: 192.168.201.1
1785 15:07:40.259121
1786 15:07:40.266274 Bootfile predefined by user: 10660918/tftp-deploy-2_4k_u8d/kernel/bzImage
1787 15:07:40.266376
1788 15:07:40.269517 Sending tftp read request... done.
1789 15:07:40.269601
1790 15:07:40.272961 Waiting for the transfer...
1791 15:07:40.273113
1792 15:07:40.567246 00000000 ################################################################
1793 15:07:40.567445
1794 15:07:40.857080 00080000 ################################################################
1795 15:07:40.857226
1796 15:07:41.130928 00100000 ################################################################
1797 15:07:41.131059
1798 15:07:41.415774 00180000 ################################################################
1799 15:07:41.415930
1800 15:07:41.699767 00200000 ################################################################
1801 15:07:41.699915
1802 15:07:41.965352 00280000 ################################################################
1803 15:07:41.965505
1804 15:07:42.222214 00300000 ################################################################
1805 15:07:42.222397
1806 15:07:42.484280 00380000 ################################################################
1807 15:07:42.484420
1808 15:07:42.756931 00400000 ################################################################
1809 15:07:42.757067
1810 15:07:43.018133 00480000 ################################################################
1811 15:07:43.018273
1812 15:07:43.292816 00500000 ################################################################
1813 15:07:43.292946
1814 15:07:43.595445 00580000 ################################################################
1815 15:07:43.595583
1816 15:07:43.885672 00600000 ################################################################
1817 15:07:43.885836
1818 15:07:44.180801 00680000 ################################################################
1819 15:07:44.180964
1820 15:07:44.472115 00700000 ################################################################
1821 15:07:44.472247
1822 15:07:44.752177 00780000 ################################################################
1823 15:07:44.752309
1824 15:07:45.026207 00800000 ################################################################
1825 15:07:45.026340
1826 15:07:45.293582 00880000 ################################################################
1827 15:07:45.293715
1828 15:07:45.563692 00900000 ################################################################
1829 15:07:45.563829
1830 15:07:45.855839 00980000 ################################################################
1831 15:07:45.855975
1832 15:07:46.051936 00a00000 ############################################## done.
1833 15:07:46.052071
1834 15:07:46.055009 The bootfile was 10858496 bytes long.
1835 15:07:46.058466
1836 15:07:46.062177 Sending tftp read request... done.
1837 15:07:46.062263
1838 15:07:46.062348 Waiting for the transfer...
1839 15:07:46.062428
1840 15:07:46.350638 00000000 ################################################################
1841 15:07:46.350800
1842 15:07:46.629672 00080000 ################################################################
1843 15:07:46.629852
1844 15:07:46.897333 00100000 ################################################################
1845 15:07:46.897494
1846 15:07:47.161661 00180000 ################################################################
1847 15:07:47.161815
1848 15:07:47.423957 00200000 ################################################################
1849 15:07:47.424115
1850 15:07:47.708534 00280000 ################################################################
1851 15:07:47.708665
1852 15:07:47.970877 00300000 ################################################################
1853 15:07:47.971036
1854 15:07:48.263519 00380000 ################################################################
1855 15:07:48.263647
1856 15:07:48.561388 00400000 ################################################################
1857 15:07:48.561525
1858 15:07:48.852042 00480000 ################################################################
1859 15:07:48.852187
1860 15:07:49.147939 00500000 ################################################################
1861 15:07:49.148076
1862 15:07:49.431514 00580000 ################################################################
1863 15:07:49.431663
1864 15:07:49.734256 00600000 ################################################################
1865 15:07:49.734438
1866 15:07:50.027107 00680000 ################################################################
1867 15:07:50.027252
1868 15:07:50.325772 00700000 ################################################################
1869 15:07:50.325939
1870 15:07:50.621152 00780000 ################################################################
1871 15:07:50.621346
1872 15:07:50.921650 00800000 ################################################################
1873 15:07:50.921799
1874 15:07:51.090119 00880000 ##################################### done.
1875 15:07:51.090278
1876 15:07:51.093471 Sending tftp read request... done.
1877 15:07:51.093574
1878 15:07:51.096906 Waiting for the transfer...
1879 15:07:51.096981
1880 15:07:51.100025 00000000 # done.
1881 15:07:51.100106
1882 15:07:51.107059 Command line loaded dynamically from TFTP file: 10660918/tftp-deploy-2_4k_u8d/kernel/cmdline
1883 15:07:51.107164
1884 15:07:51.120098 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1885 15:07:51.123064
1886 15:07:51.126115 ec_init: CrosEC protocol v3 supported (256, 256)
1887 15:07:51.134720
1888 15:07:51.138268 Shutting down all USB controllers.
1889 15:07:51.138369
1890 15:07:51.138462 Removing current net device
1891 15:07:51.138549
1892 15:07:51.141404 Finalizing coreboot
1893 15:07:51.141503
1894 15:07:51.147928 Exiting depthcharge with code 4 at timestamp: 19437993
1895 15:07:51.148007
1896 15:07:51.148071
1897 15:07:51.148130 Starting kernel ...
1898 15:07:51.148187
1899 15:07:51.148242
1900 15:07:51.148615 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
1901 15:07:51.148708 start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
1902 15:07:51.148782 Setting prompt string to ['Linux version [0-9]']
1903 15:07:51.148853 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1904 15:07:51.148920 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1906 15:12:25.148936 end: 2.2.5 auto-login-action (duration 00:04:34) [common]
1908 15:12:25.149158 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
1910 15:12:25.149327 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1913 15:12:25.149605 end: 2 depthcharge-action (duration 00:05:00) [common]
1915 15:12:25.149829 Cleaning after the job
1916 15:12:25.149919 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660918/tftp-deploy-2_4k_u8d/ramdisk
1917 15:12:25.151125 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660918/tftp-deploy-2_4k_u8d/kernel
1918 15:12:25.152546 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660918/tftp-deploy-2_4k_u8d/modules
1919 15:12:25.153162 start: 5.1 power-off (timeout 00:00:30) [common]
1920 15:12:25.153451 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=off'
1921 15:12:25.222791 >> Command sent successfully.
1922 15:12:25.225383 Returned 0 in 0 seconds
1923 15:12:25.325818 end: 5.1 power-off (duration 00:00:00) [common]
1925 15:12:25.326141 start: 5.2 read-feedback (timeout 00:10:00) [common]
1926 15:12:25.326395 Listened to connection for namespace 'common' for up to 1s
1928 15:12:25.326764 Listened to connection for namespace 'common' for up to 1s
1929 15:12:26.327327 Finalising connection for namespace 'common'
1930 15:12:26.327563 Disconnecting from shell: Finalise
1931 15:12:26.327640
1932 15:12:26.427963 end: 5.2 read-feedback (duration 00:00:01) [common]
1933 15:12:26.428108 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10660918
1934 15:12:26.442419 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10660918
1935 15:12:26.442576 JobError: Your job cannot terminate cleanly.