Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 15:07:16.621508 lava-dispatcher, installed at version: 2023.05.1
2 15:07:16.621761 start: 0 validate
3 15:07:16.621933 Start time: 2023-06-09 15:07:16.621925+00:00 (UTC)
4 15:07:16.622082 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:07:16.622234 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 15:07:16.889967 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:07:16.890165 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.284-cip99%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:07:20.890789 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:07:20.890993 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.284-cip99%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:07:21.393600 validate duration: 4.77
12 15:07:21.393931 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:07:21.394064 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:07:21.394166 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:07:21.394316 Not decompressing ramdisk as can be used compressed.
16 15:07:21.394411 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 15:07:21.394503 saving as /var/lib/lava/dispatcher/tmp/10660926/tftp-deploy-za4m9o1w/ramdisk/rootfs.cpio.gz
18 15:07:21.394575 total size: 8430069 (8MB)
19 15:07:21.395748 progress 0% (0MB)
20 15:07:21.398405 progress 5% (0MB)
21 15:07:21.401034 progress 10% (0MB)
22 15:07:21.403656 progress 15% (1MB)
23 15:07:21.406299 progress 20% (1MB)
24 15:07:21.408931 progress 25% (2MB)
25 15:07:21.411557 progress 30% (2MB)
26 15:07:21.414194 progress 35% (2MB)
27 15:07:21.416643 progress 40% (3MB)
28 15:07:21.419254 progress 45% (3MB)
29 15:07:21.421820 progress 50% (4MB)
30 15:07:21.424430 progress 55% (4MB)
31 15:07:21.427017 progress 60% (4MB)
32 15:07:21.429608 progress 65% (5MB)
33 15:07:21.432166 progress 70% (5MB)
34 15:07:21.434548 progress 75% (6MB)
35 15:07:21.437120 progress 80% (6MB)
36 15:07:21.439688 progress 85% (6MB)
37 15:07:21.442248 progress 90% (7MB)
38 15:07:21.444816 progress 95% (7MB)
39 15:07:21.447391 progress 100% (8MB)
40 15:07:21.447558 8MB downloaded in 0.05s (151.75MB/s)
41 15:07:21.447730 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:07:21.448009 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:07:21.448120 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:07:21.448232 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:07:21.448404 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.284-cip99/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:07:21.448487 saving as /var/lib/lava/dispatcher/tmp/10660926/tftp-deploy-za4m9o1w/kernel/bzImage
48 15:07:21.448568 total size: 10858496 (10MB)
49 15:07:21.448636 No compression specified
50 15:07:21.449878 progress 0% (0MB)
51 15:07:21.453174 progress 5% (0MB)
52 15:07:21.456589 progress 10% (1MB)
53 15:07:21.459764 progress 15% (1MB)
54 15:07:21.463157 progress 20% (2MB)
55 15:07:21.466417 progress 25% (2MB)
56 15:07:21.469878 progress 30% (3MB)
57 15:07:21.473176 progress 35% (3MB)
58 15:07:21.476597 progress 40% (4MB)
59 15:07:21.479973 progress 45% (4MB)
60 15:07:21.483174 progress 50% (5MB)
61 15:07:21.486571 progress 55% (5MB)
62 15:07:21.489793 progress 60% (6MB)
63 15:07:21.493234 progress 65% (6MB)
64 15:07:21.496483 progress 70% (7MB)
65 15:07:21.499820 progress 75% (7MB)
66 15:07:21.503220 progress 80% (8MB)
67 15:07:21.506427 progress 85% (8MB)
68 15:07:21.509807 progress 90% (9MB)
69 15:07:21.513035 progress 95% (9MB)
70 15:07:21.516457 progress 100% (10MB)
71 15:07:21.516660 10MB downloaded in 0.07s (152.09MB/s)
72 15:07:21.516836 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:07:21.517107 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:07:21.517211 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:07:21.517316 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:07:21.517473 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.284-cip99/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:07:21.517563 saving as /var/lib/lava/dispatcher/tmp/10660926/tftp-deploy-za4m9o1w/modules/modules.tar
79 15:07:21.517632 total size: 483884 (0MB)
80 15:07:21.517707 Using unxz to decompress xz
81 15:07:21.521827 progress 6% (0MB)
82 15:07:21.522306 progress 13% (0MB)
83 15:07:21.522589 progress 20% (0MB)
84 15:07:21.524097 progress 27% (0MB)
85 15:07:21.526388 progress 33% (0MB)
86 15:07:21.528473 progress 40% (0MB)
87 15:07:21.530980 progress 47% (0MB)
88 15:07:21.533365 progress 54% (0MB)
89 15:07:21.536025 progress 60% (0MB)
90 15:07:21.538228 progress 67% (0MB)
91 15:07:21.540677 progress 74% (0MB)
92 15:07:21.543384 progress 81% (0MB)
93 15:07:21.545578 progress 88% (0MB)
94 15:07:21.547806 progress 94% (0MB)
95 15:07:21.550941 progress 100% (0MB)
96 15:07:21.558949 0MB downloaded in 0.04s (11.17MB/s)
97 15:07:21.559296 end: 1.3.1 http-download (duration 00:00:00) [common]
99 15:07:21.559636 end: 1.3 download-retry (duration 00:00:00) [common]
100 15:07:21.559747 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 15:07:21.559856 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 15:07:21.559951 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 15:07:21.560048 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 15:07:21.560300 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r
105 15:07:21.560447 makedir: /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin
106 15:07:21.560586 makedir: /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/tests
107 15:07:21.560695 makedir: /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/results
108 15:07:21.560823 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-add-keys
109 15:07:21.560985 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-add-sources
110 15:07:21.561127 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-background-process-start
111 15:07:21.561272 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-background-process-stop
112 15:07:21.561407 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-common-functions
113 15:07:21.561542 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-echo-ipv4
114 15:07:21.561676 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-install-packages
115 15:07:21.561812 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-installed-packages
116 15:07:21.561948 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-os-build
117 15:07:21.562085 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-probe-channel
118 15:07:21.562224 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-probe-ip
119 15:07:21.562357 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-target-ip
120 15:07:21.562490 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-target-mac
121 15:07:21.562623 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-target-storage
122 15:07:21.562760 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-test-case
123 15:07:21.562894 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-test-event
124 15:07:21.563046 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-test-feedback
125 15:07:21.563188 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-test-raise
126 15:07:21.563328 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-test-reference
127 15:07:21.563462 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-test-runner
128 15:07:21.563595 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-test-set
129 15:07:21.563731 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-test-shell
130 15:07:21.563872 Updating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-install-packages (oe)
131 15:07:21.564037 Updating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/bin/lava-installed-packages (oe)
132 15:07:21.564177 Creating /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/environment
133 15:07:21.564306 LAVA metadata
134 15:07:21.564392 - LAVA_JOB_ID=10660926
135 15:07:21.564469 - LAVA_DISPATCHER_IP=192.168.201.1
136 15:07:21.564591 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 15:07:21.564697 skipped lava-vland-overlay
138 15:07:21.564823 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 15:07:21.564952 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 15:07:21.565053 skipped lava-multinode-overlay
141 15:07:21.565180 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 15:07:21.565278 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 15:07:21.565368 Loading test definitions
144 15:07:21.565473 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 15:07:21.565559 Using /lava-10660926 at stage 0
146 15:07:21.565940 uuid=10660926_1.4.2.3.1 testdef=None
147 15:07:21.566043 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 15:07:21.566146 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 15:07:21.566744 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 15:07:21.566996 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 15:07:21.567701 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 15:07:21.567962 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 15:07:21.568651 runner path: /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/0/tests/0_dmesg test_uuid 10660926_1.4.2.3.1
156 15:07:21.568830 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 15:07:21.569109 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 15:07:21.569191 Using /lava-10660926 at stage 1
160 15:07:21.569519 uuid=10660926_1.4.2.3.5 testdef=None
161 15:07:21.569618 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 15:07:21.569712 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 15:07:21.570255 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 15:07:21.570504 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 15:07:21.571225 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 15:07:21.571482 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 15:07:21.572187 runner path: /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/1/tests/1_bootrr test_uuid 10660926_1.4.2.3.5
170 15:07:21.572365 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 15:07:21.572596 Creating lava-test-runner.conf files
173 15:07:21.572667 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/0 for stage 0
174 15:07:21.572767 - 0_dmesg
175 15:07:21.572853 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10660926/lava-overlay-dy5k_87r/lava-10660926/1 for stage 1
176 15:07:21.572953 - 1_bootrr
177 15:07:21.573059 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 15:07:21.573157 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 15:07:21.583132 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 15:07:21.583292 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 15:07:21.583400 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 15:07:21.583501 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 15:07:21.583596 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 15:07:21.864445 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 15:07:21.865073 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 15:07:21.865328 extracting modules file /var/lib/lava/dispatcher/tmp/10660926/tftp-deploy-za4m9o1w/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10660926/extract-overlay-ramdisk-ew3cgowa/ramdisk
187 15:07:21.915910 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 15:07:21.916243 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 15:07:21.916469 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10660926/compress-overlay-93ft_jye/overlay-1.4.2.4.tar.gz to ramdisk
190 15:07:21.916648 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10660926/compress-overlay-93ft_jye/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10660926/extract-overlay-ramdisk-ew3cgowa/ramdisk
191 15:07:21.938710 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 15:07:21.939025 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 15:07:21.939235 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 15:07:21.939442 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 15:07:21.939638 Building ramdisk /var/lib/lava/dispatcher/tmp/10660926/extract-overlay-ramdisk-ew3cgowa/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10660926/extract-overlay-ramdisk-ew3cgowa/ramdisk
196 15:07:22.093626 >> 53979 blocks
197 15:07:23.099181 rename /var/lib/lava/dispatcher/tmp/10660926/extract-overlay-ramdisk-ew3cgowa/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10660926/tftp-deploy-za4m9o1w/ramdisk/ramdisk.cpio.gz
198 15:07:23.099640 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 15:07:23.099802 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 15:07:23.099914 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 15:07:23.100019 No mkimage arch provided, not using FIT.
202 15:07:23.100118 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 15:07:23.100212 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 15:07:23.100335 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 15:07:23.100439 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 15:07:23.100529 No LXC device requested
207 15:07:23.100617 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 15:07:23.100715 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 15:07:23.100804 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 15:07:23.100881 Checking files for TFTP limit of 4294967296 bytes.
211 15:07:23.101336 end: 1 tftp-deploy (duration 00:00:02) [common]
212 15:07:23.101453 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 15:07:23.101556 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 15:07:23.101687 substitutions:
215 15:07:23.101777 - {DTB}: None
216 15:07:23.101846 - {INITRD}: 10660926/tftp-deploy-za4m9o1w/ramdisk/ramdisk.cpio.gz
217 15:07:23.101911 - {KERNEL}: 10660926/tftp-deploy-za4m9o1w/kernel/bzImage
218 15:07:23.101975 - {LAVA_MAC}: None
219 15:07:23.102037 - {PRESEED_CONFIG}: None
220 15:07:23.102098 - {PRESEED_LOCAL}: None
221 15:07:23.102158 - {RAMDISK}: 10660926/tftp-deploy-za4m9o1w/ramdisk/ramdisk.cpio.gz
222 15:07:23.102219 - {ROOT_PART}: None
223 15:07:23.102279 - {ROOT}: None
224 15:07:23.102339 - {SERVER_IP}: 192.168.201.1
225 15:07:23.102398 - {TEE}: None
226 15:07:23.102457 Parsed boot commands:
227 15:07:23.102516 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 15:07:23.102700 Parsed boot commands: tftpboot 192.168.201.1 10660926/tftp-deploy-za4m9o1w/kernel/bzImage 10660926/tftp-deploy-za4m9o1w/kernel/cmdline 10660926/tftp-deploy-za4m9o1w/ramdisk/ramdisk.cpio.gz
229 15:07:23.102803 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 15:07:23.102909 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 15:07:23.103016 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 15:07:23.103115 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 15:07:23.103191 Not connected, no need to disconnect.
234 15:07:23.103276 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 15:07:23.103364 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 15:07:23.103436 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-4'
237 15:07:23.107180 Setting prompt string to ['lava-test: # ']
238 15:07:23.107570 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 15:07:23.107690 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 15:07:23.107833 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 15:07:23.107963 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 15:07:23.108175 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=reboot'
243 15:07:28.241291 >> Command sent successfully.
244 15:07:28.244009 Returned 0 in 5 seconds
245 15:07:28.344443 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 15:07:28.344802 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 15:07:28.344922 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 15:07:28.345028 Setting prompt string to 'Starting depthcharge on Voema...'
250 15:07:28.345121 Changing prompt to 'Starting depthcharge on Voema...'
251 15:07:28.345223 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 15:07:28.345520 [Enter `^Ec?' for help]
253 15:07:29.945104
254 15:07:29.945279
255 15:07:29.955101 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 15:07:29.958120 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
257 15:07:29.964679 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 15:07:29.967827 CPU: AES supported, TXT NOT supported, VT supported
259 15:07:29.974618 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 15:07:29.981258 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 15:07:29.984490 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 15:07:29.988099 VBOOT: Loading verstage.
263 15:07:29.994781 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 15:07:29.997736 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 15:07:30.001319 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 15:07:30.011936 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 15:07:30.018587 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 15:07:30.018685
269 15:07:30.018782
270 15:07:30.031612 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 15:07:30.045292 Probing TPM: . done!
272 15:07:30.048967 TPM ready after 0 ms
273 15:07:30.052555 Connected to device vid:did:rid of 1ae0:0028:00
274 15:07:30.063197 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
275 15:07:30.070087 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 15:07:30.073665 Initialized TPM device CR50 revision 0
277 15:07:30.123975 tlcl_send_startup: Startup return code is 0
278 15:07:30.124126 TPM: setup succeeded
279 15:07:30.139570 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 15:07:30.153050 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 15:07:30.166482 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 15:07:30.175852 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 15:07:30.179628 Chrome EC: UHEPI supported
284 15:07:30.183543 Phase 1
285 15:07:30.186436 FMAP: area GBB found @ 1805000 (458752 bytes)
286 15:07:30.196488 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 15:07:30.202690 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 15:07:30.209407 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 15:07:30.216018 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 15:07:30.219572 Recovery requested (1009000e)
291 15:07:30.223128 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 15:07:30.234226 tlcl_extend: response is 0
293 15:07:30.240800 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 15:07:30.251289 tlcl_extend: response is 0
295 15:07:30.257962 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 15:07:30.264199 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 15:07:30.270799 BS: verstage times (exec / console): total (unknown) / 142 ms
298 15:07:30.270892
299 15:07:30.270965
300 15:07:30.284515 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 15:07:30.291103 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 15:07:30.294067 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 15:07:30.297477 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 15:07:30.304095 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 15:07:30.307271 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 15:07:30.310916 gpe0_sts[3]: 00080000 gpe0_en[3]: 00092000
307 15:07:30.314082 TCO_STS: 0000 0000
308 15:07:30.317579 GEN_PMCON: d0015038 00002200
309 15:07:30.320914 GBLRST_CAUSE: 00000000 00000000
310 15:07:30.321037 HPR_CAUSE0: 00000000
311 15:07:30.324489 prev_sleep_state 5
312 15:07:30.327367 Boot Count incremented to 26211
313 15:07:30.333950 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 15:07:30.340577 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 15:07:30.347410 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 15:07:30.353989 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 15:07:30.358719 Chrome EC: UHEPI supported
318 15:07:30.365071 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 15:07:30.377837 Probing TPM: done!
320 15:07:30.386033 Connected to device vid:did:rid of 1ae0:0028:00
321 15:07:30.395560 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
322 15:07:30.403200 Initialized TPM device CR50 revision 0
323 15:07:30.412823 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 15:07:30.419725 MRC: Hash idx 0x100b comparison successful.
325 15:07:30.422887 MRC cache found, size faa8
326 15:07:30.423021 bootmode is set to: 2
327 15:07:30.426323 SPD index = 0
328 15:07:30.432752 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 15:07:30.435954 SPD: module type is LPDDR4X
330 15:07:30.439614 SPD: module part number is MT53E512M64D4NW-046
331 15:07:30.446288 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
332 15:07:30.449261 SPD: device width 16 bits, bus width 16 bits
333 15:07:30.455655 SPD: module size is 1024 MB (per channel)
334 15:07:30.891781 CBMEM:
335 15:07:30.894860 IMD: root @ 0x76fff000 254 entries.
336 15:07:30.898233 IMD: root @ 0x76ffec00 62 entries.
337 15:07:30.901573 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 15:07:30.908168 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 15:07:30.912019 External stage cache:
340 15:07:30.914921 IMD: root @ 0x7b3ff000 254 entries.
341 15:07:30.917958 IMD: root @ 0x7b3fec00 62 entries.
342 15:07:30.933440 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 15:07:30.939914 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 15:07:30.946961 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 15:07:30.961208 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 15:07:30.964878 cse_lite: Skip switching to RW in the recovery path
347 15:07:30.968351 8 DIMMs found
348 15:07:30.968449 SMM Memory Map
349 15:07:30.971465 SMRAM : 0x7b000000 0x800000
350 15:07:30.974594 Subregion 0: 0x7b000000 0x200000
351 15:07:30.978349 Subregion 1: 0x7b200000 0x200000
352 15:07:30.982089 Subregion 2: 0x7b400000 0x400000
353 15:07:30.984791 top_of_ram = 0x77000000
354 15:07:30.991351 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 15:07:30.994916 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 15:07:31.001289 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 15:07:31.004592 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 15:07:31.014683 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 15:07:31.021407 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 15:07:31.031640 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 15:07:31.034488 Processing 211 relocs. Offset value of 0x74c0b000
362 15:07:31.043847 BS: romstage times (exec / console): total (unknown) / 277 ms
363 15:07:31.049496
364 15:07:31.049590
365 15:07:31.059397 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 15:07:31.063185 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 15:07:31.072924 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 15:07:31.079689 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 15:07:31.085915 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 15:07:31.092816 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 15:07:31.139770 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 15:07:31.146513 Processing 5008 relocs. Offset value of 0x75d98000
373 15:07:31.149526 BS: postcar times (exec / console): total (unknown) / 59 ms
374 15:07:31.153293
375 15:07:31.153387
376 15:07:31.163163 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 15:07:31.163261 Normal boot
378 15:07:31.167280 FW_CONFIG value is 0x804c02
379 15:07:31.169692 PCI: 00:07.0 disabled by fw_config
380 15:07:31.173414 PCI: 00:07.1 disabled by fw_config
381 15:07:31.176244 PCI: 00:0d.2 disabled by fw_config
382 15:07:31.179798 PCI: 00:1c.7 disabled by fw_config
383 15:07:31.186980 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 15:07:31.193088 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 15:07:31.196060 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 15:07:31.199570 GENERIC: 0.0 disabled by fw_config
387 15:07:31.203362 GENERIC: 1.0 disabled by fw_config
388 15:07:31.209469 fw_config match found: DB_USB=USB3_ACTIVE
389 15:07:31.212870 fw_config match found: DB_USB=USB3_ACTIVE
390 15:07:31.216539 fw_config match found: DB_USB=USB3_ACTIVE
391 15:07:31.222833 fw_config match found: DB_USB=USB3_ACTIVE
392 15:07:31.226042 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 15:07:31.232775 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 15:07:31.242792 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 15:07:31.249901 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 15:07:31.252880 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 15:07:31.259197 microcode: Update skipped, already up-to-date
398 15:07:31.266023 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 15:07:31.293497 Detected 4 core, 8 thread CPU.
400 15:07:31.296540 Setting up SMI for CPU
401 15:07:31.300197 IED base = 0x7b400000
402 15:07:31.300320 IED size = 0x00400000
403 15:07:31.303160 Will perform SMM setup.
404 15:07:31.309997 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
405 15:07:31.316253 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 15:07:31.323375 Processing 16 relocs. Offset value of 0x00030000
407 15:07:31.326189 Attempting to start 7 APs
408 15:07:31.329948 Waiting for 10ms after sending INIT.
409 15:07:31.345183 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 15:07:31.345280 done.
411 15:07:31.348521 AP: slot 6 apic_id 2.
412 15:07:31.352199 AP: slot 2 apic_id 3.
413 15:07:31.352333 AP: slot 3 apic_id 5.
414 15:07:31.355212 AP: slot 7 apic_id 4.
415 15:07:31.358487 Waiting for 2nd SIPI to complete...done.
416 15:07:31.362308 AP: slot 5 apic_id 6.
417 15:07:31.365183 AP: slot 4 apic_id 7.
418 15:07:31.372090 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 15:07:31.378480 Processing 13 relocs. Offset value of 0x00038000
420 15:07:31.378602 Unable to locate Global NVS
421 15:07:31.389017 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 15:07:31.392150 Installing permanent SMM handler to 0x7b000000
423 15:07:31.401490 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 15:07:31.404937 Processing 794 relocs. Offset value of 0x7b010000
425 15:07:31.415339 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 15:07:31.418541 Processing 13 relocs. Offset value of 0x7b008000
427 15:07:31.425017 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 15:07:31.431630 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 15:07:31.435202 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 15:07:31.441534 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 15:07:31.448364 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 15:07:31.454909 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 15:07:31.461365 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 15:07:31.461491 Unable to locate Global NVS
435 15:07:31.471440 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 15:07:31.474524 Clearing SMI status registers
437 15:07:31.478392 SMI_STS: GPE0 PM1
438 15:07:31.478484 PM1_STS: PWRBTN
439 15:07:31.481320 GPE0 STD STS:
440 15:07:31.488148 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
441 15:07:31.491489 In relocation handler: CPU 0
442 15:07:31.494604 New SMBASE=0x7b000000 IEDBASE=0x7b400000
443 15:07:31.498286 Writing SMRR. base = 0x7b000006, mask=0xff800c00
444 15:07:31.501053 Relocation complete.
445 15:07:31.507643 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
446 15:07:31.511387 In relocation handler: CPU 1
447 15:07:31.514467 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
448 15:07:31.518271 Relocation complete.
449 15:07:31.524316 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
450 15:07:31.527906 In relocation handler: CPU 7
451 15:07:31.531037 New SMBASE=0x7affe400 IEDBASE=0x7b400000
452 15:07:31.537883 Writing SMRR. base = 0x7b000006, mask=0xff800c00
453 15:07:31.537997 Relocation complete.
454 15:07:31.547905 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
455 15:07:31.551259 In relocation handler: CPU 3
456 15:07:31.554357 New SMBASE=0x7afff400 IEDBASE=0x7b400000
457 15:07:31.554471 Relocation complete.
458 15:07:31.564552 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
459 15:07:31.564670 In relocation handler: CPU 4
460 15:07:31.571325 New SMBASE=0x7afff000 IEDBASE=0x7b400000
461 15:07:31.571440 Relocation complete.
462 15:07:31.581193 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
463 15:07:31.581327 In relocation handler: CPU 5
464 15:07:31.587598 New SMBASE=0x7affec00 IEDBASE=0x7b400000
465 15:07:31.590732 Writing SMRR. base = 0x7b000006, mask=0xff800c00
466 15:07:31.594315 Relocation complete.
467 15:07:31.600636 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
468 15:07:31.604677 In relocation handler: CPU 6
469 15:07:31.607553 New SMBASE=0x7affe800 IEDBASE=0x7b400000
470 15:07:31.613937 Writing SMRR. base = 0x7b000006, mask=0xff800c00
471 15:07:31.614033 Relocation complete.
472 15:07:31.620697 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
473 15:07:31.624267 In relocation handler: CPU 2
474 15:07:31.628022 New SMBASE=0x7afff800 IEDBASE=0x7b400000
475 15:07:31.632008 Relocation complete.
476 15:07:31.632131 Initializing CPU #0
477 15:07:31.635565 CPU: vendor Intel device 806c1
478 15:07:31.641768 CPU: family 06, model 8c, stepping 01
479 15:07:31.641863 Clearing out pending MCEs
480 15:07:31.645420 Setting up local APIC...
481 15:07:31.649004 apic_id: 0x00 done.
482 15:07:31.651764 Turbo is available but hidden
483 15:07:31.655404 Turbo is available and visible
484 15:07:31.659006 microcode: Update skipped, already up-to-date
485 15:07:31.661924 CPU #0 initialized
486 15:07:31.662018 Initializing CPU #6
487 15:07:31.665412 Initializing CPU #4
488 15:07:31.668546 Initializing CPU #5
489 15:07:31.671625 CPU: vendor Intel device 806c1
490 15:07:31.675527 CPU: family 06, model 8c, stepping 01
491 15:07:31.678596 CPU: vendor Intel device 806c1
492 15:07:31.681675 CPU: family 06, model 8c, stepping 01
493 15:07:31.685126 Clearing out pending MCEs
494 15:07:31.685220 Clearing out pending MCEs
495 15:07:31.688163 Setting up local APIC...
496 15:07:31.691943 Initializing CPU #1
497 15:07:31.695169 CPU: vendor Intel device 806c1
498 15:07:31.698849 CPU: family 06, model 8c, stepping 01
499 15:07:31.698943 Initializing CPU #7
500 15:07:31.701758 Initializing CPU #3
501 15:07:31.704807 CPU: vendor Intel device 806c1
502 15:07:31.708019 CPU: family 06, model 8c, stepping 01
503 15:07:31.711650 CPU: vendor Intel device 806c1
504 15:07:31.714809 CPU: family 06, model 8c, stepping 01
505 15:07:31.718184 Initializing CPU #2
506 15:07:31.721375 Clearing out pending MCEs
507 15:07:31.724883 CPU: vendor Intel device 806c1
508 15:07:31.728137 CPU: family 06, model 8c, stepping 01
509 15:07:31.731647 Setting up local APIC...
510 15:07:31.731758 apic_id: 0x07 done.
511 15:07:31.735056 Setting up local APIC...
512 15:07:31.738212 Clearing out pending MCEs
513 15:07:31.741753 Clearing out pending MCEs
514 15:07:31.741842 Setting up local APIC...
515 15:07:31.744793 CPU: vendor Intel device 806c1
516 15:07:31.747950 CPU: family 06, model 8c, stepping 01
517 15:07:31.751648 Setting up local APIC...
518 15:07:31.755135 Clearing out pending MCEs
519 15:07:31.757986 apic_id: 0x02 done.
520 15:07:31.758070 Setting up local APIC...
521 15:07:31.761505 apic_id: 0x04 done.
522 15:07:31.765131 apic_id: 0x05 done.
523 15:07:31.768147 microcode: Update skipped, already up-to-date
524 15:07:31.771599 microcode: Update skipped, already up-to-date
525 15:07:31.774870 CPU #7 initialized
526 15:07:31.778452 CPU #3 initialized
527 15:07:31.781412 microcode: Update skipped, already up-to-date
528 15:07:31.785187 apic_id: 0x06 done.
529 15:07:31.785280 CPU #4 initialized
530 15:07:31.791323 microcode: Update skipped, already up-to-date
531 15:07:31.794930 microcode: Update skipped, already up-to-date
532 15:07:31.798029 apic_id: 0x03 done.
533 15:07:31.798123 CPU #6 initialized
534 15:07:31.804763 microcode: Update skipped, already up-to-date
535 15:07:31.804857 CPU #5 initialized
536 15:07:31.807807 CPU #2 initialized
537 15:07:31.811504 Clearing out pending MCEs
538 15:07:31.811596 Setting up local APIC...
539 15:07:31.814741 apic_id: 0x01 done.
540 15:07:31.818049 microcode: Update skipped, already up-to-date
541 15:07:31.821024 CPU #1 initialized
542 15:07:31.824489 bsp_do_flight_plan done after 461 msecs.
543 15:07:31.827769 CPU: frequency set to 4000 MHz
544 15:07:31.831262 Enabling SMIs.
545 15:07:31.838146 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 319 ms
546 15:07:31.852604 SATAXPCIE1 indicates PCIe NVMe is present
547 15:07:31.856323 Probing TPM: done!
548 15:07:31.859760 Connected to device vid:did:rid of 1ae0:0028:00
549 15:07:31.870212 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
550 15:07:31.873152 Initialized TPM device CR50 revision 0
551 15:07:31.876670 Enabling S0i3.4
552 15:07:31.883447 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
553 15:07:31.886523 Found a VBT of 8704 bytes after decompression
554 15:07:31.893437 cse_lite: CSE RO boot. HybridStorageMode disabled
555 15:07:31.899420 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
556 15:07:31.974770 FSPS returned 0
557 15:07:31.978254 Executing Phase 1 of FspMultiPhaseSiInit
558 15:07:31.988026 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
559 15:07:31.991688 port C0 DISC req: usage 1 usb3 1 usb2 5
560 15:07:31.994882 Raw Buffer output 0 00000511
561 15:07:31.997885 Raw Buffer output 1 00000000
562 15:07:32.002196 pmc_send_ipc_cmd succeeded
563 15:07:32.008397 port C1 DISC req: usage 1 usb3 2 usb2 3
564 15:07:32.008525 Raw Buffer output 0 00000321
565 15:07:32.011886 Raw Buffer output 1 00000000
566 15:07:32.016329 pmc_send_ipc_cmd succeeded
567 15:07:32.021387 Detected 4 core, 8 thread CPU.
568 15:07:32.024483 Detected 4 core, 8 thread CPU.
569 15:07:32.258251 Display FSP Version Info HOB
570 15:07:32.262002 Reference Code - CPU = a.0.4c.31
571 15:07:32.264911 uCode Version = 0.0.0.86
572 15:07:32.268474 TXT ACM version = ff.ff.ff.ffff
573 15:07:32.271864 Reference Code - ME = a.0.4c.31
574 15:07:32.274891 MEBx version = 0.0.0.0
575 15:07:32.278237 ME Firmware Version = Consumer SKU
576 15:07:32.281956 Reference Code - PCH = a.0.4c.31
577 15:07:32.285012 PCH-CRID Status = Disabled
578 15:07:32.288163 PCH-CRID Original Value = ff.ff.ff.ffff
579 15:07:32.291375 PCH-CRID New Value = ff.ff.ff.ffff
580 15:07:32.295065 OPROM - RST - RAID = ff.ff.ff.ffff
581 15:07:32.298284 PCH Hsio Version = 4.0.0.0
582 15:07:32.301610 Reference Code - SA - System Agent = a.0.4c.31
583 15:07:32.304563 Reference Code - MRC = 2.0.0.1
584 15:07:32.307946 SA - PCIe Version = a.0.4c.31
585 15:07:32.311526 SA-CRID Status = Disabled
586 15:07:32.314992 SA-CRID Original Value = 0.0.0.1
587 15:07:32.318044 SA-CRID New Value = 0.0.0.1
588 15:07:32.321578 OPROM - VBIOS = ff.ff.ff.ffff
589 15:07:32.324608 IO Manageability Engine FW Version = 11.1.4.0
590 15:07:32.327973 PHY Build Version = 0.0.0.e0
591 15:07:32.331739 Thunderbolt(TM) FW Version = 0.0.0.0
592 15:07:32.337689 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
593 15:07:32.341398 ITSS IRQ Polarities Before:
594 15:07:32.341495 IPC0: 0xffffffff
595 15:07:32.344526 IPC1: 0xffffffff
596 15:07:32.344616 IPC2: 0xffffffff
597 15:07:32.348165 IPC3: 0xffffffff
598 15:07:32.351032 ITSS IRQ Polarities After:
599 15:07:32.351157 IPC0: 0xffffffff
600 15:07:32.354357 IPC1: 0xffffffff
601 15:07:32.354481 IPC2: 0xffffffff
602 15:07:32.358167 IPC3: 0xffffffff
603 15:07:32.361445 Found PCIe Root Port #9 at PCI: 00:1d.0.
604 15:07:32.374173 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
605 15:07:32.384399 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
606 15:07:32.397903 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
607 15:07:32.404455 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
608 15:07:32.407471 Enumerating buses...
609 15:07:32.410811 Show all devs... Before device enumeration.
610 15:07:32.413906 Root Device: enabled 1
611 15:07:32.414038 DOMAIN: 0000: enabled 1
612 15:07:32.417195 CPU_CLUSTER: 0: enabled 1
613 15:07:32.420670 PCI: 00:00.0: enabled 1
614 15:07:32.424144 PCI: 00:02.0: enabled 1
615 15:07:32.424274 PCI: 00:04.0: enabled 1
616 15:07:32.427531 PCI: 00:05.0: enabled 1
617 15:07:32.430575 PCI: 00:06.0: enabled 0
618 15:07:32.433794 PCI: 00:07.0: enabled 0
619 15:07:32.433884 PCI: 00:07.1: enabled 0
620 15:07:32.437624 PCI: 00:07.2: enabled 0
621 15:07:32.440649 PCI: 00:07.3: enabled 0
622 15:07:32.443928 PCI: 00:08.0: enabled 1
623 15:07:32.444045 PCI: 00:09.0: enabled 0
624 15:07:32.447589 PCI: 00:0a.0: enabled 0
625 15:07:32.450941 PCI: 00:0d.0: enabled 1
626 15:07:32.451042 PCI: 00:0d.1: enabled 0
627 15:07:32.454207 PCI: 00:0d.2: enabled 0
628 15:07:32.457460 PCI: 00:0d.3: enabled 0
629 15:07:32.461028 PCI: 00:0e.0: enabled 0
630 15:07:32.461112 PCI: 00:10.2: enabled 1
631 15:07:32.464226 PCI: 00:10.6: enabled 0
632 15:07:32.467406 PCI: 00:10.7: enabled 0
633 15:07:32.470576 PCI: 00:12.0: enabled 0
634 15:07:32.470690 PCI: 00:12.6: enabled 0
635 15:07:32.473815 PCI: 00:13.0: enabled 0
636 15:07:32.477461 PCI: 00:14.0: enabled 1
637 15:07:32.480391 PCI: 00:14.1: enabled 0
638 15:07:32.480522 PCI: 00:14.2: enabled 1
639 15:07:32.484180 PCI: 00:14.3: enabled 1
640 15:07:32.487040 PCI: 00:15.0: enabled 1
641 15:07:32.487162 PCI: 00:15.1: enabled 1
642 15:07:32.490786 PCI: 00:15.2: enabled 1
643 15:07:32.494132 PCI: 00:15.3: enabled 1
644 15:07:32.497190 PCI: 00:16.0: enabled 1
645 15:07:32.497318 PCI: 00:16.1: enabled 0
646 15:07:32.500300 PCI: 00:16.2: enabled 0
647 15:07:32.503492 PCI: 00:16.3: enabled 0
648 15:07:32.506974 PCI: 00:16.4: enabled 0
649 15:07:32.507100 PCI: 00:16.5: enabled 0
650 15:07:32.510262 PCI: 00:17.0: enabled 1
651 15:07:32.513742 PCI: 00:19.0: enabled 0
652 15:07:32.517176 PCI: 00:19.1: enabled 1
653 15:07:32.517310 PCI: 00:19.2: enabled 0
654 15:07:32.520782 PCI: 00:1c.0: enabled 1
655 15:07:32.523843 PCI: 00:1c.1: enabled 0
656 15:07:32.526790 PCI: 00:1c.2: enabled 0
657 15:07:32.526916 PCI: 00:1c.3: enabled 0
658 15:07:32.530275 PCI: 00:1c.4: enabled 0
659 15:07:32.533840 PCI: 00:1c.5: enabled 0
660 15:07:32.533960 PCI: 00:1c.6: enabled 1
661 15:07:32.537376 PCI: 00:1c.7: enabled 0
662 15:07:32.540102 PCI: 00:1d.0: enabled 1
663 15:07:32.544116 PCI: 00:1d.1: enabled 0
664 15:07:32.544232 PCI: 00:1d.2: enabled 1
665 15:07:32.546967 PCI: 00:1d.3: enabled 0
666 15:07:32.550606 PCI: 00:1e.0: enabled 1
667 15:07:32.553755 PCI: 00:1e.1: enabled 0
668 15:07:32.553849 PCI: 00:1e.2: enabled 1
669 15:07:32.556784 PCI: 00:1e.3: enabled 1
670 15:07:32.560396 PCI: 00:1f.0: enabled 1
671 15:07:32.564158 PCI: 00:1f.1: enabled 0
672 15:07:32.564288 PCI: 00:1f.2: enabled 1
673 15:07:32.567050 PCI: 00:1f.3: enabled 1
674 15:07:32.570266 PCI: 00:1f.4: enabled 0
675 15:07:32.570360 PCI: 00:1f.5: enabled 1
676 15:07:32.573707 PCI: 00:1f.6: enabled 0
677 15:07:32.577178 PCI: 00:1f.7: enabled 0
678 15:07:32.580155 APIC: 00: enabled 1
679 15:07:32.580292 GENERIC: 0.0: enabled 1
680 15:07:32.583460 GENERIC: 0.0: enabled 1
681 15:07:32.587027 GENERIC: 1.0: enabled 1
682 15:07:32.590093 GENERIC: 0.0: enabled 1
683 15:07:32.590228 GENERIC: 1.0: enabled 1
684 15:07:32.593420 USB0 port 0: enabled 1
685 15:07:32.596731 GENERIC: 0.0: enabled 1
686 15:07:32.596827 USB0 port 0: enabled 1
687 15:07:32.600258 GENERIC: 0.0: enabled 1
688 15:07:32.603828 I2C: 00:1a: enabled 1
689 15:07:32.603952 I2C: 00:31: enabled 1
690 15:07:32.606765 I2C: 00:32: enabled 1
691 15:07:32.610567 I2C: 00:10: enabled 1
692 15:07:32.613347 I2C: 00:15: enabled 1
693 15:07:32.613443 GENERIC: 0.0: enabled 0
694 15:07:32.616800 GENERIC: 1.0: enabled 0
695 15:07:32.619967 GENERIC: 0.0: enabled 1
696 15:07:32.620081 SPI: 00: enabled 1
697 15:07:32.623292 SPI: 00: enabled 1
698 15:07:32.626503 PNP: 0c09.0: enabled 1
699 15:07:32.626591 GENERIC: 0.0: enabled 1
700 15:07:32.630611 USB3 port 0: enabled 1
701 15:07:32.633559 USB3 port 1: enabled 1
702 15:07:32.633656 USB3 port 2: enabled 0
703 15:07:32.636509 USB3 port 3: enabled 0
704 15:07:32.640054 USB2 port 0: enabled 0
705 15:07:32.643586 USB2 port 1: enabled 1
706 15:07:32.643690 USB2 port 2: enabled 1
707 15:07:32.646504 USB2 port 3: enabled 0
708 15:07:32.650252 USB2 port 4: enabled 1
709 15:07:32.650345 USB2 port 5: enabled 0
710 15:07:32.653256 USB2 port 6: enabled 0
711 15:07:32.657065 USB2 port 7: enabled 0
712 15:07:32.660011 USB2 port 8: enabled 0
713 15:07:32.660141 USB2 port 9: enabled 0
714 15:07:32.663276 USB3 port 0: enabled 0
715 15:07:32.666497 USB3 port 1: enabled 1
716 15:07:32.666619 USB3 port 2: enabled 0
717 15:07:32.670005 USB3 port 3: enabled 0
718 15:07:32.673205 GENERIC: 0.0: enabled 1
719 15:07:32.676506 GENERIC: 1.0: enabled 1
720 15:07:32.676637 APIC: 01: enabled 1
721 15:07:32.679964 APIC: 03: enabled 1
722 15:07:32.680086 APIC: 05: enabled 1
723 15:07:32.682986 APIC: 07: enabled 1
724 15:07:32.686729 APIC: 06: enabled 1
725 15:07:32.686845 APIC: 02: enabled 1
726 15:07:32.689734 APIC: 04: enabled 1
727 15:07:32.689867 Compare with tree...
728 15:07:32.693604 Root Device: enabled 1
729 15:07:32.696626 DOMAIN: 0000: enabled 1
730 15:07:32.699839 PCI: 00:00.0: enabled 1
731 15:07:32.703274 PCI: 00:02.0: enabled 1
732 15:07:32.703392 PCI: 00:04.0: enabled 1
733 15:07:32.706540 GENERIC: 0.0: enabled 1
734 15:07:32.710146 PCI: 00:05.0: enabled 1
735 15:07:32.712989 PCI: 00:06.0: enabled 0
736 15:07:32.716446 PCI: 00:07.0: enabled 0
737 15:07:32.716542 GENERIC: 0.0: enabled 1
738 15:07:32.719801 PCI: 00:07.1: enabled 0
739 15:07:32.723376 GENERIC: 1.0: enabled 1
740 15:07:32.726585 PCI: 00:07.2: enabled 0
741 15:07:32.729964 GENERIC: 0.0: enabled 1
742 15:07:32.730059 PCI: 00:07.3: enabled 0
743 15:07:32.733258 GENERIC: 1.0: enabled 1
744 15:07:32.736452 PCI: 00:08.0: enabled 1
745 15:07:32.739840 PCI: 00:09.0: enabled 0
746 15:07:32.742974 PCI: 00:0a.0: enabled 0
747 15:07:32.743070 PCI: 00:0d.0: enabled 1
748 15:07:32.746448 USB0 port 0: enabled 1
749 15:07:32.749476 USB3 port 0: enabled 1
750 15:07:32.752967 USB3 port 1: enabled 1
751 15:07:32.756207 USB3 port 2: enabled 0
752 15:07:32.756310 USB3 port 3: enabled 0
753 15:07:32.759741 PCI: 00:0d.1: enabled 0
754 15:07:32.762780 PCI: 00:0d.2: enabled 0
755 15:07:32.766154 GENERIC: 0.0: enabled 1
756 15:07:32.769349 PCI: 00:0d.3: enabled 0
757 15:07:32.769445 PCI: 00:0e.0: enabled 0
758 15:07:32.773148 PCI: 00:10.2: enabled 1
759 15:07:32.776289 PCI: 00:10.6: enabled 0
760 15:07:32.779442 PCI: 00:10.7: enabled 0
761 15:07:32.782915 PCI: 00:12.0: enabled 0
762 15:07:32.783011 PCI: 00:12.6: enabled 0
763 15:07:32.786262 PCI: 00:13.0: enabled 0
764 15:07:32.789741 PCI: 00:14.0: enabled 1
765 15:07:32.792731 USB0 port 0: enabled 1
766 15:07:32.796005 USB2 port 0: enabled 0
767 15:07:32.796100 USB2 port 1: enabled 1
768 15:07:32.799321 USB2 port 2: enabled 1
769 15:07:32.802841 USB2 port 3: enabled 0
770 15:07:32.805932 USB2 port 4: enabled 1
771 15:07:32.809359 USB2 port 5: enabled 0
772 15:07:32.812570 USB2 port 6: enabled 0
773 15:07:32.812667 USB2 port 7: enabled 0
774 15:07:32.816023 USB2 port 8: enabled 0
775 15:07:32.819148 USB2 port 9: enabled 0
776 15:07:32.822802 USB3 port 0: enabled 0
777 15:07:32.825905 USB3 port 1: enabled 1
778 15:07:32.829483 USB3 port 2: enabled 0
779 15:07:32.829578 USB3 port 3: enabled 0
780 15:07:32.833028 PCI: 00:14.1: enabled 0
781 15:07:32.836206 PCI: 00:14.2: enabled 1
782 15:07:32.839159 PCI: 00:14.3: enabled 1
783 15:07:32.842580 GENERIC: 0.0: enabled 1
784 15:07:32.842675 PCI: 00:15.0: enabled 1
785 15:07:32.846162 I2C: 00:1a: enabled 1
786 15:07:32.849680 I2C: 00:31: enabled 1
787 15:07:32.852720 I2C: 00:32: enabled 1
788 15:07:32.852814 PCI: 00:15.1: enabled 1
789 15:07:32.855991 I2C: 00:10: enabled 1
790 15:07:32.859290 PCI: 00:15.2: enabled 1
791 15:07:32.862857 PCI: 00:15.3: enabled 1
792 15:07:32.866313 PCI: 00:16.0: enabled 1
793 15:07:32.866407 PCI: 00:16.1: enabled 0
794 15:07:32.870079 PCI: 00:16.2: enabled 0
795 15:07:32.874023 PCI: 00:16.3: enabled 0
796 15:07:32.874118 PCI: 00:16.4: enabled 0
797 15:07:32.877183 PCI: 00:16.5: enabled 0
798 15:07:32.880209 PCI: 00:17.0: enabled 1
799 15:07:32.883931 PCI: 00:19.0: enabled 0
800 15:07:32.886853 PCI: 00:19.1: enabled 1
801 15:07:32.886948 I2C: 00:15: enabled 1
802 15:07:32.890820 PCI: 00:19.2: enabled 0
803 15:07:32.893804 PCI: 00:1d.0: enabled 1
804 15:07:32.897550 GENERIC: 0.0: enabled 1
805 15:07:32.900128 PCI: 00:1e.0: enabled 1
806 15:07:32.900260 PCI: 00:1e.1: enabled 0
807 15:07:32.903823 PCI: 00:1e.2: enabled 1
808 15:07:32.953599 SPI: 00: enabled 1
809 15:07:32.953732 PCI: 00:1e.3: enabled 1
810 15:07:32.953811 SPI: 00: enabled 1
811 15:07:32.954151 PCI: 00:1f.0: enabled 1
812 15:07:32.954279 PNP: 0c09.0: enabled 1
813 15:07:32.954419 PCI: 00:1f.1: enabled 0
814 15:07:32.954537 PCI: 00:1f.2: enabled 1
815 15:07:32.954653 GENERIC: 0.0: enabled 1
816 15:07:32.954754 GENERIC: 0.0: enabled 1
817 15:07:32.954852 GENERIC: 1.0: enabled 1
818 15:07:32.954950 PCI: 00:1f.3: enabled 1
819 15:07:32.955046 PCI: 00:1f.4: enabled 0
820 15:07:32.955157 PCI: 00:1f.5: enabled 1
821 15:07:32.955254 PCI: 00:1f.6: enabled 0
822 15:07:32.955355 PCI: 00:1f.7: enabled 0
823 15:07:32.955457 CPU_CLUSTER: 0: enabled 1
824 15:07:32.955553 APIC: 00: enabled 1
825 15:07:32.955653 APIC: 01: enabled 1
826 15:07:32.955754 APIC: 03: enabled 1
827 15:07:32.955849 APIC: 05: enabled 1
828 15:07:33.006030 APIC: 07: enabled 1
829 15:07:33.006182 APIC: 06: enabled 1
830 15:07:33.006503 APIC: 02: enabled 1
831 15:07:33.006613 APIC: 04: enabled 1
832 15:07:33.006715 Root Device scanning...
833 15:07:33.006835 scan_static_bus for Root Device
834 15:07:33.006935 DOMAIN: 0000 enabled
835 15:07:33.007051 CPU_CLUSTER: 0 enabled
836 15:07:33.007149 DOMAIN: 0000 scanning...
837 15:07:33.007264 PCI: pci_scan_bus for bus 00
838 15:07:33.007362 PCI: 00:00.0 [8086/0000] ops
839 15:07:33.007479 PCI: 00:00.0 [8086/9a12] enabled
840 15:07:33.007601 PCI: 00:02.0 [8086/0000] bus ops
841 15:07:33.007717 PCI: 00:02.0 [8086/9a40] enabled
842 15:07:33.007844 PCI: 00:04.0 [8086/0000] bus ops
843 15:07:33.008465 PCI: 00:04.0 [8086/9a03] enabled
844 15:07:33.008576 PCI: 00:05.0 [8086/9a19] enabled
845 15:07:33.022093 PCI: 00:07.0 [0000/0000] hidden
846 15:07:33.022230 PCI: 00:08.0 [8086/9a11] enabled
847 15:07:33.022556 PCI: 00:0a.0 [8086/9a0d] disabled
848 15:07:33.022688 PCI: 00:0d.0 [8086/0000] bus ops
849 15:07:33.025861 PCI: 00:0d.0 [8086/9a13] enabled
850 15:07:33.025986 PCI: 00:14.0 [8086/0000] bus ops
851 15:07:33.028667 PCI: 00:14.0 [8086/a0ed] enabled
852 15:07:33.032386 PCI: 00:14.2 [8086/a0ef] enabled
853 15:07:33.035472 PCI: 00:14.3 [8086/0000] bus ops
854 15:07:33.039131 PCI: 00:14.3 [8086/a0f0] enabled
855 15:07:33.041987 PCI: 00:15.0 [8086/0000] bus ops
856 15:07:33.045404 PCI: 00:15.0 [8086/a0e8] enabled
857 15:07:33.048876 PCI: 00:15.1 [8086/0000] bus ops
858 15:07:33.052637 PCI: 00:15.1 [8086/a0e9] enabled
859 15:07:33.055696 PCI: 00:15.2 [8086/0000] bus ops
860 15:07:33.058655 PCI: 00:15.2 [8086/a0ea] enabled
861 15:07:33.062296 PCI: 00:15.3 [8086/0000] bus ops
862 15:07:33.065197 PCI: 00:15.3 [8086/a0eb] enabled
863 15:07:33.068674 PCI: 00:16.0 [8086/0000] ops
864 15:07:33.071940 PCI: 00:16.0 [8086/a0e0] enabled
865 15:07:33.075516 PCI: Static device PCI: 00:17.0 not found, disabling it.
866 15:07:33.078723 PCI: 00:19.0 [8086/0000] bus ops
867 15:07:33.081680 PCI: 00:19.0 [8086/a0c5] disabled
868 15:07:33.085742 PCI: 00:19.1 [8086/0000] bus ops
869 15:07:33.088721 PCI: 00:19.1 [8086/a0c6] enabled
870 15:07:33.091745 PCI: 00:1d.0 [8086/0000] bus ops
871 15:07:33.094961 PCI: 00:1d.0 [8086/a0b0] enabled
872 15:07:33.098649 PCI: 00:1e.0 [8086/0000] ops
873 15:07:33.101696 PCI: 00:1e.0 [8086/a0a8] enabled
874 15:07:33.105689 PCI: 00:1e.2 [8086/0000] bus ops
875 15:07:33.108221 PCI: 00:1e.2 [8086/a0aa] enabled
876 15:07:33.111867 PCI: 00:1e.3 [8086/0000] bus ops
877 15:07:33.115235 PCI: 00:1e.3 [8086/a0ab] enabled
878 15:07:33.118468 PCI: 00:1f.0 [8086/0000] bus ops
879 15:07:33.122109 PCI: 00:1f.0 [8086/a087] enabled
880 15:07:33.124997 RTC Init
881 15:07:33.128722 Set power on after power failure.
882 15:07:33.128846 Disabling Deep S3
883 15:07:33.131868 Disabling Deep S3
884 15:07:33.134728 Disabling Deep S4
885 15:07:33.134810 Disabling Deep S4
886 15:07:33.138351 Disabling Deep S5
887 15:07:33.138443 Disabling Deep S5
888 15:07:33.141449 PCI: 00:1f.2 [0000/0000] hidden
889 15:07:33.145442 PCI: 00:1f.3 [8086/0000] bus ops
890 15:07:33.148250 PCI: 00:1f.3 [8086/a0c8] enabled
891 15:07:33.151421 PCI: 00:1f.5 [8086/0000] bus ops
892 15:07:33.155294 PCI: 00:1f.5 [8086/a0a4] enabled
893 15:07:33.158125 PCI: Leftover static devices:
894 15:07:33.161350 PCI: 00:10.2
895 15:07:33.161467 PCI: 00:10.6
896 15:07:33.161548 PCI: 00:10.7
897 15:07:33.165027 PCI: 00:06.0
898 15:07:33.165135 PCI: 00:07.1
899 15:07:33.168505 PCI: 00:07.2
900 15:07:33.168585 PCI: 00:07.3
901 15:07:33.168660 PCI: 00:09.0
902 15:07:33.171889 PCI: 00:0d.1
903 15:07:33.172004 PCI: 00:0d.2
904 15:07:33.174950 PCI: 00:0d.3
905 15:07:33.175061 PCI: 00:0e.0
906 15:07:33.178057 PCI: 00:12.0
907 15:07:33.178171 PCI: 00:12.6
908 15:07:33.178280 PCI: 00:13.0
909 15:07:33.181552 PCI: 00:14.1
910 15:07:33.181630 PCI: 00:16.1
911 15:07:33.185251 PCI: 00:16.2
912 15:07:33.185338 PCI: 00:16.3
913 15:07:33.185419 PCI: 00:16.4
914 15:07:33.188007 PCI: 00:16.5
915 15:07:33.188116 PCI: 00:17.0
916 15:07:33.192021 PCI: 00:19.2
917 15:07:33.192133 PCI: 00:1e.1
918 15:07:33.192233 PCI: 00:1f.1
919 15:07:33.194953 PCI: 00:1f.4
920 15:07:33.195067 PCI: 00:1f.6
921 15:07:33.198134 PCI: 00:1f.7
922 15:07:33.201415 PCI: Check your devicetree.cb.
923 15:07:33.201496 PCI: 00:02.0 scanning...
924 15:07:33.208093 scan_generic_bus for PCI: 00:02.0
925 15:07:33.211870 scan_generic_bus for PCI: 00:02.0 done
926 15:07:33.214796 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
927 15:07:33.217951 PCI: 00:04.0 scanning...
928 15:07:33.221734 scan_generic_bus for PCI: 00:04.0
929 15:07:33.224918 GENERIC: 0.0 enabled
930 15:07:33.227883 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
931 15:07:33.234466 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
932 15:07:33.238263 PCI: 00:0d.0 scanning...
933 15:07:33.241374 scan_static_bus for PCI: 00:0d.0
934 15:07:33.241494 USB0 port 0 enabled
935 15:07:33.244248 USB0 port 0 scanning...
936 15:07:33.247664 scan_static_bus for USB0 port 0
937 15:07:33.251373 USB3 port 0 enabled
938 15:07:33.251491 USB3 port 1 enabled
939 15:07:33.254652 USB3 port 2 disabled
940 15:07:33.257615 USB3 port 3 disabled
941 15:07:33.257730 USB3 port 0 scanning...
942 15:07:33.261361 scan_static_bus for USB3 port 0
943 15:07:33.268113 scan_static_bus for USB3 port 0 done
944 15:07:33.271394 scan_bus: bus USB3 port 0 finished in 6 msecs
945 15:07:33.274615 USB3 port 1 scanning...
946 15:07:33.278012 scan_static_bus for USB3 port 1
947 15:07:33.281171 scan_static_bus for USB3 port 1 done
948 15:07:33.284419 scan_bus: bus USB3 port 1 finished in 6 msecs
949 15:07:33.287739 scan_static_bus for USB0 port 0 done
950 15:07:33.294119 scan_bus: bus USB0 port 0 finished in 43 msecs
951 15:07:33.297908 scan_static_bus for PCI: 00:0d.0 done
952 15:07:33.301225 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
953 15:07:33.303999 PCI: 00:14.0 scanning...
954 15:07:33.307871 scan_static_bus for PCI: 00:14.0
955 15:07:33.310830 USB0 port 0 enabled
956 15:07:33.314637 USB0 port 0 scanning...
957 15:07:33.317626 scan_static_bus for USB0 port 0
958 15:07:33.317719 USB2 port 0 disabled
959 15:07:33.320725 USB2 port 1 enabled
960 15:07:33.323867 USB2 port 2 enabled
961 15:07:33.323960 USB2 port 3 disabled
962 15:07:33.327871 USB2 port 4 enabled
963 15:07:33.327964 USB2 port 5 disabled
964 15:07:33.330829 USB2 port 6 disabled
965 15:07:33.333835 USB2 port 7 disabled
966 15:07:33.333929 USB2 port 8 disabled
967 15:07:33.337543 USB2 port 9 disabled
968 15:07:33.340558 USB3 port 0 disabled
969 15:07:33.340651 USB3 port 1 enabled
970 15:07:33.343761 USB3 port 2 disabled
971 15:07:33.347353 USB3 port 3 disabled
972 15:07:33.347447 USB2 port 1 scanning...
973 15:07:33.350470 scan_static_bus for USB2 port 1
974 15:07:33.353933 scan_static_bus for USB2 port 1 done
975 15:07:33.360656 scan_bus: bus USB2 port 1 finished in 6 msecs
976 15:07:33.363856 USB2 port 2 scanning...
977 15:07:33.367504 scan_static_bus for USB2 port 2
978 15:07:33.370338 scan_static_bus for USB2 port 2 done
979 15:07:33.373792 scan_bus: bus USB2 port 2 finished in 6 msecs
980 15:07:33.377475 USB2 port 4 scanning...
981 15:07:33.380392 scan_static_bus for USB2 port 4
982 15:07:33.383813 scan_static_bus for USB2 port 4 done
983 15:07:33.386853 scan_bus: bus USB2 port 4 finished in 6 msecs
984 15:07:33.390709 USB3 port 1 scanning...
985 15:07:33.393886 scan_static_bus for USB3 port 1
986 15:07:33.396824 scan_static_bus for USB3 port 1 done
987 15:07:33.403705 scan_bus: bus USB3 port 1 finished in 6 msecs
988 15:07:33.406964 scan_static_bus for USB0 port 0 done
989 15:07:33.410527 scan_bus: bus USB0 port 0 finished in 93 msecs
990 15:07:33.413748 scan_static_bus for PCI: 00:14.0 done
991 15:07:33.419927 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
992 15:07:33.423175 PCI: 00:14.3 scanning...
993 15:07:33.426684 scan_static_bus for PCI: 00:14.3
994 15:07:33.426778 GENERIC: 0.0 enabled
995 15:07:33.433222 scan_static_bus for PCI: 00:14.3 done
996 15:07:33.436624 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
997 15:07:33.440454 PCI: 00:15.0 scanning...
998 15:07:33.443371 scan_static_bus for PCI: 00:15.0
999 15:07:33.443464 I2C: 00:1a enabled
1000 15:07:33.447226 I2C: 00:31 enabled
1001 15:07:33.447320 I2C: 00:32 enabled
1002 15:07:33.454083 scan_static_bus for PCI: 00:15.0 done
1003 15:07:33.457142 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1004 15:07:33.460750 PCI: 00:15.1 scanning...
1005 15:07:33.463727 scan_static_bus for PCI: 00:15.1
1006 15:07:33.463820 I2C: 00:10 enabled
1007 15:07:33.470355 scan_static_bus for PCI: 00:15.1 done
1008 15:07:33.473489 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1009 15:07:33.477317 PCI: 00:15.2 scanning...
1010 15:07:33.480761 scan_static_bus for PCI: 00:15.2
1011 15:07:33.484028 scan_static_bus for PCI: 00:15.2 done
1012 15:07:33.486692 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1013 15:07:33.490474 PCI: 00:15.3 scanning...
1014 15:07:33.493548 scan_static_bus for PCI: 00:15.3
1015 15:07:33.497033 scan_static_bus for PCI: 00:15.3 done
1016 15:07:33.503720 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1017 15:07:33.506765 PCI: 00:19.1 scanning...
1018 15:07:33.509956 scan_static_bus for PCI: 00:19.1
1019 15:07:33.510051 I2C: 00:15 enabled
1020 15:07:33.513738 scan_static_bus for PCI: 00:19.1 done
1021 15:07:33.520589 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1022 15:07:33.523350 PCI: 00:1d.0 scanning...
1023 15:07:33.526555 do_pci_scan_bridge for PCI: 00:1d.0
1024 15:07:33.529765 PCI: pci_scan_bus for bus 01
1025 15:07:33.533060 PCI: 01:00.0 [1c5c/174a] enabled
1026 15:07:33.533153 GENERIC: 0.0 enabled
1027 15:07:33.536710 Enabling Common Clock Configuration
1028 15:07:33.543352 L1 Sub-State supported from root port 29
1029 15:07:33.546850 L1 Sub-State Support = 0xf
1030 15:07:33.546945 CommonModeRestoreTime = 0x28
1031 15:07:33.553078 Power On Value = 0x16, Power On Scale = 0x0
1032 15:07:33.553171 ASPM: Enabled L1
1033 15:07:33.560044 PCIe: Max_Payload_Size adjusted to 128
1034 15:07:33.563242 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1035 15:07:33.566700 PCI: 00:1e.2 scanning...
1036 15:07:33.569660 scan_generic_bus for PCI: 00:1e.2
1037 15:07:33.569755 SPI: 00 enabled
1038 15:07:33.576142 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1039 15:07:33.583036 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1040 15:07:33.583130 PCI: 00:1e.3 scanning...
1041 15:07:33.589818 scan_generic_bus for PCI: 00:1e.3
1042 15:07:33.589908 SPI: 00 enabled
1043 15:07:33.596158 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1044 15:07:33.599701 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1045 15:07:33.602626 PCI: 00:1f.0 scanning...
1046 15:07:33.605939 scan_static_bus for PCI: 00:1f.0
1047 15:07:33.609626 PNP: 0c09.0 enabled
1048 15:07:33.609739 PNP: 0c09.0 scanning...
1049 15:07:33.612935 scan_static_bus for PNP: 0c09.0
1050 15:07:33.619283 scan_static_bus for PNP: 0c09.0 done
1051 15:07:33.622869 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1052 15:07:33.626484 scan_static_bus for PCI: 00:1f.0 done
1053 15:07:33.632779 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1054 15:07:33.632873 PCI: 00:1f.2 scanning...
1055 15:07:33.636413 scan_static_bus for PCI: 00:1f.2
1056 15:07:33.639641 GENERIC: 0.0 enabled
1057 15:07:33.642614 GENERIC: 0.0 scanning...
1058 15:07:33.646439 scan_static_bus for GENERIC: 0.0
1059 15:07:33.649429 GENERIC: 0.0 enabled
1060 15:07:33.649523 GENERIC: 1.0 enabled
1061 15:07:33.652945 scan_static_bus for GENERIC: 0.0 done
1062 15:07:33.659086 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1063 15:07:33.662720 scan_static_bus for PCI: 00:1f.2 done
1064 15:07:33.665898 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1065 15:07:33.669732 PCI: 00:1f.3 scanning...
1066 15:07:33.672521 scan_static_bus for PCI: 00:1f.3
1067 15:07:33.676071 scan_static_bus for PCI: 00:1f.3 done
1068 15:07:33.682246 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1069 15:07:33.685676 PCI: 00:1f.5 scanning...
1070 15:07:33.689443 scan_generic_bus for PCI: 00:1f.5
1071 15:07:33.692220 scan_generic_bus for PCI: 00:1f.5 done
1072 15:07:33.695888 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1073 15:07:33.702653 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1074 15:07:33.705613 scan_static_bus for Root Device done
1075 15:07:33.708769 scan_bus: bus Root Device finished in 736 msecs
1076 15:07:33.712149 done
1077 15:07:33.715739 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1078 15:07:33.719399 Chrome EC: UHEPI supported
1079 15:07:33.726337 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1080 15:07:33.733127 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1081 15:07:33.736232 SPI flash protection: WPSW=0 SRP0=0
1082 15:07:33.742596 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1083 15:07:33.745672 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1084 15:07:33.749274 found VGA at PCI: 00:02.0
1085 15:07:33.752410 Setting up VGA for PCI: 00:02.0
1086 15:07:33.759119 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1087 15:07:33.762466 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1088 15:07:33.766204 Allocating resources...
1089 15:07:33.769190 Reading resources...
1090 15:07:33.772251 Root Device read_resources bus 0 link: 0
1091 15:07:33.776176 DOMAIN: 0000 read_resources bus 0 link: 0
1092 15:07:33.782545 PCI: 00:04.0 read_resources bus 1 link: 0
1093 15:07:33.785632 PCI: 00:04.0 read_resources bus 1 link: 0 done
1094 15:07:33.792309 PCI: 00:0d.0 read_resources bus 0 link: 0
1095 15:07:33.795476 USB0 port 0 read_resources bus 0 link: 0
1096 15:07:33.802027 USB0 port 0 read_resources bus 0 link: 0 done
1097 15:07:33.805809 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1098 15:07:33.809128 PCI: 00:14.0 read_resources bus 0 link: 0
1099 15:07:33.815644 USB0 port 0 read_resources bus 0 link: 0
1100 15:07:33.819251 USB0 port 0 read_resources bus 0 link: 0 done
1101 15:07:33.826072 PCI: 00:14.0 read_resources bus 0 link: 0 done
1102 15:07:33.829217 PCI: 00:14.3 read_resources bus 0 link: 0
1103 15:07:33.836046 PCI: 00:14.3 read_resources bus 0 link: 0 done
1104 15:07:33.839595 PCI: 00:15.0 read_resources bus 0 link: 0
1105 15:07:33.845867 PCI: 00:15.0 read_resources bus 0 link: 0 done
1106 15:07:33.849292 PCI: 00:15.1 read_resources bus 0 link: 0
1107 15:07:33.855937 PCI: 00:15.1 read_resources bus 0 link: 0 done
1108 15:07:33.859190 PCI: 00:19.1 read_resources bus 0 link: 0
1109 15:07:33.866387 PCI: 00:19.1 read_resources bus 0 link: 0 done
1110 15:07:33.869554 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 15:07:33.876636 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 15:07:33.879536 PCI: 00:1e.2 read_resources bus 2 link: 0
1113 15:07:33.886351 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1114 15:07:33.889674 PCI: 00:1e.3 read_resources bus 3 link: 0
1115 15:07:33.896449 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1116 15:07:33.899443 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 15:07:33.906240 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 15:07:33.909739 PCI: 00:1f.2 read_resources bus 0 link: 0
1119 15:07:33.912692 GENERIC: 0.0 read_resources bus 0 link: 0
1120 15:07:33.919751 GENERIC: 0.0 read_resources bus 0 link: 0 done
1121 15:07:33.923177 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1122 15:07:33.930431 DOMAIN: 0000 read_resources bus 0 link: 0 done
1123 15:07:33.933833 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1124 15:07:33.940504 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1125 15:07:33.943772 Root Device read_resources bus 0 link: 0 done
1126 15:07:33.947162 Done reading resources.
1127 15:07:33.954168 Show resources in subtree (Root Device)...After reading.
1128 15:07:33.957107 Root Device child on link 0 DOMAIN: 0000
1129 15:07:33.960140 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1130 15:07:33.970546 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1131 15:07:33.980102 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1132 15:07:33.983780 PCI: 00:00.0
1133 15:07:33.993541 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1134 15:07:34.000365 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1135 15:07:34.010331 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1136 15:07:34.020164 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1137 15:07:34.030220 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1138 15:07:34.039769 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1139 15:07:34.050541 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1140 15:07:34.056726 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1141 15:07:34.066408 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1142 15:07:34.076652 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1143 15:07:34.086618 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1144 15:07:34.096792 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1145 15:07:34.102975 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1146 15:07:34.113269 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1147 15:07:34.122719 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1148 15:07:34.132793 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1149 15:07:34.142953 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1150 15:07:34.152596 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1151 15:07:34.159843 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1152 15:07:34.169351 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1153 15:07:34.172942 PCI: 00:02.0
1154 15:07:34.182499 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1155 15:07:34.192667 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1156 15:07:34.202255 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1157 15:07:34.205836 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1158 15:07:34.215829 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1159 15:07:34.219205 GENERIC: 0.0
1160 15:07:34.219307 PCI: 00:05.0
1161 15:07:34.228927 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1162 15:07:34.235894 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1163 15:07:34.235999 GENERIC: 0.0
1164 15:07:34.238872 PCI: 00:08.0
1165 15:07:34.248903 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 15:07:34.249006 PCI: 00:0a.0
1167 15:07:34.252252 PCI: 00:0d.0 child on link 0 USB0 port 0
1168 15:07:34.262130 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1169 15:07:34.268670 USB0 port 0 child on link 0 USB3 port 0
1170 15:07:34.268766 USB3 port 0
1171 15:07:34.272278 USB3 port 1
1172 15:07:34.272387 USB3 port 2
1173 15:07:34.275457 USB3 port 3
1174 15:07:34.278653 PCI: 00:14.0 child on link 0 USB0 port 0
1175 15:07:34.288639 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1176 15:07:34.295618 USB0 port 0 child on link 0 USB2 port 0
1177 15:07:34.295730 USB2 port 0
1178 15:07:34.298624 USB2 port 1
1179 15:07:34.298721 USB2 port 2
1180 15:07:34.302256 USB2 port 3
1181 15:07:34.302337 USB2 port 4
1182 15:07:34.305704 USB2 port 5
1183 15:07:34.305782 USB2 port 6
1184 15:07:34.308686 USB2 port 7
1185 15:07:34.308779 USB2 port 8
1186 15:07:34.312632 USB2 port 9
1187 15:07:34.312730 USB3 port 0
1188 15:07:34.315349 USB3 port 1
1189 15:07:34.315442 USB3 port 2
1190 15:07:34.318321 USB3 port 3
1191 15:07:34.322018 PCI: 00:14.2
1192 15:07:34.331688 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1193 15:07:34.342088 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1194 15:07:34.345451 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1195 15:07:34.355383 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 15:07:34.355481 GENERIC: 0.0
1197 15:07:34.361527 PCI: 00:15.0 child on link 0 I2C: 00:1a
1198 15:07:34.371476 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 15:07:34.371601 I2C: 00:1a
1200 15:07:34.374900 I2C: 00:31
1201 15:07:34.374994 I2C: 00:32
1202 15:07:34.378043 PCI: 00:15.1 child on link 0 I2C: 00:10
1203 15:07:34.388626 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 15:07:34.391789 I2C: 00:10
1205 15:07:34.391883 PCI: 00:15.2
1206 15:07:34.401485 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 15:07:34.404689 PCI: 00:15.3
1208 15:07:34.415086 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 15:07:34.415190 PCI: 00:16.0
1210 15:07:34.424931 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 15:07:34.428218 PCI: 00:19.0
1212 15:07:34.431332 PCI: 00:19.1 child on link 0 I2C: 00:15
1213 15:07:34.441445 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 15:07:34.444797 I2C: 00:15
1215 15:07:34.447867 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1216 15:07:34.458059 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1217 15:07:34.468003 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1218 15:07:34.474184 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1219 15:07:34.478018 GENERIC: 0.0
1220 15:07:34.478145 PCI: 01:00.0
1221 15:07:34.487847 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 15:07:34.497670 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1223 15:07:34.507413 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1224 15:07:34.510856 PCI: 00:1e.0
1225 15:07:34.520852 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1226 15:07:34.524488 PCI: 00:1e.2 child on link 0 SPI: 00
1227 15:07:34.534381 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 15:07:34.534505 SPI: 00
1229 15:07:34.541107 PCI: 00:1e.3 child on link 0 SPI: 00
1230 15:07:34.551043 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1231 15:07:34.551168 SPI: 00
1232 15:07:34.553931 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1233 15:07:34.564197 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1234 15:07:34.567271 PNP: 0c09.0
1235 15:07:34.573977 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1236 15:07:34.580473 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1237 15:07:34.587394 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1238 15:07:34.597166 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1239 15:07:34.603968 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1240 15:07:34.604078 GENERIC: 0.0
1241 15:07:34.607237 GENERIC: 1.0
1242 15:07:34.607348 PCI: 00:1f.3
1243 15:07:34.617129 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1244 15:07:34.626937 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1245 15:07:34.630223 PCI: 00:1f.5
1246 15:07:34.636792 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1247 15:07:34.643366 CPU_CLUSTER: 0 child on link 0 APIC: 00
1248 15:07:34.643454 APIC: 00
1249 15:07:34.647193 APIC: 01
1250 15:07:34.647281 APIC: 03
1251 15:07:34.647351 APIC: 05
1252 15:07:34.650449 APIC: 07
1253 15:07:34.650527 APIC: 06
1254 15:07:34.650593 APIC: 02
1255 15:07:34.653487 APIC: 04
1256 15:07:34.660247 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1257 15:07:34.666693 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1258 15:07:34.673245 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1259 15:07:34.680361 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1260 15:07:34.683390 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1261 15:07:34.686964 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1262 15:07:34.690050 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1263 15:07:34.699838 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1264 15:07:34.706438 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1265 15:07:34.713227 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1266 15:07:34.719691 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1267 15:07:34.726271 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1268 15:07:34.733127 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1269 15:07:34.743113 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1270 15:07:34.749851 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1271 15:07:34.753682 DOMAIN: 0000: Resource ranges:
1272 15:07:34.756521 * Base: 1000, Size: 800, Tag: 100
1273 15:07:34.759605 * Base: 1900, Size: e700, Tag: 100
1274 15:07:34.766192 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1275 15:07:34.772720 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1276 15:07:34.779391 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1277 15:07:34.786555 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1278 15:07:34.792738 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1279 15:07:34.802714 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1280 15:07:34.809899 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1281 15:07:34.815784 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1282 15:07:34.826269 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1283 15:07:34.832472 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1284 15:07:34.839491 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1285 15:07:34.849370 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1286 15:07:34.855816 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1287 15:07:34.862318 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1288 15:07:34.872222 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1289 15:07:34.879237 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1290 15:07:34.885602 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1291 15:07:34.895672 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1292 15:07:34.902406 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1293 15:07:34.909273 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1294 15:07:34.919138 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1295 15:07:34.925413 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1296 15:07:34.932359 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1297 15:07:34.941905 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1298 15:07:34.948456 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1299 15:07:34.952265 DOMAIN: 0000: Resource ranges:
1300 15:07:34.955422 * Base: 7fc00000, Size: 40400000, Tag: 200
1301 15:07:34.962027 * Base: d0000000, Size: 28000000, Tag: 200
1302 15:07:34.965787 * Base: fa000000, Size: 1000000, Tag: 200
1303 15:07:34.968966 * Base: fb001000, Size: 2fff000, Tag: 200
1304 15:07:34.972177 * Base: fe010000, Size: 2e000, Tag: 200
1305 15:07:34.979376 * Base: fe03f000, Size: d41000, Tag: 200
1306 15:07:34.982181 * Base: fed88000, Size: 8000, Tag: 200
1307 15:07:34.985426 * Base: fed93000, Size: d000, Tag: 200
1308 15:07:34.988502 * Base: feda2000, Size: 1e000, Tag: 200
1309 15:07:34.995873 * Base: fede0000, Size: 1220000, Tag: 200
1310 15:07:34.998759 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1311 15:07:35.005404 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1312 15:07:35.011644 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1313 15:07:35.018620 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1314 15:07:35.024929 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1315 15:07:35.031417 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1316 15:07:35.038668 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1317 15:07:35.044721 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1318 15:07:35.051577 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1319 15:07:35.058246 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1320 15:07:35.064980 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1321 15:07:35.071557 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1322 15:07:35.078372 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1323 15:07:35.084947 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1324 15:07:35.091177 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1325 15:07:35.098483 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1326 15:07:35.104625 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1327 15:07:35.111322 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1328 15:07:35.117760 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1329 15:07:35.124547 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1330 15:07:35.131209 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1331 15:07:35.138121 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1332 15:07:35.144567 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1333 15:07:35.151327 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1334 15:07:35.161208 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1335 15:07:35.164410 PCI: 00:1d.0: Resource ranges:
1336 15:07:35.167598 * Base: 7fc00000, Size: 100000, Tag: 200
1337 15:07:35.174111 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1338 15:07:35.181044 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1339 15:07:35.187612 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1340 15:07:35.197436 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1341 15:07:35.204036 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1342 15:07:35.207139 Root Device assign_resources, bus 0 link: 0
1343 15:07:35.213949 DOMAIN: 0000 assign_resources, bus 0 link: 0
1344 15:07:35.220478 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1345 15:07:35.230662 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1346 15:07:35.237386 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1347 15:07:35.244114 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1348 15:07:35.250543 PCI: 00:04.0 assign_resources, bus 1 link: 0
1349 15:07:35.253461 PCI: 00:04.0 assign_resources, bus 1 link: 0
1350 15:07:35.263477 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1351 15:07:35.270255 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1352 15:07:35.280479 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1353 15:07:35.283916 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1354 15:07:35.286903 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1355 15:07:35.296855 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1356 15:07:35.300408 PCI: 00:14.0 assign_resources, bus 0 link: 0
1357 15:07:35.306947 PCI: 00:14.0 assign_resources, bus 0 link: 0
1358 15:07:35.313397 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1359 15:07:35.323502 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1360 15:07:35.330022 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1361 15:07:35.332873 PCI: 00:14.3 assign_resources, bus 0 link: 0
1362 15:07:35.340314 PCI: 00:14.3 assign_resources, bus 0 link: 0
1363 15:07:35.346700 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1364 15:07:35.353029 PCI: 00:15.0 assign_resources, bus 0 link: 0
1365 15:07:35.356474 PCI: 00:15.0 assign_resources, bus 0 link: 0
1366 15:07:35.366838 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1367 15:07:35.369741 PCI: 00:15.1 assign_resources, bus 0 link: 0
1368 15:07:35.372987 PCI: 00:15.1 assign_resources, bus 0 link: 0
1369 15:07:35.383004 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1370 15:07:35.389814 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1371 15:07:35.399398 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1372 15:07:35.406281 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1373 15:07:35.412696 PCI: 00:19.1 assign_resources, bus 0 link: 0
1374 15:07:35.416344 PCI: 00:19.1 assign_resources, bus 0 link: 0
1375 15:07:35.426460 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1376 15:07:35.435619 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1377 15:07:35.442535 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1378 15:07:35.449501 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1379 15:07:35.456337 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1380 15:07:35.465610 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1381 15:07:35.472264 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1382 15:07:35.476207 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1383 15:07:35.486378 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1384 15:07:35.489225 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1385 15:07:35.496026 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1386 15:07:35.502507 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1387 15:07:35.508887 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1388 15:07:35.512340 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1389 15:07:35.515620 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1390 15:07:35.522268 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1391 15:07:35.525801 LPC: Trying to open IO window from 800 size 1ff
1392 15:07:35.535546 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1393 15:07:35.542087 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1394 15:07:35.552201 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1395 15:07:35.555520 DOMAIN: 0000 assign_resources, bus 0 link: 0
1396 15:07:35.562484 Root Device assign_resources, bus 0 link: 0
1397 15:07:35.562577 Done setting resources.
1398 15:07:35.568771 Show resources in subtree (Root Device)...After assigning values.
1399 15:07:35.575214 Root Device child on link 0 DOMAIN: 0000
1400 15:07:35.578484 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1401 15:07:35.588319 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1402 15:07:35.598723 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1403 15:07:35.598819 PCI: 00:00.0
1404 15:07:35.608395 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1405 15:07:35.618825 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1406 15:07:35.628172 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1407 15:07:35.638383 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1408 15:07:35.644976 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1409 15:07:35.655150 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1410 15:07:35.664906 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1411 15:07:35.674824 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1412 15:07:35.684892 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1413 15:07:35.694591 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1414 15:07:35.701144 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1415 15:07:35.711189 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1416 15:07:35.720888 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1417 15:07:35.731348 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1418 15:07:35.737727 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1419 15:07:35.747561 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1420 15:07:35.757984 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1421 15:07:35.767616 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1422 15:07:35.777464 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1423 15:07:35.787329 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1424 15:07:35.787435 PCI: 00:02.0
1425 15:07:35.800414 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1426 15:07:35.810795 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1427 15:07:35.820720 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1428 15:07:35.824500 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1429 15:07:35.833696 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1430 15:07:35.837700 GENERIC: 0.0
1431 15:07:35.837798 PCI: 00:05.0
1432 15:07:35.847251 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1433 15:07:35.854257 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1434 15:07:35.854381 GENERIC: 0.0
1435 15:07:35.857615 PCI: 00:08.0
1436 15:07:35.867369 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1437 15:07:35.867554 PCI: 00:0a.0
1438 15:07:35.873568 PCI: 00:0d.0 child on link 0 USB0 port 0
1439 15:07:35.883718 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1440 15:07:35.887295 USB0 port 0 child on link 0 USB3 port 0
1441 15:07:35.891032 USB3 port 0
1442 15:07:35.891532 USB3 port 1
1443 15:07:35.894292 USB3 port 2
1444 15:07:35.894722 USB3 port 3
1445 15:07:35.900382 PCI: 00:14.0 child on link 0 USB0 port 0
1446 15:07:35.910162 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1447 15:07:35.913520 USB0 port 0 child on link 0 USB2 port 0
1448 15:07:35.917243 USB2 port 0
1449 15:07:35.917698 USB2 port 1
1450 15:07:35.920695 USB2 port 2
1451 15:07:35.921125 USB2 port 3
1452 15:07:35.923419 USB2 port 4
1453 15:07:35.923839 USB2 port 5
1454 15:07:35.927179 USB2 port 6
1455 15:07:35.927736 USB2 port 7
1456 15:07:35.930587 USB2 port 8
1457 15:07:35.931014 USB2 port 9
1458 15:07:35.934026 USB3 port 0
1459 15:07:35.936894 USB3 port 1
1460 15:07:35.937320 USB3 port 2
1461 15:07:35.939968 USB3 port 3
1462 15:07:35.940440 PCI: 00:14.2
1463 15:07:35.950450 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1464 15:07:35.960592 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1465 15:07:35.967066 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1466 15:07:35.976210 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1467 15:07:35.976315 GENERIC: 0.0
1468 15:07:35.983433 PCI: 00:15.0 child on link 0 I2C: 00:1a
1469 15:07:35.993130 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1470 15:07:35.993232 I2C: 00:1a
1471 15:07:35.996218 I2C: 00:31
1472 15:07:35.996318 I2C: 00:32
1473 15:07:35.999983 PCI: 00:15.1 child on link 0 I2C: 00:10
1474 15:07:36.013336 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1475 15:07:36.013434 I2C: 00:10
1476 15:07:36.016221 PCI: 00:15.2
1477 15:07:36.026305 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1478 15:07:36.026401 PCI: 00:15.3
1479 15:07:36.036400 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1480 15:07:36.039350 PCI: 00:16.0
1481 15:07:36.049439 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1482 15:07:36.049534 PCI: 00:19.0
1483 15:07:36.055647 PCI: 00:19.1 child on link 0 I2C: 00:15
1484 15:07:36.065726 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1485 15:07:36.065841 I2C: 00:15
1486 15:07:36.072509 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1487 15:07:36.082603 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1488 15:07:36.092738 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1489 15:07:36.102361 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1490 15:07:36.105663 GENERIC: 0.0
1491 15:07:36.105758 PCI: 01:00.0
1492 15:07:36.115648 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1493 15:07:36.128793 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1494 15:07:36.139280 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1495 15:07:36.139383 PCI: 00:1e.0
1496 15:07:36.152124 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1497 15:07:36.155356 PCI: 00:1e.2 child on link 0 SPI: 00
1498 15:07:36.165719 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1499 15:07:36.165814 SPI: 00
1500 15:07:36.168577 PCI: 00:1e.3 child on link 0 SPI: 00
1501 15:07:36.181683 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1502 15:07:36.181779 SPI: 00
1503 15:07:36.185378 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1504 15:07:36.195460 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1505 15:07:36.195559 PNP: 0c09.0
1506 15:07:36.205010 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1507 15:07:36.208221 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1508 15:07:36.218272 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1509 15:07:36.228065 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1510 15:07:36.231702 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1511 15:07:36.235028 GENERIC: 0.0
1512 15:07:36.238460 GENERIC: 1.0
1513 15:07:36.238553 PCI: 00:1f.3
1514 15:07:36.248235 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1515 15:07:36.258303 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1516 15:07:36.261451 PCI: 00:1f.5
1517 15:07:36.271655 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1518 15:07:36.274891 CPU_CLUSTER: 0 child on link 0 APIC: 00
1519 15:07:36.277867 APIC: 00
1520 15:07:36.277977 APIC: 01
1521 15:07:36.278054 APIC: 03
1522 15:07:36.281463 APIC: 05
1523 15:07:36.281558 APIC: 07
1524 15:07:36.284582 APIC: 06
1525 15:07:36.284682 APIC: 02
1526 15:07:36.284756 APIC: 04
1527 15:07:36.288013 Done allocating resources.
1528 15:07:36.294417 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1529 15:07:36.301072 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1530 15:07:36.304688 Configure GPIOs for I2S audio on UP4.
1531 15:07:36.311203 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1532 15:07:36.314719 Enabling resources...
1533 15:07:36.318041 PCI: 00:00.0 subsystem <- 8086/9a12
1534 15:07:36.321135 PCI: 00:00.0 cmd <- 06
1535 15:07:36.324190 PCI: 00:02.0 subsystem <- 8086/9a40
1536 15:07:36.327348 PCI: 00:02.0 cmd <- 03
1537 15:07:36.330719 PCI: 00:04.0 subsystem <- 8086/9a03
1538 15:07:36.330858 PCI: 00:04.0 cmd <- 02
1539 15:07:36.337897 PCI: 00:05.0 subsystem <- 8086/9a19
1540 15:07:36.338063 PCI: 00:05.0 cmd <- 02
1541 15:07:36.340943 PCI: 00:08.0 subsystem <- 8086/9a11
1542 15:07:36.344665 PCI: 00:08.0 cmd <- 06
1543 15:07:36.348115 PCI: 00:0d.0 subsystem <- 8086/9a13
1544 15:07:36.350936 PCI: 00:0d.0 cmd <- 02
1545 15:07:36.354088 PCI: 00:14.0 subsystem <- 8086/a0ed
1546 15:07:36.357466 PCI: 00:14.0 cmd <- 02
1547 15:07:36.360706 PCI: 00:14.2 subsystem <- 8086/a0ef
1548 15:07:36.363829 PCI: 00:14.2 cmd <- 02
1549 15:07:36.367639 PCI: 00:14.3 subsystem <- 8086/a0f0
1550 15:07:36.370670 PCI: 00:14.3 cmd <- 02
1551 15:07:36.374001 PCI: 00:15.0 subsystem <- 8086/a0e8
1552 15:07:36.377635 PCI: 00:15.0 cmd <- 02
1553 15:07:36.380836 PCI: 00:15.1 subsystem <- 8086/a0e9
1554 15:07:36.380921 PCI: 00:15.1 cmd <- 02
1555 15:07:36.387365 PCI: 00:15.2 subsystem <- 8086/a0ea
1556 15:07:36.387493 PCI: 00:15.2 cmd <- 02
1557 15:07:36.391195 PCI: 00:15.3 subsystem <- 8086/a0eb
1558 15:07:36.393926 PCI: 00:15.3 cmd <- 02
1559 15:07:36.397513 PCI: 00:16.0 subsystem <- 8086/a0e0
1560 15:07:36.400771 PCI: 00:16.0 cmd <- 02
1561 15:07:36.403882 PCI: 00:19.1 subsystem <- 8086/a0c6
1562 15:07:36.407212 PCI: 00:19.1 cmd <- 02
1563 15:07:36.410466 PCI: 00:1d.0 bridge ctrl <- 0013
1564 15:07:36.414246 PCI: 00:1d.0 subsystem <- 8086/a0b0
1565 15:07:36.417188 PCI: 00:1d.0 cmd <- 06
1566 15:07:36.420504 PCI: 00:1e.0 subsystem <- 8086/a0a8
1567 15:07:36.423550 PCI: 00:1e.0 cmd <- 06
1568 15:07:36.427660 PCI: 00:1e.2 subsystem <- 8086/a0aa
1569 15:07:36.430467 PCI: 00:1e.2 cmd <- 06
1570 15:07:36.433643 PCI: 00:1e.3 subsystem <- 8086/a0ab
1571 15:07:36.433754 PCI: 00:1e.3 cmd <- 02
1572 15:07:36.440597 PCI: 00:1f.0 subsystem <- 8086/a087
1573 15:07:36.440692 PCI: 00:1f.0 cmd <- 407
1574 15:07:36.444085 PCI: 00:1f.3 subsystem <- 8086/a0c8
1575 15:07:36.447312 PCI: 00:1f.3 cmd <- 02
1576 15:07:36.450440 PCI: 00:1f.5 subsystem <- 8086/a0a4
1577 15:07:36.453530 PCI: 00:1f.5 cmd <- 406
1578 15:07:36.458222 PCI: 01:00.0 cmd <- 02
1579 15:07:36.462800 done.
1580 15:07:36.466417 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1581 15:07:36.469639 Initializing devices...
1582 15:07:36.472570 Root Device init
1583 15:07:36.476236 Chrome EC: Set SMI mask to 0x0000000000000000
1584 15:07:36.482558 Chrome EC: clear events_b mask to 0x0000000000000000
1585 15:07:36.489365 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1586 15:07:36.496182 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1587 15:07:36.502345 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1588 15:07:36.505888 Chrome EC: Set WAKE mask to 0x0000000000000000
1589 15:07:36.514294 fw_config match found: DB_USB=USB3_ACTIVE
1590 15:07:36.517327 Configure Right Type-C port orientation for retimer
1591 15:07:36.520768 Root Device init finished in 46 msecs
1592 15:07:36.524821 PCI: 00:00.0 init
1593 15:07:36.528014 CPU TDP = 9 Watts
1594 15:07:36.528109 CPU PL1 = 9 Watts
1595 15:07:36.531624 CPU PL2 = 40 Watts
1596 15:07:36.534560 CPU PL4 = 83 Watts
1597 15:07:36.537962 PCI: 00:00.0 init finished in 8 msecs
1598 15:07:36.538100 PCI: 00:02.0 init
1599 15:07:36.541433 GMA: Found VBT in CBFS
1600 15:07:36.544597 GMA: Found valid VBT in CBFS
1601 15:07:36.551274 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1602 15:07:36.558349 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1603 15:07:36.561457 PCI: 00:02.0 init finished in 18 msecs
1604 15:07:36.564886 PCI: 00:05.0 init
1605 15:07:36.568156 PCI: 00:05.0 init finished in 0 msecs
1606 15:07:36.571321 PCI: 00:08.0 init
1607 15:07:36.574512 PCI: 00:08.0 init finished in 0 msecs
1608 15:07:36.578153 PCI: 00:14.0 init
1609 15:07:36.581137 PCI: 00:14.0 init finished in 0 msecs
1610 15:07:36.584986 PCI: 00:14.2 init
1611 15:07:36.587863 PCI: 00:14.2 init finished in 0 msecs
1612 15:07:36.591142 PCI: 00:15.0 init
1613 15:07:36.591276 I2C bus 0 version 0x3230302a
1614 15:07:36.598164 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1615 15:07:36.601222 PCI: 00:15.0 init finished in 6 msecs
1616 15:07:36.601332 PCI: 00:15.1 init
1617 15:07:36.604022 I2C bus 1 version 0x3230302a
1618 15:07:36.607701 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1619 15:07:36.613920 PCI: 00:15.1 init finished in 6 msecs
1620 15:07:36.614055 PCI: 00:15.2 init
1621 15:07:36.617803 I2C bus 2 version 0x3230302a
1622 15:07:36.620731 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1623 15:07:36.624076 PCI: 00:15.2 init finished in 6 msecs
1624 15:07:36.627531 PCI: 00:15.3 init
1625 15:07:36.631049 I2C bus 3 version 0x3230302a
1626 15:07:36.633968 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1627 15:07:36.637422 PCI: 00:15.3 init finished in 6 msecs
1628 15:07:36.640994 PCI: 00:16.0 init
1629 15:07:36.643795 PCI: 00:16.0 init finished in 0 msecs
1630 15:07:36.647884 PCI: 00:19.1 init
1631 15:07:36.650789 I2C bus 5 version 0x3230302a
1632 15:07:36.654485 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1633 15:07:36.657506 PCI: 00:19.1 init finished in 6 msecs
1634 15:07:36.660520 PCI: 00:1d.0 init
1635 15:07:36.660615 Initializing PCH PCIe bridge.
1636 15:07:36.667389 PCI: 00:1d.0 init finished in 3 msecs
1637 15:07:36.670375 PCI: 00:1f.0 init
1638 15:07:36.674433 IOAPIC: Initializing IOAPIC at 0xfec00000
1639 15:07:36.677397 IOAPIC: Bootstrap Processor Local APIC = 0x00
1640 15:07:36.680487 IOAPIC: ID = 0x02
1641 15:07:36.684081 IOAPIC: Dumping registers
1642 15:07:36.684224 reg 0x0000: 0x02000000
1643 15:07:36.686933 reg 0x0001: 0x00770020
1644 15:07:36.690490 reg 0x0002: 0x00000000
1645 15:07:36.694189 PCI: 00:1f.0 init finished in 21 msecs
1646 15:07:36.697005 PCI: 00:1f.2 init
1647 15:07:36.700388 Disabling ACPI via APMC.
1648 15:07:36.700489 APMC done.
1649 15:07:36.704127 PCI: 00:1f.2 init finished in 5 msecs
1650 15:07:36.732590 PCI: 01:00.0 init
1651 15:07:36.732751 PCI: 01:00.0 init finished in 0 msecs
1652 15:07:36.732845 PNP: 0c09.0 init
1653 15:07:36.732915 Google Chrome EC uptime: 8.423 seconds
1654 15:07:36.733951 Google Chrome AP resets since EC boot: 1
1655 15:07:36.737485 Google Chrome most recent AP reset causes:
1656 15:07:36.740502 0.350: 32775 shutdown: entering G3
1657 15:07:36.747190 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1658 15:07:36.750614 PNP: 0c09.0 init finished in 22 msecs
1659 15:07:36.756547 Devices initialized
1660 15:07:36.759533 Show all devs... After init.
1661 15:07:36.762717 Root Device: enabled 1
1662 15:07:36.762817 DOMAIN: 0000: enabled 1
1663 15:07:36.765875 CPU_CLUSTER: 0: enabled 1
1664 15:07:36.769434 PCI: 00:00.0: enabled 1
1665 15:07:36.773007 PCI: 00:02.0: enabled 1
1666 15:07:36.773145 PCI: 00:04.0: enabled 1
1667 15:07:36.776135 PCI: 00:05.0: enabled 1
1668 15:07:36.779284 PCI: 00:06.0: enabled 0
1669 15:07:36.782772 PCI: 00:07.0: enabled 0
1670 15:07:36.782962 PCI: 00:07.1: enabled 0
1671 15:07:36.785784 PCI: 00:07.2: enabled 0
1672 15:07:36.789518 PCI: 00:07.3: enabled 0
1673 15:07:36.792572 PCI: 00:08.0: enabled 1
1674 15:07:36.792681 PCI: 00:09.0: enabled 0
1675 15:07:36.796259 PCI: 00:0a.0: enabled 0
1676 15:07:36.799280 PCI: 00:0d.0: enabled 1
1677 15:07:36.802551 PCI: 00:0d.1: enabled 0
1678 15:07:36.802655 PCI: 00:0d.2: enabled 0
1679 15:07:36.805702 PCI: 00:0d.3: enabled 0
1680 15:07:36.809513 PCI: 00:0e.0: enabled 0
1681 15:07:36.809610 PCI: 00:10.2: enabled 1
1682 15:07:36.812921 PCI: 00:10.6: enabled 0
1683 15:07:36.816069 PCI: 00:10.7: enabled 0
1684 15:07:36.819256 PCI: 00:12.0: enabled 0
1685 15:07:36.819374 PCI: 00:12.6: enabled 0
1686 15:07:36.822751 PCI: 00:13.0: enabled 0
1687 15:07:36.825808 PCI: 00:14.0: enabled 1
1688 15:07:36.829416 PCI: 00:14.1: enabled 0
1689 15:07:36.829538 PCI: 00:14.2: enabled 1
1690 15:07:36.832374 PCI: 00:14.3: enabled 1
1691 15:07:36.836020 PCI: 00:15.0: enabled 1
1692 15:07:36.839074 PCI: 00:15.1: enabled 1
1693 15:07:36.839166 PCI: 00:15.2: enabled 1
1694 15:07:36.842484 PCI: 00:15.3: enabled 1
1695 15:07:36.845622 PCI: 00:16.0: enabled 1
1696 15:07:36.845715 PCI: 00:16.1: enabled 0
1697 15:07:36.849114 PCI: 00:16.2: enabled 0
1698 15:07:36.852518 PCI: 00:16.3: enabled 0
1699 15:07:36.855794 PCI: 00:16.4: enabled 0
1700 15:07:36.855887 PCI: 00:16.5: enabled 0
1701 15:07:36.858804 PCI: 00:17.0: enabled 0
1702 15:07:36.862484 PCI: 00:19.0: enabled 0
1703 15:07:36.865678 PCI: 00:19.1: enabled 1
1704 15:07:36.865772 PCI: 00:19.2: enabled 0
1705 15:07:36.869567 PCI: 00:1c.0: enabled 1
1706 15:07:36.872174 PCI: 00:1c.1: enabled 0
1707 15:07:36.875818 PCI: 00:1c.2: enabled 0
1708 15:07:36.875930 PCI: 00:1c.3: enabled 0
1709 15:07:36.878948 PCI: 00:1c.4: enabled 0
1710 15:07:36.882887 PCI: 00:1c.5: enabled 0
1711 15:07:36.885643 PCI: 00:1c.6: enabled 1
1712 15:07:36.885737 PCI: 00:1c.7: enabled 0
1713 15:07:36.888898 PCI: 00:1d.0: enabled 1
1714 15:07:36.892492 PCI: 00:1d.1: enabled 0
1715 15:07:36.892587 PCI: 00:1d.2: enabled 1
1716 15:07:36.895698 PCI: 00:1d.3: enabled 0
1717 15:07:36.898835 PCI: 00:1e.0: enabled 1
1718 15:07:36.902213 PCI: 00:1e.1: enabled 0
1719 15:07:36.902307 PCI: 00:1e.2: enabled 1
1720 15:07:36.905684 PCI: 00:1e.3: enabled 1
1721 15:07:36.909012 PCI: 00:1f.0: enabled 1
1722 15:07:36.912185 PCI: 00:1f.1: enabled 0
1723 15:07:36.912279 PCI: 00:1f.2: enabled 1
1724 15:07:36.915371 PCI: 00:1f.3: enabled 1
1725 15:07:36.918778 PCI: 00:1f.4: enabled 0
1726 15:07:36.922115 PCI: 00:1f.5: enabled 1
1727 15:07:36.922210 PCI: 00:1f.6: enabled 0
1728 15:07:36.925535 PCI: 00:1f.7: enabled 0
1729 15:07:36.929027 APIC: 00: enabled 1
1730 15:07:36.929120 GENERIC: 0.0: enabled 1
1731 15:07:36.932430 GENERIC: 0.0: enabled 1
1732 15:07:36.935639 GENERIC: 1.0: enabled 1
1733 15:07:36.938677 GENERIC: 0.0: enabled 1
1734 15:07:36.938771 GENERIC: 1.0: enabled 1
1735 15:07:36.942508 USB0 port 0: enabled 1
1736 15:07:36.945422 GENERIC: 0.0: enabled 1
1737 15:07:36.945517 USB0 port 0: enabled 1
1738 15:07:36.948737 GENERIC: 0.0: enabled 1
1739 15:07:36.951781 I2C: 00:1a: enabled 1
1740 15:07:36.955146 I2C: 00:31: enabled 1
1741 15:07:36.955232 I2C: 00:32: enabled 1
1742 15:07:36.958650 I2C: 00:10: enabled 1
1743 15:07:36.962115 I2C: 00:15: enabled 1
1744 15:07:36.962232 GENERIC: 0.0: enabled 0
1745 15:07:36.965060 GENERIC: 1.0: enabled 0
1746 15:07:36.968394 GENERIC: 0.0: enabled 1
1747 15:07:36.968517 SPI: 00: enabled 1
1748 15:07:36.971862 SPI: 00: enabled 1
1749 15:07:36.974993 PNP: 0c09.0: enabled 1
1750 15:07:36.975087 GENERIC: 0.0: enabled 1
1751 15:07:36.978711 USB3 port 0: enabled 1
1752 15:07:36.981907 USB3 port 1: enabled 1
1753 15:07:36.985115 USB3 port 2: enabled 0
1754 15:07:36.985243 USB3 port 3: enabled 0
1755 15:07:36.988193 USB2 port 0: enabled 0
1756 15:07:36.991961 USB2 port 1: enabled 1
1757 15:07:36.992048 USB2 port 2: enabled 1
1758 15:07:36.995194 USB2 port 3: enabled 0
1759 15:07:36.998557 USB2 port 4: enabled 1
1760 15:07:36.998679 USB2 port 5: enabled 0
1761 15:07:37.001718 USB2 port 6: enabled 0
1762 15:07:37.004987 USB2 port 7: enabled 0
1763 15:07:37.008932 USB2 port 8: enabled 0
1764 15:07:37.009028 USB2 port 9: enabled 0
1765 15:07:37.011985 USB3 port 0: enabled 0
1766 15:07:37.014949 USB3 port 1: enabled 1
1767 15:07:37.015046 USB3 port 2: enabled 0
1768 15:07:37.018490 USB3 port 3: enabled 0
1769 15:07:37.021556 GENERIC: 0.0: enabled 1
1770 15:07:37.024796 GENERIC: 1.0: enabled 1
1771 15:07:37.024884 APIC: 01: enabled 1
1772 15:07:37.028304 APIC: 03: enabled 1
1773 15:07:37.028390 APIC: 05: enabled 1
1774 15:07:37.031706 APIC: 07: enabled 1
1775 15:07:37.035549 APIC: 06: enabled 1
1776 15:07:37.035637 APIC: 02: enabled 1
1777 15:07:37.038402 APIC: 04: enabled 1
1778 15:07:37.041479 PCI: 01:00.0: enabled 1
1779 15:07:37.045084 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1780 15:07:37.051725 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1781 15:07:37.054701 ELOG: NV offset 0xf30000 size 0x1000
1782 15:07:37.061494 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1783 15:07:37.068226 ELOG: Event(17) added with size 13 at 2023-06-09 15:07:37 UTC
1784 15:07:37.074815 ELOG: Event(92) added with size 9 at 2023-06-09 15:07:37 UTC
1785 15:07:37.081313 ELOG: Event(93) added with size 9 at 2023-06-09 15:07:37 UTC
1786 15:07:37.087870 ELOG: Event(9E) added with size 10 at 2023-06-09 15:07:37 UTC
1787 15:07:37.094513 ELOG: Event(9F) added with size 14 at 2023-06-09 15:07:37 UTC
1788 15:07:37.101253 ELOG: Event(9F) added with size 14 at 2023-06-09 15:07:37 UTC
1789 15:07:37.104363 BS: BS_DEV_INIT exit times (exec / console): 3 / 51 ms
1790 15:07:37.111183 ELOG: Event(A1) added with size 10 at 2023-06-09 15:07:37 UTC
1791 15:07:37.117792 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1792 15:07:37.124558 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1793 15:07:37.127795 Finalize devices...
1794 15:07:37.127905 Devices finalized
1795 15:07:37.134276 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1796 15:07:37.137657 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1797 15:07:37.144429 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1798 15:07:37.151321 ME: HFSTS1 : 0x80030055
1799 15:07:37.154414 ME: HFSTS2 : 0x30280116
1800 15:07:37.157363 ME: HFSTS3 : 0x00000050
1801 15:07:37.164303 ME: HFSTS4 : 0x00004000
1802 15:07:37.167635 ME: HFSTS5 : 0x00000000
1803 15:07:37.170717 ME: HFSTS6 : 0x00400006
1804 15:07:37.173816 ME: Manufacturing Mode : YES
1805 15:07:37.180858 ME: SPI Protection Mode Enabled : NO
1806 15:07:37.183976 ME: FW Partition Table : OK
1807 15:07:37.187242 ME: Bringup Loader Failure : NO
1808 15:07:37.190489 ME: Firmware Init Complete : NO
1809 15:07:37.193988 ME: Boot Options Present : NO
1810 15:07:37.197193 ME: Update In Progress : NO
1811 15:07:37.200691 ME: D0i3 Support : YES
1812 15:07:37.203885 ME: Low Power State Enabled : NO
1813 15:07:37.210798 ME: CPU Replaced : YES
1814 15:07:37.213727 ME: CPU Replacement Valid : YES
1815 15:07:37.217151 ME: Current Working State : 5
1816 15:07:37.220436 ME: Current Operation State : 1
1817 15:07:37.223889 ME: Current Operation Mode : 3
1818 15:07:37.227193 ME: Error Code : 0
1819 15:07:37.230140 ME: Enhanced Debug Mode : NO
1820 15:07:37.233717 ME: CPU Debug Disabled : YES
1821 15:07:37.237086 ME: TXT Support : NO
1822 15:07:37.243922 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1823 15:07:37.253709 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1824 15:07:37.256749 CBFS: 'fallback/slic' not found.
1825 15:07:37.260367 ACPI: Writing ACPI tables at 76b01000.
1826 15:07:37.260487 ACPI: * FACS
1827 15:07:37.263294 ACPI: * DSDT
1828 15:07:37.266820 Ramoops buffer: 0x100000@0x76a00000.
1829 15:07:37.270151 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1830 15:07:37.276889 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1831 15:07:37.279888 Google Chrome EC: version:
1832 15:07:37.283101 ro: voema_v2.0.7540-147f8d37d1
1833 15:07:37.286619 rw: voema_v2.0.7540-147f8d37d1
1834 15:07:37.286706 running image: 2
1835 15:07:37.293407 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1836 15:07:37.298288 ACPI: * FADT
1837 15:07:37.298380 SCI is IRQ9
1838 15:07:37.305195 ACPI: added table 1/32, length now 40
1839 15:07:37.305286 ACPI: * SSDT
1840 15:07:37.308600 Found 1 CPU(s) with 8 core(s) each.
1841 15:07:37.315089 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1842 15:07:37.318295 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1843 15:07:37.321893 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1844 15:07:37.324834 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1845 15:07:37.331785 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1846 15:07:37.338318 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1847 15:07:37.341436 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1848 15:07:37.348356 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1849 15:07:37.354737 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1850 15:07:37.358394 \_SB.PCI0.RP09: Added StorageD3Enable property
1851 15:07:37.361667 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1852 15:07:37.368295 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1853 15:07:37.374834 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1854 15:07:37.377956 PS2K: Passing 80 keymaps to kernel
1855 15:07:37.384474 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1856 15:07:37.391564 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1857 15:07:37.397808 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1858 15:07:37.404247 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1859 15:07:37.411351 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1860 15:07:37.417897 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1861 15:07:37.424276 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1862 15:07:37.431262 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1863 15:07:37.434454 ACPI: added table 2/32, length now 44
1864 15:07:37.437567 ACPI: * MCFG
1865 15:07:37.441342 ACPI: added table 3/32, length now 48
1866 15:07:37.441424 ACPI: * TPM2
1867 15:07:37.444628 TPM2 log created at 0x769f0000
1868 15:07:37.447532 ACPI: added table 4/32, length now 52
1869 15:07:37.451262 ACPI: * MADT
1870 15:07:37.451373 SCI is IRQ9
1871 15:07:37.454439 ACPI: added table 5/32, length now 56
1872 15:07:37.457675 current = 76b09850
1873 15:07:37.457760 ACPI: * DMAR
1874 15:07:37.464595 ACPI: added table 6/32, length now 60
1875 15:07:37.467558 ACPI: added table 7/32, length now 64
1876 15:07:37.467635 ACPI: * HPET
1877 15:07:37.471308 ACPI: added table 8/32, length now 68
1878 15:07:37.474451 ACPI: done.
1879 15:07:37.474545 ACPI tables: 35216 bytes.
1880 15:07:37.477657 smbios_write_tables: 769ef000
1881 15:07:37.480888 EC returned error result code 3
1882 15:07:37.484515 Couldn't obtain OEM name from CBI
1883 15:07:37.488140 Create SMBIOS type 16
1884 15:07:37.491435 Create SMBIOS type 17
1885 15:07:37.495034 GENERIC: 0.0 (WIFI Device)
1886 15:07:37.495125 SMBIOS tables: 1750 bytes.
1887 15:07:37.501346 Writing table forward entry at 0x00000500
1888 15:07:37.508446 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1889 15:07:37.511510 Writing coreboot table at 0x76b25000
1890 15:07:37.518227 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1891 15:07:37.521069 1. 0000000000001000-000000000009ffff: RAM
1892 15:07:37.524689 2. 00000000000a0000-00000000000fffff: RESERVED
1893 15:07:37.531255 3. 0000000000100000-00000000769eefff: RAM
1894 15:07:37.534733 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1895 15:07:37.541241 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1896 15:07:37.547939 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1897 15:07:37.551008 7. 0000000077000000-000000007fbfffff: RESERVED
1898 15:07:37.554929 8. 00000000c0000000-00000000cfffffff: RESERVED
1899 15:07:37.561082 9. 00000000f8000000-00000000f9ffffff: RESERVED
1900 15:07:37.564291 10. 00000000fb000000-00000000fb000fff: RESERVED
1901 15:07:37.571059 11. 00000000fe000000-00000000fe00ffff: RESERVED
1902 15:07:37.574635 12. 00000000fed80000-00000000fed87fff: RESERVED
1903 15:07:37.580734 13. 00000000fed90000-00000000fed92fff: RESERVED
1904 15:07:37.584423 14. 00000000feda0000-00000000feda1fff: RESERVED
1905 15:07:37.591171 15. 00000000fedc0000-00000000feddffff: RESERVED
1906 15:07:37.594649 16. 0000000100000000-00000002803fffff: RAM
1907 15:07:37.597303 Passing 4 GPIOs to payload:
1908 15:07:37.600978 NAME | PORT | POLARITY | VALUE
1909 15:07:37.607842 lid | undefined | high | high
1910 15:07:37.610884 power | undefined | high | low
1911 15:07:37.617390 oprom | undefined | high | low
1912 15:07:37.624229 EC in RW | 0x000000e5 | high | high
1913 15:07:37.630986 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2335
1914 15:07:37.631081 coreboot table: 1576 bytes.
1915 15:07:37.637286 IMD ROOT 0. 0x76fff000 0x00001000
1916 15:07:37.641066 IMD SMALL 1. 0x76ffe000 0x00001000
1917 15:07:37.644122 FSP MEMORY 2. 0x76c4e000 0x003b0000
1918 15:07:37.647257 VPD 3. 0x76c4d000 0x00000367
1919 15:07:37.650888 RO MCACHE 4. 0x76c4c000 0x00000fdc
1920 15:07:37.654043 CONSOLE 5. 0x76c2c000 0x00020000
1921 15:07:37.657256 FMAP 6. 0x76c2b000 0x00000578
1922 15:07:37.660907 TIME STAMP 7. 0x76c2a000 0x00000910
1923 15:07:37.667715 VBOOT WORK 8. 0x76c16000 0x00014000
1924 15:07:37.670928 ROMSTG STCK 9. 0x76c15000 0x00001000
1925 15:07:37.673802 AFTER CAR 10. 0x76c0a000 0x0000b000
1926 15:07:37.677592 RAMSTAGE 11. 0x76b97000 0x00073000
1927 15:07:37.680626 REFCODE 12. 0x76b42000 0x00055000
1928 15:07:37.684269 SMM BACKUP 13. 0x76b32000 0x00010000
1929 15:07:37.687563 4f444749 14. 0x76b30000 0x00002000
1930 15:07:37.690362 EXT VBT15. 0x76b2d000 0x0000219f
1931 15:07:37.693781 COREBOOT 16. 0x76b25000 0x00008000
1932 15:07:37.700403 ACPI 17. 0x76b01000 0x00024000
1933 15:07:37.703656 ACPI GNVS 18. 0x76b00000 0x00001000
1934 15:07:37.707208 RAMOOPS 19. 0x76a00000 0x00100000
1935 15:07:37.710342 TPM2 TCGLOG20. 0x769f0000 0x00010000
1936 15:07:37.713681 SMBIOS 21. 0x769ef000 0x00000800
1937 15:07:37.717096 IMD small region:
1938 15:07:37.720564 IMD ROOT 0. 0x76ffec00 0x00000400
1939 15:07:37.723972 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1940 15:07:37.726979 POWER STATE 2. 0x76ffeb80 0x00000044
1941 15:07:37.730040 ROMSTAGE 3. 0x76ffeb60 0x00000004
1942 15:07:37.733531 MEM INFO 4. 0x76ffe980 0x000001e0
1943 15:07:37.740205 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1944 15:07:37.743375 MTRR: Physical address space:
1945 15:07:37.750269 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1946 15:07:37.757008 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1947 15:07:37.763422 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1948 15:07:37.770149 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1949 15:07:37.776802 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1950 15:07:37.780598 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1951 15:07:37.786762 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1952 15:07:37.793102 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 15:07:37.796710 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 15:07:37.800074 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 15:07:37.803133 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 15:07:37.809733 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 15:07:37.813634 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 15:07:37.816412 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 15:07:37.820205 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 15:07:37.823064 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 15:07:37.830142 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 15:07:37.833337 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 15:07:37.837024 call enable_fixed_mtrr()
1964 15:07:37.839787 CPU physical address size: 39 bits
1965 15:07:37.842970 MTRR: default type WB/UC MTRR counts: 6/6.
1966 15:07:37.850006 MTRR: UC selected as default type.
1967 15:07:37.853190 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1968 15:07:37.860058 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1969 15:07:37.866266 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1970 15:07:37.873067 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1971 15:07:37.880004 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1972 15:07:37.886095 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1973 15:07:37.886189
1974 15:07:37.889717 MTRR check
1975 15:07:37.889810 Fixed MTRRs : Enabled
1976 15:07:37.893077 Variable MTRRs: Enabled
1977 15:07:37.893169
1978 15:07:37.896075 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 15:07:37.902881 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 15:07:37.906172 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 15:07:37.909751 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 15:07:37.912582 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 15:07:37.919191 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 15:07:37.922704 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 15:07:37.925934 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 15:07:37.928982 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 15:07:37.936107 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 15:07:37.939266 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 15:07:37.945806 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1990 15:07:37.949301 call enable_fixed_mtrr()
1991 15:07:37.952768 Checking cr50 for pending updates
1992 15:07:37.956675 CPU physical address size: 39 bits
1993 15:07:37.960267 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 15:07:37.963094 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 15:07:37.966158 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 15:07:37.969878 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 15:07:37.976480 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 15:07:37.979538 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 15:07:37.983315 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 15:07:37.986361 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 15:07:37.992715 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 15:07:37.996382 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 15:07:37.999575 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 15:07:38.003054 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 15:07:38.010602 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 15:07:38.010698 call enable_fixed_mtrr()
2007 15:07:38.016735 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 15:07:38.020338 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 15:07:38.023539 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 15:07:38.027236 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 15:07:38.033987 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 15:07:38.037072 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 15:07:38.040182 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 15:07:38.043614 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 15:07:38.050165 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 15:07:38.053458 CPU physical address size: 39 bits
2017 15:07:38.057134 call enable_fixed_mtrr()
2018 15:07:38.060383 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 15:07:38.063514 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 15:07:38.070146 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 15:07:38.073242 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 15:07:38.077197 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 15:07:38.080196 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 15:07:38.086840 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 15:07:38.089878 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 15:07:38.093490 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 15:07:38.096581 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 15:07:38.103605 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 15:07:38.106650 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 15:07:38.110445 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 15:07:38.116669 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 15:07:38.119743 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 15:07:38.123463 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 15:07:38.127116 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 15:07:38.132885 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 15:07:38.136737 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 15:07:38.139850 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 15:07:38.143626 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 15:07:38.146453 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 15:07:38.153256 call enable_fixed_mtrr()
2041 15:07:38.153350 call enable_fixed_mtrr()
2042 15:07:38.159838 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 15:07:38.162976 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 15:07:38.166224 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 15:07:38.169652 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 15:07:38.172830 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 15:07:38.179403 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 15:07:38.183421 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 15:07:38.186440 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 15:07:38.189561 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 15:07:38.196226 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 15:07:38.199535 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 15:07:38.202607 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 15:07:38.209472 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 15:07:38.213048 MTRR: Fixed MSR 0x259 0x0000000000000000
2056 15:07:38.216236 MTRR: Fixed MSR 0x268 0x0606060606060606
2057 15:07:38.219432 MTRR: Fixed MSR 0x269 0x0606060606060606
2058 15:07:38.225916 MTRR: Fixed MSR 0x26a 0x0606060606060606
2059 15:07:38.229347 MTRR: Fixed MSR 0x26b 0x0606060606060606
2060 15:07:38.232623 MTRR: Fixed MSR 0x26c 0x0606060606060606
2061 15:07:38.236194 MTRR: Fixed MSR 0x26d 0x0606060606060606
2062 15:07:38.242481 MTRR: Fixed MSR 0x26e 0x0606060606060606
2063 15:07:38.245944 MTRR: Fixed MSR 0x26f 0x0606060606060606
2064 15:07:38.249091 call enable_fixed_mtrr()
2065 15:07:38.253485 call enable_fixed_mtrr()
2066 15:07:38.253576 Reading cr50 TPM mode
2067 15:07:38.258388 CPU physical address size: 39 bits
2068 15:07:38.261231 CPU physical address size: 39 bits
2069 15:07:38.264746 CPU physical address size: 39 bits
2070 15:07:38.271387 BS: BS_PAYLOAD_LOAD entry times (exec / console): 307 / 6 ms
2071 15:07:38.274394 CPU physical address size: 39 bits
2072 15:07:38.277994 CPU physical address size: 39 bits
2073 15:07:38.287914 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2074 15:07:38.290915 Checking segment from ROM address 0xffc02b38
2075 15:07:38.297381 Checking segment from ROM address 0xffc02b54
2076 15:07:38.301053 Loading segment from ROM address 0xffc02b38
2077 15:07:38.304258 code (compression=0)
2078 15:07:38.310636 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2079 15:07:38.320851 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2080 15:07:38.320949 it's not compressed!
2081 15:07:38.461257 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2082 15:07:38.467867 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2083 15:07:38.474713 Loading segment from ROM address 0xffc02b54
2084 15:07:38.475335 Entry Point 0x30000000
2085 15:07:38.477804 Loaded segments
2086 15:07:38.484739 BS: BS_PAYLOAD_LOAD run times (exec / console): 143 / 63 ms
2087 15:07:38.527513 Finalizing chipset.
2088 15:07:38.530454 Finalizing SMM.
2089 15:07:38.530550 APMC done.
2090 15:07:38.536821 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2091 15:07:38.540511 mp_park_aps done after 0 msecs.
2092 15:07:38.543359 Jumping to boot code at 0x30000000(0x76b25000)
2093 15:07:38.553987 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2094 15:07:38.554085
2095 15:07:38.554159
2096 15:07:38.554225
2097 15:07:38.556901 Starting depthcharge on Voema...
2098 15:07:38.556995
2099 15:07:38.557355 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2100 15:07:38.557464 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2101 15:07:38.557561 Setting prompt string to ['volteer:']
2102 15:07:38.557645 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2103 15:07:38.566743 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2104 15:07:38.566839
2105 15:07:38.573459 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2106 15:07:38.573553
2107 15:07:38.577002 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2108 15:07:38.580152
2109 15:07:38.583291 Failed to find eMMC card reader
2110 15:07:38.583382
2111 15:07:38.583453 Wipe memory regions:
2112 15:07:38.583518
2113 15:07:38.590277 [0x00000000001000, 0x000000000a0000)
2114 15:07:38.590368
2115 15:07:38.593081 [0x00000000100000, 0x00000030000000)
2116 15:07:38.618149
2117 15:07:38.621342 [0x00000032662db0, 0x000000769ef000)
2118 15:07:38.656438
2119 15:07:38.660016 [0x00000100000000, 0x00000280400000)
2120 15:07:38.860146
2121 15:07:38.863320 ec_init: CrosEC protocol v3 supported (256, 256)
2122 15:07:38.863421
2123 15:07:38.870448 update_port_state: port C0 state: usb enable 1 mux conn 0
2124 15:07:38.870540
2125 15:07:38.877235 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2126 15:07:38.881666
2127 15:07:38.884801 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2128 15:07:38.884892
2129 15:07:38.887842 send_conn_disc_msg: pmc_send_cmd succeeded
2130 15:07:39.320743
2131 15:07:39.320919 R8152: Initializing
2132 15:07:39.321032
2133 15:07:39.323813 Version 6 (ocp_data = 5c30)
2134 15:07:39.323932
2135 15:07:39.327311 R8152: Done initializing
2136 15:07:39.327409
2137 15:07:39.330309 Adding net device
2138 15:07:39.631541
2139 15:07:39.634729 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2140 15:07:39.634825
2141 15:07:39.634905
2142 15:07:39.634974
2143 15:07:39.638116 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2145 15:07:39.738474 volteer: tftpboot 192.168.201.1 10660926/tftp-deploy-za4m9o1w/kernel/bzImage 10660926/tftp-deploy-za4m9o1w/kernel/cmdline 10660926/tftp-deploy-za4m9o1w/ramdisk/ramdisk.cpio.gz
2146 15:07:39.738648 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2147 15:07:39.738754 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2148 15:07:39.742750 tftpboot 192.168.201.1 10660926/tftp-deploy-za4m9o1w/kernel/bzImploy-za4m9o1w/kernel/cmdline 10660926/tftp-deploy-za4m9o1w/ramdisk/ramdisk.cpio.gz
2149 15:07:39.742857
2150 15:07:39.742932 Waiting for link
2151 15:07:39.946256
2152 15:07:39.946396 done.
2153 15:07:39.946473
2154 15:07:39.946543 MAC: 00:24:32:30:7b:87
2155 15:07:39.946610
2156 15:07:39.949241 Sending DHCP discover... done.
2157 15:07:39.949331
2158 15:07:39.952608 Waiting for reply... done.
2159 15:07:39.952701
2160 15:07:39.956086 Sending DHCP request... done.
2161 15:07:39.956183
2162 15:07:39.963978 Waiting for reply... done.
2163 15:07:39.964074
2164 15:07:39.964147 My ip is 192.168.201.19
2165 15:07:39.964216
2166 15:07:39.967557 The DHCP server ip is 192.168.201.1
2167 15:07:39.971039
2168 15:07:39.973863 TFTP server IP predefined by user: 192.168.201.1
2169 15:07:39.973958
2170 15:07:39.980847 Bootfile predefined by user: 10660926/tftp-deploy-za4m9o1w/kernel/bzImage
2171 15:07:39.980943
2172 15:07:39.984103 Sending tftp read request... done.
2173 15:07:39.984209
2174 15:07:39.987030 Waiting for the transfer...
2175 15:07:39.990600
2176 15:07:40.666221 00000000 ################################################################
2177 15:07:40.666359
2178 15:07:41.323661 00080000 ################################################################
2179 15:07:41.323800
2180 15:07:41.918002 00100000 ################################################################
2181 15:07:41.918152
2182 15:07:42.435508 00180000 ################################################################
2183 15:07:42.435653
2184 15:07:42.946577 00200000 ################################################################
2185 15:07:42.946728
2186 15:07:43.455935 00280000 ################################################################
2187 15:07:43.456081
2188 15:07:43.965900 00300000 ################################################################
2189 15:07:43.966048
2190 15:07:44.479152 00380000 ################################################################
2191 15:07:44.479326
2192 15:07:44.992722 00400000 ################################################################
2193 15:07:44.992908
2194 15:07:45.517527 00480000 ################################################################
2195 15:07:45.517674
2196 15:07:46.046995 00500000 ################################################################
2197 15:07:46.047144
2198 15:07:46.574818 00580000 ################################################################
2199 15:07:46.574967
2200 15:07:47.085846 00600000 ################################################################
2201 15:07:47.085995
2202 15:07:47.600225 00680000 ################################################################
2203 15:07:47.600395
2204 15:07:48.122476 00700000 ################################################################
2205 15:07:48.122646
2206 15:07:48.634151 00780000 ################################################################
2207 15:07:48.634311
2208 15:07:49.175024 00800000 ################################################################
2209 15:07:49.175202
2210 15:07:49.694892 00880000 ################################################################
2211 15:07:49.695066
2212 15:07:50.220264 00900000 ################################################################
2213 15:07:50.220415
2214 15:07:50.769065 00980000 ################################################################
2215 15:07:50.769205
2216 15:07:51.158530 00a00000 ############################################## done.
2217 15:07:51.158668
2218 15:07:51.161898 The bootfile was 10858496 bytes long.
2219 15:07:51.162000
2220 15:07:51.165311 Sending tftp read request... done.
2221 15:07:51.165407
2222 15:07:51.168530 Waiting for the transfer...
2223 15:07:51.168617
2224 15:07:51.697327 00000000 ################################################################
2225 15:07:51.697471
2226 15:07:52.222820 00080000 ################################################################
2227 15:07:52.222961
2228 15:07:52.757261 00100000 ################################################################
2229 15:07:52.757407
2230 15:07:53.309416 00180000 ################################################################
2231 15:07:53.309561
2232 15:07:53.841595 00200000 ################################################################
2233 15:07:53.841792
2234 15:07:54.387397 00280000 ################################################################
2235 15:07:54.387564
2236 15:07:54.947413 00300000 ################################################################
2237 15:07:54.947554
2238 15:07:55.485748 00380000 ################################################################
2239 15:07:55.485890
2240 15:07:56.055353 00400000 ################################################################
2241 15:07:56.055494
2242 15:07:56.620047 00480000 ################################################################
2243 15:07:56.620194
2244 15:07:57.180142 00500000 ################################################################
2245 15:07:57.180295
2246 15:07:57.746146 00580000 ################################################################
2247 15:07:57.746319
2248 15:07:58.301795 00600000 ################################################################
2249 15:07:58.301940
2250 15:07:58.866751 00680000 ################################################################
2251 15:07:58.866929
2252 15:07:59.403040 00700000 ################################################################
2253 15:07:59.403194
2254 15:07:59.961027 00780000 ################################################################
2255 15:07:59.961177
2256 15:08:00.509399 00800000 ################################################################
2257 15:08:00.509555
2258 15:08:00.836612 00880000 ###################################### done.
2259 15:08:00.836759
2260 15:08:00.840337 Sending tftp read request... done.
2261 15:08:00.840432
2262 15:08:00.843369 Waiting for the transfer...
2263 15:08:00.843462
2264 15:08:00.843534 00000000 # done.
2265 15:08:00.843605
2266 15:08:00.853379 Command line loaded dynamically from TFTP file: 10660926/tftp-deploy-za4m9o1w/kernel/cmdline
2267 15:08:00.853503
2268 15:08:00.866224 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2269 15:08:00.870778
2270 15:08:00.874425 Shutting down all USB controllers.
2271 15:08:00.874518
2272 15:08:00.874590 Removing current net device
2273 15:08:00.874657
2274 15:08:00.877453 Finalizing coreboot
2275 15:08:00.877545
2276 15:08:00.884049 Exiting depthcharge with code 4 at timestamp: 30979398
2277 15:08:00.884141
2278 15:08:00.884213
2279 15:08:00.884280 Starting kernel ...
2280 15:08:00.884357
2281 15:08:00.884421
2282 15:08:00.884816 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2283 15:08:00.884920 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2284 15:08:00.885002 Setting prompt string to ['Linux version [0-9]']
2285 15:08:00.885076 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2286 15:08:00.885149 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2288 15:12:22.885764 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2290 15:12:22.886876 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2292 15:12:22.887786 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2295 15:12:22.889566 end: 2 depthcharge-action (duration 00:05:00) [common]
2297 15:12:22.890889 Cleaning after the job
2298 15:12:22.891328 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660926/tftp-deploy-za4m9o1w/ramdisk
2299 15:12:22.896551 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660926/tftp-deploy-za4m9o1w/kernel
2300 15:12:22.902370 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660926/tftp-deploy-za4m9o1w/modules
2301 15:12:22.905063 start: 5.1 power-off (timeout 00:00:30) [common]
2302 15:12:22.906018 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=off'
2303 15:12:23.018838 >> Command sent successfully.
2304 15:12:23.029562 Returned 0 in 0 seconds
2305 15:12:23.130755 end: 5.1 power-off (duration 00:00:00) [common]
2307 15:12:23.132219 start: 5.2 read-feedback (timeout 00:10:00) [common]
2308 15:12:23.133546 Listened to connection for namespace 'common' for up to 1s
2309 15:12:24.134170 Finalising connection for namespace 'common'
2310 15:12:24.134819 Disconnecting from shell: Finalise
2311 15:12:24.135222
2312 15:12:24.236153 end: 5.2 read-feedback (duration 00:00:01) [common]
2313 15:12:24.236757 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10660926
2314 15:12:24.284581 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10660926
2315 15:12:24.284810 JobError: Your job cannot terminate cleanly.