Boot log: asus-cx9400-volteer

    1 15:07:28.499218  lava-dispatcher, installed at version: 2023.05.1
    2 15:07:28.499427  start: 0 validate
    3 15:07:28.499555  Start time: 2023-06-09 15:07:28.499547+00:00 (UTC)
    4 15:07:28.499683  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:07:28.499812  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
    6 15:07:28.768460  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:07:28.768676  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.284-cip99%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:07:32.772863  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:07:32.773800  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 15:07:32.779642  Using caching service: 'http://localhost/cache/?uri=%s'
   11 15:07:32.780375  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.284-cip99%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 15:07:35.286341  validate duration: 6.79
   14 15:07:35.286598  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 15:07:35.286694  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 15:07:35.286800  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 15:07:35.286934  Not decompressing ramdisk as can be used compressed.
   18 15:07:35.287019  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/initrd.cpio.gz
   19 15:07:35.287085  saving as /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/ramdisk/initrd.cpio.gz
   20 15:07:35.287182  total size: 5432865 (5MB)
   21 15:07:35.288335  progress   0% (0MB)
   22 15:07:35.289966  progress   5% (0MB)
   23 15:07:35.291452  progress  10% (0MB)
   24 15:07:35.292902  progress  15% (0MB)
   25 15:07:35.294466  progress  20% (1MB)
   26 15:07:35.296064  progress  25% (1MB)
   27 15:07:35.297481  progress  30% (1MB)
   28 15:07:35.299027  progress  35% (1MB)
   29 15:07:35.300508  progress  40% (2MB)
   30 15:07:35.302011  progress  45% (2MB)
   31 15:07:35.303552  progress  50% (2MB)
   32 15:07:35.305195  progress  55% (2MB)
   33 15:07:35.306582  progress  60% (3MB)
   34 15:07:35.308103  progress  65% (3MB)
   35 15:07:35.309688  progress  70% (3MB)
   36 15:07:35.311060  progress  75% (3MB)
   37 15:07:35.312509  progress  80% (4MB)
   38 15:07:35.313984  progress  85% (4MB)
   39 15:07:35.315649  progress  90% (4MB)
   40 15:07:35.317089  progress  95% (4MB)
   41 15:07:35.318620  progress 100% (5MB)
   42 15:07:35.318832  5MB downloaded in 0.03s (163.71MB/s)
   43 15:07:35.318981  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 15:07:35.319221  end: 1.1 download-retry (duration 00:00:00) [common]
   46 15:07:35.319307  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 15:07:35.319419  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 15:07:35.319584  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.284-cip99/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 15:07:35.319655  saving as /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/kernel/bzImage
   50 15:07:35.319714  total size: 10858496 (10MB)
   51 15:07:35.319796  No compression specified
   52 15:07:35.321008  progress   0% (0MB)
   53 15:07:35.324014  progress   5% (0MB)
   54 15:07:35.327103  progress  10% (1MB)
   55 15:07:35.330127  progress  15% (1MB)
   56 15:07:35.333171  progress  20% (2MB)
   57 15:07:35.336223  progress  25% (2MB)
   58 15:07:35.339298  progress  30% (3MB)
   59 15:07:35.342268  progress  35% (3MB)
   60 15:07:35.345400  progress  40% (4MB)
   61 15:07:35.348564  progress  45% (4MB)
   62 15:07:35.351416  progress  50% (5MB)
   63 15:07:35.354473  progress  55% (5MB)
   64 15:07:35.357455  progress  60% (6MB)
   65 15:07:35.360459  progress  65% (6MB)
   66 15:07:35.363246  progress  70% (7MB)
   67 15:07:35.366351  progress  75% (7MB)
   68 15:07:35.369336  progress  80% (8MB)
   69 15:07:35.372163  progress  85% (8MB)
   70 15:07:35.375081  progress  90% (9MB)
   71 15:07:35.378084  progress  95% (9MB)
   72 15:07:35.381086  progress 100% (10MB)
   73 15:07:35.381260  10MB downloaded in 0.06s (168.27MB/s)
   74 15:07:35.381442  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 15:07:35.381683  end: 1.2 download-retry (duration 00:00:00) [common]
   77 15:07:35.381795  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 15:07:35.381900  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 15:07:35.382035  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/full.rootfs.tar.xz
   80 15:07:35.382105  saving as /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/nfsrootfs/full.rootfs.tar
   81 15:07:35.382176  total size: 133381488 (127MB)
   82 15:07:35.382303  Using unxz to decompress xz
   83 15:07:35.386289  progress   0% (0MB)
   84 15:07:35.736562  progress   5% (6MB)
   85 15:07:36.109504  progress  10% (12MB)
   86 15:07:36.406132  progress  15% (19MB)
   87 15:07:36.599410  progress  20% (25MB)
   88 15:07:36.846995  progress  25% (31MB)
   89 15:07:37.205898  progress  30% (38MB)
   90 15:07:37.563445  progress  35% (44MB)
   91 15:07:37.971458  progress  40% (50MB)
   92 15:07:38.364531  progress  45% (57MB)
   93 15:07:38.734860  progress  50% (63MB)
   94 15:07:39.130294  progress  55% (69MB)
   95 15:07:39.513529  progress  60% (76MB)
   96 15:07:39.888482  progress  65% (82MB)
   97 15:07:40.279357  progress  70% (89MB)
   98 15:07:40.670622  progress  75% (95MB)
   99 15:07:41.114831  progress  80% (101MB)
  100 15:07:41.570546  progress  85% (108MB)
  101 15:07:41.855366  progress  90% (114MB)
  102 15:07:42.214056  progress  95% (120MB)
  103 15:07:42.618722  progress 100% (127MB)
  104 15:07:42.624352  127MB downloaded in 7.24s (17.56MB/s)
  105 15:07:42.624669  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 15:07:42.624941  end: 1.3 download-retry (duration 00:00:07) [common]
  108 15:07:42.625036  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 15:07:42.625126  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 15:07:42.625276  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.284-cip99/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 15:07:42.625348  saving as /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/modules/modules.tar
  112 15:07:42.625411  total size: 483884 (0MB)
  113 15:07:42.625475  Using unxz to decompress xz
  114 15:07:42.629134  progress   6% (0MB)
  115 15:07:42.629538  progress  13% (0MB)
  116 15:07:42.629788  progress  20% (0MB)
  117 15:07:42.631221  progress  27% (0MB)
  118 15:07:42.633425  progress  33% (0MB)
  119 15:07:42.635407  progress  40% (0MB)
  120 15:07:42.637778  progress  47% (0MB)
  121 15:07:42.639859  progress  54% (0MB)
  122 15:07:42.642142  progress  60% (0MB)
  123 15:07:42.644127  progress  67% (0MB)
  124 15:07:42.646269  progress  74% (0MB)
  125 15:07:42.648833  progress  81% (0MB)
  126 15:07:42.650905  progress  88% (0MB)
  127 15:07:42.652825  progress  94% (0MB)
  128 15:07:42.655466  progress 100% (0MB)
  129 15:07:42.662730  0MB downloaded in 0.04s (12.37MB/s)
  130 15:07:42.663170  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 15:07:42.663621  end: 1.4 download-retry (duration 00:00:00) [common]
  133 15:07:42.663777  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  134 15:07:42.663942  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  135 15:07:44.762314  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10660950/extract-nfsrootfs-vv78aa2r
  136 15:07:44.762525  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  137 15:07:44.762631  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  138 15:07:44.762800  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k
  139 15:07:44.762942  makedir: /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin
  140 15:07:44.763049  makedir: /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/tests
  141 15:07:44.763147  makedir: /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/results
  142 15:07:44.763251  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-add-keys
  143 15:07:44.763393  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-add-sources
  144 15:07:44.763524  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-background-process-start
  145 15:07:44.763651  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-background-process-stop
  146 15:07:44.763775  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-common-functions
  147 15:07:44.763908  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-echo-ipv4
  148 15:07:44.764212  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-install-packages
  149 15:07:44.764346  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-installed-packages
  150 15:07:44.764469  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-os-build
  151 15:07:44.764593  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-probe-channel
  152 15:07:44.764719  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-probe-ip
  153 15:07:44.764864  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-target-ip
  154 15:07:44.765021  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-target-mac
  155 15:07:44.765147  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-target-storage
  156 15:07:44.765274  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-test-case
  157 15:07:44.765399  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-test-event
  158 15:07:44.765523  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-test-feedback
  159 15:07:44.765645  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-test-raise
  160 15:07:44.765770  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-test-reference
  161 15:07:44.765893  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-test-runner
  162 15:07:44.766018  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-test-set
  163 15:07:44.766140  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-test-shell
  164 15:07:44.766264  Updating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-install-packages (oe)
  165 15:07:44.766417  Updating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/bin/lava-installed-packages (oe)
  166 15:07:44.766549  Creating /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/environment
  167 15:07:44.766651  LAVA metadata
  168 15:07:44.766724  - LAVA_JOB_ID=10660950
  169 15:07:44.766790  - LAVA_DISPATCHER_IP=192.168.201.1
  170 15:07:44.766902  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  171 15:07:44.766971  skipped lava-vland-overlay
  172 15:07:44.767049  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 15:07:44.767130  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  174 15:07:44.767193  skipped lava-multinode-overlay
  175 15:07:44.767268  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 15:07:44.767348  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  177 15:07:44.767425  Loading test definitions
  178 15:07:44.767518  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  179 15:07:44.767591  Using /lava-10660950 at stage 0
  180 15:07:44.767906  uuid=10660950_1.5.2.3.1 testdef=None
  181 15:07:44.767999  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  182 15:07:44.768086  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  183 15:07:44.768593  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  185 15:07:44.768832  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  186 15:07:44.769468  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  188 15:07:44.769708  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  189 15:07:44.770323  runner path: /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/0/tests/0_dmesg test_uuid 10660950_1.5.2.3.1
  190 15:07:44.770479  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  192 15:07:44.770708  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  193 15:07:44.770780  Using /lava-10660950 at stage 1
  194 15:07:44.771071  uuid=10660950_1.5.2.3.5 testdef=None
  195 15:07:44.771160  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  196 15:07:44.771246  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  197 15:07:44.771706  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  199 15:07:44.771948  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  200 15:07:44.772591  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  202 15:07:44.772823  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  203 15:07:44.773443  runner path: /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/1/tests/1_bootrr test_uuid 10660950_1.5.2.3.5
  204 15:07:44.773596  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  206 15:07:44.773803  Creating lava-test-runner.conf files
  207 15:07:44.773868  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/0 for stage 0
  208 15:07:44.773958  - 0_dmesg
  209 15:07:44.774039  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10660950/lava-overlay-ep3yv49k/lava-10660950/1 for stage 1
  210 15:07:44.774129  - 1_bootrr
  211 15:07:44.774225  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  212 15:07:44.774311  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  213 15:07:44.781582  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  214 15:07:44.781738  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  215 15:07:44.781832  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 15:07:44.781922  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  217 15:07:44.782012  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  218 15:07:44.920546  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 15:07:44.920994  start: 1.5.4 extract-modules (timeout 00:09:50) [common]
  220 15:07:44.921152  extracting modules file /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10660950/extract-nfsrootfs-vv78aa2r
  221 15:07:44.949310  extracting modules file /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10660950/extract-overlay-ramdisk-577esorc/ramdisk
  222 15:07:44.976360  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 15:07:44.976537  start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
  224 15:07:44.976639  [common] Applying overlay to NFS
  225 15:07:44.976710  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10660950/compress-overlay-gzxofqi3/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10660950/extract-nfsrootfs-vv78aa2r
  226 15:07:44.984528  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 15:07:44.984651  start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
  228 15:07:44.984744  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 15:07:44.984834  start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
  230 15:07:44.984913  Building ramdisk /var/lib/lava/dispatcher/tmp/10660950/extract-overlay-ramdisk-577esorc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10660950/extract-overlay-ramdisk-577esorc/ramdisk
  231 15:07:45.061268  >> 30350 blocks

  232 15:07:45.662919  rename /var/lib/lava/dispatcher/tmp/10660950/extract-overlay-ramdisk-577esorc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/ramdisk/ramdisk.cpio.gz
  233 15:07:45.663338  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  234 15:07:45.663458  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  235 15:07:45.663568  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  236 15:07:45.663660  No mkimage arch provided, not using FIT.
  237 15:07:45.663752  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 15:07:45.663836  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 15:07:45.663988  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  240 15:07:45.664082  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
  241 15:07:45.664156  No LXC device requested
  242 15:07:45.664236  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 15:07:45.664326  start: 1.7 deploy-device-env (timeout 00:09:50) [common]
  244 15:07:45.664412  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 15:07:45.664481  Checking files for TFTP limit of 4294967296 bytes.
  246 15:07:45.664922  end: 1 tftp-deploy (duration 00:00:10) [common]
  247 15:07:45.665061  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 15:07:45.665172  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 15:07:45.665379  substitutions:
  250 15:07:45.665460  - {DTB}: None
  251 15:07:45.665525  - {INITRD}: 10660950/tftp-deploy-b4vheng6/ramdisk/ramdisk.cpio.gz
  252 15:07:45.665585  - {KERNEL}: 10660950/tftp-deploy-b4vheng6/kernel/bzImage
  253 15:07:45.665643  - {LAVA_MAC}: None
  254 15:07:45.665700  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10660950/extract-nfsrootfs-vv78aa2r
  255 15:07:45.665793  - {NFS_SERVER_IP}: 192.168.201.1
  256 15:07:45.665848  - {PRESEED_CONFIG}: None
  257 15:07:45.665903  - {PRESEED_LOCAL}: None
  258 15:07:45.665957  - {RAMDISK}: 10660950/tftp-deploy-b4vheng6/ramdisk/ramdisk.cpio.gz
  259 15:07:45.666012  - {ROOT_PART}: None
  260 15:07:45.666066  - {ROOT}: None
  261 15:07:45.666121  - {SERVER_IP}: 192.168.201.1
  262 15:07:45.666174  - {TEE}: None
  263 15:07:45.666228  Parsed boot commands:
  264 15:07:45.666300  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 15:07:45.666487  Parsed boot commands: tftpboot 192.168.201.1 10660950/tftp-deploy-b4vheng6/kernel/bzImage 10660950/tftp-deploy-b4vheng6/kernel/cmdline 10660950/tftp-deploy-b4vheng6/ramdisk/ramdisk.cpio.gz
  266 15:07:45.666576  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 15:07:45.666658  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 15:07:45.666751  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 15:07:45.666869  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 15:07:45.666941  Not connected, no need to disconnect.
  271 15:07:45.667014  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 15:07:45.667097  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 15:07:45.667163  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
  274 15:07:45.670646  Setting prompt string to ['lava-test: # ']
  275 15:07:45.671011  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 15:07:45.671123  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 15:07:45.671217  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 15:07:45.671307  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 15:07:45.671768  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
  280 15:07:50.802133  >> Command sent successfully.

  281 15:07:50.804648  Returned 0 in 5 seconds
  282 15:07:50.905042  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  284 15:07:50.905458  end: 2.2.2 reset-device (duration 00:00:05) [common]
  285 15:07:50.905586  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  286 15:07:50.905706  Setting prompt string to 'Starting depthcharge on Voema...'
  287 15:07:50.905786  Changing prompt to 'Starting depthcharge on Voema...'
  288 15:07:50.905856  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  289 15:07:50.906105  [Enter `^Ec?' for help]

  290 15:07:52.471093  

  291 15:07:52.471265  

  292 15:07:52.480931  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  293 15:07:52.484456  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  294 15:07:52.490969  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  295 15:07:52.494439  CPU: AES supported, TXT NOT supported, VT supported

  296 15:07:52.501186  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  297 15:07:52.507646  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  298 15:07:52.510908  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  299 15:07:52.514527  VBOOT: Loading verstage.

  300 15:07:52.521166  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  301 15:07:52.524230  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  302 15:07:52.527323  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  303 15:07:52.538384  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  304 15:07:52.544916  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  305 15:07:52.545008  

  306 15:07:52.545075  

  307 15:07:52.557830  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  308 15:07:52.572075  Probing TPM: . done!

  309 15:07:52.575071  TPM ready after 0 ms

  310 15:07:52.578359  Connected to device vid:did:rid of 1ae0:0028:00

  311 15:07:52.589823  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  312 15:07:52.596564  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  313 15:07:52.599625  Initialized TPM device CR50 revision 0

  314 15:07:52.651403  tlcl_send_startup: Startup return code is 0

  315 15:07:52.651563  TPM: setup succeeded

  316 15:07:52.666758  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  317 15:07:52.681317  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  318 15:07:52.694800  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  319 15:07:52.704572  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  320 15:07:52.708504  Chrome EC: UHEPI supported

  321 15:07:52.711948  Phase 1

  322 15:07:52.714973  FMAP: area GBB found @ 1805000 (458752 bytes)

  323 15:07:52.725427  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  324 15:07:52.731588  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  325 15:07:52.738438  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  326 15:07:52.745376  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  327 15:07:52.748286  Recovery requested (1009000e)

  328 15:07:52.751423  TPM: Extending digest for VBOOT: boot mode into PCR 0

  329 15:07:52.763412  tlcl_extend: response is 0

  330 15:07:52.770113  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  331 15:07:52.779821  tlcl_extend: response is 0

  332 15:07:52.786505  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  333 15:07:52.792956  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  334 15:07:52.799283  BS: verstage times (exec / console): total (unknown) / 142 ms

  335 15:07:52.799391  

  336 15:07:52.799479  

  337 15:07:52.813045  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  338 15:07:52.819348  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  339 15:07:52.823092  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  340 15:07:52.826093  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  341 15:07:52.832720  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  342 15:07:52.835822  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  343 15:07:52.839132  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  344 15:07:52.842355  TCO_STS:   0000 0000

  345 15:07:52.845911  GEN_PMCON: d0015038 00002200

  346 15:07:52.849005  GBLRST_CAUSE: 00000000 00000000

  347 15:07:52.852663  HPR_CAUSE0: 00000000

  348 15:07:52.852774  prev_sleep_state 5

  349 15:07:52.855728  Boot Count incremented to 20066

  350 15:07:52.862455  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 15:07:52.869097  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 15:07:52.879547  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 15:07:52.885951  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  354 15:07:52.888881  Chrome EC: UHEPI supported

  355 15:07:52.895569  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  356 15:07:52.906524  Probing TPM:  done!

  357 15:07:52.913952  Connected to device vid:did:rid of 1ae0:0028:00

  358 15:07:52.923803  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  359 15:07:52.927060  Initialized TPM device CR50 revision 0

  360 15:07:52.941592  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  361 15:07:52.948590  MRC: Hash idx 0x100b comparison successful.

  362 15:07:52.951660  MRC cache found, size faa8

  363 15:07:52.951803  bootmode is set to: 2

  364 15:07:52.955282  SPD index = 0

  365 15:07:52.961938  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  366 15:07:52.964868  SPD: module type is LPDDR4X

  367 15:07:52.968283  SPD: module part number is MT53E512M64D4NW-046

  368 15:07:52.974821  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  369 15:07:52.978370  SPD: device width 16 bits, bus width 16 bits

  370 15:07:52.984681  SPD: module size is 1024 MB (per channel)

  371 15:07:53.416777  CBMEM:

  372 15:07:53.420136  IMD: root @ 0x76fff000 254 entries.

  373 15:07:53.423193  IMD: root @ 0x76ffec00 62 entries.

  374 15:07:53.426408  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  375 15:07:53.433462  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  376 15:07:53.436719  External stage cache:

  377 15:07:53.439807  IMD: root @ 0x7b3ff000 254 entries.

  378 15:07:53.443115  IMD: root @ 0x7b3fec00 62 entries.

  379 15:07:53.458708  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  380 15:07:53.465309  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  381 15:07:53.471761  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  382 15:07:53.485546  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  383 15:07:53.489790  cse_lite: Skip switching to RW in the recovery path

  384 15:07:53.493426  8 DIMMs found

  385 15:07:53.493557  SMM Memory Map

  386 15:07:53.496911  SMRAM       : 0x7b000000 0x800000

  387 15:07:53.500099   Subregion 0: 0x7b000000 0x200000

  388 15:07:53.503624   Subregion 1: 0x7b200000 0x200000

  389 15:07:53.506693   Subregion 2: 0x7b400000 0x400000

  390 15:07:53.510205  top_of_ram = 0x77000000

  391 15:07:53.516936  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  392 15:07:53.520065  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  393 15:07:53.527090  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  394 15:07:53.529757  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  395 15:07:53.540071  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  396 15:07:53.546596  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  397 15:07:53.556449  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  398 15:07:53.559509  Processing 211 relocs. Offset value of 0x74c0b000

  399 15:07:53.568496  BS: romstage times (exec / console): total (unknown) / 277 ms

  400 15:07:53.574617  

  401 15:07:53.574714  

  402 15:07:53.584375  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  403 15:07:53.587988  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  404 15:07:53.597755  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  405 15:07:53.604426  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  406 15:07:53.611142  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  407 15:07:53.617431  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  408 15:07:53.664699  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  409 15:07:53.671123  Processing 5008 relocs. Offset value of 0x75d98000

  410 15:07:53.674804  BS: postcar times (exec / console): total (unknown) / 59 ms

  411 15:07:53.677913  

  412 15:07:53.678000  

  413 15:07:53.688459  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  414 15:07:53.688561  Normal boot

  415 15:07:53.691619  FW_CONFIG value is 0x804c02

  416 15:07:53.695126  PCI: 00:07.0 disabled by fw_config

  417 15:07:53.698173  PCI: 00:07.1 disabled by fw_config

  418 15:07:53.702020  PCI: 00:0d.2 disabled by fw_config

  419 15:07:53.704905  PCI: 00:1c.7 disabled by fw_config

  420 15:07:53.711819  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  421 15:07:53.718793  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  422 15:07:53.721474  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  423 15:07:53.725005  GENERIC: 0.0 disabled by fw_config

  424 15:07:53.728210  GENERIC: 1.0 disabled by fw_config

  425 15:07:53.734786  fw_config match found: DB_USB=USB3_ACTIVE

  426 15:07:53.738165  fw_config match found: DB_USB=USB3_ACTIVE

  427 15:07:53.741675  fw_config match found: DB_USB=USB3_ACTIVE

  428 15:07:53.745021  fw_config match found: DB_USB=USB3_ACTIVE

  429 15:07:53.751491  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  430 15:07:53.758121  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  431 15:07:53.765156  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  432 15:07:53.774927  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  433 15:07:53.778017  microcode: sig=0x806c1 pf=0x80 revision=0x86

  434 15:07:53.784653  microcode: Update skipped, already up-to-date

  435 15:07:53.791259  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  436 15:07:53.818413  Detected 4 core, 8 thread CPU.

  437 15:07:53.821707  Setting up SMI for CPU

  438 15:07:53.824803  IED base = 0x7b400000

  439 15:07:53.824980  IED size = 0x00400000

  440 15:07:53.828862  Will perform SMM setup.

  441 15:07:53.834781  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  442 15:07:53.841370  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  443 15:07:53.848177  Processing 16 relocs. Offset value of 0x00030000

  444 15:07:53.851443  Attempting to start 7 APs

  445 15:07:53.854752  Waiting for 10ms after sending INIT.

  446 15:07:53.870500  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  447 15:07:53.870618  done.

  448 15:07:53.873908  AP: slot 3 apic_id 6.

  449 15:07:53.877043  AP: slot 7 apic_id 7.

  450 15:07:53.877143  AP: slot 5 apic_id 5.

  451 15:07:53.880465  AP: slot 4 apic_id 4.

  452 15:07:53.883643  Waiting for 2nd SIPI to complete...done.

  453 15:07:53.886864  AP: slot 2 apic_id 3.

  454 15:07:53.890224  AP: slot 6 apic_id 2.

  455 15:07:53.897199  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  456 15:07:53.903873  Processing 13 relocs. Offset value of 0x00038000

  457 15:07:53.903972  Unable to locate Global NVS

  458 15:07:53.913343  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  459 15:07:53.916888  Installing permanent SMM handler to 0x7b000000

  460 15:07:53.926924  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  461 15:07:53.930108  Processing 794 relocs. Offset value of 0x7b010000

  462 15:07:53.939936  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  463 15:07:53.943464  Processing 13 relocs. Offset value of 0x7b008000

  464 15:07:53.950171  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  465 15:07:53.956707  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  466 15:07:53.960087  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  467 15:07:53.966639  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  468 15:07:53.973224  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  469 15:07:53.979820  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  470 15:07:53.986381  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  471 15:07:53.986482  Unable to locate Global NVS

  472 15:07:53.996724  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  473 15:07:53.999613  Clearing SMI status registers

  474 15:07:53.999706  SMI_STS: PM1 

  475 15:07:54.003219  PM1_STS: PWRBTN 

  476 15:07:54.009877  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  477 15:07:54.013038  In relocation handler: CPU 0

  478 15:07:54.016527  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  479 15:07:54.022864  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  480 15:07:54.022961  Relocation complete.

  481 15:07:54.032768  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  482 15:07:54.032919  In relocation handler: CPU 1

  483 15:07:54.039573  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  484 15:07:54.039695  Relocation complete.

  485 15:07:54.049267  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  486 15:07:54.049373  In relocation handler: CPU 4

  487 15:07:54.055929  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  488 15:07:54.059684  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  489 15:07:54.062594  Relocation complete.

  490 15:07:54.069156  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  491 15:07:54.072386  In relocation handler: CPU 5

  492 15:07:54.075754  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  493 15:07:54.079298  Relocation complete.

  494 15:07:54.086050  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  495 15:07:54.089575  In relocation handler: CPU 6

  496 15:07:54.093091  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  497 15:07:54.099526  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  498 15:07:54.099634  Relocation complete.

  499 15:07:54.105757  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  500 15:07:54.109257  In relocation handler: CPU 2

  501 15:07:54.116051  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  502 15:07:54.116152  Relocation complete.

  503 15:07:54.122725  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  504 15:07:54.125515  In relocation handler: CPU 7

  505 15:07:54.132216  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  506 15:07:54.132305  Relocation complete.

  507 15:07:54.138879  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  508 15:07:54.142187  In relocation handler: CPU 3

  509 15:07:54.148986  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  510 15:07:54.153159  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  511 15:07:54.153275  Relocation complete.

  512 15:07:54.156615  Initializing CPU #0

  513 15:07:54.160428  CPU: vendor Intel device 806c1

  514 15:07:54.163521  CPU: family 06, model 8c, stepping 01

  515 15:07:54.166684  Clearing out pending MCEs

  516 15:07:54.170094  Setting up local APIC...

  517 15:07:54.170179   apic_id: 0x00 done.

  518 15:07:54.173395  Turbo is available but hidden

  519 15:07:54.176693  Turbo is available and visible

  520 15:07:54.183642  microcode: Update skipped, already up-to-date

  521 15:07:54.183725  CPU #0 initialized

  522 15:07:54.186454  Initializing CPU #1

  523 15:07:54.186557  Initializing CPU #2

  524 15:07:54.190074  Initializing CPU #6

  525 15:07:54.193146  CPU: vendor Intel device 806c1

  526 15:07:54.196318  CPU: family 06, model 8c, stepping 01

  527 15:07:54.199860  CPU: vendor Intel device 806c1

  528 15:07:54.202927  CPU: family 06, model 8c, stepping 01

  529 15:07:54.206402  Clearing out pending MCEs

  530 15:07:54.209958  Clearing out pending MCEs

  531 15:07:54.213151  Setting up local APIC...

  532 15:07:54.216659  CPU: vendor Intel device 806c1

  533 15:07:54.219685  CPU: family 06, model 8c, stepping 01

  534 15:07:54.219775  Setting up local APIC...

  535 15:07:54.222853  Initializing CPU #4

  536 15:07:54.226568  Initializing CPU #5

  537 15:07:54.229489  CPU: vendor Intel device 806c1

  538 15:07:54.232946  CPU: family 06, model 8c, stepping 01

  539 15:07:54.236044  CPU: vendor Intel device 806c1

  540 15:07:54.239745  CPU: family 06, model 8c, stepping 01

  541 15:07:54.243107  Clearing out pending MCEs

  542 15:07:54.243197  Clearing out pending MCEs

  543 15:07:54.246058  Setting up local APIC...

  544 15:07:54.249692   apic_id: 0x03 done.

  545 15:07:54.253127   apic_id: 0x02 done.

  546 15:07:54.256121  microcode: Update skipped, already up-to-date

  547 15:07:54.259465  microcode: Update skipped, already up-to-date

  548 15:07:54.263002  CPU #2 initialized

  549 15:07:54.263087  CPU #6 initialized

  550 15:07:54.266061   apic_id: 0x04 done.

  551 15:07:54.269620  Setting up local APIC...

  552 15:07:54.269734  Initializing CPU #3

  553 15:07:54.272651  Initializing CPU #7

  554 15:07:54.276340   apic_id: 0x05 done.

  555 15:07:54.279795  microcode: Update skipped, already up-to-date

  556 15:07:54.286040  microcode: Update skipped, already up-to-date

  557 15:07:54.286146  CPU #4 initialized

  558 15:07:54.289549  CPU #5 initialized

  559 15:07:54.292951  CPU: vendor Intel device 806c1

  560 15:07:54.296085  CPU: family 06, model 8c, stepping 01

  561 15:07:54.299547  CPU: vendor Intel device 806c1

  562 15:07:54.302513  CPU: family 06, model 8c, stepping 01

  563 15:07:54.306088  Clearing out pending MCEs

  564 15:07:54.306168  Clearing out pending MCEs

  565 15:07:54.309162  Setting up local APIC...

  566 15:07:54.312401  Clearing out pending MCEs

  567 15:07:54.316009   apic_id: 0x06 done.

  568 15:07:54.316104  Setting up local APIC...

  569 15:07:54.319103  Setting up local APIC...

  570 15:07:54.322741   apic_id: 0x07 done.

  571 15:07:54.325767  microcode: Update skipped, already up-to-date

  572 15:07:54.332458  microcode: Update skipped, already up-to-date

  573 15:07:54.332563  CPU #3 initialized

  574 15:07:54.335832  CPU #7 initialized

  575 15:07:54.335935   apic_id: 0x01 done.

  576 15:07:54.342712  microcode: Update skipped, already up-to-date

  577 15:07:54.342795  CPU #1 initialized

  578 15:07:54.349055  bsp_do_flight_plan done after 459 msecs.

  579 15:07:54.352194  CPU: frequency set to 4000 MHz

  580 15:07:54.352331  Enabling SMIs.

  581 15:07:54.358956  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  582 15:07:54.375224  SATAXPCIE1 indicates PCIe NVMe is present

  583 15:07:54.378910  Probing TPM:  done!

  584 15:07:54.381970  Connected to device vid:did:rid of 1ae0:0028:00

  585 15:07:54.392651  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  586 15:07:54.396189  Initialized TPM device CR50 revision 0

  587 15:07:54.399129  Enabling S0i3.4

  588 15:07:54.405788  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  589 15:07:54.409572  Found a VBT of 8704 bytes after decompression

  590 15:07:54.416055  cse_lite: CSE RO boot. HybridStorageMode disabled

  591 15:07:54.422637  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  592 15:07:54.497579  FSPS returned 0

  593 15:07:54.500897  Executing Phase 1 of FspMultiPhaseSiInit

  594 15:07:54.510935  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  595 15:07:54.513963  port C0 DISC req: usage 1 usb3 1 usb2 5

  596 15:07:54.517446  Raw Buffer output 0 00000511

  597 15:07:54.520712  Raw Buffer output 1 00000000

  598 15:07:54.524456  pmc_send_ipc_cmd succeeded

  599 15:07:54.531048  port C1 DISC req: usage 1 usb3 2 usb2 3

  600 15:07:54.531136  Raw Buffer output 0 00000321

  601 15:07:54.534595  Raw Buffer output 1 00000000

  602 15:07:54.538708  pmc_send_ipc_cmd succeeded

  603 15:07:54.543851  Detected 4 core, 8 thread CPU.

  604 15:07:54.546896  Detected 4 core, 8 thread CPU.

  605 15:07:54.781116  Display FSP Version Info HOB

  606 15:07:54.784159  Reference Code - CPU = a.0.4c.31

  607 15:07:54.787324  uCode Version = 0.0.0.86

  608 15:07:54.790903  TXT ACM version = ff.ff.ff.ffff

  609 15:07:54.794487  Reference Code - ME = a.0.4c.31

  610 15:07:54.797526  MEBx version = 0.0.0.0

  611 15:07:54.800564  ME Firmware Version = Consumer SKU

  612 15:07:54.803987  Reference Code - PCH = a.0.4c.31

  613 15:07:54.807466  PCH-CRID Status = Disabled

  614 15:07:54.810819  PCH-CRID Original Value = ff.ff.ff.ffff

  615 15:07:54.814311  PCH-CRID New Value = ff.ff.ff.ffff

  616 15:07:54.817779  OPROM - RST - RAID = ff.ff.ff.ffff

  617 15:07:54.820547  PCH Hsio Version = 4.0.0.0

  618 15:07:54.823976  Reference Code - SA - System Agent = a.0.4c.31

  619 15:07:54.827221  Reference Code - MRC = 2.0.0.1

  620 15:07:54.830424  SA - PCIe Version = a.0.4c.31

  621 15:07:54.833818  SA-CRID Status = Disabled

  622 15:07:54.837141  SA-CRID Original Value = 0.0.0.1

  623 15:07:54.840690  SA-CRID New Value = 0.0.0.1

  624 15:07:54.844250  OPROM - VBIOS = ff.ff.ff.ffff

  625 15:07:54.847293  IO Manageability Engine FW Version = 11.1.4.0

  626 15:07:54.850798  PHY Build Version = 0.0.0.e0

  627 15:07:54.853914  Thunderbolt(TM) FW Version = 0.0.0.0

  628 15:07:54.860595  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  629 15:07:54.864134  ITSS IRQ Polarities Before:

  630 15:07:54.864220  IPC0: 0xffffffff

  631 15:07:54.867256  IPC1: 0xffffffff

  632 15:07:54.867340  IPC2: 0xffffffff

  633 15:07:54.870650  IPC3: 0xffffffff

  634 15:07:54.873788  ITSS IRQ Polarities After:

  635 15:07:54.873873  IPC0: 0xffffffff

  636 15:07:54.877509  IPC1: 0xffffffff

  637 15:07:54.877594  IPC2: 0xffffffff

  638 15:07:54.880563  IPC3: 0xffffffff

  639 15:07:54.883691  Found PCIe Root Port #9 at PCI: 00:1d.0.

  640 15:07:54.897034  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  641 15:07:54.907020  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  642 15:07:54.920149  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  643 15:07:54.926675  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  644 15:07:54.929932  Enumerating buses...

  645 15:07:54.933303  Show all devs... Before device enumeration.

  646 15:07:54.936640  Root Device: enabled 1

  647 15:07:54.936726  DOMAIN: 0000: enabled 1

  648 15:07:54.940406  CPU_CLUSTER: 0: enabled 1

  649 15:07:54.943182  PCI: 00:00.0: enabled 1

  650 15:07:54.946640  PCI: 00:02.0: enabled 1

  651 15:07:54.946725  PCI: 00:04.0: enabled 1

  652 15:07:54.950394  PCI: 00:05.0: enabled 1

  653 15:07:54.953303  PCI: 00:06.0: enabled 0

  654 15:07:54.953417  PCI: 00:07.0: enabled 0

  655 15:07:54.956527  PCI: 00:07.1: enabled 0

  656 15:07:54.960103  PCI: 00:07.2: enabled 0

  657 15:07:54.963439  PCI: 00:07.3: enabled 0

  658 15:07:54.963523  PCI: 00:08.0: enabled 1

  659 15:07:54.966615  PCI: 00:09.0: enabled 0

  660 15:07:54.970294  PCI: 00:0a.0: enabled 0

  661 15:07:54.973290  PCI: 00:0d.0: enabled 1

  662 15:07:54.973374  PCI: 00:0d.1: enabled 0

  663 15:07:54.976816  PCI: 00:0d.2: enabled 0

  664 15:07:54.979916  PCI: 00:0d.3: enabled 0

  665 15:07:54.983074  PCI: 00:0e.0: enabled 0

  666 15:07:54.983158  PCI: 00:10.2: enabled 1

  667 15:07:54.986884  PCI: 00:10.6: enabled 0

  668 15:07:54.989958  PCI: 00:10.7: enabled 0

  669 15:07:54.993066  PCI: 00:12.0: enabled 0

  670 15:07:54.993150  PCI: 00:12.6: enabled 0

  671 15:07:54.996697  PCI: 00:13.0: enabled 0

  672 15:07:54.999868  PCI: 00:14.0: enabled 1

  673 15:07:54.999965  PCI: 00:14.1: enabled 0

  674 15:07:55.002927  PCI: 00:14.2: enabled 1

  675 15:07:55.006558  PCI: 00:14.3: enabled 1

  676 15:07:55.009502  PCI: 00:15.0: enabled 1

  677 15:07:55.009585  PCI: 00:15.1: enabled 1

  678 15:07:55.012851  PCI: 00:15.2: enabled 1

  679 15:07:55.016684  PCI: 00:15.3: enabled 1

  680 15:07:55.019759  PCI: 00:16.0: enabled 1

  681 15:07:55.019867  PCI: 00:16.1: enabled 0

  682 15:07:55.022829  PCI: 00:16.2: enabled 0

  683 15:07:55.025988  PCI: 00:16.3: enabled 0

  684 15:07:55.029833  PCI: 00:16.4: enabled 0

  685 15:07:55.029917  PCI: 00:16.5: enabled 0

  686 15:07:55.032734  PCI: 00:17.0: enabled 1

  687 15:07:55.036069  PCI: 00:19.0: enabled 0

  688 15:07:55.039499  PCI: 00:19.1: enabled 1

  689 15:07:55.039583  PCI: 00:19.2: enabled 0

  690 15:07:55.042793  PCI: 00:1c.0: enabled 1

  691 15:07:55.046064  PCI: 00:1c.1: enabled 0

  692 15:07:55.046172  PCI: 00:1c.2: enabled 0

  693 15:07:55.049405  PCI: 00:1c.3: enabled 0

  694 15:07:55.052891  PCI: 00:1c.4: enabled 0

  695 15:07:55.055917  PCI: 00:1c.5: enabled 0

  696 15:07:55.055997  PCI: 00:1c.6: enabled 1

  697 15:07:55.059606  PCI: 00:1c.7: enabled 0

  698 15:07:55.062636  PCI: 00:1d.0: enabled 1

  699 15:07:55.065913  PCI: 00:1d.1: enabled 0

  700 15:07:55.066016  PCI: 00:1d.2: enabled 1

  701 15:07:55.069300  PCI: 00:1d.3: enabled 0

  702 15:07:55.073038  PCI: 00:1e.0: enabled 1

  703 15:07:55.075989  PCI: 00:1e.1: enabled 0

  704 15:07:55.076082  PCI: 00:1e.2: enabled 1

  705 15:07:55.079559  PCI: 00:1e.3: enabled 1

  706 15:07:55.082710  PCI: 00:1f.0: enabled 1

  707 15:07:55.085869  PCI: 00:1f.1: enabled 0

  708 15:07:55.085983  PCI: 00:1f.2: enabled 1

  709 15:07:55.089379  PCI: 00:1f.3: enabled 1

  710 15:07:55.092559  PCI: 00:1f.4: enabled 0

  711 15:07:55.092666  PCI: 00:1f.5: enabled 1

  712 15:07:55.096152  PCI: 00:1f.6: enabled 0

  713 15:07:55.099373  PCI: 00:1f.7: enabled 0

  714 15:07:55.102906  APIC: 00: enabled 1

  715 15:07:55.102992  GENERIC: 0.0: enabled 1

  716 15:07:55.106011  GENERIC: 0.0: enabled 1

  717 15:07:55.109076  GENERIC: 1.0: enabled 1

  718 15:07:55.112720  GENERIC: 0.0: enabled 1

  719 15:07:55.112849  GENERIC: 1.0: enabled 1

  720 15:07:55.115752  USB0 port 0: enabled 1

  721 15:07:55.119206  GENERIC: 0.0: enabled 1

  722 15:07:55.119308  USB0 port 0: enabled 1

  723 15:07:55.122366  GENERIC: 0.0: enabled 1

  724 15:07:55.125908  I2C: 00:1a: enabled 1

  725 15:07:55.128996  I2C: 00:31: enabled 1

  726 15:07:55.129120  I2C: 00:32: enabled 1

  727 15:07:55.132606  I2C: 00:10: enabled 1

  728 15:07:55.136249  I2C: 00:15: enabled 1

  729 15:07:55.136334  GENERIC: 0.0: enabled 0

  730 15:07:55.139094  GENERIC: 1.0: enabled 0

  731 15:07:55.142267  GENERIC: 0.0: enabled 1

  732 15:07:55.142360  SPI: 00: enabled 1

  733 15:07:55.145665  SPI: 00: enabled 1

  734 15:07:55.148905  PNP: 0c09.0: enabled 1

  735 15:07:55.148990  GENERIC: 0.0: enabled 1

  736 15:07:55.152356  USB3 port 0: enabled 1

  737 15:07:55.155700  USB3 port 1: enabled 1

  738 15:07:55.158912  USB3 port 2: enabled 0

  739 15:07:55.159017  USB3 port 3: enabled 0

  740 15:07:55.162071  USB2 port 0: enabled 0

  741 15:07:55.165634  USB2 port 1: enabled 1

  742 15:07:55.165712  USB2 port 2: enabled 1

  743 15:07:55.168925  USB2 port 3: enabled 0

  744 15:07:55.172348  USB2 port 4: enabled 1

  745 15:07:55.172432  USB2 port 5: enabled 0

  746 15:07:55.175536  USB2 port 6: enabled 0

  747 15:07:55.178902  USB2 port 7: enabled 0

  748 15:07:55.182345  USB2 port 8: enabled 0

  749 15:07:55.182420  USB2 port 9: enabled 0

  750 15:07:55.185794  USB3 port 0: enabled 0

  751 15:07:55.188948  USB3 port 1: enabled 1

  752 15:07:55.189019  USB3 port 2: enabled 0

  753 15:07:55.192069  USB3 port 3: enabled 0

  754 15:07:55.195752  GENERIC: 0.0: enabled 1

  755 15:07:55.198867  GENERIC: 1.0: enabled 1

  756 15:07:55.198938  APIC: 01: enabled 1

  757 15:07:55.202091  APIC: 03: enabled 1

  758 15:07:55.202177  APIC: 06: enabled 1

  759 15:07:55.205603  APIC: 04: enabled 1

  760 15:07:55.208707  APIC: 05: enabled 1

  761 15:07:55.208783  APIC: 02: enabled 1

  762 15:07:55.212200  APIC: 07: enabled 1

  763 15:07:55.215372  Compare with tree...

  764 15:07:55.215456  Root Device: enabled 1

  765 15:07:55.218594   DOMAIN: 0000: enabled 1

  766 15:07:55.221993    PCI: 00:00.0: enabled 1

  767 15:07:55.225317    PCI: 00:02.0: enabled 1

  768 15:07:55.225408    PCI: 00:04.0: enabled 1

  769 15:07:55.228701     GENERIC: 0.0: enabled 1

  770 15:07:55.231836    PCI: 00:05.0: enabled 1

  771 15:07:55.235510    PCI: 00:06.0: enabled 0

  772 15:07:55.238296    PCI: 00:07.0: enabled 0

  773 15:07:55.238393     GENERIC: 0.0: enabled 1

  774 15:07:55.241661    PCI: 00:07.1: enabled 0

  775 15:07:55.245134     GENERIC: 1.0: enabled 1

  776 15:07:55.248549    PCI: 00:07.2: enabled 0

  777 15:07:55.252027     GENERIC: 0.0: enabled 1

  778 15:07:55.252102    PCI: 00:07.3: enabled 0

  779 15:07:55.255259     GENERIC: 1.0: enabled 1

  780 15:07:55.258738    PCI: 00:08.0: enabled 1

  781 15:07:55.261945    PCI: 00:09.0: enabled 0

  782 15:07:55.264925    PCI: 00:0a.0: enabled 0

  783 15:07:55.265011    PCI: 00:0d.0: enabled 1

  784 15:07:55.268492     USB0 port 0: enabled 1

  785 15:07:55.272045      USB3 port 0: enabled 1

  786 15:07:55.274923      USB3 port 1: enabled 1

  787 15:07:55.278335      USB3 port 2: enabled 0

  788 15:07:55.281923      USB3 port 3: enabled 0

  789 15:07:55.282008    PCI: 00:0d.1: enabled 0

  790 15:07:55.284961    PCI: 00:0d.2: enabled 0

  791 15:07:55.288471     GENERIC: 0.0: enabled 1

  792 15:07:55.291983    PCI: 00:0d.3: enabled 0

  793 15:07:55.295077    PCI: 00:0e.0: enabled 0

  794 15:07:55.295161    PCI: 00:10.2: enabled 1

  795 15:07:55.298185    PCI: 00:10.6: enabled 0

  796 15:07:55.301815    PCI: 00:10.7: enabled 0

  797 15:07:55.304999    PCI: 00:12.0: enabled 0

  798 15:07:55.308547    PCI: 00:12.6: enabled 0

  799 15:07:55.308633    PCI: 00:13.0: enabled 0

  800 15:07:55.311463    PCI: 00:14.0: enabled 1

  801 15:07:55.314989     USB0 port 0: enabled 1

  802 15:07:55.318244      USB2 port 0: enabled 0

  803 15:07:55.321247      USB2 port 1: enabled 1

  804 15:07:55.321332      USB2 port 2: enabled 1

  805 15:07:55.324898      USB2 port 3: enabled 0

  806 15:07:55.328410      USB2 port 4: enabled 1

  807 15:07:55.331265      USB2 port 5: enabled 0

  808 15:07:55.334872      USB2 port 6: enabled 0

  809 15:07:55.338018      USB2 port 7: enabled 0

  810 15:07:55.338097      USB2 port 8: enabled 0

  811 15:07:55.341712      USB2 port 9: enabled 0

  812 15:07:55.344758      USB3 port 0: enabled 0

  813 15:07:55.347795      USB3 port 1: enabled 1

  814 15:07:55.351216      USB3 port 2: enabled 0

  815 15:07:55.354782      USB3 port 3: enabled 0

  816 15:07:55.354890    PCI: 00:14.1: enabled 0

  817 15:07:55.357737    PCI: 00:14.2: enabled 1

  818 15:07:55.361325    PCI: 00:14.3: enabled 1

  819 15:07:55.364522     GENERIC: 0.0: enabled 1

  820 15:07:55.367721    PCI: 00:15.0: enabled 1

  821 15:07:55.367833     I2C: 00:1a: enabled 1

  822 15:07:55.371049     I2C: 00:31: enabled 1

  823 15:07:55.374459     I2C: 00:32: enabled 1

  824 15:07:55.377758    PCI: 00:15.1: enabled 1

  825 15:07:55.377839     I2C: 00:10: enabled 1

  826 15:07:55.381067    PCI: 00:15.2: enabled 1

  827 15:07:55.384510    PCI: 00:15.3: enabled 1

  828 15:07:55.387477    PCI: 00:16.0: enabled 1

  829 15:07:55.390981    PCI: 00:16.1: enabled 0

  830 15:07:55.391059    PCI: 00:16.2: enabled 0

  831 15:07:55.395172    PCI: 00:16.3: enabled 0

  832 15:07:55.398274    PCI: 00:16.4: enabled 0

  833 15:07:55.402263    PCI: 00:16.5: enabled 0

  834 15:07:55.402342    PCI: 00:17.0: enabled 1

  835 15:07:55.405387    PCI: 00:19.0: enabled 0

  836 15:07:55.409090    PCI: 00:19.1: enabled 1

  837 15:07:55.412249     I2C: 00:15: enabled 1

  838 15:07:55.412329    PCI: 00:19.2: enabled 0

  839 15:07:55.415330    PCI: 00:1d.0: enabled 1

  840 15:07:55.418822     GENERIC: 0.0: enabled 1

  841 15:07:55.421960    PCI: 00:1e.0: enabled 1

  842 15:07:55.425444    PCI: 00:1e.1: enabled 0

  843 15:07:55.425522    PCI: 00:1e.2: enabled 1

  844 15:07:55.475538     SPI: 00: enabled 1

  845 15:07:55.475657    PCI: 00:1e.3: enabled 1

  846 15:07:55.475953     SPI: 00: enabled 1

  847 15:07:55.476079    PCI: 00:1f.0: enabled 1

  848 15:07:55.476151     PNP: 0c09.0: enabled 1

  849 15:07:55.476243    PCI: 00:1f.1: enabled 0

  850 15:07:55.476307    PCI: 00:1f.2: enabled 1

  851 15:07:55.476393     GENERIC: 0.0: enabled 1

  852 15:07:55.476454      GENERIC: 0.0: enabled 1

  853 15:07:55.476994      GENERIC: 1.0: enabled 1

  854 15:07:55.477161    PCI: 00:1f.3: enabled 1

  855 15:07:55.477227    PCI: 00:1f.4: enabled 0

  856 15:07:55.477467    PCI: 00:1f.5: enabled 1

  857 15:07:55.477566    PCI: 00:1f.6: enabled 0

  858 15:07:55.477628    PCI: 00:1f.7: enabled 0

  859 15:07:55.477687   CPU_CLUSTER: 0: enabled 1

  860 15:07:55.477746    APIC: 00: enabled 1

  861 15:07:55.477813    APIC: 01: enabled 1

  862 15:07:55.477872    APIC: 03: enabled 1

  863 15:07:55.516899    APIC: 06: enabled 1

  864 15:07:55.517011    APIC: 04: enabled 1

  865 15:07:55.517081    APIC: 05: enabled 1

  866 15:07:55.517431    APIC: 02: enabled 1

  867 15:07:55.517516    APIC: 07: enabled 1

  868 15:07:55.517583  Root Device scanning...

  869 15:07:55.518050  scan_static_bus for Root Device

  870 15:07:55.518134  DOMAIN: 0000 enabled

  871 15:07:55.518380  CPU_CLUSTER: 0 enabled

  872 15:07:55.518451  DOMAIN: 0000 scanning...

  873 15:07:55.518524  PCI: pci_scan_bus for bus 00

  874 15:07:55.518587  PCI: 00:00.0 [8086/0000] ops

  875 15:07:55.519166  PCI: 00:00.0 [8086/9a12] enabled

  876 15:07:55.519286  PCI: 00:02.0 [8086/0000] bus ops

  877 15:07:55.521581  PCI: 00:02.0 [8086/9a40] enabled

  878 15:07:55.521666  PCI: 00:04.0 [8086/0000] bus ops

  879 15:07:55.525248  PCI: 00:04.0 [8086/9a03] enabled

  880 15:07:55.528414  PCI: 00:05.0 [8086/9a19] enabled

  881 15:07:55.531570  PCI: 00:07.0 [0000/0000] hidden

  882 15:07:55.534988  PCI: 00:08.0 [8086/9a11] enabled

  883 15:07:55.538469  PCI: 00:0a.0 [8086/9a0d] disabled

  884 15:07:55.541799  PCI: 00:0d.0 [8086/0000] bus ops

  885 15:07:55.544875  PCI: 00:0d.0 [8086/9a13] enabled

  886 15:07:55.548465  PCI: 00:14.0 [8086/0000] bus ops

  887 15:07:55.551558  PCI: 00:14.0 [8086/a0ed] enabled

  888 15:07:55.554678  PCI: 00:14.2 [8086/a0ef] enabled

  889 15:07:55.558298  PCI: 00:14.3 [8086/0000] bus ops

  890 15:07:55.561333  PCI: 00:14.3 [8086/a0f0] enabled

  891 15:07:55.564921  PCI: 00:15.0 [8086/0000] bus ops

  892 15:07:55.567791  PCI: 00:15.0 [8086/a0e8] enabled

  893 15:07:55.571346  PCI: 00:15.1 [8086/0000] bus ops

  894 15:07:55.574608  PCI: 00:15.1 [8086/a0e9] enabled

  895 15:07:55.577973  PCI: 00:15.2 [8086/0000] bus ops

  896 15:07:55.581174  PCI: 00:15.2 [8086/a0ea] enabled

  897 15:07:55.584390  PCI: 00:15.3 [8086/0000] bus ops

  898 15:07:55.587839  PCI: 00:15.3 [8086/a0eb] enabled

  899 15:07:55.591454  PCI: 00:16.0 [8086/0000] ops

  900 15:07:55.594388  PCI: 00:16.0 [8086/a0e0] enabled

  901 15:07:55.597969  PCI: Static device PCI: 00:17.0 not found, disabling it.

  902 15:07:55.600903  PCI: 00:19.0 [8086/0000] bus ops

  903 15:07:55.604559  PCI: 00:19.0 [8086/a0c5] disabled

  904 15:07:55.607694  PCI: 00:19.1 [8086/0000] bus ops

  905 15:07:55.610955  PCI: 00:19.1 [8086/a0c6] enabled

  906 15:07:55.614530  PCI: 00:1d.0 [8086/0000] bus ops

  907 15:07:55.617496  PCI: 00:1d.0 [8086/a0b0] enabled

  908 15:07:55.621142  PCI: 00:1e.0 [8086/0000] ops

  909 15:07:55.624263  PCI: 00:1e.0 [8086/a0a8] enabled

  910 15:07:55.627298  PCI: 00:1e.2 [8086/0000] bus ops

  911 15:07:55.631249  PCI: 00:1e.2 [8086/a0aa] enabled

  912 15:07:55.634349  PCI: 00:1e.3 [8086/0000] bus ops

  913 15:07:55.637440  PCI: 00:1e.3 [8086/a0ab] enabled

  914 15:07:55.641005  PCI: 00:1f.0 [8086/0000] bus ops

  915 15:07:55.643800  PCI: 00:1f.0 [8086/a087] enabled

  916 15:07:55.647280  RTC Init

  917 15:07:55.650514  Set power on after power failure.

  918 15:07:55.650591  Disabling Deep S3

  919 15:07:55.654066  Disabling Deep S3

  920 15:07:55.657134  Disabling Deep S4

  921 15:07:55.657215  Disabling Deep S4

  922 15:07:55.660578  Disabling Deep S5

  923 15:07:55.660671  Disabling Deep S5

  924 15:07:55.663784  PCI: 00:1f.2 [0000/0000] hidden

  925 15:07:55.667535  PCI: 00:1f.3 [8086/0000] bus ops

  926 15:07:55.671035  PCI: 00:1f.3 [8086/a0c8] enabled

  927 15:07:55.673831  PCI: 00:1f.5 [8086/0000] bus ops

  928 15:07:55.677079  PCI: 00:1f.5 [8086/a0a4] enabled

  929 15:07:55.680386  PCI: Leftover static devices:

  930 15:07:55.683784  PCI: 00:10.2

  931 15:07:55.683961  PCI: 00:10.6

  932 15:07:55.684078  PCI: 00:10.7

  933 15:07:55.686968  PCI: 00:06.0

  934 15:07:55.687046  PCI: 00:07.1

  935 15:07:55.690169  PCI: 00:07.2

  936 15:07:55.690244  PCI: 00:07.3

  937 15:07:55.693484  PCI: 00:09.0

  938 15:07:55.693559  PCI: 00:0d.1

  939 15:07:55.693622  PCI: 00:0d.2

  940 15:07:55.696805  PCI: 00:0d.3

  941 15:07:55.696881  PCI: 00:0e.0

  942 15:07:55.700429  PCI: 00:12.0

  943 15:07:55.700500  PCI: 00:12.6

  944 15:07:55.700561  PCI: 00:13.0

  945 15:07:55.703730  PCI: 00:14.1

  946 15:07:55.703849  PCI: 00:16.1

  947 15:07:55.706960  PCI: 00:16.2

  948 15:07:55.707030  PCI: 00:16.3

  949 15:07:55.707096  PCI: 00:16.4

  950 15:07:55.710391  PCI: 00:16.5

  951 15:07:55.710488  PCI: 00:17.0

  952 15:07:55.713618  PCI: 00:19.2

  953 15:07:55.713694  PCI: 00:1e.1

  954 15:07:55.717053  PCI: 00:1f.1

  955 15:07:55.717129  PCI: 00:1f.4

  956 15:07:55.717198  PCI: 00:1f.6

  957 15:07:55.720347  PCI: 00:1f.7

  958 15:07:55.723450  PCI: Check your devicetree.cb.

  959 15:07:55.726447  PCI: 00:02.0 scanning...

  960 15:07:55.730280  scan_generic_bus for PCI: 00:02.0

  961 15:07:55.733502  scan_generic_bus for PCI: 00:02.0 done

  962 15:07:55.736934  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  963 15:07:55.739767  PCI: 00:04.0 scanning...

  964 15:07:55.743483  scan_generic_bus for PCI: 00:04.0

  965 15:07:55.746473  GENERIC: 0.0 enabled

  966 15:07:55.753027  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  967 15:07:55.756429  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  968 15:07:55.759794  PCI: 00:0d.0 scanning...

  969 15:07:55.763162  scan_static_bus for PCI: 00:0d.0

  970 15:07:55.766304  USB0 port 0 enabled

  971 15:07:55.766422  USB0 port 0 scanning...

  972 15:07:55.769393  scan_static_bus for USB0 port 0

  973 15:07:55.773093  USB3 port 0 enabled

  974 15:07:55.776496  USB3 port 1 enabled

  975 15:07:55.776579  USB3 port 2 disabled

  976 15:07:55.779408  USB3 port 3 disabled

  977 15:07:55.782530  USB3 port 0 scanning...

  978 15:07:55.785980  scan_static_bus for USB3 port 0

  979 15:07:55.789294  scan_static_bus for USB3 port 0 done

  980 15:07:55.792654  scan_bus: bus USB3 port 0 finished in 6 msecs

  981 15:07:55.795727  USB3 port 1 scanning...

  982 15:07:55.798940  scan_static_bus for USB3 port 1

  983 15:07:55.802277  scan_static_bus for USB3 port 1 done

  984 15:07:55.805938  scan_bus: bus USB3 port 1 finished in 6 msecs

  985 15:07:55.812502  scan_static_bus for USB0 port 0 done

  986 15:07:55.815775  scan_bus: bus USB0 port 0 finished in 43 msecs

  987 15:07:55.819561  scan_static_bus for PCI: 00:0d.0 done

  988 15:07:55.825719  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  989 15:07:55.825803  PCI: 00:14.0 scanning...

  990 15:07:55.829038  scan_static_bus for PCI: 00:14.0

  991 15:07:55.832606  USB0 port 0 enabled

  992 15:07:55.835978  USB0 port 0 scanning...

  993 15:07:55.839020  scan_static_bus for USB0 port 0

  994 15:07:55.839103  USB2 port 0 disabled

  995 15:07:55.842737  USB2 port 1 enabled

  996 15:07:55.845841  USB2 port 2 enabled

  997 15:07:55.845923  USB2 port 3 disabled

  998 15:07:55.848909  USB2 port 4 enabled

  999 15:07:55.852301  USB2 port 5 disabled

 1000 15:07:55.852384  USB2 port 6 disabled

 1001 15:07:55.855426  USB2 port 7 disabled

 1002 15:07:55.858875  USB2 port 8 disabled

 1003 15:07:55.858959  USB2 port 9 disabled

 1004 15:07:55.862076  USB3 port 0 disabled

 1005 15:07:55.865568  USB3 port 1 enabled

 1006 15:07:55.865645  USB3 port 2 disabled

 1007 15:07:55.868503  USB3 port 3 disabled

 1008 15:07:55.872271  USB2 port 1 scanning...

 1009 15:07:55.875438  scan_static_bus for USB2 port 1

 1010 15:07:55.878584  scan_static_bus for USB2 port 1 done

 1011 15:07:55.881537  scan_bus: bus USB2 port 1 finished in 6 msecs

 1012 15:07:55.885021  USB2 port 2 scanning...

 1013 15:07:55.888585  scan_static_bus for USB2 port 2

 1014 15:07:55.891726  scan_static_bus for USB2 port 2 done

 1015 15:07:55.894945  scan_bus: bus USB2 port 2 finished in 6 msecs

 1016 15:07:55.898279  USB2 port 4 scanning...

 1017 15:07:55.901751  scan_static_bus for USB2 port 4

 1018 15:07:55.905153  scan_static_bus for USB2 port 4 done

 1019 15:07:55.911564  scan_bus: bus USB2 port 4 finished in 6 msecs

 1020 15:07:55.911656  USB3 port 1 scanning...

 1021 15:07:55.915159  scan_static_bus for USB3 port 1

 1022 15:07:55.921722  scan_static_bus for USB3 port 1 done

 1023 15:07:55.924964  scan_bus: bus USB3 port 1 finished in 6 msecs

 1024 15:07:55.928714  scan_static_bus for USB0 port 0 done

 1025 15:07:55.931837  scan_bus: bus USB0 port 0 finished in 93 msecs

 1026 15:07:55.938431  scan_static_bus for PCI: 00:14.0 done

 1027 15:07:55.942041  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1028 15:07:55.945063  PCI: 00:14.3 scanning...

 1029 15:07:55.948656  scan_static_bus for PCI: 00:14.3

 1030 15:07:55.951828  GENERIC: 0.0 enabled

 1031 15:07:55.954829  scan_static_bus for PCI: 00:14.3 done

 1032 15:07:55.958325  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1033 15:07:55.961493  PCI: 00:15.0 scanning...

 1034 15:07:55.965097  scan_static_bus for PCI: 00:15.0

 1035 15:07:55.968471  I2C: 00:1a enabled

 1036 15:07:55.968555  I2C: 00:31 enabled

 1037 15:07:55.971705  I2C: 00:32 enabled

 1038 15:07:55.975235  scan_static_bus for PCI: 00:15.0 done

 1039 15:07:55.978957  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

 1040 15:07:55.982464  PCI: 00:15.1 scanning...

 1041 15:07:55.985501  scan_static_bus for PCI: 00:15.1

 1042 15:07:55.988999  I2C: 00:10 enabled

 1043 15:07:55.992199  scan_static_bus for PCI: 00:15.1 done

 1044 15:07:55.995404  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1045 15:07:55.998917  PCI: 00:15.2 scanning...

 1046 15:07:56.002464  scan_static_bus for PCI: 00:15.2

 1047 15:07:56.005646  scan_static_bus for PCI: 00:15.2 done

 1048 15:07:56.012288  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1049 15:07:56.012373  PCI: 00:15.3 scanning...

 1050 15:07:56.015394  scan_static_bus for PCI: 00:15.3

 1051 15:07:56.021792  scan_static_bus for PCI: 00:15.3 done

 1052 15:07:56.025287  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1053 15:07:56.028989  PCI: 00:19.1 scanning...

 1054 15:07:56.032202  scan_static_bus for PCI: 00:19.1

 1055 15:07:56.032281  I2C: 00:15 enabled

 1056 15:07:56.035175  scan_static_bus for PCI: 00:19.1 done

 1057 15:07:56.041873  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1058 15:07:56.045552  PCI: 00:1d.0 scanning...

 1059 15:07:56.048320  do_pci_scan_bridge for PCI: 00:1d.0

 1060 15:07:56.051884  PCI: pci_scan_bus for bus 01

 1061 15:07:56.054966  PCI: 01:00.0 [1c5c/174a] enabled

 1062 15:07:56.055045  GENERIC: 0.0 enabled

 1063 15:07:56.061953  Enabling Common Clock Configuration

 1064 15:07:56.065009  L1 Sub-State supported from root port 29

 1065 15:07:56.068505  L1 Sub-State Support = 0xf

 1066 15:07:56.071438  CommonModeRestoreTime = 0x28

 1067 15:07:56.075047  Power On Value = 0x16, Power On Scale = 0x0

 1068 15:07:56.075123  ASPM: Enabled L1

 1069 15:07:56.081729  PCIe: Max_Payload_Size adjusted to 128

 1070 15:07:56.085047  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1071 15:07:56.087917  PCI: 00:1e.2 scanning...

 1072 15:07:56.091500  scan_generic_bus for PCI: 00:1e.2

 1073 15:07:56.091577  SPI: 00 enabled

 1074 15:07:56.098215  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1075 15:07:56.104660  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1076 15:07:56.104740  PCI: 00:1e.3 scanning...

 1077 15:07:56.111637  scan_generic_bus for PCI: 00:1e.3

 1078 15:07:56.111714  SPI: 00 enabled

 1079 15:07:56.118473  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1080 15:07:56.121924  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1081 15:07:56.124655  PCI: 00:1f.0 scanning...

 1082 15:07:56.128105  scan_static_bus for PCI: 00:1f.0

 1083 15:07:56.131970  PNP: 0c09.0 enabled

 1084 15:07:56.132082  PNP: 0c09.0 scanning...

 1085 15:07:56.134820  scan_static_bus for PNP: 0c09.0

 1086 15:07:56.141852  scan_static_bus for PNP: 0c09.0 done

 1087 15:07:56.144958  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1088 15:07:56.148448  scan_static_bus for PCI: 00:1f.0 done

 1089 15:07:56.155068  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1090 15:07:56.155147  PCI: 00:1f.2 scanning...

 1091 15:07:56.158187  scan_static_bus for PCI: 00:1f.2

 1092 15:07:56.161380  GENERIC: 0.0 enabled

 1093 15:07:56.164823  GENERIC: 0.0 scanning...

 1094 15:07:56.168342  scan_static_bus for GENERIC: 0.0

 1095 15:07:56.171469  GENERIC: 0.0 enabled

 1096 15:07:56.171542  GENERIC: 1.0 enabled

 1097 15:07:56.174906  scan_static_bus for GENERIC: 0.0 done

 1098 15:07:56.181768  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1099 15:07:56.184747  scan_static_bus for PCI: 00:1f.2 done

 1100 15:07:56.188522  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1101 15:07:56.191419  PCI: 00:1f.3 scanning...

 1102 15:07:56.194848  scan_static_bus for PCI: 00:1f.3

 1103 15:07:56.197900  scan_static_bus for PCI: 00:1f.3 done

 1104 15:07:56.204539  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1105 15:07:56.207974  PCI: 00:1f.5 scanning...

 1106 15:07:56.211486  scan_generic_bus for PCI: 00:1f.5

 1107 15:07:56.214646  scan_generic_bus for PCI: 00:1f.5 done

 1108 15:07:56.217915  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1109 15:07:56.224860  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1110 15:07:56.227678  scan_static_bus for Root Device done

 1111 15:07:56.230912  scan_bus: bus Root Device finished in 736 msecs

 1112 15:07:56.234434  done

 1113 15:07:56.237828  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1114 15:07:56.241038  Chrome EC: UHEPI supported

 1115 15:07:56.247732  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1116 15:07:56.254459  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1117 15:07:56.257754  SPI flash protection: WPSW=0 SRP0=0

 1118 15:07:56.264234  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1119 15:07:56.267570  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1120 15:07:56.270979  found VGA at PCI: 00:02.0

 1121 15:07:56.274049  Setting up VGA for PCI: 00:02.0

 1122 15:07:56.280875  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1123 15:07:56.284073  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1124 15:07:56.287708  Allocating resources...

 1125 15:07:56.290695  Reading resources...

 1126 15:07:56.294294  Root Device read_resources bus 0 link: 0

 1127 15:07:56.297395  DOMAIN: 0000 read_resources bus 0 link: 0

 1128 15:07:56.304124  PCI: 00:04.0 read_resources bus 1 link: 0

 1129 15:07:56.307157  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1130 15:07:56.313870  PCI: 00:0d.0 read_resources bus 0 link: 0

 1131 15:07:56.316962  USB0 port 0 read_resources bus 0 link: 0

 1132 15:07:56.323724  USB0 port 0 read_resources bus 0 link: 0 done

 1133 15:07:56.327282  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1134 15:07:56.333913  PCI: 00:14.0 read_resources bus 0 link: 0

 1135 15:07:56.336853  USB0 port 0 read_resources bus 0 link: 0

 1136 15:07:56.343688  USB0 port 0 read_resources bus 0 link: 0 done

 1137 15:07:56.347120  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1138 15:07:56.353618  PCI: 00:14.3 read_resources bus 0 link: 0

 1139 15:07:56.356835  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1140 15:07:56.360424  PCI: 00:15.0 read_resources bus 0 link: 0

 1141 15:07:56.367753  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1142 15:07:56.371228  PCI: 00:15.1 read_resources bus 0 link: 0

 1143 15:07:56.377902  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1144 15:07:56.380880  PCI: 00:19.1 read_resources bus 0 link: 0

 1145 15:07:56.387818  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1146 15:07:56.391461  PCI: 00:1d.0 read_resources bus 1 link: 0

 1147 15:07:56.397691  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1148 15:07:56.401143  PCI: 00:1e.2 read_resources bus 2 link: 0

 1149 15:07:56.407837  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1150 15:07:56.411124  PCI: 00:1e.3 read_resources bus 3 link: 0

 1151 15:07:56.417953  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1152 15:07:56.421464  PCI: 00:1f.0 read_resources bus 0 link: 0

 1153 15:07:56.427692  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1154 15:07:56.431088  PCI: 00:1f.2 read_resources bus 0 link: 0

 1155 15:07:56.434629  GENERIC: 0.0 read_resources bus 0 link: 0

 1156 15:07:56.441587  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1157 15:07:56.444730  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1158 15:07:56.452308  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1159 15:07:56.455483  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1160 15:07:56.462064  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1161 15:07:56.465299  Root Device read_resources bus 0 link: 0 done

 1162 15:07:56.468495  Done reading resources.

 1163 15:07:56.475512  Show resources in subtree (Root Device)...After reading.

 1164 15:07:56.478883   Root Device child on link 0 DOMAIN: 0000

 1165 15:07:56.482095    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1166 15:07:56.491764    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1167 15:07:56.502162    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1168 15:07:56.505228     PCI: 00:00.0

 1169 15:07:56.515032     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1170 15:07:56.521748     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1171 15:07:56.532002     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1172 15:07:56.541452     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1173 15:07:56.551775     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1174 15:07:56.561645     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1175 15:07:56.571420     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1176 15:07:56.578169     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1177 15:07:56.588068     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1178 15:07:56.597885     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1179 15:07:56.607875     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1180 15:07:56.617636     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1181 15:07:56.624370     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1182 15:07:56.634706     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1183 15:07:56.644496     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1184 15:07:56.654244     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1185 15:07:56.664343     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1186 15:07:56.674003     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1187 15:07:56.684208     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1188 15:07:56.690707     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1189 15:07:56.694121     PCI: 00:02.0

 1190 15:07:56.704078     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1191 15:07:56.713815     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1192 15:07:56.723766     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1193 15:07:56.726905     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1194 15:07:56.736893     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1195 15:07:56.740415      GENERIC: 0.0

 1196 15:07:56.740499     PCI: 00:05.0

 1197 15:07:56.750300     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1198 15:07:56.756893     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1199 15:07:56.756997      GENERIC: 0.0

 1200 15:07:56.760320     PCI: 00:08.0

 1201 15:07:56.770377     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1202 15:07:56.770465     PCI: 00:0a.0

 1203 15:07:56.773713     PCI: 00:0d.0 child on link 0 USB0 port 0

 1204 15:07:56.786987     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1205 15:07:56.790076      USB0 port 0 child on link 0 USB3 port 0

 1206 15:07:56.790162       USB3 port 0

 1207 15:07:56.793392       USB3 port 1

 1208 15:07:56.793474       USB3 port 2

 1209 15:07:56.796862       USB3 port 3

 1210 15:07:56.799965     PCI: 00:14.0 child on link 0 USB0 port 0

 1211 15:07:56.810269     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1212 15:07:56.816437      USB0 port 0 child on link 0 USB2 port 0

 1213 15:07:56.816548       USB2 port 0

 1214 15:07:56.820078       USB2 port 1

 1215 15:07:56.820161       USB2 port 2

 1216 15:07:56.823305       USB2 port 3

 1217 15:07:56.823387       USB2 port 4

 1218 15:07:56.826744       USB2 port 5

 1219 15:07:56.826827       USB2 port 6

 1220 15:07:56.829975       USB2 port 7

 1221 15:07:56.830057       USB2 port 8

 1222 15:07:56.833068       USB2 port 9

 1223 15:07:56.836767       USB3 port 0

 1224 15:07:56.836850       USB3 port 1

 1225 15:07:56.839696       USB3 port 2

 1226 15:07:56.839781       USB3 port 3

 1227 15:07:56.842748     PCI: 00:14.2

 1228 15:07:56.852779     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1229 15:07:56.862793     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1230 15:07:56.866029     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1231 15:07:56.876215     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1232 15:07:56.879715      GENERIC: 0.0

 1233 15:07:56.883158     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1234 15:07:56.892880     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1235 15:07:56.892962      I2C: 00:1a

 1236 15:07:56.895869      I2C: 00:31

 1237 15:07:56.895957      I2C: 00:32

 1238 15:07:56.902934     PCI: 00:15.1 child on link 0 I2C: 00:10

 1239 15:07:56.912511     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1240 15:07:56.912592      I2C: 00:10

 1241 15:07:56.915752     PCI: 00:15.2

 1242 15:07:56.926059     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1243 15:07:56.926201     PCI: 00:15.3

 1244 15:07:56.935803     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1245 15:07:56.939482     PCI: 00:16.0

 1246 15:07:56.948986     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1247 15:07:56.949069     PCI: 00:19.0

 1248 15:07:56.952518     PCI: 00:19.1 child on link 0 I2C: 00:15

 1249 15:07:56.962241     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1250 15:07:56.965841      I2C: 00:15

 1251 15:07:56.969172     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1252 15:07:56.978838     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1253 15:07:56.989184     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1254 15:07:56.995777     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1255 15:07:56.998865      GENERIC: 0.0

 1256 15:07:57.002363      PCI: 01:00.0

 1257 15:07:57.012628      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1258 15:07:57.018685      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1259 15:07:57.028895      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1260 15:07:57.031878     PCI: 00:1e.0

 1261 15:07:57.041790     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1262 15:07:57.045454     PCI: 00:1e.2 child on link 0 SPI: 00

 1263 15:07:57.055223     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1264 15:07:57.058706      SPI: 00

 1265 15:07:57.062186     PCI: 00:1e.3 child on link 0 SPI: 00

 1266 15:07:57.071924     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1267 15:07:57.072028      SPI: 00

 1268 15:07:57.078418     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1269 15:07:57.084922     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1270 15:07:57.088308      PNP: 0c09.0

 1271 15:07:57.095195      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1272 15:07:57.101812     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1273 15:07:57.111673     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1274 15:07:57.117979     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1275 15:07:57.125188      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1276 15:07:57.125275       GENERIC: 0.0

 1277 15:07:57.128271       GENERIC: 1.0

 1278 15:07:57.128357     PCI: 00:1f.3

 1279 15:07:57.138059     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1280 15:07:57.147837     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1281 15:07:57.151513     PCI: 00:1f.5

 1282 15:07:57.161101     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1283 15:07:57.164467    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1284 15:07:57.164551     APIC: 00

 1285 15:07:57.168007     APIC: 01

 1286 15:07:57.168090     APIC: 03

 1287 15:07:57.168158     APIC: 06

 1288 15:07:57.171072     APIC: 04

 1289 15:07:57.171180     APIC: 05

 1290 15:07:57.174729     APIC: 02

 1291 15:07:57.174813     APIC: 07

 1292 15:07:57.181424  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1293 15:07:57.187895   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1294 15:07:57.194177   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1295 15:07:57.201327   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1296 15:07:57.204035    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1297 15:07:57.207354    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1298 15:07:57.213930    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1299 15:07:57.220743   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1300 15:07:57.227518   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1301 15:07:57.233936   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1302 15:07:57.240843  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1303 15:07:57.247504  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1304 15:07:57.257261   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1305 15:07:57.263923   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1306 15:07:57.270483   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1307 15:07:57.274198   DOMAIN: 0000: Resource ranges:

 1308 15:07:57.277048   * Base: 1000, Size: 800, Tag: 100

 1309 15:07:57.280772   * Base: 1900, Size: e700, Tag: 100

 1310 15:07:57.286906    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1311 15:07:57.293894  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1312 15:07:57.300342  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1313 15:07:57.306916   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1314 15:07:57.316932   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1315 15:07:57.323454   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1316 15:07:57.330170   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1317 15:07:57.339988   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1318 15:07:57.346737   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1319 15:07:57.353495   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1320 15:07:57.363189   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1321 15:07:57.369808   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1322 15:07:57.376922   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1323 15:07:57.386374   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1324 15:07:57.392919   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1325 15:07:57.399631   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1326 15:07:57.409376   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1327 15:07:57.416276   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1328 15:07:57.422790   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1329 15:07:57.432899   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1330 15:07:57.439524   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1331 15:07:57.446312   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1332 15:07:57.456198   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1333 15:07:57.462820   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1334 15:07:57.469033   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1335 15:07:57.472576   DOMAIN: 0000: Resource ranges:

 1336 15:07:57.479211   * Base: 7fc00000, Size: 40400000, Tag: 200

 1337 15:07:57.482870   * Base: d0000000, Size: 28000000, Tag: 200

 1338 15:07:57.485975   * Base: fa000000, Size: 1000000, Tag: 200

 1339 15:07:57.488916   * Base: fb001000, Size: 2fff000, Tag: 200

 1340 15:07:57.495645   * Base: fe010000, Size: 2e000, Tag: 200

 1341 15:07:57.499255   * Base: fe03f000, Size: d41000, Tag: 200

 1342 15:07:57.502338   * Base: fed88000, Size: 8000, Tag: 200

 1343 15:07:57.505881   * Base: fed93000, Size: d000, Tag: 200

 1344 15:07:57.512419   * Base: feda2000, Size: 1e000, Tag: 200

 1345 15:07:57.515437   * Base: fede0000, Size: 1220000, Tag: 200

 1346 15:07:57.518924   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1347 15:07:57.528820    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1348 15:07:57.535285    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1349 15:07:57.542176    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1350 15:07:57.548886    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1351 15:07:57.555508    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1352 15:07:57.562153    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1353 15:07:57.568414    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1354 15:07:57.575152    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1355 15:07:57.581771    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1356 15:07:57.588508    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1357 15:07:57.594936    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1358 15:07:57.601591    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1359 15:07:57.608317    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1360 15:07:57.614770    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1361 15:07:57.621424    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1362 15:07:57.628056    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1363 15:07:57.634619    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1364 15:07:57.641543    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1365 15:07:57.647786    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1366 15:07:57.655001    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1367 15:07:57.661177    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1368 15:07:57.667969    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1369 15:07:57.674664  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1370 15:07:57.681366  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1371 15:07:57.684386   PCI: 00:1d.0: Resource ranges:

 1372 15:07:57.687647   * Base: 7fc00000, Size: 100000, Tag: 200

 1373 15:07:57.694289    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1374 15:07:57.701074    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1375 15:07:57.707394    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1376 15:07:57.717451  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1377 15:07:57.724460  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1378 15:07:57.730925  Root Device assign_resources, bus 0 link: 0

 1379 15:07:57.734253  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1380 15:07:57.740734  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1381 15:07:57.750873  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1382 15:07:57.757272  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1383 15:07:57.767369  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1384 15:07:57.770409  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1385 15:07:57.777142  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1386 15:07:57.783850  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1387 15:07:57.793720  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1388 15:07:57.800123  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1389 15:07:57.803686  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1390 15:07:57.810531  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1391 15:07:57.817029  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1392 15:07:57.823602  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1393 15:07:57.827150  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1394 15:07:57.836641  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1395 15:07:57.843344  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1396 15:07:57.853342  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1397 15:07:57.856707  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1398 15:07:57.860094  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1399 15:07:57.870071  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1400 15:07:57.873234  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1401 15:07:57.879480  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1402 15:07:57.886773  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1403 15:07:57.893002  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1404 15:07:57.896112  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1405 15:07:57.902907  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1406 15:07:57.912700  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1407 15:07:57.919410  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1408 15:07:57.929457  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1409 15:07:57.932473  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1410 15:07:57.939108  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1411 15:07:57.945921  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1412 15:07:57.955762  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1413 15:07:57.965481  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1414 15:07:57.969076  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1415 15:07:57.978644  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1416 15:07:57.985307  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1417 15:07:57.991822  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1418 15:07:57.998913  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1419 15:07:58.005493  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1420 15:07:58.011809  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1421 15:07:58.015381  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1422 15:07:58.025240  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1423 15:07:58.028345  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1424 15:07:58.035054  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1425 15:07:58.038137  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1426 15:07:58.041995  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1427 15:07:58.048441  LPC: Trying to open IO window from 800 size 1ff

 1428 15:07:58.054728  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1429 15:07:58.064679  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1430 15:07:58.071417  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1431 15:07:58.078273  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1432 15:07:58.081442  Root Device assign_resources, bus 0 link: 0

 1433 15:07:58.084890  Done setting resources.

 1434 15:07:58.091424  Show resources in subtree (Root Device)...After assigning values.

 1435 15:07:58.094927   Root Device child on link 0 DOMAIN: 0000

 1436 15:07:58.098350    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1437 15:07:58.107779    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1438 15:07:58.117776    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1439 15:07:58.121376     PCI: 00:00.0

 1440 15:07:58.131521     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1441 15:07:58.141362     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1442 15:07:58.147798     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1443 15:07:58.157853     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1444 15:07:58.167441     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1445 15:07:58.177829     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1446 15:07:58.187587     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1447 15:07:58.194037     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1448 15:07:58.204296     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1449 15:07:58.214028     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1450 15:07:58.223964     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1451 15:07:58.233841     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1452 15:07:58.243717     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1453 15:07:58.250334     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1454 15:07:58.260419     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1455 15:07:58.270112     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1456 15:07:58.280231     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1457 15:07:58.290265     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1458 15:07:58.299912     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1459 15:07:58.310179     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1460 15:07:58.310268     PCI: 00:02.0

 1461 15:07:58.320052     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1462 15:07:58.333174     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1463 15:07:58.339672     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1464 15:07:58.346544     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1465 15:07:58.356236     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1466 15:07:58.356356      GENERIC: 0.0

 1467 15:07:58.360009     PCI: 00:05.0

 1468 15:07:58.369305     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1469 15:07:58.372611     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1470 15:07:58.376369      GENERIC: 0.0

 1471 15:07:58.379523     PCI: 00:08.0

 1472 15:07:58.389304     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1473 15:07:58.389405     PCI: 00:0a.0

 1474 15:07:58.392733     PCI: 00:0d.0 child on link 0 USB0 port 0

 1475 15:07:58.406216     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1476 15:07:58.409279      USB0 port 0 child on link 0 USB3 port 0

 1477 15:07:58.409381       USB3 port 0

 1478 15:07:58.412891       USB3 port 1

 1479 15:07:58.415731       USB3 port 2

 1480 15:07:58.415866       USB3 port 3

 1481 15:07:58.419295     PCI: 00:14.0 child on link 0 USB0 port 0

 1482 15:07:58.432400     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1483 15:07:58.435875      USB0 port 0 child on link 0 USB2 port 0

 1484 15:07:58.435988       USB2 port 0

 1485 15:07:58.438864       USB2 port 1

 1486 15:07:58.442532       USB2 port 2

 1487 15:07:58.442638       USB2 port 3

 1488 15:07:58.445390       USB2 port 4

 1489 15:07:58.445466       USB2 port 5

 1490 15:07:58.448925       USB2 port 6

 1491 15:07:58.449002       USB2 port 7

 1492 15:07:58.452401       USB2 port 8

 1493 15:07:58.452478       USB2 port 9

 1494 15:07:58.455748       USB3 port 0

 1495 15:07:58.455874       USB3 port 1

 1496 15:07:58.458873       USB3 port 2

 1497 15:07:58.458955       USB3 port 3

 1498 15:07:58.461965     PCI: 00:14.2

 1499 15:07:58.472208     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1500 15:07:58.482262     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1501 15:07:58.485299     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1502 15:07:58.498440     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1503 15:07:58.498527      GENERIC: 0.0

 1504 15:07:58.501990     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1505 15:07:58.515196     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1506 15:07:58.515368      I2C: 00:1a

 1507 15:07:58.515455      I2C: 00:31

 1508 15:07:58.518421      I2C: 00:32

 1509 15:07:58.521722     PCI: 00:15.1 child on link 0 I2C: 00:10

 1510 15:07:58.531963     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1511 15:07:58.534909      I2C: 00:10

 1512 15:07:58.534992     PCI: 00:15.2

 1513 15:07:58.545139     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1514 15:07:58.548288     PCI: 00:15.3

 1515 15:07:58.558131     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1516 15:07:58.561596     PCI: 00:16.0

 1517 15:07:58.571449     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1518 15:07:58.571556     PCI: 00:19.0

 1519 15:07:58.578309     PCI: 00:19.1 child on link 0 I2C: 00:15

 1520 15:07:58.588164     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1521 15:07:58.588248      I2C: 00:15

 1522 15:07:58.591416     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1523 15:07:58.601344     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1524 15:07:58.614783     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1525 15:07:58.624392     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1526 15:07:58.624481      GENERIC: 0.0

 1527 15:07:58.627611      PCI: 01:00.0

 1528 15:07:58.637905      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1529 15:07:58.647734      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1530 15:07:58.657831      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1531 15:07:58.660804     PCI: 00:1e.0

 1532 15:07:58.670978     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1533 15:07:58.677739     PCI: 00:1e.2 child on link 0 SPI: 00

 1534 15:07:58.687456     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1535 15:07:58.687556      SPI: 00

 1536 15:07:58.691111     PCI: 00:1e.3 child on link 0 SPI: 00

 1537 15:07:58.700701     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1538 15:07:58.704118      SPI: 00

 1539 15:07:58.707573     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1540 15:07:58.717066     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1541 15:07:58.717173      PNP: 0c09.0

 1542 15:07:58.727152      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1543 15:07:58.730971     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1544 15:07:58.740749     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1545 15:07:58.750440     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1546 15:07:58.753513      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1547 15:07:58.757059       GENERIC: 0.0

 1548 15:07:58.757141       GENERIC: 1.0

 1549 15:07:58.760161     PCI: 00:1f.3

 1550 15:07:58.770262     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1551 15:07:58.780109     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1552 15:07:58.783636     PCI: 00:1f.5

 1553 15:07:58.793608     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1554 15:07:58.796765    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1555 15:07:58.796850     APIC: 00

 1556 15:07:58.799879     APIC: 01

 1557 15:07:58.799964     APIC: 03

 1558 15:07:58.803643     APIC: 06

 1559 15:07:58.803727     APIC: 04

 1560 15:07:58.803794     APIC: 05

 1561 15:07:58.806644     APIC: 02

 1562 15:07:58.806729     APIC: 07

 1563 15:07:58.810146  Done allocating resources.

 1564 15:07:58.816817  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1565 15:07:58.823287  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1566 15:07:58.826684  Configure GPIOs for I2S audio on UP4.

 1567 15:07:58.833587  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1568 15:07:58.836361  Enabling resources...

 1569 15:07:58.839849  PCI: 00:00.0 subsystem <- 8086/9a12

 1570 15:07:58.843164  PCI: 00:00.0 cmd <- 06

 1571 15:07:58.846474  PCI: 00:02.0 subsystem <- 8086/9a40

 1572 15:07:58.846582  PCI: 00:02.0 cmd <- 03

 1573 15:07:58.852825  PCI: 00:04.0 subsystem <- 8086/9a03

 1574 15:07:58.852935  PCI: 00:04.0 cmd <- 02

 1575 15:07:58.856458  PCI: 00:05.0 subsystem <- 8086/9a19

 1576 15:07:58.859513  PCI: 00:05.0 cmd <- 02

 1577 15:07:58.862849  PCI: 00:08.0 subsystem <- 8086/9a11

 1578 15:07:58.866382  PCI: 00:08.0 cmd <- 06

 1579 15:07:58.869461  PCI: 00:0d.0 subsystem <- 8086/9a13

 1580 15:07:58.873007  PCI: 00:0d.0 cmd <- 02

 1581 15:07:58.875914  PCI: 00:14.0 subsystem <- 8086/a0ed

 1582 15:07:58.879592  PCI: 00:14.0 cmd <- 02

 1583 15:07:58.882635  PCI: 00:14.2 subsystem <- 8086/a0ef

 1584 15:07:58.886252  PCI: 00:14.2 cmd <- 02

 1585 15:07:58.889196  PCI: 00:14.3 subsystem <- 8086/a0f0

 1586 15:07:58.892343  PCI: 00:14.3 cmd <- 02

 1587 15:07:58.895883  PCI: 00:15.0 subsystem <- 8086/a0e8

 1588 15:07:58.895989  PCI: 00:15.0 cmd <- 02

 1589 15:07:58.902877  PCI: 00:15.1 subsystem <- 8086/a0e9

 1590 15:07:58.902986  PCI: 00:15.1 cmd <- 02

 1591 15:07:58.905670  PCI: 00:15.2 subsystem <- 8086/a0ea

 1592 15:07:58.909543  PCI: 00:15.2 cmd <- 02

 1593 15:07:58.912362  PCI: 00:15.3 subsystem <- 8086/a0eb

 1594 15:07:58.915697  PCI: 00:15.3 cmd <- 02

 1595 15:07:58.919024  PCI: 00:16.0 subsystem <- 8086/a0e0

 1596 15:07:58.922535  PCI: 00:16.0 cmd <- 02

 1597 15:07:58.926044  PCI: 00:19.1 subsystem <- 8086/a0c6

 1598 15:07:58.929385  PCI: 00:19.1 cmd <- 02

 1599 15:07:58.932595  PCI: 00:1d.0 bridge ctrl <- 0013

 1600 15:07:58.935838  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1601 15:07:58.939198  PCI: 00:1d.0 cmd <- 06

 1602 15:07:58.942732  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1603 15:07:58.945973  PCI: 00:1e.0 cmd <- 06

 1604 15:07:58.948727  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1605 15:07:58.948834  PCI: 00:1e.2 cmd <- 06

 1606 15:07:58.955796  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1607 15:07:58.955941  PCI: 00:1e.3 cmd <- 02

 1608 15:07:58.958982  PCI: 00:1f.0 subsystem <- 8086/a087

 1609 15:07:58.962500  PCI: 00:1f.0 cmd <- 407

 1610 15:07:58.965388  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1611 15:07:58.969053  PCI: 00:1f.3 cmd <- 02

 1612 15:07:58.972129  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1613 15:07:58.975649  PCI: 00:1f.5 cmd <- 406

 1614 15:07:58.979747  PCI: 01:00.0 cmd <- 02

 1615 15:07:58.984363  done.

 1616 15:07:58.987652  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1617 15:07:58.991049  Initializing devices...

 1618 15:07:58.994001  Root Device init

 1619 15:07:58.997518  Chrome EC: Set SMI mask to 0x0000000000000000

 1620 15:07:59.004095  Chrome EC: clear events_b mask to 0x0000000000000000

 1621 15:07:59.010529  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1622 15:07:59.017489  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1623 15:07:59.024012  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1624 15:07:59.026985  Chrome EC: Set WAKE mask to 0x0000000000000000

 1625 15:07:59.034192  fw_config match found: DB_USB=USB3_ACTIVE

 1626 15:07:59.037517  Configure Right Type-C port orientation for retimer

 1627 15:07:59.040905  Root Device init finished in 45 msecs

 1628 15:07:59.044668  PCI: 00:00.0 init

 1629 15:07:59.047889  CPU TDP = 9 Watts

 1630 15:07:59.047966  CPU PL1 = 9 Watts

 1631 15:07:59.051413  CPU PL2 = 40 Watts

 1632 15:07:59.054685  CPU PL4 = 83 Watts

 1633 15:07:59.057910  PCI: 00:00.0 init finished in 8 msecs

 1634 15:07:59.058023  PCI: 00:02.0 init

 1635 15:07:59.061561  GMA: Found VBT in CBFS

 1636 15:07:59.065072  GMA: Found valid VBT in CBFS

 1637 15:07:59.071753  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1638 15:07:59.078171                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1639 15:07:59.081679  PCI: 00:02.0 init finished in 18 msecs

 1640 15:07:59.084640  PCI: 00:05.0 init

 1641 15:07:59.087782  PCI: 00:05.0 init finished in 0 msecs

 1642 15:07:59.091372  PCI: 00:08.0 init

 1643 15:07:59.094340  PCI: 00:08.0 init finished in 0 msecs

 1644 15:07:59.097896  PCI: 00:14.0 init

 1645 15:07:59.101481  PCI: 00:14.0 init finished in 0 msecs

 1646 15:07:59.104385  PCI: 00:14.2 init

 1647 15:07:59.107903  PCI: 00:14.2 init finished in 0 msecs

 1648 15:07:59.111024  PCI: 00:15.0 init

 1649 15:07:59.111100  I2C bus 0 version 0x3230302a

 1650 15:07:59.117716  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1651 15:07:59.121035  PCI: 00:15.0 init finished in 6 msecs

 1652 15:07:59.121113  PCI: 00:15.1 init

 1653 15:07:59.124503  I2C bus 1 version 0x3230302a

 1654 15:07:59.127617  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1655 15:07:59.134116  PCI: 00:15.1 init finished in 6 msecs

 1656 15:07:59.134193  PCI: 00:15.2 init

 1657 15:07:59.137377  I2C bus 2 version 0x3230302a

 1658 15:07:59.140855  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1659 15:07:59.143991  PCI: 00:15.2 init finished in 6 msecs

 1660 15:07:59.147709  PCI: 00:15.3 init

 1661 15:07:59.150728  I2C bus 3 version 0x3230302a

 1662 15:07:59.153928  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1663 15:07:59.157492  PCI: 00:15.3 init finished in 6 msecs

 1664 15:07:59.161046  PCI: 00:16.0 init

 1665 15:07:59.164157  PCI: 00:16.0 init finished in 0 msecs

 1666 15:07:59.167245  PCI: 00:19.1 init

 1667 15:07:59.170858  I2C bus 5 version 0x3230302a

 1668 15:07:59.173958  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1669 15:07:59.177513  PCI: 00:19.1 init finished in 6 msecs

 1670 15:07:59.180602  PCI: 00:1d.0 init

 1671 15:07:59.180687  Initializing PCH PCIe bridge.

 1672 15:07:59.187130  PCI: 00:1d.0 init finished in 3 msecs

 1673 15:07:59.190815  PCI: 00:1f.0 init

 1674 15:07:59.193873  IOAPIC: Initializing IOAPIC at 0xfec00000

 1675 15:07:59.196965  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1676 15:07:59.200615  IOAPIC: ID = 0x02

 1677 15:07:59.203579  IOAPIC: Dumping registers

 1678 15:07:59.203693    reg 0x0000: 0x02000000

 1679 15:07:59.207347    reg 0x0001: 0x00770020

 1680 15:07:59.210280    reg 0x0002: 0x00000000

 1681 15:07:59.213984  PCI: 00:1f.0 init finished in 21 msecs

 1682 15:07:59.217003  PCI: 00:1f.2 init

 1683 15:07:59.220414  Disabling ACPI via APMC.

 1684 15:07:59.224338  APMC done.

 1685 15:07:59.227115  PCI: 00:1f.2 init finished in 6 msecs

 1686 15:07:59.238731  PCI: 01:00.0 init

 1687 15:07:59.242085  PCI: 01:00.0 init finished in 0 msecs

 1688 15:07:59.245573  PNP: 0c09.0 init

 1689 15:07:59.252195  Google Chrome EC uptime: 8.417 seconds

 1690 15:07:59.255300  Google Chrome AP resets since EC boot: 0

 1691 15:07:59.258497  Google Chrome most recent AP reset causes:

 1692 15:07:59.265087  Google Chrome EC reset flags at last EC boot: reset-pin

 1693 15:07:59.268674  PNP: 0c09.0 init finished in 19 msecs

 1694 15:07:59.273604  Devices initialized

 1695 15:07:59.277201  Show all devs... After init.

 1696 15:07:59.280560  Root Device: enabled 1

 1697 15:07:59.280646  DOMAIN: 0000: enabled 1

 1698 15:07:59.283487  CPU_CLUSTER: 0: enabled 1

 1699 15:07:59.287297  PCI: 00:00.0: enabled 1

 1700 15:07:59.290678  PCI: 00:02.0: enabled 1

 1701 15:07:59.290758  PCI: 00:04.0: enabled 1

 1702 15:07:59.293890  PCI: 00:05.0: enabled 1

 1703 15:07:59.297134  PCI: 00:06.0: enabled 0

 1704 15:07:59.300205  PCI: 00:07.0: enabled 0

 1705 15:07:59.300290  PCI: 00:07.1: enabled 0

 1706 15:07:59.303848  PCI: 00:07.2: enabled 0

 1707 15:07:59.306783  PCI: 00:07.3: enabled 0

 1708 15:07:59.310327  PCI: 00:08.0: enabled 1

 1709 15:07:59.310411  PCI: 00:09.0: enabled 0

 1710 15:07:59.313488  PCI: 00:0a.0: enabled 0

 1711 15:07:59.316938  PCI: 00:0d.0: enabled 1

 1712 15:07:59.320055  PCI: 00:0d.1: enabled 0

 1713 15:07:59.320140  PCI: 00:0d.2: enabled 0

 1714 15:07:59.323410  PCI: 00:0d.3: enabled 0

 1715 15:07:59.326701  PCI: 00:0e.0: enabled 0

 1716 15:07:59.326782  PCI: 00:10.2: enabled 1

 1717 15:07:59.330152  PCI: 00:10.6: enabled 0

 1718 15:07:59.333873  PCI: 00:10.7: enabled 0

 1719 15:07:59.336966  PCI: 00:12.0: enabled 0

 1720 15:07:59.337039  PCI: 00:12.6: enabled 0

 1721 15:07:59.340088  PCI: 00:13.0: enabled 0

 1722 15:07:59.343254  PCI: 00:14.0: enabled 1

 1723 15:07:59.346765  PCI: 00:14.1: enabled 0

 1724 15:07:59.346865  PCI: 00:14.2: enabled 1

 1725 15:07:59.349940  PCI: 00:14.3: enabled 1

 1726 15:07:59.353358  PCI: 00:15.0: enabled 1

 1727 15:07:59.356538  PCI: 00:15.1: enabled 1

 1728 15:07:59.356656  PCI: 00:15.2: enabled 1

 1729 15:07:59.360033  PCI: 00:15.3: enabled 1

 1730 15:07:59.363351  PCI: 00:16.0: enabled 1

 1731 15:07:59.363458  PCI: 00:16.1: enabled 0

 1732 15:07:59.366608  PCI: 00:16.2: enabled 0

 1733 15:07:59.370190  PCI: 00:16.3: enabled 0

 1734 15:07:59.373649  PCI: 00:16.4: enabled 0

 1735 15:07:59.373755  PCI: 00:16.5: enabled 0

 1736 15:07:59.376857  PCI: 00:17.0: enabled 0

 1737 15:07:59.379890  PCI: 00:19.0: enabled 0

 1738 15:07:59.383128  PCI: 00:19.1: enabled 1

 1739 15:07:59.383212  PCI: 00:19.2: enabled 0

 1740 15:07:59.386767  PCI: 00:1c.0: enabled 1

 1741 15:07:59.389729  PCI: 00:1c.1: enabled 0

 1742 15:07:59.393122  PCI: 00:1c.2: enabled 0

 1743 15:07:59.393209  PCI: 00:1c.3: enabled 0

 1744 15:07:59.396814  PCI: 00:1c.4: enabled 0

 1745 15:07:59.399977  PCI: 00:1c.5: enabled 0

 1746 15:07:59.403119  PCI: 00:1c.6: enabled 1

 1747 15:07:59.403199  PCI: 00:1c.7: enabled 0

 1748 15:07:59.406806  PCI: 00:1d.0: enabled 1

 1749 15:07:59.409810  PCI: 00:1d.1: enabled 0

 1750 15:07:59.409895  PCI: 00:1d.2: enabled 1

 1751 15:07:59.413139  PCI: 00:1d.3: enabled 0

 1752 15:07:59.416376  PCI: 00:1e.0: enabled 1

 1753 15:07:59.419945  PCI: 00:1e.1: enabled 0

 1754 15:07:59.420033  PCI: 00:1e.2: enabled 1

 1755 15:07:59.423163  PCI: 00:1e.3: enabled 1

 1756 15:07:59.426331  PCI: 00:1f.0: enabled 1

 1757 15:07:59.429518  PCI: 00:1f.1: enabled 0

 1758 15:07:59.429594  PCI: 00:1f.2: enabled 1

 1759 15:07:59.433186  PCI: 00:1f.3: enabled 1

 1760 15:07:59.436404  PCI: 00:1f.4: enabled 0

 1761 15:07:59.440142  PCI: 00:1f.5: enabled 1

 1762 15:07:59.440231  PCI: 00:1f.6: enabled 0

 1763 15:07:59.442863  PCI: 00:1f.7: enabled 0

 1764 15:07:59.446470  APIC: 00: enabled 1

 1765 15:07:59.446583  GENERIC: 0.0: enabled 1

 1766 15:07:59.449664  GENERIC: 0.0: enabled 1

 1767 15:07:59.453226  GENERIC: 1.0: enabled 1

 1768 15:07:59.456584  GENERIC: 0.0: enabled 1

 1769 15:07:59.456667  GENERIC: 1.0: enabled 1

 1770 15:07:59.459439  USB0 port 0: enabled 1

 1771 15:07:59.463087  GENERIC: 0.0: enabled 1

 1772 15:07:59.463172  USB0 port 0: enabled 1

 1773 15:07:59.466454  GENERIC: 0.0: enabled 1

 1774 15:07:59.469617  I2C: 00:1a: enabled 1

 1775 15:07:59.472786  I2C: 00:31: enabled 1

 1776 15:07:59.472870  I2C: 00:32: enabled 1

 1777 15:07:59.476041  I2C: 00:10: enabled 1

 1778 15:07:59.479664  I2C: 00:15: enabled 1

 1779 15:07:59.479748  GENERIC: 0.0: enabled 0

 1780 15:07:59.482793  GENERIC: 1.0: enabled 0

 1781 15:07:59.485933  GENERIC: 0.0: enabled 1

 1782 15:07:59.486017  SPI: 00: enabled 1

 1783 15:07:59.489598  SPI: 00: enabled 1

 1784 15:07:59.492670  PNP: 0c09.0: enabled 1

 1785 15:07:59.492754  GENERIC: 0.0: enabled 1

 1786 15:07:59.496184  USB3 port 0: enabled 1

 1787 15:07:59.499664  USB3 port 1: enabled 1

 1788 15:07:59.502833  USB3 port 2: enabled 0

 1789 15:07:59.502916  USB3 port 3: enabled 0

 1790 15:07:59.505916  USB2 port 0: enabled 0

 1791 15:07:59.509470  USB2 port 1: enabled 1

 1792 15:07:59.509555  USB2 port 2: enabled 1

 1793 15:07:59.512547  USB2 port 3: enabled 0

 1794 15:07:59.515873  USB2 port 4: enabled 1

 1795 15:07:59.515976  USB2 port 5: enabled 0

 1796 15:07:59.519458  USB2 port 6: enabled 0

 1797 15:07:59.522579  USB2 port 7: enabled 0

 1798 15:07:59.526091  USB2 port 8: enabled 0

 1799 15:07:59.526175  USB2 port 9: enabled 0

 1800 15:07:59.529448  USB3 port 0: enabled 0

 1801 15:07:59.532894  USB3 port 1: enabled 1

 1802 15:07:59.532978  USB3 port 2: enabled 0

 1803 15:07:59.535883  USB3 port 3: enabled 0

 1804 15:07:59.539429  GENERIC: 0.0: enabled 1

 1805 15:07:59.542549  GENERIC: 1.0: enabled 1

 1806 15:07:59.542639  APIC: 01: enabled 1

 1807 15:07:59.546156  APIC: 03: enabled 1

 1808 15:07:59.546237  APIC: 06: enabled 1

 1809 15:07:59.549353  APIC: 04: enabled 1

 1810 15:07:59.552399  APIC: 05: enabled 1

 1811 15:07:59.552489  APIC: 02: enabled 1

 1812 15:07:59.556037  APIC: 07: enabled 1

 1813 15:07:59.559233  PCI: 01:00.0: enabled 1

 1814 15:07:59.562810  BS: BS_DEV_INIT run times (exec / console): 33 / 536 ms

 1815 15:07:59.569224  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1816 15:07:59.572416  ELOG: NV offset 0xf30000 size 0x1000

 1817 15:07:59.579418  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1818 15:07:59.585771  ELOG: Event(17) added with size 13 at 2023-06-09 15:07:59 UTC

 1819 15:07:59.592520  ELOG: Event(92) added with size 9 at 2023-06-09 15:07:59 UTC

 1820 15:07:59.598956  ELOG: Event(93) added with size 9 at 2023-06-09 15:07:59 UTC

 1821 15:07:59.605297  ELOG: Event(9E) added with size 10 at 2023-06-09 15:07:59 UTC

 1822 15:07:59.611808  ELOG: Event(9F) added with size 14 at 2023-06-09 15:07:59 UTC

 1823 15:07:59.618407  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1824 15:07:59.621803  ELOG: Event(A1) added with size 10 at 2023-06-09 15:07:59 UTC

 1825 15:07:59.632074  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1826 15:07:59.638686  ELOG: Event(A0) added with size 9 at 2023-06-09 15:07:59 UTC

 1827 15:07:59.641746  elog_add_boot_reason: Logged dev mode boot

 1828 15:07:59.648390  BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms

 1829 15:07:59.648490  Finalize devices...

 1830 15:07:59.652080  Devices finalized

 1831 15:07:59.658530  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1832 15:07:59.661796  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1833 15:07:59.668158  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1834 15:07:59.671657  ME: HFSTS1                      : 0x80030055

 1835 15:07:59.678065  ME: HFSTS2                      : 0x30280116

 1836 15:07:59.681506  ME: HFSTS3                      : 0x00000050

 1837 15:07:59.685154  ME: HFSTS4                      : 0x00004000

 1838 15:07:59.691271  ME: HFSTS5                      : 0x00000000

 1839 15:07:59.694922  ME: HFSTS6                      : 0x00400006

 1840 15:07:59.697940  ME: Manufacturing Mode          : YES

 1841 15:07:59.701510  ME: SPI Protection Mode Enabled : NO

 1842 15:07:59.705071  ME: FW Partition Table          : OK

 1843 15:07:59.711662  ME: Bringup Loader Failure      : NO

 1844 15:07:59.714958  ME: Firmware Init Complete      : NO

 1845 15:07:59.717923  ME: Boot Options Present        : NO

 1846 15:07:59.721403  ME: Update In Progress          : NO

 1847 15:07:59.724805  ME: D0i3 Support                : YES

 1848 15:07:59.727949  ME: Low Power State Enabled     : NO

 1849 15:07:59.731487  ME: CPU Replaced                : YES

 1850 15:07:59.734542  ME: CPU Replacement Valid       : YES

 1851 15:07:59.741071  ME: Current Working State       : 5

 1852 15:07:59.744426  ME: Current Operation State     : 1

 1853 15:07:59.747647  ME: Current Operation Mode      : 3

 1854 15:07:59.751409  ME: Error Code                  : 0

 1855 15:07:59.754862  ME: Enhanced Debug Mode         : NO

 1856 15:07:59.757846  ME: CPU Debug Disabled          : YES

 1857 15:07:59.761438  ME: TXT Support                 : NO

 1858 15:07:59.768087  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1859 15:07:59.774775  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1860 15:07:59.777849  CBFS: 'fallback/slic' not found.

 1861 15:07:59.784258  ACPI: Writing ACPI tables at 76b01000.

 1862 15:07:59.784375  ACPI:    * FACS

 1863 15:07:59.787489  ACPI:    * DSDT

 1864 15:07:59.790858  Ramoops buffer: 0x100000@0x76a00000.

 1865 15:07:59.794517  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1866 15:07:59.800933  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1867 15:07:59.804451  Google Chrome EC: version:

 1868 15:07:59.807297  	ro: voema_v2.0.10114-a447f03e46

 1869 15:07:59.810823  	rw: voema_v2.0.10114-a447f03e46

 1870 15:07:59.810904    running image: 1

 1871 15:07:59.817391  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1872 15:07:59.821578  ACPI:    * FADT

 1873 15:07:59.821663  SCI is IRQ9

 1874 15:07:59.828597  ACPI: added table 1/32, length now 40

 1875 15:07:59.828713  ACPI:     * SSDT

 1876 15:07:59.831802  Found 1 CPU(s) with 8 core(s) each.

 1877 15:07:59.838508  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1878 15:07:59.841463  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1879 15:07:59.845171  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1880 15:07:59.848253  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1881 15:07:59.855193  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1882 15:07:59.861658  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1883 15:07:59.864720  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1884 15:07:59.871421  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1885 15:07:59.878091  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1886 15:07:59.881928  \_SB.PCI0.RP09: Added StorageD3Enable property

 1887 15:07:59.887836  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1888 15:07:59.890923  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1889 15:07:59.897660  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1890 15:07:59.901093  PS2K: Passing 80 keymaps to kernel

 1891 15:07:59.907708  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1892 15:07:59.914131  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1893 15:07:59.920858  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1894 15:07:59.927595  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1895 15:07:59.934004  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1896 15:07:59.940895  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1897 15:07:59.947285  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1898 15:07:59.954109  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1899 15:07:59.957147  ACPI: added table 2/32, length now 44

 1900 15:07:59.957240  ACPI:    * MCFG

 1901 15:07:59.960622  ACPI: added table 3/32, length now 48

 1902 15:07:59.963718  ACPI:    * TPM2

 1903 15:07:59.967311  TPM2 log created at 0x769f0000

 1904 15:07:59.970376  ACPI: added table 4/32, length now 52

 1905 15:07:59.970465  ACPI:    * MADT

 1906 15:07:59.973874  SCI is IRQ9

 1907 15:07:59.977382  ACPI: added table 5/32, length now 56

 1908 15:07:59.980494  current = 76b09850

 1909 15:07:59.980586  ACPI:    * DMAR

 1910 15:07:59.983622  ACPI: added table 6/32, length now 60

 1911 15:07:59.987148  ACPI: added table 7/32, length now 64

 1912 15:07:59.990223  ACPI:    * HPET

 1913 15:07:59.993442  ACPI: added table 8/32, length now 68

 1914 15:07:59.996771  ACPI: done.

 1915 15:07:59.996876  ACPI tables: 35216 bytes.

 1916 15:08:00.000292  smbios_write_tables: 769ef000

 1917 15:08:00.003397  EC returned error result code 3

 1918 15:08:00.006820  Couldn't obtain OEM name from CBI

 1919 15:08:00.010240  Create SMBIOS type 16

 1920 15:08:00.013316  Create SMBIOS type 17

 1921 15:08:00.016696  GENERIC: 0.0 (WIFI Device)

 1922 15:08:00.019804  SMBIOS tables: 1750 bytes.

 1923 15:08:00.023006  Writing table forward entry at 0x00000500

 1924 15:08:00.029701  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1925 15:08:00.033103  Writing coreboot table at 0x76b25000

 1926 15:08:00.039759   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1927 15:08:00.043268   1. 0000000000001000-000000000009ffff: RAM

 1928 15:08:00.046459   2. 00000000000a0000-00000000000fffff: RESERVED

 1929 15:08:00.053439   3. 0000000000100000-00000000769eefff: RAM

 1930 15:08:00.056691   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1931 15:08:00.063288   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1932 15:08:00.069798   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1933 15:08:00.073293   7. 0000000077000000-000000007fbfffff: RESERVED

 1934 15:08:00.079533   8. 00000000c0000000-00000000cfffffff: RESERVED

 1935 15:08:00.083010   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1936 15:08:00.086648  10. 00000000fb000000-00000000fb000fff: RESERVED

 1937 15:08:00.092801  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1938 15:08:00.096190  12. 00000000fed80000-00000000fed87fff: RESERVED

 1939 15:08:00.102726  13. 00000000fed90000-00000000fed92fff: RESERVED

 1940 15:08:00.106017  14. 00000000feda0000-00000000feda1fff: RESERVED

 1941 15:08:00.113082  15. 00000000fedc0000-00000000feddffff: RESERVED

 1942 15:08:00.116274  16. 0000000100000000-00000002803fffff: RAM

 1943 15:08:00.119543  Passing 4 GPIOs to payload:

 1944 15:08:00.122648              NAME |       PORT | POLARITY |     VALUE

 1945 15:08:00.129410               lid |  undefined |     high |      high

 1946 15:08:00.136196             power |  undefined |     high |       low

 1947 15:08:00.139614             oprom |  undefined |     high |       low

 1948 15:08:00.146424          EC in RW | 0x000000e5 |     high |       low

 1949 15:08:00.152900  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8b29

 1950 15:08:00.153034  coreboot table: 1576 bytes.

 1951 15:08:00.159572  IMD ROOT    0. 0x76fff000 0x00001000

 1952 15:08:00.162541  IMD SMALL   1. 0x76ffe000 0x00001000

 1953 15:08:00.166237  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1954 15:08:00.169179  VPD         3. 0x76c4d000 0x00000367

 1955 15:08:00.172620  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1956 15:08:00.176114  CONSOLE     5. 0x76c2c000 0x00020000

 1957 15:08:00.179287  FMAP        6. 0x76c2b000 0x00000578

 1958 15:08:00.182439  TIME STAMP  7. 0x76c2a000 0x00000910

 1959 15:08:00.189118  VBOOT WORK  8. 0x76c16000 0x00014000

 1960 15:08:00.192699  ROMSTG STCK 9. 0x76c15000 0x00001000

 1961 15:08:00.195782  AFTER CAR  10. 0x76c0a000 0x0000b000

 1962 15:08:00.199292  RAMSTAGE   11. 0x76b97000 0x00073000

 1963 15:08:00.202389  REFCODE    12. 0x76b42000 0x00055000

 1964 15:08:00.206021  SMM BACKUP 13. 0x76b32000 0x00010000

 1965 15:08:00.209055  4f444749   14. 0x76b30000 0x00002000

 1966 15:08:00.212538  EXT VBT15. 0x76b2d000 0x0000219f

 1967 15:08:00.216119  COREBOOT   16. 0x76b25000 0x00008000

 1968 15:08:00.219413  ACPI       17. 0x76b01000 0x00024000

 1969 15:08:00.226018  ACPI GNVS  18. 0x76b00000 0x00001000

 1970 15:08:00.229416  RAMOOPS    19. 0x76a00000 0x00100000

 1971 15:08:00.232652  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1972 15:08:00.235796  SMBIOS     21. 0x769ef000 0x00000800

 1973 15:08:00.239356  IMD small region:

 1974 15:08:00.242632    IMD ROOT    0. 0x76ffec00 0x00000400

 1975 15:08:00.245674    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1976 15:08:00.249287    POWER STATE 2. 0x76ffeb80 0x00000044

 1977 15:08:00.252337    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1978 15:08:00.255893    MEM INFO    4. 0x76ffe980 0x000001e0

 1979 15:08:00.262574  BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms

 1980 15:08:00.266177  MTRR: Physical address space:

 1981 15:08:00.272391  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1982 15:08:00.279226  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1983 15:08:00.285883  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1984 15:08:00.292519  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1985 15:08:00.298828  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1986 15:08:00.302208  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1987 15:08:00.308797  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1988 15:08:00.315337  MTRR: Fixed MSR 0x250 0x0606060606060606

 1989 15:08:00.318781  MTRR: Fixed MSR 0x258 0x0606060606060606

 1990 15:08:00.321994  MTRR: Fixed MSR 0x259 0x0000000000000000

 1991 15:08:00.325600  MTRR: Fixed MSR 0x268 0x0606060606060606

 1992 15:08:00.329058  MTRR: Fixed MSR 0x269 0x0606060606060606

 1993 15:08:00.335670  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1994 15:08:00.338605  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1995 15:08:00.342200  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1996 15:08:00.345357  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1997 15:08:00.351900  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1998 15:08:00.355639  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1999 15:08:00.358584  call enable_fixed_mtrr()

 2000 15:08:00.362251  CPU physical address size: 39 bits

 2001 15:08:00.365299  MTRR: default type WB/UC MTRR counts: 6/6.

 2002 15:08:00.368660  MTRR: UC selected as default type.

 2003 15:08:00.375097  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2004 15:08:00.382473  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2005 15:08:00.388882  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2006 15:08:00.394942  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 2007 15:08:00.401618  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2008 15:08:00.408330  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 2009 15:08:00.408433  

 2010 15:08:00.411812  MTRR check

 2011 15:08:00.411936  Fixed MTRRs   : Enabled

 2012 15:08:00.414971  Variable MTRRs: Enabled

 2013 15:08:00.415043  

 2014 15:08:00.418458  MTRR: Fixed MSR 0x250 0x0606060606060606

 2015 15:08:00.425097  MTRR: Fixed MSR 0x258 0x0606060606060606

 2016 15:08:00.428420  MTRR: Fixed MSR 0x259 0x0000000000000000

 2017 15:08:00.431752  MTRR: Fixed MSR 0x268 0x0606060606060606

 2018 15:08:00.434980  MTRR: Fixed MSR 0x269 0x0606060606060606

 2019 15:08:00.441428  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2020 15:08:00.445011  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2021 15:08:00.448103  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2022 15:08:00.451601  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2023 15:08:00.454690  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2024 15:08:00.461454  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2025 15:08:00.468003  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2026 15:08:00.471257  call enable_fixed_mtrr()

 2027 15:08:00.475417  Checking cr50 for pending updates

 2028 15:08:00.475515  CPU physical address size: 39 bits

 2029 15:08:00.482384  MTRR: Fixed MSR 0x250 0x0606060606060606

 2030 15:08:00.485384  MTRR: Fixed MSR 0x250 0x0606060606060606

 2031 15:08:00.488973  MTRR: Fixed MSR 0x258 0x0606060606060606

 2032 15:08:00.492030  MTRR: Fixed MSR 0x259 0x0000000000000000

 2033 15:08:00.498909  MTRR: Fixed MSR 0x268 0x0606060606060606

 2034 15:08:00.501886  MTRR: Fixed MSR 0x269 0x0606060606060606

 2035 15:08:00.505097  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2036 15:08:00.508734  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2037 15:08:00.515220  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2038 15:08:00.518432  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2039 15:08:00.521895  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2040 15:08:00.525116  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2041 15:08:00.532637  MTRR: Fixed MSR 0x258 0x0606060606060606

 2042 15:08:00.535684  MTRR: Fixed MSR 0x259 0x0000000000000000

 2043 15:08:00.538971  MTRR: Fixed MSR 0x268 0x0606060606060606

 2044 15:08:00.542666  MTRR: Fixed MSR 0x269 0x0606060606060606

 2045 15:08:00.548914  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2046 15:08:00.552325  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2047 15:08:00.555736  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2048 15:08:00.559247  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2049 15:08:00.565955  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2050 15:08:00.568854  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2051 15:08:00.572549  call enable_fixed_mtrr()

 2052 15:08:00.575361  call enable_fixed_mtrr()

 2053 15:08:00.578911  MTRR: Fixed MSR 0x250 0x0606060606060606

 2054 15:08:00.582407  MTRR: Fixed MSR 0x250 0x0606060606060606

 2055 15:08:00.585235  MTRR: Fixed MSR 0x258 0x0606060606060606

 2056 15:08:00.591897  MTRR: Fixed MSR 0x259 0x0000000000000000

 2057 15:08:00.595553  MTRR: Fixed MSR 0x268 0x0606060606060606

 2058 15:08:00.598747  MTRR: Fixed MSR 0x269 0x0606060606060606

 2059 15:08:00.601858  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2060 15:08:00.608850  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2061 15:08:00.611928  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2062 15:08:00.615126  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2063 15:08:00.618423  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2064 15:08:00.621879  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2065 15:08:00.628596  MTRR: Fixed MSR 0x258 0x0606060606060606

 2066 15:08:00.632006  call enable_fixed_mtrr()

 2067 15:08:00.635398  MTRR: Fixed MSR 0x259 0x0000000000000000

 2068 15:08:00.638603  MTRR: Fixed MSR 0x268 0x0606060606060606

 2069 15:08:00.641971  MTRR: Fixed MSR 0x269 0x0606060606060606

 2070 15:08:00.648545  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2071 15:08:00.651999  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2072 15:08:00.655204  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2073 15:08:00.658740  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2074 15:08:00.665151  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2075 15:08:00.668397  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2076 15:08:00.671450  CPU physical address size: 39 bits

 2077 15:08:00.675493  call enable_fixed_mtrr()

 2078 15:08:00.679016  Reading cr50 TPM mode

 2079 15:08:00.682964  CPU physical address size: 39 bits

 2080 15:08:00.686472  CPU physical address size: 39 bits

 2081 15:08:00.689569  MTRR: Fixed MSR 0x250 0x0606060606060606

 2082 15:08:00.696264  MTRR: Fixed MSR 0x250 0x0606060606060606

 2083 15:08:00.699354  MTRR: Fixed MSR 0x258 0x0606060606060606

 2084 15:08:00.702504  MTRR: Fixed MSR 0x259 0x0000000000000000

 2085 15:08:00.705883  MTRR: Fixed MSR 0x268 0x0606060606060606

 2086 15:08:00.712723  MTRR: Fixed MSR 0x269 0x0606060606060606

 2087 15:08:00.715731  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2088 15:08:00.719296  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2089 15:08:00.722686  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2090 15:08:00.726048  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2091 15:08:00.732605  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2092 15:08:00.735717  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2093 15:08:00.739170  MTRR: Fixed MSR 0x258 0x0606060606060606

 2094 15:08:00.742771  call enable_fixed_mtrr()

 2095 15:08:00.745765  MTRR: Fixed MSR 0x259 0x0000000000000000

 2096 15:08:00.752260  MTRR: Fixed MSR 0x268 0x0606060606060606

 2097 15:08:00.755737  MTRR: Fixed MSR 0x269 0x0606060606060606

 2098 15:08:00.759290  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2099 15:08:00.762487  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2100 15:08:00.768877  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2101 15:08:00.772201  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2102 15:08:00.775777  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2103 15:08:00.779038  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2104 15:08:00.783077  CPU physical address size: 39 bits

 2105 15:08:00.789613  call enable_fixed_mtrr()

 2106 15:08:00.792869  CPU physical address size: 39 bits

 2107 15:08:00.796218  BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms

 2108 15:08:00.803154  CPU physical address size: 39 bits

 2109 15:08:00.809866  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2110 15:08:00.812753  Checking segment from ROM address 0xffc02b38

 2111 15:08:00.819522  Checking segment from ROM address 0xffc02b54

 2112 15:08:00.822967  Loading segment from ROM address 0xffc02b38

 2113 15:08:00.826323    code (compression=0)

 2114 15:08:00.832563    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2115 15:08:00.842634  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2116 15:08:00.842759  it's not compressed!

 2117 15:08:00.982898  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2118 15:08:00.989623  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2119 15:08:00.996774  Loading segment from ROM address 0xffc02b54

 2120 15:08:00.999538    Entry Point 0x30000000

 2121 15:08:00.999632  Loaded segments

 2122 15:08:01.006170  BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms

 2123 15:08:01.049413  Finalizing chipset.

 2124 15:08:01.052755  Finalizing SMM.

 2125 15:08:01.052877  APMC done.

 2126 15:08:01.059187  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2127 15:08:01.062631  mp_park_aps done after 0 msecs.

 2128 15:08:01.065962  Jumping to boot code at 0x30000000(0x76b25000)

 2129 15:08:01.076035  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2130 15:08:01.076152  

 2131 15:08:01.076217  

 2132 15:08:01.076276  

 2133 15:08:01.079198  Starting depthcharge on Voema...

 2134 15:08:01.079283  

 2135 15:08:01.079642  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2136 15:08:01.079748  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2137 15:08:01.079902  Setting prompt string to ['volteer:']
 2138 15:08:01.079987  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2139 15:08:01.089102  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2140 15:08:01.089230  

 2141 15:08:01.095700  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2142 15:08:01.095823  

 2143 15:08:01.102290  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2144 15:08:01.102402  

 2145 15:08:01.105449  Failed to find eMMC card reader

 2146 15:08:01.105556  

 2147 15:08:01.105637  Wipe memory regions:

 2148 15:08:01.105698  

 2149 15:08:01.111929  	[0x00000000001000, 0x000000000a0000)

 2150 15:08:01.112046  

 2151 15:08:01.115394  	[0x00000000100000, 0x00000030000000)

 2152 15:08:01.140501  

 2153 15:08:01.143880  	[0x00000032662db0, 0x000000769ef000)

 2154 15:08:01.180128  

 2155 15:08:01.183212  	[0x00000100000000, 0x00000280400000)

 2156 15:08:01.382012  

 2157 15:08:01.385294  ec_init: CrosEC protocol v3 supported (256, 256)

 2158 15:08:01.816377  

 2159 15:08:01.816525  R8152: Initializing

 2160 15:08:01.816595  

 2161 15:08:01.819396  Version 6 (ocp_data = 5c30)

 2162 15:08:01.819481  

 2163 15:08:01.822758  R8152: Done initializing

 2164 15:08:01.822846  

 2165 15:08:01.826255  Adding net device

 2166 15:08:02.127409  

 2167 15:08:02.130437  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2168 15:08:02.130536  

 2169 15:08:02.130601  

 2170 15:08:02.130664  

 2171 15:08:02.134164  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2173 15:08:02.234587  volteer: tftpboot 192.168.201.1 10660950/tftp-deploy-b4vheng6/kernel/bzImage 10660950/tftp-deploy-b4vheng6/kernel/cmdline 10660950/tftp-deploy-b4vheng6/ramdisk/ramdisk.cpio.gz

 2174 15:08:02.234763  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2175 15:08:02.234899  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2176 15:08:02.238854  tftpboot 192.168.201.1 10660950/tftp-deploy-b4vheng6/kernel/bzIploy-b4vheng6/kernel/cmdline 10660950/tftp-deploy-b4vheng6/ramdisk/ramdisk.cpio.gz

 2177 15:08:02.238951  

 2178 15:08:02.239019  Waiting for link

 2179 15:08:02.441659  

 2180 15:08:02.441808  done.

 2181 15:08:02.441881  

 2182 15:08:02.441942  MAC: 00:24:32:30:77:76

 2183 15:08:02.442003  

 2184 15:08:02.444864  Sending DHCP discover... done.

 2185 15:08:02.444959  

 2186 15:08:02.448481  Waiting for reply... done.

 2187 15:08:02.448572  

 2188 15:08:02.452879  Sending DHCP request... done.

 2189 15:08:02.453030  

 2190 15:08:02.458323  Waiting for reply... done.

 2191 15:08:02.458432  

 2192 15:08:02.458499  My ip is 192.168.201.16

 2193 15:08:02.458559  

 2194 15:08:02.461786  The DHCP server ip is 192.168.201.1

 2195 15:08:02.465035  

 2196 15:08:02.468000  TFTP server IP predefined by user: 192.168.201.1

 2197 15:08:02.468100  

 2198 15:08:02.474960  Bootfile predefined by user: 10660950/tftp-deploy-b4vheng6/kernel/bzImage

 2199 15:08:02.475114  

 2200 15:08:02.477869  Sending tftp read request... done.

 2201 15:08:02.477970  

 2202 15:08:02.481363  Waiting for the transfer... 

 2203 15:08:02.484818  

 2204 15:08:03.017383  00000000 ################################################################

 2205 15:08:03.017536  

 2206 15:08:03.553246  00080000 ################################################################

 2207 15:08:03.553405  

 2208 15:08:04.105256  00100000 ################################################################

 2209 15:08:04.105409  

 2210 15:08:04.653659  00180000 ################################################################

 2211 15:08:04.653847  

 2212 15:08:05.194703  00200000 ################################################################

 2213 15:08:05.194861  

 2214 15:08:05.736002  00280000 ################################################################

 2215 15:08:05.736148  

 2216 15:08:06.270944  00300000 ################################################################

 2217 15:08:06.271104  

 2218 15:08:06.795067  00380000 ################################################################

 2219 15:08:06.795216  

 2220 15:08:07.316018  00400000 ################################################################

 2221 15:08:07.316160  

 2222 15:08:07.849033  00480000 ################################################################

 2223 15:08:07.849167  

 2224 15:08:08.394595  00500000 ################################################################

 2225 15:08:08.394759  

 2226 15:08:08.939538  00580000 ################################################################

 2227 15:08:08.939675  

 2228 15:08:09.482624  00600000 ################################################################

 2229 15:08:09.482763  

 2230 15:08:10.029756  00680000 ################################################################

 2231 15:08:10.029894  

 2232 15:08:10.581354  00700000 ################################################################

 2233 15:08:10.581493  

 2234 15:08:11.150052  00780000 ################################################################

 2235 15:08:11.150182  

 2236 15:08:11.724271  00800000 ################################################################

 2237 15:08:11.724407  

 2238 15:08:12.309810  00880000 ################################################################

 2239 15:08:12.309951  

 2240 15:08:12.912091  00900000 ################################################################

 2241 15:08:12.912233  

 2242 15:08:13.495142  00980000 ################################################################

 2243 15:08:13.495277  

 2244 15:08:13.900769  00a00000 ############################################## done.

 2245 15:08:13.900904  

 2246 15:08:13.904450  The bootfile was 10858496 bytes long.

 2247 15:08:13.904534  

 2248 15:08:13.907711  Sending tftp read request... done.

 2249 15:08:13.907794  

 2250 15:08:13.910743  Waiting for the transfer... 

 2251 15:08:13.910826  

 2252 15:08:14.488493  00000000 ################################################################

 2253 15:08:14.488625  

 2254 15:08:15.089214  00080000 ################################################################

 2255 15:08:15.089352  

 2256 15:08:15.668417  00100000 ################################################################

 2257 15:08:15.668555  

 2258 15:08:16.271375  00180000 ################################################################

 2259 15:08:16.272007  

 2260 15:08:16.979627  00200000 ################################################################

 2261 15:08:16.979786  

 2262 15:08:17.564050  00280000 ################################################################

 2263 15:08:17.564194  

 2264 15:08:18.115478  00300000 ################################################################

 2265 15:08:18.115641  

 2266 15:08:18.660886  00380000 ################################################################

 2267 15:08:18.661054  

 2268 15:08:19.197045  00400000 ################################################################

 2269 15:08:19.197186  

 2270 15:08:19.759662  00480000 ################################################################

 2271 15:08:19.759798  

 2272 15:08:20.429816  00500000 ################################################################

 2273 15:08:20.430319  

 2274 15:08:20.842860  00580000 ################################################ done.

 2275 15:08:20.842999  

 2276 15:08:20.846534  Sending tftp read request... done.

 2277 15:08:20.846618  

 2278 15:08:20.849715  Waiting for the transfer... 

 2279 15:08:20.849800  

 2280 15:08:20.849864  00000000 # done.

 2281 15:08:20.849927  

 2282 15:08:20.859348  Command line loaded dynamically from TFTP file: 10660950/tftp-deploy-b4vheng6/kernel/cmdline

 2283 15:08:20.859433  

 2284 15:08:20.879262  The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10660950/extract-nfsrootfs-vv78aa2r,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2285 15:08:20.882772  

 2286 15:08:20.886338  Shutting down all USB controllers.

 2287 15:08:20.886421  

 2288 15:08:20.886487  Removing current net device

 2289 15:08:20.886553  

 2290 15:08:20.889702  Finalizing coreboot

 2291 15:08:20.889785  

 2292 15:08:20.896336  Exiting depthcharge with code 4 at timestamp: 28464317

 2293 15:08:20.896419  

 2294 15:08:20.896484  

 2295 15:08:20.896543  Starting kernel ...

 2296 15:08:20.896601  

 2297 15:08:20.896656  

 2298 15:08:20.897015  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2299 15:08:20.897111  start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
 2300 15:08:20.897189  Setting prompt string to ['Linux version [0-9]']
 2301 15:08:20.897258  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2302 15:08:20.897326  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2304 15:12:45.897394  end: 2.2.5 auto-login-action (duration 00:04:25) [common]
 2306 15:12:45.897598  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
 2308 15:12:45.897750  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2311 15:12:45.897990  end: 2 depthcharge-action (duration 00:05:00) [common]
 2313 15:12:45.898202  Cleaning after the job
 2314 15:12:45.898292  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/ramdisk
 2315 15:12:45.899189  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/kernel
 2316 15:12:45.900482  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/nfsrootfs
 2317 15:12:45.957641  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660950/tftp-deploy-b4vheng6/modules
 2318 15:12:45.958313  start: 5.1 power-off (timeout 00:00:30) [common]
 2319 15:12:45.958483  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
 2320 15:12:46.034378  >> Command sent successfully.

 2321 15:12:46.036673  Returned 0 in 0 seconds
 2322 15:12:46.137062  end: 5.1 power-off (duration 00:00:00) [common]
 2324 15:12:46.137373  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2325 15:12:46.137636  Listened to connection for namespace 'common' for up to 1s
 2326 15:12:47.138585  Finalising connection for namespace 'common'
 2327 15:12:47.138748  Disconnecting from shell: Finalise
 2328 15:12:47.138828  

 2329 15:12:47.239139  end: 5.2 read-feedback (duration 00:00:01) [common]
 2330 15:12:47.239258  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10660950
 2331 15:12:47.493074  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10660950
 2332 15:12:47.493264  JobError: Your job cannot terminate cleanly.