Boot log: asus-C436FA-Flip-hatch

    1 15:21:09.112225  lava-dispatcher, installed at version: 2023.05.1
    2 15:21:09.112426  start: 0 validate
    3 15:21:09.112551  Start time: 2023-06-09 15:21:09.112543+00:00 (UTC)
    4 15:21:09.112662  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:21:09.112784  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
    6 15:21:09.381108  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:21:09.381919  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.284-cip99%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:21:09.653413  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:21:09.654183  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 15:21:09.925195  Using caching service: 'http://localhost/cache/?uri=%s'
   11 15:21:09.925967  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.284-cip99%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 15:21:10.195207  validate duration: 1.08
   14 15:21:10.196577  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 15:21:10.197117  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 15:21:10.197629  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 15:21:10.198238  Not decompressing ramdisk as can be used compressed.
   18 15:21:10.198708  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
   19 15:21:10.199072  saving as /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/ramdisk/initrd.cpio.gz
   20 15:21:10.199413  total size: 5671546 (5MB)
   21 15:21:10.204572  progress   0% (0MB)
   22 15:21:10.213489  progress   5% (0MB)
   23 15:21:10.220702  progress  10% (0MB)
   24 15:21:10.225065  progress  15% (0MB)
   25 15:21:10.229054  progress  20% (1MB)
   26 15:21:10.232564  progress  25% (1MB)
   27 15:21:10.235193  progress  30% (1MB)
   28 15:21:10.237996  progress  35% (1MB)
   29 15:21:10.240502  progress  40% (2MB)
   30 15:21:10.242698  progress  45% (2MB)
   31 15:21:10.244875  progress  50% (2MB)
   32 15:21:10.247049  progress  55% (3MB)
   33 15:21:10.248808  progress  60% (3MB)
   34 15:21:10.250742  progress  65% (3MB)
   35 15:21:10.252657  progress  70% (3MB)
   36 15:21:10.254226  progress  75% (4MB)
   37 15:21:10.255966  progress  80% (4MB)
   38 15:21:10.257689  progress  85% (4MB)
   39 15:21:10.259122  progress  90% (4MB)
   40 15:21:10.260705  progress  95% (5MB)
   41 15:21:10.262317  progress 100% (5MB)
   42 15:21:10.262421  5MB downloaded in 0.06s (85.83MB/s)
   43 15:21:10.262566  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 15:21:10.262793  end: 1.1 download-retry (duration 00:00:00) [common]
   46 15:21:10.262876  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 15:21:10.262956  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 15:21:10.263077  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.284-cip99/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 15:21:10.263148  saving as /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/kernel/bzImage
   50 15:21:10.263209  total size: 10858496 (10MB)
   51 15:21:10.263267  No compression specified
   52 15:21:10.264356  progress   0% (0MB)
   53 15:21:10.267028  progress   5% (0MB)
   54 15:21:10.269813  progress  10% (1MB)
   55 15:21:10.272503  progress  15% (1MB)
   56 15:21:10.275359  progress  20% (2MB)
   57 15:21:10.278052  progress  25% (2MB)
   58 15:21:10.280961  progress  30% (3MB)
   59 15:21:10.283632  progress  35% (3MB)
   60 15:21:10.286503  progress  40% (4MB)
   61 15:21:10.289341  progress  45% (4MB)
   62 15:21:10.292053  progress  50% (5MB)
   63 15:21:10.294845  progress  55% (5MB)
   64 15:21:10.297524  progress  60% (6MB)
   65 15:21:10.300404  progress  65% (6MB)
   66 15:21:10.302996  progress  70% (7MB)
   67 15:21:10.305780  progress  75% (7MB)
   68 15:21:10.308584  progress  80% (8MB)
   69 15:21:10.311188  progress  85% (8MB)
   70 15:21:10.313980  progress  90% (9MB)
   71 15:21:10.316612  progress  95% (9MB)
   72 15:21:10.319366  progress 100% (10MB)
   73 15:21:10.319513  10MB downloaded in 0.06s (183.93MB/s)
   74 15:21:10.319656  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 15:21:10.319903  end: 1.2 download-retry (duration 00:00:00) [common]
   77 15:21:10.320008  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 15:21:10.320089  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 15:21:10.320222  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
   80 15:21:10.320290  saving as /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/nfsrootfs/full.rootfs.tar
   81 15:21:10.320350  total size: 125914312 (120MB)
   82 15:21:10.320407  Using unxz to decompress xz
   83 15:21:10.324025  progress   0% (0MB)
   84 15:21:10.784933  progress   5% (6MB)
   85 15:21:11.256456  progress  10% (12MB)
   86 15:21:11.729134  progress  15% (18MB)
   87 15:21:12.213142  progress  20% (24MB)
   88 15:21:12.540369  progress  25% (30MB)
   89 15:21:12.868229  progress  30% (36MB)
   90 15:21:13.127260  progress  35% (42MB)
   91 15:21:13.318437  progress  40% (48MB)
   92 15:21:13.668091  progress  45% (54MB)
   93 15:21:14.027223  progress  50% (60MB)
   94 15:21:14.352357  progress  55% (66MB)
   95 15:21:14.698309  progress  60% (72MB)
   96 15:21:15.024596  progress  65% (78MB)
   97 15:21:15.398024  progress  70% (84MB)
   98 15:21:15.800943  progress  75% (90MB)
   99 15:21:16.205918  progress  80% (96MB)
  100 15:21:16.294615  progress  85% (102MB)
  101 15:21:16.448052  progress  90% (108MB)
  102 15:21:16.769990  progress  95% (114MB)
  103 15:21:17.128517  progress 100% (120MB)
  104 15:21:17.134044  120MB downloaded in 6.81s (17.62MB/s)
  105 15:21:17.134334  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 15:21:17.134591  end: 1.3 download-retry (duration 00:00:07) [common]
  108 15:21:17.134680  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 15:21:17.134767  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 15:21:17.134927  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.284-cip99/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 15:21:17.135011  saving as /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/modules/modules.tar
  112 15:21:17.135070  total size: 483884 (0MB)
  113 15:21:17.135131  Using unxz to decompress xz
  114 15:21:17.138636  progress   6% (0MB)
  115 15:21:17.139005  progress  13% (0MB)
  116 15:21:17.139231  progress  20% (0MB)
  117 15:21:17.140631  progress  27% (0MB)
  118 15:21:17.142634  progress  33% (0MB)
  119 15:21:17.144501  progress  40% (0MB)
  120 15:21:17.146591  progress  47% (0MB)
  121 15:21:17.148483  progress  54% (0MB)
  122 15:21:17.150450  progress  60% (0MB)
  123 15:21:17.152352  progress  67% (0MB)
  124 15:21:17.154357  progress  74% (0MB)
  125 15:21:17.156994  progress  81% (0MB)
  126 15:21:17.158796  progress  88% (0MB)
  127 15:21:17.160571  progress  94% (0MB)
  128 15:21:17.162850  progress 100% (0MB)
  129 15:21:17.168880  0MB downloaded in 0.03s (13.65MB/s)
  130 15:21:17.169126  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 15:21:17.169379  end: 1.4 download-retry (duration 00:00:00) [common]
  133 15:21:17.169470  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  134 15:21:17.169562  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  135 15:21:19.826977  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10660931/extract-nfsrootfs-_oxgu3g4
  136 15:21:19.827177  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  137 15:21:19.827280  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  138 15:21:19.827435  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw
  139 15:21:19.827562  makedir: /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin
  140 15:21:19.827658  makedir: /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/tests
  141 15:21:19.827748  makedir: /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/results
  142 15:21:19.827851  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-add-keys
  143 15:21:19.828019  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-add-sources
  144 15:21:19.828140  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-background-process-start
  145 15:21:19.828262  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-background-process-stop
  146 15:21:19.828381  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-common-functions
  147 15:21:19.828497  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-echo-ipv4
  148 15:21:19.828615  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-install-packages
  149 15:21:19.828730  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-installed-packages
  150 15:21:19.828845  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-os-build
  151 15:21:19.828960  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-probe-channel
  152 15:21:19.829075  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-probe-ip
  153 15:21:19.829190  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-target-ip
  154 15:21:19.829307  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-target-mac
  155 15:21:19.829422  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-target-storage
  156 15:21:19.829539  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-test-case
  157 15:21:19.829656  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-test-event
  158 15:21:19.829771  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-test-feedback
  159 15:21:19.829885  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-test-raise
  160 15:21:19.830000  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-test-reference
  161 15:21:19.830122  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-test-runner
  162 15:21:19.830236  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-test-set
  163 15:21:19.830350  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-test-shell
  164 15:21:19.830470  Updating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-install-packages (oe)
  165 15:21:19.830618  Updating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/bin/lava-installed-packages (oe)
  166 15:21:19.830731  Creating /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/environment
  167 15:21:19.830821  LAVA metadata
  168 15:21:19.830887  - LAVA_JOB_ID=10660931
  169 15:21:19.830947  - LAVA_DISPATCHER_IP=192.168.201.1
  170 15:21:19.831040  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  171 15:21:19.831102  skipped lava-vland-overlay
  172 15:21:19.831172  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 15:21:19.831246  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  174 15:21:19.831304  skipped lava-multinode-overlay
  175 15:21:19.831372  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 15:21:19.831445  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  177 15:21:19.831513  Loading test definitions
  178 15:21:19.831596  start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
  179 15:21:19.831663  Using /lava-10660931 at stage 0
  180 15:21:19.831749  Fetching tests from https://github.com/kernelci/test-definitions
  181 15:21:19.831822  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/0/tests/0_ltp-ipc'
  182 15:21:23.716825  Running '/usr/bin/git checkout kernelci.org
  183 15:21:23.857770  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
  184 15:21:23.858518  uuid=10660931_1.5.2.3.1 testdef=None
  185 15:21:23.858666  end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
  187 15:21:23.858914  start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
  188 15:21:23.859688  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  190 15:21:23.859963  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
  191 15:21:23.860975  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  193 15:21:23.861211  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
  194 15:21:23.862191  runner path: /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/0/tests/0_ltp-ipc test_uuid 10660931_1.5.2.3.1
  195 15:21:23.862279  SKIPFILE='skipfile-lkft.yaml'
  196 15:21:23.862342  SKIP_INSTALL='true'
  197 15:21:23.862399  TST_CMDFILES='ipc'
  198 15:21:23.862534  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  200 15:21:23.862735  Creating lava-test-runner.conf files
  201 15:21:23.862798  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10660931/lava-overlay-vaw40qmw/lava-10660931/0 for stage 0
  202 15:21:23.862885  - 0_ltp-ipc
  203 15:21:23.862988  end: 1.5.2.3 test-definition (duration 00:00:04) [common]
  204 15:21:23.863074  start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
  205 15:21:31.227405  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  206 15:21:31.227567  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
  207 15:21:31.227659  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  208 15:21:31.227757  end: 1.5.2 lava-overlay (duration 00:00:11) [common]
  209 15:21:31.227851  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
  210 15:21:31.361673  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  211 15:21:31.362039  start: 1.5.4 extract-modules (timeout 00:09:39) [common]
  212 15:21:31.362158  extracting modules file /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10660931/extract-nfsrootfs-_oxgu3g4
  213 15:21:31.381204  extracting modules file /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10660931/extract-overlay-ramdisk-n2leg14p/ramdisk
  214 15:21:31.400153  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  215 15:21:31.400289  start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
  216 15:21:31.400376  [common] Applying overlay to NFS
  217 15:21:31.400444  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10660931/compress-overlay-xgs56qw6/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10660931/extract-nfsrootfs-_oxgu3g4
  218 15:21:32.283040  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  219 15:21:32.283212  start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
  220 15:21:32.283308  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  221 15:21:32.283394  start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
  222 15:21:32.283471  Building ramdisk /var/lib/lava/dispatcher/tmp/10660931/extract-overlay-ramdisk-n2leg14p/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10660931/extract-overlay-ramdisk-n2leg14p/ramdisk
  223 15:21:32.369670  >> 31369 blocks

  224 15:21:32.965315  rename /var/lib/lava/dispatcher/tmp/10660931/extract-overlay-ramdisk-n2leg14p/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/ramdisk/ramdisk.cpio.gz
  225 15:21:32.965740  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  226 15:21:32.965859  start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
  227 15:21:32.965961  start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
  228 15:21:32.966054  No mkimage arch provided, not using FIT.
  229 15:21:32.966140  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  230 15:21:32.966226  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  231 15:21:32.966328  end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
  232 15:21:32.966413  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
  233 15:21:32.966490  No LXC device requested
  234 15:21:32.966565  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  235 15:21:32.966648  start: 1.7 deploy-device-env (timeout 00:09:37) [common]
  236 15:21:32.966732  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  237 15:21:32.966809  Checking files for TFTP limit of 4294967296 bytes.
  238 15:21:32.967203  end: 1 tftp-deploy (duration 00:00:23) [common]
  239 15:21:32.967305  start: 2 depthcharge-action (timeout 00:05:00) [common]
  240 15:21:32.967394  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  241 15:21:32.967519  substitutions:
  242 15:21:32.967585  - {DTB}: None
  243 15:21:32.967645  - {INITRD}: 10660931/tftp-deploy-2k4w2qw7/ramdisk/ramdisk.cpio.gz
  244 15:21:32.967703  - {KERNEL}: 10660931/tftp-deploy-2k4w2qw7/kernel/bzImage
  245 15:21:32.967758  - {LAVA_MAC}: None
  246 15:21:32.967812  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10660931/extract-nfsrootfs-_oxgu3g4
  247 15:21:32.967903  - {NFS_SERVER_IP}: 192.168.201.1
  248 15:21:32.967984  - {PRESEED_CONFIG}: None
  249 15:21:32.968039  - {PRESEED_LOCAL}: None
  250 15:21:32.968092  - {RAMDISK}: 10660931/tftp-deploy-2k4w2qw7/ramdisk/ramdisk.cpio.gz
  251 15:21:32.968145  - {ROOT_PART}: None
  252 15:21:32.968199  - {ROOT}: None
  253 15:21:32.968251  - {SERVER_IP}: 192.168.201.1
  254 15:21:32.968304  - {TEE}: None
  255 15:21:32.968357  Parsed boot commands:
  256 15:21:32.968411  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  257 15:21:32.968578  Parsed boot commands: tftpboot 192.168.201.1 10660931/tftp-deploy-2k4w2qw7/kernel/bzImage 10660931/tftp-deploy-2k4w2qw7/kernel/cmdline 10660931/tftp-deploy-2k4w2qw7/ramdisk/ramdisk.cpio.gz
  258 15:21:32.968670  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  259 15:21:32.968755  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  260 15:21:32.968844  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  261 15:21:32.968934  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  262 15:21:32.969003  Not connected, no need to disconnect.
  263 15:21:32.969075  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  264 15:21:32.969156  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  265 15:21:32.969221  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  266 15:21:32.972573  Setting prompt string to ['lava-test: # ']
  267 15:21:32.972917  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  268 15:21:32.973027  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  269 15:21:32.973124  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  270 15:21:32.973211  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  271 15:21:32.973404  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  272 15:21:38.125249  >> Command sent successfully.

  273 15:21:38.136281  Returned 0 in 5 seconds
  274 15:21:38.237606  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  276 15:21:38.239150  end: 2.2.2 reset-device (duration 00:00:05) [common]
  277 15:21:38.239743  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  278 15:21:38.240327  Setting prompt string to 'Starting depthcharge on Helios...'
  279 15:21:38.240717  Changing prompt to 'Starting depthcharge on Helios...'
  280 15:21:38.241107  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  281 15:21:38.242354  [Enter `^Ec?' for help]

  282 15:21:38.849401  

  283 15:21:38.850003  

  284 15:21:38.859460  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  285 15:21:38.862756  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  286 15:21:38.870011  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  287 15:21:38.872768  CPU: AES supported, TXT NOT supported, VT supported

  288 15:21:38.879990  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  289 15:21:38.883302  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  290 15:21:38.889766  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  291 15:21:38.893142  VBOOT: Loading verstage.

  292 15:21:38.896750  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  293 15:21:38.903643  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  294 15:21:38.906521  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  295 15:21:38.909506  CBFS @ c08000 size 3f8000

  296 15:21:38.915919  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  297 15:21:38.920087  CBFS: Locating 'fallback/verstage'

  298 15:21:38.923269  CBFS: Found @ offset 10fb80 size 1072c

  299 15:21:38.926924  

  300 15:21:38.927521  

  301 15:21:38.936384  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  302 15:21:38.950333  Probing TPM: . done!

  303 15:21:38.953643  TPM ready after 0 ms

  304 15:21:38.956985  Connected to device vid:did:rid of 1ae0:0028:00

  305 15:21:38.967737  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  306 15:21:38.971540  Initialized TPM device CR50 revision 0

  307 15:21:39.018200  tlcl_send_startup: Startup return code is 0

  308 15:21:39.018776  TPM: setup succeeded

  309 15:21:39.030791  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  310 15:21:39.034625  Chrome EC: UHEPI supported

  311 15:21:39.037823  Phase 1

  312 15:21:39.041102  FMAP: area GBB found @ c05000 (12288 bytes)

  313 15:21:39.047998  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  314 15:21:39.051455  Phase 2

  315 15:21:39.052080  Phase 3

  316 15:21:39.054690  FMAP: area GBB found @ c05000 (12288 bytes)

  317 15:21:39.061186  VB2:vb2_report_dev_firmware() This is developer signed firmware

  318 15:21:39.068025  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  319 15:21:39.071411  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  320 15:21:39.078025  VB2:vb2_verify_keyblock() Checking keyblock signature...

  321 15:21:39.093360  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  322 15:21:39.096929  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  323 15:21:39.103558  VB2:vb2_verify_fw_preamble() Verifying preamble.

  324 15:21:39.108362  Phase 4

  325 15:21:39.110888  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  326 15:21:39.117793  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  327 15:21:39.297185  VB2:vb2_rsa_verify_digest() Digest check failed!

  328 15:21:39.304061  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  329 15:21:39.304634  Saving nvdata

  330 15:21:39.307236  Reboot requested (10020007)

  331 15:21:39.310364  board_reset() called!

  332 15:21:39.310935  full_reset() called!

  333 15:21:43.816765  

  334 15:21:43.817347  

  335 15:21:43.826645  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  336 15:21:43.829547  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  337 15:21:43.836241  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  338 15:21:43.839360  CPU: AES supported, TXT NOT supported, VT supported

  339 15:21:43.846156  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  340 15:21:43.849605  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  341 15:21:43.855984  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  342 15:21:43.859894  VBOOT: Loading verstage.

  343 15:21:43.863213  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  344 15:21:43.869701  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  345 15:21:43.876380  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  346 15:21:43.876977  CBFS @ c08000 size 3f8000

  347 15:21:43.882553  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  348 15:21:43.885378  CBFS: Locating 'fallback/verstage'

  349 15:21:43.888977  CBFS: Found @ offset 10fb80 size 1072c

  350 15:21:43.893419  

  351 15:21:43.893993  

  352 15:21:43.903647  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  353 15:21:43.918051  Probing TPM: . done!

  354 15:21:43.921132  TPM ready after 0 ms

  355 15:21:43.924682  Connected to device vid:did:rid of 1ae0:0028:00

  356 15:21:43.935242  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  357 15:21:43.937826  Initialized TPM device CR50 revision 0

  358 15:21:43.984759  tlcl_send_startup: Startup return code is 0

  359 15:21:43.985324  TPM: setup succeeded

  360 15:21:43.998244  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  361 15:21:44.002025  Chrome EC: UHEPI supported

  362 15:21:44.004804  Phase 1

  363 15:21:44.008487  FMAP: area GBB found @ c05000 (12288 bytes)

  364 15:21:44.014882  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  365 15:21:44.021552  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  366 15:21:44.025158  Recovery requested (1009000e)

  367 15:21:44.031254  Saving nvdata

  368 15:21:44.036713  tlcl_extend: response is 0

  369 15:21:44.045421  tlcl_extend: response is 0

  370 15:21:44.052573  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  371 15:21:44.056136  CBFS @ c08000 size 3f8000

  372 15:21:44.062774  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  373 15:21:44.065828  CBFS: Locating 'fallback/romstage'

  374 15:21:44.068918  CBFS: Found @ offset 80 size 145fc

  375 15:21:44.072418  Accumulated console time in verstage 98 ms

  376 15:21:44.072951  

  377 15:21:44.073342  

  378 15:21:44.085308  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  379 15:21:44.092446  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  380 15:21:44.095237  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  381 15:21:44.099346  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  382 15:21:44.105627  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  383 15:21:44.108730  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  384 15:21:44.111804  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  385 15:21:44.115626  TCO_STS:   0000 0000

  386 15:21:44.119319  GEN_PMCON: e0015238 00000200

  387 15:21:44.122330  GBLRST_CAUSE: 00000000 00000000

  388 15:21:44.122907  prev_sleep_state 5

  389 15:21:44.125042  Boot Count incremented to 64016

  390 15:21:44.132356  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  391 15:21:44.135562  CBFS @ c08000 size 3f8000

  392 15:21:44.141962  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  393 15:21:44.142596  CBFS: Locating 'fspm.bin'

  394 15:21:44.148711  CBFS: Found @ offset 5ffc0 size 71000

  395 15:21:44.152250  Chrome EC: UHEPI supported

  396 15:21:44.158511  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  397 15:21:44.161971  Probing TPM:  done!

  398 15:21:44.168736  Connected to device vid:did:rid of 1ae0:0028:00

  399 15:21:44.179174  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  400 15:21:44.184715  Initialized TPM device CR50 revision 0

  401 15:21:44.193546  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  402 15:21:44.200709  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  403 15:21:44.203922  MRC cache found, size 1948

  404 15:21:44.207337  bootmode is set to: 2

  405 15:21:44.210166  PRMRR disabled by config.

  406 15:21:44.213825  SPD INDEX = 1

  407 15:21:44.217377  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  408 15:21:44.220884  CBFS @ c08000 size 3f8000

  409 15:21:44.226589  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  410 15:21:44.227170  CBFS: Locating 'spd.bin'

  411 15:21:44.230109  CBFS: Found @ offset 5fb80 size 400

  412 15:21:44.233092  SPD: module type is LPDDR3

  413 15:21:44.236860  SPD: module part is 

  414 15:21:44.243585  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  415 15:21:44.247015  SPD: device width 4 bits, bus width 8 bits

  416 15:21:44.249780  SPD: module size is 4096 MB (per channel)

  417 15:21:44.253741  memory slot: 0 configuration done.

  418 15:21:44.256866  memory slot: 2 configuration done.

  419 15:21:44.308006  CBMEM:

  420 15:21:44.311121  IMD: root @ 99fff000 254 entries.

  421 15:21:44.314598  IMD: root @ 99ffec00 62 entries.

  422 15:21:44.318005  External stage cache:

  423 15:21:44.320953  IMD: root @ 9abff000 254 entries.

  424 15:21:44.325019  IMD: root @ 9abfec00 62 entries.

  425 15:21:44.331213  Chrome EC: clear events_b mask to 0x0000000020004000

  426 15:21:44.344210  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  427 15:21:44.357868  tlcl_write: response is 0

  428 15:21:44.366531  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  429 15:21:44.372722  MRC: TPM MRC hash updated successfully.

  430 15:21:44.373304  2 DIMMs found

  431 15:21:44.376485  SMM Memory Map

  432 15:21:44.379498  SMRAM       : 0x9a000000 0x1000000

  433 15:21:44.382683   Subregion 0: 0x9a000000 0xa00000

  434 15:21:44.386405   Subregion 1: 0x9aa00000 0x200000

  435 15:21:44.389781   Subregion 2: 0x9ac00000 0x400000

  436 15:21:44.393038  top_of_ram = 0x9a000000

  437 15:21:44.396184  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  438 15:21:44.402843  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  439 15:21:44.406104  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  440 15:21:44.412624  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  441 15:21:44.416296  CBFS @ c08000 size 3f8000

  442 15:21:44.418969  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  443 15:21:44.422872  CBFS: Locating 'fallback/postcar'

  444 15:21:44.429197  CBFS: Found @ offset 107000 size 4b44

  445 15:21:44.432384  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  446 15:21:44.445772  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  447 15:21:44.448639  Processing 180 relocs. Offset value of 0x97c0c000

  448 15:21:44.457278  Accumulated console time in romstage 286 ms

  449 15:21:44.457854  

  450 15:21:44.458230  

  451 15:21:44.467175  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  452 15:21:44.473557  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  453 15:21:44.477175  CBFS @ c08000 size 3f8000

  454 15:21:44.480387  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  455 15:21:44.487527  CBFS: Locating 'fallback/ramstage'

  456 15:21:44.490144  CBFS: Found @ offset 43380 size 1b9e8

  457 15:21:44.496787  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  458 15:21:44.529356  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  459 15:21:44.532778  Processing 3976 relocs. Offset value of 0x98db0000

  460 15:21:44.538857  Accumulated console time in postcar 52 ms

  461 15:21:44.539433  

  462 15:21:44.539808  

  463 15:21:44.548851  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  464 15:21:44.555632  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  465 15:21:44.558539  WARNING: RO_VPD is uninitialized or empty.

  466 15:21:44.562514  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  467 15:21:44.568790  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  468 15:21:44.569366  Normal boot.

  469 15:21:44.575596  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  470 15:21:44.578231  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  471 15:21:44.582376  CBFS @ c08000 size 3f8000

  472 15:21:44.588414  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  473 15:21:44.591677  CBFS: Locating 'cpu_microcode_blob.bin'

  474 15:21:44.595286  CBFS: Found @ offset 14700 size 2ec00

  475 15:21:44.598230  microcode: sig=0x806ec pf=0x4 revision=0xc9

  476 15:21:44.601681  Skip microcode update

  477 15:21:44.608164  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  478 15:21:44.608647  CBFS @ c08000 size 3f8000

  479 15:21:44.614599  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  480 15:21:44.618194  CBFS: Locating 'fsps.bin'

  481 15:21:44.621670  CBFS: Found @ offset d1fc0 size 35000

  482 15:21:44.647458  Detected 4 core, 8 thread CPU.

  483 15:21:44.650115  Setting up SMI for CPU

  484 15:21:44.653949  IED base = 0x9ac00000

  485 15:21:44.654524  IED size = 0x00400000

  486 15:21:44.657425  Will perform SMM setup.

  487 15:21:44.663582  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  488 15:21:44.670212  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  489 15:21:44.673874  Processing 16 relocs. Offset value of 0x00030000

  490 15:21:44.677022  Attempting to start 7 APs

  491 15:21:44.680603  Waiting for 10ms after sending INIT.

  492 15:21:44.696673  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  493 15:21:44.697239  done.

  494 15:21:44.699962  AP: slot 5 apic_id 5.

  495 15:21:44.703161  AP: slot 2 apic_id 4.

  496 15:21:44.706816  Waiting for 2nd SIPI to complete...done.

  497 15:21:44.710030  AP: slot 6 apic_id 6.

  498 15:21:44.710525  AP: slot 7 apic_id 7.

  499 15:21:44.713730  AP: slot 4 apic_id 3.

  500 15:21:44.716776  AP: slot 1 apic_id 2.

  501 15:21:44.723980  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  502 15:21:44.730468  Processing 13 relocs. Offset value of 0x00038000

  503 15:21:44.733359  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  504 15:21:44.740145  Installing SMM handler to 0x9a000000

  505 15:21:44.746813  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  506 15:21:44.753827  Processing 658 relocs. Offset value of 0x9a010000

  507 15:21:44.760471  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  508 15:21:44.763181  Processing 13 relocs. Offset value of 0x9a008000

  509 15:21:44.769779  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  510 15:21:44.776786  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  511 15:21:44.782973  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  512 15:21:44.786354  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  513 15:21:44.792858  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  514 15:21:44.799432  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  515 15:21:44.803022  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  516 15:21:44.809687  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  517 15:21:44.813471  Clearing SMI status registers

  518 15:21:44.816219  SMI_STS: PM1 

  519 15:21:44.816691  PM1_STS: PWRBTN 

  520 15:21:44.820344  TCO_STS: SECOND_TO 

  521 15:21:44.823044  New SMBASE 0x9a000000

  522 15:21:44.826176  In relocation handler: CPU 0

  523 15:21:44.829498  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  524 15:21:44.833022  Writing SMRR. base = 0x9a000006, mask=0xff000800

  525 15:21:44.836295  Relocation complete.

  526 15:21:44.840007  New SMBASE 0x99fff400

  527 15:21:44.840581  In relocation handler: CPU 3

  528 15:21:44.846986  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  529 15:21:44.849813  Writing SMRR. base = 0x9a000006, mask=0xff000800

  530 15:21:44.853064  Relocation complete.

  531 15:21:44.856202  New SMBASE 0x99ffe800

  532 15:21:44.856780  In relocation handler: CPU 6

  533 15:21:44.862930  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  534 15:21:44.866133  Writing SMRR. base = 0x9a000006, mask=0xff000800

  535 15:21:44.869752  Relocation complete.

  536 15:21:44.870225  New SMBASE 0x99ffe400

  537 15:21:44.873164  In relocation handler: CPU 7

  538 15:21:44.879619  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  539 15:21:44.882846  Writing SMRR. base = 0x9a000006, mask=0xff000800

  540 15:21:44.885974  Relocation complete.

  541 15:21:44.886446  New SMBASE 0x99ffec00

  542 15:21:44.889767  In relocation handler: CPU 5

  543 15:21:44.892923  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  544 15:21:44.899227  Writing SMRR. base = 0x9a000006, mask=0xff000800

  545 15:21:44.902736  Relocation complete.

  546 15:21:44.903308  New SMBASE 0x99fff800

  547 15:21:44.906131  In relocation handler: CPU 2

  548 15:21:44.909344  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  549 15:21:44.915976  Writing SMRR. base = 0x9a000006, mask=0xff000800

  550 15:21:44.919105  Relocation complete.

  551 15:21:44.919594  New SMBASE 0x99fffc00

  552 15:21:44.922527  In relocation handler: CPU 1

  553 15:21:44.926282  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  554 15:21:44.932361  Writing SMRR. base = 0x9a000006, mask=0xff000800

  555 15:21:44.935656  Relocation complete.

  556 15:21:44.936281  New SMBASE 0x99fff000

  557 15:21:44.939040  In relocation handler: CPU 4

  558 15:21:44.942548  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  559 15:21:44.949056  Writing SMRR. base = 0x9a000006, mask=0xff000800

  560 15:21:44.949659  Relocation complete.

  561 15:21:44.952270  Initializing CPU #0

  562 15:21:44.955785  CPU: vendor Intel device 806ec

  563 15:21:44.959187  CPU: family 06, model 8e, stepping 0c

  564 15:21:44.962286  Clearing out pending MCEs

  565 15:21:44.966340  Setting up local APIC...

  566 15:21:44.966913   apic_id: 0x00 done.

  567 15:21:44.969115  Turbo is available but hidden

  568 15:21:44.972470  Turbo is available and visible

  569 15:21:44.975745  VMX status: enabled

  570 15:21:44.979158  IA32_FEATURE_CONTROL status: locked

  571 15:21:44.982127  Skip microcode update

  572 15:21:44.982598  CPU #0 initialized

  573 15:21:44.985419  Initializing CPU #3

  574 15:21:44.989147  Initializing CPU #4

  575 15:21:44.989614  Initializing CPU #1

  576 15:21:44.992162  CPU: vendor Intel device 806ec

  577 15:21:44.995809  CPU: family 06, model 8e, stepping 0c

  578 15:21:44.998750  CPU: vendor Intel device 806ec

  579 15:21:45.002366  CPU: family 06, model 8e, stepping 0c

  580 15:21:45.005371  Clearing out pending MCEs

  581 15:21:45.008660  Clearing out pending MCEs

  582 15:21:45.012053  Setting up local APIC...

  583 15:21:45.012622  Initializing CPU #7

  584 15:21:45.015673  Initializing CPU #6

  585 15:21:45.018895  CPU: vendor Intel device 806ec

  586 15:21:45.022141  CPU: family 06, model 8e, stepping 0c

  587 15:21:45.025052  CPU: vendor Intel device 806ec

  588 15:21:45.028629  CPU: family 06, model 8e, stepping 0c

  589 15:21:45.032282  CPU: vendor Intel device 806ec

  590 15:21:45.035208  CPU: family 06, model 8e, stepping 0c

  591 15:21:45.038748  Clearing out pending MCEs

  592 15:21:45.041688  Initializing CPU #5

  593 15:21:45.042174  Initializing CPU #2

  594 15:21:45.045223  CPU: vendor Intel device 806ec

  595 15:21:45.048456  CPU: family 06, model 8e, stepping 0c

  596 15:21:45.052214  CPU: vendor Intel device 806ec

  597 15:21:45.055336  CPU: family 06, model 8e, stepping 0c

  598 15:21:45.058473  Clearing out pending MCEs

  599 15:21:45.061900  Clearing out pending MCEs

  600 15:21:45.065238  Setting up local APIC...

  601 15:21:45.065831  Setting up local APIC...

  602 15:21:45.068588   apic_id: 0x04 done.

  603 15:21:45.072302  Setting up local APIC...

  604 15:21:45.072875   apic_id: 0x01 done.

  605 15:21:45.075632  Clearing out pending MCEs

  606 15:21:45.078288  Clearing out pending MCEs

  607 15:21:45.081853  Setting up local APIC...

  608 15:21:45.085314  Setting up local APIC...

  609 15:21:45.085788   apic_id: 0x03 done.

  610 15:21:45.088532   apic_id: 0x02 done.

  611 15:21:45.091582  VMX status: enabled

  612 15:21:45.092084  VMX status: enabled

  613 15:21:45.094565  IA32_FEATURE_CONTROL status: locked

  614 15:21:45.098472  IA32_FEATURE_CONTROL status: locked

  615 15:21:45.101617  Skip microcode update

  616 15:21:45.105092  Skip microcode update

  617 15:21:45.105521  CPU #4 initialized

  618 15:21:45.108105  CPU #1 initialized

  619 15:21:45.108528  VMX status: enabled

  620 15:21:45.111374   apic_id: 0x05 done.

  621 15:21:45.114879  IA32_FEATURE_CONTROL status: locked

  622 15:21:45.118373  VMX status: enabled

  623 15:21:45.118906  Skip microcode update

  624 15:21:45.125038  IA32_FEATURE_CONTROL status: locked

  625 15:21:45.125632  CPU #2 initialized

  626 15:21:45.128872  Skip microcode update

  627 15:21:45.129442  VMX status: enabled

  628 15:21:45.131669  CPU #5 initialized

  629 15:21:45.134961  IA32_FEATURE_CONTROL status: locked

  630 15:21:45.137929   apic_id: 0x07 done.

  631 15:21:45.141080  Setting up local APIC...

  632 15:21:45.141571  Skip microcode update

  633 15:21:45.144502   apic_id: 0x06 done.

  634 15:21:45.144972  CPU #3 initialized

  635 15:21:45.147977  VMX status: enabled

  636 15:21:45.151335  VMX status: enabled

  637 15:21:45.155145  IA32_FEATURE_CONTROL status: locked

  638 15:21:45.158222  IA32_FEATURE_CONTROL status: locked

  639 15:21:45.161088  Skip microcode update

  640 15:21:45.161561  Skip microcode update

  641 15:21:45.164789  CPU #7 initialized

  642 15:21:45.165366  CPU #6 initialized

  643 15:21:45.171050  bsp_do_flight_plan done after 461 msecs.

  644 15:21:45.175341  CPU: frequency set to 4200 MHz

  645 15:21:45.175954  Enabling SMIs.

  646 15:21:45.176336  Locking SMM.

  647 15:21:45.191007  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  648 15:21:45.194449  CBFS @ c08000 size 3f8000

  649 15:21:45.201731  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  650 15:21:45.202314  CBFS: Locating 'vbt.bin'

  651 15:21:45.204399  CBFS: Found @ offset 5f5c0 size 499

  652 15:21:45.211712  Found a VBT of 4608 bytes after decompression

  653 15:21:45.395756  Display FSP Version Info HOB

  654 15:21:45.399213  Reference Code - CPU = 9.0.1e.30

  655 15:21:45.402328  uCode Version = 0.0.0.ca

  656 15:21:45.405662  TXT ACM version = ff.ff.ff.ffff

  657 15:21:45.408832  Display FSP Version Info HOB

  658 15:21:45.412391  Reference Code - ME = 9.0.1e.30

  659 15:21:45.415792  MEBx version = 0.0.0.0

  660 15:21:45.419068  ME Firmware Version = Consumer SKU

  661 15:21:45.422113  Display FSP Version Info HOB

  662 15:21:45.426096  Reference Code - CML PCH = 9.0.1e.30

  663 15:21:45.428784  PCH-CRID Status = Disabled

  664 15:21:45.432440  PCH-CRID Original Value = ff.ff.ff.ffff

  665 15:21:45.435471  PCH-CRID New Value = ff.ff.ff.ffff

  666 15:21:45.438551  OPROM - RST - RAID = ff.ff.ff.ffff

  667 15:21:45.442134  ChipsetInit Base Version = ff.ff.ff.ffff

  668 15:21:45.445153  ChipsetInit Oem Version = ff.ff.ff.ffff

  669 15:21:45.448778  Display FSP Version Info HOB

  670 15:21:45.455308  Reference Code - SA - System Agent = 9.0.1e.30

  671 15:21:45.459197  Reference Code - MRC = 0.7.1.6c

  672 15:21:45.459782  SA - PCIe Version = 9.0.1e.30

  673 15:21:45.461519  SA-CRID Status = Disabled

  674 15:21:45.465152  SA-CRID Original Value = 0.0.0.c

  675 15:21:45.468773  SA-CRID New Value = 0.0.0.c

  676 15:21:45.472161  OPROM - VBIOS = ff.ff.ff.ffff

  677 15:21:45.475103  RTC Init

  678 15:21:45.478579  Set power on after power failure.

  679 15:21:45.479175  Disabling Deep S3

  680 15:21:45.481903  Disabling Deep S3

  681 15:21:45.482486  Disabling Deep S4

  682 15:21:45.485111  Disabling Deep S4

  683 15:21:45.485583  Disabling Deep S5

  684 15:21:45.488219  Disabling Deep S5

  685 15:21:45.494934  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1

  686 15:21:45.495518  Enumerating buses...

  687 15:21:45.501972  Show all devs... Before device enumeration.

  688 15:21:45.502551  Root Device: enabled 1

  689 15:21:45.504746  CPU_CLUSTER: 0: enabled 1

  690 15:21:45.508916  DOMAIN: 0000: enabled 1

  691 15:21:45.511963  APIC: 00: enabled 1

  692 15:21:45.512534  PCI: 00:00.0: enabled 1

  693 15:21:45.515193  PCI: 00:02.0: enabled 1

  694 15:21:45.517918  PCI: 00:04.0: enabled 0

  695 15:21:45.521640  PCI: 00:05.0: enabled 0

  696 15:21:45.522246  PCI: 00:12.0: enabled 1

  697 15:21:45.524958  PCI: 00:12.5: enabled 0

  698 15:21:45.528090  PCI: 00:12.6: enabled 0

  699 15:21:45.528674  PCI: 00:14.0: enabled 1

  700 15:21:45.531632  PCI: 00:14.1: enabled 0

  701 15:21:45.534775  PCI: 00:14.3: enabled 1

  702 15:21:45.537946  PCI: 00:14.5: enabled 0

  703 15:21:45.538419  PCI: 00:15.0: enabled 1

  704 15:21:45.541811  PCI: 00:15.1: enabled 1

  705 15:21:45.545063  PCI: 00:15.2: enabled 0

  706 15:21:45.548345  PCI: 00:15.3: enabled 0

  707 15:21:45.548887  PCI: 00:16.0: enabled 1

  708 15:21:45.551607  PCI: 00:16.1: enabled 0

  709 15:21:45.554909  PCI: 00:16.2: enabled 0

  710 15:21:45.558212  PCI: 00:16.3: enabled 0

  711 15:21:45.558802  PCI: 00:16.4: enabled 0

  712 15:21:45.561272  PCI: 00:16.5: enabled 0

  713 15:21:45.564816  PCI: 00:17.0: enabled 1

  714 15:21:45.565287  PCI: 00:19.0: enabled 1

  715 15:21:45.567932  PCI: 00:19.1: enabled 0

  716 15:21:45.571357  PCI: 00:19.2: enabled 0

  717 15:21:45.574559  PCI: 00:1a.0: enabled 0

  718 15:21:45.575142  PCI: 00:1c.0: enabled 0

  719 15:21:45.578638  PCI: 00:1c.1: enabled 0

  720 15:21:45.581403  PCI: 00:1c.2: enabled 0

  721 15:21:45.584541  PCI: 00:1c.3: enabled 0

  722 15:21:45.585173  PCI: 00:1c.4: enabled 0

  723 15:21:45.587978  PCI: 00:1c.5: enabled 0

  724 15:21:45.591670  PCI: 00:1c.6: enabled 0

  725 15:21:45.594745  PCI: 00:1c.7: enabled 0

  726 15:21:45.595216  PCI: 00:1d.0: enabled 1

  727 15:21:45.598078  PCI: 00:1d.1: enabled 0

  728 15:21:45.601484  PCI: 00:1d.2: enabled 0

  729 15:21:45.602104  PCI: 00:1d.3: enabled 0

  730 15:21:45.604383  PCI: 00:1d.4: enabled 0

  731 15:21:45.607554  PCI: 00:1d.5: enabled 1

  732 15:21:45.611031  PCI: 00:1e.0: enabled 1

  733 15:21:45.611504  PCI: 00:1e.1: enabled 0

  734 15:21:45.614487  PCI: 00:1e.2: enabled 1

  735 15:21:45.618145  PCI: 00:1e.3: enabled 1

  736 15:21:45.621118  PCI: 00:1f.0: enabled 1

  737 15:21:45.621700  PCI: 00:1f.1: enabled 1

  738 15:21:45.624648  PCI: 00:1f.2: enabled 1

  739 15:21:45.627903  PCI: 00:1f.3: enabled 1

  740 15:21:45.630466  PCI: 00:1f.4: enabled 1

  741 15:21:45.630940  PCI: 00:1f.5: enabled 1

  742 15:21:45.634126  PCI: 00:1f.6: enabled 0

  743 15:21:45.637463  USB0 port 0: enabled 1

  744 15:21:45.638063  I2C: 00:15: enabled 1

  745 15:21:45.640614  I2C: 00:5d: enabled 1

  746 15:21:45.644090  GENERIC: 0.0: enabled 1

  747 15:21:45.644528  I2C: 00:1a: enabled 1

  748 15:21:45.647376  I2C: 00:38: enabled 1

  749 15:21:45.650787  I2C: 00:39: enabled 1

  750 15:21:45.651217  I2C: 00:3a: enabled 1

  751 15:21:45.654108  I2C: 00:3b: enabled 1

  752 15:21:45.657954  PCI: 00:00.0: enabled 1

  753 15:21:45.658553  SPI: 00: enabled 1

  754 15:21:45.660568  SPI: 01: enabled 1

  755 15:21:45.663949  PNP: 0c09.0: enabled 1

  756 15:21:45.664438  USB2 port 0: enabled 1

  757 15:21:45.667202  USB2 port 1: enabled 1

  758 15:21:45.670739  USB2 port 2: enabled 0

  759 15:21:45.674076  USB2 port 3: enabled 0

  760 15:21:45.674547  USB2 port 5: enabled 0

  761 15:21:45.677436  USB2 port 6: enabled 1

  762 15:21:45.681083  USB2 port 9: enabled 1

  763 15:21:45.681615  USB3 port 0: enabled 1

  764 15:21:45.684414  USB3 port 1: enabled 1

  765 15:21:45.687195  USB3 port 2: enabled 1

  766 15:21:45.687619  USB3 port 3: enabled 1

  767 15:21:45.690614  USB3 port 4: enabled 0

  768 15:21:45.694365  APIC: 02: enabled 1

  769 15:21:45.694905  APIC: 04: enabled 1

  770 15:21:45.697667  APIC: 01: enabled 1

  771 15:21:45.700897  APIC: 03: enabled 1

  772 15:21:45.701475  APIC: 05: enabled 1

  773 15:21:45.704027  APIC: 06: enabled 1

  774 15:21:45.704498  APIC: 07: enabled 1

  775 15:21:45.707322  Compare with tree...

  776 15:21:45.710876  Root Device: enabled 1

  777 15:21:45.714232   CPU_CLUSTER: 0: enabled 1

  778 15:21:45.714808    APIC: 00: enabled 1

  779 15:21:45.717502    APIC: 02: enabled 1

  780 15:21:45.720774    APIC: 04: enabled 1

  781 15:21:45.721338    APIC: 01: enabled 1

  782 15:21:45.723803    APIC: 03: enabled 1

  783 15:21:45.727630    APIC: 05: enabled 1

  784 15:21:45.728253    APIC: 06: enabled 1

  785 15:21:45.730725    APIC: 07: enabled 1

  786 15:21:45.734097   DOMAIN: 0000: enabled 1

  787 15:21:45.737257    PCI: 00:00.0: enabled 1

  788 15:21:45.737727    PCI: 00:02.0: enabled 1

  789 15:21:45.740327    PCI: 00:04.0: enabled 0

  790 15:21:45.743638    PCI: 00:05.0: enabled 0

  791 15:21:45.747240    PCI: 00:12.0: enabled 1

  792 15:21:45.750309    PCI: 00:12.5: enabled 0

  793 15:21:45.750902    PCI: 00:12.6: enabled 0

  794 15:21:45.753939    PCI: 00:14.0: enabled 1

  795 15:21:45.757315     USB0 port 0: enabled 1

  796 15:21:45.760039      USB2 port 0: enabled 1

  797 15:21:45.763715      USB2 port 1: enabled 1

  798 15:21:45.764317      USB2 port 2: enabled 0

  799 15:21:45.767958      USB2 port 3: enabled 0

  800 15:21:45.770680      USB2 port 5: enabled 0

  801 15:21:45.773500      USB2 port 6: enabled 1

  802 15:21:45.776685      USB2 port 9: enabled 1

  803 15:21:45.780658      USB3 port 0: enabled 1

  804 15:21:45.781374      USB3 port 1: enabled 1

  805 15:21:45.783692      USB3 port 2: enabled 1

  806 15:21:45.786640      USB3 port 3: enabled 1

  807 15:21:45.790375      USB3 port 4: enabled 0

  808 15:21:45.793766    PCI: 00:14.1: enabled 0

  809 15:21:45.794350    PCI: 00:14.3: enabled 1

  810 15:21:45.796735    PCI: 00:14.5: enabled 0

  811 15:21:45.800184    PCI: 00:15.0: enabled 1

  812 15:21:45.803592     I2C: 00:15: enabled 1

  813 15:21:45.806765    PCI: 00:15.1: enabled 1

  814 15:21:45.807343     I2C: 00:5d: enabled 1

  815 15:21:45.810321     GENERIC: 0.0: enabled 1

  816 15:21:45.813147    PCI: 00:15.2: enabled 0

  817 15:21:45.817026    PCI: 00:15.3: enabled 0

  818 15:21:45.817608    PCI: 00:16.0: enabled 1

  819 15:21:45.820546    PCI: 00:16.1: enabled 0

  820 15:21:45.823496    PCI: 00:16.2: enabled 0

  821 15:21:45.826778    PCI: 00:16.3: enabled 0

  822 15:21:45.829892    PCI: 00:16.4: enabled 0

  823 15:21:45.830369    PCI: 00:16.5: enabled 0

  824 15:21:45.833335    PCI: 00:17.0: enabled 1

  825 15:21:45.836650    PCI: 00:19.0: enabled 1

  826 15:21:45.840014     I2C: 00:1a: enabled 1

  827 15:21:45.843275     I2C: 00:38: enabled 1

  828 15:21:45.843886     I2C: 00:39: enabled 1

  829 15:21:45.846327     I2C: 00:3a: enabled 1

  830 15:21:45.849617     I2C: 00:3b: enabled 1

  831 15:21:45.853113    PCI: 00:19.1: enabled 0

  832 15:21:45.853691    PCI: 00:19.2: enabled 0

  833 15:21:45.856812    PCI: 00:1a.0: enabled 0

  834 15:21:45.860063    PCI: 00:1c.0: enabled 0

  835 15:21:45.863410    PCI: 00:1c.1: enabled 0

  836 15:21:45.866546    PCI: 00:1c.2: enabled 0

  837 15:21:45.867023    PCI: 00:1c.3: enabled 0

  838 15:21:45.870092    PCI: 00:1c.4: enabled 0

  839 15:21:45.873369    PCI: 00:1c.5: enabled 0

  840 15:21:45.876800    PCI: 00:1c.6: enabled 0

  841 15:21:45.879595    PCI: 00:1c.7: enabled 0

  842 15:21:45.880113    PCI: 00:1d.0: enabled 1

  843 15:21:45.882970    PCI: 00:1d.1: enabled 0

  844 15:21:45.885887    PCI: 00:1d.2: enabled 0

  845 15:21:45.889912    PCI: 00:1d.3: enabled 0

  846 15:21:45.892974    PCI: 00:1d.4: enabled 0

  847 15:21:45.893453    PCI: 00:1d.5: enabled 1

  848 15:21:45.896205     PCI: 00:00.0: enabled 1

  849 15:21:45.899656    PCI: 00:1e.0: enabled 1

  850 15:21:45.903009    PCI: 00:1e.1: enabled 0

  851 15:21:45.906234    PCI: 00:1e.2: enabled 1

  852 15:21:45.906814     SPI: 00: enabled 1

  853 15:21:45.909841    PCI: 00:1e.3: enabled 1

  854 15:21:45.912781     SPI: 01: enabled 1

  855 15:21:45.913252    PCI: 00:1f.0: enabled 1

  856 15:21:45.916214     PNP: 0c09.0: enabled 1

  857 15:21:45.919910    PCI: 00:1f.1: enabled 1

  858 15:21:45.923451    PCI: 00:1f.2: enabled 1

  859 15:21:45.926595    PCI: 00:1f.3: enabled 1

  860 15:21:45.927162    PCI: 00:1f.4: enabled 1

  861 15:21:45.929420    PCI: 00:1f.5: enabled 1

  862 15:21:45.932699    PCI: 00:1f.6: enabled 0

  863 15:21:45.936084  Root Device scanning...

  864 15:21:45.939641  scan_static_bus for Root Device

  865 15:21:45.940261  CPU_CLUSTER: 0 enabled

  866 15:21:45.942969  DOMAIN: 0000 enabled

  867 15:21:45.945990  DOMAIN: 0000 scanning...

  868 15:21:45.949134  PCI: pci_scan_bus for bus 00

  869 15:21:45.952616  PCI: 00:00.0 [8086/0000] ops

  870 15:21:45.956484  PCI: 00:00.0 [8086/9b61] enabled

  871 15:21:45.959611  PCI: 00:02.0 [8086/0000] bus ops

  872 15:21:45.962681  PCI: 00:02.0 [8086/9b41] enabled

  873 15:21:45.965888  PCI: 00:04.0 [8086/1903] disabled

  874 15:21:45.969231  PCI: 00:08.0 [8086/1911] enabled

  875 15:21:45.972529  PCI: 00:12.0 [8086/02f9] enabled

  876 15:21:45.975800  PCI: 00:14.0 [8086/0000] bus ops

  877 15:21:45.979368  PCI: 00:14.0 [8086/02ed] enabled

  878 15:21:45.982170  PCI: 00:14.2 [8086/02ef] enabled

  879 15:21:45.985596  PCI: 00:14.3 [8086/02f0] enabled

  880 15:21:45.989524  PCI: 00:15.0 [8086/0000] bus ops

  881 15:21:45.992624  PCI: 00:15.0 [8086/02e8] enabled

  882 15:21:45.995795  PCI: 00:15.1 [8086/0000] bus ops

  883 15:21:45.999612  PCI: 00:15.1 [8086/02e9] enabled

  884 15:21:46.002339  PCI: 00:16.0 [8086/0000] ops

  885 15:21:46.005606  PCI: 00:16.0 [8086/02e0] enabled

  886 15:21:46.009347  PCI: 00:17.0 [8086/0000] ops

  887 15:21:46.012016  PCI: 00:17.0 [8086/02d3] enabled

  888 15:21:46.016324  PCI: 00:19.0 [8086/0000] bus ops

  889 15:21:46.019247  PCI: 00:19.0 [8086/02c5] enabled

  890 15:21:46.022367  PCI: 00:1d.0 [8086/0000] bus ops

  891 15:21:46.025734  PCI: 00:1d.0 [8086/02b0] enabled

  892 15:21:46.029948  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  893 15:21:46.032034  PCI: 00:1e.0 [8086/0000] ops

  894 15:21:46.036030  PCI: 00:1e.0 [8086/02a8] enabled

  895 15:21:46.038677  PCI: 00:1e.2 [8086/0000] bus ops

  896 15:21:46.042322  PCI: 00:1e.2 [8086/02aa] enabled

  897 15:21:46.046009  PCI: 00:1e.3 [8086/0000] bus ops

  898 15:21:46.048773  PCI: 00:1e.3 [8086/02ab] enabled

  899 15:21:46.052352  PCI: 00:1f.0 [8086/0000] bus ops

  900 15:21:46.056013  PCI: 00:1f.0 [8086/0284] enabled

  901 15:21:46.061895  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  902 15:21:46.068913  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  903 15:21:46.072260  PCI: 00:1f.3 [8086/0000] bus ops

  904 15:21:46.075375  PCI: 00:1f.3 [8086/02c8] enabled

  905 15:21:46.078842  PCI: 00:1f.4 [8086/0000] bus ops

  906 15:21:46.082017  PCI: 00:1f.4 [8086/02a3] enabled

  907 15:21:46.085029  PCI: 00:1f.5 [8086/0000] bus ops

  908 15:21:46.089136  PCI: 00:1f.5 [8086/02a4] enabled

  909 15:21:46.091908  PCI: Leftover static devices:

  910 15:21:46.092570  PCI: 00:05.0

  911 15:21:46.093208  PCI: 00:12.5

  912 15:21:46.095072  PCI: 00:12.6

  913 15:21:46.095537  PCI: 00:14.1

  914 15:21:46.098626  PCI: 00:14.5

  915 15:21:46.099200  PCI: 00:15.2

  916 15:21:46.099573  PCI: 00:15.3

  917 15:21:46.102231  PCI: 00:16.1

  918 15:21:46.102801  PCI: 00:16.2

  919 15:21:46.105034  PCI: 00:16.3

  920 15:21:46.105606  PCI: 00:16.4

  921 15:21:46.108426  PCI: 00:16.5

  922 15:21:46.108900  PCI: 00:19.1

  923 15:21:46.109276  PCI: 00:19.2

  924 15:21:46.111600  PCI: 00:1a.0

  925 15:21:46.112181  PCI: 00:1c.0

  926 15:21:46.115345  PCI: 00:1c.1

  927 15:21:46.115976  PCI: 00:1c.2

  928 15:21:46.116364  PCI: 00:1c.3

  929 15:21:46.118717  PCI: 00:1c.4

  930 15:21:46.119295  PCI: 00:1c.5

  931 15:21:46.122138  PCI: 00:1c.6

  932 15:21:46.122717  PCI: 00:1c.7

  933 15:21:46.123094  PCI: 00:1d.1

  934 15:21:46.125013  PCI: 00:1d.2

  935 15:21:46.125490  PCI: 00:1d.3

  936 15:21:46.128423  PCI: 00:1d.4

  937 15:21:46.128898  PCI: 00:1d.5

  938 15:21:46.131779  PCI: 00:1e.1

  939 15:21:46.132295  PCI: 00:1f.1

  940 15:21:46.132667  PCI: 00:1f.2

  941 15:21:46.134640  PCI: 00:1f.6

  942 15:21:46.138287  PCI: Check your devicetree.cb.

  943 15:21:46.138875  PCI: 00:02.0 scanning...

  944 15:21:46.144831  scan_generic_bus for PCI: 00:02.0

  945 15:21:46.148628  scan_generic_bus for PCI: 00:02.0 done

  946 15:21:46.151907  scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs

  947 15:21:46.155185  PCI: 00:14.0 scanning...

  948 15:21:46.158783  scan_static_bus for PCI: 00:14.0

  949 15:21:46.161804  USB0 port 0 enabled

  950 15:21:46.164956  USB0 port 0 scanning...

  951 15:21:46.168165  scan_static_bus for USB0 port 0

  952 15:21:46.168640  USB2 port 0 enabled

  953 15:21:46.171354  USB2 port 1 enabled

  954 15:21:46.174692  USB2 port 2 disabled

  955 15:21:46.175164  USB2 port 3 disabled

  956 15:21:46.177939  USB2 port 5 disabled

  957 15:21:46.181215  USB2 port 6 enabled

  958 15:21:46.181685  USB2 port 9 enabled

  959 15:21:46.184392  USB3 port 0 enabled

  960 15:21:46.184864  USB3 port 1 enabled

  961 15:21:46.187767  USB3 port 2 enabled

  962 15:21:46.191426  USB3 port 3 enabled

  963 15:21:46.192038  USB3 port 4 disabled

  964 15:21:46.194730  USB2 port 0 scanning...

  965 15:21:46.197655  scan_static_bus for USB2 port 0

  966 15:21:46.201877  scan_static_bus for USB2 port 0 done

  967 15:21:46.207800  scan_bus: scanning of bus USB2 port 0 took 9679 usecs

  968 15:21:46.208401  USB2 port 1 scanning...

  969 15:21:46.211645  scan_static_bus for USB2 port 1

  970 15:21:46.218052  scan_static_bus for USB2 port 1 done

  971 15:21:46.221265  scan_bus: scanning of bus USB2 port 1 took 9703 usecs

  972 15:21:46.224684  USB2 port 6 scanning...

  973 15:21:46.227821  scan_static_bus for USB2 port 6

  974 15:21:46.231697  scan_static_bus for USB2 port 6 done

  975 15:21:46.237732  scan_bus: scanning of bus USB2 port 6 took 9705 usecs

  976 15:21:46.238324  USB2 port 9 scanning...

  977 15:21:46.241959  scan_static_bus for USB2 port 9

  978 15:21:46.248493  scan_static_bus for USB2 port 9 done

  979 15:21:46.251522  scan_bus: scanning of bus USB2 port 9 took 9704 usecs

  980 15:21:46.255126  USB3 port 0 scanning...

  981 15:21:46.258340  scan_static_bus for USB3 port 0

  982 15:21:46.261195  scan_static_bus for USB3 port 0 done

  983 15:21:46.267807  scan_bus: scanning of bus USB3 port 0 took 9705 usecs

  984 15:21:46.268395  USB3 port 1 scanning...

  985 15:21:46.271600  scan_static_bus for USB3 port 1

  986 15:21:46.277900  scan_static_bus for USB3 port 1 done

  987 15:21:46.281408  scan_bus: scanning of bus USB3 port 1 took 9705 usecs

  988 15:21:46.285030  USB3 port 2 scanning...

  989 15:21:46.287958  scan_static_bus for USB3 port 2

  990 15:21:46.291504  scan_static_bus for USB3 port 2 done

  991 15:21:46.297898  scan_bus: scanning of bus USB3 port 2 took 9702 usecs

  992 15:21:46.301171  USB3 port 3 scanning...

  993 15:21:46.304588  scan_static_bus for USB3 port 3

  994 15:21:46.307881  scan_static_bus for USB3 port 3 done

  995 15:21:46.310971  scan_bus: scanning of bus USB3 port 3 took 9703 usecs

  996 15:21:46.314555  scan_static_bus for USB0 port 0 done

  997 15:21:46.320866  scan_bus: scanning of bus USB0 port 0 took 155334 usecs

  998 15:21:46.324287  scan_static_bus for PCI: 00:14.0 done

  999 15:21:46.331348  scan_bus: scanning of bus PCI: 00:14.0 took 172956 usecs

 1000 15:21:46.334038  PCI: 00:15.0 scanning...

 1001 15:21:46.337735  scan_generic_bus for PCI: 00:15.0

 1002 15:21:46.340684  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1003 15:21:46.343926  scan_generic_bus for PCI: 00:15.0 done

 1004 15:21:46.351237  scan_bus: scanning of bus PCI: 00:15.0 took 14293 usecs

 1005 15:21:46.354299  PCI: 00:15.1 scanning...

 1006 15:21:46.357766  scan_generic_bus for PCI: 00:15.1

 1007 15:21:46.361087  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1008 15:21:46.364363  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1009 15:21:46.370431  scan_generic_bus for PCI: 00:15.1 done

 1010 15:21:46.373949  scan_bus: scanning of bus PCI: 00:15.1 took 18647 usecs

 1011 15:21:46.377065  PCI: 00:19.0 scanning...

 1012 15:21:46.380797  scan_generic_bus for PCI: 00:19.0

 1013 15:21:46.384405  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1014 15:21:46.390452  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1015 15:21:46.393972  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1016 15:21:46.396950  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1017 15:21:46.400450  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1018 15:21:46.404102  scan_generic_bus for PCI: 00:19.0 done

 1019 15:21:46.410447  scan_bus: scanning of bus PCI: 00:19.0 took 30717 usecs

 1020 15:21:46.413841  PCI: 00:1d.0 scanning...

 1021 15:21:46.416959  do_pci_scan_bridge for PCI: 00:1d.0

 1022 15:21:46.420299  PCI: pci_scan_bus for bus 01

 1023 15:21:46.423816  PCI: 01:00.0 [1c5c/1327] enabled

 1024 15:21:46.426958  Enabling Common Clock Configuration

 1025 15:21:46.430137  L1 Sub-State supported from root port 29

 1026 15:21:46.433805  L1 Sub-State Support = 0xf

 1027 15:21:46.436556  CommonModeRestoreTime = 0x28

 1028 15:21:46.440602  Power On Value = 0x16, Power On Scale = 0x0

 1029 15:21:46.443806  ASPM: Enabled L1

 1030 15:21:46.450253  scan_bus: scanning of bus PCI: 00:1d.0 took 32769 usecs

 1031 15:21:46.450815  PCI: 00:1e.2 scanning...

 1032 15:21:46.456783  scan_generic_bus for PCI: 00:1e.2

 1033 15:21:46.459669  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1034 15:21:46.463668  scan_generic_bus for PCI: 00:1e.2 done

 1035 15:21:46.469707  scan_bus: scanning of bus PCI: 00:1e.2 took 13990 usecs

 1036 15:21:46.470169  PCI: 00:1e.3 scanning...

 1037 15:21:46.473267  scan_generic_bus for PCI: 00:1e.3

 1038 15:21:46.479642  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1039 15:21:46.482942  scan_generic_bus for PCI: 00:1e.3 done

 1040 15:21:46.486597  scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs

 1041 15:21:46.489686  PCI: 00:1f.0 scanning...

 1042 15:21:46.492938  scan_static_bus for PCI: 00:1f.0

 1043 15:21:46.496115  PNP: 0c09.0 enabled

 1044 15:21:46.499818  scan_static_bus for PCI: 00:1f.0 done

 1045 15:21:46.506376  scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs

 1046 15:21:46.506837  PCI: 00:1f.3 scanning...

 1047 15:21:46.513315  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs

 1048 15:21:46.516172  PCI: 00:1f.4 scanning...

 1049 15:21:46.519921  scan_generic_bus for PCI: 00:1f.4

 1050 15:21:46.522907  scan_generic_bus for PCI: 00:1f.4 done

 1051 15:21:46.529164  scan_bus: scanning of bus PCI: 00:1f.4 took 10176 usecs

 1052 15:21:46.532663  PCI: 00:1f.5 scanning...

 1053 15:21:46.536237  scan_generic_bus for PCI: 00:1f.5

 1054 15:21:46.539949  scan_generic_bus for PCI: 00:1f.5 done

 1055 15:21:46.546195  scan_bus: scanning of bus PCI: 00:1f.5 took 10175 usecs

 1056 15:21:46.549608  scan_bus: scanning of bus DOMAIN: 0000 took 604884 usecs

 1057 15:21:46.552411  scan_static_bus for Root Device done

 1058 15:21:46.559368  scan_bus: scanning of bus Root Device took 624751 usecs

 1059 15:21:46.559956  done

 1060 15:21:46.562855  Chrome EC: UHEPI supported

 1061 15:21:46.569480  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1062 15:21:46.576103  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1063 15:21:46.582664  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1064 15:21:46.589444  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1065 15:21:46.592366  SPI flash protection: WPSW=0 SRP0=0

 1066 15:21:46.595932  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1067 15:21:46.602718  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1068 15:21:46.605673  found VGA at PCI: 00:02.0

 1069 15:21:46.608726  Setting up VGA for PCI: 00:02.0

 1070 15:21:46.612412  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1071 15:21:46.619146  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1072 15:21:46.622458  Allocating resources...

 1073 15:21:46.623025  Reading resources...

 1074 15:21:46.629382  Root Device read_resources bus 0 link: 0

 1075 15:21:46.632181  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1076 15:21:46.638862  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1077 15:21:46.641990  DOMAIN: 0000 read_resources bus 0 link: 0

 1078 15:21:46.648930  PCI: 00:14.0 read_resources bus 0 link: 0

 1079 15:21:46.651912  USB0 port 0 read_resources bus 0 link: 0

 1080 15:21:46.660664  USB0 port 0 read_resources bus 0 link: 0 done

 1081 15:21:46.663310  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1082 15:21:46.670703  PCI: 00:15.0 read_resources bus 1 link: 0

 1083 15:21:46.673623  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1084 15:21:46.680219  PCI: 00:15.1 read_resources bus 2 link: 0

 1085 15:21:46.683908  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1086 15:21:46.691418  PCI: 00:19.0 read_resources bus 3 link: 0

 1087 15:21:46.697741  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1088 15:21:46.701231  PCI: 00:1d.0 read_resources bus 1 link: 0

 1089 15:21:46.707526  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1090 15:21:46.711104  PCI: 00:1e.2 read_resources bus 4 link: 0

 1091 15:21:46.718190  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1092 15:21:46.721117  PCI: 00:1e.3 read_resources bus 5 link: 0

 1093 15:21:46.727745  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1094 15:21:46.730778  PCI: 00:1f.0 read_resources bus 0 link: 0

 1095 15:21:46.737422  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1096 15:21:46.744198  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1097 15:21:46.747237  Root Device read_resources bus 0 link: 0 done

 1098 15:21:46.751087  Done reading resources.

 1099 15:21:46.757219  Show resources in subtree (Root Device)...After reading.

 1100 15:21:46.760885   Root Device child on link 0 CPU_CLUSTER: 0

 1101 15:21:46.764547    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1102 15:21:46.767419     APIC: 00

 1103 15:21:46.768036     APIC: 02

 1104 15:21:46.768638     APIC: 04

 1105 15:21:46.770735     APIC: 01

 1106 15:21:46.771295     APIC: 03

 1107 15:21:46.771655     APIC: 05

 1108 15:21:46.774154     APIC: 06

 1109 15:21:46.774710     APIC: 07

 1110 15:21:46.780451    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1111 15:21:46.833755    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1112 15:21:46.834344    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1113 15:21:46.835110     PCI: 00:00.0

 1114 15:21:46.835498     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1115 15:21:46.835880     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1116 15:21:46.836328     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1117 15:21:46.873202     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1118 15:21:46.873770     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1119 15:21:46.874472     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1120 15:21:46.874863     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1121 15:21:46.877491     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1122 15:21:46.883996     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1123 15:21:46.893928     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1124 15:21:46.900401     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1125 15:21:46.910455     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1126 15:21:46.920129     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1127 15:21:46.930224     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1128 15:21:46.940326     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1129 15:21:46.949990     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1130 15:21:46.950559     PCI: 00:02.0

 1131 15:21:46.960376     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1132 15:21:46.973190     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1133 15:21:46.979517     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1134 15:21:46.983189     PCI: 00:04.0

 1135 15:21:46.983839     PCI: 00:08.0

 1136 15:21:46.992817     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1137 15:21:46.996293     PCI: 00:12.0

 1138 15:21:47.006291     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1139 15:21:47.009501     PCI: 00:14.0 child on link 0 USB0 port 0

 1140 15:21:47.019240     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1141 15:21:47.022915      USB0 port 0 child on link 0 USB2 port 0

 1142 15:21:47.026437       USB2 port 0

 1143 15:21:47.027007       USB2 port 1

 1144 15:21:47.029383       USB2 port 2

 1145 15:21:47.029839       USB2 port 3

 1146 15:21:47.032881       USB2 port 5

 1147 15:21:47.033435       USB2 port 6

 1148 15:21:47.035821       USB2 port 9

 1149 15:21:47.036475       USB3 port 0

 1150 15:21:47.039150       USB3 port 1

 1151 15:21:47.042745       USB3 port 2

 1152 15:21:47.043204       USB3 port 3

 1153 15:21:47.046512       USB3 port 4

 1154 15:21:47.047078     PCI: 00:14.2

 1155 15:21:47.056411     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1156 15:21:47.065922     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1157 15:21:47.069404     PCI: 00:14.3

 1158 15:21:47.079127     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1159 15:21:47.082702     PCI: 00:15.0 child on link 0 I2C: 01:15

 1160 15:21:47.092809     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 15:21:47.093380      I2C: 01:15

 1162 15:21:47.098806     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1163 15:21:47.108574     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1164 15:21:47.109128      I2C: 02:5d

 1165 15:21:47.112205      GENERIC: 0.0

 1166 15:21:47.112941     PCI: 00:16.0

 1167 15:21:47.122113     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1168 15:21:47.125374     PCI: 00:17.0

 1169 15:21:47.131899     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1170 15:21:47.141920     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1171 15:21:47.152060     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1172 15:21:47.158223     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1173 15:21:47.168406     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1174 15:21:47.174813     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1175 15:21:47.181558     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1176 15:21:47.191550     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1177 15:21:47.192172      I2C: 03:1a

 1178 15:21:47.194707      I2C: 03:38

 1179 15:21:47.195267      I2C: 03:39

 1180 15:21:47.198053      I2C: 03:3a

 1181 15:21:47.198519      I2C: 03:3b

 1182 15:21:47.201569     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1183 15:21:47.211443     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1184 15:21:47.221406     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1185 15:21:47.231557     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1186 15:21:47.232239      PCI: 01:00.0

 1187 15:21:47.241280      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1188 15:21:47.244442     PCI: 00:1e.0

 1189 15:21:47.254825     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1190 15:21:47.264838     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1191 15:21:47.268131     PCI: 00:1e.2 child on link 0 SPI: 00

 1192 15:21:47.278159     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1193 15:21:47.281392      SPI: 00

 1194 15:21:47.284127     PCI: 00:1e.3 child on link 0 SPI: 01

 1195 15:21:47.294993     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1196 15:21:47.295722      SPI: 01

 1197 15:21:47.298222     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1198 15:21:47.307730     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1199 15:21:47.317818     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1200 15:21:47.318384      PNP: 0c09.0

 1201 15:21:47.327886      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1202 15:21:47.328455     PCI: 00:1f.3

 1203 15:21:47.337545     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1204 15:21:47.347544     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1205 15:21:47.350904     PCI: 00:1f.4

 1206 15:21:47.360671     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1207 15:21:47.370862     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1208 15:21:47.371413     PCI: 00:1f.5

 1209 15:21:47.380983     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1210 15:21:47.387164  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1211 15:21:47.394045  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1212 15:21:47.400512  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1213 15:21:47.404308  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1214 15:21:47.407197  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1215 15:21:47.410595  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1216 15:21:47.414481  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1217 15:21:47.420697  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1218 15:21:47.427422  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1219 15:21:47.434627  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1220 15:21:47.443934  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1221 15:21:47.450592  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1222 15:21:47.453293  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1223 15:21:47.463641  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1224 15:21:47.466996  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1225 15:21:47.473802  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1226 15:21:47.476729  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1227 15:21:47.480490  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1228 15:21:47.486621  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1229 15:21:47.490129  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1230 15:21:47.496472  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1231 15:21:47.499689  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1232 15:21:47.506812  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1233 15:21:47.509932  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1234 15:21:47.516385  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1235 15:21:47.519737  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1236 15:21:47.526772  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1237 15:21:47.530072  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1238 15:21:47.536130  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1239 15:21:47.541024  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1240 15:21:47.546305  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1241 15:21:47.549201  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1242 15:21:47.552417  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1243 15:21:47.559664  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1244 15:21:47.562609  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1245 15:21:47.569355  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1246 15:21:47.572527  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1247 15:21:47.582575  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1248 15:21:47.585715  avoid_fixed_resources: DOMAIN: 0000

 1249 15:21:47.592763  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1250 15:21:47.599348  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1251 15:21:47.605957  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1252 15:21:47.612581  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1253 15:21:47.622259  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1254 15:21:47.628406  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1255 15:21:47.635418  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1256 15:21:47.645605  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1257 15:21:47.652575  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1258 15:21:47.659134  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1259 15:21:47.665177  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1260 15:21:47.671760  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1261 15:21:47.675267  Setting resources...

 1262 15:21:47.682353  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1263 15:21:47.684928  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1264 15:21:47.688046  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1265 15:21:47.694997  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1266 15:21:47.698619  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1267 15:21:47.705307  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1268 15:21:47.711918  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1269 15:21:47.718498  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1270 15:21:47.724995  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1271 15:21:47.728396  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1272 15:21:47.735074  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1273 15:21:47.738314  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1274 15:21:47.744946  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1275 15:21:47.748394  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1276 15:21:47.755391  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1277 15:21:47.758362  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1278 15:21:47.764598  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1279 15:21:47.768556  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1280 15:21:47.774902  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1281 15:21:47.778513  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1282 15:21:47.781647  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1283 15:21:47.788240  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1284 15:21:47.792117  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1285 15:21:47.797676  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1286 15:21:47.801326  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1287 15:21:47.807982  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1288 15:21:47.811207  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1289 15:21:47.817480  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1290 15:21:47.820875  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1291 15:21:47.827714  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1292 15:21:47.831110  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1293 15:21:47.837801  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1294 15:21:47.844383  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1295 15:21:47.851142  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1296 15:21:47.858100  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1297 15:21:47.867920  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1298 15:21:47.870813  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1299 15:21:47.877516  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1300 15:21:47.884299  Root Device assign_resources, bus 0 link: 0

 1301 15:21:47.887309  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1302 15:21:47.897845  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1303 15:21:47.903944  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1304 15:21:47.911063  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1305 15:21:47.920654  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1306 15:21:47.927931  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1307 15:21:47.937415  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1308 15:21:47.940572  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1309 15:21:47.947371  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1310 15:21:47.953804  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1311 15:21:47.964060  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1312 15:21:47.971100  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1313 15:21:47.980472  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1314 15:21:47.983432  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1315 15:21:47.987398  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1316 15:21:47.997277  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1317 15:21:48.000335  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1318 15:21:48.006881  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1319 15:21:48.013683  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1320 15:21:48.023453  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1321 15:21:48.030144  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1322 15:21:48.036977  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1323 15:21:48.046792  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1324 15:21:48.053506  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1325 15:21:48.060076  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1326 15:21:48.069773  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1327 15:21:48.073392  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1328 15:21:48.080668  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1329 15:21:48.086073  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1330 15:21:48.096259  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1331 15:21:48.102400  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1332 15:21:48.109390  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1333 15:21:48.116628  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1334 15:21:48.122661  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1335 15:21:48.129383  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1336 15:21:48.139161  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1337 15:21:48.142476  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1338 15:21:48.148610  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1339 15:21:48.155833  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1340 15:21:48.159002  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1341 15:21:48.165916  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1342 15:21:48.168941  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1343 15:21:48.175673  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1344 15:21:48.178785  LPC: Trying to open IO window from 800 size 1ff

 1345 15:21:48.188414  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1346 15:21:48.195796  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1347 15:21:48.204975  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1348 15:21:48.211986  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1349 15:21:48.218219  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1350 15:21:48.222278  Root Device assign_resources, bus 0 link: 0

 1351 15:21:48.225061  Done setting resources.

 1352 15:21:48.231974  Show resources in subtree (Root Device)...After assigning values.

 1353 15:21:48.235247   Root Device child on link 0 CPU_CLUSTER: 0

 1354 15:21:48.238365    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1355 15:21:48.242218     APIC: 00

 1356 15:21:48.242763     APIC: 02

 1357 15:21:48.245109     APIC: 04

 1358 15:21:48.245651     APIC: 01

 1359 15:21:48.246006     APIC: 03

 1360 15:21:48.248508     APIC: 05

 1361 15:21:48.249052     APIC: 06

 1362 15:21:48.249405     APIC: 07

 1363 15:21:48.254981    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1364 15:21:48.264699    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1365 15:21:48.274655    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1366 15:21:48.277852     PCI: 00:00.0

 1367 15:21:48.284971     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1368 15:21:48.294517     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1369 15:21:48.304148     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1370 15:21:48.314686     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1371 15:21:48.324535     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1372 15:21:48.334393     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1373 15:21:48.340639     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1374 15:21:48.351058     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1375 15:21:48.360800     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1376 15:21:48.371284     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1377 15:21:48.381411     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1378 15:21:48.387304     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1379 15:21:48.397106     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1380 15:21:48.406679     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1381 15:21:48.416571     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1382 15:21:48.427380     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1383 15:21:48.427999     PCI: 00:02.0

 1384 15:21:48.440017     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1385 15:21:48.449559     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1386 15:21:48.459924     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1387 15:21:48.460500     PCI: 00:04.0

 1388 15:21:48.463091     PCI: 00:08.0

 1389 15:21:48.472997     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1390 15:21:48.473568     PCI: 00:12.0

 1391 15:21:48.483242     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1392 15:21:48.489386     PCI: 00:14.0 child on link 0 USB0 port 0

 1393 15:21:48.499788     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1394 15:21:48.502522      USB0 port 0 child on link 0 USB2 port 0

 1395 15:21:48.505987       USB2 port 0

 1396 15:21:48.506454       USB2 port 1

 1397 15:21:48.509490       USB2 port 2

 1398 15:21:48.510048       USB2 port 3

 1399 15:21:48.512632       USB2 port 5

 1400 15:21:48.513094       USB2 port 6

 1401 15:21:48.517234       USB2 port 9

 1402 15:21:48.517813       USB3 port 0

 1403 15:21:48.519199       USB3 port 1

 1404 15:21:48.519659       USB3 port 2

 1405 15:21:48.523094       USB3 port 3

 1406 15:21:48.525604       USB3 port 4

 1407 15:21:48.526073     PCI: 00:14.2

 1408 15:21:48.535534     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1409 15:21:48.545464     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1410 15:21:48.548777     PCI: 00:14.3

 1411 15:21:48.559083     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1412 15:21:48.562023     PCI: 00:15.0 child on link 0 I2C: 01:15

 1413 15:21:48.572481     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1414 15:21:48.575695      I2C: 01:15

 1415 15:21:48.578924     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1416 15:21:48.588576     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1417 15:21:48.592079      I2C: 02:5d

 1418 15:21:48.592639      GENERIC: 0.0

 1419 15:21:48.595328     PCI: 00:16.0

 1420 15:21:48.605369     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1421 15:21:48.605932     PCI: 00:17.0

 1422 15:21:48.614886     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1423 15:21:48.624979     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1424 15:21:48.635213     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1425 15:21:48.645658     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1426 15:21:48.655007     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1427 15:21:48.664768     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1428 15:21:48.668461     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1429 15:21:48.678315     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1430 15:21:48.681015      I2C: 03:1a

 1431 15:21:48.681477      I2C: 03:38

 1432 15:21:48.684608      I2C: 03:39

 1433 15:21:48.685162      I2C: 03:3a

 1434 15:21:48.688055      I2C: 03:3b

 1435 15:21:48.691077     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1436 15:21:48.701212     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1437 15:21:48.710841     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1438 15:21:48.720788     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1439 15:21:48.721336      PCI: 01:00.0

 1440 15:21:48.733837      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1441 15:21:48.734305     PCI: 00:1e.0

 1442 15:21:48.743795     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1443 15:21:48.757287     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1444 15:21:48.760407     PCI: 00:1e.2 child on link 0 SPI: 00

 1445 15:21:48.770651     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1446 15:21:48.771212      SPI: 00

 1447 15:21:48.774051     PCI: 00:1e.3 child on link 0 SPI: 01

 1448 15:21:48.786748     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1449 15:21:48.787303      SPI: 01

 1450 15:21:48.790188     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1451 15:21:48.800358     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1452 15:21:48.810655     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1453 15:21:48.811221      PNP: 0c09.0

 1454 15:21:48.820003      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1455 15:21:48.820538     PCI: 00:1f.3

 1456 15:21:48.830207     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1457 15:21:48.842851     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1458 15:21:48.843390     PCI: 00:1f.4

 1459 15:21:48.852697     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1460 15:21:48.863304     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1461 15:21:48.863787     PCI: 00:1f.5

 1462 15:21:48.875904     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1463 15:21:48.876386  Done allocating resources.

 1464 15:21:48.882340  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1465 15:21:48.885778  Enabling resources...

 1466 15:21:48.888840  PCI: 00:00.0 subsystem <- 8086/9b61

 1467 15:21:48.892073  PCI: 00:00.0 cmd <- 06

 1468 15:21:48.895413  PCI: 00:02.0 subsystem <- 8086/9b41

 1469 15:21:48.898652  PCI: 00:02.0 cmd <- 03

 1470 15:21:48.902115  PCI: 00:08.0 cmd <- 06

 1471 15:21:48.905426  PCI: 00:12.0 subsystem <- 8086/02f9

 1472 15:21:48.908466  PCI: 00:12.0 cmd <- 02

 1473 15:21:48.911812  PCI: 00:14.0 subsystem <- 8086/02ed

 1474 15:21:48.911931  PCI: 00:14.0 cmd <- 02

 1475 15:21:48.915855  PCI: 00:14.2 cmd <- 02

 1476 15:21:48.918694  PCI: 00:14.3 subsystem <- 8086/02f0

 1477 15:21:48.921965  PCI: 00:14.3 cmd <- 02

 1478 15:21:48.925602  PCI: 00:15.0 subsystem <- 8086/02e8

 1479 15:21:48.928435  PCI: 00:15.0 cmd <- 02

 1480 15:21:48.931672  PCI: 00:15.1 subsystem <- 8086/02e9

 1481 15:21:48.935106  PCI: 00:15.1 cmd <- 02

 1482 15:21:48.938783  PCI: 00:16.0 subsystem <- 8086/02e0

 1483 15:21:48.942006  PCI: 00:16.0 cmd <- 02

 1484 15:21:48.944856  PCI: 00:17.0 subsystem <- 8086/02d3

 1485 15:21:48.948439  PCI: 00:17.0 cmd <- 03

 1486 15:21:48.952177  PCI: 00:19.0 subsystem <- 8086/02c5

 1487 15:21:48.954822  PCI: 00:19.0 cmd <- 02

 1488 15:21:48.958632  PCI: 00:1d.0 bridge ctrl <- 0013

 1489 15:21:48.961406  PCI: 00:1d.0 subsystem <- 8086/02b0

 1490 15:21:48.961496  PCI: 00:1d.0 cmd <- 06

 1491 15:21:48.968723  PCI: 00:1e.0 subsystem <- 8086/02a8

 1492 15:21:48.968811  PCI: 00:1e.0 cmd <- 06

 1493 15:21:48.971633  PCI: 00:1e.2 subsystem <- 8086/02aa

 1494 15:21:48.975334  PCI: 00:1e.2 cmd <- 06

 1495 15:21:48.978479  PCI: 00:1e.3 subsystem <- 8086/02ab

 1496 15:21:48.981735  PCI: 00:1e.3 cmd <- 02

 1497 15:21:48.984897  PCI: 00:1f.0 subsystem <- 8086/0284

 1498 15:21:48.988539  PCI: 00:1f.0 cmd <- 407

 1499 15:21:48.991577  PCI: 00:1f.3 subsystem <- 8086/02c8

 1500 15:21:48.995101  PCI: 00:1f.3 cmd <- 02

 1501 15:21:48.998637  PCI: 00:1f.4 subsystem <- 8086/02a3

 1502 15:21:49.001510  PCI: 00:1f.4 cmd <- 03

 1503 15:21:49.004938  PCI: 00:1f.5 subsystem <- 8086/02a4

 1504 15:21:49.008545  PCI: 00:1f.5 cmd <- 406

 1505 15:21:49.016095  PCI: 01:00.0 cmd <- 02

 1506 15:21:49.021602  done.

 1507 15:21:49.035302  ME: Version: 14.0.39.1367

 1508 15:21:49.041872  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13

 1509 15:21:49.045133  Initializing devices...

 1510 15:21:49.045247  Root Device init ...

 1511 15:21:49.051610  Chrome EC: Set SMI mask to 0x0000000000000000

 1512 15:21:49.055016  Chrome EC: clear events_b mask to 0x0000000000000000

 1513 15:21:49.061444  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1514 15:21:49.068454  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1515 15:21:49.075010  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1516 15:21:49.078242  Chrome EC: Set WAKE mask to 0x0000000000000000

 1517 15:21:49.081577  Root Device init finished in 35186 usecs

 1518 15:21:49.084988  CPU_CLUSTER: 0 init ...

 1519 15:21:49.091991  CPU_CLUSTER: 0 init finished in 2449 usecs

 1520 15:21:49.096333  PCI: 00:00.0 init ...

 1521 15:21:49.099603  CPU TDP: 15 Watts

 1522 15:21:49.102617  CPU PL2 = 64 Watts

 1523 15:21:49.106278  PCI: 00:00.0 init finished in 7085 usecs

 1524 15:21:49.109070  PCI: 00:02.0 init ...

 1525 15:21:49.112406  PCI: 00:02.0 init finished in 2254 usecs

 1526 15:21:49.115816  PCI: 00:08.0 init ...

 1527 15:21:49.119018  PCI: 00:08.0 init finished in 2254 usecs

 1528 15:21:49.122603  PCI: 00:12.0 init ...

 1529 15:21:49.125660  PCI: 00:12.0 init finished in 2254 usecs

 1530 15:21:49.129494  PCI: 00:14.0 init ...

 1531 15:21:49.132723  PCI: 00:14.0 init finished in 2253 usecs

 1532 15:21:49.135838  PCI: 00:14.2 init ...

 1533 15:21:49.138873  PCI: 00:14.2 init finished in 2252 usecs

 1534 15:21:49.142631  PCI: 00:14.3 init ...

 1535 15:21:49.146179  PCI: 00:14.3 init finished in 2271 usecs

 1536 15:21:49.149148  PCI: 00:15.0 init ...

 1537 15:21:49.152242  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1538 15:21:49.156124  PCI: 00:15.0 init finished in 5982 usecs

 1539 15:21:49.159193  PCI: 00:15.1 init ...

 1540 15:21:49.162289  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1541 15:21:49.169088  PCI: 00:15.1 init finished in 5981 usecs

 1542 15:21:49.169205  PCI: 00:16.0 init ...

 1543 15:21:49.175330  PCI: 00:16.0 init finished in 2252 usecs

 1544 15:21:49.179003  PCI: 00:19.0 init ...

 1545 15:21:49.181851  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1546 15:21:49.185294  PCI: 00:19.0 init finished in 5982 usecs

 1547 15:21:49.188411  PCI: 00:1d.0 init ...

 1548 15:21:49.192051  Initializing PCH PCIe bridge.

 1549 15:21:49.194870  PCI: 00:1d.0 init finished in 5290 usecs

 1550 15:21:49.198363  PCI: 00:1f.0 init ...

 1551 15:21:49.201764  IOAPIC: Initializing IOAPIC at 0xfec00000

 1552 15:21:49.208461  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1553 15:21:49.208554  IOAPIC: ID = 0x02

 1554 15:21:49.211769  IOAPIC: Dumping registers

 1555 15:21:49.214906    reg 0x0000: 0x02000000

 1556 15:21:49.218187    reg 0x0001: 0x00770020

 1557 15:21:49.218269    reg 0x0002: 0x00000000

 1558 15:21:49.224759  PCI: 00:1f.0 init finished in 23554 usecs

 1559 15:21:49.228033  PCI: 00:1f.4 init ...

 1560 15:21:49.231453  PCI: 00:1f.4 init finished in 2263 usecs

 1561 15:21:49.242569  PCI: 01:00.0 init ...

 1562 15:21:49.245428  PCI: 01:00.0 init finished in 2244 usecs

 1563 15:21:49.250437  PNP: 0c09.0 init ...

 1564 15:21:49.253428  Google Chrome EC uptime: 11.095 seconds

 1565 15:21:49.259760  Google Chrome AP resets since EC boot: 0

 1566 15:21:49.263268  Google Chrome most recent AP reset causes:

 1567 15:21:49.270169  Google Chrome EC reset flags at last EC boot: reset-pin

 1568 15:21:49.273601  PNP: 0c09.0 init finished in 20606 usecs

 1569 15:21:49.276237  Devices initialized

 1570 15:21:49.280090  Show all devs... After init.

 1571 15:21:49.280258  Root Device: enabled 1

 1572 15:21:49.283082  CPU_CLUSTER: 0: enabled 1

 1573 15:21:49.286439  DOMAIN: 0000: enabled 1

 1574 15:21:49.286621  APIC: 00: enabled 1

 1575 15:21:49.289364  PCI: 00:00.0: enabled 1

 1576 15:21:49.292669  PCI: 00:02.0: enabled 1

 1577 15:21:49.296403  PCI: 00:04.0: enabled 0

 1578 15:21:49.296606  PCI: 00:05.0: enabled 0

 1579 15:21:49.299462  PCI: 00:12.0: enabled 1

 1580 15:21:49.303246  PCI: 00:12.5: enabled 0

 1581 15:21:49.306106  PCI: 00:12.6: enabled 0

 1582 15:21:49.306343  PCI: 00:14.0: enabled 1

 1583 15:21:49.309273  PCI: 00:14.1: enabled 0

 1584 15:21:49.312688  PCI: 00:14.3: enabled 1

 1585 15:21:49.312947  PCI: 00:14.5: enabled 0

 1586 15:21:49.316109  PCI: 00:15.0: enabled 1

 1587 15:21:49.319472  PCI: 00:15.1: enabled 1

 1588 15:21:49.323018  PCI: 00:15.2: enabled 0

 1589 15:21:49.323351  PCI: 00:15.3: enabled 0

 1590 15:21:49.326062  PCI: 00:16.0: enabled 1

 1591 15:21:49.329721  PCI: 00:16.1: enabled 0

 1592 15:21:49.333293  PCI: 00:16.2: enabled 0

 1593 15:21:49.333780  PCI: 00:16.3: enabled 0

 1594 15:21:49.335832  PCI: 00:16.4: enabled 0

 1595 15:21:49.339536  PCI: 00:16.5: enabled 0

 1596 15:21:49.342890  PCI: 00:17.0: enabled 1

 1597 15:21:49.343449  PCI: 00:19.0: enabled 1

 1598 15:21:49.346289  PCI: 00:19.1: enabled 0

 1599 15:21:49.349611  PCI: 00:19.2: enabled 0

 1600 15:21:49.352578  PCI: 00:1a.0: enabled 0

 1601 15:21:49.353150  PCI: 00:1c.0: enabled 0

 1602 15:21:49.355792  PCI: 00:1c.1: enabled 0

 1603 15:21:49.359653  PCI: 00:1c.2: enabled 0

 1604 15:21:49.360145  PCI: 00:1c.3: enabled 0

 1605 15:21:49.362798  PCI: 00:1c.4: enabled 0

 1606 15:21:49.365721  PCI: 00:1c.5: enabled 0

 1607 15:21:49.368883  PCI: 00:1c.6: enabled 0

 1608 15:21:49.369355  PCI: 00:1c.7: enabled 0

 1609 15:21:49.372844  PCI: 00:1d.0: enabled 1

 1610 15:21:49.375833  PCI: 00:1d.1: enabled 0

 1611 15:21:49.379089  PCI: 00:1d.2: enabled 0

 1612 15:21:49.379557  PCI: 00:1d.3: enabled 0

 1613 15:21:49.382721  PCI: 00:1d.4: enabled 0

 1614 15:21:49.385686  PCI: 00:1d.5: enabled 0

 1615 15:21:49.389015  PCI: 00:1e.0: enabled 1

 1616 15:21:49.389592  PCI: 00:1e.1: enabled 0

 1617 15:21:49.392707  PCI: 00:1e.2: enabled 1

 1618 15:21:49.395814  PCI: 00:1e.3: enabled 1

 1619 15:21:49.396409  PCI: 00:1f.0: enabled 1

 1620 15:21:49.399111  PCI: 00:1f.1: enabled 0

 1621 15:21:49.402299  PCI: 00:1f.2: enabled 0

 1622 15:21:49.405707  PCI: 00:1f.3: enabled 1

 1623 15:21:49.406283  PCI: 00:1f.4: enabled 1

 1624 15:21:49.409356  PCI: 00:1f.5: enabled 1

 1625 15:21:49.412426  PCI: 00:1f.6: enabled 0

 1626 15:21:49.415914  USB0 port 0: enabled 1

 1627 15:21:49.416489  I2C: 01:15: enabled 1

 1628 15:21:49.419374  I2C: 02:5d: enabled 1

 1629 15:21:49.422599  GENERIC: 0.0: enabled 1

 1630 15:21:49.423170  I2C: 03:1a: enabled 1

 1631 15:21:49.425599  I2C: 03:38: enabled 1

 1632 15:21:49.428823  I2C: 03:39: enabled 1

 1633 15:21:49.429392  I2C: 03:3a: enabled 1

 1634 15:21:49.432045  I2C: 03:3b: enabled 1

 1635 15:21:49.435478  PCI: 00:00.0: enabled 1

 1636 15:21:49.436086  SPI: 00: enabled 1

 1637 15:21:49.438967  SPI: 01: enabled 1

 1638 15:21:49.442268  PNP: 0c09.0: enabled 1

 1639 15:21:49.442857  USB2 port 0: enabled 1

 1640 15:21:49.445338  USB2 port 1: enabled 1

 1641 15:21:49.448503  USB2 port 2: enabled 0

 1642 15:21:49.451838  USB2 port 3: enabled 0

 1643 15:21:49.452386  USB2 port 5: enabled 0

 1644 15:21:49.455187  USB2 port 6: enabled 1

 1645 15:21:49.458703  USB2 port 9: enabled 1

 1646 15:21:49.459186  USB3 port 0: enabled 1

 1647 15:21:49.462190  USB3 port 1: enabled 1

 1648 15:21:49.465400  USB3 port 2: enabled 1

 1649 15:21:49.468509  USB3 port 3: enabled 1

 1650 15:21:49.469085  USB3 port 4: enabled 0

 1651 15:21:49.471821  APIC: 02: enabled 1

 1652 15:21:49.472340  APIC: 04: enabled 1

 1653 15:21:49.474761  APIC: 01: enabled 1

 1654 15:21:49.478412  APIC: 03: enabled 1

 1655 15:21:49.478988  APIC: 05: enabled 1

 1656 15:21:49.481557  APIC: 06: enabled 1

 1657 15:21:49.485418  APIC: 07: enabled 1

 1658 15:21:49.486005  PCI: 00:08.0: enabled 1

 1659 15:21:49.488542  PCI: 00:14.2: enabled 1

 1660 15:21:49.492097  PCI: 01:00.0: enabled 1

 1661 15:21:49.495446  Disabling ACPI via APMC:

 1662 15:21:49.498538  done.

 1663 15:21:49.502295  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1664 15:21:49.505391  ELOG: NV offset 0xaf0000 size 0x4000

 1665 15:21:49.511786  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1666 15:21:49.518797  ELOG: Event(17) added with size 13 at 2023-06-09 15:21:49 UTC

 1667 15:21:49.525440  ELOG: Event(92) added with size 9 at 2023-06-09 15:21:49 UTC

 1668 15:21:49.532068  ELOG: Event(93) added with size 9 at 2023-06-09 15:21:49 UTC

 1669 15:21:49.539227  ELOG: Event(9A) added with size 9 at 2023-06-09 15:21:49 UTC

 1670 15:21:49.545682  ELOG: Event(9E) added with size 10 at 2023-06-09 15:21:49 UTC

 1671 15:21:49.551759  ELOG: Event(9F) added with size 14 at 2023-06-09 15:21:49 UTC

 1672 15:21:49.555534  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1673 15:21:49.562912  ELOG: Event(A1) added with size 10 at 2023-06-09 15:21:49 UTC

 1674 15:21:49.572393  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1675 15:21:49.578924  ELOG: Event(A0) added with size 9 at 2023-06-09 15:21:49 UTC

 1676 15:21:49.582039  elog_add_boot_reason: Logged dev mode boot

 1677 15:21:49.585821  Finalize devices...

 1678 15:21:49.586578  PCI: 00:17.0 final

 1679 15:21:49.588769  Devices finalized

 1680 15:21:49.592110  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1681 15:21:49.598853  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1682 15:21:49.602249  ME: HFSTS1                  : 0x90000245

 1683 15:21:49.605522  ME: HFSTS2                  : 0x3B850126

 1684 15:21:49.612003  ME: HFSTS3                  : 0x00000020

 1685 15:21:49.615162  ME: HFSTS4                  : 0x00004800

 1686 15:21:49.618594  ME: HFSTS5                  : 0x00000000

 1687 15:21:49.621968  ME: HFSTS6                  : 0x40400006

 1688 15:21:49.625209  ME: Manufacturing Mode      : NO

 1689 15:21:49.629168  ME: FW Partition Table      : OK

 1690 15:21:49.631508  ME: Bringup Loader Failure  : NO

 1691 15:21:49.635335  ME: Firmware Init Complete  : YES

 1692 15:21:49.638754  ME: Boot Options Present    : NO

 1693 15:21:49.641829  ME: Update In Progress      : NO

 1694 15:21:49.645233  ME: D0i3 Support            : YES

 1695 15:21:49.648176  ME: Low Power State Enabled : NO

 1696 15:21:49.651529  ME: CPU Replaced            : NO

 1697 15:21:49.654902  ME: CPU Replacement Valid   : YES

 1698 15:21:49.658626  ME: Current Working State   : 5

 1699 15:21:49.662196  ME: Current Operation State : 1

 1700 15:21:49.665036  ME: Current Operation Mode  : 0

 1701 15:21:49.668206  ME: Error Code              : 0

 1702 15:21:49.671442  ME: CPU Debug Disabled      : YES

 1703 15:21:49.675412  ME: TXT Support             : NO

 1704 15:21:49.681342  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1705 15:21:49.687751  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1706 15:21:49.688260  CBFS @ c08000 size 3f8000

 1707 15:21:49.694801  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1708 15:21:49.698050  CBFS: Locating 'fallback/dsdt.aml'

 1709 15:21:49.701106  CBFS: Found @ offset 10bb80 size 3fa5

 1710 15:21:49.708190  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1711 15:21:49.711409  CBFS @ c08000 size 3f8000

 1712 15:21:49.714744  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1713 15:21:49.718057  CBFS: Locating 'fallback/slic'

 1714 15:21:49.723237  CBFS: 'fallback/slic' not found.

 1715 15:21:49.729647  ACPI: Writing ACPI tables at 99b3e000.

 1716 15:21:49.730219  ACPI:    * FACS

 1717 15:21:49.733163  ACPI:    * DSDT

 1718 15:21:49.736283  Ramoops buffer: 0x100000@0x99a3d000.

 1719 15:21:49.739808  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1720 15:21:49.746606  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1721 15:21:49.749960  Google Chrome EC: version:

 1722 15:21:49.752687  	ro: helios_v2.0.2659-56403530b

 1723 15:21:49.756392  	rw: helios_v2.0.2849-c41de27e7d

 1724 15:21:49.756967    running image: 1

 1725 15:21:49.760061  ACPI:    * FADT

 1726 15:21:49.760543  SCI is IRQ9

 1727 15:21:49.767250  ACPI: added table 1/32, length now 40

 1728 15:21:49.767825  ACPI:     * SSDT

 1729 15:21:49.770527  Found 1 CPU(s) with 8 core(s) each.

 1730 15:21:49.773742  Error: Could not locate 'wifi_sar' in VPD.

 1731 15:21:49.780224  Checking CBFS for default SAR values

 1732 15:21:49.783055  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1733 15:21:49.787044  CBFS @ c08000 size 3f8000

 1734 15:21:49.793731  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1735 15:21:49.796400  CBFS: Locating 'wifi_sar_defaults.hex'

 1736 15:21:49.799991  CBFS: Found @ offset 5fac0 size 77

 1737 15:21:49.803315  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1738 15:21:49.810261  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1739 15:21:49.813180  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1740 15:21:49.819556  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1741 15:21:49.823468  failed to find key in VPD: dsm_calib_r0_0

 1742 15:21:49.833488  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1743 15:21:49.836550  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1744 15:21:49.839811  failed to find key in VPD: dsm_calib_r0_1

 1745 15:21:49.849517  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1746 15:21:49.856305  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1747 15:21:49.859234  failed to find key in VPD: dsm_calib_r0_2

 1748 15:21:49.869525  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1749 15:21:49.872846  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1750 15:21:49.879222  failed to find key in VPD: dsm_calib_r0_3

 1751 15:21:49.886169  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1752 15:21:49.892686  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1753 15:21:49.896004  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1754 15:21:49.902387  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1755 15:21:49.905819  EC returned error result code 1

 1756 15:21:49.909614  EC returned error result code 1

 1757 15:21:49.912974  EC returned error result code 1

 1758 15:21:49.915907  PS2K: Bad resp from EC. Vivaldi disabled!

 1759 15:21:49.922859  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1760 15:21:49.929268  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1761 15:21:49.932401  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1762 15:21:49.939493  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1763 15:21:49.942803  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1764 15:21:49.949298  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1765 15:21:49.956060  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1766 15:21:49.962622  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1767 15:21:49.966094  ACPI: added table 2/32, length now 44

 1768 15:21:49.966658  ACPI:    * MCFG

 1769 15:21:49.972497  ACPI: added table 3/32, length now 48

 1770 15:21:49.973061  ACPI:    * TPM2

 1771 15:21:49.975656  TPM2 log created at 99a2d000

 1772 15:21:49.979650  ACPI: added table 4/32, length now 52

 1773 15:21:49.982445  ACPI:    * MADT

 1774 15:21:49.983002  SCI is IRQ9

 1775 15:21:49.985574  ACPI: added table 5/32, length now 56

 1776 15:21:49.988827  current = 99b43ac0

 1777 15:21:49.989389  ACPI:    * DMAR

 1778 15:21:49.992440  ACPI: added table 6/32, length now 60

 1779 15:21:49.995470  ACPI:    * IGD OpRegion

 1780 15:21:49.999059  GMA: Found VBT in CBFS

 1781 15:21:50.002361  GMA: Found valid VBT in CBFS

 1782 15:21:50.005394  ACPI: added table 7/32, length now 64

 1783 15:21:50.005864  ACPI:    * HPET

 1784 15:21:50.009630  ACPI: added table 8/32, length now 68

 1785 15:21:50.011696  ACPI: done.

 1786 15:21:50.015509  ACPI tables: 31744 bytes.

 1787 15:21:50.018991  smbios_write_tables: 99a2c000

 1788 15:21:50.021751  EC returned error result code 3

 1789 15:21:50.025299  Couldn't obtain OEM name from CBI

 1790 15:21:50.028890  Create SMBIOS type 17

 1791 15:21:50.031790  PCI: 00:00.0 (Intel Cannonlake)

 1792 15:21:50.032309  PCI: 00:14.3 (Intel WiFi)

 1793 15:21:50.035643  SMBIOS tables: 939 bytes.

 1794 15:21:50.038824  Writing table forward entry at 0x00000500

 1795 15:21:50.045289  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1796 15:21:50.048608  Writing coreboot table at 0x99b62000

 1797 15:21:50.055189   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1798 15:21:50.062005   1. 0000000000001000-000000000009ffff: RAM

 1799 15:21:50.064775   2. 00000000000a0000-00000000000fffff: RESERVED

 1800 15:21:50.068220   3. 0000000000100000-0000000099a2bfff: RAM

 1801 15:21:50.075324   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1802 15:21:50.081280   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1803 15:21:50.084546   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1804 15:21:50.091518   7. 000000009a000000-000000009f7fffff: RESERVED

 1805 15:21:50.094949   8. 00000000e0000000-00000000efffffff: RESERVED

 1806 15:21:50.100916   9. 00000000fc000000-00000000fc000fff: RESERVED

 1807 15:21:50.104358  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1808 15:21:50.111246  11. 00000000fed10000-00000000fed17fff: RESERVED

 1809 15:21:50.114743  12. 00000000fed80000-00000000fed83fff: RESERVED

 1810 15:21:50.117874  13. 00000000fed90000-00000000fed91fff: RESERVED

 1811 15:21:50.124340  14. 00000000feda0000-00000000feda1fff: RESERVED

 1812 15:21:50.127897  15. 0000000100000000-000000045e7fffff: RAM

 1813 15:21:50.131236  Graphics framebuffer located at 0xc0000000

 1814 15:21:50.134430  Passing 5 GPIOs to payload:

 1815 15:21:50.140719              NAME |       PORT | POLARITY |     VALUE

 1816 15:21:50.143994     write protect |  undefined |     high |       low

 1817 15:21:50.151330               lid |  undefined |     high |      high

 1818 15:21:50.157496             power |  undefined |     high |       low

 1819 15:21:50.161090             oprom |  undefined |     high |       low

 1820 15:21:50.167591          EC in RW | 0x000000cb |     high |       low

 1821 15:21:50.168203  Board ID: 4

 1822 15:21:50.174083  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1823 15:21:50.177131  CBFS @ c08000 size 3f8000

 1824 15:21:50.180716  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1825 15:21:50.187481  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1826 15:21:50.190533  coreboot table: 1492 bytes.

 1827 15:21:50.194163  IMD ROOT    0. 99fff000 00001000

 1828 15:21:50.197473  IMD SMALL   1. 99ffe000 00001000

 1829 15:21:50.200579  FSP MEMORY  2. 99c4e000 003b0000

 1830 15:21:50.203818  CONSOLE     3. 99c2e000 00020000

 1831 15:21:50.207175  FMAP        4. 99c2d000 0000054e

 1832 15:21:50.210366  TIME STAMP  5. 99c2c000 00000910

 1833 15:21:50.213410  VBOOT WORK  6. 99c18000 00014000

 1834 15:21:50.217495  MRC DATA    7. 99c16000 00001958

 1835 15:21:50.220915  ROMSTG STCK 8. 99c15000 00001000

 1836 15:21:50.223998  AFTER CAR   9. 99c0b000 0000a000

 1837 15:21:50.227302  RAMSTAGE   10. 99baf000 0005c000

 1838 15:21:50.230701  REFCODE    11. 99b7a000 00035000

 1839 15:21:50.233869  SMM BACKUP 12. 99b6a000 00010000

 1840 15:21:50.237565  COREBOOT   13. 99b62000 00008000

 1841 15:21:50.240567  ACPI       14. 99b3e000 00024000

 1842 15:21:50.243260  ACPI GNVS  15. 99b3d000 00001000

 1843 15:21:50.247095  RAMOOPS    16. 99a3d000 00100000

 1844 15:21:50.250060  TPM2 TCGLOG17. 99a2d000 00010000

 1845 15:21:50.253541  SMBIOS     18. 99a2c000 00000800

 1846 15:21:50.257127  IMD small region:

 1847 15:21:50.260438    IMD ROOT    0. 99ffec00 00000400

 1848 15:21:50.263150    FSP RUNTIME 1. 99ffebe0 00000004

 1849 15:21:50.266635    EC HOSTEVENT 2. 99ffebc0 00000008

 1850 15:21:50.270407    POWER STATE 3. 99ffeb80 00000040

 1851 15:21:50.273509    ROMSTAGE    4. 99ffeb60 00000004

 1852 15:21:50.277214    MEM INFO    5. 99ffe9a0 000001b9

 1853 15:21:50.280428    VPD         6. 99ffe920 0000006c

 1854 15:21:50.283603  MTRR: Physical address space:

 1855 15:21:50.290216  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1856 15:21:50.296503  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1857 15:21:50.303885  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1858 15:21:50.309681  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1859 15:21:50.313098  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1860 15:21:50.319985  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1861 15:21:50.326377  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1862 15:21:50.329372  MTRR: Fixed MSR 0x250 0x0606060606060606

 1863 15:21:50.336160  MTRR: Fixed MSR 0x258 0x0606060606060606

 1864 15:21:50.340187  MTRR: Fixed MSR 0x259 0x0000000000000000

 1865 15:21:50.343093  MTRR: Fixed MSR 0x268 0x0606060606060606

 1866 15:21:50.346368  MTRR: Fixed MSR 0x269 0x0606060606060606

 1867 15:21:50.352548  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1868 15:21:50.356279  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1869 15:21:50.360513  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1870 15:21:50.362564  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1871 15:21:50.369688  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1872 15:21:50.372554  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1873 15:21:50.376346  call enable_fixed_mtrr()

 1874 15:21:50.379201  CPU physical address size: 39 bits

 1875 15:21:50.382536  MTRR: default type WB/UC MTRR counts: 6/8.

 1876 15:21:50.385716  MTRR: WB selected as default type.

 1877 15:21:50.392399  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1878 15:21:50.399523  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1879 15:21:50.405659  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1880 15:21:50.412376  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1881 15:21:50.419136  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1882 15:21:50.425887  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1883 15:21:50.429128  MTRR: Fixed MSR 0x250 0x0606060606060606

 1884 15:21:50.431985  MTRR: Fixed MSR 0x258 0x0606060606060606

 1885 15:21:50.438680  MTRR: Fixed MSR 0x259 0x0000000000000000

 1886 15:21:50.442205  MTRR: Fixed MSR 0x268 0x0606060606060606

 1887 15:21:50.445195  MTRR: Fixed MSR 0x269 0x0606060606060606

 1888 15:21:50.448828  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1889 15:21:50.455179  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1890 15:21:50.458372  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1891 15:21:50.461587  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1892 15:21:50.464938  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1893 15:21:50.468300  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1894 15:21:50.471836  

 1895 15:21:50.472468  MTRR check

 1896 15:21:50.475553  Fixed MTRRs   : Enabled

 1897 15:21:50.476239  Variable MTRRs: Enabled

 1898 15:21:50.478250  

 1899 15:21:50.478712  call enable_fixed_mtrr()

 1900 15:21:50.485026  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1901 15:21:50.488287  CPU physical address size: 39 bits

 1902 15:21:50.495126  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1903 15:21:50.498134  MTRR: Fixed MSR 0x250 0x0606060606060606

 1904 15:21:50.501494  MTRR: Fixed MSR 0x250 0x0606060606060606

 1905 15:21:50.505213  MTRR: Fixed MSR 0x258 0x0606060606060606

 1906 15:21:50.511683  MTRR: Fixed MSR 0x259 0x0000000000000000

 1907 15:21:50.514591  MTRR: Fixed MSR 0x268 0x0606060606060606

 1908 15:21:50.518280  MTRR: Fixed MSR 0x269 0x0606060606060606

 1909 15:21:50.521257  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1910 15:21:50.528036  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1911 15:21:50.531155  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1912 15:21:50.534930  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1913 15:21:50.537590  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1914 15:21:50.541036  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1915 15:21:50.548187  MTRR: Fixed MSR 0x258 0x0606060606060606

 1916 15:21:50.551489  MTRR: Fixed MSR 0x259 0x0000000000000000

 1917 15:21:50.553919  MTRR: Fixed MSR 0x268 0x0606060606060606

 1918 15:21:50.560604  MTRR: Fixed MSR 0x269 0x0606060606060606

 1919 15:21:50.564155  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1920 15:21:50.568178  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1921 15:21:50.571034  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1922 15:21:50.577224  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1923 15:21:50.580858  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1924 15:21:50.583781  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1925 15:21:50.587186  call enable_fixed_mtrr()

 1926 15:21:50.590714  call enable_fixed_mtrr()

 1927 15:21:50.594216  CPU physical address size: 39 bits

 1928 15:21:50.596938  CPU physical address size: 39 bits

 1929 15:21:50.600467  MTRR: Fixed MSR 0x250 0x0606060606060606

 1930 15:21:50.604026  MTRR: Fixed MSR 0x250 0x0606060606060606

 1931 15:21:50.610916  MTRR: Fixed MSR 0x258 0x0606060606060606

 1932 15:21:50.613648  MTRR: Fixed MSR 0x259 0x0000000000000000

 1933 15:21:50.616937  MTRR: Fixed MSR 0x268 0x0606060606060606

 1934 15:21:50.620641  MTRR: Fixed MSR 0x269 0x0606060606060606

 1935 15:21:50.623498  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1936 15:21:50.630357  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1937 15:21:50.633448  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1938 15:21:50.636995  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1939 15:21:50.640477  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1940 15:21:50.646505  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1941 15:21:50.650431  MTRR: Fixed MSR 0x258 0x0606060606060606

 1942 15:21:50.653155  MTRR: Fixed MSR 0x259 0x0000000000000000

 1943 15:21:50.656711  MTRR: Fixed MSR 0x268 0x0606060606060606

 1944 15:21:50.663330  MTRR: Fixed MSR 0x269 0x0606060606060606

 1945 15:21:50.666567  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1946 15:21:50.670316  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1947 15:21:50.673312  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1948 15:21:50.680051  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1949 15:21:50.683408  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1950 15:21:50.686333  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1951 15:21:50.689765  call enable_fixed_mtrr()

 1952 15:21:50.693093  call enable_fixed_mtrr()

 1953 15:21:50.696309  CPU physical address size: 39 bits

 1954 15:21:50.699687  CPU physical address size: 39 bits

 1955 15:21:50.703299  MTRR: Fixed MSR 0x250 0x0606060606060606

 1956 15:21:50.706233  MTRR: Fixed MSR 0x250 0x0606060606060606

 1957 15:21:50.712807  MTRR: Fixed MSR 0x258 0x0606060606060606

 1958 15:21:50.715988  MTRR: Fixed MSR 0x259 0x0000000000000000

 1959 15:21:50.720024  MTRR: Fixed MSR 0x268 0x0606060606060606

 1960 15:21:50.723218  MTRR: Fixed MSR 0x269 0x0606060606060606

 1961 15:21:50.729144  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1962 15:21:50.732943  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1963 15:21:50.736083  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1964 15:21:50.739658  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1965 15:21:50.746081  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1966 15:21:50.749726  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1967 15:21:50.752537  MTRR: Fixed MSR 0x258 0x0606060606060606

 1968 15:21:50.755793  call enable_fixed_mtrr()

 1969 15:21:50.759422  MTRR: Fixed MSR 0x259 0x0000000000000000

 1970 15:21:50.762963  MTRR: Fixed MSR 0x268 0x0606060606060606

 1971 15:21:50.768905  MTRR: Fixed MSR 0x269 0x0606060606060606

 1972 15:21:50.772394  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1973 15:21:50.775679  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1974 15:21:50.778850  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1975 15:21:50.785671  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1976 15:21:50.789409  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1977 15:21:50.792117  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1978 15:21:50.796149  CPU physical address size: 39 bits

 1979 15:21:50.799448  call enable_fixed_mtrr()

 1980 15:21:50.802676  CBFS @ c08000 size 3f8000

 1981 15:21:50.808666  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1982 15:21:50.811910  CBFS: Locating 'fallback/payload'

 1983 15:21:50.815264  CPU physical address size: 39 bits

 1984 15:21:50.818620  CBFS: Found @ offset 1c96c0 size 3f798

 1985 15:21:50.822108  Checking segment from ROM address 0xffdd16f8

 1986 15:21:50.828914  Checking segment from ROM address 0xffdd1714

 1987 15:21:50.832017  Loading segment from ROM address 0xffdd16f8

 1988 15:21:50.835635    code (compression=0)

 1989 15:21:50.841969    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1990 15:21:50.851914  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1991 15:21:50.852534  it's not compressed!

 1992 15:21:50.945422  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1993 15:21:50.952385  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1994 15:21:50.955443  Loading segment from ROM address 0xffdd1714

 1995 15:21:50.959224    Entry Point 0x30000000

 1996 15:21:50.962444  Loaded segments

 1997 15:21:50.967814  Finalizing chipset.

 1998 15:21:50.971025  Finalizing SMM.

 1999 15:21:50.974325  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2000 15:21:50.977467  mp_park_aps done after 0 msecs.

 2001 15:21:50.984433  Jumping to boot code at 30000000(99b62000)

 2002 15:21:50.990752  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2003 15:21:50.991340  

 2004 15:21:50.991708  

 2005 15:21:50.992115  

 2006 15:21:50.993856  Starting depthcharge on Helios...

 2007 15:21:50.994426  

 2008 15:21:50.995590  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2009 15:21:50.996234  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2010 15:21:50.996709  Setting prompt string to ['hatch:']
 2011 15:21:50.997203  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2012 15:21:51.003607  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2013 15:21:51.004264  

 2014 15:21:51.010497  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2015 15:21:51.011075  

 2016 15:21:51.017025  board_setup: Info: eMMC controller not present; skipping

 2017 15:21:51.017581  

 2018 15:21:51.020525  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2019 15:21:51.020992  

 2020 15:21:51.027221  board_setup: Info: SDHCI controller not present; skipping

 2021 15:21:51.027791  

 2022 15:21:51.033921  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2023 15:21:51.034510  

 2024 15:21:51.034875  Wipe memory regions:

 2025 15:21:51.035211  

 2026 15:21:51.036538  	[0x00000000001000, 0x000000000a0000)

 2027 15:21:51.037001  

 2028 15:21:51.043381  	[0x00000000100000, 0x00000030000000)

 2029 15:21:51.106666  

 2030 15:21:51.109774  	[0x00000030657430, 0x00000099a2c000)

 2031 15:21:51.247333  

 2032 15:21:51.250297  	[0x00000100000000, 0x0000045e800000)

 2033 15:21:52.632514  

 2034 15:21:52.633081  R8152: Initializing

 2035 15:21:52.633446  

 2036 15:21:52.635807  Version 9 (ocp_data = 6010)

 2037 15:21:52.640363  

 2038 15:21:52.640928  R8152: Done initializing

 2039 15:21:52.641294  

 2040 15:21:52.643111  Adding net device

 2041 15:21:53.252518  

 2042 15:21:53.252674  R8152: Initializing

 2043 15:21:53.252738  

 2044 15:21:53.255783  Version 6 (ocp_data = 5c30)

 2045 15:21:53.255872  

 2046 15:21:53.259171  R8152: Done initializing

 2047 15:21:53.259280  

 2048 15:21:53.262283  net_add_device: Attemp to include the same device

 2049 15:21:53.265804  

 2050 15:21:53.272859  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2051 15:21:53.272984  

 2052 15:21:53.273048  

 2053 15:21:53.273106  

 2054 15:21:53.273385  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2056 15:21:53.373717  hatch: tftpboot 192.168.201.1 10660931/tftp-deploy-2k4w2qw7/kernel/bzImage 10660931/tftp-deploy-2k4w2qw7/kernel/cmdline 10660931/tftp-deploy-2k4w2qw7/ramdisk/ramdisk.cpio.gz

 2057 15:21:53.373873  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2058 15:21:53.373962  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2059 15:21:53.378479  tftpboot 192.168.201.1 10660931/tftp-deploy-2k4w2qw7/kernel/bzIploy-2k4w2qw7/kernel/cmdline 10660931/tftp-deploy-2k4w2qw7/ramdisk/ramdisk.cpio.gz

 2060 15:21:53.378564  

 2061 15:21:53.378626  Waiting for link

 2062 15:21:53.579576  

 2063 15:21:53.579713  done.

 2064 15:21:53.579778  

 2065 15:21:53.579838  MAC: 00:24:32:50:1a:5f

 2066 15:21:53.579906  

 2067 15:21:53.582546  Sending DHCP discover... done.

 2068 15:21:53.582629  

 2069 15:21:53.585822  Waiting for reply... done.

 2070 15:21:53.585904  

 2071 15:21:53.589156  Sending DHCP request... done.

 2072 15:21:53.589257  

 2073 15:21:53.595795  Waiting for reply... done.

 2074 15:21:53.595918  

 2075 15:21:53.595984  My ip is 192.168.201.21

 2076 15:21:53.596065  

 2077 15:21:53.598963  The DHCP server ip is 192.168.201.1

 2078 15:21:53.602594  

 2079 15:21:53.605553  TFTP server IP predefined by user: 192.168.201.1

 2080 15:21:53.605660  

 2081 15:21:53.612389  Bootfile predefined by user: 10660931/tftp-deploy-2k4w2qw7/kernel/bzImage

 2082 15:21:53.612471  

 2083 15:21:53.615651  Sending tftp read request... done.

 2084 15:21:53.615724  

 2085 15:21:53.619206  Waiting for the transfer... 

 2086 15:21:53.622039  

 2087 15:21:54.196359  00000000 ################################################################

 2088 15:21:54.196510  

 2089 15:21:54.765188  00080000 ################################################################

 2090 15:21:54.765339  

 2091 15:21:55.343550  00100000 ################################################################

 2092 15:21:55.343702  

 2093 15:21:55.926177  00180000 ################################################################

 2094 15:21:55.926327  

 2095 15:21:56.507710  00200000 ################################################################

 2096 15:21:56.507919  

 2097 15:21:57.062919  00280000 ################################################################

 2098 15:21:57.063076  

 2099 15:21:57.616699  00300000 ################################################################

 2100 15:21:57.616850  

 2101 15:21:58.155224  00380000 ################################################################

 2102 15:21:58.155375  

 2103 15:21:58.729177  00400000 ################################################################

 2104 15:21:58.729338  

 2105 15:21:59.294144  00480000 ################################################################

 2106 15:21:59.294412  

 2107 15:21:59.889399  00500000 ################################################################

 2108 15:21:59.889590  

 2109 15:22:00.469256  00580000 ################################################################

 2110 15:22:00.469418  

 2111 15:22:01.050178  00600000 ################################################################

 2112 15:22:01.050341  

 2113 15:22:01.647582  00680000 ################################################################

 2114 15:22:01.647756  

 2115 15:22:02.234075  00700000 ################################################################

 2116 15:22:02.234251  

 2117 15:22:02.813752  00780000 ################################################################

 2118 15:22:02.813914  

 2119 15:22:03.384124  00800000 ################################################################

 2120 15:22:03.384289  

 2121 15:22:03.959499  00880000 ################################################################

 2122 15:22:03.959658  

 2123 15:22:04.528025  00900000 ################################################################

 2124 15:22:04.528192  

 2125 15:22:05.085783  00980000 ################################################################

 2126 15:22:05.085942  

 2127 15:22:05.473317  00a00000 ############################################## done.

 2128 15:22:05.473490  

 2129 15:22:05.476853  The bootfile was 10858496 bytes long.

 2130 15:22:05.477015  

 2131 15:22:05.480105  Sending tftp read request... done.

 2132 15:22:05.480254  

 2133 15:22:05.483205  Waiting for the transfer... 

 2134 15:22:05.483319  

 2135 15:22:06.014345  00000000 ################################################################

 2136 15:22:06.014523  

 2137 15:22:06.580776  00080000 ################################################################

 2138 15:22:06.580975  

 2139 15:22:07.133287  00100000 ################################################################

 2140 15:22:07.133474  

 2141 15:22:07.730295  00180000 ################################################################

 2142 15:22:07.730745  

 2143 15:22:08.371191  00200000 ################################################################

 2144 15:22:08.371345  

 2145 15:22:08.983035  00280000 ################################################################

 2146 15:22:08.983184  

 2147 15:22:09.555175  00300000 ################################################################

 2148 15:22:09.555641  

 2149 15:22:10.217227  00380000 ################################################################

 2150 15:22:10.217738  

 2151 15:22:10.898415  00400000 ################################################################

 2152 15:22:10.898938  

 2153 15:22:11.568043  00480000 ################################################################

 2154 15:22:11.568545  

 2155 15:22:12.254115  00500000 ################################################################

 2156 15:22:12.254667  

 2157 15:22:12.932181  00580000 ################################################################

 2158 15:22:12.932332  

 2159 15:22:13.064116  00600000 ############## done.

 2160 15:22:13.064231  

 2161 15:22:13.067729  Sending tftp read request... done.

 2162 15:22:13.067850  

 2163 15:22:13.071288  Waiting for the transfer... 

 2164 15:22:13.071380  

 2165 15:22:13.071454  00000000 # done.

 2166 15:22:13.071525  

 2167 15:22:13.080898  Command line loaded dynamically from TFTP file: 10660931/tftp-deploy-2k4w2qw7/kernel/cmdline

 2168 15:22:13.081073  

 2169 15:22:13.104347  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10660931/extract-nfsrootfs-_oxgu3g4,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2170 15:22:13.104604  

 2171 15:22:13.110783  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2172 15:22:13.115028  

 2173 15:22:13.118783  Shutting down all USB controllers.

 2174 15:22:13.119157  

 2175 15:22:13.119395  Removing current net device

 2176 15:22:13.126061  

 2177 15:22:13.126616  Finalizing coreboot

 2178 15:22:13.126987  

 2179 15:22:13.133073  Exiting depthcharge with code 4 at timestamp: 29497207

 2180 15:22:13.133640  

 2181 15:22:13.134009  

 2182 15:22:13.134394  Starting kernel ...

 2183 15:22:13.134738  

 2184 15:22:13.135063  

 2185 15:22:13.136417  end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
 2186 15:22:13.137150  start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
 2187 15:22:13.137757  Setting prompt string to ['Linux version [0-9]']
 2188 15:22:13.138171  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2189 15:22:13.138553  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2191 15:26:33.137385  end: 2.2.5 auto-login-action (duration 00:04:20) [common]
 2193 15:26:33.137588  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
 2195 15:26:33.137750  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2198 15:26:33.138012  end: 2 depthcharge-action (duration 00:05:00) [common]
 2200 15:26:33.138230  Cleaning after the job
 2201 15:26:33.138317  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/ramdisk
 2202 15:26:33.139196  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/kernel
 2203 15:26:33.140486  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/nfsrootfs
 2204 15:26:33.227570  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10660931/tftp-deploy-2k4w2qw7/modules
 2205 15:26:33.228280  start: 4.1 power-off (timeout 00:00:30) [common]
 2206 15:26:33.228454  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2207 15:26:33.303154  >> Command sent successfully.

 2208 15:26:33.305543  Returned 0 in 0 seconds
 2209 15:26:33.405916  end: 4.1 power-off (duration 00:00:00) [common]
 2211 15:26:33.406233  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2212 15:26:33.406481  Listened to connection for namespace 'common' for up to 1s
 2214 15:26:33.406855  Listened to connection for namespace 'common' for up to 1s
 2215 15:26:34.407810  Finalising connection for namespace 'common'
 2216 15:26:34.408546  Disconnecting from shell: Finalise
 2217 15:26:34.408938  
 2218 15:26:34.510067  end: 4.2 read-feedback (duration 00:00:01) [common]
 2219 15:26:34.510684  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10660931
 2220 15:26:34.909949  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10660931
 2221 15:26:34.910146  JobError: Your job cannot terminate cleanly.