Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:57:27.746696 lava-dispatcher, installed at version: 2023.05.1
2 11:57:27.746900 start: 0 validate
3 11:57:27.747027 Start time: 2023-06-23 11:57:27.747020+00:00 (UTC)
4 11:57:27.747157 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:57:27.747281 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230609.0%2Fx86%2Frootfs.cpio.gz exists
6 11:57:28.008540 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:57:28.009431 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:57:28.280990 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:57:28.282035 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:57:28.549057 validate duration: 0.80
12 11:57:28.549355 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:57:28.549452 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:57:28.549541 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:57:28.549662 Not decompressing ramdisk as can be used compressed.
16 11:57:28.549744 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230609.0/x86/rootfs.cpio.gz
17 11:57:28.549807 saving as /var/lib/lava/dispatcher/tmp/10875926/tftp-deploy-5c9hrqzm/ramdisk/rootfs.cpio.gz
18 11:57:28.549886 total size: 8435745 (8MB)
19 11:57:28.551655 progress 0% (0MB)
20 11:57:28.554007 progress 5% (0MB)
21 11:57:28.556634 progress 10% (0MB)
22 11:57:28.559252 progress 15% (1MB)
23 11:57:28.561858 progress 20% (1MB)
24 11:57:28.564543 progress 25% (2MB)
25 11:57:28.567191 progress 30% (2MB)
26 11:57:28.569815 progress 35% (2MB)
27 11:57:28.572310 progress 40% (3MB)
28 11:57:28.574974 progress 45% (3MB)
29 11:57:28.577519 progress 50% (4MB)
30 11:57:28.579929 progress 55% (4MB)
31 11:57:28.582067 progress 60% (4MB)
32 11:57:28.584256 progress 65% (5MB)
33 11:57:28.586394 progress 70% (5MB)
34 11:57:28.588526 progress 75% (6MB)
35 11:57:28.590496 progress 80% (6MB)
36 11:57:28.592669 progress 85% (6MB)
37 11:57:28.594798 progress 90% (7MB)
38 11:57:28.596944 progress 95% (7MB)
39 11:57:28.599088 progress 100% (8MB)
40 11:57:28.599246 8MB downloaded in 0.05s (163.00MB/s)
41 11:57:28.599393 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:57:28.599679 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:57:28.599766 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:57:28.599849 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:57:28.599975 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:57:28.600045 saving as /var/lib/lava/dispatcher/tmp/10875926/tftp-deploy-5c9hrqzm/kernel/bzImage
48 11:57:28.600105 total size: 10859008 (10MB)
49 11:57:28.600163 No compression specified
50 11:57:28.601337 progress 0% (0MB)
51 11:57:28.604310 progress 5% (0MB)
52 11:57:28.607130 progress 10% (1MB)
53 11:57:28.609830 progress 15% (1MB)
54 11:57:28.612762 progress 20% (2MB)
55 11:57:28.615403 progress 25% (2MB)
56 11:57:28.618245 progress 30% (3MB)
57 11:57:28.621008 progress 35% (3MB)
58 11:57:28.623909 progress 40% (4MB)
59 11:57:28.626760 progress 45% (4MB)
60 11:57:28.629438 progress 50% (5MB)
61 11:57:28.632279 progress 55% (5MB)
62 11:57:28.634932 progress 60% (6MB)
63 11:57:28.637746 progress 65% (6MB)
64 11:57:28.640397 progress 70% (7MB)
65 11:57:28.643193 progress 75% (7MB)
66 11:57:28.646013 progress 80% (8MB)
67 11:57:28.648694 progress 85% (8MB)
68 11:57:28.651475 progress 90% (9MB)
69 11:57:28.654117 progress 95% (9MB)
70 11:57:28.657062 progress 100% (10MB)
71 11:57:28.657218 10MB downloaded in 0.06s (181.33MB/s)
72 11:57:28.657359 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:57:28.657580 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:57:28.657668 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:57:28.657751 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:57:28.657874 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:57:28.657942 saving as /var/lib/lava/dispatcher/tmp/10875926/tftp-deploy-5c9hrqzm/modules/modules.tar
79 11:57:28.658002 total size: 483808 (0MB)
80 11:57:28.658061 Using unxz to decompress xz
81 11:57:28.661700 progress 6% (0MB)
82 11:57:28.662095 progress 13% (0MB)
83 11:57:28.662329 progress 20% (0MB)
84 11:57:28.663698 progress 27% (0MB)
85 11:57:28.665885 progress 33% (0MB)
86 11:57:28.668019 progress 40% (0MB)
87 11:57:28.670024 progress 47% (0MB)
88 11:57:28.671775 progress 54% (0MB)
89 11:57:28.674037 progress 60% (0MB)
90 11:57:28.676455 progress 67% (0MB)
91 11:57:28.678533 progress 74% (0MB)
92 11:57:28.680486 progress 81% (0MB)
93 11:57:28.682501 progress 88% (0MB)
94 11:57:28.684583 progress 94% (0MB)
95 11:57:28.686501 progress 100% (0MB)
96 11:57:28.692453 0MB downloaded in 0.03s (13.40MB/s)
97 11:57:28.692700 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:57:28.692962 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:57:28.693053 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 11:57:28.693145 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 11:57:28.693225 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:57:28.693305 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 11:57:28.693523 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3
105 11:57:28.693649 makedir: /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin
106 11:57:28.693748 makedir: /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/tests
107 11:57:28.693843 makedir: /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/results
108 11:57:28.693954 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-add-keys
109 11:57:28.694091 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-add-sources
110 11:57:28.694221 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-background-process-start
111 11:57:28.694347 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-background-process-stop
112 11:57:28.694466 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-common-functions
113 11:57:28.694583 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-echo-ipv4
114 11:57:28.694704 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-install-packages
115 11:57:28.694823 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-installed-packages
116 11:57:28.694946 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-os-build
117 11:57:28.695063 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-probe-channel
118 11:57:28.695180 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-probe-ip
119 11:57:28.695296 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-target-ip
120 11:57:28.695412 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-target-mac
121 11:57:28.695528 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-target-storage
122 11:57:28.695725 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-test-case
123 11:57:28.695844 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-test-event
124 11:57:28.695961 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-test-feedback
125 11:57:28.696079 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-test-raise
126 11:57:28.696199 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-test-reference
127 11:57:28.696321 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-test-runner
128 11:57:28.696440 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-test-set
129 11:57:28.696559 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-test-shell
130 11:57:28.696679 Updating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-install-packages (oe)
131 11:57:28.696822 Updating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/bin/lava-installed-packages (oe)
132 11:57:28.696945 Creating /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/environment
133 11:57:28.697070 LAVA metadata
134 11:57:28.697144 - LAVA_JOB_ID=10875926
135 11:57:28.697211 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:57:28.697307 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 11:57:28.697375 skipped lava-vland-overlay
138 11:57:28.697448 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:57:28.697533 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 11:57:28.697596 skipped lava-multinode-overlay
141 11:57:28.697690 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:57:28.697771 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 11:57:28.697845 Loading test definitions
144 11:57:28.697932 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 11:57:28.698008 Using /lava-10875926 at stage 0
146 11:57:28.698314 uuid=10875926_1.4.2.3.1 testdef=None
147 11:57:28.698401 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:57:28.698490 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 11:57:28.699039 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:57:28.699255 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 11:57:28.699958 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:57:28.700201 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 11:57:28.700815 runner path: /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/0/tests/0_dmesg test_uuid 10875926_1.4.2.3.1
156 11:57:28.700964 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:57:28.701185 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 11:57:28.701263 Using /lava-10875926 at stage 1
160 11:57:28.701550 uuid=10875926_1.4.2.3.5 testdef=None
161 11:57:28.701645 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 11:57:28.701731 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 11:57:28.702208 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 11:57:28.702556 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 11:57:28.703234 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 11:57:28.703460 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 11:57:28.704125 runner path: /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/1/tests/1_bootrr test_uuid 10875926_1.4.2.3.5
170 11:57:28.704270 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 11:57:28.704491 Creating lava-test-runner.conf files
173 11:57:28.704553 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/0 for stage 0
174 11:57:28.704639 - 0_dmesg
175 11:57:28.704715 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10875926/lava-overlay-gystmwz3/lava-10875926/1 for stage 1
176 11:57:28.704800 - 1_bootrr
177 11:57:28.704890 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 11:57:28.704997 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 11:57:28.713782 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 11:57:28.713885 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 11:57:28.713969 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 11:57:28.714051 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 11:57:28.714133 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 11:57:28.956237 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 11:57:28.956605 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 11:57:28.956726 extracting modules file /var/lib/lava/dispatcher/tmp/10875926/tftp-deploy-5c9hrqzm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875926/extract-overlay-ramdisk-0gwho51g/ramdisk
187 11:57:28.978343 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 11:57:28.978498 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 11:57:28.978624 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10875926/compress-overlay-h3km2pgs/overlay-1.4.2.4.tar.gz to ramdisk
190 11:57:28.978722 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10875926/compress-overlay-h3km2pgs/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10875926/extract-overlay-ramdisk-0gwho51g/ramdisk
191 11:57:28.987461 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 11:57:28.987639 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 11:57:28.987734 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 11:57:28.987822 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 11:57:28.987900 Building ramdisk /var/lib/lava/dispatcher/tmp/10875926/extract-overlay-ramdisk-0gwho51g/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10875926/extract-overlay-ramdisk-0gwho51g/ramdisk
196 11:57:29.116578 >> 53980 blocks
197 11:57:30.016325 rename /var/lib/lava/dispatcher/tmp/10875926/extract-overlay-ramdisk-0gwho51g/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10875926/tftp-deploy-5c9hrqzm/ramdisk/ramdisk.cpio.gz
198 11:57:30.016758 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 11:57:30.016887 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
200 11:57:30.016990 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
201 11:57:30.017084 No mkimage arch provided, not using FIT.
202 11:57:30.017171 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 11:57:30.017254 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 11:57:30.017356 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 11:57:30.017446 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
206 11:57:30.017527 No LXC device requested
207 11:57:30.017608 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 11:57:30.017696 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
209 11:57:30.017779 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 11:57:30.017851 Checking files for TFTP limit of 4294967296 bytes.
211 11:57:30.018251 end: 1 tftp-deploy (duration 00:00:01) [common]
212 11:57:30.018353 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 11:57:30.018443 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 11:57:30.018564 substitutions:
215 11:57:30.018629 - {DTB}: None
216 11:57:30.018693 - {INITRD}: 10875926/tftp-deploy-5c9hrqzm/ramdisk/ramdisk.cpio.gz
217 11:57:30.018756 - {KERNEL}: 10875926/tftp-deploy-5c9hrqzm/kernel/bzImage
218 11:57:30.018813 - {LAVA_MAC}: None
219 11:57:30.018868 - {PRESEED_CONFIG}: None
220 11:57:30.018923 - {PRESEED_LOCAL}: None
221 11:57:30.018977 - {RAMDISK}: 10875926/tftp-deploy-5c9hrqzm/ramdisk/ramdisk.cpio.gz
222 11:57:30.019031 - {ROOT_PART}: None
223 11:57:30.019084 - {ROOT}: None
224 11:57:30.019137 - {SERVER_IP}: 192.168.201.1
225 11:57:30.019194 - {TEE}: None
226 11:57:30.019247 Parsed boot commands:
227 11:57:30.019299 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 11:57:30.019463 Parsed boot commands: tftpboot 192.168.201.1 10875926/tftp-deploy-5c9hrqzm/kernel/bzImage 10875926/tftp-deploy-5c9hrqzm/kernel/cmdline 10875926/tftp-deploy-5c9hrqzm/ramdisk/ramdisk.cpio.gz
229 11:57:30.019576 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 11:57:30.019666 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 11:57:30.019758 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 11:57:30.019861 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 11:57:30.019930 Not connected, no need to disconnect.
234 11:57:30.020002 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 11:57:30.020081 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 11:57:30.020150 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
237 11:57:30.023487 Setting prompt string to ['lava-test: # ']
238 11:57:30.023837 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 11:57:30.023943 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 11:57:30.024043 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 11:57:30.024137 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 11:57:30.024325 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
243 11:57:35.166782 >> Command sent successfully.
244 11:57:35.173235 Returned 0 in 5 seconds
245 11:57:35.273914 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 11:57:35.275324 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 11:57:35.275986 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 11:57:35.276488 Setting prompt string to 'Starting depthcharge on Helios...'
250 11:57:35.276863 Changing prompt to 'Starting depthcharge on Helios...'
251 11:57:35.277235 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 11:57:35.278523 [Enter `^Ec?' for help]
253 11:57:35.890841
254 11:57:35.891379
255 11:57:35.901134 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 11:57:35.904019 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 11:57:35.911044 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 11:57:35.913993 CPU: AES supported, TXT NOT supported, VT supported
259 11:57:35.921089 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 11:57:35.924173 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 11:57:35.930917 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 11:57:35.934187 VBOOT: Loading verstage.
263 11:57:35.937792 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 11:57:35.944234 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 11:57:35.947453 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 11:57:35.950763 CBFS @ c08000 size 3f8000
267 11:57:35.957432 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 11:57:35.960945 CBFS: Locating 'fallback/verstage'
269 11:57:35.964032 CBFS: Found @ offset 10fb80 size 1072c
270 11:57:35.967015
271 11:57:35.967089
272 11:57:35.977263 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 11:57:35.991085 Probing TPM: . done!
274 11:57:35.994744 TPM ready after 0 ms
275 11:57:35.997853 Connected to device vid:did:rid of 1ae0:0028:00
276 11:57:36.008642 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
277 11:57:36.011761 Initialized TPM device CR50 revision 0
278 11:57:36.059041 tlcl_send_startup: Startup return code is 0
279 11:57:36.059557 TPM: setup succeeded
280 11:57:36.071906 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 11:57:36.075380 Chrome EC: UHEPI supported
282 11:57:36.079177 Phase 1
283 11:57:36.082273 FMAP: area GBB found @ c05000 (12288 bytes)
284 11:57:36.089282 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 11:57:36.089823 Phase 2
286 11:57:36.092126 Phase 3
287 11:57:36.095742 FMAP: area GBB found @ c05000 (12288 bytes)
288 11:57:36.101989 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 11:57:36.109009 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 11:57:36.112670 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 11:57:36.118893 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 11:57:36.134209 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 11:57:36.137605 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 11:57:36.144089 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 11:57:36.148063 Phase 4
296 11:57:36.151401 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 11:57:36.158307 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 11:57:36.337747 VB2:vb2_rsa_verify_digest() Digest check failed!
299 11:57:36.344813 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 11:57:36.345381 Saving nvdata
301 11:57:36.347771 Reboot requested (10020007)
302 11:57:36.350563 board_reset() called!
303 11:57:36.350948 full_reset() called!
304 11:57:40.858176
305 11:57:40.858686
306 11:57:40.867971 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 11:57:40.871305 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 11:57:40.878145 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 11:57:40.881199 CPU: AES supported, TXT NOT supported, VT supported
310 11:57:40.887784 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 11:57:40.891148 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 11:57:40.897857 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 11:57:40.901271 VBOOT: Loading verstage.
314 11:57:40.904507 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 11:57:40.911232 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 11:57:40.917526 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 11:57:40.917976 CBFS @ c08000 size 3f8000
318 11:57:40.924096 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 11:57:40.927957 CBFS: Locating 'fallback/verstage'
320 11:57:40.930775 CBFS: Found @ offset 10fb80 size 1072c
321 11:57:40.934767
322 11:57:40.935215
323 11:57:40.944622 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 11:57:40.959134 Probing TPM: . done!
325 11:57:40.962364 TPM ready after 0 ms
326 11:57:40.966072 Connected to device vid:did:rid of 1ae0:0028:00
327 11:57:40.976232 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 11:57:40.979388 Initialized TPM device CR50 revision 0
329 11:57:41.026810 tlcl_send_startup: Startup return code is 0
330 11:57:41.027261 TPM: setup succeeded
331 11:57:41.039297 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 11:57:41.043039 Chrome EC: UHEPI supported
333 11:57:41.046145 Phase 1
334 11:57:41.049885 FMAP: area GBB found @ c05000 (12288 bytes)
335 11:57:41.056314 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 11:57:41.062700 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 11:57:41.066459 Recovery requested (1009000e)
338 11:57:41.072276 Saving nvdata
339 11:57:41.078386 tlcl_extend: response is 0
340 11:57:41.086947 tlcl_extend: response is 0
341 11:57:41.094279 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 11:57:41.097182 CBFS @ c08000 size 3f8000
343 11:57:41.103760 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 11:57:41.107347 CBFS: Locating 'fallback/romstage'
345 11:57:41.110505 CBFS: Found @ offset 80 size 145fc
346 11:57:41.114224 Accumulated console time in verstage 98 ms
347 11:57:41.114810
348 11:57:41.115182
349 11:57:41.127076 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 11:57:41.133560 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 11:57:41.137028 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 11:57:41.140117 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 11:57:41.146974 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 11:57:41.150134 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 11:57:41.153368 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 11:57:41.156994 TCO_STS: 0000 0000
357 11:57:41.160217 GEN_PMCON: e0015238 00000200
358 11:57:41.163232 GBLRST_CAUSE: 00000000 00000000
359 11:57:41.163693 prev_sleep_state 5
360 11:57:41.166685 Boot Count incremented to 65205
361 11:57:41.173624 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 11:57:41.177110 CBFS @ c08000 size 3f8000
363 11:57:41.183219 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 11:57:41.183700 CBFS: Locating 'fspm.bin'
365 11:57:41.189941 CBFS: Found @ offset 5ffc0 size 71000
366 11:57:41.193010 Chrome EC: UHEPI supported
367 11:57:41.199863 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 11:57:41.203288 Probing TPM: done!
369 11:57:41.210014 Connected to device vid:did:rid of 1ae0:0028:00
370 11:57:41.219669 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
371 11:57:41.226038 Initialized TPM device CR50 revision 0
372 11:57:41.235395 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 11:57:41.241573 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 11:57:41.244768 MRC cache found, size 1948
375 11:57:41.248128 bootmode is set to: 2
376 11:57:41.251361 PRMRR disabled by config.
377 11:57:41.254952 SPD INDEX = 1
378 11:57:41.258321 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 11:57:41.261553 CBFS @ c08000 size 3f8000
380 11:57:41.267908 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 11:57:41.268348 CBFS: Locating 'spd.bin'
382 11:57:41.271719 CBFS: Found @ offset 5fb80 size 400
383 11:57:41.275050 SPD: module type is LPDDR3
384 11:57:41.277901 SPD: module part is
385 11:57:41.284843 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 11:57:41.287969 SPD: device width 4 bits, bus width 8 bits
387 11:57:41.291260 SPD: module size is 4096 MB (per channel)
388 11:57:41.294763 memory slot: 0 configuration done.
389 11:57:41.297876 memory slot: 2 configuration done.
390 11:57:41.348905 CBMEM:
391 11:57:41.352479 IMD: root @ 99fff000 254 entries.
392 11:57:41.355466 IMD: root @ 99ffec00 62 entries.
393 11:57:41.358888 External stage cache:
394 11:57:41.362162 IMD: root @ 9abff000 254 entries.
395 11:57:41.365167 IMD: root @ 9abfec00 62 entries.
396 11:57:41.368463 Chrome EC: clear events_b mask to 0x0000000020004000
397 11:57:41.385214 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 11:57:41.398348 tlcl_write: response is 0
399 11:57:41.406911 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 11:57:41.414020 MRC: TPM MRC hash updated successfully.
401 11:57:41.414112 2 DIMMs found
402 11:57:41.416993 SMM Memory Map
403 11:57:41.420927 SMRAM : 0x9a000000 0x1000000
404 11:57:41.423818 Subregion 0: 0x9a000000 0xa00000
405 11:57:41.426984 Subregion 1: 0x9aa00000 0x200000
406 11:57:41.430731 Subregion 2: 0x9ac00000 0x400000
407 11:57:41.433728 top_of_ram = 0x9a000000
408 11:57:41.437538 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 11:57:41.444098 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 11:57:41.447296 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 11:57:41.453888 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 11:57:41.457236 CBFS @ c08000 size 3f8000
413 11:57:41.460826 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 11:57:41.463883 CBFS: Locating 'fallback/postcar'
415 11:57:41.467378 CBFS: Found @ offset 107000 size 4b44
416 11:57:41.473963 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 11:57:41.486448 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 11:57:41.489861 Processing 180 relocs. Offset value of 0x97c0c000
419 11:57:41.498263 Accumulated console time in romstage 286 ms
420 11:57:41.498795
421 11:57:41.499468
422 11:57:41.507864 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 11:57:41.514521 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 11:57:41.518242 CBFS @ c08000 size 3f8000
425 11:57:41.521293 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 11:57:41.528137 CBFS: Locating 'fallback/ramstage'
427 11:57:41.531173 CBFS: Found @ offset 43380 size 1b9e8
428 11:57:41.537893 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 11:57:41.569832 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 11:57:41.573434 Processing 3976 relocs. Offset value of 0x98db0000
431 11:57:41.579633 Accumulated console time in postcar 52 ms
432 11:57:41.580096
433 11:57:41.580436
434 11:57:41.589643 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 11:57:41.596563 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 11:57:41.599338 WARNING: RO_VPD is uninitialized or empty.
437 11:57:41.602869 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 11:57:41.609463 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 11:57:41.609898 Normal boot.
440 11:57:41.615972 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 11:57:41.619646 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 11:57:41.623335 CBFS @ c08000 size 3f8000
443 11:57:41.629345 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 11:57:41.632922 CBFS: Locating 'cpu_microcode_blob.bin'
445 11:57:41.636005 CBFS: Found @ offset 14700 size 2ec00
446 11:57:41.639664 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 11:57:41.642823 Skip microcode update
448 11:57:41.649342 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 11:57:41.649915 CBFS @ c08000 size 3f8000
450 11:57:41.655883 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 11:57:41.659128 CBFS: Locating 'fsps.bin'
452 11:57:41.662673 CBFS: Found @ offset d1fc0 size 35000
453 11:57:41.688460 Detected 4 core, 8 thread CPU.
454 11:57:41.691493 Setting up SMI for CPU
455 11:57:41.694730 IED base = 0x9ac00000
456 11:57:41.695306 IED size = 0x00400000
457 11:57:41.697955 Will perform SMM setup.
458 11:57:41.704381 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 11:57:41.711338 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 11:57:41.714224 Processing 16 relocs. Offset value of 0x00030000
461 11:57:41.718224 Attempting to start 7 APs
462 11:57:41.721299 Waiting for 10ms after sending INIT.
463 11:57:41.737686 Waiting for 1st SIPI to complete...done.
464 11:57:41.738192 AP: slot 4 apic_id 2.
465 11:57:41.741516 AP: slot 5 apic_id 3.
466 11:57:41.744451 AP: slot 7 apic_id 4.
467 11:57:41.744890 AP: slot 6 apic_id 5.
468 11:57:41.747496 AP: slot 3 apic_id 6.
469 11:57:41.751055 AP: slot 2 apic_id 7.
470 11:57:41.751495 AP: slot 1 apic_id 1.
471 11:57:41.757986 Waiting for 2nd SIPI to complete...done.
472 11:57:41.764593 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 11:57:41.767827 Processing 13 relocs. Offset value of 0x00038000
474 11:57:41.774738 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 11:57:41.777740 Installing SMM handler to 0x9a000000
476 11:57:41.787710 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 11:57:41.791375 Processing 658 relocs. Offset value of 0x9a010000
478 11:57:41.801187 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 11:57:41.804689 Processing 13 relocs. Offset value of 0x9a008000
480 11:57:41.811098 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 11:57:41.817711 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 11:57:41.820811 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 11:57:41.827351 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 11:57:41.834559 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 11:57:41.840781 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 11:57:41.844410 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 11:57:41.851286 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 11:57:41.854123 Clearing SMI status registers
489 11:57:41.857943 SMI_STS: PM1
490 11:57:41.858379 PM1_STS: PWRBTN
491 11:57:41.860731 TCO_STS: SECOND_TO
492 11:57:41.864114 New SMBASE 0x9a000000
493 11:57:41.864557 In relocation handler: CPU 0
494 11:57:41.870713 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 11:57:41.874309 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 11:57:41.877341 Relocation complete.
497 11:57:41.877780 New SMBASE 0x99fffc00
498 11:57:41.880756 In relocation handler: CPU 1
499 11:57:41.884595 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
500 11:57:41.891135 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 11:57:41.894172 Relocation complete.
502 11:57:41.894606 New SMBASE 0x99fff800
503 11:57:41.897725 In relocation handler: CPU 2
504 11:57:41.901459 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
505 11:57:41.907564 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 11:57:41.910775 Relocation complete.
507 11:57:41.911271 New SMBASE 0x99fff400
508 11:57:41.914027 In relocation handler: CPU 3
509 11:57:41.917530 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
510 11:57:41.923989 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 11:57:41.924433 Relocation complete.
512 11:57:41.927361 New SMBASE 0x99ffec00
513 11:57:41.931038 In relocation handler: CPU 5
514 11:57:41.934170 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
515 11:57:41.941152 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 11:57:41.941704 Relocation complete.
517 11:57:41.944058 New SMBASE 0x99fff000
518 11:57:41.947712 In relocation handler: CPU 4
519 11:57:41.950801 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
520 11:57:41.957440 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 11:57:41.957878 Relocation complete.
522 11:57:41.960293 New SMBASE 0x99ffe800
523 11:57:41.964003 In relocation handler: CPU 6
524 11:57:41.967063 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
525 11:57:41.973688 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 11:57:41.974198 Relocation complete.
527 11:57:41.977296 New SMBASE 0x99ffe400
528 11:57:41.980254 In relocation handler: CPU 7
529 11:57:41.984196 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
530 11:57:41.990492 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 11:57:41.991128 Relocation complete.
532 11:57:41.993716 Initializing CPU #0
533 11:57:41.996796 CPU: vendor Intel device 806ec
534 11:57:42.000378 CPU: family 06, model 8e, stepping 0c
535 11:57:42.003631 Clearing out pending MCEs
536 11:57:42.007025 Setting up local APIC...
537 11:57:42.007484 apic_id: 0x00 done.
538 11:57:42.010508 Turbo is available but hidden
539 11:57:42.013960 Turbo is available and visible
540 11:57:42.017173 VMX status: enabled
541 11:57:42.020342 IA32_FEATURE_CONTROL status: locked
542 11:57:42.020889 Skip microcode update
543 11:57:42.023626 CPU #0 initialized
544 11:57:42.026675 Initializing CPU #1
545 11:57:42.027237 Initializing CPU #7
546 11:57:42.030206 Initializing CPU #6
547 11:57:42.033611 Initializing CPU #2
548 11:57:42.034057 Initializing CPU #3
549 11:57:42.036801 CPU: vendor Intel device 806ec
550 11:57:42.040529 CPU: family 06, model 8e, stepping 0c
551 11:57:42.043420 CPU: vendor Intel device 806ec
552 11:57:42.046987 CPU: family 06, model 8e, stepping 0c
553 11:57:42.050201 Clearing out pending MCEs
554 11:57:42.053812 Clearing out pending MCEs
555 11:57:42.056889 Setting up local APIC...
556 11:57:42.057340 Initializing CPU #4
557 11:57:42.059997 Initializing CPU #5
558 11:57:42.063558 CPU: vendor Intel device 806ec
559 11:57:42.066641 CPU: family 06, model 8e, stepping 0c
560 11:57:42.070380 CPU: vendor Intel device 806ec
561 11:57:42.073341 CPU: family 06, model 8e, stepping 0c
562 11:57:42.076723 Clearing out pending MCEs
563 11:57:42.079793 Clearing out pending MCEs
564 11:57:42.080223 Setting up local APIC...
565 11:57:42.083487 CPU: vendor Intel device 806ec
566 11:57:42.086624 CPU: family 06, model 8e, stepping 0c
567 11:57:42.090218 CPU: vendor Intel device 806ec
568 11:57:42.096757 CPU: family 06, model 8e, stepping 0c
569 11:57:42.097189 Clearing out pending MCEs
570 11:57:42.099683 Clearing out pending MCEs
571 11:57:42.103169 Setting up local APIC...
572 11:57:42.106525 CPU: vendor Intel device 806ec
573 11:57:42.109569 CPU: family 06, model 8e, stepping 0c
574 11:57:42.113261 Clearing out pending MCEs
575 11:57:42.116287 Setting up local APIC...
576 11:57:42.116766 Setting up local APIC...
577 11:57:42.119914 Setting up local APIC...
578 11:57:42.122806 apic_id: 0x02 done.
579 11:57:42.123232 apic_id: 0x03 done.
580 11:57:42.126387 VMX status: enabled
581 11:57:42.129811 VMX status: enabled
582 11:57:42.133100 IA32_FEATURE_CONTROL status: locked
583 11:57:42.136287 IA32_FEATURE_CONTROL status: locked
584 11:57:42.136773 Skip microcode update
585 11:57:42.139675 Skip microcode update
586 11:57:42.142945 CPU #4 initialized
587 11:57:42.143373 CPU #5 initialized
588 11:57:42.146687 apic_id: 0x07 done.
589 11:57:42.149930 Setting up local APIC...
590 11:57:42.150459 apic_id: 0x01 done.
591 11:57:42.153130 apic_id: 0x05 done.
592 11:57:42.156501 apic_id: 0x04 done.
593 11:57:42.156935 VMX status: enabled
594 11:57:42.159757 VMX status: enabled
595 11:57:42.163054 IA32_FEATURE_CONTROL status: locked
596 11:57:42.166243 IA32_FEATURE_CONTROL status: locked
597 11:57:42.169828 Skip microcode update
598 11:57:42.170382 Skip microcode update
599 11:57:42.172957 CPU #6 initialized
600 11:57:42.176485 CPU #7 initialized
601 11:57:42.176916 VMX status: enabled
602 11:57:42.179679 apic_id: 0x06 done.
603 11:57:42.182975 IA32_FEATURE_CONTROL status: locked
604 11:57:42.183405 VMX status: enabled
605 11:57:42.187050 Skip microcode update
606 11:57:42.189873 IA32_FEATURE_CONTROL status: locked
607 11:57:42.192870 CPU #2 initialized
608 11:57:42.196257 Skip microcode update
609 11:57:42.196685 VMX status: enabled
610 11:57:42.199631 CPU #3 initialized
611 11:57:42.202887 IA32_FEATURE_CONTROL status: locked
612 11:57:42.203383 Skip microcode update
613 11:57:42.206726 CPU #1 initialized
614 11:57:42.209702 bsp_do_flight_plan done after 452 msecs.
615 11:57:42.213157 CPU: frequency set to 4200 MHz
616 11:57:42.216005 Enabling SMIs.
617 11:57:42.216431 Locking SMM.
618 11:57:42.231405 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 11:57:42.234767 CBFS @ c08000 size 3f8000
620 11:57:42.241276 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 11:57:42.241857 CBFS: Locating 'vbt.bin'
622 11:57:42.244538 CBFS: Found @ offset 5f5c0 size 499
623 11:57:42.251338 Found a VBT of 4608 bytes after decompression
624 11:57:42.437212 Display FSP Version Info HOB
625 11:57:42.440176 Reference Code - CPU = 9.0.1e.30
626 11:57:42.443658 uCode Version = 0.0.0.ca
627 11:57:42.446949 TXT ACM version = ff.ff.ff.ffff
628 11:57:42.450156 Display FSP Version Info HOB
629 11:57:42.453576 Reference Code - ME = 9.0.1e.30
630 11:57:42.456455 MEBx version = 0.0.0.0
631 11:57:42.460345 ME Firmware Version = Consumer SKU
632 11:57:42.463269 Display FSP Version Info HOB
633 11:57:42.466475 Reference Code - CML PCH = 9.0.1e.30
634 11:57:42.470127 PCH-CRID Status = Disabled
635 11:57:42.473342 PCH-CRID Original Value = ff.ff.ff.ffff
636 11:57:42.476372 PCH-CRID New Value = ff.ff.ff.ffff
637 11:57:42.479886 OPROM - RST - RAID = ff.ff.ff.ffff
638 11:57:42.483052 ChipsetInit Base Version = ff.ff.ff.ffff
639 11:57:42.486782 ChipsetInit Oem Version = ff.ff.ff.ffff
640 11:57:42.489820 Display FSP Version Info HOB
641 11:57:42.496302 Reference Code - SA - System Agent = 9.0.1e.30
642 11:57:42.499864 Reference Code - MRC = 0.7.1.6c
643 11:57:42.500312 SA - PCIe Version = 9.0.1e.30
644 11:57:42.502943 SA-CRID Status = Disabled
645 11:57:42.506545 SA-CRID Original Value = 0.0.0.c
646 11:57:42.510179 SA-CRID New Value = 0.0.0.c
647 11:57:42.513165 OPROM - VBIOS = ff.ff.ff.ffff
648 11:57:42.513615 RTC Init
649 11:57:42.520372 Set power on after power failure.
650 11:57:42.520815 Disabling Deep S3
651 11:57:42.523179 Disabling Deep S3
652 11:57:42.523262 Disabling Deep S4
653 11:57:42.526426 Disabling Deep S4
654 11:57:42.526517 Disabling Deep S5
655 11:57:42.529441 Disabling Deep S5
656 11:57:42.536045 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
657 11:57:42.536137 Enumerating buses...
658 11:57:42.543411 Show all devs... Before device enumeration.
659 11:57:42.543520 Root Device: enabled 1
660 11:57:42.546465 CPU_CLUSTER: 0: enabled 1
661 11:57:42.549906 DOMAIN: 0000: enabled 1
662 11:57:42.550049 APIC: 00: enabled 1
663 11:57:42.552968 PCI: 00:00.0: enabled 1
664 11:57:42.556434 PCI: 00:02.0: enabled 1
665 11:57:42.559280 PCI: 00:04.0: enabled 0
666 11:57:42.559384 PCI: 00:05.0: enabled 0
667 11:57:42.562828 PCI: 00:12.0: enabled 1
668 11:57:42.566327 PCI: 00:12.5: enabled 0
669 11:57:42.569287 PCI: 00:12.6: enabled 0
670 11:57:42.569415 PCI: 00:14.0: enabled 1
671 11:57:42.572798 PCI: 00:14.1: enabled 0
672 11:57:42.575845 PCI: 00:14.3: enabled 1
673 11:57:42.579338 PCI: 00:14.5: enabled 0
674 11:57:42.579422 PCI: 00:15.0: enabled 1
675 11:57:42.582522 PCI: 00:15.1: enabled 1
676 11:57:42.586063 PCI: 00:15.2: enabled 0
677 11:57:42.586160 PCI: 00:15.3: enabled 0
678 11:57:42.589076 PCI: 00:16.0: enabled 1
679 11:57:42.593200 PCI: 00:16.1: enabled 0
680 11:57:42.596297 PCI: 00:16.2: enabled 0
681 11:57:42.596731 PCI: 00:16.3: enabled 0
682 11:57:42.599644 PCI: 00:16.4: enabled 0
683 11:57:42.603169 PCI: 00:16.5: enabled 0
684 11:57:42.606155 PCI: 00:17.0: enabled 1
685 11:57:42.606591 PCI: 00:19.0: enabled 1
686 11:57:42.609605 PCI: 00:19.1: enabled 0
687 11:57:42.612763 PCI: 00:19.2: enabled 0
688 11:57:42.616216 PCI: 00:1a.0: enabled 0
689 11:57:42.616651 PCI: 00:1c.0: enabled 0
690 11:57:42.619336 PCI: 00:1c.1: enabled 0
691 11:57:42.622884 PCI: 00:1c.2: enabled 0
692 11:57:42.625762 PCI: 00:1c.3: enabled 0
693 11:57:42.626213 PCI: 00:1c.4: enabled 0
694 11:57:42.629462 PCI: 00:1c.5: enabled 0
695 11:57:42.632578 PCI: 00:1c.6: enabled 0
696 11:57:42.633011 PCI: 00:1c.7: enabled 0
697 11:57:42.636061 PCI: 00:1d.0: enabled 1
698 11:57:42.639168 PCI: 00:1d.1: enabled 0
699 11:57:42.642748 PCI: 00:1d.2: enabled 0
700 11:57:42.643182 PCI: 00:1d.3: enabled 0
701 11:57:42.645779 PCI: 00:1d.4: enabled 0
702 11:57:42.649356 PCI: 00:1d.5: enabled 1
703 11:57:42.652379 PCI: 00:1e.0: enabled 1
704 11:57:42.652815 PCI: 00:1e.1: enabled 0
705 11:57:42.656158 PCI: 00:1e.2: enabled 1
706 11:57:42.658938 PCI: 00:1e.3: enabled 1
707 11:57:42.662703 PCI: 00:1f.0: enabled 1
708 11:57:42.663190 PCI: 00:1f.1: enabled 1
709 11:57:42.665815 PCI: 00:1f.2: enabled 1
710 11:57:42.668948 PCI: 00:1f.3: enabled 1
711 11:57:42.669381 PCI: 00:1f.4: enabled 1
712 11:57:42.672099 PCI: 00:1f.5: enabled 1
713 11:57:42.675546 PCI: 00:1f.6: enabled 0
714 11:57:42.678979 USB0 port 0: enabled 1
715 11:57:42.679411 I2C: 00:15: enabled 1
716 11:57:42.682115 I2C: 00:5d: enabled 1
717 11:57:42.685591 GENERIC: 0.0: enabled 1
718 11:57:42.686031 I2C: 00:1a: enabled 1
719 11:57:42.689185 I2C: 00:38: enabled 1
720 11:57:42.692111 I2C: 00:39: enabled 1
721 11:57:42.692546 I2C: 00:3a: enabled 1
722 11:57:42.695462 I2C: 00:3b: enabled 1
723 11:57:42.699057 PCI: 00:00.0: enabled 1
724 11:57:42.699491 SPI: 00: enabled 1
725 11:57:42.702603 SPI: 01: enabled 1
726 11:57:42.705541 PNP: 0c09.0: enabled 1
727 11:57:42.705978 USB2 port 0: enabled 1
728 11:57:42.708712 USB2 port 1: enabled 1
729 11:57:42.712565 USB2 port 2: enabled 0
730 11:57:42.715352 USB2 port 3: enabled 0
731 11:57:42.715829 USB2 port 5: enabled 0
732 11:57:42.718926 USB2 port 6: enabled 1
733 11:57:42.722056 USB2 port 9: enabled 1
734 11:57:42.722490 USB3 port 0: enabled 1
735 11:57:42.725263 USB3 port 1: enabled 1
736 11:57:42.728730 USB3 port 2: enabled 1
737 11:57:42.729165 USB3 port 3: enabled 1
738 11:57:42.732024 USB3 port 4: enabled 0
739 11:57:42.735519 APIC: 01: enabled 1
740 11:57:42.736000 APIC: 07: enabled 1
741 11:57:42.738897 APIC: 06: enabled 1
742 11:57:42.741943 APIC: 02: enabled 1
743 11:57:42.742376 APIC: 03: enabled 1
744 11:57:42.745752 APIC: 05: enabled 1
745 11:57:42.746183 APIC: 04: enabled 1
746 11:57:42.748485 Compare with tree...
747 11:57:42.752125 Root Device: enabled 1
748 11:57:42.755200 CPU_CLUSTER: 0: enabled 1
749 11:57:42.755658 APIC: 00: enabled 1
750 11:57:42.758791 APIC: 01: enabled 1
751 11:57:42.761829 APIC: 07: enabled 1
752 11:57:42.762265 APIC: 06: enabled 1
753 11:57:42.765760 APIC: 02: enabled 1
754 11:57:42.769088 APIC: 03: enabled 1
755 11:57:42.769529 APIC: 05: enabled 1
756 11:57:42.771991 APIC: 04: enabled 1
757 11:57:42.775280 DOMAIN: 0000: enabled 1
758 11:57:42.778364 PCI: 00:00.0: enabled 1
759 11:57:42.778802 PCI: 00:02.0: enabled 1
760 11:57:42.781668 PCI: 00:04.0: enabled 0
761 11:57:42.785305 PCI: 00:05.0: enabled 0
762 11:57:42.788599 PCI: 00:12.0: enabled 1
763 11:57:42.791665 PCI: 00:12.5: enabled 0
764 11:57:42.792104 PCI: 00:12.6: enabled 0
765 11:57:42.795034 PCI: 00:14.0: enabled 1
766 11:57:42.798670 USB0 port 0: enabled 1
767 11:57:42.801681 USB2 port 0: enabled 1
768 11:57:42.804839 USB2 port 1: enabled 1
769 11:57:42.805275 USB2 port 2: enabled 0
770 11:57:42.808305 USB2 port 3: enabled 0
771 11:57:42.811503 USB2 port 5: enabled 0
772 11:57:42.814997 USB2 port 6: enabled 1
773 11:57:42.818054 USB2 port 9: enabled 1
774 11:57:42.821479 USB3 port 0: enabled 1
775 11:57:42.821914 USB3 port 1: enabled 1
776 11:57:42.824649 USB3 port 2: enabled 1
777 11:57:42.828303 USB3 port 3: enabled 1
778 11:57:42.831330 USB3 port 4: enabled 0
779 11:57:42.834936 PCI: 00:14.1: enabled 0
780 11:57:42.835392 PCI: 00:14.3: enabled 1
781 11:57:42.837965 PCI: 00:14.5: enabled 0
782 11:57:42.841420 PCI: 00:15.0: enabled 1
783 11:57:42.844534 I2C: 00:15: enabled 1
784 11:57:42.847941 PCI: 00:15.1: enabled 1
785 11:57:42.848370 I2C: 00:5d: enabled 1
786 11:57:42.851679 GENERIC: 0.0: enabled 1
787 11:57:42.854623 PCI: 00:15.2: enabled 0
788 11:57:42.857877 PCI: 00:15.3: enabled 0
789 11:57:42.861126 PCI: 00:16.0: enabled 1
790 11:57:42.861555 PCI: 00:16.1: enabled 0
791 11:57:42.864790 PCI: 00:16.2: enabled 0
792 11:57:42.867821 PCI: 00:16.3: enabled 0
793 11:57:42.870901 PCI: 00:16.4: enabled 0
794 11:57:42.874423 PCI: 00:16.5: enabled 0
795 11:57:42.874870 PCI: 00:17.0: enabled 1
796 11:57:42.877586 PCI: 00:19.0: enabled 1
797 11:57:42.880923 I2C: 00:1a: enabled 1
798 11:57:42.884853 I2C: 00:38: enabled 1
799 11:57:42.885384 I2C: 00:39: enabled 1
800 11:57:42.887671 I2C: 00:3a: enabled 1
801 11:57:42.891081 I2C: 00:3b: enabled 1
802 11:57:42.894157 PCI: 00:19.1: enabled 0
803 11:57:42.897525 PCI: 00:19.2: enabled 0
804 11:57:42.897979 PCI: 00:1a.0: enabled 0
805 11:57:42.901199 PCI: 00:1c.0: enabled 0
806 11:57:42.904086 PCI: 00:1c.1: enabled 0
807 11:57:42.907216 PCI: 00:1c.2: enabled 0
808 11:57:42.907694 PCI: 00:1c.3: enabled 0
809 11:57:42.910791 PCI: 00:1c.4: enabled 0
810 11:57:42.914088 PCI: 00:1c.5: enabled 0
811 11:57:42.917418 PCI: 00:1c.6: enabled 0
812 11:57:42.920767 PCI: 00:1c.7: enabled 0
813 11:57:42.921261 PCI: 00:1d.0: enabled 1
814 11:57:42.924263 PCI: 00:1d.1: enabled 0
815 11:57:42.927471 PCI: 00:1d.2: enabled 0
816 11:57:42.930786 PCI: 00:1d.3: enabled 0
817 11:57:42.933962 PCI: 00:1d.4: enabled 0
818 11:57:42.934388 PCI: 00:1d.5: enabled 1
819 11:57:42.937504 PCI: 00:00.0: enabled 1
820 11:57:42.940483 PCI: 00:1e.0: enabled 1
821 11:57:42.943906 PCI: 00:1e.1: enabled 0
822 11:57:42.947541 PCI: 00:1e.2: enabled 1
823 11:57:42.947992 SPI: 00: enabled 1
824 11:57:42.950571 PCI: 00:1e.3: enabled 1
825 11:57:42.954474 SPI: 01: enabled 1
826 11:57:42.957520 PCI: 00:1f.0: enabled 1
827 11:57:42.958104 PNP: 0c09.0: enabled 1
828 11:57:42.960722 PCI: 00:1f.1: enabled 1
829 11:57:42.964161 PCI: 00:1f.2: enabled 1
830 11:57:42.967202 PCI: 00:1f.3: enabled 1
831 11:57:42.967669 PCI: 00:1f.4: enabled 1
832 11:57:42.970891 PCI: 00:1f.5: enabled 1
833 11:57:42.973940 PCI: 00:1f.6: enabled 0
834 11:57:42.977348 Root Device scanning...
835 11:57:42.980681 scan_static_bus for Root Device
836 11:57:42.983971 CPU_CLUSTER: 0 enabled
837 11:57:42.984417 DOMAIN: 0000 enabled
838 11:57:42.987410 DOMAIN: 0000 scanning...
839 11:57:42.990501 PCI: pci_scan_bus for bus 00
840 11:57:42.993711 PCI: 00:00.0 [8086/0000] ops
841 11:57:42.997047 PCI: 00:00.0 [8086/9b61] enabled
842 11:57:43.000451 PCI: 00:02.0 [8086/0000] bus ops
843 11:57:43.003979 PCI: 00:02.0 [8086/9b41] enabled
844 11:57:43.007641 PCI: 00:04.0 [8086/1903] disabled
845 11:57:43.010655 PCI: 00:08.0 [8086/1911] enabled
846 11:57:43.013589 PCI: 00:12.0 [8086/02f9] enabled
847 11:57:43.017502 PCI: 00:14.0 [8086/0000] bus ops
848 11:57:43.020389 PCI: 00:14.0 [8086/02ed] enabled
849 11:57:43.023865 PCI: 00:14.2 [8086/02ef] enabled
850 11:57:43.026903 PCI: 00:14.3 [8086/02f0] enabled
851 11:57:43.030431 PCI: 00:15.0 [8086/0000] bus ops
852 11:57:43.033777 PCI: 00:15.0 [8086/02e8] enabled
853 11:57:43.036767 PCI: 00:15.1 [8086/0000] bus ops
854 11:57:43.040130 PCI: 00:15.1 [8086/02e9] enabled
855 11:57:43.043744 PCI: 00:16.0 [8086/0000] ops
856 11:57:43.046756 PCI: 00:16.0 [8086/02e0] enabled
857 11:57:43.050221 PCI: 00:17.0 [8086/0000] ops
858 11:57:43.053596 PCI: 00:17.0 [8086/02d3] enabled
859 11:57:43.056722 PCI: 00:19.0 [8086/0000] bus ops
860 11:57:43.060335 PCI: 00:19.0 [8086/02c5] enabled
861 11:57:43.063250 PCI: 00:1d.0 [8086/0000] bus ops
862 11:57:43.067020 PCI: 00:1d.0 [8086/02b0] enabled
863 11:57:43.069924 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 11:57:43.073734 PCI: 00:1e.0 [8086/0000] ops
865 11:57:43.076885 PCI: 00:1e.0 [8086/02a8] enabled
866 11:57:43.079935 PCI: 00:1e.2 [8086/0000] bus ops
867 11:57:43.083629 PCI: 00:1e.2 [8086/02aa] enabled
868 11:57:43.087182 PCI: 00:1e.3 [8086/0000] bus ops
869 11:57:43.090075 PCI: 00:1e.3 [8086/02ab] enabled
870 11:57:43.093557 PCI: 00:1f.0 [8086/0000] bus ops
871 11:57:43.096518 PCI: 00:1f.0 [8086/0284] enabled
872 11:57:43.103031 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 11:57:43.109718 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 11:57:43.113392 PCI: 00:1f.3 [8086/0000] bus ops
875 11:57:43.116376 PCI: 00:1f.3 [8086/02c8] enabled
876 11:57:43.119474 PCI: 00:1f.4 [8086/0000] bus ops
877 11:57:43.123145 PCI: 00:1f.4 [8086/02a3] enabled
878 11:57:43.126450 PCI: 00:1f.5 [8086/0000] bus ops
879 11:57:43.129337 PCI: 00:1f.5 [8086/02a4] enabled
880 11:57:43.133003 PCI: Leftover static devices:
881 11:57:43.133116 PCI: 00:05.0
882 11:57:43.133205 PCI: 00:12.5
883 11:57:43.136085 PCI: 00:12.6
884 11:57:43.136209 PCI: 00:14.1
885 11:57:43.139795 PCI: 00:14.5
886 11:57:43.139919 PCI: 00:15.2
887 11:57:43.140016 PCI: 00:15.3
888 11:57:43.142745 PCI: 00:16.1
889 11:57:43.142883 PCI: 00:16.2
890 11:57:43.146101 PCI: 00:16.3
891 11:57:43.146256 PCI: 00:16.4
892 11:57:43.149504 PCI: 00:16.5
893 11:57:43.149659 PCI: 00:19.1
894 11:57:43.149781 PCI: 00:19.2
895 11:57:43.152917 PCI: 00:1a.0
896 11:57:43.153093 PCI: 00:1c.0
897 11:57:43.156705 PCI: 00:1c.1
898 11:57:43.156911 PCI: 00:1c.2
899 11:57:43.157072 PCI: 00:1c.3
900 11:57:43.159896 PCI: 00:1c.4
901 11:57:43.159979 PCI: 00:1c.5
902 11:57:43.162646 PCI: 00:1c.6
903 11:57:43.162729 PCI: 00:1c.7
904 11:57:43.162793 PCI: 00:1d.1
905 11:57:43.166190 PCI: 00:1d.2
906 11:57:43.166273 PCI: 00:1d.3
907 11:57:43.169425 PCI: 00:1d.4
908 11:57:43.169508 PCI: 00:1d.5
909 11:57:43.169574 PCI: 00:1e.1
910 11:57:43.172899 PCI: 00:1f.1
911 11:57:43.172986 PCI: 00:1f.2
912 11:57:43.175974 PCI: 00:1f.6
913 11:57:43.179068 PCI: Check your devicetree.cb.
914 11:57:43.179170 PCI: 00:02.0 scanning...
915 11:57:43.186171 scan_generic_bus for PCI: 00:02.0
916 11:57:43.189132 scan_generic_bus for PCI: 00:02.0 done
917 11:57:43.192650 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
918 11:57:43.195722 PCI: 00:14.0 scanning...
919 11:57:43.199298 scan_static_bus for PCI: 00:14.0
920 11:57:43.202420 USB0 port 0 enabled
921 11:57:43.205991 USB0 port 0 scanning...
922 11:57:43.209436 scan_static_bus for USB0 port 0
923 11:57:43.209511 USB2 port 0 enabled
924 11:57:43.212679 USB2 port 1 enabled
925 11:57:43.215791 USB2 port 2 disabled
926 11:57:43.215868 USB2 port 3 disabled
927 11:57:43.219021 USB2 port 5 disabled
928 11:57:43.219146 USB2 port 6 enabled
929 11:57:43.222704 USB2 port 9 enabled
930 11:57:43.225891 USB3 port 0 enabled
931 11:57:43.226001 USB3 port 1 enabled
932 11:57:43.228867 USB3 port 2 enabled
933 11:57:43.232362 USB3 port 3 enabled
934 11:57:43.232467 USB3 port 4 disabled
935 11:57:43.235864 USB2 port 0 scanning...
936 11:57:43.239044 scan_static_bus for USB2 port 0
937 11:57:43.242515 scan_static_bus for USB2 port 0 done
938 11:57:43.248804 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
939 11:57:43.248881 USB2 port 1 scanning...
940 11:57:43.252759 scan_static_bus for USB2 port 1
941 11:57:43.259068 scan_static_bus for USB2 port 1 done
942 11:57:43.262316 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
943 11:57:43.265811 USB2 port 6 scanning...
944 11:57:43.269071 scan_static_bus for USB2 port 6
945 11:57:43.272446 scan_static_bus for USB2 port 6 done
946 11:57:43.278653 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
947 11:57:43.278791 USB2 port 9 scanning...
948 11:57:43.282191 scan_static_bus for USB2 port 9
949 11:57:43.289093 scan_static_bus for USB2 port 9 done
950 11:57:43.292653 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
951 11:57:43.295796 USB3 port 0 scanning...
952 11:57:43.298893 scan_static_bus for USB3 port 0
953 11:57:43.302536 scan_static_bus for USB3 port 0 done
954 11:57:43.309090 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
955 11:57:43.309478 USB3 port 1 scanning...
956 11:57:43.312882 scan_static_bus for USB3 port 1
957 11:57:43.319615 scan_static_bus for USB3 port 1 done
958 11:57:43.322785 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
959 11:57:43.325867 USB3 port 2 scanning...
960 11:57:43.329783 scan_static_bus for USB3 port 2
961 11:57:43.332460 scan_static_bus for USB3 port 2 done
962 11:57:43.339248 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
963 11:57:43.339731 USB3 port 3 scanning...
964 11:57:43.342768 scan_static_bus for USB3 port 3
965 11:57:43.349376 scan_static_bus for USB3 port 3 done
966 11:57:43.352417 scan_bus: scanning of bus USB3 port 3 took 9693 usecs
967 11:57:43.355707 scan_static_bus for USB0 port 0 done
968 11:57:43.362692 scan_bus: scanning of bus USB0 port 0 took 155331 usecs
969 11:57:43.366049 scan_static_bus for PCI: 00:14.0 done
970 11:57:43.372450 scan_bus: scanning of bus PCI: 00:14.0 took 172948 usecs
971 11:57:43.375532 PCI: 00:15.0 scanning...
972 11:57:43.379362 scan_generic_bus for PCI: 00:15.0
973 11:57:43.382422 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 11:57:43.386119 scan_generic_bus for PCI: 00:15.0 done
975 11:57:43.392548 scan_bus: scanning of bus PCI: 00:15.0 took 14288 usecs
976 11:57:43.395957 PCI: 00:15.1 scanning...
977 11:57:43.399106 scan_generic_bus for PCI: 00:15.1
978 11:57:43.402060 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 11:57:43.405505 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 11:57:43.409064 scan_generic_bus for PCI: 00:15.1 done
981 11:57:43.415998 scan_bus: scanning of bus PCI: 00:15.1 took 18604 usecs
982 11:57:43.419028 PCI: 00:19.0 scanning...
983 11:57:43.422413 scan_generic_bus for PCI: 00:19.0
984 11:57:43.425487 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 11:57:43.429278 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 11:57:43.435390 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 11:57:43.439380 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 11:57:43.441776 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 11:57:43.445738 scan_generic_bus for PCI: 00:19.0 done
990 11:57:43.452039 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
991 11:57:43.455702 PCI: 00:1d.0 scanning...
992 11:57:43.458759 do_pci_scan_bridge for PCI: 00:1d.0
993 11:57:43.462146 PCI: pci_scan_bus for bus 01
994 11:57:43.465397 PCI: 01:00.0 [1c5c/1327] enabled
995 11:57:43.468914 Enabling Common Clock Configuration
996 11:57:43.472104 L1 Sub-State supported from root port 29
997 11:57:43.475810 L1 Sub-State Support = 0xf
998 11:57:43.478767 CommonModeRestoreTime = 0x28
999 11:57:43.482021 Power On Value = 0x16, Power On Scale = 0x0
1000 11:57:43.485683 ASPM: Enabled L1
1001 11:57:43.488908 scan_bus: scanning of bus PCI: 00:1d.0 took 32780 usecs
1002 11:57:43.491793 PCI: 00:1e.2 scanning...
1003 11:57:43.495556 scan_generic_bus for PCI: 00:1e.2
1004 11:57:43.498498 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 11:57:43.505454 scan_generic_bus for PCI: 00:1e.2 done
1006 11:57:43.508892 scan_bus: scanning of bus PCI: 00:1e.2 took 14006 usecs
1007 11:57:43.511768 PCI: 00:1e.3 scanning...
1008 11:57:43.515316 scan_generic_bus for PCI: 00:1e.3
1009 11:57:43.518606 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 11:57:43.522001 scan_generic_bus for PCI: 00:1e.3 done
1011 11:57:43.528254 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1012 11:57:43.532123 PCI: 00:1f.0 scanning...
1013 11:57:43.535246 scan_static_bus for PCI: 00:1f.0
1014 11:57:43.538398 PNP: 0c09.0 enabled
1015 11:57:43.542161 scan_static_bus for PCI: 00:1f.0 done
1016 11:57:43.545005 scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs
1017 11:57:43.548531 PCI: 00:1f.3 scanning...
1018 11:57:43.554829 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1019 11:57:43.558306 PCI: 00:1f.4 scanning...
1020 11:57:43.561793 scan_generic_bus for PCI: 00:1f.4
1021 11:57:43.565427 scan_generic_bus for PCI: 00:1f.4 done
1022 11:57:43.571791 scan_bus: scanning of bus PCI: 00:1f.4 took 10175 usecs
1023 11:57:43.572220 PCI: 00:1f.5 scanning...
1024 11:57:43.578233 scan_generic_bus for PCI: 00:1f.5
1025 11:57:43.581875 scan_generic_bus for PCI: 00:1f.5 done
1026 11:57:43.584854 scan_bus: scanning of bus PCI: 00:1f.5 took 10181 usecs
1027 11:57:43.591512 scan_bus: scanning of bus DOMAIN: 0000 took 604855 usecs
1028 11:57:43.594674 scan_static_bus for Root Device done
1029 11:57:43.601204 scan_bus: scanning of bus Root Device took 624712 usecs
1030 11:57:43.601625 done
1031 11:57:43.604868 Chrome EC: UHEPI supported
1032 11:57:43.611329 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 11:57:43.617748 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 11:57:43.624590 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 11:57:43.631124 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 11:57:43.634586 SPI flash protection: WPSW=0 SRP0=0
1037 11:57:43.637836 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 11:57:43.644800 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1039 11:57:43.647672 found VGA at PCI: 00:02.0
1040 11:57:43.650697 Setting up VGA for PCI: 00:02.0
1041 11:57:43.654134 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 11:57:43.660895 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 11:57:43.661411 Allocating resources...
1044 11:57:43.664197 Reading resources...
1045 11:57:43.667304 Root Device read_resources bus 0 link: 0
1046 11:57:43.674040 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 11:57:43.677701 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 11:57:43.684086 DOMAIN: 0000 read_resources bus 0 link: 0
1049 11:57:43.687176 PCI: 00:14.0 read_resources bus 0 link: 0
1050 11:57:43.693892 USB0 port 0 read_resources bus 0 link: 0
1051 11:57:43.701124 USB0 port 0 read_resources bus 0 link: 0 done
1052 11:57:43.704145 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 11:57:43.711314 PCI: 00:15.0 read_resources bus 1 link: 0
1054 11:57:43.714891 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 11:57:43.721535 PCI: 00:15.1 read_resources bus 2 link: 0
1056 11:57:43.725008 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 11:57:43.732383 PCI: 00:19.0 read_resources bus 3 link: 0
1058 11:57:43.738595 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 11:57:43.742040 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 11:57:43.748717 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 11:57:43.752123 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 11:57:43.758622 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 11:57:43.761803 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 11:57:43.768303 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 11:57:43.771561 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 11:57:43.778110 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 11:57:43.784651 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 11:57:43.788255 Root Device read_resources bus 0 link: 0 done
1069 11:57:43.791799 Done reading resources.
1070 11:57:43.794822 Show resources in subtree (Root Device)...After reading.
1071 11:57:43.801612 Root Device child on link 0 CPU_CLUSTER: 0
1072 11:57:43.804899 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 11:57:43.804985 APIC: 00
1074 11:57:43.808131 APIC: 01
1075 11:57:43.808216 APIC: 07
1076 11:57:43.811844 APIC: 06
1077 11:57:43.811928 APIC: 02
1078 11:57:43.812013 APIC: 03
1079 11:57:43.815303 APIC: 05
1080 11:57:43.815388 APIC: 04
1081 11:57:43.818423 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 11:57:43.828412 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 11:57:43.877769 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 11:57:43.877871 PCI: 00:00.0
1085 11:57:43.878620 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 11:57:43.878887 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 11:57:43.879158 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 11:57:43.879246 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 11:57:43.910307 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 11:57:43.910602 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 11:57:43.910729 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 11:57:43.914095 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 11:57:43.923547 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 11:57:43.933900 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 11:57:43.943886 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 11:57:43.953600 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 11:57:43.963446 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 11:57:43.973733 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 11:57:43.979718 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 11:57:43.989919 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 11:57:43.993177 PCI: 00:02.0
1102 11:57:44.002872 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 11:57:44.012924 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 11:57:44.019843 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 11:57:44.022745 PCI: 00:04.0
1106 11:57:44.022858 PCI: 00:08.0
1107 11:57:44.033074 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 11:57:44.035931 PCI: 00:12.0
1109 11:57:44.045668 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 11:57:44.049234 PCI: 00:14.0 child on link 0 USB0 port 0
1111 11:57:44.059808 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 11:57:44.066061 USB0 port 0 child on link 0 USB2 port 0
1113 11:57:44.066492 USB2 port 0
1114 11:57:44.069679 USB2 port 1
1115 11:57:44.070108 USB2 port 2
1116 11:57:44.073173 USB2 port 3
1117 11:57:44.073701 USB2 port 5
1118 11:57:44.076141 USB2 port 6
1119 11:57:44.076569 USB2 port 9
1120 11:57:44.079413 USB3 port 0
1121 11:57:44.079873 USB3 port 1
1122 11:57:44.082962 USB3 port 2
1123 11:57:44.083463 USB3 port 3
1124 11:57:44.085879 USB3 port 4
1125 11:57:44.086306 PCI: 00:14.2
1126 11:57:44.096011 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 11:57:44.105833 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 11:57:44.109004 PCI: 00:14.3
1129 11:57:44.119221 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 11:57:44.122218 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 11:57:44.132171 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 11:57:44.135820 I2C: 01:15
1133 11:57:44.139140 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 11:57:44.149040 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 11:57:44.149468 I2C: 02:5d
1136 11:57:44.152560 GENERIC: 0.0
1137 11:57:44.152982 PCI: 00:16.0
1138 11:57:44.162030 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 11:57:44.165513 PCI: 00:17.0
1140 11:57:44.175476 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 11:57:44.182435 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 11:57:44.192155 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 11:57:44.198639 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 11:57:44.208755 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 11:57:44.218474 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 11:57:44.221770 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 11:57:44.232016 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 11:57:44.232476 I2C: 03:1a
1149 11:57:44.235087 I2C: 03:38
1150 11:57:44.235703 I2C: 03:39
1151 11:57:44.238509 I2C: 03:3a
1152 11:57:44.238990 I2C: 03:3b
1153 11:57:44.245240 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 11:57:44.251628 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 11:57:44.261377 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 11:57:44.271241 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 11:57:44.271770 PCI: 01:00.0
1158 11:57:44.281566 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 11:57:44.284534 PCI: 00:1e.0
1160 11:57:44.294592 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 11:57:44.304402 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 11:57:44.311303 PCI: 00:1e.2 child on link 0 SPI: 00
1163 11:57:44.321056 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 11:57:44.321482 SPI: 00
1165 11:57:44.324660 PCI: 00:1e.3 child on link 0 SPI: 01
1166 11:57:44.334780 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 11:57:44.335207 SPI: 01
1168 11:57:44.340869 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 11:57:44.347599 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 11:57:44.357583 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 11:57:44.361070 PNP: 0c09.0
1172 11:57:44.367566 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 11:57:44.371293 PCI: 00:1f.3
1174 11:57:44.381134 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 11:57:44.390802 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 11:57:44.391263 PCI: 00:1f.4
1177 11:57:44.400816 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 11:57:44.410725 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 11:57:44.411391 PCI: 00:1f.5
1180 11:57:44.420695 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 11:57:44.427333 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 11:57:44.434012 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 11:57:44.440387 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 11:57:44.443450 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 11:57:44.447121 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 11:57:44.450149 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 11:57:44.453763 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 11:57:44.460429 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 11:57:44.466906 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 11:57:44.476660 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 11:57:44.483163 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 11:57:44.489771 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 11:57:44.496432 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 11:57:44.503228 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 11:57:44.506682 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 11:57:44.513451 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 11:57:44.516314 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 11:57:44.523010 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 11:57:44.526581 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 11:57:44.533297 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 11:57:44.536360 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 11:57:44.543391 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 11:57:44.546229 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 11:57:44.552865 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 11:57:44.556344 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 11:57:44.562923 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 11:57:44.566397 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 11:57:44.572655 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 11:57:44.576251 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 11:57:44.579361 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 11:57:44.585906 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 11:57:44.589402 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 11:57:44.595915 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 11:57:44.599195 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 11:57:44.605918 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 11:57:44.608992 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 11:57:44.615719 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 11:57:44.622449 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 11:57:44.625546 avoid_fixed_resources: DOMAIN: 0000
1220 11:57:44.632309 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 11:57:44.639221 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 11:57:44.645288 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 11:57:44.655314 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 11:57:44.661907 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 11:57:44.668527 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 11:57:44.678754 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 11:57:44.685397 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 11:57:44.691748 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 11:57:44.698724 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 11:57:44.708458 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 11:57:44.715350 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 11:57:44.715816 Setting resources...
1233 11:57:44.722110 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 11:57:44.728845 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 11:57:44.731713 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 11:57:44.735249 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 11:57:44.738167 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 11:57:44.745204 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 11:57:44.751833 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 11:57:44.758480 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 11:57:44.764813 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 11:57:44.771497 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 11:57:44.774604 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 11:57:44.781266 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 11:57:44.784514 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 11:57:44.791492 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 11:57:44.794824 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 11:57:44.801522 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 11:57:44.804454 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 11:57:44.807970 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 11:57:44.814650 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 11:57:44.817797 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 11:57:44.824574 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 11:57:44.828133 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 11:57:44.834737 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 11:57:44.837960 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 11:57:44.844699 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 11:57:44.848044 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 11:57:44.854258 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 11:57:44.857930 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 11:57:44.864369 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 11:57:44.868072 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 11:57:44.874418 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 11:57:44.878051 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 11:57:44.884076 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 11:57:44.891020 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 11:57:44.900404 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 11:57:44.907068 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 11:57:44.910576 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 11:57:44.920328 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 11:57:44.923988 Root Device assign_resources, bus 0 link: 0
1272 11:57:44.926927 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 11:57:44.937070 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 11:57:44.944225 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 11:57:44.954240 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 11:57:44.960598 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 11:57:44.970609 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 11:57:44.977504 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 11:57:44.983901 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 11:57:44.986912 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 11:57:44.993560 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 11:57:45.003486 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 11:57:45.010735 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 11:57:45.020312 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 11:57:45.023723 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 11:57:45.030566 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 11:57:45.036776 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 11:57:45.043806 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 11:57:45.046621 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 11:57:45.053246 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 11:57:45.063438 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 11:57:45.070721 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 11:57:45.076842 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 11:57:45.086866 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 11:57:45.093430 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 11:57:45.100184 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 11:57:45.110114 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 11:57:45.113540 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 11:57:45.120306 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 11:57:45.127001 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 11:57:45.136693 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 11:57:45.146741 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 11:57:45.149886 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 11:57:45.156201 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 11:57:45.163428 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 11:57:45.169748 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 11:57:45.179591 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 11:57:45.182540 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 11:57:45.189578 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 11:57:45.195951 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 11:57:45.202559 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 11:57:45.206119 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 11:57:45.209291 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 11:57:45.216769 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 11:57:45.219706 LPC: Trying to open IO window from 800 size 1ff
1316 11:57:45.230192 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 11:57:45.236699 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 11:57:45.246308 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 11:57:45.252831 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 11:57:45.259431 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 11:57:45.262731 Root Device assign_resources, bus 0 link: 0
1322 11:57:45.266353 Done setting resources.
1323 11:57:45.272420 Show resources in subtree (Root Device)...After assigning values.
1324 11:57:45.275968 Root Device child on link 0 CPU_CLUSTER: 0
1325 11:57:45.279632 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 11:57:45.282563 APIC: 00
1327 11:57:45.282974 APIC: 01
1328 11:57:45.285779 APIC: 07
1329 11:57:45.286198 APIC: 06
1330 11:57:45.286589 APIC: 02
1331 11:57:45.289195 APIC: 03
1332 11:57:45.289720 APIC: 05
1333 11:57:45.290058 APIC: 04
1334 11:57:45.295961 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 11:57:45.305442 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 11:57:45.315533 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 11:57:45.318727 PCI: 00:00.0
1338 11:57:45.328369 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 11:57:45.335256 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 11:57:45.345265 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 11:57:45.354982 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 11:57:45.365013 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 11:57:45.374885 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 11:57:45.384895 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 11:57:45.391171 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 11:57:45.400917 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 11:57:45.410763 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 11:57:45.420309 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 11:57:45.430799 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 11:57:45.440483 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 11:57:45.450416 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 11:57:45.457083 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 11:57:45.466762 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 11:57:45.470391 PCI: 00:02.0
1355 11:57:45.480078 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 11:57:45.490290 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 11:57:45.500155 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 11:57:45.500586 PCI: 00:04.0
1359 11:57:45.503771 PCI: 00:08.0
1360 11:57:45.513252 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 11:57:45.513683 PCI: 00:12.0
1362 11:57:45.526742 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 11:57:45.529884 PCI: 00:14.0 child on link 0 USB0 port 0
1364 11:57:45.540176 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 11:57:45.543144 USB0 port 0 child on link 0 USB2 port 0
1366 11:57:45.546930 USB2 port 0
1367 11:57:45.547394 USB2 port 1
1368 11:57:45.549855 USB2 port 2
1369 11:57:45.550282 USB2 port 3
1370 11:57:45.553101 USB2 port 5
1371 11:57:45.553528 USB2 port 6
1372 11:57:45.556765 USB2 port 9
1373 11:57:45.559944 USB3 port 0
1374 11:57:45.560370 USB3 port 1
1375 11:57:45.563008 USB3 port 2
1376 11:57:45.563543 USB3 port 3
1377 11:57:45.566621 USB3 port 4
1378 11:57:45.567156 PCI: 00:14.2
1379 11:57:45.576496 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 11:57:45.586585 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 11:57:45.589394 PCI: 00:14.3
1382 11:57:45.599698 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 11:57:45.603070 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 11:57:45.612668 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 11:57:45.616058 I2C: 01:15
1386 11:57:45.619075 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 11:57:45.629265 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 11:57:45.632623 I2C: 02:5d
1389 11:57:45.632857 GENERIC: 0.0
1390 11:57:45.635487 PCI: 00:16.0
1391 11:57:45.645146 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 11:57:45.645230 PCI: 00:17.0
1393 11:57:45.658386 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 11:57:45.668491 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 11:57:45.675004 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 11:57:45.685015 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 11:57:45.694858 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 11:57:45.704660 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 11:57:45.708129 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 11:57:45.717936 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 11:57:45.721904 I2C: 03:1a
1402 11:57:45.722346 I2C: 03:38
1403 11:57:45.725167 I2C: 03:39
1404 11:57:45.725594 I2C: 03:3a
1405 11:57:45.728618 I2C: 03:3b
1406 11:57:45.731921 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 11:57:45.741814 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 11:57:45.751376 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 11:57:45.761283 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 11:57:45.764802 PCI: 01:00.0
1411 11:57:45.773885 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 11:57:45.773994 PCI: 00:1e.0
1413 11:57:45.787231 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 11:57:45.797265 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 11:57:45.800874 PCI: 00:1e.2 child on link 0 SPI: 00
1416 11:57:45.810399 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 11:57:45.810551 SPI: 00
1418 11:57:45.817380 PCI: 00:1e.3 child on link 0 SPI: 01
1419 11:57:45.826986 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 11:57:45.827100 SPI: 01
1421 11:57:45.830748 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 11:57:45.840705 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 11:57:45.850393 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 11:57:45.850632 PNP: 0c09.0
1425 11:57:45.860440 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 11:57:45.860883 PCI: 00:1f.3
1427 11:57:45.874144 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 11:57:45.883550 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 11:57:45.884010 PCI: 00:1f.4
1430 11:57:45.893156 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 11:57:45.903446 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 11:57:45.906513 PCI: 00:1f.5
1433 11:57:45.916794 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 11:57:45.919758 Done allocating resources.
1435 11:57:45.923257 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 11:57:45.926320 Enabling resources...
1437 11:57:45.929867 PCI: 00:00.0 subsystem <- 8086/9b61
1438 11:57:45.933180 PCI: 00:00.0 cmd <- 06
1439 11:57:45.936821 PCI: 00:02.0 subsystem <- 8086/9b41
1440 11:57:45.939839 PCI: 00:02.0 cmd <- 03
1441 11:57:45.943002 PCI: 00:08.0 cmd <- 06
1442 11:57:45.946443 PCI: 00:12.0 subsystem <- 8086/02f9
1443 11:57:45.949684 PCI: 00:12.0 cmd <- 02
1444 11:57:45.953058 PCI: 00:14.0 subsystem <- 8086/02ed
1445 11:57:45.955815 PCI: 00:14.0 cmd <- 02
1446 11:57:45.956471 PCI: 00:14.2 cmd <- 02
1447 11:57:45.962959 PCI: 00:14.3 subsystem <- 8086/02f0
1448 11:57:45.963510 PCI: 00:14.3 cmd <- 02
1449 11:57:45.966001 PCI: 00:15.0 subsystem <- 8086/02e8
1450 11:57:45.969534 PCI: 00:15.0 cmd <- 02
1451 11:57:45.972462 PCI: 00:15.1 subsystem <- 8086/02e9
1452 11:57:45.976017 PCI: 00:15.1 cmd <- 02
1453 11:57:45.978914 PCI: 00:16.0 subsystem <- 8086/02e0
1454 11:57:45.982381 PCI: 00:16.0 cmd <- 02
1455 11:57:45.985345 PCI: 00:17.0 subsystem <- 8086/02d3
1456 11:57:45.988863 PCI: 00:17.0 cmd <- 03
1457 11:57:45.991989 PCI: 00:19.0 subsystem <- 8086/02c5
1458 11:57:45.995390 PCI: 00:19.0 cmd <- 02
1459 11:57:45.998654 PCI: 00:1d.0 bridge ctrl <- 0013
1460 11:57:46.002265 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 11:57:46.005279 PCI: 00:1d.0 cmd <- 06
1462 11:57:46.008373 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 11:57:46.011984 PCI: 00:1e.0 cmd <- 06
1464 11:57:46.014952 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 11:57:46.015048 PCI: 00:1e.2 cmd <- 06
1466 11:57:46.022037 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 11:57:46.022135 PCI: 00:1e.3 cmd <- 02
1468 11:57:46.025664 PCI: 00:1f.0 subsystem <- 8086/0284
1469 11:57:46.028532 PCI: 00:1f.0 cmd <- 407
1470 11:57:46.032222 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 11:57:46.035136 PCI: 00:1f.3 cmd <- 02
1472 11:57:46.038794 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 11:57:46.041744 PCI: 00:1f.4 cmd <- 03
1474 11:57:46.045367 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 11:57:46.048296 PCI: 00:1f.5 cmd <- 406
1476 11:57:46.057460 PCI: 01:00.0 cmd <- 02
1477 11:57:46.062289 done.
1478 11:57:46.071233 ME: Version: 14.0.39.1367
1479 11:57:46.077552 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1480 11:57:46.080709 Initializing devices...
1481 11:57:46.080793 Root Device init ...
1482 11:57:46.087487 Chrome EC: Set SMI mask to 0x0000000000000000
1483 11:57:46.090544 Chrome EC: clear events_b mask to 0x0000000000000000
1484 11:57:46.097394 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 11:57:46.104327 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 11:57:46.110642 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 11:57:46.114128 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 11:57:46.117253 Root Device init finished in 35279 usecs
1489 11:57:46.120847 CPU_CLUSTER: 0 init ...
1490 11:57:46.127256 CPU_CLUSTER: 0 init finished in 2449 usecs
1491 11:57:46.131353 PCI: 00:00.0 init ...
1492 11:57:46.134872 CPU TDP: 15 Watts
1493 11:57:46.138545 CPU PL2 = 64 Watts
1494 11:57:46.141336 PCI: 00:00.0 init finished in 7074 usecs
1495 11:57:46.145172 PCI: 00:02.0 init ...
1496 11:57:46.148025 PCI: 00:02.0 init finished in 2245 usecs
1497 11:57:46.151570 PCI: 00:08.0 init ...
1498 11:57:46.154470 PCI: 00:08.0 init finished in 2253 usecs
1499 11:57:46.158019 PCI: 00:12.0 init ...
1500 11:57:46.161205 PCI: 00:12.0 init finished in 2252 usecs
1501 11:57:46.164555 PCI: 00:14.0 init ...
1502 11:57:46.167763 PCI: 00:14.0 init finished in 2253 usecs
1503 11:57:46.171421 PCI: 00:14.2 init ...
1504 11:57:46.174644 PCI: 00:14.2 init finished in 2253 usecs
1505 11:57:46.177729 PCI: 00:14.3 init ...
1506 11:57:46.181051 PCI: 00:14.3 init finished in 2260 usecs
1507 11:57:46.184578 PCI: 00:15.0 init ...
1508 11:57:46.187607 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 11:57:46.191089 PCI: 00:15.0 init finished in 5980 usecs
1510 11:57:46.194524 PCI: 00:15.1 init ...
1511 11:57:46.197522 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 11:57:46.203925 PCI: 00:15.1 init finished in 5979 usecs
1513 11:57:46.204008 PCI: 00:16.0 init ...
1514 11:57:46.210704 PCI: 00:16.0 init finished in 2253 usecs
1515 11:57:46.213986 PCI: 00:19.0 init ...
1516 11:57:46.217979 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 11:57:46.221011 PCI: 00:19.0 init finished in 5979 usecs
1518 11:57:46.224742 PCI: 00:1d.0 init ...
1519 11:57:46.227678 Initializing PCH PCIe bridge.
1520 11:57:46.230903 PCI: 00:1d.0 init finished in 5286 usecs
1521 11:57:46.234373 PCI: 00:1f.0 init ...
1522 11:57:46.237517 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 11:57:46.244164 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 11:57:46.244586 IOAPIC: ID = 0x02
1525 11:57:46.247412 IOAPIC: Dumping registers
1526 11:57:46.250675 reg 0x0000: 0x02000000
1527 11:57:46.254296 reg 0x0001: 0x00770020
1528 11:57:46.254716 reg 0x0002: 0x00000000
1529 11:57:46.260592 PCI: 00:1f.0 init finished in 23550 usecs
1530 11:57:46.263667 PCI: 00:1f.4 init ...
1531 11:57:46.267250 PCI: 00:1f.4 init finished in 2264 usecs
1532 11:57:46.278064 PCI: 01:00.0 init ...
1533 11:57:46.281041 PCI: 01:00.0 init finished in 2253 usecs
1534 11:57:46.285858 PNP: 0c09.0 init ...
1535 11:57:46.289040 Google Chrome EC uptime: 11.092 seconds
1536 11:57:46.295818 Google Chrome AP resets since EC boot: 0
1537 11:57:46.298835 Google Chrome most recent AP reset causes:
1538 11:57:46.305327 Google Chrome EC reset flags at last EC boot: reset-pin
1539 11:57:46.308928 PNP: 0c09.0 init finished in 20660 usecs
1540 11:57:46.312384 Devices initialized
1541 11:57:46.315470 Show all devs... After init.
1542 11:57:46.316035 Root Device: enabled 1
1543 11:57:46.318924 CPU_CLUSTER: 0: enabled 1
1544 11:57:46.322164 DOMAIN: 0000: enabled 1
1545 11:57:46.322779 APIC: 00: enabled 1
1546 11:57:46.325527 PCI: 00:00.0: enabled 1
1547 11:57:46.328807 PCI: 00:02.0: enabled 1
1548 11:57:46.332118 PCI: 00:04.0: enabled 0
1549 11:57:46.332544 PCI: 00:05.0: enabled 0
1550 11:57:46.335432 PCI: 00:12.0: enabled 1
1551 11:57:46.338332 PCI: 00:12.5: enabled 0
1552 11:57:46.341978 PCI: 00:12.6: enabled 0
1553 11:57:46.342396 PCI: 00:14.0: enabled 1
1554 11:57:46.345457 PCI: 00:14.1: enabled 0
1555 11:57:46.348564 PCI: 00:14.3: enabled 1
1556 11:57:46.348984 PCI: 00:14.5: enabled 0
1557 11:57:46.351639 PCI: 00:15.0: enabled 1
1558 11:57:46.355073 PCI: 00:15.1: enabled 1
1559 11:57:46.358545 PCI: 00:15.2: enabled 0
1560 11:57:46.358962 PCI: 00:15.3: enabled 0
1561 11:57:46.361643 PCI: 00:16.0: enabled 1
1562 11:57:46.364737 PCI: 00:16.1: enabled 0
1563 11:57:46.368500 PCI: 00:16.2: enabled 0
1564 11:57:46.368915 PCI: 00:16.3: enabled 0
1565 11:57:46.371435 PCI: 00:16.4: enabled 0
1566 11:57:46.374701 PCI: 00:16.5: enabled 0
1567 11:57:46.378041 PCI: 00:17.0: enabled 1
1568 11:57:46.378121 PCI: 00:19.0: enabled 1
1569 11:57:46.381138 PCI: 00:19.1: enabled 0
1570 11:57:46.384328 PCI: 00:19.2: enabled 0
1571 11:57:46.384409 PCI: 00:1a.0: enabled 0
1572 11:57:46.387804 PCI: 00:1c.0: enabled 0
1573 11:57:46.391251 PCI: 00:1c.1: enabled 0
1574 11:57:46.394806 PCI: 00:1c.2: enabled 0
1575 11:57:46.394930 PCI: 00:1c.3: enabled 0
1576 11:57:46.398364 PCI: 00:1c.4: enabled 0
1577 11:57:46.401434 PCI: 00:1c.5: enabled 0
1578 11:57:46.404403 PCI: 00:1c.6: enabled 0
1579 11:57:46.404561 PCI: 00:1c.7: enabled 0
1580 11:57:46.407948 PCI: 00:1d.0: enabled 1
1581 11:57:46.411034 PCI: 00:1d.1: enabled 0
1582 11:57:46.414521 PCI: 00:1d.2: enabled 0
1583 11:57:46.414642 PCI: 00:1d.3: enabled 0
1584 11:57:46.417859 PCI: 00:1d.4: enabled 0
1585 11:57:46.420989 PCI: 00:1d.5: enabled 0
1586 11:57:46.421140 PCI: 00:1e.0: enabled 1
1587 11:57:46.424541 PCI: 00:1e.1: enabled 0
1588 11:57:46.427551 PCI: 00:1e.2: enabled 1
1589 11:57:46.430889 PCI: 00:1e.3: enabled 1
1590 11:57:46.430971 PCI: 00:1f.0: enabled 1
1591 11:57:46.434461 PCI: 00:1f.1: enabled 0
1592 11:57:46.437413 PCI: 00:1f.2: enabled 0
1593 11:57:46.441320 PCI: 00:1f.3: enabled 1
1594 11:57:46.441401 PCI: 00:1f.4: enabled 1
1595 11:57:46.444041 PCI: 00:1f.5: enabled 1
1596 11:57:46.447898 PCI: 00:1f.6: enabled 0
1597 11:57:46.450663 USB0 port 0: enabled 1
1598 11:57:46.450744 I2C: 01:15: enabled 1
1599 11:57:46.454459 I2C: 02:5d: enabled 1
1600 11:57:46.457219 GENERIC: 0.0: enabled 1
1601 11:57:46.457300 I2C: 03:1a: enabled 1
1602 11:57:46.461036 I2C: 03:38: enabled 1
1603 11:57:46.464186 I2C: 03:39: enabled 1
1604 11:57:46.464267 I2C: 03:3a: enabled 1
1605 11:57:46.467417 I2C: 03:3b: enabled 1
1606 11:57:46.471206 PCI: 00:00.0: enabled 1
1607 11:57:46.471661 SPI: 00: enabled 1
1608 11:57:46.474279 SPI: 01: enabled 1
1609 11:57:46.477384 PNP: 0c09.0: enabled 1
1610 11:57:46.477850 USB2 port 0: enabled 1
1611 11:57:46.481102 USB2 port 1: enabled 1
1612 11:57:46.483966 USB2 port 2: enabled 0
1613 11:57:46.484444 USB2 port 3: enabled 0
1614 11:57:46.487223 USB2 port 5: enabled 0
1615 11:57:46.490763 USB2 port 6: enabled 1
1616 11:57:46.493737 USB2 port 9: enabled 1
1617 11:57:46.493843 USB3 port 0: enabled 1
1618 11:57:46.496858 USB3 port 1: enabled 1
1619 11:57:46.500310 USB3 port 2: enabled 1
1620 11:57:46.500382 USB3 port 3: enabled 1
1621 11:57:46.503699 USB3 port 4: enabled 0
1622 11:57:46.506894 APIC: 01: enabled 1
1623 11:57:46.506969 APIC: 07: enabled 1
1624 11:57:46.509991 APIC: 06: enabled 1
1625 11:57:46.513505 APIC: 02: enabled 1
1626 11:57:46.513577 APIC: 03: enabled 1
1627 11:57:46.516659 APIC: 05: enabled 1
1628 11:57:46.516740 APIC: 04: enabled 1
1629 11:57:46.519917 PCI: 00:08.0: enabled 1
1630 11:57:46.523541 PCI: 00:14.2: enabled 1
1631 11:57:46.527348 PCI: 01:00.0: enabled 1
1632 11:57:46.530598 Disabling ACPI via APMC:
1633 11:57:46.533612 done.
1634 11:57:46.537125 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 11:57:46.540199 ELOG: NV offset 0xaf0000 size 0x4000
1636 11:57:46.547434 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 11:57:46.554181 ELOG: Event(17) added with size 13 at 2023-06-23 11:57:46 UTC
1638 11:57:46.560767 ELOG: Event(92) added with size 9 at 2023-06-23 11:57:46 UTC
1639 11:57:46.567363 ELOG: Event(93) added with size 9 at 2023-06-23 11:57:46 UTC
1640 11:57:46.573552 ELOG: Event(9A) added with size 9 at 2023-06-23 11:57:46 UTC
1641 11:57:46.580205 ELOG: Event(9E) added with size 10 at 2023-06-23 11:57:46 UTC
1642 11:57:46.587008 ELOG: Event(9F) added with size 14 at 2023-06-23 11:57:46 UTC
1643 11:57:46.590501 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1644 11:57:46.597696 ELOG: Event(A1) added with size 10 at 2023-06-23 11:57:46 UTC
1645 11:57:46.607247 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 11:57:46.613985 ELOG: Event(A0) added with size 9 at 2023-06-23 11:57:46 UTC
1647 11:57:46.617540 elog_add_boot_reason: Logged dev mode boot
1648 11:57:46.620683 Finalize devices...
1649 11:57:46.620807 PCI: 00:17.0 final
1650 11:57:46.624111 Devices finalized
1651 11:57:46.627476 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 11:57:46.634203 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 11:57:46.637048 ME: HFSTS1 : 0x90000245
1654 11:57:46.640709 ME: HFSTS2 : 0x3B850126
1655 11:57:46.647344 ME: HFSTS3 : 0x00000020
1656 11:57:46.650728 ME: HFSTS4 : 0x00004800
1657 11:57:46.653961 ME: HFSTS5 : 0x00000000
1658 11:57:46.657011 ME: HFSTS6 : 0x40400006
1659 11:57:46.660488 ME: Manufacturing Mode : NO
1660 11:57:46.663521 ME: FW Partition Table : OK
1661 11:57:46.667379 ME: Bringup Loader Failure : NO
1662 11:57:46.670472 ME: Firmware Init Complete : YES
1663 11:57:46.674098 ME: Boot Options Present : NO
1664 11:57:46.676795 ME: Update In Progress : NO
1665 11:57:46.680620 ME: D0i3 Support : YES
1666 11:57:46.683674 ME: Low Power State Enabled : NO
1667 11:57:46.687132 ME: CPU Replaced : NO
1668 11:57:46.690004 ME: CPU Replacement Valid : YES
1669 11:57:46.693467 ME: Current Working State : 5
1670 11:57:46.696758 ME: Current Operation State : 1
1671 11:57:46.700297 ME: Current Operation Mode : 0
1672 11:57:46.703404 ME: Error Code : 0
1673 11:57:46.706760 ME: CPU Debug Disabled : YES
1674 11:57:46.709792 ME: TXT Support : NO
1675 11:57:46.716548 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 11:57:46.722951 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 11:57:46.723061 CBFS @ c08000 size 3f8000
1678 11:57:46.729526 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 11:57:46.733136 CBFS: Locating 'fallback/dsdt.aml'
1680 11:57:46.736427 CBFS: Found @ offset 10bb80 size 3fa5
1681 11:57:46.743026 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 11:57:46.746079 CBFS @ c08000 size 3f8000
1683 11:57:46.749552 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 11:57:46.752732 CBFS: Locating 'fallback/slic'
1685 11:57:46.758327 CBFS: 'fallback/slic' not found.
1686 11:57:46.764561 ACPI: Writing ACPI tables at 99b3e000.
1687 11:57:46.764642 ACPI: * FACS
1688 11:57:46.768129 ACPI: * DSDT
1689 11:57:46.771296 Ramoops buffer: 0x100000@0x99a3d000.
1690 11:57:46.774753 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 11:57:46.781009 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 11:57:46.784782 Google Chrome EC: version:
1693 11:57:46.787757 ro: helios_v2.0.2659-56403530b
1694 11:57:46.791355 rw: helios_v2.0.2849-c41de27e7d
1695 11:57:46.791425 running image: 1
1696 11:57:46.795390 ACPI: * FADT
1697 11:57:46.795490 SCI is IRQ9
1698 11:57:46.801894 ACPI: added table 1/32, length now 40
1699 11:57:46.801993 ACPI: * SSDT
1700 11:57:46.805490 Found 1 CPU(s) with 8 core(s) each.
1701 11:57:46.808603 Error: Could not locate 'wifi_sar' in VPD.
1702 11:57:46.815115 Checking CBFS for default SAR values
1703 11:57:46.818598 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 11:57:46.821913 CBFS @ c08000 size 3f8000
1705 11:57:46.828261 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 11:57:46.831782 CBFS: Locating 'wifi_sar_defaults.hex'
1707 11:57:46.834880 CBFS: Found @ offset 5fac0 size 77
1708 11:57:46.838278 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 11:57:46.845094 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 11:57:46.848395 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 11:57:46.854940 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 11:57:46.858237 failed to find key in VPD: dsm_calib_r0_0
1713 11:57:46.868375 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 11:57:46.871474 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 11:57:46.874515 failed to find key in VPD: dsm_calib_r0_1
1716 11:57:46.884651 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 11:57:46.891273 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 11:57:46.894839 failed to find key in VPD: dsm_calib_r0_2
1719 11:57:46.904646 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 11:57:46.907689 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 11:57:46.914307 failed to find key in VPD: dsm_calib_r0_3
1722 11:57:46.921212 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 11:57:46.927556 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 11:57:46.930880 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 11:57:46.934106 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 11:57:46.938375 EC returned error result code 1
1727 11:57:46.942246 EC returned error result code 1
1728 11:57:46.946033 EC returned error result code 1
1729 11:57:46.952933 PS2K: Bad resp from EC. Vivaldi disabled!
1730 11:57:46.955866 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 11:57:46.962872 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 11:57:46.969076 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 11:57:46.972140 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 11:57:46.979114 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 11:57:46.985525 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 11:57:46.992297 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 11:57:46.995324 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 11:57:47.001851 ACPI: added table 2/32, length now 44
1739 11:57:47.001960 ACPI: * MCFG
1740 11:57:47.005367 ACPI: added table 3/32, length now 48
1741 11:57:47.008441 ACPI: * TPM2
1742 11:57:47.012090 TPM2 log created at 99a2d000
1743 11:57:47.015279 ACPI: added table 4/32, length now 52
1744 11:57:47.015384 ACPI: * MADT
1745 11:57:47.018703 SCI is IRQ9
1746 11:57:47.021898 ACPI: added table 5/32, length now 56
1747 11:57:47.022000 current = 99b43ac0
1748 11:57:47.025036 ACPI: * DMAR
1749 11:57:47.028640 ACPI: added table 6/32, length now 60
1750 11:57:47.032046 ACPI: * IGD OpRegion
1751 11:57:47.032152 GMA: Found VBT in CBFS
1752 11:57:47.035501 GMA: Found valid VBT in CBFS
1753 11:57:47.038677 ACPI: added table 7/32, length now 64
1754 11:57:47.042012 ACPI: * HPET
1755 11:57:47.045287 ACPI: added table 8/32, length now 68
1756 11:57:47.045400 ACPI: done.
1757 11:57:47.048670 ACPI tables: 31744 bytes.
1758 11:57:47.052038 smbios_write_tables: 99a2c000
1759 11:57:47.055261 EC returned error result code 3
1760 11:57:47.058470 Couldn't obtain OEM name from CBI
1761 11:57:47.061674 Create SMBIOS type 17
1762 11:57:47.065102 PCI: 00:00.0 (Intel Cannonlake)
1763 11:57:47.068613 PCI: 00:14.3 (Intel WiFi)
1764 11:57:47.071762 SMBIOS tables: 939 bytes.
1765 11:57:47.075065 Writing table forward entry at 0x00000500
1766 11:57:47.081731 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 11:57:47.084788 Writing coreboot table at 0x99b62000
1768 11:57:47.091672 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 11:57:47.094793 1. 0000000000001000-000000000009ffff: RAM
1770 11:57:47.098258 2. 00000000000a0000-00000000000fffff: RESERVED
1771 11:57:47.104881 3. 0000000000100000-0000000099a2bfff: RAM
1772 11:57:47.111538 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 11:57:47.114655 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 11:57:47.121412 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 11:57:47.125110 7. 000000009a000000-000000009f7fffff: RESERVED
1776 11:57:47.131103 8. 00000000e0000000-00000000efffffff: RESERVED
1777 11:57:47.134669 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 11:57:47.141001 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 11:57:47.144275 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 11:57:47.147587 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 11:57:47.154556 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 11:57:47.157816 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 11:57:47.164502 15. 0000000100000000-000000045e7fffff: RAM
1784 11:57:47.167600 Graphics framebuffer located at 0xc0000000
1785 11:57:47.171290 Passing 5 GPIOs to payload:
1786 11:57:47.174394 NAME | PORT | POLARITY | VALUE
1787 11:57:47.181017 write protect | undefined | high | low
1788 11:57:47.187757 lid | undefined | high | high
1789 11:57:47.191307 power | undefined | high | low
1790 11:57:47.198018 oprom | undefined | high | low
1791 11:57:47.200908 EC in RW | 0x000000cb | high | low
1792 11:57:47.204180 Board ID: 4
1793 11:57:47.207413 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 11:57:47.211044 CBFS @ c08000 size 3f8000
1795 11:57:47.217159 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 11:57:47.223833 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1797 11:57:47.226771 coreboot table: 1492 bytes.
1798 11:57:47.230387 IMD ROOT 0. 99fff000 00001000
1799 11:57:47.233760 IMD SMALL 1. 99ffe000 00001000
1800 11:57:47.236832 FSP MEMORY 2. 99c4e000 003b0000
1801 11:57:47.240381 CONSOLE 3. 99c2e000 00020000
1802 11:57:47.243462 FMAP 4. 99c2d000 0000054e
1803 11:57:47.246832 TIME STAMP 5. 99c2c000 00000910
1804 11:57:47.250595 VBOOT WORK 6. 99c18000 00014000
1805 11:57:47.253460 MRC DATA 7. 99c16000 00001958
1806 11:57:47.257051 ROMSTG STCK 8. 99c15000 00001000
1807 11:57:47.260212 AFTER CAR 9. 99c0b000 0000a000
1808 11:57:47.263448 RAMSTAGE 10. 99baf000 0005c000
1809 11:57:47.267008 REFCODE 11. 99b7a000 00035000
1810 11:57:47.269994 SMM BACKUP 12. 99b6a000 00010000
1811 11:57:47.273780 COREBOOT 13. 99b62000 00008000
1812 11:57:47.276973 ACPI 14. 99b3e000 00024000
1813 11:57:47.280113 ACPI GNVS 15. 99b3d000 00001000
1814 11:57:47.283755 RAMOOPS 16. 99a3d000 00100000
1815 11:57:47.287143 TPM2 TCGLOG17. 99a2d000 00010000
1816 11:57:47.290265 SMBIOS 18. 99a2c000 00000800
1817 11:57:47.290835 IMD small region:
1818 11:57:47.293610 IMD ROOT 0. 99ffec00 00000400
1819 11:57:47.297067 FSP RUNTIME 1. 99ffebe0 00000004
1820 11:57:47.300667 EC HOSTEVENT 2. 99ffebc0 00000008
1821 11:57:47.303887 POWER STATE 3. 99ffeb80 00000040
1822 11:57:47.307139 ROMSTAGE 4. 99ffeb60 00000004
1823 11:57:47.313850 MEM INFO 5. 99ffe9a0 000001b9
1824 11:57:47.316936 VPD 6. 99ffe920 0000006c
1825 11:57:47.317403 MTRR: Physical address space:
1826 11:57:47.323644 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 11:57:47.330036 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 11:57:47.336803 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 11:57:47.343480 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 11:57:47.350073 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 11:57:47.356591 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 11:57:47.363248 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 11:57:47.366333 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 11:57:47.369895 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 11:57:47.372750 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 11:57:47.379931 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 11:57:47.382595 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 11:57:47.386134 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 11:57:47.389151 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 11:57:47.396550 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 11:57:47.399862 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 11:57:47.402600 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 11:57:47.406245 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 11:57:47.409752 call enable_fixed_mtrr()
1845 11:57:47.413341 CPU physical address size: 39 bits
1846 11:57:47.419896 MTRR: default type WB/UC MTRR counts: 6/8.
1847 11:57:47.423196 MTRR: WB selected as default type.
1848 11:57:47.429505 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 11:57:47.432761 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 11:57:47.439520 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 11:57:47.445938 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 11:57:47.452692 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 11:57:47.459185 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 11:57:47.465574 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 11:57:47.468804 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 11:57:47.472653 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 11:57:47.476469 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 11:57:47.482056 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 11:57:47.485993 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 11:57:47.488741 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 11:57:47.492279 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 11:57:47.495493 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 11:57:47.502159 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 11:57:47.505214 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 11:57:47.505638
1866 11:57:47.505969 MTRR check
1867 11:57:47.508665 call enable_fixed_mtrr()
1868 11:57:47.511749 Fixed MTRRs : Enabled
1869 11:57:47.515390 Variable MTRRs: Enabled
1870 11:57:47.515861
1871 11:57:47.518540 CPU physical address size: 39 bits
1872 11:57:47.525294 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1873 11:57:47.528324 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 11:57:47.531955 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 11:57:47.535194 MTRR: Fixed MSR 0x258 0x0606060606060606
1876 11:57:47.538774 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 11:57:47.545311 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 11:57:47.548353 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 11:57:47.551382 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 11:57:47.554563 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 11:57:47.561224 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 11:57:47.564297 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 11:57:47.568195 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 11:57:47.571036 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 11:57:47.577788 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 11:57:47.577884 call enable_fixed_mtrr()
1887 11:57:47.584325 MTRR: Fixed MSR 0x259 0x0000000000000000
1888 11:57:47.587452 MTRR: Fixed MSR 0x268 0x0606060606060606
1889 11:57:47.591159 MTRR: Fixed MSR 0x269 0x0606060606060606
1890 11:57:47.594298 MTRR: Fixed MSR 0x26a 0x0606060606060606
1891 11:57:47.600666 MTRR: Fixed MSR 0x26b 0x0606060606060606
1892 11:57:47.604210 MTRR: Fixed MSR 0x26c 0x0606060606060606
1893 11:57:47.607197 MTRR: Fixed MSR 0x26d 0x0606060606060606
1894 11:57:47.610607 MTRR: Fixed MSR 0x26e 0x0606060606060606
1895 11:57:47.617352 MTRR: Fixed MSR 0x26f 0x0606060606060606
1896 11:57:47.620852 CPU physical address size: 39 bits
1897 11:57:47.624391 call enable_fixed_mtrr()
1898 11:57:47.627435 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 11:57:47.630360 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 11:57:47.633905 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 11:57:47.640978 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 11:57:47.643812 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 11:57:47.647236 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 11:57:47.650373 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 11:57:47.657198 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 11:57:47.660495 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 11:57:47.664233 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 11:57:47.667274 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 11:57:47.670854 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 11:57:47.676974 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 11:57:47.680447 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 11:57:47.684016 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 11:57:47.690786 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 11:57:47.693909 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 11:57:47.697089 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 11:57:47.700311 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 11:57:47.703532 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 11:57:47.710353 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 11:57:47.713724 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 11:57:47.716746 call enable_fixed_mtrr()
1921 11:57:47.720339 call enable_fixed_mtrr()
1922 11:57:47.723247 CPU physical address size: 39 bits
1923 11:57:47.727035 CPU physical address size: 39 bits
1924 11:57:47.730134 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1925 11:57:47.733260 CPU physical address size: 39 bits
1926 11:57:47.740141 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 11:57:47.743460 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 11:57:47.746501 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 11:57:47.750097 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 11:57:47.756711 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 11:57:47.759788 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 11:57:47.763126 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 11:57:47.766598 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 11:57:47.773273 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 11:57:47.776083 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 11:57:47.779834 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 11:57:47.782744 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 11:57:47.789572 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 11:57:47.789993 call enable_fixed_mtrr()
1940 11:57:47.796653 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 11:57:47.799308 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 11:57:47.802655 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 11:57:47.806339 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 11:57:47.809793 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 11:57:47.816007 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 11:57:47.819182 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 11:57:47.822832 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 11:57:47.825884 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 11:57:47.832298 CPU physical address size: 39 bits
1950 11:57:47.832384 call enable_fixed_mtrr()
1951 11:57:47.835367 CBFS @ c08000 size 3f8000
1952 11:57:47.842346 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1953 11:57:47.846152 CBFS: Locating 'fallback/payload'
1954 11:57:47.849190 CPU physical address size: 39 bits
1955 11:57:47.852239 CBFS: Found @ offset 1c96c0 size 3f798
1956 11:57:47.859062 Checking segment from ROM address 0xffdd16f8
1957 11:57:47.862245 Checking segment from ROM address 0xffdd1714
1958 11:57:47.865836 Loading segment from ROM address 0xffdd16f8
1959 11:57:47.868868 code (compression=0)
1960 11:57:47.878847 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 11:57:47.885372 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 11:57:47.888844 it's not compressed!
1963 11:57:47.979837 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 11:57:47.986599 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 11:57:47.989767 Loading segment from ROM address 0xffdd1714
1966 11:57:47.993054 Entry Point 0x30000000
1967 11:57:47.996457 Loaded segments
1968 11:57:48.002084 Finalizing chipset.
1969 11:57:48.005277 Finalizing SMM.
1970 11:57:48.008843 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1971 11:57:48.011843 mp_park_aps done after 0 msecs.
1972 11:57:48.018289 Jumping to boot code at 30000000(99b62000)
1973 11:57:48.025069 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 11:57:48.025200
1975 11:57:48.025308
1976 11:57:48.025423
1977 11:57:48.028611 Starting depthcharge on Helios...
1978 11:57:48.028742
1979 11:57:48.029205 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 11:57:48.029367 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 11:57:48.029502 Setting prompt string to ['hatch:']
1982 11:57:48.029635 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 11:57:48.038555 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 11:57:48.038667
1985 11:57:48.044807 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 11:57:48.044914
1987 11:57:48.051411 board_setup: Info: eMMC controller not present; skipping
1988 11:57:48.051519
1989 11:57:48.054926 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 11:57:48.055008
1991 11:57:48.061826 board_setup: Info: SDHCI controller not present; skipping
1992 11:57:48.061907
1993 11:57:48.067979 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 11:57:48.068064
1995 11:57:48.068126 Wipe memory regions:
1996 11:57:48.068185
1997 11:57:48.071605 [0x00000000001000, 0x000000000a0000)
1998 11:57:48.071699
1999 11:57:48.074637 [0x00000000100000, 0x00000030000000)
2000 11:57:48.141147
2001 11:57:48.144299 [0x00000030657430, 0x00000099a2c000)
2002 11:57:48.281640
2003 11:57:48.284727 [0x00000100000000, 0x0000045e800000)
2004 11:57:49.667820
2005 11:57:49.668463 R8152: Initializing
2006 11:57:49.668979
2007 11:57:49.670586 Version 9 (ocp_data = 6010)
2008 11:57:49.675309
2009 11:57:49.675846 R8152: Done initializing
2010 11:57:49.676224
2011 11:57:49.678323 Adding net device
2012 11:57:50.288150
2013 11:57:50.288718 R8152: Initializing
2014 11:57:50.289082
2015 11:57:50.291240 Version 6 (ocp_data = 5c30)
2016 11:57:50.291746
2017 11:57:50.294202 R8152: Done initializing
2018 11:57:50.294662
2019 11:57:50.297693 net_add_device: Attemp to include the same device
2020 11:57:50.301237
2021 11:57:50.308031 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 11:57:50.308484
2023 11:57:50.308837
2024 11:57:50.309169
2025 11:57:50.309993 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 11:57:50.411114 hatch: tftpboot 192.168.201.1 10875926/tftp-deploy-5c9hrqzm/kernel/bzImage 10875926/tftp-deploy-5c9hrqzm/kernel/cmdline 10875926/tftp-deploy-5c9hrqzm/ramdisk/ramdisk.cpio.gz
2028 11:57:50.411822 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 11:57:50.412321 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 11:57:50.416501 tftpboot 192.168.201.1 10875926/tftp-deploy-5c9hrqzm/kernel/bzIloy-5c9hrqzm/kernel/cmdline 10875926/tftp-deploy-5c9hrqzm/ramdisk/ramdisk.cpio.gz
2031 11:57:50.417041
2032 11:57:50.417548 Waiting for link
2033 11:57:50.617773
2034 11:57:50.618406 done.
2035 11:57:50.618780
2036 11:57:50.619126 MAC: 00:24:32:50:1a:5f
2037 11:57:50.619545
2038 11:57:50.620488 Sending DHCP discover... done.
2039 11:57:50.621010
2040 11:57:50.624118 Waiting for reply... done.
2041 11:57:50.624581
2042 11:57:50.627181 Sending DHCP request... done.
2043 11:57:50.627806
2044 11:57:50.630955 Waiting for reply... done.
2045 11:57:50.631418
2046 11:57:50.634166 My ip is 192.168.201.21
2047 11:57:50.634629
2048 11:57:50.637734 The DHCP server ip is 192.168.201.1
2049 11:57:50.638333
2050 11:57:50.640344 TFTP server IP predefined by user: 192.168.201.1
2051 11:57:50.640888
2052 11:57:50.647195 Bootfile predefined by user: 10875926/tftp-deploy-5c9hrqzm/kernel/bzImage
2053 11:57:50.650451
2054 11:57:50.653708 Sending tftp read request... done.
2055 11:57:50.654272
2056 11:57:50.660300 Waiting for the transfer...
2057 11:57:50.660862
2058 11:57:51.278002 00000000 ################################################################
2059 11:57:51.278152
2060 11:57:51.877521 00080000 ################################################################
2061 11:57:51.877716
2062 11:57:52.431951 00100000 ################################################################
2063 11:57:52.432101
2064 11:57:53.010135 00180000 ################################################################
2065 11:57:53.010290
2066 11:57:53.601035 00200000 ################################################################
2067 11:57:53.601188
2068 11:57:54.165517 00280000 ################################################################
2069 11:57:54.165667
2070 11:57:54.755407 00300000 ################################################################
2071 11:57:54.755596
2072 11:57:55.318986 00380000 ################################################################
2073 11:57:55.319137
2074 11:57:55.877912 00400000 ################################################################
2075 11:57:55.878062
2076 11:57:56.442300 00480000 ################################################################
2077 11:57:56.442454
2078 11:57:57.013575 00500000 ################################################################
2079 11:57:57.013733
2080 11:57:57.559555 00580000 ################################################################
2081 11:57:57.559750
2082 11:57:58.112446 00600000 ################################################################
2083 11:57:58.112586
2084 11:57:58.713543 00680000 ################################################################
2085 11:57:58.713697
2086 11:57:59.352752 00700000 ################################################################
2087 11:57:59.352902
2088 11:57:59.919274 00780000 ################################################################
2089 11:57:59.919448
2090 11:58:00.497535 00800000 ################################################################
2091 11:58:00.497717
2092 11:58:01.086396 00880000 ################################################################
2093 11:58:01.086572
2094 11:58:01.662409 00900000 ################################################################
2095 11:58:01.662563
2096 11:58:02.210647 00980000 ################################################################
2097 11:58:02.210800
2098 11:58:02.582559 00a00000 ############################################## done.
2099 11:58:02.582713
2100 11:58:02.585783 The bootfile was 10859008 bytes long.
2101 11:58:02.585869
2102 11:58:02.589278 Sending tftp read request... done.
2103 11:58:02.589362
2104 11:58:02.592558 Waiting for the transfer...
2105 11:58:02.592642
2106 11:58:03.147866 00000000 ################################################################
2107 11:58:03.148016
2108 11:58:03.687016 00080000 ################################################################
2109 11:58:03.687170
2110 11:58:04.215884 00100000 ################################################################
2111 11:58:04.216034
2112 11:58:04.801126 00180000 ################################################################
2113 11:58:04.801273
2114 11:58:05.400641 00200000 ################################################################
2115 11:58:05.400793
2116 11:58:05.995330 00280000 ################################################################
2117 11:58:05.995471
2118 11:58:06.572611 00300000 ################################################################
2119 11:58:06.572757
2120 11:58:07.220425 00380000 ################################################################
2121 11:58:07.221143
2122 11:58:07.827929 00400000 ################################################################
2123 11:58:07.828085
2124 11:58:08.421115 00480000 ################################################################
2125 11:58:08.421266
2126 11:58:08.987050 00500000 ################################################################
2127 11:58:08.987225
2128 11:58:09.584139 00580000 ################################################################
2129 11:58:09.584704
2130 11:58:10.220609 00600000 ################################################################
2131 11:58:10.221313
2132 11:58:10.835528 00680000 ################################################################
2133 11:58:10.835723
2134 11:58:11.411826 00700000 ################################################################
2135 11:58:11.412000
2136 11:58:11.986284 00780000 ################################################################
2137 11:58:11.986462
2138 11:58:12.539402 00800000 ################################################################
2139 11:58:12.539595
2140 11:58:12.841122 00880000 ##################################### done.
2141 11:58:12.841276
2142 11:58:12.844788 Sending tftp read request... done.
2143 11:58:12.844957
2144 11:58:12.847781 Waiting for the transfer...
2145 11:58:12.847900
2146 11:58:12.847975 00000000 # done.
2147 11:58:12.848047
2148 11:58:12.857766 Command line loaded dynamically from TFTP file: 10875926/tftp-deploy-5c9hrqzm/kernel/cmdline
2149 11:58:12.857947
2150 11:58:12.874298 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2151 11:58:12.874478
2152 11:58:12.880579 ec_init(0): CrosEC protocol v3 supported (256, 256)
2153 11:58:12.885875
2154 11:58:12.888904 Shutting down all USB controllers.
2155 11:58:12.888990
2156 11:58:12.889056 Removing current net device
2157 11:58:12.896892
2158 11:58:12.896978 Finalizing coreboot
2159 11:58:12.897046
2160 11:58:12.903168 Exiting depthcharge with code 4 at timestamp: 32242074
2161 11:58:12.903254
2162 11:58:12.903318
2163 11:58:12.903379 Starting kernel ...
2164 11:58:12.903437
2165 11:58:12.903512
2166 11:58:12.903954 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2167 11:58:12.904055 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2168 11:58:12.904130 Setting prompt string to ['Linux version [0-9]']
2169 11:58:12.904198 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2170 11:58:12.904266 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2172 12:02:29.905041 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2174 12:02:29.906141 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2176 12:02:29.906991 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2179 12:02:29.908444 end: 2 depthcharge-action (duration 00:05:00) [common]
2181 12:02:29.909579 Cleaning after the job
2182 12:02:29.909724 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875926/tftp-deploy-5c9hrqzm/ramdisk
2183 12:02:29.910987 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875926/tftp-deploy-5c9hrqzm/kernel
2184 12:02:29.912375 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875926/tftp-deploy-5c9hrqzm/modules
2185 12:02:29.912938 start: 5.1 power-off (timeout 00:00:30) [common]
2186 12:02:29.913099 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2187 12:02:29.995343 >> Command sent successfully.
2188 12:02:30.005690 Returned 0 in 0 seconds
2189 12:02:30.106889 end: 5.1 power-off (duration 00:00:00) [common]
2191 12:02:30.108460 start: 5.2 read-feedback (timeout 00:10:00) [common]
2192 12:02:30.109696 Listened to connection for namespace 'common' for up to 1s
2194 12:02:30.111068 Listened to connection for namespace 'common' for up to 1s
2195 12:02:31.110427 Finalising connection for namespace 'common'
2196 12:02:31.111101 Disconnecting from shell: Finalise
2197 12:02:31.111673
2198 12:02:31.212718 end: 5.2 read-feedback (duration 00:00:01) [common]
2199 12:02:31.213344 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10875926
2200 12:02:31.230919 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10875926
2201 12:02:31.231048 JobError: Your job cannot terminate cleanly.