Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:51:55.223918 lava-dispatcher, installed at version: 2023.05.1
2 11:51:55.224129 start: 0 validate
3 11:51:55.224268 Start time: 2023-06-23 11:51:55.224253+00:00 (UTC)
4 11:51:55.224398 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:51:55.224530 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230609.0%2Famd64%2Finitrd.cpio.gz exists
6 11:51:55.485782 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:51:55.486586 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:51:56.015913 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:51:56.016856 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230609.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:51:56.286011 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:51:56.286813 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:51:56.553703 validate duration: 1.33
14 11:51:56.554855 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:51:56.555356 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:51:56.555811 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:51:56.556416 Not decompressing ramdisk as can be used compressed.
18 11:51:56.556902 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230609.0/amd64/initrd.cpio.gz
19 11:51:56.557371 saving as /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/ramdisk/initrd.cpio.gz
20 11:51:56.557929 total size: 5432875 (5MB)
21 11:51:56.564883 progress 0% (0MB)
22 11:51:56.571405 progress 5% (0MB)
23 11:51:56.575298 progress 10% (0MB)
24 11:51:56.578269 progress 15% (0MB)
25 11:51:56.579807 progress 20% (1MB)
26 11:51:56.581222 progress 25% (1MB)
27 11:51:56.582585 progress 30% (1MB)
28 11:51:56.584191 progress 35% (1MB)
29 11:51:56.585580 progress 40% (2MB)
30 11:51:56.586928 progress 45% (2MB)
31 11:51:56.588271 progress 50% (2MB)
32 11:51:56.589843 progress 55% (2MB)
33 11:51:56.591187 progress 60% (3MB)
34 11:51:56.592630 progress 65% (3MB)
35 11:51:56.594136 progress 70% (3MB)
36 11:51:56.595551 progress 75% (3MB)
37 11:51:56.596934 progress 80% (4MB)
38 11:51:56.598276 progress 85% (4MB)
39 11:51:56.599774 progress 90% (4MB)
40 11:51:56.601179 progress 95% (4MB)
41 11:51:56.602544 progress 100% (5MB)
42 11:51:56.602752 5MB downloaded in 0.04s (115.57MB/s)
43 11:51:56.602901 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:51:56.603142 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:51:56.603229 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:51:56.603313 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:51:56.603442 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:51:56.603515 saving as /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/kernel/bzImage
50 11:51:56.603576 total size: 10859008 (10MB)
51 11:51:56.603637 No compression specified
52 11:51:56.604751 progress 0% (0MB)
53 11:51:56.607470 progress 5% (0MB)
54 11:51:56.610294 progress 10% (1MB)
55 11:51:56.613100 progress 15% (1MB)
56 11:51:56.615919 progress 20% (2MB)
57 11:51:56.618611 progress 25% (2MB)
58 11:51:56.621470 progress 30% (3MB)
59 11:51:56.624406 progress 35% (3MB)
60 11:51:56.627380 progress 40% (4MB)
61 11:51:56.630361 progress 45% (4MB)
62 11:51:56.633203 progress 50% (5MB)
63 11:51:56.636177 progress 55% (5MB)
64 11:51:56.639078 progress 60% (6MB)
65 11:51:56.642175 progress 65% (6MB)
66 11:51:56.645119 progress 70% (7MB)
67 11:51:56.647928 progress 75% (7MB)
68 11:51:56.650765 progress 80% (8MB)
69 11:51:56.653589 progress 85% (8MB)
70 11:51:56.656697 progress 90% (9MB)
71 11:51:56.659348 progress 95% (9MB)
72 11:51:56.662166 progress 100% (10MB)
73 11:51:56.662321 10MB downloaded in 0.06s (176.30MB/s)
74 11:51:56.662462 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:51:56.662696 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:51:56.662782 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:51:56.662871 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:51:56.663001 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230609.0/amd64/full.rootfs.tar.xz
80 11:51:56.663070 saving as /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/nfsrootfs/full.rootfs.tar
81 11:51:56.663131 total size: 133414664 (127MB)
82 11:51:56.663192 Using unxz to decompress xz
83 11:51:56.666945 progress 0% (0MB)
84 11:51:57.015721 progress 5% (6MB)
85 11:51:57.387952 progress 10% (12MB)
86 11:51:57.681949 progress 15% (19MB)
87 11:51:57.876422 progress 20% (25MB)
88 11:51:58.133922 progress 25% (31MB)
89 11:51:58.507931 progress 30% (38MB)
90 11:51:58.875899 progress 35% (44MB)
91 11:51:59.323674 progress 40% (50MB)
92 11:51:59.735854 progress 45% (57MB)
93 11:52:00.110426 progress 50% (63MB)
94 11:52:00.513895 progress 55% (70MB)
95 11:52:00.901022 progress 60% (76MB)
96 11:52:01.283332 progress 65% (82MB)
97 11:52:01.681338 progress 70% (89MB)
98 11:52:02.082247 progress 75% (95MB)
99 11:52:02.558675 progress 80% (101MB)
100 11:52:03.027625 progress 85% (108MB)
101 11:52:03.331727 progress 90% (114MB)
102 11:52:03.710690 progress 95% (120MB)
103 11:52:04.156306 progress 100% (127MB)
104 11:52:04.162491 127MB downloaded in 7.50s (16.97MB/s)
105 11:52:04.162846 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:52:04.163254 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:52:04.163377 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:52:04.163471 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:52:04.163657 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:52:04.163760 saving as /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/modules/modules.tar
112 11:52:04.163857 total size: 483808 (0MB)
113 11:52:04.163952 Using unxz to decompress xz
114 11:52:04.167951 progress 6% (0MB)
115 11:52:04.168408 progress 13% (0MB)
116 11:52:04.168689 progress 20% (0MB)
117 11:52:04.169950 progress 27% (0MB)
118 11:52:04.172224 progress 33% (0MB)
119 11:52:04.174339 progress 40% (0MB)
120 11:52:04.176371 progress 47% (0MB)
121 11:52:04.178109 progress 54% (0MB)
122 11:52:04.180477 progress 60% (0MB)
123 11:52:04.182982 progress 67% (0MB)
124 11:52:04.185040 progress 74% (0MB)
125 11:52:04.187027 progress 81% (0MB)
126 11:52:04.189065 progress 88% (0MB)
127 11:52:04.191164 progress 94% (0MB)
128 11:52:04.193204 progress 100% (0MB)
129 11:52:04.199224 0MB downloaded in 0.04s (13.05MB/s)
130 11:52:04.199541 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:52:04.199838 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:52:04.199951 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 11:52:04.200049 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 11:52:06.875500 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10875942/extract-nfsrootfs-cqbcmmol
136 11:52:06.875710 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:52:06.875855 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 11:52:06.876087 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz
139 11:52:06.876276 makedir: /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin
140 11:52:06.876420 makedir: /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/tests
141 11:52:06.876573 makedir: /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/results
142 11:52:06.876726 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-add-keys
143 11:52:06.876935 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-add-sources
144 11:52:06.877126 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-background-process-start
145 11:52:06.877271 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-background-process-stop
146 11:52:06.877397 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-common-functions
147 11:52:06.877527 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-echo-ipv4
148 11:52:06.877649 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-install-packages
149 11:52:06.877770 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-installed-packages
150 11:52:06.877888 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-os-build
151 11:52:06.878011 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-probe-channel
152 11:52:06.878131 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-probe-ip
153 11:52:06.878250 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-target-ip
154 11:52:06.878368 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-target-mac
155 11:52:06.878487 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-target-storage
156 11:52:06.878614 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-test-case
157 11:52:06.878735 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-test-event
158 11:52:06.878853 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-test-feedback
159 11:52:06.878973 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-test-raise
160 11:52:06.879092 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-test-reference
161 11:52:06.879212 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-test-runner
162 11:52:06.879330 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-test-set
163 11:52:06.879449 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-test-shell
164 11:52:06.879570 Updating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-install-packages (oe)
165 11:52:06.879725 Updating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/bin/lava-installed-packages (oe)
166 11:52:06.879847 Creating /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/environment
167 11:52:06.879945 LAVA metadata
168 11:52:06.880014 - LAVA_JOB_ID=10875942
169 11:52:06.880078 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:52:06.880179 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 11:52:06.880244 skipped lava-vland-overlay
172 11:52:06.880318 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:52:06.880396 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 11:52:06.880457 skipped lava-multinode-overlay
175 11:52:06.880528 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:52:06.880614 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 11:52:06.880687 Loading test definitions
178 11:52:06.880776 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
179 11:52:06.880844 Using /lava-10875942 at stage 0
180 11:52:06.881147 uuid=10875942_1.5.2.3.1 testdef=None
181 11:52:06.881234 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 11:52:06.881318 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
183 11:52:06.881815 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 11:52:06.882036 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
186 11:52:06.882657 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 11:52:06.882884 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
189 11:52:06.883490 runner path: /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/0/tests/0_dmesg test_uuid 10875942_1.5.2.3.1
190 11:52:06.883641 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 11:52:06.883863 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
193 11:52:06.883934 Using /lava-10875942 at stage 1
194 11:52:06.884224 uuid=10875942_1.5.2.3.5 testdef=None
195 11:52:06.884311 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 11:52:06.884394 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
197 11:52:06.884853 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 11:52:06.885066 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
200 11:52:06.885692 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 11:52:06.885918 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
203 11:52:06.886531 runner path: /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/1/tests/1_bootrr test_uuid 10875942_1.5.2.3.5
204 11:52:06.886678 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 11:52:06.886880 Creating lava-test-runner.conf files
207 11:52:06.886942 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/0 for stage 0
208 11:52:06.887027 - 0_dmesg
209 11:52:06.887103 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10875942/lava-overlay-bxnefoiz/lava-10875942/1 for stage 1
210 11:52:06.887190 - 1_bootrr
211 11:52:06.887282 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 11:52:06.887365 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
213 11:52:06.894778 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 11:52:06.894888 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
215 11:52:06.894974 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 11:52:06.895062 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 11:52:06.895160 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
218 11:52:07.027022 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 11:52:07.027434 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
220 11:52:07.027598 extracting modules file /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875942/extract-nfsrootfs-cqbcmmol
221 11:52:07.055747 extracting modules file /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875942/extract-overlay-ramdisk-w7g0hxns/ramdisk
222 11:52:07.084901 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 11:52:07.085092 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
224 11:52:07.085226 [common] Applying overlay to NFS
225 11:52:07.085325 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10875942/compress-overlay-anjueuwg/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10875942/extract-nfsrootfs-cqbcmmol
226 11:52:07.097054 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 11:52:07.097179 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
228 11:52:07.097280 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 11:52:07.097406 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
230 11:52:07.097526 Building ramdisk /var/lib/lava/dispatcher/tmp/10875942/extract-overlay-ramdisk-w7g0hxns/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10875942/extract-overlay-ramdisk-w7g0hxns/ramdisk
231 11:52:07.175119 >> 30352 blocks
232 11:52:07.819492 rename /var/lib/lava/dispatcher/tmp/10875942/extract-overlay-ramdisk-w7g0hxns/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/ramdisk/ramdisk.cpio.gz
233 11:52:07.819929 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 11:52:07.820083 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
235 11:52:07.820216 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
236 11:52:07.820345 No mkimage arch provided, not using FIT.
237 11:52:07.820470 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 11:52:07.820595 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 11:52:07.820745 end: 1.5 prepare-tftp-overlay (duration 00:00:04) [common]
240 11:52:07.820874 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
241 11:52:07.820993 No LXC device requested
242 11:52:07.821123 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 11:52:07.821260 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
244 11:52:07.821395 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 11:52:07.821509 Checking files for TFTP limit of 4294967296 bytes.
246 11:52:07.822058 end: 1 tftp-deploy (duration 00:00:11) [common]
247 11:52:07.822203 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 11:52:07.822350 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 11:52:07.822538 substitutions:
250 11:52:07.822642 - {DTB}: None
251 11:52:07.822748 - {INITRD}: 10875942/tftp-deploy-m0m87qiu/ramdisk/ramdisk.cpio.gz
252 11:52:07.822852 - {KERNEL}: 10875942/tftp-deploy-m0m87qiu/kernel/bzImage
253 11:52:07.822955 - {LAVA_MAC}: None
254 11:52:07.823055 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10875942/extract-nfsrootfs-cqbcmmol
255 11:52:07.823156 - {NFS_SERVER_IP}: 192.168.201.1
256 11:52:07.823256 - {PRESEED_CONFIG}: None
257 11:52:07.823355 - {PRESEED_LOCAL}: None
258 11:52:07.823452 - {RAMDISK}: 10875942/tftp-deploy-m0m87qiu/ramdisk/ramdisk.cpio.gz
259 11:52:07.823551 - {ROOT_PART}: None
260 11:52:07.823647 - {ROOT}: None
261 11:52:07.823747 - {SERVER_IP}: 192.168.201.1
262 11:52:07.823843 - {TEE}: None
263 11:52:07.823940 Parsed boot commands:
264 11:52:07.824033 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 11:52:07.824268 Parsed boot commands: tftpboot 192.168.201.1 10875942/tftp-deploy-m0m87qiu/kernel/bzImage 10875942/tftp-deploy-m0m87qiu/kernel/cmdline 10875942/tftp-deploy-m0m87qiu/ramdisk/ramdisk.cpio.gz
266 11:52:07.824400 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 11:52:07.824531 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 11:52:07.824678 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 11:52:07.824815 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 11:52:07.824924 Not connected, no need to disconnect.
271 11:52:07.825044 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 11:52:07.825174 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 11:52:07.825282 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
274 11:52:07.828629 Setting prompt string to ['lava-test: # ']
275 11:52:07.829015 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 11:52:07.829172 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 11:52:07.829316 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 11:52:07.829453 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 11:52:07.830041 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
280 11:52:12.964917 >> Command sent successfully.
281 11:52:12.967405 Returned 0 in 5 seconds
282 11:52:13.067768 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 11:52:13.068135 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 11:52:13.068234 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 11:52:13.068324 Setting prompt string to 'Starting depthcharge on Voema...'
287 11:52:13.068390 Changing prompt to 'Starting depthcharge on Voema...'
288 11:52:13.068487 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 11:52:13.068801 [Enter `^Ec?' for help]
290 11:52:14.672695
291 11:52:14.672854
292 11:52:14.682204 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 11:52:14.688862 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
294 11:52:14.692362 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 11:52:14.695601 CPU: AES supported, TXT NOT supported, VT supported
296 11:52:14.702176 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 11:52:14.708571 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 11:52:14.711620 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 11:52:14.714945 VBOOT: Loading verstage.
300 11:52:14.721440 FMAP: Found "FLASH" version 1.1 at 0x1804000.
301 11:52:14.724743 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 11:52:14.731256 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 11:52:14.738267 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 11:52:14.744767 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 11:52:14.748547
306 11:52:14.748642
307 11:52:14.758537 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 11:52:14.773233 Probing TPM: . done!
309 11:52:14.775927 TPM ready after 0 ms
310 11:52:14.779970 Connected to device vid:did:rid of 1ae0:0028:00
311 11:52:14.790856 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
312 11:52:14.797616 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 11:52:14.800311 Initialized TPM device CR50 revision 0
314 11:52:14.852402 tlcl_send_startup: Startup return code is 0
315 11:52:14.852548 TPM: setup succeeded
316 11:52:14.867778 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 11:52:14.882367 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 11:52:14.894743 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 11:52:14.904636 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 11:52:14.908634 Chrome EC: UHEPI supported
321 11:52:14.911885 Phase 1
322 11:52:14.915265 FMAP: area GBB found @ 1805000 (458752 bytes)
323 11:52:14.925055 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 11:52:14.931646 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 11:52:14.938232 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 11:52:14.944528 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 11:52:14.948159 Recovery requested (1009000e)
328 11:52:14.951335 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 11:52:14.963466 tlcl_extend: response is 0
330 11:52:14.969984 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 11:52:14.980156 tlcl_extend: response is 0
332 11:52:14.986124 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 11:52:14.992958 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 11:52:14.999655 BS: verstage times (exec / console): total (unknown) / 142 ms
335 11:52:14.999749
336 11:52:14.999837
337 11:52:15.013188 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 11:52:15.019354 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 11:52:15.023072 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 11:52:15.026298 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 11:52:15.032780 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 11:52:15.036106 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 11:52:15.039413 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 11:52:15.042855 TCO_STS: 0000 0000
345 11:52:15.045951 GEN_PMCON: d0015038 00002200
346 11:52:15.049171 GBLRST_CAUSE: 00000000 00000000
347 11:52:15.052296 HPR_CAUSE0: 00000000
348 11:52:15.052384 prev_sleep_state 5
349 11:52:15.055607 Boot Count incremented to 21600
350 11:52:15.062033 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 11:52:15.068644 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 11:52:15.078509 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 11:52:15.085271 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 11:52:15.088680 Chrome EC: UHEPI supported
355 11:52:15.095453 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 11:52:15.106866 Probing TPM: done!
357 11:52:15.112994 Connected to device vid:did:rid of 1ae0:0028:00
358 11:52:15.124270 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
359 11:52:15.132645 Initialized TPM device CR50 revision 0
360 11:52:15.143106 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 11:52:15.149609 MRC: Hash idx 0x100b comparison successful.
362 11:52:15.152737 MRC cache found, size faa8
363 11:52:15.152820 bootmode is set to: 2
364 11:52:15.156409 SPD index = 0
365 11:52:15.163054 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 11:52:15.166182 SPD: module type is LPDDR4X
367 11:52:15.169449 SPD: module part number is MT53E512M64D4NW-046
368 11:52:15.175975 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
369 11:52:15.182663 SPD: device width 16 bits, bus width 16 bits
370 11:52:15.185371 SPD: module size is 1024 MB (per channel)
371 11:52:15.617670 CBMEM:
372 11:52:15.621128 IMD: root @ 0x76fff000 254 entries.
373 11:52:15.623672 IMD: root @ 0x76ffec00 62 entries.
374 11:52:15.626969 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 11:52:15.633498 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 11:52:15.636833 External stage cache:
377 11:52:15.640188 IMD: root @ 0x7b3ff000 254 entries.
378 11:52:15.643716 IMD: root @ 0x7b3fec00 62 entries.
379 11:52:15.659063 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 11:52:15.665623 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 11:52:15.671981 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 11:52:15.686717 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 11:52:15.693194 cse_lite: Skip switching to RW in the recovery path
384 11:52:15.693311 8 DIMMs found
385 11:52:15.693415 SMM Memory Map
386 11:52:15.699959 SMRAM : 0x7b000000 0x800000
387 11:52:15.703162 Subregion 0: 0x7b000000 0x200000
388 11:52:15.703248 Subregion 1: 0x7b200000 0x200000
389 11:52:15.707044 Subregion 2: 0x7b400000 0x400000
390 11:52:15.711104 top_of_ram = 0x77000000
391 11:52:15.717377 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 11:52:15.720851 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 11:52:15.727809 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 11:52:15.731061 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 11:52:15.740506 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 11:52:15.747177 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 11:52:15.757496 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 11:52:15.760247 Processing 211 relocs. Offset value of 0x74c0b000
399 11:52:15.769390 BS: romstage times (exec / console): total (unknown) / 277 ms
400 11:52:15.775141
401 11:52:15.775244
402 11:52:15.785484 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 11:52:15.788617 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 11:52:15.798475 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 11:52:15.805089 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 11:52:15.811582 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 11:52:15.818442 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 11:52:15.865132 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 11:52:15.871717 Processing 5008 relocs. Offset value of 0x75d98000
410 11:52:15.874892 BS: postcar times (exec / console): total (unknown) / 59 ms
411 11:52:15.878762
412 11:52:15.878866
413 11:52:15.888664 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 11:52:15.888759 Normal boot
415 11:52:15.891983 FW_CONFIG value is 0x804c02
416 11:52:15.895040 PCI: 00:07.0 disabled by fw_config
417 11:52:15.898240 PCI: 00:07.1 disabled by fw_config
418 11:52:15.902328 PCI: 00:0d.2 disabled by fw_config
419 11:52:15.905673 PCI: 00:1c.7 disabled by fw_config
420 11:52:15.912039 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 11:52:15.918728 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 11:52:15.922156 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 11:52:15.925458 GENERIC: 0.0 disabled by fw_config
424 11:52:15.932035 GENERIC: 1.0 disabled by fw_config
425 11:52:15.935408 fw_config match found: DB_USB=USB3_ACTIVE
426 11:52:15.938889 fw_config match found: DB_USB=USB3_ACTIVE
427 11:52:15.941530 fw_config match found: DB_USB=USB3_ACTIVE
428 11:52:15.948219 fw_config match found: DB_USB=USB3_ACTIVE
429 11:52:15.951739 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 11:52:15.958447 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 11:52:15.968492 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 11:52:15.975093 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 11:52:15.978288 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 11:52:15.984748 microcode: Update skipped, already up-to-date
435 11:52:15.991167 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 11:52:16.018886 Detected 4 core, 8 thread CPU.
437 11:52:16.022157 Setting up SMI for CPU
438 11:52:16.025460 IED base = 0x7b400000
439 11:52:16.028982 IED size = 0x00400000
440 11:52:16.029066 Will perform SMM setup.
441 11:52:16.035710 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
442 11:52:16.041931 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 11:52:16.048774 Processing 16 relocs. Offset value of 0x00030000
444 11:52:16.052135 Attempting to start 7 APs
445 11:52:16.054911 Waiting for 10ms after sending INIT.
446 11:52:16.071382 Waiting for 1st SIPI to complete...done.
447 11:52:16.071524 AP: slot 6 apic_id 6.
448 11:52:16.074160 AP: slot 3 apic_id 7.
449 11:52:16.077351 Waiting for 2nd SIPI to complete...done.
450 11:52:16.080726 AP: slot 1 apic_id 1.
451 11:52:16.084113 AP: slot 7 apic_id 3.
452 11:52:16.084233 AP: slot 4 apic_id 2.
453 11:52:16.087362 AP: slot 5 apic_id 4.
454 11:52:16.090630 AP: slot 2 apic_id 5.
455 11:52:16.097723 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 11:52:16.103646 Processing 13 relocs. Offset value of 0x00038000
457 11:52:16.107024 Unable to locate Global NVS
458 11:52:16.114100 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 11:52:16.117333 Installing permanent SMM handler to 0x7b000000
460 11:52:16.127188 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 11:52:16.130561 Processing 794 relocs. Offset value of 0x7b010000
462 11:52:16.139992 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 11:52:16.143302 Processing 13 relocs. Offset value of 0x7b008000
464 11:52:16.150019 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 11:52:16.156817 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 11:52:16.163436 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 11:52:16.166809 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 11:52:16.173417 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 11:52:16.180148 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 11:52:16.186667 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 11:52:16.189869 Unable to locate Global NVS
472 11:52:16.196406 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 11:52:16.199649 Clearing SMI status registers
474 11:52:16.202924 SMI_STS: PM1
475 11:52:16.203008 PM1_STS: PWRBTN
476 11:52:16.209511 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 11:52:16.212900 In relocation handler: CPU 0
478 11:52:16.219634 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 11:52:16.222807 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 11:52:16.226076 Relocation complete.
481 11:52:16.232551 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 11:52:16.235979 In relocation handler: CPU 1
483 11:52:16.239342 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 11:52:16.242784 Relocation complete.
485 11:52:16.249452 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
486 11:52:16.252185 In relocation handler: CPU 5
487 11:52:16.255398 New SMBASE=0x7affec00 IEDBASE=0x7b400000
488 11:52:16.262075 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 11:52:16.262169 Relocation complete.
490 11:52:16.268821 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
491 11:52:16.272215 In relocation handler: CPU 2
492 11:52:16.275499 New SMBASE=0x7afff800 IEDBASE=0x7b400000
493 11:52:16.278824 Relocation complete.
494 11:52:16.285307 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
495 11:52:16.288682 In relocation handler: CPU 4
496 11:52:16.292052 New SMBASE=0x7afff000 IEDBASE=0x7b400000
497 11:52:16.298495 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 11:52:16.301849 Relocation complete.
499 11:52:16.308450 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
500 11:52:16.311966 In relocation handler: CPU 7
501 11:52:16.315034 New SMBASE=0x7affe400 IEDBASE=0x7b400000
502 11:52:16.318273 Relocation complete.
503 11:52:16.324684 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
504 11:52:16.328522 In relocation handler: CPU 6
505 11:52:16.331888 New SMBASE=0x7affe800 IEDBASE=0x7b400000
506 11:52:16.334551 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 11:52:16.338024 Relocation complete.
508 11:52:16.344738 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
509 11:52:16.348062 In relocation handler: CPU 3
510 11:52:16.351269 New SMBASE=0x7afff400 IEDBASE=0x7b400000
511 11:52:16.354782 Relocation complete.
512 11:52:16.357984 Initializing CPU #0
513 11:52:16.361464 CPU: vendor Intel device 806c1
514 11:52:16.364198 CPU: family 06, model 8c, stepping 01
515 11:52:16.367502 Clearing out pending MCEs
516 11:52:16.370858 Setting up local APIC...
517 11:52:16.370938 apic_id: 0x00 done.
518 11:52:16.374731 Turbo is available but hidden
519 11:52:16.378802 Turbo is available and visible
520 11:52:16.382179 microcode: Update skipped, already up-to-date
521 11:52:16.385023 CPU #0 initialized
522 11:52:16.385111 Initializing CPU #2
523 11:52:16.388402 Initializing CPU #5
524 11:52:16.392258 CPU: vendor Intel device 806c1
525 11:52:16.394954 CPU: family 06, model 8c, stepping 01
526 11:52:16.398232 CPU: vendor Intel device 806c1
527 11:52:16.401565 CPU: family 06, model 8c, stepping 01
528 11:52:16.404793 Clearing out pending MCEs
529 11:52:16.408206 Clearing out pending MCEs
530 11:52:16.412052 Setting up local APIC...
531 11:52:16.412144 Initializing CPU #3
532 11:52:16.414840 Initializing CPU #6
533 11:52:16.418073 CPU: vendor Intel device 806c1
534 11:52:16.421305 CPU: family 06, model 8c, stepping 01
535 11:52:16.424739 CPU: vendor Intel device 806c1
536 11:52:16.428065 CPU: family 06, model 8c, stepping 01
537 11:52:16.431864 Clearing out pending MCEs
538 11:52:16.435114 Clearing out pending MCEs
539 11:52:16.435224 Setting up local APIC...
540 11:52:16.438378 Initializing CPU #1
541 11:52:16.441132 Initializing CPU #4
542 11:52:16.441210 Initializing CPU #7
543 11:52:16.444477 CPU: vendor Intel device 806c1
544 11:52:16.448521 CPU: family 06, model 8c, stepping 01
545 11:52:16.451111 apic_id: 0x04 done.
546 11:52:16.454406 apic_id: 0x05 done.
547 11:52:16.457755 microcode: Update skipped, already up-to-date
548 11:52:16.461102 microcode: Update skipped, already up-to-date
549 11:52:16.464365 CPU #5 initialized
550 11:52:16.467646 CPU #2 initialized
551 11:52:16.471128 CPU: vendor Intel device 806c1
552 11:52:16.474474 CPU: family 06, model 8c, stepping 01
553 11:52:16.477910 Clearing out pending MCEs
554 11:52:16.478021 Clearing out pending MCEs
555 11:52:16.481222 Setting up local APIC...
556 11:52:16.484638 Setting up local APIC...
557 11:52:16.487990 Setting up local APIC...
558 11:52:16.488072 apic_id: 0x02 done.
559 11:52:16.491151 Setting up local APIC...
560 11:52:16.494544 CPU: vendor Intel device 806c1
561 11:52:16.497318 CPU: family 06, model 8c, stepping 01
562 11:52:16.500643 apic_id: 0x03 done.
563 11:52:16.504004 microcode: Update skipped, already up-to-date
564 11:52:16.510577 microcode: Update skipped, already up-to-date
565 11:52:16.510662 CPU #4 initialized
566 11:52:16.513966 CPU #7 initialized
567 11:52:16.514051 apic_id: 0x07 done.
568 11:52:16.517216 apic_id: 0x06 done.
569 11:52:16.520569 microcode: Update skipped, already up-to-date
570 11:52:16.527199 microcode: Update skipped, already up-to-date
571 11:52:16.527285 CPU #3 initialized
572 11:52:16.530635 CPU #6 initialized
573 11:52:16.533982 Clearing out pending MCEs
574 11:52:16.537419 Setting up local APIC...
575 11:52:16.537503 apic_id: 0x01 done.
576 11:52:16.544121 microcode: Update skipped, already up-to-date
577 11:52:16.544206 CPU #1 initialized
578 11:52:16.550972 bsp_do_flight_plan done after 466 msecs.
579 11:52:16.553626 CPU: frequency set to 4000 MHz
580 11:52:16.553711 Enabling SMIs.
581 11:52:16.560139 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
582 11:52:16.576221 SATAXPCIE1 indicates PCIe NVMe is present
583 11:52:16.579765 Probing TPM: done!
584 11:52:16.583081 Connected to device vid:did:rid of 1ae0:0028:00
585 11:52:16.593864 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
586 11:52:16.596718 Initialized TPM device CR50 revision 0
587 11:52:16.600119 Enabling S0i3.4
588 11:52:16.606821 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 11:52:16.610061 Found a VBT of 8704 bytes after decompression
590 11:52:16.616521 cse_lite: CSE RO boot. HybridStorageMode disabled
591 11:52:16.623124 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 11:52:16.699110 FSPS returned 0
593 11:52:16.702339 Executing Phase 1 of FspMultiPhaseSiInit
594 11:52:16.712396 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 11:52:16.715689 port C0 DISC req: usage 1 usb3 1 usb2 5
596 11:52:16.719095 Raw Buffer output 0 00000511
597 11:52:16.722262 Raw Buffer output 1 00000000
598 11:52:16.726189 pmc_send_ipc_cmd succeeded
599 11:52:16.732705 port C1 DISC req: usage 1 usb3 2 usb2 3
600 11:52:16.732823 Raw Buffer output 0 00000321
601 11:52:16.735902 Raw Buffer output 1 00000000
602 11:52:16.740451 pmc_send_ipc_cmd succeeded
603 11:52:16.745607 Detected 4 core, 8 thread CPU.
604 11:52:16.749038 Detected 4 core, 8 thread CPU.
605 11:52:16.982627 Display FSP Version Info HOB
606 11:52:16.986490 Reference Code - CPU = a.0.4c.31
607 11:52:16.989225 uCode Version = 0.0.0.86
608 11:52:16.992738 TXT ACM version = ff.ff.ff.ffff
609 11:52:16.996040 Reference Code - ME = a.0.4c.31
610 11:52:16.999403 MEBx version = 0.0.0.0
611 11:52:17.002726 ME Firmware Version = Consumer SKU
612 11:52:17.006067 Reference Code - PCH = a.0.4c.31
613 11:52:17.009412 PCH-CRID Status = Disabled
614 11:52:17.012837 PCH-CRID Original Value = ff.ff.ff.ffff
615 11:52:17.015456 PCH-CRID New Value = ff.ff.ff.ffff
616 11:52:17.018785 OPROM - RST - RAID = ff.ff.ff.ffff
617 11:52:17.022730 PCH Hsio Version = 4.0.0.0
618 11:52:17.026034 Reference Code - SA - System Agent = a.0.4c.31
619 11:52:17.029315 Reference Code - MRC = 2.0.0.1
620 11:52:17.032518 SA - PCIe Version = a.0.4c.31
621 11:52:17.035915 SA-CRID Status = Disabled
622 11:52:17.038730 SA-CRID Original Value = 0.0.0.1
623 11:52:17.042116 SA-CRID New Value = 0.0.0.1
624 11:52:17.045322 OPROM - VBIOS = ff.ff.ff.ffff
625 11:52:17.048548 IO Manageability Engine FW Version = 11.1.4.0
626 11:52:17.052466 PHY Build Version = 0.0.0.e0
627 11:52:17.055706 Thunderbolt(TM) FW Version = 0.0.0.0
628 11:52:17.062126 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 11:52:17.065281 ITSS IRQ Polarities Before:
630 11:52:17.065370 IPC0: 0xffffffff
631 11:52:17.068695 IPC1: 0xffffffff
632 11:52:17.071894 IPC2: 0xffffffff
633 11:52:17.071988 IPC3: 0xffffffff
634 11:52:17.075243 ITSS IRQ Polarities After:
635 11:52:17.075329 IPC0: 0xffffffff
636 11:52:17.078481 IPC1: 0xffffffff
637 11:52:17.078568 IPC2: 0xffffffff
638 11:52:17.081886 IPC3: 0xffffffff
639 11:52:17.085272 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 11:52:17.098136 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 11:52:17.108185 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 11:52:17.121471 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 11:52:17.128130 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
644 11:52:17.131514 Enumerating buses...
645 11:52:17.134908 Show all devs... Before device enumeration.
646 11:52:17.138137 Root Device: enabled 1
647 11:52:17.141223 DOMAIN: 0000: enabled 1
648 11:52:17.141307 CPU_CLUSTER: 0: enabled 1
649 11:52:17.144754 PCI: 00:00.0: enabled 1
650 11:52:17.147973 PCI: 00:02.0: enabled 1
651 11:52:17.151233 PCI: 00:04.0: enabled 1
652 11:52:17.151389 PCI: 00:05.0: enabled 1
653 11:52:17.154603 PCI: 00:06.0: enabled 0
654 11:52:17.157644 PCI: 00:07.0: enabled 0
655 11:52:17.157750 PCI: 00:07.1: enabled 0
656 11:52:17.160963 PCI: 00:07.2: enabled 0
657 11:52:17.164130 PCI: 00:07.3: enabled 0
658 11:52:17.167977 PCI: 00:08.0: enabled 1
659 11:52:17.168062 PCI: 00:09.0: enabled 0
660 11:52:17.171353 PCI: 00:0a.0: enabled 0
661 11:52:17.174669 PCI: 00:0d.0: enabled 1
662 11:52:17.177936 PCI: 00:0d.1: enabled 0
663 11:52:17.178050 PCI: 00:0d.2: enabled 0
664 11:52:17.180721 PCI: 00:0d.3: enabled 0
665 11:52:17.184015 PCI: 00:0e.0: enabled 0
666 11:52:17.187341 PCI: 00:10.2: enabled 1
667 11:52:17.187453 PCI: 00:10.6: enabled 0
668 11:52:17.190768 PCI: 00:10.7: enabled 0
669 11:52:17.193967 PCI: 00:12.0: enabled 0
670 11:52:17.197236 PCI: 00:12.6: enabled 0
671 11:52:17.197356 PCI: 00:13.0: enabled 0
672 11:52:17.200683 PCI: 00:14.0: enabled 1
673 11:52:17.203990 PCI: 00:14.1: enabled 0
674 11:52:17.207245 PCI: 00:14.2: enabled 1
675 11:52:17.207357 PCI: 00:14.3: enabled 1
676 11:52:17.210664 PCI: 00:15.0: enabled 1
677 11:52:17.214079 PCI: 00:15.1: enabled 1
678 11:52:17.216758 PCI: 00:15.2: enabled 1
679 11:52:17.216860 PCI: 00:15.3: enabled 1
680 11:52:17.220671 PCI: 00:16.0: enabled 1
681 11:52:17.223337 PCI: 00:16.1: enabled 0
682 11:52:17.226689 PCI: 00:16.2: enabled 0
683 11:52:17.226798 PCI: 00:16.3: enabled 0
684 11:52:17.230010 PCI: 00:16.4: enabled 0
685 11:52:17.233471 PCI: 00:16.5: enabled 0
686 11:52:17.236873 PCI: 00:17.0: enabled 1
687 11:52:17.236956 PCI: 00:19.0: enabled 0
688 11:52:17.240050 PCI: 00:19.1: enabled 1
689 11:52:17.243341 PCI: 00:19.2: enabled 0
690 11:52:17.243448 PCI: 00:1c.0: enabled 1
691 11:52:17.246771 PCI: 00:1c.1: enabled 0
692 11:52:17.249991 PCI: 00:1c.2: enabled 0
693 11:52:17.253246 PCI: 00:1c.3: enabled 0
694 11:52:17.253353 PCI: 00:1c.4: enabled 0
695 11:52:17.256768 PCI: 00:1c.5: enabled 0
696 11:52:17.259871 PCI: 00:1c.6: enabled 1
697 11:52:17.263163 PCI: 00:1c.7: enabled 0
698 11:52:17.263271 PCI: 00:1d.0: enabled 1
699 11:52:17.266337 PCI: 00:1d.1: enabled 0
700 11:52:17.270187 PCI: 00:1d.2: enabled 1
701 11:52:17.273516 PCI: 00:1d.3: enabled 0
702 11:52:17.273599 PCI: 00:1e.0: enabled 1
703 11:52:17.276937 PCI: 00:1e.1: enabled 0
704 11:52:17.279855 PCI: 00:1e.2: enabled 1
705 11:52:17.283405 PCI: 00:1e.3: enabled 1
706 11:52:17.283516 PCI: 00:1f.0: enabled 1
707 11:52:17.286138 PCI: 00:1f.1: enabled 0
708 11:52:17.289663 PCI: 00:1f.2: enabled 1
709 11:52:17.293013 PCI: 00:1f.3: enabled 1
710 11:52:17.293102 PCI: 00:1f.4: enabled 0
711 11:52:17.296370 PCI: 00:1f.5: enabled 1
712 11:52:17.299793 PCI: 00:1f.6: enabled 0
713 11:52:17.299965 PCI: 00:1f.7: enabled 0
714 11:52:17.303230 APIC: 00: enabled 1
715 11:52:17.306600 GENERIC: 0.0: enabled 1
716 11:52:17.309881 GENERIC: 0.0: enabled 1
717 11:52:17.310060 GENERIC: 1.0: enabled 1
718 11:52:17.312497 GENERIC: 0.0: enabled 1
719 11:52:17.316524 GENERIC: 1.0: enabled 1
720 11:52:17.319878 USB0 port 0: enabled 1
721 11:52:17.319962 GENERIC: 0.0: enabled 1
722 11:52:17.323110 USB0 port 0: enabled 1
723 11:52:17.326416 GENERIC: 0.0: enabled 1
724 11:52:17.326500 I2C: 00:1a: enabled 1
725 11:52:17.329743 I2C: 00:31: enabled 1
726 11:52:17.332383 I2C: 00:32: enabled 1
727 11:52:17.332493 I2C: 00:10: enabled 1
728 11:52:17.335693 I2C: 00:15: enabled 1
729 11:52:17.339104 GENERIC: 0.0: enabled 0
730 11:52:17.342419 GENERIC: 1.0: enabled 0
731 11:52:17.342502 GENERIC: 0.0: enabled 1
732 11:52:17.345725 SPI: 00: enabled 1
733 11:52:17.345824 SPI: 00: enabled 1
734 11:52:17.349159 PNP: 0c09.0: enabled 1
735 11:52:17.353002 GENERIC: 0.0: enabled 1
736 11:52:17.356330 USB3 port 0: enabled 1
737 11:52:17.356435 USB3 port 1: enabled 1
738 11:52:17.359444 USB3 port 2: enabled 0
739 11:52:17.362586 USB3 port 3: enabled 0
740 11:52:17.365811 USB2 port 0: enabled 0
741 11:52:17.365897 USB2 port 1: enabled 1
742 11:52:17.368992 USB2 port 2: enabled 1
743 11:52:17.372306 USB2 port 3: enabled 0
744 11:52:17.372391 USB2 port 4: enabled 1
745 11:52:17.375999 USB2 port 5: enabled 0
746 11:52:17.379121 USB2 port 6: enabled 0
747 11:52:17.379220 USB2 port 7: enabled 0
748 11:52:17.382342 USB2 port 8: enabled 0
749 11:52:17.385650 USB2 port 9: enabled 0
750 11:52:17.389085 USB3 port 0: enabled 0
751 11:52:17.389167 USB3 port 1: enabled 1
752 11:52:17.392371 USB3 port 2: enabled 0
753 11:52:17.395861 USB3 port 3: enabled 0
754 11:52:17.395943 GENERIC: 0.0: enabled 1
755 11:52:17.398507 GENERIC: 1.0: enabled 1
756 11:52:17.401739 APIC: 01: enabled 1
757 11:52:17.401813 APIC: 05: enabled 1
758 11:52:17.405676 APIC: 07: enabled 1
759 11:52:17.408328 APIC: 02: enabled 1
760 11:52:17.408417 APIC: 04: enabled 1
761 11:52:17.411592 APIC: 06: enabled 1
762 11:52:17.415030 APIC: 03: enabled 1
763 11:52:17.415104 Compare with tree...
764 11:52:17.418385 Root Device: enabled 1
765 11:52:17.421970 DOMAIN: 0000: enabled 1
766 11:52:17.425085 PCI: 00:00.0: enabled 1
767 11:52:17.425177 PCI: 00:02.0: enabled 1
768 11:52:17.428490 PCI: 00:04.0: enabled 1
769 11:52:17.431733 GENERIC: 0.0: enabled 1
770 11:52:17.435251 PCI: 00:05.0: enabled 1
771 11:52:17.438570 PCI: 00:06.0: enabled 0
772 11:52:17.438662 PCI: 00:07.0: enabled 0
773 11:52:17.441333 GENERIC: 0.0: enabled 1
774 11:52:17.444733 PCI: 00:07.1: enabled 0
775 11:52:17.447963 GENERIC: 1.0: enabled 1
776 11:52:17.451878 PCI: 00:07.2: enabled 0
777 11:52:17.451968 GENERIC: 0.0: enabled 1
778 11:52:17.455041 PCI: 00:07.3: enabled 0
779 11:52:17.458407 GENERIC: 1.0: enabled 1
780 11:52:17.461022 PCI: 00:08.0: enabled 1
781 11:52:17.464301 PCI: 00:09.0: enabled 0
782 11:52:17.464385 PCI: 00:0a.0: enabled 0
783 11:52:17.468201 PCI: 00:0d.0: enabled 1
784 11:52:17.471484 USB0 port 0: enabled 1
785 11:52:17.474743 USB3 port 0: enabled 1
786 11:52:17.477891 USB3 port 1: enabled 1
787 11:52:17.481110 USB3 port 2: enabled 0
788 11:52:17.481194 USB3 port 3: enabled 0
789 11:52:17.484867 PCI: 00:0d.1: enabled 0
790 11:52:17.487809 PCI: 00:0d.2: enabled 0
791 11:52:17.491054 GENERIC: 0.0: enabled 1
792 11:52:17.494465 PCI: 00:0d.3: enabled 0
793 11:52:17.494549 PCI: 00:0e.0: enabled 0
794 11:52:17.497841 PCI: 00:10.2: enabled 1
795 11:52:17.500981 PCI: 00:10.6: enabled 0
796 11:52:17.504499 PCI: 00:10.7: enabled 0
797 11:52:17.508034 PCI: 00:12.0: enabled 0
798 11:52:17.508118 PCI: 00:12.6: enabled 0
799 11:52:17.510655 PCI: 00:13.0: enabled 0
800 11:52:17.514111 PCI: 00:14.0: enabled 1
801 11:52:17.517405 USB0 port 0: enabled 1
802 11:52:17.520858 USB2 port 0: enabled 0
803 11:52:17.520962 USB2 port 1: enabled 1
804 11:52:17.524271 USB2 port 2: enabled 1
805 11:52:17.527578 USB2 port 3: enabled 0
806 11:52:17.531062 USB2 port 4: enabled 1
807 11:52:17.534408 USB2 port 5: enabled 0
808 11:52:17.537162 USB2 port 6: enabled 0
809 11:52:17.537246 USB2 port 7: enabled 0
810 11:52:17.540561 USB2 port 8: enabled 0
811 11:52:17.543722 USB2 port 9: enabled 0
812 11:52:17.546999 USB3 port 0: enabled 0
813 11:52:17.550921 USB3 port 1: enabled 1
814 11:52:17.554314 USB3 port 2: enabled 0
815 11:52:17.554409 USB3 port 3: enabled 0
816 11:52:17.557572 PCI: 00:14.1: enabled 0
817 11:52:17.560787 PCI: 00:14.2: enabled 1
818 11:52:17.564132 PCI: 00:14.3: enabled 1
819 11:52:17.567265 GENERIC: 0.0: enabled 1
820 11:52:17.567354 PCI: 00:15.0: enabled 1
821 11:52:17.570671 I2C: 00:1a: enabled 1
822 11:52:17.573832 I2C: 00:31: enabled 1
823 11:52:17.577006 I2C: 00:32: enabled 1
824 11:52:17.580265 PCI: 00:15.1: enabled 1
825 11:52:17.580366 I2C: 00:10: enabled 1
826 11:52:17.583412 PCI: 00:15.2: enabled 1
827 11:52:17.587165 PCI: 00:15.3: enabled 1
828 11:52:17.590207 PCI: 00:16.0: enabled 1
829 11:52:17.590309 PCI: 00:16.1: enabled 0
830 11:52:17.593364 PCI: 00:16.2: enabled 0
831 11:52:17.596782 PCI: 00:16.3: enabled 0
832 11:52:17.600159 PCI: 00:16.4: enabled 0
833 11:52:17.603450 PCI: 00:16.5: enabled 0
834 11:52:17.606826 PCI: 00:17.0: enabled 1
835 11:52:17.606922 PCI: 00:19.0: enabled 0
836 11:52:17.610148 PCI: 00:19.1: enabled 1
837 11:52:17.612848 I2C: 00:15: enabled 1
838 11:52:17.663145 PCI: 00:19.2: enabled 0
839 11:52:17.663297 PCI: 00:1d.0: enabled 1
840 11:52:17.663384 GENERIC: 0.0: enabled 1
841 11:52:17.663651 PCI: 00:1e.0: enabled 1
842 11:52:17.663727 PCI: 00:1e.1: enabled 0
843 11:52:17.663794 PCI: 00:1e.2: enabled 1
844 11:52:17.663862 SPI: 00: enabled 1
845 11:52:17.663927 PCI: 00:1e.3: enabled 1
846 11:52:17.663992 SPI: 00: enabled 1
847 11:52:17.664055 PCI: 00:1f.0: enabled 1
848 11:52:17.664119 PNP: 0c09.0: enabled 1
849 11:52:17.664181 PCI: 00:1f.1: enabled 0
850 11:52:17.664244 PCI: 00:1f.2: enabled 1
851 11:52:17.664306 GENERIC: 0.0: enabled 1
852 11:52:17.664368 GENERIC: 0.0: enabled 1
853 11:52:17.664444 GENERIC: 1.0: enabled 1
854 11:52:17.664509 PCI: 00:1f.3: enabled 1
855 11:52:17.664587 PCI: 00:1f.4: enabled 0
856 11:52:17.664651 PCI: 00:1f.5: enabled 1
857 11:52:17.678251 PCI: 00:1f.6: enabled 0
858 11:52:17.678387 PCI: 00:1f.7: enabled 0
859 11:52:17.678519 CPU_CLUSTER: 0: enabled 1
860 11:52:17.678910 APIC: 00: enabled 1
861 11:52:17.679016 APIC: 01: enabled 1
862 11:52:17.681443 APIC: 05: enabled 1
863 11:52:17.681606 APIC: 07: enabled 1
864 11:52:17.681748 APIC: 02: enabled 1
865 11:52:17.685345 APIC: 04: enabled 1
866 11:52:17.685533 APIC: 06: enabled 1
867 11:52:17.688432 APIC: 03: enabled 1
868 11:52:17.691692 Root Device scanning...
869 11:52:17.694958 scan_static_bus for Root Device
870 11:52:17.698357 DOMAIN: 0000 enabled
871 11:52:17.701692 CPU_CLUSTER: 0 enabled
872 11:52:17.701894 DOMAIN: 0000 scanning...
873 11:52:17.704998 PCI: pci_scan_bus for bus 00
874 11:52:17.708412 PCI: 00:00.0 [8086/0000] ops
875 11:52:17.711811 PCI: 00:00.0 [8086/9a12] enabled
876 11:52:17.715137 PCI: 00:02.0 [8086/0000] bus ops
877 11:52:17.718551 PCI: 00:02.0 [8086/9a40] enabled
878 11:52:17.721774 PCI: 00:04.0 [8086/0000] bus ops
879 11:52:17.725259 PCI: 00:04.0 [8086/9a03] enabled
880 11:52:17.728592 PCI: 00:05.0 [8086/9a19] enabled
881 11:52:17.731300 PCI: 00:07.0 [0000/0000] hidden
882 11:52:17.734685 PCI: 00:08.0 [8086/9a11] enabled
883 11:52:17.737948 PCI: 00:0a.0 [8086/9a0d] disabled
884 11:52:17.741434 PCI: 00:0d.0 [8086/0000] bus ops
885 11:52:17.744772 PCI: 00:0d.0 [8086/9a13] enabled
886 11:52:17.748095 PCI: 00:14.0 [8086/0000] bus ops
887 11:52:17.751504 PCI: 00:14.0 [8086/a0ed] enabled
888 11:52:17.754792 PCI: 00:14.2 [8086/a0ef] enabled
889 11:52:17.758145 PCI: 00:14.3 [8086/0000] bus ops
890 11:52:17.761529 PCI: 00:14.3 [8086/a0f0] enabled
891 11:52:17.764833 PCI: 00:15.0 [8086/0000] bus ops
892 11:52:17.768036 PCI: 00:15.0 [8086/a0e8] enabled
893 11:52:17.774839 PCI: 00:15.1 [8086/0000] bus ops
894 11:52:17.777725 PCI: 00:15.1 [8086/a0e9] enabled
895 11:52:17.781036 PCI: 00:15.2 [8086/0000] bus ops
896 11:52:17.784319 PCI: 00:15.2 [8086/a0ea] enabled
897 11:52:17.787528 PCI: 00:15.3 [8086/0000] bus ops
898 11:52:17.791501 PCI: 00:15.3 [8086/a0eb] enabled
899 11:52:17.791958 PCI: 00:16.0 [8086/0000] ops
900 11:52:17.794718 PCI: 00:16.0 [8086/a0e0] enabled
901 11:52:17.800758 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 11:52:17.804485 PCI: 00:19.0 [8086/0000] bus ops
903 11:52:17.807471 PCI: 00:19.0 [8086/a0c5] disabled
904 11:52:17.811002 PCI: 00:19.1 [8086/0000] bus ops
905 11:52:17.814366 PCI: 00:19.1 [8086/a0c6] enabled
906 11:52:17.817727 PCI: 00:1d.0 [8086/0000] bus ops
907 11:52:17.821134 PCI: 00:1d.0 [8086/a0b0] enabled
908 11:52:17.823803 PCI: 00:1e.0 [8086/0000] ops
909 11:52:17.827179 PCI: 00:1e.0 [8086/a0a8] enabled
910 11:52:17.830570 PCI: 00:1e.2 [8086/0000] bus ops
911 11:52:17.833762 PCI: 00:1e.2 [8086/a0aa] enabled
912 11:52:17.837264 PCI: 00:1e.3 [8086/0000] bus ops
913 11:52:17.840390 PCI: 00:1e.3 [8086/a0ab] enabled
914 11:52:17.843630 PCI: 00:1f.0 [8086/0000] bus ops
915 11:52:17.847091 PCI: 00:1f.0 [8086/a087] enabled
916 11:52:17.850489 RTC Init
917 11:52:17.853930 Set power on after power failure.
918 11:52:17.854227 Disabling Deep S3
919 11:52:17.857226 Disabling Deep S3
920 11:52:17.857522 Disabling Deep S4
921 11:52:17.859804 Disabling Deep S4
922 11:52:17.863309 Disabling Deep S5
923 11:52:17.863494 Disabling Deep S5
924 11:52:17.866583 PCI: 00:1f.2 [0000/0000] hidden
925 11:52:17.869821 PCI: 00:1f.3 [8086/0000] bus ops
926 11:52:17.873070 PCI: 00:1f.3 [8086/a0c8] enabled
927 11:52:17.876344 PCI: 00:1f.5 [8086/0000] bus ops
928 11:52:17.879623 PCI: 00:1f.5 [8086/a0a4] enabled
929 11:52:17.883121 PCI: Leftover static devices:
930 11:52:17.886510 PCI: 00:10.2
931 11:52:17.886624 PCI: 00:10.6
932 11:52:17.886715 PCI: 00:10.7
933 11:52:17.889832 PCI: 00:06.0
934 11:52:17.889949 PCI: 00:07.1
935 11:52:17.893026 PCI: 00:07.2
936 11:52:17.893146 PCI: 00:07.3
937 11:52:17.893236 PCI: 00:09.0
938 11:52:17.896099 PCI: 00:0d.1
939 11:52:17.896180 PCI: 00:0d.2
940 11:52:17.899316 PCI: 00:0d.3
941 11:52:17.899397 PCI: 00:0e.0
942 11:52:17.902599 PCI: 00:12.0
943 11:52:17.902681 PCI: 00:12.6
944 11:52:17.902746 PCI: 00:13.0
945 11:52:17.905887 PCI: 00:14.1
946 11:52:17.905969 PCI: 00:16.1
947 11:52:17.909202 PCI: 00:16.2
948 11:52:17.909283 PCI: 00:16.3
949 11:52:17.909355 PCI: 00:16.4
950 11:52:17.912935 PCI: 00:16.5
951 11:52:17.913034 PCI: 00:17.0
952 11:52:17.916048 PCI: 00:19.2
953 11:52:17.916156 PCI: 00:1e.1
954 11:52:17.916223 PCI: 00:1f.1
955 11:52:17.919312 PCI: 00:1f.4
956 11:52:17.919394 PCI: 00:1f.6
957 11:52:17.922644 PCI: 00:1f.7
958 11:52:17.926003 PCI: Check your devicetree.cb.
959 11:52:17.926085 PCI: 00:02.0 scanning...
960 11:52:17.932509 scan_generic_bus for PCI: 00:02.0
961 11:52:17.935973 scan_generic_bus for PCI: 00:02.0 done
962 11:52:17.939379 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 11:52:17.942786 PCI: 00:04.0 scanning...
964 11:52:17.946114 scan_generic_bus for PCI: 00:04.0
965 11:52:17.949373 GENERIC: 0.0 enabled
966 11:52:17.952203 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 11:52:17.959028 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 11:52:17.962431 PCI: 00:0d.0 scanning...
969 11:52:17.965842 scan_static_bus for PCI: 00:0d.0
970 11:52:17.965926 USB0 port 0 enabled
971 11:52:17.969204 USB0 port 0 scanning...
972 11:52:17.972425 scan_static_bus for USB0 port 0
973 11:52:17.975737 USB3 port 0 enabled
974 11:52:17.975820 USB3 port 1 enabled
975 11:52:17.978801 USB3 port 2 disabled
976 11:52:17.982178 USB3 port 3 disabled
977 11:52:17.985509 USB3 port 0 scanning...
978 11:52:17.988969 scan_static_bus for USB3 port 0
979 11:52:17.991671 scan_static_bus for USB3 port 0 done
980 11:52:17.995664 scan_bus: bus USB3 port 0 finished in 6 msecs
981 11:52:17.998360 USB3 port 1 scanning...
982 11:52:18.001570 scan_static_bus for USB3 port 1
983 11:52:18.004987 scan_static_bus for USB3 port 1 done
984 11:52:18.008169 scan_bus: bus USB3 port 1 finished in 6 msecs
985 11:52:18.014833 scan_static_bus for USB0 port 0 done
986 11:52:18.018004 scan_bus: bus USB0 port 0 finished in 43 msecs
987 11:52:18.021902 scan_static_bus for PCI: 00:0d.0 done
988 11:52:18.028497 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 11:52:18.028633 PCI: 00:14.0 scanning...
990 11:52:18.031248 scan_static_bus for PCI: 00:14.0
991 11:52:18.034612 USB0 port 0 enabled
992 11:52:18.038069 USB0 port 0 scanning...
993 11:52:18.041416 scan_static_bus for USB0 port 0
994 11:52:18.041501 USB2 port 0 disabled
995 11:52:18.044741 USB2 port 1 enabled
996 11:52:18.048125 USB2 port 2 enabled
997 11:52:18.048247 USB2 port 3 disabled
998 11:52:18.051511 USB2 port 4 enabled
999 11:52:18.054274 USB2 port 5 disabled
1000 11:52:18.054390 USB2 port 6 disabled
1001 11:52:18.057624 USB2 port 7 disabled
1002 11:52:18.060982 USB2 port 8 disabled
1003 11:52:18.061113 USB2 port 9 disabled
1004 11:52:18.064310 USB3 port 0 disabled
1005 11:52:18.067715 USB3 port 1 enabled
1006 11:52:18.067811 USB3 port 2 disabled
1007 11:52:18.071097 USB3 port 3 disabled
1008 11:52:18.074366 USB2 port 1 scanning...
1009 11:52:18.077778 scan_static_bus for USB2 port 1
1010 11:52:18.081106 scan_static_bus for USB2 port 1 done
1011 11:52:18.084151 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 11:52:18.087337 USB2 port 2 scanning...
1013 11:52:18.090587 scan_static_bus for USB2 port 2
1014 11:52:18.093993 scan_static_bus for USB2 port 2 done
1015 11:52:18.097464 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 11:52:18.100745 USB2 port 4 scanning...
1017 11:52:18.103978 scan_static_bus for USB2 port 4
1018 11:52:18.107324 scan_static_bus for USB2 port 4 done
1019 11:52:18.113802 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 11:52:18.113900 USB3 port 1 scanning...
1021 11:52:18.117684 scan_static_bus for USB3 port 1
1022 11:52:18.124124 scan_static_bus for USB3 port 1 done
1023 11:52:18.127304 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 11:52:18.130793 scan_static_bus for USB0 port 0 done
1025 11:52:18.137380 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 11:52:18.140802 scan_static_bus for PCI: 00:14.0 done
1027 11:52:18.144041 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1028 11:52:18.147507 PCI: 00:14.3 scanning...
1029 11:52:18.150715 scan_static_bus for PCI: 00:14.3
1030 11:52:18.154003 GENERIC: 0.0 enabled
1031 11:52:18.157432 scan_static_bus for PCI: 00:14.3 done
1032 11:52:18.160090 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 11:52:18.163549 PCI: 00:15.0 scanning...
1034 11:52:18.166897 scan_static_bus for PCI: 00:15.0
1035 11:52:18.170193 I2C: 00:1a enabled
1036 11:52:18.170270 I2C: 00:31 enabled
1037 11:52:18.173651 I2C: 00:32 enabled
1038 11:52:18.177022 scan_static_bus for PCI: 00:15.0 done
1039 11:52:18.180261 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 11:52:18.183568 PCI: 00:15.1 scanning...
1041 11:52:18.186931 scan_static_bus for PCI: 00:15.1
1042 11:52:18.190099 I2C: 00:10 enabled
1043 11:52:18.193201 scan_static_bus for PCI: 00:15.1 done
1044 11:52:18.196678 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 11:52:18.200013 PCI: 00:15.2 scanning...
1046 11:52:18.203363 scan_static_bus for PCI: 00:15.2
1047 11:52:18.206629 scan_static_bus for PCI: 00:15.2 done
1048 11:52:18.213451 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 11:52:18.216667 PCI: 00:15.3 scanning...
1050 11:52:18.219734 scan_static_bus for PCI: 00:15.3
1051 11:52:18.223714 scan_static_bus for PCI: 00:15.3 done
1052 11:52:18.226888 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 11:52:18.230135 PCI: 00:19.1 scanning...
1054 11:52:18.233322 scan_static_bus for PCI: 00:19.1
1055 11:52:18.236838 I2C: 00:15 enabled
1056 11:52:18.240102 scan_static_bus for PCI: 00:19.1 done
1057 11:52:18.243328 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 11:52:18.246742 PCI: 00:1d.0 scanning...
1059 11:52:18.249929 do_pci_scan_bridge for PCI: 00:1d.0
1060 11:52:18.253276 PCI: pci_scan_bus for bus 01
1061 11:52:18.256091 PCI: 01:00.0 [1c5c/174a] enabled
1062 11:52:18.259335 GENERIC: 0.0 enabled
1063 11:52:18.262805 Enabling Common Clock Configuration
1064 11:52:18.266132 L1 Sub-State supported from root port 29
1065 11:52:18.269666 L1 Sub-State Support = 0xf
1066 11:52:18.273088 CommonModeRestoreTime = 0x28
1067 11:52:18.275792 Power On Value = 0x16, Power On Scale = 0x0
1068 11:52:18.279167 ASPM: Enabled L1
1069 11:52:18.282689 PCIe: Max_Payload_Size adjusted to 128
1070 11:52:18.285910 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 11:52:18.289140 PCI: 00:1e.2 scanning...
1072 11:52:18.292380 scan_generic_bus for PCI: 00:1e.2
1073 11:52:18.295751 SPI: 00 enabled
1074 11:52:18.302438 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 11:52:18.305732 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 11:52:18.309115 PCI: 00:1e.3 scanning...
1077 11:52:18.312353 scan_generic_bus for PCI: 00:1e.3
1078 11:52:18.315938 SPI: 00 enabled
1079 11:52:18.319434 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 11:52:18.326300 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 11:52:18.329395 PCI: 00:1f.0 scanning...
1082 11:52:18.332610 scan_static_bus for PCI: 00:1f.0
1083 11:52:18.333051 PNP: 0c09.0 enabled
1084 11:52:18.335613 PNP: 0c09.0 scanning...
1085 11:52:18.339525 scan_static_bus for PNP: 0c09.0
1086 11:52:18.342836 scan_static_bus for PNP: 0c09.0 done
1087 11:52:18.349677 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 11:52:18.352327 scan_static_bus for PCI: 00:1f.0 done
1089 11:52:18.355625 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 11:52:18.358732 PCI: 00:1f.2 scanning...
1091 11:52:18.362524 scan_static_bus for PCI: 00:1f.2
1092 11:52:18.365323 GENERIC: 0.0 enabled
1093 11:52:18.365753 GENERIC: 0.0 scanning...
1094 11:52:18.369213 scan_static_bus for GENERIC: 0.0
1095 11:52:18.372493 GENERIC: 0.0 enabled
1096 11:52:18.375876 GENERIC: 1.0 enabled
1097 11:52:18.378526 scan_static_bus for GENERIC: 0.0 done
1098 11:52:18.381912 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 11:52:18.388703 scan_static_bus for PCI: 00:1f.2 done
1100 11:52:18.391760 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 11:52:18.395030 PCI: 00:1f.3 scanning...
1102 11:52:18.398409 scan_static_bus for PCI: 00:1f.3
1103 11:52:18.402425 scan_static_bus for PCI: 00:1f.3 done
1104 11:52:18.405019 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 11:52:18.408389 PCI: 00:1f.5 scanning...
1106 11:52:18.411718 scan_generic_bus for PCI: 00:1f.5
1107 11:52:18.415050 scan_generic_bus for PCI: 00:1f.5 done
1108 11:52:18.422203 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 11:52:18.424984 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1110 11:52:18.428159 scan_static_bus for Root Device done
1111 11:52:18.435507 scan_bus: bus Root Device finished in 737 msecs
1112 11:52:18.435939 done
1113 11:52:18.441668 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1114 11:52:18.445003 Chrome EC: UHEPI supported
1115 11:52:18.454655 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 11:52:18.458500 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 11:52:18.461714 SPI flash protection: WPSW=0 SRP0=0
1118 11:52:18.465032 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 11:52:18.471641 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 11:52:18.474370 found VGA at PCI: 00:02.0
1121 11:52:18.477743 Setting up VGA for PCI: 00:02.0
1122 11:52:18.481030 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 11:52:18.487915 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 11:52:18.491167 Allocating resources...
1125 11:52:18.491723 Reading resources...
1126 11:52:18.494498 Root Device read_resources bus 0 link: 0
1127 11:52:18.501099 DOMAIN: 0000 read_resources bus 0 link: 0
1128 11:52:18.504007 PCI: 00:04.0 read_resources bus 1 link: 0
1129 11:52:18.510709 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 11:52:18.514079 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 11:52:18.520813 USB0 port 0 read_resources bus 0 link: 0
1132 11:52:18.524173 USB0 port 0 read_resources bus 0 link: 0 done
1133 11:52:18.530763 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 11:52:18.533966 PCI: 00:14.0 read_resources bus 0 link: 0
1135 11:52:18.540283 USB0 port 0 read_resources bus 0 link: 0
1136 11:52:18.543973 USB0 port 0 read_resources bus 0 link: 0 done
1137 11:52:18.550592 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 11:52:18.553960 PCI: 00:14.3 read_resources bus 0 link: 0
1139 11:52:18.559982 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 11:52:18.563403 PCI: 00:15.0 read_resources bus 0 link: 0
1141 11:52:18.569993 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 11:52:18.573361 PCI: 00:15.1 read_resources bus 0 link: 0
1143 11:52:18.580305 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 11:52:18.583252 PCI: 00:19.1 read_resources bus 0 link: 0
1145 11:52:18.590642 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 11:52:18.594043 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 11:52:18.600756 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 11:52:18.604148 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 11:52:18.610672 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 11:52:18.614153 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 11:52:18.620308 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 11:52:18.623576 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 11:52:18.630240 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 11:52:18.633845 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 11:52:18.639802 GENERIC: 0.0 read_resources bus 0 link: 0
1156 11:52:18.643086 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 11:52:18.650245 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 11:52:18.653293 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 11:52:18.659836 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 11:52:18.663132 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 11:52:18.669186 Root Device read_resources bus 0 link: 0 done
1162 11:52:18.672481 Done reading resources.
1163 11:52:18.675750 Show resources in subtree (Root Device)...After reading.
1164 11:52:18.682523 Root Device child on link 0 DOMAIN: 0000
1165 11:52:18.685919 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 11:52:18.695399 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 11:52:18.705486 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 11:52:18.705567 PCI: 00:00.0
1169 11:52:18.715546 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 11:52:18.725448 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 11:52:18.734909 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 11:52:18.744745 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 11:52:18.754775 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 11:52:18.761319 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 11:52:18.771402 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 11:52:18.780998 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 11:52:18.791103 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 11:52:18.800699 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 11:52:18.810530 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 11:52:18.817807 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 11:52:18.827575 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 11:52:18.837397 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 11:52:18.847217 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 11:52:18.857330 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 11:52:18.867287 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 11:52:18.876871 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 11:52:18.883350 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 11:52:18.893615 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 11:52:18.896414 PCI: 00:02.0
1190 11:52:18.906423 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 11:52:18.916440 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 11:52:18.926330 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 11:52:18.929791 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 11:52:18.939799 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 11:52:18.942933 GENERIC: 0.0
1196 11:52:18.943012 PCI: 00:05.0
1197 11:52:18.952524 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 11:52:18.959604 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 11:52:18.959685 GENERIC: 0.0
1200 11:52:18.962696 PCI: 00:08.0
1201 11:52:18.972395 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 11:52:18.972502 PCI: 00:0a.0
1203 11:52:18.978999 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 11:52:18.989050 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 11:52:18.992468 USB0 port 0 child on link 0 USB3 port 0
1206 11:52:18.992564 USB3 port 0
1207 11:52:18.995870 USB3 port 1
1208 11:52:18.995970 USB3 port 2
1209 11:52:18.999147 USB3 port 3
1210 11:52:19.002508 PCI: 00:14.0 child on link 0 USB0 port 0
1211 11:52:19.011746 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 11:52:19.018414 USB0 port 0 child on link 0 USB2 port 0
1213 11:52:19.018521 USB2 port 0
1214 11:52:19.021692 USB2 port 1
1215 11:52:19.021776 USB2 port 2
1216 11:52:19.025648 USB2 port 3
1217 11:52:19.025748 USB2 port 4
1218 11:52:19.028779 USB2 port 5
1219 11:52:19.028862 USB2 port 6
1220 11:52:19.032047 USB2 port 7
1221 11:52:19.035446 USB2 port 8
1222 11:52:19.035544 USB2 port 9
1223 11:52:19.038846 USB3 port 0
1224 11:52:19.038929 USB3 port 1
1225 11:52:19.041629 USB3 port 2
1226 11:52:19.041712 USB3 port 3
1227 11:52:19.045129 PCI: 00:14.2
1228 11:52:19.054827 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 11:52:19.064980 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 11:52:19.068299 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 11:52:19.078528 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 11:52:19.081909 GENERIC: 0.0
1233 11:52:19.084663 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 11:52:19.094561 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 11:52:19.094660 I2C: 00:1a
1236 11:52:19.098084 I2C: 00:31
1237 11:52:19.098170 I2C: 00:32
1238 11:52:19.104704 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 11:52:19.114756 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 11:52:19.114849 I2C: 00:10
1241 11:52:19.118126 PCI: 00:15.2
1242 11:52:19.127977 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 11:52:19.128091 PCI: 00:15.3
1244 11:52:19.137631 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 11:52:19.140923 PCI: 00:16.0
1246 11:52:19.150929 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 11:52:19.151031 PCI: 00:19.0
1248 11:52:19.153998 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 11:52:19.164576 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 11:52:19.167720 I2C: 00:15
1251 11:52:19.170914 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 11:52:19.180441 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 11:52:19.190519 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 11:52:19.200860 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 11:52:19.200961 GENERIC: 0.0
1256 11:52:19.204185 PCI: 01:00.0
1257 11:52:19.213527 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 11:52:19.223733 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1259 11:52:19.230206 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1260 11:52:19.233410 PCI: 00:1e.0
1261 11:52:19.243774 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1262 11:52:19.247090 PCI: 00:1e.2 child on link 0 SPI: 00
1263 11:52:19.257250 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 11:52:19.260709 SPI: 00
1265 11:52:19.263694 PCI: 00:1e.3 child on link 0 SPI: 00
1266 11:52:19.273216 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 11:52:19.273308 SPI: 00
1268 11:52:19.279568 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1269 11:52:19.286830 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1270 11:52:19.290056 PNP: 0c09.0
1271 11:52:19.299821 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1272 11:52:19.303153 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1273 11:52:19.312808 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1274 11:52:19.323176 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1275 11:52:19.326745 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1276 11:52:19.330035 GENERIC: 0.0
1277 11:52:19.330465 GENERIC: 1.0
1278 11:52:19.333441 PCI: 00:1f.3
1279 11:52:19.343323 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 11:52:19.353157 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 11:52:19.353721 PCI: 00:1f.5
1282 11:52:19.362943 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 11:52:19.366167 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 11:52:19.369367 APIC: 00
1285 11:52:19.369893 APIC: 01
1286 11:52:19.370235 APIC: 05
1287 11:52:19.372656 APIC: 07
1288 11:52:19.373205 APIC: 02
1289 11:52:19.376027 APIC: 04
1290 11:52:19.376662 APIC: 06
1291 11:52:19.377112 APIC: 03
1292 11:52:19.386422 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1293 11:52:19.389406 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1294 11:52:19.395480 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1295 11:52:19.402280 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1296 11:52:19.405528 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1297 11:52:19.412343 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1298 11:52:19.415696 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1299 11:52:19.422561 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1300 11:52:19.428649 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1301 11:52:19.438713 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1302 11:52:19.445298 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1303 11:52:19.451761 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1304 11:52:19.458599 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1305 11:52:19.465481 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1306 11:52:19.475298 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1307 11:52:19.478559 DOMAIN: 0000: Resource ranges:
1308 11:52:19.481674 * Base: 1000, Size: 800, Tag: 100
1309 11:52:19.484978 * Base: 1900, Size: e700, Tag: 100
1310 11:52:19.488026 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1311 11:52:19.495248 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1312 11:52:19.501248 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1313 11:52:19.511288 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1314 11:52:19.518255 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1315 11:52:19.524331 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1316 11:52:19.534411 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1317 11:52:19.541247 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1318 11:52:19.547415 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1319 11:52:19.556920 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1320 11:52:19.563656 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1321 11:52:19.570267 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1322 11:52:19.580696 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1323 11:52:19.586676 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1324 11:52:19.593697 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1325 11:52:19.603423 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1326 11:52:19.610208 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1327 11:52:19.616440 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1328 11:52:19.626373 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1329 11:52:19.633200 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1330 11:52:19.642731 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1331 11:52:19.649334 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1332 11:52:19.655959 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1333 11:52:19.665992 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1334 11:52:19.672411 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1335 11:52:19.675847 DOMAIN: 0000: Resource ranges:
1336 11:52:19.679032 * Base: 7fc00000, Size: 40400000, Tag: 200
1337 11:52:19.685983 * Base: d0000000, Size: 28000000, Tag: 200
1338 11:52:19.689308 * Base: fa000000, Size: 1000000, Tag: 200
1339 11:52:19.692754 * Base: fb001000, Size: 2fff000, Tag: 200
1340 11:52:19.696055 * Base: fe010000, Size: 2e000, Tag: 200
1341 11:52:19.702515 * Base: fe03f000, Size: d41000, Tag: 200
1342 11:52:19.705532 * Base: fed88000, Size: 8000, Tag: 200
1343 11:52:19.708859 * Base: fed93000, Size: d000, Tag: 200
1344 11:52:19.712287 * Base: feda2000, Size: 1e000, Tag: 200
1345 11:52:19.719162 * Base: fede0000, Size: 1220000, Tag: 200
1346 11:52:19.721770 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1347 11:52:19.729027 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1348 11:52:19.735093 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1349 11:52:19.741847 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1350 11:52:19.748536 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1351 11:52:19.755092 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1352 11:52:19.761722 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1353 11:52:19.768272 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1354 11:52:19.774718 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1355 11:52:19.781390 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1356 11:52:19.788112 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1357 11:52:19.794766 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1358 11:52:19.801232 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1359 11:52:19.807853 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1360 11:52:19.814557 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1361 11:52:19.821372 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1362 11:52:19.827532 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1363 11:52:19.834282 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1364 11:52:19.841019 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1365 11:52:19.847704 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1366 11:52:19.854387 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1367 11:52:19.863704 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1368 11:52:19.870733 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1369 11:52:19.877423 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1370 11:52:19.883516 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1371 11:52:19.886903 PCI: 00:1d.0: Resource ranges:
1372 11:52:19.890270 * Base: 7fc00000, Size: 100000, Tag: 200
1373 11:52:19.896821 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1374 11:52:19.904039 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1375 11:52:19.910517 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1376 11:52:19.920066 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1377 11:52:19.926782 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1378 11:52:19.930285 Root Device assign_resources, bus 0 link: 0
1379 11:52:19.936421 DOMAIN: 0000 assign_resources, bus 0 link: 0
1380 11:52:19.943438 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1381 11:52:19.953188 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1382 11:52:19.960050 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1383 11:52:19.969794 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1384 11:52:19.973005 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 11:52:19.979598 PCI: 00:04.0 assign_resources, bus 1 link: 0
1386 11:52:19.985586 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1387 11:52:19.995636 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1388 11:52:20.002369 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1389 11:52:20.008829 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 11:52:20.012048 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1391 11:52:20.018823 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1392 11:52:20.025385 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 11:52:20.028818 PCI: 00:14.0 assign_resources, bus 0 link: 0
1394 11:52:20.038588 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1395 11:52:20.045205 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1396 11:52:20.054943 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1397 11:52:20.058357 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 11:52:20.061635 PCI: 00:14.3 assign_resources, bus 0 link: 0
1399 11:52:20.072303 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1400 11:52:20.075387 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 11:52:20.081592 PCI: 00:15.0 assign_resources, bus 0 link: 0
1402 11:52:20.088176 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1403 11:52:20.094700 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 11:52:20.098095 PCI: 00:15.1 assign_resources, bus 0 link: 0
1405 11:52:20.107919 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1406 11:52:20.114167 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1407 11:52:20.124093 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1408 11:52:20.130870 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1409 11:52:20.134193 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 11:52:20.140890 PCI: 00:19.1 assign_resources, bus 0 link: 0
1411 11:52:20.150960 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1412 11:52:20.160909 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1413 11:52:20.167712 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1414 11:52:20.170928 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 11:52:20.180758 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1416 11:52:20.187281 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1417 11:52:20.197336 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1418 11:52:20.200625 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 11:52:20.210073 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1420 11:52:20.213627 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 11:52:20.220146 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1422 11:52:20.226507 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1423 11:52:20.229878 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 11:52:20.236673 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1425 11:52:20.240130 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 11:52:20.246237 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1427 11:52:20.249579 LPC: Trying to open IO window from 800 size 1ff
1428 11:52:20.259772 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1429 11:52:20.266578 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1430 11:52:20.275982 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1431 11:52:20.279388 DOMAIN: 0000 assign_resources, bus 0 link: 0
1432 11:52:20.286226 Root Device assign_resources, bus 0 link: 0
1433 11:52:20.286316 Done setting resources.
1434 11:52:20.293031 Show resources in subtree (Root Device)...After assigning values.
1435 11:52:20.299517 Root Device child on link 0 DOMAIN: 0000
1436 11:52:20.302593 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1437 11:52:20.312795 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1438 11:52:20.322575 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1439 11:52:20.323007 PCI: 00:00.0
1440 11:52:20.332315 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1441 11:52:20.342247 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1442 11:52:20.352424 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1443 11:52:20.362069 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1444 11:52:20.372303 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1445 11:52:20.378327 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1446 11:52:20.388817 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1447 11:52:20.398557 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1448 11:52:20.408224 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1449 11:52:20.418063 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1450 11:52:20.428361 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1451 11:52:20.435276 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1452 11:52:20.444425 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1453 11:52:20.454695 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1454 11:52:20.464600 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1455 11:52:20.474113 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1456 11:52:20.484322 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1457 11:52:20.490872 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1458 11:52:20.500674 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1459 11:52:20.511254 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1460 11:52:20.514582 PCI: 00:02.0
1461 11:52:20.524252 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1462 11:52:20.534357 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1463 11:52:20.543952 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1464 11:52:20.547481 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1465 11:52:20.556867 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1466 11:52:20.560399 GENERIC: 0.0
1467 11:52:20.560905 PCI: 00:05.0
1468 11:52:20.573849 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1469 11:52:20.577179 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1470 11:52:20.580504 GENERIC: 0.0
1471 11:52:20.580987 PCI: 00:08.0
1472 11:52:20.590692 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1473 11:52:20.593368 PCI: 00:0a.0
1474 11:52:20.597227 PCI: 00:0d.0 child on link 0 USB0 port 0
1475 11:52:20.607048 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1476 11:52:20.613332 USB0 port 0 child on link 0 USB3 port 0
1477 11:52:20.613756 USB3 port 0
1478 11:52:20.616710 USB3 port 1
1479 11:52:20.617141 USB3 port 2
1480 11:52:20.620148 USB3 port 3
1481 11:52:20.623791 PCI: 00:14.0 child on link 0 USB0 port 0
1482 11:52:20.633527 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1483 11:52:20.639780 USB0 port 0 child on link 0 USB2 port 0
1484 11:52:20.640564 USB2 port 0
1485 11:52:20.643061 USB2 port 1
1486 11:52:20.643694 USB2 port 2
1487 11:52:20.646259 USB2 port 3
1488 11:52:20.646869 USB2 port 4
1489 11:52:20.649485 USB2 port 5
1490 11:52:20.650006 USB2 port 6
1491 11:52:20.652770 USB2 port 7
1492 11:52:20.653402 USB2 port 8
1493 11:52:20.656015 USB2 port 9
1494 11:52:20.656605 USB3 port 0
1495 11:52:20.659663 USB3 port 1
1496 11:52:20.662740 USB3 port 2
1497 11:52:20.663248 USB3 port 3
1498 11:52:20.666307 PCI: 00:14.2
1499 11:52:20.676109 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1500 11:52:20.686034 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1501 11:52:20.689069 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1502 11:52:20.698787 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1503 11:52:20.702363 GENERIC: 0.0
1504 11:52:20.705742 PCI: 00:15.0 child on link 0 I2C: 00:1a
1505 11:52:20.715539 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1506 11:52:20.718835 I2C: 00:1a
1507 11:52:20.719305 I2C: 00:31
1508 11:52:20.722081 I2C: 00:32
1509 11:52:20.725452 PCI: 00:15.1 child on link 0 I2C: 00:10
1510 11:52:20.735470 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1511 11:52:20.738717 I2C: 00:10
1512 11:52:20.739200 PCI: 00:15.2
1513 11:52:20.748638 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1514 11:52:20.751868 PCI: 00:15.3
1515 11:52:20.761872 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1516 11:52:20.762327 PCI: 00:16.0
1517 11:52:20.772351 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1518 11:52:20.775474 PCI: 00:19.0
1519 11:52:20.778966 PCI: 00:19.1 child on link 0 I2C: 00:15
1520 11:52:20.788391 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1521 11:52:20.791843 I2C: 00:15
1522 11:52:20.795281 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1523 11:52:20.805408 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1524 11:52:20.818212 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1525 11:52:20.828315 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1526 11:52:20.828882 GENERIC: 0.0
1527 11:52:20.831641 PCI: 01:00.0
1528 11:52:20.841817 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1529 11:52:20.851374 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1530 11:52:20.861193 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1531 11:52:20.864624 PCI: 00:1e.0
1532 11:52:20.874730 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1533 11:52:20.878118 PCI: 00:1e.2 child on link 0 SPI: 00
1534 11:52:20.887203 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1535 11:52:20.890756 SPI: 00
1536 11:52:20.894517 PCI: 00:1e.3 child on link 0 SPI: 00
1537 11:52:20.904070 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1538 11:52:20.907354 SPI: 00
1539 11:52:20.910872 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1540 11:52:20.920805 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1541 11:52:20.921239 PNP: 0c09.0
1542 11:52:20.930727 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1543 11:52:20.933959 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1544 11:52:20.943719 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1545 11:52:20.953789 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1546 11:52:20.956853 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1547 11:52:20.960258 GENERIC: 0.0
1548 11:52:20.960857 GENERIC: 1.0
1549 11:52:20.963389 PCI: 00:1f.3
1550 11:52:20.973380 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1551 11:52:20.983570 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1552 11:52:20.986830 PCI: 00:1f.5
1553 11:52:20.996209 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1554 11:52:20.999500 CPU_CLUSTER: 0 child on link 0 APIC: 00
1555 11:52:20.999926 APIC: 00
1556 11:52:21.002974 APIC: 01
1557 11:52:21.003398 APIC: 05
1558 11:52:21.006408 APIC: 07
1559 11:52:21.006909 APIC: 02
1560 11:52:21.007249 APIC: 04
1561 11:52:21.009701 APIC: 06
1562 11:52:21.010254 APIC: 03
1563 11:52:21.013103 Done allocating resources.
1564 11:52:21.019817 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1565 11:52:21.025834 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1566 11:52:21.029127 Configure GPIOs for I2S audio on UP4.
1567 11:52:21.036105 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1568 11:52:21.039487 Enabling resources...
1569 11:52:21.042746 PCI: 00:00.0 subsystem <- 8086/9a12
1570 11:52:21.046133 PCI: 00:00.0 cmd <- 06
1571 11:52:21.049383 PCI: 00:02.0 subsystem <- 8086/9a40
1572 11:52:21.049813 PCI: 00:02.0 cmd <- 03
1573 11:52:21.055676 PCI: 00:04.0 subsystem <- 8086/9a03
1574 11:52:21.056105 PCI: 00:04.0 cmd <- 02
1575 11:52:21.059023 PCI: 00:05.0 subsystem <- 8086/9a19
1576 11:52:21.062410 PCI: 00:05.0 cmd <- 02
1577 11:52:21.065687 PCI: 00:08.0 subsystem <- 8086/9a11
1578 11:52:21.069000 PCI: 00:08.0 cmd <- 06
1579 11:52:21.072250 PCI: 00:0d.0 subsystem <- 8086/9a13
1580 11:52:21.075743 PCI: 00:0d.0 cmd <- 02
1581 11:52:21.078990 PCI: 00:14.0 subsystem <- 8086/a0ed
1582 11:52:21.082309 PCI: 00:14.0 cmd <- 02
1583 11:52:21.085580 PCI: 00:14.2 subsystem <- 8086/a0ef
1584 11:52:21.089046 PCI: 00:14.2 cmd <- 02
1585 11:52:21.092414 PCI: 00:14.3 subsystem <- 8086/a0f0
1586 11:52:21.095376 PCI: 00:14.3 cmd <- 02
1587 11:52:21.098536 PCI: 00:15.0 subsystem <- 8086/a0e8
1588 11:52:21.102024 PCI: 00:15.0 cmd <- 02
1589 11:52:21.105460 PCI: 00:15.1 subsystem <- 8086/a0e9
1590 11:52:21.105891 PCI: 00:15.1 cmd <- 02
1591 11:52:21.111395 PCI: 00:15.2 subsystem <- 8086/a0ea
1592 11:52:21.111843 PCI: 00:15.2 cmd <- 02
1593 11:52:21.114980 PCI: 00:15.3 subsystem <- 8086/a0eb
1594 11:52:21.118359 PCI: 00:15.3 cmd <- 02
1595 11:52:21.121823 PCI: 00:16.0 subsystem <- 8086/a0e0
1596 11:52:21.125097 PCI: 00:16.0 cmd <- 02
1597 11:52:21.128499 PCI: 00:19.1 subsystem <- 8086/a0c6
1598 11:52:21.131782 PCI: 00:19.1 cmd <- 02
1599 11:52:21.134623 PCI: 00:1d.0 bridge ctrl <- 0013
1600 11:52:21.137986 PCI: 00:1d.0 subsystem <- 8086/a0b0
1601 11:52:21.141333 PCI: 00:1d.0 cmd <- 06
1602 11:52:21.144467 PCI: 00:1e.0 subsystem <- 8086/a0a8
1603 11:52:21.147848 PCI: 00:1e.0 cmd <- 06
1604 11:52:21.151135 PCI: 00:1e.2 subsystem <- 8086/a0aa
1605 11:52:21.154524 PCI: 00:1e.2 cmd <- 06
1606 11:52:21.157657 PCI: 00:1e.3 subsystem <- 8086/a0ab
1607 11:52:21.158083 PCI: 00:1e.3 cmd <- 02
1608 11:52:21.164943 PCI: 00:1f.0 subsystem <- 8086/a087
1609 11:52:21.165520 PCI: 00:1f.0 cmd <- 407
1610 11:52:21.171058 PCI: 00:1f.3 subsystem <- 8086/a0c8
1611 11:52:21.171686 PCI: 00:1f.3 cmd <- 02
1612 11:52:21.174459 PCI: 00:1f.5 subsystem <- 8086/a0a4
1613 11:52:21.177756 PCI: 00:1f.5 cmd <- 406
1614 11:52:21.182395 PCI: 01:00.0 cmd <- 02
1615 11:52:21.187049 done.
1616 11:52:21.190505 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1617 11:52:21.193863 Initializing devices...
1618 11:52:21.197167 Root Device init
1619 11:52:21.200466 Chrome EC: Set SMI mask to 0x0000000000000000
1620 11:52:21.207182 Chrome EC: clear events_b mask to 0x0000000000000000
1621 11:52:21.213940 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1622 11:52:21.220539 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1623 11:52:21.227259 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1624 11:52:21.234216 Chrome EC: Set WAKE mask to 0x0000000000000000
1625 11:52:21.237303 fw_config match found: DB_USB=USB3_ACTIVE
1626 11:52:21.243794 Configure Right Type-C port orientation for retimer
1627 11:52:21.247165 Root Device init finished in 47 msecs
1628 11:52:21.250508 PCI: 00:00.0 init
1629 11:52:21.253848 CPU TDP = 9 Watts
1630 11:52:21.254414 CPU PL1 = 9 Watts
1631 11:52:21.257213 CPU PL2 = 40 Watts
1632 11:52:21.257641 CPU PL4 = 83 Watts
1633 11:52:21.263721 PCI: 00:00.0 init finished in 8 msecs
1634 11:52:21.264220 PCI: 00:02.0 init
1635 11:52:21.266959 GMA: Found VBT in CBFS
1636 11:52:21.270305 GMA: Found valid VBT in CBFS
1637 11:52:21.276690 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1638 11:52:21.283569 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1639 11:52:21.286838 PCI: 00:02.0 init finished in 18 msecs
1640 11:52:21.290315 PCI: 00:05.0 init
1641 11:52:21.293714 PCI: 00:05.0 init finished in 0 msecs
1642 11:52:21.296391 PCI: 00:08.0 init
1643 11:52:21.299810 PCI: 00:08.0 init finished in 0 msecs
1644 11:52:21.303226 PCI: 00:14.0 init
1645 11:52:21.306697 PCI: 00:14.0 init finished in 0 msecs
1646 11:52:21.310097 PCI: 00:14.2 init
1647 11:52:21.312751 PCI: 00:14.2 init finished in 0 msecs
1648 11:52:21.316612 PCI: 00:15.0 init
1649 11:52:21.317076 I2C bus 0 version 0x3230302a
1650 11:52:21.322778 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1651 11:52:21.326755 PCI: 00:15.0 init finished in 6 msecs
1652 11:52:21.327187 PCI: 00:15.1 init
1653 11:52:21.329369 I2C bus 1 version 0x3230302a
1654 11:52:21.332613 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1655 11:52:21.339364 PCI: 00:15.1 init finished in 6 msecs
1656 11:52:21.339965 PCI: 00:15.2 init
1657 11:52:21.342706 I2C bus 2 version 0x3230302a
1658 11:52:21.346113 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1659 11:52:21.349459 PCI: 00:15.2 init finished in 6 msecs
1660 11:52:21.352602 PCI: 00:15.3 init
1661 11:52:21.355872 I2C bus 3 version 0x3230302a
1662 11:52:21.359094 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1663 11:52:21.362446 PCI: 00:15.3 init finished in 6 msecs
1664 11:52:21.365136 PCI: 00:16.0 init
1665 11:52:21.368985 PCI: 00:16.0 init finished in 0 msecs
1666 11:52:21.372166 PCI: 00:19.1 init
1667 11:52:21.375560 I2C bus 5 version 0x3230302a
1668 11:52:21.378514 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1669 11:52:21.381670 PCI: 00:19.1 init finished in 6 msecs
1670 11:52:21.385239 PCI: 00:1d.0 init
1671 11:52:21.388617 Initializing PCH PCIe bridge.
1672 11:52:21.391915 PCI: 00:1d.0 init finished in 3 msecs
1673 11:52:21.395417 PCI: 00:1f.0 init
1674 11:52:21.398042 IOAPIC: Initializing IOAPIC at 0xfec00000
1675 11:52:21.401469 IOAPIC: Bootstrap Processor Local APIC = 0x00
1676 11:52:21.404821 IOAPIC: ID = 0x02
1677 11:52:21.408142 IOAPIC: Dumping registers
1678 11:52:21.411412 reg 0x0000: 0x02000000
1679 11:52:21.411900 reg 0x0001: 0x00770020
1680 11:52:21.414803 reg 0x0002: 0x00000000
1681 11:52:21.418200 PCI: 00:1f.0 init finished in 21 msecs
1682 11:52:21.421514 PCI: 00:1f.2 init
1683 11:52:21.424815 Disabling ACPI via APMC.
1684 11:52:21.428112 APMC done.
1685 11:52:21.431466 PCI: 00:1f.2 init finished in 5 msecs
1686 11:52:21.442585 PCI: 01:00.0 init
1687 11:52:21.445358 PCI: 01:00.0 init finished in 0 msecs
1688 11:52:21.449391 PNP: 0c09.0 init
1689 11:52:21.452119 Google Chrome EC uptime: 8.360 seconds
1690 11:52:21.459099 Google Chrome AP resets since EC boot: 1
1691 11:52:21.462371 Google Chrome most recent AP reset causes:
1692 11:52:21.465647 0.346: 32775 shutdown: entering G3
1693 11:52:21.472247 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1694 11:52:21.475507 PNP: 0c09.0 init finished in 22 msecs
1695 11:52:21.481520 Devices initialized
1696 11:52:21.485007 Show all devs... After init.
1697 11:52:21.488337 Root Device: enabled 1
1698 11:52:21.488805 DOMAIN: 0000: enabled 1
1699 11:52:21.491538 CPU_CLUSTER: 0: enabled 1
1700 11:52:21.494919 PCI: 00:00.0: enabled 1
1701 11:52:21.498130 PCI: 00:02.0: enabled 1
1702 11:52:21.498699 PCI: 00:04.0: enabled 1
1703 11:52:21.500810 PCI: 00:05.0: enabled 1
1704 11:52:21.504134 PCI: 00:06.0: enabled 0
1705 11:52:21.507496 PCI: 00:07.0: enabled 0
1706 11:52:21.508040 PCI: 00:07.1: enabled 0
1707 11:52:21.510880 PCI: 00:07.2: enabled 0
1708 11:52:21.514225 PCI: 00:07.3: enabled 0
1709 11:52:21.517453 PCI: 00:08.0: enabled 1
1710 11:52:21.517872 PCI: 00:09.0: enabled 0
1711 11:52:21.520808 PCI: 00:0a.0: enabled 0
1712 11:52:21.524218 PCI: 00:0d.0: enabled 1
1713 11:52:21.527577 PCI: 00:0d.1: enabled 0
1714 11:52:21.528222 PCI: 00:0d.2: enabled 0
1715 11:52:21.530824 PCI: 00:0d.3: enabled 0
1716 11:52:21.534166 PCI: 00:0e.0: enabled 0
1717 11:52:21.537414 PCI: 00:10.2: enabled 1
1718 11:52:21.537854 PCI: 00:10.6: enabled 0
1719 11:52:21.540568 PCI: 00:10.7: enabled 0
1720 11:52:21.544077 PCI: 00:12.0: enabled 0
1721 11:52:21.544496 PCI: 00:12.6: enabled 0
1722 11:52:21.547248 PCI: 00:13.0: enabled 0
1723 11:52:21.550730 PCI: 00:14.0: enabled 1
1724 11:52:21.554066 PCI: 00:14.1: enabled 0
1725 11:52:21.554486 PCI: 00:14.2: enabled 1
1726 11:52:21.557394 PCI: 00:14.3: enabled 1
1727 11:52:21.560659 PCI: 00:15.0: enabled 1
1728 11:52:21.563775 PCI: 00:15.1: enabled 1
1729 11:52:21.564243 PCI: 00:15.2: enabled 1
1730 11:52:21.567297 PCI: 00:15.3: enabled 1
1731 11:52:21.570561 PCI: 00:16.0: enabled 1
1732 11:52:21.573887 PCI: 00:16.1: enabled 0
1733 11:52:21.574401 PCI: 00:16.2: enabled 0
1734 11:52:21.576923 PCI: 00:16.3: enabled 0
1735 11:52:21.580153 PCI: 00:16.4: enabled 0
1736 11:52:21.583544 PCI: 00:16.5: enabled 0
1737 11:52:21.583969 PCI: 00:17.0: enabled 0
1738 11:52:21.586780 PCI: 00:19.0: enabled 0
1739 11:52:21.590086 PCI: 00:19.1: enabled 1
1740 11:52:21.593327 PCI: 00:19.2: enabled 0
1741 11:52:21.593819 PCI: 00:1c.0: enabled 1
1742 11:52:21.596637 PCI: 00:1c.1: enabled 0
1743 11:52:21.600210 PCI: 00:1c.2: enabled 0
1744 11:52:21.600731 PCI: 00:1c.3: enabled 0
1745 11:52:21.603556 PCI: 00:1c.4: enabled 0
1746 11:52:21.607000 PCI: 00:1c.5: enabled 0
1747 11:52:21.610378 PCI: 00:1c.6: enabled 1
1748 11:52:21.610816 PCI: 00:1c.7: enabled 0
1749 11:52:21.613110 PCI: 00:1d.0: enabled 1
1750 11:52:21.616580 PCI: 00:1d.1: enabled 0
1751 11:52:21.620165 PCI: 00:1d.2: enabled 1
1752 11:52:21.620701 PCI: 00:1d.3: enabled 0
1753 11:52:21.623259 PCI: 00:1e.0: enabled 1
1754 11:52:21.626662 PCI: 00:1e.1: enabled 0
1755 11:52:21.630153 PCI: 00:1e.2: enabled 1
1756 11:52:21.630589 PCI: 00:1e.3: enabled 1
1757 11:52:21.633366 PCI: 00:1f.0: enabled 1
1758 11:52:21.636820 PCI: 00:1f.1: enabled 0
1759 11:52:21.639924 PCI: 00:1f.2: enabled 1
1760 11:52:21.640359 PCI: 00:1f.3: enabled 1
1761 11:52:21.643219 PCI: 00:1f.4: enabled 0
1762 11:52:21.646598 PCI: 00:1f.5: enabled 1
1763 11:52:21.649978 PCI: 00:1f.6: enabled 0
1764 11:52:21.650414 PCI: 00:1f.7: enabled 0
1765 11:52:21.653039 APIC: 00: enabled 1
1766 11:52:21.655865 GENERIC: 0.0: enabled 1
1767 11:52:21.655949 GENERIC: 0.0: enabled 1
1768 11:52:21.659119 GENERIC: 1.0: enabled 1
1769 11:52:21.662623 GENERIC: 0.0: enabled 1
1770 11:52:21.665858 GENERIC: 1.0: enabled 1
1771 11:52:21.665943 USB0 port 0: enabled 1
1772 11:52:21.669231 GENERIC: 0.0: enabled 1
1773 11:52:21.672323 USB0 port 0: enabled 1
1774 11:52:21.672409 GENERIC: 0.0: enabled 1
1775 11:52:21.675496 I2C: 00:1a: enabled 1
1776 11:52:21.679155 I2C: 00:31: enabled 1
1777 11:52:21.679239 I2C: 00:32: enabled 1
1778 11:52:21.682542 I2C: 00:10: enabled 1
1779 11:52:21.686212 I2C: 00:15: enabled 1
1780 11:52:21.689432 GENERIC: 0.0: enabled 0
1781 11:52:21.689521 GENERIC: 1.0: enabled 0
1782 11:52:21.692460 GENERIC: 0.0: enabled 1
1783 11:52:21.695697 SPI: 00: enabled 1
1784 11:52:21.695795 SPI: 00: enabled 1
1785 11:52:21.699181 PNP: 0c09.0: enabled 1
1786 11:52:21.702261 GENERIC: 0.0: enabled 1
1787 11:52:21.702367 USB3 port 0: enabled 1
1788 11:52:21.705576 USB3 port 1: enabled 1
1789 11:52:21.708871 USB3 port 2: enabled 0
1790 11:52:21.712242 USB3 port 3: enabled 0
1791 11:52:21.712368 USB2 port 0: enabled 0
1792 11:52:21.715514 USB2 port 1: enabled 1
1793 11:52:21.719020 USB2 port 2: enabled 1
1794 11:52:21.719177 USB2 port 3: enabled 0
1795 11:52:21.722651 USB2 port 4: enabled 1
1796 11:52:21.725913 USB2 port 5: enabled 0
1797 11:52:21.728581 USB2 port 6: enabled 0
1798 11:52:21.728792 USB2 port 7: enabled 0
1799 11:52:21.732067 USB2 port 8: enabled 0
1800 11:52:21.735203 USB2 port 9: enabled 0
1801 11:52:21.735484 USB3 port 0: enabled 0
1802 11:52:21.738645 USB3 port 1: enabled 1
1803 11:52:21.741805 USB3 port 2: enabled 0
1804 11:52:21.742221 USB3 port 3: enabled 0
1805 11:52:21.745185 GENERIC: 0.0: enabled 1
1806 11:52:21.748522 GENERIC: 1.0: enabled 1
1807 11:52:21.752056 APIC: 01: enabled 1
1808 11:52:21.752472 APIC: 05: enabled 1
1809 11:52:21.755571 APIC: 07: enabled 1
1810 11:52:21.755993 APIC: 02: enabled 1
1811 11:52:21.758763 APIC: 04: enabled 1
1812 11:52:21.762244 APIC: 06: enabled 1
1813 11:52:21.762688 APIC: 03: enabled 1
1814 11:52:21.765477 PCI: 01:00.0: enabled 1
1815 11:52:21.772145 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1816 11:52:21.775354 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1817 11:52:21.778815 ELOG: NV offset 0xf30000 size 0x1000
1818 11:52:21.786451 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1819 11:52:21.793011 ELOG: Event(17) added with size 13 at 2023-06-23 11:52:18 UTC
1820 11:52:21.799696 ELOG: Event(92) added with size 9 at 2023-06-23 11:52:18 UTC
1821 11:52:21.806298 ELOG: Event(93) added with size 9 at 2023-06-23 11:52:18 UTC
1822 11:52:21.812702 ELOG: Event(9E) added with size 10 at 2023-06-23 11:52:18 UTC
1823 11:52:21.819398 ELOG: Event(9F) added with size 14 at 2023-06-23 11:52:18 UTC
1824 11:52:21.826170 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1825 11:52:21.832324 ELOG: Event(A1) added with size 10 at 2023-06-23 11:52:18 UTC
1826 11:52:21.838857 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1827 11:52:21.845495 ELOG: Event(A0) added with size 9 at 2023-06-23 11:52:18 UTC
1828 11:52:21.848965 elog_add_boot_reason: Logged dev mode boot
1829 11:52:21.855629 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1830 11:52:21.858383 Finalize devices...
1831 11:52:21.858813 Devices finalized
1832 11:52:21.865308 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1833 11:52:21.868661 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1834 11:52:21.875352 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1835 11:52:21.881748 ME: HFSTS1 : 0x80030055
1836 11:52:21.885114 ME: HFSTS2 : 0x30280116
1837 11:52:21.888304 ME: HFSTS3 : 0x00000050
1838 11:52:21.895169 ME: HFSTS4 : 0x00004000
1839 11:52:21.898296 ME: HFSTS5 : 0x00000000
1840 11:52:21.901574 ME: HFSTS6 : 0x00400006
1841 11:52:21.904596 ME: Manufacturing Mode : YES
1842 11:52:21.911490 ME: SPI Protection Mode Enabled : NO
1843 11:52:21.914734 ME: FW Partition Table : OK
1844 11:52:21.918013 ME: Bringup Loader Failure : NO
1845 11:52:21.921334 ME: Firmware Init Complete : NO
1846 11:52:21.924575 ME: Boot Options Present : NO
1847 11:52:21.928048 ME: Update In Progress : NO
1848 11:52:21.931413 ME: D0i3 Support : YES
1849 11:52:21.937958 ME: Low Power State Enabled : NO
1850 11:52:21.940481 ME: CPU Replaced : YES
1851 11:52:21.944416 ME: CPU Replacement Valid : YES
1852 11:52:21.947731 ME: Current Working State : 5
1853 11:52:21.950454 ME: Current Operation State : 1
1854 11:52:21.953724 ME: Current Operation Mode : 3
1855 11:52:21.957154 ME: Error Code : 0
1856 11:52:21.960664 ME: Enhanced Debug Mode : NO
1857 11:52:21.967606 ME: CPU Debug Disabled : YES
1858 11:52:21.971064 ME: TXT Support : NO
1859 11:52:21.974452 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1860 11:52:21.983598 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1861 11:52:21.986854 CBFS: 'fallback/slic' not found.
1862 11:52:21.990791 ACPI: Writing ACPI tables at 76b01000.
1863 11:52:21.990878 ACPI: * FACS
1864 11:52:21.993485 ACPI: * DSDT
1865 11:52:21.996712 Ramoops buffer: 0x100000@0x76a00000.
1866 11:52:22.004052 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1867 11:52:22.006876 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1868 11:52:22.010135 Google Chrome EC: version:
1869 11:52:22.013444 ro: voema_v2.0.7540-147f8d37d1
1870 11:52:22.017304 rw: voema_v2.0.7540-147f8d37d1
1871 11:52:22.020491 running image: 2
1872 11:52:22.027030 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1873 11:52:22.030598 ACPI: * FADT
1874 11:52:22.030683 SCI is IRQ9
1875 11:52:22.033212 ACPI: added table 1/32, length now 40
1876 11:52:22.036516 ACPI: * SSDT
1877 11:52:22.040327 Found 1 CPU(s) with 8 core(s) each.
1878 11:52:22.043167 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1879 11:52:22.049681 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1880 11:52:22.053013 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1881 11:52:22.056376 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1882 11:52:22.063215 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1883 11:52:22.069911 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1884 11:52:22.073310 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1885 11:52:22.079485 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1886 11:52:22.086033 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1887 11:52:22.089339 \_SB.PCI0.RP09: Added StorageD3Enable property
1888 11:52:22.092711 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1889 11:52:22.099408 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1890 11:52:22.106151 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1891 11:52:22.109625 PS2K: Passing 80 keymaps to kernel
1892 11:52:22.115748 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1893 11:52:22.122741 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1894 11:52:22.129312 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1895 11:52:22.136175 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1896 11:52:22.142404 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1897 11:52:22.149697 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1898 11:52:22.155959 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1899 11:52:22.162770 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1900 11:52:22.166217 ACPI: added table 2/32, length now 44
1901 11:52:22.169481 ACPI: * MCFG
1902 11:52:22.172772 ACPI: added table 3/32, length now 48
1903 11:52:22.173202 ACPI: * TPM2
1904 11:52:22.176124 TPM2 log created at 0x769f0000
1905 11:52:22.178896 ACPI: added table 4/32, length now 52
1906 11:52:22.182295 ACPI: * MADT
1907 11:52:22.182719 SCI is IRQ9
1908 11:52:22.185805 ACPI: added table 5/32, length now 56
1909 11:52:22.188968 current = 76b09850
1910 11:52:22.189391 ACPI: * DMAR
1911 11:52:22.195803 ACPI: added table 6/32, length now 60
1912 11:52:22.199058 ACPI: added table 7/32, length now 64
1913 11:52:22.199632 ACPI: * HPET
1914 11:52:22.202307 ACPI: added table 8/32, length now 68
1915 11:52:22.205581 ACPI: done.
1916 11:52:22.208751 ACPI tables: 35216 bytes.
1917 11:52:22.212067 smbios_write_tables: 769ef000
1918 11:52:22.215077 EC returned error result code 3
1919 11:52:22.218423 Couldn't obtain OEM name from CBI
1920 11:52:22.222002 Create SMBIOS type 16
1921 11:52:22.222301 Create SMBIOS type 17
1922 11:52:22.225163 GENERIC: 0.0 (WIFI Device)
1923 11:52:22.228319 SMBIOS tables: 1750 bytes.
1924 11:52:22.231491 Writing table forward entry at 0x00000500
1925 11:52:22.238085 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1926 11:52:22.241644 Writing coreboot table at 0x76b25000
1927 11:52:22.248345 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1928 11:52:22.251046 1. 0000000000001000-000000000009ffff: RAM
1929 11:52:22.257961 2. 00000000000a0000-00000000000fffff: RESERVED
1930 11:52:22.261430 3. 0000000000100000-00000000769eefff: RAM
1931 11:52:22.267684 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1932 11:52:22.271083 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1933 11:52:22.277936 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1934 11:52:22.284815 7. 0000000077000000-000000007fbfffff: RESERVED
1935 11:52:22.288183 8. 00000000c0000000-00000000cfffffff: RESERVED
1936 11:52:22.290944 9. 00000000f8000000-00000000f9ffffff: RESERVED
1937 11:52:22.297922 10. 00000000fb000000-00000000fb000fff: RESERVED
1938 11:52:22.300864 11. 00000000fe000000-00000000fe00ffff: RESERVED
1939 11:52:22.307521 12. 00000000fed80000-00000000fed87fff: RESERVED
1940 11:52:22.310959 13. 00000000fed90000-00000000fed92fff: RESERVED
1941 11:52:22.318242 14. 00000000feda0000-00000000feda1fff: RESERVED
1942 11:52:22.320723 15. 00000000fedc0000-00000000feddffff: RESERVED
1943 11:52:22.324529 16. 0000000100000000-00000002803fffff: RAM
1944 11:52:22.327695 Passing 4 GPIOs to payload:
1945 11:52:22.334107 NAME | PORT | POLARITY | VALUE
1946 11:52:22.337149 lid | undefined | high | high
1947 11:52:22.344305 power | undefined | high | low
1948 11:52:22.350920 oprom | undefined | high | low
1949 11:52:22.354235 EC in RW | 0x000000e5 | high | high
1950 11:52:22.360945 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 76f0
1951 11:52:22.363641 coreboot table: 1576 bytes.
1952 11:52:22.366962 IMD ROOT 0. 0x76fff000 0x00001000
1953 11:52:22.370494 IMD SMALL 1. 0x76ffe000 0x00001000
1954 11:52:22.373915 FSP MEMORY 2. 0x76c4e000 0x003b0000
1955 11:52:22.380526 VPD 3. 0x76c4d000 0x00000367
1956 11:52:22.383891 RO MCACHE 4. 0x76c4c000 0x00000fdc
1957 11:52:22.386665 CONSOLE 5. 0x76c2c000 0x00020000
1958 11:52:22.390195 FMAP 6. 0x76c2b000 0x00000578
1959 11:52:22.393483 TIME STAMP 7. 0x76c2a000 0x00000910
1960 11:52:22.396663 VBOOT WORK 8. 0x76c16000 0x00014000
1961 11:52:22.400132 ROMSTG STCK 9. 0x76c15000 0x00001000
1962 11:52:22.403493 AFTER CAR 10. 0x76c0a000 0x0000b000
1963 11:52:22.409880 RAMSTAGE 11. 0x76b97000 0x00073000
1964 11:52:22.413212 REFCODE 12. 0x76b42000 0x00055000
1965 11:52:22.416527 SMM BACKUP 13. 0x76b32000 0x00010000
1966 11:52:22.419938 4f444749 14. 0x76b30000 0x00002000
1967 11:52:22.423140 EXT VBT15. 0x76b2d000 0x0000219f
1968 11:52:22.426592 COREBOOT 16. 0x76b25000 0x00008000
1969 11:52:22.429953 ACPI 17. 0x76b01000 0x00024000
1970 11:52:22.433178 ACPI GNVS 18. 0x76b00000 0x00001000
1971 11:52:22.439708 RAMOOPS 19. 0x76a00000 0x00100000
1972 11:52:22.442808 TPM2 TCGLOG20. 0x769f0000 0x00010000
1973 11:52:22.445986 SMBIOS 21. 0x769ef000 0x00000800
1974 11:52:22.446418 IMD small region:
1975 11:52:22.452750 IMD ROOT 0. 0x76ffec00 0x00000400
1976 11:52:22.455943 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1977 11:52:22.459422 POWER STATE 2. 0x76ffeb80 0x00000044
1978 11:52:22.462683 ROMSTAGE 3. 0x76ffeb60 0x00000004
1979 11:52:22.466088 MEM INFO 4. 0x76ffe980 0x000001e0
1980 11:52:22.472230 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1981 11:52:22.475532 MTRR: Physical address space:
1982 11:52:22.482400 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1983 11:52:22.489243 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1984 11:52:22.495264 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1985 11:52:22.501965 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1986 11:52:22.505368 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1987 11:52:22.511931 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1988 11:52:22.518465 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1989 11:52:22.525272 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 11:52:22.528608 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 11:52:22.532004 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 11:52:22.535212 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 11:52:22.538456 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 11:52:22.545139 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 11:52:22.548394 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 11:52:22.551407 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 11:52:22.554717 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 11:52:22.561650 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 11:52:22.564830 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 11:52:22.568078 call enable_fixed_mtrr()
2001 11:52:22.571473 CPU physical address size: 39 bits
2002 11:52:22.574850 MTRR: default type WB/UC MTRR counts: 6/6.
2003 11:52:22.581053 MTRR: UC selected as default type.
2004 11:52:22.584491 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2005 11:52:22.591359 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2006 11:52:22.598105 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2007 11:52:22.604888 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2008 11:52:22.610961 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2009 11:52:22.617729 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2010 11:52:22.618052
2011 11:52:22.620883 MTRR check
2012 11:52:22.621265 Fixed MTRRs : Enabled
2013 11:52:22.624325 Variable MTRRs: Enabled
2014 11:52:22.624676
2015 11:52:22.630895 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 11:52:22.634098 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 11:52:22.637450 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 11:52:22.640716 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 11:52:22.644064 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 11:52:22.651034 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 11:52:22.654201 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 11:52:22.657575 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 11:52:22.660883 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 11:52:22.667045 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 11:52:22.670328 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 11:52:22.677542 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2027 11:52:22.680135 call enable_fixed_mtrr()
2028 11:52:22.683581 Checking cr50 for pending updates
2029 11:52:22.688171 CPU physical address size: 39 bits
2030 11:52:22.691612 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 11:52:22.694305 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 11:52:22.698225 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 11:52:22.701422 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 11:52:22.708130 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 11:52:22.711407 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 11:52:22.714182 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 11:52:22.717513 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 11:52:22.724739 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 11:52:22.727778 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 11:52:22.731307 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 11:52:22.734544 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 11:52:22.741686 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 11:52:22.741770 call enable_fixed_mtrr()
2044 11:52:22.748101 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 11:52:22.751607 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 11:52:22.755282 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 11:52:22.758463 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 11:52:22.764958 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 11:52:22.768102 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 11:52:22.771913 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 11:52:22.775216 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 11:52:22.781084 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 11:52:22.784397 CPU physical address size: 39 bits
2054 11:52:22.787920 call enable_fixed_mtrr()
2055 11:52:22.791234 Reading cr50 TPM mode
2056 11:52:22.795228 MTRR: Fixed MSR 0x250 0x0606060606060606
2057 11:52:22.798619 MTRR: Fixed MSR 0x250 0x0606060606060606
2058 11:52:22.801934 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 11:52:22.808112 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 11:52:22.811698 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 11:52:22.815174 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 11:52:22.818442 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 11:52:22.825061 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 11:52:22.828321 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 11:52:22.831672 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 11:52:22.835006 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 11:52:22.841175 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 11:52:22.844352 MTRR: Fixed MSR 0x258 0x0606060606060606
2069 11:52:22.847855 call enable_fixed_mtrr()
2070 11:52:22.851176 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 11:52:22.854278 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 11:52:22.861016 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 11:52:22.864102 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 11:52:22.867357 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 11:52:22.870692 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 11:52:22.877305 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 11:52:22.880503 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 11:52:22.883887 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 11:52:22.887258 CPU physical address size: 39 bits
2080 11:52:22.894048 call enable_fixed_mtrr()
2081 11:52:22.896767 MTRR: Fixed MSR 0x250 0x0606060606060606
2082 11:52:22.900122 MTRR: Fixed MSR 0x250 0x0606060606060606
2083 11:52:22.904040 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 11:52:22.910756 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 11:52:22.913496 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 11:52:22.916946 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 11:52:22.920213 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 11:52:22.923587 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 11:52:22.930130 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 11:52:22.933416 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 11:52:22.936665 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 11:52:22.940426 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 11:52:22.947663 MTRR: Fixed MSR 0x258 0x0606060606060606
2094 11:52:22.947801 call enable_fixed_mtrr()
2095 11:52:22.954374 MTRR: Fixed MSR 0x259 0x0000000000000000
2096 11:52:22.957635 MTRR: Fixed MSR 0x268 0x0606060606060606
2097 11:52:22.961076 MTRR: Fixed MSR 0x269 0x0606060606060606
2098 11:52:22.964442 MTRR: Fixed MSR 0x26a 0x0606060606060606
2099 11:52:22.970916 MTRR: Fixed MSR 0x26b 0x0606060606060606
2100 11:52:22.973971 MTRR: Fixed MSR 0x26c 0x0606060606060606
2101 11:52:22.977425 MTRR: Fixed MSR 0x26d 0x0606060606060606
2102 11:52:22.981092 MTRR: Fixed MSR 0x26e 0x0606060606060606
2103 11:52:22.987655 MTRR: Fixed MSR 0x26f 0x0606060606060606
2104 11:52:22.991048 CPU physical address size: 39 bits
2105 11:52:22.993829 call enable_fixed_mtrr()
2106 11:52:22.997100 CPU physical address size: 39 bits
2107 11:52:23.000535 CPU physical address size: 39 bits
2108 11:52:23.007346 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2109 11:52:23.010748 CPU physical address size: 39 bits
2110 11:52:23.017421 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2111 11:52:23.024028 Checking segment from ROM address 0xffc02b38
2112 11:52:23.027283 Checking segment from ROM address 0xffc02b54
2113 11:52:23.030081 Loading segment from ROM address 0xffc02b38
2114 11:52:23.033399 code (compression=0)
2115 11:52:23.043386 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2116 11:52:23.050115 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2117 11:52:23.053291 it's not compressed!
2118 11:52:23.192264 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2119 11:52:23.198989 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2120 11:52:23.205769 Loading segment from ROM address 0xffc02b54
2121 11:52:23.209011 Entry Point 0x30000000
2122 11:52:23.209132 Loaded segments
2123 11:52:23.215702 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2124 11:52:23.258477 Finalizing chipset.
2125 11:52:23.261707 Finalizing SMM.
2126 11:52:23.261837 APMC done.
2127 11:52:23.268305 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2128 11:52:23.271397 mp_park_aps done after 0 msecs.
2129 11:52:23.274725 Jumping to boot code at 0x30000000(0x76b25000)
2130 11:52:23.284474 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2131 11:52:23.284601
2132 11:52:23.288382
2133 11:52:23.288492
2134 11:52:23.288936 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2135 11:52:23.289064 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2136 11:52:23.289186 Setting prompt string to ['volteer:']
2137 11:52:23.289300 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2138 11:52:23.291499 Starting depthcharge on Voema...
2139 11:52:23.291619
2140 11:52:23.297953 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2141 11:52:23.298063
2142 11:52:23.304489 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2143 11:52:23.304625
2144 11:52:23.311262 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2145 11:52:23.311391
2146 11:52:23.314687 Failed to find eMMC card reader
2147 11:52:23.314800
2148 11:52:23.317987 Wipe memory regions:
2149 11:52:23.318073
2150 11:52:23.321302 [0x00000000001000, 0x000000000a0000)
2151 11:52:23.321379
2152 11:52:23.324644 [0x00000000100000, 0x00000030000000)
2153 11:52:23.350375
2154 11:52:23.353578 [0x00000032662db0, 0x000000769ef000)
2155 11:52:23.389139
2156 11:52:23.392047 [0x00000100000000, 0x00000280400000)
2157 11:52:23.595712
2158 11:52:23.599156 ec_init: CrosEC protocol v3 supported (256, 256)
2159 11:52:23.599764
2160 11:52:23.605783 update_port_state: port C0 state: usb enable 1 mux conn 0
2161 11:52:23.606358
2162 11:52:23.612144 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2163 11:52:23.615397
2164 11:52:23.619195 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2165 11:52:23.619735
2166 11:52:23.625282 send_conn_disc_msg: pmc_send_cmd succeeded
2167 11:52:24.055630
2168 11:52:24.055934 R8152: Initializing
2169 11:52:24.056123
2170 11:52:24.059027 Version 6 (ocp_data = 5c30)
2171 11:52:24.059211
2172 11:52:24.062298 R8152: Done initializing
2173 11:52:24.062481
2174 11:52:24.065570 Adding net device
2175 11:52:24.367256
2176 11:52:24.370461 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2177 11:52:24.370558
2178 11:52:24.370625
2179 11:52:24.370686
2180 11:52:24.374059 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2182 11:52:24.474605 volteer: tftpboot 192.168.201.1 10875942/tftp-deploy-m0m87qiu/kernel/bzImage 10875942/tftp-deploy-m0m87qiu/kernel/cmdline 10875942/tftp-deploy-m0m87qiu/ramdisk/ramdisk.cpio.gz
2183 11:52:24.474779 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2184 11:52:24.474862 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2185 11:52:24.479212 tftpboot 192.168.201.1 10875942/tftp-deploy-m0m87qiu/kernel/bzIploy-m0m87qiu/kernel/cmdline 10875942/tftp-deploy-m0m87qiu/ramdisk/ramdisk.cpio.gz
2186 11:52:24.479299
2187 11:52:24.479364 Waiting for link
2188 11:52:24.682693
2189 11:52:24.682921 done.
2190 11:52:24.683043
2191 11:52:24.683156 MAC: 00:24:32:30:79:06
2192 11:52:24.683274
2193 11:52:24.685966 Sending DHCP discover... done.
2194 11:52:24.686121
2195 11:52:24.689298 Waiting for reply... done.
2196 11:52:24.689451
2197 11:52:24.692424 Sending DHCP request... done.
2198 11:52:24.692627
2199 11:52:24.999668 Waiting for reply... done.
2200 11:52:24.999822
2201 11:52:24.999890 My ip is 192.168.201.23
2202 11:52:24.999951
2203 11:52:25.006337 The DHCP server ip is 192.168.201.1
2204 11:52:25.006440
2205 11:52:25.009703 TFTP server IP predefined by user: 192.168.201.1
2206 11:52:25.009830
2207 11:52:25.016427 Bootfile predefined by user: 10875942/tftp-deploy-m0m87qiu/kernel/bzImage
2208 11:52:25.016583
2209 11:52:25.019698 Sending tftp read request... done.
2210 11:52:25.019884
2211 11:52:25.025998 Waiting for the transfer...
2212 11:52:25.026114
2213 11:52:25.568497 00000000 ################################################################
2214 11:52:25.568740
2215 11:52:26.156654 00080000 ################################################################
2216 11:52:26.156816
2217 11:52:26.697002 00100000 ################################################################
2218 11:52:26.697150
2219 11:52:27.312002 00180000 ################################################################
2220 11:52:27.312182
2221 11:52:27.958622 00200000 ################################################################
2222 11:52:27.958791
2223 11:52:28.539336 00280000 ################################################################
2224 11:52:28.539522
2225 11:52:29.062796 00300000 ################################################################
2226 11:52:29.062941
2227 11:52:29.585478 00380000 ################################################################
2228 11:52:29.585618
2229 11:52:30.120071 00400000 ################################################################
2230 11:52:30.120214
2231 11:52:30.652041 00480000 ################################################################
2232 11:52:30.652178
2233 11:52:31.203597 00500000 ################################################################
2234 11:52:31.203729
2235 11:52:31.833363 00580000 ################################################################
2236 11:52:31.833536
2237 11:52:32.378446 00600000 ################################################################
2238 11:52:32.378594
2239 11:52:32.980309 00680000 ################################################################
2240 11:52:32.980453
2241 11:52:33.574668 00700000 ################################################################
2242 11:52:33.575267
2243 11:52:34.132948 00780000 ################################################################
2244 11:52:34.133114
2245 11:52:34.689987 00800000 ################################################################
2246 11:52:34.690128
2247 11:52:35.225381 00880000 ################################################################
2248 11:52:35.225540
2249 11:52:35.778952 00900000 ################################################################
2250 11:52:35.779085
2251 11:52:36.300539 00980000 ################################################################
2252 11:52:36.300713
2253 11:52:36.676880 00a00000 ############################################## done.
2254 11:52:36.677036
2255 11:52:36.680177 The bootfile was 10859008 bytes long.
2256 11:52:36.680265
2257 11:52:36.683313 Sending tftp read request... done.
2258 11:52:36.683399
2259 11:52:36.686596 Waiting for the transfer...
2260 11:52:36.686683
2261 11:52:37.208438 00000000 ################################################################
2262 11:52:37.208624
2263 11:52:37.835163 00080000 ################################################################
2264 11:52:37.835347
2265 11:52:38.462519 00100000 ################################################################
2266 11:52:38.462677
2267 11:52:39.027748 00180000 ################################################################
2268 11:52:39.027939
2269 11:52:39.553516 00200000 ################################################################
2270 11:52:39.553696
2271 11:52:40.083168 00280000 ################################################################
2272 11:52:40.083313
2273 11:52:40.617669 00300000 ################################################################
2274 11:52:40.617829
2275 11:52:41.146265 00380000 ################################################################
2276 11:52:41.146427
2277 11:52:41.674670 00400000 ################################################################
2278 11:52:41.674822
2279 11:52:42.198970 00480000 ################################################################
2280 11:52:42.199122
2281 11:52:42.742821 00500000 ################################################################
2282 11:52:42.742975
2283 11:52:43.174152 00580000 ################################################ done.
2284 11:52:43.174332
2285 11:52:43.177090 Sending tftp read request... done.
2286 11:52:43.177172
2287 11:52:43.180855 Waiting for the transfer...
2288 11:52:43.180935
2289 11:52:43.181017 00000000 # done.
2290 11:52:43.181079
2291 11:52:43.190720 Command line loaded dynamically from TFTP file: 10875942/tftp-deploy-m0m87qiu/kernel/cmdline
2292 11:52:43.190807
2293 11:52:43.209951 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10875942/extract-nfsrootfs-cqbcmmol,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2294 11:52:43.214353
2295 11:52:43.217762 Shutting down all USB controllers.
2296 11:52:43.217875
2297 11:52:43.217944 Removing current net device
2298 11:52:43.218008
2299 11:52:43.220744 Finalizing coreboot
2300 11:52:43.220830
2301 11:52:43.227039 Exiting depthcharge with code 4 at timestamp: 28593984
2302 11:52:43.227126
2303 11:52:43.227193
2304 11:52:43.227255 Starting kernel ...
2305 11:52:43.227314
2306 11:52:43.227373
2307 11:52:43.227756 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2308 11:52:43.227854 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2309 11:52:43.227935 Setting prompt string to ['Linux version [0-9]']
2310 11:52:43.228004 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2311 11:52:43.228073 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2313 11:57:08.228158 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2315 11:57:08.228382 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2317 11:57:08.228622 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2320 11:57:08.229002 end: 2 depthcharge-action (duration 00:05:00) [common]
2322 11:57:08.229234 Cleaning after the job
2323 11:57:08.229327 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/ramdisk
2324 11:57:08.230166 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/kernel
2325 11:57:08.231495 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/nfsrootfs
2326 11:57:08.285883 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875942/tftp-deploy-m0m87qiu/modules
2327 11:57:08.286565 start: 5.1 power-off (timeout 00:00:30) [common]
2328 11:57:08.286757 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2329 11:57:08.361694 >> Command sent successfully.
2330 11:57:08.363972 Returned 0 in 0 seconds
2331 11:57:08.464396 end: 5.1 power-off (duration 00:00:00) [common]
2333 11:57:08.464777 start: 5.2 read-feedback (timeout 00:10:00) [common]
2334 11:57:08.465032 Listened to connection for namespace 'common' for up to 1s
2335 11:57:09.465964 Finalising connection for namespace 'common'
2336 11:57:09.466127 Disconnecting from shell: Finalise
2337 11:57:09.466216
2338 11:57:09.566529 end: 5.2 read-feedback (duration 00:00:01) [common]
2339 11:57:09.566678 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10875942
2340 11:57:09.820770 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10875942
2341 11:57:09.820958 JobError: Your job cannot terminate cleanly.