Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:51:47.541143 lava-dispatcher, installed at version: 2023.05.1
2 11:51:47.541346 start: 0 validate
3 11:51:47.541478 Start time: 2023-06-23 11:51:47.541471+00:00 (UTC)
4 11:51:47.541599 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:51:47.541727 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230609.0%2Famd64%2Finitrd.cpio.gz exists
6 11:51:47.800108 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:51:47.800305 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:51:48.058066 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:51:48.058256 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230609.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:51:48.323476 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:51:48.323713 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:51:48.582928 validate duration: 1.04
14 11:51:48.583194 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:51:48.583288 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:51:48.583374 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:51:48.583524 Not decompressing ramdisk as can be used compressed.
18 11:51:48.583651 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230609.0/amd64/initrd.cpio.gz
19 11:51:48.583715 saving as /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/ramdisk/initrd.cpio.gz
20 11:51:48.583778 total size: 6134280 (5MB)
21 11:51:48.584815 progress 0% (0MB)
22 11:51:48.586591 progress 5% (0MB)
23 11:51:48.588229 progress 10% (0MB)
24 11:51:48.589951 progress 15% (0MB)
25 11:51:48.591523 progress 20% (1MB)
26 11:51:48.593144 progress 25% (1MB)
27 11:51:48.594870 progress 30% (1MB)
28 11:51:48.596468 progress 35% (2MB)
29 11:51:48.598019 progress 40% (2MB)
30 11:51:48.599759 progress 45% (2MB)
31 11:51:48.601316 progress 50% (2MB)
32 11:51:48.602862 progress 55% (3MB)
33 11:51:48.604651 progress 60% (3MB)
34 11:51:48.606217 progress 65% (3MB)
35 11:51:48.607994 progress 70% (4MB)
36 11:51:48.609537 progress 75% (4MB)
37 11:51:48.611060 progress 80% (4MB)
38 11:51:48.612854 progress 85% (5MB)
39 11:51:48.614458 progress 90% (5MB)
40 11:51:48.616062 progress 95% (5MB)
41 11:51:48.617766 progress 100% (5MB)
42 11:51:48.617898 5MB downloaded in 0.03s (171.47MB/s)
43 11:51:48.618055 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:51:48.618295 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:51:48.618381 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:51:48.618486 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:51:48.618611 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:51:48.618690 saving as /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/kernel/bzImage
50 11:51:48.618754 total size: 10859008 (10MB)
51 11:51:48.618813 No compression specified
52 11:51:48.619965 progress 0% (0MB)
53 11:51:48.622723 progress 5% (0MB)
54 11:51:48.625677 progress 10% (1MB)
55 11:51:48.628500 progress 15% (1MB)
56 11:51:48.631330 progress 20% (2MB)
57 11:51:48.634005 progress 25% (2MB)
58 11:51:48.636903 progress 30% (3MB)
59 11:51:48.639710 progress 35% (3MB)
60 11:51:48.642584 progress 40% (4MB)
61 11:51:48.645503 progress 45% (4MB)
62 11:51:48.648214 progress 50% (5MB)
63 11:51:48.651170 progress 55% (5MB)
64 11:51:48.653931 progress 60% (6MB)
65 11:51:48.656922 progress 65% (6MB)
66 11:51:48.659650 progress 70% (7MB)
67 11:51:48.662601 progress 75% (7MB)
68 11:51:48.665522 progress 80% (8MB)
69 11:51:48.668305 progress 85% (8MB)
70 11:51:48.671133 progress 90% (9MB)
71 11:51:48.674122 progress 95% (9MB)
72 11:51:48.677016 progress 100% (10MB)
73 11:51:48.677180 10MB downloaded in 0.06s (177.26MB/s)
74 11:51:48.677320 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:51:48.677541 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:51:48.677625 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:51:48.677710 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:51:48.677848 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230609.0/amd64/full.rootfs.tar.xz
80 11:51:48.677915 saving as /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/nfsrootfs/full.rootfs.tar
81 11:51:48.677974 total size: 202725252 (193MB)
82 11:51:48.678032 Using unxz to decompress xz
83 11:51:48.681470 progress 0% (0MB)
84 11:51:49.251949 progress 5% (9MB)
85 11:51:49.775192 progress 10% (19MB)
86 11:51:50.334937 progress 15% (29MB)
87 11:51:50.607205 progress 20% (38MB)
88 11:51:51.138564 progress 25% (48MB)
89 11:51:51.699312 progress 30% (58MB)
90 11:51:52.266329 progress 35% (67MB)
91 11:51:52.834741 progress 40% (77MB)
92 11:51:53.413935 progress 45% (87MB)
93 11:51:54.013471 progress 50% (96MB)
94 11:51:54.599092 progress 55% (106MB)
95 11:51:55.273528 progress 60% (116MB)
96 11:51:55.689931 progress 65% (125MB)
97 11:51:55.785321 progress 70% (135MB)
98 11:51:55.934716 progress 75% (145MB)
99 11:51:56.023772 progress 80% (154MB)
100 11:51:56.082625 progress 85% (164MB)
101 11:51:56.171681 progress 90% (174MB)
102 11:51:56.534945 progress 95% (183MB)
103 11:51:57.122451 progress 100% (193MB)
104 11:51:57.128568 193MB downloaded in 8.45s (22.88MB/s)
105 11:51:57.128899 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:51:57.129301 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:51:57.129428 start: 1.4 download-retry (timeout 00:09:51) [common]
109 11:51:57.129547 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 11:51:57.129726 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:51:57.129825 saving as /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/modules/modules.tar
112 11:51:57.129915 total size: 483808 (0MB)
113 11:51:57.130006 Using unxz to decompress xz
114 11:51:57.133866 progress 6% (0MB)
115 11:51:57.134261 progress 13% (0MB)
116 11:51:57.134528 progress 20% (0MB)
117 11:51:57.135951 progress 27% (0MB)
118 11:51:57.138152 progress 33% (0MB)
119 11:51:57.140353 progress 40% (0MB)
120 11:51:57.142603 progress 47% (0MB)
121 11:51:57.144406 progress 54% (0MB)
122 11:51:57.146791 progress 60% (0MB)
123 11:51:57.149281 progress 67% (0MB)
124 11:51:57.151316 progress 74% (0MB)
125 11:51:57.153389 progress 81% (0MB)
126 11:51:57.155406 progress 88% (0MB)
127 11:51:57.157381 progress 94% (0MB)
128 11:51:57.159326 progress 100% (0MB)
129 11:51:57.165582 0MB downloaded in 0.04s (12.94MB/s)
130 11:51:57.165847 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:51:57.166107 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:51:57.166201 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 11:51:57.166297 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 11:52:00.502773 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10875933/extract-nfsrootfs-m7xc9j73
136 11:52:00.502980 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:52:00.503081 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 11:52:00.503247 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l
139 11:52:00.503369 makedir: /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin
140 11:52:00.503464 makedir: /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/tests
141 11:52:00.503557 makedir: /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/results
142 11:52:00.503755 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-add-keys
143 11:52:00.503893 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-add-sources
144 11:52:00.504018 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-background-process-start
145 11:52:00.504140 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-background-process-stop
146 11:52:00.504260 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-common-functions
147 11:52:00.504377 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-echo-ipv4
148 11:52:00.504495 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-install-packages
149 11:52:00.504612 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-installed-packages
150 11:52:00.504726 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-os-build
151 11:52:00.504841 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-probe-channel
152 11:52:00.504955 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-probe-ip
153 11:52:00.505069 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-target-ip
154 11:52:00.505185 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-target-mac
155 11:52:00.505298 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-target-storage
156 11:52:00.505414 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-test-case
157 11:52:00.505531 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-test-event
158 11:52:00.505646 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-test-feedback
159 11:52:00.505762 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-test-raise
160 11:52:00.505876 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-test-reference
161 11:52:00.505992 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-test-runner
162 11:52:00.506110 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-test-set
163 11:52:00.506224 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-test-shell
164 11:52:00.506342 Updating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-add-keys (debian)
165 11:52:00.506483 Updating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-add-sources (debian)
166 11:52:00.506615 Updating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-install-packages (debian)
167 11:52:00.506750 Updating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-installed-packages (debian)
168 11:52:00.506883 Updating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/bin/lava-os-build (debian)
169 11:52:00.507000 Creating /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/environment
170 11:52:00.507095 LAVA metadata
171 11:52:00.507162 - LAVA_JOB_ID=10875933
172 11:52:00.507223 - LAVA_DISPATCHER_IP=192.168.201.1
173 11:52:00.507316 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 11:52:00.507380 skipped lava-vland-overlay
175 11:52:00.507451 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 11:52:00.507535 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 11:52:00.507609 skipped lava-multinode-overlay
178 11:52:00.507682 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 11:52:00.507761 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 11:52:00.507832 Loading test definitions
181 11:52:00.507919 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 11:52:00.507988 Using /lava-10875933 at stage 0
183 11:52:00.508251 uuid=10875933_1.5.2.3.1 testdef=None
184 11:52:00.508337 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 11:52:00.508418 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 11:52:00.508848 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 11:52:00.509062 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 11:52:00.509593 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 11:52:00.509816 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 11:52:00.510343 runner path: /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/0/tests/0_timesync-off test_uuid 10875933_1.5.2.3.1
193 11:52:00.510491 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 11:52:00.510709 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 11:52:00.510779 Using /lava-10875933 at stage 0
197 11:52:00.510871 Fetching tests from https://github.com/kernelci/test-definitions.git
198 11:52:00.510945 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/0/tests/1_kselftest-alsa'
199 11:52:06.897965 Running '/usr/bin/git checkout kernelci.org
200 11:52:07.040719 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
201 11:52:07.041450 uuid=10875933_1.5.2.3.5 testdef=None
202 11:52:07.041630 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
204 11:52:07.041926 start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
205 11:52:07.043082 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 11:52:07.043469 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
208 11:52:07.044895 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 11:52:07.045181 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
211 11:52:07.046311 runner path: /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/0/tests/1_kselftest-alsa test_uuid 10875933_1.5.2.3.5
212 11:52:07.046435 BOARD='asus-cx9400-volteer'
213 11:52:07.046511 BRANCH='cip'
214 11:52:07.046607 SKIPFILE='/dev/null'
215 11:52:07.046704 SKIP_INSTALL='True'
216 11:52:07.046798 TESTPROG_URL='None'
217 11:52:07.046893 TST_CASENAME=''
218 11:52:07.046987 TST_CMDFILES='alsa'
219 11:52:07.047183 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 11:52:07.047538 Creating lava-test-runner.conf files
222 11:52:07.047659 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10875933/lava-overlay-t1pkd55l/lava-10875933/0 for stage 0
223 11:52:07.047786 - 0_timesync-off
224 11:52:07.047884 - 1_kselftest-alsa
225 11:52:07.047986 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
226 11:52:07.048077 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
227 11:52:14.646268 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 11:52:14.646414 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
229 11:52:14.646540 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 11:52:14.646689 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
231 11:52:14.646816 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
232 11:52:14.801473 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 11:52:14.801848 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
234 11:52:14.801969 extracting modules file /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875933/extract-nfsrootfs-m7xc9j73
235 11:52:14.822405 extracting modules file /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875933/extract-overlay-ramdisk-uq90deh4/ramdisk
236 11:52:14.842877 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 11:52:14.843029 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
238 11:52:14.843136 [common] Applying overlay to NFS
239 11:52:14.843210 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10875933/compress-overlay-6xzy0uki/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10875933/extract-nfsrootfs-m7xc9j73
240 11:52:15.756902 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 11:52:15.757071 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
242 11:52:15.757179 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 11:52:15.757273 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
244 11:52:15.757354 Building ramdisk /var/lib/lava/dispatcher/tmp/10875933/extract-overlay-ramdisk-uq90deh4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10875933/extract-overlay-ramdisk-uq90deh4/ramdisk
245 11:52:15.840032 >> 34862 blocks
246 11:52:16.523545 rename /var/lib/lava/dispatcher/tmp/10875933/extract-overlay-ramdisk-uq90deh4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/ramdisk/ramdisk.cpio.gz
247 11:52:16.524019 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 11:52:16.524155 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
249 11:52:16.524272 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
250 11:52:16.524381 No mkimage arch provided, not using FIT.
251 11:52:16.524481 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 11:52:16.524583 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 11:52:16.524709 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
254 11:52:16.524848 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
255 11:52:16.524969 No LXC device requested
256 11:52:16.525090 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 11:52:16.525219 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
258 11:52:16.525313 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 11:52:16.525393 Checking files for TFTP limit of 4294967296 bytes.
260 11:52:16.525906 end: 1 tftp-deploy (duration 00:00:28) [common]
261 11:52:16.526042 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 11:52:16.526171 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 11:52:16.526346 substitutions:
264 11:52:16.526441 - {DTB}: None
265 11:52:16.526539 - {INITRD}: 10875933/tftp-deploy-08g20g2l/ramdisk/ramdisk.cpio.gz
266 11:52:16.526635 - {KERNEL}: 10875933/tftp-deploy-08g20g2l/kernel/bzImage
267 11:52:16.526730 - {LAVA_MAC}: None
268 11:52:16.526817 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10875933/extract-nfsrootfs-m7xc9j73
269 11:52:16.526916 - {NFS_SERVER_IP}: 192.168.201.1
270 11:52:16.527011 - {PRESEED_CONFIG}: None
271 11:52:16.527105 - {PRESEED_LOCAL}: None
272 11:52:16.527197 - {RAMDISK}: 10875933/tftp-deploy-08g20g2l/ramdisk/ramdisk.cpio.gz
273 11:52:16.527289 - {ROOT_PART}: None
274 11:52:16.527381 - {ROOT}: None
275 11:52:16.527473 - {SERVER_IP}: 192.168.201.1
276 11:52:16.527564 - {TEE}: None
277 11:52:16.527704 Parsed boot commands:
278 11:52:16.527795 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 11:52:16.528024 Parsed boot commands: tftpboot 192.168.201.1 10875933/tftp-deploy-08g20g2l/kernel/bzImage 10875933/tftp-deploy-08g20g2l/kernel/cmdline 10875933/tftp-deploy-08g20g2l/ramdisk/ramdisk.cpio.gz
280 11:52:16.528148 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 11:52:16.528274 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 11:52:16.528406 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 11:52:16.528533 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 11:52:16.528636 Not connected, no need to disconnect.
285 11:52:16.528750 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 11:52:16.528874 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 11:52:16.528976 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
288 11:52:16.532229 Setting prompt string to ['lava-test: # ']
289 11:52:16.532597 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 11:52:16.532741 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 11:52:16.532852 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 11:52:16.532960 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 11:52:16.533162 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
294 11:52:21.683062 >> Command sent successfully.
295 11:52:21.693198 Returned 0 in 5 seconds
296 11:52:21.794573 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 11:52:21.796006 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 11:52:21.796548 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 11:52:21.797019 Setting prompt string to 'Starting depthcharge on Voema...'
301 11:52:21.797372 Changing prompt to 'Starting depthcharge on Voema...'
302 11:52:21.797752 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
303 11:52:21.798941 [Enter `^Ec?' for help]
304 11:52:23.352897
305 11:52:23.353070
306 11:52:23.360365 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
307 11:52:23.368064 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
308 11:52:23.371919 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
309 11:52:23.375673 CPU: AES supported, TXT NOT supported, VT supported
310 11:52:23.383547 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
311 11:52:23.387073 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
312 11:52:23.390780 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
313 11:52:23.395490 VBOOT: Loading verstage.
314 11:52:23.399606 FMAP: Found "FLASH" version 1.1 at 0x1804000.
315 11:52:23.406963 FMAP: base = 0x0 size = 0x2000000 #areas = 32
316 11:52:23.410749 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
317 11:52:23.418012 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
318 11:52:23.425682 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
319 11:52:23.428922
320 11:52:23.429345
321 11:52:23.438818 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
322 11:52:23.453526 Probing TPM: . done!
323 11:52:23.456832 TPM ready after 0 ms
324 11:52:23.460019 Connected to device vid:did:rid of 1ae0:0028:00
325 11:52:23.471167 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
326 11:52:23.477753 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
327 11:52:23.481105 Initialized TPM device CR50 revision 0
328 11:52:23.574227 tlcl_send_startup: Startup return code is 0
329 11:52:23.574710 TPM: setup succeeded
330 11:52:23.589636 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
331 11:52:23.604927 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
332 11:52:23.618787 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
333 11:52:23.628773 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
334 11:52:23.632746 Chrome EC: UHEPI supported
335 11:52:23.636147 Phase 1
336 11:52:23.639391 FMAP: area GBB found @ 1805000 (458752 bytes)
337 11:52:23.649071 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 11:52:23.655862 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 11:52:23.662076 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
340 11:52:23.669227 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
341 11:52:23.672378 Recovery requested (1009000e)
342 11:52:23.675357 TPM: Extending digest for VBOOT: boot mode into PCR 0
343 11:52:23.687197 tlcl_extend: response is 0
344 11:52:23.693996 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
345 11:52:23.703757 tlcl_extend: response is 0
346 11:52:23.710471 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
347 11:52:23.717061 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
348 11:52:23.723529 BS: verstage times (exec / console): total (unknown) / 142 ms
349 11:52:23.724007
350 11:52:23.724339
351 11:52:23.737230 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
352 11:52:23.743692 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
353 11:52:23.746847 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
354 11:52:23.750198 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
355 11:52:23.756742 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
356 11:52:23.760581 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
357 11:52:23.763277 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
358 11:52:23.766537 TCO_STS: 0000 0000
359 11:52:23.769890 GEN_PMCON: d0015038 00002200
360 11:52:23.773794 GBLRST_CAUSE: 00000000 00000000
361 11:52:23.774257 HPR_CAUSE0: 00000000
362 11:52:23.776658 prev_sleep_state 5
363 11:52:23.779836 Boot Count incremented to 20586
364 11:52:23.786816 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
365 11:52:23.793818 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
366 11:52:23.801040 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
367 11:52:23.807238 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
368 11:52:23.811302 Chrome EC: UHEPI supported
369 11:52:23.817890 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
370 11:52:23.830936 Probing TPM: done!
371 11:52:23.837407 Connected to device vid:did:rid of 1ae0:0028:00
372 11:52:23.847313 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
373 11:52:23.850614 Initialized TPM device CR50 revision 0
374 11:52:23.866109 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
375 11:52:23.872652 MRC: Hash idx 0x100b comparison successful.
376 11:52:23.875700 MRC cache found, size faa8
377 11:52:23.876121 bootmode is set to: 2
378 11:52:23.879021 SPD index = 0
379 11:52:23.886041 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
380 11:52:23.889256 SPD: module type is LPDDR4X
381 11:52:23.895775 SPD: module part number is MT53E512M64D4NW-046
382 11:52:23.899085 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
383 11:52:23.905689 SPD: device width 16 bits, bus width 16 bits
384 11:52:23.908915 SPD: module size is 1024 MB (per channel)
385 11:52:24.342378 CBMEM:
386 11:52:24.345827 IMD: root @ 0x76fff000 254 entries.
387 11:52:24.349062 IMD: root @ 0x76ffec00 62 entries.
388 11:52:24.352320 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
389 11:52:24.358373 FMAP: area RW_VPD found @ f35000 (8192 bytes)
390 11:52:24.361929 External stage cache:
391 11:52:24.365035 IMD: root @ 0x7b3ff000 254 entries.
392 11:52:24.368233 IMD: root @ 0x7b3fec00 62 entries.
393 11:52:24.383891 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
394 11:52:24.390564 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
395 11:52:24.397142 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
396 11:52:24.411053 MRC: 'RECOVERY_MRC_CACHE' does not need update.
397 11:52:24.417565 cse_lite: Skip switching to RW in the recovery path
398 11:52:24.417651 8 DIMMs found
399 11:52:24.417799 SMM Memory Map
400 11:52:24.424211 SMRAM : 0x7b000000 0x800000
401 11:52:24.427476 Subregion 0: 0x7b000000 0x200000
402 11:52:24.430778 Subregion 1: 0x7b200000 0x200000
403 11:52:24.434025 Subregion 2: 0x7b400000 0x400000
404 11:52:24.434113 top_of_ram = 0x77000000
405 11:52:24.441064 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
406 11:52:24.447682 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
407 11:52:24.450943 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
408 11:52:24.457562 MTRR Range: Start=ff000000 End=0 (Size 1000000)
409 11:52:24.464303 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
410 11:52:24.470832 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
411 11:52:24.480769 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
412 11:52:24.487082 Processing 211 relocs. Offset value of 0x74c0b000
413 11:52:24.493958 BS: romstage times (exec / console): total (unknown) / 277 ms
414 11:52:24.500199
415 11:52:24.500273
416 11:52:24.509825 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
417 11:52:24.513097 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
418 11:52:24.523440 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
419 11:52:24.530178 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
420 11:52:24.536680 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
421 11:52:24.543078 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
422 11:52:24.590028 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
423 11:52:24.596520 Processing 5008 relocs. Offset value of 0x75d98000
424 11:52:24.599869 BS: postcar times (exec / console): total (unknown) / 59 ms
425 11:52:24.603624
426 11:52:24.603697
427 11:52:24.613548 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
428 11:52:24.613626 Normal boot
429 11:52:24.616618 FW_CONFIG value is 0x804c02
430 11:52:24.619881 PCI: 00:07.0 disabled by fw_config
431 11:52:24.623001 PCI: 00:07.1 disabled by fw_config
432 11:52:24.626719 PCI: 00:0d.2 disabled by fw_config
433 11:52:24.629586 PCI: 00:1c.7 disabled by fw_config
434 11:52:24.636647 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
435 11:52:24.642998 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
436 11:52:24.646244 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
437 11:52:24.649987 GENERIC: 0.0 disabled by fw_config
438 11:52:24.656475 GENERIC: 1.0 disabled by fw_config
439 11:52:24.659737 fw_config match found: DB_USB=USB3_ACTIVE
440 11:52:24.662835 fw_config match found: DB_USB=USB3_ACTIVE
441 11:52:24.666156 fw_config match found: DB_USB=USB3_ACTIVE
442 11:52:24.673032 fw_config match found: DB_USB=USB3_ACTIVE
443 11:52:24.676358 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
444 11:52:24.683128 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
445 11:52:24.693112 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
446 11:52:24.699745 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
447 11:52:24.702753 microcode: sig=0x806c1 pf=0x80 revision=0x86
448 11:52:24.709565 microcode: Update skipped, already up-to-date
449 11:52:24.716137 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
450 11:52:24.743416 Detected 4 core, 8 thread CPU.
451 11:52:24.747346 Setting up SMI for CPU
452 11:52:24.750576 IED base = 0x7b400000
453 11:52:24.750658 IED size = 0x00400000
454 11:52:24.753421 Will perform SMM setup.
455 11:52:24.760422 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
456 11:52:24.767053 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
457 11:52:24.773658 Processing 16 relocs. Offset value of 0x00030000
458 11:52:24.776932 Attempting to start 7 APs
459 11:52:24.780143 Waiting for 10ms after sending INIT.
460 11:52:24.795878 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
461 11:52:24.798788 AP: slot 2 apic_id 3.
462 11:52:24.802351 AP: slot 6 apic_id 2.
463 11:52:24.802437 done.
464 11:52:24.802502 AP: slot 7 apic_id 6.
465 11:52:24.805488 AP: slot 3 apic_id 7.
466 11:52:24.808960 AP: slot 5 apic_id 4.
467 11:52:24.809050 AP: slot 4 apic_id 5.
468 11:52:24.815652 Waiting for 2nd SIPI to complete...done.
469 11:52:24.822142 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
470 11:52:24.829257 Processing 13 relocs. Offset value of 0x00038000
471 11:52:24.829366 Unable to locate Global NVS
472 11:52:24.839004 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
473 11:52:24.842325 Installing permanent SMM handler to 0x7b000000
474 11:52:24.851968 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
475 11:52:24.855166 Processing 794 relocs. Offset value of 0x7b010000
476 11:52:24.865431 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
477 11:52:24.868653 Processing 13 relocs. Offset value of 0x7b008000
478 11:52:24.875338 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
479 11:52:24.881943 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
480 11:52:24.885313 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
481 11:52:24.891803 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
482 11:52:24.898520 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
483 11:52:24.904901 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
484 11:52:24.911957 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
485 11:52:24.912051 Unable to locate Global NVS
486 11:52:24.921671 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
487 11:52:24.925021 Clearing SMI status registers
488 11:52:24.925098 SMI_STS: PM1
489 11:52:24.928231 PM1_STS: PWRBTN
490 11:52:24.935048 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
491 11:52:24.938284 In relocation handler: CPU 0
492 11:52:24.941485 New SMBASE=0x7b000000 IEDBASE=0x7b400000
493 11:52:24.947824 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 11:52:24.947908 Relocation complete.
495 11:52:24.957781 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
496 11:52:24.961240 In relocation handler: CPU 1
497 11:52:24.964853 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
498 11:52:24.964928 Relocation complete.
499 11:52:24.974736 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
500 11:52:24.974818 In relocation handler: CPU 7
501 11:52:24.981221 New SMBASE=0x7affe400 IEDBASE=0x7b400000
502 11:52:24.984778 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 11:52:24.987873 Relocation complete.
504 11:52:24.994827 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
505 11:52:24.997946 In relocation handler: CPU 3
506 11:52:25.001052 New SMBASE=0x7afff400 IEDBASE=0x7b400000
507 11:52:25.004698 Relocation complete.
508 11:52:25.011136 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
509 11:52:25.014342 In relocation handler: CPU 2
510 11:52:25.017552 New SMBASE=0x7afff800 IEDBASE=0x7b400000
511 11:52:25.020968 Relocation complete.
512 11:52:25.027584 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
513 11:52:25.031329 In relocation handler: CPU 6
514 11:52:25.035017 New SMBASE=0x7affe800 IEDBASE=0x7b400000
515 11:52:25.038767 Writing SMRR. base = 0x7b000006, mask=0xff800c00
516 11:52:25.042542 Relocation complete.
517 11:52:25.049132 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
518 11:52:25.052301 In relocation handler: CPU 5
519 11:52:25.055505 New SMBASE=0x7affec00 IEDBASE=0x7b400000
520 11:52:25.062163 Writing SMRR. base = 0x7b000006, mask=0xff800c00
521 11:52:25.062246 Relocation complete.
522 11:52:25.069129 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
523 11:52:25.072321 In relocation handler: CPU 4
524 11:52:25.079032 New SMBASE=0x7afff000 IEDBASE=0x7b400000
525 11:52:25.079115 Relocation complete.
526 11:52:25.082388 Initializing CPU #0
527 11:52:25.085549 CPU: vendor Intel device 806c1
528 11:52:25.088755 CPU: family 06, model 8c, stepping 01
529 11:52:25.091838 Clearing out pending MCEs
530 11:52:25.095789 Setting up local APIC...
531 11:52:25.095874 apic_id: 0x00 done.
532 11:52:25.098730 Turbo is available but hidden
533 11:52:25.101840 Turbo is available and visible
534 11:52:25.108434 microcode: Update skipped, already up-to-date
535 11:52:25.108520 CPU #0 initialized
536 11:52:25.112015 Initializing CPU #6
537 11:52:25.112100 Initializing CPU #2
538 11:52:25.115226 CPU: vendor Intel device 806c1
539 11:52:25.121738 CPU: family 06, model 8c, stepping 01
540 11:52:25.121823 CPU: vendor Intel device 806c1
541 11:52:25.128436 CPU: family 06, model 8c, stepping 01
542 11:52:25.128522 Clearing out pending MCEs
543 11:52:25.131911 Clearing out pending MCEs
544 11:52:25.135183 Setting up local APIC...
545 11:52:25.138611 Initializing CPU #3
546 11:52:25.138697 Initializing CPU #7
547 11:52:25.141624 CPU: vendor Intel device 806c1
548 11:52:25.144792 CPU: family 06, model 8c, stepping 01
549 11:52:25.148547 CPU: vendor Intel device 806c1
550 11:52:25.151802 CPU: family 06, model 8c, stepping 01
551 11:52:25.155103 Clearing out pending MCEs
552 11:52:25.158487 Clearing out pending MCEs
553 11:52:25.161668 Setting up local APIC...
554 11:52:25.161753 Initializing CPU #5
555 11:52:25.164933 Initializing CPU #4
556 11:52:25.168098 CPU: vendor Intel device 806c1
557 11:52:25.171505 CPU: family 06, model 8c, stepping 01
558 11:52:25.175206 CPU: vendor Intel device 806c1
559 11:52:25.178280 CPU: family 06, model 8c, stepping 01
560 11:52:25.181645 Clearing out pending MCEs
561 11:52:25.184924 Clearing out pending MCEs
562 11:52:25.188049 Setting up local APIC...
563 11:52:25.188134 apic_id: 0x07 done.
564 11:52:25.191478 Setting up local APIC...
565 11:52:25.194585 Setting up local APIC...
566 11:52:25.194669 Initializing CPU #1
567 11:52:25.198450 Setting up local APIC...
568 11:52:25.201238 CPU: vendor Intel device 806c1
569 11:52:25.204853 CPU: family 06, model 8c, stepping 01
570 11:52:25.208011 apic_id: 0x06 done.
571 11:52:25.211311 microcode: Update skipped, already up-to-date
572 11:52:25.217871 microcode: Update skipped, already up-to-date
573 11:52:25.217956 CPU #3 initialized
574 11:52:25.221271 CPU #7 initialized
575 11:52:25.221359 apic_id: 0x05 done.
576 11:52:25.224479 apic_id: 0x04 done.
577 11:52:25.228316 microcode: Update skipped, already up-to-date
578 11:52:25.235002 microcode: Update skipped, already up-to-date
579 11:52:25.235088 apic_id: 0x03 done.
580 11:52:25.237949 apic_id: 0x02 done.
581 11:52:25.241530 microcode: Update skipped, already up-to-date
582 11:52:25.248487 microcode: Update skipped, already up-to-date
583 11:52:25.248925 CPU #2 initialized
584 11:52:25.251807 CPU #6 initialized
585 11:52:25.254808 Clearing out pending MCEs
586 11:52:25.255246 CPU #4 initialized
587 11:52:25.258227 CPU #5 initialized
588 11:52:25.261522 Setting up local APIC...
589 11:52:25.261949 apic_id: 0x01 done.
590 11:52:25.268003 microcode: Update skipped, already up-to-date
591 11:52:25.271221 CPU #1 initialized
592 11:52:25.274659 bsp_do_flight_plan done after 455 msecs.
593 11:52:25.277851 CPU: frequency set to 4000 MHz
594 11:52:25.277950 Enabling SMIs.
595 11:52:25.284631 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
596 11:52:25.300807 SATAXPCIE1 indicates PCIe NVMe is present
597 11:52:25.304609 Probing TPM: done!
598 11:52:25.307881 Connected to device vid:did:rid of 1ae0:0028:00
599 11:52:25.318343 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
600 11:52:25.321437 Initialized TPM device CR50 revision 0
601 11:52:25.324956 Enabling S0i3.4
602 11:52:25.331452 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
603 11:52:25.334830 Found a VBT of 8704 bytes after decompression
604 11:52:25.341797 cse_lite: CSE RO boot. HybridStorageMode disabled
605 11:52:25.348442 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
606 11:52:25.423628 FSPS returned 0
607 11:52:25.426799 Executing Phase 1 of FspMultiPhaseSiInit
608 11:52:25.437071 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
609 11:52:25.440403 port C0 DISC req: usage 1 usb3 1 usb2 5
610 11:52:25.443667 Raw Buffer output 0 00000511
611 11:52:25.446869 Raw Buffer output 1 00000000
612 11:52:25.450947 pmc_send_ipc_cmd succeeded
613 11:52:25.457309 port C1 DISC req: usage 1 usb3 2 usb2 3
614 11:52:25.457410 Raw Buffer output 0 00000321
615 11:52:25.460504 Raw Buffer output 1 00000000
616 11:52:25.464641 pmc_send_ipc_cmd succeeded
617 11:52:25.469943 Detected 4 core, 8 thread CPU.
618 11:52:25.473248 Detected 4 core, 8 thread CPU.
619 11:52:25.706904 Display FSP Version Info HOB
620 11:52:25.710577 Reference Code - CPU = a.0.4c.31
621 11:52:25.713794 uCode Version = 0.0.0.86
622 11:52:25.716941 TXT ACM version = ff.ff.ff.ffff
623 11:52:25.720153 Reference Code - ME = a.0.4c.31
624 11:52:25.723501 MEBx version = 0.0.0.0
625 11:52:25.727288 ME Firmware Version = Consumer SKU
626 11:52:25.730304 Reference Code - PCH = a.0.4c.31
627 11:52:25.733485 PCH-CRID Status = Disabled
628 11:52:25.737252 PCH-CRID Original Value = ff.ff.ff.ffff
629 11:52:25.740100 PCH-CRID New Value = ff.ff.ff.ffff
630 11:52:25.743838 OPROM - RST - RAID = ff.ff.ff.ffff
631 11:52:25.746684 PCH Hsio Version = 4.0.0.0
632 11:52:25.750472 Reference Code - SA - System Agent = a.0.4c.31
633 11:52:25.753792 Reference Code - MRC = 2.0.0.1
634 11:52:25.756969 SA - PCIe Version = a.0.4c.31
635 11:52:25.760296 SA-CRID Status = Disabled
636 11:52:25.763352 SA-CRID Original Value = 0.0.0.1
637 11:52:25.766741 SA-CRID New Value = 0.0.0.1
638 11:52:25.770160 OPROM - VBIOS = ff.ff.ff.ffff
639 11:52:25.773172 IO Manageability Engine FW Version = 11.1.4.0
640 11:52:25.776837 PHY Build Version = 0.0.0.e0
641 11:52:25.779904 Thunderbolt(TM) FW Version = 0.0.0.0
642 11:52:25.786730 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
643 11:52:25.790167 ITSS IRQ Polarities Before:
644 11:52:25.790303 IPC0: 0xffffffff
645 11:52:25.793825 IPC1: 0xffffffff
646 11:52:25.793979 IPC2: 0xffffffff
647 11:52:25.796895 IPC3: 0xffffffff
648 11:52:25.800299 ITSS IRQ Polarities After:
649 11:52:25.800474 IPC0: 0xffffffff
650 11:52:25.803672 IPC1: 0xffffffff
651 11:52:25.804101 IPC2: 0xffffffff
652 11:52:25.806860 IPC3: 0xffffffff
653 11:52:25.810124 Found PCIe Root Port #9 at PCI: 00:1d.0.
654 11:52:25.823626 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
655 11:52:25.833420 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
656 11:52:25.847008 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
657 11:52:25.853514 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
658 11:52:25.856814 Enumerating buses...
659 11:52:25.859966 Show all devs... Before device enumeration.
660 11:52:25.863380 Root Device: enabled 1
661 11:52:25.863851 DOMAIN: 0000: enabled 1
662 11:52:25.866735 CPU_CLUSTER: 0: enabled 1
663 11:52:25.870073 PCI: 00:00.0: enabled 1
664 11:52:25.873221 PCI: 00:02.0: enabled 1
665 11:52:25.873645 PCI: 00:04.0: enabled 1
666 11:52:25.876778 PCI: 00:05.0: enabled 1
667 11:52:25.879806 PCI: 00:06.0: enabled 0
668 11:52:25.883297 PCI: 00:07.0: enabled 0
669 11:52:25.883801 PCI: 00:07.1: enabled 0
670 11:52:25.886526 PCI: 00:07.2: enabled 0
671 11:52:25.890124 PCI: 00:07.3: enabled 0
672 11:52:25.890548 PCI: 00:08.0: enabled 1
673 11:52:25.892932 PCI: 00:09.0: enabled 0
674 11:52:25.896813 PCI: 00:0a.0: enabled 0
675 11:52:25.899921 PCI: 00:0d.0: enabled 1
676 11:52:25.900370 PCI: 00:0d.1: enabled 0
677 11:52:25.903353 PCI: 00:0d.2: enabled 0
678 11:52:25.906572 PCI: 00:0d.3: enabled 0
679 11:52:25.909815 PCI: 00:0e.0: enabled 0
680 11:52:25.910237 PCI: 00:10.2: enabled 1
681 11:52:25.913161 PCI: 00:10.6: enabled 0
682 11:52:25.916373 PCI: 00:10.7: enabled 0
683 11:52:25.919681 PCI: 00:12.0: enabled 0
684 11:52:25.920173 PCI: 00:12.6: enabled 0
685 11:52:25.923414 PCI: 00:13.0: enabled 0
686 11:52:25.926515 PCI: 00:14.0: enabled 1
687 11:52:25.929810 PCI: 00:14.1: enabled 0
688 11:52:25.930378 PCI: 00:14.2: enabled 1
689 11:52:25.933118 PCI: 00:14.3: enabled 1
690 11:52:25.936378 PCI: 00:15.0: enabled 1
691 11:52:25.936799 PCI: 00:15.1: enabled 1
692 11:52:25.940051 PCI: 00:15.2: enabled 1
693 11:52:25.943138 PCI: 00:15.3: enabled 1
694 11:52:25.946421 PCI: 00:16.0: enabled 1
695 11:52:25.946969 PCI: 00:16.1: enabled 0
696 11:52:25.949759 PCI: 00:16.2: enabled 0
697 11:52:25.953113 PCI: 00:16.3: enabled 0
698 11:52:25.956304 PCI: 00:16.4: enabled 0
699 11:52:25.956732 PCI: 00:16.5: enabled 0
700 11:52:25.959679 PCI: 00:17.0: enabled 1
701 11:52:25.962893 PCI: 00:19.0: enabled 0
702 11:52:25.966716 PCI: 00:19.1: enabled 1
703 11:52:25.967156 PCI: 00:19.2: enabled 0
704 11:52:25.970119 PCI: 00:1c.0: enabled 1
705 11:52:25.973453 PCI: 00:1c.1: enabled 0
706 11:52:25.973876 PCI: 00:1c.2: enabled 0
707 11:52:25.976616 PCI: 00:1c.3: enabled 0
708 11:52:25.979816 PCI: 00:1c.4: enabled 0
709 11:52:25.983109 PCI: 00:1c.5: enabled 0
710 11:52:25.983683 PCI: 00:1c.6: enabled 1
711 11:52:25.986641 PCI: 00:1c.7: enabled 0
712 11:52:25.989495 PCI: 00:1d.0: enabled 1
713 11:52:25.993053 PCI: 00:1d.1: enabled 0
714 11:52:25.993487 PCI: 00:1d.2: enabled 1
715 11:52:25.996026 PCI: 00:1d.3: enabled 0
716 11:52:25.999080 PCI: 00:1e.0: enabled 1
717 11:52:26.002786 PCI: 00:1e.1: enabled 0
718 11:52:26.002894 PCI: 00:1e.2: enabled 1
719 11:52:26.006109 PCI: 00:1e.3: enabled 1
720 11:52:26.009433 PCI: 00:1f.0: enabled 1
721 11:52:26.012827 PCI: 00:1f.1: enabled 0
722 11:52:26.012911 PCI: 00:1f.2: enabled 1
723 11:52:26.016023 PCI: 00:1f.3: enabled 1
724 11:52:26.019214 PCI: 00:1f.4: enabled 0
725 11:52:26.019298 PCI: 00:1f.5: enabled 1
726 11:52:26.022486 PCI: 00:1f.6: enabled 0
727 11:52:26.025715 PCI: 00:1f.7: enabled 0
728 11:52:26.029382 APIC: 00: enabled 1
729 11:52:26.029471 GENERIC: 0.0: enabled 1
730 11:52:26.032453 GENERIC: 0.0: enabled 1
731 11:52:26.035777 GENERIC: 1.0: enabled 1
732 11:52:26.035862 GENERIC: 0.0: enabled 1
733 11:52:26.039097 GENERIC: 1.0: enabled 1
734 11:52:26.042716 USB0 port 0: enabled 1
735 11:52:26.045822 GENERIC: 0.0: enabled 1
736 11:52:26.045912 USB0 port 0: enabled 1
737 11:52:26.048997 GENERIC: 0.0: enabled 1
738 11:52:26.052402 I2C: 00:1a: enabled 1
739 11:52:26.052487 I2C: 00:31: enabled 1
740 11:52:26.055720 I2C: 00:32: enabled 1
741 11:52:26.058957 I2C: 00:10: enabled 1
742 11:52:26.059041 I2C: 00:15: enabled 1
743 11:52:26.062471 GENERIC: 0.0: enabled 0
744 11:52:26.066089 GENERIC: 1.0: enabled 0
745 11:52:26.069474 GENERIC: 0.0: enabled 1
746 11:52:26.069558 SPI: 00: enabled 1
747 11:52:26.072757 SPI: 00: enabled 1
748 11:52:26.075805 PNP: 0c09.0: enabled 1
749 11:52:26.075896 GENERIC: 0.0: enabled 1
750 11:52:26.079183 USB3 port 0: enabled 1
751 11:52:26.082359 USB3 port 1: enabled 1
752 11:52:26.082455 USB3 port 2: enabled 0
753 11:52:26.085555 USB3 port 3: enabled 0
754 11:52:26.089182 USB2 port 0: enabled 0
755 11:52:26.092492 USB2 port 1: enabled 1
756 11:52:26.092618 USB2 port 2: enabled 1
757 11:52:26.095956 USB2 port 3: enabled 0
758 11:52:26.099138 USB2 port 4: enabled 1
759 11:52:26.099278 USB2 port 5: enabled 0
760 11:52:26.102111 USB2 port 6: enabled 0
761 11:52:26.105602 USB2 port 7: enabled 0
762 11:52:26.109118 USB2 port 8: enabled 0
763 11:52:26.109297 USB2 port 9: enabled 0
764 11:52:26.112574 USB3 port 0: enabled 0
765 11:52:26.115629 USB3 port 1: enabled 1
766 11:52:26.115850 USB3 port 2: enabled 0
767 11:52:26.118910 USB3 port 3: enabled 0
768 11:52:26.122203 GENERIC: 0.0: enabled 1
769 11:52:26.125602 GENERIC: 1.0: enabled 1
770 11:52:26.125919 APIC: 01: enabled 1
771 11:52:26.128973 APIC: 03: enabled 1
772 11:52:26.129391 APIC: 07: enabled 1
773 11:52:26.132384 APIC: 05: enabled 1
774 11:52:26.135448 APIC: 04: enabled 1
775 11:52:26.135906 APIC: 02: enabled 1
776 11:52:26.138688 APIC: 06: enabled 1
777 11:52:26.141942 Compare with tree...
778 11:52:26.142368 Root Device: enabled 1
779 11:52:26.145911 DOMAIN: 0000: enabled 1
780 11:52:26.148797 PCI: 00:00.0: enabled 1
781 11:52:26.152000 PCI: 00:02.0: enabled 1
782 11:52:26.152430 PCI: 00:04.0: enabled 1
783 11:52:26.155812 GENERIC: 0.0: enabled 1
784 11:52:26.158699 PCI: 00:05.0: enabled 1
785 11:52:26.162275 PCI: 00:06.0: enabled 0
786 11:52:26.165604 PCI: 00:07.0: enabled 0
787 11:52:26.166032 GENERIC: 0.0: enabled 1
788 11:52:26.168850 PCI: 00:07.1: enabled 0
789 11:52:26.172150 GENERIC: 1.0: enabled 1
790 11:52:26.175403 PCI: 00:07.2: enabled 0
791 11:52:26.178723 GENERIC: 0.0: enabled 1
792 11:52:26.179150 PCI: 00:07.3: enabled 0
793 11:52:26.182053 GENERIC: 1.0: enabled 1
794 11:52:26.185598 PCI: 00:08.0: enabled 1
795 11:52:26.188913 PCI: 00:09.0: enabled 0
796 11:52:26.192016 PCI: 00:0a.0: enabled 0
797 11:52:26.192448 PCI: 00:0d.0: enabled 1
798 11:52:26.195466 USB0 port 0: enabled 1
799 11:52:26.198850 USB3 port 0: enabled 1
800 11:52:26.201994 USB3 port 1: enabled 1
801 11:52:26.205419 USB3 port 2: enabled 0
802 11:52:26.208218 USB3 port 3: enabled 0
803 11:52:26.208688 PCI: 00:0d.1: enabled 0
804 11:52:26.211863 PCI: 00:0d.2: enabled 0
805 11:52:26.214922 GENERIC: 0.0: enabled 1
806 11:52:26.218111 PCI: 00:0d.3: enabled 0
807 11:52:26.221294 PCI: 00:0e.0: enabled 0
808 11:52:26.221377 PCI: 00:10.2: enabled 1
809 11:52:26.224629 PCI: 00:10.6: enabled 0
810 11:52:26.228286 PCI: 00:10.7: enabled 0
811 11:52:26.231725 PCI: 00:12.0: enabled 0
812 11:52:26.234248 PCI: 00:12.6: enabled 0
813 11:52:26.234344 PCI: 00:13.0: enabled 0
814 11:52:26.237811 PCI: 00:14.0: enabled 1
815 11:52:26.241403 USB0 port 0: enabled 1
816 11:52:26.244260 USB2 port 0: enabled 0
817 11:52:26.248375 USB2 port 1: enabled 1
818 11:52:26.248807 USB2 port 2: enabled 1
819 11:52:26.251511 USB2 port 3: enabled 0
820 11:52:26.254767 USB2 port 4: enabled 1
821 11:52:26.257887 USB2 port 5: enabled 0
822 11:52:26.261674 USB2 port 6: enabled 0
823 11:52:26.265049 USB2 port 7: enabled 0
824 11:52:26.265477 USB2 port 8: enabled 0
825 11:52:26.268328 USB2 port 9: enabled 0
826 11:52:26.271342 USB3 port 0: enabled 0
827 11:52:26.274177 USB3 port 1: enabled 1
828 11:52:26.278371 USB3 port 2: enabled 0
829 11:52:26.278454 USB3 port 3: enabled 0
830 11:52:26.282215 PCI: 00:14.1: enabled 0
831 11:52:26.286001 PCI: 00:14.2: enabled 1
832 11:52:26.286084 PCI: 00:14.3: enabled 1
833 11:52:26.289139 GENERIC: 0.0: enabled 1
834 11:52:26.292690 PCI: 00:15.0: enabled 1
835 11:52:26.295836 I2C: 00:1a: enabled 1
836 11:52:26.299468 I2C: 00:31: enabled 1
837 11:52:26.299952 I2C: 00:32: enabled 1
838 11:52:26.302601 PCI: 00:15.1: enabled 1
839 11:52:26.306389 I2C: 00:10: enabled 1
840 11:52:26.309402 PCI: 00:15.2: enabled 1
841 11:52:26.312694 PCI: 00:15.3: enabled 1
842 11:52:26.313187 PCI: 00:16.0: enabled 1
843 11:52:26.362537 PCI: 00:16.1: enabled 0
844 11:52:26.362996 PCI: 00:16.2: enabled 0
845 11:52:26.363346 PCI: 00:16.3: enabled 0
846 11:52:26.363704 PCI: 00:16.4: enabled 0
847 11:52:26.364057 PCI: 00:16.5: enabled 0
848 11:52:26.364447 PCI: 00:17.0: enabled 1
849 11:52:26.364755 PCI: 00:19.0: enabled 0
850 11:52:26.365371 PCI: 00:19.1: enabled 1
851 11:52:26.365707 I2C: 00:15: enabled 1
852 11:52:26.366003 PCI: 00:19.2: enabled 0
853 11:52:26.366292 PCI: 00:1d.0: enabled 1
854 11:52:26.366575 GENERIC: 0.0: enabled 1
855 11:52:26.366858 PCI: 00:1e.0: enabled 1
856 11:52:26.367137 PCI: 00:1e.1: enabled 0
857 11:52:26.367414 PCI: 00:1e.2: enabled 1
858 11:52:26.367733 SPI: 00: enabled 1
859 11:52:26.368019 PCI: 00:1e.3: enabled 1
860 11:52:26.368298 SPI: 00: enabled 1
861 11:52:26.368574 PCI: 00:1f.0: enabled 1
862 11:52:26.406269 PNP: 0c09.0: enabled 1
863 11:52:26.406876 PCI: 00:1f.1: enabled 0
864 11:52:26.407253 PCI: 00:1f.2: enabled 1
865 11:52:26.407620 GENERIC: 0.0: enabled 1
866 11:52:26.407947 GENERIC: 0.0: enabled 1
867 11:52:26.408682 GENERIC: 1.0: enabled 1
868 11:52:26.409050 PCI: 00:1f.3: enabled 1
869 11:52:26.409426 PCI: 00:1f.4: enabled 0
870 11:52:26.409924 PCI: 00:1f.5: enabled 1
871 11:52:26.410373 PCI: 00:1f.6: enabled 0
872 11:52:26.410815 PCI: 00:1f.7: enabled 0
873 11:52:26.411194 CPU_CLUSTER: 0: enabled 1
874 11:52:26.411662 APIC: 00: enabled 1
875 11:52:26.412077 APIC: 01: enabled 1
876 11:52:26.412418 APIC: 03: enabled 1
877 11:52:26.412704 APIC: 07: enabled 1
878 11:52:26.412984 APIC: 05: enabled 1
879 11:52:26.413329 APIC: 04: enabled 1
880 11:52:26.413662 APIC: 02: enabled 1
881 11:52:26.414006 APIC: 06: enabled 1
882 11:52:26.416863 Root Device scanning...
883 11:52:26.420213 scan_static_bus for Root Device
884 11:52:26.423513 DOMAIN: 0000 enabled
885 11:52:26.424018 CPU_CLUSTER: 0 enabled
886 11:52:26.427127 DOMAIN: 0000 scanning...
887 11:52:26.430104 PCI: pci_scan_bus for bus 00
888 11:52:26.433647 PCI: 00:00.0 [8086/0000] ops
889 11:52:26.436694 PCI: 00:00.0 [8086/9a12] enabled
890 11:52:26.440280 PCI: 00:02.0 [8086/0000] bus ops
891 11:52:26.443520 PCI: 00:02.0 [8086/9a40] enabled
892 11:52:26.446900 PCI: 00:04.0 [8086/0000] bus ops
893 11:52:26.450044 PCI: 00:04.0 [8086/9a03] enabled
894 11:52:26.453327 PCI: 00:05.0 [8086/9a19] enabled
895 11:52:26.456546 PCI: 00:07.0 [0000/0000] hidden
896 11:52:26.459878 PCI: 00:08.0 [8086/9a11] enabled
897 11:52:26.463229 PCI: 00:0a.0 [8086/9a0d] disabled
898 11:52:26.466891 PCI: 00:0d.0 [8086/0000] bus ops
899 11:52:26.470036 PCI: 00:0d.0 [8086/9a13] enabled
900 11:52:26.473461 PCI: 00:14.0 [8086/0000] bus ops
901 11:52:26.476598 PCI: 00:14.0 [8086/a0ed] enabled
902 11:52:26.479980 PCI: 00:14.2 [8086/a0ef] enabled
903 11:52:26.483528 PCI: 00:14.3 [8086/0000] bus ops
904 11:52:26.486882 PCI: 00:14.3 [8086/a0f0] enabled
905 11:52:26.490207 PCI: 00:15.0 [8086/0000] bus ops
906 11:52:26.493211 PCI: 00:15.0 [8086/a0e8] enabled
907 11:52:26.496570 PCI: 00:15.1 [8086/0000] bus ops
908 11:52:26.499821 PCI: 00:15.1 [8086/a0e9] enabled
909 11:52:26.503126 PCI: 00:15.2 [8086/0000] bus ops
910 11:52:26.506440 PCI: 00:15.2 [8086/a0ea] enabled
911 11:52:26.509597 PCI: 00:15.3 [8086/0000] bus ops
912 11:52:26.512934 PCI: 00:15.3 [8086/a0eb] enabled
913 11:52:26.516260 PCI: 00:16.0 [8086/0000] ops
914 11:52:26.520099 PCI: 00:16.0 [8086/a0e0] enabled
915 11:52:26.526599 PCI: Static device PCI: 00:17.0 not found, disabling it.
916 11:52:26.529654 PCI: 00:19.0 [8086/0000] bus ops
917 11:52:26.532830 PCI: 00:19.0 [8086/a0c5] disabled
918 11:52:26.536408 PCI: 00:19.1 [8086/0000] bus ops
919 11:52:26.539978 PCI: 00:19.1 [8086/a0c6] enabled
920 11:52:26.543011 PCI: 00:1d.0 [8086/0000] bus ops
921 11:52:26.546242 PCI: 00:1d.0 [8086/a0b0] enabled
922 11:52:26.549438 PCI: 00:1e.0 [8086/0000] ops
923 11:52:26.552641 PCI: 00:1e.0 [8086/a0a8] enabled
924 11:52:26.556352 PCI: 00:1e.2 [8086/0000] bus ops
925 11:52:26.559561 PCI: 00:1e.2 [8086/a0aa] enabled
926 11:52:26.562770 PCI: 00:1e.3 [8086/0000] bus ops
927 11:52:26.566092 PCI: 00:1e.3 [8086/a0ab] enabled
928 11:52:26.569378 PCI: 00:1f.0 [8086/0000] bus ops
929 11:52:26.573042 PCI: 00:1f.0 [8086/a087] enabled
930 11:52:26.573479 RTC Init
931 11:52:26.576427 Set power on after power failure.
932 11:52:26.579466 Disabling Deep S3
933 11:52:26.579994 Disabling Deep S3
934 11:52:26.582888 Disabling Deep S4
935 11:52:26.585894 Disabling Deep S4
936 11:52:26.586315 Disabling Deep S5
937 11:52:26.589267 Disabling Deep S5
938 11:52:26.592626 PCI: 00:1f.2 [0000/0000] hidden
939 11:52:26.595732 PCI: 00:1f.3 [8086/0000] bus ops
940 11:52:26.599035 PCI: 00:1f.3 [8086/a0c8] enabled
941 11:52:26.602974 PCI: 00:1f.5 [8086/0000] bus ops
942 11:52:26.606274 PCI: 00:1f.5 [8086/a0a4] enabled
943 11:52:26.609616 PCI: Leftover static devices:
944 11:52:26.610021 PCI: 00:10.2
945 11:52:26.610340 PCI: 00:10.6
946 11:52:26.612726 PCI: 00:10.7
947 11:52:26.613131 PCI: 00:06.0
948 11:52:26.615913 PCI: 00:07.1
949 11:52:26.616393 PCI: 00:07.2
950 11:52:26.616859 PCI: 00:07.3
951 11:52:26.618829 PCI: 00:09.0
952 11:52:26.618907 PCI: 00:0d.1
953 11:52:26.622100 PCI: 00:0d.2
954 11:52:26.622205 PCI: 00:0d.3
955 11:52:26.625424 PCI: 00:0e.0
956 11:52:26.625510 PCI: 00:12.0
957 11:52:26.625582 PCI: 00:12.6
958 11:52:26.628620 PCI: 00:13.0
959 11:52:26.628718 PCI: 00:14.1
960 11:52:26.631896 PCI: 00:16.1
961 11:52:26.631968 PCI: 00:16.2
962 11:52:26.632027 PCI: 00:16.3
963 11:52:26.635772 PCI: 00:16.4
964 11:52:26.635842 PCI: 00:16.5
965 11:52:26.638648 PCI: 00:17.0
966 11:52:26.638714 PCI: 00:19.2
967 11:52:26.641930 PCI: 00:1e.1
968 11:52:26.642023 PCI: 00:1f.1
969 11:52:26.642112 PCI: 00:1f.4
970 11:52:26.645032 PCI: 00:1f.6
971 11:52:26.645098 PCI: 00:1f.7
972 11:52:26.648711 PCI: Check your devicetree.cb.
973 11:52:26.651716 PCI: 00:02.0 scanning...
974 11:52:26.655408 scan_generic_bus for PCI: 00:02.0
975 11:52:26.658681 scan_generic_bus for PCI: 00:02.0 done
976 11:52:26.665274 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
977 11:52:26.665358 PCI: 00:04.0 scanning...
978 11:52:26.668546 scan_generic_bus for PCI: 00:04.0
979 11:52:26.671837 GENERIC: 0.0 enabled
980 11:52:26.678289 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
981 11:52:26.681522 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
982 11:52:26.684804 PCI: 00:0d.0 scanning...
983 11:52:26.688686 scan_static_bus for PCI: 00:0d.0
984 11:52:26.691528 USB0 port 0 enabled
985 11:52:26.694749 USB0 port 0 scanning...
986 11:52:26.698096 scan_static_bus for USB0 port 0
987 11:52:26.698180 USB3 port 0 enabled
988 11:52:26.701504 USB3 port 1 enabled
989 11:52:26.705143 USB3 port 2 disabled
990 11:52:26.705266 USB3 port 3 disabled
991 11:52:26.708504 USB3 port 0 scanning...
992 11:52:26.711761 scan_static_bus for USB3 port 0
993 11:52:26.714942 scan_static_bus for USB3 port 0 done
994 11:52:26.718179 scan_bus: bus USB3 port 0 finished in 6 msecs
995 11:52:26.721419 USB3 port 1 scanning...
996 11:52:26.724630 scan_static_bus for USB3 port 1
997 11:52:26.728398 scan_static_bus for USB3 port 1 done
998 11:52:26.734985 scan_bus: bus USB3 port 1 finished in 6 msecs
999 11:52:26.737926 scan_static_bus for USB0 port 0 done
1000 11:52:26.741548 scan_bus: bus USB0 port 0 finished in 43 msecs
1001 11:52:26.744553 scan_static_bus for PCI: 00:0d.0 done
1002 11:52:26.751159 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
1003 11:52:26.754334 PCI: 00:14.0 scanning...
1004 11:52:26.758077 scan_static_bus for PCI: 00:14.0
1005 11:52:26.758160 USB0 port 0 enabled
1006 11:52:26.761168 USB0 port 0 scanning...
1007 11:52:26.764837 scan_static_bus for USB0 port 0
1008 11:52:26.767921 USB2 port 0 disabled
1009 11:52:26.768003 USB2 port 1 enabled
1010 11:52:26.771188 USB2 port 2 enabled
1011 11:52:26.774564 USB2 port 3 disabled
1012 11:52:26.774645 USB2 port 4 enabled
1013 11:52:26.777814 USB2 port 5 disabled
1014 11:52:26.780923 USB2 port 6 disabled
1015 11:52:26.781007 USB2 port 7 disabled
1016 11:52:26.784630 USB2 port 8 disabled
1017 11:52:26.787450 USB2 port 9 disabled
1018 11:52:26.787534 USB3 port 0 disabled
1019 11:52:26.791226 USB3 port 1 enabled
1020 11:52:26.791310 USB3 port 2 disabled
1021 11:52:26.794344 USB3 port 3 disabled
1022 11:52:26.797701 USB2 port 1 scanning...
1023 11:52:26.801138 scan_static_bus for USB2 port 1
1024 11:52:26.804305 scan_static_bus for USB2 port 1 done
1025 11:52:26.807389 scan_bus: bus USB2 port 1 finished in 6 msecs
1026 11:52:26.810876 USB2 port 2 scanning...
1027 11:52:26.814349 scan_static_bus for USB2 port 2
1028 11:52:26.817410 scan_static_bus for USB2 port 2 done
1029 11:52:26.824062 scan_bus: bus USB2 port 2 finished in 6 msecs
1030 11:52:26.824146 USB2 port 4 scanning...
1031 11:52:26.827283 scan_static_bus for USB2 port 4
1032 11:52:26.834281 scan_static_bus for USB2 port 4 done
1033 11:52:26.837522 scan_bus: bus USB2 port 4 finished in 6 msecs
1034 11:52:26.840872 USB3 port 1 scanning...
1035 11:52:26.844205 scan_static_bus for USB3 port 1
1036 11:52:26.847442 scan_static_bus for USB3 port 1 done
1037 11:52:26.850410 scan_bus: bus USB3 port 1 finished in 6 msecs
1038 11:52:26.854063 scan_static_bus for USB0 port 0 done
1039 11:52:26.861374 scan_bus: bus USB0 port 0 finished in 93 msecs
1040 11:52:26.864548 scan_static_bus for PCI: 00:14.0 done
1041 11:52:26.868147 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1042 11:52:26.871254 PCI: 00:14.3 scanning...
1043 11:52:26.874607 scan_static_bus for PCI: 00:14.3
1044 11:52:26.878027 GENERIC: 0.0 enabled
1045 11:52:26.881050 scan_static_bus for PCI: 00:14.3 done
1046 11:52:26.884824 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1047 11:52:26.887776 PCI: 00:15.0 scanning...
1048 11:52:26.891167 scan_static_bus for PCI: 00:15.0
1049 11:52:26.894573 I2C: 00:1a enabled
1050 11:52:26.894663 I2C: 00:31 enabled
1051 11:52:26.897694 I2C: 00:32 enabled
1052 11:52:26.900985 scan_static_bus for PCI: 00:15.0 done
1053 11:52:26.904697 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1054 11:52:26.907499 PCI: 00:15.1 scanning...
1055 11:52:26.911386 scan_static_bus for PCI: 00:15.1
1056 11:52:26.914930 I2C: 00:10 enabled
1057 11:52:26.918070 scan_static_bus for PCI: 00:15.1 done
1058 11:52:26.921253 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1059 11:52:26.924443 PCI: 00:15.2 scanning...
1060 11:52:26.927827 scan_static_bus for PCI: 00:15.2
1061 11:52:26.930948 scan_static_bus for PCI: 00:15.2 done
1062 11:52:26.937438 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1063 11:52:26.940667 PCI: 00:15.3 scanning...
1064 11:52:26.943828 scan_static_bus for PCI: 00:15.3
1065 11:52:26.947964 scan_static_bus for PCI: 00:15.3 done
1066 11:52:26.951216 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1067 11:52:26.954568 PCI: 00:19.1 scanning...
1068 11:52:26.957572 scan_static_bus for PCI: 00:19.1
1069 11:52:26.961047 I2C: 00:15 enabled
1070 11:52:26.964281 scan_static_bus for PCI: 00:19.1 done
1071 11:52:26.967940 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1072 11:52:26.970987 PCI: 00:1d.0 scanning...
1073 11:52:26.974441 do_pci_scan_bridge for PCI: 00:1d.0
1074 11:52:26.977392 PCI: pci_scan_bus for bus 01
1075 11:52:26.981018 PCI: 01:00.0 [1c5c/174a] enabled
1076 11:52:26.984291 GENERIC: 0.0 enabled
1077 11:52:26.987538 Enabling Common Clock Configuration
1078 11:52:26.990723 L1 Sub-State supported from root port 29
1079 11:52:26.994455 L1 Sub-State Support = 0xf
1080 11:52:26.997928 CommonModeRestoreTime = 0x28
1081 11:52:27.001061 Power On Value = 0x16, Power On Scale = 0x0
1082 11:52:27.004298 ASPM: Enabled L1
1083 11:52:27.007696 PCIe: Max_Payload_Size adjusted to 128
1084 11:52:27.010900 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1085 11:52:27.014063 PCI: 00:1e.2 scanning...
1086 11:52:27.017614 scan_generic_bus for PCI: 00:1e.2
1087 11:52:27.020642 SPI: 00 enabled
1088 11:52:27.027262 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1089 11:52:27.031007 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1090 11:52:27.033738 PCI: 00:1e.3 scanning...
1091 11:52:27.037276 scan_generic_bus for PCI: 00:1e.3
1092 11:52:27.037695 SPI: 00 enabled
1093 11:52:27.044135 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1094 11:52:27.050500 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1095 11:52:27.050917 PCI: 00:1f.0 scanning...
1096 11:52:27.054021 scan_static_bus for PCI: 00:1f.0
1097 11:52:27.057142 PNP: 0c09.0 enabled
1098 11:52:27.060438 PNP: 0c09.0 scanning...
1099 11:52:27.063645 scan_static_bus for PNP: 0c09.0
1100 11:52:27.067111 scan_static_bus for PNP: 0c09.0 done
1101 11:52:27.070527 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1102 11:52:27.077047 scan_static_bus for PCI: 00:1f.0 done
1103 11:52:27.080315 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1104 11:52:27.083939 PCI: 00:1f.2 scanning...
1105 11:52:27.087105 scan_static_bus for PCI: 00:1f.2
1106 11:52:27.087793 GENERIC: 0.0 enabled
1107 11:52:27.090151 GENERIC: 0.0 scanning...
1108 11:52:27.093459 scan_static_bus for GENERIC: 0.0
1109 11:52:27.097063 GENERIC: 0.0 enabled
1110 11:52:27.100336 GENERIC: 1.0 enabled
1111 11:52:27.103661 scan_static_bus for GENERIC: 0.0 done
1112 11:52:27.106991 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1113 11:52:27.110087 scan_static_bus for PCI: 00:1f.2 done
1114 11:52:27.116737 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1115 11:52:27.119893 PCI: 00:1f.3 scanning...
1116 11:52:27.123156 scan_static_bus for PCI: 00:1f.3
1117 11:52:27.127011 scan_static_bus for PCI: 00:1f.3 done
1118 11:52:27.129800 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1119 11:52:27.133038 PCI: 00:1f.5 scanning...
1120 11:52:27.136769 scan_generic_bus for PCI: 00:1f.5
1121 11:52:27.140037 scan_generic_bus for PCI: 00:1f.5 done
1122 11:52:27.146572 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1123 11:52:27.149895 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1124 11:52:27.153315 scan_static_bus for Root Device done
1125 11:52:27.159809 scan_bus: bus Root Device finished in 736 msecs
1126 11:52:27.160227 done
1127 11:52:27.166391 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1128 11:52:27.169730 Chrome EC: UHEPI supported
1129 11:52:27.176500 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1130 11:52:27.182811 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1131 11:52:27.186374 SPI flash protection: WPSW=0 SRP0=0
1132 11:52:27.189553 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1133 11:52:27.196235 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1134 11:52:27.199363 found VGA at PCI: 00:02.0
1135 11:52:27.202580 Setting up VGA for PCI: 00:02.0
1136 11:52:27.205925 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1137 11:52:27.213079 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1138 11:52:27.213575 Allocating resources...
1139 11:52:27.216438 Reading resources...
1140 11:52:27.219550 Root Device read_resources bus 0 link: 0
1141 11:52:27.226132 DOMAIN: 0000 read_resources bus 0 link: 0
1142 11:52:27.229375 PCI: 00:04.0 read_resources bus 1 link: 0
1143 11:52:27.236061 PCI: 00:04.0 read_resources bus 1 link: 0 done
1144 11:52:27.239345 PCI: 00:0d.0 read_resources bus 0 link: 0
1145 11:52:27.246147 USB0 port 0 read_resources bus 0 link: 0
1146 11:52:27.249378 USB0 port 0 read_resources bus 0 link: 0 done
1147 11:52:27.255652 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1148 11:52:27.258942 PCI: 00:14.0 read_resources bus 0 link: 0
1149 11:52:27.262163 USB0 port 0 read_resources bus 0 link: 0
1150 11:52:27.269417 USB0 port 0 read_resources bus 0 link: 0 done
1151 11:52:27.272733 PCI: 00:14.0 read_resources bus 0 link: 0 done
1152 11:52:27.279821 PCI: 00:14.3 read_resources bus 0 link: 0
1153 11:52:27.283072 PCI: 00:14.3 read_resources bus 0 link: 0 done
1154 11:52:27.289653 PCI: 00:15.0 read_resources bus 0 link: 0
1155 11:52:27.292767 PCI: 00:15.0 read_resources bus 0 link: 0 done
1156 11:52:27.299238 PCI: 00:15.1 read_resources bus 0 link: 0
1157 11:52:27.302279 PCI: 00:15.1 read_resources bus 0 link: 0 done
1158 11:52:27.309872 PCI: 00:19.1 read_resources bus 0 link: 0
1159 11:52:27.312901 PCI: 00:19.1 read_resources bus 0 link: 0 done
1160 11:52:27.319973 PCI: 00:1d.0 read_resources bus 1 link: 0
1161 11:52:27.322808 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1162 11:52:27.329893 PCI: 00:1e.2 read_resources bus 2 link: 0
1163 11:52:27.332972 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1164 11:52:27.339536 PCI: 00:1e.3 read_resources bus 3 link: 0
1165 11:52:27.342824 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1166 11:52:27.349538 PCI: 00:1f.0 read_resources bus 0 link: 0
1167 11:52:27.352794 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1168 11:52:27.359607 PCI: 00:1f.2 read_resources bus 0 link: 0
1169 11:52:27.362931 GENERIC: 0.0 read_resources bus 0 link: 0
1170 11:52:27.369456 GENERIC: 0.0 read_resources bus 0 link: 0 done
1171 11:52:27.372761 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1172 11:52:27.378935 DOMAIN: 0000 read_resources bus 0 link: 0 done
1173 11:52:27.382219 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1174 11:52:27.389313 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1175 11:52:27.392496 Root Device read_resources bus 0 link: 0 done
1176 11:52:27.395480 Done reading resources.
1177 11:52:27.402013 Show resources in subtree (Root Device)...After reading.
1178 11:52:27.405639 Root Device child on link 0 DOMAIN: 0000
1179 11:52:27.409144 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1180 11:52:27.419109 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1181 11:52:27.428743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1182 11:52:27.431902 PCI: 00:00.0
1183 11:52:27.438433 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1184 11:52:27.448404 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1185 11:52:27.458274 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1186 11:52:27.468133 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1187 11:52:27.478363 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1188 11:52:27.487980 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1189 11:52:27.494613 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1190 11:52:27.505058 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1191 11:52:27.514681 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1192 11:52:27.524386 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1193 11:52:27.534618 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1194 11:52:27.544433 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1195 11:52:27.550998 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1196 11:52:27.561280 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1197 11:52:27.571472 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1198 11:52:27.581441 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1199 11:52:27.591313 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1200 11:52:27.601605 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1201 11:52:27.608086 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1202 11:52:27.617941 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1203 11:52:27.621486 PCI: 00:02.0
1204 11:52:27.630963 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 11:52:27.640915 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1206 11:52:27.651199 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1207 11:52:27.654529 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1208 11:52:27.664437 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1209 11:52:27.667671 GENERIC: 0.0
1210 11:52:27.668253 PCI: 00:05.0
1211 11:52:27.677908 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1212 11:52:27.684593 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1213 11:52:27.685197 GENERIC: 0.0
1214 11:52:27.687792 PCI: 00:08.0
1215 11:52:27.697688 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 11:52:27.698314 PCI: 00:0a.0
1217 11:52:27.700909 PCI: 00:0d.0 child on link 0 USB0 port 0
1218 11:52:27.710882 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 11:52:27.717397 USB0 port 0 child on link 0 USB3 port 0
1220 11:52:27.718037 USB3 port 0
1221 11:52:27.720860 USB3 port 1
1222 11:52:27.721326 USB3 port 2
1223 11:52:27.724123 USB3 port 3
1224 11:52:27.727371 PCI: 00:14.0 child on link 0 USB0 port 0
1225 11:52:27.737177 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1226 11:52:27.743975 USB0 port 0 child on link 0 USB2 port 0
1227 11:52:27.744405 USB2 port 0
1228 11:52:27.747381 USB2 port 1
1229 11:52:27.747898 USB2 port 2
1230 11:52:27.750339 USB2 port 3
1231 11:52:27.750757 USB2 port 4
1232 11:52:27.754023 USB2 port 5
1233 11:52:27.754513 USB2 port 6
1234 11:52:27.757322 USB2 port 7
1235 11:52:27.757792 USB2 port 8
1236 11:52:27.760759 USB2 port 9
1237 11:52:27.761254 USB3 port 0
1238 11:52:27.764001 USB3 port 1
1239 11:52:27.764477 USB3 port 2
1240 11:52:27.767296 USB3 port 3
1241 11:52:27.770450 PCI: 00:14.2
1242 11:52:27.780170 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 11:52:27.790390 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1244 11:52:27.793618 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1245 11:52:27.803516 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1246 11:52:27.803985 GENERIC: 0.0
1247 11:52:27.810138 PCI: 00:15.0 child on link 0 I2C: 00:1a
1248 11:52:27.820611 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 11:52:27.821037 I2C: 00:1a
1250 11:52:27.823828 I2C: 00:31
1251 11:52:27.824243 I2C: 00:32
1252 11:52:27.826902 PCI: 00:15.1 child on link 0 I2C: 00:10
1253 11:52:27.836815 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 11:52:27.840065 I2C: 00:10
1255 11:52:27.840504 PCI: 00:15.2
1256 11:52:27.850317 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 11:52:27.853310 PCI: 00:15.3
1258 11:52:27.863350 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 11:52:27.863949 PCI: 00:16.0
1260 11:52:27.873177 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 11:52:27.876833 PCI: 00:19.0
1262 11:52:27.880059 PCI: 00:19.1 child on link 0 I2C: 00:15
1263 11:52:27.889985 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 11:52:27.893283 I2C: 00:15
1265 11:52:27.896496 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1266 11:52:27.906399 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1267 11:52:27.916320 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1268 11:52:27.923197 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1269 11:52:27.926370 GENERIC: 0.0
1270 11:52:27.926826 PCI: 01:00.0
1271 11:52:27.936150 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 11:52:27.946090 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1273 11:52:27.956237 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1274 11:52:27.959281 PCI: 00:1e.0
1275 11:52:27.969537 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1276 11:52:27.972862 PCI: 00:1e.2 child on link 0 SPI: 00
1277 11:52:27.982673 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1278 11:52:27.983141 SPI: 00
1279 11:52:27.989146 PCI: 00:1e.3 child on link 0 SPI: 00
1280 11:52:27.999200 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1281 11:52:27.999717 SPI: 00
1282 11:52:28.002433 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1283 11:52:28.012184 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1284 11:52:28.015749 PNP: 0c09.0
1285 11:52:28.022223 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1286 11:52:28.028752 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1287 11:52:28.035694 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1288 11:52:28.045580 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1289 11:52:28.051742 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1290 11:52:28.051852 GENERIC: 0.0
1291 11:52:28.054817 GENERIC: 1.0
1292 11:52:28.054916 PCI: 00:1f.3
1293 11:52:28.064683 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1294 11:52:28.074614 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1295 11:52:28.078126 PCI: 00:1f.5
1296 11:52:28.087721 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1297 11:52:28.091033 CPU_CLUSTER: 0 child on link 0 APIC: 00
1298 11:52:28.091143 APIC: 00
1299 11:52:28.094930 APIC: 01
1300 11:52:28.095036 APIC: 03
1301 11:52:28.095165 APIC: 07
1302 11:52:28.097978 APIC: 05
1303 11:52:28.098077 APIC: 04
1304 11:52:28.101312 APIC: 02
1305 11:52:28.101405 APIC: 06
1306 11:52:28.107845 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1307 11:52:28.114450 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1308 11:52:28.120987 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1309 11:52:28.127906 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1310 11:52:28.131212 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1311 11:52:28.134509 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1312 11:52:28.137714 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1313 11:52:28.147816 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1314 11:52:28.154311 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1315 11:52:28.160702 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1316 11:52:28.167564 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1317 11:52:28.174216 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1318 11:52:28.183831 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1319 11:52:28.190583 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1320 11:52:28.197188 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1321 11:52:28.200359 DOMAIN: 0000: Resource ranges:
1322 11:52:28.203600 * Base: 1000, Size: 800, Tag: 100
1323 11:52:28.207493 * Base: 1900, Size: e700, Tag: 100
1324 11:52:28.213697 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1325 11:52:28.220173 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1326 11:52:28.226844 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1327 11:52:28.233853 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1328 11:52:28.243535 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1329 11:52:28.250231 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1330 11:52:28.256757 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1331 11:52:28.266570 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1332 11:52:28.273201 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1333 11:52:28.280072 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1334 11:52:28.289695 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1335 11:52:28.296367 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1336 11:52:28.302840 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1337 11:52:28.312944 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1338 11:52:28.319308 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1339 11:52:28.326376 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1340 11:52:28.336184 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1341 11:52:28.342643 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1342 11:52:28.349423 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1343 11:52:28.359231 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1344 11:52:28.365741 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1345 11:52:28.372362 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1346 11:52:28.382221 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1347 11:52:28.389096 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1348 11:52:28.395797 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1349 11:52:28.398756 DOMAIN: 0000: Resource ranges:
1350 11:52:28.405612 * Base: 7fc00000, Size: 40400000, Tag: 200
1351 11:52:28.408785 * Base: d0000000, Size: 28000000, Tag: 200
1352 11:52:28.412169 * Base: fa000000, Size: 1000000, Tag: 200
1353 11:52:28.415339 * Base: fb001000, Size: 2fff000, Tag: 200
1354 11:52:28.421770 * Base: fe010000, Size: 2e000, Tag: 200
1355 11:52:28.425176 * Base: fe03f000, Size: d41000, Tag: 200
1356 11:52:28.428620 * Base: fed88000, Size: 8000, Tag: 200
1357 11:52:28.431795 * Base: fed93000, Size: d000, Tag: 200
1358 11:52:28.438467 * Base: feda2000, Size: 1e000, Tag: 200
1359 11:52:28.441757 * Base: fede0000, Size: 1220000, Tag: 200
1360 11:52:28.445012 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1361 11:52:28.455176 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1362 11:52:28.461584 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1363 11:52:28.468644 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1364 11:52:28.475020 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1365 11:52:28.481439 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1366 11:52:28.488072 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1367 11:52:28.494795 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1368 11:52:28.501410 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1369 11:52:28.508223 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1370 11:52:28.514886 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1371 11:52:28.521441 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1372 11:52:28.527689 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1373 11:52:28.534737 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1374 11:52:28.541271 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1375 11:52:28.547867 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1376 11:52:28.554214 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1377 11:52:28.561071 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1378 11:52:28.567470 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1379 11:52:28.574042 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1380 11:52:28.580728 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1381 11:52:28.587232 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1382 11:52:28.593932 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1383 11:52:28.600594 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1384 11:52:28.607302 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1385 11:52:28.610502 PCI: 00:1d.0: Resource ranges:
1386 11:52:28.617195 * Base: 7fc00000, Size: 100000, Tag: 200
1387 11:52:28.623534 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1388 11:52:28.630667 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1389 11:52:28.637380 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1390 11:52:28.643883 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1391 11:52:28.650536 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1392 11:52:28.657265 Root Device assign_resources, bus 0 link: 0
1393 11:52:28.660348 DOMAIN: 0000 assign_resources, bus 0 link: 0
1394 11:52:28.670470 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1395 11:52:28.677088 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1396 11:52:28.683513 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1397 11:52:28.693610 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1398 11:52:28.696688 PCI: 00:04.0 assign_resources, bus 1 link: 0
1399 11:52:28.703457 PCI: 00:04.0 assign_resources, bus 1 link: 0
1400 11:52:28.709972 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1401 11:52:28.719787 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1402 11:52:28.727086 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1403 11:52:28.732947 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1404 11:52:28.736409 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1405 11:52:28.742926 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1406 11:52:28.749499 PCI: 00:14.0 assign_resources, bus 0 link: 0
1407 11:52:28.752922 PCI: 00:14.0 assign_resources, bus 0 link: 0
1408 11:52:28.763274 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1409 11:52:28.769643 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1410 11:52:28.779903 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1411 11:52:28.783132 PCI: 00:14.3 assign_resources, bus 0 link: 0
1412 11:52:28.789235 PCI: 00:14.3 assign_resources, bus 0 link: 0
1413 11:52:28.795903 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1414 11:52:28.799201 PCI: 00:15.0 assign_resources, bus 0 link: 0
1415 11:52:28.806325 PCI: 00:15.0 assign_resources, bus 0 link: 0
1416 11:52:28.812523 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1417 11:52:28.819026 PCI: 00:15.1 assign_resources, bus 0 link: 0
1418 11:52:28.822655 PCI: 00:15.1 assign_resources, bus 0 link: 0
1419 11:52:28.832295 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1420 11:52:28.839396 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1421 11:52:28.849167 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1422 11:52:28.855949 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1423 11:52:28.858918 PCI: 00:19.1 assign_resources, bus 0 link: 0
1424 11:52:28.865501 PCI: 00:19.1 assign_resources, bus 0 link: 0
1425 11:52:28.872343 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1426 11:52:28.882096 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1427 11:52:28.891981 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1428 11:52:28.895275 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1429 11:52:28.905318 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1430 11:52:28.911944 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1431 11:52:28.921932 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1432 11:52:28.925284 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1433 11:52:28.935020 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1434 11:52:28.938561 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1435 11:52:28.941745 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1436 11:52:28.951642 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1437 11:52:28.955111 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1438 11:52:28.961662 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1439 11:52:28.964873 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1440 11:52:28.971429 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1441 11:52:28.974632 LPC: Trying to open IO window from 800 size 1ff
1442 11:52:28.984500 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1443 11:52:28.991033 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1444 11:52:29.000970 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1445 11:52:29.004335 DOMAIN: 0000 assign_resources, bus 0 link: 0
1446 11:52:29.007570 Root Device assign_resources, bus 0 link: 0
1447 11:52:29.010822 Done setting resources.
1448 11:52:29.017830 Show resources in subtree (Root Device)...After assigning values.
1449 11:52:29.020866 Root Device child on link 0 DOMAIN: 0000
1450 11:52:29.027633 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1451 11:52:29.037278 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1452 11:52:29.044037 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1453 11:52:29.047149 PCI: 00:00.0
1454 11:52:29.057394 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1455 11:52:29.067372 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1456 11:52:29.077227 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1457 11:52:29.083656 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1458 11:52:29.093563 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1459 11:52:29.103464 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1460 11:52:29.113350 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1461 11:52:29.123470 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1462 11:52:29.133418 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1463 11:52:29.140232 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1464 11:52:29.149928 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1465 11:52:29.160029 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1466 11:52:29.169959 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1467 11:52:29.179794 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1468 11:52:29.186162 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1469 11:52:29.196753 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1470 11:52:29.206498 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1471 11:52:29.216418 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1472 11:52:29.226511 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1473 11:52:29.236145 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1474 11:52:29.236575 PCI: 00:02.0
1475 11:52:29.249467 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1476 11:52:29.259405 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1477 11:52:29.269297 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1478 11:52:29.272695 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1479 11:52:29.282419 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1480 11:52:29.286274 GENERIC: 0.0
1481 11:52:29.286696 PCI: 00:05.0
1482 11:52:29.295944 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1483 11:52:29.302579 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1484 11:52:29.303005 GENERIC: 0.0
1485 11:52:29.305752 PCI: 00:08.0
1486 11:52:29.315770 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1487 11:52:29.316197 PCI: 00:0a.0
1488 11:52:29.322309 PCI: 00:0d.0 child on link 0 USB0 port 0
1489 11:52:29.332677 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1490 11:52:29.335568 USB0 port 0 child on link 0 USB3 port 0
1491 11:52:29.339318 USB3 port 0
1492 11:52:29.339803 USB3 port 1
1493 11:52:29.342416 USB3 port 2
1494 11:52:29.342872 USB3 port 3
1495 11:52:29.349056 PCI: 00:14.0 child on link 0 USB0 port 0
1496 11:52:29.358837 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1497 11:52:29.362065 USB0 port 0 child on link 0 USB2 port 0
1498 11:52:29.365735 USB2 port 0
1499 11:52:29.366176 USB2 port 1
1500 11:52:29.369137 USB2 port 2
1501 11:52:29.369681 USB2 port 3
1502 11:52:29.372446 USB2 port 4
1503 11:52:29.372860 USB2 port 5
1504 11:52:29.375670 USB2 port 6
1505 11:52:29.376115 USB2 port 7
1506 11:52:29.379049 USB2 port 8
1507 11:52:29.379491 USB2 port 9
1508 11:52:29.382292 USB3 port 0
1509 11:52:29.382710 USB3 port 1
1510 11:52:29.385678 USB3 port 2
1511 11:52:29.386133 USB3 port 3
1512 11:52:29.388840 PCI: 00:14.2
1513 11:52:29.398649 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1514 11:52:29.408553 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1515 11:52:29.415146 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1516 11:52:29.425200 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1517 11:52:29.425627 GENERIC: 0.0
1518 11:52:29.432118 PCI: 00:15.0 child on link 0 I2C: 00:1a
1519 11:52:29.441951 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1520 11:52:29.442470 I2C: 00:1a
1521 11:52:29.445237 I2C: 00:31
1522 11:52:29.445657 I2C: 00:32
1523 11:52:29.448339 PCI: 00:15.1 child on link 0 I2C: 00:10
1524 11:52:29.461670 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1525 11:52:29.462119 I2C: 00:10
1526 11:52:29.462465 PCI: 00:15.2
1527 11:52:29.474980 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1528 11:52:29.475410 PCI: 00:15.3
1529 11:52:29.484613 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1530 11:52:29.487966 PCI: 00:16.0
1531 11:52:29.498381 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1532 11:52:29.498804 PCI: 00:19.0
1533 11:52:29.504790 PCI: 00:19.1 child on link 0 I2C: 00:15
1534 11:52:29.514806 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1535 11:52:29.515277 I2C: 00:15
1536 11:52:29.521354 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1537 11:52:29.528137 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1538 11:52:29.541184 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1539 11:52:29.550561 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1540 11:52:29.554257 GENERIC: 0.0
1541 11:52:29.554374 PCI: 01:00.0
1542 11:52:29.563878 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1543 11:52:29.573991 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1544 11:52:29.587204 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1545 11:52:29.587319 PCI: 00:1e.0
1546 11:52:29.597113 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1547 11:52:29.603512 PCI: 00:1e.2 child on link 0 SPI: 00
1548 11:52:29.613313 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1549 11:52:29.613392 SPI: 00
1550 11:52:29.616628 PCI: 00:1e.3 child on link 0 SPI: 00
1551 11:52:29.630276 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1552 11:52:29.630398 SPI: 00
1553 11:52:29.633668 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1554 11:52:29.643381 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1555 11:52:29.643491 PNP: 0c09.0
1556 11:52:29.653133 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1557 11:52:29.656476 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1558 11:52:29.666485 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1559 11:52:29.676240 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1560 11:52:29.679742 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1561 11:52:29.682877 GENERIC: 0.0
1562 11:52:29.686112 GENERIC: 1.0
1563 11:52:29.686222 PCI: 00:1f.3
1564 11:52:29.696017 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1565 11:52:29.705893 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1566 11:52:29.709687 PCI: 00:1f.5
1567 11:52:29.719458 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1568 11:52:29.722879 CPU_CLUSTER: 0 child on link 0 APIC: 00
1569 11:52:29.726195 APIC: 00
1570 11:52:29.726311 APIC: 01
1571 11:52:29.726401 APIC: 03
1572 11:52:29.729435 APIC: 07
1573 11:52:29.729545 APIC: 05
1574 11:52:29.732655 APIC: 04
1575 11:52:29.732754 APIC: 02
1576 11:52:29.732853 APIC: 06
1577 11:52:29.735901 Done allocating resources.
1578 11:52:29.742534 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1579 11:52:29.749031 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1580 11:52:29.752191 Configure GPIOs for I2S audio on UP4.
1581 11:52:29.758801 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1582 11:52:29.762145 Enabling resources...
1583 11:52:29.765907 PCI: 00:00.0 subsystem <- 8086/9a12
1584 11:52:29.769338 PCI: 00:00.0 cmd <- 06
1585 11:52:29.772180 PCI: 00:02.0 subsystem <- 8086/9a40
1586 11:52:29.775729 PCI: 00:02.0 cmd <- 03
1587 11:52:29.778889 PCI: 00:04.0 subsystem <- 8086/9a03
1588 11:52:29.778960 PCI: 00:04.0 cmd <- 02
1589 11:52:29.785629 PCI: 00:05.0 subsystem <- 8086/9a19
1590 11:52:29.785704 PCI: 00:05.0 cmd <- 02
1591 11:52:29.789017 PCI: 00:08.0 subsystem <- 8086/9a11
1592 11:52:29.792254 PCI: 00:08.0 cmd <- 06
1593 11:52:29.795525 PCI: 00:0d.0 subsystem <- 8086/9a13
1594 11:52:29.798673 PCI: 00:0d.0 cmd <- 02
1595 11:52:29.802472 PCI: 00:14.0 subsystem <- 8086/a0ed
1596 11:52:29.805680 PCI: 00:14.0 cmd <- 02
1597 11:52:29.808891 PCI: 00:14.2 subsystem <- 8086/a0ef
1598 11:52:29.812291 PCI: 00:14.2 cmd <- 02
1599 11:52:29.815220 PCI: 00:14.3 subsystem <- 8086/a0f0
1600 11:52:29.818693 PCI: 00:14.3 cmd <- 02
1601 11:52:29.821800 PCI: 00:15.0 subsystem <- 8086/a0e8
1602 11:52:29.825209 PCI: 00:15.0 cmd <- 02
1603 11:52:29.828397 PCI: 00:15.1 subsystem <- 8086/a0e9
1604 11:52:29.828491 PCI: 00:15.1 cmd <- 02
1605 11:52:29.835512 PCI: 00:15.2 subsystem <- 8086/a0ea
1606 11:52:29.835655 PCI: 00:15.2 cmd <- 02
1607 11:52:29.842083 PCI: 00:15.3 subsystem <- 8086/a0eb
1608 11:52:29.842189 PCI: 00:15.3 cmd <- 02
1609 11:52:29.845320 PCI: 00:16.0 subsystem <- 8086/a0e0
1610 11:52:29.848149 PCI: 00:16.0 cmd <- 02
1611 11:52:29.851924 PCI: 00:19.1 subsystem <- 8086/a0c6
1612 11:52:29.855276 PCI: 00:19.1 cmd <- 02
1613 11:52:29.858585 PCI: 00:1d.0 bridge ctrl <- 0013
1614 11:52:29.861786 PCI: 00:1d.0 subsystem <- 8086/a0b0
1615 11:52:29.865024 PCI: 00:1d.0 cmd <- 06
1616 11:52:29.868346 PCI: 00:1e.0 subsystem <- 8086/a0a8
1617 11:52:29.871688 PCI: 00:1e.0 cmd <- 06
1618 11:52:29.874824 PCI: 00:1e.2 subsystem <- 8086/a0aa
1619 11:52:29.878113 PCI: 00:1e.2 cmd <- 06
1620 11:52:29.881644 PCI: 00:1e.3 subsystem <- 8086/a0ab
1621 11:52:29.884721 PCI: 00:1e.3 cmd <- 02
1622 11:52:29.888022 PCI: 00:1f.0 subsystem <- 8086/a087
1623 11:52:29.888126 PCI: 00:1f.0 cmd <- 407
1624 11:52:29.894643 PCI: 00:1f.3 subsystem <- 8086/a0c8
1625 11:52:29.894722 PCI: 00:1f.3 cmd <- 02
1626 11:52:29.897710 PCI: 00:1f.5 subsystem <- 8086/a0a4
1627 11:52:29.901237 PCI: 00:1f.5 cmd <- 406
1628 11:52:29.905987 PCI: 01:00.0 cmd <- 02
1629 11:52:29.910933 done.
1630 11:52:29.913970 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1631 11:52:29.917328 Initializing devices...
1632 11:52:29.920519 Root Device init
1633 11:52:29.923738 Chrome EC: Set SMI mask to 0x0000000000000000
1634 11:52:29.930303 Chrome EC: clear events_b mask to 0x0000000000000000
1635 11:52:29.936914 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1636 11:52:29.940209 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1637 11:52:29.947277 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1638 11:52:29.953909 Chrome EC: Set WAKE mask to 0x0000000000000000
1639 11:52:29.957264 fw_config match found: DB_USB=USB3_ACTIVE
1640 11:52:29.963793 Configure Right Type-C port orientation for retimer
1641 11:52:29.967153 Root Device init finished in 42 msecs
1642 11:52:29.970505 PCI: 00:00.0 init
1643 11:52:29.970604 CPU TDP = 9 Watts
1644 11:52:29.973799 CPU PL1 = 9 Watts
1645 11:52:29.976995 CPU PL2 = 40 Watts
1646 11:52:29.977138 CPU PL4 = 83 Watts
1647 11:52:29.980376 PCI: 00:00.0 init finished in 8 msecs
1648 11:52:29.983569 PCI: 00:02.0 init
1649 11:52:29.987085 GMA: Found VBT in CBFS
1650 11:52:29.990225 GMA: Found valid VBT in CBFS
1651 11:52:29.993876 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1652 11:52:30.003752 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1653 11:52:30.006882 PCI: 00:02.0 init finished in 18 msecs
1654 11:52:30.009876 PCI: 00:05.0 init
1655 11:52:30.013632 PCI: 00:05.0 init finished in 0 msecs
1656 11:52:30.016886 PCI: 00:08.0 init
1657 11:52:30.020264 PCI: 00:08.0 init finished in 0 msecs
1658 11:52:30.023453 PCI: 00:14.0 init
1659 11:52:30.026772 PCI: 00:14.0 init finished in 0 msecs
1660 11:52:30.026854 PCI: 00:14.2 init
1661 11:52:30.029926 PCI: 00:14.2 init finished in 0 msecs
1662 11:52:30.033685 PCI: 00:15.0 init
1663 11:52:30.036969 I2C bus 0 version 0x3230302a
1664 11:52:30.040320 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1665 11:52:30.043541 PCI: 00:15.0 init finished in 6 msecs
1666 11:52:30.046791 PCI: 00:15.1 init
1667 11:52:30.050515 I2C bus 1 version 0x3230302a
1668 11:52:30.053732 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1669 11:52:30.057074 PCI: 00:15.1 init finished in 6 msecs
1670 11:52:30.060333 PCI: 00:15.2 init
1671 11:52:30.063532 I2C bus 2 version 0x3230302a
1672 11:52:30.066945 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1673 11:52:30.070234 PCI: 00:15.2 init finished in 6 msecs
1674 11:52:30.070316 PCI: 00:15.3 init
1675 11:52:30.073488 I2C bus 3 version 0x3230302a
1676 11:52:30.076759 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1677 11:52:30.083296 PCI: 00:15.3 init finished in 6 msecs
1678 11:52:30.083377 PCI: 00:16.0 init
1679 11:52:30.086534 PCI: 00:16.0 init finished in 0 msecs
1680 11:52:30.090846 PCI: 00:19.1 init
1681 11:52:30.093851 I2C bus 5 version 0x3230302a
1682 11:52:30.097418 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1683 11:52:30.100693 PCI: 00:19.1 init finished in 6 msecs
1684 11:52:30.103721 PCI: 00:1d.0 init
1685 11:52:30.107493 Initializing PCH PCIe bridge.
1686 11:52:30.110554 PCI: 00:1d.0 init finished in 3 msecs
1687 11:52:30.113907 PCI: 00:1f.0 init
1688 11:52:30.117205 IOAPIC: Initializing IOAPIC at 0xfec00000
1689 11:52:30.123491 IOAPIC: Bootstrap Processor Local APIC = 0x00
1690 11:52:30.123600 IOAPIC: ID = 0x02
1691 11:52:30.127199 IOAPIC: Dumping registers
1692 11:52:30.130540 reg 0x0000: 0x02000000
1693 11:52:30.130621 reg 0x0001: 0x00770020
1694 11:52:30.133836 reg 0x0002: 0x00000000
1695 11:52:30.137204 PCI: 00:1f.0 init finished in 21 msecs
1696 11:52:30.140527 PCI: 00:1f.2 init
1697 11:52:30.143857 Disabling ACPI via APMC.
1698 11:52:30.147182 APMC done.
1699 11:52:30.150241 PCI: 00:1f.2 init finished in 5 msecs
1700 11:52:30.162422 PCI: 01:00.0 init
1701 11:52:30.165559 PCI: 01:00.0 init finished in 0 msecs
1702 11:52:30.168784 PNP: 0c09.0 init
1703 11:52:30.172000 Google Chrome EC uptime: 8.458 seconds
1704 11:52:30.178846 Google Chrome AP resets since EC boot: 0
1705 11:52:30.182159 Google Chrome most recent AP reset causes:
1706 11:52:30.188894 Google Chrome EC reset flags at last EC boot: reset-pin
1707 11:52:30.192056 PNP: 0c09.0 init finished in 18 msecs
1708 11:52:30.196459 Devices initialized
1709 11:52:30.200002 Show all devs... After init.
1710 11:52:30.203434 Root Device: enabled 1
1711 11:52:30.203736 DOMAIN: 0000: enabled 1
1712 11:52:30.206919 CPU_CLUSTER: 0: enabled 1
1713 11:52:30.210110 PCI: 00:00.0: enabled 1
1714 11:52:30.213641 PCI: 00:02.0: enabled 1
1715 11:52:30.214025 PCI: 00:04.0: enabled 1
1716 11:52:30.216726 PCI: 00:05.0: enabled 1
1717 11:52:30.220332 PCI: 00:06.0: enabled 0
1718 11:52:30.223525 PCI: 00:07.0: enabled 0
1719 11:52:30.223967 PCI: 00:07.1: enabled 0
1720 11:52:30.227107 PCI: 00:07.2: enabled 0
1721 11:52:30.230214 PCI: 00:07.3: enabled 0
1722 11:52:30.233575 PCI: 00:08.0: enabled 1
1723 11:52:30.233995 PCI: 00:09.0: enabled 0
1724 11:52:30.236886 PCI: 00:0a.0: enabled 0
1725 11:52:30.240212 PCI: 00:0d.0: enabled 1
1726 11:52:30.243668 PCI: 00:0d.1: enabled 0
1727 11:52:30.244103 PCI: 00:0d.2: enabled 0
1728 11:52:30.246848 PCI: 00:0d.3: enabled 0
1729 11:52:30.250048 PCI: 00:0e.0: enabled 0
1730 11:52:30.250481 PCI: 00:10.2: enabled 1
1731 11:52:30.253394 PCI: 00:10.6: enabled 0
1732 11:52:30.256546 PCI: 00:10.7: enabled 0
1733 11:52:30.259939 PCI: 00:12.0: enabled 0
1734 11:52:30.260372 PCI: 00:12.6: enabled 0
1735 11:52:30.263138 PCI: 00:13.0: enabled 0
1736 11:52:30.266494 PCI: 00:14.0: enabled 1
1737 11:52:30.269876 PCI: 00:14.1: enabled 0
1738 11:52:30.270308 PCI: 00:14.2: enabled 1
1739 11:52:30.272981 PCI: 00:14.3: enabled 1
1740 11:52:30.276903 PCI: 00:15.0: enabled 1
1741 11:52:30.280070 PCI: 00:15.1: enabled 1
1742 11:52:30.280660 PCI: 00:15.2: enabled 1
1743 11:52:30.283619 PCI: 00:15.3: enabled 1
1744 11:52:30.286975 PCI: 00:16.0: enabled 1
1745 11:52:30.287534 PCI: 00:16.1: enabled 0
1746 11:52:30.290052 PCI: 00:16.2: enabled 0
1747 11:52:30.293518 PCI: 00:16.3: enabled 0
1748 11:52:30.296668 PCI: 00:16.4: enabled 0
1749 11:52:30.297090 PCI: 00:16.5: enabled 0
1750 11:52:30.300048 PCI: 00:17.0: enabled 0
1751 11:52:30.303334 PCI: 00:19.0: enabled 0
1752 11:52:30.306408 PCI: 00:19.1: enabled 1
1753 11:52:30.306826 PCI: 00:19.2: enabled 0
1754 11:52:30.309977 PCI: 00:1c.0: enabled 1
1755 11:52:30.313154 PCI: 00:1c.1: enabled 0
1756 11:52:30.316154 PCI: 00:1c.2: enabled 0
1757 11:52:30.316574 PCI: 00:1c.3: enabled 0
1758 11:52:30.319793 PCI: 00:1c.4: enabled 0
1759 11:52:30.323014 PCI: 00:1c.5: enabled 0
1760 11:52:30.326581 PCI: 00:1c.6: enabled 1
1761 11:52:30.326997 PCI: 00:1c.7: enabled 0
1762 11:52:30.329780 PCI: 00:1d.0: enabled 1
1763 11:52:30.332842 PCI: 00:1d.1: enabled 0
1764 11:52:30.333253 PCI: 00:1d.2: enabled 1
1765 11:52:30.336351 PCI: 00:1d.3: enabled 0
1766 11:52:30.339534 PCI: 00:1e.0: enabled 1
1767 11:52:30.342739 PCI: 00:1e.1: enabled 0
1768 11:52:30.342821 PCI: 00:1e.2: enabled 1
1769 11:52:30.346119 PCI: 00:1e.3: enabled 1
1770 11:52:30.349412 PCI: 00:1f.0: enabled 1
1771 11:52:30.352611 PCI: 00:1f.1: enabled 0
1772 11:52:30.352692 PCI: 00:1f.2: enabled 1
1773 11:52:30.356088 PCI: 00:1f.3: enabled 1
1774 11:52:30.359273 PCI: 00:1f.4: enabled 0
1775 11:52:30.362484 PCI: 00:1f.5: enabled 1
1776 11:52:30.362565 PCI: 00:1f.6: enabled 0
1777 11:52:30.365853 PCI: 00:1f.7: enabled 0
1778 11:52:30.369174 APIC: 00: enabled 1
1779 11:52:30.369255 GENERIC: 0.0: enabled 1
1780 11:52:30.372415 GENERIC: 0.0: enabled 1
1781 11:52:30.375733 GENERIC: 1.0: enabled 1
1782 11:52:30.379074 GENERIC: 0.0: enabled 1
1783 11:52:30.379154 GENERIC: 1.0: enabled 1
1784 11:52:30.382386 USB0 port 0: enabled 1
1785 11:52:30.385672 GENERIC: 0.0: enabled 1
1786 11:52:30.385752 USB0 port 0: enabled 1
1787 11:52:30.389081 GENERIC: 0.0: enabled 1
1788 11:52:30.392460 I2C: 00:1a: enabled 1
1789 11:52:30.395717 I2C: 00:31: enabled 1
1790 11:52:30.395803 I2C: 00:32: enabled 1
1791 11:52:30.399384 I2C: 00:10: enabled 1
1792 11:52:30.402809 I2C: 00:15: enabled 1
1793 11:52:30.402910 GENERIC: 0.0: enabled 0
1794 11:52:30.405615 GENERIC: 1.0: enabled 0
1795 11:52:30.408871 GENERIC: 0.0: enabled 1
1796 11:52:30.408957 SPI: 00: enabled 1
1797 11:52:30.412554 SPI: 00: enabled 1
1798 11:52:30.415777 PNP: 0c09.0: enabled 1
1799 11:52:30.415862 GENERIC: 0.0: enabled 1
1800 11:52:30.418936 USB3 port 0: enabled 1
1801 11:52:30.422068 USB3 port 1: enabled 1
1802 11:52:30.425595 USB3 port 2: enabled 0
1803 11:52:30.425675 USB3 port 3: enabled 0
1804 11:52:30.429044 USB2 port 0: enabled 0
1805 11:52:30.432038 USB2 port 1: enabled 1
1806 11:52:30.432131 USB2 port 2: enabled 1
1807 11:52:30.435254 USB2 port 3: enabled 0
1808 11:52:30.438843 USB2 port 4: enabled 1
1809 11:52:30.441902 USB2 port 5: enabled 0
1810 11:52:30.442055 USB2 port 6: enabled 0
1811 11:52:30.445383 USB2 port 7: enabled 0
1812 11:52:30.448992 USB2 port 8: enabled 0
1813 11:52:30.449112 USB2 port 9: enabled 0
1814 11:52:30.452195 USB3 port 0: enabled 0
1815 11:52:30.455357 USB3 port 1: enabled 1
1816 11:52:30.455490 USB3 port 2: enabled 0
1817 11:52:30.458534 USB3 port 3: enabled 0
1818 11:52:30.462045 GENERIC: 0.0: enabled 1
1819 11:52:30.465337 GENERIC: 1.0: enabled 1
1820 11:52:30.465506 APIC: 01: enabled 1
1821 11:52:30.468426 APIC: 03: enabled 1
1822 11:52:30.471703 APIC: 07: enabled 1
1823 11:52:30.471783 APIC: 05: enabled 1
1824 11:52:30.475073 APIC: 04: enabled 1
1825 11:52:30.475159 APIC: 02: enabled 1
1826 11:52:30.478748 APIC: 06: enabled 1
1827 11:52:30.481496 PCI: 01:00.0: enabled 1
1828 11:52:30.485204 BS: BS_DEV_INIT run times (exec / console): 29 / 536 ms
1829 11:52:30.491735 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1830 11:52:30.495091 ELOG: NV offset 0xf30000 size 0x1000
1831 11:52:30.501533 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1832 11:52:30.508560 ELOG: Event(17) added with size 13 at 2023-06-23 11:52:30 UTC
1833 11:52:30.515088 ELOG: Event(92) added with size 9 at 2023-06-23 11:52:30 UTC
1834 11:52:30.521459 ELOG: Event(93) added with size 9 at 2023-06-23 11:52:30 UTC
1835 11:52:30.528433 ELOG: Event(9E) added with size 10 at 2023-06-23 11:52:30 UTC
1836 11:52:30.534965 ELOG: Event(9F) added with size 14 at 2023-06-23 11:52:30 UTC
1837 11:52:30.541401 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1838 11:52:30.548193 ELOG: Event(A1) added with size 10 at 2023-06-23 11:52:30 UTC
1839 11:52:30.554531 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1840 11:52:30.561574 ELOG: Event(A0) added with size 9 at 2023-06-23 11:52:30 UTC
1841 11:52:30.564728 elog_add_boot_reason: Logged dev mode boot
1842 11:52:30.571374 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1843 11:52:30.571943 Finalize devices...
1844 11:52:30.574732 Devices finalized
1845 11:52:30.581117 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1846 11:52:30.584302 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1847 11:52:30.591526 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1848 11:52:30.594785 ME: HFSTS1 : 0x80030055
1849 11:52:30.601326 ME: HFSTS2 : 0x30280116
1850 11:52:30.604431 ME: HFSTS3 : 0x00000050
1851 11:52:30.607833 ME: HFSTS4 : 0x00004000
1852 11:52:30.614484 ME: HFSTS5 : 0x00000000
1853 11:52:30.617693 ME: HFSTS6 : 0x00400006
1854 11:52:30.620985 ME: Manufacturing Mode : YES
1855 11:52:30.624268 ME: SPI Protection Mode Enabled : NO
1856 11:52:30.630969 ME: FW Partition Table : OK
1857 11:52:30.634129 ME: Bringup Loader Failure : NO
1858 11:52:30.637444 ME: Firmware Init Complete : NO
1859 11:52:30.640954 ME: Boot Options Present : NO
1860 11:52:30.644081 ME: Update In Progress : NO
1861 11:52:30.647562 ME: D0i3 Support : YES
1862 11:52:30.651105 ME: Low Power State Enabled : NO
1863 11:52:30.654073 ME: CPU Replaced : YES
1864 11:52:30.660821 ME: CPU Replacement Valid : YES
1865 11:52:30.663818 ME: Current Working State : 5
1866 11:52:30.667614 ME: Current Operation State : 1
1867 11:52:30.670588 ME: Current Operation Mode : 3
1868 11:52:30.673887 ME: Error Code : 0
1869 11:52:30.677114 ME: Enhanced Debug Mode : NO
1870 11:52:30.680785 ME: CPU Debug Disabled : YES
1871 11:52:30.684026 ME: TXT Support : NO
1872 11:52:30.690621 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1873 11:52:30.700462 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1874 11:52:30.703770 CBFS: 'fallback/slic' not found.
1875 11:52:30.707103 ACPI: Writing ACPI tables at 76b01000.
1876 11:52:30.707515 ACPI: * FACS
1877 11:52:30.710360 ACPI: * DSDT
1878 11:52:30.713813 Ramoops buffer: 0x100000@0x76a00000.
1879 11:52:30.717127 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1880 11:52:30.723841 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1881 11:52:30.727212 Google Chrome EC: version:
1882 11:52:30.730347 ro: voema_v2.0.10114-a447f03e46
1883 11:52:30.733403 rw: voema_v2.0.10114-a447f03e46
1884 11:52:30.736613 running image: 1
1885 11:52:30.739904 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1886 11:52:30.745192 ACPI: * FADT
1887 11:52:30.745634 SCI is IRQ9
1888 11:52:30.751872 ACPI: added table 1/32, length now 40
1889 11:52:30.752296 ACPI: * SSDT
1890 11:52:30.755324 Found 1 CPU(s) with 8 core(s) each.
1891 11:52:30.762082 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1892 11:52:30.765667 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1893 11:52:30.768985 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1894 11:52:30.772166 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1895 11:52:30.778503 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1896 11:52:30.785204 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1897 11:52:30.788648 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1898 11:52:30.795347 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1899 11:52:30.801864 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1900 11:52:30.804929 \_SB.PCI0.RP09: Added StorageD3Enable property
1901 11:52:30.808115 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1902 11:52:30.814983 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1903 11:52:30.821664 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1904 11:52:30.824940 PS2K: Passing 80 keymaps to kernel
1905 11:52:30.831459 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1906 11:52:30.838333 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1907 11:52:30.844831 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1908 11:52:30.851466 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1909 11:52:30.858338 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1910 11:52:30.864714 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1911 11:52:30.871187 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1912 11:52:30.877833 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1913 11:52:30.881479 ACPI: added table 2/32, length now 44
1914 11:52:30.881894 ACPI: * MCFG
1915 11:52:30.888116 ACPI: added table 3/32, length now 48
1916 11:52:30.888528 ACPI: * TPM2
1917 11:52:30.891291 TPM2 log created at 0x769f0000
1918 11:52:30.894687 ACPI: added table 4/32, length now 52
1919 11:52:30.897891 ACPI: * MADT
1920 11:52:30.898294 SCI is IRQ9
1921 11:52:30.901207 ACPI: added table 5/32, length now 56
1922 11:52:30.904568 current = 76b09850
1923 11:52:30.904991 ACPI: * DMAR
1924 11:52:30.911067 ACPI: added table 6/32, length now 60
1925 11:52:30.914642 ACPI: added table 7/32, length now 64
1926 11:52:30.915045 ACPI: * HPET
1927 11:52:30.917784 ACPI: added table 8/32, length now 68
1928 11:52:30.921069 ACPI: done.
1929 11:52:30.921470 ACPI tables: 35216 bytes.
1930 11:52:30.924271 smbios_write_tables: 769ef000
1931 11:52:30.927558 EC returned error result code 3
1932 11:52:30.934213 Couldn't obtain OEM name from CBI
1933 11:52:30.937286 Create SMBIOS type 16
1934 11:52:30.937683 Create SMBIOS type 17
1935 11:52:30.940586 GENERIC: 0.0 (WIFI Device)
1936 11:52:30.944062 SMBIOS tables: 1750 bytes.
1937 11:52:30.947254 Writing table forward entry at 0x00000500
1938 11:52:30.954333 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1939 11:52:30.957622 Writing coreboot table at 0x76b25000
1940 11:52:30.964154 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1941 11:52:30.967652 1. 0000000000001000-000000000009ffff: RAM
1942 11:52:30.974240 2. 00000000000a0000-00000000000fffff: RESERVED
1943 11:52:30.977213 3. 0000000000100000-00000000769eefff: RAM
1944 11:52:30.983671 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1945 11:52:30.987267 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1946 11:52:30.993664 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1947 11:52:31.000370 7. 0000000077000000-000000007fbfffff: RESERVED
1948 11:52:31.003691 8. 00000000c0000000-00000000cfffffff: RESERVED
1949 11:52:31.006878 9. 00000000f8000000-00000000f9ffffff: RESERVED
1950 11:52:31.013515 10. 00000000fb000000-00000000fb000fff: RESERVED
1951 11:52:31.016864 11. 00000000fe000000-00000000fe00ffff: RESERVED
1952 11:52:31.023470 12. 00000000fed80000-00000000fed87fff: RESERVED
1953 11:52:31.026651 13. 00000000fed90000-00000000fed92fff: RESERVED
1954 11:52:31.033345 14. 00000000feda0000-00000000feda1fff: RESERVED
1955 11:52:31.036477 15. 00000000fedc0000-00000000feddffff: RESERVED
1956 11:52:31.039717 16. 0000000100000000-00000002803fffff: RAM
1957 11:52:31.043523 Passing 4 GPIOs to payload:
1958 11:52:31.049855 NAME | PORT | POLARITY | VALUE
1959 11:52:31.053330 lid | undefined | high | high
1960 11:52:31.059658 power | undefined | high | low
1961 11:52:31.066652 oprom | undefined | high | low
1962 11:52:31.069855 EC in RW | 0x000000e5 | high | low
1963 11:52:31.076445 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 4dc4
1964 11:52:31.079712 coreboot table: 1576 bytes.
1965 11:52:31.082978 IMD ROOT 0. 0x76fff000 0x00001000
1966 11:52:31.086073 IMD SMALL 1. 0x76ffe000 0x00001000
1967 11:52:31.089495 FSP MEMORY 2. 0x76c4e000 0x003b0000
1968 11:52:31.096113 VPD 3. 0x76c4d000 0x00000367
1969 11:52:31.099210 RO MCACHE 4. 0x76c4c000 0x00000fdc
1970 11:52:31.102730 CONSOLE 5. 0x76c2c000 0x00020000
1971 11:52:31.106231 FMAP 6. 0x76c2b000 0x00000578
1972 11:52:31.109275 TIME STAMP 7. 0x76c2a000 0x00000910
1973 11:52:31.112590 VBOOT WORK 8. 0x76c16000 0x00014000
1974 11:52:31.115980 ROMSTG STCK 9. 0x76c15000 0x00001000
1975 11:52:31.119298 AFTER CAR 10. 0x76c0a000 0x0000b000
1976 11:52:31.125770 RAMSTAGE 11. 0x76b97000 0x00073000
1977 11:52:31.129522 REFCODE 12. 0x76b42000 0x00055000
1978 11:52:31.132501 SMM BACKUP 13. 0x76b32000 0x00010000
1979 11:52:31.135790 4f444749 14. 0x76b30000 0x00002000
1980 11:52:31.138924 EXT VBT15. 0x76b2d000 0x0000219f
1981 11:52:31.142189 COREBOOT 16. 0x76b25000 0x00008000
1982 11:52:31.145683 ACPI 17. 0x76b01000 0x00024000
1983 11:52:31.148854 ACPI GNVS 18. 0x76b00000 0x00001000
1984 11:52:31.152582 RAMOOPS 19. 0x76a00000 0x00100000
1985 11:52:31.159068 TPM2 TCGLOG20. 0x769f0000 0x00010000
1986 11:52:31.162326 SMBIOS 21. 0x769ef000 0x00000800
1987 11:52:31.162402 IMD small region:
1988 11:52:31.165527 IMD ROOT 0. 0x76ffec00 0x00000400
1989 11:52:31.172557 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1990 11:52:31.175821 POWER STATE 2. 0x76ffeb80 0x00000044
1991 11:52:31.179014 ROMSTAGE 3. 0x76ffeb60 0x00000004
1992 11:52:31.182376 MEM INFO 4. 0x76ffe980 0x000001e0
1993 11:52:31.189027 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1994 11:52:31.192242 MTRR: Physical address space:
1995 11:52:31.198664 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1996 11:52:31.205631 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1997 11:52:31.212052 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1998 11:52:31.215531 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1999 11:52:31.221924 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2000 11:52:31.228458 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2001 11:52:31.235454 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2002 11:52:31.238267 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 11:52:31.245350 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 11:52:31.248597 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 11:52:31.251787 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 11:52:31.255092 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 11:52:31.261604 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 11:52:31.264917 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 11:52:31.268292 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 11:52:31.271433 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 11:52:31.278491 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 11:52:31.281188 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 11:52:31.285165 call enable_fixed_mtrr()
2014 11:52:31.288420 CPU physical address size: 39 bits
2015 11:52:31.291116 MTRR: default type WB/UC MTRR counts: 6/6.
2016 11:52:31.294640 MTRR: UC selected as default type.
2017 11:52:31.301023 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2018 11:52:31.307760 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2019 11:52:31.314585 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2020 11:52:31.321304 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2021 11:52:31.327569 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2022 11:52:31.334106 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2023 11:52:31.334187
2024 11:52:31.337452 MTRR check
2025 11:52:31.337532 Fixed MTRRs : Enabled
2026 11:52:31.340812 Variable MTRRs: Enabled
2027 11:52:31.340894
2028 11:52:31.344059 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 11:52:31.350592 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 11:52:31.354403 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 11:52:31.357137 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 11:52:31.360448 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 11:52:31.367369 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 11:52:31.370595 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 11:52:31.373833 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 11:52:31.377124 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 11:52:31.380189 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 11:52:31.387535 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 11:52:31.393384 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2040 11:52:31.397075 call enable_fixed_mtrr()
2041 11:52:31.400849 Checking cr50 for pending updates
2042 11:52:31.404161 CPU physical address size: 39 bits
2043 11:52:31.408011 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 11:52:31.411292 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 11:52:31.414371 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 11:52:31.417578 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 11:52:31.424078 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 11:52:31.427543 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 11:52:31.430792 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 11:52:31.434437 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 11:52:31.440850 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 11:52:31.444119 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 11:52:31.447269 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 11:52:31.450590 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 11:52:31.457823 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 11:52:31.457905 call enable_fixed_mtrr()
2057 11:52:31.464531 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 11:52:31.468343 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 11:52:31.471473 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 11:52:31.474776 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 11:52:31.481317 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 11:52:31.484366 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 11:52:31.488094 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 11:52:31.491255 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 11:52:31.497916 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 11:52:31.501069 CPU physical address size: 39 bits
2067 11:52:31.504328 call enable_fixed_mtrr()
2068 11:52:31.507514 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 11:52:31.514592 MTRR: Fixed MSR 0x250 0x0606060606060606
2070 11:52:31.517847 MTRR: Fixed MSR 0x258 0x0606060606060606
2071 11:52:31.521137 MTRR: Fixed MSR 0x259 0x0000000000000000
2072 11:52:31.524090 MTRR: Fixed MSR 0x268 0x0606060606060606
2073 11:52:31.527706 MTRR: Fixed MSR 0x269 0x0606060606060606
2074 11:52:31.534263 MTRR: Fixed MSR 0x26a 0x0606060606060606
2075 11:52:31.537728 MTRR: Fixed MSR 0x26b 0x0606060606060606
2076 11:52:31.540857 MTRR: Fixed MSR 0x26c 0x0606060606060606
2077 11:52:31.544209 MTRR: Fixed MSR 0x26d 0x0606060606060606
2078 11:52:31.550692 MTRR: Fixed MSR 0x26e 0x0606060606060606
2079 11:52:31.553920 MTRR: Fixed MSR 0x26f 0x0606060606060606
2080 11:52:31.557242 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 11:52:31.560531 call enable_fixed_mtrr()
2082 11:52:31.563868 MTRR: Fixed MSR 0x259 0x0000000000000000
2083 11:52:31.570803 MTRR: Fixed MSR 0x268 0x0606060606060606
2084 11:52:31.574170 MTRR: Fixed MSR 0x269 0x0606060606060606
2085 11:52:31.576999 MTRR: Fixed MSR 0x26a 0x0606060606060606
2086 11:52:31.580478 MTRR: Fixed MSR 0x26b 0x0606060606060606
2087 11:52:31.587346 MTRR: Fixed MSR 0x26c 0x0606060606060606
2088 11:52:31.590508 MTRR: Fixed MSR 0x26d 0x0606060606060606
2089 11:52:31.593805 MTRR: Fixed MSR 0x26e 0x0606060606060606
2090 11:52:31.597241 MTRR: Fixed MSR 0x26f 0x0606060606060606
2091 11:52:31.600896 CPU physical address size: 39 bits
2092 11:52:31.607609 call enable_fixed_mtrr()
2093 11:52:31.610998 MTRR: Fixed MSR 0x250 0x0606060606060606
2094 11:52:31.614260 MTRR: Fixed MSR 0x250 0x0606060606060606
2095 11:52:31.617933 MTRR: Fixed MSR 0x258 0x0606060606060606
2096 11:52:31.624487 MTRR: Fixed MSR 0x259 0x0000000000000000
2097 11:52:31.627481 MTRR: Fixed MSR 0x268 0x0606060606060606
2098 11:52:31.630807 MTRR: Fixed MSR 0x269 0x0606060606060606
2099 11:52:31.634009 MTRR: Fixed MSR 0x26a 0x0606060606060606
2100 11:52:31.637716 MTRR: Fixed MSR 0x26b 0x0606060606060606
2101 11:52:31.644156 MTRR: Fixed MSR 0x26c 0x0606060606060606
2102 11:52:31.647639 MTRR: Fixed MSR 0x26d 0x0606060606060606
2103 11:52:31.650892 MTRR: Fixed MSR 0x26e 0x0606060606060606
2104 11:52:31.653932 MTRR: Fixed MSR 0x26f 0x0606060606060606
2105 11:52:31.660342 MTRR: Fixed MSR 0x258 0x0606060606060606
2106 11:52:31.664188 call enable_fixed_mtrr()
2107 11:52:31.667274 MTRR: Fixed MSR 0x259 0x0000000000000000
2108 11:52:31.670570 MTRR: Fixed MSR 0x268 0x0606060606060606
2109 11:52:31.673631 MTRR: Fixed MSR 0x269 0x0606060606060606
2110 11:52:31.680576 MTRR: Fixed MSR 0x26a 0x0606060606060606
2111 11:52:31.683861 MTRR: Fixed MSR 0x26b 0x0606060606060606
2112 11:52:31.687096 MTRR: Fixed MSR 0x26c 0x0606060606060606
2113 11:52:31.690464 MTRR: Fixed MSR 0x26d 0x0606060606060606
2114 11:52:31.696720 MTRR: Fixed MSR 0x26e 0x0606060606060606
2115 11:52:31.700538 MTRR: Fixed MSR 0x26f 0x0606060606060606
2116 11:52:31.703325 CPU physical address size: 39 bits
2117 11:52:31.707798 call enable_fixed_mtrr()
2118 11:52:31.711014 CPU physical address size: 39 bits
2119 11:52:31.714302 CPU physical address size: 39 bits
2120 11:52:31.717521 CPU physical address size: 39 bits
2121 11:52:31.720659 Reading cr50 TPM mode
2122 11:52:31.731112 BS: BS_PAYLOAD_LOAD entry times (exec / console): 327 / 6 ms
2123 11:52:31.740893 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2124 11:52:31.744572 Checking segment from ROM address 0xffc02b38
2125 11:52:31.747702 Checking segment from ROM address 0xffc02b54
2126 11:52:31.754146 Loading segment from ROM address 0xffc02b38
2127 11:52:31.754253 code (compression=0)
2128 11:52:31.764342 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2129 11:52:31.770741 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2130 11:52:31.774022 it's not compressed!
2131 11:52:31.913643 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2132 11:52:31.920171 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2133 11:52:31.926612 Loading segment from ROM address 0xffc02b54
2134 11:52:31.926719 Entry Point 0x30000000
2135 11:52:31.930301 Loaded segments
2136 11:52:31.936526 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2137 11:52:31.979738 Finalizing chipset.
2138 11:52:31.983190 Finalizing SMM.
2139 11:52:31.983315 APMC done.
2140 11:52:31.989480 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2141 11:52:31.992764 mp_park_aps done after 0 msecs.
2142 11:52:31.996003 Jumping to boot code at 0x30000000(0x76b25000)
2143 11:52:32.006497 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2144 11:52:32.006582
2145 11:52:32.006646
2146 11:52:32.006724
2147 11:52:32.009563 Starting depthcharge on Voema...
2148 11:52:32.009644
2149 11:52:32.010030 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2150 11:52:32.010130 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2151 11:52:32.010213 Setting prompt string to ['volteer:']
2152 11:52:32.010296 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2153 11:52:32.019492 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2154 11:52:32.019614
2155 11:52:32.026053 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2156 11:52:32.026136
2157 11:52:32.032500 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2158 11:52:32.032583
2159 11:52:32.035897 Failed to find eMMC card reader
2160 11:52:32.035979
2161 11:52:32.036043 Wipe memory regions:
2162 11:52:32.036103
2163 11:52:32.042560 [0x00000000001000, 0x000000000a0000)
2164 11:52:32.042641
2165 11:52:32.046051 [0x00000000100000, 0x00000030000000)
2166 11:52:32.071056
2167 11:52:32.074246 [0x00000032662db0, 0x000000769ef000)
2168 11:52:32.110649
2169 11:52:32.113792 [0x00000100000000, 0x00000280400000)
2170 11:52:32.314929
2171 11:52:32.317739 ec_init: CrosEC protocol v3 supported (256, 256)
2172 11:52:32.748755
2173 11:52:32.748908 R8152: Initializing
2174 11:52:32.749002
2175 11:52:32.751983 Version 6 (ocp_data = 5c30)
2176 11:52:32.752065
2177 11:52:32.755044 R8152: Done initializing
2178 11:52:32.755125
2179 11:52:32.758210 Adding net device
2180 11:52:33.060002
2181 11:52:33.063207 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2182 11:52:33.063779
2183 11:52:33.064149
2184 11:52:33.064464
2185 11:52:33.066967 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2187 11:52:33.168190 volteer: tftpboot 192.168.201.1 10875933/tftp-deploy-08g20g2l/kernel/bzImage 10875933/tftp-deploy-08g20g2l/kernel/cmdline 10875933/tftp-deploy-08g20g2l/ramdisk/ramdisk.cpio.gz
2188 11:52:33.168801 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 11:52:33.169197 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2190 11:52:33.173663 tftpboot 192.168.201.1 10875933/tftp-deploy-08g20g2l/kernel/bzIploy-08g20g2l/kernel/cmdline 10875933/tftp-deploy-08g20g2l/ramdisk/ramdisk.cpio.gz
2191 11:52:33.174191
2192 11:52:33.174602 Waiting for link
2193 11:52:33.376667
2194 11:52:33.377190 done.
2195 11:52:33.377544
2196 11:52:33.377851 MAC: 00:24:32:30:77:76
2197 11:52:33.378442
2198 11:52:33.379851 Sending DHCP discover... done.
2199 11:52:33.380304
2200 11:52:33.383066 Waiting for reply... done.
2201 11:52:33.383504
2202 11:52:33.386296 Sending DHCP request... done.
2203 11:52:33.386831
2204 11:52:33.397512 Waiting for reply... done.
2205 11:52:33.398065
2206 11:52:33.398414 My ip is 192.168.201.16
2207 11:52:33.398735
2208 11:52:33.404078 The DHCP server ip is 192.168.201.1
2209 11:52:33.404627
2210 11:52:33.407146 TFTP server IP predefined by user: 192.168.201.1
2211 11:52:33.407661
2212 11:52:33.413777 Bootfile predefined by user: 10875933/tftp-deploy-08g20g2l/kernel/bzImage
2213 11:52:33.414270
2214 11:52:33.416946 Sending tftp read request... done.
2215 11:52:33.417381
2216 11:52:33.425622 Waiting for the transfer...
2217 11:52:33.426068
2218 11:52:34.005204 00000000 ################################################################
2219 11:52:34.005356
2220 11:52:34.573578 00080000 ################################################################
2221 11:52:34.573739
2222 11:52:35.129040 00100000 ################################################################
2223 11:52:35.129189
2224 11:52:35.699060 00180000 ################################################################
2225 11:52:35.699208
2226 11:52:36.260059 00200000 ################################################################
2227 11:52:36.260196
2228 11:52:36.811152 00280000 ################################################################
2229 11:52:36.811304
2230 11:52:37.357110 00300000 ################################################################
2231 11:52:37.357285
2232 11:52:37.939077 00380000 ################################################################
2233 11:52:37.939249
2234 11:52:38.494072 00400000 ################################################################
2235 11:52:38.494253
2236 11:52:39.045450 00480000 ################################################################
2237 11:52:39.045596
2238 11:52:39.602314 00500000 ################################################################
2239 11:52:39.602466
2240 11:52:40.253481 00580000 ################################################################
2241 11:52:40.253630
2242 11:52:40.856083 00600000 ################################################################
2243 11:52:40.856234
2244 11:52:41.445060 00680000 ################################################################
2245 11:52:41.445207
2246 11:52:42.022868 00700000 ################################################################
2247 11:52:42.023031
2248 11:52:42.630802 00780000 ################################################################
2249 11:52:42.630951
2250 11:52:43.224761 00800000 ################################################################
2251 11:52:43.224907
2252 11:52:43.810615 00880000 ################################################################
2253 11:52:43.810782
2254 11:52:44.385304 00900000 ################################################################
2255 11:52:44.385454
2256 11:52:44.960177 00980000 ################################################################
2257 11:52:44.960342
2258 11:52:45.370296 00a00000 ############################################## done.
2259 11:52:45.370894
2260 11:52:45.373934 The bootfile was 10859008 bytes long.
2261 11:52:45.374383
2262 11:52:45.377017 Sending tftp read request... done.
2263 11:52:45.377437
2264 11:52:45.380228 Waiting for the transfer...
2265 11:52:45.380643
2266 11:52:46.041061 00000000 ################################################################
2267 11:52:46.041219
2268 11:52:46.663303 00080000 ################################################################
2269 11:52:46.663478
2270 11:52:47.220206 00100000 ################################################################
2271 11:52:47.220377
2272 11:52:47.776828 00180000 ################################################################
2273 11:52:47.777008
2274 11:52:48.316231 00200000 ################################################################
2275 11:52:48.317048
2276 11:52:48.871137 00280000 ################################################################
2277 11:52:48.871358
2278 11:52:49.474950 00300000 ################################################################
2279 11:52:49.475340
2280 11:52:50.038228 00380000 ################################################################
2281 11:52:50.038408
2282 11:52:50.599016 00400000 ################################################################
2283 11:52:50.599802
2284 11:52:51.191807 00480000 ################################################################
2285 11:52:51.191964
2286 11:52:51.742544 00500000 ################################################################
2287 11:52:51.742741
2288 11:52:52.314131 00580000 ################################################################
2289 11:52:52.314268
2290 11:52:52.893562 00600000 ################################################################
2291 11:52:52.893724
2292 11:52:52.937666 00680000 ##### done.
2293 11:52:52.937792
2294 11:52:52.940469 Sending tftp read request... done.
2295 11:52:52.940562
2296 11:52:52.944151 Waiting for the transfer...
2297 11:52:52.944249
2298 11:52:52.944316 00000000 # done.
2299 11:52:52.944386
2300 11:52:52.953513 Command line loaded dynamically from TFTP file: 10875933/tftp-deploy-08g20g2l/kernel/cmdline
2301 11:52:52.953595
2302 11:52:52.976721 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10875933/extract-nfsrootfs-m7xc9j73,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2303 11:52:52.981130
2304 11:52:52.984235 Shutting down all USB controllers.
2305 11:52:52.984317
2306 11:52:52.984381 Removing current net device
2307 11:52:52.984439
2308 11:52:52.987316 Finalizing coreboot
2309 11:52:52.987415
2310 11:52:52.994235 Exiting depthcharge with code 4 at timestamp: 29681496
2311 11:52:52.994360
2312 11:52:52.994468
2313 11:52:52.994558 Starting kernel ...
2314 11:52:52.994646
2315 11:52:52.994704
2316 11:52:52.995073 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2317 11:52:52.995178 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2318 11:52:52.995255 Setting prompt string to ['Linux version [0-9]']
2319 11:52:52.995326 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2320 11:52:52.995440 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2322 11:57:16.996138 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2324 11:57:16.997134 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2326 11:57:16.997888 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2329 11:57:16.999171 end: 2 depthcharge-action (duration 00:05:00) [common]
2331 11:57:17.000251 Cleaning after the job
2332 11:57:17.000665 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/ramdisk
2333 11:57:17.004644 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/kernel
2334 11:57:17.010239 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/nfsrootfs
2335 11:57:17.105215 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875933/tftp-deploy-08g20g2l/modules
2336 11:57:17.105866 start: 4.1 power-off (timeout 00:00:30) [common]
2337 11:57:17.106035 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2338 11:57:17.179100 >> Command sent successfully.
2339 11:57:17.189422 Returned 0 in 0 seconds
2340 11:57:17.290367 end: 4.1 power-off (duration 00:00:00) [common]
2342 11:57:17.290819 start: 4.2 read-feedback (timeout 00:10:00) [common]
2343 11:57:17.291191 Listened to connection for namespace 'common' for up to 1s
2344 11:57:18.291807 Finalising connection for namespace 'common'
2345 11:57:18.292442 Disconnecting from shell: Finalise
2346 11:57:18.292804
2347 11:57:18.393715 end: 4.2 read-feedback (duration 00:00:01) [common]
2348 11:57:18.394251 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10875933
2349 11:57:18.894902 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10875933
2350 11:57:18.895139 JobError: Your job cannot terminate cleanly.