Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:51:27.507046 lava-dispatcher, installed at version: 2023.05.1
2 11:51:27.507265 start: 0 validate
3 11:51:27.507394 Start time: 2023-06-23 11:51:27.507386+00:00 (UTC)
4 11:51:27.507513 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:51:27.507686 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230609.0%2Famd64%2Finitrd.cpio.gz exists
6 11:51:27.765522 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:51:27.766273 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:51:28.036792 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:51:28.037497 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230609.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:51:31.404121 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:51:31.404830 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:51:31.667171 validate duration: 4.16
14 11:51:31.667461 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:51:31.667561 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:51:31.667712 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:51:31.667844 Not decompressing ramdisk as can be used compressed.
18 11:51:31.667931 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230609.0/amd64/initrd.cpio.gz
19 11:51:31.668013 saving as /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/ramdisk/initrd.cpio.gz
20 11:51:31.668147 total size: 5432707 (5MB)
21 11:51:32.312072 progress 0% (0MB)
22 11:51:32.321284 progress 5% (0MB)
23 11:51:32.329064 progress 10% (0MB)
24 11:51:32.336429 progress 15% (0MB)
25 11:51:32.342315 progress 20% (1MB)
26 11:51:32.345546 progress 25% (1MB)
27 11:51:32.346941 progress 30% (1MB)
28 11:51:32.348487 progress 35% (1MB)
29 11:51:32.349856 progress 40% (2MB)
30 11:51:32.351218 progress 45% (2MB)
31 11:51:32.352701 progress 50% (2MB)
32 11:51:32.354230 progress 55% (2MB)
33 11:51:32.355646 progress 60% (3MB)
34 11:51:32.357020 progress 65% (3MB)
35 11:51:32.358540 progress 70% (3MB)
36 11:51:32.359955 progress 75% (3MB)
37 11:51:32.361379 progress 80% (4MB)
38 11:51:32.362790 progress 85% (4MB)
39 11:51:32.364358 progress 90% (4MB)
40 11:51:32.365738 progress 95% (4MB)
41 11:51:32.367174 progress 100% (5MB)
42 11:51:32.367385 5MB downloaded in 0.70s (7.41MB/s)
43 11:51:32.367542 end: 1.1.1 http-download (duration 00:00:01) [common]
45 11:51:32.367821 end: 1.1 download-retry (duration 00:00:01) [common]
46 11:51:32.367911 start: 1.2 download-retry (timeout 00:09:59) [common]
47 11:51:32.367997 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 11:51:32.368128 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:51:32.368242 saving as /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/kernel/bzImage
50 11:51:32.368306 total size: 10859008 (10MB)
51 11:51:32.368368 No compression specified
52 11:51:32.369556 progress 0% (0MB)
53 11:51:32.372535 progress 5% (0MB)
54 11:51:32.375421 progress 10% (1MB)
55 11:51:32.378179 progress 15% (1MB)
56 11:51:32.381141 progress 20% (2MB)
57 11:51:32.383864 progress 25% (2MB)
58 11:51:32.386706 progress 30% (3MB)
59 11:51:32.389386 progress 35% (3MB)
60 11:51:32.392236 progress 40% (4MB)
61 11:51:32.395166 progress 45% (4MB)
62 11:51:32.397859 progress 50% (5MB)
63 11:51:32.400713 progress 55% (5MB)
64 11:51:32.403415 progress 60% (6MB)
65 11:51:32.406225 progress 65% (6MB)
66 11:51:32.408919 progress 70% (7MB)
67 11:51:32.411716 progress 75% (7MB)
68 11:51:32.414523 progress 80% (8MB)
69 11:51:32.417188 progress 85% (8MB)
70 11:51:32.420014 progress 90% (9MB)
71 11:51:32.422645 progress 95% (9MB)
72 11:51:32.425481 progress 100% (10MB)
73 11:51:32.425636 10MB downloaded in 0.06s (180.65MB/s)
74 11:51:32.425779 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:51:32.426009 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:51:32.426098 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:51:32.426184 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:51:32.426315 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230609.0/amd64/full.rootfs.tar.xz
80 11:51:32.426387 saving as /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/nfsrootfs/full.rootfs.tar
81 11:51:32.426451 total size: 207209004 (197MB)
82 11:51:32.426512 Using unxz to decompress xz
83 11:51:32.430116 progress 0% (0MB)
84 11:51:32.971944 progress 5% (9MB)
85 11:51:33.496202 progress 10% (19MB)
86 11:51:34.091511 progress 15% (29MB)
87 11:51:34.454655 progress 20% (39MB)
88 11:51:34.811457 progress 25% (49MB)
89 11:51:35.409645 progress 30% (59MB)
90 11:51:35.957611 progress 35% (69MB)
91 11:51:36.557345 progress 40% (79MB)
92 11:51:37.113259 progress 45% (88MB)
93 11:51:37.691130 progress 50% (98MB)
94 11:51:38.309951 progress 55% (108MB)
95 11:51:38.995389 progress 60% (118MB)
96 11:51:39.140261 progress 65% (128MB)
97 11:51:39.280619 progress 70% (138MB)
98 11:51:39.372281 progress 75% (148MB)
99 11:51:39.441867 progress 80% (158MB)
100 11:51:39.515014 progress 85% (167MB)
101 11:51:39.612987 progress 90% (177MB)
102 11:51:39.883626 progress 95% (187MB)
103 11:51:40.463325 progress 100% (197MB)
104 11:51:40.468825 197MB downloaded in 8.04s (24.57MB/s)
105 11:51:40.469102 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:51:40.469367 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:51:40.469458 start: 1.4 download-retry (timeout 00:09:51) [common]
109 11:51:40.469547 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 11:51:40.469690 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:51:40.469761 saving as /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/modules/modules.tar
112 11:51:40.469823 total size: 483808 (0MB)
113 11:51:40.469885 Using unxz to decompress xz
114 11:51:40.473192 progress 6% (0MB)
115 11:51:40.473568 progress 13% (0MB)
116 11:51:40.473801 progress 20% (0MB)
117 11:51:40.475117 progress 27% (0MB)
118 11:51:40.477230 progress 33% (0MB)
119 11:51:40.479340 progress 40% (0MB)
120 11:51:40.481478 progress 47% (0MB)
121 11:51:40.483335 progress 54% (0MB)
122 11:51:40.485633 progress 60% (0MB)
123 11:51:40.488007 progress 67% (0MB)
124 11:51:40.489990 progress 74% (0MB)
125 11:51:40.491936 progress 81% (0MB)
126 11:51:40.493909 progress 88% (0MB)
127 11:51:40.495851 progress 94% (0MB)
128 11:51:40.497732 progress 100% (0MB)
129 11:51:40.503828 0MB downloaded in 0.03s (13.57MB/s)
130 11:51:40.504086 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:51:40.504349 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:51:40.504445 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 11:51:40.504539 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 11:51:43.716548 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10875879/extract-nfsrootfs-drnv7c_t
136 11:51:43.716751 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:51:43.716850 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 11:51:43.717012 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0
139 11:51:43.717144 makedir: /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin
140 11:51:43.717243 makedir: /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/tests
141 11:51:43.717337 makedir: /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/results
142 11:51:43.717434 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-add-keys
143 11:51:43.717572 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-add-sources
144 11:51:43.717705 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-background-process-start
145 11:51:43.717830 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-background-process-stop
146 11:51:43.717952 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-common-functions
147 11:51:43.718071 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-echo-ipv4
148 11:51:43.718188 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-install-packages
149 11:51:43.718303 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-installed-packages
150 11:51:43.718420 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-os-build
151 11:51:43.718537 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-probe-channel
152 11:51:43.718654 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-probe-ip
153 11:51:43.718770 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-target-ip
154 11:51:43.718888 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-target-mac
155 11:51:43.719004 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-target-storage
156 11:51:43.719121 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-test-case
157 11:51:43.719239 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-test-event
158 11:51:43.719373 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-test-feedback
159 11:51:43.719489 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-test-raise
160 11:51:43.719659 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-test-reference
161 11:51:43.719781 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-test-runner
162 11:51:43.719899 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-test-set
163 11:51:43.720015 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-test-shell
164 11:51:43.720138 Updating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-add-keys (debian)
165 11:51:43.720429 Updating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-add-sources (debian)
166 11:51:43.720706 Updating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-install-packages (debian)
167 11:51:43.721006 Updating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-installed-packages (debian)
168 11:51:43.721284 Updating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/bin/lava-os-build (debian)
169 11:51:43.721536 Creating /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/environment
170 11:51:43.721637 LAVA metadata
171 11:51:43.721706 - LAVA_JOB_ID=10875879
172 11:51:43.721767 - LAVA_DISPATCHER_IP=192.168.201.1
173 11:51:43.721864 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 11:51:43.721928 skipped lava-vland-overlay
175 11:51:43.722000 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 11:51:43.722077 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 11:51:43.722136 skipped lava-multinode-overlay
178 11:51:43.722208 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 11:51:43.722293 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 11:51:43.722366 Loading test definitions
181 11:51:43.722454 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 11:51:43.722523 Using /lava-10875879 at stage 0
183 11:51:43.722799 uuid=10875879_1.5.2.3.1 testdef=None
184 11:51:43.722886 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 11:51:43.722969 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 11:51:43.723402 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 11:51:43.723683 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 11:51:43.724215 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 11:51:43.724445 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 11:51:43.724960 runner path: /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/0/tests/0_timesync-off test_uuid 10875879_1.5.2.3.1
193 11:51:43.725108 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 11:51:43.725331 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 11:51:43.725402 Using /lava-10875879 at stage 0
197 11:51:43.725496 Fetching tests from https://github.com/kernelci/test-definitions.git
198 11:51:43.725571 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/0/tests/1_kselftest-futex'
199 11:51:48.917071 Running '/usr/bin/git checkout kernelci.org
200 11:51:49.061811 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
201 11:51:49.062528 uuid=10875879_1.5.2.3.5 testdef=None
202 11:51:49.062688 end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
204 11:51:49.062942 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
205 11:51:49.063712 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 11:51:49.063944 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
208 11:51:49.064892 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 11:51:49.065127 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
211 11:51:49.066051 runner path: /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/0/tests/1_kselftest-futex test_uuid 10875879_1.5.2.3.5
212 11:51:49.066162 BOARD='asus-C436FA-Flip-hatch'
213 11:51:49.066231 BRANCH='cip'
214 11:51:49.066291 SKIPFILE='/dev/null'
215 11:51:49.066350 SKIP_INSTALL='True'
216 11:51:49.066406 TESTPROG_URL='None'
217 11:51:49.066462 TST_CASENAME=''
218 11:51:49.066516 TST_CMDFILES='futex'
219 11:51:49.066651 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 11:51:49.066855 Creating lava-test-runner.conf files
222 11:51:49.066920 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10875879/lava-overlay-dvautez0/lava-10875879/0 for stage 0
223 11:51:49.067011 - 0_timesync-off
224 11:51:49.067082 - 1_kselftest-futex
225 11:51:49.067185 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
226 11:51:49.067306 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
227 11:51:56.886402 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 11:51:56.886569 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
229 11:51:56.886670 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 11:51:56.886804 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
231 11:51:56.886895 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
232 11:51:57.018361 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 11:51:57.018724 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
234 11:51:57.018843 extracting modules file /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875879/extract-nfsrootfs-drnv7c_t
235 11:51:57.039365 extracting modules file /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875879/extract-overlay-ramdisk-swwugn20/ramdisk
236 11:51:57.060678 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 11:51:57.060855 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
238 11:51:57.060986 [common] Applying overlay to NFS
239 11:51:57.061073 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10875879/compress-overlay-z51my1zl/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10875879/extract-nfsrootfs-drnv7c_t
240 11:51:57.965782 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 11:51:57.965953 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
242 11:51:57.966047 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 11:51:57.966148 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
244 11:51:57.966237 Building ramdisk /var/lib/lava/dispatcher/tmp/10875879/extract-overlay-ramdisk-swwugn20/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10875879/extract-overlay-ramdisk-swwugn20/ramdisk
245 11:51:58.038489 >> 30352 blocks
246 11:51:58.638435 rename /var/lib/lava/dispatcher/tmp/10875879/extract-overlay-ramdisk-swwugn20/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/ramdisk/ramdisk.cpio.gz
247 11:51:58.638918 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 11:51:58.639094 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
249 11:51:58.639241 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
250 11:51:58.639373 No mkimage arch provided, not using FIT.
251 11:51:58.639505 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 11:51:58.639635 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 11:51:58.639787 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
254 11:51:58.639928 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 11:51:58.640047 No LXC device requested
256 11:51:58.640185 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 11:51:58.640311 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 11:51:58.640431 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 11:51:58.640548 Checking files for TFTP limit of 4294967296 bytes.
260 11:51:58.641088 end: 1 tftp-deploy (duration 00:00:27) [common]
261 11:51:58.641226 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 11:51:58.641349 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 11:51:58.641523 substitutions:
264 11:51:58.641630 - {DTB}: None
265 11:51:58.641726 - {INITRD}: 10875879/tftp-deploy-d996mibc/ramdisk/ramdisk.cpio.gz
266 11:51:58.641818 - {KERNEL}: 10875879/tftp-deploy-d996mibc/kernel/bzImage
267 11:51:58.641908 - {LAVA_MAC}: None
268 11:51:58.641996 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10875879/extract-nfsrootfs-drnv7c_t
269 11:51:58.642087 - {NFS_SERVER_IP}: 192.168.201.1
270 11:51:58.642175 - {PRESEED_CONFIG}: None
271 11:51:58.642261 - {PRESEED_LOCAL}: None
272 11:51:58.642347 - {RAMDISK}: 10875879/tftp-deploy-d996mibc/ramdisk/ramdisk.cpio.gz
273 11:51:58.642433 - {ROOT_PART}: None
274 11:51:58.642519 - {ROOT}: None
275 11:51:58.642604 - {SERVER_IP}: 192.168.201.1
276 11:51:58.642690 - {TEE}: None
277 11:51:58.642795 Parsed boot commands:
278 11:51:58.642881 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 11:51:58.643178 Parsed boot commands: tftpboot 192.168.201.1 10875879/tftp-deploy-d996mibc/kernel/bzImage 10875879/tftp-deploy-d996mibc/kernel/cmdline 10875879/tftp-deploy-d996mibc/ramdisk/ramdisk.cpio.gz
280 11:51:58.643301 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 11:51:58.643419 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 11:51:58.643544 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 11:51:58.643652 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 11:51:58.643726 Not connected, no need to disconnect.
285 11:51:58.643803 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 11:51:58.643897 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 11:51:58.643999 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
288 11:51:58.647651 Setting prompt string to ['lava-test: # ']
289 11:51:58.648108 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 11:51:58.648272 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 11:51:58.648420 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 11:51:58.648551 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 11:51:58.648919 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
294 11:52:03.786902 >> Command sent successfully.
295 11:52:03.789651 Returned 0 in 5 seconds
296 11:52:03.890054 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 11:52:03.890432 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 11:52:03.890558 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 11:52:03.890693 Setting prompt string to 'Starting depthcharge on Helios...'
301 11:52:03.890762 Changing prompt to 'Starting depthcharge on Helios...'
302 11:52:03.890833 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 11:52:03.891136 [Enter `^Ec?' for help]
304 11:52:04.511112
305 11:52:04.511870
306 11:52:04.521050 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 11:52:04.524100 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 11:52:04.531037 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 11:52:04.534381 CPU: AES supported, TXT NOT supported, VT supported
310 11:52:04.540843 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 11:52:04.544113 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 11:52:04.551169 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 11:52:04.554233 VBOOT: Loading verstage.
314 11:52:04.557570 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 11:52:04.563932 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 11:52:04.567170 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 11:52:04.570804 CBFS @ c08000 size 3f8000
318 11:52:04.577501 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 11:52:04.580666 CBFS: Locating 'fallback/verstage'
320 11:52:04.583956 CBFS: Found @ offset 10fb80 size 1072c
321 11:52:04.587061
322 11:52:04.587680
323 11:52:04.597455 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 11:52:04.611432 Probing TPM: . done!
325 11:52:04.615000 TPM ready after 0 ms
326 11:52:04.618095 Connected to device vid:did:rid of 1ae0:0028:00
327 11:52:04.628085 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 11:52:04.631920 Initialized TPM device CR50 revision 0
329 11:52:04.678380 tlcl_send_startup: Startup return code is 0
330 11:52:04.679048 TPM: setup succeeded
331 11:52:04.691300 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 11:52:04.694956 Chrome EC: UHEPI supported
333 11:52:04.698950 Phase 1
334 11:52:04.702075 FMAP: area GBB found @ c05000 (12288 bytes)
335 11:52:04.708245 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 11:52:04.711277 Phase 2
337 11:52:04.711387 Phase 3
338 11:52:04.714722 FMAP: area GBB found @ c05000 (12288 bytes)
339 11:52:04.721625 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 11:52:04.728295 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
341 11:52:04.731296 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
342 11:52:04.737976 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 11:52:04.753750 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
344 11:52:04.756852 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
345 11:52:04.763704 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 11:52:04.767452 Phase 4
347 11:52:04.771278 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
348 11:52:04.777705 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 11:52:04.957930 VB2:vb2_rsa_verify_digest() Digest check failed!
350 11:52:04.960960 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 11:52:04.964183 Saving nvdata
352 11:52:04.967893 Reboot requested (10020007)
353 11:52:04.970791 board_reset() called!
354 11:52:04.971232 full_reset() called!
355 11:52:09.476984
356 11:52:09.477230
357 11:52:09.487032 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 11:52:09.490201 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 11:52:09.496625 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 11:52:09.500179 CPU: AES supported, TXT NOT supported, VT supported
361 11:52:09.507030 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 11:52:09.510195 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 11:52:09.516742 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 11:52:09.520311 VBOOT: Loading verstage.
365 11:52:09.523534 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 11:52:09.530058 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 11:52:09.533286 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 11:52:09.536935 CBFS @ c08000 size 3f8000
369 11:52:09.543519 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 11:52:09.546769 CBFS: Locating 'fallback/verstage'
371 11:52:09.549920 CBFS: Found @ offset 10fb80 size 1072c
372 11:52:09.553742
373 11:52:09.553896
374 11:52:09.563760 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 11:52:09.577923 Probing TPM: . done!
376 11:52:09.581283 TPM ready after 0 ms
377 11:52:09.584522 Connected to device vid:did:rid of 1ae0:0028:00
378 11:52:09.594973 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
379 11:52:09.598157 Initialized TPM device CR50 revision 0
380 11:52:09.645736 tlcl_send_startup: Startup return code is 0
381 11:52:09.645906 TPM: setup succeeded
382 11:52:09.658542 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 11:52:09.662241 Chrome EC: UHEPI supported
384 11:52:09.665539 Phase 1
385 11:52:09.668623 FMAP: area GBB found @ c05000 (12288 bytes)
386 11:52:09.675553 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 11:52:09.682019 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 11:52:09.685348 Recovery requested (1009000e)
389 11:52:09.691278 Saving nvdata
390 11:52:09.697503 tlcl_extend: response is 0
391 11:52:09.705930 tlcl_extend: response is 0
392 11:52:09.712936 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 11:52:09.716400 CBFS @ c08000 size 3f8000
394 11:52:09.722956 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 11:52:09.726061 CBFS: Locating 'fallback/romstage'
396 11:52:09.729588 CBFS: Found @ offset 80 size 145fc
397 11:52:09.733091 Accumulated console time in verstage 99 ms
398 11:52:09.733183
399 11:52:09.733250
400 11:52:09.746410 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 11:52:09.752826 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 11:52:09.756066 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 11:52:09.759719 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 11:52:09.766176 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 11:52:09.769271 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 11:52:09.772557 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 11:52:09.775902 TCO_STS: 0000 0000
408 11:52:09.779104 GEN_PMCON: e0015238 00000200
409 11:52:09.782785 GBLRST_CAUSE: 00000000 00000000
410 11:52:09.782873 prev_sleep_state 5
411 11:52:09.786250 Boot Count incremented to 65204
412 11:52:09.792967 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 11:52:09.796317 CBFS @ c08000 size 3f8000
414 11:52:09.802995 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 11:52:09.803120 CBFS: Locating 'fspm.bin'
416 11:52:09.809479 CBFS: Found @ offset 5ffc0 size 71000
417 11:52:09.812687 Chrome EC: UHEPI supported
418 11:52:09.819047 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 11:52:09.822575 Probing TPM: done!
420 11:52:09.829588 Connected to device vid:did:rid of 1ae0:0028:00
421 11:52:09.839396 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
422 11:52:09.845240 Initialized TPM device CR50 revision 0
423 11:52:09.854377 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 11:52:09.860911 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 11:52:09.864254 MRC cache found, size 1948
426 11:52:09.867469 bootmode is set to: 2
427 11:52:09.871082 PRMRR disabled by config.
428 11:52:09.871168 SPD INDEX = 1
429 11:52:09.877428 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 11:52:09.881227 CBFS @ c08000 size 3f8000
431 11:52:09.884658 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 11:52:09.887605 CBFS: Locating 'spd.bin'
433 11:52:09.891028 CBFS: Found @ offset 5fb80 size 400
434 11:52:09.894225 SPD: module type is LPDDR3
435 11:52:09.898012 SPD: module part is
436 11:52:09.904106 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 11:52:09.907799 SPD: device width 4 bits, bus width 8 bits
438 11:52:09.910937 SPD: module size is 4096 MB (per channel)
439 11:52:09.914283 memory slot: 0 configuration done.
440 11:52:09.917356 memory slot: 2 configuration done.
441 11:52:09.968453 CBMEM:
442 11:52:09.971715 IMD: root @ 99fff000 254 entries.
443 11:52:09.975340 IMD: root @ 99ffec00 62 entries.
444 11:52:09.978640 External stage cache:
445 11:52:09.981780 IMD: root @ 9abff000 254 entries.
446 11:52:09.985133 IMD: root @ 9abfec00 62 entries.
447 11:52:09.988577 Chrome EC: clear events_b mask to 0x0000000020004000
448 11:52:10.004667 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 11:52:10.017768 tlcl_write: response is 0
450 11:52:10.026890 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 11:52:10.033675 MRC: TPM MRC hash updated successfully.
452 11:52:10.033782 2 DIMMs found
453 11:52:10.036844 SMM Memory Map
454 11:52:10.040122 SMRAM : 0x9a000000 0x1000000
455 11:52:10.043138 Subregion 0: 0x9a000000 0xa00000
456 11:52:10.046583 Subregion 1: 0x9aa00000 0x200000
457 11:52:10.049790 Subregion 2: 0x9ac00000 0x400000
458 11:52:10.053307 top_of_ram = 0x9a000000
459 11:52:10.056666 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 11:52:10.063159 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 11:52:10.066541 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 11:52:10.073048 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 11:52:10.076136 CBFS @ c08000 size 3f8000
464 11:52:10.079766 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 11:52:10.083066 CBFS: Locating 'fallback/postcar'
466 11:52:10.089823 CBFS: Found @ offset 107000 size 4b44
467 11:52:10.093176 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 11:52:10.105863 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 11:52:10.109091 Processing 180 relocs. Offset value of 0x97c0c000
470 11:52:10.117605 Accumulated console time in romstage 286 ms
471 11:52:10.117690
472 11:52:10.117757
473 11:52:10.127739 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 11:52:10.133972 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 11:52:10.137531 CBFS @ c08000 size 3f8000
476 11:52:10.140857 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 11:52:10.147350 CBFS: Locating 'fallback/ramstage'
478 11:52:10.150625 CBFS: Found @ offset 43380 size 1b9e8
479 11:52:10.157314 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 11:52:10.189371 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 11:52:10.192666 Processing 3976 relocs. Offset value of 0x98db0000
482 11:52:10.199084 Accumulated console time in postcar 52 ms
483 11:52:10.199201
484 11:52:10.199308
485 11:52:10.209260 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 11:52:10.215961 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 11:52:10.219071 WARNING: RO_VPD is uninitialized or empty.
488 11:52:10.222253 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 11:52:10.229355 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 11:52:10.229438 Normal boot.
491 11:52:10.235554 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 11:52:10.239300 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 11:52:10.242724 CBFS @ c08000 size 3f8000
494 11:52:10.248982 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 11:52:10.252316 CBFS: Locating 'cpu_microcode_blob.bin'
496 11:52:10.255412 CBFS: Found @ offset 14700 size 2ec00
497 11:52:10.258877 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 11:52:10.262074 Skip microcode update
499 11:52:10.265554 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 11:52:10.269287 CBFS @ c08000 size 3f8000
501 11:52:10.275465 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 11:52:10.278945 CBFS: Locating 'fsps.bin'
503 11:52:10.282136 CBFS: Found @ offset d1fc0 size 35000
504 11:52:10.307366 Detected 4 core, 8 thread CPU.
505 11:52:10.310529 Setting up SMI for CPU
506 11:52:10.313762 IED base = 0x9ac00000
507 11:52:10.313843 IED size = 0x00400000
508 11:52:10.317106 Will perform SMM setup.
509 11:52:10.323950 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 11:52:10.330533 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 11:52:10.336867 Processing 16 relocs. Offset value of 0x00030000
512 11:52:10.336952 Attempting to start 7 APs
513 11:52:10.343218 Waiting for 10ms after sending INIT.
514 11:52:10.357272 Waiting for 1st SIPI to complete...done.
515 11:52:10.357365 AP: slot 2 apic_id 1.
516 11:52:10.363747 Waiting for 2nd SIPI to complete...done.
517 11:52:10.363840 AP: slot 4 apic_id 2.
518 11:52:10.367008 AP: slot 1 apic_id 3.
519 11:52:10.370204 AP: slot 3 apic_id 7.
520 11:52:10.370281 AP: slot 5 apic_id 6.
521 11:52:10.373572 AP: slot 6 apic_id 5.
522 11:52:10.377127 AP: slot 7 apic_id 4.
523 11:52:10.383540 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 11:52:10.387313 Processing 13 relocs. Offset value of 0x00038000
525 11:52:10.393418 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 11:52:10.400152 Installing SMM handler to 0x9a000000
527 11:52:10.406758 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 11:52:10.410392 Processing 658 relocs. Offset value of 0x9a010000
529 11:52:10.420143 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 11:52:10.423396 Processing 13 relocs. Offset value of 0x9a008000
531 11:52:10.430279 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 11:52:10.436745 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 11:52:10.443340 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 11:52:10.446320 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 11:52:10.453275 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 11:52:10.459438 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 11:52:10.462605 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 11:52:10.469356 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 11:52:10.473069 Clearing SMI status registers
540 11:52:10.476216 SMI_STS: PM1
541 11:52:10.476322 PM1_STS: PWRBTN
542 11:52:10.479806 TCO_STS: SECOND_TO
543 11:52:10.482832 New SMBASE 0x9a000000
544 11:52:10.486430 In relocation handler: CPU 0
545 11:52:10.489420 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 11:52:10.493189 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 11:52:10.496109 Relocation complete.
548 11:52:10.499588 New SMBASE 0x99fff800
549 11:52:10.499762 In relocation handler: CPU 2
550 11:52:10.506598 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
551 11:52:10.509582 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 11:52:10.513348 Relocation complete.
553 11:52:10.516525 New SMBASE 0x99fff000
554 11:52:10.516614 In relocation handler: CPU 4
555 11:52:10.523200 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
556 11:52:10.526383 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 11:52:10.529523 Relocation complete.
558 11:52:10.529607 New SMBASE 0x99fffc00
559 11:52:10.533223 In relocation handler: CPU 1
560 11:52:10.539630 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
561 11:52:10.542608 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 11:52:10.546413 Relocation complete.
563 11:52:10.546493 New SMBASE 0x99ffe800
564 11:52:10.549609 In relocation handler: CPU 6
565 11:52:10.555916 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
566 11:52:10.559648 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 11:52:10.562918 Relocation complete.
568 11:52:10.563001 New SMBASE 0x99ffe400
569 11:52:10.566119 In relocation handler: CPU 7
570 11:52:10.569115 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
571 11:52:10.575936 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 11:52:10.579198 Relocation complete.
573 11:52:10.579276 New SMBASE 0x99fff400
574 11:52:10.582346 In relocation handler: CPU 3
575 11:52:10.586049 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
576 11:52:10.592696 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 11:52:10.595782 Relocation complete.
578 11:52:10.595869 New SMBASE 0x99ffec00
579 11:52:10.599289 In relocation handler: CPU 5
580 11:52:10.602278 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
581 11:52:10.609132 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 11:52:10.609221 Relocation complete.
583 11:52:10.612386 Initializing CPU #0
584 11:52:10.615511 CPU: vendor Intel device 806ec
585 11:52:10.619314 CPU: family 06, model 8e, stepping 0c
586 11:52:10.622583 Clearing out pending MCEs
587 11:52:10.625671 Setting up local APIC...
588 11:52:10.625759 apic_id: 0x00 done.
589 11:52:10.629117 Turbo is available but hidden
590 11:52:10.632668 Turbo is available and visible
591 11:52:10.635798 VMX status: enabled
592 11:52:10.639154 IA32_FEATURE_CONTROL status: locked
593 11:52:10.642339 Skip microcode update
594 11:52:10.642424 CPU #0 initialized
595 11:52:10.645922 Initializing CPU #2
596 11:52:10.649148 Initializing CPU #4
597 11:52:10.649234 Initializing CPU #1
598 11:52:10.652380 CPU: vendor Intel device 806ec
599 11:52:10.655415 CPU: family 06, model 8e, stepping 0c
600 11:52:10.658939 CPU: vendor Intel device 806ec
601 11:52:10.662168 CPU: family 06, model 8e, stepping 0c
602 11:52:10.665447 Clearing out pending MCEs
603 11:52:10.668733 Clearing out pending MCEs
604 11:52:10.671885 Setting up local APIC...
605 11:52:10.675532 CPU: vendor Intel device 806ec
606 11:52:10.678640 CPU: family 06, model 8e, stepping 0c
607 11:52:10.682426 Clearing out pending MCEs
608 11:52:10.682520 Setting up local APIC...
609 11:52:10.685560 Initializing CPU #6
610 11:52:10.685645 Initializing CPU #7
611 11:52:10.688839 CPU: vendor Intel device 806ec
612 11:52:10.695732 CPU: family 06, model 8e, stepping 0c
613 11:52:10.695818 CPU: vendor Intel device 806ec
614 11:52:10.701987 CPU: family 06, model 8e, stepping 0c
615 11:52:10.702120 Clearing out pending MCEs
616 11:52:10.705591 Clearing out pending MCEs
617 11:52:10.708745 Setting up local APIC...
618 11:52:10.712047 apic_id: 0x02 done.
619 11:52:10.712132 apic_id: 0x03 done.
620 11:52:10.715512 VMX status: enabled
621 11:52:10.718942 VMX status: enabled
622 11:52:10.722370 IA32_FEATURE_CONTROL status: locked
623 11:52:10.725486 IA32_FEATURE_CONTROL status: locked
624 11:52:10.725571 Skip microcode update
625 11:52:10.728645 Skip microcode update
626 11:52:10.731910 CPU #4 initialized
627 11:52:10.731995 CPU #1 initialized
628 11:52:10.735125 Initializing CPU #5
629 11:52:10.735210 Initializing CPU #3
630 11:52:10.738856 CPU: vendor Intel device 806ec
631 11:52:10.745325 CPU: family 06, model 8e, stepping 0c
632 11:52:10.745410 CPU: vendor Intel device 806ec
633 11:52:10.752194 CPU: family 06, model 8e, stepping 0c
634 11:52:10.752279 Clearing out pending MCEs
635 11:52:10.755471 Clearing out pending MCEs
636 11:52:10.758571 Setting up local APIC...
637 11:52:10.761992 Setting up local APIC...
638 11:52:10.762079 Setting up local APIC...
639 11:52:10.765041 apic_id: 0x05 done.
640 11:52:10.768278 Setting up local APIC...
641 11:52:10.772049 apic_id: 0x06 done.
642 11:52:10.772134 apic_id: 0x07 done.
643 11:52:10.775302 VMX status: enabled
644 11:52:10.775415 VMX status: enabled
645 11:52:10.778565 IA32_FEATURE_CONTROL status: locked
646 11:52:10.785069 IA32_FEATURE_CONTROL status: locked
647 11:52:10.785187 Skip microcode update
648 11:52:10.788363 Skip microcode update
649 11:52:10.791735 apic_id: 0x01 done.
650 11:52:10.791838 CPU #5 initialized
651 11:52:10.794950 CPU #3 initialized
652 11:52:10.795035 VMX status: enabled
653 11:52:10.798172 apic_id: 0x04 done.
654 11:52:10.801727 VMX status: enabled
655 11:52:10.801807 VMX status: enabled
656 11:52:10.804613 IA32_FEATURE_CONTROL status: locked
657 11:52:10.808242 IA32_FEATURE_CONTROL status: locked
658 11:52:10.811287 Skip microcode update
659 11:52:10.814944 Skip microcode update
660 11:52:10.815056 CPU #6 initialized
661 11:52:10.818517 CPU #7 initialized
662 11:52:10.821357 IA32_FEATURE_CONTROL status: locked
663 11:52:10.825328 Skip microcode update
664 11:52:10.825439 CPU #2 initialized
665 11:52:10.831545 bsp_do_flight_plan done after 466 msecs.
666 11:52:10.834728 CPU: frequency set to 4200 MHz
667 11:52:10.834820 Enabling SMIs.
668 11:52:10.834917 Locking SMM.
669 11:52:10.851184 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 11:52:10.854438 CBFS @ c08000 size 3f8000
671 11:52:10.860932 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 11:52:10.861048 CBFS: Locating 'vbt.bin'
673 11:52:10.864520 CBFS: Found @ offset 5f5c0 size 499
674 11:52:10.871302 Found a VBT of 4608 bytes after decompression
675 11:52:11.055816 Display FSP Version Info HOB
676 11:52:11.059527 Reference Code - CPU = 9.0.1e.30
677 11:52:11.062212 uCode Version = 0.0.0.ca
678 11:52:11.065996 TXT ACM version = ff.ff.ff.ffff
679 11:52:11.069132 Display FSP Version Info HOB
680 11:52:11.072350 Reference Code - ME = 9.0.1e.30
681 11:52:11.075811 MEBx version = 0.0.0.0
682 11:52:11.078905 ME Firmware Version = Consumer SKU
683 11:52:11.082109 Display FSP Version Info HOB
684 11:52:11.086094 Reference Code - CML PCH = 9.0.1e.30
685 11:52:11.089166 PCH-CRID Status = Disabled
686 11:52:11.092290 PCH-CRID Original Value = ff.ff.ff.ffff
687 11:52:11.095388 PCH-CRID New Value = ff.ff.ff.ffff
688 11:52:11.098552 OPROM - RST - RAID = ff.ff.ff.ffff
689 11:52:11.101789 ChipsetInit Base Version = ff.ff.ff.ffff
690 11:52:11.105534 ChipsetInit Oem Version = ff.ff.ff.ffff
691 11:52:11.108627 Display FSP Version Info HOB
692 11:52:11.115118 Reference Code - SA - System Agent = 9.0.1e.30
693 11:52:11.118713 Reference Code - MRC = 0.7.1.6c
694 11:52:11.121979 SA - PCIe Version = 9.0.1e.30
695 11:52:11.122085 SA-CRID Status = Disabled
696 11:52:11.125106 SA-CRID Original Value = 0.0.0.c
697 11:52:11.128361 SA-CRID New Value = 0.0.0.c
698 11:52:11.131861 OPROM - VBIOS = ff.ff.ff.ffff
699 11:52:11.135456 RTC Init
700 11:52:11.138550 Set power on after power failure.
701 11:52:11.138636 Disabling Deep S3
702 11:52:11.141544 Disabling Deep S3
703 11:52:11.141630 Disabling Deep S4
704 11:52:11.145157 Disabling Deep S4
705 11:52:11.148353 Disabling Deep S5
706 11:52:11.148439 Disabling Deep S5
707 11:52:11.155201 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
708 11:52:11.158236 Enumerating buses...
709 11:52:11.161479 Show all devs... Before device enumeration.
710 11:52:11.164716 Root Device: enabled 1
711 11:52:11.164801 CPU_CLUSTER: 0: enabled 1
712 11:52:11.168359 DOMAIN: 0000: enabled 1
713 11:52:11.171786 APIC: 00: enabled 1
714 11:52:11.171892 PCI: 00:00.0: enabled 1
715 11:52:11.174913 PCI: 00:02.0: enabled 1
716 11:52:11.178025 PCI: 00:04.0: enabled 0
717 11:52:11.181405 PCI: 00:05.0: enabled 0
718 11:52:11.181490 PCI: 00:12.0: enabled 1
719 11:52:11.184800 PCI: 00:12.5: enabled 0
720 11:52:11.188116 PCI: 00:12.6: enabled 0
721 11:52:11.191095 PCI: 00:14.0: enabled 1
722 11:52:11.191206 PCI: 00:14.1: enabled 0
723 11:52:11.194241 PCI: 00:14.3: enabled 1
724 11:52:11.198075 PCI: 00:14.5: enabled 0
725 11:52:11.201113 PCI: 00:15.0: enabled 1
726 11:52:11.201199 PCI: 00:15.1: enabled 1
727 11:52:11.204809 PCI: 00:15.2: enabled 0
728 11:52:11.207796 PCI: 00:15.3: enabled 0
729 11:52:11.211074 PCI: 00:16.0: enabled 1
730 11:52:11.211151 PCI: 00:16.1: enabled 0
731 11:52:11.214864 PCI: 00:16.2: enabled 0
732 11:52:11.218071 PCI: 00:16.3: enabled 0
733 11:52:11.218145 PCI: 00:16.4: enabled 0
734 11:52:11.221080 PCI: 00:16.5: enabled 0
735 11:52:11.224290 PCI: 00:17.0: enabled 1
736 11:52:11.228055 PCI: 00:19.0: enabled 1
737 11:52:11.228129 PCI: 00:19.1: enabled 0
738 11:52:11.231166 PCI: 00:19.2: enabled 0
739 11:52:11.234297 PCI: 00:1a.0: enabled 0
740 11:52:11.237622 PCI: 00:1c.0: enabled 0
741 11:52:11.237725 PCI: 00:1c.1: enabled 0
742 11:52:11.240715 PCI: 00:1c.2: enabled 0
743 11:52:11.244249 PCI: 00:1c.3: enabled 0
744 11:52:11.247559 PCI: 00:1c.4: enabled 0
745 11:52:11.247676 PCI: 00:1c.5: enabled 0
746 11:52:11.250681 PCI: 00:1c.6: enabled 0
747 11:52:11.254340 PCI: 00:1c.7: enabled 0
748 11:52:11.254449 PCI: 00:1d.0: enabled 1
749 11:52:11.257507 PCI: 00:1d.1: enabled 0
750 11:52:11.261051 PCI: 00:1d.2: enabled 0
751 11:52:11.264220 PCI: 00:1d.3: enabled 0
752 11:52:11.264303 PCI: 00:1d.4: enabled 0
753 11:52:11.267455 PCI: 00:1d.5: enabled 1
754 11:52:11.270666 PCI: 00:1e.0: enabled 1
755 11:52:11.273945 PCI: 00:1e.1: enabled 0
756 11:52:11.274055 PCI: 00:1e.2: enabled 1
757 11:52:11.277762 PCI: 00:1e.3: enabled 1
758 11:52:11.280909 PCI: 00:1f.0: enabled 1
759 11:52:11.283941 PCI: 00:1f.1: enabled 1
760 11:52:11.284025 PCI: 00:1f.2: enabled 1
761 11:52:11.287473 PCI: 00:1f.3: enabled 1
762 11:52:11.290766 PCI: 00:1f.4: enabled 1
763 11:52:11.290850 PCI: 00:1f.5: enabled 1
764 11:52:11.294008 PCI: 00:1f.6: enabled 0
765 11:52:11.297126 USB0 port 0: enabled 1
766 11:52:11.300376 I2C: 00:15: enabled 1
767 11:52:11.300481 I2C: 00:5d: enabled 1
768 11:52:11.303969 GENERIC: 0.0: enabled 1
769 11:52:11.307135 I2C: 00:1a: enabled 1
770 11:52:11.307255 I2C: 00:38: enabled 1
771 11:52:11.310739 I2C: 00:39: enabled 1
772 11:52:11.313897 I2C: 00:3a: enabled 1
773 11:52:11.314017 I2C: 00:3b: enabled 1
774 11:52:11.317653 PCI: 00:00.0: enabled 1
775 11:52:11.320731 SPI: 00: enabled 1
776 11:52:11.320840 SPI: 01: enabled 1
777 11:52:11.323930 PNP: 0c09.0: enabled 1
778 11:52:11.327302 USB2 port 0: enabled 1
779 11:52:11.327416 USB2 port 1: enabled 1
780 11:52:11.330528 USB2 port 2: enabled 0
781 11:52:11.333783 USB2 port 3: enabled 0
782 11:52:11.337013 USB2 port 5: enabled 0
783 11:52:11.337097 USB2 port 6: enabled 1
784 11:52:11.340648 USB2 port 9: enabled 1
785 11:52:11.343894 USB3 port 0: enabled 1
786 11:52:11.343977 USB3 port 1: enabled 1
787 11:52:11.346961 USB3 port 2: enabled 1
788 11:52:11.350574 USB3 port 3: enabled 1
789 11:52:11.350658 USB3 port 4: enabled 0
790 11:52:11.353638 APIC: 03: enabled 1
791 11:52:11.356850 APIC: 01: enabled 1
792 11:52:11.356951 APIC: 07: enabled 1
793 11:52:11.360073 APIC: 02: enabled 1
794 11:52:11.363524 APIC: 06: enabled 1
795 11:52:11.363651 APIC: 05: enabled 1
796 11:52:11.366758 APIC: 04: enabled 1
797 11:52:11.366841 Compare with tree...
798 11:52:11.369970 Root Device: enabled 1
799 11:52:11.373288 CPU_CLUSTER: 0: enabled 1
800 11:52:11.377078 APIC: 00: enabled 1
801 11:52:11.377162 APIC: 03: enabled 1
802 11:52:11.380122 APIC: 01: enabled 1
803 11:52:11.383354 APIC: 07: enabled 1
804 11:52:11.383438 APIC: 02: enabled 1
805 11:52:11.386490 APIC: 06: enabled 1
806 11:52:11.390105 APIC: 05: enabled 1
807 11:52:11.390189 APIC: 04: enabled 1
808 11:52:11.393199 DOMAIN: 0000: enabled 1
809 11:52:11.396466 PCI: 00:00.0: enabled 1
810 11:52:11.399761 PCI: 00:02.0: enabled 1
811 11:52:11.403716 PCI: 00:04.0: enabled 0
812 11:52:11.403800 PCI: 00:05.0: enabled 0
813 11:52:11.406691 PCI: 00:12.0: enabled 1
814 11:52:11.409709 PCI: 00:12.5: enabled 0
815 11:52:11.413034 PCI: 00:12.6: enabled 0
816 11:52:11.416720 PCI: 00:14.0: enabled 1
817 11:52:11.416808 USB0 port 0: enabled 1
818 11:52:11.419887 USB2 port 0: enabled 1
819 11:52:11.423265 USB2 port 1: enabled 1
820 11:52:11.426381 USB2 port 2: enabled 0
821 11:52:11.429528 USB2 port 3: enabled 0
822 11:52:11.429612 USB2 port 5: enabled 0
823 11:52:11.433093 USB2 port 6: enabled 1
824 11:52:11.436336 USB2 port 9: enabled 1
825 11:52:11.439370 USB3 port 0: enabled 1
826 11:52:11.442701 USB3 port 1: enabled 1
827 11:52:11.446506 USB3 port 2: enabled 1
828 11:52:11.446589 USB3 port 3: enabled 1
829 11:52:11.449730 USB3 port 4: enabled 0
830 11:52:11.452768 PCI: 00:14.1: enabled 0
831 11:52:11.456345 PCI: 00:14.3: enabled 1
832 11:52:11.459272 PCI: 00:14.5: enabled 0
833 11:52:11.459360 PCI: 00:15.0: enabled 1
834 11:52:11.462725 I2C: 00:15: enabled 1
835 11:52:11.465954 PCI: 00:15.1: enabled 1
836 11:52:11.469386 I2C: 00:5d: enabled 1
837 11:52:11.469469 GENERIC: 0.0: enabled 1
838 11:52:11.472543 PCI: 00:15.2: enabled 0
839 11:52:11.476291 PCI: 00:15.3: enabled 0
840 11:52:11.479477 PCI: 00:16.0: enabled 1
841 11:52:11.482683 PCI: 00:16.1: enabled 0
842 11:52:11.482767 PCI: 00:16.2: enabled 0
843 11:52:11.485880 PCI: 00:16.3: enabled 0
844 11:52:11.489501 PCI: 00:16.4: enabled 0
845 11:52:11.492575 PCI: 00:16.5: enabled 0
846 11:52:11.495673 PCI: 00:17.0: enabled 1
847 11:52:11.495751 PCI: 00:19.0: enabled 1
848 11:52:11.499223 I2C: 00:1a: enabled 1
849 11:52:11.502501 I2C: 00:38: enabled 1
850 11:52:11.505831 I2C: 00:39: enabled 1
851 11:52:11.505915 I2C: 00:3a: enabled 1
852 11:52:11.509141 I2C: 00:3b: enabled 1
853 11:52:11.512886 PCI: 00:19.1: enabled 0
854 11:52:11.515834 PCI: 00:19.2: enabled 0
855 11:52:11.519041 PCI: 00:1a.0: enabled 0
856 11:52:11.519129 PCI: 00:1c.0: enabled 0
857 11:52:11.522247 PCI: 00:1c.1: enabled 0
858 11:52:11.525719 PCI: 00:1c.2: enabled 0
859 11:52:11.529292 PCI: 00:1c.3: enabled 0
860 11:52:11.532539 PCI: 00:1c.4: enabled 0
861 11:52:11.532615 PCI: 00:1c.5: enabled 0
862 11:52:11.535537 PCI: 00:1c.6: enabled 0
863 11:52:11.539129 PCI: 00:1c.7: enabled 0
864 11:52:11.542320 PCI: 00:1d.0: enabled 1
865 11:52:11.545576 PCI: 00:1d.1: enabled 0
866 11:52:11.545660 PCI: 00:1d.2: enabled 0
867 11:52:11.549311 PCI: 00:1d.3: enabled 0
868 11:52:11.552555 PCI: 00:1d.4: enabled 0
869 11:52:11.555561 PCI: 00:1d.5: enabled 1
870 11:52:11.558750 PCI: 00:00.0: enabled 1
871 11:52:11.558875 PCI: 00:1e.0: enabled 1
872 11:52:11.562354 PCI: 00:1e.1: enabled 0
873 11:52:11.565327 PCI: 00:1e.2: enabled 1
874 11:52:11.568793 SPI: 00: enabled 1
875 11:52:11.568888 PCI: 00:1e.3: enabled 1
876 11:52:11.572167 SPI: 01: enabled 1
877 11:52:11.575158 PCI: 00:1f.0: enabled 1
878 11:52:11.579118 PNP: 0c09.0: enabled 1
879 11:52:11.579221 PCI: 00:1f.1: enabled 1
880 11:52:11.582201 PCI: 00:1f.2: enabled 1
881 11:52:11.585447 PCI: 00:1f.3: enabled 1
882 11:52:11.588651 PCI: 00:1f.4: enabled 1
883 11:52:11.591981 PCI: 00:1f.5: enabled 1
884 11:52:11.592069 PCI: 00:1f.6: enabled 0
885 11:52:11.595121 Root Device scanning...
886 11:52:11.598710 scan_static_bus for Root Device
887 11:52:11.601639 CPU_CLUSTER: 0 enabled
888 11:52:11.605524 DOMAIN: 0000 enabled
889 11:52:11.605623 DOMAIN: 0000 scanning...
890 11:52:11.608711 PCI: pci_scan_bus for bus 00
891 11:52:11.611858 PCI: 00:00.0 [8086/0000] ops
892 11:52:11.615013 PCI: 00:00.0 [8086/9b61] enabled
893 11:52:11.618808 PCI: 00:02.0 [8086/0000] bus ops
894 11:52:11.621936 PCI: 00:02.0 [8086/9b41] enabled
895 11:52:11.625045 PCI: 00:04.0 [8086/1903] disabled
896 11:52:11.628299 PCI: 00:08.0 [8086/1911] enabled
897 11:52:11.631882 PCI: 00:12.0 [8086/02f9] enabled
898 11:52:11.635050 PCI: 00:14.0 [8086/0000] bus ops
899 11:52:11.638299 PCI: 00:14.0 [8086/02ed] enabled
900 11:52:11.641810 PCI: 00:14.2 [8086/02ef] enabled
901 11:52:11.645360 PCI: 00:14.3 [8086/02f0] enabled
902 11:52:11.648748 PCI: 00:15.0 [8086/0000] bus ops
903 11:52:11.651815 PCI: 00:15.0 [8086/02e8] enabled
904 11:52:11.654898 PCI: 00:15.1 [8086/0000] bus ops
905 11:52:11.658273 PCI: 00:15.1 [8086/02e9] enabled
906 11:52:11.661392 PCI: 00:16.0 [8086/0000] ops
907 11:52:11.665137 PCI: 00:16.0 [8086/02e0] enabled
908 11:52:11.668132 PCI: 00:17.0 [8086/0000] ops
909 11:52:11.671769 PCI: 00:17.0 [8086/02d3] enabled
910 11:52:11.675233 PCI: 00:19.0 [8086/0000] bus ops
911 11:52:11.678191 PCI: 00:19.0 [8086/02c5] enabled
912 11:52:11.681727 PCI: 00:1d.0 [8086/0000] bus ops
913 11:52:11.685128 PCI: 00:1d.0 [8086/02b0] enabled
914 11:52:11.691402 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 11:52:11.694808 PCI: 00:1e.0 [8086/0000] ops
916 11:52:11.698387 PCI: 00:1e.0 [8086/02a8] enabled
917 11:52:11.701538 PCI: 00:1e.2 [8086/0000] bus ops
918 11:52:11.705045 PCI: 00:1e.2 [8086/02aa] enabled
919 11:52:11.708198 PCI: 00:1e.3 [8086/0000] bus ops
920 11:52:11.711640 PCI: 00:1e.3 [8086/02ab] enabled
921 11:52:11.714609 PCI: 00:1f.0 [8086/0000] bus ops
922 11:52:11.718473 PCI: 00:1f.0 [8086/0284] enabled
923 11:52:11.721296 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 11:52:11.728245 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 11:52:11.731393 PCI: 00:1f.3 [8086/0000] bus ops
926 11:52:11.734667 PCI: 00:1f.3 [8086/02c8] enabled
927 11:52:11.738350 PCI: 00:1f.4 [8086/0000] bus ops
928 11:52:11.741689 PCI: 00:1f.4 [8086/02a3] enabled
929 11:52:11.744577 PCI: 00:1f.5 [8086/0000] bus ops
930 11:52:11.748184 PCI: 00:1f.5 [8086/02a4] enabled
931 11:52:11.751229 PCI: Leftover static devices:
932 11:52:11.751343 PCI: 00:05.0
933 11:52:11.754471 PCI: 00:12.5
934 11:52:11.754557 PCI: 00:12.6
935 11:52:11.757844 PCI: 00:14.1
936 11:52:11.757931 PCI: 00:14.5
937 11:52:11.757999 PCI: 00:15.2
938 11:52:11.761746 PCI: 00:15.3
939 11:52:11.761821 PCI: 00:16.1
940 11:52:11.764980 PCI: 00:16.2
941 11:52:11.765066 PCI: 00:16.3
942 11:52:11.765135 PCI: 00:16.4
943 11:52:11.768179 PCI: 00:16.5
944 11:52:11.768265 PCI: 00:19.1
945 11:52:11.771411 PCI: 00:19.2
946 11:52:11.771496 PCI: 00:1a.0
947 11:52:11.774764 PCI: 00:1c.0
948 11:52:11.774850 PCI: 00:1c.1
949 11:52:11.774919 PCI: 00:1c.2
950 11:52:11.777880 PCI: 00:1c.3
951 11:52:11.777966 PCI: 00:1c.4
952 11:52:11.781115 PCI: 00:1c.5
953 11:52:11.781202 PCI: 00:1c.6
954 11:52:11.781270 PCI: 00:1c.7
955 11:52:11.784856 PCI: 00:1d.1
956 11:52:11.784943 PCI: 00:1d.2
957 11:52:11.788264 PCI: 00:1d.3
958 11:52:11.788350 PCI: 00:1d.4
959 11:52:11.788419 PCI: 00:1d.5
960 11:52:11.791324 PCI: 00:1e.1
961 11:52:11.791411 PCI: 00:1f.1
962 11:52:11.794451 PCI: 00:1f.2
963 11:52:11.794538 PCI: 00:1f.6
964 11:52:11.797720 PCI: Check your devicetree.cb.
965 11:52:11.800960 PCI: 00:02.0 scanning...
966 11:52:11.804553 scan_generic_bus for PCI: 00:02.0
967 11:52:11.807545 scan_generic_bus for PCI: 00:02.0 done
968 11:52:11.814531 scan_bus: scanning of bus PCI: 00:02.0 took 10196 usecs
969 11:52:11.817609 PCI: 00:14.0 scanning...
970 11:52:11.820695 scan_static_bus for PCI: 00:14.0
971 11:52:11.820813 USB0 port 0 enabled
972 11:52:11.824413 USB0 port 0 scanning...
973 11:52:11.827598 scan_static_bus for USB0 port 0
974 11:52:11.831154 USB2 port 0 enabled
975 11:52:11.831241 USB2 port 1 enabled
976 11:52:11.834275 USB2 port 2 disabled
977 11:52:11.837439 USB2 port 3 disabled
978 11:52:11.837523 USB2 port 5 disabled
979 11:52:11.840670 USB2 port 6 enabled
980 11:52:11.840754 USB2 port 9 enabled
981 11:52:11.844560 USB3 port 0 enabled
982 11:52:11.847553 USB3 port 1 enabled
983 11:52:11.847683 USB3 port 2 enabled
984 11:52:11.850712 USB3 port 3 enabled
985 11:52:11.854311 USB3 port 4 disabled
986 11:52:11.854395 USB2 port 0 scanning...
987 11:52:11.857533 scan_static_bus for USB2 port 0
988 11:52:11.860860 scan_static_bus for USB2 port 0 done
989 11:52:11.867807 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
990 11:52:11.871053 USB2 port 1 scanning...
991 11:52:11.874341 scan_static_bus for USB2 port 1
992 11:52:11.877684 scan_static_bus for USB2 port 1 done
993 11:52:11.884149 scan_bus: scanning of bus USB2 port 1 took 9710 usecs
994 11:52:11.884234 USB2 port 6 scanning...
995 11:52:11.887649 scan_static_bus for USB2 port 6
996 11:52:11.890746 scan_static_bus for USB2 port 6 done
997 11:52:11.897355 scan_bus: scanning of bus USB2 port 6 took 9691 usecs
998 11:52:11.900608 USB2 port 9 scanning...
999 11:52:11.904229 scan_static_bus for USB2 port 9
1000 11:52:11.907392 scan_static_bus for USB2 port 9 done
1001 11:52:11.914140 scan_bus: scanning of bus USB2 port 9 took 9690 usecs
1002 11:52:11.914225 USB3 port 0 scanning...
1003 11:52:11.917459 scan_static_bus for USB3 port 0
1004 11:52:11.923855 scan_static_bus for USB3 port 0 done
1005 11:52:11.927182 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
1006 11:52:11.930760 USB3 port 1 scanning...
1007 11:52:11.933934 scan_static_bus for USB3 port 1
1008 11:52:11.937143 scan_static_bus for USB3 port 1 done
1009 11:52:11.944111 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
1010 11:52:11.944196 USB3 port 2 scanning...
1011 11:52:11.947260 scan_static_bus for USB3 port 2
1012 11:52:11.953601 scan_static_bus for USB3 port 2 done
1013 11:52:11.957160 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
1014 11:52:11.960544 USB3 port 3 scanning...
1015 11:52:11.963725 scan_static_bus for USB3 port 3
1016 11:52:11.967633 scan_static_bus for USB3 port 3 done
1017 11:52:11.973771 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
1018 11:52:11.977145 scan_static_bus for USB0 port 0 done
1019 11:52:11.980186 scan_bus: scanning of bus USB0 port 0 took 155352 usecs
1020 11:52:11.987068 scan_static_bus for PCI: 00:14.0 done
1021 11:52:11.990159 scan_bus: scanning of bus PCI: 00:14.0 took 172974 usecs
1022 11:52:11.993509 PCI: 00:15.0 scanning...
1023 11:52:11.997008 scan_generic_bus for PCI: 00:15.0
1024 11:52:12.000145 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 11:52:12.007104 scan_generic_bus for PCI: 00:15.0 done
1026 11:52:12.010200 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
1027 11:52:12.013539 PCI: 00:15.1 scanning...
1028 11:52:12.016613 scan_generic_bus for PCI: 00:15.1
1029 11:52:12.020442 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 11:52:12.026696 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 11:52:12.029932 scan_generic_bus for PCI: 00:15.1 done
1032 11:52:12.036689 scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs
1033 11:52:12.036773 PCI: 00:19.0 scanning...
1034 11:52:12.039769 scan_generic_bus for PCI: 00:19.0
1035 11:52:12.046840 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 11:52:12.049959 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 11:52:12.053196 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 11:52:12.056382 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 11:52:12.062987 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 11:52:12.066265 scan_generic_bus for PCI: 00:19.0 done
1041 11:52:12.069738 scan_bus: scanning of bus PCI: 00:19.0 took 30727 usecs
1042 11:52:12.072930 PCI: 00:1d.0 scanning...
1043 11:52:12.076275 do_pci_scan_bridge for PCI: 00:1d.0
1044 11:52:12.079512 PCI: pci_scan_bus for bus 01
1045 11:52:12.083125 PCI: 01:00.0 [1c5c/1327] enabled
1046 11:52:12.086397 Enabling Common Clock Configuration
1047 11:52:12.093058 L1 Sub-State supported from root port 29
1048 11:52:12.096158 L1 Sub-State Support = 0xf
1049 11:52:12.096277 CommonModeRestoreTime = 0x28
1050 11:52:12.103233 Power On Value = 0x16, Power On Scale = 0x0
1051 11:52:12.103340 ASPM: Enabled L1
1052 11:52:12.109524 scan_bus: scanning of bus PCI: 00:1d.0 took 32792 usecs
1053 11:52:12.112998 PCI: 00:1e.2 scanning...
1054 11:52:12.116229 scan_generic_bus for PCI: 00:1e.2
1055 11:52:12.119706 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 11:52:12.122743 scan_generic_bus for PCI: 00:1e.2 done
1057 11:52:12.129446 scan_bus: scanning of bus PCI: 00:1e.2 took 14018 usecs
1058 11:52:12.133185 PCI: 00:1e.3 scanning...
1059 11:52:12.136459 scan_generic_bus for PCI: 00:1e.3
1060 11:52:12.139532 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 11:52:12.143181 scan_generic_bus for PCI: 00:1e.3 done
1062 11:52:12.149557 scan_bus: scanning of bus PCI: 00:1e.3 took 14015 usecs
1063 11:52:12.149662 PCI: 00:1f.0 scanning...
1064 11:52:12.153295 scan_static_bus for PCI: 00:1f.0
1065 11:52:12.156579 PNP: 0c09.0 enabled
1066 11:52:12.159797 scan_static_bus for PCI: 00:1f.0 done
1067 11:52:12.166115 scan_bus: scanning of bus PCI: 00:1f.0 took 12058 usecs
1068 11:52:12.169276 PCI: 00:1f.3 scanning...
1069 11:52:12.173008 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1070 11:52:12.176330 PCI: 00:1f.4 scanning...
1071 11:52:12.179485 scan_generic_bus for PCI: 00:1f.4
1072 11:52:12.182922 scan_generic_bus for PCI: 00:1f.4 done
1073 11:52:12.189519 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1074 11:52:12.192825 PCI: 00:1f.5 scanning...
1075 11:52:12.195977 scan_generic_bus for PCI: 00:1f.5
1076 11:52:12.199736 scan_generic_bus for PCI: 00:1f.5 done
1077 11:52:12.206005 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1078 11:52:12.212812 scan_bus: scanning of bus DOMAIN: 0000 took 605113 usecs
1079 11:52:12.216099 scan_static_bus for Root Device done
1080 11:52:12.219175 scan_bus: scanning of bus Root Device took 624992 usecs
1081 11:52:12.222636 done
1082 11:52:12.226209 Chrome EC: UHEPI supported
1083 11:52:12.229261 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 11:52:12.235948 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 11:52:12.242234 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 11:52:12.249193 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 11:52:12.252422 SPI flash protection: WPSW=0 SRP0=0
1088 11:52:12.258928 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 11:52:12.262607 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1090 11:52:12.265839 found VGA at PCI: 00:02.0
1091 11:52:12.269266 Setting up VGA for PCI: 00:02.0
1092 11:52:12.275604 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 11:52:12.278839 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 11:52:12.282648 Allocating resources...
1095 11:52:12.285669 Reading resources...
1096 11:52:12.289309 Root Device read_resources bus 0 link: 0
1097 11:52:12.292476 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 11:52:12.299206 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 11:52:12.302312 DOMAIN: 0000 read_resources bus 0 link: 0
1100 11:52:12.309435 PCI: 00:14.0 read_resources bus 0 link: 0
1101 11:52:12.312650 USB0 port 0 read_resources bus 0 link: 0
1102 11:52:12.320489 USB0 port 0 read_resources bus 0 link: 0 done
1103 11:52:12.323892 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 11:52:12.331524 PCI: 00:15.0 read_resources bus 1 link: 0
1105 11:52:12.334655 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 11:52:12.341295 PCI: 00:15.1 read_resources bus 2 link: 0
1107 11:52:12.344454 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 11:52:12.351840 PCI: 00:19.0 read_resources bus 3 link: 0
1109 11:52:12.358708 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 11:52:12.361851 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 11:52:12.368862 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 11:52:12.371850 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 11:52:12.378742 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 11:52:12.381846 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 11:52:12.388782 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 11:52:12.391881 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 11:52:12.398428 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 11:52:12.405511 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 11:52:12.408449 Root Device read_resources bus 0 link: 0 done
1120 11:52:12.412102 Done reading resources.
1121 11:52:12.415170 Show resources in subtree (Root Device)...After reading.
1122 11:52:12.422052 Root Device child on link 0 CPU_CLUSTER: 0
1123 11:52:12.425437 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 11:52:12.425521 APIC: 00
1125 11:52:12.428535 APIC: 03
1126 11:52:12.428619 APIC: 01
1127 11:52:12.431698 APIC: 07
1128 11:52:12.431782 APIC: 02
1129 11:52:12.431849 APIC: 06
1130 11:52:12.435085 APIC: 05
1131 11:52:12.435178 APIC: 04
1132 11:52:12.438572 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 11:52:12.448370 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 11:52:12.498765 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 11:52:12.498919 PCI: 00:00.0
1136 11:52:12.499206 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 11:52:12.499304 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 11:52:12.499818 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 11:52:12.500116 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 11:52:12.528706 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 11:52:12.528838 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 11:52:12.532402 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 11:52:12.535538 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 11:52:12.545339 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 11:52:12.552173 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 11:52:12.562169 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 11:52:12.572148 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 11:52:12.581843 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 11:52:12.591977 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 11:52:12.601823 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 11:52:12.611982 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 11:52:12.612071 PCI: 00:02.0
1153 11:52:12.621692 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 11:52:12.631668 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 11:52:12.641464 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 11:52:12.641551 PCI: 00:04.0
1157 11:52:12.645083 PCI: 00:08.0
1158 11:52:12.655001 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 11:52:12.655104 PCI: 00:12.0
1160 11:52:12.664768 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 11:52:12.671202 PCI: 00:14.0 child on link 0 USB0 port 0
1162 11:52:12.681241 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 11:52:12.684878 USB0 port 0 child on link 0 USB2 port 0
1164 11:52:12.684966 USB2 port 0
1165 11:52:12.688014 USB2 port 1
1166 11:52:12.691345 USB2 port 2
1167 11:52:12.691457 USB2 port 3
1168 11:52:12.694457 USB2 port 5
1169 11:52:12.694561 USB2 port 6
1170 11:52:12.697648 USB2 port 9
1171 11:52:12.697752 USB3 port 0
1172 11:52:12.701422 USB3 port 1
1173 11:52:12.701528 USB3 port 2
1174 11:52:12.704311 USB3 port 3
1175 11:52:12.704416 USB3 port 4
1176 11:52:12.708003 PCI: 00:14.2
1177 11:52:12.717600 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 11:52:12.727950 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 11:52:12.728056 PCI: 00:14.3
1180 11:52:12.737682 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 11:52:12.743977 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 11:52:12.753923 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 11:52:12.754011 I2C: 01:15
1184 11:52:12.757231 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 11:52:12.767126 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 11:52:12.770701 I2C: 02:5d
1187 11:52:12.770787 GENERIC: 0.0
1188 11:52:12.774148 PCI: 00:16.0
1189 11:52:12.783798 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 11:52:12.783886 PCI: 00:17.0
1191 11:52:12.793858 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 11:52:12.803417 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 11:52:12.810498 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 11:52:12.820405 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 11:52:12.826675 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 11:52:12.836951 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 11:52:12.840231 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 11:52:12.849940 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 11:52:12.853230 I2C: 03:1a
1200 11:52:12.853314 I2C: 03:38
1201 11:52:12.856895 I2C: 03:39
1202 11:52:12.856974 I2C: 03:3a
1203 11:52:12.859967 I2C: 03:3b
1204 11:52:12.863243 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 11:52:12.873400 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 11:52:12.883423 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 11:52:12.890012 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 11:52:12.893164 PCI: 01:00.0
1209 11:52:12.903306 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 11:52:12.903396 PCI: 00:1e.0
1211 11:52:12.916263 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 11:52:12.926288 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 11:52:12.929480 PCI: 00:1e.2 child on link 0 SPI: 00
1214 11:52:12.939488 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 11:52:12.939611 SPI: 00
1216 11:52:12.945957 PCI: 00:1e.3 child on link 0 SPI: 01
1217 11:52:12.956193 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 11:52:12.956282 SPI: 01
1219 11:52:12.959439 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 11:52:12.969070 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 11:52:12.979039 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 11:52:12.979154 PNP: 0c09.0
1223 11:52:12.989235 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 11:52:12.989329 PCI: 00:1f.3
1225 11:52:12.998962 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 11:52:13.008842 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 11:52:13.011999 PCI: 00:1f.4
1228 11:52:13.022228 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 11:52:13.031933 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 11:52:13.032069 PCI: 00:1f.5
1231 11:52:13.042234 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 11:52:13.048630 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 11:52:13.055284 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 11:52:13.061851 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 11:52:13.065074 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 11:52:13.068645 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 11:52:13.071963 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 11:52:13.075226 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 11:52:13.081622 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 11:52:13.088364 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 11:52:13.094971 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 11:52:13.104908 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 11:52:13.111999 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 11:52:13.115284 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 11:52:13.124873 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 11:52:13.128192 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 11:52:13.131689 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 11:52:13.138105 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 11:52:13.141756 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 11:52:13.148366 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 11:52:13.151709 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 11:52:13.158204 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 11:52:13.161433 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 11:52:13.167815 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 11:52:13.171478 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 11:52:13.178245 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 11:52:13.181531 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 11:52:13.187862 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 11:52:13.191497 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 11:52:13.194416 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 11:52:13.201170 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 11:52:13.204757 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 11:52:13.211229 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 11:52:13.214465 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 11:52:13.221264 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 11:52:13.224404 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 11:52:13.230893 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 11:52:13.234541 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 11:52:13.244224 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 11:52:13.247390 avoid_fixed_resources: DOMAIN: 0000
1271 11:52:13.254108 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 11:52:13.257427 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 11:52:13.267540 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 11:52:13.274313 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 11:52:13.280606 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 11:52:13.290875 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 11:52:13.297702 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 11:52:13.303912 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 11:52:13.314180 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 11:52:13.320732 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 11:52:13.327454 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 11:52:13.334019 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 11:52:13.337329 Setting resources...
1284 11:52:13.343791 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 11:52:13.347307 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 11:52:13.350350 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 11:52:13.353632 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 11:52:13.360678 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 11:52:13.367126 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 11:52:13.370427 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 11:52:13.376763 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 11:52:13.387050 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 11:52:13.390064 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 11:52:13.396599 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 11:52:13.400233 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 11:52:13.406691 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 11:52:13.409846 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 11:52:13.416951 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 11:52:13.419920 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 11:52:13.423384 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 11:52:13.430025 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 11:52:13.433026 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 11:52:13.439873 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 11:52:13.443064 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 11:52:13.449542 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 11:52:13.453363 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 11:52:13.459717 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 11:52:13.463106 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 11:52:13.469470 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 11:52:13.472662 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 11:52:13.479740 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 11:52:13.482883 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 11:52:13.489569 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 11:52:13.493129 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 11:52:13.496446 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 11:52:13.505970 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 11:52:13.513014 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 11:52:13.519180 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 11:52:13.526126 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 11:52:13.532855 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 11:52:13.539461 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 11:52:13.542662 Root Device assign_resources, bus 0 link: 0
1323 11:52:13.549173 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 11:52:13.555657 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 11:52:13.565750 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 11:52:13.572489 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 11:52:13.582769 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 11:52:13.589273 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 11:52:13.599309 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 11:52:13.602491 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 11:52:13.609136 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 11:52:13.615398 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 11:52:13.625598 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 11:52:13.631906 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 11:52:13.641979 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 11:52:13.645453 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 11:52:13.648593 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 11:52:13.658747 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 11:52:13.662068 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 11:52:13.668551 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 11:52:13.674965 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 11:52:13.685121 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 11:52:13.691523 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 11:52:13.697960 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 11:52:13.708376 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 11:52:13.714519 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 11:52:13.721252 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 11:52:13.731000 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 11:52:13.734805 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 11:52:13.741070 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 11:52:13.747724 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 11:52:13.757656 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 11:52:13.764402 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 11:52:13.770707 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 11:52:13.777932 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 11:52:13.784082 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 11:52:13.790707 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 11:52:13.800710 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 11:52:13.803992 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 11:52:13.810801 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 11:52:13.817382 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 11:52:13.820512 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 11:52:13.826949 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 11:52:13.830217 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 11:52:13.837094 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 11:52:13.840317 LPC: Trying to open IO window from 800 size 1ff
1367 11:52:13.850295 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 11:52:13.856762 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 11:52:13.866768 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 11:52:13.873809 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 11:52:13.879962 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 11:52:13.883336 Root Device assign_resources, bus 0 link: 0
1373 11:52:13.886454 Done setting resources.
1374 11:52:13.893417 Show resources in subtree (Root Device)...After assigning values.
1375 11:52:13.896847 Root Device child on link 0 CPU_CLUSTER: 0
1376 11:52:13.900108 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 11:52:13.903155 APIC: 00
1378 11:52:13.903237 APIC: 03
1379 11:52:13.903302 APIC: 01
1380 11:52:13.906816 APIC: 07
1381 11:52:13.906899 APIC: 02
1382 11:52:13.910110 APIC: 06
1383 11:52:13.910192 APIC: 05
1384 11:52:13.910258 APIC: 04
1385 11:52:13.916523 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 11:52:13.925974 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 11:52:13.936321 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 11:52:13.939797 PCI: 00:00.0
1389 11:52:13.946146 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 11:52:13.955870 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 11:52:13.965543 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 11:52:13.975450 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 11:52:13.985315 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 11:52:13.995614 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 11:52:14.005397 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 11:52:14.011566 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 11:52:14.021729 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 11:52:14.031815 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 11:52:14.041479 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 11:52:14.051165 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 11:52:14.061140 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 11:52:14.071113 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 11:52:14.077824 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 11:52:14.087879 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 11:52:14.090980 PCI: 00:02.0
1406 11:52:14.101270 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 11:52:14.110761 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 11:52:14.120840 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 11:52:14.120927 PCI: 00:04.0
1410 11:52:14.124071 PCI: 00:08.0
1411 11:52:14.134066 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 11:52:14.134153 PCI: 00:12.0
1413 11:52:14.144214 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 11:52:14.150644 PCI: 00:14.0 child on link 0 USB0 port 0
1415 11:52:14.160469 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 11:52:14.163703 USB0 port 0 child on link 0 USB2 port 0
1417 11:52:14.167274 USB2 port 0
1418 11:52:14.167384 USB2 port 1
1419 11:52:14.170645 USB2 port 2
1420 11:52:14.170754 USB2 port 3
1421 11:52:14.173843 USB2 port 5
1422 11:52:14.173926 USB2 port 6
1423 11:52:14.177225 USB2 port 9
1424 11:52:14.177310 USB3 port 0
1425 11:52:14.180775 USB3 port 1
1426 11:52:14.183547 USB3 port 2
1427 11:52:14.183694 USB3 port 3
1428 11:52:14.187091 USB3 port 4
1429 11:52:14.187200 PCI: 00:14.2
1430 11:52:14.197144 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 11:52:14.206886 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 11:52:14.210630 PCI: 00:14.3
1433 11:52:14.220347 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 11:52:14.223575 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 11:52:14.233348 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 11:52:14.236878 I2C: 01:15
1437 11:52:14.239983 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 11:52:14.250078 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 11:52:14.253497 I2C: 02:5d
1440 11:52:14.253584 GENERIC: 0.0
1441 11:52:14.256791 PCI: 00:16.0
1442 11:52:14.266594 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 11:52:14.266679 PCI: 00:17.0
1444 11:52:14.276323 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 11:52:14.289840 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 11:52:14.296155 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 11:52:14.306048 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 11:52:14.316387 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 11:52:14.325654 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 11:52:14.329356 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 11:52:14.338920 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 11:52:14.342733 I2C: 03:1a
1453 11:52:14.342843 I2C: 03:38
1454 11:52:14.345799 I2C: 03:39
1455 11:52:14.345908 I2C: 03:3a
1456 11:52:14.349156 I2C: 03:3b
1457 11:52:14.352297 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 11:52:14.362563 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 11:52:14.372142 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 11:52:14.381854 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 11:52:14.385698 PCI: 01:00.0
1462 11:52:14.395176 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 11:52:14.395294 PCI: 00:1e.0
1464 11:52:14.408603 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 11:52:14.418637 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 11:52:14.421835 PCI: 00:1e.2 child on link 0 SPI: 00
1467 11:52:14.431865 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 11:52:14.431979 SPI: 00
1469 11:52:14.438311 PCI: 00:1e.3 child on link 0 SPI: 01
1470 11:52:14.448083 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 11:52:14.448200 SPI: 01
1472 11:52:14.451293 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 11:52:14.461561 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 11:52:14.471680 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 11:52:14.471795 PNP: 0c09.0
1476 11:52:14.481244 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 11:52:14.481360 PCI: 00:1f.3
1478 11:52:14.491264 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 11:52:14.504607 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 11:52:14.504724 PCI: 00:1f.4
1481 11:52:14.514402 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 11:52:14.524169 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 11:52:14.524282 PCI: 00:1f.5
1484 11:52:14.537618 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 11:52:14.537732 Done allocating resources.
1486 11:52:14.544094 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 11:52:14.547270 Enabling resources...
1488 11:52:14.550751 PCI: 00:00.0 subsystem <- 8086/9b61
1489 11:52:14.553969 PCI: 00:00.0 cmd <- 06
1490 11:52:14.557168 PCI: 00:02.0 subsystem <- 8086/9b41
1491 11:52:14.560563 PCI: 00:02.0 cmd <- 03
1492 11:52:14.563697 PCI: 00:08.0 cmd <- 06
1493 11:52:14.566977 PCI: 00:12.0 subsystem <- 8086/02f9
1494 11:52:14.570352 PCI: 00:12.0 cmd <- 02
1495 11:52:14.573844 PCI: 00:14.0 subsystem <- 8086/02ed
1496 11:52:14.573958 PCI: 00:14.0 cmd <- 02
1497 11:52:14.577004 PCI: 00:14.2 cmd <- 02
1498 11:52:14.580423 PCI: 00:14.3 subsystem <- 8086/02f0
1499 11:52:14.583714 PCI: 00:14.3 cmd <- 02
1500 11:52:14.586913 PCI: 00:15.0 subsystem <- 8086/02e8
1501 11:52:14.590099 PCI: 00:15.0 cmd <- 02
1502 11:52:14.593844 PCI: 00:15.1 subsystem <- 8086/02e9
1503 11:52:14.596973 PCI: 00:15.1 cmd <- 02
1504 11:52:14.600129 PCI: 00:16.0 subsystem <- 8086/02e0
1505 11:52:14.603370 PCI: 00:16.0 cmd <- 02
1506 11:52:14.607290 PCI: 00:17.0 subsystem <- 8086/02d3
1507 11:52:14.610317 PCI: 00:17.0 cmd <- 03
1508 11:52:14.613430 PCI: 00:19.0 subsystem <- 8086/02c5
1509 11:52:14.616675 PCI: 00:19.0 cmd <- 02
1510 11:52:14.620277 PCI: 00:1d.0 bridge ctrl <- 0013
1511 11:52:14.623403 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 11:52:14.623517 PCI: 00:1d.0 cmd <- 06
1513 11:52:14.630443 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 11:52:14.630556 PCI: 00:1e.0 cmd <- 06
1515 11:52:14.633446 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 11:52:14.636948 PCI: 00:1e.2 cmd <- 06
1517 11:52:14.640192 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 11:52:14.643337 PCI: 00:1e.3 cmd <- 02
1519 11:52:14.646562 PCI: 00:1f.0 subsystem <- 8086/0284
1520 11:52:14.650472 PCI: 00:1f.0 cmd <- 407
1521 11:52:14.653569 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 11:52:14.656654 PCI: 00:1f.3 cmd <- 02
1523 11:52:14.660468 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 11:52:14.663686 PCI: 00:1f.4 cmd <- 03
1525 11:52:14.666893 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 11:52:14.670012 PCI: 00:1f.5 cmd <- 406
1527 11:52:14.677858 PCI: 01:00.0 cmd <- 02
1528 11:52:14.682927 done.
1529 11:52:14.696153 ME: Version: 14.0.39.1367
1530 11:52:14.702861 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1531 11:52:14.706052 Initializing devices...
1532 11:52:14.706135 Root Device init ...
1533 11:52:14.712823 Chrome EC: Set SMI mask to 0x0000000000000000
1534 11:52:14.715943 Chrome EC: clear events_b mask to 0x0000000000000000
1535 11:52:14.722788 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 11:52:14.729357 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 11:52:14.736077 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 11:52:14.739079 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 11:52:14.742570 Root Device init finished in 35154 usecs
1540 11:52:14.746353 CPU_CLUSTER: 0 init ...
1541 11:52:14.752802 CPU_CLUSTER: 0 init finished in 2446 usecs
1542 11:52:14.756948 PCI: 00:00.0 init ...
1543 11:52:14.760090 CPU TDP: 15 Watts
1544 11:52:14.763719 CPU PL2 = 64 Watts
1545 11:52:14.766933 PCI: 00:00.0 init finished in 7078 usecs
1546 11:52:14.770279 PCI: 00:02.0 init ...
1547 11:52:14.773369 PCI: 00:02.0 init finished in 2252 usecs
1548 11:52:14.776605 PCI: 00:08.0 init ...
1549 11:52:14.779869 PCI: 00:08.0 init finished in 2253 usecs
1550 11:52:14.782974 PCI: 00:12.0 init ...
1551 11:52:14.786705 PCI: 00:12.0 init finished in 2243 usecs
1552 11:52:14.789721 PCI: 00:14.0 init ...
1553 11:52:14.792876 PCI: 00:14.0 init finished in 2252 usecs
1554 11:52:14.796657 PCI: 00:14.2 init ...
1555 11:52:14.799814 PCI: 00:14.2 init finished in 2251 usecs
1556 11:52:14.803248 PCI: 00:14.3 init ...
1557 11:52:14.806234 PCI: 00:14.3 init finished in 2268 usecs
1558 11:52:14.809513 PCI: 00:15.0 init ...
1559 11:52:14.812835 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 11:52:14.816001 PCI: 00:15.0 init finished in 5965 usecs
1561 11:52:14.819479 PCI: 00:15.1 init ...
1562 11:52:14.823294 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 11:52:14.829671 PCI: 00:15.1 init finished in 5975 usecs
1564 11:52:14.829780 PCI: 00:16.0 init ...
1565 11:52:14.836425 PCI: 00:16.0 init finished in 2251 usecs
1566 11:52:14.839644 PCI: 00:19.0 init ...
1567 11:52:14.842738 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 11:52:14.846340 PCI: 00:19.0 init finished in 5976 usecs
1569 11:52:14.849413 PCI: 00:1d.0 init ...
1570 11:52:14.852745 Initializing PCH PCIe bridge.
1571 11:52:14.855800 PCI: 00:1d.0 init finished in 5276 usecs
1572 11:52:14.859651 PCI: 00:1f.0 init ...
1573 11:52:14.862591 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 11:52:14.868992 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 11:52:14.869096 IOAPIC: ID = 0x02
1576 11:52:14.872695 IOAPIC: Dumping registers
1577 11:52:14.875953 reg 0x0000: 0x02000000
1578 11:52:14.879133 reg 0x0001: 0x00770020
1579 11:52:14.879232 reg 0x0002: 0x00000000
1580 11:52:14.885565 PCI: 00:1f.0 init finished in 23543 usecs
1581 11:52:14.889184 PCI: 00:1f.4 init ...
1582 11:52:14.892254 PCI: 00:1f.4 init finished in 2262 usecs
1583 11:52:14.902968 PCI: 01:00.0 init ...
1584 11:52:14.906228 PCI: 01:00.0 init finished in 2252 usecs
1585 11:52:14.910456 PNP: 0c09.0 init ...
1586 11:52:14.914043 Google Chrome EC uptime: 11.097 seconds
1587 11:52:14.920446 Google Chrome AP resets since EC boot: 0
1588 11:52:14.923981 Google Chrome most recent AP reset causes:
1589 11:52:14.930356 Google Chrome EC reset flags at last EC boot: reset-pin
1590 11:52:14.934013 PNP: 0c09.0 init finished in 20597 usecs
1591 11:52:14.937057 Devices initialized
1592 11:52:14.937128 Show all devs... After init.
1593 11:52:14.940323 Root Device: enabled 1
1594 11:52:14.943516 CPU_CLUSTER: 0: enabled 1
1595 11:52:14.946835 DOMAIN: 0000: enabled 1
1596 11:52:14.946922 APIC: 00: enabled 1
1597 11:52:14.950358 PCI: 00:00.0: enabled 1
1598 11:52:14.953885 PCI: 00:02.0: enabled 1
1599 11:52:14.957004 PCI: 00:04.0: enabled 0
1600 11:52:14.957087 PCI: 00:05.0: enabled 0
1601 11:52:14.960385 PCI: 00:12.0: enabled 1
1602 11:52:14.963500 PCI: 00:12.5: enabled 0
1603 11:52:14.963586 PCI: 00:12.6: enabled 0
1604 11:52:14.966811 PCI: 00:14.0: enabled 1
1605 11:52:14.970362 PCI: 00:14.1: enabled 0
1606 11:52:14.973562 PCI: 00:14.3: enabled 1
1607 11:52:14.973644 PCI: 00:14.5: enabled 0
1608 11:52:14.976908 PCI: 00:15.0: enabled 1
1609 11:52:14.980049 PCI: 00:15.1: enabled 1
1610 11:52:14.983370 PCI: 00:15.2: enabled 0
1611 11:52:14.983451 PCI: 00:15.3: enabled 0
1612 11:52:14.986592 PCI: 00:16.0: enabled 1
1613 11:52:14.990360 PCI: 00:16.1: enabled 0
1614 11:52:14.993503 PCI: 00:16.2: enabled 0
1615 11:52:14.993585 PCI: 00:16.3: enabled 0
1616 11:52:14.996487 PCI: 00:16.4: enabled 0
1617 11:52:14.999673 PCI: 00:16.5: enabled 0
1618 11:52:15.002977 PCI: 00:17.0: enabled 1
1619 11:52:15.003059 PCI: 00:19.0: enabled 1
1620 11:52:15.006803 PCI: 00:19.1: enabled 0
1621 11:52:15.009979 PCI: 00:19.2: enabled 0
1622 11:52:15.010062 PCI: 00:1a.0: enabled 0
1623 11:52:15.013094 PCI: 00:1c.0: enabled 0
1624 11:52:15.016713 PCI: 00:1c.1: enabled 0
1625 11:52:15.019871 PCI: 00:1c.2: enabled 0
1626 11:52:15.019953 PCI: 00:1c.3: enabled 0
1627 11:52:15.022984 PCI: 00:1c.4: enabled 0
1628 11:52:15.026266 PCI: 00:1c.5: enabled 0
1629 11:52:15.029918 PCI: 00:1c.6: enabled 0
1630 11:52:15.030000 PCI: 00:1c.7: enabled 0
1631 11:52:15.033029 PCI: 00:1d.0: enabled 1
1632 11:52:15.036231 PCI: 00:1d.1: enabled 0
1633 11:52:15.039451 PCI: 00:1d.2: enabled 0
1634 11:52:15.039533 PCI: 00:1d.3: enabled 0
1635 11:52:15.042965 PCI: 00:1d.4: enabled 0
1636 11:52:15.046117 PCI: 00:1d.5: enabled 0
1637 11:52:15.049488 PCI: 00:1e.0: enabled 1
1638 11:52:15.049570 PCI: 00:1e.1: enabled 0
1639 11:52:15.052526 PCI: 00:1e.2: enabled 1
1640 11:52:15.056154 PCI: 00:1e.3: enabled 1
1641 11:52:15.056236 PCI: 00:1f.0: enabled 1
1642 11:52:15.059682 PCI: 00:1f.1: enabled 0
1643 11:52:15.062662 PCI: 00:1f.2: enabled 0
1644 11:52:15.065945 PCI: 00:1f.3: enabled 1
1645 11:52:15.066026 PCI: 00:1f.4: enabled 1
1646 11:52:15.069141 PCI: 00:1f.5: enabled 1
1647 11:52:15.072432 PCI: 00:1f.6: enabled 0
1648 11:52:15.076114 USB0 port 0: enabled 1
1649 11:52:15.076197 I2C: 01:15: enabled 1
1650 11:52:15.079271 I2C: 02:5d: enabled 1
1651 11:52:15.082426 GENERIC: 0.0: enabled 1
1652 11:52:15.082502 I2C: 03:1a: enabled 1
1653 11:52:15.085579 I2C: 03:38: enabled 1
1654 11:52:15.088839 I2C: 03:39: enabled 1
1655 11:52:15.088921 I2C: 03:3a: enabled 1
1656 11:52:15.092188 I2C: 03:3b: enabled 1
1657 11:52:15.095828 PCI: 00:00.0: enabled 1
1658 11:52:15.095911 SPI: 00: enabled 1
1659 11:52:15.098908 SPI: 01: enabled 1
1660 11:52:15.102585 PNP: 0c09.0: enabled 1
1661 11:52:15.102668 USB2 port 0: enabled 1
1662 11:52:15.105773 USB2 port 1: enabled 1
1663 11:52:15.108910 USB2 port 2: enabled 0
1664 11:52:15.112074 USB2 port 3: enabled 0
1665 11:52:15.112157 USB2 port 5: enabled 0
1666 11:52:15.115784 USB2 port 6: enabled 1
1667 11:52:15.118853 USB2 port 9: enabled 1
1668 11:52:15.118936 USB3 port 0: enabled 1
1669 11:52:15.122084 USB3 port 1: enabled 1
1670 11:52:15.125347 USB3 port 2: enabled 1
1671 11:52:15.125430 USB3 port 3: enabled 1
1672 11:52:15.128933 USB3 port 4: enabled 0
1673 11:52:15.132080 APIC: 03: enabled 1
1674 11:52:15.132163 APIC: 01: enabled 1
1675 11:52:15.135256 APIC: 07: enabled 1
1676 11:52:15.138968 APIC: 02: enabled 1
1677 11:52:15.139051 APIC: 06: enabled 1
1678 11:52:15.142154 APIC: 05: enabled 1
1679 11:52:15.142237 APIC: 04: enabled 1
1680 11:52:15.145273 PCI: 00:08.0: enabled 1
1681 11:52:15.148373 PCI: 00:14.2: enabled 1
1682 11:52:15.152067 PCI: 01:00.0: enabled 1
1683 11:52:15.155422 Disabling ACPI via APMC:
1684 11:52:15.155505 done.
1685 11:52:15.162356 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 11:52:15.165498 ELOG: NV offset 0xaf0000 size 0x4000
1687 11:52:15.172006 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 11:52:15.178817 ELOG: Event(17) added with size 13 at 2023-06-23 11:52:15 UTC
1689 11:52:15.185775 ELOG: Event(92) added with size 9 at 2023-06-23 11:52:15 UTC
1690 11:52:15.192160 ELOG: Event(93) added with size 9 at 2023-06-23 11:52:15 UTC
1691 11:52:15.198655 ELOG: Event(9A) added with size 9 at 2023-06-23 11:52:15 UTC
1692 11:52:15.205426 ELOG: Event(9E) added with size 10 at 2023-06-23 11:52:15 UTC
1693 11:52:15.211825 ELOG: Event(9F) added with size 14 at 2023-06-23 11:52:15 UTC
1694 11:52:15.215143 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1695 11:52:15.222537 ELOG: Event(A1) added with size 10 at 2023-06-23 11:52:15 UTC
1696 11:52:15.232577 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 11:52:15.239321 ELOG: Event(A0) added with size 9 at 2023-06-23 11:52:15 UTC
1698 11:52:15.242448 elog_add_boot_reason: Logged dev mode boot
1699 11:52:15.245730 Finalize devices...
1700 11:52:15.245815 PCI: 00:17.0 final
1701 11:52:15.248914 Devices finalized
1702 11:52:15.252456 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 11:52:15.258982 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 11:52:15.262207 ME: HFSTS1 : 0x90000245
1705 11:52:15.265504 ME: HFSTS2 : 0x3B850126
1706 11:52:15.272378 ME: HFSTS3 : 0x00000020
1707 11:52:15.275305 ME: HFSTS4 : 0x00004800
1708 11:52:15.279089 ME: HFSTS5 : 0x00000000
1709 11:52:15.282226 ME: HFSTS6 : 0x40400006
1710 11:52:15.285298 ME: Manufacturing Mode : NO
1711 11:52:15.289083 ME: FW Partition Table : OK
1712 11:52:15.292312 ME: Bringup Loader Failure : NO
1713 11:52:15.295460 ME: Firmware Init Complete : YES
1714 11:52:15.298794 ME: Boot Options Present : NO
1715 11:52:15.301964 ME: Update In Progress : NO
1716 11:52:15.305206 ME: D0i3 Support : YES
1717 11:52:15.308784 ME: Low Power State Enabled : NO
1718 11:52:15.311848 ME: CPU Replaced : NO
1719 11:52:15.315258 ME: CPU Replacement Valid : YES
1720 11:52:15.318882 ME: Current Working State : 5
1721 11:52:15.321726 ME: Current Operation State : 1
1722 11:52:15.325331 ME: Current Operation Mode : 0
1723 11:52:15.328905 ME: Error Code : 0
1724 11:52:15.332094 ME: CPU Debug Disabled : YES
1725 11:52:15.335190 ME: TXT Support : NO
1726 11:52:15.341728 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 11:52:15.345401 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 11:52:15.348586 CBFS @ c08000 size 3f8000
1729 11:52:15.354888 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 11:52:15.358611 CBFS: Locating 'fallback/dsdt.aml'
1731 11:52:15.361838 CBFS: Found @ offset 10bb80 size 3fa5
1732 11:52:15.368219 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 11:52:15.371486 CBFS @ c08000 size 3f8000
1734 11:52:15.374767 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 11:52:15.378389 CBFS: Locating 'fallback/slic'
1736 11:52:15.383168 CBFS: 'fallback/slic' not found.
1737 11:52:15.389622 ACPI: Writing ACPI tables at 99b3e000.
1738 11:52:15.389726 ACPI: * FACS
1739 11:52:15.393183 ACPI: * DSDT
1740 11:52:15.396266 Ramoops buffer: 0x100000@0x99a3d000.
1741 11:52:15.399484 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 11:52:15.406472 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 11:52:15.409592 Google Chrome EC: version:
1744 11:52:15.412583 ro: helios_v2.0.2659-56403530b
1745 11:52:15.415860 rw: helios_v2.0.2849-c41de27e7d
1746 11:52:15.415945 running image: 1
1747 11:52:15.420625 ACPI: * FADT
1748 11:52:15.420711 SCI is IRQ9
1749 11:52:15.427080 ACPI: added table 1/32, length now 40
1750 11:52:15.427165 ACPI: * SSDT
1751 11:52:15.430225 Found 1 CPU(s) with 8 core(s) each.
1752 11:52:15.433852 Error: Could not locate 'wifi_sar' in VPD.
1753 11:52:15.440304 Checking CBFS for default SAR values
1754 11:52:15.443523 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 11:52:15.446751 CBFS @ c08000 size 3f8000
1756 11:52:15.453605 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 11:52:15.456866 CBFS: Locating 'wifi_sar_defaults.hex'
1758 11:52:15.460394 CBFS: Found @ offset 5fac0 size 77
1759 11:52:15.463724 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1760 11:52:15.470076 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1761 11:52:15.473241 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1762 11:52:15.480070 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1763 11:52:15.483384 failed to find key in VPD: dsm_calib_r0_0
1764 11:52:15.493290 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1765 11:52:15.496456 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1766 11:52:15.500123 failed to find key in VPD: dsm_calib_r0_1
1767 11:52:15.509764 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1768 11:52:15.516196 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1769 11:52:15.519537 failed to find key in VPD: dsm_calib_r0_2
1770 11:52:15.529365 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1771 11:52:15.532589 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1772 11:52:15.539297 failed to find key in VPD: dsm_calib_r0_3
1773 11:52:15.545780 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1774 11:52:15.552773 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1775 11:52:15.555827 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1776 11:52:15.559455 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1777 11:52:15.563506 EC returned error result code 1
1778 11:52:15.566752 EC returned error result code 1
1779 11:52:15.571191 EC returned error result code 1
1780 11:52:15.577727 PS2K: Bad resp from EC. Vivaldi disabled!
1781 11:52:15.580973 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1782 11:52:15.587318 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1783 11:52:15.594347 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1784 11:52:15.597415 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1785 11:52:15.603712 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1786 11:52:15.610549 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1787 11:52:15.616956 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1788 11:52:15.620460 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1789 11:52:15.626920 ACPI: added table 2/32, length now 44
1790 11:52:15.627012 ACPI: * MCFG
1791 11:52:15.630095 ACPI: added table 3/32, length now 48
1792 11:52:15.633721 ACPI: * TPM2
1793 11:52:15.637098 TPM2 log created at 99a2d000
1794 11:52:15.640298 ACPI: added table 4/32, length now 52
1795 11:52:15.640382 ACPI: * MADT
1796 11:52:15.643841 SCI is IRQ9
1797 11:52:15.647018 ACPI: added table 5/32, length now 56
1798 11:52:15.647102 current = 99b43ac0
1799 11:52:15.650232 ACPI: * DMAR
1800 11:52:15.653524 ACPI: added table 6/32, length now 60
1801 11:52:15.656692 ACPI: * IGD OpRegion
1802 11:52:15.656776 GMA: Found VBT in CBFS
1803 11:52:15.660438 GMA: Found valid VBT in CBFS
1804 11:52:15.663742 ACPI: added table 7/32, length now 64
1805 11:52:15.666875 ACPI: * HPET
1806 11:52:15.669960 ACPI: added table 8/32, length now 68
1807 11:52:15.670044 ACPI: done.
1808 11:52:15.673266 ACPI tables: 31744 bytes.
1809 11:52:15.676941 smbios_write_tables: 99a2c000
1810 11:52:15.680086 EC returned error result code 3
1811 11:52:15.683904 Couldn't obtain OEM name from CBI
1812 11:52:15.687188 Create SMBIOS type 17
1813 11:52:15.690197 PCI: 00:00.0 (Intel Cannonlake)
1814 11:52:15.693605 PCI: 00:14.3 (Intel WiFi)
1815 11:52:15.696746 SMBIOS tables: 939 bytes.
1816 11:52:15.699952 Writing table forward entry at 0x00000500
1817 11:52:15.706854 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 11:52:15.710304 Writing coreboot table at 0x99b62000
1819 11:52:15.716572 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 11:52:15.719834 1. 0000000000001000-000000000009ffff: RAM
1821 11:52:15.723471 2. 00000000000a0000-00000000000fffff: RESERVED
1822 11:52:15.730087 3. 0000000000100000-0000000099a2bfff: RAM
1823 11:52:15.733341 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 11:52:15.739834 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 11:52:15.746630 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 11:52:15.749891 7. 000000009a000000-000000009f7fffff: RESERVED
1827 11:52:15.756381 8. 00000000e0000000-00000000efffffff: RESERVED
1828 11:52:15.759539 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 11:52:15.763090 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 11:52:15.769437 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 11:52:15.773119 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 11:52:15.779255 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 11:52:15.782534 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 11:52:15.789655 15. 0000000100000000-000000045e7fffff: RAM
1835 11:52:15.792766 Graphics framebuffer located at 0xc0000000
1836 11:52:15.795868 Passing 5 GPIOs to payload:
1837 11:52:15.799111 NAME | PORT | POLARITY | VALUE
1838 11:52:15.806049 write protect | undefined | high | low
1839 11:52:15.809298 lid | undefined | high | high
1840 11:52:15.815801 power | undefined | high | low
1841 11:52:15.822330 oprom | undefined | high | low
1842 11:52:15.825628 EC in RW | 0x000000cb | high | low
1843 11:52:15.829368 Board ID: 4
1844 11:52:15.832353 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 11:52:15.835497 CBFS @ c08000 size 3f8000
1846 11:52:15.842094 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 11:52:15.848947 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1848 11:52:15.849034 coreboot table: 1492 bytes.
1849 11:52:15.852017 IMD ROOT 0. 99fff000 00001000
1850 11:52:15.855824 IMD SMALL 1. 99ffe000 00001000
1851 11:52:15.859039 FSP MEMORY 2. 99c4e000 003b0000
1852 11:52:15.862322 CONSOLE 3. 99c2e000 00020000
1853 11:52:15.865470 FMAP 4. 99c2d000 0000054e
1854 11:52:15.868523 TIME STAMP 5. 99c2c000 00000910
1855 11:52:15.872327 VBOOT WORK 6. 99c18000 00014000
1856 11:52:15.875516 MRC DATA 7. 99c16000 00001958
1857 11:52:15.878783 ROMSTG STCK 8. 99c15000 00001000
1858 11:52:15.882018 AFTER CAR 9. 99c0b000 0000a000
1859 11:52:15.885606 RAMSTAGE 10. 99baf000 0005c000
1860 11:52:15.888820 REFCODE 11. 99b7a000 00035000
1861 11:52:15.892268 SMM BACKUP 12. 99b6a000 00010000
1862 11:52:15.895432 COREBOOT 13. 99b62000 00008000
1863 11:52:15.898453 ACPI 14. 99b3e000 00024000
1864 11:52:15.902183 ACPI GNVS 15. 99b3d000 00001000
1865 11:52:15.905341 RAMOOPS 16. 99a3d000 00100000
1866 11:52:15.908570 TPM2 TCGLOG17. 99a2d000 00010000
1867 11:52:15.911946 SMBIOS 18. 99a2c000 00000800
1868 11:52:15.915439 IMD small region:
1869 11:52:15.918642 IMD ROOT 0. 99ffec00 00000400
1870 11:52:15.921674 FSP RUNTIME 1. 99ffebe0 00000004
1871 11:52:15.925342 EC HOSTEVENT 2. 99ffebc0 00000008
1872 11:52:15.928375 POWER STATE 3. 99ffeb80 00000040
1873 11:52:15.931770 ROMSTAGE 4. 99ffeb60 00000004
1874 11:52:15.935201 MEM INFO 5. 99ffe9a0 000001b9
1875 11:52:15.938280 VPD 6. 99ffe920 0000006c
1876 11:52:15.941994 MTRR: Physical address space:
1877 11:52:15.948303 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1878 11:52:15.954944 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1879 11:52:15.961350 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1880 11:52:15.968331 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1881 11:52:15.975023 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1882 11:52:15.981293 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1883 11:52:15.987788 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1884 11:52:15.991434 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 11:52:15.994816 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 11:52:15.998020 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 11:52:16.004848 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 11:52:16.008048 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 11:52:16.011170 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 11:52:16.014499 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 11:52:16.017779 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 11:52:16.024283 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 11:52:16.027364 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 11:52:16.031011 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 11:52:16.034260 call enable_fixed_mtrr()
1896 11:52:16.037703 CPU physical address size: 39 bits
1897 11:52:16.044350 MTRR: default type WB/UC MTRR counts: 6/8.
1898 11:52:16.047502 MTRR: WB selected as default type.
1899 11:52:16.054438 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1900 11:52:16.057528 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1901 11:52:16.063862 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1902 11:52:16.070818 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1903 11:52:16.077441 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1904 11:52:16.083760 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1905 11:52:16.087356 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 11:52:16.093752 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 11:52:16.097027 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 11:52:16.100464 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 11:52:16.103568 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 11:52:16.110583 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 11:52:16.113797 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 11:52:16.116979 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 11:52:16.120198 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 11:52:16.126858 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 11:52:16.130025 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 11:52:16.130107
1917 11:52:16.130172 MTRR check
1918 11:52:16.133756 Fixed MTRRs : Enabled
1919 11:52:16.136831 Variable MTRRs: Enabled
1920 11:52:16.136916
1921 11:52:16.140044 call enable_fixed_mtrr()
1922 11:52:16.143174 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1923 11:52:16.146686 CPU physical address size: 39 bits
1924 11:52:16.153796 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1925 11:52:16.156826 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 11:52:16.159978 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 11:52:16.166787 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 11:52:16.169795 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 11:52:16.173190 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 11:52:16.176912 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 11:52:16.183275 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 11:52:16.186507 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 11:52:16.190092 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 11:52:16.193245 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 11:52:16.196526 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 11:52:16.202909 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 11:52:16.206673 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 11:52:16.209930 call enable_fixed_mtrr()
1939 11:52:16.212796 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 11:52:16.216567 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 11:52:16.222828 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 11:52:16.226615 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 11:52:16.229729 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 11:52:16.232929 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 11:52:16.235971 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 11:52:16.242945 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 11:52:16.245982 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 11:52:16.249290 CPU physical address size: 39 bits
1949 11:52:16.252949 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 11:52:16.259162 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 11:52:16.262627 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 11:52:16.265854 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 11:52:16.269308 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 11:52:16.275723 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 11:52:16.279415 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 11:52:16.282735 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 11:52:16.285808 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 11:52:16.289254 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 11:52:16.295781 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 11:52:16.299211 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 11:52:16.302497 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 11:52:16.305746 call enable_fixed_mtrr()
1963 11:52:16.308856 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 11:52:16.315857 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 11:52:16.318704 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 11:52:16.321919 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 11:52:16.325368 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 11:52:16.328940 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 11:52:16.335539 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 11:52:16.338866 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 11:52:16.341840 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 11:52:16.345437 CPU physical address size: 39 bits
1973 11:52:16.348619 call enable_fixed_mtrr()
1974 11:52:16.352039 call enable_fixed_mtrr()
1975 11:52:16.355115 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 11:52:16.358201 CPU physical address size: 39 bits
1977 11:52:16.361725 CPU physical address size: 39 bits
1978 11:52:16.368042 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 11:52:16.371634 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 11:52:16.375100 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 11:52:16.378319 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 11:52:16.384794 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 11:52:16.387912 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 11:52:16.391486 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 11:52:16.394811 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 11:52:16.398201 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 11:52:16.404912 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 11:52:16.407727 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 11:52:16.411369 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 11:52:16.417826 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 11:52:16.421342 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 11:52:16.424640 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 11:52:16.427789 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 11:52:16.431107 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 11:52:16.437617 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 11:52:16.440914 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 11:52:16.444010 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 11:52:16.447561 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 11:52:16.450812 call enable_fixed_mtrr()
2000 11:52:16.454022 call enable_fixed_mtrr()
2001 11:52:16.457335 CPU physical address size: 39 bits
2002 11:52:16.460506 CPU physical address size: 39 bits
2003 11:52:16.463590 CBFS @ c08000 size 3f8000
2004 11:52:16.470571 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2005 11:52:16.473538 CBFS: Locating 'fallback/payload'
2006 11:52:16.477147 CBFS: Found @ offset 1c96c0 size 3f798
2007 11:52:16.483747 Checking segment from ROM address 0xffdd16f8
2008 11:52:16.486918 Checking segment from ROM address 0xffdd1714
2009 11:52:16.490115 Loading segment from ROM address 0xffdd16f8
2010 11:52:16.493627 code (compression=0)
2011 11:52:16.503758 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 11:52:16.510138 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 11:52:16.513424 it's not compressed!
2014 11:52:16.605251 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 11:52:16.612288 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 11:52:16.615600 Loading segment from ROM address 0xffdd1714
2017 11:52:16.618942 Entry Point 0x30000000
2018 11:52:16.622482 Loaded segments
2019 11:52:16.628097 Finalizing chipset.
2020 11:52:16.631214 Finalizing SMM.
2021 11:52:16.634563 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2022 11:52:16.637889 mp_park_aps done after 0 msecs.
2023 11:52:16.644406 Jumping to boot code at 30000000(99b62000)
2024 11:52:16.651432 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2025 11:52:16.652008
2026 11:52:16.652352
2027 11:52:16.652725
2028 11:52:16.654234 Starting depthcharge on Helios...
2029 11:52:16.654638
2030 11:52:16.655774 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2031 11:52:16.656253 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2032 11:52:16.656644 Setting prompt string to ['hatch:']
2033 11:52:16.657018 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2034 11:52:16.664000 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2035 11:52:16.664428
2036 11:52:16.670840 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2037 11:52:16.671281
2038 11:52:16.677237 board_setup: Info: eMMC controller not present; skipping
2039 11:52:16.677627
2040 11:52:16.680612 New NVMe Controller 0x30053ac0 @ 00:1d:00
2041 11:52:16.681003
2042 11:52:16.687154 board_setup: Info: SDHCI controller not present; skipping
2043 11:52:16.687550
2044 11:52:16.693949 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2045 11:52:16.694430
2046 11:52:16.694745 Wipe memory regions:
2047 11:52:16.695039
2048 11:52:16.697484 [0x00000000001000, 0x000000000a0000)
2049 11:52:16.697898
2050 11:52:16.700856 [0x00000000100000, 0x00000030000000)
2051 11:52:16.766743
2052 11:52:16.770074 [0x00000030657430, 0x00000099a2c000)
2053 11:52:16.907715
2054 11:52:16.910561 [0x00000100000000, 0x0000045e800000)
2055 11:52:18.293297
2056 11:52:18.293859 R8152: Initializing
2057 11:52:18.294329
2058 11:52:18.296271 Version 9 (ocp_data = 6010)
2059 11:52:18.300647
2060 11:52:18.301067 R8152: Done initializing
2061 11:52:18.301410
2062 11:52:18.303964 Adding net device
2063 11:52:18.913471
2064 11:52:18.914013 R8152: Initializing
2065 11:52:18.914418
2066 11:52:18.916623 Version 6 (ocp_data = 5c30)
2067 11:52:18.917104
2068 11:52:18.919911 R8152: Done initializing
2069 11:52:18.920387
2070 11:52:18.923209 net_add_device: Attemp to include the same device
2071 11:52:18.926870
2072 11:52:18.934409 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 11:52:18.934877
2074 11:52:18.935203
2075 11:52:18.935501
2076 11:52:18.936335 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 11:52:19.037452 hatch: tftpboot 192.168.201.1 10875879/tftp-deploy-d996mibc/kernel/bzImage 10875879/tftp-deploy-d996mibc/kernel/cmdline 10875879/tftp-deploy-d996mibc/ramdisk/ramdisk.cpio.gz
2079 11:52:19.038058 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 11:52:19.038505 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2081 11:52:19.042989 tftpboot 192.168.201.1 10875879/tftp-deploy-d996mibc/kernel/bzImloy-d996mibc/kernel/cmdline 10875879/tftp-deploy-d996mibc/ramdisk/ramdisk.cpio.gz
2082 11:52:19.043422
2083 11:52:19.043794 Waiting for link
2084 11:52:19.243736
2085 11:52:19.244255 done.
2086 11:52:19.244596
2087 11:52:19.245041 MAC: 00:24:32:50:1a:5f
2088 11:52:19.245431
2089 11:52:19.247279 Sending DHCP discover... done.
2090 11:52:19.247748
2091 11:52:19.250605 Waiting for reply... done.
2092 11:52:19.251077
2093 11:52:19.253746 Sending DHCP request... done.
2094 11:52:19.254169
2095 11:52:19.262095 Waiting for reply... done.
2096 11:52:19.262539
2097 11:52:19.262927 My ip is 192.168.201.21
2098 11:52:19.263282
2099 11:52:19.265330 The DHCP server ip is 192.168.201.1
2100 11:52:19.268635
2101 11:52:19.271879 TFTP server IP predefined by user: 192.168.201.1
2102 11:52:19.272440
2103 11:52:19.278850 Bootfile predefined by user: 10875879/tftp-deploy-d996mibc/kernel/bzImage
2104 11:52:19.279274
2105 11:52:19.281747 Sending tftp read request... done.
2106 11:52:19.282172
2107 11:52:19.290200 Waiting for the transfer...
2108 11:52:19.290625
2109 11:52:19.900425 00000000 ################################################################
2110 11:52:19.900574
2111 11:52:20.514445 00080000 ################################################################
2112 11:52:20.515103
2113 11:52:21.123807 00100000 ################################################################
2114 11:52:21.124370
2115 11:52:21.776276 00180000 ################################################################
2116 11:52:21.776787
2117 11:52:22.448042 00200000 ################################################################
2118 11:52:22.448272
2119 11:52:23.058023 00280000 ################################################################
2120 11:52:23.058203
2121 11:52:23.671399 00300000 ################################################################
2122 11:52:23.671937
2123 11:52:24.270910 00380000 ################################################################
2124 11:52:24.271123
2125 11:52:24.835816 00400000 ################################################################
2126 11:52:24.835954
2127 11:52:25.419300 00480000 ################################################################
2128 11:52:25.419467
2129 11:52:26.057418 00500000 ################################################################
2130 11:52:26.057548
2131 11:52:26.697696 00580000 ################################################################
2132 11:52:26.697839
2133 11:52:27.326013 00600000 ################################################################
2134 11:52:27.326209
2135 11:52:27.970735 00680000 ################################################################
2136 11:52:27.971261
2137 11:52:28.632514 00700000 ################################################################
2138 11:52:28.632650
2139 11:52:29.270431 00780000 ################################################################
2140 11:52:29.271020
2141 11:52:29.917509 00800000 ################################################################
2142 11:52:29.917651
2143 11:52:30.552313 00880000 ################################################################
2144 11:52:30.552456
2145 11:52:31.190083 00900000 ################################################################
2146 11:52:31.190242
2147 11:52:31.795699 00980000 ################################################################
2148 11:52:31.795838
2149 11:52:32.225592 00a00000 ############################################## done.
2150 11:52:32.225817
2151 11:52:32.228860 The bootfile was 10859008 bytes long.
2152 11:52:32.229038
2153 11:52:32.232332 Sending tftp read request... done.
2154 11:52:32.232537
2155 11:52:32.235540 Waiting for the transfer...
2156 11:52:32.235759
2157 11:52:32.846823 00000000 ################################################################
2158 11:52:32.846974
2159 11:52:33.479468 00080000 ################################################################
2160 11:52:33.480026
2161 11:52:34.109961 00100000 ################################################################
2162 11:52:34.110120
2163 11:52:34.666633 00180000 ################################################################
2164 11:52:34.666782
2165 11:52:35.217367 00200000 ################################################################
2166 11:52:35.217514
2167 11:52:35.796470 00280000 ################################################################
2168 11:52:35.796614
2169 11:52:36.367445 00300000 ################################################################
2170 11:52:36.367632
2171 11:52:36.927752 00380000 ################################################################
2172 11:52:36.927896
2173 11:52:37.500850 00400000 ################################################################
2174 11:52:37.501451
2175 11:52:38.120845 00480000 ################################################################
2176 11:52:38.120993
2177 11:52:38.668075 00500000 ################################################################
2178 11:52:38.668223
2179 11:52:39.090224 00580000 ################################################ done.
2180 11:52:39.090390
2181 11:52:39.093377 Sending tftp read request... done.
2182 11:52:39.093463
2183 11:52:39.096616 Waiting for the transfer...
2184 11:52:39.096702
2185 11:52:39.096769 00000000 # done.
2186 11:52:39.096834
2187 11:52:39.106873 Command line loaded dynamically from TFTP file: 10875879/tftp-deploy-d996mibc/kernel/cmdline
2188 11:52:39.106958
2189 11:52:39.133287 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10875879/extract-nfsrootfs-drnv7c_t,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2190 11:52:39.133389
2191 11:52:39.139858 ec_init(0): CrosEC protocol v3 supported (256, 256)
2192 11:52:39.143750
2193 11:52:39.146950 Shutting down all USB controllers.
2194 11:52:39.147034
2195 11:52:39.147100 Removing current net device
2196 11:52:39.154669
2197 11:52:39.154780 Finalizing coreboot
2198 11:52:39.154876
2199 11:52:39.161583 Exiting depthcharge with code 4 at timestamp: 29867638
2200 11:52:39.161667
2201 11:52:39.161736
2202 11:52:39.161804 Starting kernel ...
2203 11:52:39.161866
2204 11:52:39.161924
2205 11:52:39.162295 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2206 11:52:39.162400 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2207 11:52:39.162477 Setting prompt string to ['Linux version [0-9]']
2208 11:52:39.162548 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2209 11:52:39.162617 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2211 11:56:58.163294 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2213 11:56:58.164375 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2215 11:56:58.165266 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2218 11:56:58.166583 end: 2 depthcharge-action (duration 00:05:00) [common]
2220 11:56:58.167804 Cleaning after the job
2221 11:56:58.168243 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/ramdisk
2222 11:56:58.171822 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/kernel
2223 11:56:58.177532 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/nfsrootfs
2224 11:56:58.272457 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875879/tftp-deploy-d996mibc/modules
2225 11:56:58.273174 start: 4.1 power-off (timeout 00:00:30) [common]
2226 11:56:58.273470 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2227 11:56:58.354237 >> Command sent successfully.
2228 11:56:58.364161 Returned 0 in 0 seconds
2229 11:56:58.465479 end: 4.1 power-off (duration 00:00:00) [common]
2231 11:56:58.467254 start: 4.2 read-feedback (timeout 00:10:00) [common]
2232 11:56:58.468611 Listened to connection for namespace 'common' for up to 1s
2234 11:56:58.470204 Listened to connection for namespace 'common' for up to 1s
2235 11:56:59.469307 Finalising connection for namespace 'common'
2236 11:56:59.469924 Disconnecting from shell: Finalise
2237 11:56:59.470305
2238 11:56:59.571107 end: 4.2 read-feedback (duration 00:00:01) [common]
2239 11:56:59.571247 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10875879
2240 11:57:00.035224 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10875879
2241 11:57:00.035416 JobError: Your job cannot terminate cleanly.