Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:51:41.804258 lava-dispatcher, installed at version: 2023.05.1
2 11:51:41.804474 start: 0 validate
3 11:51:41.804609 Start time: 2023-06-23 11:51:41.804598+00:00 (UTC)
4 11:51:41.804744 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:51:41.804931 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230609.0%2Famd64%2Finitrd.cpio.gz exists
6 11:51:42.062679 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:51:42.062870 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:51:45.563070 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:51:45.563241 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230609.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:51:45.564305 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:51:45.564428 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:51:46.569499 validate duration: 4.76
14 11:51:46.569833 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:51:46.569947 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:51:46.570038 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:51:46.570167 Not decompressing ramdisk as can be used compressed.
18 11:51:46.570258 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230609.0/amd64/initrd.cpio.gz
19 11:51:46.570324 saving as /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/ramdisk/initrd.cpio.gz
20 11:51:46.570384 total size: 5671432 (5MB)
21 11:51:46.571795 progress 0% (0MB)
22 11:51:46.573789 progress 5% (0MB)
23 11:51:46.575476 progress 10% (0MB)
24 11:51:46.577197 progress 15% (0MB)
25 11:51:46.579060 progress 20% (1MB)
26 11:51:46.580763 progress 25% (1MB)
27 11:51:46.582329 progress 30% (1MB)
28 11:51:46.584072 progress 35% (1MB)
29 11:51:46.585857 progress 40% (2MB)
30 11:51:46.587373 progress 45% (2MB)
31 11:51:46.589207 progress 50% (2MB)
32 11:51:46.590933 progress 55% (3MB)
33 11:51:46.592602 progress 60% (3MB)
34 11:51:46.594363 progress 65% (3MB)
35 11:51:46.596021 progress 70% (3MB)
36 11:51:46.597477 progress 75% (4MB)
37 11:51:46.599133 progress 80% (4MB)
38 11:51:46.600877 progress 85% (4MB)
39 11:51:46.602279 progress 90% (4MB)
40 11:51:46.603868 progress 95% (5MB)
41 11:51:46.605533 progress 100% (5MB)
42 11:51:46.605651 5MB downloaded in 0.04s (153.38MB/s)
43 11:51:46.605806 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:51:46.606039 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:51:46.606133 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:51:46.606215 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:51:46.606344 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:51:46.606414 saving as /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/kernel/bzImage
50 11:51:46.606497 total size: 10859008 (10MB)
51 11:51:46.606584 No compression specified
52 11:51:46.608244 progress 0% (0MB)
53 11:51:46.611138 progress 5% (0MB)
54 11:51:46.614424 progress 10% (1MB)
55 11:51:46.617282 progress 15% (1MB)
56 11:51:46.620172 progress 20% (2MB)
57 11:51:46.622900 progress 25% (2MB)
58 11:51:46.625796 progress 30% (3MB)
59 11:51:46.628515 progress 35% (3MB)
60 11:51:46.631398 progress 40% (4MB)
61 11:51:46.634296 progress 45% (4MB)
62 11:51:46.637027 progress 50% (5MB)
63 11:51:46.639910 progress 55% (5MB)
64 11:51:46.642641 progress 60% (6MB)
65 11:51:46.645529 progress 65% (6MB)
66 11:51:46.648221 progress 70% (7MB)
67 11:51:46.651172 progress 75% (7MB)
68 11:51:46.654126 progress 80% (8MB)
69 11:51:46.656945 progress 85% (8MB)
70 11:51:46.659843 progress 90% (9MB)
71 11:51:46.662605 progress 95% (9MB)
72 11:51:46.665888 progress 100% (10MB)
73 11:51:46.666154 10MB downloaded in 0.06s (173.61MB/s)
74 11:51:46.666381 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:51:46.666775 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:51:46.666916 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:51:46.667052 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:51:46.667239 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230609.0/amd64/full.rootfs.tar.xz
80 11:51:46.667348 saving as /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/nfsrootfs/full.rootfs.tar
81 11:51:46.667446 total size: 125989320 (120MB)
82 11:51:46.667550 Using unxz to decompress xz
83 11:51:46.671859 progress 0% (0MB)
84 11:51:47.191983 progress 5% (6MB)
85 11:51:47.706527 progress 10% (12MB)
86 11:51:48.218070 progress 15% (18MB)
87 11:51:48.741262 progress 20% (24MB)
88 11:51:49.107556 progress 25% (30MB)
89 11:51:49.465763 progress 30% (36MB)
90 11:51:49.761978 progress 35% (42MB)
91 11:51:49.958339 progress 40% (48MB)
92 11:51:50.341143 progress 45% (54MB)
93 11:51:50.726547 progress 50% (60MB)
94 11:51:51.083697 progress 55% (66MB)
95 11:51:51.462884 progress 60% (72MB)
96 11:51:51.821419 progress 65% (78MB)
97 11:51:52.227932 progress 70% (84MB)
98 11:51:52.650539 progress 75% (90MB)
99 11:51:53.084951 progress 80% (96MB)
100 11:51:53.193843 progress 85% (102MB)
101 11:51:53.363541 progress 90% (108MB)
102 11:51:53.741044 progress 95% (114MB)
103 11:51:54.160717 progress 100% (120MB)
104 11:51:54.169303 120MB downloaded in 7.50s (16.02MB/s)
105 11:51:54.169677 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:51:54.170094 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:51:54.170219 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:51:54.170344 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:51:54.170519 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:51:54.170619 saving as /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/modules/modules.tar
112 11:51:54.170711 total size: 483808 (0MB)
113 11:51:54.170805 Using unxz to decompress xz
114 11:51:54.174683 progress 6% (0MB)
115 11:51:54.175110 progress 13% (0MB)
116 11:51:54.175383 progress 20% (0MB)
117 11:51:54.176672 progress 27% (0MB)
118 11:51:54.178847 progress 33% (0MB)
119 11:51:54.181051 progress 40% (0MB)
120 11:51:54.183216 progress 47% (0MB)
121 11:51:54.185304 progress 54% (0MB)
122 11:51:54.187983 progress 60% (0MB)
123 11:51:54.190606 progress 67% (0MB)
124 11:51:54.192799 progress 74% (0MB)
125 11:51:54.194865 progress 81% (0MB)
126 11:51:54.197019 progress 88% (0MB)
127 11:51:54.199041 progress 94% (0MB)
128 11:51:54.201105 progress 100% (0MB)
129 11:51:54.207458 0MB downloaded in 0.04s (12.56MB/s)
130 11:51:54.207776 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:51:54.208175 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:51:54.208303 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 11:51:54.208431 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 11:51:57.410101 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10875880/extract-nfsrootfs-0tspt8bc
136 11:51:57.410332 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:51:57.410481 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 11:51:57.410711 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1
139 11:51:57.410906 makedir: /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin
140 11:51:57.411052 makedir: /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/tests
141 11:51:57.411198 makedir: /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/results
142 11:51:57.411345 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-add-keys
143 11:51:57.411548 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-add-sources
144 11:51:57.411732 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-background-process-start
145 11:51:57.411897 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-background-process-stop
146 11:51:57.412054 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-common-functions
147 11:51:57.412208 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-echo-ipv4
148 11:51:57.412362 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-install-packages
149 11:51:57.412515 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-installed-packages
150 11:51:57.412668 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-os-build
151 11:51:57.413070 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-probe-channel
152 11:51:57.413204 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-probe-ip
153 11:51:57.413327 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-target-ip
154 11:51:57.413451 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-target-mac
155 11:51:57.413571 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-target-storage
156 11:51:57.413698 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-test-case
157 11:51:57.413817 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-test-event
158 11:51:57.413935 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-test-feedback
159 11:51:57.414054 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-test-raise
160 11:51:57.414173 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-test-reference
161 11:51:57.414292 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-test-runner
162 11:51:57.414411 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-test-set
163 11:51:57.414543 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-test-shell
164 11:51:57.414665 Updating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-install-packages (oe)
165 11:51:57.414812 Updating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/bin/lava-installed-packages (oe)
166 11:51:57.414946 Creating /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/environment
167 11:51:57.415047 LAVA metadata
168 11:51:57.415117 - LAVA_JOB_ID=10875880
169 11:51:57.415179 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:51:57.415295 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
171 11:51:57.415361 skipped lava-vland-overlay
172 11:51:57.415438 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:51:57.415524 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
174 11:51:57.415587 skipped lava-multinode-overlay
175 11:51:57.415659 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:51:57.415735 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
177 11:51:57.415811 Loading test definitions
178 11:51:57.415902 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
179 11:51:57.415969 Using /lava-10875880 at stage 0
180 11:51:57.416063 Fetching tests from https://github.com/kernelci/test-definitions
181 11:51:57.416139 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/0/tests/0_ltp-ipc'
182 11:52:01.298821 Running '/usr/bin/git checkout kernelci.org
183 11:52:01.448307 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 11:52:01.449360 uuid=10875880_1.5.2.3.1 testdef=None
185 11:52:01.449554 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
187 11:52:01.449929 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
188 11:52:01.451315 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 11:52:01.451711 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
191 11:52:01.453174 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 11:52:01.453549 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
194 11:52:01.455378 runner path: /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/0/tests/0_ltp-ipc test_uuid 10875880_1.5.2.3.1
195 11:52:01.455504 SKIPFILE='skipfile-lkft.yaml'
196 11:52:01.455598 SKIP_INSTALL='true'
197 11:52:01.455691 TST_CMDFILES='ipc'
198 11:52:01.455880 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 11:52:01.456108 Creating lava-test-runner.conf files
201 11:52:01.456179 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10875880/lava-overlay-ucuikvb1/lava-10875880/0 for stage 0
202 11:52:01.456272 - 0_ltp-ipc
203 11:52:01.456396 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
204 11:52:01.456525 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
205 11:52:09.235654 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 11:52:09.235817 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
207 11:52:09.235911 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 11:52:09.236013 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
209 11:52:09.236104 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
210 11:52:09.386490 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 11:52:09.386860 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
212 11:52:09.386976 extracting modules file /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875880/extract-nfsrootfs-0tspt8bc
213 11:52:09.412767 extracting modules file /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875880/extract-overlay-ramdisk-yv4v4dg0/ramdisk
214 11:52:09.435663 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 11:52:09.435865 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
216 11:52:09.435976 [common] Applying overlay to NFS
217 11:52:09.436078 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10875880/compress-overlay-_lk4fdq2/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10875880/extract-nfsrootfs-0tspt8bc
218 11:52:10.387962 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 11:52:10.388138 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
220 11:52:10.388236 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 11:52:10.388329 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
222 11:52:10.388414 Building ramdisk /var/lib/lava/dispatcher/tmp/10875880/extract-overlay-ramdisk-yv4v4dg0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10875880/extract-overlay-ramdisk-yv4v4dg0/ramdisk
223 11:52:10.727525 >> 31370 blocks
224 11:52:11.386035 rename /var/lib/lava/dispatcher/tmp/10875880/extract-overlay-ramdisk-yv4v4dg0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/ramdisk/ramdisk.cpio.gz
225 11:52:11.386508 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 11:52:11.386624 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
227 11:52:11.386724 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
228 11:52:11.386847 No mkimage arch provided, not using FIT.
229 11:52:11.386937 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 11:52:11.387017 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 11:52:11.387123 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
232 11:52:11.387211 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
233 11:52:11.387291 No LXC device requested
234 11:52:11.387373 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 11:52:11.387460 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
236 11:52:11.387546 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 11:52:11.387614 Checking files for TFTP limit of 4294967296 bytes.
238 11:52:11.388036 end: 1 tftp-deploy (duration 00:00:25) [common]
239 11:52:11.388143 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 11:52:11.388233 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 11:52:11.388357 substitutions:
242 11:52:11.388423 - {DTB}: None
243 11:52:11.388485 - {INITRD}: 10875880/tftp-deploy-94oxugl9/ramdisk/ramdisk.cpio.gz
244 11:52:11.388545 - {KERNEL}: 10875880/tftp-deploy-94oxugl9/kernel/bzImage
245 11:52:11.388602 - {LAVA_MAC}: None
246 11:52:11.388659 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10875880/extract-nfsrootfs-0tspt8bc
247 11:52:11.388718 - {NFS_SERVER_IP}: 192.168.201.1
248 11:52:11.388774 - {PRESEED_CONFIG}: None
249 11:52:11.388850 - {PRESEED_LOCAL}: None
250 11:52:11.388904 - {RAMDISK}: 10875880/tftp-deploy-94oxugl9/ramdisk/ramdisk.cpio.gz
251 11:52:11.388958 - {ROOT_PART}: None
252 11:52:11.389011 - {ROOT}: None
253 11:52:11.389064 - {SERVER_IP}: 192.168.201.1
254 11:52:11.389117 - {TEE}: None
255 11:52:11.389170 Parsed boot commands:
256 11:52:11.389221 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 11:52:11.389405 Parsed boot commands: tftpboot 192.168.201.1 10875880/tftp-deploy-94oxugl9/kernel/bzImage 10875880/tftp-deploy-94oxugl9/kernel/cmdline 10875880/tftp-deploy-94oxugl9/ramdisk/ramdisk.cpio.gz
258 11:52:11.389496 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 11:52:11.389584 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 11:52:11.389679 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 11:52:11.389790 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 11:52:11.389861 Not connected, no need to disconnect.
263 11:52:11.389935 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 11:52:11.390017 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 11:52:11.390085 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
266 11:52:11.393501 Setting prompt string to ['lava-test: # ']
267 11:52:11.393939 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 11:52:11.394055 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 11:52:11.394182 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 11:52:11.394314 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 11:52:11.394529 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
272 11:52:16.534718 >> Command sent successfully.
273 11:52:16.537585 Returned 0 in 5 seconds
274 11:52:16.638321 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 11:52:16.639849 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 11:52:16.640375 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 11:52:16.640860 Setting prompt string to 'Starting depthcharge on Helios...'
279 11:52:16.641261 Changing prompt to 'Starting depthcharge on Helios...'
280 11:52:16.641631 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
281 11:52:16.642738 [Enter `^Ec?' for help]
282 11:52:17.258773
283 11:52:17.259298
284 11:52:17.269214 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
285 11:52:17.272448 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
286 11:52:17.279071 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
287 11:52:17.282239 CPU: AES supported, TXT NOT supported, VT supported
288 11:52:17.288734 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
289 11:52:17.292620 PCH: device id 0284 (rev 00) is Cometlake-U Premium
290 11:52:17.299703 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
291 11:52:17.303016 VBOOT: Loading verstage.
292 11:52:17.306202 FMAP: Found "FLASH" version 1.1 at 0xc04000.
293 11:52:17.312840 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
294 11:52:17.316066 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
295 11:52:17.319499 CBFS @ c08000 size 3f8000
296 11:52:17.325915 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
297 11:52:17.329143 CBFS: Locating 'fallback/verstage'
298 11:52:17.332453 CBFS: Found @ offset 10fb80 size 1072c
299 11:52:17.333042
300 11:52:17.333549
301 11:52:17.345869 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
302 11:52:17.359342 Probing TPM: . done!
303 11:52:17.362661 TPM ready after 0 ms
304 11:52:17.366125 Connected to device vid:did:rid of 1ae0:0028:00
305 11:52:17.376716 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
306 11:52:17.380126 Initialized TPM device CR50 revision 0
307 11:52:17.424376 tlcl_send_startup: Startup return code is 0
308 11:52:17.424863 TPM: setup succeeded
309 11:52:17.437101 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
310 11:52:17.441072 Chrome EC: UHEPI supported
311 11:52:17.444298 Phase 1
312 11:52:17.447746 FMAP: area GBB found @ c05000 (12288 bytes)
313 11:52:17.454412 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
314 11:52:17.454904 Phase 2
315 11:52:17.457765 Phase 3
316 11:52:17.461213 FMAP: area GBB found @ c05000 (12288 bytes)
317 11:52:17.467291 VB2:vb2_report_dev_firmware() This is developer signed firmware
318 11:52:17.474452 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
319 11:52:17.477818 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 11:52:17.484148 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 11:52:17.499967 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
322 11:52:17.503207 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 11:52:17.509658 VB2:vb2_verify_fw_preamble() Verifying preamble.
324 11:52:17.514147 Phase 4
325 11:52:17.517467 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
326 11:52:17.523998 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
327 11:52:17.703244 VB2:vb2_rsa_verify_digest() Digest check failed!
328 11:52:17.709926 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
329 11:52:17.710497 Saving nvdata
330 11:52:17.713200 Reboot requested (10020007)
331 11:52:17.716376 board_reset() called!
332 11:52:17.716985 full_reset() called!
333 11:52:22.224951
334 11:52:22.225118
335 11:52:22.235421 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
336 11:52:22.238706 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
337 11:52:22.244877 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
338 11:52:22.248362 CPU: AES supported, TXT NOT supported, VT supported
339 11:52:22.255145 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
340 11:52:22.258624 PCH: device id 0284 (rev 00) is Cometlake-U Premium
341 11:52:22.264707 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
342 11:52:22.268056 VBOOT: Loading verstage.
343 11:52:22.271406 FMAP: Found "FLASH" version 1.1 at 0xc04000.
344 11:52:22.278253 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
345 11:52:22.284991 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 11:52:22.285098 CBFS @ c08000 size 3f8000
347 11:52:22.291643 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 11:52:22.294480 CBFS: Locating 'fallback/verstage'
349 11:52:22.297901 CBFS: Found @ offset 10fb80 size 1072c
350 11:52:22.301847
351 11:52:22.301932
352 11:52:22.312011 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
353 11:52:22.326062 Probing TPM: . done!
354 11:52:22.329293 TPM ready after 0 ms
355 11:52:22.332714 Connected to device vid:did:rid of 1ae0:0028:00
356 11:52:22.343152 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
357 11:52:22.346538 Initialized TPM device CR50 revision 0
358 11:52:22.391167 tlcl_send_startup: Startup return code is 0
359 11:52:22.391304 TPM: setup succeeded
360 11:52:22.404261 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
361 11:52:22.407599 Chrome EC: UHEPI supported
362 11:52:22.411005 Phase 1
363 11:52:22.414333 FMAP: area GBB found @ c05000 (12288 bytes)
364 11:52:22.421011 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
365 11:52:22.427818 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
366 11:52:22.431339 Recovery requested (1009000e)
367 11:52:22.436409 Saving nvdata
368 11:52:22.442675 tlcl_extend: response is 0
369 11:52:22.451505 tlcl_extend: response is 0
370 11:52:22.458385 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
371 11:52:22.461772 CBFS @ c08000 size 3f8000
372 11:52:22.468713 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
373 11:52:22.472443 CBFS: Locating 'fallback/romstage'
374 11:52:22.475150 CBFS: Found @ offset 80 size 145fc
375 11:52:22.478500 Accumulated console time in verstage 98 ms
376 11:52:22.478616
377 11:52:22.478710
378 11:52:22.491902 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
379 11:52:22.498178 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
380 11:52:22.501612 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
381 11:52:22.504886 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
382 11:52:22.511913 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
383 11:52:22.514607 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
384 11:52:22.517879 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
385 11:52:22.521339 TCO_STS: 0000 0000
386 11:52:22.524560 GEN_PMCON: e0015238 00000200
387 11:52:22.528224 GBLRST_CAUSE: 00000000 00000000
388 11:52:22.528337 prev_sleep_state 5
389 11:52:22.531720 Boot Count incremented to 59624
390 11:52:22.538503 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 11:52:22.541739 CBFS @ c08000 size 3f8000
392 11:52:22.548535 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
393 11:52:22.548676 CBFS: Locating 'fspm.bin'
394 11:52:22.551832 CBFS: Found @ offset 5ffc0 size 71000
395 11:52:22.555958 Chrome EC: UHEPI supported
396 11:52:22.562849 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
397 11:52:22.568242 Probing TPM: done!
398 11:52:22.575121 Connected to device vid:did:rid of 1ae0:0028:00
399 11:52:22.585312 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
400 11:52:22.590665 Initialized TPM device CR50 revision 0
401 11:52:22.599540 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
402 11:52:22.606582 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 11:52:22.609476 MRC cache found, size 1948
404 11:52:22.612875 bootmode is set to: 2
405 11:52:22.616345 PRMRR disabled by config.
406 11:52:22.619669 SPD INDEX = 1
407 11:52:22.623057 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 11:52:22.626520 CBFS @ c08000 size 3f8000
409 11:52:22.632664 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 11:52:22.632777 CBFS: Locating 'spd.bin'
411 11:52:22.636379 CBFS: Found @ offset 5fb80 size 400
412 11:52:22.639789 SPD: module type is LPDDR3
413 11:52:22.642404 SPD: module part is
414 11:52:22.649199 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 11:52:22.652537 SPD: device width 4 bits, bus width 8 bits
416 11:52:22.655859 SPD: module size is 4096 MB (per channel)
417 11:52:22.659259 memory slot: 0 configuration done.
418 11:52:22.662739 memory slot: 2 configuration done.
419 11:52:22.714420 CBMEM:
420 11:52:22.717942 IMD: root @ 99fff000 254 entries.
421 11:52:22.721452 IMD: root @ 99ffec00 62 entries.
422 11:52:22.724359 External stage cache:
423 11:52:22.727657 IMD: root @ 9abff000 254 entries.
424 11:52:22.731253 IMD: root @ 9abfec00 62 entries.
425 11:52:22.734665 Chrome EC: clear events_b mask to 0x0000000020004000
426 11:52:22.750240 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 11:52:22.763616 tlcl_write: response is 0
428 11:52:22.773113 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 11:52:22.779376 MRC: TPM MRC hash updated successfully.
430 11:52:22.779491 2 DIMMs found
431 11:52:22.782732 SMM Memory Map
432 11:52:22.786287 SMRAM : 0x9a000000 0x1000000
433 11:52:22.789653 Subregion 0: 0x9a000000 0xa00000
434 11:52:22.793084 Subregion 1: 0x9aa00000 0x200000
435 11:52:22.796438 Subregion 2: 0x9ac00000 0x400000
436 11:52:22.799286 top_of_ram = 0x9a000000
437 11:52:22.802628 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 11:52:22.809310 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 11:52:22.812594 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 11:52:22.819494 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 11:52:22.822937 CBFS @ c08000 size 3f8000
442 11:52:22.825765 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 11:52:22.829129 CBFS: Locating 'fallback/postcar'
444 11:52:22.836113 CBFS: Found @ offset 107000 size 4b44
445 11:52:22.839590 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 11:52:22.852095 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 11:52:22.855400 Processing 180 relocs. Offset value of 0x97c0c000
448 11:52:22.863617 Accumulated console time in romstage 285 ms
449 11:52:22.863759
450 11:52:22.863858
451 11:52:22.873551 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 11:52:22.880311 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 11:52:22.883742 CBFS @ c08000 size 3f8000
454 11:52:22.886574 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 11:52:22.893384 CBFS: Locating 'fallback/ramstage'
456 11:52:22.896863 CBFS: Found @ offset 43380 size 1b9e8
457 11:52:22.903649 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 11:52:22.935250 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 11:52:22.938655 Processing 3976 relocs. Offset value of 0x98db0000
460 11:52:22.945529 Accumulated console time in postcar 52 ms
461 11:52:22.945626
462 11:52:22.945725
463 11:52:22.955077 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
464 11:52:22.961822 FMAP: area RO_VPD found @ c00000 (16384 bytes)
465 11:52:22.965295 WARNING: RO_VPD is uninitialized or empty.
466 11:52:22.968686 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 11:52:22.975556 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 11:52:22.975645 Normal boot.
469 11:52:22.981539 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
470 11:52:22.985471 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 11:52:22.988222 CBFS @ c08000 size 3f8000
472 11:52:22.995782 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 11:52:22.998657 CBFS: Locating 'cpu_microcode_blob.bin'
474 11:52:23.001417 CBFS: Found @ offset 14700 size 2ec00
475 11:52:23.004907 microcode: sig=0x806ec pf=0x4 revision=0xc9
476 11:52:23.008334 Skip microcode update
477 11:52:23.015170 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
478 11:52:23.015260 CBFS @ c08000 size 3f8000
479 11:52:23.021198 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 11:52:23.024957 CBFS: Locating 'fsps.bin'
481 11:52:23.028157 CBFS: Found @ offset d1fc0 size 35000
482 11:52:23.053678 Detected 4 core, 8 thread CPU.
483 11:52:23.056813 Setting up SMI for CPU
484 11:52:23.060167 IED base = 0x9ac00000
485 11:52:23.060254 IED size = 0x00400000
486 11:52:23.063565 Will perform SMM setup.
487 11:52:23.069867 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 11:52:23.076637 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 11:52:23.080026 Processing 16 relocs. Offset value of 0x00030000
490 11:52:23.083518 Attempting to start 7 APs
491 11:52:23.086968 Waiting for 10ms after sending INIT.
492 11:52:23.103497 Waiting for 1st SIPI to complete...done.
493 11:52:23.103633 AP: slot 7 apic_id 6.
494 11:52:23.106343 AP: slot 6 apic_id 7.
495 11:52:23.109584 AP: slot 3 apic_id 2.
496 11:52:23.109673 AP: slot 2 apic_id 3.
497 11:52:23.116533 Waiting for 2nd SIPI to complete...done.
498 11:52:23.116615 AP: slot 1 apic_id 1.
499 11:52:23.120004 AP: slot 4 apic_id 4.
500 11:52:23.123359 AP: slot 5 apic_id 5.
501 11:52:23.129487 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 11:52:23.136402 Processing 13 relocs. Offset value of 0x00038000
503 11:52:23.139741 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 11:52:23.145853 Installing SMM handler to 0x9a000000
505 11:52:23.152713 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 11:52:23.159506 Processing 658 relocs. Offset value of 0x9a010000
507 11:52:23.166329 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 11:52:23.169804 Processing 13 relocs. Offset value of 0x9a008000
509 11:52:23.175791 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 11:52:23.182718 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 11:52:23.188994 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 11:52:23.192483 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 11:52:23.199198 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 11:52:23.205867 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 11:52:23.209360 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 11:52:23.215604 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 11:52:23.219004 Clearing SMI status registers
518 11:52:23.222493 SMI_STS: PM1
519 11:52:23.222588 PM1_STS: PWRBTN
520 11:52:23.225788 TCO_STS: SECOND_TO
521 11:52:23.229225 New SMBASE 0x9a000000
522 11:52:23.232587 In relocation handler: CPU 0
523 11:52:23.235909 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
524 11:52:23.238811 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 11:52:23.242333 Relocation complete.
526 11:52:23.245650 New SMBASE 0x99fffc00
527 11:52:23.245738 In relocation handler: CPU 1
528 11:52:23.252372 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
529 11:52:23.255884 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 11:52:23.259213 Relocation complete.
531 11:52:23.262655 New SMBASE 0x99fff400
532 11:52:23.262773 In relocation handler: CPU 3
533 11:52:23.269301 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
534 11:52:23.272584 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 11:52:23.275537 Relocation complete.
536 11:52:23.275626 New SMBASE 0x99fff800
537 11:52:23.278896 In relocation handler: CPU 2
538 11:52:23.285583 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
539 11:52:23.288887 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 11:52:23.292428 Relocation complete.
541 11:52:23.292511 New SMBASE 0x99ffe400
542 11:52:23.295934 In relocation handler: CPU 7
543 11:52:23.299282 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
544 11:52:23.305278 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 11:52:23.308645 Relocation complete.
546 11:52:23.308752 New SMBASE 0x99ffe800
547 11:52:23.312036 In relocation handler: CPU 6
548 11:52:23.315383 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
549 11:52:23.322349 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 11:52:23.325718 Relocation complete.
551 11:52:23.325799 New SMBASE 0x99ffec00
552 11:52:23.329099 In relocation handler: CPU 5
553 11:52:23.332603 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
554 11:52:23.338763 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 11:52:23.338868 Relocation complete.
556 11:52:23.342031 New SMBASE 0x99fff000
557 11:52:23.345707 In relocation handler: CPU 4
558 11:52:23.348483 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
559 11:52:23.355105 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 11:52:23.355194 Relocation complete.
561 11:52:23.358566 Initializing CPU #0
562 11:52:23.361988 CPU: vendor Intel device 806ec
563 11:52:23.365240 CPU: family 06, model 8e, stepping 0c
564 11:52:23.368596 Clearing out pending MCEs
565 11:52:23.371840 Setting up local APIC...
566 11:52:23.371924 apic_id: 0x00 done.
567 11:52:23.375338 Turbo is available but hidden
568 11:52:23.378715 Turbo is available and visible
569 11:52:23.382167 VMX status: enabled
570 11:52:23.385526 IA32_FEATURE_CONTROL status: locked
571 11:52:23.388354 Skip microcode update
572 11:52:23.388436 CPU #0 initialized
573 11:52:23.391693 Initializing CPU #1
574 11:52:23.391776 Initializing CPU #7
575 11:52:23.394958 Initializing CPU #3
576 11:52:23.398602 Initializing CPU #2
577 11:52:23.402124 CPU: vendor Intel device 806ec
578 11:52:23.405551 CPU: family 06, model 8e, stepping 0c
579 11:52:23.408303 CPU: vendor Intel device 806ec
580 11:52:23.412189 CPU: family 06, model 8e, stepping 0c
581 11:52:23.415009 Clearing out pending MCEs
582 11:52:23.415099 Clearing out pending MCEs
583 11:52:23.418569 Setting up local APIC...
584 11:52:23.421934 CPU: vendor Intel device 806ec
585 11:52:23.425425 CPU: family 06, model 8e, stepping 0c
586 11:52:23.428106 Initializing CPU #4
587 11:52:23.431592 CPU: vendor Intel device 806ec
588 11:52:23.435150 CPU: family 06, model 8e, stepping 0c
589 11:52:23.438735 Clearing out pending MCEs
590 11:52:23.441428 CPU: vendor Intel device 806ec
591 11:52:23.444705 CPU: family 06, model 8e, stepping 0c
592 11:52:23.448109 Initializing CPU #5
593 11:52:23.448215 Clearing out pending MCEs
594 11:52:23.451543 CPU: vendor Intel device 806ec
595 11:52:23.454976 CPU: family 06, model 8e, stepping 0c
596 11:52:23.458249 Setting up local APIC...
597 11:52:23.461616 apic_id: 0x02 done.
598 11:52:23.465071 Setting up local APIC...
599 11:52:23.465160 apic_id: 0x04 done.
600 11:52:23.467869 Clearing out pending MCEs
601 11:52:23.471275 VMX status: enabled
602 11:52:23.471362 Setting up local APIC...
603 11:52:23.474585 Setting up local APIC...
604 11:52:23.477741 Initializing CPU #6
605 11:52:23.481176 Clearing out pending MCEs
606 11:52:23.481284 CPU: vendor Intel device 806ec
607 11:52:23.487956 CPU: family 06, model 8e, stepping 0c
608 11:52:23.488037 Setting up local APIC...
609 11:52:23.491393 apic_id: 0x05 done.
610 11:52:23.494792 IA32_FEATURE_CONTROL status: locked
611 11:52:23.497998 VMX status: enabled
612 11:52:23.498078 Skip microcode update
613 11:52:23.504659 IA32_FEATURE_CONTROL status: locked
614 11:52:23.504767 CPU #4 initialized
615 11:52:23.508164 Skip microcode update
616 11:52:23.508275 apic_id: 0x01 done.
617 11:52:23.510946 CPU #5 initialized
618 11:52:23.514611 VMX status: enabled
619 11:52:23.514720 VMX status: enabled
620 11:52:23.517854 apic_id: 0x03 done.
621 11:52:23.521284 IA32_FEATURE_CONTROL status: locked
622 11:52:23.524636 VMX status: enabled
623 11:52:23.524717 Skip microcode update
624 11:52:23.528145 IA32_FEATURE_CONTROL status: locked
625 11:52:23.530773 CPU #3 initialized
626 11:52:23.534224 Skip microcode update
627 11:52:23.537611 IA32_FEATURE_CONTROL status: locked
628 11:52:23.537691 CPU #2 initialized
629 11:52:23.541052 apic_id: 0x06 done.
630 11:52:23.544586 Clearing out pending MCEs
631 11:52:23.544663 VMX status: enabled
632 11:52:23.547348 Setting up local APIC...
633 11:52:23.550721 Skip microcode update
634 11:52:23.550797 apic_id: 0x07 done.
635 11:52:23.557680 IA32_FEATURE_CONTROL status: locked
636 11:52:23.557762 VMX status: enabled
637 11:52:23.560914 Skip microcode update
638 11:52:23.564419 IA32_FEATURE_CONTROL status: locked
639 11:52:23.564527 CPU #7 initialized
640 11:52:23.567698 Skip microcode update
641 11:52:23.570613 CPU #1 initialized
642 11:52:23.570716 CPU #6 initialized
643 11:52:23.577391 bsp_do_flight_plan done after 459 msecs.
644 11:52:23.580760 CPU: frequency set to 4200 MHz
645 11:52:23.580868 Enabling SMIs.
646 11:52:23.580937 Locking SMM.
647 11:52:23.596812 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
648 11:52:23.600255 CBFS @ c08000 size 3f8000
649 11:52:23.607104 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
650 11:52:23.607196 CBFS: Locating 'vbt.bin'
651 11:52:23.610235 CBFS: Found @ offset 5f5c0 size 499
652 11:52:23.617359 Found a VBT of 4608 bytes after decompression
653 11:52:23.803838 Display FSP Version Info HOB
654 11:52:23.807058 Reference Code - CPU = 9.0.1e.30
655 11:52:23.810290 uCode Version = 0.0.0.ca
656 11:52:23.813664 TXT ACM version = ff.ff.ff.ffff
657 11:52:23.817237 Display FSP Version Info HOB
658 11:52:23.820580 Reference Code - ME = 9.0.1e.30
659 11:52:23.823933 MEBx version = 0.0.0.0
660 11:52:23.827167 ME Firmware Version = Consumer SKU
661 11:52:23.830506 Display FSP Version Info HOB
662 11:52:23.833747 Reference Code - CML PCH = 9.0.1e.30
663 11:52:23.836558 PCH-CRID Status = Disabled
664 11:52:23.840024 PCH-CRID Original Value = ff.ff.ff.ffff
665 11:52:23.843462 PCH-CRID New Value = ff.ff.ff.ffff
666 11:52:23.846867 OPROM - RST - RAID = ff.ff.ff.ffff
667 11:52:23.850162 ChipsetInit Base Version = ff.ff.ff.ffff
668 11:52:23.853505 ChipsetInit Oem Version = ff.ff.ff.ffff
669 11:52:23.856841 Display FSP Version Info HOB
670 11:52:23.863090 Reference Code - SA - System Agent = 9.0.1e.30
671 11:52:23.866445 Reference Code - MRC = 0.7.1.6c
672 11:52:23.866575 SA - PCIe Version = 9.0.1e.30
673 11:52:23.870032 SA-CRID Status = Disabled
674 11:52:23.873507 SA-CRID Original Value = 0.0.0.c
675 11:52:23.876814 SA-CRID New Value = 0.0.0.c
676 11:52:23.880163 OPROM - VBIOS = ff.ff.ff.ffff
677 11:52:23.882912 RTC Init
678 11:52:23.886432 Set power on after power failure.
679 11:52:23.886546 Disabling Deep S3
680 11:52:23.889773 Disabling Deep S3
681 11:52:23.889885 Disabling Deep S4
682 11:52:23.893128 Disabling Deep S4
683 11:52:23.893237 Disabling Deep S5
684 11:52:23.896681 Disabling Deep S5
685 11:52:23.902975 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 197 exit 1
686 11:52:23.903088 Enumerating buses...
687 11:52:23.909538 Show all devs... Before device enumeration.
688 11:52:23.909655 Root Device: enabled 1
689 11:52:23.912860 CPU_CLUSTER: 0: enabled 1
690 11:52:23.916273 DOMAIN: 0000: enabled 1
691 11:52:23.919512 APIC: 00: enabled 1
692 11:52:23.919627 PCI: 00:00.0: enabled 1
693 11:52:23.922898 PCI: 00:02.0: enabled 1
694 11:52:23.926453 PCI: 00:04.0: enabled 0
695 11:52:23.929781 PCI: 00:05.0: enabled 0
696 11:52:23.929894 PCI: 00:12.0: enabled 1
697 11:52:23.933295 PCI: 00:12.5: enabled 0
698 11:52:23.936519 PCI: 00:12.6: enabled 0
699 11:52:23.936634 PCI: 00:14.0: enabled 1
700 11:52:23.939833 PCI: 00:14.1: enabled 0
701 11:52:23.942655 PCI: 00:14.3: enabled 1
702 11:52:23.946252 PCI: 00:14.5: enabled 0
703 11:52:23.946337 PCI: 00:15.0: enabled 1
704 11:52:23.949583 PCI: 00:15.1: enabled 1
705 11:52:23.952948 PCI: 00:15.2: enabled 0
706 11:52:23.956326 PCI: 00:15.3: enabled 0
707 11:52:23.956440 PCI: 00:16.0: enabled 1
708 11:52:23.959680 PCI: 00:16.1: enabled 0
709 11:52:23.962493 PCI: 00:16.2: enabled 0
710 11:52:23.966569 PCI: 00:16.3: enabled 0
711 11:52:23.966656 PCI: 00:16.4: enabled 0
712 11:52:23.969392 PCI: 00:16.5: enabled 0
713 11:52:23.972748 PCI: 00:17.0: enabled 1
714 11:52:23.976375 PCI: 00:19.0: enabled 1
715 11:52:23.976451 PCI: 00:19.1: enabled 0
716 11:52:23.979120 PCI: 00:19.2: enabled 0
717 11:52:23.982545 PCI: 00:1a.0: enabled 0
718 11:52:23.982630 PCI: 00:1c.0: enabled 0
719 11:52:23.985960 PCI: 00:1c.1: enabled 0
720 11:52:23.989483 PCI: 00:1c.2: enabled 0
721 11:52:23.992794 PCI: 00:1c.3: enabled 0
722 11:52:23.992886 PCI: 00:1c.4: enabled 0
723 11:52:23.995585 PCI: 00:1c.5: enabled 0
724 11:52:23.999137 PCI: 00:1c.6: enabled 0
725 11:52:24.002533 PCI: 00:1c.7: enabled 0
726 11:52:24.002619 PCI: 00:1d.0: enabled 1
727 11:52:24.006011 PCI: 00:1d.1: enabled 0
728 11:52:24.009468 PCI: 00:1d.2: enabled 0
729 11:52:24.012718 PCI: 00:1d.3: enabled 0
730 11:52:24.012798 PCI: 00:1d.4: enabled 0
731 11:52:24.016083 PCI: 00:1d.5: enabled 1
732 11:52:24.019521 PCI: 00:1e.0: enabled 1
733 11:52:24.019635 PCI: 00:1e.1: enabled 0
734 11:52:24.022246 PCI: 00:1e.2: enabled 1
735 11:52:24.026060 PCI: 00:1e.3: enabled 1
736 11:52:24.028952 PCI: 00:1f.0: enabled 1
737 11:52:24.029039 PCI: 00:1f.1: enabled 1
738 11:52:24.032468 PCI: 00:1f.2: enabled 1
739 11:52:24.035947 PCI: 00:1f.3: enabled 1
740 11:52:24.039270 PCI: 00:1f.4: enabled 1
741 11:52:24.039389 PCI: 00:1f.5: enabled 1
742 11:52:24.042530 PCI: 00:1f.6: enabled 0
743 11:52:24.046020 USB0 port 0: enabled 1
744 11:52:24.046133 I2C: 00:15: enabled 1
745 11:52:24.049230 I2C: 00:5d: enabled 1
746 11:52:24.052058 GENERIC: 0.0: enabled 1
747 11:52:24.055435 I2C: 00:1a: enabled 1
748 11:52:24.055543 I2C: 00:38: enabled 1
749 11:52:24.058731 I2C: 00:39: enabled 1
750 11:52:24.061965 I2C: 00:3a: enabled 1
751 11:52:24.062082 I2C: 00:3b: enabled 1
752 11:52:24.065530 PCI: 00:00.0: enabled 1
753 11:52:24.068798 SPI: 00: enabled 1
754 11:52:24.068891 SPI: 01: enabled 1
755 11:52:24.072285 PNP: 0c09.0: enabled 1
756 11:52:24.075805 USB2 port 0: enabled 1
757 11:52:24.075890 USB2 port 1: enabled 1
758 11:52:24.078584 USB2 port 2: enabled 0
759 11:52:24.081928 USB2 port 3: enabled 0
760 11:52:24.082039 USB2 port 5: enabled 0
761 11:52:24.085394 USB2 port 6: enabled 1
762 11:52:24.088665 USB2 port 9: enabled 1
763 11:52:24.088776 USB3 port 0: enabled 1
764 11:52:24.092043 USB3 port 1: enabled 1
765 11:52:24.095535 USB3 port 2: enabled 1
766 11:52:24.098934 USB3 port 3: enabled 1
767 11:52:24.099037 USB3 port 4: enabled 0
768 11:52:24.102278 APIC: 01: enabled 1
769 11:52:24.105044 APIC: 03: enabled 1
770 11:52:24.105157 APIC: 02: enabled 1
771 11:52:24.108607 APIC: 04: enabled 1
772 11:52:24.108710 APIC: 05: enabled 1
773 11:52:24.112165 APIC: 07: enabled 1
774 11:52:24.114912 APIC: 06: enabled 1
775 11:52:24.115000 Compare with tree...
776 11:52:24.118756 Root Device: enabled 1
777 11:52:24.122150 CPU_CLUSTER: 0: enabled 1
778 11:52:24.122256 APIC: 00: enabled 1
779 11:52:24.124836 APIC: 01: enabled 1
780 11:52:24.128304 APIC: 03: enabled 1
781 11:52:24.131703 APIC: 02: enabled 1
782 11:52:24.131814 APIC: 04: enabled 1
783 11:52:24.134972 APIC: 05: enabled 1
784 11:52:24.138483 APIC: 07: enabled 1
785 11:52:24.138590 APIC: 06: enabled 1
786 11:52:24.141966 DOMAIN: 0000: enabled 1
787 11:52:24.144703 PCI: 00:00.0: enabled 1
788 11:52:24.148078 PCI: 00:02.0: enabled 1
789 11:52:24.148178 PCI: 00:04.0: enabled 0
790 11:52:24.151355 PCI: 00:05.0: enabled 0
791 11:52:24.154706 PCI: 00:12.0: enabled 1
792 11:52:24.158143 PCI: 00:12.5: enabled 0
793 11:52:24.161658 PCI: 00:12.6: enabled 0
794 11:52:24.161738 PCI: 00:14.0: enabled 1
795 11:52:24.164979 USB0 port 0: enabled 1
796 11:52:24.168238 USB2 port 0: enabled 1
797 11:52:24.171432 USB2 port 1: enabled 1
798 11:52:24.174848 USB2 port 2: enabled 0
799 11:52:24.174959 USB2 port 3: enabled 0
800 11:52:24.178388 USB2 port 5: enabled 0
801 11:52:24.181740 USB2 port 6: enabled 1
802 11:52:24.184503 USB2 port 9: enabled 1
803 11:52:24.188075 USB3 port 0: enabled 1
804 11:52:24.191267 USB3 port 1: enabled 1
805 11:52:24.191380 USB3 port 2: enabled 1
806 11:52:24.194830 USB3 port 3: enabled 1
807 11:52:24.198107 USB3 port 4: enabled 0
808 11:52:24.201689 PCI: 00:14.1: enabled 0
809 11:52:24.204393 PCI: 00:14.3: enabled 1
810 11:52:24.204477 PCI: 00:14.5: enabled 0
811 11:52:24.207829 PCI: 00:15.0: enabled 1
812 11:52:24.211293 I2C: 00:15: enabled 1
813 11:52:24.214705 PCI: 00:15.1: enabled 1
814 11:52:24.214791 I2C: 00:5d: enabled 1
815 11:52:24.218343 GENERIC: 0.0: enabled 1
816 11:52:24.221524 PCI: 00:15.2: enabled 0
817 11:52:24.224688 PCI: 00:15.3: enabled 0
818 11:52:24.227541 PCI: 00:16.0: enabled 1
819 11:52:24.227654 PCI: 00:16.1: enabled 0
820 11:52:24.231228 PCI: 00:16.2: enabled 0
821 11:52:24.234628 PCI: 00:16.3: enabled 0
822 11:52:24.237971 PCI: 00:16.4: enabled 0
823 11:52:24.241403 PCI: 00:16.5: enabled 0
824 11:52:24.241514 PCI: 00:17.0: enabled 1
825 11:52:24.244715 PCI: 00:19.0: enabled 1
826 11:52:24.247520 I2C: 00:1a: enabled 1
827 11:52:24.250839 I2C: 00:38: enabled 1
828 11:52:24.254275 I2C: 00:39: enabled 1
829 11:52:24.254361 I2C: 00:3a: enabled 1
830 11:52:24.257447 I2C: 00:3b: enabled 1
831 11:52:24.260939 PCI: 00:19.1: enabled 0
832 11:52:24.264095 PCI: 00:19.2: enabled 0
833 11:52:24.264180 PCI: 00:1a.0: enabled 0
834 11:52:24.267430 PCI: 00:1c.0: enabled 0
835 11:52:24.270774 PCI: 00:1c.1: enabled 0
836 11:52:24.274236 PCI: 00:1c.2: enabled 0
837 11:52:24.277556 PCI: 00:1c.3: enabled 0
838 11:52:24.277667 PCI: 00:1c.4: enabled 0
839 11:52:24.281165 PCI: 00:1c.5: enabled 0
840 11:52:24.284520 PCI: 00:1c.6: enabled 0
841 11:52:24.287297 PCI: 00:1c.7: enabled 0
842 11:52:24.290910 PCI: 00:1d.0: enabled 1
843 11:52:24.290995 PCI: 00:1d.1: enabled 0
844 11:52:24.294413 PCI: 00:1d.2: enabled 0
845 11:52:24.297574 PCI: 00:1d.3: enabled 0
846 11:52:24.300884 PCI: 00:1d.4: enabled 0
847 11:52:24.304288 PCI: 00:1d.5: enabled 1
848 11:52:24.304396 PCI: 00:00.0: enabled 1
849 11:52:24.307085 PCI: 00:1e.0: enabled 1
850 11:52:24.310408 PCI: 00:1e.1: enabled 0
851 11:52:24.313750 PCI: 00:1e.2: enabled 1
852 11:52:24.313862 SPI: 00: enabled 1
853 11:52:24.317286 PCI: 00:1e.3: enabled 1
854 11:52:24.320679 SPI: 01: enabled 1
855 11:52:24.324061 PCI: 00:1f.0: enabled 1
856 11:52:24.324137 PNP: 0c09.0: enabled 1
857 11:52:24.327468 PCI: 00:1f.1: enabled 1
858 11:52:24.330648 PCI: 00:1f.2: enabled 1
859 11:52:24.334007 PCI: 00:1f.3: enabled 1
860 11:52:24.336787 PCI: 00:1f.4: enabled 1
861 11:52:24.336920 PCI: 00:1f.5: enabled 1
862 11:52:24.340128 PCI: 00:1f.6: enabled 0
863 11:52:24.343637 Root Device scanning...
864 11:52:24.346897 scan_static_bus for Root Device
865 11:52:24.350376 CPU_CLUSTER: 0 enabled
866 11:52:24.350471 DOMAIN: 0000 enabled
867 11:52:24.353583 DOMAIN: 0000 scanning...
868 11:52:24.357019 PCI: pci_scan_bus for bus 00
869 11:52:24.360532 PCI: 00:00.0 [8086/0000] ops
870 11:52:24.363844 PCI: 00:00.0 [8086/9b61] enabled
871 11:52:24.367160 PCI: 00:02.0 [8086/0000] bus ops
872 11:52:24.370540 PCI: 00:02.0 [8086/9b41] enabled
873 11:52:24.373291 PCI: 00:04.0 [8086/1903] disabled
874 11:52:24.376587 PCI: 00:08.0 [8086/1911] enabled
875 11:52:24.379959 PCI: 00:12.0 [8086/02f9] enabled
876 11:52:24.383431 PCI: 00:14.0 [8086/0000] bus ops
877 11:52:24.386786 PCI: 00:14.0 [8086/02ed] enabled
878 11:52:24.390121 PCI: 00:14.2 [8086/02ef] enabled
879 11:52:24.393269 PCI: 00:14.3 [8086/02f0] enabled
880 11:52:24.397083 PCI: 00:15.0 [8086/0000] bus ops
881 11:52:24.400448 PCI: 00:15.0 [8086/02e8] enabled
882 11:52:24.403619 PCI: 00:15.1 [8086/0000] bus ops
883 11:52:24.406574 PCI: 00:15.1 [8086/02e9] enabled
884 11:52:24.410005 PCI: 00:16.0 [8086/0000] ops
885 11:52:24.413282 PCI: 00:16.0 [8086/02e0] enabled
886 11:52:24.416637 PCI: 00:17.0 [8086/0000] ops
887 11:52:24.420076 PCI: 00:17.0 [8086/02d3] enabled
888 11:52:24.423487 PCI: 00:19.0 [8086/0000] bus ops
889 11:52:24.426997 PCI: 00:19.0 [8086/02c5] enabled
890 11:52:24.430485 PCI: 00:1d.0 [8086/0000] bus ops
891 11:52:24.433215 PCI: 00:1d.0 [8086/02b0] enabled
892 11:52:24.439958 PCI: Static device PCI: 00:1d.5 not found, disabling it.
893 11:52:24.440089 PCI: 00:1e.0 [8086/0000] ops
894 11:52:24.443477 PCI: 00:1e.0 [8086/02a8] enabled
895 11:52:24.446856 PCI: 00:1e.2 [8086/0000] bus ops
896 11:52:24.450272 PCI: 00:1e.2 [8086/02aa] enabled
897 11:52:24.453526 PCI: 00:1e.3 [8086/0000] bus ops
898 11:52:24.456864 PCI: 00:1e.3 [8086/02ab] enabled
899 11:52:24.460423 PCI: 00:1f.0 [8086/0000] bus ops
900 11:52:24.463130 PCI: 00:1f.0 [8086/0284] enabled
901 11:52:24.469790 PCI: Static device PCI: 00:1f.1 not found, disabling it.
902 11:52:24.476590 PCI: Static device PCI: 00:1f.2 not found, disabling it.
903 11:52:24.480040 PCI: 00:1f.3 [8086/0000] bus ops
904 11:52:24.483453 PCI: 00:1f.3 [8086/02c8] enabled
905 11:52:24.486252 PCI: 00:1f.4 [8086/0000] bus ops
906 11:52:24.489647 PCI: 00:1f.4 [8086/02a3] enabled
907 11:52:24.493083 PCI: 00:1f.5 [8086/0000] bus ops
908 11:52:24.496446 PCI: 00:1f.5 [8086/02a4] enabled
909 11:52:24.499756 PCI: Leftover static devices:
910 11:52:24.499869 PCI: 00:05.0
911 11:52:24.503133 PCI: 00:12.5
912 11:52:24.503244 PCI: 00:12.6
913 11:52:24.503343 PCI: 00:14.1
914 11:52:24.506531 PCI: 00:14.5
915 11:52:24.506641 PCI: 00:15.2
916 11:52:24.509726 PCI: 00:15.3
917 11:52:24.509836 PCI: 00:16.1
918 11:52:24.509937 PCI: 00:16.2
919 11:52:24.513310 PCI: 00:16.3
920 11:52:24.513424 PCI: 00:16.4
921 11:52:24.516638 PCI: 00:16.5
922 11:52:24.516748 PCI: 00:19.1
923 11:52:24.519904 PCI: 00:19.2
924 11:52:24.520015 PCI: 00:1a.0
925 11:52:24.520116 PCI: 00:1c.0
926 11:52:24.522640 PCI: 00:1c.1
927 11:52:24.522748 PCI: 00:1c.2
928 11:52:24.526250 PCI: 00:1c.3
929 11:52:24.526359 PCI: 00:1c.4
930 11:52:24.526457 PCI: 00:1c.5
931 11:52:24.529722 PCI: 00:1c.6
932 11:52:24.529828 PCI: 00:1c.7
933 11:52:24.533083 PCI: 00:1d.1
934 11:52:24.533173 PCI: 00:1d.2
935 11:52:24.533252 PCI: 00:1d.3
936 11:52:24.536553 PCI: 00:1d.4
937 11:52:24.536660 PCI: 00:1d.5
938 11:52:24.539447 PCI: 00:1e.1
939 11:52:24.539555 PCI: 00:1f.1
940 11:52:24.542655 PCI: 00:1f.2
941 11:52:24.542759 PCI: 00:1f.6
942 11:52:24.546106 PCI: Check your devicetree.cb.
943 11:52:24.549565 PCI: 00:02.0 scanning...
944 11:52:24.552955 scan_generic_bus for PCI: 00:02.0
945 11:52:24.556380 scan_generic_bus for PCI: 00:02.0 done
946 11:52:24.563079 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
947 11:52:24.563196 PCI: 00:14.0 scanning...
948 11:52:24.565800 scan_static_bus for PCI: 00:14.0
949 11:52:24.569314 USB0 port 0 enabled
950 11:52:24.572696 USB0 port 0 scanning...
951 11:52:24.576111 scan_static_bus for USB0 port 0
952 11:52:24.576219 USB2 port 0 enabled
953 11:52:24.579524 USB2 port 1 enabled
954 11:52:24.582275 USB2 port 2 disabled
955 11:52:24.582382 USB2 port 3 disabled
956 11:52:24.585613 USB2 port 5 disabled
957 11:52:24.589027 USB2 port 6 enabled
958 11:52:24.589112 USB2 port 9 enabled
959 11:52:24.592391 USB3 port 0 enabled
960 11:52:24.595779 USB3 port 1 enabled
961 11:52:24.595891 USB3 port 2 enabled
962 11:52:24.599122 USB3 port 3 enabled
963 11:52:24.599228 USB3 port 4 disabled
964 11:52:24.602608 USB2 port 0 scanning...
965 11:52:24.606059 scan_static_bus for USB2 port 0
966 11:52:24.608765 scan_static_bus for USB2 port 0 done
967 11:52:24.615483 scan_bus: scanning of bus USB2 port 0 took 9708 usecs
968 11:52:24.618789 USB2 port 1 scanning...
969 11:52:24.622150 scan_static_bus for USB2 port 1
970 11:52:24.625638 scan_static_bus for USB2 port 1 done
971 11:52:24.629050 scan_bus: scanning of bus USB2 port 1 took 9706 usecs
972 11:52:24.632326 USB2 port 6 scanning...
973 11:52:24.635425 scan_static_bus for USB2 port 6
974 11:52:24.638830 scan_static_bus for USB2 port 6 done
975 11:52:24.645501 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
976 11:52:24.649042 USB2 port 9 scanning...
977 11:52:24.652597 scan_static_bus for USB2 port 9
978 11:52:24.655266 scan_static_bus for USB2 port 9 done
979 11:52:24.662118 scan_bus: scanning of bus USB2 port 9 took 9710 usecs
980 11:52:24.662205 USB3 port 0 scanning...
981 11:52:24.665433 scan_static_bus for USB3 port 0
982 11:52:24.668738 scan_static_bus for USB3 port 0 done
983 11:52:24.675554 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
984 11:52:24.679163 USB3 port 1 scanning...
985 11:52:24.681944 scan_static_bus for USB3 port 1
986 11:52:24.685515 scan_static_bus for USB3 port 1 done
987 11:52:24.691715 scan_bus: scanning of bus USB3 port 1 took 9691 usecs
988 11:52:24.691802 USB3 port 2 scanning...
989 11:52:24.695630 scan_static_bus for USB3 port 2
990 11:52:24.698354 scan_static_bus for USB3 port 2 done
991 11:52:24.705001 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
992 11:52:24.708233 USB3 port 3 scanning...
993 11:52:24.711569 scan_static_bus for USB3 port 3
994 11:52:24.714987 scan_static_bus for USB3 port 3 done
995 11:52:24.721731 scan_bus: scanning of bus USB3 port 3 took 9699 usecs
996 11:52:24.724876 scan_static_bus for USB0 port 0 done
997 11:52:24.728336 scan_bus: scanning of bus USB0 port 0 took 155392 usecs
998 11:52:24.735231 scan_static_bus for PCI: 00:14.0 done
999 11:52:24.738640 scan_bus: scanning of bus PCI: 00:14.0 took 173022 usecs
1000 11:52:24.741464 PCI: 00:15.0 scanning...
1001 11:52:24.744948 scan_generic_bus for PCI: 00:15.0
1002 11:52:24.748287 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1003 11:52:24.755031 scan_generic_bus for PCI: 00:15.0 done
1004 11:52:24.758558 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
1005 11:52:24.761435 PCI: 00:15.1 scanning...
1006 11:52:24.764818 scan_generic_bus for PCI: 00:15.1
1007 11:52:24.768342 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1008 11:52:24.775348 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1009 11:52:24.777932 scan_generic_bus for PCI: 00:15.1 done
1010 11:52:24.781248 scan_bus: scanning of bus PCI: 00:15.1 took 18666 usecs
1011 11:52:24.784749 PCI: 00:19.0 scanning...
1012 11:52:24.788020 scan_generic_bus for PCI: 00:19.0
1013 11:52:24.794994 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 11:52:24.798337 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 11:52:24.801736 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 11:52:24.804879 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 11:52:24.811477 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 11:52:24.814629 scan_generic_bus for PCI: 00:19.0 done
1019 11:52:24.818091 scan_bus: scanning of bus PCI: 00:19.0 took 30745 usecs
1020 11:52:24.821531 PCI: 00:1d.0 scanning...
1021 11:52:24.824362 do_pci_scan_bridge for PCI: 00:1d.0
1022 11:52:24.827796 PCI: pci_scan_bus for bus 01
1023 11:52:24.831346 PCI: 01:00.0 [1c5c/1327] enabled
1024 11:52:24.834582 Enabling Common Clock Configuration
1025 11:52:24.841038 L1 Sub-State supported from root port 29
1026 11:52:24.841156 L1 Sub-State Support = 0xf
1027 11:52:24.844403 CommonModeRestoreTime = 0x28
1028 11:52:24.851395 Power On Value = 0x16, Power On Scale = 0x0
1029 11:52:24.851509 ASPM: Enabled L1
1030 11:52:24.858163 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1031 11:52:24.860931 PCI: 00:1e.2 scanning...
1032 11:52:24.864431 scan_generic_bus for PCI: 00:1e.2
1033 11:52:24.867810 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1034 11:52:24.871298 scan_generic_bus for PCI: 00:1e.2 done
1035 11:52:24.878076 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1036 11:52:24.878165 PCI: 00:1e.3 scanning...
1037 11:52:24.884704 scan_generic_bus for PCI: 00:1e.3
1038 11:52:24.888132 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1039 11:52:24.891292 scan_generic_bus for PCI: 00:1e.3 done
1040 11:52:24.898018 scan_bus: scanning of bus PCI: 00:1e.3 took 13988 usecs
1041 11:52:24.898126 PCI: 00:1f.0 scanning...
1042 11:52:24.901556 scan_static_bus for PCI: 00:1f.0
1043 11:52:24.904265 PNP: 0c09.0 enabled
1044 11:52:24.907562 scan_static_bus for PCI: 00:1f.0 done
1045 11:52:24.914308 scan_bus: scanning of bus PCI: 00:1f.0 took 12048 usecs
1046 11:52:24.917732 PCI: 00:1f.3 scanning...
1047 11:52:24.921151 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1048 11:52:24.924419 PCI: 00:1f.4 scanning...
1049 11:52:24.927751 scan_generic_bus for PCI: 00:1f.4
1050 11:52:24.931090 scan_generic_bus for PCI: 00:1f.4 done
1051 11:52:24.937966 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1052 11:52:24.940750 PCI: 00:1f.5 scanning...
1053 11:52:24.944229 scan_generic_bus for PCI: 00:1f.5
1054 11:52:24.947555 scan_generic_bus for PCI: 00:1f.5 done
1055 11:52:24.954279 scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs
1056 11:52:24.957542 scan_bus: scanning of bus DOMAIN: 0000 took 605137 usecs
1057 11:52:24.964294 scan_static_bus for Root Device done
1058 11:52:24.967726 scan_bus: scanning of bus Root Device took 625003 usecs
1059 11:52:24.970562 done
1060 11:52:24.970641 Chrome EC: UHEPI supported
1061 11:52:24.977601 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 11:52:24.984434 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 11:52:24.990674 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 11:52:24.997557 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 11:52:25.000783 SPI flash protection: WPSW=0 SRP0=1
1066 11:52:25.007598 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 11:52:25.010394 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1068 11:52:25.013725 found VGA at PCI: 00:02.0
1069 11:52:25.017214 Setting up VGA for PCI: 00:02.0
1070 11:52:25.020595 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 11:52:25.027402 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 11:52:25.030638 Allocating resources...
1073 11:52:25.030757 Reading resources...
1074 11:52:25.037387 Root Device read_resources bus 0 link: 0
1075 11:52:25.040118 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 11:52:25.046946 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 11:52:25.050387 DOMAIN: 0000 read_resources bus 0 link: 0
1078 11:52:25.056966 PCI: 00:14.0 read_resources bus 0 link: 0
1079 11:52:25.060407 USB0 port 0 read_resources bus 0 link: 0
1080 11:52:25.068083 USB0 port 0 read_resources bus 0 link: 0 done
1081 11:52:25.071478 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 11:52:25.079087 PCI: 00:15.0 read_resources bus 1 link: 0
1083 11:52:25.082579 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 11:52:25.088733 PCI: 00:15.1 read_resources bus 2 link: 0
1085 11:52:25.092096 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 11:52:25.099881 PCI: 00:19.0 read_resources bus 3 link: 0
1087 11:52:25.106528 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 11:52:25.109831 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 11:52:25.116627 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 11:52:25.120027 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 11:52:25.126348 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 11:52:25.129874 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 11:52:25.136537 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 11:52:25.139766 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 11:52:25.146524 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 11:52:25.152784 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 11:52:25.156428 Root Device read_resources bus 0 link: 0 done
1098 11:52:25.159673 Done reading resources.
1099 11:52:25.162958 Show resources in subtree (Root Device)...After reading.
1100 11:52:25.169567 Root Device child on link 0 CPU_CLUSTER: 0
1101 11:52:25.172697 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 11:52:25.172796 APIC: 00
1103 11:52:25.176178 APIC: 01
1104 11:52:25.176262 APIC: 03
1105 11:52:25.179668 APIC: 02
1106 11:52:25.179778 APIC: 04
1107 11:52:25.179876 APIC: 05
1108 11:52:25.183103 APIC: 07
1109 11:52:25.183215 APIC: 06
1110 11:52:25.186478 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 11:52:25.234842 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 11:52:25.235177 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 11:52:25.235267 PCI: 00:00.0
1114 11:52:25.235342 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 11:52:25.235418 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 11:52:25.238994 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 11:52:25.245478 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 11:52:25.255271 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 11:52:25.265677 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 11:52:25.272440 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 11:52:25.282247 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 11:52:25.291954 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 11:52:25.302158 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 11:52:25.311663 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 11:52:25.321408 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 11:52:25.328065 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 11:52:25.338432 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 11:52:25.348201 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 11:52:25.357935 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 11:52:25.358054 PCI: 00:02.0
1131 11:52:25.371427 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 11:52:25.381112 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 11:52:25.387756 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 11:52:25.391094 PCI: 00:04.0
1135 11:52:25.391182 PCI: 00:08.0
1136 11:52:25.401245 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 11:52:25.404730 PCI: 00:12.0
1138 11:52:25.414425 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 11:52:25.417587 PCI: 00:14.0 child on link 0 USB0 port 0
1140 11:52:25.427808 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 11:52:25.431346 USB0 port 0 child on link 0 USB2 port 0
1142 11:52:25.434785 USB2 port 0
1143 11:52:25.434890 USB2 port 1
1144 11:52:25.438027 USB2 port 2
1145 11:52:25.438117 USB2 port 3
1146 11:52:25.441364 USB2 port 5
1147 11:52:25.441446 USB2 port 6
1148 11:52:25.444657 USB2 port 9
1149 11:52:25.447539 USB3 port 0
1150 11:52:25.447653 USB3 port 1
1151 11:52:25.450980 USB3 port 2
1152 11:52:25.451083 USB3 port 3
1153 11:52:25.454582 USB3 port 4
1154 11:52:25.454693 PCI: 00:14.2
1155 11:52:25.464571 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 11:52:25.474579 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 11:52:25.477992 PCI: 00:14.3
1158 11:52:25.487531 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 11:52:25.491002 PCI: 00:15.0 child on link 0 I2C: 01:15
1160 11:52:25.500607 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 11:52:25.500715 I2C: 01:15
1162 11:52:25.507303 PCI: 00:15.1 child on link 0 I2C: 02:5d
1163 11:52:25.517410 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 11:52:25.517497 I2C: 02:5d
1165 11:52:25.520640 GENERIC: 0.0
1166 11:52:25.520735 PCI: 00:16.0
1167 11:52:25.530666 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 11:52:25.534013 PCI: 00:17.0
1169 11:52:25.540782 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1170 11:52:25.550290 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1171 11:52:25.560531 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1172 11:52:25.566726 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1173 11:52:25.577221 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1174 11:52:25.583132 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1175 11:52:25.589919 PCI: 00:19.0 child on link 0 I2C: 03:1a
1176 11:52:25.600210 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 11:52:25.600340 I2C: 03:1a
1178 11:52:25.603490 I2C: 03:38
1179 11:52:25.603587 I2C: 03:39
1180 11:52:25.606557 I2C: 03:3a
1181 11:52:25.606662 I2C: 03:3b
1182 11:52:25.609924 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1183 11:52:25.619568 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1184 11:52:25.629592 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1185 11:52:25.639299 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1186 11:52:25.639395 PCI: 01:00.0
1187 11:52:25.649444 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 11:52:25.652748 PCI: 00:1e.0
1189 11:52:25.662877 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1190 11:52:25.672785 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 11:52:25.676309 PCI: 00:1e.2 child on link 0 SPI: 00
1192 11:52:25.685621 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 11:52:25.689475 SPI: 00
1194 11:52:25.692382 PCI: 00:1e.3 child on link 0 SPI: 01
1195 11:52:25.702300 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 11:52:25.702389 SPI: 01
1197 11:52:25.709014 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1198 11:52:25.715329 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1199 11:52:25.725163 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1200 11:52:25.728580 PNP: 0c09.0
1201 11:52:25.735127 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1202 11:52:25.738606 PCI: 00:1f.3
1203 11:52:25.748921 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 11:52:25.758824 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1205 11:52:25.758911 PCI: 00:1f.4
1206 11:52:25.768191 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1207 11:52:25.778292 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1208 11:52:25.778383 PCI: 00:1f.5
1209 11:52:25.788527 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1210 11:52:25.794987 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1211 11:52:25.801549 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1212 11:52:25.808380 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1213 11:52:25.811605 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1214 11:52:25.814952 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1215 11:52:25.818286 PCI: 00:17.0 18 * [0x60 - 0x67] io
1216 11:52:25.821669 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1217 11:52:25.831066 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1218 11:52:25.834307 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1219 11:52:25.844327 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1220 11:52:25.851048 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1221 11:52:25.861048 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1222 11:52:25.864341 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1223 11:52:25.870754 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1224 11:52:25.877216 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1225 11:52:25.880422 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1226 11:52:25.883775 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1227 11:52:25.890581 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1228 11:52:25.893990 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1229 11:52:25.900576 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1230 11:52:25.903833 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1231 11:52:25.910007 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1232 11:52:25.913474 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1233 11:52:25.920241 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1234 11:52:25.923529 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1235 11:52:25.930327 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1236 11:52:25.933306 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1237 11:52:25.939801 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1238 11:52:25.943626 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1239 11:52:25.950161 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1240 11:52:25.953728 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1241 11:52:25.959678 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1242 11:52:25.962992 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1243 11:52:25.966298 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1244 11:52:25.972923 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1245 11:52:25.976253 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1246 11:52:25.983312 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1247 11:52:25.989843 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1248 11:52:25.996631 avoid_fixed_resources: DOMAIN: 0000
1249 11:52:25.999321 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1250 11:52:26.006056 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1251 11:52:26.012610 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1252 11:52:26.022589 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1253 11:52:26.029489 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1254 11:52:26.036083 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1255 11:52:26.045931 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1256 11:52:26.052451 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1257 11:52:26.058961 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1258 11:52:26.068897 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1259 11:52:26.075635 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1260 11:52:26.082444 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1261 11:52:26.085612 Setting resources...
1262 11:52:26.092154 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1263 11:52:26.095343 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1264 11:52:26.098643 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1265 11:52:26.101899 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1266 11:52:26.105148 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1267 11:52:26.112042 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1268 11:52:26.118571 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 11:52:26.125414 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 11:52:26.131925 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1271 11:52:26.138550 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 11:52:26.141895 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 11:52:26.148536 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 11:52:26.151864 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1275 11:52:26.158554 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1276 11:52:26.161339 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1277 11:52:26.168068 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1278 11:52:26.171781 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1279 11:52:26.177908 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1280 11:52:26.181361 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1281 11:52:26.187763 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1282 11:52:26.191045 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1283 11:52:26.198254 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1284 11:52:26.201365 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1285 11:52:26.207795 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1286 11:52:26.211117 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1287 11:52:26.214537 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1288 11:52:26.221136 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1289 11:52:26.224423 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1290 11:52:26.230975 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1291 11:52:26.234240 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1292 11:52:26.240924 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1293 11:52:26.244249 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1294 11:52:26.254292 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1295 11:52:26.260850 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1296 11:52:26.267531 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1297 11:52:26.273615 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1298 11:52:26.280189 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1299 11:52:26.287008 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1300 11:52:26.290351 Root Device assign_resources, bus 0 link: 0
1301 11:52:26.296979 DOMAIN: 0000 assign_resources, bus 0 link: 0
1302 11:52:26.303379 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1303 11:52:26.313554 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1304 11:52:26.320376 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1305 11:52:26.330351 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1306 11:52:26.336483 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1307 11:52:26.346828 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1308 11:52:26.350156 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 11:52:26.356769 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 11:52:26.362887 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1311 11:52:26.372839 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1312 11:52:26.379685 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1313 11:52:26.389519 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1314 11:52:26.392968 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 11:52:26.396500 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 11:52:26.405767 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1317 11:52:26.409095 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 11:52:26.416149 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 11:52:26.422552 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1320 11:52:26.432646 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1321 11:52:26.439061 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1322 11:52:26.445679 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1323 11:52:26.455566 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1324 11:52:26.462277 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1325 11:52:26.468928 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1326 11:52:26.478802 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1327 11:52:26.482218 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 11:52:26.488949 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 11:52:26.495569 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1330 11:52:26.505245 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1331 11:52:26.512049 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1332 11:52:26.518543 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1333 11:52:26.524779 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1334 11:52:26.531703 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1335 11:52:26.538577 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1336 11:52:26.547922 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1337 11:52:26.551277 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 11:52:26.557784 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 11:52:26.564357 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1340 11:52:26.567555 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 11:52:26.574423 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 11:52:26.577689 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 11:52:26.584384 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 11:52:26.587692 LPC: Trying to open IO window from 800 size 1ff
1345 11:52:26.597763 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1346 11:52:26.604634 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1347 11:52:26.614681 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1348 11:52:26.621126 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1349 11:52:26.627869 DOMAIN: 0000 assign_resources, bus 0 link: 0
1350 11:52:26.631021 Root Device assign_resources, bus 0 link: 0
1351 11:52:26.634345 Done setting resources.
1352 11:52:26.641209 Show resources in subtree (Root Device)...After assigning values.
1353 11:52:26.644522 Root Device child on link 0 CPU_CLUSTER: 0
1354 11:52:26.647778 CPU_CLUSTER: 0 child on link 0 APIC: 00
1355 11:52:26.651163 APIC: 00
1356 11:52:26.651244 APIC: 01
1357 11:52:26.651311 APIC: 03
1358 11:52:26.654452 APIC: 02
1359 11:52:26.654531 APIC: 04
1360 11:52:26.657725 APIC: 05
1361 11:52:26.657804 APIC: 07
1362 11:52:26.657877 APIC: 06
1363 11:52:26.664178 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1364 11:52:26.674019 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1365 11:52:26.683743 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1366 11:52:26.683831 PCI: 00:00.0
1367 11:52:26.693717 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1368 11:52:26.703958 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1369 11:52:26.713426 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1370 11:52:26.723529 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1371 11:52:26.733759 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1372 11:52:26.740346 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1373 11:52:26.750015 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1374 11:52:26.759870 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1375 11:52:26.769914 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1376 11:52:26.779484 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1377 11:52:26.786566 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1378 11:52:26.796491 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1379 11:52:26.806071 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1380 11:52:26.815897 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1381 11:52:26.826018 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1382 11:52:26.836091 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1383 11:52:26.836178 PCI: 00:02.0
1384 11:52:26.848753 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1385 11:52:26.858870 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1386 11:52:26.869110 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1387 11:52:26.869240 PCI: 00:04.0
1388 11:52:26.872522 PCI: 00:08.0
1389 11:52:26.881958 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1390 11:52:26.882069 PCI: 00:12.0
1391 11:52:26.892196 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1392 11:52:26.898949 PCI: 00:14.0 child on link 0 USB0 port 0
1393 11:52:26.908793 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1394 11:52:26.912253 USB0 port 0 child on link 0 USB2 port 0
1395 11:52:26.914975 USB2 port 0
1396 11:52:26.915078 USB2 port 1
1397 11:52:26.918319 USB2 port 2
1398 11:52:26.918424 USB2 port 3
1399 11:52:26.921572 USB2 port 5
1400 11:52:26.921676 USB2 port 6
1401 11:52:26.925017 USB2 port 9
1402 11:52:26.925120 USB3 port 0
1403 11:52:26.928489 USB3 port 1
1404 11:52:26.928596 USB3 port 2
1405 11:52:26.931824 USB3 port 3
1406 11:52:26.931910 USB3 port 4
1407 11:52:26.935134 PCI: 00:14.2
1408 11:52:26.945099 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1409 11:52:26.954927 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1410 11:52:26.958207 PCI: 00:14.3
1411 11:52:26.967859 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1412 11:52:26.971252 PCI: 00:15.0 child on link 0 I2C: 01:15
1413 11:52:26.981249 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1414 11:52:26.984722 I2C: 01:15
1415 11:52:26.988055 PCI: 00:15.1 child on link 0 I2C: 02:5d
1416 11:52:26.997931 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1417 11:52:27.001181 I2C: 02:5d
1418 11:52:27.001267 GENERIC: 0.0
1419 11:52:27.004481 PCI: 00:16.0
1420 11:52:27.014247 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1421 11:52:27.014359 PCI: 00:17.0
1422 11:52:27.024130 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1423 11:52:27.034381 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1424 11:52:27.043970 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1425 11:52:27.053916 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1426 11:52:27.064018 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1427 11:52:27.073604 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1428 11:52:27.077526 PCI: 00:19.0 child on link 0 I2C: 03:1a
1429 11:52:27.086956 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1430 11:52:27.090190 I2C: 03:1a
1431 11:52:27.090327 I2C: 03:38
1432 11:52:27.093490 I2C: 03:39
1433 11:52:27.093614 I2C: 03:3a
1434 11:52:27.093715 I2C: 03:3b
1435 11:52:27.100048 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1436 11:52:27.110112 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1437 11:52:27.120034 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1438 11:52:27.129964 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1439 11:52:27.130082 PCI: 01:00.0
1440 11:52:27.143550 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1441 11:52:27.143641 PCI: 00:1e.0
1442 11:52:27.153016 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1443 11:52:27.163124 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1444 11:52:27.169578 PCI: 00:1e.2 child on link 0 SPI: 00
1445 11:52:27.179475 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1446 11:52:27.179604 SPI: 00
1447 11:52:27.183166 PCI: 00:1e.3 child on link 0 SPI: 01
1448 11:52:27.192598 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1449 11:52:27.196110 SPI: 01
1450 11:52:27.199556 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1451 11:52:27.209484 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1452 11:52:27.219447 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1453 11:52:27.219561 PNP: 0c09.0
1454 11:52:27.229270 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1455 11:52:27.229354 PCI: 00:1f.3
1456 11:52:27.239454 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1457 11:52:27.248890 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1458 11:52:27.252267 PCI: 00:1f.4
1459 11:52:27.262263 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1460 11:52:27.272331 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1461 11:52:27.272443 PCI: 00:1f.5
1462 11:52:27.282339 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1463 11:52:27.285556 Done allocating resources.
1464 11:52:27.292239 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1465 11:52:27.295530 Enabling resources...
1466 11:52:27.299035 PCI: 00:00.0 subsystem <- 8086/9b61
1467 11:52:27.301663 PCI: 00:00.0 cmd <- 06
1468 11:52:27.305006 PCI: 00:02.0 subsystem <- 8086/9b41
1469 11:52:27.308296 PCI: 00:02.0 cmd <- 03
1470 11:52:27.308424 PCI: 00:08.0 cmd <- 06
1471 11:52:27.315510 PCI: 00:12.0 subsystem <- 8086/02f9
1472 11:52:27.315614 PCI: 00:12.0 cmd <- 02
1473 11:52:27.318929 PCI: 00:14.0 subsystem <- 8086/02ed
1474 11:52:27.322193 PCI: 00:14.0 cmd <- 02
1475 11:52:27.325547 PCI: 00:14.2 cmd <- 02
1476 11:52:27.328796 PCI: 00:14.3 subsystem <- 8086/02f0
1477 11:52:27.332213 PCI: 00:14.3 cmd <- 02
1478 11:52:27.335637 PCI: 00:15.0 subsystem <- 8086/02e8
1479 11:52:27.338999 PCI: 00:15.0 cmd <- 02
1480 11:52:27.342191 PCI: 00:15.1 subsystem <- 8086/02e9
1481 11:52:27.345600 PCI: 00:15.1 cmd <- 02
1482 11:52:27.348422 PCI: 00:16.0 subsystem <- 8086/02e0
1483 11:52:27.351774 PCI: 00:16.0 cmd <- 02
1484 11:52:27.355002 PCI: 00:17.0 subsystem <- 8086/02d3
1485 11:52:27.355088 PCI: 00:17.0 cmd <- 03
1486 11:52:27.361611 PCI: 00:19.0 subsystem <- 8086/02c5
1487 11:52:27.361692 PCI: 00:19.0 cmd <- 02
1488 11:52:27.365085 PCI: 00:1d.0 bridge ctrl <- 0013
1489 11:52:27.368542 PCI: 00:1d.0 subsystem <- 8086/02b0
1490 11:52:27.371872 PCI: 00:1d.0 cmd <- 06
1491 11:52:27.375166 PCI: 00:1e.0 subsystem <- 8086/02a8
1492 11:52:27.378554 PCI: 00:1e.0 cmd <- 06
1493 11:52:27.381931 PCI: 00:1e.2 subsystem <- 8086/02aa
1494 11:52:27.385287 PCI: 00:1e.2 cmd <- 06
1495 11:52:27.388588 PCI: 00:1e.3 subsystem <- 8086/02ab
1496 11:52:27.391737 PCI: 00:1e.3 cmd <- 02
1497 11:52:27.395167 PCI: 00:1f.0 subsystem <- 8086/0284
1498 11:52:27.398445 PCI: 00:1f.0 cmd <- 407
1499 11:52:27.401959 PCI: 00:1f.3 subsystem <- 8086/02c8
1500 11:52:27.405365 PCI: 00:1f.3 cmd <- 02
1501 11:52:27.408643 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 11:52:27.411940 PCI: 00:1f.4 cmd <- 03
1503 11:52:27.415173 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 11:52:27.415276 PCI: 00:1f.5 cmd <- 406
1505 11:52:27.425100 PCI: 01:00.0 cmd <- 02
1506 11:52:27.430291 done.
1507 11:52:27.441493 ME: Version: 14.0.39.1367
1508 11:52:27.448753 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1509 11:52:27.452036 Initializing devices...
1510 11:52:27.452138 Root Device init ...
1511 11:52:27.458140 Chrome EC: Set SMI mask to 0x0000000000000000
1512 11:52:27.461643 Chrome EC: clear events_b mask to 0x0000000000000000
1513 11:52:27.468256 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 11:52:27.475104 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 11:52:27.481714 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 11:52:27.484461 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 11:52:27.488004 Root Device init finished in 35147 usecs
1518 11:52:27.491551 CPU_CLUSTER: 0 init ...
1519 11:52:27.498159 CPU_CLUSTER: 0 init finished in 2447 usecs
1520 11:52:27.502710 PCI: 00:00.0 init ...
1521 11:52:27.506001 CPU TDP: 15 Watts
1522 11:52:27.509414 CPU PL2 = 64 Watts
1523 11:52:27.512075 PCI: 00:00.0 init finished in 7078 usecs
1524 11:52:27.515492 PCI: 00:02.0 init ...
1525 11:52:27.518822 PCI: 00:02.0 init finished in 2252 usecs
1526 11:52:27.522072 PCI: 00:08.0 init ...
1527 11:52:27.525554 PCI: 00:08.0 init finished in 2250 usecs
1528 11:52:27.528878 PCI: 00:12.0 init ...
1529 11:52:27.532296 PCI: 00:12.0 init finished in 2252 usecs
1530 11:52:27.535462 PCI: 00:14.0 init ...
1531 11:52:27.539104 PCI: 00:14.0 init finished in 2253 usecs
1532 11:52:27.542530 PCI: 00:14.2 init ...
1533 11:52:27.545823 PCI: 00:14.2 init finished in 2251 usecs
1534 11:52:27.549239 PCI: 00:14.3 init ...
1535 11:52:27.551946 PCI: 00:14.3 init finished in 2269 usecs
1536 11:52:27.555781 PCI: 00:15.0 init ...
1537 11:52:27.559118 DW I2C bus 0 at 0xd121f000 (400 KHz)
1538 11:52:27.562342 PCI: 00:15.0 init finished in 5977 usecs
1539 11:52:27.565618 PCI: 00:15.1 init ...
1540 11:52:27.568900 DW I2C bus 1 at 0xd1220000 (400 KHz)
1541 11:52:27.572234 PCI: 00:15.1 init finished in 5975 usecs
1542 11:52:27.575513 PCI: 00:16.0 init ...
1543 11:52:27.578862 PCI: 00:16.0 init finished in 2252 usecs
1544 11:52:27.582722 PCI: 00:19.0 init ...
1545 11:52:27.586321 DW I2C bus 4 at 0xd1222000 (400 KHz)
1546 11:52:27.592969 PCI: 00:19.0 init finished in 5976 usecs
1547 11:52:27.593082 PCI: 00:1d.0 init ...
1548 11:52:27.595753 Initializing PCH PCIe bridge.
1549 11:52:27.599182 PCI: 00:1d.0 init finished in 5282 usecs
1550 11:52:27.604469 PCI: 00:1f.0 init ...
1551 11:52:27.607488 IOAPIC: Initializing IOAPIC at 0xfec00000
1552 11:52:27.614030 IOAPIC: Bootstrap Processor Local APIC = 0x00
1553 11:52:27.614139 IOAPIC: ID = 0x02
1554 11:52:27.617218 IOAPIC: Dumping registers
1555 11:52:27.620646 reg 0x0000: 0x02000000
1556 11:52:27.623742 reg 0x0001: 0x00770020
1557 11:52:27.627025 reg 0x0002: 0x00000000
1558 11:52:27.630410 PCI: 00:1f.0 init finished in 23533 usecs
1559 11:52:27.633653 PCI: 00:1f.4 init ...
1560 11:52:27.636975 PCI: 00:1f.4 init finished in 2263 usecs
1561 11:52:27.648335 PCI: 01:00.0 init ...
1562 11:52:27.651521 PCI: 01:00.0 init finished in 2243 usecs
1563 11:52:27.656405 PNP: 0c09.0 init ...
1564 11:52:27.659431 Google Chrome EC uptime: 11.098 seconds
1565 11:52:27.666119 Google Chrome AP resets since EC boot: 0
1566 11:52:27.669553 Google Chrome most recent AP reset causes:
1567 11:52:27.676204 Google Chrome EC reset flags at last EC boot: reset-pin
1568 11:52:27.679489 PNP: 0c09.0 init finished in 20577 usecs
1569 11:52:27.682910 Devices initialized
1570 11:52:27.683029 Show all devs... After init.
1571 11:52:27.685634 Root Device: enabled 1
1572 11:52:27.688975 CPU_CLUSTER: 0: enabled 1
1573 11:52:27.692337 DOMAIN: 0000: enabled 1
1574 11:52:27.692417 APIC: 00: enabled 1
1575 11:52:27.695738 PCI: 00:00.0: enabled 1
1576 11:52:27.699067 PCI: 00:02.0: enabled 1
1577 11:52:27.702417 PCI: 00:04.0: enabled 0
1578 11:52:27.702494 PCI: 00:05.0: enabled 0
1579 11:52:27.705822 PCI: 00:12.0: enabled 1
1580 11:52:27.709216 PCI: 00:12.5: enabled 0
1581 11:52:27.709295 PCI: 00:12.6: enabled 0
1582 11:52:27.712024 PCI: 00:14.0: enabled 1
1583 11:52:27.715234 PCI: 00:14.1: enabled 0
1584 11:52:27.718981 PCI: 00:14.3: enabled 1
1585 11:52:27.719064 PCI: 00:14.5: enabled 0
1586 11:52:27.722269 PCI: 00:15.0: enabled 1
1587 11:52:27.725569 PCI: 00:15.1: enabled 1
1588 11:52:27.728740 PCI: 00:15.2: enabled 0
1589 11:52:27.728867 PCI: 00:15.3: enabled 0
1590 11:52:27.731966 PCI: 00:16.0: enabled 1
1591 11:52:27.735489 PCI: 00:16.1: enabled 0
1592 11:52:27.738853 PCI: 00:16.2: enabled 0
1593 11:52:27.738961 PCI: 00:16.3: enabled 0
1594 11:52:27.742219 PCI: 00:16.4: enabled 0
1595 11:52:27.745579 PCI: 00:16.5: enabled 0
1596 11:52:27.748849 PCI: 00:17.0: enabled 1
1597 11:52:27.748929 PCI: 00:19.0: enabled 1
1598 11:52:27.752214 PCI: 00:19.1: enabled 0
1599 11:52:27.755402 PCI: 00:19.2: enabled 0
1600 11:52:27.755514 PCI: 00:1a.0: enabled 0
1601 11:52:27.758739 PCI: 00:1c.0: enabled 0
1602 11:52:27.761525 PCI: 00:1c.1: enabled 0
1603 11:52:27.764823 PCI: 00:1c.2: enabled 0
1604 11:52:27.764902 PCI: 00:1c.3: enabled 0
1605 11:52:27.768766 PCI: 00:1c.4: enabled 0
1606 11:52:27.771423 PCI: 00:1c.5: enabled 0
1607 11:52:27.774796 PCI: 00:1c.6: enabled 0
1608 11:52:27.774905 PCI: 00:1c.7: enabled 0
1609 11:52:27.778160 PCI: 00:1d.0: enabled 1
1610 11:52:27.781491 PCI: 00:1d.1: enabled 0
1611 11:52:27.784883 PCI: 00:1d.2: enabled 0
1612 11:52:27.784970 PCI: 00:1d.3: enabled 0
1613 11:52:27.788359 PCI: 00:1d.4: enabled 0
1614 11:52:27.791651 PCI: 00:1d.5: enabled 0
1615 11:52:27.794923 PCI: 00:1e.0: enabled 1
1616 11:52:27.795026 PCI: 00:1e.1: enabled 0
1617 11:52:27.798440 PCI: 00:1e.2: enabled 1
1618 11:52:27.801206 PCI: 00:1e.3: enabled 1
1619 11:52:27.801307 PCI: 00:1f.0: enabled 1
1620 11:52:27.804639 PCI: 00:1f.1: enabled 0
1621 11:52:27.807977 PCI: 00:1f.2: enabled 0
1622 11:52:27.811452 PCI: 00:1f.3: enabled 1
1623 11:52:27.811554 PCI: 00:1f.4: enabled 1
1624 11:52:27.814904 PCI: 00:1f.5: enabled 1
1625 11:52:27.818328 PCI: 00:1f.6: enabled 0
1626 11:52:27.821080 USB0 port 0: enabled 1
1627 11:52:27.821155 I2C: 01:15: enabled 1
1628 11:52:27.824533 I2C: 02:5d: enabled 1
1629 11:52:27.827913 GENERIC: 0.0: enabled 1
1630 11:52:27.828014 I2C: 03:1a: enabled 1
1631 11:52:27.831098 I2C: 03:38: enabled 1
1632 11:52:27.834370 I2C: 03:39: enabled 1
1633 11:52:27.834474 I2C: 03:3a: enabled 1
1634 11:52:27.837636 I2C: 03:3b: enabled 1
1635 11:52:27.841458 PCI: 00:00.0: enabled 1
1636 11:52:27.841585 SPI: 00: enabled 1
1637 11:52:27.844778 SPI: 01: enabled 1
1638 11:52:27.848141 PNP: 0c09.0: enabled 1
1639 11:52:27.848248 USB2 port 0: enabled 1
1640 11:52:27.850967 USB2 port 1: enabled 1
1641 11:52:27.854440 USB2 port 2: enabled 0
1642 11:52:27.854541 USB2 port 3: enabled 0
1643 11:52:27.857619 USB2 port 5: enabled 0
1644 11:52:27.860880 USB2 port 6: enabled 1
1645 11:52:27.864769 USB2 port 9: enabled 1
1646 11:52:27.864878 USB3 port 0: enabled 1
1647 11:52:27.867582 USB3 port 1: enabled 1
1648 11:52:27.870959 USB3 port 2: enabled 1
1649 11:52:27.871062 USB3 port 3: enabled 1
1650 11:52:27.874099 USB3 port 4: enabled 0
1651 11:52:27.877587 APIC: 01: enabled 1
1652 11:52:27.877691 APIC: 03: enabled 1
1653 11:52:27.880859 APIC: 02: enabled 1
1654 11:52:27.884073 APIC: 04: enabled 1
1655 11:52:27.884150 APIC: 05: enabled 1
1656 11:52:27.887389 APIC: 07: enabled 1
1657 11:52:27.887488 APIC: 06: enabled 1
1658 11:52:27.890818 PCI: 00:08.0: enabled 1
1659 11:52:27.894145 PCI: 00:14.2: enabled 1
1660 11:52:27.897392 PCI: 01:00.0: enabled 1
1661 11:52:27.901414 Disabling ACPI via APMC:
1662 11:52:27.901518 done.
1663 11:52:27.907480 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1664 11:52:27.910825 ELOG: NV offset 0xaf0000 size 0x4000
1665 11:52:27.917658 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1666 11:52:27.924419 ELOG: Event(17) added with size 13 at 2023-06-23 11:52:12 UTC
1667 11:52:27.931032 POST: Unexpected post code in previous boot: 0x73
1668 11:52:27.937786 ELOG: Event(A3) added with size 11 at 2023-06-23 11:52:12 UTC
1669 11:52:27.944240 ELOG: Event(A6) added with size 13 at 2023-06-23 11:52:12 UTC
1670 11:52:27.950740 ELOG: Event(92) added with size 9 at 2023-06-23 11:52:12 UTC
1671 11:52:27.957360 ELOG: Event(93) added with size 9 at 2023-06-23 11:52:12 UTC
1672 11:52:27.960603 ELOG: Event(9A) added with size 9 at 2023-06-23 11:52:12 UTC
1673 11:52:27.967237 ELOG: Event(9E) added with size 10 at 2023-06-23 11:52:12 UTC
1674 11:52:27.973821 ELOG: Event(9F) added with size 14 at 2023-06-23 11:52:12 UTC
1675 11:52:27.980424 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1676 11:52:27.987193 ELOG: Event(A1) added with size 10 at 2023-06-23 11:52:12 UTC
1677 11:52:27.993208 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1678 11:52:27.999798 ELOG: Event(A0) added with size 9 at 2023-06-23 11:52:12 UTC
1679 11:52:28.003080 elog_add_boot_reason: Logged dev mode boot
1680 11:52:28.007110 Finalize devices...
1681 11:52:28.009641 PCI: 00:17.0 final
1682 11:52:28.009726 Devices finalized
1683 11:52:28.016625 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1684 11:52:28.020047 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1685 11:52:28.026300 ME: HFSTS1 : 0x90000245
1686 11:52:28.029633 ME: HFSTS2 : 0x3B850126
1687 11:52:28.033116 ME: HFSTS3 : 0x00000020
1688 11:52:28.036522 ME: HFSTS4 : 0x00004800
1689 11:52:28.042709 ME: HFSTS5 : 0x00000000
1690 11:52:28.046068 ME: HFSTS6 : 0x40400006
1691 11:52:28.049899 ME: Manufacturing Mode : NO
1692 11:52:28.052971 ME: FW Partition Table : OK
1693 11:52:28.056290 ME: Bringup Loader Failure : NO
1694 11:52:28.059572 ME: Firmware Init Complete : YES
1695 11:52:28.062915 ME: Boot Options Present : NO
1696 11:52:28.066301 ME: Update In Progress : NO
1697 11:52:28.069574 ME: D0i3 Support : YES
1698 11:52:28.072648 ME: Low Power State Enabled : NO
1699 11:52:28.075920 ME: CPU Replaced : NO
1700 11:52:28.079347 ME: CPU Replacement Valid : YES
1701 11:52:28.082644 ME: Current Working State : 5
1702 11:52:28.085863 ME: Current Operation State : 1
1703 11:52:28.089143 ME: Current Operation Mode : 0
1704 11:52:28.092309 ME: Error Code : 0
1705 11:52:28.095738 ME: CPU Debug Disabled : YES
1706 11:52:28.099160 ME: TXT Support : NO
1707 11:52:28.106140 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1708 11:52:28.109166 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1709 11:52:28.112486 CBFS @ c08000 size 3f8000
1710 11:52:28.119169 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1711 11:52:28.122597 CBFS: Locating 'fallback/dsdt.aml'
1712 11:52:28.126007 CBFS: Found @ offset 10bb80 size 3fa5
1713 11:52:28.132073 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1714 11:52:28.132155 CBFS @ c08000 size 3f8000
1715 11:52:28.138884 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1716 11:52:28.142227 CBFS: Locating 'fallback/slic'
1717 11:52:28.146255 CBFS: 'fallback/slic' not found.
1718 11:52:28.152337 ACPI: Writing ACPI tables at 99b3e000.
1719 11:52:28.152426 ACPI: * FACS
1720 11:52:28.156263 ACPI: * DSDT
1721 11:52:28.158932 Ramoops buffer: 0x100000@0x99a3d000.
1722 11:52:28.162685 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1723 11:52:28.169266 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1724 11:52:28.172584 Google Chrome EC: version:
1725 11:52:28.175908 ro: helios_v2.0.2659-56403530b
1726 11:52:28.179081 rw: helios_v2.0.2849-c41de27e7d
1727 11:52:28.179159 running image: 1
1728 11:52:28.183545 ACPI: * FADT
1729 11:52:28.183617 SCI is IRQ9
1730 11:52:28.189692 ACPI: added table 1/32, length now 40
1731 11:52:28.189768 ACPI: * SSDT
1732 11:52:28.193118 Found 1 CPU(s) with 8 core(s) each.
1733 11:52:28.196412 Error: Could not locate 'wifi_sar' in VPD.
1734 11:52:28.203493 Checking CBFS for default SAR values
1735 11:52:28.206707 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1736 11:52:28.210051 CBFS @ c08000 size 3f8000
1737 11:52:28.216073 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1738 11:52:28.219583 CBFS: Locating 'wifi_sar_defaults.hex'
1739 11:52:28.222996 CBFS: Found @ offset 5fac0 size 77
1740 11:52:28.226425 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1741 11:52:28.232644 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1742 11:52:28.236064 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1743 11:52:28.242724 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1744 11:52:28.246283 failed to find key in VPD: dsm_calib_r0_0
1745 11:52:28.256261 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1746 11:52:28.259544 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1747 11:52:28.262972 failed to find key in VPD: dsm_calib_r0_1
1748 11:52:28.272760 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1749 11:52:28.279526 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1750 11:52:28.282265 failed to find key in VPD: dsm_calib_r0_2
1751 11:52:28.292716 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1752 11:52:28.296048 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1753 11:52:28.302115 failed to find key in VPD: dsm_calib_r0_3
1754 11:52:28.309258 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1755 11:52:28.315281 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1756 11:52:28.319276 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1757 11:52:28.322474 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1758 11:52:28.326460 EC returned error result code 1
1759 11:52:28.330347 EC returned error result code 1
1760 11:52:28.333645 EC returned error result code 1
1761 11:52:28.340578 PS2K: Bad resp from EC. Vivaldi disabled!
1762 11:52:28.343832 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1763 11:52:28.350706 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1764 11:52:28.356719 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1765 11:52:28.360076 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1766 11:52:28.366916 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1767 11:52:28.373563 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1768 11:52:28.376646 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1769 11:52:28.383415 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1770 11:52:28.386810 ACPI: added table 2/32, length now 44
1771 11:52:28.390111 ACPI: * MCFG
1772 11:52:28.393487 ACPI: added table 3/32, length now 48
1773 11:52:28.396687 ACPI: * TPM2
1774 11:52:28.396799 TPM2 log created at 99a2d000
1775 11:52:28.403261 ACPI: added table 4/32, length now 52
1776 11:52:28.403344 ACPI: * MADT
1777 11:52:28.403411 SCI is IRQ9
1778 11:52:28.410102 ACPI: added table 5/32, length now 56
1779 11:52:28.410185 current = 99b43ac0
1780 11:52:28.413259 ACPI: * DMAR
1781 11:52:28.416417 ACPI: added table 6/32, length now 60
1782 11:52:28.419730 ACPI: * IGD OpRegion
1783 11:52:28.419809 GMA: Found VBT in CBFS
1784 11:52:28.422979 GMA: Found valid VBT in CBFS
1785 11:52:28.426861 ACPI: added table 7/32, length now 64
1786 11:52:28.430105 ACPI: * HPET
1787 11:52:28.433334 ACPI: added table 8/32, length now 68
1788 11:52:28.433431 ACPI: done.
1789 11:52:28.436724 ACPI tables: 31744 bytes.
1790 11:52:28.440062 smbios_write_tables: 99a2c000
1791 11:52:28.443408 EC returned error result code 3
1792 11:52:28.446815 Couldn't obtain OEM name from CBI
1793 11:52:28.450217 Create SMBIOS type 17
1794 11:52:28.453529 PCI: 00:00.0 (Intel Cannonlake)
1795 11:52:28.456914 PCI: 00:14.3 (Intel WiFi)
1796 11:52:28.460269 SMBIOS tables: 939 bytes.
1797 11:52:28.463040 Writing table forward entry at 0x00000500
1798 11:52:28.470207 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1799 11:52:28.473633 Writing coreboot table at 0x99b62000
1800 11:52:28.480109 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1801 11:52:28.483274 1. 0000000000001000-000000000009ffff: RAM
1802 11:52:28.486567 2. 00000000000a0000-00000000000fffff: RESERVED
1803 11:52:28.493246 3. 0000000000100000-0000000099a2bfff: RAM
1804 11:52:28.496560 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1805 11:52:28.503136 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1806 11:52:28.509635 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1807 11:52:28.513039 7. 000000009a000000-000000009f7fffff: RESERVED
1808 11:52:28.516413 8. 00000000e0000000-00000000efffffff: RESERVED
1809 11:52:28.522886 9. 00000000fc000000-00000000fc000fff: RESERVED
1810 11:52:28.526306 10. 00000000fe000000-00000000fe00ffff: RESERVED
1811 11:52:28.532525 11. 00000000fed10000-00000000fed17fff: RESERVED
1812 11:52:28.536414 12. 00000000fed80000-00000000fed83fff: RESERVED
1813 11:52:28.543079 13. 00000000fed90000-00000000fed91fff: RESERVED
1814 11:52:28.546369 14. 00000000feda0000-00000000feda1fff: RESERVED
1815 11:52:28.549595 15. 0000000100000000-000000045e7fffff: RAM
1816 11:52:28.556318 Graphics framebuffer located at 0xc0000000
1817 11:52:28.559039 Passing 5 GPIOs to payload:
1818 11:52:28.562485 NAME | PORT | POLARITY | VALUE
1819 11:52:28.569269 write protect | undefined | high | low
1820 11:52:28.572601 lid | undefined | high | high
1821 11:52:28.579334 power | undefined | high | low
1822 11:52:28.585676 oprom | undefined | high | low
1823 11:52:28.588872 EC in RW | 0x000000cb | high | low
1824 11:52:28.588950 Board ID: 4
1825 11:52:28.595559 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1826 11:52:28.598804 CBFS @ c08000 size 3f8000
1827 11:52:28.605346 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1828 11:52:28.609095 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1829 11:52:28.612305 coreboot table: 1492 bytes.
1830 11:52:28.615616 IMD ROOT 0. 99fff000 00001000
1831 11:52:28.618964 IMD SMALL 1. 99ffe000 00001000
1832 11:52:28.622407 FSP MEMORY 2. 99c4e000 003b0000
1833 11:52:28.625721 CONSOLE 3. 99c2e000 00020000
1834 11:52:28.629113 FMAP 4. 99c2d000 0000054e
1835 11:52:28.632411 TIME STAMP 5. 99c2c000 00000910
1836 11:52:28.635841 VBOOT WORK 6. 99c18000 00014000
1837 11:52:28.639122 MRC DATA 7. 99c16000 00001958
1838 11:52:28.642286 ROMSTG STCK 8. 99c15000 00001000
1839 11:52:28.645612 AFTER CAR 9. 99c0b000 0000a000
1840 11:52:28.649030 RAMSTAGE 10. 99baf000 0005c000
1841 11:52:28.652260 REFCODE 11. 99b7a000 00035000
1842 11:52:28.655658 SMM BACKUP 12. 99b6a000 00010000
1843 11:52:28.658886 COREBOOT 13. 99b62000 00008000
1844 11:52:28.662273 ACPI 14. 99b3e000 00024000
1845 11:52:28.665690 ACPI GNVS 15. 99b3d000 00001000
1846 11:52:28.669080 RAMOOPS 16. 99a3d000 00100000
1847 11:52:28.672354 TPM2 TCGLOG17. 99a2d000 00010000
1848 11:52:28.675732 SMBIOS 18. 99a2c000 00000800
1849 11:52:28.678543 IMD small region:
1850 11:52:28.682028 IMD ROOT 0. 99ffec00 00000400
1851 11:52:28.685348 FSP RUNTIME 1. 99ffebe0 00000004
1852 11:52:28.688626 EC HOSTEVENT 2. 99ffebc0 00000008
1853 11:52:28.692013 POWER STATE 3. 99ffeb80 00000040
1854 11:52:28.695322 ROMSTAGE 4. 99ffeb60 00000004
1855 11:52:28.698737 MEM INFO 5. 99ffe9a0 000001b9
1856 11:52:28.702108 VPD 6. 99ffe920 0000006c
1857 11:52:28.705487 MTRR: Physical address space:
1858 11:52:28.712078 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1859 11:52:28.718625 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1860 11:52:28.725059 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1861 11:52:28.731869 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1862 11:52:28.738484 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1863 11:52:28.741912 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1864 11:52:28.748583 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1865 11:52:28.755271 MTRR: Fixed MSR 0x250 0x0606060606060606
1866 11:52:28.758496 MTRR: Fixed MSR 0x258 0x0606060606060606
1867 11:52:28.761639 MTRR: Fixed MSR 0x259 0x0000000000000000
1868 11:52:28.765000 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 11:52:28.771719 MTRR: Fixed MSR 0x269 0x0606060606060606
1870 11:52:28.774590 MTRR: Fixed MSR 0x26a 0x0606060606060606
1871 11:52:28.778011 MTRR: Fixed MSR 0x26b 0x0606060606060606
1872 11:52:28.781441 MTRR: Fixed MSR 0x26c 0x0606060606060606
1873 11:52:28.784940 MTRR: Fixed MSR 0x26d 0x0606060606060606
1874 11:52:28.791083 MTRR: Fixed MSR 0x26e 0x0606060606060606
1875 11:52:28.794379 MTRR: Fixed MSR 0x26f 0x0606060606060606
1876 11:52:28.798219 call enable_fixed_mtrr()
1877 11:52:28.801432 CPU physical address size: 39 bits
1878 11:52:28.804822 MTRR: default type WB/UC MTRR counts: 6/8.
1879 11:52:28.808076 MTRR: WB selected as default type.
1880 11:52:28.814292 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1881 11:52:28.820812 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1882 11:52:28.827802 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1883 11:52:28.834035 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1884 11:52:28.841318 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1885 11:52:28.847457 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1886 11:52:28.850953 MTRR: Fixed MSR 0x250 0x0606060606060606
1887 11:52:28.854289 MTRR: Fixed MSR 0x258 0x0606060606060606
1888 11:52:28.860856 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 11:52:28.864042 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 11:52:28.867394 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 11:52:28.870748 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 11:52:28.877537 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 11:52:28.880987 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 11:52:28.883717 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 11:52:28.887205 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 11:52:28.894085 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 11:52:28.894196
1898 11:52:28.894290 MTRR check
1899 11:52:28.897517 Fixed MTRRs : Enabled
1900 11:52:28.900681 Variable MTRRs: Enabled
1901 11:52:28.900782
1902 11:52:28.900893 call enable_fixed_mtrr()
1903 11:52:28.906966 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1904 11:52:28.910715 CPU physical address size: 39 bits
1905 11:52:28.916854 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1906 11:52:28.920253 MTRR: Fixed MSR 0x250 0x0606060606060606
1907 11:52:28.923522 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 11:52:28.926921 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 11:52:28.933891 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 11:52:28.937042 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 11:52:28.940240 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 11:52:28.943521 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 11:52:28.950047 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 11:52:28.953410 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 11:52:28.956828 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 11:52:28.960278 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 11:52:28.963559 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 11:52:28.970118 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 11:52:28.973369 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 11:52:28.976566 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 11:52:28.983292 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 11:52:28.986710 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 11:52:28.989486 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 11:52:28.992951 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 11:52:28.999747 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 11:52:29.003220 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 11:52:29.005988 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 11:52:29.009331 call enable_fixed_mtrr()
1929 11:52:29.013250 call enable_fixed_mtrr()
1930 11:52:29.016298 CPU physical address size: 39 bits
1931 11:52:29.019650 CPU physical address size: 39 bits
1932 11:52:29.023036 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 11:52:29.026391 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 11:52:29.032450 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 11:52:29.035764 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 11:52:29.039021 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 11:52:29.042385 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 11:52:29.046065 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 11:52:29.052489 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 11:52:29.055707 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 11:52:29.058863 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 11:52:29.062275 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 11:52:29.069131 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 11:52:29.072683 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 11:52:29.075825 call enable_fixed_mtrr()
1946 11:52:29.079042 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 11:52:29.082219 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 11:52:29.085579 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 11:52:29.092362 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 11:52:29.095735 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 11:52:29.098457 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 11:52:29.101829 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 11:52:29.108706 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 11:52:29.112005 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 11:52:29.115439 CPU physical address size: 39 bits
1956 11:52:29.118218 call enable_fixed_mtrr()
1957 11:52:29.121546 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 11:52:29.125378 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 11:52:29.132026 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 11:52:29.135227 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 11:52:29.137996 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 11:52:29.141374 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 11:52:29.148577 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 11:52:29.151245 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 11:52:29.155096 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 11:52:29.158398 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 11:52:29.164696 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 11:52:29.167836 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 11:52:29.171283 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 11:52:29.174648 call enable_fixed_mtrr()
1971 11:52:29.178032 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 11:52:29.181417 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 11:52:29.188086 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 11:52:29.191194 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 11:52:29.194515 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 11:52:29.197788 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 11:52:29.204560 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 11:52:29.207895 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 11:52:29.210734 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 11:52:29.214181 CPU physical address size: 39 bits
1981 11:52:29.217519 call enable_fixed_mtrr()
1982 11:52:29.221088 CPU physical address size: 39 bits
1983 11:52:29.224574 CPU physical address size: 39 bits
1984 11:52:29.227156 CBFS @ c08000 size 3f8000
1985 11:52:29.234219 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1986 11:52:29.237479 CBFS: Locating 'fallback/payload'
1987 11:52:29.240759 CBFS: Found @ offset 1c96c0 size 3f798
1988 11:52:29.247545 Checking segment from ROM address 0xffdd16f8
1989 11:52:29.250841 Checking segment from ROM address 0xffdd1714
1990 11:52:29.254098 Loading segment from ROM address 0xffdd16f8
1991 11:52:29.257412 code (compression=0)
1992 11:52:29.267229 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1993 11:52:29.273830 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1994 11:52:29.277102 it's not compressed!
1995 11:52:29.368984 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1996 11:52:29.375519 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1997 11:52:29.378211 Loading segment from ROM address 0xffdd1714
1998 11:52:29.381591 Entry Point 0x30000000
1999 11:52:29.384934 Loaded segments
2000 11:52:29.391082 Finalizing chipset.
2001 11:52:29.394323 Finalizing SMM.
2002 11:52:29.397580 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2003 11:52:29.400998 mp_park_aps done after 0 msecs.
2004 11:52:29.407648 Jumping to boot code at 30000000(99b62000)
2005 11:52:29.413897 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2006 11:52:29.414016
2007 11:52:29.414113
2008 11:52:29.414202
2009 11:52:29.417173 Starting depthcharge on Helios...
2010 11:52:29.417274
2011 11:52:29.417705 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2012 11:52:29.417842 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2013 11:52:29.417959 Setting prompt string to ['hatch:']
2014 11:52:29.418079 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2015 11:52:29.427241 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2016 11:52:29.427353
2017 11:52:29.434046 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2018 11:52:29.434154
2019 11:52:29.440690 board_setup: Info: eMMC controller not present; skipping
2020 11:52:29.440809
2021 11:52:29.444066 New NVMe Controller 0x30053ac0 @ 00:1d:00
2022 11:52:29.444170
2023 11:52:29.450492 board_setup: Info: SDHCI controller not present; skipping
2024 11:52:29.450606
2025 11:52:29.453743 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2026 11:52:29.457032
2027 11:52:29.457118 Wipe memory regions:
2028 11:52:29.457205
2029 11:52:29.460412 [0x00000000001000, 0x000000000a0000)
2030 11:52:29.460497
2031 11:52:29.463735 [0x00000000100000, 0x00000030000000)
2032 11:52:29.530163
2033 11:52:29.532873 [0x00000030657430, 0x00000099a2c000)
2034 11:52:29.670726
2035 11:52:29.674099 [0x00000100000000, 0x0000045e800000)
2036 11:52:31.056811
2037 11:52:31.056950 R8152: Initializing
2038 11:52:31.057018
2039 11:52:31.060108 Version 9 (ocp_data = 6010)
2040 11:52:31.064330
2041 11:52:31.064442 R8152: Done initializing
2042 11:52:31.064508
2043 11:52:31.067711 Adding net device
2044 11:52:31.550865
2045 11:52:31.551008 R8152: Initializing
2046 11:52:31.551078
2047 11:52:31.553516 Version 6 (ocp_data = 5c30)
2048 11:52:31.553598
2049 11:52:31.556984 R8152: Done initializing
2050 11:52:31.557066
2051 11:52:31.560264 net_add_device: Attemp to include the same device
2052 11:52:31.564076
2053 11:52:31.571418 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2054 11:52:31.571512
2055 11:52:31.571576
2056 11:52:31.571636
2057 11:52:31.571913 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 11:52:31.672260 hatch: tftpboot 192.168.201.1 10875880/tftp-deploy-94oxugl9/kernel/bzImage 10875880/tftp-deploy-94oxugl9/kernel/cmdline 10875880/tftp-deploy-94oxugl9/ramdisk/ramdisk.cpio.gz
2060 11:52:31.672441 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2061 11:52:31.672553 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2062 11:52:31.676717 tftpboot 192.168.201.1 10875880/tftp-deploy-94oxugl9/kernel/bzImploy-94oxugl9/kernel/cmdline 10875880/tftp-deploy-94oxugl9/ramdisk/ramdisk.cpio.gz
2063 11:52:31.676836
2064 11:52:31.676906 Waiting for link
2065 11:52:31.877239
2066 11:52:31.877410 done.
2067 11:52:31.877515
2068 11:52:31.877608 MAC: 00:24:32:50:19:be
2069 11:52:31.877709
2070 11:52:31.880712 Sending DHCP discover... done.
2071 11:52:31.880833
2072 11:52:31.884119 Waiting for reply... done.
2073 11:52:31.884222
2074 11:52:31.887277 Sending DHCP request... done.
2075 11:52:31.887383
2076 11:52:31.897101 Waiting for reply... done.
2077 11:52:31.897219
2078 11:52:31.897315 My ip is 192.168.201.15
2079 11:52:31.897416
2080 11:52:31.900533 The DHCP server ip is 192.168.201.1
2081 11:52:31.903784
2082 11:52:31.907210 TFTP server IP predefined by user: 192.168.201.1
2083 11:52:31.907318
2084 11:52:31.913789 Bootfile predefined by user: 10875880/tftp-deploy-94oxugl9/kernel/bzImage
2085 11:52:31.913881
2086 11:52:31.917280 Sending tftp read request... done.
2087 11:52:31.917360
2088 11:52:31.920539 Waiting for the transfer...
2089 11:52:31.920643
2090 11:52:32.522014 00000000 ################################################################
2091 11:52:32.522160
2092 11:52:33.115683 00080000 ################################################################
2093 11:52:33.115858
2094 11:52:33.711541 00100000 ################################################################
2095 11:52:33.711717
2096 11:52:34.310224 00180000 ################################################################
2097 11:52:34.310370
2098 11:52:34.906494 00200000 ################################################################
2099 11:52:34.906643
2100 11:52:35.504698 00280000 ################################################################
2101 11:52:35.504877
2102 11:52:36.101152 00300000 ################################################################
2103 11:52:36.101285
2104 11:52:36.711285 00380000 ################################################################
2105 11:52:36.711426
2106 11:52:37.315565 00400000 ################################################################
2107 11:52:37.315701
2108 11:52:37.922005 00480000 ################################################################
2109 11:52:37.922152
2110 11:52:38.529978 00500000 ################################################################
2111 11:52:38.530125
2112 11:52:39.144397 00580000 ################################################################
2113 11:52:39.144564
2114 11:52:39.755189 00600000 ################################################################
2115 11:52:39.755337
2116 11:52:40.363034 00680000 ################################################################
2117 11:52:40.363170
2118 11:52:40.977595 00700000 ################################################################
2119 11:52:40.977745
2120 11:52:41.560584 00780000 ################################################################
2121 11:52:41.560719
2122 11:52:42.099502 00800000 ################################################################
2123 11:52:42.099638
2124 11:52:42.644699 00880000 ################################################################
2125 11:52:42.644896
2126 11:52:43.178553 00900000 ################################################################
2127 11:52:43.178700
2128 11:52:43.694658 00980000 ################################################################
2129 11:52:43.694795
2130 11:52:44.060358 00a00000 ############################################## done.
2131 11:52:44.060531
2132 11:52:44.063566 The bootfile was 10859008 bytes long.
2133 11:52:44.063670
2134 11:52:44.066892 Sending tftp read request... done.
2135 11:52:44.067003
2136 11:52:44.070227 Waiting for the transfer...
2137 11:52:44.070327
2138 11:52:44.582554 00000000 ################################################################
2139 11:52:44.582732
2140 11:52:45.093949 00080000 ################################################################
2141 11:52:45.094094
2142 11:52:45.609972 00100000 ################################################################
2143 11:52:45.610155
2144 11:52:46.137601 00180000 ################################################################
2145 11:52:46.137771
2146 11:52:46.669453 00200000 ################################################################
2147 11:52:46.669623
2148 11:52:47.207514 00280000 ################################################################
2149 11:52:47.207809
2150 11:52:47.738875 00300000 ################################################################
2151 11:52:47.739012
2152 11:52:48.306321 00380000 ################################################################
2153 11:52:48.306462
2154 11:52:48.825210 00400000 ################################################################
2155 11:52:48.825356
2156 11:52:49.399707 00480000 ################################################################
2157 11:52:49.399897
2158 11:52:49.941631 00500000 ################################################################
2159 11:52:49.941805
2160 11:52:50.456108 00580000 ################################################################
2161 11:52:50.456270
2162 11:52:50.559409 00600000 ############# done.
2163 11:52:50.559541
2164 11:52:50.563377 Sending tftp read request... done.
2165 11:52:50.563480
2166 11:52:50.566586 Waiting for the transfer...
2167 11:52:50.566680
2168 11:52:50.566749 00000000 # done.
2169 11:52:50.566821
2170 11:52:50.576468 Command line loaded dynamically from TFTP file: 10875880/tftp-deploy-94oxugl9/kernel/cmdline
2171 11:52:50.576563
2172 11:52:50.599452 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10875880/extract-nfsrootfs-0tspt8bc,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2173 11:52:50.599568
2174 11:52:50.606038 ec_init(0): CrosEC protocol v3 supported (256, 256)
2175 11:52:50.609873
2176 11:52:50.613299 Shutting down all USB controllers.
2177 11:52:50.613382
2178 11:52:50.613447 Removing current net device
2179 11:52:50.617072
2180 11:52:50.617148 Finalizing coreboot
2181 11:52:50.617212
2182 11:52:50.623473 Exiting depthcharge with code 4 at timestamp: 28574198
2183 11:52:50.623569
2184 11:52:50.623640
2185 11:52:50.623702 Starting kernel ...
2186 11:52:50.623762
2187 11:52:50.623823
2188 11:52:50.624266 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2189 11:52:50.624365 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2190 11:52:50.624442 Setting prompt string to ['Linux version [0-9]']
2191 11:52:50.624518 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 11:52:50.624591 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2194 11:57:11.624603 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2196 11:57:11.624853 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2198 11:57:11.625047 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2201 11:57:11.625302 end: 2 depthcharge-action (duration 00:05:00) [common]
2203 11:57:11.625522 Cleaning after the job
2204 11:57:11.625611 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/ramdisk
2205 11:57:11.626476 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/kernel
2206 11:57:11.627777 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/nfsrootfs
2207 11:57:11.712604 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875880/tftp-deploy-94oxugl9/modules
2208 11:57:11.713336 start: 4.1 power-off (timeout 00:00:30) [common]
2209 11:57:11.713539 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2210 11:57:11.789528 >> Command sent successfully.
2211 11:57:11.792006 Returned 0 in 0 seconds
2212 11:57:11.892380 end: 4.1 power-off (duration 00:00:00) [common]
2214 11:57:11.892729 start: 4.2 read-feedback (timeout 00:10:00) [common]
2215 11:57:11.893060 Listened to connection for namespace 'common' for up to 1s
2217 11:57:11.893444 Listened to connection for namespace 'common' for up to 1s
2218 11:57:12.894016 Finalising connection for namespace 'common'
2219 11:57:12.894194 Disconnecting from shell: Finalise
2220 11:57:12.894280