Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 11:51:25.405701 lava-dispatcher, installed at version: 2023.05.1
2 11:51:25.405926 start: 0 validate
3 11:51:25.406072 Start time: 2023-06-23 11:51:25.406061+00:00 (UTC)
4 11:51:25.406210 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:51:25.406360 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230609.0%2Famd64%2Finitrd.cpio.gz exists
6 11:51:25.684842 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:51:25.685056 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:51:25.945916 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:51:25.946147 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230609.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:51:29.066539 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:51:29.066737 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.287-cip100%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:51:29.319161 validate duration: 3.91
14 11:51:29.319547 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:51:29.319660 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:51:29.319758 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:51:29.319900 Not decompressing ramdisk as can be used compressed.
18 11:51:29.320036 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230609.0/amd64/initrd.cpio.gz
19 11:51:29.320163 saving as /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/ramdisk/initrd.cpio.gz
20 11:51:29.320268 total size: 5671432 (5MB)
21 11:51:29.940951 progress 0% (0MB)
22 11:51:29.942664 progress 5% (0MB)
23 11:51:29.944520 progress 10% (0MB)
24 11:51:29.946074 progress 15% (0MB)
25 11:51:29.947864 progress 20% (1MB)
26 11:51:29.949669 progress 25% (1MB)
27 11:51:29.951275 progress 30% (1MB)
28 11:51:29.953067 progress 35% (1MB)
29 11:51:29.954879 progress 40% (2MB)
30 11:51:29.956516 progress 45% (2MB)
31 11:51:29.958341 progress 50% (2MB)
32 11:51:29.960056 progress 55% (3MB)
33 11:51:29.961609 progress 60% (3MB)
34 11:51:29.963356 progress 65% (3MB)
35 11:51:29.965139 progress 70% (3MB)
36 11:51:29.966678 progress 75% (4MB)
37 11:51:29.968378 progress 80% (4MB)
38 11:51:29.970196 progress 85% (4MB)
39 11:51:29.971882 progress 90% (4MB)
40 11:51:29.973677 progress 95% (5MB)
41 11:51:29.975517 progress 100% (5MB)
42 11:51:29.975674 5MB downloaded in 0.66s (8.25MB/s)
43 11:51:29.975899 end: 1.1.1 http-download (duration 00:00:01) [common]
45 11:51:29.976312 end: 1.1 download-retry (duration 00:00:01) [common]
46 11:51:29.976443 start: 1.2 download-retry (timeout 00:09:59) [common]
47 11:51:29.976584 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 11:51:29.976765 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:51:29.976853 saving as /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/kernel/bzImage
50 11:51:29.976936 total size: 10859008 (10MB)
51 11:51:29.977039 No compression specified
52 11:51:29.978362 progress 0% (0MB)
53 11:51:29.981577 progress 5% (0MB)
54 11:51:29.984966 progress 10% (1MB)
55 11:51:29.988015 progress 15% (1MB)
56 11:51:29.991382 progress 20% (2MB)
57 11:51:29.994600 progress 25% (2MB)
58 11:51:29.997956 progress 30% (3MB)
59 11:51:30.001180 progress 35% (3MB)
60 11:51:30.004680 progress 40% (4MB)
61 11:51:30.008135 progress 45% (4MB)
62 11:51:30.011384 progress 50% (5MB)
63 11:51:30.014763 progress 55% (5MB)
64 11:51:30.017993 progress 60% (6MB)
65 11:51:30.021497 progress 65% (6MB)
66 11:51:30.024711 progress 70% (7MB)
67 11:51:30.028100 progress 75% (7MB)
68 11:51:30.031453 progress 80% (8MB)
69 11:51:30.034615 progress 85% (8MB)
70 11:51:30.037950 progress 90% (9MB)
71 11:51:30.041101 progress 95% (9MB)
72 11:51:30.044477 progress 100% (10MB)
73 11:51:30.044693 10MB downloaded in 0.07s (152.85MB/s)
74 11:51:30.044907 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:51:30.045327 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:51:30.045467 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:51:30.045601 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:51:30.045796 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230609.0/amd64/full.rootfs.tar.xz
80 11:51:30.045912 saving as /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/nfsrootfs/full.rootfs.tar
81 11:51:30.046018 total size: 125989320 (120MB)
82 11:51:30.046121 Using unxz to decompress xz
83 11:51:30.050985 progress 0% (0MB)
84 11:51:30.620154 progress 5% (6MB)
85 11:51:31.213054 progress 10% (12MB)
86 11:51:31.757907 progress 15% (18MB)
87 11:51:32.304667 progress 20% (24MB)
88 11:51:32.684027 progress 25% (30MB)
89 11:51:33.056603 progress 30% (36MB)
90 11:51:33.344866 progress 35% (42MB)
91 11:51:33.552873 progress 40% (48MB)
92 11:51:33.954535 progress 45% (54MB)
93 11:51:34.358424 progress 50% (60MB)
94 11:51:34.728550 progress 55% (66MB)
95 11:51:35.124587 progress 60% (72MB)
96 11:51:35.499962 progress 65% (78MB)
97 11:51:35.933117 progress 70% (84MB)
98 11:51:36.404893 progress 75% (90MB)
99 11:51:36.896240 progress 80% (96MB)
100 11:51:37.009101 progress 85% (102MB)
101 11:51:37.197023 progress 90% (108MB)
102 11:51:37.600601 progress 95% (114MB)
103 11:51:38.008081 progress 100% (120MB)
104 11:51:38.015294 120MB downloaded in 7.97s (15.08MB/s)
105 11:51:38.015677 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:51:38.016125 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:51:38.016265 start: 1.4 download-retry (timeout 00:09:51) [common]
109 11:51:38.016405 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 11:51:38.016619 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.287-cip100/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:51:38.016736 saving as /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/modules/modules.tar
112 11:51:38.016840 total size: 483808 (0MB)
113 11:51:38.016944 Using unxz to decompress xz
114 11:51:38.021245 progress 6% (0MB)
115 11:51:38.021714 progress 13% (0MB)
116 11:51:38.022006 progress 20% (0MB)
117 11:51:38.023497 progress 27% (0MB)
118 11:51:38.026051 progress 33% (0MB)
119 11:51:38.028681 progress 40% (0MB)
120 11:51:38.031265 progress 47% (0MB)
121 11:51:38.033403 progress 54% (0MB)
122 11:51:38.036363 progress 60% (0MB)
123 11:51:38.039486 progress 67% (0MB)
124 11:51:38.042057 progress 74% (0MB)
125 11:51:38.044438 progress 81% (0MB)
126 11:51:38.046959 progress 88% (0MB)
127 11:51:38.049389 progress 94% (0MB)
128 11:51:38.051822 progress 100% (0MB)
129 11:51:38.059485 0MB downloaded in 0.04s (10.82MB/s)
130 11:51:38.059844 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:51:38.060300 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:51:38.060447 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 11:51:38.060609 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 11:51:41.886541 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10875886/extract-nfsrootfs-xn76v7xs
136 11:51:41.886763 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
137 11:51:41.886874 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
138 11:51:41.887052 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5
139 11:51:41.887199 makedir: /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin
140 11:51:41.887314 makedir: /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/tests
141 11:51:41.887423 makedir: /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/results
142 11:51:41.887532 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-add-keys
143 11:51:41.887683 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-add-sources
144 11:51:41.887822 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-background-process-start
145 11:51:41.887960 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-background-process-stop
146 11:51:41.888095 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-common-functions
147 11:51:41.888228 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-echo-ipv4
148 11:51:41.888362 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-install-packages
149 11:51:41.888495 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-installed-packages
150 11:51:41.888644 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-os-build
151 11:51:41.888781 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-probe-channel
152 11:51:41.888915 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-probe-ip
153 11:51:41.889049 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-target-ip
154 11:51:41.889181 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-target-mac
155 11:51:41.889314 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-target-storage
156 11:51:41.889449 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-test-case
157 11:51:41.889587 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-test-event
158 11:51:41.889720 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-test-feedback
159 11:51:41.889853 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-test-raise
160 11:51:41.889985 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-test-reference
161 11:51:41.890122 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-test-runner
162 11:51:41.890254 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-test-set
163 11:51:41.890385 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-test-shell
164 11:51:41.890519 Updating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-install-packages (oe)
165 11:51:41.890690 Updating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/bin/lava-installed-packages (oe)
166 11:51:41.890821 Creating /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/environment
167 11:51:41.890935 LAVA metadata
168 11:51:41.891013 - LAVA_JOB_ID=10875886
169 11:51:41.891083 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:51:41.891192 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
171 11:51:41.891265 skipped lava-vland-overlay
172 11:51:41.891346 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:51:41.891431 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
174 11:51:41.891497 skipped lava-multinode-overlay
175 11:51:41.891576 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:51:41.891661 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
177 11:51:41.891741 Loading test definitions
178 11:51:41.891838 start: 1.5.2.3.1 git-repo-action (timeout 00:09:47) [common]
179 11:51:41.891919 Using /lava-10875886 at stage 0
180 11:51:41.892020 Fetching tests from https://github.com/kernelci/test-definitions
181 11:51:41.892103 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/0/tests/0_ltp-ipc'
182 11:51:45.438808 Running '/usr/bin/git checkout kernelci.org
183 11:51:45.605808 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 11:51:45.607076 uuid=10875886_1.5.2.3.1 testdef=None
185 11:51:45.607315 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
187 11:51:45.607812 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
188 11:51:45.609528 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 11:51:45.609986 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
191 11:51:45.612269 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 11:51:45.612772 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
194 11:51:45.615031 runner path: /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/0/tests/0_ltp-ipc test_uuid 10875886_1.5.2.3.1
195 11:51:45.615192 SKIPFILE='skipfile-lkft.yaml'
196 11:51:45.615317 SKIP_INSTALL='true'
197 11:51:45.615427 TST_CMDFILES='ipc'
198 11:51:45.615678 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 11:51:45.616119 Creating lava-test-runner.conf files
201 11:51:45.616232 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10875886/lava-overlay-h6utczw5/lava-10875886/0 for stage 0
202 11:51:45.616386 - 0_ltp-ipc
203 11:51:45.616568 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
204 11:51:45.616721 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
205 11:51:54.004060 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 11:51:54.004276 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
207 11:51:54.004438 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 11:51:54.004600 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
209 11:51:54.004712 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
210 11:51:54.162125 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 11:51:54.162546 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
212 11:51:54.162686 extracting modules file /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875886/extract-nfsrootfs-xn76v7xs
213 11:51:54.184420 extracting modules file /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10875886/extract-overlay-ramdisk-jxm4nkwp/ramdisk
214 11:51:54.206232 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 11:51:54.206399 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
216 11:51:54.206503 [common] Applying overlay to NFS
217 11:51:54.206583 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10875886/compress-overlay-ggx3vtf6/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10875886/extract-nfsrootfs-xn76v7xs
218 11:51:55.205701 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 11:51:55.205890 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
220 11:51:55.206004 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 11:51:55.206107 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
222 11:51:55.206203 Building ramdisk /var/lib/lava/dispatcher/tmp/10875886/extract-overlay-ramdisk-jxm4nkwp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10875886/extract-overlay-ramdisk-jxm4nkwp/ramdisk
223 11:51:55.289891 >> 31370 blocks
224 11:51:56.007549 rename /var/lib/lava/dispatcher/tmp/10875886/extract-overlay-ramdisk-jxm4nkwp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/ramdisk/ramdisk.cpio.gz
225 11:51:56.008039 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 11:51:56.008208 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
227 11:51:56.008361 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
228 11:51:56.008502 No mkimage arch provided, not using FIT.
229 11:51:56.008618 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 11:51:56.008732 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 11:51:56.008862 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
232 11:51:56.008976 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
233 11:51:56.009071 No LXC device requested
234 11:51:56.009198 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 11:51:56.009340 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
236 11:51:56.009467 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 11:51:56.009598 Checking files for TFTP limit of 4294967296 bytes.
238 11:51:56.010170 end: 1 tftp-deploy (duration 00:00:27) [common]
239 11:51:56.010316 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 11:51:56.010452 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 11:51:56.010650 substitutions:
242 11:51:56.010754 - {DTB}: None
243 11:51:56.010864 - {INITRD}: 10875886/tftp-deploy-n1xyva0x/ramdisk/ramdisk.cpio.gz
244 11:51:56.010964 - {KERNEL}: 10875886/tftp-deploy-n1xyva0x/kernel/bzImage
245 11:51:56.011065 - {LAVA_MAC}: None
246 11:51:56.011162 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10875886/extract-nfsrootfs-xn76v7xs
247 11:51:56.011263 - {NFS_SERVER_IP}: 192.168.201.1
248 11:51:56.011361 - {PRESEED_CONFIG}: None
249 11:51:56.011460 - {PRESEED_LOCAL}: None
250 11:51:56.011554 - {RAMDISK}: 10875886/tftp-deploy-n1xyva0x/ramdisk/ramdisk.cpio.gz
251 11:51:56.011619 - {ROOT_PART}: None
252 11:51:56.011680 - {ROOT}: None
253 11:51:56.011742 - {SERVER_IP}: 192.168.201.1
254 11:51:56.011822 - {TEE}: None
255 11:51:56.011916 Parsed boot commands:
256 11:51:56.012008 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 11:51:56.012247 Parsed boot commands: tftpboot 192.168.201.1 10875886/tftp-deploy-n1xyva0x/kernel/bzImage 10875886/tftp-deploy-n1xyva0x/kernel/cmdline 10875886/tftp-deploy-n1xyva0x/ramdisk/ramdisk.cpio.gz
258 11:51:56.012386 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 11:51:56.012514 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 11:51:56.012642 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 11:51:56.012779 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 11:51:56.012891 Not connected, no need to disconnect.
263 11:51:56.013013 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 11:51:56.013148 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 11:51:56.013262 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
266 11:51:56.017274 Setting prompt string to ['lava-test: # ']
267 11:51:56.017675 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 11:51:56.017795 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 11:51:56.017908 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 11:51:56.018013 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 11:51:56.018226 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
272 11:52:01.153130 >> Command sent successfully.
273 11:52:01.155602 Returned 0 in 5 seconds
274 11:52:01.256033 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 11:52:01.256552 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 11:52:01.256716 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 11:52:01.256856 Setting prompt string to 'Starting depthcharge on Voema...'
279 11:52:01.256983 Changing prompt to 'Starting depthcharge on Voema...'
280 11:52:01.257106 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
281 11:52:01.257526 [Enter `^Ec?' for help]
282 11:52:02.820603
283 11:52:02.820787
284 11:52:02.830113 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
285 11:52:02.837243 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
286 11:52:02.840407 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
287 11:52:02.843540 CPU: AES supported, TXT NOT supported, VT supported
288 11:52:02.850470 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
289 11:52:02.853598 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
290 11:52:02.860638 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
291 11:52:02.863757 VBOOT: Loading verstage.
292 11:52:02.867017 FMAP: Found "FLASH" version 1.1 at 0x1804000.
293 11:52:02.874136 FMAP: base = 0x0 size = 0x2000000 #areas = 32
294 11:52:02.877244 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 11:52:02.887077 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
296 11:52:02.894117 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
297 11:52:02.894245
298 11:52:02.894359
299 11:52:02.907573 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
300 11:52:02.921075 Probing TPM: . done!
301 11:52:02.924251 TPM ready after 0 ms
302 11:52:02.927601 Connected to device vid:did:rid of 1ae0:0028:00
303 11:52:02.938978 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
304 11:52:02.945443 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 11:52:02.948581 Initialized TPM device CR50 revision 0
306 11:52:03.058369 tlcl_send_startup: Startup return code is 0
307 11:52:03.058564 TPM: setup succeeded
308 11:52:03.073286 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 11:52:03.087467 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 11:52:03.100597 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 11:52:03.110369 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 11:52:03.114088 Chrome EC: UHEPI supported
313 11:52:03.117206 Phase 1
314 11:52:03.120223 FMAP: area GBB found @ 1805000 (458752 bytes)
315 11:52:03.130469 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 11:52:03.137312 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 11:52:03.143444 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
318 11:52:03.150424 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
319 11:52:03.153659 Recovery requested (1009000e)
320 11:52:03.156722 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 11:52:03.168531 tlcl_extend: response is 0
322 11:52:03.174867 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 11:52:03.185214 tlcl_extend: response is 0
324 11:52:03.191464 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 11:52:03.197975 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 11:52:03.204895 BS: verstage times (exec / console): total (unknown) / 142 ms
327 11:52:03.205029
328 11:52:03.205138
329 11:52:03.217940 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 11:52:03.224530 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 11:52:03.227600 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 11:52:03.231288 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 11:52:03.237975 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 11:52:03.241163 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 11:52:03.244278 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
336 11:52:03.248019 TCO_STS: 0000 0000
337 11:52:03.251200 GEN_PMCON: d0015038 00002200
338 11:52:03.254431 GBLRST_CAUSE: 00000000 00000000
339 11:52:03.257699 HPR_CAUSE0: 00000000
340 11:52:03.257794 prev_sleep_state 5
341 11:52:03.260798 Boot Count incremented to 18795
342 11:52:03.267216 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 11:52:03.274212 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 11:52:03.284267 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 11:52:03.290610 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 11:52:03.293745 Chrome EC: UHEPI supported
347 11:52:03.300625 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 11:52:03.311520 Probing TPM: done!
349 11:52:03.318474 Connected to device vid:did:rid of 1ae0:0028:00
350 11:52:03.328154 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
351 11:52:03.331952 Initialized TPM device CR50 revision 0
352 11:52:03.347469 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 11:52:03.354071 MRC: Hash idx 0x100b comparison successful.
354 11:52:03.354181 MRC cache found, size faa8
355 11:52:03.357289 bootmode is set to: 2
356 11:52:03.360443 SPD index = 2
357 11:52:03.367385 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 11:52:03.370582 SPD: module type is LPDDR4X
359 11:52:03.373649 SPD: module part number is MT53D1G64D4NW-046
360 11:52:03.379978 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
361 11:52:03.383756 SPD: device width 16 bits, bus width 16 bits
362 11:52:03.390326 SPD: module size is 2048 MB (per channel)
363 11:52:03.818909 CBMEM:
364 11:52:03.822083 IMD: root @ 0x76fff000 254 entries.
365 11:52:03.825271 IMD: root @ 0x76ffec00 62 entries.
366 11:52:03.828957 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 11:52:03.835297 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 11:52:03.838534 External stage cache:
369 11:52:03.841615 IMD: root @ 0x7b3ff000 254 entries.
370 11:52:03.845378 IMD: root @ 0x7b3fec00 62 entries.
371 11:52:03.860423 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 11:52:03.866758 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 11:52:03.873343 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 11:52:03.886977 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 11:52:03.893587 cse_lite: Skip switching to RW in the recovery path
376 11:52:03.893686 8 DIMMs found
377 11:52:03.897130 SMM Memory Map
378 11:52:03.900139 SMRAM : 0x7b000000 0x800000
379 11:52:03.903611 Subregion 0: 0x7b000000 0x200000
380 11:52:03.906762 Subregion 1: 0x7b200000 0x200000
381 11:52:03.910121 Subregion 2: 0x7b400000 0x400000
382 11:52:03.910251 top_of_ram = 0x77000000
383 11:52:03.916540 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 11:52:03.924250 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 11:52:03.928159 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 11:52:03.931328 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 11:52:03.940987 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 11:52:03.947380 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 11:52:03.957549 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 11:52:03.960627 Processing 211 relocs. Offset value of 0x74c0b000
391 11:52:03.969788 BS: romstage times (exec / console): total (unknown) / 277 ms
392 11:52:03.975389
393 11:52:03.975513
394 11:52:03.985637 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 11:52:03.988553 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 11:52:03.998686 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 11:52:04.005500 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 11:52:04.012048 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 11:52:04.018305 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 11:52:04.062639 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 11:52:04.068940 Processing 5008 relocs. Offset value of 0x75d98000
402 11:52:04.072260 BS: postcar times (exec / console): total (unknown) / 59 ms
403 11:52:04.075341
404 11:52:04.075456
405 11:52:04.085333 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 11:52:04.085462 Normal boot
407 11:52:04.089015 FW_CONFIG value is 0x804c02
408 11:52:04.092292 PCI: 00:07.0 disabled by fw_config
409 11:52:04.095306 PCI: 00:07.1 disabled by fw_config
410 11:52:04.098981 PCI: 00:0d.2 disabled by fw_config
411 11:52:04.105600 PCI: 00:1c.7 disabled by fw_config
412 11:52:04.108679 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 11:52:04.115578 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 11:52:04.118548 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 11:52:04.125310 GENERIC: 0.0 disabled by fw_config
416 11:52:04.128475 GENERIC: 1.0 disabled by fw_config
417 11:52:04.131766 fw_config match found: DB_USB=USB3_ACTIVE
418 11:52:04.134972 fw_config match found: DB_USB=USB3_ACTIVE
419 11:52:04.138788 fw_config match found: DB_USB=USB3_ACTIVE
420 11:52:04.145259 fw_config match found: DB_USB=USB3_ACTIVE
421 11:52:04.148515 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 11:52:04.155384 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 11:52:04.165453 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 11:52:04.171688 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 11:52:04.174914 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 11:52:04.182036 microcode: Update skipped, already up-to-date
427 11:52:04.188208 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 11:52:04.215884 Detected 4 core, 8 thread CPU.
429 11:52:04.219396 Setting up SMI for CPU
430 11:52:04.222472 IED base = 0x7b400000
431 11:52:04.222594 IED size = 0x00400000
432 11:52:04.225988 Will perform SMM setup.
433 11:52:04.232585 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
434 11:52:04.239064 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 11:52:04.245907 Processing 16 relocs. Offset value of 0x00030000
436 11:52:04.249033 Attempting to start 7 APs
437 11:52:04.252243 Waiting for 10ms after sending INIT.
438 11:52:04.267819 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 11:52:04.267920 done.
440 11:52:04.270936 AP: slot 5 apic_id 6.
441 11:52:04.274571 AP: slot 4 apic_id 7.
442 11:52:04.274689 AP: slot 7 apic_id 4.
443 11:52:04.277821 AP: slot 3 apic_id 5.
444 11:52:04.281027 AP: slot 6 apic_id 2.
445 11:52:04.284116 AP: slot 2 apic_id 3.
446 11:52:04.287797 Waiting for 2nd SIPI to complete...done.
447 11:52:04.294120 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 11:52:04.301200 Processing 13 relocs. Offset value of 0x00038000
449 11:52:04.304345 Unable to locate Global NVS
450 11:52:04.310727 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 11:52:04.313943 Installing permanent SMM handler to 0x7b000000
452 11:52:04.324201 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 11:52:04.327255 Processing 794 relocs. Offset value of 0x7b010000
454 11:52:04.337412 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 11:52:04.340458 Processing 13 relocs. Offset value of 0x7b008000
456 11:52:04.347508 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 11:52:04.353969 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 11:52:04.357305 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 11:52:04.364212 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 11:52:04.370291 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 11:52:04.377214 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 11:52:04.383774 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 11:52:04.383894 Unable to locate Global NVS
464 11:52:04.393943 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 11:52:04.396969 Clearing SMI status registers
466 11:52:04.397087 SMI_STS: PM1
467 11:52:04.400084 PM1_STS: PWRBTN
468 11:52:04.407102 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 11:52:04.410338 In relocation handler: CPU 0
470 11:52:04.413517 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 11:52:04.420342 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 11:52:04.420464 Relocation complete.
473 11:52:04.429819 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 11:52:04.433418 In relocation handler: CPU 1
475 11:52:04.436416 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 11:52:04.436548 Relocation complete.
477 11:52:04.446676 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
478 11:52:04.449935 In relocation handler: CPU 2
479 11:52:04.453158 New SMBASE=0x7afff800 IEDBASE=0x7b400000
480 11:52:04.453274 Relocation complete.
481 11:52:04.463081 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
482 11:52:04.466259 In relocation handler: CPU 6
483 11:52:04.469473 New SMBASE=0x7affe800 IEDBASE=0x7b400000
484 11:52:04.473332 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 11:52:04.476629 Relocation complete.
486 11:52:04.482764 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
487 11:52:04.485925 In relocation handler: CPU 4
488 11:52:04.489128 New SMBASE=0x7afff000 IEDBASE=0x7b400000
489 11:52:04.493059 Relocation complete.
490 11:52:04.499590 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 11:52:04.502658 In relocation handler: CPU 5
492 11:52:04.505913 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 11:52:04.512321 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 11:52:04.512437 Relocation complete.
495 11:52:04.522489 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
496 11:52:04.522638 In relocation handler: CPU 3
497 11:52:04.529108 New SMBASE=0x7afff400 IEDBASE=0x7b400000
498 11:52:04.529234 Relocation complete.
499 11:52:04.538882 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
500 11:52:04.539007 In relocation handler: CPU 7
501 11:52:04.545387 New SMBASE=0x7affe400 IEDBASE=0x7b400000
502 11:52:04.548461 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 11:52:04.552214 Relocation complete.
504 11:52:04.552331 Initializing CPU #0
505 11:52:04.555291 CPU: vendor Intel device 806c1
506 11:52:04.562040 CPU: family 06, model 8c, stepping 01
507 11:52:04.562160 Clearing out pending MCEs
508 11:52:04.565149 Setting up local APIC...
509 11:52:04.568404 apic_id: 0x00 done.
510 11:52:04.572252 Turbo is available but hidden
511 11:52:04.575365 Turbo is available and visible
512 11:52:04.578549 microcode: Update skipped, already up-to-date
513 11:52:04.581798 CPU #0 initialized
514 11:52:04.581922 Initializing CPU #1
515 11:52:04.585038 Initializing CPU #6
516 11:52:04.588851 Initializing CPU #2
517 11:52:04.588940 Initializing CPU #3
518 11:52:04.592650 Initializing CPU #7
519 11:52:04.596474 CPU: vendor Intel device 806c1
520 11:52:04.599589 CPU: family 06, model 8c, stepping 01
521 11:52:04.602702 CPU: vendor Intel device 806c1
522 11:52:04.606391 CPU: family 06, model 8c, stepping 01
523 11:52:04.609677 Clearing out pending MCEs
524 11:52:04.609773 Clearing out pending MCEs
525 11:52:04.612857 Setting up local APIC...
526 11:52:04.616091 CPU: vendor Intel device 806c1
527 11:52:04.619324 CPU: family 06, model 8c, stepping 01
528 11:52:04.622575 CPU: vendor Intel device 806c1
529 11:52:04.625969 CPU: family 06, model 8c, stepping 01
530 11:52:04.629787 Clearing out pending MCEs
531 11:52:04.632922 Clearing out pending MCEs
532 11:52:04.633017 apic_id: 0x05 done.
533 11:52:04.636347 Setting up local APIC...
534 11:52:04.643031 microcode: Update skipped, already up-to-date
535 11:52:04.643127 apic_id: 0x02 done.
536 11:52:04.646112 Setting up local APIC...
537 11:52:04.649137 CPU #3 initialized
538 11:52:04.649231 Setting up local APIC...
539 11:52:04.652775 apic_id: 0x03 done.
540 11:52:04.656400 apic_id: 0x04 done.
541 11:52:04.659420 microcode: Update skipped, already up-to-date
542 11:52:04.662590 microcode: Update skipped, already up-to-date
543 11:52:04.665718 CPU #6 initialized
544 11:52:04.669528 CPU #2 initialized
545 11:52:04.669657 Initializing CPU #5
546 11:52:04.672636 Initializing CPU #4
547 11:52:04.675775 CPU: vendor Intel device 806c1
548 11:52:04.679482 CPU: family 06, model 8c, stepping 01
549 11:52:04.682658 microcode: Update skipped, already up-to-date
550 11:52:04.685886 CPU: vendor Intel device 806c1
551 11:52:04.688948 CPU: family 06, model 8c, stepping 01
552 11:52:04.692600 CPU: vendor Intel device 806c1
553 11:52:04.699463 CPU: family 06, model 8c, stepping 01
554 11:52:04.699559 Clearing out pending MCEs
555 11:52:04.702593 Clearing out pending MCEs
556 11:52:04.705688 Setting up local APIC...
557 11:52:04.705813 CPU #7 initialized
558 11:52:04.708866 Setting up local APIC...
559 11:52:04.712631 Clearing out pending MCEs
560 11:52:04.715851 apic_id: 0x07 done.
561 11:52:04.715955 apic_id: 0x06 done.
562 11:52:04.722076 microcode: Update skipped, already up-to-date
563 11:52:04.725954 microcode: Update skipped, already up-to-date
564 11:52:04.729085 CPU #4 initialized
565 11:52:04.729188 CPU #5 initialized
566 11:52:04.732267 Setting up local APIC...
567 11:52:04.735478 apic_id: 0x01 done.
568 11:52:04.738585 microcode: Update skipped, already up-to-date
569 11:52:04.742239 CPU #1 initialized
570 11:52:04.745386 bsp_do_flight_plan done after 454 msecs.
571 11:52:04.748458 CPU: frequency set to 4400 MHz
572 11:52:04.748553 Enabling SMIs.
573 11:52:04.755287 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
574 11:52:04.772859 SATAXPCIE1 indicates PCIe NVMe is present
575 11:52:04.776043 Probing TPM: done!
576 11:52:04.779219 Connected to device vid:did:rid of 1ae0:0028:00
577 11:52:04.789969 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
578 11:52:04.793063 Initialized TPM device CR50 revision 0
579 11:52:04.796723 Enabling S0i3.4
580 11:52:04.803163 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 11:52:04.806930 Found a VBT of 8704 bytes after decompression
582 11:52:04.813238 cse_lite: CSE RO boot. HybridStorageMode disabled
583 11:52:04.819911 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 11:52:04.894672 FSPS returned 0
585 11:52:04.897813 Executing Phase 1 of FspMultiPhaseSiInit
586 11:52:04.907994 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 11:52:04.911086 port C0 DISC req: usage 1 usb3 1 usb2 5
588 11:52:04.914814 Raw Buffer output 0 00000511
589 11:52:04.918005 Raw Buffer output 1 00000000
590 11:52:04.921914 pmc_send_ipc_cmd succeeded
591 11:52:04.928319 port C1 DISC req: usage 1 usb3 2 usb2 3
592 11:52:04.928407 Raw Buffer output 0 00000321
593 11:52:04.931466 Raw Buffer output 1 00000000
594 11:52:04.935972 pmc_send_ipc_cmd succeeded
595 11:52:04.940595 Detected 4 core, 8 thread CPU.
596 11:52:04.943830 Detected 4 core, 8 thread CPU.
597 11:52:05.144097 Display FSP Version Info HOB
598 11:52:05.147700 Reference Code - CPU = a.0.4c.31
599 11:52:05.151025 uCode Version = 0.0.0.86
600 11:52:05.154315 TXT ACM version = ff.ff.ff.ffff
601 11:52:05.157579 Reference Code - ME = a.0.4c.31
602 11:52:05.160688 MEBx version = 0.0.0.0
603 11:52:05.163922 ME Firmware Version = Consumer SKU
604 11:52:05.167045 Reference Code - PCH = a.0.4c.31
605 11:52:05.170727 PCH-CRID Status = Disabled
606 11:52:05.174319 PCH-CRID Original Value = ff.ff.ff.ffff
607 11:52:05.178096 PCH-CRID New Value = ff.ff.ff.ffff
608 11:52:05.181118 OPROM - RST - RAID = ff.ff.ff.ffff
609 11:52:05.184612 PCH Hsio Version = 4.0.0.0
610 11:52:05.188233 Reference Code - SA - System Agent = a.0.4c.31
611 11:52:05.191187 Reference Code - MRC = 2.0.0.1
612 11:52:05.194591 SA - PCIe Version = a.0.4c.31
613 11:52:05.197580 SA-CRID Status = Disabled
614 11:52:05.201220 SA-CRID Original Value = 0.0.0.1
615 11:52:05.204172 SA-CRID New Value = 0.0.0.1
616 11:52:05.207836 OPROM - VBIOS = ff.ff.ff.ffff
617 11:52:05.210828 IO Manageability Engine FW Version = 11.1.4.0
618 11:52:05.214507 PHY Build Version = 0.0.0.e0
619 11:52:05.217699 Thunderbolt(TM) FW Version = 0.0.0.0
620 11:52:05.224576 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 11:52:05.227843 ITSS IRQ Polarities Before:
622 11:52:05.227931 IPC0: 0xffffffff
623 11:52:05.231002 IPC1: 0xffffffff
624 11:52:05.231145 IPC2: 0xffffffff
625 11:52:05.234108 IPC3: 0xffffffff
626 11:52:05.237324 ITSS IRQ Polarities After:
627 11:52:05.237421 IPC0: 0xffffffff
628 11:52:05.241089 IPC1: 0xffffffff
629 11:52:05.241174 IPC2: 0xffffffff
630 11:52:05.244315 IPC3: 0xffffffff
631 11:52:05.247491 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 11:52:05.260954 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 11:52:05.270753 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 11:52:05.283422 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 11:52:05.290407 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
636 11:52:05.293452 Enumerating buses...
637 11:52:05.296857 Show all devs... Before device enumeration.
638 11:52:05.300473 Root Device: enabled 1
639 11:52:05.300574 DOMAIN: 0000: enabled 1
640 11:52:05.303415 CPU_CLUSTER: 0: enabled 1
641 11:52:05.306996 PCI: 00:00.0: enabled 1
642 11:52:05.310070 PCI: 00:02.0: enabled 1
643 11:52:05.310165 PCI: 00:04.0: enabled 1
644 11:52:05.313602 PCI: 00:05.0: enabled 1
645 11:52:05.316562 PCI: 00:06.0: enabled 0
646 11:52:05.316658 PCI: 00:07.0: enabled 0
647 11:52:05.320169 PCI: 00:07.1: enabled 0
648 11:52:05.323941 PCI: 00:07.2: enabled 0
649 11:52:05.327097 PCI: 00:07.3: enabled 0
650 11:52:05.327193 PCI: 00:08.0: enabled 1
651 11:52:05.330317 PCI: 00:09.0: enabled 0
652 11:52:05.333534 PCI: 00:0a.0: enabled 0
653 11:52:05.336690 PCI: 00:0d.0: enabled 1
654 11:52:05.336787 PCI: 00:0d.1: enabled 0
655 11:52:05.339978 PCI: 00:0d.2: enabled 0
656 11:52:05.343760 PCI: 00:0d.3: enabled 0
657 11:52:05.347018 PCI: 00:0e.0: enabled 0
658 11:52:05.347115 PCI: 00:10.2: enabled 1
659 11:52:05.350176 PCI: 00:10.6: enabled 0
660 11:52:05.353412 PCI: 00:10.7: enabled 0
661 11:52:05.356627 PCI: 00:12.0: enabled 0
662 11:52:05.356723 PCI: 00:12.6: enabled 0
663 11:52:05.359774 PCI: 00:13.0: enabled 0
664 11:52:05.363565 PCI: 00:14.0: enabled 1
665 11:52:05.363660 PCI: 00:14.1: enabled 0
666 11:52:05.366815 PCI: 00:14.2: enabled 1
667 11:52:05.369927 PCI: 00:14.3: enabled 1
668 11:52:05.373292 PCI: 00:15.0: enabled 1
669 11:52:05.373427 PCI: 00:15.1: enabled 1
670 11:52:05.376496 PCI: 00:15.2: enabled 1
671 11:52:05.379666 PCI: 00:15.3: enabled 1
672 11:52:05.383432 PCI: 00:16.0: enabled 1
673 11:52:05.383573 PCI: 00:16.1: enabled 0
674 11:52:05.386298 PCI: 00:16.2: enabled 0
675 11:52:05.389849 PCI: 00:16.3: enabled 0
676 11:52:05.393039 PCI: 00:16.4: enabled 0
677 11:52:05.393181 PCI: 00:16.5: enabled 0
678 11:52:05.396660 PCI: 00:17.0: enabled 1
679 11:52:05.399718 PCI: 00:19.0: enabled 0
680 11:52:05.403405 PCI: 00:19.1: enabled 1
681 11:52:05.403500 PCI: 00:19.2: enabled 0
682 11:52:05.406243 PCI: 00:1c.0: enabled 1
683 11:52:05.409842 PCI: 00:1c.1: enabled 0
684 11:52:05.412798 PCI: 00:1c.2: enabled 0
685 11:52:05.412904 PCI: 00:1c.3: enabled 0
686 11:52:05.415903 PCI: 00:1c.4: enabled 0
687 11:52:05.419462 PCI: 00:1c.5: enabled 0
688 11:52:05.419589 PCI: 00:1c.6: enabled 1
689 11:52:05.423085 PCI: 00:1c.7: enabled 0
690 11:52:05.426139 PCI: 00:1d.0: enabled 1
691 11:52:05.429792 PCI: 00:1d.1: enabled 0
692 11:52:05.429888 PCI: 00:1d.2: enabled 1
693 11:52:05.432800 PCI: 00:1d.3: enabled 0
694 11:52:05.436274 PCI: 00:1e.0: enabled 1
695 11:52:05.439444 PCI: 00:1e.1: enabled 0
696 11:52:05.439591 PCI: 00:1e.2: enabled 1
697 11:52:05.442717 PCI: 00:1e.3: enabled 1
698 11:52:05.445982 PCI: 00:1f.0: enabled 1
699 11:52:05.449105 PCI: 00:1f.1: enabled 0
700 11:52:05.449232 PCI: 00:1f.2: enabled 1
701 11:52:05.452312 PCI: 00:1f.3: enabled 1
702 11:52:05.456194 PCI: 00:1f.4: enabled 0
703 11:52:05.459397 PCI: 00:1f.5: enabled 1
704 11:52:05.459517 PCI: 00:1f.6: enabled 0
705 11:52:05.462629 PCI: 00:1f.7: enabled 0
706 11:52:05.465910 APIC: 00: enabled 1
707 11:52:05.466030 GENERIC: 0.0: enabled 1
708 11:52:05.469019 GENERIC: 0.0: enabled 1
709 11:52:05.472208 GENERIC: 1.0: enabled 1
710 11:52:05.475423 GENERIC: 0.0: enabled 1
711 11:52:05.475541 GENERIC: 1.0: enabled 1
712 11:52:05.478795 USB0 port 0: enabled 1
713 11:52:05.482653 GENERIC: 0.0: enabled 1
714 11:52:05.482770 USB0 port 0: enabled 1
715 11:52:05.485918 GENERIC: 0.0: enabled 1
716 11:52:05.489104 I2C: 00:1a: enabled 1
717 11:52:05.492097 I2C: 00:31: enabled 1
718 11:52:05.492210 I2C: 00:32: enabled 1
719 11:52:05.495619 I2C: 00:10: enabled 1
720 11:52:05.499007 I2C: 00:15: enabled 1
721 11:52:05.499129 GENERIC: 0.0: enabled 0
722 11:52:05.502185 GENERIC: 1.0: enabled 0
723 11:52:05.505112 GENERIC: 0.0: enabled 1
724 11:52:05.505211 SPI: 00: enabled 1
725 11:52:05.508825 SPI: 00: enabled 1
726 11:52:05.511910 PNP: 0c09.0: enabled 1
727 11:52:05.512036 GENERIC: 0.0: enabled 1
728 11:52:05.515463 USB3 port 0: enabled 1
729 11:52:05.518457 USB3 port 1: enabled 1
730 11:52:05.521873 USB3 port 2: enabled 0
731 11:52:05.521992 USB3 port 3: enabled 0
732 11:52:05.525391 USB2 port 0: enabled 0
733 11:52:05.528439 USB2 port 1: enabled 1
734 11:52:05.528573 USB2 port 2: enabled 1
735 11:52:05.532062 USB2 port 3: enabled 0
736 11:52:05.535166 USB2 port 4: enabled 1
737 11:52:05.538304 USB2 port 5: enabled 0
738 11:52:05.538395 USB2 port 6: enabled 0
739 11:52:05.541815 USB2 port 7: enabled 0
740 11:52:05.545432 USB2 port 8: enabled 0
741 11:52:05.545528 USB2 port 9: enabled 0
742 11:52:05.548379 USB3 port 0: enabled 0
743 11:52:05.551593 USB3 port 1: enabled 1
744 11:52:05.551689 USB3 port 2: enabled 0
745 11:52:05.555074 USB3 port 3: enabled 0
746 11:52:05.558371 GENERIC: 0.0: enabled 1
747 11:52:05.561552 GENERIC: 1.0: enabled 1
748 11:52:05.561648 APIC: 01: enabled 1
749 11:52:05.564704 APIC: 03: enabled 1
750 11:52:05.568071 APIC: 05: enabled 1
751 11:52:05.568168 APIC: 07: enabled 1
752 11:52:05.571242 APIC: 06: enabled 1
753 11:52:05.571328 APIC: 02: enabled 1
754 11:52:05.575138 APIC: 04: enabled 1
755 11:52:05.578347 Compare with tree...
756 11:52:05.578481 Root Device: enabled 1
757 11:52:05.581588 DOMAIN: 0000: enabled 1
758 11:52:05.584907 PCI: 00:00.0: enabled 1
759 11:52:05.588145 PCI: 00:02.0: enabled 1
760 11:52:05.591239 PCI: 00:04.0: enabled 1
761 11:52:05.591372 GENERIC: 0.0: enabled 1
762 11:52:05.595017 PCI: 00:05.0: enabled 1
763 11:52:05.598200 PCI: 00:06.0: enabled 0
764 11:52:05.601207 PCI: 00:07.0: enabled 0
765 11:52:05.604728 GENERIC: 0.0: enabled 1
766 11:52:05.604817 PCI: 00:07.1: enabled 0
767 11:52:05.608157 GENERIC: 1.0: enabled 1
768 11:52:05.611577 PCI: 00:07.2: enabled 0
769 11:52:05.614747 GENERIC: 0.0: enabled 1
770 11:52:05.617878 PCI: 00:07.3: enabled 0
771 11:52:05.617977 GENERIC: 1.0: enabled 1
772 11:52:05.621416 PCI: 00:08.0: enabled 1
773 11:52:05.624445 PCI: 00:09.0: enabled 0
774 11:52:05.628007 PCI: 00:0a.0: enabled 0
775 11:52:05.631469 PCI: 00:0d.0: enabled 1
776 11:52:05.631611 USB0 port 0: enabled 1
777 11:52:05.634504 USB3 port 0: enabled 1
778 11:52:05.638097 USB3 port 1: enabled 1
779 11:52:05.640993 USB3 port 2: enabled 0
780 11:52:05.644561 USB3 port 3: enabled 0
781 11:52:05.647623 PCI: 00:0d.1: enabled 0
782 11:52:05.647717 PCI: 00:0d.2: enabled 0
783 11:52:05.651206 GENERIC: 0.0: enabled 1
784 11:52:05.654190 PCI: 00:0d.3: enabled 0
785 11:52:05.658028 PCI: 00:0e.0: enabled 0
786 11:52:05.661312 PCI: 00:10.2: enabled 1
787 11:52:05.661419 PCI: 00:10.6: enabled 0
788 11:52:05.664459 PCI: 00:10.7: enabled 0
789 11:52:05.667629 PCI: 00:12.0: enabled 0
790 11:52:05.670968 PCI: 00:12.6: enabled 0
791 11:52:05.671086 PCI: 00:13.0: enabled 0
792 11:52:05.674174 PCI: 00:14.0: enabled 1
793 11:52:05.677450 USB0 port 0: enabled 1
794 11:52:05.680677 USB2 port 0: enabled 0
795 11:52:05.684410 USB2 port 1: enabled 1
796 11:52:05.687741 USB2 port 2: enabled 1
797 11:52:05.687828 USB2 port 3: enabled 0
798 11:52:05.691030 USB2 port 4: enabled 1
799 11:52:05.694244 USB2 port 5: enabled 0
800 11:52:05.697408 USB2 port 6: enabled 0
801 11:52:05.700587 USB2 port 7: enabled 0
802 11:52:05.703717 USB2 port 8: enabled 0
803 11:52:05.703850 USB2 port 9: enabled 0
804 11:52:05.707397 USB3 port 0: enabled 0
805 11:52:05.710755 USB3 port 1: enabled 1
806 11:52:05.713822 USB3 port 2: enabled 0
807 11:52:05.717446 USB3 port 3: enabled 0
808 11:52:05.717570 PCI: 00:14.1: enabled 0
809 11:52:05.720677 PCI: 00:14.2: enabled 1
810 11:52:05.723743 PCI: 00:14.3: enabled 1
811 11:52:05.727333 GENERIC: 0.0: enabled 1
812 11:52:05.730473 PCI: 00:15.0: enabled 1
813 11:52:05.730596 I2C: 00:1a: enabled 1
814 11:52:05.733934 I2C: 00:31: enabled 1
815 11:52:05.736869 I2C: 00:32: enabled 1
816 11:52:05.740646 PCI: 00:15.1: enabled 1
817 11:52:05.743649 I2C: 00:10: enabled 1
818 11:52:05.743739 PCI: 00:15.2: enabled 1
819 11:52:05.747292 PCI: 00:15.3: enabled 1
820 11:52:05.750249 PCI: 00:16.0: enabled 1
821 11:52:05.753359 PCI: 00:16.1: enabled 0
822 11:52:05.757051 PCI: 00:16.2: enabled 0
823 11:52:05.757146 PCI: 00:16.3: enabled 0
824 11:52:05.760047 PCI: 00:16.4: enabled 0
825 11:52:05.763932 PCI: 00:16.5: enabled 0
826 11:52:05.767138 PCI: 00:17.0: enabled 1
827 11:52:05.770278 PCI: 00:19.0: enabled 0
828 11:52:05.770374 PCI: 00:19.1: enabled 1
829 11:52:05.773576 I2C: 00:15: enabled 1
830 11:52:05.823719 PCI: 00:19.2: enabled 0
831 11:52:05.823891 PCI: 00:1d.0: enabled 1
832 11:52:05.824221 GENERIC: 0.0: enabled 1
833 11:52:05.824341 PCI: 00:1e.0: enabled 1
834 11:52:05.824448 PCI: 00:1e.1: enabled 0
835 11:52:05.824577 PCI: 00:1e.2: enabled 1
836 11:52:05.824681 SPI: 00: enabled 1
837 11:52:05.824781 PCI: 00:1e.3: enabled 1
838 11:52:05.824880 SPI: 00: enabled 1
839 11:52:05.824999 PCI: 00:1f.0: enabled 1
840 11:52:05.825102 PNP: 0c09.0: enabled 1
841 11:52:05.825200 PCI: 00:1f.1: enabled 0
842 11:52:05.825310 PCI: 00:1f.2: enabled 1
843 11:52:05.825418 GENERIC: 0.0: enabled 1
844 11:52:05.825550 GENERIC: 0.0: enabled 1
845 11:52:05.825653 GENERIC: 1.0: enabled 1
846 11:52:05.825750 PCI: 00:1f.3: enabled 1
847 11:52:05.825862 PCI: 00:1f.4: enabled 0
848 11:52:05.825965 PCI: 00:1f.5: enabled 1
849 11:52:05.875368 PCI: 00:1f.6: enabled 0
850 11:52:05.875534 PCI: 00:1f.7: enabled 0
851 11:52:05.875809 CPU_CLUSTER: 0: enabled 1
852 11:52:05.875888 APIC: 00: enabled 1
853 11:52:05.875961 APIC: 01: enabled 1
854 11:52:05.876053 APIC: 03: enabled 1
855 11:52:05.876122 APIC: 05: enabled 1
856 11:52:05.876189 APIC: 07: enabled 1
857 11:52:05.876255 APIC: 06: enabled 1
858 11:52:05.876321 APIC: 02: enabled 1
859 11:52:05.876385 APIC: 04: enabled 1
860 11:52:05.876449 Root Device scanning...
861 11:52:05.876513 scan_static_bus for Root Device
862 11:52:05.876590 DOMAIN: 0000 enabled
863 11:52:05.876653 CPU_CLUSTER: 0 enabled
864 11:52:05.876717 DOMAIN: 0000 scanning...
865 11:52:05.876793 PCI: pci_scan_bus for bus 00
866 11:52:05.876859 PCI: 00:00.0 [8086/0000] ops
867 11:52:05.876922 PCI: 00:00.0 [8086/9a12] enabled
868 11:52:05.876986 PCI: 00:02.0 [8086/0000] bus ops
869 11:52:05.890735 PCI: 00:02.0 [8086/9a40] enabled
870 11:52:05.891014 PCI: 00:04.0 [8086/0000] bus ops
871 11:52:05.891093 PCI: 00:04.0 [8086/9a03] enabled
872 11:52:05.894620 PCI: 00:05.0 [8086/9a19] enabled
873 11:52:05.894723 PCI: 00:07.0 [0000/0000] hidden
874 11:52:05.897912 PCI: 00:08.0 [8086/9a11] enabled
875 11:52:05.901071 PCI: 00:0a.0 [8086/9a0d] disabled
876 11:52:05.904306 PCI: 00:0d.0 [8086/0000] bus ops
877 11:52:05.907461 PCI: 00:0d.0 [8086/9a13] enabled
878 11:52:05.910775 PCI: 00:14.0 [8086/0000] bus ops
879 11:52:05.913933 PCI: 00:14.0 [8086/a0ed] enabled
880 11:52:05.917565 PCI: 00:14.2 [8086/a0ef] enabled
881 11:52:05.920684 PCI: 00:14.3 [8086/0000] bus ops
882 11:52:05.924374 PCI: 00:14.3 [8086/a0f0] enabled
883 11:52:05.927545 PCI: 00:15.0 [8086/0000] bus ops
884 11:52:05.930489 PCI: 00:15.0 [8086/a0e8] enabled
885 11:52:05.934272 PCI: 00:15.1 [8086/0000] bus ops
886 11:52:05.937424 PCI: 00:15.1 [8086/a0e9] enabled
887 11:52:05.940975 PCI: 00:15.2 [8086/0000] bus ops
888 11:52:05.944022 PCI: 00:15.2 [8086/a0ea] enabled
889 11:52:05.946971 PCI: 00:15.3 [8086/0000] bus ops
890 11:52:05.950639 PCI: 00:15.3 [8086/a0eb] enabled
891 11:52:05.953662 PCI: 00:16.0 [8086/0000] ops
892 11:52:05.957415 PCI: 00:16.0 [8086/a0e0] enabled
893 11:52:05.960440 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 11:52:05.963508 PCI: 00:19.0 [8086/0000] bus ops
895 11:52:05.970619 PCI: 00:19.0 [8086/a0c5] disabled
896 11:52:05.973587 PCI: 00:19.1 [8086/0000] bus ops
897 11:52:05.976771 PCI: 00:19.1 [8086/a0c6] enabled
898 11:52:05.980607 PCI: 00:1d.0 [8086/0000] bus ops
899 11:52:05.983911 PCI: 00:1d.0 [8086/a0b0] enabled
900 11:52:05.983996 PCI: 00:1e.0 [8086/0000] ops
901 11:52:05.986955 PCI: 00:1e.0 [8086/a0a8] enabled
902 11:52:05.990129 PCI: 00:1e.2 [8086/0000] bus ops
903 11:52:05.993297 PCI: 00:1e.2 [8086/a0aa] enabled
904 11:52:05.996609 PCI: 00:1e.3 [8086/0000] bus ops
905 11:52:05.999952 PCI: 00:1e.3 [8086/a0ab] enabled
906 11:52:06.003197 PCI: 00:1f.0 [8086/0000] bus ops
907 11:52:06.006439 PCI: 00:1f.0 [8086/a087] enabled
908 11:52:06.010218 RTC Init
909 11:52:06.013422 Set power on after power failure.
910 11:52:06.013514 Disabling Deep S3
911 11:52:06.016624 Disabling Deep S3
912 11:52:06.019971 Disabling Deep S4
913 11:52:06.020058 Disabling Deep S4
914 11:52:06.023660 Disabling Deep S5
915 11:52:06.023763 Disabling Deep S5
916 11:52:06.026975 PCI: 00:1f.2 [0000/0000] hidden
917 11:52:06.030073 PCI: 00:1f.3 [8086/0000] bus ops
918 11:52:06.033076 PCI: 00:1f.3 [8086/a0c8] enabled
919 11:52:06.036292 PCI: 00:1f.5 [8086/0000] bus ops
920 11:52:06.039971 PCI: 00:1f.5 [8086/a0a4] enabled
921 11:52:06.043222 PCI: Leftover static devices:
922 11:52:06.046218 PCI: 00:10.2
923 11:52:06.046313 PCI: 00:10.6
924 11:52:06.046388 PCI: 00:10.7
925 11:52:06.049889 PCI: 00:06.0
926 11:52:06.049984 PCI: 00:07.1
927 11:52:06.052908 PCI: 00:07.2
928 11:52:06.053002 PCI: 00:07.3
929 11:52:06.056471 PCI: 00:09.0
930 11:52:06.056577 PCI: 00:0d.1
931 11:52:06.056651 PCI: 00:0d.2
932 11:52:06.059539 PCI: 00:0d.3
933 11:52:06.059630 PCI: 00:0e.0
934 11:52:06.063183 PCI: 00:12.0
935 11:52:06.063275 PCI: 00:12.6
936 11:52:06.063348 PCI: 00:13.0
937 11:52:06.066380 PCI: 00:14.1
938 11:52:06.066473 PCI: 00:16.1
939 11:52:06.069405 PCI: 00:16.2
940 11:52:06.069497 PCI: 00:16.3
941 11:52:06.073213 PCI: 00:16.4
942 11:52:06.073305 PCI: 00:16.5
943 11:52:06.073431 PCI: 00:17.0
944 11:52:06.076261 PCI: 00:19.2
945 11:52:06.076389 PCI: 00:1e.1
946 11:52:06.079327 PCI: 00:1f.1
947 11:52:06.079442 PCI: 00:1f.4
948 11:52:06.079546 PCI: 00:1f.6
949 11:52:06.083061 PCI: 00:1f.7
950 11:52:06.086308 PCI: Check your devicetree.cb.
951 11:52:06.089403 PCI: 00:02.0 scanning...
952 11:52:06.092592 scan_generic_bus for PCI: 00:02.0
953 11:52:06.095935 scan_generic_bus for PCI: 00:02.0 done
954 11:52:06.099177 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 11:52:06.103052 PCI: 00:04.0 scanning...
956 11:52:06.106233 scan_generic_bus for PCI: 00:04.0
957 11:52:06.109390 GENERIC: 0.0 enabled
958 11:52:06.115875 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 11:52:06.119088 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 11:52:06.122266 PCI: 00:0d.0 scanning...
961 11:52:06.125733 scan_static_bus for PCI: 00:0d.0
962 11:52:06.129391 USB0 port 0 enabled
963 11:52:06.129486 USB0 port 0 scanning...
964 11:52:06.132550 scan_static_bus for USB0 port 0
965 11:52:06.135693 USB3 port 0 enabled
966 11:52:06.138851 USB3 port 1 enabled
967 11:52:06.138936 USB3 port 2 disabled
968 11:52:06.142632 USB3 port 3 disabled
969 11:52:06.145714 USB3 port 0 scanning...
970 11:52:06.149059 scan_static_bus for USB3 port 0
971 11:52:06.152088 scan_static_bus for USB3 port 0 done
972 11:52:06.155636 scan_bus: bus USB3 port 0 finished in 6 msecs
973 11:52:06.158692 USB3 port 1 scanning...
974 11:52:06.162179 scan_static_bus for USB3 port 1
975 11:52:06.165241 scan_static_bus for USB3 port 1 done
976 11:52:06.169037 scan_bus: bus USB3 port 1 finished in 6 msecs
977 11:52:06.175213 scan_static_bus for USB0 port 0 done
978 11:52:06.178972 scan_bus: bus USB0 port 0 finished in 43 msecs
979 11:52:06.182040 scan_static_bus for PCI: 00:0d.0 done
980 11:52:06.188720 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 11:52:06.188812 PCI: 00:14.0 scanning...
982 11:52:06.191922 scan_static_bus for PCI: 00:14.0
983 11:52:06.195057 USB0 port 0 enabled
984 11:52:06.198418 USB0 port 0 scanning...
985 11:52:06.201583 scan_static_bus for USB0 port 0
986 11:52:06.201678 USB2 port 0 disabled
987 11:52:06.204845 USB2 port 1 enabled
988 11:52:06.208747 USB2 port 2 enabled
989 11:52:06.208839 USB2 port 3 disabled
990 11:52:06.211945 USB2 port 4 enabled
991 11:52:06.215086 USB2 port 5 disabled
992 11:52:06.215178 USB2 port 6 disabled
993 11:52:06.218331 USB2 port 7 disabled
994 11:52:06.221557 USB2 port 8 disabled
995 11:52:06.221649 USB2 port 9 disabled
996 11:52:06.224878 USB3 port 0 disabled
997 11:52:06.228143 USB3 port 1 enabled
998 11:52:06.228235 USB3 port 2 disabled
999 11:52:06.231635 USB3 port 3 disabled
1000 11:52:06.234762 USB2 port 1 scanning...
1001 11:52:06.237938 scan_static_bus for USB2 port 1
1002 11:52:06.241646 scan_static_bus for USB2 port 1 done
1003 11:52:06.244759 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 11:52:06.247937 USB2 port 2 scanning...
1005 11:52:06.251088 scan_static_bus for USB2 port 2
1006 11:52:06.254937 scan_static_bus for USB2 port 2 done
1007 11:52:06.258042 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 11:52:06.261104 USB2 port 4 scanning...
1009 11:52:06.264780 scan_static_bus for USB2 port 4
1010 11:52:06.267750 scan_static_bus for USB2 port 4 done
1011 11:52:06.274383 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 11:52:06.274525 USB3 port 1 scanning...
1013 11:52:06.278056 scan_static_bus for USB3 port 1
1014 11:52:06.284813 scan_static_bus for USB3 port 1 done
1015 11:52:06.287942 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 11:52:06.290969 scan_static_bus for USB0 port 0 done
1017 11:52:06.297891 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 11:52:06.301110 scan_static_bus for PCI: 00:14.0 done
1019 11:52:06.304040 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1020 11:52:06.307248 PCI: 00:14.3 scanning...
1021 11:52:06.311133 scan_static_bus for PCI: 00:14.3
1022 11:52:06.314344 GENERIC: 0.0 enabled
1023 11:52:06.317375 scan_static_bus for PCI: 00:14.3 done
1024 11:52:06.320479 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 11:52:06.324301 PCI: 00:15.0 scanning...
1026 11:52:06.327572 scan_static_bus for PCI: 00:15.0
1027 11:52:06.330776 I2C: 00:1a enabled
1028 11:52:06.330858 I2C: 00:31 enabled
1029 11:52:06.333820 I2C: 00:32 enabled
1030 11:52:06.337519 scan_static_bus for PCI: 00:15.0 done
1031 11:52:06.340798 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1032 11:52:06.343984 PCI: 00:15.1 scanning...
1033 11:52:06.346941 scan_static_bus for PCI: 00:15.1
1034 11:52:06.350734 I2C: 00:10 enabled
1035 11:52:06.353872 scan_static_bus for PCI: 00:15.1 done
1036 11:52:06.357119 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 11:52:06.360318 PCI: 00:15.2 scanning...
1038 11:52:06.364061 scan_static_bus for PCI: 00:15.2
1039 11:52:06.366980 scan_static_bus for PCI: 00:15.2 done
1040 11:52:06.373560 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 11:52:06.376991 PCI: 00:15.3 scanning...
1042 11:52:06.380034 scan_static_bus for PCI: 00:15.3
1043 11:52:06.383860 scan_static_bus for PCI: 00:15.3 done
1044 11:52:06.386850 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 11:52:06.390002 PCI: 00:19.1 scanning...
1046 11:52:06.393746 scan_static_bus for PCI: 00:19.1
1047 11:52:06.396836 I2C: 00:15 enabled
1048 11:52:06.399890 scan_static_bus for PCI: 00:19.1 done
1049 11:52:06.403220 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 11:52:06.406374 PCI: 00:1d.0 scanning...
1051 11:52:06.410310 do_pci_scan_bridge for PCI: 00:1d.0
1052 11:52:06.413046 PCI: pci_scan_bus for bus 01
1053 11:52:06.416812 PCI: 01:00.0 [15b7/5009] enabled
1054 11:52:06.419976 GENERIC: 0.0 enabled
1055 11:52:06.423761 Enabling Common Clock Configuration
1056 11:52:06.426881 L1 Sub-State supported from root port 29
1057 11:52:06.430500 L1 Sub-State Support = 0x5
1058 11:52:06.433857 CommonModeRestoreTime = 0x28
1059 11:52:06.436962 Power On Value = 0x16, Power On Scale = 0x0
1060 11:52:06.440010 ASPM: Enabled L1
1061 11:52:06.443328 PCIe: Max_Payload_Size adjusted to 128
1062 11:52:06.447093 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 11:52:06.450220 PCI: 00:1e.2 scanning...
1064 11:52:06.453349 scan_generic_bus for PCI: 00:1e.2
1065 11:52:06.457031 SPI: 00 enabled
1066 11:52:06.460254 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 11:52:06.466723 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 11:52:06.469876 PCI: 00:1e.3 scanning...
1069 11:52:06.472944 scan_generic_bus for PCI: 00:1e.3
1070 11:52:06.473042 SPI: 00 enabled
1071 11:52:06.480005 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 11:52:06.486116 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 11:52:06.486215 PCI: 00:1f.0 scanning...
1074 11:52:06.489840 scan_static_bus for PCI: 00:1f.0
1075 11:52:06.493003 PNP: 0c09.0 enabled
1076 11:52:06.496541 PNP: 0c09.0 scanning...
1077 11:52:06.499817 scan_static_bus for PNP: 0c09.0
1078 11:52:06.502857 scan_static_bus for PNP: 0c09.0 done
1079 11:52:06.506041 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 11:52:06.512597 scan_static_bus for PCI: 00:1f.0 done
1081 11:52:06.516417 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 11:52:06.519568 PCI: 00:1f.2 scanning...
1083 11:52:06.522762 scan_static_bus for PCI: 00:1f.2
1084 11:52:06.522847 GENERIC: 0.0 enabled
1085 11:52:06.525813 GENERIC: 0.0 scanning...
1086 11:52:06.529573 scan_static_bus for GENERIC: 0.0
1087 11:52:06.532767 GENERIC: 0.0 enabled
1088 11:52:06.535911 GENERIC: 1.0 enabled
1089 11:52:06.539072 scan_static_bus for GENERIC: 0.0 done
1090 11:52:06.542752 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 11:52:06.546001 scan_static_bus for PCI: 00:1f.2 done
1092 11:52:06.552401 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 11:52:06.556058 PCI: 00:1f.3 scanning...
1094 11:52:06.559246 scan_static_bus for PCI: 00:1f.3
1095 11:52:06.562324 scan_static_bus for PCI: 00:1f.3 done
1096 11:52:06.565566 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 11:52:06.569378 PCI: 00:1f.5 scanning...
1098 11:52:06.572583 scan_generic_bus for PCI: 00:1f.5
1099 11:52:06.575647 scan_generic_bus for PCI: 00:1f.5 done
1100 11:52:06.582474 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 11:52:06.585518 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1102 11:52:06.589061 scan_static_bus for Root Device done
1103 11:52:06.595757 scan_bus: bus Root Device finished in 736 msecs
1104 11:52:06.595853 done
1105 11:52:06.601868 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1106 11:52:06.605522 Chrome EC: UHEPI supported
1107 11:52:06.611735 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 11:52:06.615404 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 11:52:06.621903 SPI flash protection: WPSW=0 SRP0=1
1110 11:52:06.625132 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 11:52:06.632132 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1112 11:52:06.635419 found VGA at PCI: 00:02.0
1113 11:52:06.638535 Setting up VGA for PCI: 00:02.0
1114 11:52:06.641748 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 11:52:06.648361 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 11:52:06.648456 Allocating resources...
1117 11:52:06.651620 Reading resources...
1118 11:52:06.654788 Root Device read_resources bus 0 link: 0
1119 11:52:06.661476 DOMAIN: 0000 read_resources bus 0 link: 0
1120 11:52:06.664622 PCI: 00:04.0 read_resources bus 1 link: 0
1121 11:52:06.671661 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 11:52:06.674851 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 11:52:06.681251 USB0 port 0 read_resources bus 0 link: 0
1124 11:52:06.684451 USB0 port 0 read_resources bus 0 link: 0 done
1125 11:52:06.691150 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 11:52:06.694188 PCI: 00:14.0 read_resources bus 0 link: 0
1127 11:52:06.697715 USB0 port 0 read_resources bus 0 link: 0
1128 11:52:06.704939 USB0 port 0 read_resources bus 0 link: 0 done
1129 11:52:06.707970 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 11:52:06.714870 PCI: 00:14.3 read_resources bus 0 link: 0
1131 11:52:06.718502 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 11:52:06.724952 PCI: 00:15.0 read_resources bus 0 link: 0
1133 11:52:06.728253 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 11:52:06.735181 PCI: 00:15.1 read_resources bus 0 link: 0
1135 11:52:06.738439 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 11:52:06.745564 PCI: 00:19.1 read_resources bus 0 link: 0
1137 11:52:06.748750 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 11:52:06.755480 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 11:52:06.758588 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 11:52:06.765261 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 11:52:06.768978 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 11:52:06.775564 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 11:52:06.778910 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 11:52:06.785228 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 11:52:06.788495 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 11:52:06.794755 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 11:52:06.798441 GENERIC: 0.0 read_resources bus 0 link: 0
1148 11:52:06.805130 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 11:52:06.808142 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 11:52:06.814755 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 11:52:06.817882 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 11:52:06.824610 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 11:52:06.827685 Root Device read_resources bus 0 link: 0 done
1154 11:52:06.830942 Done reading resources.
1155 11:52:06.837986 Show resources in subtree (Root Device)...After reading.
1156 11:52:06.841242 Root Device child on link 0 DOMAIN: 0000
1157 11:52:06.844307 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 11:52:06.854498 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 11:52:06.864452 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 11:52:06.864585 PCI: 00:00.0
1161 11:52:06.874436 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 11:52:06.884129 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 11:52:06.894235 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 11:52:06.904272 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 11:52:06.913962 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 11:52:06.923629 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 11:52:06.930393 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 11:52:06.940410 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 11:52:06.950643 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 11:52:06.960095 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 11:52:06.970295 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 11:52:06.980301 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 11:52:06.986856 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 11:52:06.997047 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 11:52:07.006407 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 11:52:07.016860 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 11:52:07.026477 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 11:52:07.036506 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 11:52:07.043151 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 11:52:07.053266 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 11:52:07.056374 PCI: 00:02.0
1182 11:52:07.066276 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 11:52:07.076346 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 11:52:07.086432 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 11:52:07.089585 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 11:52:07.099229 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 11:52:07.099344 GENERIC: 0.0
1188 11:52:07.103147 PCI: 00:05.0
1189 11:52:07.112532 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 11:52:07.116180 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 11:52:07.119282 GENERIC: 0.0
1192 11:52:07.119376 PCI: 00:08.0
1193 11:52:07.129221 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 11:52:07.132692 PCI: 00:0a.0
1195 11:52:07.135792 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 11:52:07.145970 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 11:52:07.152202 USB0 port 0 child on link 0 USB3 port 0
1198 11:52:07.152327 USB3 port 0
1199 11:52:07.156096 USB3 port 1
1200 11:52:07.156230 USB3 port 2
1201 11:52:07.159277 USB3 port 3
1202 11:52:07.162482 PCI: 00:14.0 child on link 0 USB0 port 0
1203 11:52:07.172430 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 11:52:07.178832 USB0 port 0 child on link 0 USB2 port 0
1205 11:52:07.178953 USB2 port 0
1206 11:52:07.182514 USB2 port 1
1207 11:52:07.182651 USB2 port 2
1208 11:52:07.185566 USB2 port 3
1209 11:52:07.185715 USB2 port 4
1210 11:52:07.188810 USB2 port 5
1211 11:52:07.188943 USB2 port 6
1212 11:52:07.191997 USB2 port 7
1213 11:52:07.192126 USB2 port 8
1214 11:52:07.195238 USB2 port 9
1215 11:52:07.195365 USB3 port 0
1216 11:52:07.199036 USB3 port 1
1217 11:52:07.199162 USB3 port 2
1218 11:52:07.202195 USB3 port 3
1219 11:52:07.202317 PCI: 00:14.2
1220 11:52:07.212269 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 11:52:07.225114 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 11:52:07.228828 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 11:52:07.238659 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 11:52:07.238766 GENERIC: 0.0
1225 11:52:07.245174 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 11:52:07.254989 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 11:52:07.255087 I2C: 00:1a
1228 11:52:07.258132 I2C: 00:31
1229 11:52:07.258224 I2C: 00:32
1230 11:52:07.261402 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 11:52:07.271350 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 11:52:07.274999 I2C: 00:10
1233 11:52:07.275128 PCI: 00:15.2
1234 11:52:07.284609 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 11:52:07.288275 PCI: 00:15.3
1236 11:52:07.298342 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 11:52:07.298474 PCI: 00:16.0
1238 11:52:07.308168 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 11:52:07.311434 PCI: 00:19.0
1240 11:52:07.314556 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 11:52:07.324167 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 11:52:07.327847 I2C: 00:15
1243 11:52:07.330671 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 11:52:07.340687 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 11:52:07.351073 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 11:52:07.357281 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 11:52:07.360939 GENERIC: 0.0
1248 11:52:07.364057 PCI: 01:00.0
1249 11:52:07.374319 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 11:52:07.383727 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1251 11:52:07.383851 PCI: 00:1e.0
1252 11:52:07.393735 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1253 11:52:07.400170 PCI: 00:1e.2 child on link 0 SPI: 00
1254 11:52:07.410481 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 11:52:07.410573 SPI: 00
1256 11:52:07.413697 PCI: 00:1e.3 child on link 0 SPI: 00
1257 11:52:07.423275 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 11:52:07.427065 SPI: 00
1259 11:52:07.430221 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1260 11:52:07.440150 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1261 11:52:07.440281 PNP: 0c09.0
1262 11:52:07.449672 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1263 11:52:07.453182 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1264 11:52:07.462825 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1265 11:52:07.473294 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1266 11:52:07.476506 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1267 11:52:07.479753 GENERIC: 0.0
1268 11:52:07.479866 GENERIC: 1.0
1269 11:52:07.482888 PCI: 00:1f.3
1270 11:52:07.492888 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1271 11:52:07.502895 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1272 11:52:07.503022 PCI: 00:1f.5
1273 11:52:07.512460 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1274 11:52:07.515660 CPU_CLUSTER: 0 child on link 0 APIC: 00
1275 11:52:07.519002 APIC: 00
1276 11:52:07.519119 APIC: 01
1277 11:52:07.522184 APIC: 03
1278 11:52:07.522295 APIC: 05
1279 11:52:07.522403 APIC: 07
1280 11:52:07.526049 APIC: 06
1281 11:52:07.526178 APIC: 02
1282 11:52:07.529244 APIC: 04
1283 11:52:07.535559 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1284 11:52:07.542309 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1285 11:52:07.545456 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1286 11:52:07.552250 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1287 11:52:07.558817 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1288 11:52:07.562629 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1289 11:52:07.568653 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1290 11:52:07.575249 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1291 11:52:07.585088 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1292 11:52:07.591991 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1293 11:52:07.598242 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1294 11:52:07.605250 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1295 11:52:07.611719 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1296 11:52:07.618222 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1297 11:52:07.621987 DOMAIN: 0000: Resource ranges:
1298 11:52:07.625241 * Base: 1000, Size: 800, Tag: 100
1299 11:52:07.631696 * Base: 1900, Size: e700, Tag: 100
1300 11:52:07.634935 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1301 11:52:07.641260 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1302 11:52:07.648269 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1303 11:52:07.658295 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1304 11:52:07.665016 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1305 11:52:07.671302 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1306 11:52:07.681032 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1307 11:52:07.687769 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1308 11:52:07.694425 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1309 11:52:07.704344 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1310 11:52:07.711319 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1311 11:52:07.717955 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1312 11:52:07.727530 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1313 11:52:07.733977 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1314 11:52:07.740947 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1315 11:52:07.750506 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1316 11:52:07.757268 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1317 11:52:07.764223 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1318 11:52:07.770684 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1319 11:52:07.780398 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1320 11:52:07.787005 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1321 11:52:07.797370 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1322 11:52:07.803980 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1323 11:52:07.810223 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1324 11:52:07.820326 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1325 11:52:07.820420 DOMAIN: 0000: Resource ranges:
1326 11:52:07.827225 * Base: 7fc00000, Size: 40400000, Tag: 200
1327 11:52:07.830441 * Base: d0000000, Size: 28000000, Tag: 200
1328 11:52:07.833645 * Base: fa000000, Size: 1000000, Tag: 200
1329 11:52:07.840209 * Base: fb001000, Size: 2fff000, Tag: 200
1330 11:52:07.843314 * Base: fe010000, Size: 2e000, Tag: 200
1331 11:52:07.846576 * Base: fe03f000, Size: d41000, Tag: 200
1332 11:52:07.849859 * Base: fed88000, Size: 8000, Tag: 200
1333 11:52:07.856897 * Base: fed93000, Size: d000, Tag: 200
1334 11:52:07.860026 * Base: feda2000, Size: 1e000, Tag: 200
1335 11:52:07.863561 * Base: fede0000, Size: 1220000, Tag: 200
1336 11:52:07.870069 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1337 11:52:07.876416 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1338 11:52:07.883183 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1339 11:52:07.889757 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1340 11:52:07.896250 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1341 11:52:07.902818 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1342 11:52:07.909425 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1343 11:52:07.916511 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1344 11:52:07.922668 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1345 11:52:07.929245 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1346 11:52:07.936283 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1347 11:52:07.942892 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1348 11:52:07.949209 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1349 11:52:07.956180 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1350 11:52:07.962370 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1351 11:52:07.969088 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1352 11:52:07.975997 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1353 11:52:07.982471 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1354 11:52:07.989371 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1355 11:52:07.995510 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1356 11:52:08.002110 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1357 11:52:08.008491 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1358 11:52:08.015272 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1359 11:52:08.021773 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1360 11:52:08.032377 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1361 11:52:08.035526 PCI: 00:1d.0: Resource ranges:
1362 11:52:08.038726 * Base: 7fc00000, Size: 100000, Tag: 200
1363 11:52:08.045178 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1364 11:52:08.052140 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1365 11:52:08.058605 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1366 11:52:08.064971 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1367 11:52:08.071533 Root Device assign_resources, bus 0 link: 0
1368 11:52:08.074856 DOMAIN: 0000 assign_resources, bus 0 link: 0
1369 11:52:08.085211 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1370 11:52:08.091521 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1371 11:52:08.101416 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1372 11:52:08.108146 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1373 11:52:08.114576 PCI: 00:04.0 assign_resources, bus 1 link: 0
1374 11:52:08.118297 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 11:52:08.124427 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1376 11:52:08.134803 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1377 11:52:08.141162 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1378 11:52:08.147637 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1379 11:52:08.150948 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 11:52:08.160796 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1381 11:52:08.164619 PCI: 00:14.0 assign_resources, bus 0 link: 0
1382 11:52:08.167588 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 11:52:08.177468 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1384 11:52:08.184425 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1385 11:52:08.193834 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1386 11:52:08.197663 PCI: 00:14.3 assign_resources, bus 0 link: 0
1387 11:52:08.204142 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 11:52:08.210934 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1389 11:52:08.216803 PCI: 00:15.0 assign_resources, bus 0 link: 0
1390 11:52:08.220436 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 11:52:08.227423 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1392 11:52:08.233524 PCI: 00:15.1 assign_resources, bus 0 link: 0
1393 11:52:08.236654 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 11:52:08.246720 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1395 11:52:08.253197 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1396 11:52:08.263451 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1397 11:52:08.269765 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1398 11:52:08.276624 PCI: 00:19.1 assign_resources, bus 0 link: 0
1399 11:52:08.279672 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 11:52:08.289813 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1401 11:52:08.299921 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1402 11:52:08.306242 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1403 11:52:08.312569 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1404 11:52:08.319704 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1405 11:52:08.329480 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1406 11:52:08.332542 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 11:52:08.342838 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1408 11:52:08.345895 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 11:52:08.349748 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 11:52:08.359351 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1411 11:52:08.362670 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 11:52:08.369140 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 11:52:08.372838 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 11:52:08.379036 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 11:52:08.382849 LPC: Trying to open IO window from 800 size 1ff
1416 11:52:08.392086 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1417 11:52:08.399028 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1418 11:52:08.405268 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1419 11:52:08.412365 DOMAIN: 0000 assign_resources, bus 0 link: 0
1420 11:52:08.415575 Root Device assign_resources, bus 0 link: 0
1421 11:52:08.418763 Done setting resources.
1422 11:52:08.425381 Show resources in subtree (Root Device)...After assigning values.
1423 11:52:08.428664 Root Device child on link 0 DOMAIN: 0000
1424 11:52:08.435096 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1425 11:52:08.441726 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1426 11:52:08.451455 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1427 11:52:08.455052 PCI: 00:00.0
1428 11:52:08.464729 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1429 11:52:08.474996 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1430 11:52:08.481816 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1431 11:52:08.491469 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1432 11:52:08.501851 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1433 11:52:08.511557 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1434 11:52:08.521387 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1435 11:52:08.531505 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1436 11:52:08.537999 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1437 11:52:08.548033 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1438 11:52:08.557775 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1439 11:52:08.568294 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1440 11:52:08.577560 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1441 11:52:08.584855 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1442 11:52:08.594514 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1443 11:52:08.604001 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1444 11:52:08.614052 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1445 11:52:08.623603 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1446 11:52:08.634024 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1447 11:52:08.643838 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1448 11:52:08.644217 PCI: 00:02.0
1449 11:52:08.653953 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1450 11:52:08.666598 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1451 11:52:08.676772 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1452 11:52:08.680166 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1453 11:52:08.690144 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1454 11:52:08.693342 GENERIC: 0.0
1455 11:52:08.693732 PCI: 00:05.0
1456 11:52:08.703371 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1457 11:52:08.709816 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1458 11:52:08.710131 GENERIC: 0.0
1459 11:52:08.713080 PCI: 00:08.0
1460 11:52:08.723071 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1461 11:52:08.723405 PCI: 00:0a.0
1462 11:52:08.729934 PCI: 00:0d.0 child on link 0 USB0 port 0
1463 11:52:08.739453 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1464 11:52:08.742611 USB0 port 0 child on link 0 USB3 port 0
1465 11:52:08.746291 USB3 port 0
1466 11:52:08.746413 USB3 port 1
1467 11:52:08.749480 USB3 port 2
1468 11:52:08.749594 USB3 port 3
1469 11:52:08.756230 PCI: 00:14.0 child on link 0 USB0 port 0
1470 11:52:08.766067 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1471 11:52:08.769178 USB0 port 0 child on link 0 USB2 port 0
1472 11:52:08.772252 USB2 port 0
1473 11:52:08.772370 USB2 port 1
1474 11:52:08.775934 USB2 port 2
1475 11:52:08.776059 USB2 port 3
1476 11:52:08.779109 USB2 port 4
1477 11:52:08.779239 USB2 port 5
1478 11:52:08.782098 USB2 port 6
1479 11:52:08.782225 USB2 port 7
1480 11:52:08.785927 USB2 port 8
1481 11:52:08.786059 USB2 port 9
1482 11:52:08.789274 USB3 port 0
1483 11:52:08.789406 USB3 port 1
1484 11:52:08.792425 USB3 port 2
1485 11:52:08.795772 USB3 port 3
1486 11:52:08.795905 PCI: 00:14.2
1487 11:52:08.805284 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1488 11:52:08.815602 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1489 11:52:08.822039 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1490 11:52:08.832153 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1491 11:52:08.832346 GENERIC: 0.0
1492 11:52:08.838577 PCI: 00:15.0 child on link 0 I2C: 00:1a
1493 11:52:08.848369 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1494 11:52:08.848543 I2C: 00:1a
1495 11:52:08.851590 I2C: 00:31
1496 11:52:08.851697 I2C: 00:32
1497 11:52:08.855146 PCI: 00:15.1 child on link 0 I2C: 00:10
1498 11:52:08.868518 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1499 11:52:08.868651 I2C: 00:10
1500 11:52:08.871583 PCI: 00:15.2
1501 11:52:08.881409 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1502 11:52:08.881555 PCI: 00:15.3
1503 11:52:08.891392 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1504 11:52:08.894641 PCI: 00:16.0
1505 11:52:08.904572 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1506 11:52:08.907510 PCI: 00:19.0
1507 11:52:08.911378 PCI: 00:19.1 child on link 0 I2C: 00:15
1508 11:52:08.921021 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1509 11:52:08.921159 I2C: 00:15
1510 11:52:08.927958 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1511 11:52:08.937945 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1512 11:52:08.947323 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1513 11:52:08.957687 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1514 11:52:08.960609 GENERIC: 0.0
1515 11:52:08.960852 PCI: 01:00.0
1516 11:52:08.970746 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1517 11:52:08.984345 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1518 11:52:08.984700 PCI: 00:1e.0
1519 11:52:08.994217 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 11:52:09.000419 PCI: 00:1e.2 child on link 0 SPI: 00
1521 11:52:09.010489 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 11:52:09.010883 SPI: 00
1523 11:52:09.013691 PCI: 00:1e.3 child on link 0 SPI: 00
1524 11:52:09.027119 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 11:52:09.027352 SPI: 00
1526 11:52:09.030173 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 11:52:09.040251 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 11:52:09.040448 PNP: 0c09.0
1529 11:52:09.049848 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 11:52:09.053007 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 11:52:09.063436 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 11:52:09.072949 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 11:52:09.076541 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 11:52:09.079646 GENERIC: 0.0
1535 11:52:09.082755 GENERIC: 1.0
1536 11:52:09.082843 PCI: 00:1f.3
1537 11:52:09.092980 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 11:52:09.102834 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 11:52:09.105997 PCI: 00:1f.5
1540 11:52:09.116103 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 11:52:09.119379 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 11:52:09.122976 APIC: 00
1543 11:52:09.123201 APIC: 01
1544 11:52:09.123391 APIC: 03
1545 11:52:09.126175 APIC: 05
1546 11:52:09.126344 APIC: 07
1547 11:52:09.129418 APIC: 06
1548 11:52:09.129587 APIC: 02
1549 11:52:09.129721 APIC: 04
1550 11:52:09.132475 Done allocating resources.
1551 11:52:09.139355 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1552 11:52:09.145926 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 11:52:09.149096 Configure GPIOs for I2S audio on UP4.
1554 11:52:09.155579 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 11:52:09.158787 Enabling resources...
1556 11:52:09.162693 PCI: 00:00.0 subsystem <- 8086/9a12
1557 11:52:09.165837 PCI: 00:00.0 cmd <- 06
1558 11:52:09.169098 PCI: 00:02.0 subsystem <- 8086/9a40
1559 11:52:09.172431 PCI: 00:02.0 cmd <- 03
1560 11:52:09.175501 PCI: 00:04.0 subsystem <- 8086/9a03
1561 11:52:09.175967 PCI: 00:04.0 cmd <- 02
1562 11:52:09.182585 PCI: 00:05.0 subsystem <- 8086/9a19
1563 11:52:09.183006 PCI: 00:05.0 cmd <- 02
1564 11:52:09.186123 PCI: 00:08.0 subsystem <- 8086/9a11
1565 11:52:09.189107 PCI: 00:08.0 cmd <- 06
1566 11:52:09.192684 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 11:52:09.195522 PCI: 00:0d.0 cmd <- 02
1568 11:52:09.199128 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 11:52:09.202134 PCI: 00:14.0 cmd <- 02
1570 11:52:09.205696 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 11:52:09.208588 PCI: 00:14.2 cmd <- 02
1572 11:52:09.212255 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 11:52:09.215202 PCI: 00:14.3 cmd <- 02
1574 11:52:09.218723 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 11:52:09.221837 PCI: 00:15.0 cmd <- 02
1576 11:52:09.224936 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 11:52:09.225310 PCI: 00:15.1 cmd <- 02
1578 11:52:09.232373 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 11:52:09.233081 PCI: 00:15.2 cmd <- 02
1580 11:52:09.238400 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 11:52:09.239097 PCI: 00:15.3 cmd <- 02
1582 11:52:09.241752 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 11:52:09.245379 PCI: 00:16.0 cmd <- 02
1584 11:52:09.248615 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 11:52:09.251797 PCI: 00:19.1 cmd <- 02
1586 11:52:09.255012 PCI: 00:1d.0 bridge ctrl <- 0013
1587 11:52:09.258273 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 11:52:09.261356 PCI: 00:1d.0 cmd <- 06
1589 11:52:09.264731 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 11:52:09.268385 PCI: 00:1e.0 cmd <- 06
1591 11:52:09.271586 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 11:52:09.274913 PCI: 00:1e.2 cmd <- 06
1593 11:52:09.278089 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 11:52:09.281554 PCI: 00:1e.3 cmd <- 02
1595 11:52:09.284433 PCI: 00:1f.0 subsystem <- 8086/a087
1596 11:52:09.285100 PCI: 00:1f.0 cmd <- 407
1597 11:52:09.291387 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 11:52:09.291968 PCI: 00:1f.3 cmd <- 02
1599 11:52:09.294434 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 11:52:09.298302 PCI: 00:1f.5 cmd <- 406
1601 11:52:09.303164 PCI: 01:00.0 cmd <- 02
1602 11:52:09.307148 done.
1603 11:52:09.310828 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 11:52:09.314005 Initializing devices...
1605 11:52:09.316965 Root Device init
1606 11:52:09.320646 Chrome EC: Set SMI mask to 0x0000000000000000
1607 11:52:09.326928 Chrome EC: clear events_b mask to 0x0000000000000000
1608 11:52:09.333581 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 11:52:09.336810 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 11:52:09.343636 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 11:52:09.350120 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 11:52:09.353411 fw_config match found: DB_USB=USB3_ACTIVE
1613 11:52:09.360460 Configure Right Type-C port orientation for retimer
1614 11:52:09.363718 Root Device init finished in 42 msecs
1615 11:52:09.366893 PCI: 00:00.0 init
1616 11:52:09.367153 CPU TDP = 9 Watts
1617 11:52:09.370235 CPU PL1 = 9 Watts
1618 11:52:09.373451 CPU PL2 = 40 Watts
1619 11:52:09.373683 CPU PL4 = 83 Watts
1620 11:52:09.376453 PCI: 00:00.0 init finished in 8 msecs
1621 11:52:09.379665 PCI: 00:02.0 init
1622 11:52:09.382860 GMA: Found VBT in CBFS
1623 11:52:09.386277 GMA: Found valid VBT in CBFS
1624 11:52:09.390046 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 11:52:09.399706 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 11:52:09.402716 PCI: 00:02.0 init finished in 18 msecs
1627 11:52:09.406454 PCI: 00:05.0 init
1628 11:52:09.409577 PCI: 00:05.0 init finished in 0 msecs
1629 11:52:09.409671 PCI: 00:08.0 init
1630 11:52:09.416259 PCI: 00:08.0 init finished in 0 msecs
1631 11:52:09.416353 PCI: 00:14.0 init
1632 11:52:09.422701 PCI: 00:14.0 init finished in 0 msecs
1633 11:52:09.422795 PCI: 00:14.2 init
1634 11:52:09.425906 PCI: 00:14.2 init finished in 0 msecs
1635 11:52:09.430151 PCI: 00:15.0 init
1636 11:52:09.433322 I2C bus 0 version 0x3230302a
1637 11:52:09.436326 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 11:52:09.440027 PCI: 00:15.0 init finished in 6 msecs
1639 11:52:09.443312 PCI: 00:15.1 init
1640 11:52:09.446444 I2C bus 1 version 0x3230302a
1641 11:52:09.449532 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 11:52:09.453208 PCI: 00:15.1 init finished in 6 msecs
1643 11:52:09.456484 PCI: 00:15.2 init
1644 11:52:09.459636 I2C bus 2 version 0x3230302a
1645 11:52:09.462849 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 11:52:09.466021 PCI: 00:15.2 init finished in 6 msecs
1647 11:52:09.469206 PCI: 00:15.3 init
1648 11:52:09.469302 I2C bus 3 version 0x3230302a
1649 11:52:09.475607 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 11:52:09.479530 PCI: 00:15.3 init finished in 6 msecs
1651 11:52:09.479634 PCI: 00:16.0 init
1652 11:52:09.486056 PCI: 00:16.0 init finished in 0 msecs
1653 11:52:09.486157 PCI: 00:19.1 init
1654 11:52:09.489193 I2C bus 5 version 0x3230302a
1655 11:52:09.492461 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 11:52:09.498637 PCI: 00:19.1 init finished in 6 msecs
1657 11:52:09.498732 PCI: 00:1d.0 init
1658 11:52:09.502304 Initializing PCH PCIe bridge.
1659 11:52:09.505371 PCI: 00:1d.0 init finished in 3 msecs
1660 11:52:09.508980 PCI: 00:1f.0 init
1661 11:52:09.512346 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 11:52:09.519152 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 11:52:09.519242 IOAPIC: ID = 0x02
1664 11:52:09.522152 IOAPIC: Dumping registers
1665 11:52:09.525811 reg 0x0000: 0x02000000
1666 11:52:09.528900 reg 0x0001: 0x00770020
1667 11:52:09.528996 reg 0x0002: 0x00000000
1668 11:52:09.535541 PCI: 00:1f.0 init finished in 21 msecs
1669 11:52:09.535650 PCI: 00:1f.2 init
1670 11:52:09.538603 Disabling ACPI via APMC.
1671 11:52:09.543559 APMC done.
1672 11:52:09.546671 PCI: 00:1f.2 init finished in 6 msecs
1673 11:52:09.557560 PCI: 01:00.0 init
1674 11:52:09.560759 PCI: 01:00.0 init finished in 0 msecs
1675 11:52:09.564482 PNP: 0c09.0 init
1676 11:52:09.567658 Google Chrome EC uptime: 8.301 seconds
1677 11:52:09.574243 Google Chrome AP resets since EC boot: 1
1678 11:52:09.577423 Google Chrome most recent AP reset causes:
1679 11:52:09.580649 0.451: 32775 shutdown: entering G3
1680 11:52:09.587623 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 11:52:09.590917 PNP: 0c09.0 init finished in 23 msecs
1682 11:52:09.596127 Devices initialized
1683 11:52:09.600025 Show all devs... After init.
1684 11:52:09.603068 Root Device: enabled 1
1685 11:52:09.603201 DOMAIN: 0000: enabled 1
1686 11:52:09.606126 CPU_CLUSTER: 0: enabled 1
1687 11:52:09.609573 PCI: 00:00.0: enabled 1
1688 11:52:09.613230 PCI: 00:02.0: enabled 1
1689 11:52:09.613322 PCI: 00:04.0: enabled 1
1690 11:52:09.616271 PCI: 00:05.0: enabled 1
1691 11:52:09.619245 PCI: 00:06.0: enabled 0
1692 11:52:09.622854 PCI: 00:07.0: enabled 0
1693 11:52:09.622976 PCI: 00:07.1: enabled 0
1694 11:52:09.626051 PCI: 00:07.2: enabled 0
1695 11:52:09.629146 PCI: 00:07.3: enabled 0
1696 11:52:09.632924 PCI: 00:08.0: enabled 1
1697 11:52:09.633034 PCI: 00:09.0: enabled 0
1698 11:52:09.636017 PCI: 00:0a.0: enabled 0
1699 11:52:09.639089 PCI: 00:0d.0: enabled 1
1700 11:52:09.642352 PCI: 00:0d.1: enabled 0
1701 11:52:09.642448 PCI: 00:0d.2: enabled 0
1702 11:52:09.646197 PCI: 00:0d.3: enabled 0
1703 11:52:09.649145 PCI: 00:0e.0: enabled 0
1704 11:52:09.652723 PCI: 00:10.2: enabled 1
1705 11:52:09.652848 PCI: 00:10.6: enabled 0
1706 11:52:09.655835 PCI: 00:10.7: enabled 0
1707 11:52:09.659457 PCI: 00:12.0: enabled 0
1708 11:52:09.659578 PCI: 00:12.6: enabled 0
1709 11:52:09.662500 PCI: 00:13.0: enabled 0
1710 11:52:09.665697 PCI: 00:14.0: enabled 1
1711 11:52:09.669048 PCI: 00:14.1: enabled 0
1712 11:52:09.669140 PCI: 00:14.2: enabled 1
1713 11:52:09.672352 PCI: 00:14.3: enabled 1
1714 11:52:09.675577 PCI: 00:15.0: enabled 1
1715 11:52:09.679387 PCI: 00:15.1: enabled 1
1716 11:52:09.679506 PCI: 00:15.2: enabled 1
1717 11:52:09.682589 PCI: 00:15.3: enabled 1
1718 11:52:09.685784 PCI: 00:16.0: enabled 1
1719 11:52:09.689020 PCI: 00:16.1: enabled 0
1720 11:52:09.689101 PCI: 00:16.2: enabled 0
1721 11:52:09.692161 PCI: 00:16.3: enabled 0
1722 11:52:09.695993 PCI: 00:16.4: enabled 0
1723 11:52:09.699118 PCI: 00:16.5: enabled 0
1724 11:52:09.699202 PCI: 00:17.0: enabled 0
1725 11:52:09.702366 PCI: 00:19.0: enabled 0
1726 11:52:09.705598 PCI: 00:19.1: enabled 1
1727 11:52:09.705690 PCI: 00:19.2: enabled 0
1728 11:52:09.708869 PCI: 00:1c.0: enabled 1
1729 11:52:09.712004 PCI: 00:1c.1: enabled 0
1730 11:52:09.715484 PCI: 00:1c.2: enabled 0
1731 11:52:09.715563 PCI: 00:1c.3: enabled 0
1732 11:52:09.718942 PCI: 00:1c.4: enabled 0
1733 11:52:09.722325 PCI: 00:1c.5: enabled 0
1734 11:52:09.725363 PCI: 00:1c.6: enabled 1
1735 11:52:09.725444 PCI: 00:1c.7: enabled 0
1736 11:52:09.728508 PCI: 00:1d.0: enabled 1
1737 11:52:09.732016 PCI: 00:1d.1: enabled 0
1738 11:52:09.735224 PCI: 00:1d.2: enabled 1
1739 11:52:09.735317 PCI: 00:1d.3: enabled 0
1740 11:52:09.738937 PCI: 00:1e.0: enabled 1
1741 11:52:09.741970 PCI: 00:1e.1: enabled 0
1742 11:52:09.745416 PCI: 00:1e.2: enabled 1
1743 11:52:09.745534 PCI: 00:1e.3: enabled 1
1744 11:52:09.748505 PCI: 00:1f.0: enabled 1
1745 11:52:09.752202 PCI: 00:1f.1: enabled 0
1746 11:52:09.752329 PCI: 00:1f.2: enabled 1
1747 11:52:09.755259 PCI: 00:1f.3: enabled 1
1748 11:52:09.758587 PCI: 00:1f.4: enabled 0
1749 11:52:09.761767 PCI: 00:1f.5: enabled 1
1750 11:52:09.761879 PCI: 00:1f.6: enabled 0
1751 11:52:09.764907 PCI: 00:1f.7: enabled 0
1752 11:52:09.768640 APIC: 00: enabled 1
1753 11:52:09.771552 GENERIC: 0.0: enabled 1
1754 11:52:09.771663 GENERIC: 0.0: enabled 1
1755 11:52:09.775338 GENERIC: 1.0: enabled 1
1756 11:52:09.778573 GENERIC: 0.0: enabled 1
1757 11:52:09.778683 GENERIC: 1.0: enabled 1
1758 11:52:09.781983 USB0 port 0: enabled 1
1759 11:52:09.785278 GENERIC: 0.0: enabled 1
1760 11:52:09.788420 USB0 port 0: enabled 1
1761 11:52:09.788549 GENERIC: 0.0: enabled 1
1762 11:52:09.791656 I2C: 00:1a: enabled 1
1763 11:52:09.794979 I2C: 00:31: enabled 1
1764 11:52:09.795087 I2C: 00:32: enabled 1
1765 11:52:09.798132 I2C: 00:10: enabled 1
1766 11:52:09.801883 I2C: 00:15: enabled 1
1767 11:52:09.801963 GENERIC: 0.0: enabled 0
1768 11:52:09.805090 GENERIC: 1.0: enabled 0
1769 11:52:09.808315 GENERIC: 0.0: enabled 1
1770 11:52:09.811530 SPI: 00: enabled 1
1771 11:52:09.811642 SPI: 00: enabled 1
1772 11:52:09.814775 PNP: 0c09.0: enabled 1
1773 11:52:09.817912 GENERIC: 0.0: enabled 1
1774 11:52:09.817990 USB3 port 0: enabled 1
1775 11:52:09.821572 USB3 port 1: enabled 1
1776 11:52:09.824576 USB3 port 2: enabled 0
1777 11:52:09.824688 USB3 port 3: enabled 0
1778 11:52:09.828247 USB2 port 0: enabled 0
1779 11:52:09.831137 USB2 port 1: enabled 1
1780 11:52:09.834835 USB2 port 2: enabled 1
1781 11:52:09.834951 USB2 port 3: enabled 0
1782 11:52:09.838011 USB2 port 4: enabled 1
1783 11:52:09.841010 USB2 port 5: enabled 0
1784 11:52:09.841133 USB2 port 6: enabled 0
1785 11:52:09.844675 USB2 port 7: enabled 0
1786 11:52:09.847660 USB2 port 8: enabled 0
1787 11:52:09.851263 USB2 port 9: enabled 0
1788 11:52:09.851402 USB3 port 0: enabled 0
1789 11:52:09.854311 USB3 port 1: enabled 1
1790 11:52:09.857827 USB3 port 2: enabled 0
1791 11:52:09.857946 USB3 port 3: enabled 0
1792 11:52:09.861351 GENERIC: 0.0: enabled 1
1793 11:52:09.864932 GENERIC: 1.0: enabled 1
1794 11:52:09.865051 APIC: 01: enabled 1
1795 11:52:09.868184 APIC: 03: enabled 1
1796 11:52:09.871283 APIC: 05: enabled 1
1797 11:52:09.871399 APIC: 07: enabled 1
1798 11:52:09.874358 APIC: 06: enabled 1
1799 11:52:09.878149 APIC: 02: enabled 1
1800 11:52:09.878256 APIC: 04: enabled 1
1801 11:52:09.881298 PCI: 01:00.0: enabled 1
1802 11:52:09.887778 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1803 11:52:09.891062 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 11:52:09.894192 ELOG: NV offset 0xf30000 size 0x1000
1805 11:52:09.901992 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 11:52:09.908392 ELOG: Event(17) added with size 13 at 2023-06-23 11:52:09 UTC
1807 11:52:09.914761 ELOG: Event(92) added with size 9 at 2023-06-23 11:52:09 UTC
1808 11:52:09.921170 ELOG: Event(93) added with size 9 at 2023-06-23 11:52:09 UTC
1809 11:52:09.927992 ELOG: Event(9E) added with size 10 at 2023-06-23 11:52:09 UTC
1810 11:52:09.934604 ELOG: Event(9F) added with size 14 at 2023-06-23 11:52:09 UTC
1811 11:52:09.940810 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 11:52:09.947668 ELOG: Event(A1) added with size 10 at 2023-06-23 11:52:09 UTC
1813 11:52:09.954227 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1814 11:52:09.960788 ELOG: Event(A0) added with size 9 at 2023-06-23 11:52:09 UTC
1815 11:52:09.963742 elog_add_boot_reason: Logged dev mode boot
1816 11:52:09.970356 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1817 11:52:09.974238 Finalize devices...
1818 11:52:09.974361 Devices finalized
1819 11:52:09.980502 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1820 11:52:09.983687 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1821 11:52:09.990152 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1822 11:52:09.996604 ME: HFSTS1 : 0x80030055
1823 11:52:09.999965 ME: HFSTS2 : 0x30280116
1824 11:52:10.003789 ME: HFSTS3 : 0x00000050
1825 11:52:10.010302 ME: HFSTS4 : 0x00004000
1826 11:52:10.013431 ME: HFSTS5 : 0x00000000
1827 11:52:10.016619 ME: HFSTS6 : 0x40400006
1828 11:52:10.023029 ME: Manufacturing Mode : YES
1829 11:52:10.026862 ME: SPI Protection Mode Enabled : NO
1830 11:52:10.030032 ME: FW Partition Table : OK
1831 11:52:10.033107 ME: Bringup Loader Failure : NO
1832 11:52:10.036691 ME: Firmware Init Complete : NO
1833 11:52:10.039868 ME: Boot Options Present : NO
1834 11:52:10.043301 ME: Update In Progress : NO
1835 11:52:10.046198 ME: D0i3 Support : YES
1836 11:52:10.050036 ME: Low Power State Enabled : NO
1837 11:52:10.056087 ME: CPU Replaced : YES
1838 11:52:10.059221 ME: CPU Replacement Valid : YES
1839 11:52:10.062793 ME: Current Working State : 5
1840 11:52:10.065882 ME: Current Operation State : 1
1841 11:52:10.069451 ME: Current Operation Mode : 3
1842 11:52:10.073004 ME: Error Code : 0
1843 11:52:10.076093 ME: Enhanced Debug Mode : NO
1844 11:52:10.079180 ME: CPU Debug Disabled : YES
1845 11:52:10.085962 ME: TXT Support : NO
1846 11:52:10.089256 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1847 11:52:10.099529 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1848 11:52:10.102864 CBFS: 'fallback/slic' not found.
1849 11:52:10.106039 ACPI: Writing ACPI tables at 76b01000.
1850 11:52:10.106132 ACPI: * FACS
1851 11:52:10.109147 ACPI: * DSDT
1852 11:52:10.112220 Ramoops buffer: 0x100000@0x76a00000.
1853 11:52:10.119202 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1854 11:52:10.121894 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1855 11:52:10.125616 Google Chrome EC: version:
1856 11:52:10.128896 ro: voema_v2.0.10114-a447f03e46
1857 11:52:10.132073 rw: voema_v2.0.10114-a447f03e46
1858 11:52:10.135188 running image: 2
1859 11:52:10.141904 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1860 11:52:10.145105 ACPI: * FADT
1861 11:52:10.145191 SCI is IRQ9
1862 11:52:10.148846 ACPI: added table 1/32, length now 40
1863 11:52:10.151816 ACPI: * SSDT
1864 11:52:10.155388 Found 1 CPU(s) with 8 core(s) each.
1865 11:52:10.158465 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1866 11:52:10.165125 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1867 11:52:10.168074 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1868 11:52:10.171669 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1869 11:52:10.178218 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1870 11:52:10.184737 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1871 11:52:10.187793 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1872 11:52:10.194606 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1873 11:52:10.200979 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1874 11:52:10.204845 \_SB.PCI0.RP09: Added StorageD3Enable property
1875 11:52:10.208096 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1876 11:52:10.214464 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1877 11:52:10.220947 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1878 11:52:10.224144 PS2K: Passing 80 keymaps to kernel
1879 11:52:10.231151 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1880 11:52:10.237526 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1881 11:52:10.244209 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1882 11:52:10.250588 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1883 11:52:10.256877 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1884 11:52:10.263637 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1885 11:52:10.270459 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1886 11:52:10.277069 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1887 11:52:10.280543 ACPI: added table 2/32, length now 44
1888 11:52:10.280661 ACPI: * MCFG
1889 11:52:10.286933 ACPI: added table 3/32, length now 48
1890 11:52:10.287045 ACPI: * TPM2
1891 11:52:10.290595 TPM2 log created at 0x769f0000
1892 11:52:10.293541 ACPI: added table 4/32, length now 52
1893 11:52:10.297163 ACPI: * MADT
1894 11:52:10.297255 SCI is IRQ9
1895 11:52:10.300156 ACPI: added table 5/32, length now 56
1896 11:52:10.303850 current = 76b09850
1897 11:52:10.303983 ACPI: * DMAR
1898 11:52:10.307122 ACPI: added table 6/32, length now 60
1899 11:52:10.313515 ACPI: added table 7/32, length now 64
1900 11:52:10.313647 ACPI: * HPET
1901 11:52:10.316877 ACPI: added table 8/32, length now 68
1902 11:52:10.319975 ACPI: done.
1903 11:52:10.320065 ACPI tables: 35216 bytes.
1904 11:52:10.323242 smbios_write_tables: 769ef000
1905 11:52:10.326452 EC returned error result code 3
1906 11:52:10.329640 Couldn't obtain OEM name from CBI
1907 11:52:10.333997 Create SMBIOS type 16
1908 11:52:10.337289 Create SMBIOS type 17
1909 11:52:10.340482 GENERIC: 0.0 (WIFI Device)
1910 11:52:10.344322 SMBIOS tables: 1734 bytes.
1911 11:52:10.347357 Writing table forward entry at 0x00000500
1912 11:52:10.353819 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1913 11:52:10.357062 Writing coreboot table at 0x76b25000
1914 11:52:10.363786 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1915 11:52:10.366876 1. 0000000000001000-000000000009ffff: RAM
1916 11:52:10.370520 2. 00000000000a0000-00000000000fffff: RESERVED
1917 11:52:10.377310 3. 0000000000100000-00000000769eefff: RAM
1918 11:52:10.380364 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1919 11:52:10.387086 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1920 11:52:10.393534 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1921 11:52:10.396749 7. 0000000077000000-000000007fbfffff: RESERVED
1922 11:52:10.403416 8. 00000000c0000000-00000000cfffffff: RESERVED
1923 11:52:10.407052 9. 00000000f8000000-00000000f9ffffff: RESERVED
1924 11:52:10.410157 10. 00000000fb000000-00000000fb000fff: RESERVED
1925 11:52:10.416681 11. 00000000fe000000-00000000fe00ffff: RESERVED
1926 11:52:10.419917 12. 00000000fed80000-00000000fed87fff: RESERVED
1927 11:52:10.426922 13. 00000000fed90000-00000000fed92fff: RESERVED
1928 11:52:10.430287 14. 00000000feda0000-00000000feda1fff: RESERVED
1929 11:52:10.436426 15. 00000000fedc0000-00000000feddffff: RESERVED
1930 11:52:10.439659 16. 0000000100000000-00000004803fffff: RAM
1931 11:52:10.443551 Passing 4 GPIOs to payload:
1932 11:52:10.446599 NAME | PORT | POLARITY | VALUE
1933 11:52:10.453490 lid | undefined | high | high
1934 11:52:10.459804 power | undefined | high | low
1935 11:52:10.462995 oprom | undefined | high | low
1936 11:52:10.469927 EC in RW | 0x000000e5 | high | high
1937 11:52:10.476631 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1938 11:52:10.479556 coreboot table: 1576 bytes.
1939 11:52:10.482717 IMD ROOT 0. 0x76fff000 0x00001000
1940 11:52:10.486440 IMD SMALL 1. 0x76ffe000 0x00001000
1941 11:52:10.489384 FSP MEMORY 2. 0x76c4e000 0x003b0000
1942 11:52:10.492956 VPD 3. 0x76c4d000 0x00000367
1943 11:52:10.495988 RO MCACHE 4. 0x76c4c000 0x00000fdc
1944 11:52:10.499613 CONSOLE 5. 0x76c2c000 0x00020000
1945 11:52:10.502651 FMAP 6. 0x76c2b000 0x00000578
1946 11:52:10.509465 TIME STAMP 7. 0x76c2a000 0x00000910
1947 11:52:10.512492 VBOOT WORK 8. 0x76c16000 0x00014000
1948 11:52:10.516121 ROMSTG STCK 9. 0x76c15000 0x00001000
1949 11:52:10.519297 AFTER CAR 10. 0x76c0a000 0x0000b000
1950 11:52:10.522573 RAMSTAGE 11. 0x76b97000 0x00073000
1951 11:52:10.525825 REFCODE 12. 0x76b42000 0x00055000
1952 11:52:10.529033 SMM BACKUP 13. 0x76b32000 0x00010000
1953 11:52:10.535930 4f444749 14. 0x76b30000 0x00002000
1954 11:52:10.538667 EXT VBT15. 0x76b2d000 0x0000219f
1955 11:52:10.542516 COREBOOT 16. 0x76b25000 0x00008000
1956 11:52:10.545787 ACPI 17. 0x76b01000 0x00024000
1957 11:52:10.548935 ACPI GNVS 18. 0x76b00000 0x00001000
1958 11:52:10.552076 RAMOOPS 19. 0x76a00000 0x00100000
1959 11:52:10.555664 TPM2 TCGLOG20. 0x769f0000 0x00010000
1960 11:52:10.558992 SMBIOS 21. 0x769ef000 0x00000800
1961 11:52:10.562205 IMD small region:
1962 11:52:10.565438 IMD ROOT 0. 0x76ffec00 0x00000400
1963 11:52:10.568539 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1964 11:52:10.574865 POWER STATE 2. 0x76ffeb80 0x00000044
1965 11:52:10.578125 ROMSTAGE 3. 0x76ffeb60 0x00000004
1966 11:52:10.581959 MEM INFO 4. 0x76ffe980 0x000001e0
1967 11:52:10.588403 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1968 11:52:10.591463 MTRR: Physical address space:
1969 11:52:10.595026 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1970 11:52:10.601495 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1971 11:52:10.608097 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1972 11:52:10.615042 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1973 11:52:10.621486 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1974 11:52:10.628387 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1975 11:52:10.634874 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1976 11:52:10.638016 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 11:52:10.641269 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 11:52:10.644479 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 11:52:10.651615 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 11:52:10.654892 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 11:52:10.658029 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 11:52:10.661075 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 11:52:10.667629 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 11:52:10.671398 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 11:52:10.674505 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 11:52:10.677497 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 11:52:10.683390 call enable_fixed_mtrr()
1988 11:52:10.686651 CPU physical address size: 39 bits
1989 11:52:10.693539 MTRR: default type WB/UC MTRR counts: 6/7.
1990 11:52:10.696454 MTRR: WB selected as default type.
1991 11:52:10.703165 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1992 11:52:10.706223 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1993 11:52:10.713228 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1994 11:52:10.719943 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1995 11:52:10.726408 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1996 11:52:10.733146 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1997 11:52:10.736975
1998 11:52:10.737080 MTRR check
1999 11:52:10.740729 Fixed MTRRs : Enabled
2000 11:52:10.740812 Variable MTRRs: Enabled
2001 11:52:10.740893
2002 11:52:10.747004 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 11:52:10.750323 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 11:52:10.753856 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 11:52:10.756931 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 11:52:10.763891 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 11:52:10.767128 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 11:52:10.770251 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 11:52:10.773448 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 11:52:10.780245 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 11:52:10.783361 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 11:52:10.786620 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 11:52:10.789769 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 11:52:10.796666 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 11:52:10.799935 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 11:52:10.803513 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 11:52:10.806652 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 11:52:10.813352 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 11:52:10.816401 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 11:52:10.820088 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 11:52:10.823051 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 11:52:10.826224 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 11:52:10.832842 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 11:52:10.835982 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 11:52:10.843555 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 11:52:10.846791 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 11:52:10.849934 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 11:52:10.853744 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 11:52:10.860143 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 11:52:10.863348 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 11:52:10.866473 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 11:52:10.870286 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 11:52:10.876805 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 11:52:10.880078 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 11:52:10.883193 call enable_fixed_mtrr()
2036 11:52:10.886982 call enable_fixed_mtrr()
2037 11:52:10.890116 call enable_fixed_mtrr()
2038 11:52:10.896493 BS: BS_WRITE_TABLES exit times (exec / console): 5 / 150 ms
2039 11:52:10.899680 CPU physical address size: 39 bits
2040 11:52:10.904223 Checking cr50 for pending updates
2041 11:52:10.907135 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 11:52:10.914086 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 11:52:10.917192 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 11:52:10.920769 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 11:52:10.923798 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 11:52:10.927430 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 11:52:10.934054 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 11:52:10.936909 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 11:52:10.940630 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 11:52:10.943677 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 11:52:10.950452 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 11:52:10.953574 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 11:52:10.960516 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 11:52:10.964378 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 11:52:10.967525 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 11:52:10.970478 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 11:52:10.977462 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 11:52:10.980897 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 11:52:10.983966 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 11:52:10.987178 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 11:52:10.994148 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 11:52:10.997337 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 11:52:11.000506 call enable_fixed_mtrr()
2064 11:52:11.003978 call enable_fixed_mtrr()
2065 11:52:11.007759 Reading cr50 TPM mode
2066 11:52:11.010992 MTRR: Fixed MSR 0x250 0x0606060606060606
2067 11:52:11.014606 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 11:52:11.017588 MTRR: Fixed MSR 0x258 0x0606060606060606
2069 11:52:11.021284 MTRR: Fixed MSR 0x259 0x0000000000000000
2070 11:52:11.028027 MTRR: Fixed MSR 0x268 0x0606060606060606
2071 11:52:11.030906 MTRR: Fixed MSR 0x269 0x0606060606060606
2072 11:52:11.034454 MTRR: Fixed MSR 0x26a 0x0606060606060606
2073 11:52:11.037552 MTRR: Fixed MSR 0x26b 0x0606060606060606
2074 11:52:11.044154 MTRR: Fixed MSR 0x26c 0x0606060606060606
2075 11:52:11.047940 MTRR: Fixed MSR 0x26d 0x0606060606060606
2076 11:52:11.050961 MTRR: Fixed MSR 0x26e 0x0606060606060606
2077 11:52:11.053944 MTRR: Fixed MSR 0x26f 0x0606060606060606
2078 11:52:11.062329 MTRR: Fixed MSR 0x258 0x0606060606060606
2079 11:52:11.062448 call enable_fixed_mtrr()
2080 11:52:11.069210 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 11:52:11.072488 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 11:52:11.075686 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 11:52:11.078844 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 11:52:11.085871 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 11:52:11.089122 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 11:52:11.092275 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 11:52:11.095300 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 11:52:11.102403 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 11:52:11.105658 CPU physical address size: 39 bits
2090 11:52:11.110772 call enable_fixed_mtrr()
2091 11:52:11.113955 CPU physical address size: 39 bits
2092 11:52:11.119112 CPU physical address size: 39 bits
2093 11:52:11.125238 CPU physical address size: 39 bits
2094 11:52:11.128909 CPU physical address size: 39 bits
2095 11:52:11.131883 CPU physical address size: 39 bits
2096 11:52:11.138533 BS: BS_PAYLOAD_LOAD entry times (exec / console): 108 / 8 ms
2097 11:52:11.148922 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2098 11:52:11.151997 Checking segment from ROM address 0xffc02b38
2099 11:52:11.155095 Checking segment from ROM address 0xffc02b54
2100 11:52:11.161828 Loading segment from ROM address 0xffc02b38
2101 11:52:11.161919 code (compression=0)
2102 11:52:11.171453 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2103 11:52:11.178561 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2104 11:52:11.181741 it's not compressed!
2105 11:52:11.332726 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2106 11:52:11.338884 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2107 11:52:11.346284 Loading segment from ROM address 0xffc02b54
2108 11:52:11.349331 Entry Point 0x30000000
2109 11:52:11.349452 Loaded segments
2110 11:52:11.355995 BS: BS_PAYLOAD_LOAD run times (exec / console): 147 / 63 ms
2111 11:52:11.402255 Finalizing chipset.
2112 11:52:11.405516 Finalizing SMM.
2113 11:52:11.405649 APMC done.
2114 11:52:11.412447 BS: BS_PAYLOAD_LOAD exit times (exec / console): 45 / 5 ms
2115 11:52:11.415634 mp_park_aps done after 0 msecs.
2116 11:52:11.418844 Jumping to boot code at 0x30000000(0x76b25000)
2117 11:52:11.428581 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2118 11:52:11.428676
2119 11:52:11.431906
2120 11:52:11.432018
2121 11:52:11.432480 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2122 11:52:11.432633 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2123 11:52:11.432767 Setting prompt string to ['volteer:']
2124 11:52:11.432872 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2125 11:52:11.435660 Starting depthcharge on Voema...
2126 11:52:11.435784
2127 11:52:11.442146 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2128 11:52:11.442262
2129 11:52:11.448724 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2130 11:52:11.448846
2131 11:52:11.455394 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2132 11:52:11.455511
2133 11:52:11.458310 Failed to find eMMC card reader
2134 11:52:11.458423
2135 11:52:11.461949 Wipe memory regions:
2136 11:52:11.462089
2137 11:52:11.464939 [0x00000000001000, 0x000000000a0000)
2138 11:52:11.465060
2139 11:52:11.468391 [0x00000000100000, 0x00000030000000)
2140 11:52:11.508155
2141 11:52:11.511010 [0x00000032662db0, 0x000000769ef000)
2142 11:52:11.565783
2143 11:52:11.568782 [0x00000100000000, 0x00000480400000)
2144 11:52:12.268894
2145 11:52:12.271966 ec_init: CrosEC protocol v3 supported (256, 256)
2146 11:52:12.704544
2147 11:52:12.704709 R8152: Initializing
2148 11:52:12.704790
2149 11:52:12.707663 Version 6 (ocp_data = 5c30)
2150 11:52:12.707755
2151 11:52:12.710805 R8152: Done initializing
2152 11:52:12.710896
2153 11:52:12.714543 Adding net device
2154 11:52:13.015963
2155 11:52:13.019060 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2156 11:52:13.019148
2157 11:52:13.019219
2158 11:52:13.019314
2159 11:52:13.022471 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2161 11:52:13.122834 volteer: tftpboot 192.168.201.1 10875886/tftp-deploy-n1xyva0x/kernel/bzImage 10875886/tftp-deploy-n1xyva0x/kernel/cmdline 10875886/tftp-deploy-n1xyva0x/ramdisk/ramdisk.cpio.gz
2162 11:52:13.123058 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2163 11:52:13.123180 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2164 11:52:13.127293 tftpboot 192.168.201.1 10875886/tftp-deploy-n1xyva0x/kernel/bzIploy-n1xyva0x/kernel/cmdline 10875886/tftp-deploy-n1xyva0x/ramdisk/ramdisk.cpio.gz
2165 11:52:13.127420
2166 11:52:13.127525 Waiting for link
2167 11:52:13.330157
2168 11:52:13.330351 done.
2169 11:52:13.330463
2170 11:52:13.330565 MAC: 00:24:32:30:77:d1
2171 11:52:13.330669
2172 11:52:13.333859 Sending DHCP discover... done.
2173 11:52:13.333943
2174 11:52:13.337030 Waiting for reply... done.
2175 11:52:13.337121
2176 11:52:13.340032 Sending DHCP request... done.
2177 11:52:13.340153
2178 11:52:13.346502 Waiting for reply... done.
2179 11:52:13.346620
2180 11:52:13.346695 My ip is 192.168.201.13
2181 11:52:13.346765
2182 11:52:13.350304 The DHCP server ip is 192.168.201.1
2183 11:52:13.350399
2184 11:52:13.356741 TFTP server IP predefined by user: 192.168.201.1
2185 11:52:13.356835
2186 11:52:13.363057 Bootfile predefined by user: 10875886/tftp-deploy-n1xyva0x/kernel/bzImage
2187 11:52:13.363152
2188 11:52:13.366900 Sending tftp read request... done.
2189 11:52:13.366994
2190 11:52:13.370042 Waiting for the transfer...
2191 11:52:13.370137
2192 11:52:13.924154 00000000 ################################################################
2193 11:52:13.924313
2194 11:52:14.497034 00080000 ################################################################
2195 11:52:14.497197
2196 11:52:15.033712 00100000 ################################################################
2197 11:52:15.033920
2198 11:52:15.558868 00180000 ################################################################
2199 11:52:15.559058
2200 11:52:16.104061 00200000 ################################################################
2201 11:52:16.104242
2202 11:52:16.650565 00280000 ################################################################
2203 11:52:16.650743
2204 11:52:17.190095 00300000 ################################################################
2205 11:52:17.190259
2206 11:52:17.735100 00380000 ################################################################
2207 11:52:17.735293
2208 11:52:18.280723 00400000 ################################################################
2209 11:52:18.280887
2210 11:52:18.826902 00480000 ################################################################
2211 11:52:18.827062
2212 11:52:19.369955 00500000 ################################################################
2213 11:52:19.370158
2214 11:52:19.908146 00580000 ################################################################
2215 11:52:19.908327
2216 11:52:20.446604 00600000 ################################################################
2217 11:52:20.446767
2218 11:52:20.995067 00680000 ################################################################
2219 11:52:20.995232
2220 11:52:21.627143 00700000 ################################################################
2221 11:52:21.627318
2222 11:52:22.285340 00780000 ################################################################
2223 11:52:22.285532
2224 11:52:22.892117 00800000 ################################################################
2225 11:52:22.892306
2226 11:52:23.443338 00880000 ################################################################
2227 11:52:23.443504
2228 11:52:23.978885 00900000 ################################################################
2229 11:52:23.979078
2230 11:52:24.516118 00980000 ################################################################
2231 11:52:24.516263
2232 11:52:24.907200 00a00000 ############################################## done.
2233 11:52:24.907392
2234 11:52:24.910161 The bootfile was 10859008 bytes long.
2235 11:52:24.910288
2236 11:52:24.913218 Sending tftp read request... done.
2237 11:52:24.913347
2238 11:52:24.916887 Waiting for the transfer...
2239 11:52:24.917013
2240 11:52:25.471426 00000000 ################################################################
2241 11:52:25.471591
2242 11:52:26.005303 00080000 ################################################################
2243 11:52:26.005499
2244 11:52:26.602176 00100000 ################################################################
2245 11:52:26.602372
2246 11:52:27.193906 00180000 ################################################################
2247 11:52:27.194089
2248 11:52:27.726560 00200000 ################################################################
2249 11:52:27.726764
2250 11:52:28.267870 00280000 ################################################################
2251 11:52:28.268088
2252 11:52:28.812923 00300000 ################################################################
2253 11:52:28.813084
2254 11:52:29.345558 00380000 ################################################################
2255 11:52:29.345735
2256 11:52:29.895853 00400000 ################################################################
2257 11:52:29.896038
2258 11:52:30.443096 00480000 ################################################################
2259 11:52:30.443258
2260 11:52:30.986323 00500000 ################################################################
2261 11:52:30.986490
2262 11:52:31.511411 00580000 ################################################################
2263 11:52:31.511574
2264 11:52:31.618373 00600000 ############## done.
2265 11:52:31.618551
2266 11:52:31.621837 Sending tftp read request... done.
2267 11:52:31.621965
2268 11:52:31.625026 Waiting for the transfer...
2269 11:52:31.625147
2270 11:52:31.628168 00000000 # done.
2271 11:52:31.628290
2272 11:52:31.634474 Command line loaded dynamically from TFTP file: 10875886/tftp-deploy-n1xyva0x/kernel/cmdline
2273 11:52:31.634603
2274 11:52:31.654332 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10875886/extract-nfsrootfs-xn76v7xs,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2275 11:52:31.660711
2276 11:52:31.663862 Shutting down all USB controllers.
2277 11:52:31.663985
2278 11:52:31.664113 Removing current net device
2279 11:52:31.664217
2280 11:52:31.667090 Finalizing coreboot
2281 11:52:31.667219
2282 11:52:31.673917 Exiting depthcharge with code 4 at timestamp: 28880035
2283 11:52:31.674034
2284 11:52:31.674161
2285 11:52:31.674279 Starting kernel ...
2286 11:52:31.674392
2287 11:52:31.674491
2288 11:52:31.675181 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2289 11:52:31.675340 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2290 11:52:31.675467 Setting prompt string to ['Linux version [0-9]']
2291 11:52:31.675588 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2292 11:52:31.675712 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2294 11:56:55.675613 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2296 11:56:55.675844 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2298 11:56:55.676022 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2301 11:56:55.676315 end: 2 depthcharge-action (duration 00:05:00) [common]
2303 11:56:55.676571 Cleaning after the job
2304 11:56:55.676671 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/ramdisk
2305 11:56:55.677595 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/kernel
2306 11:56:55.678963 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/nfsrootfs
2307 11:56:55.772517 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10875886/tftp-deploy-n1xyva0x/modules
2308 11:56:55.773283 start: 4.1 power-off (timeout 00:00:30) [common]
2309 11:56:55.773474 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2310 11:56:55.857816 >> Command sent successfully.
2311 11:56:55.860987 Returned 0 in 0 seconds
2312 11:56:55.961404 end: 4.1 power-off (duration 00:00:00) [common]
2314 11:56:55.961918 start: 4.2 read-feedback (timeout 00:10:00) [common]
2315 11:56:55.962283 Listened to connection for namespace 'common' for up to 1s
2316 11:56:56.963226 Finalising connection for namespace 'common'
2317 11:56:56.963422 Disconnecting from shell: Finalise
2318 11:56:56.963508
2319 11:56:57.063832 end: 4.2 read-feedback (duration 00:00:01) [common]
2320 11:56:57.064041 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10875886
2321 11:56:57.515648 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10875886
2322 11:56:57.515861 JobError: Your job cannot terminate cleanly.