Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 15:21:32.168240 lava-dispatcher, installed at version: 2023.05.1
2 15:21:32.168445 start: 0 validate
3 15:21:32.168574 Start time: 2023-07-14 15:21:32.168566+00:00 (UTC)
4 15:21:32.168704 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:21:32.168836 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:21:32.453612 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:21:32.454079 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.288-cip101%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:21:32.721946 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:21:32.722660 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.288-cip101%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:21:43.637756 validate duration: 11.47
12 15:21:43.639145 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:21:43.639672 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:21:43.640182 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:21:43.640834 Not decompressing ramdisk as can be used compressed.
16 15:21:43.641311 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:21:43.641670 saving as /var/lib/lava/dispatcher/tmp/11088597/tftp-deploy-_mzgl43y/ramdisk/rootfs.cpio.gz
18 15:21:43.642005 total size: 8418130 (8MB)
19 15:21:44.540779 progress 0% (0MB)
20 15:21:44.554412 progress 5% (0MB)
21 15:21:44.567430 progress 10% (0MB)
22 15:21:44.575935 progress 15% (1MB)
23 15:21:44.581777 progress 20% (1MB)
24 15:21:44.586462 progress 25% (2MB)
25 15:21:44.590582 progress 30% (2MB)
26 15:21:44.594053 progress 35% (2MB)
27 15:21:44.597307 progress 40% (3MB)
28 15:21:44.600317 progress 45% (3MB)
29 15:21:44.603193 progress 50% (4MB)
30 15:21:44.605781 progress 55% (4MB)
31 15:21:44.608315 progress 60% (4MB)
32 15:21:44.610455 progress 65% (5MB)
33 15:21:44.612817 progress 70% (5MB)
34 15:21:44.615069 progress 75% (6MB)
35 15:21:44.617287 progress 80% (6MB)
36 15:21:44.619434 progress 85% (6MB)
37 15:21:44.621658 progress 90% (7MB)
38 15:21:44.623825 progress 95% (7MB)
39 15:21:44.625912 progress 100% (8MB)
40 15:21:44.626134 8MB downloaded in 0.98s (8.16MB/s)
41 15:21:44.626279 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:21:44.626508 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:21:44.626592 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:21:44.626676 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:21:44.626810 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.288-cip101/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:21:44.626878 saving as /var/lib/lava/dispatcher/tmp/11088597/tftp-deploy-_mzgl43y/kernel/bzImage
48 15:21:44.626936 total size: 10863104 (10MB)
49 15:21:44.626993 No compression specified
50 15:21:44.894364 progress 0% (0MB)
51 15:21:44.911540 progress 5% (0MB)
52 15:21:44.927136 progress 10% (1MB)
53 15:21:44.935068 progress 15% (1MB)
54 15:21:44.941229 progress 20% (2MB)
55 15:21:44.946073 progress 25% (2MB)
56 15:21:44.950572 progress 30% (3MB)
57 15:21:44.954648 progress 35% (3MB)
58 15:21:44.958254 progress 40% (4MB)
59 15:21:44.961655 progress 45% (4MB)
60 15:21:44.964726 progress 50% (5MB)
61 15:21:44.967834 progress 55% (5MB)
62 15:21:44.970585 progress 60% (6MB)
63 15:21:44.973440 progress 65% (6MB)
64 15:21:44.976282 progress 70% (7MB)
65 15:21:44.978937 progress 75% (7MB)
66 15:21:44.981867 progress 80% (8MB)
67 15:21:44.984611 progress 85% (8MB)
68 15:21:44.987503 progress 90% (9MB)
69 15:21:44.990147 progress 95% (9MB)
70 15:21:44.992988 progress 100% (10MB)
71 15:21:44.993157 10MB downloaded in 0.37s (28.29MB/s)
72 15:21:44.993294 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:21:44.993513 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:21:44.993599 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:21:44.993680 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:21:44.993816 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.288-cip101/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:21:44.993882 saving as /var/lib/lava/dispatcher/tmp/11088597/tftp-deploy-_mzgl43y/modules/modules.tar
79 15:21:44.993939 total size: 484432 (0MB)
80 15:21:44.993995 Using unxz to decompress xz
81 15:21:44.998139 progress 6% (0MB)
82 15:21:44.998528 progress 13% (0MB)
83 15:21:44.998756 progress 20% (0MB)
84 15:21:45.000359 progress 27% (0MB)
85 15:21:45.002358 progress 33% (0MB)
86 15:21:45.004172 progress 40% (0MB)
87 15:21:45.006201 progress 47% (0MB)
88 15:21:45.007947 progress 54% (0MB)
89 15:21:45.010038 progress 60% (0MB)
90 15:21:45.012134 progress 67% (0MB)
91 15:21:45.014180 progress 74% (0MB)
92 15:21:45.015810 progress 81% (0MB)
93 15:21:45.018178 progress 87% (0MB)
94 15:21:45.020637 progress 94% (0MB)
95 15:21:45.022936 progress 100% (0MB)
96 15:21:45.028765 0MB downloaded in 0.03s (13.27MB/s)
97 15:21:45.029036 end: 1.3.1 http-download (duration 00:00:00) [common]
99 15:21:45.029292 end: 1.3 download-retry (duration 00:00:00) [common]
100 15:21:45.029383 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 15:21:45.029473 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 15:21:45.029553 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 15:21:45.029634 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 15:21:45.029859 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h
105 15:21:45.029989 makedir: /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin
106 15:21:45.030089 makedir: /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/tests
107 15:21:45.030184 makedir: /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/results
108 15:21:45.030294 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-add-keys
109 15:21:45.030439 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-add-sources
110 15:21:45.030566 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-background-process-start
111 15:21:45.030692 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-background-process-stop
112 15:21:45.030816 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-common-functions
113 15:21:45.030944 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-echo-ipv4
114 15:21:45.031069 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-install-packages
115 15:21:45.031190 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-installed-packages
116 15:21:45.031344 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-os-build
117 15:21:45.031470 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-probe-channel
118 15:21:45.031593 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-probe-ip
119 15:21:45.031715 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-target-ip
120 15:21:45.031835 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-target-mac
121 15:21:45.031955 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-target-storage
122 15:21:45.032080 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-test-case
123 15:21:45.032204 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-test-event
124 15:21:45.032325 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-test-feedback
125 15:21:45.032447 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-test-raise
126 15:21:45.032573 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-test-reference
127 15:21:45.032730 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-test-runner
128 15:21:45.032881 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-test-set
129 15:21:45.033006 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-test-shell
130 15:21:45.033133 Updating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-install-packages (oe)
131 15:21:45.033317 Updating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/bin/lava-installed-packages (oe)
132 15:21:45.033442 Creating /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/environment
133 15:21:45.033542 LAVA metadata
134 15:21:45.033615 - LAVA_JOB_ID=11088597
135 15:21:45.033683 - LAVA_DISPATCHER_IP=192.168.201.1
136 15:21:45.033783 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 15:21:45.033851 skipped lava-vland-overlay
138 15:21:45.033923 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 15:21:45.034003 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 15:21:45.034063 skipped lava-multinode-overlay
141 15:21:45.034132 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 15:21:45.034210 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 15:21:45.034283 Loading test definitions
144 15:21:45.034370 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 15:21:45.034439 Using /lava-11088597 at stage 0
146 15:21:45.034753 uuid=11088597_1.4.2.3.1 testdef=None
147 15:21:45.034838 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 15:21:45.034924 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 15:21:45.035611 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 15:21:45.035828 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 15:21:45.036454 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 15:21:45.036702 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 15:21:45.037321 runner path: /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/0/tests/0_dmesg test_uuid 11088597_1.4.2.3.1
156 15:21:45.037473 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 15:21:45.037696 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 15:21:45.037766 Using /lava-11088597 at stage 1
160 15:21:45.038054 uuid=11088597_1.4.2.3.5 testdef=None
161 15:21:45.038139 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 15:21:45.038220 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 15:21:45.038675 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 15:21:45.038883 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 15:21:45.039510 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 15:21:45.039726 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 15:21:45.040341 runner path: /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/1/tests/1_bootrr test_uuid 11088597_1.4.2.3.5
170 15:21:45.040488 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 15:21:45.040715 Creating lava-test-runner.conf files
173 15:21:45.040800 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/0 for stage 0
174 15:21:45.040887 - 0_dmesg
175 15:21:45.040965 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11088597/lava-overlay-n7mpni7h/lava-11088597/1 for stage 1
176 15:21:45.041052 - 1_bootrr
177 15:21:45.041143 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 15:21:45.041224 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 15:21:45.049508 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 15:21:45.049613 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 15:21:45.049695 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 15:21:45.049775 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 15:21:45.049857 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 15:21:45.302515 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 15:21:45.302902 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
186 15:21:45.303027 extracting modules file /var/lib/lava/dispatcher/tmp/11088597/tftp-deploy-_mzgl43y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11088597/extract-overlay-ramdisk-sqx8kndy/ramdisk
187 15:21:45.324353 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 15:21:45.324502 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
189 15:21:45.324593 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11088597/compress-overlay-7pc6wwgj/overlay-1.4.2.4.tar.gz to ramdisk
190 15:21:45.324671 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11088597/compress-overlay-7pc6wwgj/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11088597/extract-overlay-ramdisk-sqx8kndy/ramdisk
191 15:21:45.333095 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 15:21:45.333205 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
193 15:21:45.333294 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 15:21:45.333384 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
195 15:21:45.333461 Building ramdisk /var/lib/lava/dispatcher/tmp/11088597/extract-overlay-ramdisk-sqx8kndy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11088597/extract-overlay-ramdisk-sqx8kndy/ramdisk
196 15:21:45.488401 >> 53980 blocks
197 15:21:46.388017 rename /var/lib/lava/dispatcher/tmp/11088597/extract-overlay-ramdisk-sqx8kndy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11088597/tftp-deploy-_mzgl43y/ramdisk/ramdisk.cpio.gz
198 15:21:46.388556 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 15:21:46.388728 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
200 15:21:46.388841 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
201 15:21:46.388935 No mkimage arch provided, not using FIT.
202 15:21:46.389023 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 15:21:46.389111 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 15:21:46.389213 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 15:21:46.389301 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
206 15:21:46.389378 No LXC device requested
207 15:21:46.389498 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 15:21:46.389597 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
209 15:21:46.389677 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 15:21:46.389747 Checking files for TFTP limit of 4294967296 bytes.
211 15:21:46.390144 end: 1 tftp-deploy (duration 00:00:03) [common]
212 15:21:46.390247 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 15:21:46.390335 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 15:21:46.390453 substitutions:
215 15:21:46.390516 - {DTB}: None
216 15:21:46.390575 - {INITRD}: 11088597/tftp-deploy-_mzgl43y/ramdisk/ramdisk.cpio.gz
217 15:21:46.390631 - {KERNEL}: 11088597/tftp-deploy-_mzgl43y/kernel/bzImage
218 15:21:46.390686 - {LAVA_MAC}: None
219 15:21:46.390740 - {PRESEED_CONFIG}: None
220 15:21:46.390793 - {PRESEED_LOCAL}: None
221 15:21:46.390846 - {RAMDISK}: 11088597/tftp-deploy-_mzgl43y/ramdisk/ramdisk.cpio.gz
222 15:21:46.390898 - {ROOT_PART}: None
223 15:21:46.390950 - {ROOT}: None
224 15:21:46.391001 - {SERVER_IP}: 192.168.201.1
225 15:21:46.391052 - {TEE}: None
226 15:21:46.391103 Parsed boot commands:
227 15:21:46.391154 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 15:21:46.391320 Parsed boot commands: tftpboot 192.168.201.1 11088597/tftp-deploy-_mzgl43y/kernel/bzImage 11088597/tftp-deploy-_mzgl43y/kernel/cmdline 11088597/tftp-deploy-_mzgl43y/ramdisk/ramdisk.cpio.gz
229 15:21:46.391402 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 15:21:46.391486 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 15:21:46.391576 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 15:21:46.391654 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 15:21:46.391720 Not connected, no need to disconnect.
234 15:21:46.391790 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 15:21:46.391866 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 15:21:46.391962 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-3'
237 15:21:46.395984 Setting prompt string to ['lava-test: # ']
238 15:21:46.396388 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 15:21:46.396495 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 15:21:46.396591 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 15:21:46.396708 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 15:21:46.396920 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=reboot'
243 15:21:51.551114 >> Command sent successfully.
244 15:21:51.561758 Returned 0 in 5 seconds
245 15:21:51.663005 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 15:21:51.664385 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 15:21:51.664951 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 15:21:51.665392 Setting prompt string to 'Starting depthcharge on Magolor...'
250 15:21:51.665730 Changing prompt to 'Starting depthcharge on Magolor...'
251 15:21:51.666105 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 15:21:51.667396 [Enter `^Ec?' for help]
253 15:21:52.796468
254 15:21:52.796630
255 15:21:52.806710 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 15:21:52.809840 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 15:21:52.813627 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 15:21:52.819910 CPU: AES supported, TXT NOT supported, VT supported
259 15:21:52.823292 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 15:21:52.829980 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 15:21:52.833005 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 15:21:52.836685 VBOOT: Loading verstage.
263 15:21:52.843280 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 15:21:52.847357 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 15:21:52.853979 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 15:21:52.857519 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 15:21:52.857629
268 15:21:52.857720
269 15:21:52.871113 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 15:21:52.885171 Probing TPM: . done!
271 15:21:52.887664 TPM ready after 0 ms
272 15:21:52.891414 Connected to device vid:did:rid of 1ae0:0028:00
273 15:21:52.902604 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
274 15:21:52.909832 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 15:21:52.986817 Initialized TPM device CR50 revision 0
276 15:21:52.996554 tlcl_send_startup: Startup return code is 0
277 15:21:52.996693 TPM: setup succeeded
278 15:21:53.017942 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 15:21:53.027648 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 15:21:53.043987 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 15:21:53.052533 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 15:21:53.055985 Chrome EC: UHEPI supported
283 15:21:53.059155 Phase 1
284 15:21:53.063114 FMAP: area GBB found @ c05000 (12288 bytes)
285 15:21:53.069466 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 15:21:53.076150 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 15:21:53.079477 Recovery requested (1009000e)
288 15:21:53.088570 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 15:21:53.094925 tlcl_extend: response is 0
290 15:21:53.107608 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 15:21:53.113771 tlcl_extend: response is 0
292 15:21:53.120143 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 15:21:53.123733 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 15:21:53.130779 BS: verstage times (exec / console): total (unknown) / 124 ms
295 15:21:53.130891
296 15:21:53.133457
297 15:21:53.144140 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 15:21:53.150281 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 15:21:53.153837 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 15:21:53.156800 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 15:21:53.163342 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 15:21:53.166748 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 15:21:53.170023 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
304 15:21:53.173302 TCO_STS: 0000 0001
305 15:21:53.176627 GEN_PMCON: d0015038 00002200
306 15:21:53.179962 GBLRST_CAUSE: 00000000 00000000
307 15:21:53.180045 prev_sleep_state 5
308 15:21:53.183332 Boot Count incremented to 3358
309 15:21:53.190356 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 15:21:53.193847 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 15:21:53.197752 Chrome EC: UHEPI supported
312 15:21:53.205331 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 15:21:53.213291 Probing TPM: done!
314 15:21:53.216610 Connected to device vid:did:rid of 1ae0:0028:00
315 15:21:53.229512 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
316 15:21:53.235847 Initialized TPM device CR50 revision 0
317 15:21:53.246257 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 15:21:53.252985 MRC: Hash idx 0x100b comparison successful.
319 15:21:53.257063 MRC cache found, size 5458
320 15:21:53.257183 bootmode is set to: 2
321 15:21:53.259748 SPD INDEX = 0
322 15:21:53.263932 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 15:21:53.266259 SPD: module type is LPDDR4X
324 15:21:53.273437 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 15:21:53.279837 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 15:21:53.282869 SPD: device width 16 bits, bus width 32 bits
327 15:21:53.286577 SPD: module size is 4096 MB (per channel)
328 15:21:53.289893 meminit_channels: DRAM half-populated
329 15:21:53.372868 CBMEM:
330 15:21:53.375878 IMD: root @ 0x76fff000 254 entries.
331 15:21:53.379122 IMD: root @ 0x76ffec00 62 entries.
332 15:21:53.382244 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 15:21:53.388958 WARNING: RO_VPD is uninitialized or empty.
334 15:21:53.392413 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 15:21:53.395860 External stage cache:
336 15:21:53.399246 IMD: root @ 0x7b3ff000 254 entries.
337 15:21:53.403151 IMD: root @ 0x7b3fec00 62 entries.
338 15:21:53.412862 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 15:21:53.418942 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 15:21:53.425515 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 15:21:53.434199 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 15:21:53.440846 cse_lite: Skip switching to RW in the recovery path
343 15:21:53.440931 1 DIMMs found
344 15:21:53.440999 SMM Memory Map
345 15:21:53.443884 SMRAM : 0x7b000000 0x800000
346 15:21:53.450665 Subregion 0: 0x7b000000 0x200000
347 15:21:53.453606 Subregion 1: 0x7b200000 0x200000
348 15:21:53.457666 Subregion 2: 0x7b400000 0x400000
349 15:21:53.457749 top_of_ram = 0x77000000
350 15:21:53.463927 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 15:21:53.470261 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 15:21:53.473569 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 15:21:53.480461 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 15:21:53.483770 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 15:21:53.495972 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 15:21:53.502958 Processing 188 relocs. Offset value of 0x74c0e000
357 15:21:53.509565 BS: romstage times (exec / console): total (unknown) / 255 ms
358 15:21:53.514294
359 15:21:53.514378
360 15:21:53.524023 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 15:21:53.527341 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 15:21:53.534182 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 15:21:53.540790 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 15:21:53.596438 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 15:21:53.603367 Processing 4805 relocs. Offset value of 0x75da8000
366 15:21:53.606398 BS: postcar times (exec / console): total (unknown) / 42 ms
367 15:21:53.609888
368 15:21:53.609972
369 15:21:53.619869 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 15:21:53.619978 Normal boot
371 15:21:53.623930 EC returned error result code 3
372 15:21:53.627277 FW_CONFIG value is 0x204
373 15:21:53.630123 GENERIC: 0.0 disabled by fw_config
374 15:21:53.637018 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 15:21:53.640424 I2C: 00:10 disabled by fw_config
376 15:21:53.643159 I2C: 00:10 disabled by fw_config
377 15:21:53.646753 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 15:21:53.653099 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 15:21:53.656542 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 15:21:53.663258 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 15:21:53.666624 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 15:21:53.670041 I2C: 00:10 disabled by fw_config
383 15:21:53.676359 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 15:21:53.682819 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 15:21:53.686176 I2C: 00:1a disabled by fw_config
386 15:21:53.689621 I2C: 00:1a disabled by fw_config
387 15:21:53.695923 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 15:21:53.699315 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 15:21:53.703029 GENERIC: 0.0 disabled by fw_config
390 15:21:53.709663 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 15:21:53.712949 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 15:21:53.719310 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 15:21:53.723225 microcode: Update skipped, already up-to-date
394 15:21:53.729416 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 15:21:53.755433 Detected 2 core, 2 thread CPU.
396 15:21:53.758727 Setting up SMI for CPU
397 15:21:53.762344 IED base = 0x7b400000
398 15:21:53.762426 IED size = 0x00400000
399 15:21:53.765729 Will perform SMM setup.
400 15:21:53.768855 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 15:21:53.779003 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 15:21:53.781838 Processing 16 relocs. Offset value of 0x00030000
403 15:21:53.786051 Attempting to start 1 APs
404 15:21:53.789274 Waiting for 10ms after sending INIT.
405 15:21:53.805166 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 2.
406 15:21:53.805270 done.
407 15:21:53.811848 Waiting for 2nd SIPI to complete...done.
408 15:21:53.818676 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 15:21:53.825418 Processing 13 relocs. Offset value of 0x00038000
410 15:21:53.825511 Unable to locate Global NVS
411 15:21:53.835080 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 15:21:53.838740 Installing permanent SMM handler to 0x7b000000
413 15:21:53.849157 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 15:21:53.852029 Processing 704 relocs. Offset value of 0x7b010000
415 15:21:53.861570 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 15:21:53.865060 Processing 13 relocs. Offset value of 0x7b008000
417 15:21:53.871811 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 15:21:53.874683 Unable to locate Global NVS
419 15:21:53.881401 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 15:21:53.884764 Clearing SMI status registers
421 15:21:53.884847 SMI_STS: PM1
422 15:21:53.888271 PM1_STS: PWRBTN
423 15:21:53.888379 TCO_STS: INTRD_DET
424 15:21:53.896321 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 15:21:53.899780 In relocation handler: CPU 0
426 15:21:53.903226 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 15:21:53.910351 Writing SMRR. base = 0x7b000006, mask=0xff800800
428 15:21:53.910436 Relocation complete.
429 15:21:53.919743 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 15:21:53.919827 In relocation handler: CPU 1
431 15:21:53.926440 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 15:21:53.930027 Writing SMRR. base = 0x7b000006, mask=0xff800800
433 15:21:53.933100 Relocation complete.
434 15:21:53.933183 Initializing CPU #0
435 15:21:53.936035 CPU: vendor Intel device 906c0
436 15:21:53.942740 CPU: family 06, model 9c, stepping 00
437 15:21:53.942821 Clearing out pending MCEs
438 15:21:53.946441 Setting up local APIC...
439 15:21:53.949788 apic_id: 0x00 done.
440 15:21:53.953104 Turbo is available but hidden
441 15:21:53.956175 Turbo is available and visible
442 15:21:53.959615 microcode: Update skipped, already up-to-date
443 15:21:53.962962 CPU #0 initialized
444 15:21:53.963044 Initializing CPU #1
445 15:21:53.966381 CPU: vendor Intel device 906c0
446 15:21:53.969742 CPU: family 06, model 9c, stepping 00
447 15:21:53.972575 Clearing out pending MCEs
448 15:21:53.975811 Setting up local APIC...
449 15:21:53.979302 apic_id: 0x02 done.
450 15:21:53.982774 microcode: Update skipped, already up-to-date
451 15:21:53.985966 CPU #1 initialized
452 15:21:53.989372 bsp_do_flight_plan done after 174 msecs.
453 15:21:53.992729 CPU: frequency set to 2800 MHz
454 15:21:53.992822 Enabling SMIs.
455 15:21:53.999371 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
456 15:21:54.010133 Probing TPM: done!
457 15:21:54.016274 Connected to device vid:did:rid of 1ae0:0028:00
458 15:21:54.026469 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
459 15:21:54.029821 Initialized TPM device CR50 revision 0
460 15:21:54.036331 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
461 15:21:54.039670 Found a VBT of 7680 bytes after decompression
462 15:21:54.050373 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
463 15:21:54.082157 Detected 2 core, 2 thread CPU.
464 15:21:54.084881 Detected 2 core, 2 thread CPU.
465 15:21:54.447477 Display FSP Version Info HOB
466 15:21:54.450872 Reference Code - CPU = 8.7.22.30
467 15:21:54.454108 uCode Version = 24.0.0.1f
468 15:21:54.457304 TXT ACM version = ff.ff.ff.ffff
469 15:21:54.460803 Reference Code - ME = 8.7.22.30
470 15:21:54.464161 MEBx version = 0.0.0.0
471 15:21:54.467496 ME Firmware Version = Consumer SKU
472 15:21:54.470348 Reference Code - PCH = 8.7.22.30
473 15:21:54.474460 PCH-CRID Status = Disabled
474 15:21:54.478075 PCH-CRID Original Value = ff.ff.ff.ffff
475 15:21:54.481505 PCH-CRID New Value = ff.ff.ff.ffff
476 15:21:54.484964 OPROM - RST - RAID = ff.ff.ff.ffff
477 15:21:54.485046 PCH Hsio Version = 4.0.0.0
478 15:21:54.492853 Reference Code - SA - System Agent = 8.7.22.30
479 15:21:54.496104 Reference Code - MRC = 0.0.4.68
480 15:21:54.496186 SA - PCIe Version = 8.7.22.30
481 15:21:54.499568 SA-CRID Status = Disabled
482 15:21:54.502762 SA-CRID Original Value = 0.0.0.0
483 15:21:54.506181 SA-CRID New Value = 0.0.0.0
484 15:21:54.509577 OPROM - VBIOS = ff.ff.ff.ffff
485 15:21:54.515793 IO Manageability Engine FW Version = ff.ff.ff.ffff
486 15:21:54.519118 PHY Build Version = ff.ff.ff.ffff
487 15:21:54.522917 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
488 15:21:54.529411 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
489 15:21:54.529494 ITSS IRQ Polarities Before:
490 15:21:54.532569 IPC0: 0xffffffff
491 15:21:54.536053 IPC1: 0xffffffff
492 15:21:54.536134 IPC2: 0xffffffff
493 15:21:54.539257 IPC3: 0xffffffff
494 15:21:54.539339 ITSS IRQ Polarities After:
495 15:21:54.542764 IPC0: 0xffffffff
496 15:21:54.542845 IPC1: 0xffffffff
497 15:21:54.546100 IPC2: 0xffffffff
498 15:21:54.549426 IPC3: 0xffffffff
499 15:21:54.559702 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
500 15:21:54.565647 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
501 15:21:54.569087 Enumerating buses...
502 15:21:54.572368 Show all devs... Before device enumeration.
503 15:21:54.575812 Root Device: enabled 1
504 15:21:54.579143 CPU_CLUSTER: 0: enabled 1
505 15:21:54.579225 DOMAIN: 0000: enabled 1
506 15:21:54.582209 PCI: 00:00.0: enabled 1
507 15:21:54.585518 PCI: 00:02.0: enabled 1
508 15:21:54.588874 PCI: 00:04.0: enabled 1
509 15:21:54.588956 PCI: 00:05.0: enabled 1
510 15:21:54.592505 PCI: 00:09.0: enabled 0
511 15:21:54.595893 PCI: 00:12.6: enabled 0
512 15:21:54.595974 PCI: 00:14.0: enabled 1
513 15:21:54.598976 PCI: 00:14.1: enabled 0
514 15:21:54.602151 PCI: 00:14.2: enabled 0
515 15:21:54.605467 PCI: 00:14.3: enabled 1
516 15:21:54.605548 PCI: 00:14.5: enabled 1
517 15:21:54.608837 PCI: 00:15.0: enabled 1
518 15:21:54.611995 PCI: 00:15.1: enabled 1
519 15:21:54.615557 PCI: 00:15.2: enabled 1
520 15:21:54.615639 PCI: 00:15.3: enabled 1
521 15:21:54.618781 PCI: 00:16.0: enabled 1
522 15:21:54.622262 PCI: 00:16.1: enabled 0
523 15:21:54.625527 PCI: 00:16.4: enabled 0
524 15:21:54.625608 PCI: 00:16.5: enabled 0
525 15:21:54.628793 PCI: 00:17.0: enabled 0
526 15:21:54.632293 PCI: 00:19.0: enabled 1
527 15:21:54.632375 PCI: 00:19.1: enabled 0
528 15:21:54.635739 PCI: 00:19.2: enabled 1
529 15:21:54.638764 PCI: 00:1a.0: enabled 1
530 15:21:54.641904 PCI: 00:1c.0: enabled 0
531 15:21:54.641986 PCI: 00:1c.1: enabled 0
532 15:21:54.645428 PCI: 00:1c.2: enabled 0
533 15:21:54.648724 PCI: 00:1c.3: enabled 0
534 15:21:54.652034 PCI: 00:1c.4: enabled 0
535 15:21:54.652116 PCI: 00:1c.5: enabled 0
536 15:21:54.655238 PCI: 00:1c.6: enabled 0
537 15:21:54.658825 PCI: 00:1c.7: enabled 1
538 15:21:54.662441 PCI: 00:1e.0: enabled 0
539 15:21:54.662524 PCI: 00:1e.1: enabled 0
540 15:21:54.665028 PCI: 00:1e.2: enabled 1
541 15:21:54.668368 PCI: 00:1e.3: enabled 0
542 15:21:54.668450 PCI: 00:1f.0: enabled 1
543 15:21:54.671698 PCI: 00:1f.1: enabled 1
544 15:21:54.675138 PCI: 00:1f.2: enabled 1
545 15:21:54.678469 PCI: 00:1f.3: enabled 1
546 15:21:54.678551 PCI: 00:1f.4: enabled 0
547 15:21:54.681941 PCI: 00:1f.5: enabled 1
548 15:21:54.685405 PCI: 00:1f.7: enabled 0
549 15:21:54.688807 GENERIC: 0.0: enabled 1
550 15:21:54.688889 GENERIC: 0.0: enabled 1
551 15:21:54.691515 USB0 port 0: enabled 1
552 15:21:54.694829 GENERIC: 0.0: enabled 1
553 15:21:54.694911 I2C: 00:2c: enabled 1
554 15:21:54.698084 I2C: 00:15: enabled 1
555 15:21:54.701784 GENERIC: 0.0: enabled 0
556 15:21:54.704800 I2C: 00:15: enabled 1
557 15:21:54.704881 I2C: 00:10: enabled 0
558 15:21:54.708143 I2C: 00:10: enabled 0
559 15:21:54.711858 I2C: 00:2c: enabled 1
560 15:21:54.711940 I2C: 00:40: enabled 1
561 15:21:54.715097 I2C: 00:10: enabled 1
562 15:21:54.718010 I2C: 00:39: enabled 1
563 15:21:54.718092 I2C: 00:36: enabled 1
564 15:21:54.721308 I2C: 00:10: enabled 0
565 15:21:54.725063 I2C: 00:0c: enabled 1
566 15:21:54.725146 I2C: 00:50: enabled 1
567 15:21:54.728377 I2C: 00:1a: enabled 1
568 15:21:54.731641 I2C: 00:1a: enabled 0
569 15:21:54.731723 I2C: 00:1a: enabled 0
570 15:21:54.735152 I2C: 00:28: enabled 1
571 15:21:54.738586 I2C: 00:29: enabled 1
572 15:21:54.738667 PCI: 00:00.0: enabled 1
573 15:21:54.741507 SPI: 00: enabled 1
574 15:21:54.744799 PNP: 0c09.0: enabled 1
575 15:21:54.744912 GENERIC: 0.0: enabled 0
576 15:21:54.748056 USB2 port 0: enabled 1
577 15:21:54.751264 USB2 port 1: enabled 1
578 15:21:54.754823 USB2 port 2: enabled 1
579 15:21:54.754909 USB2 port 3: enabled 1
580 15:21:54.757941 USB2 port 4: enabled 0
581 15:21:54.761334 USB2 port 5: enabled 1
582 15:21:54.761416 USB2 port 6: enabled 0
583 15:21:54.764517 USB2 port 7: enabled 1
584 15:21:54.767961 USB3 port 0: enabled 1
585 15:21:54.768043 USB3 port 1: enabled 1
586 15:21:54.771488 USB3 port 2: enabled 1
587 15:21:54.774635 USB3 port 3: enabled 1
588 15:21:54.777949 APIC: 00: enabled 1
589 15:21:54.778031 APIC: 02: enabled 1
590 15:21:54.781327 Compare with tree...
591 15:21:54.781409 Root Device: enabled 1
592 15:21:54.784782 CPU_CLUSTER: 0: enabled 1
593 15:21:54.788188 APIC: 00: enabled 1
594 15:21:54.791038 APIC: 02: enabled 1
595 15:21:54.791120 DOMAIN: 0000: enabled 1
596 15:21:54.794380 PCI: 00:00.0: enabled 1
597 15:21:54.797840 PCI: 00:02.0: enabled 1
598 15:21:54.801469 PCI: 00:04.0: enabled 1
599 15:21:54.804295 GENERIC: 0.0: enabled 1
600 15:21:54.804375 PCI: 00:05.0: enabled 1
601 15:21:54.808477 GENERIC: 0.0: enabled 1
602 15:21:54.811338 PCI: 00:09.0: enabled 0
603 15:21:54.814648 PCI: 00:12.6: enabled 0
604 15:21:54.817750 PCI: 00:14.0: enabled 1
605 15:21:54.817832 USB0 port 0: enabled 1
606 15:21:54.820966 USB2 port 0: enabled 1
607 15:21:54.824452 USB2 port 1: enabled 1
608 15:21:54.827630 USB2 port 2: enabled 1
609 15:21:54.830894 USB2 port 3: enabled 1
610 15:21:54.830976 USB2 port 4: enabled 0
611 15:21:54.834121 USB2 port 5: enabled 1
612 15:21:54.837525 USB2 port 6: enabled 0
613 15:21:54.840922 USB2 port 7: enabled 1
614 15:21:54.844301 USB3 port 0: enabled 1
615 15:21:54.847675 USB3 port 1: enabled 1
616 15:21:54.847756 USB3 port 2: enabled 1
617 15:21:54.851114 USB3 port 3: enabled 1
618 15:21:54.854332 PCI: 00:14.1: enabled 0
619 15:21:54.857794 PCI: 00:14.2: enabled 0
620 15:21:54.860754 PCI: 00:14.3: enabled 1
621 15:21:54.860835 GENERIC: 0.0: enabled 1
622 15:21:54.864048 PCI: 00:14.5: enabled 1
623 15:21:54.867377 PCI: 00:15.0: enabled 1
624 15:21:54.870907 I2C: 00:2c: enabled 1
625 15:21:54.874618 I2C: 00:15: enabled 1
626 15:21:54.874699 PCI: 00:15.1: enabled 1
627 15:21:54.877702 PCI: 00:15.2: enabled 1
628 15:21:54.881100 GENERIC: 0.0: enabled 0
629 15:21:54.884138 I2C: 00:15: enabled 1
630 15:21:54.887325 I2C: 00:10: enabled 0
631 15:21:54.887407 I2C: 00:10: enabled 0
632 15:21:54.890836 I2C: 00:2c: enabled 1
633 15:21:54.893726 I2C: 00:40: enabled 1
634 15:21:54.897034 I2C: 00:10: enabled 1
635 15:21:54.897116 I2C: 00:39: enabled 1
636 15:21:54.900928 PCI: 00:15.3: enabled 1
637 15:21:54.903786 I2C: 00:36: enabled 1
638 15:21:54.907142 I2C: 00:10: enabled 0
639 15:21:54.907223 I2C: 00:0c: enabled 1
640 15:21:54.910418 I2C: 00:50: enabled 1
641 15:21:54.913684 PCI: 00:16.0: enabled 1
642 15:21:54.917180 PCI: 00:16.1: enabled 0
643 15:21:54.920459 PCI: 00:16.4: enabled 0
644 15:21:54.920541 PCI: 00:16.5: enabled 0
645 15:21:54.923566 PCI: 00:17.0: enabled 0
646 15:21:54.926828 PCI: 00:19.0: enabled 1
647 15:21:54.930171 I2C: 00:1a: enabled 1
648 15:21:54.930252 I2C: 00:1a: enabled 0
649 15:21:54.933460 I2C: 00:1a: enabled 0
650 15:21:54.937071 I2C: 00:28: enabled 1
651 15:21:54.940355 I2C: 00:29: enabled 1
652 15:21:54.943783 PCI: 00:19.1: enabled 0
653 15:21:54.943865 PCI: 00:19.2: enabled 1
654 15:21:54.947277 PCI: 00:1a.0: enabled 1
655 15:21:54.950093 PCI: 00:1e.0: enabled 0
656 15:21:54.954000 PCI: 00:1e.1: enabled 0
657 15:21:54.956865 PCI: 00:1e.2: enabled 1
658 15:21:54.956947 SPI: 00: enabled 1
659 15:21:54.960119 PCI: 00:1e.3: enabled 0
660 15:21:54.963528 PCI: 00:1f.0: enabled 1
661 15:21:54.966932 PNP: 0c09.0: enabled 1
662 15:21:54.967014 PCI: 00:1f.1: enabled 1
663 15:21:54.970254 PCI: 00:1f.2: enabled 1
664 15:21:54.973518 PCI: 00:1f.3: enabled 1
665 15:21:54.976941 GENERIC: 0.0: enabled 0
666 15:21:54.980351 PCI: 00:1f.4: enabled 0
667 15:21:54.980433 PCI: 00:1f.5: enabled 1
668 15:21:54.983464 PCI: 00:1f.7: enabled 0
669 15:21:54.987210 Root Device scanning...
670 15:21:54.989995 scan_static_bus for Root Device
671 15:21:54.993293 CPU_CLUSTER: 0 enabled
672 15:21:54.993375 DOMAIN: 0000 enabled
673 15:21:54.996780 DOMAIN: 0000 scanning...
674 15:21:55.000268 PCI: pci_scan_bus for bus 00
675 15:21:55.003243 PCI: 00:00.0 [8086/0000] ops
676 15:21:55.006471 PCI: 00:00.0 [8086/4e22] enabled
677 15:21:55.009931 PCI: 00:02.0 [8086/0000] bus ops
678 15:21:55.013343 PCI: 00:02.0 [8086/4e55] enabled
679 15:21:55.016422 PCI: 00:04.0 [8086/0000] bus ops
680 15:21:55.019636 PCI: 00:04.0 [8086/4e03] enabled
681 15:21:55.022977 PCI: 00:05.0 [8086/0000] bus ops
682 15:21:55.026370 PCI: 00:05.0 [8086/4e19] enabled
683 15:21:55.029615 PCI: 00:08.0 [8086/4e11] enabled
684 15:21:55.033340 PCI: 00:14.0 [8086/0000] bus ops
685 15:21:55.036550 PCI: 00:14.0 [8086/4ded] enabled
686 15:21:55.039614 PCI: 00:14.2 [8086/4def] disabled
687 15:21:55.043304 PCI: 00:14.3 [8086/0000] bus ops
688 15:21:55.046578 PCI: 00:14.3 [8086/4df0] enabled
689 15:21:55.049787 PCI: 00:14.5 [8086/0000] ops
690 15:21:55.052919 PCI: 00:14.5 [8086/4df8] enabled
691 15:21:55.056235 PCI: 00:15.0 [8086/0000] bus ops
692 15:21:55.059727 PCI: 00:15.0 [8086/4de8] enabled
693 15:21:55.063081 PCI: 00:15.1 [8086/0000] bus ops
694 15:21:55.066312 PCI: 00:15.1 [8086/4de9] enabled
695 15:21:55.069771 PCI: 00:15.2 [8086/0000] bus ops
696 15:21:55.073270 PCI: 00:15.2 [8086/4dea] enabled
697 15:21:55.076049 PCI: 00:15.3 [8086/0000] bus ops
698 15:21:55.079912 PCI: 00:15.3 [8086/4deb] enabled
699 15:21:55.083005 PCI: 00:16.0 [8086/0000] ops
700 15:21:55.086114 PCI: 00:16.0 [8086/4de0] enabled
701 15:21:55.089759 PCI: 00:19.0 [8086/0000] bus ops
702 15:21:55.093032 PCI: 00:19.0 [8086/4dc5] enabled
703 15:21:55.096123 PCI: 00:19.2 [8086/0000] ops
704 15:21:55.099640 PCI: 00:19.2 [8086/4dc7] enabled
705 15:21:55.099722 PCI: 00:1a.0 [8086/0000] ops
706 15:21:55.102701 PCI: 00:1a.0 [8086/4dc4] enabled
707 15:21:55.106082 PCI: 00:1e.0 [8086/0000] ops
708 15:21:55.109467 PCI: 00:1e.0 [8086/4da8] disabled
709 15:21:55.113024 PCI: 00:1e.2 [8086/0000] bus ops
710 15:21:55.116326 PCI: 00:1e.2 [8086/4daa] enabled
711 15:21:55.118960 PCI: 00:1f.0 [8086/0000] bus ops
712 15:21:55.123054 PCI: 00:1f.0 [8086/4d87] enabled
713 15:21:55.129309 PCI: Static device PCI: 00:1f.1 not found, disabling it.
714 15:21:55.129391 RTC Init
715 15:21:55.135671 Set power on after power failure.
716 15:21:55.135752 Disabling Deep S3
717 15:21:55.138985 Disabling Deep S3
718 15:21:55.139066 Disabling Deep S4
719 15:21:55.142415 Disabling Deep S4
720 15:21:55.142494 Disabling Deep S5
721 15:21:55.145688 Disabling Deep S5
722 15:21:55.148912 PCI: 00:1f.2 [0000/0000] hidden
723 15:21:55.152297 PCI: 00:1f.3 [8086/0000] bus ops
724 15:21:55.155947 PCI: 00:1f.3 [8086/4dc8] enabled
725 15:21:55.159655 PCI: 00:1f.5 [8086/0000] bus ops
726 15:21:55.163638 PCI: 00:1f.5 [8086/4da4] enabled
727 15:21:55.163719 PCI: Leftover static devices:
728 15:21:55.166833 PCI: 00:12.6
729 15:21:55.166906 PCI: 00:09.0
730 15:21:55.169985 PCI: 00:14.1
731 15:21:55.170057 PCI: 00:16.1
732 15:21:55.170119 PCI: 00:16.4
733 15:21:55.173417 PCI: 00:16.5
734 15:21:55.173490 PCI: 00:17.0
735 15:21:55.177039 PCI: 00:19.1
736 15:21:55.177109 PCI: 00:1e.1
737 15:21:55.177169 PCI: 00:1e.3
738 15:21:55.180406 PCI: 00:1f.1
739 15:21:55.180473 PCI: 00:1f.4
740 15:21:55.183932 PCI: 00:1f.7
741 15:21:55.187232 PCI: Check your devicetree.cb.
742 15:21:55.187340 PCI: 00:02.0 scanning...
743 15:21:55.193327 scan_generic_bus for PCI: 00:02.0
744 15:21:55.196630 scan_generic_bus for PCI: 00:02.0 done
745 15:21:55.200112 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
746 15:21:55.203508 PCI: 00:04.0 scanning...
747 15:21:55.206683 scan_generic_bus for PCI: 00:04.0
748 15:21:55.209972 GENERIC: 0.0 enabled
749 15:21:55.213685 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
750 15:21:55.220140 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
751 15:21:55.223552 PCI: 00:05.0 scanning...
752 15:21:55.226600 scan_generic_bus for PCI: 00:05.0
753 15:21:55.226729 GENERIC: 0.0 enabled
754 15:21:55.232895 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
755 15:21:55.239815 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
756 15:21:55.239896 PCI: 00:14.0 scanning...
757 15:21:55.242913 scan_static_bus for PCI: 00:14.0
758 15:21:55.246308 USB0 port 0 enabled
759 15:21:55.249735 USB0 port 0 scanning...
760 15:21:55.252995 scan_static_bus for USB0 port 0
761 15:21:55.253076 USB2 port 0 enabled
762 15:21:55.256686 USB2 port 1 enabled
763 15:21:55.259549 USB2 port 2 enabled
764 15:21:55.259630 USB2 port 3 enabled
765 15:21:55.262910 USB2 port 4 disabled
766 15:21:55.266601 USB2 port 5 enabled
767 15:21:55.266682 USB2 port 6 disabled
768 15:21:55.270008 USB2 port 7 enabled
769 15:21:55.270090 USB3 port 0 enabled
770 15:21:55.273250 USB3 port 1 enabled
771 15:21:55.276080 USB3 port 2 enabled
772 15:21:55.276161 USB3 port 3 enabled
773 15:21:55.279506 USB2 port 0 scanning...
774 15:21:55.282896 scan_static_bus for USB2 port 0
775 15:21:55.286301 scan_static_bus for USB2 port 0 done
776 15:21:55.293105 scan_bus: bus USB2 port 0 finished in 6 msecs
777 15:21:55.293186 USB2 port 1 scanning...
778 15:21:55.296364 scan_static_bus for USB2 port 1
779 15:21:55.299773 scan_static_bus for USB2 port 1 done
780 15:21:55.306066 scan_bus: bus USB2 port 1 finished in 6 msecs
781 15:21:55.309460 USB2 port 2 scanning...
782 15:21:55.312795 scan_static_bus for USB2 port 2
783 15:21:55.316305 scan_static_bus for USB2 port 2 done
784 15:21:55.319495 scan_bus: bus USB2 port 2 finished in 6 msecs
785 15:21:55.322425 USB2 port 3 scanning...
786 15:21:55.325963 scan_static_bus for USB2 port 3
787 15:21:55.329611 scan_static_bus for USB2 port 3 done
788 15:21:55.332940 scan_bus: bus USB2 port 3 finished in 6 msecs
789 15:21:55.335744 USB2 port 5 scanning...
790 15:21:55.339165 scan_static_bus for USB2 port 5
791 15:21:55.342683 scan_static_bus for USB2 port 5 done
792 15:21:55.349442 scan_bus: bus USB2 port 5 finished in 6 msecs
793 15:21:55.349524 USB2 port 7 scanning...
794 15:21:55.352312 scan_static_bus for USB2 port 7
795 15:21:55.355647 scan_static_bus for USB2 port 7 done
796 15:21:55.362444 scan_bus: bus USB2 port 7 finished in 6 msecs
797 15:21:55.365783 USB3 port 0 scanning...
798 15:21:55.369134 scan_static_bus for USB3 port 0
799 15:21:55.372574 scan_static_bus for USB3 port 0 done
800 15:21:55.375428 scan_bus: bus USB3 port 0 finished in 6 msecs
801 15:21:55.378649 USB3 port 1 scanning...
802 15:21:55.382251 scan_static_bus for USB3 port 1
803 15:21:55.385630 scan_static_bus for USB3 port 1 done
804 15:21:55.388966 scan_bus: bus USB3 port 1 finished in 6 msecs
805 15:21:55.391948 USB3 port 2 scanning...
806 15:21:55.395886 scan_static_bus for USB3 port 2
807 15:21:55.398695 scan_static_bus for USB3 port 2 done
808 15:21:55.405702 scan_bus: bus USB3 port 2 finished in 6 msecs
809 15:21:55.405784 USB3 port 3 scanning...
810 15:21:55.408997 scan_static_bus for USB3 port 3
811 15:21:55.415550 scan_static_bus for USB3 port 3 done
812 15:21:55.418827 scan_bus: bus USB3 port 3 finished in 6 msecs
813 15:21:55.421742 scan_static_bus for USB0 port 0 done
814 15:21:55.425224 scan_bus: bus USB0 port 0 finished in 172 msecs
815 15:21:55.431945 scan_static_bus for PCI: 00:14.0 done
816 15:21:55.435341 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
817 15:21:55.438344 PCI: 00:14.3 scanning...
818 15:21:55.441793 scan_static_bus for PCI: 00:14.3
819 15:21:55.445402 GENERIC: 0.0 enabled
820 15:21:55.448820 scan_static_bus for PCI: 00:14.3 done
821 15:21:55.451963 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
822 15:21:55.455021 PCI: 00:15.0 scanning...
823 15:21:55.458389 scan_static_bus for PCI: 00:15.0
824 15:21:55.458481 I2C: 00:2c enabled
825 15:21:55.461898 I2C: 00:15 enabled
826 15:21:55.465278 scan_static_bus for PCI: 00:15.0 done
827 15:21:55.471594 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
828 15:21:55.471676 PCI: 00:15.1 scanning...
829 15:21:55.474909 scan_static_bus for PCI: 00:15.1
830 15:21:55.481737 scan_static_bus for PCI: 00:15.1 done
831 15:21:55.485107 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
832 15:21:55.488431 PCI: 00:15.2 scanning...
833 15:21:55.491785 scan_static_bus for PCI: 00:15.2
834 15:21:55.494747 GENERIC: 0.0 disabled
835 15:21:55.494829 I2C: 00:15 enabled
836 15:21:55.497950 I2C: 00:10 disabled
837 15:21:55.498030 I2C: 00:10 disabled
838 15:21:55.501479 I2C: 00:2c enabled
839 15:21:55.505099 I2C: 00:40 enabled
840 15:21:55.505179 I2C: 00:10 enabled
841 15:21:55.508075 I2C: 00:39 enabled
842 15:21:55.511502 scan_static_bus for PCI: 00:15.2 done
843 15:21:55.514954 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
844 15:21:55.517848 PCI: 00:15.3 scanning...
845 15:21:55.521756 scan_static_bus for PCI: 00:15.3
846 15:21:55.524534 I2C: 00:36 enabled
847 15:21:55.524615 I2C: 00:10 disabled
848 15:21:55.527930 I2C: 00:0c enabled
849 15:21:55.531248 I2C: 00:50 enabled
850 15:21:55.534527 scan_static_bus for PCI: 00:15.3 done
851 15:21:55.537960 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
852 15:21:55.541318 PCI: 00:19.0 scanning...
853 15:21:55.544822 scan_static_bus for PCI: 00:19.0
854 15:21:55.547800 I2C: 00:1a enabled
855 15:21:55.547881 I2C: 00:1a disabled
856 15:21:55.551428 I2C: 00:1a disabled
857 15:21:55.551509 I2C: 00:28 enabled
858 15:21:55.554581 I2C: 00:29 enabled
859 15:21:55.558210 scan_static_bus for PCI: 00:19.0 done
860 15:21:55.564547 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
861 15:21:55.564656 PCI: 00:1e.2 scanning...
862 15:21:55.567899 scan_generic_bus for PCI: 00:1e.2
863 15:21:55.571125 SPI: 00 enabled
864 15:21:55.577665 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
865 15:21:55.580649 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
866 15:21:55.584470 PCI: 00:1f.0 scanning...
867 15:21:55.587707 scan_static_bus for PCI: 00:1f.0
868 15:21:55.591176 PNP: 0c09.0 enabled
869 15:21:55.591258 PNP: 0c09.0 scanning...
870 15:21:55.594568 scan_static_bus for PNP: 0c09.0
871 15:21:55.597601 scan_static_bus for PNP: 0c09.0 done
872 15:21:55.604184 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
873 15:21:55.607521 scan_static_bus for PCI: 00:1f.0 done
874 15:21:55.610853 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
875 15:21:55.614056 PCI: 00:1f.3 scanning...
876 15:21:55.617749 scan_static_bus for PCI: 00:1f.3
877 15:21:55.620772 GENERIC: 0.0 disabled
878 15:21:55.624108 scan_static_bus for PCI: 00:1f.3 done
879 15:21:55.627505 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
880 15:21:55.630942 PCI: 00:1f.5 scanning...
881 15:21:55.633757 scan_generic_bus for PCI: 00:1f.5
882 15:21:55.637056 scan_generic_bus for PCI: 00:1f.5 done
883 15:21:55.643684 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
884 15:21:55.647143 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
885 15:21:55.650527 scan_static_bus for Root Device done
886 15:21:55.657559 scan_bus: bus Root Device finished in 665 msecs
887 15:21:55.657642 done
888 15:21:55.663826 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1086 ms
889 15:21:55.666893 Chrome EC: UHEPI supported
890 15:21:55.673939 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
891 15:21:55.680143 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
892 15:21:55.683827 SPI flash protection: WPSW=0 SRP0=1
893 15:21:55.686835 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
894 15:21:55.693796 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
895 15:21:55.696882 found VGA at PCI: 00:02.0
896 15:21:55.700170 Setting up VGA for PCI: 00:02.0
897 15:21:55.703735 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
898 15:21:55.710469 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
899 15:21:55.710551 Allocating resources...
900 15:21:55.713784 Reading resources...
901 15:21:55.716804 Root Device read_resources bus 0 link: 0
902 15:21:55.723553 CPU_CLUSTER: 0 read_resources bus 0 link: 0
903 15:21:55.726371 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
904 15:21:55.733016 DOMAIN: 0000 read_resources bus 0 link: 0
905 15:21:55.736421 PCI: 00:04.0 read_resources bus 1 link: 0
906 15:21:55.740399 PCI: 00:04.0 read_resources bus 1 link: 0 done
907 15:21:55.748210 PCI: 00:05.0 read_resources bus 2 link: 0
908 15:21:55.804118 PCI: 00:05.0 read_resources bus 2 link: 0 done
909 15:21:55.804242 PCI: 00:14.0 read_resources bus 0 link: 0
910 15:21:55.804516 USB0 port 0 read_resources bus 0 link: 0
911 15:21:55.804588 USB0 port 0 read_resources bus 0 link: 0 done
912 15:21:55.804923 PCI: 00:14.0 read_resources bus 0 link: 0 done
913 15:21:55.805006 PCI: 00:14.3 read_resources bus 0 link: 0
914 15:21:55.805334 PCI: 00:14.3 read_resources bus 0 link: 0 done
915 15:21:55.806037 PCI: 00:15.0 read_resources bus 0 link: 0
916 15:21:55.806168 PCI: 00:15.0 read_resources bus 0 link: 0 done
917 15:21:55.806486 PCI: 00:15.2 read_resources bus 0 link: 0
918 15:21:55.806736 PCI: 00:15.2 read_resources bus 0 link: 0 done
919 15:21:55.842709 PCI: 00:15.3 read_resources bus 0 link: 0
920 15:21:55.842796 PCI: 00:15.3 read_resources bus 0 link: 0 done
921 15:21:55.843042 PCI: 00:19.0 read_resources bus 0 link: 0
922 15:21:55.843109 PCI: 00:19.0 read_resources bus 0 link: 0 done
923 15:21:55.843170 PCI: 00:1e.2 read_resources bus 3 link: 0
924 15:21:55.843414 PCI: 00:1e.2 read_resources bus 3 link: 0 done
925 15:21:55.843477 PCI: 00:1f.0 read_resources bus 0 link: 0
926 15:21:55.846649 PCI: 00:1f.0 read_resources bus 0 link: 0 done
927 15:21:55.846732 PCI: 00:1f.3 read_resources bus 0 link: 0
928 15:21:55.850063 PCI: 00:1f.3 read_resources bus 0 link: 0 done
929 15:21:55.856425 DOMAIN: 0000 read_resources bus 0 link: 0 done
930 15:21:55.859910 Root Device read_resources bus 0 link: 0 done
931 15:21:55.863339 Done reading resources.
932 15:21:55.869967 Show resources in subtree (Root Device)...After reading.
933 15:21:55.872785 Root Device child on link 0 CPU_CLUSTER: 0
934 15:21:55.876095 CPU_CLUSTER: 0 child on link 0 APIC: 00
935 15:21:55.879680 APIC: 00
936 15:21:55.879761 APIC: 02
937 15:21:55.883030 DOMAIN: 0000 child on link 0 PCI: 00:00.0
938 15:21:55.892959 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
939 15:21:55.902878 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
940 15:21:55.906101 PCI: 00:00.0
941 15:21:55.912589 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
942 15:21:55.922681 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
943 15:21:55.932650 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
944 15:21:55.942700 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
945 15:21:55.952258 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
946 15:21:55.962020 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
947 15:21:55.969020 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
948 15:21:55.979127 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
949 15:21:55.988601 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
950 15:21:55.998716 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
951 15:21:56.008479 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
952 15:21:56.018420 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
953 15:21:56.025330 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
954 15:21:56.035236 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
955 15:21:56.045003 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
956 15:21:56.055295 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
957 15:21:56.064489 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
958 15:21:56.074818 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
959 15:21:56.081179 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
960 15:21:56.084564 PCI: 00:02.0
961 15:21:56.094699 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 15:21:56.104312 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
963 15:21:56.114315 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
964 15:21:56.117843 PCI: 00:04.0 child on link 0 GENERIC: 0.0
965 15:21:56.127405 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
966 15:21:56.127489 GENERIC: 0.0
967 15:21:56.134127 PCI: 00:05.0 child on link 0 GENERIC: 0.0
968 15:21:56.144006 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
969 15:21:56.144090 GENERIC: 0.0
970 15:21:56.147429 PCI: 00:08.0
971 15:21:56.157404 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 15:21:56.161031 PCI: 00:14.0 child on link 0 USB0 port 0
973 15:21:56.170876 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
974 15:21:56.177167 USB0 port 0 child on link 0 USB2 port 0
975 15:21:56.177250 USB2 port 0
976 15:21:56.180507 USB2 port 1
977 15:21:56.180589 USB2 port 2
978 15:21:56.183670 USB2 port 3
979 15:21:56.183752 USB2 port 4
980 15:21:56.187068 USB2 port 5
981 15:21:56.187150 USB2 port 6
982 15:21:56.190511 USB2 port 7
983 15:21:56.190594 USB3 port 0
984 15:21:56.193734 USB3 port 1
985 15:21:56.193816 USB3 port 2
986 15:21:56.197116 USB3 port 3
987 15:21:56.197198 PCI: 00:14.2
988 15:21:56.204099 PCI: 00:14.3 child on link 0 GENERIC: 0.0
989 15:21:56.213513 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
990 15:21:56.213597 GENERIC: 0.0
991 15:21:56.217239 PCI: 00:14.5
992 15:21:56.227071 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 15:21:56.230591 PCI: 00:15.0 child on link 0 I2C: 00:2c
994 15:21:56.240528 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 15:21:56.243468 I2C: 00:2c
996 15:21:56.243549 I2C: 00:15
997 15:21:56.246795 PCI: 00:15.1
998 15:21:56.256582 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 15:21:56.259886 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1000 15:21:56.269966 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1001 15:21:56.270050 GENERIC: 0.0
1002 15:21:56.273271 I2C: 00:15
1003 15:21:56.273353 I2C: 00:10
1004 15:21:56.276601 I2C: 00:10
1005 15:21:56.276708 I2C: 00:2c
1006 15:21:56.280396 I2C: 00:40
1007 15:21:56.280478 I2C: 00:10
1008 15:21:56.283582 I2C: 00:39
1009 15:21:56.286956 PCI: 00:15.3 child on link 0 I2C: 00:36
1010 15:21:56.297023 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 15:21:56.297108 I2C: 00:36
1012 15:21:56.300154 I2C: 00:10
1013 15:21:56.300237 I2C: 00:0c
1014 15:21:56.303368 I2C: 00:50
1015 15:21:56.303450 PCI: 00:16.0
1016 15:21:56.313291 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 15:21:56.320037 PCI: 00:19.0 child on link 0 I2C: 00:1a
1018 15:21:56.329729 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1019 15:21:56.329825 I2C: 00:1a
1020 15:21:56.333029 I2C: 00:1a
1021 15:21:56.333111 I2C: 00:1a
1022 15:21:56.336259 I2C: 00:28
1023 15:21:56.336341 I2C: 00:29
1024 15:21:56.339609 PCI: 00:19.2
1025 15:21:56.349689 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 15:21:56.359636 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 15:21:56.359723 PCI: 00:1a.0
1028 15:21:56.369388 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 15:21:56.372772 PCI: 00:1e.0
1030 15:21:56.376289 PCI: 00:1e.2 child on link 0 SPI: 00
1031 15:21:56.385677 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 15:21:56.385760 SPI: 00
1033 15:21:56.392323 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1034 15:21:56.400126 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1035 15:21:56.402744 PNP: 0c09.0
1036 15:21:56.412497 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1037 15:21:56.412583 PCI: 00:1f.2
1038 15:21:56.423192 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1039 15:21:56.430013 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1040 15:21:56.436699 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1041 15:21:56.446719 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 15:21:56.456976 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1043 15:21:56.457060 GENERIC: 0.0
1044 15:21:56.460349 PCI: 00:1f.5
1045 15:21:56.466869 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 15:21:56.476564 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1047 15:21:56.483338 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1048 15:21:56.490106 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 15:21:56.496592 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1050 15:21:56.503434 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1051 15:21:56.513552 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1052 15:21:56.516481 DOMAIN: 0000: Resource ranges:
1053 15:21:56.519801 * Base: 1000, Size: 800, Tag: 100
1054 15:21:56.523086 * Base: 1900, Size: e700, Tag: 100
1055 15:21:56.526441 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1056 15:21:56.533836 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1057 15:21:56.539878 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1058 15:21:56.549706 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1059 15:21:56.556554 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1060 15:21:56.563072 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1061 15:21:56.572919 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1062 15:21:56.579632 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1063 15:21:56.586184 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1064 15:21:56.595859 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1065 15:21:56.602582 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1066 15:21:56.609189 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1067 15:21:56.619183 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1068 15:21:56.625581 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1069 15:21:56.632305 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1070 15:21:56.642232 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1071 15:21:56.648944 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1072 15:21:56.655400 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1073 15:21:56.665513 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1074 15:21:56.671711 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1075 15:21:56.678620 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1076 15:21:56.688567 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1077 15:21:56.695349 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1078 15:21:56.701529 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1079 15:21:56.704908 DOMAIN: 0000: Resource ranges:
1080 15:21:56.711917 * Base: 7fc00000, Size: 40400000, Tag: 200
1081 15:21:56.715032 * Base: d0000000, Size: 2b000000, Tag: 200
1082 15:21:56.718534 * Base: fb001000, Size: 2fff000, Tag: 200
1083 15:21:56.721439 * Base: fe010000, Size: 22000, Tag: 200
1084 15:21:56.728318 * Base: fe033000, Size: a4d000, Tag: 200
1085 15:21:56.731391 * Base: fea88000, Size: 2f8000, Tag: 200
1086 15:21:56.734791 * Base: fed88000, Size: 8000, Tag: 200
1087 15:21:56.737980 * Base: fed93000, Size: d000, Tag: 200
1088 15:21:56.744815 * Base: feda2000, Size: 125e000, Tag: 200
1089 15:21:56.748114 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1090 15:21:56.754498 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1091 15:21:56.761064 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1092 15:21:56.768073 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1093 15:21:56.774339 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1094 15:21:56.781473 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1095 15:21:56.787765 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1096 15:21:56.794416 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1097 15:21:56.801330 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1098 15:21:56.807608 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1099 15:21:56.814257 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1100 15:21:56.820922 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1101 15:21:56.827622 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1102 15:21:56.834452 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1103 15:21:56.840990 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1104 15:21:56.847781 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1105 15:21:56.854655 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1106 15:21:56.860657 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1107 15:21:56.867855 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1108 15:21:56.873898 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1109 15:21:56.880450 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1110 15:21:56.887445 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1111 15:21:56.893744 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1112 15:21:56.900615 Root Device assign_resources, bus 0 link: 0
1113 15:21:56.903881 DOMAIN: 0000 assign_resources, bus 0 link: 0
1114 15:21:56.913562 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1115 15:21:56.920177 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1116 15:21:56.930158 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1117 15:21:56.937101 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1118 15:21:56.939933 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 15:21:56.950736 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 15:21:56.953765 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1121 15:21:56.960145 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 15:21:56.963236 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 15:21:56.973159 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1124 15:21:56.979775 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1125 15:21:56.983402 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 15:21:56.989679 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 15:21:56.996151 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1128 15:21:57.003337 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 15:21:57.007139 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 15:21:57.013605 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1131 15:21:57.023556 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1132 15:21:57.026872 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 15:21:57.030159 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 15:21:57.040588 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1135 15:21:57.046812 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1136 15:21:57.053479 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 15:21:57.056992 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 15:21:57.066932 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1139 15:21:57.069815 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 15:21:57.073546 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 15:21:57.083514 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1142 15:21:57.089770 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1143 15:21:57.096549 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 15:21:57.099513 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 15:21:57.109733 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1146 15:21:57.116324 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1147 15:21:57.123118 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1148 15:21:57.129824 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 15:21:57.133045 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 15:21:57.139652 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 15:21:57.142592 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 15:21:57.149479 LPC: Trying to open IO window from 800 size 1ff
1153 15:21:57.155878 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1154 15:21:57.162553 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1155 15:21:57.169316 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 15:21:57.172788 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 15:21:57.182384 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1158 15:21:57.185488 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 15:21:57.188954 Root Device assign_resources, bus 0 link: 0
1160 15:21:57.192798 Done setting resources.
1161 15:21:57.198801 Show resources in subtree (Root Device)...After assigning values.
1162 15:21:57.202272 Root Device child on link 0 CPU_CLUSTER: 0
1163 15:21:57.209163 CPU_CLUSTER: 0 child on link 0 APIC: 00
1164 15:21:57.209270 APIC: 00
1165 15:21:57.209362 APIC: 02
1166 15:21:57.215428 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1167 15:21:57.225498 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1168 15:21:57.235469 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1169 15:21:57.235551 PCI: 00:00.0
1170 15:21:57.245295 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1171 15:21:57.255424 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1172 15:21:57.265190 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1173 15:21:57.271817 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1174 15:21:57.281982 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1175 15:21:57.291382 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1176 15:21:57.301477 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1177 15:21:57.311481 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1178 15:21:57.321278 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1179 15:21:57.327953 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1180 15:21:57.338085 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1181 15:21:57.348471 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1182 15:21:57.358448 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1183 15:21:57.364569 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1184 15:21:57.374379 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1185 15:21:57.384453 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1186 15:21:57.394035 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1187 15:21:57.403952 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1188 15:21:57.414322 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1189 15:21:57.414404 PCI: 00:02.0
1190 15:21:57.427426 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1191 15:21:57.437358 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1192 15:21:57.443743 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1193 15:21:57.450347 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 15:21:57.460299 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1195 15:21:57.464219 GENERIC: 0.0
1196 15:21:57.467182 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1197 15:21:57.477169 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1198 15:21:57.480421 GENERIC: 0.0
1199 15:21:57.480501 PCI: 00:08.0
1200 15:21:57.489964 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1201 15:21:57.496810 PCI: 00:14.0 child on link 0 USB0 port 0
1202 15:21:57.506848 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1203 15:21:57.510173 USB0 port 0 child on link 0 USB2 port 0
1204 15:21:57.513705 USB2 port 0
1205 15:21:57.513784 USB2 port 1
1206 15:21:57.516581 USB2 port 2
1207 15:21:57.516661 USB2 port 3
1208 15:21:57.519889 USB2 port 4
1209 15:21:57.519969 USB2 port 5
1210 15:21:57.523404 USB2 port 6
1211 15:21:57.523483 USB2 port 7
1212 15:21:57.526600 USB3 port 0
1213 15:21:57.526679 USB3 port 1
1214 15:21:57.529738 USB3 port 2
1215 15:21:57.529818 USB3 port 3
1216 15:21:57.533487 PCI: 00:14.2
1217 15:21:57.536354 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 15:21:57.546360 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1219 15:21:57.549886 GENERIC: 0.0
1220 15:21:57.549966 PCI: 00:14.5
1221 15:21:57.559666 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1222 15:21:57.566619 PCI: 00:15.0 child on link 0 I2C: 00:2c
1223 15:21:57.576360 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1224 15:21:57.576476 I2C: 00:2c
1225 15:21:57.579528 I2C: 00:15
1226 15:21:57.579629 PCI: 00:15.1
1227 15:21:57.589665 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1228 15:21:57.596293 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1229 15:21:57.606321 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1230 15:21:57.606403 GENERIC: 0.0
1231 15:21:57.609197 I2C: 00:15
1232 15:21:57.609311 I2C: 00:10
1233 15:21:57.612957 I2C: 00:10
1234 15:21:57.613039 I2C: 00:2c
1235 15:21:57.616291 I2C: 00:40
1236 15:21:57.616400 I2C: 00:10
1237 15:21:57.619075 I2C: 00:39
1238 15:21:57.622563 PCI: 00:15.3 child on link 0 I2C: 00:36
1239 15:21:57.632663 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1240 15:21:57.635776 I2C: 00:36
1241 15:21:57.635858 I2C: 00:10
1242 15:21:57.639400 I2C: 00:0c
1243 15:21:57.639481 I2C: 00:50
1244 15:21:57.642717 PCI: 00:16.0
1245 15:21:57.652450 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1246 15:21:57.655900 PCI: 00:19.0 child on link 0 I2C: 00:1a
1247 15:21:57.666014 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1248 15:21:57.666097 I2C: 00:1a
1249 15:21:57.669129 I2C: 00:1a
1250 15:21:57.669209 I2C: 00:1a
1251 15:21:57.672356 I2C: 00:28
1252 15:21:57.672437 I2C: 00:29
1253 15:21:57.675786 PCI: 00:19.2
1254 15:21:57.686099 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 15:21:57.695927 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1256 15:21:57.698995 PCI: 00:1a.0
1257 15:21:57.709027 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1258 15:21:57.709108 PCI: 00:1e.0
1259 15:21:57.715790 PCI: 00:1e.2 child on link 0 SPI: 00
1260 15:21:57.725575 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1261 15:21:57.725658 SPI: 00
1262 15:21:57.729124 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 15:21:57.738951 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 15:21:57.739033 PNP: 0c09.0
1265 15:21:57.748812 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 15:21:57.752101 PCI: 00:1f.2
1267 15:21:57.758908 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 15:21:57.769152 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1269 15:21:57.775569 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1270 15:21:57.785150 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1271 15:21:57.795421 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1272 15:21:57.795504 GENERIC: 0.0
1273 15:21:57.798858 PCI: 00:1f.5
1274 15:21:57.808639 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1275 15:21:57.811617 Done allocating resources.
1276 15:21:57.818380 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1277 15:21:57.818462 Enabling resources...
1278 15:21:57.825477 PCI: 00:00.0 subsystem <- 8086/4e22
1279 15:21:57.825558 PCI: 00:00.0 cmd <- 06
1280 15:21:57.828802 PCI: 00:02.0 subsystem <- 8086/4e55
1281 15:21:57.832026 PCI: 00:02.0 cmd <- 03
1282 15:21:57.836000 PCI: 00:04.0 subsystem <- 8086/4e03
1283 15:21:57.839247 PCI: 00:04.0 cmd <- 02
1284 15:21:57.841993 PCI: 00:05.0 bridge ctrl <- 0003
1285 15:21:57.845411 PCI: 00:05.0 subsystem <- 8086/4e19
1286 15:21:57.848880 PCI: 00:05.0 cmd <- 02
1287 15:21:57.852064 PCI: 00:08.0 cmd <- 06
1288 15:21:57.855292 PCI: 00:14.0 subsystem <- 8086/4ded
1289 15:21:57.855373 PCI: 00:14.0 cmd <- 02
1290 15:21:57.861868 PCI: 00:14.3 subsystem <- 8086/4df0
1291 15:21:57.861952 PCI: 00:14.3 cmd <- 02
1292 15:21:57.865100 PCI: 00:14.5 subsystem <- 8086/4df8
1293 15:21:57.868557 PCI: 00:14.5 cmd <- 06
1294 15:21:57.871995 PCI: 00:15.0 subsystem <- 8086/4de8
1295 15:21:57.875451 PCI: 00:15.0 cmd <- 02
1296 15:21:57.878798 PCI: 00:15.1 subsystem <- 8086/4de9
1297 15:21:57.881825 PCI: 00:15.1 cmd <- 02
1298 15:21:57.885154 PCI: 00:15.2 subsystem <- 8086/4dea
1299 15:21:57.888624 PCI: 00:15.2 cmd <- 02
1300 15:21:57.891825 PCI: 00:15.3 subsystem <- 8086/4deb
1301 15:21:57.895121 PCI: 00:15.3 cmd <- 02
1302 15:21:57.898713 PCI: 00:16.0 subsystem <- 8086/4de0
1303 15:21:57.898810 PCI: 00:16.0 cmd <- 02
1304 15:21:57.904981 PCI: 00:19.0 subsystem <- 8086/4dc5
1305 15:21:57.905077 PCI: 00:19.0 cmd <- 02
1306 15:21:57.908467 PCI: 00:19.2 subsystem <- 8086/4dc7
1307 15:21:57.911892 PCI: 00:19.2 cmd <- 06
1308 15:21:57.915329 PCI: 00:1a.0 subsystem <- 8086/4dc4
1309 15:21:57.918547 PCI: 00:1a.0 cmd <- 06
1310 15:21:57.922186 PCI: 00:1e.2 subsystem <- 8086/4daa
1311 15:21:57.925152 PCI: 00:1e.2 cmd <- 06
1312 15:21:57.928769 PCI: 00:1f.0 subsystem <- 8086/4d87
1313 15:21:57.931825 PCI: 00:1f.0 cmd <- 407
1314 15:21:57.935489 PCI: 00:1f.3 subsystem <- 8086/4dc8
1315 15:21:57.938586 PCI: 00:1f.3 cmd <- 02
1316 15:21:57.941903 PCI: 00:1f.5 subsystem <- 8086/4da4
1317 15:21:57.942291 PCI: 00:1f.5 cmd <- 406
1318 15:21:57.947358 done.
1319 15:21:57.950753 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1320 15:21:57.954139 Initializing devices...
1321 15:21:57.957133 Root Device init
1322 15:21:57.957500 mainboard: EC init
1323 15:21:57.963907 Chrome EC: Set SMI mask to 0x0000000000000000
1324 15:21:57.967344 Chrome EC: clear events_b mask to 0x0000000000000000
1325 15:21:57.974561 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1326 15:21:57.981149 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1327 15:21:57.987633 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1328 15:21:57.990959 Chrome EC: Set WAKE mask to 0x0000000000000000
1329 15:21:57.994290 Root Device init finished in 35 msecs
1330 15:21:57.998500 PCI: 00:00.0 init
1331 15:21:58.001907 CPU TDP = 6 Watts
1332 15:21:58.002278 CPU PL1 = 7 Watts
1333 15:21:58.005389 CPU PL2 = 12 Watts
1334 15:21:58.008335 PCI: 00:00.0 init finished in 6 msecs
1335 15:21:58.011844 PCI: 00:02.0 init
1336 15:21:58.015129 GMA: Found VBT in CBFS
1337 15:21:58.015502 GMA: Found valid VBT in CBFS
1338 15:21:58.021648 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1339 15:21:58.028752 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1340 15:21:58.035119 PCI: 00:02.0 init finished in 18 msecs
1341 15:21:58.035570 PCI: 00:08.0 init
1342 15:21:58.041612 PCI: 00:08.0 init finished in 0 msecs
1343 15:21:58.041986 PCI: 00:14.0 init
1344 15:21:58.047994 XHCI: Updated LFPS sampling OFF time to 9 ms
1345 15:21:58.051563 PCI: 00:14.0 init finished in 4 msecs
1346 15:21:58.055343 PCI: 00:15.0 init
1347 15:21:58.055723 I2C bus 0 version 0x3230302a
1348 15:21:58.061315 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1349 15:21:58.064724 PCI: 00:15.0 init finished in 6 msecs
1350 15:21:58.065131 PCI: 00:15.1 init
1351 15:21:58.068345 I2C bus 1 version 0x3230302a
1352 15:21:58.071389 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1353 15:21:58.074563 PCI: 00:15.1 init finished in 6 msecs
1354 15:21:58.078308 PCI: 00:15.2 init
1355 15:21:58.081606 I2C bus 2 version 0x3230302a
1356 15:21:58.085183 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1357 15:21:58.088168 PCI: 00:15.2 init finished in 6 msecs
1358 15:21:58.091729 PCI: 00:15.3 init
1359 15:21:58.095129 I2C bus 3 version 0x3230302a
1360 15:21:58.098455 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1361 15:21:58.101914 PCI: 00:15.3 init finished in 6 msecs
1362 15:21:58.105194 PCI: 00:16.0 init
1363 15:21:58.108030 PCI: 00:16.0 init finished in 0 msecs
1364 15:21:58.108428 PCI: 00:19.0 init
1365 15:21:58.111622 I2C bus 4 version 0x3230302a
1366 15:21:58.114672 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1367 15:21:58.121530 PCI: 00:19.0 init finished in 6 msecs
1368 15:21:58.121952 PCI: 00:1a.0 init
1369 15:21:58.124699 PCI: 00:1a.0 init finished in 0 msecs
1370 15:21:58.128424 PCI: 00:1f.0 init
1371 15:21:58.131421 IOAPIC: Initializing IOAPIC at 0xfec00000
1372 15:21:58.138491 IOAPIC: Bootstrap Processor Local APIC = 0x00
1373 15:21:58.138891 IOAPIC: ID = 0x02
1374 15:21:58.141338 IOAPIC: Dumping registers
1375 15:21:58.144984 reg 0x0000: 0x02000000
1376 15:21:58.148478 reg 0x0001: 0x00770020
1377 15:21:58.148916 reg 0x0002: 0x00000000
1378 15:21:58.154972 PCI: 00:1f.0 init finished in 21 msecs
1379 15:21:58.155370 PCI: 00:1f.2 init
1380 15:21:58.157897 Disabling ACPI via APMC.
1381 15:21:58.161927 APMC done.
1382 15:21:58.165366 PCI: 00:1f.2 init finished in 5 msecs
1383 15:21:58.176174 PNP: 0c09.0 init
1384 15:21:58.179764 Google Chrome EC uptime: 6.540 seconds
1385 15:21:58.186099 Google Chrome AP resets since EC boot: 0
1386 15:21:58.189649 Google Chrome most recent AP reset causes:
1387 15:21:58.196337 Google Chrome EC reset flags at last EC boot: reset-pin
1388 15:21:58.199626 PNP: 0c09.0 init finished in 18 msecs
1389 15:21:58.200023 Devices initialized
1390 15:21:58.202544 Show all devs... After init.
1391 15:21:58.206177 Root Device: enabled 1
1392 15:21:58.209351 CPU_CLUSTER: 0: enabled 1
1393 15:21:58.212625 DOMAIN: 0000: enabled 1
1394 15:21:58.213081 PCI: 00:00.0: enabled 1
1395 15:21:58.215906 PCI: 00:02.0: enabled 1
1396 15:21:58.219174 PCI: 00:04.0: enabled 1
1397 15:21:58.219585 PCI: 00:05.0: enabled 1
1398 15:21:58.222624 PCI: 00:09.0: enabled 0
1399 15:21:58.226141 PCI: 00:12.6: enabled 0
1400 15:21:58.228993 PCI: 00:14.0: enabled 1
1401 15:21:58.229387 PCI: 00:14.1: enabled 0
1402 15:21:58.232259 PCI: 00:14.2: enabled 0
1403 15:21:58.235979 PCI: 00:14.3: enabled 1
1404 15:21:58.239456 PCI: 00:14.5: enabled 1
1405 15:21:58.239859 PCI: 00:15.0: enabled 1
1406 15:21:58.242452 PCI: 00:15.1: enabled 1
1407 15:21:58.245991 PCI: 00:15.2: enabled 1
1408 15:21:58.249072 PCI: 00:15.3: enabled 1
1409 15:21:58.249452 PCI: 00:16.0: enabled 1
1410 15:21:58.252599 PCI: 00:16.1: enabled 0
1411 15:21:58.255471 PCI: 00:16.4: enabled 0
1412 15:21:58.259080 PCI: 00:16.5: enabled 0
1413 15:21:58.259460 PCI: 00:17.0: enabled 0
1414 15:21:58.262557 PCI: 00:19.0: enabled 1
1415 15:21:58.265620 PCI: 00:19.1: enabled 0
1416 15:21:58.265999 PCI: 00:19.2: enabled 1
1417 15:21:58.268761 PCI: 00:1a.0: enabled 1
1418 15:21:58.272278 PCI: 00:1c.0: enabled 0
1419 15:21:58.275861 PCI: 00:1c.1: enabled 0
1420 15:21:58.276240 PCI: 00:1c.2: enabled 0
1421 15:21:58.278870 PCI: 00:1c.3: enabled 0
1422 15:21:58.282531 PCI: 00:1c.4: enabled 0
1423 15:21:58.285609 PCI: 00:1c.5: enabled 0
1424 15:21:58.286006 PCI: 00:1c.6: enabled 0
1425 15:21:58.289071 PCI: 00:1c.7: enabled 1
1426 15:21:58.292287 PCI: 00:1e.0: enabled 0
1427 15:21:58.295434 PCI: 00:1e.1: enabled 0
1428 15:21:58.295809 PCI: 00:1e.2: enabled 1
1429 15:21:58.298935 PCI: 00:1e.3: enabled 0
1430 15:21:58.302031 PCI: 00:1f.0: enabled 1
1431 15:21:58.302409 PCI: 00:1f.1: enabled 0
1432 15:21:58.305528 PCI: 00:1f.2: enabled 1
1433 15:21:58.308383 PCI: 00:1f.3: enabled 1
1434 15:21:58.311807 PCI: 00:1f.4: enabled 0
1435 15:21:58.312182 PCI: 00:1f.5: enabled 1
1436 15:21:58.315334 PCI: 00:1f.7: enabled 0
1437 15:21:58.318593 GENERIC: 0.0: enabled 1
1438 15:21:58.321736 GENERIC: 0.0: enabled 1
1439 15:21:58.322116 USB0 port 0: enabled 1
1440 15:21:58.325099 GENERIC: 0.0: enabled 1
1441 15:21:58.328772 I2C: 00:2c: enabled 1
1442 15:21:58.329247 I2C: 00:15: enabled 1
1443 15:21:58.331807 GENERIC: 0.0: enabled 0
1444 15:21:58.335261 I2C: 00:15: enabled 1
1445 15:21:58.338728 I2C: 00:10: enabled 0
1446 15:21:58.339108 I2C: 00:10: enabled 0
1447 15:21:58.342036 I2C: 00:2c: enabled 1
1448 15:21:58.345063 I2C: 00:40: enabled 1
1449 15:21:58.345443 I2C: 00:10: enabled 1
1450 15:21:58.348203 I2C: 00:39: enabled 1
1451 15:21:58.351950 I2C: 00:36: enabled 1
1452 15:21:58.352328 I2C: 00:10: enabled 0
1453 15:21:58.355729 I2C: 00:0c: enabled 1
1454 15:21:58.358243 I2C: 00:50: enabled 1
1455 15:21:58.358628 I2C: 00:1a: enabled 1
1456 15:21:58.361863 I2C: 00:1a: enabled 0
1457 15:21:58.364843 I2C: 00:1a: enabled 0
1458 15:21:58.365225 I2C: 00:28: enabled 1
1459 15:21:58.368582 I2C: 00:29: enabled 1
1460 15:21:58.372201 PCI: 00:00.0: enabled 1
1461 15:21:58.372724 SPI: 00: enabled 1
1462 15:21:58.374861 PNP: 0c09.0: enabled 1
1463 15:21:58.378892 GENERIC: 0.0: enabled 0
1464 15:21:58.379375 USB2 port 0: enabled 1
1465 15:21:58.382165 USB2 port 1: enabled 1
1466 15:21:58.385201 USB2 port 2: enabled 1
1467 15:21:58.388081 USB2 port 3: enabled 1
1468 15:21:58.388459 USB2 port 4: enabled 0
1469 15:21:58.391697 USB2 port 5: enabled 1
1470 15:21:58.394777 USB2 port 6: enabled 0
1471 15:21:58.395161 USB2 port 7: enabled 1
1472 15:21:58.398197 USB3 port 0: enabled 1
1473 15:21:58.401251 USB3 port 1: enabled 1
1474 15:21:58.401648 USB3 port 2: enabled 1
1475 15:21:58.404609 USB3 port 3: enabled 1
1476 15:21:58.407958 APIC: 00: enabled 1
1477 15:21:58.408380 APIC: 02: enabled 1
1478 15:21:58.411530 PCI: 00:08.0: enabled 1
1479 15:21:58.418097 BS: BS_DEV_INIT run times (exec / console): 23 / 437 ms
1480 15:21:58.421407 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1481 15:21:58.424650 ELOG: NV offset 0xbfa000 size 0x1000
1482 15:21:58.432806 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1483 15:21:58.439338 ELOG: Event(17) added with size 13 at 2023-07-14 15:21:58 UTC
1484 15:21:58.445845 ELOG: Event(92) added with size 9 at 2023-07-14 15:21:58 UTC
1485 15:21:58.453033 ELOG: Event(93) added with size 9 at 2023-07-14 15:21:58 UTC
1486 15:21:58.459162 ELOG: Event(9E) added with size 10 at 2023-07-14 15:21:58 UTC
1487 15:21:58.465727 ELOG: Event(9F) added with size 14 at 2023-07-14 15:21:58 UTC
1488 15:21:58.469168 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1489 15:21:58.476234 ELOG: Event(A1) added with size 10 at 2023-07-14 15:21:58 UTC
1490 15:21:58.486429 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1491 15:21:58.492845 ELOG: Event(A0) added with size 9 at 2023-07-14 15:21:58 UTC
1492 15:21:58.495887 elog_add_boot_reason: Logged dev mode boot
1493 15:21:58.502839 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1494 15:21:58.503224 Finalize devices...
1495 15:21:58.506263 Devices finalized
1496 15:21:58.509360 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1497 15:21:58.516399 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1498 15:21:58.522692 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1499 15:21:58.526052 ME: HFSTS1 : 0x80030045
1500 15:21:58.529287 ME: HFSTS2 : 0x30280136
1501 15:21:58.532737 ME: HFSTS3 : 0x00000050
1502 15:21:58.539001 ME: HFSTS4 : 0x00004000
1503 15:21:58.542561 ME: HFSTS5 : 0x00000000
1504 15:21:58.546074 ME: HFSTS6 : 0x40400006
1505 15:21:58.548888 ME: Manufacturing Mode : NO
1506 15:21:58.552119 ME: FW Partition Table : OK
1507 15:21:58.555898 ME: Bringup Loader Failure : NO
1508 15:21:58.558842 ME: Firmware Init Complete : NO
1509 15:21:58.562186 ME: Boot Options Present : NO
1510 15:21:58.565631 ME: Update In Progress : NO
1511 15:21:58.568635 ME: D0i3 Support : YES
1512 15:21:58.571873 ME: Low Power State Enabled : NO
1513 15:21:58.575448 ME: CPU Replaced : YES
1514 15:21:58.578763 ME: CPU Replacement Valid : YES
1515 15:21:58.582096 ME: Current Working State : 5
1516 15:21:58.585565 ME: Current Operation State : 1
1517 15:21:58.588559 ME: Current Operation Mode : 3
1518 15:21:58.592052 ME: Error Code : 0
1519 15:21:58.595871 ME: CPU Debug Disabled : YES
1520 15:21:58.598364 ME: TXT Support : NO
1521 15:21:58.605345 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1522 15:21:58.611803 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1523 15:21:58.615004 ACPI: Writing ACPI tables at 76b27000.
1524 15:21:58.615385 ACPI: * FACS
1525 15:21:58.618649 ACPI: * DSDT
1526 15:21:58.621944 Ramoops buffer: 0x100000@0x76a26000.
1527 15:21:58.625228 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1528 15:21:58.631946 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1529 15:21:58.635228 Google Chrome EC: version:
1530 15:21:58.638141 ro: magolor_1.1.9999-103b6f9
1531 15:21:58.641771 rw: magolor_1.1.9999-103b6f9
1532 15:21:58.642068 running image: 1
1533 15:21:58.648030 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1534 15:21:58.652161 ACPI: * FADT
1535 15:21:58.652372 SCI is IRQ9
1536 15:21:58.658515 ACPI: added table 1/32, length now 40
1537 15:21:58.658733 ACPI: * SSDT
1538 15:21:58.661937 Found 1 CPU(s) with 2 core(s) each.
1539 15:21:58.665376 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1540 15:21:58.672312 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1541 15:21:58.675602 Could not locate 'wifi_sar' in VPD.
1542 15:21:58.678606 Checking CBFS for default SAR values
1543 15:21:58.685192 wifi_sar_defaults.hex has bad len in CBFS
1544 15:21:58.688581 failed from getting SAR limits!
1545 15:21:58.692135 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1546 15:21:58.698980 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1547 15:21:58.701924 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1548 15:21:58.708573 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1549 15:21:58.712011 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1550 15:21:58.718384 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1551 15:21:58.722206 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1552 15:21:58.728539 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1553 15:21:58.735173 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1554 15:21:58.742092 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1555 15:21:58.745070 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1556 15:21:58.752029 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1557 15:21:58.758431 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1558 15:21:58.762045 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1559 15:21:58.764860 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1560 15:21:58.773386 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1561 15:21:58.776779 PS2K: Passing 101 keymaps to kernel
1562 15:21:58.783362 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1563 15:21:58.790204 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1564 15:21:58.793051 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1565 15:21:58.799829 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1566 15:21:58.806439 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1567 15:21:58.809583 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1568 15:21:58.816468 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1569 15:21:58.823303 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1570 15:21:58.826641 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1571 15:21:58.832787 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1572 15:21:58.836594 ACPI: added table 2/32, length now 44
1573 15:21:58.839550 ACPI: * MCFG
1574 15:21:58.842879 ACPI: added table 3/32, length now 48
1575 15:21:58.843380 ACPI: * TPM2
1576 15:21:58.846385 TPM2 log created at 0x76a16000
1577 15:21:58.849541 ACPI: added table 4/32, length now 52
1578 15:21:58.852989 ACPI: * MADT
1579 15:21:58.853504 SCI is IRQ9
1580 15:21:58.856455 ACPI: added table 5/32, length now 56
1581 15:21:58.859566 current = 76b2d580
1582 15:21:58.862860 ACPI: * DMAR
1583 15:21:58.866423 ACPI: added table 6/32, length now 60
1584 15:21:58.869418 ACPI: added table 7/32, length now 64
1585 15:21:58.869827 ACPI: * HPET
1586 15:21:58.873016 ACPI: added table 8/32, length now 68
1587 15:21:58.876429 ACPI: done.
1588 15:21:58.880125 ACPI tables: 26304 bytes.
1589 15:21:58.882942 smbios_write_tables: 76a15000
1590 15:21:58.886151 EC returned error result code 3
1591 15:21:58.889247 Couldn't obtain OEM name from CBI
1592 15:21:58.892713 Create SMBIOS type 16
1593 15:21:58.893227 Create SMBIOS type 17
1594 15:21:58.895942 GENERIC: 0.0 (WIFI Device)
1595 15:21:58.899824 SMBIOS tables: 913 bytes.
1596 15:21:58.903364 Writing table forward entry at 0x00000500
1597 15:21:58.909493 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1598 15:21:58.912514 Writing coreboot table at 0x76b4b000
1599 15:21:58.919199 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1600 15:21:58.922737 1. 0000000000001000-000000000009ffff: RAM
1601 15:21:58.929196 2. 00000000000a0000-00000000000fffff: RESERVED
1602 15:21:58.932617 3. 0000000000100000-0000000076a14fff: RAM
1603 15:21:58.938940 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1604 15:21:58.942383 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1605 15:21:58.948823 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1606 15:21:58.952352 7. 0000000077000000-000000007fbfffff: RESERVED
1607 15:21:58.959085 8. 00000000c0000000-00000000cfffffff: RESERVED
1608 15:21:58.961943 9. 00000000fb000000-00000000fb000fff: RESERVED
1609 15:21:58.968986 10. 00000000fe000000-00000000fe00ffff: RESERVED
1610 15:21:58.971849 11. 00000000fea80000-00000000fea87fff: RESERVED
1611 15:21:58.978872 12. 00000000fed80000-00000000fed87fff: RESERVED
1612 15:21:58.982323 13. 00000000fed90000-00000000fed92fff: RESERVED
1613 15:21:58.985377 14. 00000000feda0000-00000000feda1fff: RESERVED
1614 15:21:58.991819 15. 0000000100000000-00000001803fffff: RAM
1615 15:21:58.995101 Passing 4 GPIOs to payload:
1616 15:21:58.998303 NAME | PORT | POLARITY | VALUE
1617 15:21:59.004929 lid | undefined | high | high
1618 15:21:59.008453 power | undefined | high | low
1619 15:21:59.014932 oprom | undefined | high | low
1620 15:21:59.022079 EC in RW | 0x000000b9 | high | low
1621 15:21:59.025159 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 1ef8
1622 15:21:59.028784 coreboot table: 1504 bytes.
1623 15:21:59.031725 IMD ROOT 0. 0x76fff000 0x00001000
1624 15:21:59.038610 IMD SMALL 1. 0x76ffe000 0x00001000
1625 15:21:59.041688 FSP MEMORY 2. 0x76c4e000 0x003b0000
1626 15:21:59.045070 CONSOLE 3. 0x76c2e000 0x00020000
1627 15:21:59.048411 FMAP 4. 0x76c2d000 0x00000578
1628 15:21:59.051999 TIME STAMP 5. 0x76c2c000 0x00000910
1629 15:21:59.054897 VBOOT WORK 6. 0x76c18000 0x00014000
1630 15:21:59.058285 ROMSTG STCK 7. 0x76c17000 0x00001000
1631 15:21:59.061853 AFTER CAR 8. 0x76c0d000 0x0000a000
1632 15:21:59.068594 RAMSTAGE 9. 0x76ba7000 0x00066000
1633 15:21:59.071437 REFCODE 10. 0x76b67000 0x00040000
1634 15:21:59.074841 SMM BACKUP 11. 0x76b57000 0x00010000
1635 15:21:59.078530 4f444749 12. 0x76b55000 0x00002000
1636 15:21:59.081498 EXT VBT13. 0x76b53000 0x00001c43
1637 15:21:59.084791 COREBOOT 14. 0x76b4b000 0x00008000
1638 15:21:59.088210 ACPI 15. 0x76b27000 0x00024000
1639 15:21:59.091675 ACPI GNVS 16. 0x76b26000 0x00001000
1640 15:21:59.095208 RAMOOPS 17. 0x76a26000 0x00100000
1641 15:21:59.098129 TPM2 TCGLOG18. 0x76a16000 0x00010000
1642 15:21:59.104423 SMBIOS 19. 0x76a15000 0x00000800
1643 15:21:59.104965 IMD small region:
1644 15:21:59.107894 IMD ROOT 0. 0x76ffec00 0x00000400
1645 15:21:59.111359 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1646 15:21:59.117904 VPD 2. 0x76ffeb60 0x0000006c
1647 15:21:59.121433 POWER STATE 3. 0x76ffeb20 0x00000040
1648 15:21:59.124897 ROMSTAGE 4. 0x76ffeb00 0x00000004
1649 15:21:59.127853 MEM INFO 5. 0x76ffe920 0x000001e0
1650 15:21:59.134668 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1651 15:21:59.138399 MTRR: Physical address space:
1652 15:21:59.144439 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1653 15:21:59.151855 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1654 15:21:59.157938 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1655 15:21:59.161122 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1656 15:21:59.167989 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1657 15:21:59.174326 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1658 15:21:59.181085 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1659 15:21:59.184487 MTRR: Fixed MSR 0x250 0x0606060606060606
1660 15:21:59.187511 MTRR: Fixed MSR 0x258 0x0606060606060606
1661 15:21:59.194517 MTRR: Fixed MSR 0x259 0x0000000000000000
1662 15:21:59.197454 MTRR: Fixed MSR 0x268 0x0606060606060606
1663 15:21:59.201002 MTRR: Fixed MSR 0x269 0x0606060606060606
1664 15:21:59.204506 MTRR: Fixed MSR 0x26a 0x0606060606060606
1665 15:21:59.210862 MTRR: Fixed MSR 0x26b 0x0606060606060606
1666 15:21:59.214334 MTRR: Fixed MSR 0x26c 0x0606060606060606
1667 15:21:59.217588 MTRR: Fixed MSR 0x26d 0x0606060606060606
1668 15:21:59.220712 MTRR: Fixed MSR 0x26e 0x0606060606060606
1669 15:21:59.227182 MTRR: Fixed MSR 0x26f 0x0606060606060606
1670 15:21:59.230735 call enable_fixed_mtrr()
1671 15:21:59.233817 CPU physical address size: 39 bits
1672 15:21:59.237274 MTRR: default type WB/UC MTRR counts: 6/5.
1673 15:21:59.240828 MTRR: UC selected as default type.
1674 15:21:59.247016 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1675 15:21:59.253745 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1676 15:21:59.260792 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1677 15:21:59.263522 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1678 15:21:59.270317 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1679 15:21:59.273959
1680 15:21:59.274430 MTRR check
1681 15:21:59.277044 Fixed MTRRs : Enabled
1682 15:21:59.277478 Variable MTRRs: Enabled
1683 15:21:59.277887
1684 15:21:59.283542 MTRR: Fixed MSR 0x250 0x0606060606060606
1685 15:21:59.287198 MTRR: Fixed MSR 0x258 0x0606060606060606
1686 15:21:59.290446 MTRR: Fixed MSR 0x259 0x0000000000000000
1687 15:21:59.293454 MTRR: Fixed MSR 0x268 0x0606060606060606
1688 15:21:59.300378 MTRR: Fixed MSR 0x269 0x0606060606060606
1689 15:21:59.303788 MTRR: Fixed MSR 0x26a 0x0606060606060606
1690 15:21:59.306861 MTRR: Fixed MSR 0x26b 0x0606060606060606
1691 15:21:59.310259 MTRR: Fixed MSR 0x26c 0x0606060606060606
1692 15:21:59.316591 MTRR: Fixed MSR 0x26d 0x0606060606060606
1693 15:21:59.320187 MTRR: Fixed MSR 0x26e 0x0606060606060606
1694 15:21:59.323372 MTRR: Fixed MSR 0x26f 0x0606060606060606
1695 15:21:59.329950 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1696 15:21:59.333078 call enable_fixed_mtrr()
1697 15:21:59.337304 Checking cr50 for pending updates
1698 15:21:59.337723 CPU physical address size: 39 bits
1699 15:21:59.342441 Reading cr50 TPM mode
1700 15:21:59.352369 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1701 15:21:59.359607 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1702 15:21:59.362931 Checking segment from ROM address 0xfff9d5b8
1703 15:21:59.369659 Checking segment from ROM address 0xfff9d5d4
1704 15:21:59.372629 Loading segment from ROM address 0xfff9d5b8
1705 15:21:59.376232 code (compression=0)
1706 15:21:59.382659 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1707 15:21:59.392854 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1708 15:21:59.395916 it's not compressed!
1709 15:21:59.521553 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1710 15:21:59.528138 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1711 15:21:59.535528 Loading segment from ROM address 0xfff9d5d4
1712 15:21:59.539173 Entry Point 0x30000000
1713 15:21:59.539626 Loaded segments
1714 15:21:59.545388 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1715 15:21:59.561552 Finalizing chipset.
1716 15:21:59.565072 Finalizing SMM.
1717 15:21:59.565493 APMC done.
1718 15:21:59.571517 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1719 15:21:59.574798 mp_park_aps done after 0 msecs.
1720 15:21:59.578028 Jumping to boot code at 0x30000000(0x76b4b000)
1721 15:21:59.588100 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1722 15:21:59.588522
1723 15:21:59.588907
1724 15:21:59.589221
1725 15:21:59.591471 Starting depthcharge on Magolor...
1726 15:21:59.591883
1727 15:21:59.592883 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 15:21:59.593377 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1729 15:21:59.593793 Setting prompt string to ['dedede:']
1730 15:21:59.594173 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1731 15:21:59.601374 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1732 15:21:59.601836
1733 15:21:59.607944 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1734 15:21:59.608363
1735 15:21:59.611537 fw_config match found: AUDIO_AMP=UNPROVISIONED
1736 15:21:59.611956
1737 15:21:59.614437 Wipe memory regions:
1738 15:21:59.614851
1739 15:21:59.617971 [0x00000000001000, 0x000000000a0000)
1740 15:21:59.618389
1741 15:21:59.621193 [0x00000000100000, 0x00000030000000)
1742 15:21:59.750382
1743 15:21:59.753301 [0x00000031062170, 0x00000076a15000)
1744 15:21:59.922723
1745 15:21:59.925499 [0x00000100000000, 0x00000180400000)
1746 15:22:00.988117
1747 15:22:00.988626 R8152: Initializing
1748 15:22:00.989025
1749 15:22:00.991558 Version 9 (ocp_data = 6010)
1750 15:22:00.992075
1751 15:22:00.994239 R8152: Done initializing
1752 15:22:00.994657
1753 15:22:00.997691 Adding net device
1754 15:22:00.998107
1755 15:22:01.001122 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1756 15:22:01.001541
1757 15:22:01.004059
1758 15:22:01.004473
1759 15:22:01.005291 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 15:22:01.106486 dedede: tftpboot 192.168.201.1 11088597/tftp-deploy-_mzgl43y/kernel/bzImage 11088597/tftp-deploy-_mzgl43y/kernel/cmdline 11088597/tftp-deploy-_mzgl43y/ramdisk/ramdisk.cpio.gz
1762 15:22:01.107078 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1763 15:22:01.107493 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1764 15:22:01.111898 tftpboot 192.168.201.1 11088597/tftp-deploy-_mzgl43y/kernel/bzIploy-_mzgl43y/kernel/cmdline 11088597/tftp-deploy-_mzgl43y/ramdisk/ramdisk.cpio.gz
1765 15:22:01.112433
1766 15:22:01.112827 Waiting for link
1767 15:22:01.313724
1768 15:22:01.314231 done.
1769 15:22:01.314565
1770 15:22:01.314874 MAC: 00:e0:4c:75:0d:b4
1771 15:22:01.315170
1772 15:22:01.317240 Sending DHCP discover... done.
1773 15:22:01.317656
1774 15:22:01.320450 Waiting for reply... done.
1775 15:22:01.320906
1776 15:22:01.325135 Sending DHCP request... done.
1777 15:22:01.325552
1778 15:22:01.330887 Waiting for reply... done.
1779 15:22:01.331400
1780 15:22:01.331732 My ip is 192.168.201.20
1781 15:22:01.332039
1782 15:22:01.333721 The DHCP server ip is 192.168.201.1
1783 15:22:01.337032
1784 15:22:01.340218 TFTP server IP predefined by user: 192.168.201.1
1785 15:22:01.340638
1786 15:22:01.347116 Bootfile predefined by user: 11088597/tftp-deploy-_mzgl43y/kernel/bzImage
1787 15:22:01.347634
1788 15:22:01.350420 Sending tftp read request... done.
1789 15:22:01.350925
1790 15:22:01.359361 Waiting for the transfer...
1791 15:22:01.359780
1792 15:22:01.654676 00000000 ################################################################
1793 15:22:01.654809
1794 15:22:01.923218 00080000 ################################################################
1795 15:22:01.923375
1796 15:22:02.209527 00100000 ################################################################
1797 15:22:02.209652
1798 15:22:02.485565 00180000 ################################################################
1799 15:22:02.485695
1800 15:22:02.755003 00200000 ################################################################
1801 15:22:02.755159
1802 15:22:03.022842 00280000 ################################################################
1803 15:22:03.022995
1804 15:22:03.297466 00300000 ################################################################
1805 15:22:03.297631
1806 15:22:03.574002 00380000 ################################################################
1807 15:22:03.574164
1808 15:22:03.852573 00400000 ################################################################
1809 15:22:03.852774
1810 15:22:04.128993 00480000 ################################################################
1811 15:22:04.129130
1812 15:22:04.408200 00500000 ################################################################
1813 15:22:04.408334
1814 15:22:04.687112 00580000 ################################################################
1815 15:22:04.687238
1816 15:22:04.944875 00600000 ################################################################
1817 15:22:04.945008
1818 15:22:05.202997 00680000 ################################################################
1819 15:22:05.203124
1820 15:22:05.460865 00700000 ################################################################
1821 15:22:05.460991
1822 15:22:05.734167 00780000 ################################################################
1823 15:22:05.734294
1824 15:22:06.013451 00800000 ################################################################
1825 15:22:06.013610
1826 15:22:06.276486 00880000 ################################################################
1827 15:22:06.276611
1828 15:22:06.536158 00900000 ################################################################
1829 15:22:06.536316
1830 15:22:06.814207 00980000 ################################################################
1831 15:22:06.814339
1832 15:22:06.999405 00a00000 ############################################### done.
1833 15:22:06.999538
1834 15:22:07.002431 The bootfile was 10863104 bytes long.
1835 15:22:07.002519
1836 15:22:07.005877 Sending tftp read request... done.
1837 15:22:07.005967
1838 15:22:07.009300 Waiting for the transfer...
1839 15:22:07.009453
1840 15:22:07.309413 00000000 ################################################################
1841 15:22:07.309549
1842 15:22:07.589464 00080000 ################################################################
1843 15:22:07.589598
1844 15:22:07.881920 00100000 ################################################################
1845 15:22:07.882054
1846 15:22:08.175347 00180000 ################################################################
1847 15:22:08.175480
1848 15:22:08.445398 00200000 ################################################################
1849 15:22:08.445532
1850 15:22:08.716827 00280000 ################################################################
1851 15:22:08.716963
1852 15:22:09.003266 00300000 ################################################################
1853 15:22:09.003398
1854 15:22:09.270624 00380000 ################################################################
1855 15:22:09.270751
1856 15:22:09.531963 00400000 ################################################################
1857 15:22:09.532102
1858 15:22:09.803305 00480000 ################################################################
1859 15:22:09.803436
1860 15:22:10.072087 00500000 ################################################################
1861 15:22:10.072219
1862 15:22:10.348538 00580000 ################################################################
1863 15:22:10.348692
1864 15:22:10.623609 00600000 ################################################################
1865 15:22:10.623743
1866 15:22:10.887785 00680000 ################################################################
1867 15:22:10.887921
1868 15:22:11.159052 00700000 ################################################################
1869 15:22:11.159247
1870 15:22:11.441120 00780000 ################################################################
1871 15:22:11.441257
1872 15:22:11.728624 00800000 ################################################################
1873 15:22:11.728798
1874 15:22:11.879454 00880000 ##################################### done.
1875 15:22:11.879604
1876 15:22:11.882543 Sending tftp read request... done.
1877 15:22:11.882654
1878 15:22:11.885977 Waiting for the transfer...
1879 15:22:11.886081
1880 15:22:11.889329 00000000 # done.
1881 15:22:11.889424
1882 15:22:11.896286 Command line loaded dynamically from TFTP file: 11088597/tftp-deploy-_mzgl43y/kernel/cmdline
1883 15:22:11.899260
1884 15:22:11.909319 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1885 15:22:11.909459
1886 15:22:11.915537 ec_init: CrosEC protocol v3 supported (256, 256)
1887 15:22:11.922142
1888 15:22:11.925763 Shutting down all USB controllers.
1889 15:22:11.925845
1890 15:22:11.925910 Removing current net device
1891 15:22:11.925971
1892 15:22:11.929171 Finalizing coreboot
1893 15:22:11.929253
1894 15:22:11.935705 Exiting depthcharge with code 4 at timestamp: 19177827
1895 15:22:11.935786
1896 15:22:11.935878
1897 15:22:11.935943 Starting kernel ...
1898 15:22:11.936002
1899 15:22:11.936060
1900 15:22:11.936581 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
1901 15:22:11.936775 start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
1902 15:22:11.936864 Setting prompt string to ['Linux version [0-9]']
1903 15:22:11.936938 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1904 15:22:11.937008 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1906 15:26:45.937724 end: 2.2.5 auto-login-action (duration 00:04:34) [common]
1908 15:26:45.938836 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
1910 15:26:45.939695 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1913 15:26:45.941195 end: 2 depthcharge-action (duration 00:05:00) [common]
1915 15:26:45.942018 Cleaning after the job
1916 15:26:45.942110 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11088597/tftp-deploy-_mzgl43y/ramdisk
1917 15:26:45.943519 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11088597/tftp-deploy-_mzgl43y/kernel
1918 15:26:45.945163 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11088597/tftp-deploy-_mzgl43y/modules
1919 15:26:45.945747 start: 5.1 power-off (timeout 00:00:30) [common]
1920 15:26:45.945904 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=off'
1921 15:26:46.017667 >> Command sent successfully.
1922 15:26:46.021751 Returned 0 in 0 seconds
1923 15:26:46.122810 end: 5.1 power-off (duration 00:00:00) [common]
1925 15:26:46.124422 start: 5.2 read-feedback (timeout 00:10:00) [common]
1926 15:26:46.125781 Listened to connection for namespace 'common' for up to 1s
1928 15:26:46.127103 Listened to connection for namespace 'common' for up to 1s
1929 15:26:47.126379 Finalising connection for namespace 'common'
1930 15:26:47.127045 Disconnecting from shell: Finalise
1931 15:26:47.127447
1932 15:26:47.228527 end: 5.2 read-feedback (duration 00:00:01) [common]
1933 15:26:47.229213 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11088597
1934 15:26:47.283208 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11088597
1935 15:26:47.283401 JobError: Your job cannot terminate cleanly.