Boot log: acer-cbv514-1h-34uz-brya
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 15:21:32.998926 lava-dispatcher, installed at version: 2023.05.1
2 15:21:32.999090 start: 0 validate
3 15:21:32.999196 Start time: 2023-07-14 15:21:32.999189+00:00 (UTC)
4 15:21:32.999298 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:21:32.999401 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 15:21:33.271776 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:21:33.272421 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.288-cip101%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:21:33.542510 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:21:33.543164 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.288-cip101%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 15:21:37.595776 validate duration: 4.60
12 15:21:37.596037 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:21:37.596123 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:21:37.596199 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:21:37.596306 Not decompressing ramdisk as can be used compressed.
16 15:21:37.596378 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 15:21:37.596433 saving as /var/lib/lava/dispatcher/tmp/11088583/tftp-deploy-v1iatjrd/ramdisk/rootfs.cpio.gz
18 15:21:37.596482 total size: 8418130 (8MB)
19 15:21:38.255777 progress 0% (0MB)
20 15:21:38.261235 progress 5% (0MB)
21 15:21:38.262784 progress 10% (0MB)
22 15:21:38.264282 progress 15% (1MB)
23 15:21:38.265772 progress 20% (1MB)
24 15:21:38.267289 progress 25% (2MB)
25 15:21:38.268790 progress 30% (2MB)
26 15:21:38.270216 progress 35% (2MB)
27 15:21:38.271778 progress 40% (3MB)
28 15:21:38.273272 progress 45% (3MB)
29 15:21:38.274844 progress 50% (4MB)
30 15:21:38.276338 progress 55% (4MB)
31 15:21:38.277803 progress 60% (4MB)
32 15:21:38.279187 progress 65% (5MB)
33 15:21:38.280654 progress 70% (5MB)
34 15:21:38.282139 progress 75% (6MB)
35 15:21:38.283595 progress 80% (6MB)
36 15:21:38.285049 progress 85% (6MB)
37 15:21:38.286527 progress 90% (7MB)
38 15:21:38.287985 progress 95% (7MB)
39 15:21:38.289351 progress 100% (8MB)
40 15:21:38.289513 8MB downloaded in 0.69s (11.58MB/s)
41 15:21:38.289637 end: 1.1.1 http-download (duration 00:00:01) [common]
43 15:21:38.289827 end: 1.1 download-retry (duration 00:00:01) [common]
44 15:21:38.289899 start: 1.2 download-retry (timeout 00:09:59) [common]
45 15:21:38.289989 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 15:21:38.290097 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.288-cip101/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 15:21:38.290152 saving as /var/lib/lava/dispatcher/tmp/11088583/tftp-deploy-v1iatjrd/kernel/bzImage
48 15:21:38.290202 total size: 10863104 (10MB)
49 15:21:38.290246 No compression specified
50 15:21:38.291278 progress 0% (0MB)
51 15:21:38.293232 progress 5% (0MB)
52 15:21:38.295222 progress 10% (1MB)
53 15:21:38.297073 progress 15% (1MB)
54 15:21:38.299052 progress 20% (2MB)
55 15:21:38.300897 progress 25% (2MB)
56 15:21:38.302851 progress 30% (3MB)
57 15:21:38.304796 progress 35% (3MB)
58 15:21:38.306650 progress 40% (4MB)
59 15:21:38.308585 progress 45% (4MB)
60 15:21:38.310428 progress 50% (5MB)
61 15:21:38.312367 progress 55% (5MB)
62 15:21:38.314225 progress 60% (6MB)
63 15:21:38.316139 progress 65% (6MB)
64 15:21:38.318063 progress 70% (7MB)
65 15:21:38.319869 progress 75% (7MB)
66 15:21:38.321775 progress 80% (8MB)
67 15:21:38.323570 progress 85% (8MB)
68 15:21:38.325468 progress 90% (9MB)
69 15:21:38.327265 progress 95% (9MB)
70 15:21:38.329181 progress 100% (10MB)
71 15:21:38.329303 10MB downloaded in 0.04s (264.98MB/s)
72 15:21:38.329416 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:21:38.329601 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:21:38.329668 start: 1.3 download-retry (timeout 00:09:59) [common]
76 15:21:38.329728 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 15:21:38.329834 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.288-cip101/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 15:21:38.329896 saving as /var/lib/lava/dispatcher/tmp/11088583/tftp-deploy-v1iatjrd/modules/modules.tar
79 15:21:38.329944 total size: 484432 (0MB)
80 15:21:38.329988 Using unxz to decompress xz
81 15:21:38.333115 progress 6% (0MB)
82 15:21:38.333411 progress 13% (0MB)
83 15:21:38.333605 progress 20% (0MB)
84 15:21:38.334953 progress 27% (0MB)
85 15:21:38.336723 progress 33% (0MB)
86 15:21:38.338385 progress 40% (0MB)
87 15:21:38.340335 progress 47% (0MB)
88 15:21:38.341887 progress 54% (0MB)
89 15:21:38.343719 progress 60% (0MB)
90 15:21:38.345565 progress 67% (0MB)
91 15:21:38.347284 progress 74% (0MB)
92 15:21:38.348741 progress 81% (0MB)
93 15:21:38.350731 progress 87% (0MB)
94 15:21:38.352688 progress 94% (0MB)
95 15:21:38.354754 progress 100% (0MB)
96 15:21:38.359825 0MB downloaded in 0.03s (15.47MB/s)
97 15:21:38.360064 end: 1.3.1 http-download (duration 00:00:00) [common]
99 15:21:38.360292 end: 1.3 download-retry (duration 00:00:00) [common]
100 15:21:38.360376 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 15:21:38.360451 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 15:21:38.360517 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 15:21:38.360591 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 15:21:38.360785 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3
105 15:21:38.360897 makedir: /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin
106 15:21:38.360982 makedir: /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/tests
107 15:21:38.361062 makedir: /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/results
108 15:21:38.361150 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-add-keys
109 15:21:38.361261 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-add-sources
110 15:21:38.361357 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-background-process-start
111 15:21:38.361451 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-background-process-stop
112 15:21:38.361547 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-common-functions
113 15:21:38.361634 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-echo-ipv4
114 15:21:38.361723 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-install-packages
115 15:21:38.361809 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-installed-packages
116 15:21:38.361904 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-os-build
117 15:21:38.362004 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-probe-channel
118 15:21:38.362092 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-probe-ip
119 15:21:38.362179 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-target-ip
120 15:21:38.362266 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-target-mac
121 15:21:38.362361 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-target-storage
122 15:21:38.362448 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-test-case
123 15:21:38.362533 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-test-event
124 15:21:38.362619 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-test-feedback
125 15:21:38.362704 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-test-raise
126 15:21:38.362794 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-test-reference
127 15:21:38.362880 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-test-runner
128 15:21:38.362966 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-test-set
129 15:21:38.363053 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-test-shell
130 15:21:38.363141 Updating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-install-packages (oe)
131 15:21:38.363255 Updating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/bin/lava-installed-packages (oe)
132 15:21:38.363350 Creating /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/environment
133 15:21:38.363427 LAVA metadata
134 15:21:38.363484 - LAVA_JOB_ID=11088583
135 15:21:38.363537 - LAVA_DISPATCHER_IP=192.168.201.1
136 15:21:38.363615 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 15:21:38.363670 skipped lava-vland-overlay
138 15:21:38.363727 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 15:21:38.363791 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 15:21:38.363839 skipped lava-multinode-overlay
141 15:21:38.363894 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 15:21:38.363954 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 15:21:38.364014 Loading test definitions
144 15:21:38.364086 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 15:21:38.364143 Using /lava-11088583 at stage 0
146 15:21:38.364362 uuid=11088583_1.4.2.3.1 testdef=None
147 15:21:38.364429 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 15:21:38.364493 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 15:21:38.364897 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 15:21:38.365087 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 15:21:38.365566 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 15:21:38.365756 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 15:21:38.366240 runner path: /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/0/tests/0_dmesg test_uuid 11088583_1.4.2.3.1
156 15:21:38.366364 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 15:21:38.366540 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 15:21:38.366593 Using /lava-11088583 at stage 1
160 15:21:38.366804 uuid=11088583_1.4.2.3.5 testdef=None
161 15:21:38.366874 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 15:21:38.366939 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 15:21:38.367283 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 15:21:38.367462 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 15:21:38.367941 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 15:21:38.368127 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 15:21:38.368601 runner path: /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/1/tests/1_bootrr test_uuid 11088583_1.4.2.3.5
170 15:21:38.368713 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 15:21:38.368887 Creating lava-test-runner.conf files
173 15:21:38.368934 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/0 for stage 0
174 15:21:38.368997 - 0_dmesg
175 15:21:38.369059 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11088583/lava-overlay-8cijtpk3/lava-11088583/1 for stage 1
176 15:21:38.369125 - 1_bootrr
177 15:21:38.369212 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 15:21:38.369280 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 15:21:38.375860 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 15:21:38.375960 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 15:21:38.376030 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 15:21:38.376095 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 15:21:38.376158 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 15:21:38.537585 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 15:21:38.537844 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 15:21:38.537971 extracting modules file /var/lib/lava/dispatcher/tmp/11088583/tftp-deploy-v1iatjrd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11088583/extract-overlay-ramdisk-nhtr7h1x/ramdisk
187 15:21:38.550897 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 15:21:38.551017 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 15:21:38.551092 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11088583/compress-overlay-xhan6jw3/overlay-1.4.2.4.tar.gz to ramdisk
190 15:21:38.551160 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11088583/compress-overlay-xhan6jw3/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11088583/extract-overlay-ramdisk-nhtr7h1x/ramdisk
191 15:21:38.556881 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 15:21:38.556978 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 15:21:38.557053 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 15:21:38.557121 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 15:21:38.557184 Building ramdisk /var/lib/lava/dispatcher/tmp/11088583/extract-overlay-ramdisk-nhtr7h1x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11088583/extract-overlay-ramdisk-nhtr7h1x/ramdisk
196 15:21:38.619852 >> 53980 blocks
197 15:21:39.394062 rename /var/lib/lava/dispatcher/tmp/11088583/extract-overlay-ramdisk-nhtr7h1x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11088583/tftp-deploy-v1iatjrd/ramdisk/ramdisk.cpio.gz
198 15:21:39.394378 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 15:21:39.394492 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 15:21:39.394585 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 15:21:39.394668 No mkimage arch provided, not using FIT.
202 15:21:39.394741 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 15:21:39.394812 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 15:21:39.394894 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 15:21:39.394968 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 15:21:39.395035 No LXC device requested
207 15:21:39.395105 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 15:21:39.395176 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 15:21:39.395243 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 15:21:39.395303 Checking files for TFTP limit of 4294967296 bytes.
211 15:21:39.395636 end: 1 tftp-deploy (duration 00:00:02) [common]
212 15:21:39.395711 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 15:21:39.395778 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 15:21:39.395867 substitutions:
215 15:21:39.395918 - {DTB}: None
216 15:21:39.395968 - {INITRD}: 11088583/tftp-deploy-v1iatjrd/ramdisk/ramdisk.cpio.gz
217 15:21:39.396012 - {KERNEL}: 11088583/tftp-deploy-v1iatjrd/kernel/bzImage
218 15:21:39.396057 - {LAVA_MAC}: None
219 15:21:39.396101 - {PRESEED_CONFIG}: None
220 15:21:39.396151 - {PRESEED_LOCAL}: None
221 15:21:39.396195 - {RAMDISK}: 11088583/tftp-deploy-v1iatjrd/ramdisk/ramdisk.cpio.gz
222 15:21:39.396241 - {ROOT_PART}: None
223 15:21:39.396286 - {ROOT}: None
224 15:21:39.396330 - {SERVER_IP}: 192.168.201.1
225 15:21:39.396374 - {TEE}: None
226 15:21:39.396418 Parsed boot commands:
227 15:21:39.396461 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 15:21:39.396595 Parsed boot commands: tftpboot 192.168.201.1 11088583/tftp-deploy-v1iatjrd/kernel/bzImage 11088583/tftp-deploy-v1iatjrd/kernel/cmdline 11088583/tftp-deploy-v1iatjrd/ramdisk/ramdisk.cpio.gz
229 15:21:39.396665 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 15:21:39.396730 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 15:21:39.396796 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 15:21:39.396862 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 15:21:39.396915 Not connected, no need to disconnect.
234 15:21:39.396971 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 15:21:39.397031 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 15:21:39.397083 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cbv514-1h-34uz-brya-cbg-2'
237 15:21:39.399591 Setting prompt string to ['lava-test: # ']
238 15:21:39.399827 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 15:21:39.399919 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 15:21:39.399998 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 15:21:39.400070 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 15:21:39.400224 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-2' '--port=1' '--command=reboot'
243 15:21:44.544446 >> Command sent successfully.
244 15:21:44.550770 Returned 0 in 5 seconds
245 15:21:44.651436 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 15:21:44.652601 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 15:21:44.652988 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 15:21:44.653310 Setting prompt string to 'Starting depthcharge on Volmar...'
250 15:21:44.653558 Changing prompt to 'Starting depthcharge on Volmar...'
251 15:21:44.653819 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
252 15:21:44.654456 [Enter `^Ec?' for help]
253 15:21:46.023969
254 15:21:46.024491
255 15:21:46.031675 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
256 15:21:46.035512 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
257 15:21:46.039227 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
258 15:21:46.047093 CPU: AES supported, TXT NOT supported, VT supported
259 15:21:46.053634 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
260 15:21:46.057054 Cache size = 10 MiB
261 15:21:46.060260 MCH: device id 4609 (rev 04) is Alderlake-P
262 15:21:46.063600 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
263 15:21:46.069919 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
264 15:21:46.073519 VBOOT: Loading verstage.
265 15:21:46.077721 FMAP: Found "FLASH" version 1.1 at 0x1804000.
266 15:21:46.080790 FMAP: base = 0x0 size = 0x2000000 #areas = 37
267 15:21:46.087739 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 15:21:46.094688 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
269 15:21:46.101973 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
270 15:21:46.105482
271 15:21:46.106027
272 15:21:46.111889 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
273 15:21:46.119368 Probing TPM I2C: I2C bus 1 version 0x3230302a
274 15:21:46.121710 DW I2C bus 1 at 0xfe022000 (400 KHz)
275 15:21:46.125243 I2C TX abort detected (00000001)
276 15:21:46.128680 cr50_i2c_read: Address write failed
277 15:21:46.141004 .done! DID_VID 0x00281ae0
278 15:21:46.144496 TPM ready after 0 ms
279 15:21:46.148135 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
280 15:21:46.158162 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
281 15:21:46.165464 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
282 15:21:46.204023 tlcl_send_startup: Startup return code is 0
283 15:21:46.204563 TPM: setup succeeded
284 15:21:46.226829 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
285 15:21:46.246814 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
286 15:21:46.250960 Chrome EC: UHEPI supported
287 15:21:46.254164 Reading cr50 boot mode
288 15:21:46.269057 Cr50 says boot_mode is VERIFIED_RW(0x00).
289 15:21:46.269572 Phase 1
290 15:21:46.275631 FMAP: area GBB found @ 1805000 (458752 bytes)
291 15:21:46.282379 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 15:21:46.288944 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 15:21:46.295346 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
294 15:21:46.302064 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
295 15:21:46.305262 Recovery requested (1009000e)
296 15:21:46.311848 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
297 15:21:46.327494 tlcl_extend: response is 0
298 15:21:46.334159 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
299 15:21:46.340301 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
300 15:21:46.355105 tlcl_extend: response is 0
301 15:21:46.361933 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
302 15:21:46.365106 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 15:21:46.375409 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
304 15:21:46.378445 BS: verstage times (exec / console): total (unknown) / 151 ms
305 15:21:46.383491
306 15:21:46.383988
307 15:21:46.389657 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
308 15:21:46.396346 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
309 15:21:46.399832 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
310 15:21:46.406511 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
311 15:21:46.409947 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
312 15:21:46.412697 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
313 15:21:46.419694 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
314 15:21:46.420192 TCO_STS: 0000 0000
315 15:21:46.422967 GEN_PMCON: d0015038 00002200
316 15:21:46.426168 GBLRST_CAUSE: 00000000 00000000
317 15:21:46.429831 HPR_CAUSE0: 00000000
318 15:21:46.430370 prev_sleep_state 5
319 15:21:46.436832 Abort disabling TXT, as CPU is not TXT capable.
320 15:21:46.443670 cse_lite: Skip switching to RW in the recovery path
321 15:21:46.446762 Boot Count incremented to 1097
322 15:21:46.450472 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
323 15:21:46.460334 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 15:21:46.466940 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 15:21:46.473487 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
326 15:21:46.476728 Chrome EC: UHEPI supported
327 15:21:46.483670 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
328 15:21:46.497544 Probing TPM I2C: done! DID_VID 0x00281ae0
329 15:21:46.500445 Locality already claimed
330 15:21:46.503871 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
331 15:21:46.524374 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
332 15:21:46.530989 MRC: Hash idx 0x100b comparison successful.
333 15:21:46.534496 MRC cache found, size f6c8
334 15:21:46.535049 bootmode is set to: 2
335 15:21:46.538447 EC returned error result code 3
336 15:21:46.541941 FW_CONFIG value from CBI is 0x131
337 15:21:46.548412 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
338 15:21:46.551634 SPD index = 0
339 15:21:46.558561 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
340 15:21:46.561724 SPD: module type is LPDDR4X
341 15:21:46.564962 SPD: module part number is K4U6E3S4AB-MGCL
342 15:21:46.571780 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
343 15:21:46.575141 SPD: device width 16 bits, bus width 16 bits
344 15:21:46.578369 SPD: module size is 1024 MB (per channel)
345 15:21:46.673540 CBMEM:
346 15:21:46.676489 IMD: root @ 0x76fff000 254 entries.
347 15:21:46.679763 IMD: root @ 0x76ffec00 62 entries.
348 15:21:46.686569 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
349 15:21:46.689963 RO_VPD is uninitialized or empty.
350 15:21:46.693715 FMAP: area RW_VPD found @ f29000 (8192 bytes)
351 15:21:46.697933 RW_VPD is uninitialized or empty.
352 15:21:46.701109 External stage cache:
353 15:21:46.704728 IMD: root @ 0x7bbff000 254 entries.
354 15:21:46.707721 IMD: root @ 0x7bbfec00 62 entries.
355 15:21:46.714879 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 15:21:46.721268 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
357 15:21:46.727845 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
358 15:21:46.731153 MRC: 'RECOVERY_MRC_CACHE' does not need update.
359 15:21:46.734462 8 DIMMs found
360 15:21:46.734964 SMM Memory Map
361 15:21:46.737959 SMRAM : 0x7b800000 0x800000
362 15:21:46.740986 Subregion 0: 0x7b800000 0x200000
363 15:21:46.744818 Subregion 1: 0x7ba00000 0x200000
364 15:21:46.747532 Subregion 2: 0x7bc00000 0x400000
365 15:21:46.751208 top_of_ram = 0x77000000
366 15:21:46.757823 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
367 15:21:46.761146 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
368 15:21:46.767989 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
369 15:21:46.774550 MTRR Range: Start=ff000000 End=0 (Size 1000000)
370 15:21:46.775051 Normal boot
371 15:21:46.780924 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
372 15:21:46.792589 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
373 15:21:46.798281 Processing 237 relocs. Offset value of 0x74aba000
374 15:21:46.805399 BS: romstage times (exec / console): total (unknown) / 283 ms
375 15:21:46.812685
376 15:21:46.813352
377 15:21:46.820056 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
378 15:21:46.820603 Normal boot
379 15:21:46.825840 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 15:21:46.832588 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 15:21:46.839329 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 15:21:46.849199 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
383 15:21:46.897549 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
384 15:21:46.903757 Processing 5931 relocs. Offset value of 0x72a30000
385 15:21:46.907059 BS: postcar times (exec / console): total (unknown) / 51 ms
386 15:21:46.910249
387 15:21:46.910638
388 15:21:46.917210 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
389 15:21:46.920927 Reserving BERT start 76a1f000, size 10000
390 15:21:46.923760 Normal boot
391 15:21:46.926955 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
392 15:21:46.933801 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
393 15:21:46.943620 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
394 15:21:46.946795 FMAP: area RW_VPD found @ f29000 (8192 bytes)
395 15:21:46.950380 Google Chrome EC: version:
396 15:21:46.954079 ro: volmar_v2.0.14126-e605144e9c
397 15:21:46.956936 rw: volmar_v2.0.14126-e605144e9c
398 15:21:46.960256 running image: 2
399 15:21:46.963613 ACPI _SWS is PM1 Index 8 GPE Index -1
400 15:21:46.970504 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
401 15:21:46.973561 EC returned error result code 3
402 15:21:46.977044 FW_CONFIG value from CBI is 0x131
403 15:21:46.980375 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
404 15:21:46.987411 PCI: 00:1c.2 disabled by fw_config
405 15:21:46.990338 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
406 15:21:46.997158 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
407 15:21:47.000474 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
408 15:21:47.007102 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
409 15:21:47.010034 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
410 15:21:47.020050 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
411 15:21:47.023478 microcode: sig=0x906a4 pf=0x80 revision=0x423
412 15:21:47.026667 microcode: Update skipped, already up-to-date
413 15:21:47.033375 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
414 15:21:47.065327 Detected 6 core, 8 thread CPU.
415 15:21:47.068639 Setting up SMI for CPU
416 15:21:47.072249 IED base = 0x7bc00000
417 15:21:47.072766 IED size = 0x00400000
418 15:21:47.075957 Will perform SMM setup.
419 15:21:47.079078 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
420 15:21:47.082529 LAPIC 0x0 in XAPIC mode.
421 15:21:47.092506 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
422 15:21:47.095689 Processing 18 relocs. Offset value of 0x00030000
423 15:21:47.099964 Attempting to start 7 APs
424 15:21:47.103152 Waiting for 10ms after sending INIT.
425 15:21:47.116084 Waiting for SIPI to complete...
426 15:21:47.119351 LAPIC 0x1 in XAPIC mode.
427 15:21:47.122973 LAPIC 0x14 in XAPIC mode.
428 15:21:47.126298 LAPIC 0x8 in XAPIC mode.
429 15:21:47.129262 LAPIC 0x10 in XAPIC mode.
430 15:21:47.132553 AP: slot 4 apic_id 14, MCU rev: 0x00000423
431 15:21:47.135714 LAPIC 0x12 in XAPIC mode.
432 15:21:47.136107 LAPIC 0x16 in XAPIC mode.
433 15:21:47.142814 AP: slot 3 apic_id 12, MCU rev: 0x00000423
434 15:21:47.145982 AP: slot 1 apic_id 16, MCU rev: 0x00000423
435 15:21:47.149250 AP: slot 2 apic_id 10, MCU rev: 0x00000423
436 15:21:47.152593 LAPIC 0x9 in XAPIC mode.
437 15:21:47.155947 AP: slot 7 apic_id 8, MCU rev: 0x00000423
438 15:21:47.159287 done.
439 15:21:47.162596 AP: slot 6 apic_id 1, MCU rev: 0x00000423
440 15:21:47.166067 AP: slot 5 apic_id 9, MCU rev: 0x00000423
441 15:21:47.169375 Waiting for SIPI to complete...
442 15:21:47.169867 done.
443 15:21:47.172615 smm_setup_relocation_handler: enter
444 15:21:47.176157 smm_setup_relocation_handler: exit
445 15:21:47.185934 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
446 15:21:47.189482 Processing 11 relocs. Offset value of 0x00038000
447 15:21:47.196141 smm_module_setup_stub: stack_top = 0x7b804000
448 15:21:47.199376 smm_module_setup_stub: per cpu stack_size = 0x800
449 15:21:47.205976 smm_module_setup_stub: runtime.start32_offset = 0x4c
450 15:21:47.208924 smm_module_setup_stub: runtime.smm_size = 0x10000
451 15:21:47.215897 SMM Module: stub loaded at 38000. Will call 0x76a53094
452 15:21:47.219078 Installing permanent SMM handler to 0x7b800000
453 15:21:47.225945 smm_load_module: total_smm_space_needed e468, available -> 200000
454 15:21:47.235436 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
455 15:21:47.238811 Processing 255 relocs. Offset value of 0x7b9f6000
456 15:21:47.245722 smm_load_module: smram_start: 0x7b800000
457 15:21:47.248848 smm_load_module: smram_end: 7ba00000
458 15:21:47.252349 smm_load_module: handler start 0x7b9f6d5f
459 15:21:47.255558 smm_load_module: handler_size 98d0
460 15:21:47.259071 smm_load_module: fxsave_area 0x7b9ff000
461 15:21:47.262201 smm_load_module: fxsave_size 1000
462 15:21:47.265612 smm_load_module: CONFIG_MSEG_SIZE 0x0
463 15:21:47.272834 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
464 15:21:47.276917 smm_load_module: handler_mod_params.smbase = 0x7b800000
465 15:21:47.283799 smm_load_module: per_cpu_save_state_size = 0x400
466 15:21:47.287238 smm_load_module: num_cpus = 0x8
467 15:21:47.290568 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
468 15:21:47.297371 smm_load_module: total_save_state_size = 0x2000
469 15:21:47.300479 smm_load_module: cpu0 entry: 7b9e6000
470 15:21:47.303924 smm_create_map: cpus allowed in one segment 30
471 15:21:47.310542 smm_create_map: min # of segments needed 1
472 15:21:47.311048 CPU 0x0
473 15:21:47.313837 smbase 7b9e6000 entry 7b9ee000
474 15:21:47.317501 ss_start 7b9f5c00 code_end 7b9ee208
475 15:21:47.320777 CPU 0x1
476 15:21:47.323874 smbase 7b9e5c00 entry 7b9edc00
477 15:21:47.327572 ss_start 7b9f5800 code_end 7b9ede08
478 15:21:47.328078 CPU 0x2
479 15:21:47.333853 smbase 7b9e5800 entry 7b9ed800
480 15:21:47.336918 ss_start 7b9f5400 code_end 7b9eda08
481 15:21:47.337317 CPU 0x3
482 15:21:47.340529 smbase 7b9e5400 entry 7b9ed400
483 15:21:47.347412 ss_start 7b9f5000 code_end 7b9ed608
484 15:21:47.347906 CPU 0x4
485 15:21:47.350367 smbase 7b9e5000 entry 7b9ed000
486 15:21:47.357263 ss_start 7b9f4c00 code_end 7b9ed208
487 15:21:47.357928 CPU 0x5
488 15:21:47.360415 smbase 7b9e4c00 entry 7b9ecc00
489 15:21:47.363893 ss_start 7b9f4800 code_end 7b9ece08
490 15:21:47.367045 CPU 0x6
491 15:21:47.370327 smbase 7b9e4800 entry 7b9ec800
492 15:21:47.374034 ss_start 7b9f4400 code_end 7b9eca08
493 15:21:47.374527 CPU 0x7
494 15:21:47.380197 smbase 7b9e4400 entry 7b9ec400
495 15:21:47.383546 ss_start 7b9f4000 code_end 7b9ec608
496 15:21:47.390608 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
497 15:21:47.397088 Processing 11 relocs. Offset value of 0x7b9ee000
498 15:21:47.403710 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
499 15:21:47.407633 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
500 15:21:47.413520 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
501 15:21:47.420207 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
502 15:21:47.427334 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
503 15:21:47.433715 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
504 15:21:47.440297 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
505 15:21:47.446882 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
506 15:21:47.453406 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
507 15:21:47.459988 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
508 15:21:47.466663 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
509 15:21:47.469777 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
510 15:21:47.476828 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
511 15:21:47.483388 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
512 15:21:47.490625 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
513 15:21:47.493969 smm_module_setup_stub: stack_top = 0x7b804000
514 15:21:47.500515 smm_module_setup_stub: per cpu stack_size = 0x800
515 15:21:47.503830 smm_module_setup_stub: runtime.start32_offset = 0x4c
516 15:21:47.510657 smm_module_setup_stub: runtime.smm_size = 0x200000
517 15:21:47.516864 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
518 15:21:47.520609 Clearing SMI status registers
519 15:21:47.523900 SMI_STS: PM1
520 15:21:47.524401 PM1_STS: PWRBTN
521 15:21:47.530686 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
522 15:21:47.533706 In relocation handler: CPU 0
523 15:21:47.536918 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
524 15:21:47.544030 Writing SMRR. base = 0x7b800006, mask=0xff800c00
525 15:21:47.547590 Relocation complete.
526 15:21:47.553952 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
527 15:21:47.557405 In relocation handler: CPU 6
528 15:21:47.560645 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
529 15:21:47.561143 Relocation complete.
530 15:21:47.570601 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
531 15:21:47.574197 In relocation handler: CPU 3
532 15:21:47.577478 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
533 15:21:47.580682 Writing SMRR. base = 0x7b800006, mask=0xff800c00
534 15:21:47.583985 Relocation complete.
535 15:21:47.590438 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
536 15:21:47.593955 In relocation handler: CPU 1
537 15:21:47.597199 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
538 15:21:47.603904 Writing SMRR. base = 0x7b800006, mask=0xff800c00
539 15:21:47.604406 Relocation complete.
540 15:21:47.610628 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
541 15:21:47.613656 In relocation handler: CPU 4
542 15:21:47.617107 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
543 15:21:47.624443 Writing SMRR. base = 0x7b800006, mask=0xff800c00
544 15:21:47.627327 Relocation complete.
545 15:21:47.633794 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
546 15:21:47.637117 In relocation handler: CPU 2
547 15:21:47.640650 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
548 15:21:47.644193 Writing SMRR. base = 0x7b800006, mask=0xff800c00
549 15:21:47.647317 Relocation complete.
550 15:21:47.653814 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
551 15:21:47.657318 In relocation handler: CPU 7
552 15:21:47.660541 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
553 15:21:47.667216 Writing SMRR. base = 0x7b800006, mask=0xff800c00
554 15:21:47.667727 Relocation complete.
555 15:21:47.677049 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
556 15:21:47.677563 In relocation handler: CPU 5
557 15:21:47.683472 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
558 15:21:47.683865 Relocation complete.
559 15:21:47.687108 Initializing CPU #0
560 15:21:47.690289 CPU: vendor Intel device 906a4
561 15:21:47.693555 CPU: family 06, model 9a, stepping 04
562 15:21:47.697185 Clearing out pending MCEs
563 15:21:47.700662 cpu: energy policy set to 7
564 15:21:47.703778 Turbo is available but hidden
565 15:21:47.706992 Turbo is available and visible
566 15:21:47.710681 microcode: Update skipped, already up-to-date
567 15:21:47.711189 CPU #0 initialized
568 15:21:47.713600 Initializing CPU #6
569 15:21:47.717151 Initializing CPU #4
570 15:21:47.717702 Initializing CPU #3
571 15:21:47.720343 Initializing CPU #7
572 15:21:47.723752 CPU: vendor Intel device 906a4
573 15:21:47.726894 CPU: family 06, model 9a, stepping 04
574 15:21:47.730285 Initializing CPU #1
575 15:21:47.733572 CPU: vendor Intel device 906a4
576 15:21:47.737186 CPU: family 06, model 9a, stepping 04
577 15:21:47.737756 Initializing CPU #2
578 15:21:47.740189 Clearing out pending MCEs
579 15:21:47.743544 CPU: vendor Intel device 906a4
580 15:21:47.747137 CPU: family 06, model 9a, stepping 04
581 15:21:47.750233 Initializing CPU #5
582 15:21:47.753509 Clearing out pending MCEs
583 15:21:47.754041 Clearing out pending MCEs
584 15:21:47.756858 CPU: vendor Intel device 906a4
585 15:21:47.763272 CPU: family 06, model 9a, stepping 04
586 15:21:47.763766 cpu: energy policy set to 7
587 15:21:47.766644 cpu: energy policy set to 7
588 15:21:47.769800 cpu: energy policy set to 7
589 15:21:47.773478 Clearing out pending MCEs
590 15:21:47.776737 microcode: Update skipped, already up-to-date
591 15:21:47.780200 CPU #1 initialized
592 15:21:47.783529 microcode: Update skipped, already up-to-date
593 15:21:47.786535 CPU #3 initialized
594 15:21:47.790029 microcode: Update skipped, already up-to-date
595 15:21:47.793407 CPU #4 initialized
596 15:21:47.796962 cpu: energy policy set to 7
597 15:21:47.800618 CPU: vendor Intel device 906a4
598 15:21:47.803096 CPU: family 06, model 9a, stepping 04
599 15:21:47.806649 microcode: Update skipped, already up-to-date
600 15:21:47.809866 CPU #2 initialized
601 15:21:47.810283 Clearing out pending MCEs
602 15:21:47.813120 CPU: vendor Intel device 906a4
603 15:21:47.819960 CPU: family 06, model 9a, stepping 04
604 15:21:47.823127 CPU: vendor Intel device 906a4
605 15:21:47.826488 CPU: family 06, model 9a, stepping 04
606 15:21:47.829802 cpu: energy policy set to 7
607 15:21:47.830339 Clearing out pending MCEs
608 15:21:47.836521 microcode: Update skipped, already up-to-date
609 15:21:47.837020 CPU #5 initialized
610 15:21:47.840036 Clearing out pending MCEs
611 15:21:47.843238 cpu: energy policy set to 7
612 15:21:47.846033 cpu: energy policy set to 7
613 15:21:47.849652 microcode: Update skipped, already up-to-date
614 15:21:47.852943 CPU #6 initialized
615 15:21:47.856747 microcode: Update skipped, already up-to-date
616 15:21:47.859697 CPU #7 initialized
617 15:21:47.862900 bsp_do_flight_plan done after 688 msecs.
618 15:21:47.866237 CPU: frequency set to 4400 MHz
619 15:21:47.866724 Enabling SMIs.
620 15:21:47.873193 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
621 15:21:47.888164 Probing TPM I2C: done! DID_VID 0x00281ae0
622 15:21:47.891379 Locality already claimed
623 15:21:47.894941 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
624 15:21:47.906497 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
625 15:21:47.909324 Enabling GPIO PM b/c CR50 has long IRQ pulse support
626 15:21:47.916314 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
627 15:21:47.922627 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
628 15:21:47.926408 Found a VBT of 9216 bytes after decompression
629 15:21:47.929465 PCI 1.0, PIN A, using IRQ #16
630 15:21:47.933063 PCI 2.0, PIN A, using IRQ #17
631 15:21:47.936100 PCI 4.0, PIN A, using IRQ #18
632 15:21:47.939647 PCI 5.0, PIN A, using IRQ #16
633 15:21:47.944001 PCI 6.0, PIN A, using IRQ #16
634 15:21:47.947843 PCI 6.2, PIN C, using IRQ #18
635 15:21:47.948356 PCI 7.0, PIN A, using IRQ #19
636 15:21:47.950777 PCI 7.1, PIN B, using IRQ #20
637 15:21:47.954324 PCI 7.2, PIN C, using IRQ #21
638 15:21:47.957488 PCI 7.3, PIN D, using IRQ #22
639 15:21:47.961289 PCI 8.0, PIN A, using IRQ #23
640 15:21:47.964520 PCI D.0, PIN A, using IRQ #17
641 15:21:47.967750 PCI D.1, PIN B, using IRQ #19
642 15:21:47.971401 PCI 10.0, PIN A, using IRQ #24
643 15:21:47.974438 PCI 10.1, PIN B, using IRQ #25
644 15:21:47.977620 PCI 10.6, PIN C, using IRQ #20
645 15:21:47.981055 PCI 10.7, PIN D, using IRQ #21
646 15:21:47.984439 PCI 11.0, PIN A, using IRQ #26
647 15:21:47.987731 PCI 11.1, PIN B, using IRQ #27
648 15:21:47.991082 PCI 11.2, PIN C, using IRQ #28
649 15:21:47.994347 PCI 11.3, PIN D, using IRQ #29
650 15:21:47.997424 PCI 12.0, PIN A, using IRQ #30
651 15:21:47.997942 PCI 12.6, PIN B, using IRQ #31
652 15:21:48.001022 PCI 12.7, PIN C, using IRQ #22
653 15:21:48.004479 PCI 13.0, PIN A, using IRQ #32
654 15:21:48.007635 PCI 13.1, PIN B, using IRQ #33
655 15:21:48.010858 PCI 13.2, PIN C, using IRQ #34
656 15:21:48.013797 PCI 13.3, PIN D, using IRQ #35
657 15:21:48.017317 PCI 14.0, PIN B, using IRQ #23
658 15:21:48.021031 PCI 14.1, PIN A, using IRQ #36
659 15:21:48.024131 PCI 14.3, PIN C, using IRQ #17
660 15:21:48.027610 PCI 15.0, PIN A, using IRQ #37
661 15:21:48.030579 PCI 15.1, PIN B, using IRQ #38
662 15:21:48.034071 PCI 15.2, PIN C, using IRQ #39
663 15:21:48.037510 PCI 15.3, PIN D, using IRQ #40
664 15:21:48.041367 PCI 16.0, PIN A, using IRQ #18
665 15:21:48.044744 PCI 16.1, PIN B, using IRQ #19
666 15:21:48.047152 PCI 16.2, PIN C, using IRQ #20
667 15:21:48.050613 PCI 16.3, PIN D, using IRQ #21
668 15:21:48.051007 PCI 16.4, PIN A, using IRQ #18
669 15:21:48.054255 PCI 16.5, PIN B, using IRQ #19
670 15:21:48.057445 PCI 17.0, PIN A, using IRQ #22
671 15:21:48.061116 PCI 19.0, PIN A, using IRQ #41
672 15:21:48.064190 PCI 19.1, PIN B, using IRQ #42
673 15:21:48.067457 PCI 19.2, PIN C, using IRQ #43
674 15:21:48.071013 PCI 1C.0, PIN A, using IRQ #16
675 15:21:48.074026 PCI 1C.1, PIN B, using IRQ #17
676 15:21:48.076895 PCI 1C.2, PIN C, using IRQ #18
677 15:21:48.080362 PCI 1C.3, PIN D, using IRQ #19
678 15:21:48.083811 PCI 1C.4, PIN A, using IRQ #16
679 15:21:48.087259 PCI 1C.5, PIN B, using IRQ #17
680 15:21:48.090647 PCI 1C.6, PIN C, using IRQ #18
681 15:21:48.094546 PCI 1C.7, PIN D, using IRQ #19
682 15:21:48.097158 PCI 1D.0, PIN A, using IRQ #16
683 15:21:48.100761 PCI 1D.1, PIN B, using IRQ #17
684 15:21:48.103796 PCI 1D.2, PIN C, using IRQ #18
685 15:21:48.104201 PCI 1D.3, PIN D, using IRQ #19
686 15:21:48.107206 PCI 1E.0, PIN A, using IRQ #23
687 15:21:48.110399 PCI 1E.1, PIN B, using IRQ #20
688 15:21:48.113752 PCI 1E.2, PIN C, using IRQ #44
689 15:21:48.116985 PCI 1E.3, PIN D, using IRQ #45
690 15:21:48.120253 PCI 1F.3, PIN B, using IRQ #22
691 15:21:48.123542 PCI 1F.4, PIN C, using IRQ #23
692 15:21:48.127145 PCI 1F.6, PIN D, using IRQ #20
693 15:21:48.130044 PCI 1F.7, PIN A, using IRQ #21
694 15:21:48.133277 IRQ: Using dynamically assigned PCI IO-APIC IRQs
695 15:21:48.143784 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
696 15:21:48.309178 FSPS returned 0
697 15:21:48.312139 Executing Phase 1 of FspMultiPhaseSiInit
698 15:21:48.322460 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
699 15:21:48.325593 port C0 DISC req: usage 1 usb3 1 usb2 1
700 15:21:48.328878 Raw Buffer output 0 00000111
701 15:21:48.332263 Raw Buffer output 1 00000000
702 15:21:48.336113 pmc_send_ipc_cmd succeeded
703 15:21:48.342706 port C1 DISC req: usage 1 usb3 3 usb2 3
704 15:21:48.343203 Raw Buffer output 0 00000331
705 15:21:48.346036 Raw Buffer output 1 00000000
706 15:21:48.350024 pmc_send_ipc_cmd succeeded
707 15:21:48.353778 Detected 6 core, 8 thread CPU.
708 15:21:48.357404 Detected 6 core, 8 thread CPU.
709 15:21:48.362888 Detected 6 core, 8 thread CPU.
710 15:21:48.366370 Detected 6 core, 8 thread CPU.
711 15:21:48.369289 Detected 6 core, 8 thread CPU.
712 15:21:48.372334 Detected 6 core, 8 thread CPU.
713 15:21:48.375746 Detected 6 core, 8 thread CPU.
714 15:21:48.379051 Detected 6 core, 8 thread CPU.
715 15:21:48.382438 Detected 6 core, 8 thread CPU.
716 15:21:48.385693 Detected 6 core, 8 thread CPU.
717 15:21:48.388888 Detected 6 core, 8 thread CPU.
718 15:21:48.392097 Detected 6 core, 8 thread CPU.
719 15:21:48.395676 Detected 6 core, 8 thread CPU.
720 15:21:48.398840 Detected 6 core, 8 thread CPU.
721 15:21:48.401982 Detected 6 core, 8 thread CPU.
722 15:21:48.405648 Detected 6 core, 8 thread CPU.
723 15:21:48.409612 Detected 6 core, 8 thread CPU.
724 15:21:48.412470 Detected 6 core, 8 thread CPU.
725 15:21:48.415541 Detected 6 core, 8 thread CPU.
726 15:21:48.419061 Detected 6 core, 8 thread CPU.
727 15:21:48.422507 Detected 6 core, 8 thread CPU.
728 15:21:48.425505 Detected 6 core, 8 thread CPU.
729 15:21:48.712065 Detected 6 core, 8 thread CPU.
730 15:21:48.715276 Detected 6 core, 8 thread CPU.
731 15:21:48.718263 Detected 6 core, 8 thread CPU.
732 15:21:48.721805 Detected 6 core, 8 thread CPU.
733 15:21:48.725134 Detected 6 core, 8 thread CPU.
734 15:21:48.728617 Detected 6 core, 8 thread CPU.
735 15:21:48.731678 Detected 6 core, 8 thread CPU.
736 15:21:48.735307 Detected 6 core, 8 thread CPU.
737 15:21:48.738477 Detected 6 core, 8 thread CPU.
738 15:21:48.741828 Detected 6 core, 8 thread CPU.
739 15:21:48.745586 Detected 6 core, 8 thread CPU.
740 15:21:48.748674 Detected 6 core, 8 thread CPU.
741 15:21:48.752135 Detected 6 core, 8 thread CPU.
742 15:21:48.755205 Detected 6 core, 8 thread CPU.
743 15:21:48.758534 Detected 6 core, 8 thread CPU.
744 15:21:48.761842 Detected 6 core, 8 thread CPU.
745 15:21:48.765191 Detected 6 core, 8 thread CPU.
746 15:21:48.768542 Detected 6 core, 8 thread CPU.
747 15:21:48.771759 Detected 6 core, 8 thread CPU.
748 15:21:48.772253 Detected 6 core, 8 thread CPU.
749 15:21:48.775552 Display FSP Version Info HOB
750 15:21:48.778715 Reference Code - CPU = c.0.65.70
751 15:21:48.782287 uCode Version = 0.0.4.23
752 15:21:48.785484 TXT ACM version = ff.ff.ff.ffff
753 15:21:48.789471 Reference Code - ME = c.0.65.70
754 15:21:48.792440 MEBx version = 0.0.0.0
755 15:21:48.795712 ME Firmware Version = Consumer SKU
756 15:21:48.798953 Reference Code - PCH = c.0.65.70
757 15:21:48.802449 PCH-CRID Status = Disabled
758 15:21:48.805529 PCH-CRID Original Value = ff.ff.ff.ffff
759 15:21:48.808857 PCH-CRID New Value = ff.ff.ff.ffff
760 15:21:48.812111 OPROM - RST - RAID = ff.ff.ff.ffff
761 15:21:48.815302 PCH Hsio Version = 4.0.0.0
762 15:21:48.818593 Reference Code - SA - System Agent = c.0.65.70
763 15:21:48.822464 Reference Code - MRC = 0.0.3.80
764 15:21:48.825656 SA - PCIe Version = c.0.65.70
765 15:21:48.828826 SA-CRID Status = Disabled
766 15:21:48.831769 SA-CRID Original Value = 0.0.0.4
767 15:21:48.835426 SA-CRID New Value = 0.0.0.4
768 15:21:48.838887 OPROM - VBIOS = ff.ff.ff.ffff
769 15:21:48.842167 IO Manageability Engine FW Version = 24.0.4.0
770 15:21:48.845236 PHY Build Version = 0.0.0.2016
771 15:21:48.848860 Thunderbolt(TM) FW Version = 0.0.0.0
772 15:21:48.855303 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
773 15:21:48.862310 BS: BS_DEV_INIT_CHIPS run times (exec / console): 473 / 507 ms
774 15:21:48.865361 Enumerating buses...
775 15:21:48.868953 Show all devs... Before device enumeration.
776 15:21:48.872052 Root Device: enabled 1
777 15:21:48.872446 CPU_CLUSTER: 0: enabled 1
778 15:21:48.875441 DOMAIN: 0000: enabled 1
779 15:21:48.878866 GPIO: 0: enabled 1
780 15:21:48.879368 PCI: 00:00.0: enabled 1
781 15:21:48.882199 PCI: 00:01.0: enabled 0
782 15:21:48.885423 PCI: 00:01.1: enabled 0
783 15:21:48.888800 PCI: 00:02.0: enabled 1
784 15:21:48.889299 PCI: 00:04.0: enabled 1
785 15:21:48.892116 PCI: 00:05.0: enabled 0
786 15:21:48.896544 PCI: 00:06.0: enabled 1
787 15:21:48.898384 PCI: 00:06.2: enabled 0
788 15:21:48.898781 PCI: 00:07.0: enabled 0
789 15:21:48.902008 PCI: 00:07.1: enabled 0
790 15:21:48.905380 PCI: 00:07.2: enabled 0
791 15:21:48.905923 PCI: 00:07.3: enabled 0
792 15:21:48.908574 PCI: 00:08.0: enabled 0
793 15:21:48.912120 PCI: 00:09.0: enabled 0
794 15:21:48.915206 PCI: 00:0a.0: enabled 1
795 15:21:48.915605 PCI: 00:0d.0: enabled 1
796 15:21:48.918455 PCI: 00:0d.1: enabled 0
797 15:21:48.921948 PCI: 00:0d.2: enabled 0
798 15:21:48.924926 PCI: 00:0d.3: enabled 0
799 15:21:48.925320 PCI: 00:0e.0: enabled 0
800 15:21:48.928152 PCI: 00:10.0: enabled 0
801 15:21:48.931965 PCI: 00:10.1: enabled 0
802 15:21:48.935052 PCI: 00:10.6: enabled 0
803 15:21:48.935452 PCI: 00:10.7: enabled 0
804 15:21:48.938346 PCI: 00:12.0: enabled 0
805 15:21:48.941631 PCI: 00:12.6: enabled 0
806 15:21:48.991715 PCI: 00:12.7: enabled 0
807 15:21:48.992285 PCI: 00:13.0: enabled 0
808 15:21:48.992598 PCI: 00:14.0: enabled 1
809 15:21:48.992842 PCI: 00:14.1: enabled 0
810 15:21:48.993090 PCI: 00:14.2: enabled 1
811 15:21:48.993329 PCI: 00:14.3: enabled 1
812 15:21:48.993842 PCI: 00:15.0: enabled 1
813 15:21:48.994140 PCI: 00:15.1: enabled 1
814 15:21:48.994378 PCI: 00:15.2: enabled 0
815 15:21:48.994611 PCI: 00:15.3: enabled 1
816 15:21:48.994842 PCI: 00:16.0: enabled 1
817 15:21:48.995062 PCI: 00:16.1: enabled 0
818 15:21:48.995284 PCI: 00:16.2: enabled 0
819 15:21:48.995505 PCI: 00:16.3: enabled 0
820 15:21:48.995727 PCI: 00:16.4: enabled 0
821 15:21:48.995946 PCI: 00:16.5: enabled 0
822 15:21:48.996172 PCI: 00:17.0: enabled 1
823 15:21:48.996410 PCI: 00:19.0: enabled 0
824 15:21:48.996638 PCI: 00:19.1: enabled 1
825 15:21:48.996863 PCI: 00:19.2: enabled 0
826 15:21:48.997085 PCI: 00:1a.0: enabled 0
827 15:21:49.042043 PCI: 00:1c.0: enabled 0
828 15:21:49.042532 PCI: 00:1c.1: enabled 0
829 15:21:49.042808 PCI: 00:1c.2: enabled 0
830 15:21:49.043054 PCI: 00:1c.3: enabled 0
831 15:21:49.043284 PCI: 00:1c.4: enabled 0
832 15:21:49.043790 PCI: 00:1c.5: enabled 0
833 15:21:49.044055 PCI: 00:1c.6: enabled 0
834 15:21:49.044289 PCI: 00:1c.7: enabled 0
835 15:21:49.044516 PCI: 00:1d.0: enabled 0
836 15:21:49.044740 PCI: 00:1d.1: enabled 0
837 15:21:49.044960 PCI: 00:1d.2: enabled 0
838 15:21:49.045190 PCI: 00:1d.3: enabled 0
839 15:21:49.045415 PCI: 00:1e.0: enabled 1
840 15:21:49.045638 PCI: 00:1e.1: enabled 0
841 15:21:49.045855 PCI: 00:1e.2: enabled 0
842 15:21:49.046104 PCI: 00:1e.3: enabled 1
843 15:21:49.046330 PCI: 00:1f.0: enabled 1
844 15:21:49.046553 PCI: 00:1f.1: enabled 0
845 15:21:49.046769 PCI: 00:1f.2: enabled 1
846 15:21:49.046990 PCI: 00:1f.3: enabled 1
847 15:21:49.091917 PCI: 00:1f.4: enabled 0
848 15:21:49.092454 PCI: 00:1f.5: enabled 1
849 15:21:49.092779 PCI: 00:1f.6: enabled 0
850 15:21:49.093066 PCI: 00:1f.7: enabled 0
851 15:21:49.093319 GENERIC: 0.0: enabled 1
852 15:21:49.093549 GENERIC: 0.0: enabled 1
853 15:21:49.094061 GENERIC: 1.0: enabled 1
854 15:21:49.094329 GENERIC: 0.0: enabled 1
855 15:21:49.094561 GENERIC: 1.0: enabled 1
856 15:21:49.094789 USB0 port 0: enabled 1
857 15:21:49.095018 USB0 port 0: enabled 1
858 15:21:49.095243 GENERIC: 0.0: enabled 1
859 15:21:49.095469 I2C: 00:1a: enabled 1
860 15:21:49.095694 I2C: 00:31: enabled 1
861 15:21:49.095911 I2C: 00:32: enabled 1
862 15:21:49.096132 I2C: 00:50: enabled 1
863 15:21:49.096351 I2C: 00:10: enabled 1
864 15:21:49.096578 I2C: 00:15: enabled 1
865 15:21:49.096801 I2C: 00:2c: enabled 1
866 15:21:49.097022 GENERIC: 0.0: enabled 1
867 15:21:49.097245 SPI: 00: enabled 1
868 15:21:49.097467 PNP: 0c09.0: enabled 1
869 15:21:49.130962 GENERIC: 0.0: enabled 1
870 15:21:49.131464 USB3 port 0: enabled 1
871 15:21:49.131758 USB3 port 1: enabled 0
872 15:21:49.132015 USB3 port 2: enabled 1
873 15:21:49.132251 USB3 port 3: enabled 0
874 15:21:49.132774 USB2 port 0: enabled 1
875 15:21:49.133038 USB2 port 1: enabled 0
876 15:21:49.133272 USB2 port 2: enabled 1
877 15:21:49.133497 USB2 port 3: enabled 0
878 15:21:49.133720 USB2 port 4: enabled 0
879 15:21:49.133973 USB2 port 5: enabled 1
880 15:21:49.134202 USB2 port 6: enabled 0
881 15:21:49.134427 USB2 port 7: enabled 0
882 15:21:49.134655 USB2 port 8: enabled 1
883 15:21:49.134918 USB2 port 9: enabled 1
884 15:21:49.135159 USB3 port 0: enabled 1
885 15:21:49.135434 USB3 port 1: enabled 0
886 15:21:49.135669 USB3 port 2: enabled 0
887 15:21:49.138271 USB3 port 3: enabled 0
888 15:21:49.138553 GENERIC: 0.0: enabled 1
889 15:21:49.141895 GENERIC: 1.0: enabled 1
890 15:21:49.145357 APIC: 00: enabled 1
891 15:21:49.145832 APIC: 16: enabled 1
892 15:21:49.148496 APIC: 10: enabled 1
893 15:21:49.152382 APIC: 12: enabled 1
894 15:21:49.152839 APIC: 14: enabled 1
895 15:21:49.155322 APIC: 09: enabled 1
896 15:21:49.155781 APIC: 01: enabled 1
897 15:21:49.158460 APIC: 08: enabled 1
898 15:21:49.162374 Compare with tree...
899 15:21:49.162846 Root Device: enabled 1
900 15:21:49.165098 CPU_CLUSTER: 0: enabled 1
901 15:21:49.168806 APIC: 00: enabled 1
902 15:21:49.172296 APIC: 16: enabled 1
903 15:21:49.172793 APIC: 10: enabled 1
904 15:21:49.175451 APIC: 12: enabled 1
905 15:21:49.179077 APIC: 14: enabled 1
906 15:21:49.179575 APIC: 09: enabled 1
907 15:21:49.181903 APIC: 01: enabled 1
908 15:21:49.185822 APIC: 08: enabled 1
909 15:21:49.186368 DOMAIN: 0000: enabled 1
910 15:21:49.190068 GPIO: 0: enabled 1
911 15:21:49.190562 PCI: 00:00.0: enabled 1
912 15:21:49.193145 PCI: 00:01.0: enabled 0
913 15:21:49.196620 PCI: 00:01.1: enabled 0
914 15:21:49.199921 PCI: 00:02.0: enabled 1
915 15:21:49.202973 PCI: 00:04.0: enabled 1
916 15:21:49.203467 GENERIC: 0.0: enabled 1
917 15:21:49.206587 PCI: 00:05.0: enabled 0
918 15:21:49.209754 PCI: 00:06.0: enabled 1
919 15:21:49.213037 PCI: 00:06.2: enabled 0
920 15:21:49.216415 PCI: 00:08.0: enabled 0
921 15:21:49.216809 PCI: 00:09.0: enabled 0
922 15:21:49.219649 PCI: 00:0a.0: enabled 1
923 15:21:49.223069 PCI: 00:0d.0: enabled 1
924 15:21:49.226015 USB0 port 0: enabled 1
925 15:21:49.229528 USB3 port 0: enabled 1
926 15:21:49.229954 USB3 port 1: enabled 0
927 15:21:49.233332 USB3 port 2: enabled 1
928 15:21:49.236246 USB3 port 3: enabled 0
929 15:21:49.239256 PCI: 00:0d.1: enabled 0
930 15:21:49.242818 PCI: 00:0d.2: enabled 0
931 15:21:49.243313 PCI: 00:0d.3: enabled 0
932 15:21:49.246017 PCI: 00:0e.0: enabled 0
933 15:21:49.249625 PCI: 00:10.0: enabled 0
934 15:21:49.253255 PCI: 00:10.1: enabled 0
935 15:21:49.256358 PCI: 00:10.6: enabled 0
936 15:21:49.256851 PCI: 00:10.7: enabled 0
937 15:21:49.259613 PCI: 00:12.0: enabled 0
938 15:21:49.263039 PCI: 00:12.6: enabled 0
939 15:21:49.266229 PCI: 00:12.7: enabled 0
940 15:21:49.269938 PCI: 00:13.0: enabled 0
941 15:21:49.270430 PCI: 00:14.0: enabled 1
942 15:21:49.273036 USB0 port 0: enabled 1
943 15:21:49.276198 USB2 port 0: enabled 1
944 15:21:49.279724 USB2 port 1: enabled 0
945 15:21:49.282975 USB2 port 2: enabled 1
946 15:21:49.283471 USB2 port 3: enabled 0
947 15:21:49.286612 USB2 port 4: enabled 0
948 15:21:49.289598 USB2 port 5: enabled 1
949 15:21:49.293004 USB2 port 6: enabled 0
950 15:21:49.296317 USB2 port 7: enabled 0
951 15:21:49.299728 USB2 port 8: enabled 1
952 15:21:49.300227 USB2 port 9: enabled 1
953 15:21:49.303057 USB3 port 0: enabled 1
954 15:21:49.306161 USB3 port 1: enabled 0
955 15:21:49.309383 USB3 port 2: enabled 0
956 15:21:49.312858 USB3 port 3: enabled 0
957 15:21:49.316029 PCI: 00:14.1: enabled 0
958 15:21:49.316418 PCI: 00:14.2: enabled 1
959 15:21:49.319569 PCI: 00:14.3: enabled 1
960 15:21:49.322892 GENERIC: 0.0: enabled 1
961 15:21:49.326106 PCI: 00:15.0: enabled 1
962 15:21:49.326595 I2C: 00:1a: enabled 1
963 15:21:49.329416 I2C: 00:31: enabled 1
964 15:21:49.333179 I2C: 00:32: enabled 1
965 15:21:49.336126 PCI: 00:15.1: enabled 1
966 15:21:49.339182 I2C: 00:50: enabled 1
967 15:21:49.339639 PCI: 00:15.2: enabled 0
968 15:21:49.342532 PCI: 00:15.3: enabled 1
969 15:21:49.345755 I2C: 00:10: enabled 1
970 15:21:49.349289 PCI: 00:16.0: enabled 1
971 15:21:49.352872 PCI: 00:16.1: enabled 0
972 15:21:49.353368 PCI: 00:16.2: enabled 0
973 15:21:49.356271 PCI: 00:16.3: enabled 0
974 15:21:49.359360 PCI: 00:16.4: enabled 0
975 15:21:49.362670 PCI: 00:16.5: enabled 0
976 15:21:49.363162 PCI: 00:17.0: enabled 1
977 15:21:49.366100 PCI: 00:19.0: enabled 0
978 15:21:49.369748 PCI: 00:19.1: enabled 1
979 15:21:49.372956 I2C: 00:15: enabled 1
980 15:21:49.376093 I2C: 00:2c: enabled 1
981 15:21:49.376588 PCI: 00:19.2: enabled 0
982 15:21:49.379465 PCI: 00:1a.0: enabled 0
983 15:21:49.383317 PCI: 00:1e.0: enabled 1
984 15:21:49.386236 PCI: 00:1e.1: enabled 0
985 15:21:49.386737 PCI: 00:1e.2: enabled 0
986 15:21:49.389425 PCI: 00:1e.3: enabled 1
987 15:21:49.393150 SPI: 00: enabled 1
988 15:21:49.396377 PCI: 00:1f.0: enabled 1
989 15:21:49.399648 PNP: 0c09.0: enabled 1
990 15:21:49.400150 PCI: 00:1f.1: enabled 0
991 15:21:49.402841 PCI: 00:1f.2: enabled 1
992 15:21:49.406449 GENERIC: 0.0: enabled 1
993 15:21:49.409668 GENERIC: 0.0: enabled 1
994 15:21:49.412528 GENERIC: 1.0: enabled 1
995 15:21:49.412903 PCI: 00:1f.3: enabled 1
996 15:21:49.415977 PCI: 00:1f.4: enabled 0
997 15:21:49.419268 PCI: 00:1f.5: enabled 1
998 15:21:49.422758 PCI: 00:1f.6: enabled 0
999 15:21:49.425817 PCI: 00:1f.7: enabled 0
1000 15:21:49.426194 Root Device scanning...
1001 15:21:49.429684 scan_static_bus for Root Device
1002 15:21:49.432793 CPU_CLUSTER: 0 enabled
1003 15:21:49.436418 DOMAIN: 0000 enabled
1004 15:21:49.436875 DOMAIN: 0000 scanning...
1005 15:21:49.439651 PCI: pci_scan_bus for bus 00
1006 15:21:49.442509 PCI: 00:00.0 [8086/0000] ops
1007 15:21:49.445710 PCI: 00:00.0 [8086/4609] enabled
1008 15:21:49.449208 PCI: 00:02.0 [8086/0000] bus ops
1009 15:21:49.452365 PCI: 00:02.0 [8086/46b3] enabled
1010 15:21:49.455895 PCI: 00:04.0 [8086/0000] bus ops
1011 15:21:49.459150 PCI: 00:04.0 [8086/461d] enabled
1012 15:21:49.462542 PCI: 00:06.0 [8086/0000] bus ops
1013 15:21:49.466182 PCI: 00:06.0 [8086/464d] enabled
1014 15:21:49.469634 PCI: 00:08.0 [8086/464f] disabled
1015 15:21:49.472723 PCI: 00:0a.0 [8086/467d] enabled
1016 15:21:49.476126 PCI: 00:0d.0 [8086/0000] bus ops
1017 15:21:49.479471 PCI: 00:0d.0 [8086/461e] enabled
1018 15:21:49.482705 PCI: 00:14.0 [8086/0000] bus ops
1019 15:21:49.486226 PCI: 00:14.0 [8086/51ed] enabled
1020 15:21:49.489577 PCI: 00:14.2 [8086/51ef] enabled
1021 15:21:49.496283 PCI: 00:14.3 [8086/0000] bus ops
1022 15:21:49.499656 PCI: 00:14.3 [8086/51f0] enabled
1023 15:21:49.503388 PCI: 00:15.0 [8086/0000] bus ops
1024 15:21:49.506104 PCI: 00:15.0 [8086/51e8] enabled
1025 15:21:49.509529 PCI: 00:15.1 [8086/0000] bus ops
1026 15:21:49.512863 PCI: 00:15.1 [8086/51e9] enabled
1027 15:21:49.515788 PCI: 00:15.2 [8086/0000] bus ops
1028 15:21:49.519992 PCI: 00:15.2 [8086/51ea] disabled
1029 15:21:49.522842 PCI: 00:15.3 [8086/0000] bus ops
1030 15:21:49.525845 PCI: 00:15.3 [8086/51eb] enabled
1031 15:21:49.526355 PCI: 00:16.0 [8086/0000] ops
1032 15:21:49.529118 PCI: 00:16.0 [8086/51e0] enabled
1033 15:21:49.536156 PCI: Static device PCI: 00:17.0 not found, disabling it.
1034 15:21:49.538968 PCI: 00:19.0 [8086/0000] bus ops
1035 15:21:49.542937 PCI: 00:19.0 [8086/51c5] disabled
1036 15:21:49.546147 PCI: 00:19.1 [8086/0000] bus ops
1037 15:21:49.549273 PCI: 00:19.1 [8086/51c6] enabled
1038 15:21:49.552533 PCI: 00:1e.0 [8086/0000] ops
1039 15:21:49.555888 PCI: 00:1e.0 [8086/51a8] enabled
1040 15:21:49.559366 PCI: 00:1e.3 [8086/0000] bus ops
1041 15:21:49.562354 PCI: 00:1e.3 [8086/51ab] enabled
1042 15:21:49.565983 PCI: 00:1f.0 [8086/0000] bus ops
1043 15:21:49.569069 PCI: 00:1f.0 [8086/5182] enabled
1044 15:21:49.572485 RTC Init
1045 15:21:49.575977 Set power on after power failure.
1046 15:21:49.579132 Disabling Deep S3
1047 15:21:49.579626 Disabling Deep S3
1048 15:21:49.582783 Disabling Deep S4
1049 15:21:49.583275 Disabling Deep S4
1050 15:21:49.585711 Disabling Deep S5
1051 15:21:49.586230 Disabling Deep S5
1052 15:21:49.589140 PCI: 00:1f.2 [0000/0000] hidden
1053 15:21:49.592473 PCI: 00:1f.3 [8086/0000] bus ops
1054 15:21:49.595941 PCI: 00:1f.3 [8086/51c8] enabled
1055 15:21:49.599144 PCI: 00:1f.5 [8086/0000] bus ops
1056 15:21:49.602648 PCI: 00:1f.5 [8086/51a4] enabled
1057 15:21:49.605713 GPIO: 0 enabled
1058 15:21:49.609136 PCI: Leftover static devices:
1059 15:21:49.609624 PCI: 00:01.0
1060 15:21:49.612372 PCI: 00:01.1
1061 15:21:49.612761 PCI: 00:05.0
1062 15:21:49.613025 PCI: 00:06.2
1063 15:21:49.615651 PCI: 00:09.0
1064 15:21:49.616138 PCI: 00:0d.1
1065 15:21:49.619093 PCI: 00:0d.2
1066 15:21:49.619581 PCI: 00:0d.3
1067 15:21:49.619856 PCI: 00:0e.0
1068 15:21:49.622408 PCI: 00:10.0
1069 15:21:49.622863 PCI: 00:10.1
1070 15:21:49.625981 PCI: 00:10.6
1071 15:21:49.626618 PCI: 00:10.7
1072 15:21:49.626918 PCI: 00:12.0
1073 15:21:49.629164 PCI: 00:12.6
1074 15:21:49.629650 PCI: 00:12.7
1075 15:21:49.632688 PCI: 00:13.0
1076 15:21:49.633188 PCI: 00:14.1
1077 15:21:49.635854 PCI: 00:16.1
1078 15:21:49.636344 PCI: 00:16.2
1079 15:21:49.636618 PCI: 00:16.3
1080 15:21:49.639596 PCI: 00:16.4
1081 15:21:49.640089 PCI: 00:16.5
1082 15:21:49.642013 PCI: 00:17.0
1083 15:21:49.642428 PCI: 00:19.2
1084 15:21:49.642701 PCI: 00:1a.0
1085 15:21:49.645702 PCI: 00:1e.1
1086 15:21:49.646237 PCI: 00:1e.2
1087 15:21:49.649108 PCI: 00:1f.1
1088 15:21:49.649631 PCI: 00:1f.4
1089 15:21:49.649979 PCI: 00:1f.6
1090 15:21:49.652393 PCI: 00:1f.7
1091 15:21:49.655924 PCI: Check your devicetree.cb.
1092 15:21:49.659557 PCI: 00:02.0 scanning...
1093 15:21:49.662902 scan_generic_bus for PCI: 00:02.0
1094 15:21:49.665611 scan_generic_bus for PCI: 00:02.0 done
1095 15:21:49.668880 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1096 15:21:49.672399 PCI: 00:04.0 scanning...
1097 15:21:49.676110 scan_generic_bus for PCI: 00:04.0
1098 15:21:49.678876 GENERIC: 0.0 enabled
1099 15:21:49.682326 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1100 15:21:49.688821 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1101 15:21:49.692317 PCI: 00:06.0 scanning...
1102 15:21:49.695762 do_pci_scan_bridge for PCI: 00:06.0
1103 15:21:49.699117 PCI: pci_scan_bus for bus 01
1104 15:21:49.702522 PCI: 01:00.0 [15b7/5009] enabled
1105 15:21:49.705746 Enabling Common Clock Configuration
1106 15:21:49.709160 L1 Sub-State supported from root port 6
1107 15:21:49.712337 L1 Sub-State Support = 0x5
1108 15:21:49.715684 CommonModeRestoreTime = 0x6e
1109 15:21:49.719071 Power On Value = 0x5, Power On Scale = 0x2
1110 15:21:49.719563 ASPM: Enabled L1
1111 15:21:49.725621 PCIe: Max_Payload_Size adjusted to 256
1112 15:21:49.726147 PCI: 01:00.0: Enabled LTR
1113 15:21:49.732247 PCI: 01:00.0: Programmed LTR max latencies
1114 15:21:49.735738 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1115 15:21:49.738993 PCI: 00:0d.0 scanning...
1116 15:21:49.742117 scan_static_bus for PCI: 00:0d.0
1117 15:21:49.746035 USB0 port 0 enabled
1118 15:21:49.746529 USB0 port 0 scanning...
1119 15:21:49.749188 scan_static_bus for USB0 port 0
1120 15:21:49.752409 USB3 port 0 enabled
1121 15:21:49.755620 USB3 port 1 disabled
1122 15:21:49.756081 USB3 port 2 enabled
1123 15:21:49.758881 USB3 port 3 disabled
1124 15:21:49.763377 USB3 port 0 scanning...
1125 15:21:49.763867 scan_static_bus for USB3 port 0
1126 15:21:49.766689 scan_static_bus for USB3 port 0 done
1127 15:21:49.773283 scan_bus: bus USB3 port 0 finished in 6 msecs
1128 15:21:49.773784 USB3 port 2 scanning...
1129 15:21:49.776768 scan_static_bus for USB3 port 2
1130 15:21:49.780170 scan_static_bus for USB3 port 2 done
1131 15:21:49.786912 scan_bus: bus USB3 port 2 finished in 6 msecs
1132 15:21:49.790104 scan_static_bus for USB0 port 0 done
1133 15:21:49.793099 scan_bus: bus USB0 port 0 finished in 43 msecs
1134 15:21:49.800034 scan_static_bus for PCI: 00:0d.0 done
1135 15:21:49.803741 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1136 15:21:49.806713 PCI: 00:14.0 scanning...
1137 15:21:49.810282 scan_static_bus for PCI: 00:14.0
1138 15:21:49.810778 USB0 port 0 enabled
1139 15:21:49.813391 USB0 port 0 scanning...
1140 15:21:49.816546 scan_static_bus for USB0 port 0
1141 15:21:49.820058 USB2 port 0 enabled
1142 15:21:49.820549 USB2 port 1 disabled
1143 15:21:49.823035 USB2 port 2 enabled
1144 15:21:49.826621 USB2 port 3 disabled
1145 15:21:49.827167 USB2 port 4 disabled
1146 15:21:49.829994 USB2 port 5 enabled
1147 15:21:49.830480 USB2 port 6 disabled
1148 15:21:49.833330 USB2 port 7 disabled
1149 15:21:49.837024 USB2 port 8 enabled
1150 15:21:49.837514 USB2 port 9 enabled
1151 15:21:49.839754 USB3 port 0 enabled
1152 15:21:49.843141 USB3 port 1 disabled
1153 15:21:49.843525 USB3 port 2 disabled
1154 15:21:49.846542 USB3 port 3 disabled
1155 15:21:49.850350 USB2 port 0 scanning...
1156 15:21:49.853363 scan_static_bus for USB2 port 0
1157 15:21:49.857000 scan_static_bus for USB2 port 0 done
1158 15:21:49.860381 scan_bus: bus USB2 port 0 finished in 6 msecs
1159 15:21:49.863013 USB2 port 2 scanning...
1160 15:21:49.866588 scan_static_bus for USB2 port 2
1161 15:21:49.869661 scan_static_bus for USB2 port 2 done
1162 15:21:49.873210 scan_bus: bus USB2 port 2 finished in 6 msecs
1163 15:21:49.876807 USB2 port 5 scanning...
1164 15:21:49.879792 scan_static_bus for USB2 port 5
1165 15:21:49.883375 scan_static_bus for USB2 port 5 done
1166 15:21:49.889986 scan_bus: bus USB2 port 5 finished in 6 msecs
1167 15:21:49.890486 USB2 port 8 scanning...
1168 15:21:49.893092 scan_static_bus for USB2 port 8
1169 15:21:49.896418 scan_static_bus for USB2 port 8 done
1170 15:21:49.903181 scan_bus: bus USB2 port 8 finished in 6 msecs
1171 15:21:49.903673 USB2 port 9 scanning...
1172 15:21:49.906689 scan_static_bus for USB2 port 9
1173 15:21:49.913129 scan_static_bus for USB2 port 9 done
1174 15:21:49.916525 scan_bus: bus USB2 port 9 finished in 6 msecs
1175 15:21:49.919823 USB3 port 0 scanning...
1176 15:21:49.923550 scan_static_bus for USB3 port 0
1177 15:21:49.926644 scan_static_bus for USB3 port 0 done
1178 15:21:49.929864 scan_bus: bus USB3 port 0 finished in 6 msecs
1179 15:21:49.933105 scan_static_bus for USB0 port 0 done
1180 15:21:49.939826 scan_bus: bus USB0 port 0 finished in 120 msecs
1181 15:21:49.942801 scan_static_bus for PCI: 00:14.0 done
1182 15:21:49.946354 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1183 15:21:49.949563 PCI: 00:14.3 scanning...
1184 15:21:49.952884 scan_static_bus for PCI: 00:14.3
1185 15:21:49.956330 GENERIC: 0.0 enabled
1186 15:21:49.959558 scan_static_bus for PCI: 00:14.3 done
1187 15:21:49.962821 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1188 15:21:49.966371 PCI: 00:15.0 scanning...
1189 15:21:49.969563 scan_static_bus for PCI: 00:15.0
1190 15:21:49.972910 I2C: 00:1a enabled
1191 15:21:49.973414 I2C: 00:31 enabled
1192 15:21:49.976259 I2C: 00:32 enabled
1193 15:21:49.979665 scan_static_bus for PCI: 00:15.0 done
1194 15:21:49.982632 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1195 15:21:49.986288 PCI: 00:15.1 scanning...
1196 15:21:49.989842 scan_static_bus for PCI: 00:15.1
1197 15:21:49.992619 I2C: 00:50 enabled
1198 15:21:49.996226 scan_static_bus for PCI: 00:15.1 done
1199 15:21:49.999597 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1200 15:21:50.003098 PCI: 00:15.3 scanning...
1201 15:21:50.006292 scan_static_bus for PCI: 00:15.3
1202 15:21:50.009584 I2C: 00:10 enabled
1203 15:21:50.012926 scan_static_bus for PCI: 00:15.3 done
1204 15:21:50.016271 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1205 15:21:50.019603 PCI: 00:19.1 scanning...
1206 15:21:50.022812 scan_static_bus for PCI: 00:19.1
1207 15:21:50.023307 I2C: 00:15 enabled
1208 15:21:50.026391 I2C: 00:2c enabled
1209 15:21:50.029146 scan_static_bus for PCI: 00:19.1 done
1210 15:21:50.036115 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1211 15:21:50.036603 PCI: 00:1e.3 scanning...
1212 15:21:50.039469 scan_generic_bus for PCI: 00:1e.3
1213 15:21:50.042491 SPI: 00 enabled
1214 15:21:50.049466 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1215 15:21:50.052944 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1216 15:21:50.056446 PCI: 00:1f.0 scanning...
1217 15:21:50.059523 scan_static_bus for PCI: 00:1f.0
1218 15:21:50.062891 PNP: 0c09.0 enabled
1219 15:21:50.063381 PNP: 0c09.0 scanning...
1220 15:21:50.066036 scan_static_bus for PNP: 0c09.0
1221 15:21:50.069305 scan_static_bus for PNP: 0c09.0 done
1222 15:21:50.076307 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1223 15:21:50.079315 scan_static_bus for PCI: 00:1f.0 done
1224 15:21:50.082699 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1225 15:21:50.086107 PCI: 00:1f.2 scanning...
1226 15:21:50.089350 scan_static_bus for PCI: 00:1f.2
1227 15:21:50.092913 GENERIC: 0.0 enabled
1228 15:21:50.095930 GENERIC: 0.0 scanning...
1229 15:21:50.099375 scan_static_bus for GENERIC: 0.0
1230 15:21:50.099896 GENERIC: 0.0 enabled
1231 15:21:50.102898 GENERIC: 1.0 enabled
1232 15:21:50.105960 scan_static_bus for GENERIC: 0.0 done
1233 15:21:50.109429 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1234 15:21:50.115554 scan_static_bus for PCI: 00:1f.2 done
1235 15:21:50.119383 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1236 15:21:50.122687 PCI: 00:1f.3 scanning...
1237 15:21:50.126704 scan_static_bus for PCI: 00:1f.3
1238 15:21:50.129080 scan_static_bus for PCI: 00:1f.3 done
1239 15:21:50.132670 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1240 15:21:50.136135 PCI: 00:1f.5 scanning...
1241 15:21:50.139168 scan_generic_bus for PCI: 00:1f.5
1242 15:21:50.142952 scan_generic_bus for PCI: 00:1f.5 done
1243 15:21:50.149144 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1244 15:21:50.152958 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1245 15:21:50.155883 scan_static_bus for Root Device done
1246 15:21:50.162486 scan_bus: bus Root Device finished in 729 msecs
1247 15:21:50.162976 done
1248 15:21:50.169250 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1249 15:21:50.172421 Chrome EC: UHEPI supported
1250 15:21:50.179147 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1251 15:21:50.182611 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1252 15:21:50.189311 SPI flash protection: WPSW=0 SRP0=0
1253 15:21:50.192411 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1254 15:21:50.199398 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1255 15:21:50.202463 found VGA at PCI: 00:02.0
1256 15:21:50.202954 Setting up VGA for PCI: 00:02.0
1257 15:21:50.209297 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1258 15:21:50.215520 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1259 15:21:50.216000 Allocating resources...
1260 15:21:50.218975 Reading resources...
1261 15:21:50.222527 Root Device read_resources bus 0 link: 0
1262 15:21:50.225706 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1263 15:21:50.232820 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1264 15:21:50.235587 DOMAIN: 0000 read_resources bus 0 link: 0
1265 15:21:50.242251 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1266 15:21:50.248956 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1267 15:21:50.255583 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1268 15:21:50.262245 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1269 15:21:50.265732 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1270 15:21:50.272365 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1271 15:21:50.279170 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1272 15:21:50.285408 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1273 15:21:50.291981 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1274 15:21:50.298896 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1275 15:21:50.305702 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1276 15:21:50.312047 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1277 15:21:50.318658 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1278 15:21:50.325512 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1279 15:21:50.332115 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1280 15:21:50.338781 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1281 15:21:50.344933 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1282 15:21:50.348371 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1283 15:21:50.355252 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1284 15:21:50.361785 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1285 15:21:50.368699 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1286 15:21:50.371939 PCI: 00:04.0 read_resources bus 1 link: 0
1287 15:21:50.378456 PCI: 00:04.0 read_resources bus 1 link: 0 done
1288 15:21:50.382287 PCI: 00:06.0 read_resources bus 1 link: 0
1289 15:21:50.386260 PCI: 00:06.0 read_resources bus 1 link: 0 done
1290 15:21:50.392142 PCI: 00:0d.0 read_resources bus 0 link: 0
1291 15:21:50.395756 USB0 port 0 read_resources bus 0 link: 0
1292 15:21:50.398788 USB0 port 0 read_resources bus 0 link: 0 done
1293 15:21:50.405179 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1294 15:21:50.408594 PCI: 00:14.0 read_resources bus 0 link: 0
1295 15:21:50.412278 USB0 port 0 read_resources bus 0 link: 0
1296 15:21:50.418225 USB0 port 0 read_resources bus 0 link: 0 done
1297 15:21:50.421844 PCI: 00:14.0 read_resources bus 0 link: 0 done
1298 15:21:50.425116 PCI: 00:14.3 read_resources bus 0 link: 0
1299 15:21:50.431724 PCI: 00:14.3 read_resources bus 0 link: 0 done
1300 15:21:50.434986 PCI: 00:15.0 read_resources bus 0 link: 0
1301 15:21:50.438461 PCI: 00:15.0 read_resources bus 0 link: 0 done
1302 15:21:50.445335 PCI: 00:15.1 read_resources bus 0 link: 0
1303 15:21:50.448444 PCI: 00:15.1 read_resources bus 0 link: 0 done
1304 15:21:50.451955 PCI: 00:15.3 read_resources bus 0 link: 0
1305 15:21:50.458483 PCI: 00:15.3 read_resources bus 0 link: 0 done
1306 15:21:50.462467 PCI: 00:19.1 read_resources bus 0 link: 0
1307 15:21:50.468365 PCI: 00:19.1 read_resources bus 0 link: 0 done
1308 15:21:50.471693 PCI: 00:1e.3 read_resources bus 2 link: 0
1309 15:21:50.475097 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1310 15:21:50.481644 PCI: 00:1f.0 read_resources bus 0 link: 0
1311 15:21:50.484985 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1312 15:21:50.488267 PCI: 00:1f.2 read_resources bus 0 link: 0
1313 15:21:50.494886 GENERIC: 0.0 read_resources bus 0 link: 0
1314 15:21:50.498526 GENERIC: 0.0 read_resources bus 0 link: 0 done
1315 15:21:50.501524 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1316 15:21:50.508441 DOMAIN: 0000 read_resources bus 0 link: 0 done
1317 15:21:50.511838 Root Device read_resources bus 0 link: 0 done
1318 15:21:50.515459 Done reading resources.
1319 15:21:50.521540 Show resources in subtree (Root Device)...After reading.
1320 15:21:50.524876 Root Device child on link 0 CPU_CLUSTER: 0
1321 15:21:50.528261 CPU_CLUSTER: 0 child on link 0 APIC: 00
1322 15:21:50.531542 APIC: 00
1323 15:21:50.531928 APIC: 16
1324 15:21:50.532204 APIC: 10
1325 15:21:50.534988 APIC: 12
1326 15:21:50.535390 APIC: 14
1327 15:21:50.539267 APIC: 09
1328 15:21:50.539722 APIC: 01
1329 15:21:50.539997 APIC: 08
1330 15:21:50.544968 DOMAIN: 0000 child on link 0 GPIO: 0
1331 15:21:50.551941 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1332 15:21:50.561590 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1333 15:21:50.564871 GPIO: 0
1334 15:21:50.565269 PCI: 00:00.0
1335 15:21:50.575330 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1336 15:21:50.584880 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1337 15:21:50.594740 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1338 15:21:50.601690 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1339 15:21:50.611384 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1340 15:21:50.621406 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1341 15:21:50.630982 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1342 15:21:50.641324 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1343 15:21:50.651253 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1344 15:21:50.661334 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1345 15:21:50.668401 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1346 15:21:50.677992 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1347 15:21:50.688228 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1348 15:21:50.698092 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1349 15:21:50.707944 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1350 15:21:50.717545 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1351 15:21:50.724929 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1352 15:21:50.734082 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1353 15:21:50.743939 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1354 15:21:50.754250 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1355 15:21:50.764100 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1356 15:21:50.773977 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1357 15:21:50.783643 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1358 15:21:50.793789 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1359 15:21:50.804081 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1360 15:21:50.810445 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1361 15:21:50.820744 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1362 15:21:50.830268 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1363 15:21:50.833386 PCI: 00:02.0
1364 15:21:50.843569 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1365 15:21:50.853673 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1366 15:21:50.860356 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1367 15:21:50.866959 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1368 15:21:50.877190 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1369 15:21:50.877684 GENERIC: 0.0
1370 15:21:50.883669 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1371 15:21:50.890188 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1372 15:21:50.900032 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1373 15:21:50.910016 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1374 15:21:50.913639 PCI: 01:00.0
1375 15:21:50.923437 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1376 15:21:50.933147 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1377 15:21:50.933618 PCI: 00:08.0
1378 15:21:50.936642 PCI: 00:0a.0
1379 15:21:50.946554 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1380 15:21:50.949757 PCI: 00:0d.0 child on link 0 USB0 port 0
1381 15:21:50.960198 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1382 15:21:50.963689 USB0 port 0 child on link 0 USB3 port 0
1383 15:21:50.966705 USB3 port 0
1384 15:21:50.967193 USB3 port 1
1385 15:21:50.970034 USB3 port 2
1386 15:21:50.970529 USB3 port 3
1387 15:21:50.976790 PCI: 00:14.0 child on link 0 USB0 port 0
1388 15:21:50.986734 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1389 15:21:50.989871 USB0 port 0 child on link 0 USB2 port 0
1390 15:21:50.993341 USB2 port 0
1391 15:21:50.993788 USB2 port 1
1392 15:21:50.996763 USB2 port 2
1393 15:21:50.997252 USB2 port 3
1394 15:21:51.000170 USB2 port 4
1395 15:21:51.000549 USB2 port 5
1396 15:21:51.003397 USB2 port 6
1397 15:21:51.003775 USB2 port 7
1398 15:21:51.006484 USB2 port 8
1399 15:21:51.006866 USB2 port 9
1400 15:21:51.010032 USB3 port 0
1401 15:21:51.010379 USB3 port 1
1402 15:21:51.013214 USB3 port 2
1403 15:21:51.013560 USB3 port 3
1404 15:21:51.016482 PCI: 00:14.2
1405 15:21:51.026170 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1406 15:21:51.036170 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1407 15:21:51.040000 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1408 15:21:51.049581 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1409 15:21:51.052850 GENERIC: 0.0
1410 15:21:51.056122 PCI: 00:15.0 child on link 0 I2C: 00:1a
1411 15:21:51.066651 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1412 15:21:51.069986 I2C: 00:1a
1413 15:21:51.070462 I2C: 00:31
1414 15:21:51.070728 I2C: 00:32
1415 15:21:51.076929 PCI: 00:15.1 child on link 0 I2C: 00:50
1416 15:21:51.086607 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1417 15:21:51.087074 I2C: 00:50
1418 15:21:51.089827 PCI: 00:15.2
1419 15:21:51.093068 PCI: 00:15.3 child on link 0 I2C: 00:10
1420 15:21:51.103180 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1421 15:21:51.106507 I2C: 00:10
1422 15:21:51.106998 PCI: 00:16.0
1423 15:21:51.116331 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1424 15:21:51.120176 PCI: 00:19.0
1425 15:21:51.123248 PCI: 00:19.1 child on link 0 I2C: 00:15
1426 15:21:51.132880 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1427 15:21:51.133417 I2C: 00:15
1428 15:21:51.136172 I2C: 00:2c
1429 15:21:51.136676 PCI: 00:1e.0
1430 15:21:51.149556 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 15:21:51.152781 PCI: 00:1e.3 child on link 0 SPI: 00
1432 15:21:51.162898 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1433 15:21:51.163393 SPI: 00
1434 15:21:51.169733 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1435 15:21:51.176172 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1436 15:21:51.179577 PNP: 0c09.0
1437 15:21:51.186014 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1438 15:21:51.192656 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1439 15:21:51.199683 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1440 15:21:51.209268 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1441 15:21:51.216439 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1442 15:21:51.216929 GENERIC: 0.0
1443 15:21:51.219232 GENERIC: 1.0
1444 15:21:51.219615 PCI: 00:1f.3
1445 15:21:51.229155 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1446 15:21:51.239118 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1447 15:21:51.242231 PCI: 00:1f.5
1448 15:21:51.252421 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1449 15:21:51.259019 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1450 15:21:51.265567 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1451 15:21:51.269318 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1452 15:21:51.275857 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1453 15:21:51.279035 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1454 15:21:51.285772 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1455 15:21:51.292327 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1456 15:21:51.298962 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1457 15:21:51.305724 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1458 15:21:51.315464 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1459 15:21:51.318885 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1460 15:21:51.328595 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1461 15:21:51.335189 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1462 15:21:51.342131 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1463 15:21:51.345470 DOMAIN: 0000: Resource ranges:
1464 15:21:51.348880 * Base: 1000, Size: 800, Tag: 100
1465 15:21:51.352162 * Base: 1900, Size: e700, Tag: 100
1466 15:21:51.358625 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1467 15:21:51.365316 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1468 15:21:51.372445 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1469 15:21:51.378619 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1470 15:21:51.389223 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1471 15:21:51.395114 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1472 15:21:51.401839 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1473 15:21:51.411910 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1474 15:21:51.418603 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1475 15:21:51.425269 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1476 15:21:51.434929 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1477 15:21:51.441792 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1478 15:21:51.448513 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1479 15:21:51.459114 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1480 15:21:51.465252 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1481 15:21:51.471721 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1482 15:21:51.481523 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1483 15:21:51.488503 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1484 15:21:51.494635 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1485 15:21:51.504952 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1486 15:21:51.511331 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1487 15:21:51.517988 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1488 15:21:51.528504 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1489 15:21:51.534836 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1490 15:21:51.541480 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1491 15:21:51.547879 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1492 15:21:51.557869 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1493 15:21:51.564734 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1494 15:21:51.571212 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1495 15:21:51.581356 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1496 15:21:51.587702 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1497 15:21:51.594220 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1498 15:21:51.604773 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1499 15:21:51.607986 DOMAIN: 0000: Resource ranges:
1500 15:21:51.610993 * Base: 80400000, Size: 3fc00000, Tag: 200
1501 15:21:51.614310 * Base: d0000000, Size: 28000000, Tag: 200
1502 15:21:51.621058 * Base: fa000000, Size: 1000000, Tag: 200
1503 15:21:51.624460 * Base: fb001000, Size: 17ff000, Tag: 200
1504 15:21:51.627518 * Base: fe800000, Size: 300000, Tag: 200
1505 15:21:51.630861 * Base: feb80000, Size: 80000, Tag: 200
1506 15:21:51.637203 * Base: fed00000, Size: 40000, Tag: 200
1507 15:21:51.640769 * Base: fed70000, Size: 10000, Tag: 200
1508 15:21:51.643718 * Base: fed88000, Size: 8000, Tag: 200
1509 15:21:51.647294 * Base: fed93000, Size: d000, Tag: 200
1510 15:21:51.654028 * Base: feda2000, Size: 1e000, Tag: 200
1511 15:21:51.657396 * Base: fede0000, Size: 1220000, Tag: 200
1512 15:21:51.660680 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1513 15:21:51.670659 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1514 15:21:51.677430 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1515 15:21:51.680680 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1516 15:21:51.687293 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1517 15:21:51.693741 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1518 15:21:51.700642 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1519 15:21:51.707289 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1520 15:21:51.713935 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1521 15:21:51.720644 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1522 15:21:51.727162 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1523 15:21:51.734698 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1524 15:21:51.740178 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1525 15:21:51.747055 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1526 15:21:51.754183 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1527 15:21:51.760493 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1528 15:21:51.767232 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1529 15:21:51.773632 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1530 15:21:51.780353 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1531 15:21:51.786870 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1532 15:21:51.796715 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1533 15:21:51.803586 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1534 15:21:51.806705 PCI: 00:06.0: Resource ranges:
1535 15:21:51.809969 * Base: 80400000, Size: 100000, Tag: 200
1536 15:21:51.816809 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1537 15:21:51.823467 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1538 15:21:51.833511 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1539 15:21:51.840083 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1540 15:21:51.843426 Root Device assign_resources, bus 0 link: 0
1541 15:21:51.849508 DOMAIN: 0000 assign_resources, bus 0 link: 0
1542 15:21:51.856685 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1543 15:21:51.866491 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1544 15:21:51.873674 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1545 15:21:51.879759 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1546 15:21:51.886530 PCI: 00:04.0 assign_resources, bus 1 link: 0
1547 15:21:51.889739 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1548 15:21:51.899898 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1549 15:21:51.909942 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1550 15:21:51.916411 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1551 15:21:51.922906 PCI: 00:06.0 assign_resources, bus 1 link: 0
1552 15:21:51.929628 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1553 15:21:51.939599 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1554 15:21:51.942787 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1555 15:21:51.949514 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1556 15:21:51.959385 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1557 15:21:51.963095 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1558 15:21:51.969425 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1559 15:21:51.975890 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1560 15:21:51.979415 PCI: 00:14.0 assign_resources, bus 0 link: 0
1561 15:21:51.986089 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1562 15:21:51.992507 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1563 15:21:52.002473 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1564 15:21:52.009625 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1565 15:21:52.016105 PCI: 00:14.3 assign_resources, bus 0 link: 0
1566 15:21:52.019071 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1567 15:21:52.025821 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1568 15:21:52.032646 PCI: 00:15.0 assign_resources, bus 0 link: 0
1569 15:21:52.035948 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1570 15:21:52.045983 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1571 15:21:52.049201 PCI: 00:15.1 assign_resources, bus 0 link: 0
1572 15:21:52.055820 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1573 15:21:52.062530 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1574 15:21:52.066016 PCI: 00:15.3 assign_resources, bus 0 link: 0
1575 15:21:52.072141 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1576 15:21:52.079151 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1577 15:21:52.089377 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1578 15:21:52.092246 PCI: 00:19.1 assign_resources, bus 0 link: 0
1579 15:21:52.098774 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1580 15:21:52.105645 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1581 15:21:52.108902 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1582 15:21:52.115760 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1583 15:21:52.119117 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1584 15:21:52.125536 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1585 15:21:52.129072 LPC: Trying to open IO window from 800 size 1ff
1586 15:21:52.135631 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1587 15:21:52.145620 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1588 15:21:52.152157 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1589 15:21:52.159035 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1590 15:21:52.162141 Root Device assign_resources, bus 0 link: 0 done
1591 15:21:52.165602 Done setting resources.
1592 15:21:52.172345 Show resources in subtree (Root Device)...After assigning values.
1593 15:21:52.175616 Root Device child on link 0 CPU_CLUSTER: 0
1594 15:21:52.179012 CPU_CLUSTER: 0 child on link 0 APIC: 00
1595 15:21:52.182196 APIC: 00
1596 15:21:52.182691 APIC: 16
1597 15:21:52.185610 APIC: 10
1598 15:21:52.186127 APIC: 12
1599 15:21:52.186413 APIC: 14
1600 15:21:52.188832 APIC: 09
1601 15:21:52.189319 APIC: 01
1602 15:21:52.192435 APIC: 08
1603 15:21:52.195787 DOMAIN: 0000 child on link 0 GPIO: 0
1604 15:21:52.205441 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1605 15:21:52.212407 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1606 15:21:52.215531 GPIO: 0
1607 15:21:52.216007 PCI: 00:00.0
1608 15:21:52.225559 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1609 15:21:52.236188 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1610 15:21:52.245737 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1611 15:21:52.255813 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1612 15:21:52.262044 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1613 15:21:52.271902 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1614 15:21:52.281800 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1615 15:21:52.291564 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1616 15:21:52.301627 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1617 15:21:52.311601 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1618 15:21:52.321431 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1619 15:21:52.328396 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1620 15:21:52.338074 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1621 15:21:52.348400 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1622 15:21:52.358541 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1623 15:21:52.367982 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1624 15:21:52.377860 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1625 15:21:52.388012 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1626 15:21:52.398067 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1627 15:21:52.404505 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1628 15:21:52.414324 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1629 15:21:52.424429 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1630 15:21:52.434469 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1631 15:21:52.444294 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1632 15:21:52.454440 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1633 15:21:52.464423 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1634 15:21:52.471047 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1635 15:21:52.481327 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1636 15:21:52.484367 PCI: 00:02.0
1637 15:21:52.494224 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1638 15:21:52.504482 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1639 15:21:52.514457 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1640 15:21:52.517711 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1641 15:21:52.530864 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1642 15:21:52.531352 GENERIC: 0.0
1643 15:21:52.534210 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1644 15:21:52.544452 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1645 15:21:52.557821 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1646 15:21:52.567701 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1647 15:21:52.568196 PCI: 01:00.0
1648 15:21:52.580834 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1649 15:21:52.590709 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1650 15:21:52.591209 PCI: 00:08.0
1651 15:21:52.593960 PCI: 00:0a.0
1652 15:21:52.603905 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1653 15:21:52.607515 PCI: 00:0d.0 child on link 0 USB0 port 0
1654 15:21:52.617399 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1655 15:21:52.624110 USB0 port 0 child on link 0 USB3 port 0
1656 15:21:52.624640 USB3 port 0
1657 15:21:52.627265 USB3 port 1
1658 15:21:52.627652 USB3 port 2
1659 15:21:52.630213 USB3 port 3
1660 15:21:52.634039 PCI: 00:14.0 child on link 0 USB0 port 0
1661 15:21:52.644300 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1662 15:21:52.646828 USB0 port 0 child on link 0 USB2 port 0
1663 15:21:52.650341 USB2 port 0
1664 15:21:52.653503 USB2 port 1
1665 15:21:52.654028 USB2 port 2
1666 15:21:52.656927 USB2 port 3
1667 15:21:52.657422 USB2 port 4
1668 15:21:52.660343 USB2 port 5
1669 15:21:52.660832 USB2 port 6
1670 15:21:52.663787 USB2 port 7
1671 15:21:52.664274 USB2 port 8
1672 15:21:52.667037 USB2 port 9
1673 15:21:52.667525 USB3 port 0
1674 15:21:52.670529 USB3 port 1
1675 15:21:52.671016 USB3 port 2
1676 15:21:52.673998 USB3 port 3
1677 15:21:52.674483 PCI: 00:14.2
1678 15:21:52.687212 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1679 15:21:52.696871 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1680 15:21:52.700391 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1681 15:21:52.710068 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1682 15:21:52.713686 GENERIC: 0.0
1683 15:21:52.717011 PCI: 00:15.0 child on link 0 I2C: 00:1a
1684 15:21:52.726731 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1685 15:21:52.727188 I2C: 00:1a
1686 15:21:52.730078 I2C: 00:31
1687 15:21:52.730553 I2C: 00:32
1688 15:21:52.736666 PCI: 00:15.1 child on link 0 I2C: 00:50
1689 15:21:52.746738 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1690 15:21:52.747206 I2C: 00:50
1691 15:21:52.750277 PCI: 00:15.2
1692 15:21:52.753548 PCI: 00:15.3 child on link 0 I2C: 00:10
1693 15:21:52.763672 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1694 15:21:52.766925 I2C: 00:10
1695 15:21:52.767419 PCI: 00:16.0
1696 15:21:52.776972 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1697 15:21:52.780639 PCI: 00:19.0
1698 15:21:52.783890 PCI: 00:19.1 child on link 0 I2C: 00:15
1699 15:21:52.793470 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1700 15:21:52.796894 I2C: 00:15
1701 15:21:52.797381 I2C: 00:2c
1702 15:21:52.800302 PCI: 00:1e.0
1703 15:21:52.810088 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1704 15:21:52.813608 PCI: 00:1e.3 child on link 0 SPI: 00
1705 15:21:52.823534 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1706 15:21:52.826758 SPI: 00
1707 15:21:52.829940 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1708 15:21:52.839744 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1709 15:21:52.840242 PNP: 0c09.0
1710 15:21:52.850413 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1711 15:21:52.853608 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1712 15:21:52.864288 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1713 15:21:52.873582 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1714 15:21:52.876948 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1715 15:21:52.880197 GENERIC: 0.0
1716 15:21:52.880709 GENERIC: 1.0
1717 15:21:52.883678 PCI: 00:1f.3
1718 15:21:52.893823 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1719 15:21:52.903489 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1720 15:21:52.903982 PCI: 00:1f.5
1721 15:21:52.916630 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1722 15:21:52.917120 Done allocating resources.
1723 15:21:52.923601 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1724 15:21:52.930226 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1725 15:21:52.932891 Configure audio over I2S with MAX98373 NAU88L25B.
1726 15:21:52.938413 Enabling BT offload
1727 15:21:52.946319 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1728 15:21:52.949490 Enabling resources...
1729 15:21:52.952715 PCI: 00:00.0 subsystem <- 8086/4609
1730 15:21:52.956246 PCI: 00:00.0 cmd <- 06
1731 15:21:52.959481 PCI: 00:02.0 subsystem <- 8086/46b3
1732 15:21:52.962574 PCI: 00:02.0 cmd <- 03
1733 15:21:52.966057 PCI: 00:04.0 subsystem <- 8086/461d
1734 15:21:52.966546 PCI: 00:04.0 cmd <- 02
1735 15:21:52.969743 PCI: 00:06.0 bridge ctrl <- 0013
1736 15:21:52.972804 PCI: 00:06.0 subsystem <- 8086/464d
1737 15:21:52.976117 PCI: 00:06.0 cmd <- 106
1738 15:21:52.979430 PCI: 00:0a.0 subsystem <- 8086/467d
1739 15:21:52.983314 PCI: 00:0a.0 cmd <- 02
1740 15:21:52.986099 PCI: 00:0d.0 subsystem <- 8086/461e
1741 15:21:52.990150 PCI: 00:0d.0 cmd <- 02
1742 15:21:52.992909 PCI: 00:14.0 subsystem <- 8086/51ed
1743 15:21:52.996186 PCI: 00:14.0 cmd <- 02
1744 15:21:52.999518 PCI: 00:14.2 subsystem <- 8086/51ef
1745 15:21:53.000023 PCI: 00:14.2 cmd <- 02
1746 15:21:53.002666 PCI: 00:14.3 subsystem <- 8086/51f0
1747 15:21:53.006128 PCI: 00:14.3 cmd <- 02
1748 15:21:53.010002 PCI: 00:15.0 subsystem <- 8086/51e8
1749 15:21:53.012885 PCI: 00:15.0 cmd <- 02
1750 15:21:53.016092 PCI: 00:15.1 subsystem <- 8086/51e9
1751 15:21:53.019350 PCI: 00:15.1 cmd <- 06
1752 15:21:53.022875 PCI: 00:15.3 subsystem <- 8086/51eb
1753 15:21:53.026199 PCI: 00:15.3 cmd <- 02
1754 15:21:53.029345 PCI: 00:16.0 subsystem <- 8086/51e0
1755 15:21:53.029840 PCI: 00:16.0 cmd <- 02
1756 15:21:53.032801 PCI: 00:19.1 subsystem <- 8086/51c6
1757 15:21:53.036260 PCI: 00:19.1 cmd <- 02
1758 15:21:53.039253 PCI: 00:1e.0 subsystem <- 8086/51a8
1759 15:21:53.042367 PCI: 00:1e.0 cmd <- 06
1760 15:21:53.046066 PCI: 00:1e.3 subsystem <- 8086/51ab
1761 15:21:53.049204 PCI: 00:1e.3 cmd <- 02
1762 15:21:53.052267 PCI: 00:1f.0 subsystem <- 8086/5182
1763 15:21:53.056203 PCI: 00:1f.0 cmd <- 407
1764 15:21:53.059257 PCI: 00:1f.3 subsystem <- 8086/51c8
1765 15:21:53.059744 PCI: 00:1f.3 cmd <- 02
1766 15:21:53.062555 PCI: 00:1f.5 subsystem <- 8086/51a4
1767 15:21:53.065995 PCI: 00:1f.5 cmd <- 406
1768 15:21:53.069290 PCI: 01:00.0 cmd <- 02
1769 15:21:53.069774 done.
1770 15:21:53.075909 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1771 15:21:53.079298 ME: Version: Unavailable
1772 15:21:53.082663 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1773 15:21:53.085798 Initializing devices...
1774 15:21:53.089172 Root Device init
1775 15:21:53.089657 mainboard: EC init
1776 15:21:53.092542 Chrome EC: Set SMI mask to 0x0000000000000000
1777 15:21:53.099691 Chrome EC: clear events_b mask to 0x0000000000000000
1778 15:21:53.106798 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1779 15:21:53.113289 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1780 15:21:53.116466 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1781 15:21:53.122927 Chrome EC: Set WAKE mask to 0x0000000000000000
1782 15:21:53.126304 Root Device init finished in 35 msecs
1783 15:21:53.129639 PCI: 00:00.0 init
1784 15:21:53.133215 CPU TDP = 15 Watts
1785 15:21:53.133696 CPU PL1 = 15 Watts
1786 15:21:53.136502 CPU PL2 = 55 Watts
1787 15:21:53.140459 CPU PL4 = 123 Watts
1788 15:21:53.143085 PCI: 00:00.0 init finished in 8 msecs
1789 15:21:53.143502 PCI: 00:02.0 init
1790 15:21:53.146392 GMA: Found VBT in CBFS
1791 15:21:53.149463 GMA: Found valid VBT in CBFS
1792 15:21:53.156332 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1793 15:21:53.163180 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1794 15:21:53.166447 PCI: 00:02.0 init finished in 18 msecs
1795 15:21:53.169689 PCI: 00:06.0 init
1796 15:21:53.170218 Initializing PCH PCIe bridge.
1797 15:21:53.176447 PCI: 00:06.0 init finished in 3 msecs
1798 15:21:53.176933 PCI: 00:0a.0 init
1799 15:21:53.179921 PCI: 00:0a.0 init finished in 0 msecs
1800 15:21:53.183123 PCI: 00:14.0 init
1801 15:21:53.186387 PCI: 00:14.0 init finished in 0 msecs
1802 15:21:53.190003 PCI: 00:14.2 init
1803 15:21:53.193167 PCI: 00:14.2 init finished in 0 msecs
1804 15:21:53.193657 PCI: 00:15.0 init
1805 15:21:53.196258 I2C bus 0 version 0x3230302a
1806 15:21:53.200471 DW I2C bus 0 at 0x80655000 (400 KHz)
1807 15:21:53.203025 PCI: 00:15.0 init finished in 6 msecs
1808 15:21:53.206472 PCI: 00:15.1 init
1809 15:21:53.209680 I2C bus 1 version 0x3230302a
1810 15:21:53.213002 DW I2C bus 1 at 0x80656000 (400 KHz)
1811 15:21:53.216545 PCI: 00:15.1 init finished in 6 msecs
1812 15:21:53.219878 PCI: 00:15.3 init
1813 15:21:53.223175 I2C bus 3 version 0x3230302a
1814 15:21:53.226351 DW I2C bus 3 at 0x80657000 (400 KHz)
1815 15:21:53.229632 PCI: 00:15.3 init finished in 6 msecs
1816 15:21:53.230192 PCI: 00:16.0 init
1817 15:21:53.232981 PCI: 00:16.0 init finished in 0 msecs
1818 15:21:53.236481 PCI: 00:19.1 init
1819 15:21:53.239775 I2C bus 5 version 0x3230302a
1820 15:21:53.243136 DW I2C bus 5 at 0x80659000 (400 KHz)
1821 15:21:53.246602 PCI: 00:19.1 init finished in 6 msecs
1822 15:21:53.249860 PCI: 00:1f.0 init
1823 15:21:53.253258 IOAPIC: Initializing IOAPIC at 0xfec00000
1824 15:21:53.256233 IOAPIC: ID = 0x02
1825 15:21:53.256620 IOAPIC: Dumping registers
1826 15:21:53.259993 reg 0x0000: 0x02000000
1827 15:21:53.263224 reg 0x0001: 0x00770020
1828 15:21:53.266503 reg 0x0002: 0x00000000
1829 15:21:53.266986 IOAPIC: 120 interrupts
1830 15:21:53.273177 IOAPIC: Clearing IOAPIC at 0xfec00000
1831 15:21:53.276550 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1832 15:21:53.279872 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1833 15:21:53.286571 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1834 15:21:53.289773 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1835 15:21:53.296196 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1836 15:21:53.299571 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1837 15:21:53.306541 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1838 15:21:53.310025 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1839 15:21:53.313257 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1840 15:21:53.319625 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1841 15:21:53.323133 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1842 15:21:53.330038 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1843 15:21:53.333086 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1844 15:21:53.339385 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1845 15:21:53.342927 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1846 15:21:53.349775 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1847 15:21:53.352782 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1848 15:21:53.356361 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1849 15:21:53.362758 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1850 15:21:53.365982 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1851 15:21:53.373921 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1852 15:21:53.376406 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1853 15:21:53.383040 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1854 15:21:53.386356 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1855 15:21:53.393157 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1856 15:21:53.396546 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1857 15:21:53.399384 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1858 15:21:53.406085 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1859 15:21:53.409601 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1860 15:21:53.416000 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1861 15:21:53.419359 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1862 15:21:53.426023 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1863 15:21:53.429345 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1864 15:21:53.436307 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1865 15:21:53.439268 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1866 15:21:53.442529 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1867 15:21:53.449423 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1868 15:21:53.452989 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1869 15:21:53.459190 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1870 15:21:53.462458 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1871 15:21:53.469251 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1872 15:21:53.472695 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1873 15:21:53.476103 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1874 15:21:53.482623 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1875 15:21:53.486047 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1876 15:21:53.492776 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1877 15:21:53.495797 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1878 15:21:53.502689 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1879 15:21:53.505833 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1880 15:21:53.512809 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1881 15:21:53.515939 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1882 15:21:53.519494 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1883 15:21:53.525859 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1884 15:21:53.528803 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1885 15:21:53.535799 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1886 15:21:53.539004 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1887 15:21:53.545522 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1888 15:21:53.549049 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1889 15:21:53.556006 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1890 15:21:53.559083 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1891 15:21:53.562696 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1892 15:21:53.569069 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1893 15:21:53.572210 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1894 15:21:53.579036 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1895 15:21:53.582604 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1896 15:21:53.589148 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1897 15:21:53.592483 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1898 15:21:53.595782 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1899 15:21:53.602651 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1900 15:21:53.605936 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1901 15:21:53.612623 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1902 15:21:53.615397 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1903 15:21:53.622303 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1904 15:21:53.625439 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1905 15:21:53.632312 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1906 15:21:53.635528 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1907 15:21:53.638656 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1908 15:21:53.645718 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1909 15:21:53.648539 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1910 15:21:53.655327 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1911 15:21:53.658658 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1912 15:21:53.665198 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1913 15:21:53.668339 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1914 15:21:53.675231 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1915 15:21:53.678012 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1916 15:21:53.685041 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1917 15:21:53.688656 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1918 15:21:53.691817 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1919 15:21:53.698090 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1920 15:21:53.701490 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1921 15:21:53.708207 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1922 15:21:53.711661 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1923 15:21:53.718485 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1924 15:21:53.721660 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1925 15:21:53.728182 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1926 15:21:53.731401 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1927 15:21:53.734901 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1928 15:21:53.741452 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1929 15:21:53.744883 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1930 15:21:53.751568 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1931 15:21:53.754696 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1932 15:21:53.761608 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1933 15:21:53.764959 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1934 15:21:53.768408 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1935 15:21:53.774608 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1936 15:21:53.778033 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1937 15:21:53.784804 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1938 15:21:53.788268 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1939 15:21:53.794694 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1940 15:21:53.798528 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1941 15:21:53.804862 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1942 15:21:53.808307 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1943 15:21:53.811375 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1944 15:21:53.817951 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1945 15:21:53.821500 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1946 15:21:53.828076 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1947 15:21:53.831202 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1948 15:21:53.838226 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1949 15:21:53.841513 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1950 15:21:53.847827 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1951 15:21:53.851243 IOAPIC: Bootstrap Processor Local APIC = 0x00
1952 15:21:53.854689 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1953 15:21:53.861552 PCI: 00:1f.0 init finished in 607 msecs
1954 15:21:53.862114 PCI: 00:1f.2 init
1955 15:21:53.864432 apm_control: Disabling ACPI.
1956 15:21:53.870034 APMC done.
1957 15:21:53.873296 PCI: 00:1f.2 init finished in 7 msecs
1958 15:21:53.876750 PCI: 00:1f.3 init
1959 15:21:53.879992 PCI: 00:1f.3 init finished in 0 msecs
1960 15:21:53.880381 PCI: 01:00.0 init
1961 15:21:53.883139 PCI: 01:00.0 init finished in 0 msecs
1962 15:21:53.887032 PNP: 0c09.0 init
1963 15:21:53.890245 Google Chrome EC uptime: 9.289 seconds
1964 15:21:53.896617 Google Chrome AP resets since EC boot: 1
1965 15:21:53.900165 Google Chrome most recent AP reset causes:
1966 15:21:53.903541 0.343: 32775 shutdown: entering G3
1967 15:21:53.910011 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1968 15:21:53.913321 PNP: 0c09.0 init finished in 23 msecs
1969 15:21:53.916943 GENERIC: 0.0 init
1970 15:21:53.920031 GENERIC: 0.0 init finished in 0 msecs
1971 15:21:53.920520 GENERIC: 1.0 init
1972 15:21:53.923235 GENERIC: 1.0 init finished in 0 msecs
1973 15:21:53.926745 Devices initialized
1974 15:21:53.930273 Show all devs... After init.
1975 15:21:53.933564 Root Device: enabled 1
1976 15:21:53.934091 CPU_CLUSTER: 0: enabled 1
1977 15:21:53.936824 DOMAIN: 0000: enabled 1
1978 15:21:53.940247 GPIO: 0: enabled 1
1979 15:21:53.940633 PCI: 00:00.0: enabled 1
1980 15:21:53.943083 PCI: 00:01.0: enabled 0
1981 15:21:53.946551 PCI: 00:01.1: enabled 0
1982 15:21:53.949873 PCI: 00:02.0: enabled 1
1983 15:21:53.950388 PCI: 00:04.0: enabled 1
1984 15:21:53.953572 PCI: 00:05.0: enabled 0
1985 15:21:53.956661 PCI: 00:06.0: enabled 1
1986 15:21:53.960046 PCI: 00:06.2: enabled 0
1987 15:21:53.960533 PCI: 00:07.0: enabled 0
1988 15:21:53.963524 PCI: 00:07.1: enabled 0
1989 15:21:53.966320 PCI: 00:07.2: enabled 0
1990 15:21:53.970143 PCI: 00:07.3: enabled 0
1991 15:21:53.970638 PCI: 00:08.0: enabled 0
1992 15:21:53.973137 PCI: 00:09.0: enabled 0
1993 15:21:53.976457 PCI: 00:0a.0: enabled 1
1994 15:21:53.979585 PCI: 00:0d.0: enabled 1
1995 15:21:53.979959 PCI: 00:0d.1: enabled 0
1996 15:21:53.983128 PCI: 00:0d.2: enabled 0
1997 15:21:53.986004 PCI: 00:0d.3: enabled 0
1998 15:21:53.986285 PCI: 00:0e.0: enabled 0
1999 15:21:53.989408 PCI: 00:10.0: enabled 0
2000 15:21:53.993024 PCI: 00:10.1: enabled 0
2001 15:21:53.996300 PCI: 00:10.6: enabled 0
2002 15:21:53.996596 PCI: 00:10.7: enabled 0
2003 15:21:53.999787 PCI: 00:12.0: enabled 0
2004 15:21:54.003297 PCI: 00:12.6: enabled 0
2005 15:21:54.006478 PCI: 00:12.7: enabled 0
2006 15:21:54.006925 PCI: 00:13.0: enabled 0
2007 15:21:54.010012 PCI: 00:14.0: enabled 1
2008 15:21:54.013314 PCI: 00:14.1: enabled 0
2009 15:21:54.016624 PCI: 00:14.2: enabled 1
2010 15:21:54.017072 PCI: 00:14.3: enabled 1
2011 15:21:54.019816 PCI: 00:15.0: enabled 1
2012 15:21:54.023180 PCI: 00:15.1: enabled 1
2013 15:21:54.023625 PCI: 00:15.2: enabled 0
2014 15:21:54.026879 PCI: 00:15.3: enabled 1
2015 15:21:54.029487 PCI: 00:16.0: enabled 1
2016 15:21:54.032682 PCI: 00:16.1: enabled 0
2017 15:21:54.033020 PCI: 00:16.2: enabled 0
2018 15:21:54.036304 PCI: 00:16.3: enabled 0
2019 15:21:54.039648 PCI: 00:16.4: enabled 0
2020 15:21:54.043033 PCI: 00:16.5: enabled 0
2021 15:21:54.043521 PCI: 00:17.0: enabled 0
2022 15:21:54.046291 PCI: 00:19.0: enabled 0
2023 15:21:54.049368 PCI: 00:19.1: enabled 1
2024 15:21:54.052592 PCI: 00:19.2: enabled 0
2025 15:21:54.052936 PCI: 00:1a.0: enabled 0
2026 15:21:54.056441 PCI: 00:1c.0: enabled 0
2027 15:21:54.059891 PCI: 00:1c.1: enabled 0
2028 15:21:54.062687 PCI: 00:1c.2: enabled 0
2029 15:21:54.063147 PCI: 00:1c.3: enabled 0
2030 15:21:54.066034 PCI: 00:1c.4: enabled 0
2031 15:21:54.069434 PCI: 00:1c.5: enabled 0
2032 15:21:54.069933 PCI: 00:1c.6: enabled 0
2033 15:21:54.072747 PCI: 00:1c.7: enabled 0
2034 15:21:54.076080 PCI: 00:1d.0: enabled 0
2035 15:21:54.079521 PCI: 00:1d.1: enabled 0
2036 15:21:54.080000 PCI: 00:1d.2: enabled 0
2037 15:21:54.083125 PCI: 00:1d.3: enabled 0
2038 15:21:54.086401 PCI: 00:1e.0: enabled 1
2039 15:21:54.089661 PCI: 00:1e.1: enabled 0
2040 15:21:54.090173 PCI: 00:1e.2: enabled 0
2041 15:21:54.093087 PCI: 00:1e.3: enabled 1
2042 15:21:54.096568 PCI: 00:1f.0: enabled 1
2043 15:21:54.099604 PCI: 00:1f.1: enabled 0
2044 15:21:54.100082 PCI: 00:1f.2: enabled 1
2045 15:21:54.103269 PCI: 00:1f.3: enabled 1
2046 15:21:54.106457 PCI: 00:1f.4: enabled 0
2047 15:21:54.106935 PCI: 00:1f.5: enabled 1
2048 15:21:54.109650 PCI: 00:1f.6: enabled 0
2049 15:21:54.113262 PCI: 00:1f.7: enabled 0
2050 15:21:54.116217 GENERIC: 0.0: enabled 1
2051 15:21:54.116694 GENERIC: 0.0: enabled 1
2052 15:21:54.119648 GENERIC: 1.0: enabled 1
2053 15:21:54.123108 GENERIC: 0.0: enabled 1
2054 15:21:54.126905 GENERIC: 1.0: enabled 1
2055 15:21:54.127385 USB0 port 0: enabled 1
2056 15:21:54.129938 USB0 port 0: enabled 1
2057 15:21:54.132957 GENERIC: 0.0: enabled 1
2058 15:21:54.133436 I2C: 00:1a: enabled 1
2059 15:21:54.136756 I2C: 00:31: enabled 1
2060 15:21:54.139773 I2C: 00:32: enabled 1
2061 15:21:54.140151 I2C: 00:50: enabled 1
2062 15:21:54.143020 I2C: 00:10: enabled 1
2063 15:21:54.146404 I2C: 00:15: enabled 1
2064 15:21:54.147027 I2C: 00:2c: enabled 1
2065 15:21:54.149818 GENERIC: 0.0: enabled 1
2066 15:21:54.152910 SPI: 00: enabled 1
2067 15:21:54.153440 PNP: 0c09.0: enabled 1
2068 15:21:54.156137 GENERIC: 0.0: enabled 1
2069 15:21:54.159519 USB3 port 0: enabled 1
2070 15:21:54.163077 USB3 port 1: enabled 0
2071 15:21:54.163555 USB3 port 2: enabled 1
2072 15:21:54.166033 USB3 port 3: enabled 0
2073 15:21:54.169709 USB2 port 0: enabled 1
2074 15:21:54.170232 USB2 port 1: enabled 0
2075 15:21:54.172747 USB2 port 2: enabled 1
2076 15:21:54.176484 USB2 port 3: enabled 0
2077 15:21:54.179682 USB2 port 4: enabled 0
2078 15:21:54.180162 USB2 port 5: enabled 1
2079 15:21:54.183083 USB2 port 6: enabled 0
2080 15:21:54.186272 USB2 port 7: enabled 0
2081 15:21:54.186752 USB2 port 8: enabled 1
2082 15:21:54.189536 USB2 port 9: enabled 1
2083 15:21:54.192873 USB3 port 0: enabled 1
2084 15:21:54.193409 USB3 port 1: enabled 0
2085 15:21:54.196394 USB3 port 2: enabled 0
2086 15:21:54.199297 USB3 port 3: enabled 0
2087 15:21:54.203079 GENERIC: 0.0: enabled 1
2088 15:21:54.203564 GENERIC: 1.0: enabled 1
2089 15:21:54.206292 APIC: 00: enabled 1
2090 15:21:54.209373 APIC: 16: enabled 1
2091 15:21:54.209860 APIC: 10: enabled 1
2092 15:21:54.212909 APIC: 12: enabled 1
2093 15:21:54.213388 APIC: 14: enabled 1
2094 15:21:54.216463 APIC: 09: enabled 1
2095 15:21:54.219981 APIC: 01: enabled 1
2096 15:21:54.220460 APIC: 08: enabled 1
2097 15:21:54.222638 PCI: 01:00.0: enabled 1
2098 15:21:54.229850 BS: BS_DEV_INIT run times (exec / console): 9 / 1130 ms
2099 15:21:54.232681 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2100 15:21:54.236619 ELOG: NV offset 0xf20000 size 0x4000
2101 15:21:54.244009 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2102 15:21:54.250217 ELOG: Event(17) added with size 13 at 2023-07-14 15:21:54 UTC
2103 15:21:54.257141 ELOG: Event(92) added with size 9 at 2023-07-14 15:21:54 UTC
2104 15:21:54.264216 ELOG: Event(93) added with size 9 at 2023-07-14 15:21:54 UTC
2105 15:21:54.270551 ELOG: Event(9E) added with size 10 at 2023-07-14 15:21:54 UTC
2106 15:21:54.277407 ELOG: Event(9F) added with size 14 at 2023-07-14 15:21:54 UTC
2107 15:21:54.283993 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2108 15:21:54.290653 ELOG: Event(A1) added with size 10 at 2023-07-14 15:21:54 UTC
2109 15:21:54.297271 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
2110 15:21:54.303963 ELOG: Event(A0) added with size 9 at 2023-07-14 15:21:54 UTC
2111 15:21:54.307071 elog_add_boot_reason: Logged dev mode boot
2112 15:21:54.314022 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2113 15:21:54.317309 Finalize devices...
2114 15:21:54.317800 PCI: 00:16.0 final
2115 15:21:54.320581 PCI: 00:1f.2 final
2116 15:21:54.321068 GENERIC: 0.0 final
2117 15:21:54.327012 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2118 15:21:54.330579 GENERIC: 1.0 final
2119 15:21:54.337300 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2120 15:21:54.337797 Devices finalized
2121 15:21:54.343792 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2122 15:21:54.346975 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2123 15:21:54.353654 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2124 15:21:54.360442 ME: HFSTS1 : 0x80030045
2125 15:21:54.363643 ME: HFSTS2 : 0x30280116
2126 15:21:54.366714 ME: HFSTS3 : 0x00000050
2127 15:21:54.373369 ME: HFSTS4 : 0x00004000
2128 15:21:54.376864 ME: HFSTS5 : 0x00000000
2129 15:21:54.380604 ME: HFSTS6 : 0x00400006
2130 15:21:54.383403 ME: Manufacturing Mode : YES
2131 15:21:54.390320 ME: SPI Protection Mode Enabled : YES
2132 15:21:54.393581 ME: FPFs Committed : NO
2133 15:21:54.396955 ME: Manufacturing Vars Locked : NO
2134 15:21:54.400158 ME: FW Partition Table : OK
2135 15:21:54.403069 ME: Bringup Loader Failure : NO
2136 15:21:54.406668 ME: Firmware Init Complete : NO
2137 15:21:54.410129 ME: Boot Options Present : NO
2138 15:21:54.413241 ME: Update In Progress : NO
2139 15:21:54.420044 ME: D0i3 Support : YES
2140 15:21:54.423269 ME: Low Power State Enabled : NO
2141 15:21:54.426554 ME: CPU Replaced : YES
2142 15:21:54.429528 ME: CPU Replacement Valid : YES
2143 15:21:54.433415 ME: Current Working State : 5
2144 15:21:54.436621 ME: Current Operation State : 1
2145 15:21:54.439921 ME: Current Operation Mode : 3
2146 15:21:54.443156 ME: Error Code : 0
2147 15:21:54.446449 ME: Enhanced Debug Mode : NO
2148 15:21:54.453320 ME: CPU Debug Disabled : YES
2149 15:21:54.456429 ME: TXT Support : NO
2150 15:21:54.459642 ME: WP for RO is enabled : YES
2151 15:21:54.466396 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2152 15:21:54.473033 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2153 15:21:54.476532 Ramoops buffer: 0x100000@0x7689a000.
2154 15:21:54.479838 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2155 15:21:54.489657 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2156 15:21:54.493002 CBFS: 'fallback/slic' not found.
2157 15:21:54.496618 ACPI: Writing ACPI tables at 7686e000.
2158 15:21:54.497126 ACPI: * FACS
2159 15:21:54.499781 ACPI: * DSDT
2160 15:21:54.506219 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2161 15:21:54.509584 ACPI: * FADT
2162 15:21:54.510113 SCI is IRQ9
2163 15:21:54.512794 ACPI: added table 1/32, length now 40
2164 15:21:54.516296 ACPI: * SSDT
2165 15:21:54.522874 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2166 15:21:54.526270 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2167 15:21:54.532936 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2168 15:21:54.536226 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2169 15:21:54.543180 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2170 15:21:54.545967 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2171 15:21:54.552946 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2172 15:21:54.559819 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2173 15:21:54.563005 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2174 15:21:54.569313 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2175 15:21:54.572600 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2176 15:21:54.579385 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2177 15:21:54.582679 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2178 15:21:54.589503 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2179 15:21:54.596030 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2180 15:21:54.599407 PS2K: Passing 80 keymaps to kernel
2181 15:21:54.605898 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2182 15:21:54.612518 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2183 15:21:54.619488 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2184 15:21:54.625752 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2185 15:21:54.629358 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2186 15:21:54.635919 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2187 15:21:54.642491 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2188 15:21:54.649165 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2189 15:21:54.655860 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2190 15:21:54.662479 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2191 15:21:54.665537 ACPI: added table 2/32, length now 44
2192 15:21:54.666086 ACPI: * MCFG
2193 15:21:54.672402 ACPI: added table 3/32, length now 48
2194 15:21:54.672910 ACPI: * TPM2
2195 15:21:54.675347 TPM2 log created at 0x7685e000
2196 15:21:54.678756 ACPI: added table 4/32, length now 52
2197 15:21:54.682114 ACPI: * LPIT
2198 15:21:54.685597 ACPI: added table 5/32, length now 56
2199 15:21:54.686139 ACPI: * MADT
2200 15:21:54.689040 SCI is IRQ9
2201 15:21:54.692639 ACPI: added table 6/32, length now 60
2202 15:21:54.695650 cmd_reg from pmc_make_ipc_cmd 1052838
2203 15:21:54.702237 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2204 15:21:54.708923 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2205 15:21:54.715207 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2206 15:21:54.718642 PMC CrashLog size in discovery mode: 0xC00
2207 15:21:54.721956 cpu crashlog bar addr: 0x80640000
2208 15:21:54.725451 cpu discovery table offset: 0x6030
2209 15:21:54.728563 cpu_crashlog_discovery_table buffer count: 0x3
2210 15:21:54.735080 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2211 15:21:54.741758 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2212 15:21:54.748644 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2213 15:21:54.755032 PMC crashLog size in discovery mode : 0xC00
2214 15:21:54.761726 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2215 15:21:54.765015 discover mode PMC crashlog size adjusted to: 0x200
2216 15:21:54.771758 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2217 15:21:54.778270 discover mode PMC crashlog size adjusted to: 0x0
2218 15:21:54.781794 m_cpu_crashLog_size : 0x3480 bytes
2219 15:21:54.784919 CPU crashLog present.
2220 15:21:54.788342 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2221 15:21:54.795056 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2222 15:21:54.798277 current = 76877550
2223 15:21:54.798667 ACPI: * DMAR
2224 15:21:54.801536 ACPI: added table 7/32, length now 64
2225 15:21:54.808475 ACPI: added table 8/32, length now 68
2226 15:21:54.808965 ACPI: * HPET
2227 15:21:54.811626 ACPI: added table 9/32, length now 72
2228 15:21:54.814815 ACPI: done.
2229 15:21:54.815299 ACPI tables: 38528 bytes.
2230 15:21:54.818594 smbios_write_tables: 76858000
2231 15:21:54.822694 EC returned error result code 3
2232 15:21:54.826008 Couldn't obtain OEM name from CBI
2233 15:21:54.829493 Create SMBIOS type 16
2234 15:21:54.832915 Create SMBIOS type 17
2235 15:21:54.836275 Create SMBIOS type 20
2236 15:21:54.836769 GENERIC: 0.0 (WIFI Device)
2237 15:21:54.839384 SMBIOS tables: 2156 bytes.
2238 15:21:54.843204 Writing table forward entry at 0x00000500
2239 15:21:54.849390 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2240 15:21:54.852640 Writing coreboot table at 0x76892000
2241 15:21:54.859325 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2242 15:21:54.866026 1. 0000000000001000-000000000009ffff: RAM
2243 15:21:54.869197 2. 00000000000a0000-00000000000fffff: RESERVED
2244 15:21:54.872575 3. 0000000000100000-0000000076857fff: RAM
2245 15:21:54.879291 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2246 15:21:54.882625 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2247 15:21:54.889071 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2248 15:21:54.895851 7. 0000000077000000-00000000803fffff: RESERVED
2249 15:21:54.899197 8. 00000000c0000000-00000000cfffffff: RESERVED
2250 15:21:54.905694 9. 00000000f8000000-00000000f9ffffff: RESERVED
2251 15:21:54.909029 10. 00000000fb000000-00000000fb000fff: RESERVED
2252 15:21:54.912491 11. 00000000fc800000-00000000fe7fffff: RESERVED
2253 15:21:54.919060 12. 00000000feb00000-00000000feb7ffff: RESERVED
2254 15:21:54.922386 13. 00000000fec00000-00000000fecfffff: RESERVED
2255 15:21:54.928727 14. 00000000fed40000-00000000fed6ffff: RESERVED
2256 15:21:54.932385 15. 00000000fed80000-00000000fed87fff: RESERVED
2257 15:21:54.938890 16. 00000000fed90000-00000000fed92fff: RESERVED
2258 15:21:54.942220 17. 00000000feda0000-00000000feda1fff: RESERVED
2259 15:21:54.948923 18. 00000000fedc0000-00000000feddffff: RESERVED
2260 15:21:54.952026 19. 0000000100000000-000000027fbfffff: RAM
2261 15:21:54.955698 Passing 4 GPIOs to payload:
2262 15:21:54.958849 NAME | PORT | POLARITY | VALUE
2263 15:21:54.965817 lid | undefined | high | high
2264 15:21:54.968704 power | undefined | high | low
2265 15:21:54.975635 oprom | undefined | high | low
2266 15:21:54.982448 EC in RW | 0x00000151 | high | high
2267 15:21:54.982947 Board ID: 3
2268 15:21:54.985522 FW config: 0x131
2269 15:21:54.988653 Wrote coreboot table at: 0x76892000, 0x6a4 bytes, checksum 3454
2270 15:21:54.992120 coreboot table: 1724 bytes.
2271 15:21:54.995271 IMD ROOT 0. 0x76fff000 0x00001000
2272 15:21:55.002469 IMD SMALL 1. 0x76ffe000 0x00001000
2273 15:21:55.005336 FSP MEMORY 2. 0x76afe000 0x00500000
2274 15:21:55.008749 CONSOLE 3. 0x76ade000 0x00020000
2275 15:21:55.012321 RO MCACHE 4. 0x76add000 0x00000fd8
2276 15:21:55.015256 FMAP 5. 0x76adc000 0x0000064a
2277 15:21:55.018504 TIME STAMP 6. 0x76adb000 0x00000910
2278 15:21:55.022586 VBOOT WORK 7. 0x76ac7000 0x00014000
2279 15:21:55.025250 MEM INFO 8. 0x76ac6000 0x000003b8
2280 15:21:55.031835 ROMSTG STCK 9. 0x76ac5000 0x00001000
2281 15:21:55.035169 AFTER CAR 10. 0x76ab9000 0x0000c000
2282 15:21:55.038496 RAMSTAGE 11. 0x76a2f000 0x0008a000
2283 15:21:55.041577 ACPI BERT 12. 0x76a1f000 0x00010000
2284 15:21:55.045085 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2285 15:21:55.048639 REFCODE 14. 0x769af000 0x0006f000
2286 15:21:55.051612 SMM BACKUP 15. 0x7699f000 0x00010000
2287 15:21:55.058532 IGD OPREGION16. 0x7699a000 0x00004203
2288 15:21:55.061830 RAMOOPS 17. 0x7689a000 0x00100000
2289 15:21:55.065939 COREBOOT 18. 0x76892000 0x00008000
2290 15:21:55.068582 ACPI 19. 0x7686e000 0x00024000
2291 15:21:55.072141 TPM2 TCGLOG20. 0x7685e000 0x00010000
2292 15:21:55.074786 PMC CRASHLOG21. 0x7685d000 0x00000c00
2293 15:21:55.078569 CPU CRASHLOG22. 0x76859000 0x00003480
2294 15:21:55.081753 SMBIOS 23. 0x76858000 0x00001000
2295 15:21:55.085163 IMD small region:
2296 15:21:55.088259 IMD ROOT 0. 0x76ffec00 0x00000400
2297 15:21:55.091854 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2298 15:21:55.098368 POWER STATE 2. 0x76ffeb80 0x00000044
2299 15:21:55.101440 ROMSTAGE 3. 0x76ffeb60 0x00000004
2300 15:21:55.105154 ACPI GNVS 4. 0x76ffeb00 0x00000048
2301 15:21:55.108488 TYPE_C INFO 5. 0x76ffeae0 0x0000000c
2302 15:21:55.114992 BS: BS_WRITE_TABLES run times (exec / console): 7 / 620 ms
2303 15:21:55.118158 MTRR: Physical address space:
2304 15:21:55.124708 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2305 15:21:55.131507 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2306 15:21:55.134941 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2307 15:21:55.141368 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2308 15:21:55.148245 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2309 15:21:55.154638 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2310 15:21:55.161187 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2311 15:21:55.164671 MTRR: Fixed MSR 0x250 0x0606060606060606
2312 15:21:55.168042 MTRR: Fixed MSR 0x258 0x0606060606060606
2313 15:21:55.174581 MTRR: Fixed MSR 0x259 0x0000000000000000
2314 15:21:55.178734 MTRR: Fixed MSR 0x268 0x0606060606060606
2315 15:21:55.181223 MTRR: Fixed MSR 0x269 0x0606060606060606
2316 15:21:55.184801 MTRR: Fixed MSR 0x26a 0x0606060606060606
2317 15:21:55.191316 MTRR: Fixed MSR 0x26b 0x0606060606060606
2318 15:21:55.195396 MTRR: Fixed MSR 0x26c 0x0606060606060606
2319 15:21:55.198013 MTRR: Fixed MSR 0x26d 0x0606060606060606
2320 15:21:55.200901 MTRR: Fixed MSR 0x26e 0x0606060606060606
2321 15:21:55.207692 MTRR: Fixed MSR 0x26f 0x0606060606060606
2322 15:21:55.211102 call enable_fixed_mtrr()
2323 15:21:55.214527 CPU physical address size: 39 bits
2324 15:21:55.217728 MTRR: default type WB/UC MTRR counts: 6/6.
2325 15:21:55.221278 MTRR: UC selected as default type.
2326 15:21:55.227968 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2327 15:21:55.234957 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2328 15:21:55.241265 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2329 15:21:55.247533 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2330 15:21:55.253894 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2331 15:21:55.257666 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2332 15:21:55.265647 MTRR: Fixed MSR 0x250 0x0606060606060606
2333 15:21:55.268982 MTRR: Fixed MSR 0x258 0x0606060606060606
2334 15:21:55.272180 MTRR: Fixed MSR 0x259 0x0000000000000000
2335 15:21:55.275768 MTRR: Fixed MSR 0x268 0x0606060606060606
2336 15:21:55.282205 MTRR: Fixed MSR 0x269 0x0606060606060606
2337 15:21:55.285678 MTRR: Fixed MSR 0x26a 0x0606060606060606
2338 15:21:55.289402 MTRR: Fixed MSR 0x26b 0x0606060606060606
2339 15:21:55.292203 MTRR: Fixed MSR 0x26c 0x0606060606060606
2340 15:21:55.299227 MTRR: Fixed MSR 0x26d 0x0606060606060606
2341 15:21:55.301972 MTRR: Fixed MSR 0x26e 0x0606060606060606
2342 15:21:55.305446 MTRR: Fixed MSR 0x26f 0x0606060606060606
2343 15:21:55.308749 MTRR: Fixed MSR 0x250 0x0606060606060606
2344 15:21:55.312218 call enable_fixed_mtrr()
2345 15:21:55.315571 MTRR: Fixed MSR 0x250 0x0606060606060606
2346 15:21:55.321770 MTRR: Fixed MSR 0x250 0x0606060606060606
2347 15:21:55.325178 MTRR: Fixed MSR 0x250 0x0606060606060606
2348 15:21:55.328437 MTRR: Fixed MSR 0x258 0x0606060606060606
2349 15:21:55.331844 MTRR: Fixed MSR 0x259 0x0000000000000000
2350 15:21:55.338826 MTRR: Fixed MSR 0x268 0x0606060606060606
2351 15:21:55.341719 MTRR: Fixed MSR 0x269 0x0606060606060606
2352 15:21:55.344765 MTRR: Fixed MSR 0x250 0x0606060606060606
2353 15:21:55.348264 MTRR: Fixed MSR 0x258 0x0606060606060606
2354 15:21:55.355101 MTRR: Fixed MSR 0x259 0x0000000000000000
2355 15:21:55.358152 MTRR: Fixed MSR 0x268 0x0606060606060606
2356 15:21:55.361764 MTRR: Fixed MSR 0x269 0x0606060606060606
2357 15:21:55.365180 MTRR: Fixed MSR 0x250 0x0606060606060606
2358 15:21:55.372031 MTRR: Fixed MSR 0x258 0x0606060606060606
2359 15:21:55.375067 MTRR: Fixed MSR 0x259 0x0000000000000000
2360 15:21:55.378370 MTRR: Fixed MSR 0x268 0x0606060606060606
2361 15:21:55.381826 MTRR: Fixed MSR 0x269 0x0606060606060606
2362 15:21:55.385297 MTRR: Fixed MSR 0x26a 0x0606060606060606
2363 15:21:55.392428 MTRR: Fixed MSR 0x26b 0x0606060606060606
2364 15:21:55.395046 MTRR: Fixed MSR 0x26c 0x0606060606060606
2365 15:21:55.398322 MTRR: Fixed MSR 0x26d 0x0606060606060606
2366 15:21:55.401482 MTRR: Fixed MSR 0x26e 0x0606060606060606
2367 15:21:55.408092 MTRR: Fixed MSR 0x26f 0x0606060606060606
2368 15:21:55.411495 MTRR: Fixed MSR 0x258 0x0606060606060606
2369 15:21:55.415244 call enable_fixed_mtrr()
2370 15:21:55.418212 MTRR: Fixed MSR 0x259 0x0000000000000000
2371 15:21:55.421616 MTRR: Fixed MSR 0x268 0x0606060606060606
2372 15:21:55.424908 MTRR: Fixed MSR 0x269 0x0606060606060606
2373 15:21:55.428287 CPU physical address size: 39 bits
2374 15:21:55.434772 MTRR: Fixed MSR 0x26a 0x0606060606060606
2375 15:21:55.438434 CPU physical address size: 39 bits
2376 15:21:55.441597 MTRR: Fixed MSR 0x26b 0x0606060606060606
2377 15:21:55.444843 MTRR: Fixed MSR 0x26a 0x0606060606060606
2378 15:21:55.448302 MTRR: Fixed MSR 0x258 0x0606060606060606
2379 15:21:55.454493 MTRR: Fixed MSR 0x26a 0x0606060606060606
2380 15:21:55.457836 MTRR: Fixed MSR 0x26c 0x0606060606060606
2381 15:21:55.461739 MTRR: Fixed MSR 0x26d 0x0606060606060606
2382 15:21:55.464696 MTRR: Fixed MSR 0x26e 0x0606060606060606
2383 15:21:55.471328 MTRR: Fixed MSR 0x26f 0x0606060606060606
2384 15:21:55.474722 MTRR: Fixed MSR 0x259 0x0000000000000000
2385 15:21:55.478212 MTRR: Fixed MSR 0x258 0x0606060606060606
2386 15:21:55.481491 MTRR: Fixed MSR 0x268 0x0606060606060606
2387 15:21:55.488339 MTRR: Fixed MSR 0x269 0x0606060606060606
2388 15:21:55.491792 MTRR: Fixed MSR 0x259 0x0000000000000000
2389 15:21:55.494300 MTRR: Fixed MSR 0x268 0x0606060606060606
2390 15:21:55.497920 MTRR: Fixed MSR 0x269 0x0606060606060606
2391 15:21:55.501243 MTRR: Fixed MSR 0x26a 0x0606060606060606
2392 15:21:55.508662 MTRR: Fixed MSR 0x26b 0x0606060606060606
2393 15:21:55.511107 MTRR: Fixed MSR 0x26c 0x0606060606060606
2394 15:21:55.514716 MTRR: Fixed MSR 0x26d 0x0606060606060606
2395 15:21:55.517920 MTRR: Fixed MSR 0x26e 0x0606060606060606
2396 15:21:55.524543 MTRR: Fixed MSR 0x26f 0x0606060606060606
2397 15:21:55.525036 call enable_fixed_mtrr()
2398 15:21:55.527866 call enable_fixed_mtrr()
2399 15:21:55.530916 MTRR: Fixed MSR 0x26a 0x0606060606060606
2400 15:21:55.534502 CPU physical address size: 39 bits
2401 15:21:55.540995 CPU physical address size: 39 bits
2402 15:21:55.544691 MTRR: Fixed MSR 0x26b 0x0606060606060606
2403 15:21:55.547375 MTRR: Fixed MSR 0x26b 0x0606060606060606
2404 15:21:55.551213 MTRR: Fixed MSR 0x26c 0x0606060606060606
2405 15:21:55.554082 MTRR: Fixed MSR 0x26d 0x0606060606060606
2406 15:21:55.561161 MTRR: Fixed MSR 0x26e 0x0606060606060606
2407 15:21:55.564369 MTRR: Fixed MSR 0x26f 0x0606060606060606
2408 15:21:55.567586 MTRR: Fixed MSR 0x26b 0x0606060606060606
2409 15:21:55.571071 call enable_fixed_mtrr()
2410 15:21:55.574450 MTRR: Fixed MSR 0x26c 0x0606060606060606
2411 15:21:55.577466 MTRR: Fixed MSR 0x26d 0x0606060606060606
2412 15:21:55.584155 MTRR: Fixed MSR 0x26e 0x0606060606060606
2413 15:21:55.587297 MTRR: Fixed MSR 0x26f 0x0606060606060606
2414 15:21:55.590720 CPU physical address size: 39 bits
2415 15:21:55.593985 call enable_fixed_mtrr()
2416 15:21:55.597316 MTRR: Fixed MSR 0x26c 0x0606060606060606
2417 15:21:55.600539 CPU physical address size: 39 bits
2418 15:21:55.603674 MTRR: Fixed MSR 0x26d 0x0606060606060606
2419 15:21:55.607170 MTRR: Fixed MSR 0x26e 0x0606060606060606
2420 15:21:55.613816 MTRR: Fixed MSR 0x26f 0x0606060606060606
2421 15:21:55.616884 call enable_fixed_mtrr()
2422 15:21:55.620321 CPU physical address size: 39 bits
2423 15:21:55.623669
2424 15:21:55.624157 MTRR check
2425 15:21:55.627300 Fixed MTRRs : Enabled
2426 15:21:55.627688 Variable MTRRs: Enabled
2427 15:21:55.627961
2428 15:21:55.633815 BS: BS_WRITE_TABLES exit times (exec / console): 254 / 150 ms
2429 15:21:55.637046 Checking cr50 for pending updates
2430 15:21:55.649196 Reading cr50 TPM mode
2431 15:21:55.664234 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2432 15:21:55.674435 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2433 15:21:55.677672 Checking segment from ROM address 0xffc26dac
2434 15:21:55.681143 Checking segment from ROM address 0xffc26dc8
2435 15:21:55.687774 Loading segment from ROM address 0xffc26dac
2436 15:21:55.688262 code (compression=1)
2437 15:21:55.698115 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2438 15:21:55.704500 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2439 15:21:55.708146 using LZMA
2440 15:21:55.795997 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2441 15:21:55.802186 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2442 15:21:55.810022 Loading segment from ROM address 0xffc26dc8
2443 15:21:55.813817 Entry Point 0x30000000
2444 15:21:55.814346 Loaded segments
2445 15:21:55.820361 BS: BS_PAYLOAD_LOAD run times (exec / console): 86 / 62 ms
2446 15:21:55.826713 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2447 15:21:55.830214 Finalizing chipset.
2448 15:21:55.830707 apm_control: Finalizing SMM.
2449 15:21:55.833686 APMC done.
2450 15:21:55.836782 HECI: CSE device 16.0 is hidden
2451 15:21:55.840241 HECI: CSE device 16.1 is disabled
2452 15:21:55.843811 HECI: CSE device 16.2 is disabled
2453 15:21:55.846617 HECI: CSE device 16.3 is disabled
2454 15:21:55.850043 HECI: CSE device 16.4 is disabled
2455 15:21:55.853519 HECI: CSE device 16.5 is disabled
2456 15:21:55.856477 HECI: CSE device 16.0 is hidden
2457 15:21:55.863431 CSE is disabled, cannot send End-of-Post (EOP) message
2458 15:21:55.867187 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2459 15:21:55.870032 mp_park_aps done after 0 msecs.
2460 15:21:55.876446 Jumping to boot code at 0x30000000(0x76892000)
2461 15:21:55.886371 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2462 15:21:55.890050
2463 15:21:55.890534
2464 15:21:55.890836
2465 15:21:55.893479 Starting depthcharge on Volmar...
2466 15:21:55.893995
2467 15:21:55.894898 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
2468 15:21:55.895303 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2469 15:21:55.895618 Setting prompt string to ['brya:']
2470 15:21:55.895909 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:43)
2471 15:21:55.900655 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2472 15:21:55.901159
2473 15:21:55.906599 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2474 15:21:55.907098
2475 15:21:55.913124 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2476 15:21:55.913643
2477 15:21:55.916685 configure_storage: Failed to remap 1C:2
2478 15:21:55.917171
2479 15:21:55.919950 Wipe memory regions:
2480 15:21:55.920335
2481 15:21:55.923390 [0x00000000001000, 0x000000000a0000)
2482 15:21:55.923876
2483 15:21:55.926677 [0x00000000100000, 0x00000030000000)
2484 15:21:56.028926
2485 15:21:56.032235 [0x00000032668e60, 0x00000076858000)
2486 15:21:56.176641
2487 15:21:56.179570 [0x00000100000000, 0x0000027fc00000)
2488 15:21:56.989972
2489 15:21:56.993102 ec_init: CrosEC protocol v3 supported (256, 256)
2490 15:21:57.601626
2491 15:21:57.602157 R8152: Initializing
2492 15:21:57.602444
2493 15:21:57.605309 Version 9 (ocp_data = 6010)
2494 15:21:57.605690
2495 15:21:57.608330 R8152: Done initializing
2496 15:21:57.608827
2497 15:21:57.611170 Adding net device
2498 15:21:57.912835
2499 15:21:57.915934 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2500 15:21:57.916429
2501 15:21:57.916706
2502 15:21:57.916950
2503 15:21:57.917543 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2505 15:21:58.018602 brya: tftpboot 192.168.201.1 11088583/tftp-deploy-v1iatjrd/kernel/bzImage 11088583/tftp-deploy-v1iatjrd/kernel/cmdline 11088583/tftp-deploy-v1iatjrd/ramdisk/ramdisk.cpio.gz
2506 15:21:58.019182 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2507 15:21:58.019592 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2508 15:21:58.024022 tftpboot 192.168.201.1 11088583/tftp-deploy-v1iatjrd/kernel/bzIploy-v1iatjrd/kernel/cmdline 11088583/tftp-deploy-v1iatjrd/ramdisk/ramdisk.cpio.gz
2509 15:21:58.024198
2510 15:21:58.024291 Waiting for link
2511 15:21:58.226604
2512 15:21:58.227092 done.
2513 15:21:58.227372
2514 15:21:58.227613 MAC: 00:e0:4c:68:02:a7
2515 15:21:58.227838
2516 15:21:58.229710 Sending DHCP discover... done.
2517 15:21:58.230122
2518 15:21:58.233114 Waiting for reply... done.
2519 15:21:58.233616
2520 15:21:58.236889 Sending DHCP request... done.
2521 15:21:58.237386
2522 15:21:58.239702 Waiting for reply... done.
2523 15:21:58.240085
2524 15:21:58.243213 My ip is 192.168.201.15
2525 15:21:58.243708
2526 15:21:58.246397 The DHCP server ip is 192.168.201.1
2527 15:21:58.246782
2528 15:21:58.250042 TFTP server IP predefined by user: 192.168.201.1
2529 15:21:58.250534
2530 15:21:58.256632 Bootfile predefined by user: 11088583/tftp-deploy-v1iatjrd/kernel/bzImage
2531 15:21:58.257122
2532 15:21:58.260322 Sending tftp read request... done.
2533 15:21:58.260809
2534 15:21:58.267737 Waiting for the transfer...
2535 15:21:58.268208
2536 15:21:58.495211 00000000 ################################################################
2537 15:21:58.495321
2538 15:21:58.723922 00080000 ################################################################
2539 15:21:58.724044
2540 15:21:58.952026 00100000 ################################################################
2541 15:21:58.952130
2542 15:21:59.179873 00180000 ################################################################
2543 15:21:59.179980
2544 15:21:59.408667 00200000 ################################################################
2545 15:21:59.408792
2546 15:21:59.637079 00280000 ################################################################
2547 15:21:59.637194
2548 15:21:59.864381 00300000 ################################################################
2549 15:21:59.864484
2550 15:22:00.089623 00380000 ################################################################
2551 15:22:00.089740
2552 15:22:00.315975 00400000 ################################################################
2553 15:22:00.316086
2554 15:22:00.542014 00480000 ################################################################
2555 15:22:00.542134
2556 15:22:00.769289 00500000 ################################################################
2557 15:22:00.769399
2558 15:22:00.996845 00580000 ################################################################
2559 15:22:00.996951
2560 15:22:01.225266 00600000 ################################################################
2561 15:22:01.225369
2562 15:22:01.452683 00680000 ################################################################
2563 15:22:01.452819
2564 15:22:01.680245 00700000 ################################################################
2565 15:22:01.680369
2566 15:22:01.907608 00780000 ################################################################
2567 15:22:01.907709
2568 15:22:02.132285 00800000 ################################################################
2569 15:22:02.132404
2570 15:22:02.360537 00880000 ################################################################
2571 15:22:02.360639
2572 15:22:02.588261 00900000 ################################################################
2573 15:22:02.588386
2574 15:22:02.815992 00980000 ################################################################
2575 15:22:02.816118
2576 15:22:02.980297 00a00000 ############################################### done.
2577 15:22:02.980392
2578 15:22:02.983892 The bootfile was 10863104 bytes long.
2579 15:22:02.983964
2580 15:22:02.986892 Sending tftp read request... done.
2581 15:22:02.986967
2582 15:22:02.990080 Waiting for the transfer...
2583 15:22:02.990137
2584 15:22:03.218397 00000000 ################################################################
2585 15:22:03.218507
2586 15:22:03.445511 00080000 ################################################################
2587 15:22:03.445640
2588 15:22:03.671734 00100000 ################################################################
2589 15:22:03.671862
2590 15:22:03.898847 00180000 ################################################################
2591 15:22:03.898957
2592 15:22:04.127868 00200000 ################################################################
2593 15:22:04.128001
2594 15:22:04.354672 00280000 ################################################################
2595 15:22:04.354772
2596 15:22:04.581709 00300000 ################################################################
2597 15:22:04.581837
2598 15:22:04.808576 00380000 ################################################################
2599 15:22:04.808680
2600 15:22:05.035700 00400000 ################################################################
2601 15:22:05.035805
2602 15:22:05.262820 00480000 ################################################################
2603 15:22:05.262939
2604 15:22:05.489476 00500000 ################################################################
2605 15:22:05.489590
2606 15:22:05.716343 00580000 ################################################################
2607 15:22:05.716456
2608 15:22:05.943158 00600000 ################################################################
2609 15:22:05.943273
2610 15:22:06.169158 00680000 ################################################################
2611 15:22:06.169279
2612 15:22:06.395975 00700000 ################################################################
2613 15:22:06.396082
2614 15:22:06.623067 00780000 ################################################################
2615 15:22:06.623208
2616 15:22:06.846148 00800000 ################################################################
2617 15:22:06.846252
2618 15:22:06.976144 00880000 ###################################### done.
2619 15:22:06.976238
2620 15:22:06.979395 Sending tftp read request... done.
2621 15:22:06.979478
2622 15:22:06.982916 Waiting for the transfer...
2623 15:22:06.982991
2624 15:22:06.983043 00000000 # done.
2625 15:22:06.983091
2626 15:22:06.992891 Command line loaded dynamically from TFTP file: 11088583/tftp-deploy-v1iatjrd/kernel/cmdline
2627 15:22:06.993289
2628 15:22:07.006448 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2629 15:22:07.012574
2630 15:22:07.016129 Shutting down all USB controllers.
2631 15:22:07.016580
2632 15:22:07.016850 Removing current net device
2633 15:22:07.017078
2634 15:22:07.019017 Finalizing coreboot
2635 15:22:07.019371
2636 15:22:07.025609 Exiting depthcharge with code 4 at timestamp: 21012032
2637 15:22:07.026105
2638 15:22:07.026382
2639 15:22:07.026603 Starting kernel ...
2640 15:22:07.026821
2641 15:22:07.027028
2642 15:22:07.027931 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2643 15:22:07.028287 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2644 15:22:07.028557 Setting prompt string to ['Linux version [0-9]']
2645 15:22:07.028799 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2646 15:22:07.029044 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2648 15:26:39.029138 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2650 15:26:39.030048 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2652 15:26:39.030664 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2655 15:26:39.031707 end: 2 depthcharge-action (duration 00:05:00) [common]
2657 15:26:39.032523 Cleaning after the job
2658 15:26:39.032658 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11088583/tftp-deploy-v1iatjrd/ramdisk
2659 15:26:39.033533 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11088583/tftp-deploy-v1iatjrd/kernel
2660 15:26:39.034549 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11088583/tftp-deploy-v1iatjrd/modules
2661 15:26:39.034970 start: 5.1 power-off (timeout 00:00:30) [common]
2662 15:26:39.035107 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-2' '--port=1' '--command=off'
2663 15:26:39.113609 >> Command sent successfully.
2664 15:26:39.121165 Returned 0 in 0 seconds
2665 15:26:39.222238 end: 5.1 power-off (duration 00:00:00) [common]
2667 15:26:39.223528 start: 5.2 read-feedback (timeout 00:10:00) [common]
2668 15:26:39.224327 Listened to connection for namespace 'common' for up to 1s
2670 15:26:39.225306 Listened to connection for namespace 'common' for up to 1s
2671 15:26:40.225244 Finalising connection for namespace 'common'
2672 15:26:40.225800 Disconnecting from shell: Finalise
2673 15:26:40.226130
2674 15:26:40.327019 end: 5.2 read-feedback (duration 00:00:01) [common]
2675 15:26:40.327530 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11088583
2676 15:26:40.343314 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11088583
2677 15:26:40.343512 JobError: Your job cannot terminate cleanly.