Boot log: asus-cx9400-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 00:01:06.409752 lava-dispatcher, installed at version: 2023.06
2 00:01:06.409967 start: 0 validate
3 00:01:06.410105 Start time: 2023-09-29 00:01:06.410098+00:00 (UTC)
4 00:01:06.410230 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:01:06.410439 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 00:01:06.681725 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:01:06.682557 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.295-cip103%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:01:11.188959 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:01:11.189720 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 00:01:11.457979 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:01:11.458299 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.295-cip103%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:01:12.466631 validate duration: 6.06
14 00:01:12.467227 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:01:12.467439 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:01:12.467630 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:01:12.467866 Not decompressing ramdisk as can be used compressed.
18 00:01:12.468059 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 00:01:12.468217 saving as /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/ramdisk/initrd.cpio.gz
20 00:01:12.468372 total size: 5671549 (5 MB)
21 00:01:12.470864 progress 0 % (0 MB)
22 00:01:12.473719 progress 5 % (0 MB)
23 00:01:12.476809 progress 10 % (0 MB)
24 00:01:12.479437 progress 15 % (0 MB)
25 00:01:12.482655 progress 20 % (1 MB)
26 00:01:12.485751 progress 25 % (1 MB)
27 00:01:12.488576 progress 30 % (1 MB)
28 00:01:12.491614 progress 35 % (1 MB)
29 00:01:12.494664 progress 40 % (2 MB)
30 00:01:12.497427 progress 45 % (2 MB)
31 00:01:12.500553 progress 50 % (2 MB)
32 00:01:12.503600 progress 55 % (3 MB)
33 00:01:12.505104 progress 60 % (3 MB)
34 00:01:12.506630 progress 65 % (3 MB)
35 00:01:12.508255 progress 70 % (3 MB)
36 00:01:12.509633 progress 75 % (4 MB)
37 00:01:12.511267 progress 80 % (4 MB)
38 00:01:12.512859 progress 85 % (4 MB)
39 00:01:12.514228 progress 90 % (4 MB)
40 00:01:12.515862 progress 95 % (5 MB)
41 00:01:12.517406 progress 100 % (5 MB)
42 00:01:12.517516 5 MB downloaded in 0.05 s (110.06 MB/s)
43 00:01:12.517673 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:01:12.517905 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:01:12.517990 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:01:12.518072 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:01:12.518226 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.295-cip103/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 00:01:12.518316 saving as /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/kernel/bzImage
50 00:01:12.518424 total size: 11473408 (10 MB)
51 00:01:12.518486 No compression specified
52 00:01:12.519671 progress 0 % (0 MB)
53 00:01:12.522825 progress 5 % (0 MB)
54 00:01:12.525936 progress 10 % (1 MB)
55 00:01:12.528932 progress 15 % (1 MB)
56 00:01:12.532005 progress 20 % (2 MB)
57 00:01:12.534908 progress 25 % (2 MB)
58 00:01:12.538098 progress 30 % (3 MB)
59 00:01:12.541036 progress 35 % (3 MB)
60 00:01:12.544102 progress 40 % (4 MB)
61 00:01:12.546967 progress 45 % (4 MB)
62 00:01:12.550033 progress 50 % (5 MB)
63 00:01:12.552950 progress 55 % (6 MB)
64 00:01:12.556048 progress 60 % (6 MB)
65 00:01:12.558937 progress 65 % (7 MB)
66 00:01:12.562110 progress 70 % (7 MB)
67 00:01:12.564976 progress 75 % (8 MB)
68 00:01:12.567975 progress 80 % (8 MB)
69 00:01:12.570775 progress 85 % (9 MB)
70 00:01:12.573785 progress 90 % (9 MB)
71 00:01:12.576618 progress 95 % (10 MB)
72 00:01:12.579598 progress 100 % (10 MB)
73 00:01:12.579719 10 MB downloaded in 0.06 s (178.52 MB/s)
74 00:01:12.579906 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:01:12.580135 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:01:12.580220 start: 1.3 download-retry (timeout 00:10:00) [common]
78 00:01:12.580308 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 00:01:12.580429 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 00:01:12.580497 saving as /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/nfsrootfs/full.rootfs.tar
81 00:01:12.580557 total size: 126031368 (120 MB)
82 00:01:12.580618 Using unxz to decompress xz
83 00:01:12.584934 progress 0 % (0 MB)
84 00:01:13.071257 progress 5 % (6 MB)
85 00:01:13.558114 progress 10 % (12 MB)
86 00:01:14.049797 progress 15 % (18 MB)
87 00:01:14.553459 progress 20 % (24 MB)
88 00:01:14.891692 progress 25 % (30 MB)
89 00:01:15.225748 progress 30 % (36 MB)
90 00:01:15.488635 progress 35 % (42 MB)
91 00:01:15.668173 progress 40 % (48 MB)
92 00:01:16.028751 progress 45 % (54 MB)
93 00:01:16.396470 progress 50 % (60 MB)
94 00:01:16.730696 progress 55 % (66 MB)
95 00:01:17.081813 progress 60 % (72 MB)
96 00:01:17.413426 progress 65 % (78 MB)
97 00:01:17.795542 progress 70 % (84 MB)
98 00:01:18.203609 progress 75 % (90 MB)
99 00:01:18.613467 progress 80 % (96 MB)
100 00:01:18.710688 progress 85 % (102 MB)
101 00:01:18.865618 progress 90 % (108 MB)
102 00:01:19.201649 progress 95 % (114 MB)
103 00:01:19.571611 progress 100 % (120 MB)
104 00:01:19.576508 120 MB downloaded in 7.00 s (17.18 MB/s)
105 00:01:19.576765 end: 1.3.1 http-download (duration 00:00:07) [common]
107 00:01:19.577028 end: 1.3 download-retry (duration 00:00:07) [common]
108 00:01:19.577122 start: 1.4 download-retry (timeout 00:09:53) [common]
109 00:01:19.577211 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 00:01:19.577370 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.295-cip103/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 00:01:19.577441 saving as /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/modules/modules.tar
112 00:01:19.577503 total size: 484416 (0 MB)
113 00:01:19.577570 Using unxz to decompress xz
114 00:01:19.581741 progress 6 % (0 MB)
115 00:01:19.582148 progress 13 % (0 MB)
116 00:01:19.582386 progress 20 % (0 MB)
117 00:01:19.584069 progress 27 % (0 MB)
118 00:01:19.586096 progress 33 % (0 MB)
119 00:01:19.587950 progress 40 % (0 MB)
120 00:01:19.589996 progress 47 % (0 MB)
121 00:01:19.592036 progress 54 % (0 MB)
122 00:01:19.594063 progress 60 % (0 MB)
123 00:01:19.596559 progress 67 % (0 MB)
124 00:01:19.598583 progress 74 % (0 MB)
125 00:01:19.600821 progress 81 % (0 MB)
126 00:01:19.602906 progress 87 % (0 MB)
127 00:01:19.604668 progress 94 % (0 MB)
128 00:01:19.606884 progress 100 % (0 MB)
129 00:01:19.613072 0 MB downloaded in 0.04 s (12.99 MB/s)
130 00:01:19.613313 end: 1.4.1 http-download (duration 00:00:00) [common]
132 00:01:19.613569 end: 1.4 download-retry (duration 00:00:00) [common]
133 00:01:19.613663 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 00:01:19.613758 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 00:01:22.539587 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11637360/extract-nfsrootfs-h67n3os1
136 00:01:22.539829 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 00:01:22.539930 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 00:01:22.540095 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr
139 00:01:22.540226 makedir: /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin
140 00:01:22.540329 makedir: /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/tests
141 00:01:22.540427 makedir: /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/results
142 00:01:22.540528 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-add-keys
143 00:01:22.540673 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-add-sources
144 00:01:22.540804 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-background-process-start
145 00:01:22.540933 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-background-process-stop
146 00:01:22.541059 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-common-functions
147 00:01:22.541187 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-echo-ipv4
148 00:01:22.541313 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-install-packages
149 00:01:22.541439 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-installed-packages
150 00:01:22.541561 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-os-build
151 00:01:22.541685 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-probe-channel
152 00:01:22.541812 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-probe-ip
153 00:01:22.541955 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-target-ip
154 00:01:22.542092 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-target-mac
155 00:01:22.542216 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-target-storage
156 00:01:22.542341 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-test-case
157 00:01:22.542467 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-test-event
158 00:01:22.542591 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-test-feedback
159 00:01:22.542715 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-test-raise
160 00:01:22.542838 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-test-reference
161 00:01:22.542963 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-test-runner
162 00:01:22.543087 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-test-set
163 00:01:22.543211 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-test-shell
164 00:01:22.543336 Updating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-install-packages (oe)
165 00:01:22.543487 Updating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/bin/lava-installed-packages (oe)
166 00:01:22.543609 Creating /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/environment
167 00:01:22.543705 LAVA metadata
168 00:01:22.543823 - LAVA_JOB_ID=11637360
169 00:01:22.543886 - LAVA_DISPATCHER_IP=192.168.201.1
170 00:01:22.543986 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 00:01:22.544051 skipped lava-vland-overlay
172 00:01:22.544124 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 00:01:22.544201 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 00:01:22.544260 skipped lava-multinode-overlay
175 00:01:22.544331 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 00:01:22.544407 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 00:01:22.544480 Loading test definitions
178 00:01:22.544566 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
179 00:01:22.544637 Using /lava-11637360 at stage 0
180 00:01:22.544741 Fetching tests from https://github.com/kernelci/test-definitions
181 00:01:22.544819 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/0/tests/0_ltp-ipc'
182 00:01:27.800764 Running '/usr/bin/git checkout kernelci.org
183 00:01:27.948670 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 00:01:27.949478 uuid=11637360_1.5.2.3.1 testdef=None
185 00:01:27.949645 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
187 00:01:27.949919 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
188 00:01:27.950794 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 00:01:27.951031 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
191 00:01:27.952181 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 00:01:27.952461 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
194 00:01:27.953516 runner path: /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/0/tests/0_ltp-ipc test_uuid 11637360_1.5.2.3.1
195 00:01:27.953609 SKIPFILE='skipfile-lkft.yaml'
196 00:01:27.953698 SKIP_INSTALL='true'
197 00:01:27.953763 TST_CMDFILES='ipc'
198 00:01:27.953911 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 00:01:27.954123 Creating lava-test-runner.conf files
201 00:01:27.954205 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11637360/lava-overlay-us6o9jsr/lava-11637360/0 for stage 0
202 00:01:27.954333 - 0_ltp-ipc
203 00:01:27.954441 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
204 00:01:27.954532 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
205 00:01:35.452233 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
206 00:01:35.452389 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
207 00:01:35.452483 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 00:01:35.452584 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
209 00:01:35.452675 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
210 00:01:35.597444 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 00:01:35.597854 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
212 00:01:35.597975 extracting modules file /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11637360/extract-nfsrootfs-h67n3os1
213 00:01:35.618966 extracting modules file /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11637360/extract-overlay-ramdisk-tsckxfna/ramdisk
214 00:01:35.639936 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 00:01:35.640091 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
216 00:01:35.640185 [common] Applying overlay to NFS
217 00:01:35.640257 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11637360/compress-overlay-i39hd9p8/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11637360/extract-nfsrootfs-h67n3os1
218 00:01:36.561974 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 00:01:36.562141 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
220 00:01:36.562240 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 00:01:36.562328 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
222 00:01:36.562411 Building ramdisk /var/lib/lava/dispatcher/tmp/11637360/extract-overlay-ramdisk-tsckxfna/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11637360/extract-overlay-ramdisk-tsckxfna/ramdisk
223 00:01:36.655578 >> 31372 blocks
224 00:01:37.272670 rename /var/lib/lava/dispatcher/tmp/11637360/extract-overlay-ramdisk-tsckxfna/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/ramdisk/ramdisk.cpio.gz
225 00:01:37.273128 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 00:01:37.273252 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
227 00:01:37.273353 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
228 00:01:37.273444 No mkimage arch provided, not using FIT.
229 00:01:37.273538 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 00:01:37.273624 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 00:01:37.273733 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
232 00:01:37.273824 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
233 00:01:37.273909 No LXC device requested
234 00:01:37.273986 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 00:01:37.274073 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
236 00:01:37.274156 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 00:01:37.274226 Checking files for TFTP limit of 4294967296 bytes.
238 00:01:37.274637 end: 1 tftp-deploy (duration 00:00:25) [common]
239 00:01:37.274743 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 00:01:37.274835 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 00:01:37.274971 substitutions:
242 00:01:37.275041 - {DTB}: None
243 00:01:37.275106 - {INITRD}: 11637360/tftp-deploy-y61gq6kf/ramdisk/ramdisk.cpio.gz
244 00:01:37.275166 - {KERNEL}: 11637360/tftp-deploy-y61gq6kf/kernel/bzImage
245 00:01:37.275224 - {LAVA_MAC}: None
246 00:01:37.275283 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11637360/extract-nfsrootfs-h67n3os1
247 00:01:37.275343 - {NFS_SERVER_IP}: 192.168.201.1
248 00:01:37.275400 - {PRESEED_CONFIG}: None
249 00:01:37.275456 - {PRESEED_LOCAL}: None
250 00:01:37.275512 - {RAMDISK}: 11637360/tftp-deploy-y61gq6kf/ramdisk/ramdisk.cpio.gz
251 00:01:37.275568 - {ROOT_PART}: None
252 00:01:37.275624 - {ROOT}: None
253 00:01:37.275679 - {SERVER_IP}: 192.168.201.1
254 00:01:37.275762 - {TEE}: None
255 00:01:37.275832 Parsed boot commands:
256 00:01:37.275887 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 00:01:37.276072 Parsed boot commands: tftpboot 192.168.201.1 11637360/tftp-deploy-y61gq6kf/kernel/bzImage 11637360/tftp-deploy-y61gq6kf/kernel/cmdline 11637360/tftp-deploy-y61gq6kf/ramdisk/ramdisk.cpio.gz
258 00:01:37.276163 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 00:01:37.276253 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 00:01:37.276349 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 00:01:37.276437 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 00:01:37.276508 Not connected, no need to disconnect.
263 00:01:37.276583 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 00:01:37.276668 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 00:01:37.276736 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-13'
266 00:01:37.280827 Setting prompt string to ['lava-test: # ']
267 00:01:37.281186 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 00:01:37.281293 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 00:01:37.281394 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 00:01:37.281490 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 00:01:37.281723 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
272 00:01:42.415210 >> Command sent successfully.
273 00:01:42.417702 Returned 0 in 5 seconds
274 00:01:42.518154 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 00:01:42.518557 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 00:01:42.518689 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 00:01:42.518806 Setting prompt string to 'Starting depthcharge on Voema...'
279 00:01:42.518896 Changing prompt to 'Starting depthcharge on Voema...'
280 00:01:42.518978 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
281 00:01:42.519302 [Enter `^Ec?' for help]
282 00:01:44.083250
283 00:01:44.083954
284 00:01:44.092830 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
285 00:01:44.100130 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
286 00:01:44.103639 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
287 00:01:44.106457 CPU: AES supported, TXT NOT supported, VT supported
288 00:01:44.113298 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
289 00:01:44.116925 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
290 00:01:44.123490 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
291 00:01:44.126907 VBOOT: Loading verstage.
292 00:01:44.129945 FMAP: Found "FLASH" version 1.1 at 0x1804000.
293 00:01:44.137538 FMAP: base = 0x0 size = 0x2000000 #areas = 32
294 00:01:44.140204 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 00:01:44.150101 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
296 00:01:44.156661 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
297 00:01:44.157103
298 00:01:44.157453
299 00:01:44.170516 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
300 00:01:44.184143 Probing TPM: . done!
301 00:01:44.186769 TPM ready after 0 ms
302 00:01:44.190755 Connected to device vid:did:rid of 1ae0:0028:00
303 00:01:44.201775 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
304 00:01:44.208104 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 00:01:44.211515 Initialized TPM device CR50 revision 0
306 00:01:44.269105 tlcl_send_startup: Startup return code is 0
307 00:01:44.269608 TPM: setup succeeded
308 00:01:44.283713 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 00:01:44.297230 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 00:01:44.310322 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 00:01:44.320230 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 00:01:44.323619 Chrome EC: UHEPI supported
313 00:01:44.327488 Phase 1
314 00:01:44.330427 FMAP: area GBB found @ 1805000 (458752 bytes)
315 00:01:44.340258 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 00:01:44.347007 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 00:01:44.353295 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
318 00:01:44.360437 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
319 00:01:44.363795 Recovery requested (1009000e)
320 00:01:44.366680 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 00:01:44.378549 tlcl_extend: response is 0
322 00:01:44.385241 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 00:01:44.394753 tlcl_extend: response is 0
324 00:01:44.401412 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 00:01:44.407821 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 00:01:44.414635 BS: verstage times (exec / console): total (unknown) / 142 ms
327 00:01:44.415065
328 00:01:44.415404
329 00:01:44.427846 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 00:01:44.434493 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 00:01:44.437743 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 00:01:44.441217 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 00:01:44.447963 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 00:01:44.450953 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 00:01:44.454840 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
336 00:01:44.457830 TCO_STS: 0000 0000
337 00:01:44.461094 GEN_PMCON: d0015038 00002200
338 00:01:44.464188 GBLRST_CAUSE: 00000000 00000000
339 00:01:44.467294 HPR_CAUSE0: 00000000
340 00:01:44.467774 prev_sleep_state 5
341 00:01:44.470595 Boot Count incremented to 22035
342 00:01:44.477392 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 00:01:44.483815 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 00:01:44.494139 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 00:01:44.500542 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 00:01:44.503533 Chrome EC: UHEPI supported
347 00:01:44.510480 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 00:01:44.522000 Probing TPM: done!
349 00:01:44.528726 Connected to device vid:did:rid of 1ae0:0028:00
350 00:01:44.538653 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
351 00:01:44.541726 Initialized TPM device CR50 revision 0
352 00:01:44.556643 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 00:01:44.563345 MRC: Hash idx 0x100b comparison successful.
354 00:01:44.566877 MRC cache found, size faa8
355 00:01:44.567316 bootmode is set to: 2
356 00:01:44.569712 SPD index = 2
357 00:01:44.576385 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 00:01:44.579825 SPD: module type is LPDDR4X
359 00:01:44.583148 SPD: module part number is MT53D1G64D4NW-046
360 00:01:44.589645 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
361 00:01:44.593004 SPD: device width 16 bits, bus width 16 bits
362 00:01:44.599533 SPD: module size is 2048 MB (per channel)
363 00:01:45.028767 CBMEM:
364 00:01:45.031651 IMD: root @ 0x76fff000 254 entries.
365 00:01:45.035010 IMD: root @ 0x76ffec00 62 entries.
366 00:01:45.038665 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 00:01:45.045139 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 00:01:45.048258 External stage cache:
369 00:01:45.051518 IMD: root @ 0x7b3ff000 254 entries.
370 00:01:45.054732 IMD: root @ 0x7b3fec00 62 entries.
371 00:01:45.070403 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 00:01:45.076728 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 00:01:45.082834 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 00:01:45.097058 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 00:01:45.102930 cse_lite: Skip switching to RW in the recovery path
376 00:01:45.103361 8 DIMMs found
377 00:01:45.106620 SMM Memory Map
378 00:01:45.110101 SMRAM : 0x7b000000 0x800000
379 00:01:45.113069 Subregion 0: 0x7b000000 0x200000
380 00:01:45.116348 Subregion 1: 0x7b200000 0x200000
381 00:01:45.119688 Subregion 2: 0x7b400000 0x400000
382 00:01:45.120167 top_of_ram = 0x77000000
383 00:01:45.126442 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 00:01:45.132608 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 00:01:45.136443 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 00:01:45.142831 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 00:01:45.149673 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 00:01:45.155905 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 00:01:45.166429 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 00:01:45.173231 Processing 211 relocs. Offset value of 0x74c0b000
391 00:01:45.179531 BS: romstage times (exec / console): total (unknown) / 277 ms
392 00:01:45.185591
393 00:01:45.186130
394 00:01:45.196052 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 00:01:45.199755 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 00:01:45.205680 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 00:01:45.215965 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 00:01:45.222392 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 00:01:45.228722 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 00:01:45.272106 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 00:01:45.279288 Processing 5008 relocs. Offset value of 0x75d98000
402 00:01:45.281769 BS: postcar times (exec / console): total (unknown) / 59 ms
403 00:01:45.284993
404 00:01:45.285440
405 00:01:45.295882 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 00:01:45.296337 Normal boot
407 00:01:45.298375 FW_CONFIG value is 0x804c02
408 00:01:45.301462 PCI: 00:07.0 disabled by fw_config
409 00:01:45.305135 PCI: 00:07.1 disabled by fw_config
410 00:01:45.308253 PCI: 00:0d.2 disabled by fw_config
411 00:01:45.315004 PCI: 00:1c.7 disabled by fw_config
412 00:01:45.318574 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 00:01:45.324765 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 00:01:45.328730 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 00:01:45.334996 GENERIC: 0.0 disabled by fw_config
416 00:01:45.338338 GENERIC: 1.0 disabled by fw_config
417 00:01:45.341613 fw_config match found: DB_USB=USB3_ACTIVE
418 00:01:45.344932 fw_config match found: DB_USB=USB3_ACTIVE
419 00:01:45.348227 fw_config match found: DB_USB=USB3_ACTIVE
420 00:01:45.354445 fw_config match found: DB_USB=USB3_ACTIVE
421 00:01:45.357710 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 00:01:45.368085 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 00:01:45.374712 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 00:01:45.381155 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 00:01:45.384868 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 00:01:45.391007 microcode: Update skipped, already up-to-date
427 00:01:45.397715 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 00:01:45.425500 Detected 4 core, 8 thread CPU.
429 00:01:45.428649 Setting up SMI for CPU
430 00:01:45.431834 IED base = 0x7b400000
431 00:01:45.435223 IED size = 0x00400000
432 00:01:45.435469 Will perform SMM setup.
433 00:01:45.441467 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
434 00:01:45.448317 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 00:01:45.455101 Processing 16 relocs. Offset value of 0x00030000
436 00:01:45.458169 Attempting to start 7 APs
437 00:01:45.461433 Waiting for 10ms after sending INIT.
438 00:01:45.477017 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 00:01:45.477206 done.
440 00:01:45.481062 AP: slot 4 apic_id 4.
441 00:01:45.484570 AP: slot 7 apic_id 5.
442 00:01:45.484768 AP: slot 3 apic_id 7.
443 00:01:45.487240 AP: slot 6 apic_id 6.
444 00:01:45.490512 AP: slot 5 apic_id 2.
445 00:01:45.490691 AP: slot 2 apic_id 3.
446 00:01:45.497052 Waiting for 2nd SIPI to complete...done.
447 00:01:45.503820 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 00:01:45.510124 Processing 13 relocs. Offset value of 0x00038000
449 00:01:45.513870 Unable to locate Global NVS
450 00:01:45.520464 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 00:01:45.523372 Installing permanent SMM handler to 0x7b000000
452 00:01:45.533576 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 00:01:45.536451 Processing 794 relocs. Offset value of 0x7b010000
454 00:01:45.546764 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 00:01:45.549842 Processing 13 relocs. Offset value of 0x7b008000
456 00:01:45.556498 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 00:01:45.563552 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 00:01:45.569933 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 00:01:45.572950 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 00:01:45.579685 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 00:01:45.586207 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 00:01:45.592765 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 00:01:45.596878 Unable to locate Global NVS
464 00:01:45.602628 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 00:01:45.606070 Clearing SMI status registers
466 00:01:45.609353 SMI_STS: PM1
467 00:01:45.609654 PM1_STS: PWRBTN
468 00:01:45.615648 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 00:01:45.619595 In relocation handler: CPU 0
470 00:01:45.622585 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 00:01:45.628783 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 00:01:45.632403 Relocation complete.
473 00:01:45.638709 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 00:01:45.642254 In relocation handler: CPU 1
475 00:01:45.645478 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 00:01:45.649058 Relocation complete.
477 00:01:45.655279 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
478 00:01:45.658515 In relocation handler: CPU 7
479 00:01:45.661561 New SMBASE=0x7affe400 IEDBASE=0x7b400000
480 00:01:45.665056 Relocation complete.
481 00:01:45.671455 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
482 00:01:45.675050 In relocation handler: CPU 4
483 00:01:45.678049 New SMBASE=0x7afff000 IEDBASE=0x7b400000
484 00:01:45.681391 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 00:01:45.684604 Relocation complete.
486 00:01:45.691622 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
487 00:01:45.694436 In relocation handler: CPU 3
488 00:01:45.698002 New SMBASE=0x7afff400 IEDBASE=0x7b400000
489 00:01:45.701267 Relocation complete.
490 00:01:45.708219 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
491 00:01:45.711668 In relocation handler: CPU 6
492 00:01:45.714355 New SMBASE=0x7affe800 IEDBASE=0x7b400000
493 00:01:45.720833 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 00:01:45.724551 Relocation complete.
495 00:01:45.730794 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
496 00:01:45.734220 In relocation handler: CPU 5
497 00:01:45.737722 New SMBASE=0x7affec00 IEDBASE=0x7b400000
498 00:01:45.741479 Writing SMRR. base = 0x7b000006, mask=0xff800c00
499 00:01:45.744174 Relocation complete.
500 00:01:45.750639 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
501 00:01:45.754872 In relocation handler: CPU 2
502 00:01:45.757547 New SMBASE=0x7afff800 IEDBASE=0x7b400000
503 00:01:45.761890 Relocation complete.
504 00:01:45.763999 Initializing CPU #0
505 00:01:45.767436 CPU: vendor Intel device 806c1
506 00:01:45.770691 CPU: family 06, model 8c, stepping 01
507 00:01:45.774123 Clearing out pending MCEs
508 00:01:45.774552 Setting up local APIC...
509 00:01:45.777379 apic_id: 0x00 done.
510 00:01:45.780992 Turbo is available but hidden
511 00:01:45.784353 Turbo is available and visible
512 00:01:45.787562 microcode: Update skipped, already up-to-date
513 00:01:45.790939 CPU #0 initialized
514 00:01:45.794281 Initializing CPU #5
515 00:01:45.794708 Initializing CPU #3
516 00:01:45.797113 Initializing CPU #6
517 00:01:45.800396 CPU: vendor Intel device 806c1
518 00:01:45.803769 CPU: family 06, model 8c, stepping 01
519 00:01:45.806999 CPU: vendor Intel device 806c1
520 00:01:45.810296 CPU: family 06, model 8c, stepping 01
521 00:01:45.813850 Clearing out pending MCEs
522 00:01:45.816880 Clearing out pending MCEs
523 00:01:45.820319 Setting up local APIC...
524 00:01:45.820746 Initializing CPU #7
525 00:01:45.824207 Initializing CPU #4
526 00:01:45.826691 CPU: vendor Intel device 806c1
527 00:01:45.830194 CPU: family 06, model 8c, stepping 01
528 00:01:45.833495 CPU: vendor Intel device 806c1
529 00:01:45.836628 CPU: family 06, model 8c, stepping 01
530 00:01:45.840437 Clearing out pending MCEs
531 00:01:45.843401 Clearing out pending MCEs
532 00:01:45.843873 Setting up local APIC...
533 00:01:45.846949 CPU: vendor Intel device 806c1
534 00:01:45.850292 CPU: family 06, model 8c, stepping 01
535 00:01:45.853812 Setting up local APIC...
536 00:01:45.857519 Initializing CPU #1
537 00:01:45.857946 Initializing CPU #2
538 00:01:45.861044 apic_id: 0x06 done.
539 00:01:45.863712 apic_id: 0x07 done.
540 00:01:45.867390 microcode: Update skipped, already up-to-date
541 00:01:45.870876 microcode: Update skipped, already up-to-date
542 00:01:45.873610 CPU #6 initialized
543 00:01:45.876766 CPU #3 initialized
544 00:01:45.877194 Clearing out pending MCEs
545 00:01:45.880234 CPU: vendor Intel device 806c1
546 00:01:45.883382 CPU: family 06, model 8c, stepping 01
547 00:01:45.886695 Setting up local APIC...
548 00:01:45.890324 Clearing out pending MCEs
549 00:01:45.893847 Setting up local APIC...
550 00:01:45.894275 apic_id: 0x05 done.
551 00:01:45.896813 apic_id: 0x04 done.
552 00:01:45.900221 Setting up local APIC...
553 00:01:45.903554 microcode: Update skipped, already up-to-date
554 00:01:45.910200 microcode: Update skipped, already up-to-date
555 00:01:45.910632 apic_id: 0x02 done.
556 00:01:45.913148 CPU: vendor Intel device 806c1
557 00:01:45.916781 CPU: family 06, model 8c, stepping 01
558 00:01:45.923439 microcode: Update skipped, already up-to-date
559 00:01:45.926339 Clearing out pending MCEs
560 00:01:45.926900 CPU #5 initialized
561 00:01:45.929673 Setting up local APIC...
562 00:01:45.930189 CPU #4 initialized
563 00:01:45.933230 CPU #7 initialized
564 00:01:45.936477 apic_id: 0x01 done.
565 00:01:45.936972 apic_id: 0x03 done.
566 00:01:45.943291 microcode: Update skipped, already up-to-date
567 00:01:45.946623 microcode: Update skipped, already up-to-date
568 00:01:45.950008 CPU #1 initialized
569 00:01:45.950442 CPU #2 initialized
570 00:01:45.956062 bsp_do_flight_plan done after 454 msecs.
571 00:01:45.959467 CPU: frequency set to 4400 MHz
572 00:01:45.960018 Enabling SMIs.
573 00:01:45.965885 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
574 00:01:45.982345 SATAXPCIE1 indicates PCIe NVMe is present
575 00:01:45.985039 Probing TPM: done!
576 00:01:45.988177 Connected to device vid:did:rid of 1ae0:0028:00
577 00:01:45.999052 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
578 00:01:46.002632 Initialized TPM device CR50 revision 0
579 00:01:46.005898 Enabling S0i3.4
580 00:01:46.012379 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 00:01:46.016218 Found a VBT of 8704 bytes after decompression
582 00:01:46.022373 cse_lite: CSE RO boot. HybridStorageMode disabled
583 00:01:46.028987 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 00:01:46.104702 FSPS returned 0
585 00:01:46.107998 Executing Phase 1 of FspMultiPhaseSiInit
586 00:01:46.118279 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 00:01:46.121635 port C0 DISC req: usage 1 usb3 1 usb2 5
588 00:01:46.124810 Raw Buffer output 0 00000511
589 00:01:46.127893 Raw Buffer output 1 00000000
590 00:01:46.131821 pmc_send_ipc_cmd succeeded
591 00:01:46.138483 port C1 DISC req: usage 1 usb3 2 usb2 3
592 00:01:46.138917 Raw Buffer output 0 00000321
593 00:01:46.141748 Raw Buffer output 1 00000000
594 00:01:46.145588 pmc_send_ipc_cmd succeeded
595 00:01:46.151028 Detected 4 core, 8 thread CPU.
596 00:01:46.154015 Detected 4 core, 8 thread CPU.
597 00:01:46.354797 Display FSP Version Info HOB
598 00:01:46.357601 Reference Code - CPU = a.0.4c.31
599 00:01:46.360966 uCode Version = 0.0.0.86
600 00:01:46.364290 TXT ACM version = ff.ff.ff.ffff
601 00:01:46.367534 Reference Code - ME = a.0.4c.31
602 00:01:46.370996 MEBx version = 0.0.0.0
603 00:01:46.374540 ME Firmware Version = Consumer SKU
604 00:01:46.377225 Reference Code - PCH = a.0.4c.31
605 00:01:46.380518 PCH-CRID Status = Disabled
606 00:01:46.383844 PCH-CRID Original Value = ff.ff.ff.ffff
607 00:01:46.387359 PCH-CRID New Value = ff.ff.ff.ffff
608 00:01:46.390412 OPROM - RST - RAID = ff.ff.ff.ffff
609 00:01:46.394216 PCH Hsio Version = 4.0.0.0
610 00:01:46.397083 Reference Code - SA - System Agent = a.0.4c.31
611 00:01:46.400050 Reference Code - MRC = 2.0.0.1
612 00:01:46.403824 SA - PCIe Version = a.0.4c.31
613 00:01:46.406618 SA-CRID Status = Disabled
614 00:01:46.410077 SA-CRID Original Value = 0.0.0.1
615 00:01:46.413305 SA-CRID New Value = 0.0.0.1
616 00:01:46.416405 OPROM - VBIOS = ff.ff.ff.ffff
617 00:01:46.420324 IO Manageability Engine FW Version = 11.1.4.0
618 00:01:46.423267 PHY Build Version = 0.0.0.e0
619 00:01:46.426887 Thunderbolt(TM) FW Version = 0.0.0.0
620 00:01:46.434019 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 00:01:46.437978 ITSS IRQ Polarities Before:
622 00:01:46.438405 IPC0: 0xffffffff
623 00:01:46.440978 IPC1: 0xffffffff
624 00:01:46.441424 IPC2: 0xffffffff
625 00:01:46.444193 IPC3: 0xffffffff
626 00:01:46.447147 ITSS IRQ Polarities After:
627 00:01:46.447717 IPC0: 0xffffffff
628 00:01:46.450673 IPC1: 0xffffffff
629 00:01:46.451120 IPC2: 0xffffffff
630 00:01:46.453791 IPC3: 0xffffffff
631 00:01:46.456991 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 00:01:46.470129 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 00:01:46.481263 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 00:01:46.494275 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 00:01:46.500108 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
636 00:01:46.503773 Enumerating buses...
637 00:01:46.506981 Show all devs... Before device enumeration.
638 00:01:46.510296 Root Device: enabled 1
639 00:01:46.510764 DOMAIN: 0000: enabled 1
640 00:01:46.514058 CPU_CLUSTER: 0: enabled 1
641 00:01:46.516957 PCI: 00:00.0: enabled 1
642 00:01:46.520199 PCI: 00:02.0: enabled 1
643 00:01:46.520648 PCI: 00:04.0: enabled 1
644 00:01:46.523786 PCI: 00:05.0: enabled 1
645 00:01:46.526582 PCI: 00:06.0: enabled 0
646 00:01:46.530661 PCI: 00:07.0: enabled 0
647 00:01:46.531217 PCI: 00:07.1: enabled 0
648 00:01:46.533233 PCI: 00:07.2: enabled 0
649 00:01:46.536599 PCI: 00:07.3: enabled 0
650 00:01:46.539919 PCI: 00:08.0: enabled 1
651 00:01:46.540385 PCI: 00:09.0: enabled 0
652 00:01:46.543264 PCI: 00:0a.0: enabled 0
653 00:01:46.546325 PCI: 00:0d.0: enabled 1
654 00:01:46.546772 PCI: 00:0d.1: enabled 0
655 00:01:46.549743 PCI: 00:0d.2: enabled 0
656 00:01:46.553370 PCI: 00:0d.3: enabled 0
657 00:01:46.556523 PCI: 00:0e.0: enabled 0
658 00:01:46.556996 PCI: 00:10.2: enabled 1
659 00:01:46.559798 PCI: 00:10.6: enabled 0
660 00:01:46.562811 PCI: 00:10.7: enabled 0
661 00:01:46.566254 PCI: 00:12.0: enabled 0
662 00:01:46.566780 PCI: 00:12.6: enabled 0
663 00:01:46.569611 PCI: 00:13.0: enabled 0
664 00:01:46.573454 PCI: 00:14.0: enabled 1
665 00:01:46.576181 PCI: 00:14.1: enabled 0
666 00:01:46.576632 PCI: 00:14.2: enabled 1
667 00:01:46.579783 PCI: 00:14.3: enabled 1
668 00:01:46.582654 PCI: 00:15.0: enabled 1
669 00:01:46.586485 PCI: 00:15.1: enabled 1
670 00:01:46.586932 PCI: 00:15.2: enabled 1
671 00:01:46.589339 PCI: 00:15.3: enabled 1
672 00:01:46.592585 PCI: 00:16.0: enabled 1
673 00:01:46.595687 PCI: 00:16.1: enabled 0
674 00:01:46.596166 PCI: 00:16.2: enabled 0
675 00:01:46.599201 PCI: 00:16.3: enabled 0
676 00:01:46.602708 PCI: 00:16.4: enabled 0
677 00:01:46.603264 PCI: 00:16.5: enabled 0
678 00:01:46.606014 PCI: 00:17.0: enabled 1
679 00:01:46.608835 PCI: 00:19.0: enabled 0
680 00:01:46.612277 PCI: 00:19.1: enabled 1
681 00:01:46.612821 PCI: 00:19.2: enabled 0
682 00:01:46.615763 PCI: 00:1c.0: enabled 1
683 00:01:46.618699 PCI: 00:1c.1: enabled 0
684 00:01:46.622382 PCI: 00:1c.2: enabled 0
685 00:01:46.622915 PCI: 00:1c.3: enabled 0
686 00:01:46.626590 PCI: 00:1c.4: enabled 0
687 00:01:46.629189 PCI: 00:1c.5: enabled 0
688 00:01:46.632427 PCI: 00:1c.6: enabled 1
689 00:01:46.632880 PCI: 00:1c.7: enabled 0
690 00:01:46.635901 PCI: 00:1d.0: enabled 1
691 00:01:46.638958 PCI: 00:1d.1: enabled 0
692 00:01:46.641871 PCI: 00:1d.2: enabled 1
693 00:01:46.642321 PCI: 00:1d.3: enabled 0
694 00:01:46.645518 PCI: 00:1e.0: enabled 1
695 00:01:46.648514 PCI: 00:1e.1: enabled 0
696 00:01:46.652029 PCI: 00:1e.2: enabled 1
697 00:01:46.652491 PCI: 00:1e.3: enabled 1
698 00:01:46.655219 PCI: 00:1f.0: enabled 1
699 00:01:46.658359 PCI: 00:1f.1: enabled 0
700 00:01:46.661529 PCI: 00:1f.2: enabled 1
701 00:01:46.662183 PCI: 00:1f.3: enabled 1
702 00:01:46.664818 PCI: 00:1f.4: enabled 0
703 00:01:46.668305 PCI: 00:1f.5: enabled 1
704 00:01:46.668758 PCI: 00:1f.6: enabled 0
705 00:01:46.671870 PCI: 00:1f.7: enabled 0
706 00:01:46.675033 APIC: 00: enabled 1
707 00:01:46.678569 GENERIC: 0.0: enabled 1
708 00:01:46.679124 GENERIC: 0.0: enabled 1
709 00:01:46.681345 GENERIC: 1.0: enabled 1
710 00:01:46.684952 GENERIC: 0.0: enabled 1
711 00:01:46.688151 GENERIC: 1.0: enabled 1
712 00:01:46.688652 USB0 port 0: enabled 1
713 00:01:46.691845 GENERIC: 0.0: enabled 1
714 00:01:46.695206 USB0 port 0: enabled 1
715 00:01:46.695650 GENERIC: 0.0: enabled 1
716 00:01:46.698670 I2C: 00:1a: enabled 1
717 00:01:46.701596 I2C: 00:31: enabled 1
718 00:01:46.702156 I2C: 00:32: enabled 1
719 00:01:46.704564 I2C: 00:10: enabled 1
720 00:01:46.708225 I2C: 00:15: enabled 1
721 00:01:46.711586 GENERIC: 0.0: enabled 0
722 00:01:46.712214 GENERIC: 1.0: enabled 0
723 00:01:46.715321 GENERIC: 0.0: enabled 1
724 00:01:46.717726 SPI: 00: enabled 1
725 00:01:46.718171 SPI: 00: enabled 1
726 00:01:46.721307 PNP: 0c09.0: enabled 1
727 00:01:46.724875 GENERIC: 0.0: enabled 1
728 00:01:46.725455 USB3 port 0: enabled 1
729 00:01:46.728336 USB3 port 1: enabled 1
730 00:01:46.731163 USB3 port 2: enabled 0
731 00:01:46.734297 USB3 port 3: enabled 0
732 00:01:46.734744 USB2 port 0: enabled 0
733 00:01:46.737924 USB2 port 1: enabled 1
734 00:01:46.741589 USB2 port 2: enabled 1
735 00:01:46.742163 USB2 port 3: enabled 0
736 00:01:46.745246 USB2 port 4: enabled 1
737 00:01:46.747877 USB2 port 5: enabled 0
738 00:01:46.748507 USB2 port 6: enabled 0
739 00:01:46.750861 USB2 port 7: enabled 0
740 00:01:46.754208 USB2 port 8: enabled 0
741 00:01:46.757759 USB2 port 9: enabled 0
742 00:01:46.758312 USB3 port 0: enabled 0
743 00:01:46.761092 USB3 port 1: enabled 1
744 00:01:46.764202 USB3 port 2: enabled 0
745 00:01:46.764745 USB3 port 3: enabled 0
746 00:01:46.767562 GENERIC: 0.0: enabled 1
747 00:01:46.771257 GENERIC: 1.0: enabled 1
748 00:01:46.774216 APIC: 01: enabled 1
749 00:01:46.774746 APIC: 03: enabled 1
750 00:01:46.777313 APIC: 07: enabled 1
751 00:01:46.777747 APIC: 04: enabled 1
752 00:01:46.780867 APIC: 02: enabled 1
753 00:01:46.784073 APIC: 06: enabled 1
754 00:01:46.784504 APIC: 05: enabled 1
755 00:01:46.787110 Compare with tree...
756 00:01:46.790859 Root Device: enabled 1
757 00:01:46.791289 DOMAIN: 0000: enabled 1
758 00:01:46.794053 PCI: 00:00.0: enabled 1
759 00:01:46.797225 PCI: 00:02.0: enabled 1
760 00:01:46.800488 PCI: 00:04.0: enabled 1
761 00:01:46.803986 GENERIC: 0.0: enabled 1
762 00:01:46.804528 PCI: 00:05.0: enabled 1
763 00:01:46.807384 PCI: 00:06.0: enabled 0
764 00:01:46.810506 PCI: 00:07.0: enabled 0
765 00:01:46.814262 GENERIC: 0.0: enabled 1
766 00:01:46.817091 PCI: 00:07.1: enabled 0
767 00:01:46.820575 GENERIC: 1.0: enabled 1
768 00:01:46.821113 PCI: 00:07.2: enabled 0
769 00:01:46.824018 GENERIC: 0.0: enabled 1
770 00:01:46.826866 PCI: 00:07.3: enabled 0
771 00:01:46.830466 GENERIC: 1.0: enabled 1
772 00:01:46.834276 PCI: 00:08.0: enabled 1
773 00:01:46.834813 PCI: 00:09.0: enabled 0
774 00:01:46.836909 PCI: 00:0a.0: enabled 0
775 00:01:46.840342 PCI: 00:0d.0: enabled 1
776 00:01:46.843829 USB0 port 0: enabled 1
777 00:01:46.846872 USB3 port 0: enabled 1
778 00:01:46.847303 USB3 port 1: enabled 1
779 00:01:46.850352 USB3 port 2: enabled 0
780 00:01:46.853909 USB3 port 3: enabled 0
781 00:01:46.856877 PCI: 00:0d.1: enabled 0
782 00:01:46.860195 PCI: 00:0d.2: enabled 0
783 00:01:46.863023 GENERIC: 0.0: enabled 1
784 00:01:46.863609 PCI: 00:0d.3: enabled 0
785 00:01:46.866767 PCI: 00:0e.0: enabled 0
786 00:01:46.870333 PCI: 00:10.2: enabled 1
787 00:01:46.872805 PCI: 00:10.6: enabled 0
788 00:01:46.876603 PCI: 00:10.7: enabled 0
789 00:01:46.877142 PCI: 00:12.0: enabled 0
790 00:01:46.879602 PCI: 00:12.6: enabled 0
791 00:01:46.882837 PCI: 00:13.0: enabled 0
792 00:01:46.886168 PCI: 00:14.0: enabled 1
793 00:01:46.889724 USB0 port 0: enabled 1
794 00:01:46.890157 USB2 port 0: enabled 0
795 00:01:46.892763 USB2 port 1: enabled 1
796 00:01:46.895836 USB2 port 2: enabled 1
797 00:01:46.900105 USB2 port 3: enabled 0
798 00:01:46.903088 USB2 port 4: enabled 1
799 00:01:46.903627 USB2 port 5: enabled 0
800 00:01:46.906531 USB2 port 6: enabled 0
801 00:01:46.909669 USB2 port 7: enabled 0
802 00:01:46.912440 USB2 port 8: enabled 0
803 00:01:46.916415 USB2 port 9: enabled 0
804 00:01:46.919676 USB3 port 0: enabled 0
805 00:01:46.920305 USB3 port 1: enabled 1
806 00:01:46.922667 USB3 port 2: enabled 0
807 00:01:46.925826 USB3 port 3: enabled 0
808 00:01:46.929350 PCI: 00:14.1: enabled 0
809 00:01:46.932234 PCI: 00:14.2: enabled 1
810 00:01:46.935843 PCI: 00:14.3: enabled 1
811 00:01:46.936399 GENERIC: 0.0: enabled 1
812 00:01:46.939352 PCI: 00:15.0: enabled 1
813 00:01:46.942476 I2C: 00:1a: enabled 1
814 00:01:46.945837 I2C: 00:31: enabled 1
815 00:01:46.946372 I2C: 00:32: enabled 1
816 00:01:46.948811 PCI: 00:15.1: enabled 1
817 00:01:46.952667 I2C: 00:10: enabled 1
818 00:01:46.955810 PCI: 00:15.2: enabled 1
819 00:01:46.959165 PCI: 00:15.3: enabled 1
820 00:01:46.959711 PCI: 00:16.0: enabled 1
821 00:01:46.962128 PCI: 00:16.1: enabled 0
822 00:01:46.965718 PCI: 00:16.2: enabled 0
823 00:01:46.969062 PCI: 00:16.3: enabled 0
824 00:01:46.972004 PCI: 00:16.4: enabled 0
825 00:01:46.972545 PCI: 00:16.5: enabled 0
826 00:01:46.975536 PCI: 00:17.0: enabled 1
827 00:01:46.979058 PCI: 00:19.0: enabled 0
828 00:01:46.982207 PCI: 00:19.1: enabled 1
829 00:01:46.985530 I2C: 00:15: enabled 1
830 00:01:46.985967 PCI: 00:19.2: enabled 0
831 00:01:46.988757 PCI: 00:1d.0: enabled 1
832 00:01:46.991698 GENERIC: 0.0: enabled 1
833 00:01:46.994850 PCI: 00:1e.0: enabled 1
834 00:01:46.998520 PCI: 00:1e.1: enabled 0
835 00:01:46.999053 PCI: 00:1e.2: enabled 1
836 00:01:47.001656 SPI: 00: enabled 1
837 00:01:47.005088 PCI: 00:1e.3: enabled 1
838 00:01:47.008245 SPI: 00: enabled 1
839 00:01:47.008680 PCI: 00:1f.0: enabled 1
840 00:01:47.011556 PNP: 0c09.0: enabled 1
841 00:01:47.015013 PCI: 00:1f.1: enabled 0
842 00:01:47.018722 PCI: 00:1f.2: enabled 1
843 00:01:47.021467 GENERIC: 0.0: enabled 1
844 00:01:47.021897 GENERIC: 0.0: enabled 1
845 00:01:47.025286 GENERIC: 1.0: enabled 1
846 00:01:47.028450 PCI: 00:1f.3: enabled 1
847 00:01:47.031714 PCI: 00:1f.4: enabled 0
848 00:01:47.083310 PCI: 00:1f.5: enabled 1
849 00:01:47.083995 PCI: 00:1f.6: enabled 0
850 00:01:47.084654 PCI: 00:1f.7: enabled 0
851 00:01:47.085064 CPU_CLUSTER: 0: enabled 1
852 00:01:47.085434 APIC: 00: enabled 1
853 00:01:47.086169 APIC: 01: enabled 1
854 00:01:47.086788 APIC: 03: enabled 1
855 00:01:47.087191 APIC: 07: enabled 1
856 00:01:47.087525 APIC: 04: enabled 1
857 00:01:47.087898 APIC: 02: enabled 1
858 00:01:47.088229 APIC: 06: enabled 1
859 00:01:47.088542 APIC: 05: enabled 1
860 00:01:47.088852 Root Device scanning...
861 00:01:47.089164 scan_static_bus for Root Device
862 00:01:47.089475 DOMAIN: 0000 enabled
863 00:01:47.089783 CPU_CLUSTER: 0 enabled
864 00:01:47.090087 DOMAIN: 0000 scanning...
865 00:01:47.090388 PCI: pci_scan_bus for bus 00
866 00:01:47.090762 PCI: 00:00.0 [8086/0000] ops
867 00:01:47.091077 PCI: 00:00.0 [8086/9a12] enabled
868 00:01:47.133633 PCI: 00:02.0 [8086/0000] bus ops
869 00:01:47.134267 PCI: 00:02.0 [8086/9a40] enabled
870 00:01:47.134657 PCI: 00:04.0 [8086/0000] bus ops
871 00:01:47.135078 PCI: 00:04.0 [8086/9a03] enabled
872 00:01:47.135850 PCI: 00:05.0 [8086/9a19] enabled
873 00:01:47.136237 PCI: 00:07.0 [0000/0000] hidden
874 00:01:47.136572 PCI: 00:08.0 [8086/9a11] enabled
875 00:01:47.136896 PCI: 00:0a.0 [8086/9a0d] disabled
876 00:01:47.137214 PCI: 00:0d.0 [8086/0000] bus ops
877 00:01:47.137580 PCI: 00:0d.0 [8086/9a13] enabled
878 00:01:47.137902 PCI: 00:14.0 [8086/0000] bus ops
879 00:01:47.138214 PCI: 00:14.0 [8086/a0ed] enabled
880 00:01:47.138522 PCI: 00:14.2 [8086/a0ef] enabled
881 00:01:47.138830 PCI: 00:14.3 [8086/0000] bus ops
882 00:01:47.139139 PCI: 00:14.3 [8086/a0f0] enabled
883 00:01:47.161275 PCI: 00:15.0 [8086/0000] bus ops
884 00:01:47.161877 PCI: 00:15.0 [8086/a0e8] enabled
885 00:01:47.162635 PCI: 00:15.1 [8086/0000] bus ops
886 00:01:47.163022 PCI: 00:15.1 [8086/a0e9] enabled
887 00:01:47.163375 PCI: 00:15.2 [8086/0000] bus ops
888 00:01:47.163716 PCI: 00:15.2 [8086/a0ea] enabled
889 00:01:47.164094 PCI: 00:15.3 [8086/0000] bus ops
890 00:01:47.164415 PCI: 00:15.3 [8086/a0eb] enabled
891 00:01:47.165070 PCI: 00:16.0 [8086/0000] ops
892 00:01:47.165426 PCI: 00:16.0 [8086/a0e0] enabled
893 00:01:47.171870 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 00:01:47.175243 PCI: 00:19.0 [8086/0000] bus ops
895 00:01:47.178493 PCI: 00:19.0 [8086/a0c5] disabled
896 00:01:47.182595 PCI: 00:19.1 [8086/0000] bus ops
897 00:01:47.184970 PCI: 00:19.1 [8086/a0c6] enabled
898 00:01:47.188566 PCI: 00:1d.0 [8086/0000] bus ops
899 00:01:47.191522 PCI: 00:1d.0 [8086/a0b0] enabled
900 00:01:47.194706 PCI: 00:1e.0 [8086/0000] ops
901 00:01:47.198407 PCI: 00:1e.0 [8086/a0a8] enabled
902 00:01:47.201325 PCI: 00:1e.2 [8086/0000] bus ops
903 00:01:47.204486 PCI: 00:1e.2 [8086/a0aa] enabled
904 00:01:47.207967 PCI: 00:1e.3 [8086/0000] bus ops
905 00:01:47.211494 PCI: 00:1e.3 [8086/a0ab] enabled
906 00:01:47.214852 PCI: 00:1f.0 [8086/0000] bus ops
907 00:01:47.217820 PCI: 00:1f.0 [8086/a087] enabled
908 00:01:47.220929 RTC Init
909 00:01:47.224433 Set power on after power failure.
910 00:01:47.224914 Disabling Deep S3
911 00:01:47.227687 Disabling Deep S3
912 00:01:47.228315 Disabling Deep S4
913 00:01:47.231630 Disabling Deep S4
914 00:01:47.232268 Disabling Deep S5
915 00:01:47.234642 Disabling Deep S5
916 00:01:47.238059 PCI: 00:1f.2 [0000/0000] hidden
917 00:01:47.240861 PCI: 00:1f.3 [8086/0000] bus ops
918 00:01:47.244308 PCI: 00:1f.3 [8086/a0c8] enabled
919 00:01:47.247177 PCI: 00:1f.5 [8086/0000] bus ops
920 00:01:47.250807 PCI: 00:1f.5 [8086/a0a4] enabled
921 00:01:47.254324 PCI: Leftover static devices:
922 00:01:47.254877 PCI: 00:10.2
923 00:01:47.257448 PCI: 00:10.6
924 00:01:47.257881 PCI: 00:10.7
925 00:01:47.260548 PCI: 00:06.0
926 00:01:47.260982 PCI: 00:07.1
927 00:01:47.261327 PCI: 00:07.2
928 00:01:47.264138 PCI: 00:07.3
929 00:01:47.264681 PCI: 00:09.0
930 00:01:47.268380 PCI: 00:0d.1
931 00:01:47.268926 PCI: 00:0d.2
932 00:01:47.270827 PCI: 00:0d.3
933 00:01:47.271369 PCI: 00:0e.0
934 00:01:47.271715 PCI: 00:12.0
935 00:01:47.274283 PCI: 00:12.6
936 00:01:47.274717 PCI: 00:13.0
937 00:01:47.277256 PCI: 00:14.1
938 00:01:47.277692 PCI: 00:16.1
939 00:01:47.278035 PCI: 00:16.2
940 00:01:47.280516 PCI: 00:16.3
941 00:01:47.280956 PCI: 00:16.4
942 00:01:47.283679 PCI: 00:16.5
943 00:01:47.284145 PCI: 00:17.0
944 00:01:47.284486 PCI: 00:19.2
945 00:01:47.287620 PCI: 00:1e.1
946 00:01:47.288110 PCI: 00:1f.1
947 00:01:47.290703 PCI: 00:1f.4
948 00:01:47.291135 PCI: 00:1f.6
949 00:01:47.293720 PCI: 00:1f.7
950 00:01:47.297021 PCI: Check your devicetree.cb.
951 00:01:47.297454 PCI: 00:02.0 scanning...
952 00:01:47.300195 scan_generic_bus for PCI: 00:02.0
953 00:01:47.306924 scan_generic_bus for PCI: 00:02.0 done
954 00:01:47.310102 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 00:01:47.313345 PCI: 00:04.0 scanning...
956 00:01:47.316613 scan_generic_bus for PCI: 00:04.0
957 00:01:47.319892 GENERIC: 0.0 enabled
958 00:01:47.323445 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 00:01:47.329996 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 00:01:47.333547 PCI: 00:0d.0 scanning...
961 00:01:47.336355 scan_static_bus for PCI: 00:0d.0
962 00:01:47.336797 USB0 port 0 enabled
963 00:01:47.339528 USB0 port 0 scanning...
964 00:01:47.343387 scan_static_bus for USB0 port 0
965 00:01:47.346065 USB3 port 0 enabled
966 00:01:47.346772 USB3 port 1 enabled
967 00:01:47.349731 USB3 port 2 disabled
968 00:01:47.352685 USB3 port 3 disabled
969 00:01:47.353377 USB3 port 0 scanning...
970 00:01:47.356445 scan_static_bus for USB3 port 0
971 00:01:47.362954 scan_static_bus for USB3 port 0 done
972 00:01:47.365845 scan_bus: bus USB3 port 0 finished in 6 msecs
973 00:01:47.369176 USB3 port 1 scanning...
974 00:01:47.372387 scan_static_bus for USB3 port 1
975 00:01:47.375829 scan_static_bus for USB3 port 1 done
976 00:01:47.378838 scan_bus: bus USB3 port 1 finished in 6 msecs
977 00:01:47.382059 scan_static_bus for USB0 port 0 done
978 00:01:47.389061 scan_bus: bus USB0 port 0 finished in 43 msecs
979 00:01:47.392164 scan_static_bus for PCI: 00:0d.0 done
980 00:01:47.395464 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 00:01:47.398471 PCI: 00:14.0 scanning...
982 00:01:47.401970 scan_static_bus for PCI: 00:14.0
983 00:01:47.405666 USB0 port 0 enabled
984 00:01:47.408705 USB0 port 0 scanning...
985 00:01:47.411925 scan_static_bus for USB0 port 0
986 00:01:47.412086 USB2 port 0 disabled
987 00:01:47.415135 USB2 port 1 enabled
988 00:01:47.419310 USB2 port 2 enabled
989 00:01:47.419904 USB2 port 3 disabled
990 00:01:47.421996 USB2 port 4 enabled
991 00:01:47.422429 USB2 port 5 disabled
992 00:01:47.425311 USB2 port 6 disabled
993 00:01:47.428954 USB2 port 7 disabled
994 00:01:47.429384 USB2 port 8 disabled
995 00:01:47.432448 USB2 port 9 disabled
996 00:01:47.434858 USB3 port 0 disabled
997 00:01:47.435163 USB3 port 1 enabled
998 00:01:47.438376 USB3 port 2 disabled
999 00:01:47.441812 USB3 port 3 disabled
1000 00:01:47.441996 USB2 port 1 scanning...
1001 00:01:47.444998 scan_static_bus for USB2 port 1
1002 00:01:47.451638 scan_static_bus for USB2 port 1 done
1003 00:01:47.454885 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 00:01:47.458182 USB2 port 2 scanning...
1005 00:01:47.461498 scan_static_bus for USB2 port 2
1006 00:01:47.465050 scan_static_bus for USB2 port 2 done
1007 00:01:47.468383 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 00:01:47.471412 USB2 port 4 scanning...
1009 00:01:47.474685 scan_static_bus for USB2 port 4
1010 00:01:47.477698 scan_static_bus for USB2 port 4 done
1011 00:01:47.484416 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 00:01:47.484520 USB3 port 1 scanning...
1013 00:01:47.488028 scan_static_bus for USB3 port 1
1014 00:01:47.494512 scan_static_bus for USB3 port 1 done
1015 00:01:47.497818 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 00:01:47.501168 scan_static_bus for USB0 port 0 done
1017 00:01:47.504735 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 00:01:47.511230 scan_static_bus for PCI: 00:14.0 done
1019 00:01:47.514717 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1020 00:01:47.517794 PCI: 00:14.3 scanning...
1021 00:01:47.526799 scan_static_bus for PCI: 00:14.3
1022 00:01:47.527065 GENERIC: 0.0 enabled
1023 00:01:47.527413 scan_static_bus for PCI: 00:14.3 done
1024 00:01:47.530888 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 00:01:47.534131 PCI: 00:15.0 scanning...
1026 00:01:47.537887 scan_static_bus for PCI: 00:15.0
1027 00:01:47.540601 I2C: 00:1a enabled
1028 00:01:47.540756 I2C: 00:31 enabled
1029 00:01:47.543718 I2C: 00:32 enabled
1030 00:01:47.547550 scan_static_bus for PCI: 00:15.0 done
1031 00:01:47.550283 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1032 00:01:47.553511 PCI: 00:15.1 scanning...
1033 00:01:47.557231 scan_static_bus for PCI: 00:15.1
1034 00:01:47.560296 I2C: 00:10 enabled
1035 00:01:47.563968 scan_static_bus for PCI: 00:15.1 done
1036 00:01:47.566846 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 00:01:47.569982 PCI: 00:15.2 scanning...
1038 00:01:47.573634 scan_static_bus for PCI: 00:15.2
1039 00:01:47.576590 scan_static_bus for PCI: 00:15.2 done
1040 00:01:47.583436 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 00:01:47.586976 PCI: 00:15.3 scanning...
1042 00:01:47.590039 scan_static_bus for PCI: 00:15.3
1043 00:01:47.593508 scan_static_bus for PCI: 00:15.3 done
1044 00:01:47.596980 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 00:01:47.599936 PCI: 00:19.1 scanning...
1046 00:01:47.603433 scan_static_bus for PCI: 00:19.1
1047 00:01:47.606787 I2C: 00:15 enabled
1048 00:01:47.610069 scan_static_bus for PCI: 00:19.1 done
1049 00:01:47.613376 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 00:01:47.616571 PCI: 00:1d.0 scanning...
1051 00:01:47.620379 do_pci_scan_bridge for PCI: 00:1d.0
1052 00:01:47.623152 PCI: pci_scan_bus for bus 01
1053 00:01:47.627037 PCI: 01:00.0 [15b7/5009] enabled
1054 00:01:47.630346 GENERIC: 0.0 enabled
1055 00:01:47.633760 Enabling Common Clock Configuration
1056 00:01:47.636583 L1 Sub-State supported from root port 29
1057 00:01:47.639929 L1 Sub-State Support = 0x5
1058 00:01:47.643135 CommonModeRestoreTime = 0x28
1059 00:01:47.646769 Power On Value = 0x16, Power On Scale = 0x0
1060 00:01:47.649825 ASPM: Enabled L1
1061 00:01:47.653306 PCIe: Max_Payload_Size adjusted to 128
1062 00:01:47.656464 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 00:01:47.659266 PCI: 00:1e.2 scanning...
1064 00:01:47.663213 scan_generic_bus for PCI: 00:1e.2
1065 00:01:47.666248 SPI: 00 enabled
1066 00:01:47.672461 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 00:01:47.675914 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 00:01:47.679587 PCI: 00:1e.3 scanning...
1069 00:01:47.683338 scan_generic_bus for PCI: 00:1e.3
1070 00:01:47.683488 SPI: 00 enabled
1071 00:01:47.689468 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 00:01:47.695899 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 00:01:47.696018 PCI: 00:1f.0 scanning...
1074 00:01:47.699371 scan_static_bus for PCI: 00:1f.0
1075 00:01:47.702916 PNP: 0c09.0 enabled
1076 00:01:47.706517 PNP: 0c09.0 scanning...
1077 00:01:47.709463 scan_static_bus for PNP: 0c09.0
1078 00:01:47.712231 scan_static_bus for PNP: 0c09.0 done
1079 00:01:47.716178 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 00:01:47.722782 scan_static_bus for PCI: 00:1f.0 done
1081 00:01:47.725548 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 00:01:47.729305 PCI: 00:1f.2 scanning...
1083 00:01:47.732583 scan_static_bus for PCI: 00:1f.2
1084 00:01:47.732750 GENERIC: 0.0 enabled
1085 00:01:47.735666 GENERIC: 0.0 scanning...
1086 00:01:47.739186 scan_static_bus for GENERIC: 0.0
1087 00:01:47.741928 GENERIC: 0.0 enabled
1088 00:01:47.745249 GENERIC: 1.0 enabled
1089 00:01:47.749127 scan_static_bus for GENERIC: 0.0 done
1090 00:01:47.752123 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 00:01:47.755398 scan_static_bus for PCI: 00:1f.2 done
1092 00:01:47.762151 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 00:01:47.765002 PCI: 00:1f.3 scanning...
1094 00:01:47.768529 scan_static_bus for PCI: 00:1f.3
1095 00:01:47.771863 scan_static_bus for PCI: 00:1f.3 done
1096 00:01:47.774797 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 00:01:47.778218 PCI: 00:1f.5 scanning...
1098 00:01:47.781572 scan_generic_bus for PCI: 00:1f.5
1099 00:01:47.784644 scan_generic_bus for PCI: 00:1f.5 done
1100 00:01:47.791311 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 00:01:47.794726 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1102 00:01:47.797794 scan_static_bus for Root Device done
1103 00:01:47.805377 scan_bus: bus Root Device finished in 736 msecs
1104 00:01:47.805465 done
1105 00:01:47.811111 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1106 00:01:47.814828 Chrome EC: UHEPI supported
1107 00:01:47.821054 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 00:01:47.828344 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 00:01:47.831082 SPI flash protection: WPSW=0 SRP0=1
1110 00:01:47.834610 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 00:01:47.840998 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1112 00:01:47.844720 found VGA at PCI: 00:02.0
1113 00:01:47.847631 Setting up VGA for PCI: 00:02.0
1114 00:01:47.854761 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 00:01:47.857857 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 00:01:47.860685 Allocating resources...
1117 00:01:47.861226 Reading resources...
1118 00:01:47.867431 Root Device read_resources bus 0 link: 0
1119 00:01:47.870991 DOMAIN: 0000 read_resources bus 0 link: 0
1120 00:01:47.877336 PCI: 00:04.0 read_resources bus 1 link: 0
1121 00:01:47.880648 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 00:01:47.887400 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 00:01:47.891084 USB0 port 0 read_resources bus 0 link: 0
1124 00:01:47.897166 USB0 port 0 read_resources bus 0 link: 0 done
1125 00:01:47.900647 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 00:01:47.903555 PCI: 00:14.0 read_resources bus 0 link: 0
1127 00:01:47.910095 USB0 port 0 read_resources bus 0 link: 0
1128 00:01:47.913520 USB0 port 0 read_resources bus 0 link: 0 done
1129 00:01:47.920255 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 00:01:47.923506 PCI: 00:14.3 read_resources bus 0 link: 0
1131 00:01:47.930259 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 00:01:47.933412 PCI: 00:15.0 read_resources bus 0 link: 0
1133 00:01:47.940620 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 00:01:47.943690 PCI: 00:15.1 read_resources bus 0 link: 0
1135 00:01:47.950789 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 00:01:47.953843 PCI: 00:19.1 read_resources bus 0 link: 0
1137 00:01:47.960799 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 00:01:47.963964 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 00:01:47.970465 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 00:01:47.974464 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 00:01:47.980870 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 00:01:47.984051 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 00:01:47.990477 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 00:01:47.994102 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 00:01:48.000935 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 00:01:48.004020 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 00:01:48.007115 GENERIC: 0.0 read_resources bus 0 link: 0
1148 00:01:48.014183 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 00:01:48.017804 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 00:01:48.024822 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 00:01:48.028004 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 00:01:48.034610 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 00:01:48.038143 Root Device read_resources bus 0 link: 0 done
1154 00:01:48.041158 Done reading resources.
1155 00:01:48.047927 Show resources in subtree (Root Device)...After reading.
1156 00:01:48.050894 Root Device child on link 0 DOMAIN: 0000
1157 00:01:48.054372 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 00:01:48.064084 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 00:01:48.074659 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 00:01:48.077467 PCI: 00:00.0
1161 00:01:48.088036 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 00:01:48.097315 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 00:01:48.103833 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 00:01:48.113634 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 00:01:48.123593 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 00:01:48.133769 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 00:01:48.143416 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 00:01:48.153419 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 00:01:48.160754 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 00:01:48.170242 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 00:01:48.179857 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 00:01:48.190007 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 00:01:48.199658 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 00:01:48.206250 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 00:01:48.216223 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 00:01:48.225872 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 00:01:48.236001 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 00:01:48.245856 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 00:01:48.255471 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 00:01:48.265936 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 00:01:48.266402 PCI: 00:02.0
1182 00:01:48.275928 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 00:01:48.288571 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 00:01:48.295381 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 00:01:48.298690 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 00:01:48.311802 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 00:01:48.312419 GENERIC: 0.0
1188 00:01:48.314961 PCI: 00:05.0
1189 00:01:48.324945 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 00:01:48.328397 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 00:01:48.331900 GENERIC: 0.0
1192 00:01:48.332461 PCI: 00:08.0
1193 00:01:48.341400 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 00:01:48.345120 PCI: 00:0a.0
1195 00:01:48.348438 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 00:01:48.357748 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 00:01:48.361014 USB0 port 0 child on link 0 USB3 port 0
1198 00:01:48.364478 USB3 port 0
1199 00:01:48.364886 USB3 port 1
1200 00:01:48.367839 USB3 port 2
1201 00:01:48.368164 USB3 port 3
1202 00:01:48.374392 PCI: 00:14.0 child on link 0 USB0 port 0
1203 00:01:48.384570 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 00:01:48.387560 USB0 port 0 child on link 0 USB2 port 0
1205 00:01:48.391051 USB2 port 0
1206 00:01:48.391462 USB2 port 1
1207 00:01:48.394355 USB2 port 2
1208 00:01:48.394745 USB2 port 3
1209 00:01:48.397448 USB2 port 4
1210 00:01:48.397747 USB2 port 5
1211 00:01:48.400637 USB2 port 6
1212 00:01:48.400935 USB2 port 7
1213 00:01:48.403979 USB2 port 8
1214 00:01:48.404277 USB2 port 9
1215 00:01:48.407222 USB3 port 0
1216 00:01:48.410634 USB3 port 1
1217 00:01:48.411047 USB3 port 2
1218 00:01:48.414135 USB3 port 3
1219 00:01:48.414583 PCI: 00:14.2
1220 00:01:48.423826 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 00:01:48.434084 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 00:01:48.440294 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 00:01:48.450300 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 00:01:48.450644 GENERIC: 0.0
1225 00:01:48.453464 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 00:01:48.463514 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 00:01:48.466514 I2C: 00:1a
1228 00:01:48.466810 I2C: 00:31
1229 00:01:48.470275 I2C: 00:32
1230 00:01:48.473731 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 00:01:48.483027 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 00:01:48.486485 I2C: 00:10
1233 00:01:48.486904 PCI: 00:15.2
1234 00:01:48.496245 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 00:01:48.500103 PCI: 00:15.3
1236 00:01:48.509551 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 00:01:48.509967 PCI: 00:16.0
1238 00:01:48.519551 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 00:01:48.522682 PCI: 00:19.0
1240 00:01:48.525811 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 00:01:48.535758 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 00:01:48.536185 I2C: 00:15
1243 00:01:48.542500 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 00:01:48.549068 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 00:01:48.559573 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 00:01:48.569423 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 00:01:48.572455 GENERIC: 0.0
1248 00:01:48.572753 PCI: 01:00.0
1249 00:01:48.582828 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 00:01:48.591945 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1251 00:01:48.595851 PCI: 00:1e.0
1252 00:01:48.605458 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1253 00:01:48.608799 PCI: 00:1e.2 child on link 0 SPI: 00
1254 00:01:48.618881 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 00:01:48.622152 SPI: 00
1256 00:01:48.625280 PCI: 00:1e.3 child on link 0 SPI: 00
1257 00:01:48.635151 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 00:01:48.635655 SPI: 00
1259 00:01:48.641708 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1260 00:01:48.648416 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1261 00:01:48.651575 PNP: 0c09.0
1262 00:01:48.662032 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1263 00:01:48.664790 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1264 00:01:48.674670 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1265 00:01:48.684739 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1266 00:01:48.688278 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1267 00:01:48.691032 GENERIC: 0.0
1268 00:01:48.691501 GENERIC: 1.0
1269 00:01:48.694325 PCI: 00:1f.3
1270 00:01:48.704112 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1271 00:01:48.714062 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1272 00:01:48.714630 PCI: 00:1f.5
1273 00:01:48.723819 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1274 00:01:48.727337 CPU_CLUSTER: 0 child on link 0 APIC: 00
1275 00:01:48.730913 APIC: 00
1276 00:01:48.731474 APIC: 01
1277 00:01:48.731921 APIC: 03
1278 00:01:48.733893 APIC: 07
1279 00:01:48.734414 APIC: 04
1280 00:01:48.737640 APIC: 02
1281 00:01:48.738204 APIC: 06
1282 00:01:48.738578 APIC: 05
1283 00:01:48.747290 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1284 00:01:48.751233 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1285 00:01:48.756933 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1286 00:01:48.764422 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1287 00:01:48.766856 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1288 00:01:48.773720 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1289 00:01:48.780255 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1290 00:01:48.787486 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1291 00:01:48.793354 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1292 00:01:48.803626 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1293 00:01:48.806773 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1294 00:01:48.816581 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1295 00:01:48.823356 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1296 00:01:48.829943 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1297 00:01:48.833149 DOMAIN: 0000: Resource ranges:
1298 00:01:48.836542 * Base: 1000, Size: 800, Tag: 100
1299 00:01:48.840439 * Base: 1900, Size: e700, Tag: 100
1300 00:01:48.846257 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1301 00:01:48.852991 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1302 00:01:48.859559 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1303 00:01:48.866418 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1304 00:01:48.876225 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1305 00:01:48.882472 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1306 00:01:48.892616 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1307 00:01:48.899142 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1308 00:01:48.906457 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1309 00:01:48.915312 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1310 00:01:48.922081 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1311 00:01:48.928641 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1312 00:01:48.938623 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1313 00:01:48.945426 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1314 00:01:48.951693 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1315 00:01:48.961693 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1316 00:01:48.968618 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1317 00:01:48.975633 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1318 00:01:48.984910 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1319 00:01:48.991430 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1320 00:01:48.998082 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1321 00:01:49.008204 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1322 00:01:49.014769 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1323 00:01:49.022116 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1324 00:01:49.031186 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1325 00:01:49.034815 DOMAIN: 0000: Resource ranges:
1326 00:01:49.037750 * Base: 7fc00000, Size: 40400000, Tag: 200
1327 00:01:49.040904 * Base: d0000000, Size: 28000000, Tag: 200
1328 00:01:49.047994 * Base: fa000000, Size: 1000000, Tag: 200
1329 00:01:49.050840 * Base: fb001000, Size: 2fff000, Tag: 200
1330 00:01:49.053889 * Base: fe010000, Size: 2e000, Tag: 200
1331 00:01:49.057081 * Base: fe03f000, Size: d41000, Tag: 200
1332 00:01:49.064010 * Base: fed88000, Size: 8000, Tag: 200
1333 00:01:49.067200 * Base: fed93000, Size: d000, Tag: 200
1334 00:01:49.070734 * Base: feda2000, Size: 1e000, Tag: 200
1335 00:01:49.073956 * Base: fede0000, Size: 1220000, Tag: 200
1336 00:01:49.080566 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1337 00:01:49.087260 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1338 00:01:49.094139 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1339 00:01:49.100278 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1340 00:01:49.107482 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1341 00:01:49.113717 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1342 00:01:49.120334 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1343 00:01:49.127013 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1344 00:01:49.133300 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1345 00:01:49.140478 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1346 00:01:49.146555 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1347 00:01:49.153051 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1348 00:01:49.159901 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1349 00:01:49.166194 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1350 00:01:49.172887 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1351 00:01:49.179490 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1352 00:01:49.186077 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1353 00:01:49.192638 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1354 00:01:49.199093 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1355 00:01:49.205684 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1356 00:01:49.212566 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1357 00:01:49.219005 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1358 00:01:49.225729 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1359 00:01:49.232148 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1360 00:01:49.241766 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1361 00:01:49.245277 PCI: 00:1d.0: Resource ranges:
1362 00:01:49.248693 * Base: 7fc00000, Size: 100000, Tag: 200
1363 00:01:49.255028 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1364 00:01:49.262377 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1365 00:01:49.272131 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1366 00:01:49.278450 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1367 00:01:49.281643 Root Device assign_resources, bus 0 link: 0
1368 00:01:49.288524 DOMAIN: 0000 assign_resources, bus 0 link: 0
1369 00:01:49.294441 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1370 00:01:49.304956 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1371 00:01:49.311030 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1372 00:01:49.321773 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1373 00:01:49.324023 PCI: 00:04.0 assign_resources, bus 1 link: 0
1374 00:01:49.327680 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 00:01:49.337502 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1376 00:01:49.343956 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1377 00:01:49.354299 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1378 00:01:49.357465 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1379 00:01:49.364434 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 00:01:49.370716 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1381 00:01:49.376896 PCI: 00:14.0 assign_resources, bus 0 link: 0
1382 00:01:49.380502 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 00:01:49.387072 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1384 00:01:49.397334 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1385 00:01:49.403813 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1386 00:01:49.410298 PCI: 00:14.3 assign_resources, bus 0 link: 0
1387 00:01:49.413567 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 00:01:49.423182 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1389 00:01:49.426914 PCI: 00:15.0 assign_resources, bus 0 link: 0
1390 00:01:49.429949 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 00:01:49.439613 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1392 00:01:49.442850 PCI: 00:15.1 assign_resources, bus 0 link: 0
1393 00:01:49.449357 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 00:01:49.455805 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1395 00:01:49.466184 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1396 00:01:49.473581 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1397 00:01:49.481996 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1398 00:01:49.485557 PCI: 00:19.1 assign_resources, bus 0 link: 0
1399 00:01:49.492185 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 00:01:49.498451 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1401 00:01:49.509108 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1402 00:01:49.518672 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1403 00:01:49.521968 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1404 00:01:49.532323 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1405 00:01:49.538476 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1406 00:01:49.541712 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 00:01:49.551986 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1408 00:01:49.555162 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 00:01:49.562993 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 00:01:49.568165 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1411 00:01:49.574743 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 00:01:49.578349 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 00:01:49.581625 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 00:01:49.588629 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 00:01:49.591675 LPC: Trying to open IO window from 800 size 1ff
1416 00:01:49.601411 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1417 00:01:49.608639 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1418 00:01:49.618254 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1419 00:01:49.621533 DOMAIN: 0000 assign_resources, bus 0 link: 0
1420 00:01:49.628265 Root Device assign_resources, bus 0 link: 0
1421 00:01:49.628840 Done setting resources.
1422 00:01:49.634726 Show resources in subtree (Root Device)...After assigning values.
1423 00:01:49.640945 Root Device child on link 0 DOMAIN: 0000
1424 00:01:49.644538 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1425 00:01:49.654246 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1426 00:01:49.664381 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1427 00:01:49.664946 PCI: 00:00.0
1428 00:01:49.674430 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1429 00:01:49.684068 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1430 00:01:49.693905 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1431 00:01:49.703684 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1432 00:01:49.713786 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1433 00:01:49.720481 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1434 00:01:49.731058 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1435 00:01:49.740194 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1436 00:01:49.750712 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1437 00:01:49.760516 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1438 00:01:49.766686 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1439 00:01:49.776607 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1440 00:01:49.787053 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1441 00:01:49.796904 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1442 00:01:49.806871 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1443 00:01:49.816758 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1444 00:01:49.826911 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1445 00:01:49.832946 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1446 00:01:49.842597 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1447 00:01:49.852539 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1448 00:01:49.856305 PCI: 00:02.0
1449 00:01:49.865820 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1450 00:01:49.875828 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1451 00:01:49.885732 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1452 00:01:49.888759 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1453 00:01:49.898965 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1454 00:01:49.902302 GENERIC: 0.0
1455 00:01:49.902768 PCI: 00:05.0
1456 00:01:49.915591 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1457 00:01:49.918680 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1458 00:01:49.922362 GENERIC: 0.0
1459 00:01:49.923176 PCI: 00:08.0
1460 00:01:49.932017 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1461 00:01:49.935463 PCI: 00:0a.0
1462 00:01:49.938868 PCI: 00:0d.0 child on link 0 USB0 port 0
1463 00:01:49.948890 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1464 00:01:49.955384 USB0 port 0 child on link 0 USB3 port 0
1465 00:01:49.955971 USB3 port 0
1466 00:01:49.959230 USB3 port 1
1467 00:01:49.959848 USB3 port 2
1468 00:01:49.962839 USB3 port 3
1469 00:01:49.965800 PCI: 00:14.0 child on link 0 USB0 port 0
1470 00:01:49.975255 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1471 00:01:49.978827 USB0 port 0 child on link 0 USB2 port 0
1472 00:01:49.982004 USB2 port 0
1473 00:01:49.985170 USB2 port 1
1474 00:01:49.985641 USB2 port 2
1475 00:01:49.988645 USB2 port 3
1476 00:01:49.989258 USB2 port 4
1477 00:01:49.991577 USB2 port 5
1478 00:01:49.992217 USB2 port 6
1479 00:01:49.995151 USB2 port 7
1480 00:01:49.995719 USB2 port 8
1481 00:01:49.998437 USB2 port 9
1482 00:01:49.999075 USB3 port 0
1483 00:01:50.001262 USB3 port 1
1484 00:01:50.001741 USB3 port 2
1485 00:01:50.004906 USB3 port 3
1486 00:01:50.005472 PCI: 00:14.2
1487 00:01:50.018495 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1488 00:01:50.028198 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1489 00:01:50.031518 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1490 00:01:50.041243 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1491 00:01:50.044557 GENERIC: 0.0
1492 00:01:50.047912 PCI: 00:15.0 child on link 0 I2C: 00:1a
1493 00:01:50.057828 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1494 00:01:50.061227 I2C: 00:1a
1495 00:01:50.061791 I2C: 00:31
1496 00:01:50.064220 I2C: 00:32
1497 00:01:50.068122 PCI: 00:15.1 child on link 0 I2C: 00:10
1498 00:01:50.077950 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1499 00:01:50.078525 I2C: 00:10
1500 00:01:50.081143 PCI: 00:15.2
1501 00:01:50.091002 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1502 00:01:50.094340 PCI: 00:15.3
1503 00:01:50.103943 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1504 00:01:50.104417 PCI: 00:16.0
1505 00:01:50.113794 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1506 00:01:50.116996 PCI: 00:19.0
1507 00:01:50.120249 PCI: 00:19.1 child on link 0 I2C: 00:15
1508 00:01:50.130555 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1509 00:01:50.134267 I2C: 00:15
1510 00:01:50.137645 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1511 00:01:50.146880 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1512 00:01:50.157033 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1513 00:01:50.170115 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1514 00:01:50.170694 GENERIC: 0.0
1515 00:01:50.173537 PCI: 01:00.0
1516 00:01:50.183016 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1517 00:01:50.192808 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1518 00:01:50.193383 PCI: 00:1e.0
1519 00:01:50.206487 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 00:01:50.209950 PCI: 00:1e.2 child on link 0 SPI: 00
1521 00:01:50.219242 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 00:01:50.222466 SPI: 00
1523 00:01:50.226052 PCI: 00:1e.3 child on link 0 SPI: 00
1524 00:01:50.236517 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 00:01:50.237104 SPI: 00
1526 00:01:50.242805 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 00:01:50.249090 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 00:01:50.252439 PNP: 0c09.0
1529 00:01:50.259042 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 00:01:50.265422 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 00:01:50.275070 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 00:01:50.285175 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 00:01:50.288634 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 00:01:50.289057 GENERIC: 0.0
1535 00:01:50.291701 GENERIC: 1.0
1536 00:01:50.294767 PCI: 00:1f.3
1537 00:01:50.304758 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 00:01:50.314614 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 00:01:50.315042 PCI: 00:1f.5
1540 00:01:50.328356 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 00:01:50.331992 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 00:01:50.332532 APIC: 00
1543 00:01:50.334442 APIC: 01
1544 00:01:50.334876 APIC: 03
1545 00:01:50.335312 APIC: 07
1546 00:01:50.337697 APIC: 04
1547 00:01:50.338132 APIC: 02
1548 00:01:50.338570 APIC: 06
1549 00:01:50.341285 APIC: 05
1550 00:01:50.344536 Done allocating resources.
1551 00:01:50.351281 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1552 00:01:50.354058 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 00:01:50.361248 Configure GPIOs for I2S audio on UP4.
1554 00:01:50.367962 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 00:01:50.368503 Enabling resources...
1556 00:01:50.374117 PCI: 00:00.0 subsystem <- 8086/9a12
1557 00:01:50.374701 PCI: 00:00.0 cmd <- 06
1558 00:01:50.377578 PCI: 00:02.0 subsystem <- 8086/9a40
1559 00:01:50.380407 PCI: 00:02.0 cmd <- 03
1560 00:01:50.384089 PCI: 00:04.0 subsystem <- 8086/9a03
1561 00:01:50.387270 PCI: 00:04.0 cmd <- 02
1562 00:01:50.390667 PCI: 00:05.0 subsystem <- 8086/9a19
1563 00:01:50.394403 PCI: 00:05.0 cmd <- 02
1564 00:01:50.397171 PCI: 00:08.0 subsystem <- 8086/9a11
1565 00:01:50.400598 PCI: 00:08.0 cmd <- 06
1566 00:01:50.404021 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 00:01:50.407449 PCI: 00:0d.0 cmd <- 02
1568 00:01:50.410184 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 00:01:50.413919 PCI: 00:14.0 cmd <- 02
1570 00:01:50.417020 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 00:01:50.417600 PCI: 00:14.2 cmd <- 02
1572 00:01:50.423245 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 00:01:50.423679 PCI: 00:14.3 cmd <- 02
1574 00:01:50.430647 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 00:01:50.431202 PCI: 00:15.0 cmd <- 02
1576 00:01:50.433469 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 00:01:50.436778 PCI: 00:15.1 cmd <- 02
1578 00:01:50.440004 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 00:01:50.443284 PCI: 00:15.2 cmd <- 02
1580 00:01:50.446694 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 00:01:50.449742 PCI: 00:15.3 cmd <- 02
1582 00:01:50.453307 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 00:01:50.456517 PCI: 00:16.0 cmd <- 02
1584 00:01:50.460322 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 00:01:50.462840 PCI: 00:19.1 cmd <- 02
1586 00:01:50.466574 PCI: 00:1d.0 bridge ctrl <- 0013
1587 00:01:50.469761 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 00:01:50.472879 PCI: 00:1d.0 cmd <- 06
1589 00:01:50.476331 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 00:01:50.476857 PCI: 00:1e.0 cmd <- 06
1591 00:01:50.482780 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 00:01:50.483294 PCI: 00:1e.2 cmd <- 06
1593 00:01:50.485879 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 00:01:50.489578 PCI: 00:1e.3 cmd <- 02
1595 00:01:50.492995 PCI: 00:1f.0 subsystem <- 8086/a087
1596 00:01:50.495842 PCI: 00:1f.0 cmd <- 407
1597 00:01:50.499438 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 00:01:50.502569 PCI: 00:1f.3 cmd <- 02
1599 00:01:50.505950 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 00:01:50.509337 PCI: 00:1f.5 cmd <- 406
1601 00:01:50.513598 PCI: 01:00.0 cmd <- 02
1602 00:01:50.517307 done.
1603 00:01:50.521051 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 00:01:50.523832 Initializing devices...
1605 00:01:50.527788 Root Device init
1606 00:01:50.530559 Chrome EC: Set SMI mask to 0x0000000000000000
1607 00:01:50.537747 Chrome EC: clear events_b mask to 0x0000000000000000
1608 00:01:50.544833 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 00:01:50.551881 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 00:01:50.557559 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 00:01:50.564287 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 00:01:50.567550 fw_config match found: DB_USB=USB3_ACTIVE
1613 00:01:50.574306 Configure Right Type-C port orientation for retimer
1614 00:01:50.577947 Root Device init finished in 47 msecs
1615 00:01:50.580718 PCI: 00:00.0 init
1616 00:01:50.584557 CPU TDP = 9 Watts
1617 00:01:50.585190 CPU PL1 = 9 Watts
1618 00:01:50.587350 CPU PL2 = 40 Watts
1619 00:01:50.587849 CPU PL4 = 83 Watts
1620 00:01:50.594023 PCI: 00:00.0 init finished in 8 msecs
1621 00:01:50.594612 PCI: 00:02.0 init
1622 00:01:50.596975 GMA: Found VBT in CBFS
1623 00:01:50.600662 GMA: Found valid VBT in CBFS
1624 00:01:50.607641 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 00:01:50.613998 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 00:01:50.617266 PCI: 00:02.0 init finished in 18 msecs
1627 00:01:50.620684 PCI: 00:05.0 init
1628 00:01:50.623841 PCI: 00:05.0 init finished in 0 msecs
1629 00:01:50.627237 PCI: 00:08.0 init
1630 00:01:50.630410 PCI: 00:08.0 init finished in 0 msecs
1631 00:01:50.633843 PCI: 00:14.0 init
1632 00:01:50.636612 PCI: 00:14.0 init finished in 0 msecs
1633 00:01:50.640237 PCI: 00:14.2 init
1634 00:01:50.643889 PCI: 00:14.2 init finished in 0 msecs
1635 00:01:50.644463 PCI: 00:15.0 init
1636 00:01:50.646964 I2C bus 0 version 0x3230302a
1637 00:01:50.650048 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 00:01:50.656250 PCI: 00:15.0 init finished in 6 msecs
1639 00:01:50.656824 PCI: 00:15.1 init
1640 00:01:50.660339 I2C bus 1 version 0x3230302a
1641 00:01:50.663533 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 00:01:50.666464 PCI: 00:15.1 init finished in 6 msecs
1643 00:01:50.670207 PCI: 00:15.2 init
1644 00:01:50.673545 I2C bus 2 version 0x3230302a
1645 00:01:50.676631 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 00:01:50.680248 PCI: 00:15.2 init finished in 6 msecs
1647 00:01:50.683338 PCI: 00:15.3 init
1648 00:01:50.686369 I2C bus 3 version 0x3230302a
1649 00:01:50.689559 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 00:01:50.693207 PCI: 00:15.3 init finished in 6 msecs
1651 00:01:50.696484 PCI: 00:16.0 init
1652 00:01:50.700439 PCI: 00:16.0 init finished in 0 msecs
1653 00:01:50.702781 PCI: 00:19.1 init
1654 00:01:50.706413 I2C bus 5 version 0x3230302a
1655 00:01:50.709857 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 00:01:50.712996 PCI: 00:19.1 init finished in 6 msecs
1657 00:01:50.713540 PCI: 00:1d.0 init
1658 00:01:50.716363 Initializing PCH PCIe bridge.
1659 00:01:50.722335 PCI: 00:1d.0 init finished in 3 msecs
1660 00:01:50.722804 PCI: 00:1f.0 init
1661 00:01:50.729429 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 00:01:50.732478 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 00:01:50.735793 IOAPIC: ID = 0x02
1664 00:01:50.736276 IOAPIC: Dumping registers
1665 00:01:50.739185 reg 0x0000: 0x02000000
1666 00:01:50.742766 reg 0x0001: 0x00770020
1667 00:01:50.746136 reg 0x0002: 0x00000000
1668 00:01:50.749146 PCI: 00:1f.0 init finished in 21 msecs
1669 00:01:50.752337 PCI: 00:1f.2 init
1670 00:01:50.752767 Disabling ACPI via APMC.
1671 00:01:50.757191 APMC done.
1672 00:01:50.760117 PCI: 00:1f.2 init finished in 5 msecs
1673 00:01:50.772268 PCI: 01:00.0 init
1674 00:01:50.775121 PCI: 01:00.0 init finished in 0 msecs
1675 00:01:50.778972 PNP: 0c09.0 init
1676 00:01:50.781977 Google Chrome EC uptime: 8.259 seconds
1677 00:01:50.788856 Google Chrome AP resets since EC boot: 1
1678 00:01:50.792223 Google Chrome most recent AP reset causes:
1679 00:01:50.795611 0.451: 32775 shutdown: entering G3
1680 00:01:50.802758 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 00:01:50.805092 PNP: 0c09.0 init finished in 22 msecs
1682 00:01:50.810891 Devices initialized
1683 00:01:50.814181 Show all devs... After init.
1684 00:01:50.817374 Root Device: enabled 1
1685 00:01:50.817906 DOMAIN: 0000: enabled 1
1686 00:01:50.820896 CPU_CLUSTER: 0: enabled 1
1687 00:01:50.824095 PCI: 00:00.0: enabled 1
1688 00:01:50.827752 PCI: 00:02.0: enabled 1
1689 00:01:50.828292 PCI: 00:04.0: enabled 1
1690 00:01:50.831053 PCI: 00:05.0: enabled 1
1691 00:01:50.833894 PCI: 00:06.0: enabled 0
1692 00:01:50.837193 PCI: 00:07.0: enabled 0
1693 00:01:50.837715 PCI: 00:07.1: enabled 0
1694 00:01:50.840900 PCI: 00:07.2: enabled 0
1695 00:01:50.843703 PCI: 00:07.3: enabled 0
1696 00:01:50.847406 PCI: 00:08.0: enabled 1
1697 00:01:50.848002 PCI: 00:09.0: enabled 0
1698 00:01:50.850495 PCI: 00:0a.0: enabled 0
1699 00:01:50.853941 PCI: 00:0d.0: enabled 1
1700 00:01:50.856847 PCI: 00:0d.1: enabled 0
1701 00:01:50.857275 PCI: 00:0d.2: enabled 0
1702 00:01:50.860181 PCI: 00:0d.3: enabled 0
1703 00:01:50.863871 PCI: 00:0e.0: enabled 0
1704 00:01:50.867207 PCI: 00:10.2: enabled 1
1705 00:01:50.867773 PCI: 00:10.6: enabled 0
1706 00:01:50.870246 PCI: 00:10.7: enabled 0
1707 00:01:50.873672 PCI: 00:12.0: enabled 0
1708 00:01:50.876761 PCI: 00:12.6: enabled 0
1709 00:01:50.877330 PCI: 00:13.0: enabled 0
1710 00:01:50.880096 PCI: 00:14.0: enabled 1
1711 00:01:50.883800 PCI: 00:14.1: enabled 0
1712 00:01:50.886785 PCI: 00:14.2: enabled 1
1713 00:01:50.887352 PCI: 00:14.3: enabled 1
1714 00:01:50.890142 PCI: 00:15.0: enabled 1
1715 00:01:50.893605 PCI: 00:15.1: enabled 1
1716 00:01:50.896405 PCI: 00:15.2: enabled 1
1717 00:01:50.896874 PCI: 00:15.3: enabled 1
1718 00:01:50.899803 PCI: 00:16.0: enabled 1
1719 00:01:50.903180 PCI: 00:16.1: enabled 0
1720 00:01:50.904025 PCI: 00:16.2: enabled 0
1721 00:01:50.906836 PCI: 00:16.3: enabled 0
1722 00:01:50.909770 PCI: 00:16.4: enabled 0
1723 00:01:50.912836 PCI: 00:16.5: enabled 0
1724 00:01:50.913343 PCI: 00:17.0: enabled 0
1725 00:01:50.916075 PCI: 00:19.0: enabled 0
1726 00:01:50.919264 PCI: 00:19.1: enabled 1
1727 00:01:50.923032 PCI: 00:19.2: enabled 0
1728 00:01:50.923626 PCI: 00:1c.0: enabled 1
1729 00:01:50.926540 PCI: 00:1c.1: enabled 0
1730 00:01:50.930149 PCI: 00:1c.2: enabled 0
1731 00:01:50.932562 PCI: 00:1c.3: enabled 0
1732 00:01:50.932999 PCI: 00:1c.4: enabled 0
1733 00:01:50.936019 PCI: 00:1c.5: enabled 0
1734 00:01:50.939606 PCI: 00:1c.6: enabled 1
1735 00:01:50.942900 PCI: 00:1c.7: enabled 0
1736 00:01:50.943424 PCI: 00:1d.0: enabled 1
1737 00:01:50.945876 PCI: 00:1d.1: enabled 0
1738 00:01:50.949837 PCI: 00:1d.2: enabled 1
1739 00:01:50.952519 PCI: 00:1d.3: enabled 0
1740 00:01:50.952943 PCI: 00:1e.0: enabled 1
1741 00:01:50.955853 PCI: 00:1e.1: enabled 0
1742 00:01:50.959351 PCI: 00:1e.2: enabled 1
1743 00:01:50.959853 PCI: 00:1e.3: enabled 1
1744 00:01:50.962550 PCI: 00:1f.0: enabled 1
1745 00:01:50.966434 PCI: 00:1f.1: enabled 0
1746 00:01:50.969227 PCI: 00:1f.2: enabled 1
1747 00:01:50.969661 PCI: 00:1f.3: enabled 1
1748 00:01:50.972649 PCI: 00:1f.4: enabled 0
1749 00:01:50.976688 PCI: 00:1f.5: enabled 1
1750 00:01:50.978884 PCI: 00:1f.6: enabled 0
1751 00:01:50.979318 PCI: 00:1f.7: enabled 0
1752 00:01:50.982355 APIC: 00: enabled 1
1753 00:01:50.986110 GENERIC: 0.0: enabled 1
1754 00:01:50.986650 GENERIC: 0.0: enabled 1
1755 00:01:50.989387 GENERIC: 1.0: enabled 1
1756 00:01:50.993106 GENERIC: 0.0: enabled 1
1757 00:01:50.995885 GENERIC: 1.0: enabled 1
1758 00:01:50.996407 USB0 port 0: enabled 1
1759 00:01:50.998896 GENERIC: 0.0: enabled 1
1760 00:01:51.002143 USB0 port 0: enabled 1
1761 00:01:51.005191 GENERIC: 0.0: enabled 1
1762 00:01:51.005614 I2C: 00:1a: enabled 1
1763 00:01:51.008789 I2C: 00:31: enabled 1
1764 00:01:51.012390 I2C: 00:32: enabled 1
1765 00:01:51.012954 I2C: 00:10: enabled 1
1766 00:01:51.015835 I2C: 00:15: enabled 1
1767 00:01:51.018797 GENERIC: 0.0: enabled 0
1768 00:01:51.019262 GENERIC: 1.0: enabled 0
1769 00:01:51.021929 GENERIC: 0.0: enabled 1
1770 00:01:51.025462 SPI: 00: enabled 1
1771 00:01:51.026032 SPI: 00: enabled 1
1772 00:01:51.028826 PNP: 0c09.0: enabled 1
1773 00:01:51.032077 GENERIC: 0.0: enabled 1
1774 00:01:51.035363 USB3 port 0: enabled 1
1775 00:01:51.035927 USB3 port 1: enabled 1
1776 00:01:51.038406 USB3 port 2: enabled 0
1777 00:01:51.041747 USB3 port 3: enabled 0
1778 00:01:51.042165 USB2 port 0: enabled 0
1779 00:01:51.045602 USB2 port 1: enabled 1
1780 00:01:51.048342 USB2 port 2: enabled 1
1781 00:01:51.048766 USB2 port 3: enabled 0
1782 00:01:51.052278 USB2 port 4: enabled 1
1783 00:01:51.054843 USB2 port 5: enabled 0
1784 00:01:51.058400 USB2 port 6: enabled 0
1785 00:01:51.058819 USB2 port 7: enabled 0
1786 00:01:51.061844 USB2 port 8: enabled 0
1787 00:01:51.064914 USB2 port 9: enabled 0
1788 00:01:51.065335 USB3 port 0: enabled 0
1789 00:01:51.068501 USB3 port 1: enabled 1
1790 00:01:51.071601 USB3 port 2: enabled 0
1791 00:01:51.074898 USB3 port 3: enabled 0
1792 00:01:51.075317 GENERIC: 0.0: enabled 1
1793 00:01:51.078544 GENERIC: 1.0: enabled 1
1794 00:01:51.081550 APIC: 01: enabled 1
1795 00:01:51.082067 APIC: 03: enabled 1
1796 00:01:51.085026 APIC: 07: enabled 1
1797 00:01:51.088498 APIC: 04: enabled 1
1798 00:01:51.089025 APIC: 02: enabled 1
1799 00:01:51.091365 APIC: 06: enabled 1
1800 00:01:51.091928 APIC: 05: enabled 1
1801 00:01:51.095240 PCI: 01:00.0: enabled 1
1802 00:01:51.101669 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1803 00:01:51.104860 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 00:01:51.108389 ELOG: NV offset 0xf30000 size 0x1000
1805 00:01:51.116072 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 00:01:51.123039 ELOG: Event(17) added with size 13 at 2023-09-29 00:01:49 UTC
1807 00:01:51.129779 ELOG: Event(92) added with size 9 at 2023-09-29 00:01:49 UTC
1808 00:01:51.135978 ELOG: Event(93) added with size 9 at 2023-09-29 00:01:49 UTC
1809 00:01:51.142488 ELOG: Event(9E) added with size 10 at 2023-09-29 00:01:49 UTC
1810 00:01:51.149476 ELOG: Event(9F) added with size 14 at 2023-09-29 00:01:49 UTC
1811 00:01:51.155663 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 00:01:51.162203 ELOG: Event(A1) added with size 10 at 2023-09-29 00:01:49 UTC
1813 00:01:51.168845 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1814 00:01:51.175468 ELOG: Event(A0) added with size 9 at 2023-09-29 00:01:49 UTC
1815 00:01:51.178611 elog_add_boot_reason: Logged dev mode boot
1816 00:01:51.185512 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1817 00:01:51.186058 Finalize devices...
1818 00:01:51.188801 Devices finalized
1819 00:01:51.195465 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1820 00:01:51.198723 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1821 00:01:51.205165 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1822 00:01:51.208354 ME: HFSTS1 : 0x80030055
1823 00:01:51.214995 ME: HFSTS2 : 0x30280116
1824 00:01:51.219352 ME: HFSTS3 : 0x00000050
1825 00:01:51.225513 ME: HFSTS4 : 0x00004000
1826 00:01:51.228247 ME: HFSTS5 : 0x00000000
1827 00:01:51.231932 ME: HFSTS6 : 0x40400006
1828 00:01:51.235354 ME: Manufacturing Mode : YES
1829 00:01:51.238346 ME: SPI Protection Mode Enabled : NO
1830 00:01:51.244816 ME: FW Partition Table : OK
1831 00:01:51.248291 ME: Bringup Loader Failure : NO
1832 00:01:51.251162 ME: Firmware Init Complete : NO
1833 00:01:51.254818 ME: Boot Options Present : NO
1834 00:01:51.258061 ME: Update In Progress : NO
1835 00:01:51.261567 ME: D0i3 Support : YES
1836 00:01:51.265036 ME: Low Power State Enabled : NO
1837 00:01:51.271098 ME: CPU Replaced : YES
1838 00:01:51.274384 ME: CPU Replacement Valid : YES
1839 00:01:51.277946 ME: Current Working State : 5
1840 00:01:51.281163 ME: Current Operation State : 1
1841 00:01:51.284676 ME: Current Operation Mode : 3
1842 00:01:51.288020 ME: Error Code : 0
1843 00:01:51.291355 ME: Enhanced Debug Mode : NO
1844 00:01:51.294933 ME: CPU Debug Disabled : YES
1845 00:01:51.297943 ME: TXT Support : NO
1846 00:01:51.304178 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1847 00:01:51.314177 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1848 00:01:51.317555 CBFS: 'fallback/slic' not found.
1849 00:01:51.320530 ACPI: Writing ACPI tables at 76b01000.
1850 00:01:51.321005 ACPI: * FACS
1851 00:01:51.324213 ACPI: * DSDT
1852 00:01:51.327682 Ramoops buffer: 0x100000@0x76a00000.
1853 00:01:51.331070 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1854 00:01:51.337327 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1855 00:01:51.340769 Google Chrome EC: version:
1856 00:01:51.344081 ro: voema_v2.0.10114-a447f03e46
1857 00:01:51.347138 rw: voema_v2.0.10114-a447f03e46
1858 00:01:51.347700 running image: 2
1859 00:01:51.353644 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1860 00:01:51.358995 ACPI: * FADT
1861 00:01:51.359466 SCI is IRQ9
1862 00:01:51.365718 ACPI: added table 1/32, length now 40
1863 00:01:51.366321 ACPI: * SSDT
1864 00:01:51.368859 Found 1 CPU(s) with 8 core(s) each.
1865 00:01:51.375457 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1866 00:01:51.379008 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1867 00:01:51.382460 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1868 00:01:51.385507 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1869 00:01:51.391988 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1870 00:01:51.398385 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1871 00:01:51.402248 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1872 00:01:51.408604 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1873 00:01:51.415257 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1874 00:01:51.418233 \_SB.PCI0.RP09: Added StorageD3Enable property
1875 00:01:51.425108 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1876 00:01:51.428396 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1877 00:01:51.435055 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1878 00:01:51.438212 PS2K: Passing 80 keymaps to kernel
1879 00:01:51.444995 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1880 00:01:51.451863 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1881 00:01:51.458005 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1882 00:01:51.464974 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1883 00:01:51.470947 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1884 00:01:51.477983 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1885 00:01:51.484367 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1886 00:01:51.491163 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1887 00:01:51.494418 ACPI: added table 2/32, length now 44
1888 00:01:51.494982 ACPI: * MCFG
1889 00:01:51.501435 ACPI: added table 3/32, length now 48
1890 00:01:51.501988 ACPI: * TPM2
1891 00:01:51.504083 TPM2 log created at 0x769f0000
1892 00:01:51.507530 ACPI: added table 4/32, length now 52
1893 00:01:51.511158 ACPI: * MADT
1894 00:01:51.511767 SCI is IRQ9
1895 00:01:51.514346 ACPI: added table 5/32, length now 56
1896 00:01:51.517718 current = 76b09850
1897 00:01:51.518189 ACPI: * DMAR
1898 00:01:51.521003 ACPI: added table 6/32, length now 60
1899 00:01:51.527444 ACPI: added table 7/32, length now 64
1900 00:01:51.528070 ACPI: * HPET
1901 00:01:51.530511 ACPI: added table 8/32, length now 68
1902 00:01:51.533912 ACPI: done.
1903 00:01:51.534482 ACPI tables: 35216 bytes.
1904 00:01:51.537690 smbios_write_tables: 769ef000
1905 00:01:51.540407 EC returned error result code 3
1906 00:01:51.543871 Couldn't obtain OEM name from CBI
1907 00:01:51.548274 Create SMBIOS type 16
1908 00:01:51.551770 Create SMBIOS type 17
1909 00:01:51.555653 GENERIC: 0.0 (WIFI Device)
1910 00:01:51.558198 SMBIOS tables: 1734 bytes.
1911 00:01:51.562309 Writing table forward entry at 0x00000500
1912 00:01:51.568541 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1913 00:01:51.571259 Writing coreboot table at 0x76b25000
1914 00:01:51.578230 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1915 00:01:51.581787 1. 0000000000001000-000000000009ffff: RAM
1916 00:01:51.584904 2. 00000000000a0000-00000000000fffff: RESERVED
1917 00:01:51.591865 3. 0000000000100000-00000000769eefff: RAM
1918 00:01:51.594538 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1919 00:01:51.600887 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1920 00:01:51.607992 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1921 00:01:51.610945 7. 0000000077000000-000000007fbfffff: RESERVED
1922 00:01:51.618031 8. 00000000c0000000-00000000cfffffff: RESERVED
1923 00:01:51.620920 9. 00000000f8000000-00000000f9ffffff: RESERVED
1924 00:01:51.627180 10. 00000000fb000000-00000000fb000fff: RESERVED
1925 00:01:51.630861 11. 00000000fe000000-00000000fe00ffff: RESERVED
1926 00:01:51.634134 12. 00000000fed80000-00000000fed87fff: RESERVED
1927 00:01:51.640287 13. 00000000fed90000-00000000fed92fff: RESERVED
1928 00:01:51.644528 14. 00000000feda0000-00000000feda1fff: RESERVED
1929 00:01:51.650577 15. 00000000fedc0000-00000000feddffff: RESERVED
1930 00:01:51.654353 16. 0000000100000000-00000004803fffff: RAM
1931 00:01:51.657301 Passing 4 GPIOs to payload:
1932 00:01:51.663426 NAME | PORT | POLARITY | VALUE
1933 00:01:51.667300 lid | undefined | high | high
1934 00:01:51.674173 power | undefined | high | low
1935 00:01:51.676793 oprom | undefined | high | low
1936 00:01:51.683542 EC in RW | 0x000000e5 | high | high
1937 00:01:51.690532 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1938 00:01:51.693789 coreboot table: 1576 bytes.
1939 00:01:51.696583 IMD ROOT 0. 0x76fff000 0x00001000
1940 00:01:51.699926 IMD SMALL 1. 0x76ffe000 0x00001000
1941 00:01:51.703006 FSP MEMORY 2. 0x76c4e000 0x003b0000
1942 00:01:51.706519 VPD 3. 0x76c4d000 0x00000367
1943 00:01:51.710199 RO MCACHE 4. 0x76c4c000 0x00000fdc
1944 00:01:51.716474 CONSOLE 5. 0x76c2c000 0x00020000
1945 00:01:51.719397 FMAP 6. 0x76c2b000 0x00000578
1946 00:01:51.722903 TIME STAMP 7. 0x76c2a000 0x00000910
1947 00:01:51.726347 VBOOT WORK 8. 0x76c16000 0x00014000
1948 00:01:51.729767 ROMSTG STCK 9. 0x76c15000 0x00001000
1949 00:01:51.732955 AFTER CAR 10. 0x76c0a000 0x0000b000
1950 00:01:51.736368 RAMSTAGE 11. 0x76b97000 0x00073000
1951 00:01:51.739039 REFCODE 12. 0x76b42000 0x00055000
1952 00:01:51.746118 SMM BACKUP 13. 0x76b32000 0x00010000
1953 00:01:51.749198 4f444749 14. 0x76b30000 0x00002000
1954 00:01:51.752855 EXT VBT15. 0x76b2d000 0x0000219f
1955 00:01:51.756338 COREBOOT 16. 0x76b25000 0x00008000
1956 00:01:51.759060 ACPI 17. 0x76b01000 0x00024000
1957 00:01:51.762506 ACPI GNVS 18. 0x76b00000 0x00001000
1958 00:01:51.765622 RAMOOPS 19. 0x76a00000 0x00100000
1959 00:01:51.768872 TPM2 TCGLOG20. 0x769f0000 0x00010000
1960 00:01:51.775465 SMBIOS 21. 0x769ef000 0x00000800
1961 00:01:51.776051 IMD small region:
1962 00:01:51.778787 IMD ROOT 0. 0x76ffec00 0x00000400
1963 00:01:51.785342 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1964 00:01:51.788811 POWER STATE 2. 0x76ffeb80 0x00000044
1965 00:01:51.792866 ROMSTAGE 3. 0x76ffeb60 0x00000004
1966 00:01:51.795247 MEM INFO 4. 0x76ffe980 0x000001e0
1967 00:01:51.801651 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1968 00:01:51.805299 MTRR: Physical address space:
1969 00:01:51.811812 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1970 00:01:51.819028 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1971 00:01:51.821515 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1972 00:01:51.827989 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1973 00:01:51.834673 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1974 00:01:51.841032 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1975 00:01:51.848144 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1976 00:01:51.850897 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 00:01:51.857675 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 00:01:51.860990 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 00:01:51.864623 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 00:01:51.867831 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 00:01:51.871107 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 00:01:51.877505 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 00:01:51.881458 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 00:01:51.883878 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 00:01:51.887297 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 00:01:51.893815 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 00:01:51.897697 call enable_fixed_mtrr()
1988 00:01:51.900332 CPU physical address size: 39 bits
1989 00:01:51.903641 MTRR: default type WB/UC MTRR counts: 6/7.
1990 00:01:51.910200 MTRR: WB selected as default type.
1991 00:01:51.913491 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1992 00:01:51.920127 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1993 00:01:51.926934 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1994 00:01:51.933541 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1995 00:01:51.940071 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1996 00:01:51.946757 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1997 00:01:51.950327
1998 00:01:51.950892 MTRR check
1999 00:01:51.953882 Fixed MTRRs : Enabled
2000 00:01:51.954451 Variable MTRRs: Enabled
2001 00:01:51.954831
2002 00:01:51.960621 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 00:01:51.963867 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 00:01:51.966881 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 00:01:51.970037 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 00:01:51.976678 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 00:01:51.979920 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 00:01:51.983569 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 00:01:51.986930 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 00:01:51.993890 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 00:01:51.996886 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 00:01:51.999931 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 00:01:52.007143 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2014 00:01:52.010407 call enable_fixed_mtrr()
2015 00:01:52.014023 Checking cr50 for pending updates
2016 00:01:52.017127 CPU physical address size: 39 bits
2017 00:01:52.021239 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 00:01:52.024296 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 00:01:52.031295 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 00:01:52.034090 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 00:01:52.037972 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 00:01:52.042024 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 00:01:52.047694 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 00:01:52.050829 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 00:01:52.054233 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 00:01:52.057342 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 00:01:52.064623 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 00:01:52.067169 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 00:01:52.073839 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 00:01:52.074432 call enable_fixed_mtrr()
2031 00:01:52.080683 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 00:01:52.083532 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 00:01:52.086747 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 00:01:52.090475 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 00:01:52.093619 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 00:01:52.100240 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 00:01:52.104188 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 00:01:52.106581 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 00:01:52.110457 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 00:01:52.116823 CPU physical address size: 39 bits
2041 00:01:52.121551 call enable_fixed_mtrr()
2042 00:01:52.123586 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 00:01:52.130543 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 00:01:52.133633 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 00:01:52.137440 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 00:01:52.140437 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 00:01:52.147014 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 00:01:52.150149 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 00:01:52.153746 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 00:01:52.156976 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 00:01:52.163297 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 00:01:52.166500 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 00:01:52.169841 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 00:01:52.177435 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 00:01:52.180122 MTRR: Fixed MSR 0x259 0x0000000000000000
2056 00:01:52.183688 MTRR: Fixed MSR 0x268 0x0606060606060606
2057 00:01:52.187364 MTRR: Fixed MSR 0x269 0x0606060606060606
2058 00:01:52.193894 MTRR: Fixed MSR 0x26a 0x0606060606060606
2059 00:01:52.197043 MTRR: Fixed MSR 0x26b 0x0606060606060606
2060 00:01:52.200212 MTRR: Fixed MSR 0x26c 0x0606060606060606
2061 00:01:52.203589 MTRR: Fixed MSR 0x26d 0x0606060606060606
2062 00:01:52.209864 MTRR: Fixed MSR 0x26e 0x0606060606060606
2063 00:01:52.213126 MTRR: Fixed MSR 0x26f 0x0606060606060606
2064 00:01:52.216475 call enable_fixed_mtrr()
2065 00:01:52.219656 call enable_fixed_mtrr()
2066 00:01:52.223335 CPU physical address size: 39 bits
2067 00:01:52.226460 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 00:01:52.229602 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 00:01:52.236464 MTRR: Fixed MSR 0x258 0x0606060606060606
2070 00:01:52.239578 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 00:01:52.242821 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 00:01:52.246653 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 00:01:52.253342 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 00:01:52.256170 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 00:01:52.259655 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 00:01:52.263076 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 00:01:52.269278 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 00:01:52.272474 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 00:01:52.279400 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 00:01:52.280106 call enable_fixed_mtrr()
2081 00:01:52.286515 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 00:01:52.289223 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 00:01:52.292602 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 00:01:52.296380 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 00:01:52.302529 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 00:01:52.305600 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 00:01:52.309229 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 00:01:52.312270 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 00:01:52.319141 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 00:01:52.322585 CPU physical address size: 39 bits
2091 00:01:52.327474 call enable_fixed_mtrr()
2092 00:01:52.330760 CPU physical address size: 39 bits
2093 00:01:52.334984 CPU physical address size: 39 bits
2094 00:01:52.341736 CPU physical address size: 39 bits
2095 00:01:52.342260 Reading cr50 TPM mode
2096 00:01:52.352223 BS: BS_PAYLOAD_LOAD entry times (exec / console): 333 / 6 ms
2097 00:01:52.361986 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2098 00:01:52.365389 Checking segment from ROM address 0xffc02b38
2099 00:01:52.370161 Checking segment from ROM address 0xffc02b54
2100 00:01:52.375915 Loading segment from ROM address 0xffc02b38
2101 00:01:52.376493 code (compression=0)
2102 00:01:52.385269 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2103 00:01:52.394947 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2104 00:01:52.395505 it's not compressed!
2105 00:01:52.535982 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2106 00:01:52.542326 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2107 00:01:52.549065 Loading segment from ROM address 0xffc02b54
2108 00:01:52.552366 Entry Point 0x30000000
2109 00:01:52.552945 Loaded segments
2110 00:01:52.558971 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2111 00:01:52.603801 Finalizing chipset.
2112 00:01:52.607020 Finalizing SMM.
2113 00:01:52.607504 APMC done.
2114 00:01:52.613459 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2115 00:01:52.617483 mp_park_aps done after 0 msecs.
2116 00:01:52.619981 Jumping to boot code at 0x30000000(0x76b25000)
2117 00:01:52.630652 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2118 00:01:52.631222
2119 00:01:52.633203
2120 00:01:52.633675
2121 00:01:52.634874 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2122 00:01:52.635409 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2123 00:01:52.635926 Setting prompt string to ['volteer:']
2124 00:01:52.636424 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2125 00:01:52.637225 Starting depthcharge on Voema...
2126 00:01:52.637624
2127 00:01:52.643842 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2128 00:01:52.644425
2129 00:01:52.650746 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2130 00:01:52.651441
2131 00:01:52.656643 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2132 00:01:52.657249
2133 00:01:52.659896 Failed to find eMMC card reader
2134 00:01:52.660365
2135 00:01:52.662904 Wipe memory regions:
2136 00:01:52.663503
2137 00:01:52.666529 [0x00000000001000, 0x000000000a0000)
2138 00:01:52.666995
2139 00:01:52.670311 [0x00000000100000, 0x00000030000000)
2140 00:01:52.704325
2141 00:01:52.707104 [0x00000032662db0, 0x000000769ef000)
2142 00:01:52.754948
2143 00:01:52.758169 [0x00000100000000, 0x00000480400000)
2144 00:01:53.402264
2145 00:01:53.405990 ec_init: CrosEC protocol v3 supported (256, 256)
2146 00:01:53.837600
2147 00:01:53.838166 R8152: Initializing
2148 00:01:53.838543
2149 00:01:53.840254 Version 6 (ocp_data = 5c30)
2150 00:01:53.840720
2151 00:01:53.843623 R8152: Done initializing
2152 00:01:53.844247
2153 00:01:53.847281 Adding net device
2154 00:01:54.148551
2155 00:01:54.151392 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2156 00:01:54.151946
2157 00:01:54.152332
2158 00:01:54.152679
2159 00:01:54.154982 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2161 00:01:54.256562 volteer: tftpboot 192.168.201.1 11637360/tftp-deploy-y61gq6kf/kernel/bzImage 11637360/tftp-deploy-y61gq6kf/kernel/cmdline 11637360/tftp-deploy-y61gq6kf/ramdisk/ramdisk.cpio.gz
2162 00:01:54.257225 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2163 00:01:54.257814 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2164 00:01:54.262344 tftpboot 192.168.201.1 11637360/tftp-deploy-y61gq6kf/kernel/bzIploy-y61gq6kf/kernel/cmdline 11637360/tftp-deploy-y61gq6kf/ramdisk/ramdisk.cpio.gz
2165 00:01:54.262843
2166 00:01:54.263222 Waiting for link
2167 00:01:54.465727
2168 00:01:54.466290 done.
2169 00:01:54.466668
2170 00:01:54.467018 MAC: 00:24:32:30:7d:ab
2171 00:01:54.467359
2172 00:01:54.468323 Sending DHCP discover... done.
2173 00:01:54.468798
2174 00:01:54.471569 Waiting for reply... done.
2175 00:01:54.472101
2176 00:01:54.475398 Sending DHCP request... done.
2177 00:01:54.475984
2178 00:01:54.486662 Waiting for reply... done.
2179 00:01:54.486829
2180 00:01:54.486908 My ip is 192.168.201.20
2181 00:01:54.486979
2182 00:01:54.493255 The DHCP server ip is 192.168.201.1
2183 00:01:54.493437
2184 00:01:54.495989 TFTP server IP predefined by user: 192.168.201.1
2185 00:01:54.496172
2186 00:01:54.503157 Bootfile predefined by user: 11637360/tftp-deploy-y61gq6kf/kernel/bzImage
2187 00:01:54.503356
2188 00:01:54.506089 Sending tftp read request... done.
2189 00:01:54.506288
2190 00:01:54.512981 Waiting for the transfer...
2191 00:01:54.513217
2192 00:01:55.184401 00000000 ################################################################
2193 00:01:55.184693
2194 00:01:55.815475 00080000 ################################################################
2195 00:01:55.816098
2196 00:01:56.491478 00100000 ################################################################
2197 00:01:56.492037
2198 00:01:57.175100 00180000 ################################################################
2199 00:01:57.175640
2200 00:01:57.883838 00200000 ################################################################
2201 00:01:57.884385
2202 00:01:58.600306 00280000 ################################################################
2203 00:01:58.600854
2204 00:01:59.293056 00300000 ################################################################
2205 00:01:59.293587
2206 00:02:00.006716 00380000 ################################################################
2207 00:02:00.007270
2208 00:02:00.726860 00400000 ################################################################
2209 00:02:00.727408
2210 00:02:01.458440 00480000 ################################################################
2211 00:02:01.459061
2212 00:02:02.196290 00500000 ################################################################
2213 00:02:02.196869
2214 00:02:02.903652 00580000 ################################################################
2215 00:02:02.904245
2216 00:02:03.616965 00600000 ################################################################
2217 00:02:03.617526
2218 00:02:04.327412 00680000 ################################################################
2219 00:02:04.328016
2220 00:02:05.026338 00700000 ################################################################
2221 00:02:05.026884
2222 00:02:05.737405 00780000 ################################################################
2223 00:02:05.738001
2224 00:02:06.461864 00800000 ################################################################
2225 00:02:06.462512
2226 00:02:07.197981 00880000 ################################################################
2227 00:02:07.198540
2228 00:02:07.918288 00900000 ################################################################
2229 00:02:07.918825
2230 00:02:08.644341 00980000 ################################################################
2231 00:02:08.644871
2232 00:02:09.345432 00a00000 ################################################################
2233 00:02:09.345962
2234 00:02:09.978454 00a80000 ######################################################### done.
2235 00:02:09.978990
2236 00:02:09.982195 The bootfile was 11473408 bytes long.
2237 00:02:09.982729
2238 00:02:09.985116 Sending tftp read request... done.
2239 00:02:09.985651
2240 00:02:09.988240 Waiting for the transfer...
2241 00:02:09.988737
2242 00:02:10.685959 00000000 ################################################################
2243 00:02:10.686504
2244 00:02:11.391673 00080000 ################################################################
2245 00:02:11.392253
2246 00:02:12.091965 00100000 ################################################################
2247 00:02:12.092518
2248 00:02:12.809844 00180000 ################################################################
2249 00:02:12.810435
2250 00:02:13.545053 00200000 ################################################################
2251 00:02:13.545628
2252 00:02:14.270050 00280000 ################################################################
2253 00:02:14.270605
2254 00:02:14.982768 00300000 ################################################################
2255 00:02:14.983318
2256 00:02:15.690411 00380000 ################################################################
2257 00:02:15.690943
2258 00:02:16.409980 00400000 ################################################################
2259 00:02:16.410604
2260 00:02:17.127625 00480000 ################################################################
2261 00:02:17.128200
2262 00:02:17.843605 00500000 ################################################################
2263 00:02:17.844203
2264 00:02:18.554391 00580000 ################################################################
2265 00:02:18.554962
2266 00:02:18.711963 00600000 ############## done.
2267 00:02:18.712524
2268 00:02:18.715420 Sending tftp read request... done.
2269 00:02:18.715932
2270 00:02:18.718370 Waiting for the transfer...
2271 00:02:18.718836
2272 00:02:18.721862 00000000 # done.
2273 00:02:18.722340
2274 00:02:18.728744 Command line loaded dynamically from TFTP file: 11637360/tftp-deploy-y61gq6kf/kernel/cmdline
2275 00:02:18.729364
2276 00:02:18.754818 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11637360/extract-nfsrootfs-h67n3os1,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2277 00:02:18.759668
2278 00:02:18.762822 Shutting down all USB controllers.
2279 00:02:18.763389
2280 00:02:18.763812 Removing current net device
2281 00:02:18.764175
2282 00:02:18.765646 Finalizing coreboot
2283 00:02:18.766113
2284 00:02:18.772346 Exiting depthcharge with code 4 at timestamp: 34715877
2285 00:02:18.773051
2286 00:02:18.773447
2287 00:02:18.773805 Starting kernel ...
2288 00:02:18.774148
2289 00:02:18.775438 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2290 00:02:18.776009 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2291 00:02:18.776424 Setting prompt string to ['Linux version [0-9]']
2292 00:02:18.776807 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2293 00:02:18.777189 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2294 00:02:18.778070
2296 00:06:36.776895 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2298 00:06:36.778014 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2300 00:06:36.779004 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2303 00:06:36.780576 end: 2 depthcharge-action (duration 00:05:00) [common]
2305 00:06:36.781824 Cleaning after the job
2306 00:06:36.781940 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/ramdisk
2307 00:06:36.782885 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/kernel
2308 00:06:36.784611 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/nfsrootfs
2309 00:06:36.900435 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11637360/tftp-deploy-y61gq6kf/modules
2310 00:06:36.901180 start: 4.1 power-off (timeout 00:00:30) [common]
2311 00:06:36.901357 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2312 00:06:36.985963 >> Command sent successfully.
2313 00:06:36.999034 Returned 0 in 0 seconds
2314 00:06:37.100337 end: 4.1 power-off (duration 00:00:00) [common]
2316 00:06:37.101953 start: 4.2 read-feedback (timeout 00:10:00) [common]
2317 00:06:37.103293 Listened to connection for namespace 'common' for up to 1s
2318 00:06:38.104185 Finalising connection for namespace 'common'
2319 00:06:38.104904 Disconnecting from shell: Finalise
2320 00:06:38.105339
2321 00:06:38.206343 end: 4.2 read-feedback (duration 00:00:01) [common]
2322 00:06:38.206980 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11637360
2323 00:06:38.712377 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11637360
2324 00:06:38.712573 JobError: Your job cannot terminate cleanly.