Boot log: asus-C436FA-Flip-hatch

    1 00:40:47.926449  lava-dispatcher, installed at version: 2023.06
    2 00:40:47.926664  start: 0 validate
    3 00:40:47.926798  Start time: 2023-09-29 00:40:47.926790+00:00 (UTC)
    4 00:40:47.926928  Using caching service: 'http://localhost/cache/?uri=%s'
    5 00:40:47.927103  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 00:40:48.192917  Using caching service: 'http://localhost/cache/?uri=%s'
    7 00:40:48.193657  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.295-cip103%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 00:40:48.464307  Using caching service: 'http://localhost/cache/?uri=%s'
    9 00:40:48.465003  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 00:40:48.734969  Using caching service: 'http://localhost/cache/?uri=%s'
   11 00:40:48.735616  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.295-cip103%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 00:40:49.011728  validate duration: 1.08
   14 00:40:49.012002  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 00:40:49.012098  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 00:40:49.012184  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 00:40:49.012312  Not decompressing ramdisk as can be used compressed.
   18 00:40:49.012397  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
   19 00:40:49.012465  saving as /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/ramdisk/initrd.cpio.gz
   20 00:40:49.012531  total size: 5671549 (5 MB)
   21 00:40:49.013563  progress   0 % (0 MB)
   22 00:40:49.015235  progress   5 % (0 MB)
   23 00:40:49.017053  progress  10 % (0 MB)
   24 00:40:49.018526  progress  15 % (0 MB)
   25 00:40:49.020137  progress  20 % (1 MB)
   26 00:40:49.021741  progress  25 % (1 MB)
   27 00:40:49.023177  progress  30 % (1 MB)
   28 00:40:49.024766  progress  35 % (1 MB)
   29 00:40:49.026292  progress  40 % (2 MB)
   30 00:40:49.027823  progress  45 % (2 MB)
   31 00:40:49.029584  progress  50 % (2 MB)
   32 00:40:49.031138  progress  55 % (3 MB)
   33 00:40:49.032644  progress  60 % (3 MB)
   34 00:40:49.034200  progress  65 % (3 MB)
   35 00:40:49.035836  progress  70 % (3 MB)
   36 00:40:49.037245  progress  75 % (4 MB)
   37 00:40:49.038805  progress  80 % (4 MB)
   38 00:40:49.040408  progress  85 % (4 MB)
   39 00:40:49.041781  progress  90 % (4 MB)
   40 00:40:49.043305  progress  95 % (5 MB)
   41 00:40:49.045027  progress 100 % (5 MB)
   42 00:40:49.045192  5 MB downloaded in 0.03 s (165.67 MB/s)
   43 00:40:49.045381  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 00:40:49.045684  end: 1.1 download-retry (duration 00:00:00) [common]
   46 00:40:49.045784  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 00:40:49.045867  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 00:40:49.046048  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.295-cip103/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 00:40:49.046147  saving as /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/kernel/bzImage
   50 00:40:49.046224  total size: 11473408 (10 MB)
   51 00:40:49.046300  No compression specified
   52 00:40:49.047521  progress   0 % (0 MB)
   53 00:40:49.050771  progress   5 % (0 MB)
   54 00:40:49.054040  progress  10 % (1 MB)
   55 00:40:49.057068  progress  15 % (1 MB)
   56 00:40:49.060164  progress  20 % (2 MB)
   57 00:40:49.063160  progress  25 % (2 MB)
   58 00:40:49.066265  progress  30 % (3 MB)
   59 00:40:49.069198  progress  35 % (3 MB)
   60 00:40:49.072297  progress  40 % (4 MB)
   61 00:40:49.075245  progress  45 % (4 MB)
   62 00:40:49.078421  progress  50 % (5 MB)
   63 00:40:49.081344  progress  55 % (6 MB)
   64 00:40:49.084437  progress  60 % (6 MB)
   65 00:40:49.087434  progress  65 % (7 MB)
   66 00:40:49.090487  progress  70 % (7 MB)
   67 00:40:49.093400  progress  75 % (8 MB)
   68 00:40:49.096415  progress  80 % (8 MB)
   69 00:40:49.099258  progress  85 % (9 MB)
   70 00:40:49.102374  progress  90 % (9 MB)
   71 00:40:49.105238  progress  95 % (10 MB)
   72 00:40:49.108311  progress 100 % (10 MB)
   73 00:40:49.108435  10 MB downloaded in 0.06 s (175.89 MB/s)
   74 00:40:49.108582  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 00:40:49.108814  end: 1.2 download-retry (duration 00:00:00) [common]
   77 00:40:49.108903  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 00:40:49.108990  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 00:40:49.109133  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
   80 00:40:49.109201  saving as /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/nfsrootfs/full.rootfs.tar
   81 00:40:49.109262  total size: 126031368 (120 MB)
   82 00:40:49.109324  Using unxz to decompress xz
   83 00:40:49.113581  progress   0 % (0 MB)
   84 00:40:49.596609  progress   5 % (6 MB)
   85 00:40:50.083162  progress  10 % (12 MB)
   86 00:40:50.577758  progress  15 % (18 MB)
   87 00:40:51.088682  progress  20 % (24 MB)
   88 00:40:51.430279  progress  25 % (30 MB)
   89 00:40:51.767401  progress  30 % (36 MB)
   90 00:40:52.037473  progress  35 % (42 MB)
   91 00:40:52.218167  progress  40 % (48 MB)
   92 00:40:52.579593  progress  45 % (54 MB)
   93 00:40:52.952370  progress  50 % (60 MB)
   94 00:40:53.290910  progress  55 % (66 MB)
   95 00:40:53.645019  progress  60 % (72 MB)
   96 00:40:53.979615  progress  65 % (78 MB)
   97 00:40:54.362216  progress  70 % (84 MB)
   98 00:40:54.772911  progress  75 % (90 MB)
   99 00:40:55.189574  progress  80 % (96 MB)
  100 00:40:55.289243  progress  85 % (102 MB)
  101 00:40:55.444112  progress  90 % (108 MB)
  102 00:40:55.775506  progress  95 % (114 MB)
  103 00:40:56.148472  progress 100 % (120 MB)
  104 00:40:56.153480  120 MB downloaded in 7.04 s (17.06 MB/s)
  105 00:40:56.153735  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 00:40:56.153993  end: 1.3 download-retry (duration 00:00:07) [common]
  108 00:40:56.154083  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 00:40:56.154170  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 00:40:56.154327  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.295-cip103/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 00:40:56.154399  saving as /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/modules/modules.tar
  112 00:40:56.154461  total size: 484416 (0 MB)
  113 00:40:56.154528  Using unxz to decompress xz
  114 00:40:56.158974  progress   6 % (0 MB)
  115 00:40:56.159377  progress  13 % (0 MB)
  116 00:40:56.159613  progress  20 % (0 MB)
  117 00:40:56.161347  progress  27 % (0 MB)
  118 00:40:56.163435  progress  33 % (0 MB)
  119 00:40:56.165440  progress  40 % (0 MB)
  120 00:40:56.167543  progress  47 % (0 MB)
  121 00:40:56.169702  progress  54 % (0 MB)
  122 00:40:56.171936  progress  60 % (0 MB)
  123 00:40:56.174484  progress  67 % (0 MB)
  124 00:40:56.176688  progress  74 % (0 MB)
  125 00:40:56.179011  progress  81 % (0 MB)
  126 00:40:56.181313  progress  87 % (0 MB)
  127 00:40:56.183176  progress  94 % (0 MB)
  128 00:40:56.185617  progress 100 % (0 MB)
  129 00:40:56.192063  0 MB downloaded in 0.04 s (12.29 MB/s)
  130 00:40:56.192349  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 00:40:56.192748  end: 1.4 download-retry (duration 00:00:00) [common]
  133 00:40:56.192875  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  134 00:40:56.193008  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  135 00:40:59.261444  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11637357/extract-nfsrootfs-tl4js2ty
  136 00:40:59.261644  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  137 00:40:59.261743  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  138 00:40:59.261904  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96
  139 00:40:59.262038  makedir: /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin
  140 00:40:59.262142  makedir: /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/tests
  141 00:40:59.262244  makedir: /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/results
  142 00:40:59.262346  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-add-keys
  143 00:40:59.262492  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-add-sources
  144 00:40:59.262626  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-background-process-start
  145 00:40:59.262756  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-background-process-stop
  146 00:40:59.262887  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-common-functions
  147 00:40:59.263016  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-echo-ipv4
  148 00:40:59.263144  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-install-packages
  149 00:40:59.263272  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-installed-packages
  150 00:40:59.263399  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-os-build
  151 00:40:59.263527  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-probe-channel
  152 00:40:59.263869  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-probe-ip
  153 00:40:59.264003  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-target-ip
  154 00:40:59.264133  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-target-mac
  155 00:40:59.264261  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-target-storage
  156 00:40:59.264391  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-test-case
  157 00:40:59.264520  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-test-event
  158 00:40:59.264647  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-test-feedback
  159 00:40:59.264775  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-test-raise
  160 00:40:59.264902  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-test-reference
  161 00:40:59.265029  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-test-runner
  162 00:40:59.265156  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-test-set
  163 00:40:59.265282  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-test-shell
  164 00:40:59.265410  Updating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-install-packages (oe)
  165 00:40:59.265566  Updating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/bin/lava-installed-packages (oe)
  166 00:40:59.265691  Creating /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/environment
  167 00:40:59.265788  LAVA metadata
  168 00:40:59.265859  - LAVA_JOB_ID=11637357
  169 00:40:59.265922  - LAVA_DISPATCHER_IP=192.168.201.1
  170 00:40:59.266021  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  171 00:40:59.266088  skipped lava-vland-overlay
  172 00:40:59.266163  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 00:40:59.266241  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  174 00:40:59.266302  skipped lava-multinode-overlay
  175 00:40:59.266374  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 00:40:59.266459  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  177 00:40:59.266533  Loading test definitions
  178 00:40:59.266622  start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
  179 00:40:59.266691  Using /lava-11637357 at stage 0
  180 00:40:59.266787  Fetching tests from https://github.com/kernelci/test-definitions
  181 00:40:59.266866  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/0/tests/0_ltp-timers'
  182 00:41:02.800681  Running '/usr/bin/git checkout kernelci.org
  183 00:41:02.947877  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
  184 00:41:02.948613  uuid=11637357_1.5.2.3.1 testdef=None
  185 00:41:02.948779  end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
  187 00:41:02.949035  start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
  188 00:41:02.949712  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  190 00:41:02.949944  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
  191 00:41:02.950804  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  193 00:41:02.951040  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
  194 00:41:02.951883  runner path: /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/0/tests/0_ltp-timers test_uuid 11637357_1.5.2.3.1
  195 00:41:02.951975  GRP_TEST='TMR'
  196 00:41:02.952040  SKIPFILE='skipfile-lkft.yaml'
  197 00:41:02.952100  SKIP_INSTALL='true'
  198 00:41:02.952158  TST_CMDFILES=''
  199 00:41:02.952296  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  201 00:41:02.952503  Creating lava-test-runner.conf files
  202 00:41:02.952568  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11637357/lava-overlay-x7f2qz96/lava-11637357/0 for stage 0
  203 00:41:02.952660  - 0_ltp-timers
  204 00:41:02.952764  end: 1.5.2.3 test-definition (duration 00:00:04) [common]
  205 00:41:02.952853  start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
  206 00:41:10.370008  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  207 00:41:10.370170  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
  208 00:41:10.370259  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  209 00:41:10.370363  end: 1.5.2 lava-overlay (duration 00:00:11) [common]
  210 00:41:10.370457  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
  211 00:41:10.513821  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  212 00:41:10.514233  start: 1.5.4 extract-modules (timeout 00:09:38) [common]
  213 00:41:10.514355  extracting modules file /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11637357/extract-nfsrootfs-tl4js2ty
  214 00:41:10.535370  extracting modules file /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11637357/extract-overlay-ramdisk-to9c3nub/ramdisk
  215 00:41:10.556196  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  216 00:41:10.556341  start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
  217 00:41:10.556433  [common] Applying overlay to NFS
  218 00:41:10.556507  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11637357/compress-overlay-745tngfn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11637357/extract-nfsrootfs-tl4js2ty
  219 00:41:11.486491  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  220 00:41:11.486668  start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
  221 00:41:11.486763  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  222 00:41:11.486851  start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
  223 00:41:11.486932  Building ramdisk /var/lib/lava/dispatcher/tmp/11637357/extract-overlay-ramdisk-to9c3nub/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11637357/extract-overlay-ramdisk-to9c3nub/ramdisk
  224 00:41:11.579028  >> 31372 blocks

  225 00:41:12.193500  rename /var/lib/lava/dispatcher/tmp/11637357/extract-overlay-ramdisk-to9c3nub/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/ramdisk/ramdisk.cpio.gz
  226 00:41:12.193959  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  227 00:41:12.194087  start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
  228 00:41:12.194188  start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
  229 00:41:12.194284  No mkimage arch provided, not using FIT.
  230 00:41:12.194376  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  231 00:41:12.194460  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  232 00:41:12.194563  end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
  233 00:41:12.194656  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
  234 00:41:12.194740  No LXC device requested
  235 00:41:12.194818  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  236 00:41:12.194908  start: 1.7 deploy-device-env (timeout 00:09:37) [common]
  237 00:41:12.194988  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  238 00:41:12.195060  Checking files for TFTP limit of 4294967296 bytes.
  239 00:41:12.195475  end: 1 tftp-deploy (duration 00:00:23) [common]
  240 00:41:12.195581  start: 2 depthcharge-action (timeout 00:05:00) [common]
  241 00:41:12.195711  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  242 00:41:12.195835  substitutions:
  243 00:41:12.195902  - {DTB}: None
  244 00:41:12.195968  - {INITRD}: 11637357/tftp-deploy-hvu02uy5/ramdisk/ramdisk.cpio.gz
  245 00:41:12.196028  - {KERNEL}: 11637357/tftp-deploy-hvu02uy5/kernel/bzImage
  246 00:41:12.196088  - {LAVA_MAC}: None
  247 00:41:12.196144  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11637357/extract-nfsrootfs-tl4js2ty
  248 00:41:12.196204  - {NFS_SERVER_IP}: 192.168.201.1
  249 00:41:12.196259  - {PRESEED_CONFIG}: None
  250 00:41:12.196315  - {PRESEED_LOCAL}: None
  251 00:41:12.196371  - {RAMDISK}: 11637357/tftp-deploy-hvu02uy5/ramdisk/ramdisk.cpio.gz
  252 00:41:12.196427  - {ROOT_PART}: None
  253 00:41:12.196482  - {ROOT}: None
  254 00:41:12.196537  - {SERVER_IP}: 192.168.201.1
  255 00:41:12.196591  - {TEE}: None
  256 00:41:12.196646  Parsed boot commands:
  257 00:41:12.196701  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  258 00:41:12.196881  Parsed boot commands: tftpboot 192.168.201.1 11637357/tftp-deploy-hvu02uy5/kernel/bzImage 11637357/tftp-deploy-hvu02uy5/kernel/cmdline 11637357/tftp-deploy-hvu02uy5/ramdisk/ramdisk.cpio.gz
  259 00:41:12.196974  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  260 00:41:12.197059  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  261 00:41:12.197153  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  262 00:41:12.197246  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  263 00:41:12.197321  Not connected, no need to disconnect.
  264 00:41:12.197396  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  265 00:41:12.197481  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  266 00:41:12.197548  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
  267 00:41:12.201692  Setting prompt string to ['lava-test: # ']
  268 00:41:12.202054  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  269 00:41:12.202167  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  270 00:41:12.202270  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  271 00:41:12.202358  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  272 00:41:12.202591  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  273 00:41:17.340752  >> Command sent successfully.

  274 00:41:17.343281  Returned 0 in 5 seconds
  275 00:41:17.444107  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  277 00:41:17.445500  end: 2.2.2 reset-device (duration 00:00:05) [common]
  278 00:41:17.446017  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  279 00:41:17.446493  Setting prompt string to 'Starting depthcharge on Helios...'
  280 00:41:17.446853  Changing prompt to 'Starting depthcharge on Helios...'
  281 00:41:17.447221  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  282 00:41:17.448633  [Enter `^Ec?' for help]

  283 00:41:18.065146  

  284 00:41:18.065701  

  285 00:41:18.075241  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  286 00:41:18.078912  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  287 00:41:18.085059  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  288 00:41:18.088872  CPU: AES supported, TXT NOT supported, VT supported

  289 00:41:18.095228  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  290 00:41:18.098795  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  291 00:41:18.105035  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  292 00:41:18.108705  VBOOT: Loading verstage.

  293 00:41:18.112198  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  294 00:41:18.118892  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  295 00:41:18.121735  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  296 00:41:18.125120  CBFS @ c08000 size 3f8000

  297 00:41:18.132109  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  298 00:41:18.134944  CBFS: Locating 'fallback/verstage'

  299 00:41:18.138926  CBFS: Found @ offset 10fb80 size 1072c

  300 00:41:18.142165  

  301 00:41:18.142694  

  302 00:41:18.152038  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  303 00:41:18.166499  Probing TPM: . done!

  304 00:41:18.169398  TPM ready after 0 ms

  305 00:41:18.173142  Connected to device vid:did:rid of 1ae0:0028:00

  306 00:41:18.183697  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  307 00:41:18.186697  Initialized TPM device CR50 revision 0

  308 00:41:18.231145  tlcl_send_startup: Startup return code is 0

  309 00:41:18.231707  TPM: setup succeeded

  310 00:41:18.243836  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  311 00:41:18.248232  Chrome EC: UHEPI supported

  312 00:41:18.251455  Phase 1

  313 00:41:18.255218  FMAP: area GBB found @ c05000 (12288 bytes)

  314 00:41:18.261283  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  315 00:41:18.261809  Phase 2

  316 00:41:18.264428  Phase 3

  317 00:41:18.268061  FMAP: area GBB found @ c05000 (12288 bytes)

  318 00:41:18.274539  VB2:vb2_report_dev_firmware() This is developer signed firmware

  319 00:41:18.281238  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  320 00:41:18.284710  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  321 00:41:18.290851  VB2:vb2_verify_keyblock() Checking keyblock signature...

  322 00:41:18.306567  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  323 00:41:18.310116  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  324 00:41:18.316578  VB2:vb2_verify_fw_preamble() Verifying preamble.

  325 00:41:18.321072  Phase 4

  326 00:41:18.324037  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  327 00:41:18.331251  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  328 00:41:18.510349  VB2:vb2_rsa_verify_digest() Digest check failed!

  329 00:41:18.517146  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  330 00:41:18.517682  Saving nvdata

  331 00:41:18.520082  Reboot requested (10020007)

  332 00:41:18.523196  board_reset() called!

  333 00:41:18.523629  full_reset() called!

  334 00:41:23.032072  

  335 00:41:23.032235  

  336 00:41:23.041927  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  337 00:41:23.045070  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  338 00:41:23.051668  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  339 00:41:23.055029  CPU: AES supported, TXT NOT supported, VT supported

  340 00:41:23.061703  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  341 00:41:23.064723  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  342 00:41:23.071865  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  343 00:41:23.075440  VBOOT: Loading verstage.

  344 00:41:23.078662  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  345 00:41:23.084760  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  346 00:41:23.088542  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  347 00:41:23.091766  CBFS @ c08000 size 3f8000

  348 00:41:23.097979  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  349 00:41:23.101747  CBFS: Locating 'fallback/verstage'

  350 00:41:23.104427  CBFS: Found @ offset 10fb80 size 1072c

  351 00:41:23.108666  

  352 00:41:23.108771  

  353 00:41:23.118863  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  354 00:41:23.133433  Probing TPM: . done!

  355 00:41:23.136589  TPM ready after 0 ms

  356 00:41:23.140088  Connected to device vid:did:rid of 1ae0:0028:00

  357 00:41:23.149938  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  358 00:41:23.153767  Initialized TPM device CR50 revision 0

  359 00:41:23.198060  tlcl_send_startup: Startup return code is 0

  360 00:41:23.198510  TPM: setup succeeded

  361 00:41:23.210958  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  362 00:41:23.215106  Chrome EC: UHEPI supported

  363 00:41:23.218319  Phase 1

  364 00:41:23.221421  FMAP: area GBB found @ c05000 (12288 bytes)

  365 00:41:23.228131  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  366 00:41:23.234674  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  367 00:41:23.237931  Recovery requested (1009000e)

  368 00:41:23.243265  Saving nvdata

  369 00:41:23.250251  tlcl_extend: response is 0

  370 00:41:23.258898  tlcl_extend: response is 0

  371 00:41:23.265627  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 00:41:23.268828  CBFS @ c08000 size 3f8000

  373 00:41:23.275944  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 00:41:23.278821  CBFS: Locating 'fallback/romstage'

  375 00:41:23.281956  CBFS: Found @ offset 80 size 145fc

  376 00:41:23.286032  Accumulated console time in verstage 98 ms

  377 00:41:23.286649  

  378 00:41:23.287145  

  379 00:41:23.298804  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  380 00:41:23.305730  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  381 00:41:23.308894  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  382 00:41:23.312101  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  383 00:41:23.318727  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  384 00:41:23.322298  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  385 00:41:23.324907  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  386 00:41:23.328383  TCO_STS:   0000 0000

  387 00:41:23.332195  GEN_PMCON: e0015238 00000200

  388 00:41:23.334962  GBLRST_CAUSE: 00000000 00000000

  389 00:41:23.335397  prev_sleep_state 5

  390 00:41:23.338547  Boot Count incremented to 65244

  391 00:41:23.345368  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  392 00:41:23.348749  CBFS @ c08000 size 3f8000

  393 00:41:23.355235  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  394 00:41:23.355844  CBFS: Locating 'fspm.bin'

  395 00:41:23.361784  CBFS: Found @ offset 5ffc0 size 71000

  396 00:41:23.365290  Chrome EC: UHEPI supported

  397 00:41:23.371436  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  398 00:41:23.375194  Probing TPM:  done!

  399 00:41:23.382006  Connected to device vid:did:rid of 1ae0:0028:00

  400 00:41:23.392088  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  401 00:41:23.397709  Initialized TPM device CR50 revision 0

  402 00:41:23.406930  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  403 00:41:23.413391  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  404 00:41:23.416380  MRC cache found, size 1948

  405 00:41:23.419894  bootmode is set to: 2

  406 00:41:23.423466  PRMRR disabled by config.

  407 00:41:23.426573  SPD INDEX = 1

  408 00:41:23.429773  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  409 00:41:23.433331  CBFS @ c08000 size 3f8000

  410 00:41:23.439828  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  411 00:41:23.440359  CBFS: Locating 'spd.bin'

  412 00:41:23.442782  CBFS: Found @ offset 5fb80 size 400

  413 00:41:23.446291  SPD: module type is LPDDR3

  414 00:41:23.449472  SPD: module part is 

  415 00:41:23.456329  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  416 00:41:23.459815  SPD: device width 4 bits, bus width 8 bits

  417 00:41:23.463105  SPD: module size is 4096 MB (per channel)

  418 00:41:23.466173  memory slot: 0 configuration done.

  419 00:41:23.469692  memory slot: 2 configuration done.

  420 00:41:23.521045  CBMEM:

  421 00:41:23.524181  IMD: root @ 99fff000 254 entries.

  422 00:41:23.527013  IMD: root @ 99ffec00 62 entries.

  423 00:41:23.530862  External stage cache:

  424 00:41:23.534156  IMD: root @ 9abff000 254 entries.

  425 00:41:23.537985  IMD: root @ 9abfec00 62 entries.

  426 00:41:23.540670  Chrome EC: clear events_b mask to 0x0000000020004000

  427 00:41:23.556842  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  428 00:41:23.569939  tlcl_write: response is 0

  429 00:41:23.578860  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  430 00:41:23.585635  MRC: TPM MRC hash updated successfully.

  431 00:41:23.586234  2 DIMMs found

  432 00:41:23.588938  SMM Memory Map

  433 00:41:23.591970  SMRAM       : 0x9a000000 0x1000000

  434 00:41:23.595605   Subregion 0: 0x9a000000 0xa00000

  435 00:41:23.599134   Subregion 1: 0x9aa00000 0x200000

  436 00:41:23.602246   Subregion 2: 0x9ac00000 0x400000

  437 00:41:23.605854  top_of_ram = 0x9a000000

  438 00:41:23.608671  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  439 00:41:23.615842  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  440 00:41:23.619220  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  441 00:41:23.625370  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 00:41:23.628386  CBFS @ c08000 size 3f8000

  443 00:41:23.632221  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 00:41:23.635079  CBFS: Locating 'fallback/postcar'

  445 00:41:23.642169  CBFS: Found @ offset 107000 size 4b44

  446 00:41:23.645330  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  447 00:41:23.657735  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  448 00:41:23.661558  Processing 180 relocs. Offset value of 0x97c0c000

  449 00:41:23.669980  Accumulated console time in romstage 285 ms

  450 00:41:23.670505  

  451 00:41:23.670852  

  452 00:41:23.679575  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  453 00:41:23.686032  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  454 00:41:23.689221  CBFS @ c08000 size 3f8000

  455 00:41:23.692549  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  456 00:41:23.699319  CBFS: Locating 'fallback/ramstage'

  457 00:41:23.702490  CBFS: Found @ offset 43380 size 1b9e8

  458 00:41:23.709223  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  459 00:41:23.741345  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  460 00:41:23.745164  Processing 3976 relocs. Offset value of 0x98db0000

  461 00:41:23.751541  Accumulated console time in postcar 52 ms

  462 00:41:23.752183  

  463 00:41:23.752640  

  464 00:41:23.761315  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  465 00:41:23.767908  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  466 00:41:23.771245  WARNING: RO_VPD is uninitialized or empty.

  467 00:41:23.774269  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  468 00:41:23.781300  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  469 00:41:23.781882  Normal boot.

  470 00:41:23.788116  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  471 00:41:23.791254  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  472 00:41:23.794749  CBFS @ c08000 size 3f8000

  473 00:41:23.801234  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  474 00:41:23.804416  CBFS: Locating 'cpu_microcode_blob.bin'

  475 00:41:23.807562  CBFS: Found @ offset 14700 size 2ec00

  476 00:41:23.810681  microcode: sig=0x806ec pf=0x4 revision=0xc9

  477 00:41:23.814554  Skip microcode update

  478 00:41:23.820827  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  479 00:41:23.821424  CBFS @ c08000 size 3f8000

  480 00:41:23.827762  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  481 00:41:23.830906  CBFS: Locating 'fsps.bin'

  482 00:41:23.833952  CBFS: Found @ offset d1fc0 size 35000

  483 00:41:23.859171  Detected 4 core, 8 thread CPU.

  484 00:41:23.863115  Setting up SMI for CPU

  485 00:41:23.866218  IED base = 0x9ac00000

  486 00:41:23.866836  IED size = 0x00400000

  487 00:41:23.869254  Will perform SMM setup.

  488 00:41:23.876241  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  489 00:41:23.882691  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  490 00:41:23.885800  Processing 16 relocs. Offset value of 0x00030000

  491 00:41:23.889557  Attempting to start 7 APs

  492 00:41:23.892929  Waiting for 10ms after sending INIT.

  493 00:41:23.909443  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.

  494 00:41:23.910033  done.

  495 00:41:23.912212  AP: slot 1 apic_id 3.

  496 00:41:23.915827  AP: slot 4 apic_id 2.

  497 00:41:23.916262  AP: slot 5 apic_id 5.

  498 00:41:23.918926  AP: slot 6 apic_id 4.

  499 00:41:23.922605  AP: slot 7 apic_id 7.

  500 00:41:23.923053  AP: slot 3 apic_id 6.

  501 00:41:23.928873  Waiting for 2nd SIPI to complete...done.

  502 00:41:23.935689  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  503 00:41:23.942462  Processing 13 relocs. Offset value of 0x00038000

  504 00:41:23.945617  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  505 00:41:23.952198  Installing SMM handler to 0x9a000000

  506 00:41:23.958777  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  507 00:41:23.965897  Processing 658 relocs. Offset value of 0x9a010000

  508 00:41:23.972388  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  509 00:41:23.975187  Processing 13 relocs. Offset value of 0x9a008000

  510 00:41:23.981931  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  511 00:41:23.989255  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  512 00:41:23.992041  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  513 00:41:23.998568  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  514 00:41:24.005607  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  515 00:41:24.012294  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  516 00:41:24.015406  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  517 00:41:24.022380  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  518 00:41:24.026138  Clearing SMI status registers

  519 00:41:24.028836  SMI_STS: PM1 

  520 00:41:24.029369  PM1_STS: PWRBTN 

  521 00:41:24.032354  TCO_STS: SECOND_TO 

  522 00:41:24.035262  New SMBASE 0x9a000000

  523 00:41:24.038454  In relocation handler: CPU 0

  524 00:41:24.041701  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  525 00:41:24.045436  Writing SMRR. base = 0x9a000006, mask=0xff000800

  526 00:41:24.048630  Relocation complete.

  527 00:41:24.051888  New SMBASE 0x99fff800

  528 00:41:24.055398  In relocation handler: CPU 2

  529 00:41:24.058538  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  530 00:41:24.061717  Writing SMRR. base = 0x9a000006, mask=0xff000800

  531 00:41:24.065426  Relocation complete.

  532 00:41:24.068569  New SMBASE 0x99fffc00

  533 00:41:24.069163  In relocation handler: CPU 1

  534 00:41:24.074997  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  535 00:41:24.077954  Writing SMRR. base = 0x9a000006, mask=0xff000800

  536 00:41:24.081544  Relocation complete.

  537 00:41:24.082095  New SMBASE 0x99fff000

  538 00:41:24.084794  In relocation handler: CPU 4

  539 00:41:24.091234  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  540 00:41:24.095050  Writing SMRR. base = 0x9a000006, mask=0xff000800

  541 00:41:24.098089  Relocation complete.

  542 00:41:24.098670  New SMBASE 0x99fff400

  543 00:41:24.101210  In relocation handler: CPU 3

  544 00:41:24.108345  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  545 00:41:24.111314  Writing SMRR. base = 0x9a000006, mask=0xff000800

  546 00:41:24.114776  Relocation complete.

  547 00:41:24.115427  New SMBASE 0x99ffe400

  548 00:41:24.117941  In relocation handler: CPU 7

  549 00:41:24.121611  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  550 00:41:24.127834  Writing SMRR. base = 0x9a000006, mask=0xff000800

  551 00:41:24.131669  Relocation complete.

  552 00:41:24.132245  New SMBASE 0x99ffec00

  553 00:41:24.134754  In relocation handler: CPU 5

  554 00:41:24.137898  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  555 00:41:24.144648  Writing SMRR. base = 0x9a000006, mask=0xff000800

  556 00:41:24.145260  Relocation complete.

  557 00:41:24.148089  New SMBASE 0x99ffe800

  558 00:41:24.151028  In relocation handler: CPU 6

  559 00:41:24.154390  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  560 00:41:24.161632  Writing SMRR. base = 0x9a000006, mask=0xff000800

  561 00:41:24.162235  Relocation complete.

  562 00:41:24.164796  Initializing CPU #0

  563 00:41:24.167965  CPU: vendor Intel device 806ec

  564 00:41:24.171027  CPU: family 06, model 8e, stepping 0c

  565 00:41:24.174775  Clearing out pending MCEs

  566 00:41:24.177952  Setting up local APIC...

  567 00:41:24.178599   apic_id: 0x00 done.

  568 00:41:24.181444  Turbo is available but hidden

  569 00:41:24.184463  Turbo is available and visible

  570 00:41:24.187502  VMX status: enabled

  571 00:41:24.191321  IA32_FEATURE_CONTROL status: locked

  572 00:41:24.194375  Skip microcode update

  573 00:41:24.194948  CPU #0 initialized

  574 00:41:24.197923  Initializing CPU #2

  575 00:41:24.200759  Initializing CPU #6

  576 00:41:24.201425  Initializing CPU #3

  577 00:41:24.204663  Initializing CPU #7

  578 00:41:24.207790  CPU: vendor Intel device 806ec

  579 00:41:24.210824  CPU: family 06, model 8e, stepping 0c

  580 00:41:24.214594  CPU: vendor Intel device 806ec

  581 00:41:24.217446  CPU: family 06, model 8e, stepping 0c

  582 00:41:24.220866  Clearing out pending MCEs

  583 00:41:24.223959  Clearing out pending MCEs

  584 00:41:24.224045  Setting up local APIC...

  585 00:41:24.227292  CPU: vendor Intel device 806ec

  586 00:41:24.230141  CPU: family 06, model 8e, stepping 0c

  587 00:41:24.233899  Clearing out pending MCEs

  588 00:41:24.237033  Initializing CPU #5

  589 00:41:24.240303  CPU: vendor Intel device 806ec

  590 00:41:24.243405  CPU: family 06, model 8e, stepping 0c

  591 00:41:24.247087  CPU: vendor Intel device 806ec

  592 00:41:24.250253  CPU: family 06, model 8e, stepping 0c

  593 00:41:24.253265  Clearing out pending MCEs

  594 00:41:24.257053  Clearing out pending MCEs

  595 00:41:24.257153  Setting up local APIC...

  596 00:41:24.259952  Initializing CPU #1

  597 00:41:24.263429  Initializing CPU #4

  598 00:41:24.263528  CPU: vendor Intel device 806ec

  599 00:41:24.269973  CPU: family 06, model 8e, stepping 0c

  600 00:41:24.273422  CPU: vendor Intel device 806ec

  601 00:41:24.276466  CPU: family 06, model 8e, stepping 0c

  602 00:41:24.279969  Clearing out pending MCEs

  603 00:41:24.280075  Clearing out pending MCEs

  604 00:41:24.283552  Setting up local APIC...

  605 00:41:24.286480  Setting up local APIC...

  606 00:41:24.286583   apic_id: 0x03 done.

  607 00:41:24.289647  Setting up local APIC...

  608 00:41:24.292956  Setting up local APIC...

  609 00:41:24.296531   apic_id: 0x02 done.

  610 00:41:24.296635  VMX status: enabled

  611 00:41:24.299597  VMX status: enabled

  612 00:41:24.303334  IA32_FEATURE_CONTROL status: locked

  613 00:41:24.306318  IA32_FEATURE_CONTROL status: locked

  614 00:41:24.309911  Skip microcode update

  615 00:41:24.310026  Skip microcode update

  616 00:41:24.312860  CPU #1 initialized

  617 00:41:24.316607  CPU #4 initialized

  618 00:41:24.316684   apic_id: 0x07 done.

  619 00:41:24.319942   apic_id: 0x06 done.

  620 00:41:24.323116  VMX status: enabled

  621 00:41:24.323200  VMX status: enabled

  622 00:41:24.326673  IA32_FEATURE_CONTROL status: locked

  623 00:41:24.329731  IA32_FEATURE_CONTROL status: locked

  624 00:41:24.333125  Skip microcode update

  625 00:41:24.336351  Skip microcode update

  626 00:41:24.336457  CPU #7 initialized

  627 00:41:24.339347  CPU #3 initialized

  628 00:41:24.339484   apic_id: 0x01 done.

  629 00:41:24.342808   apic_id: 0x04 done.

  630 00:41:24.346375  Setting up local APIC...

  631 00:41:24.349672  VMX status: enabled

  632 00:41:24.349800  VMX status: enabled

  633 00:41:24.352932   apic_id: 0x05 done.

  634 00:41:24.356807  IA32_FEATURE_CONTROL status: locked

  635 00:41:24.356966  VMX status: enabled

  636 00:41:24.360009  Skip microcode update

  637 00:41:24.363124  IA32_FEATURE_CONTROL status: locked

  638 00:41:24.366455  CPU #6 initialized

  639 00:41:24.366665  Skip microcode update

  640 00:41:24.372786  IA32_FEATURE_CONTROL status: locked

  641 00:41:24.373038  CPU #5 initialized

  642 00:41:24.376585  Skip microcode update

  643 00:41:24.376891  CPU #2 initialized

  644 00:41:24.383587  bsp_do_flight_plan done after 452 msecs.

  645 00:41:24.386690  CPU: frequency set to 4200 MHz

  646 00:41:24.387144  Enabling SMIs.

  647 00:41:24.389989  Locking SMM.

  648 00:41:24.403042  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  649 00:41:24.406597  CBFS @ c08000 size 3f8000

  650 00:41:24.412714  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  651 00:41:24.413148  CBFS: Locating 'vbt.bin'

  652 00:41:24.419336  CBFS: Found @ offset 5f5c0 size 499

  653 00:41:24.422235  Found a VBT of 4608 bytes after decompression

  654 00:41:24.609250  Display FSP Version Info HOB

  655 00:41:24.612495  Reference Code - CPU = 9.0.1e.30

  656 00:41:24.616430  uCode Version = 0.0.0.ca

  657 00:41:24.619222  TXT ACM version = ff.ff.ff.ffff

  658 00:41:24.622186  Display FSP Version Info HOB

  659 00:41:24.626120  Reference Code - ME = 9.0.1e.30

  660 00:41:24.629372  MEBx version = 0.0.0.0

  661 00:41:24.632602  ME Firmware Version = Consumer SKU

  662 00:41:24.635797  Display FSP Version Info HOB

  663 00:41:24.639172  Reference Code - CML PCH = 9.0.1e.30

  664 00:41:24.642125  PCH-CRID Status = Disabled

  665 00:41:24.645832  PCH-CRID Original Value = ff.ff.ff.ffff

  666 00:41:24.649109  PCH-CRID New Value = ff.ff.ff.ffff

  667 00:41:24.652628  OPROM - RST - RAID = ff.ff.ff.ffff

  668 00:41:24.656125  ChipsetInit Base Version = ff.ff.ff.ffff

  669 00:41:24.658883  ChipsetInit Oem Version = ff.ff.ff.ffff

  670 00:41:24.662456  Display FSP Version Info HOB

  671 00:41:24.668587  Reference Code - SA - System Agent = 9.0.1e.30

  672 00:41:24.671951  Reference Code - MRC = 0.7.1.6c

  673 00:41:24.672382  SA - PCIe Version = 9.0.1e.30

  674 00:41:24.675385  SA-CRID Status = Disabled

  675 00:41:24.679481  SA-CRID Original Value = 0.0.0.c

  676 00:41:24.682080  SA-CRID New Value = 0.0.0.c

  677 00:41:24.685906  OPROM - VBIOS = ff.ff.ff.ffff

  678 00:41:24.688982  RTC Init

  679 00:41:24.691806  Set power on after power failure.

  680 00:41:24.692303  Disabling Deep S3

  681 00:41:24.696056  Disabling Deep S3

  682 00:41:24.696586  Disabling Deep S4

  683 00:41:24.698720  Disabling Deep S4

  684 00:41:24.699157  Disabling Deep S5

  685 00:41:24.701944  Disabling Deep S5

  686 00:41:24.708267  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1

  687 00:41:24.708783  Enumerating buses...

  688 00:41:24.715030  Show all devs... Before device enumeration.

  689 00:41:24.715558  Root Device: enabled 1

  690 00:41:24.718546  CPU_CLUSTER: 0: enabled 1

  691 00:41:24.721718  DOMAIN: 0000: enabled 1

  692 00:41:24.725003  APIC: 00: enabled 1

  693 00:41:24.725441  PCI: 00:00.0: enabled 1

  694 00:41:24.728124  PCI: 00:02.0: enabled 1

  695 00:41:24.731862  PCI: 00:04.0: enabled 0

  696 00:41:24.734858  PCI: 00:05.0: enabled 0

  697 00:41:24.735284  PCI: 00:12.0: enabled 1

  698 00:41:24.738688  PCI: 00:12.5: enabled 0

  699 00:41:24.741915  PCI: 00:12.6: enabled 0

  700 00:41:24.742352  PCI: 00:14.0: enabled 1

  701 00:41:24.744995  PCI: 00:14.1: enabled 0

  702 00:41:24.748456  PCI: 00:14.3: enabled 1

  703 00:41:24.751984  PCI: 00:14.5: enabled 0

  704 00:41:24.752411  PCI: 00:15.0: enabled 1

  705 00:41:24.755223  PCI: 00:15.1: enabled 1

  706 00:41:24.758443  PCI: 00:15.2: enabled 0

  707 00:41:24.761778  PCI: 00:15.3: enabled 0

  708 00:41:24.762205  PCI: 00:16.0: enabled 1

  709 00:41:24.764893  PCI: 00:16.1: enabled 0

  710 00:41:24.768335  PCI: 00:16.2: enabled 0

  711 00:41:24.771380  PCI: 00:16.3: enabled 0

  712 00:41:24.771853  PCI: 00:16.4: enabled 0

  713 00:41:24.774877  PCI: 00:16.5: enabled 0

  714 00:41:24.778532  PCI: 00:17.0: enabled 1

  715 00:41:24.778983  PCI: 00:19.0: enabled 1

  716 00:41:24.781120  PCI: 00:19.1: enabled 0

  717 00:41:24.784815  PCI: 00:19.2: enabled 0

  718 00:41:24.788205  PCI: 00:1a.0: enabled 0

  719 00:41:24.788635  PCI: 00:1c.0: enabled 0

  720 00:41:24.791412  PCI: 00:1c.1: enabled 0

  721 00:41:24.794950  PCI: 00:1c.2: enabled 0

  722 00:41:24.797914  PCI: 00:1c.3: enabled 0

  723 00:41:24.798340  PCI: 00:1c.4: enabled 0

  724 00:41:24.801190  PCI: 00:1c.5: enabled 0

  725 00:41:24.804311  PCI: 00:1c.6: enabled 0

  726 00:41:24.807699  PCI: 00:1c.7: enabled 0

  727 00:41:24.808133  PCI: 00:1d.0: enabled 1

  728 00:41:24.811312  PCI: 00:1d.1: enabled 0

  729 00:41:24.814397  PCI: 00:1d.2: enabled 0

  730 00:41:24.817975  PCI: 00:1d.3: enabled 0

  731 00:41:24.818513  PCI: 00:1d.4: enabled 0

  732 00:41:24.820908  PCI: 00:1d.5: enabled 1

  733 00:41:24.824696  PCI: 00:1e.0: enabled 1

  734 00:41:24.825245  PCI: 00:1e.1: enabled 0

  735 00:41:24.828099  PCI: 00:1e.2: enabled 1

  736 00:41:24.831277  PCI: 00:1e.3: enabled 1

  737 00:41:24.834355  PCI: 00:1f.0: enabled 1

  738 00:41:24.834891  PCI: 00:1f.1: enabled 1

  739 00:41:24.837749  PCI: 00:1f.2: enabled 1

  740 00:41:24.841303  PCI: 00:1f.3: enabled 1

  741 00:41:24.843997  PCI: 00:1f.4: enabled 1

  742 00:41:24.844429  PCI: 00:1f.5: enabled 1

  743 00:41:24.847870  PCI: 00:1f.6: enabled 0

  744 00:41:24.851143  USB0 port 0: enabled 1

  745 00:41:24.851725  I2C: 00:15: enabled 1

  746 00:41:24.854192  I2C: 00:5d: enabled 1

  747 00:41:24.857231  GENERIC: 0.0: enabled 1

  748 00:41:24.861210  I2C: 00:1a: enabled 1

  749 00:41:24.861742  I2C: 00:38: enabled 1

  750 00:41:24.863996  I2C: 00:39: enabled 1

  751 00:41:24.867315  I2C: 00:3a: enabled 1

  752 00:41:24.867894  I2C: 00:3b: enabled 1

  753 00:41:24.870391  PCI: 00:00.0: enabled 1

  754 00:41:24.873740  SPI: 00: enabled 1

  755 00:41:24.874213  SPI: 01: enabled 1

  756 00:41:24.877051  PNP: 0c09.0: enabled 1

  757 00:41:24.880525  USB2 port 0: enabled 1

  758 00:41:24.880952  USB2 port 1: enabled 1

  759 00:41:24.883875  USB2 port 2: enabled 0

  760 00:41:24.887165  USB2 port 3: enabled 0

  761 00:41:24.887752  USB2 port 5: enabled 0

  762 00:41:24.890832  USB2 port 6: enabled 1

  763 00:41:24.894521  USB2 port 9: enabled 1

  764 00:41:24.897088  USB3 port 0: enabled 1

  765 00:41:24.897513  USB3 port 1: enabled 1

  766 00:41:24.900597  USB3 port 2: enabled 1

  767 00:41:24.903776  USB3 port 3: enabled 1

  768 00:41:24.904349  USB3 port 4: enabled 0

  769 00:41:24.907205  APIC: 03: enabled 1

  770 00:41:24.910812  APIC: 01: enabled 1

  771 00:41:24.911341  APIC: 06: enabled 1

  772 00:41:24.913644  APIC: 02: enabled 1

  773 00:41:24.914093  APIC: 05: enabled 1

  774 00:41:24.917236  APIC: 04: enabled 1

  775 00:41:24.920242  APIC: 07: enabled 1

  776 00:41:24.920668  Compare with tree...

  777 00:41:24.923712  Root Device: enabled 1

  778 00:41:24.927631   CPU_CLUSTER: 0: enabled 1

  779 00:41:24.930114    APIC: 00: enabled 1

  780 00:41:24.930539    APIC: 03: enabled 1

  781 00:41:24.933798    APIC: 01: enabled 1

  782 00:41:24.937056    APIC: 06: enabled 1

  783 00:41:24.937484    APIC: 02: enabled 1

  784 00:41:24.940558    APIC: 05: enabled 1

  785 00:41:24.943431    APIC: 04: enabled 1

  786 00:41:24.944006    APIC: 07: enabled 1

  787 00:41:24.947266   DOMAIN: 0000: enabled 1

  788 00:41:24.950159    PCI: 00:00.0: enabled 1

  789 00:41:24.953330    PCI: 00:02.0: enabled 1

  790 00:41:24.953755    PCI: 00:04.0: enabled 0

  791 00:41:24.956454    PCI: 00:05.0: enabled 0

  792 00:41:24.960621    PCI: 00:12.0: enabled 1

  793 00:41:24.963585    PCI: 00:12.5: enabled 0

  794 00:41:24.966522    PCI: 00:12.6: enabled 0

  795 00:41:24.967113    PCI: 00:14.0: enabled 1

  796 00:41:24.969633     USB0 port 0: enabled 1

  797 00:41:24.973456      USB2 port 0: enabled 1

  798 00:41:24.976412      USB2 port 1: enabled 1

  799 00:41:24.979545      USB2 port 2: enabled 0

  800 00:41:24.983142      USB2 port 3: enabled 0

  801 00:41:24.983568      USB2 port 5: enabled 0

  802 00:41:24.986722      USB2 port 6: enabled 1

  803 00:41:24.989762      USB2 port 9: enabled 1

  804 00:41:24.993013      USB3 port 0: enabled 1

  805 00:41:24.996387      USB3 port 1: enabled 1

  806 00:41:24.996813      USB3 port 2: enabled 1

  807 00:41:24.999809      USB3 port 3: enabled 1

  808 00:41:25.003386      USB3 port 4: enabled 0

  809 00:41:25.006347    PCI: 00:14.1: enabled 0

  810 00:41:25.009258    PCI: 00:14.3: enabled 1

  811 00:41:25.012696    PCI: 00:14.5: enabled 0

  812 00:41:25.013415    PCI: 00:15.0: enabled 1

  813 00:41:25.015820     I2C: 00:15: enabled 1

  814 00:41:25.019131    PCI: 00:15.1: enabled 1

  815 00:41:25.023206     I2C: 00:5d: enabled 1

  816 00:41:25.023791     GENERIC: 0.0: enabled 1

  817 00:41:25.026188    PCI: 00:15.2: enabled 0

  818 00:41:25.029071    PCI: 00:15.3: enabled 0

  819 00:41:25.033172    PCI: 00:16.0: enabled 1

  820 00:41:25.036617    PCI: 00:16.1: enabled 0

  821 00:41:25.037155    PCI: 00:16.2: enabled 0

  822 00:41:25.039408    PCI: 00:16.3: enabled 0

  823 00:41:25.042362    PCI: 00:16.4: enabled 0

  824 00:41:25.046168    PCI: 00:16.5: enabled 0

  825 00:41:25.049631    PCI: 00:17.0: enabled 1

  826 00:41:25.050163    PCI: 00:19.0: enabled 1

  827 00:41:25.052847     I2C: 00:1a: enabled 1

  828 00:41:25.055609     I2C: 00:38: enabled 1

  829 00:41:25.058910     I2C: 00:39: enabled 1

  830 00:41:25.059446     I2C: 00:3a: enabled 1

  831 00:41:25.062773     I2C: 00:3b: enabled 1

  832 00:41:25.065477    PCI: 00:19.1: enabled 0

  833 00:41:25.068483    PCI: 00:19.2: enabled 0

  834 00:41:25.072196    PCI: 00:1a.0: enabled 0

  835 00:41:25.072673    PCI: 00:1c.0: enabled 0

  836 00:41:25.075298    PCI: 00:1c.1: enabled 0

  837 00:41:25.078567    PCI: 00:1c.2: enabled 0

  838 00:41:25.082170    PCI: 00:1c.3: enabled 0

  839 00:41:25.085332    PCI: 00:1c.4: enabled 0

  840 00:41:25.085757    PCI: 00:1c.5: enabled 0

  841 00:41:25.088559    PCI: 00:1c.6: enabled 0

  842 00:41:25.091756    PCI: 00:1c.7: enabled 0

  843 00:41:25.095529    PCI: 00:1d.0: enabled 1

  844 00:41:25.099291    PCI: 00:1d.1: enabled 0

  845 00:41:25.099887    PCI: 00:1d.2: enabled 0

  846 00:41:25.102111    PCI: 00:1d.3: enabled 0

  847 00:41:25.105026    PCI: 00:1d.4: enabled 0

  848 00:41:25.108563    PCI: 00:1d.5: enabled 1

  849 00:41:25.112133     PCI: 00:00.0: enabled 1

  850 00:41:25.112660    PCI: 00:1e.0: enabled 1

  851 00:41:25.115420    PCI: 00:1e.1: enabled 0

  852 00:41:25.118291    PCI: 00:1e.2: enabled 1

  853 00:41:25.121696     SPI: 00: enabled 1

  854 00:41:25.122123    PCI: 00:1e.3: enabled 1

  855 00:41:25.124868     SPI: 01: enabled 1

  856 00:41:25.128188    PCI: 00:1f.0: enabled 1

  857 00:41:25.131701     PNP: 0c09.0: enabled 1

  858 00:41:25.132144    PCI: 00:1f.1: enabled 1

  859 00:41:25.134765    PCI: 00:1f.2: enabled 1

  860 00:41:25.138681    PCI: 00:1f.3: enabled 1

  861 00:41:25.141647    PCI: 00:1f.4: enabled 1

  862 00:41:25.144588    PCI: 00:1f.5: enabled 1

  863 00:41:25.145037    PCI: 00:1f.6: enabled 0

  864 00:41:25.148157  Root Device scanning...

  865 00:41:25.151575  scan_static_bus for Root Device

  866 00:41:25.154603  CPU_CLUSTER: 0 enabled

  867 00:41:25.158273  DOMAIN: 0000 enabled

  868 00:41:25.158806  DOMAIN: 0000 scanning...

  869 00:41:25.162016  PCI: pci_scan_bus for bus 00

  870 00:41:25.164385  PCI: 00:00.0 [8086/0000] ops

  871 00:41:25.168048  PCI: 00:00.0 [8086/9b61] enabled

  872 00:41:25.171488  PCI: 00:02.0 [8086/0000] bus ops

  873 00:41:25.174383  PCI: 00:02.0 [8086/9b41] enabled

  874 00:41:25.177534  PCI: 00:04.0 [8086/1903] disabled

  875 00:41:25.181437  PCI: 00:08.0 [8086/1911] enabled

  876 00:41:25.184737  PCI: 00:12.0 [8086/02f9] enabled

  877 00:41:25.187694  PCI: 00:14.0 [8086/0000] bus ops

  878 00:41:25.191550  PCI: 00:14.0 [8086/02ed] enabled

  879 00:41:25.194642  PCI: 00:14.2 [8086/02ef] enabled

  880 00:41:25.197868  PCI: 00:14.3 [8086/02f0] enabled

  881 00:41:25.201030  PCI: 00:15.0 [8086/0000] bus ops

  882 00:41:25.204872  PCI: 00:15.0 [8086/02e8] enabled

  883 00:41:25.207633  PCI: 00:15.1 [8086/0000] bus ops

  884 00:41:25.210931  PCI: 00:15.1 [8086/02e9] enabled

  885 00:41:25.214507  PCI: 00:16.0 [8086/0000] ops

  886 00:41:25.217830  PCI: 00:16.0 [8086/02e0] enabled

  887 00:41:25.220971  PCI: 00:17.0 [8086/0000] ops

  888 00:41:25.224624  PCI: 00:17.0 [8086/02d3] enabled

  889 00:41:25.227755  PCI: 00:19.0 [8086/0000] bus ops

  890 00:41:25.230854  PCI: 00:19.0 [8086/02c5] enabled

  891 00:41:25.234350  PCI: 00:1d.0 [8086/0000] bus ops

  892 00:41:25.238235  PCI: 00:1d.0 [8086/02b0] enabled

  893 00:41:25.244060  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  894 00:41:25.247471  PCI: 00:1e.0 [8086/0000] ops

  895 00:41:25.250801  PCI: 00:1e.0 [8086/02a8] enabled

  896 00:41:25.254303  PCI: 00:1e.2 [8086/0000] bus ops

  897 00:41:25.257372  PCI: 00:1e.2 [8086/02aa] enabled

  898 00:41:25.260901  PCI: 00:1e.3 [8086/0000] bus ops

  899 00:41:25.264576  PCI: 00:1e.3 [8086/02ab] enabled

  900 00:41:25.267781  PCI: 00:1f.0 [8086/0000] bus ops

  901 00:41:25.270918  PCI: 00:1f.0 [8086/0284] enabled

  902 00:41:25.274212  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  903 00:41:25.280626  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  904 00:41:25.283882  PCI: 00:1f.3 [8086/0000] bus ops

  905 00:41:25.287484  PCI: 00:1f.3 [8086/02c8] enabled

  906 00:41:25.290496  PCI: 00:1f.4 [8086/0000] bus ops

  907 00:41:25.293732  PCI: 00:1f.4 [8086/02a3] enabled

  908 00:41:25.297482  PCI: 00:1f.5 [8086/0000] bus ops

  909 00:41:25.300656  PCI: 00:1f.5 [8086/02a4] enabled

  910 00:41:25.303911  PCI: Leftover static devices:

  911 00:41:25.304524  PCI: 00:05.0

  912 00:41:25.307603  PCI: 00:12.5

  913 00:41:25.308136  PCI: 00:12.6

  914 00:41:25.310751  PCI: 00:14.1

  915 00:41:25.311158  PCI: 00:14.5

  916 00:41:25.313891  PCI: 00:15.2

  917 00:41:25.314307  PCI: 00:15.3

  918 00:41:25.314660  PCI: 00:16.1

  919 00:41:25.317032  PCI: 00:16.2

  920 00:41:25.317519  PCI: 00:16.3

  921 00:41:25.320358  PCI: 00:16.4

  922 00:41:25.320848  PCI: 00:16.5

  923 00:41:25.321238  PCI: 00:19.1

  924 00:41:25.323728  PCI: 00:19.2

  925 00:41:25.324199  PCI: 00:1a.0

  926 00:41:25.327404  PCI: 00:1c.0

  927 00:41:25.327973  PCI: 00:1c.1

  928 00:41:25.328493  PCI: 00:1c.2

  929 00:41:25.330380  PCI: 00:1c.3

  930 00:41:25.330943  PCI: 00:1c.4

  931 00:41:25.333923  PCI: 00:1c.5

  932 00:41:25.334432  PCI: 00:1c.6

  933 00:41:25.337085  PCI: 00:1c.7

  934 00:41:25.337655  PCI: 00:1d.1

  935 00:41:25.338096  PCI: 00:1d.2

  936 00:41:25.340419  PCI: 00:1d.3

  937 00:41:25.340946  PCI: 00:1d.4

  938 00:41:25.343707  PCI: 00:1d.5

  939 00:41:25.344231  PCI: 00:1e.1

  940 00:41:25.344717  PCI: 00:1f.1

  941 00:41:25.346677  PCI: 00:1f.2

  942 00:41:25.347127  PCI: 00:1f.6

  943 00:41:25.350470  PCI: Check your devicetree.cb.

  944 00:41:25.353941  PCI: 00:02.0 scanning...

  945 00:41:25.356954  scan_generic_bus for PCI: 00:02.0

  946 00:41:25.360139  scan_generic_bus for PCI: 00:02.0 done

  947 00:41:25.366912  scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs

  948 00:41:25.370010  PCI: 00:14.0 scanning...

  949 00:41:25.373377  scan_static_bus for PCI: 00:14.0

  950 00:41:25.373869  USB0 port 0 enabled

  951 00:41:25.377081  USB0 port 0 scanning...

  952 00:41:25.380463  scan_static_bus for USB0 port 0

  953 00:41:25.383855  USB2 port 0 enabled

  954 00:41:25.384328  USB2 port 1 enabled

  955 00:41:25.386567  USB2 port 2 disabled

  956 00:41:25.389923  USB2 port 3 disabled

  957 00:41:25.390335  USB2 port 5 disabled

  958 00:41:25.393461  USB2 port 6 enabled

  959 00:41:25.397069  USB2 port 9 enabled

  960 00:41:25.397550  USB3 port 0 enabled

  961 00:41:25.400099  USB3 port 1 enabled

  962 00:41:25.400611  USB3 port 2 enabled

  963 00:41:25.403203  USB3 port 3 enabled

  964 00:41:25.406580  USB3 port 4 disabled

  965 00:41:25.407005  USB2 port 0 scanning...

  966 00:41:25.410216  scan_static_bus for USB2 port 0

  967 00:41:25.416634  scan_static_bus for USB2 port 0 done

  968 00:41:25.420312  scan_bus: scanning of bus USB2 port 0 took 9704 usecs

  969 00:41:25.423478  USB2 port 1 scanning...

  970 00:41:25.426587  scan_static_bus for USB2 port 1

  971 00:41:25.430274  scan_static_bus for USB2 port 1 done

  972 00:41:25.436384  scan_bus: scanning of bus USB2 port 1 took 9707 usecs

  973 00:41:25.436811  USB2 port 6 scanning...

  974 00:41:25.440388  scan_static_bus for USB2 port 6

  975 00:41:25.447520  scan_static_bus for USB2 port 6 done

  976 00:41:25.450653  scan_bus: scanning of bus USB2 port 6 took 9706 usecs

  977 00:41:25.453848  USB2 port 9 scanning...

  978 00:41:25.456619  scan_static_bus for USB2 port 9

  979 00:41:25.459857  scan_static_bus for USB2 port 9 done

  980 00:41:25.466983  scan_bus: scanning of bus USB2 port 9 took 9703 usecs

  981 00:41:25.467566  USB3 port 0 scanning...

  982 00:41:25.470038  scan_static_bus for USB3 port 0

  983 00:41:25.477107  scan_static_bus for USB3 port 0 done

  984 00:41:25.480130  scan_bus: scanning of bus USB3 port 0 took 9689 usecs

  985 00:41:25.483347  USB3 port 1 scanning...

  986 00:41:25.486872  scan_static_bus for USB3 port 1

  987 00:41:25.489909  scan_static_bus for USB3 port 1 done

  988 00:41:25.496397  scan_bus: scanning of bus USB3 port 1 took 9697 usecs

  989 00:41:25.496834  USB3 port 2 scanning...

  990 00:41:25.500157  scan_static_bus for USB3 port 2

  991 00:41:25.506901  scan_static_bus for USB3 port 2 done

  992 00:41:25.510066  scan_bus: scanning of bus USB3 port 2 took 9707 usecs

  993 00:41:25.513175  USB3 port 3 scanning...

  994 00:41:25.516606  scan_static_bus for USB3 port 3

  995 00:41:25.520489  scan_static_bus for USB3 port 3 done

  996 00:41:25.526820  scan_bus: scanning of bus USB3 port 3 took 9687 usecs

  997 00:41:25.529999  scan_static_bus for USB0 port 0 done

  998 00:41:25.533621  scan_bus: scanning of bus USB0 port 0 took 155360 usecs

  999 00:41:25.539965  scan_static_bus for PCI: 00:14.0 done

 1000 00:41:25.543162  scan_bus: scanning of bus PCI: 00:14.0 took 172986 usecs

 1001 00:41:25.546813  PCI: 00:15.0 scanning...

 1002 00:41:25.550415  scan_generic_bus for PCI: 00:15.0

 1003 00:41:25.553772  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1004 00:41:25.559792  scan_generic_bus for PCI: 00:15.0 done

 1005 00:41:25.563359  scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs

 1006 00:41:25.566628  PCI: 00:15.1 scanning...

 1007 00:41:25.569859  scan_generic_bus for PCI: 00:15.1

 1008 00:41:25.572969  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1009 00:41:25.579862  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1010 00:41:25.583065  scan_generic_bus for PCI: 00:15.1 done

 1011 00:41:25.589837  scan_bus: scanning of bus PCI: 00:15.1 took 18590 usecs

 1012 00:41:25.590266  PCI: 00:19.0 scanning...

 1013 00:41:25.592909  scan_generic_bus for PCI: 00:19.0

 1014 00:41:25.599322  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1015 00:41:25.602989  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1016 00:41:25.605988  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1017 00:41:25.609366  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1018 00:41:25.615996  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1019 00:41:25.619572  scan_generic_bus for PCI: 00:19.0 done

 1020 00:41:25.622758  scan_bus: scanning of bus PCI: 00:19.0 took 30739 usecs

 1021 00:41:25.626124  PCI: 00:1d.0 scanning...

 1022 00:41:25.629036  do_pci_scan_bridge for PCI: 00:1d.0

 1023 00:41:25.632242  PCI: pci_scan_bus for bus 01

 1024 00:41:25.636028  PCI: 01:00.0 [1c5c/1327] enabled

 1025 00:41:25.642556  Enabling Common Clock Configuration

 1026 00:41:25.645717  L1 Sub-State supported from root port 29

 1027 00:41:25.649004  L1 Sub-State Support = 0xf

 1028 00:41:25.649419  CommonModeRestoreTime = 0x28

 1029 00:41:25.655736  Power On Value = 0x16, Power On Scale = 0x0

 1030 00:41:25.656159  ASPM: Enabled L1

 1031 00:41:25.662283  scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs

 1032 00:41:25.665978  PCI: 00:1e.2 scanning...

 1033 00:41:25.669240  scan_generic_bus for PCI: 00:1e.2

 1034 00:41:25.672202  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1035 00:41:25.675758  scan_generic_bus for PCI: 00:1e.2 done

 1036 00:41:25.682122  scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs

 1037 00:41:25.685345  PCI: 00:1e.3 scanning...

 1038 00:41:25.689445  scan_generic_bus for PCI: 00:1e.3

 1039 00:41:25.692258  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1040 00:41:25.695633  scan_generic_bus for PCI: 00:1e.3 done

 1041 00:41:25.702640  scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs

 1042 00:41:25.705274  PCI: 00:1f.0 scanning...

 1043 00:41:25.708665  scan_static_bus for PCI: 00:1f.0

 1044 00:41:25.709081  PNP: 0c09.0 enabled

 1045 00:41:25.712432  scan_static_bus for PCI: 00:1f.0 done

 1046 00:41:25.719396  scan_bus: scanning of bus PCI: 00:1f.0 took 12037 usecs

 1047 00:41:25.722080  PCI: 00:1f.3 scanning...

 1048 00:41:25.728282  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs

 1049 00:41:25.728702  PCI: 00:1f.4 scanning...

 1050 00:41:25.735199  scan_generic_bus for PCI: 00:1f.4

 1051 00:41:25.738075  scan_generic_bus for PCI: 00:1f.4 done

 1052 00:41:25.741526  scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs

 1053 00:41:25.744725  PCI: 00:1f.5 scanning...

 1054 00:41:25.748154  scan_generic_bus for PCI: 00:1f.5

 1055 00:41:25.751254  scan_generic_bus for PCI: 00:1f.5 done

 1056 00:41:25.758205  scan_bus: scanning of bus PCI: 00:1f.5 took 10184 usecs

 1057 00:41:25.764609  scan_bus: scanning of bus DOMAIN: 0000 took 604941 usecs

 1058 00:41:25.768256  scan_static_bus for Root Device done

 1059 00:41:25.774894  scan_bus: scanning of bus Root Device took 624827 usecs

 1060 00:41:25.775403  done

 1061 00:41:25.778012  Chrome EC: UHEPI supported

 1062 00:41:25.784558  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1063 00:41:25.788159  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1064 00:41:25.795395  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1065 00:41:25.802350  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1066 00:41:25.805332  SPI flash protection: WPSW=0 SRP0=0

 1067 00:41:25.811784  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1068 00:41:25.815217  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1069 00:41:25.818641  found VGA at PCI: 00:02.0

 1070 00:41:25.822204  Setting up VGA for PCI: 00:02.0

 1071 00:41:25.828710  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1072 00:41:25.831721  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1073 00:41:25.835038  Allocating resources...

 1074 00:41:25.838775  Reading resources...

 1075 00:41:25.842033  Root Device read_resources bus 0 link: 0

 1076 00:41:25.845132  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1077 00:41:25.851722  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1078 00:41:25.854851  DOMAIN: 0000 read_resources bus 0 link: 0

 1079 00:41:25.862746  PCI: 00:14.0 read_resources bus 0 link: 0

 1080 00:41:25.865726  USB0 port 0 read_resources bus 0 link: 0

 1081 00:41:25.873785  USB0 port 0 read_resources bus 0 link: 0 done

 1082 00:41:25.877119  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1083 00:41:25.883891  PCI: 00:15.0 read_resources bus 1 link: 0

 1084 00:41:25.887793  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1085 00:41:25.894433  PCI: 00:15.1 read_resources bus 2 link: 0

 1086 00:41:25.897148  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1087 00:41:25.904917  PCI: 00:19.0 read_resources bus 3 link: 0

 1088 00:41:25.911295  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1089 00:41:25.914480  PCI: 00:1d.0 read_resources bus 1 link: 0

 1090 00:41:25.921159  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1091 00:41:25.925040  PCI: 00:1e.2 read_resources bus 4 link: 0

 1092 00:41:25.931167  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1093 00:41:25.934819  PCI: 00:1e.3 read_resources bus 5 link: 0

 1094 00:41:25.941203  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1095 00:41:25.944391  PCI: 00:1f.0 read_resources bus 0 link: 0

 1096 00:41:25.951172  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1097 00:41:25.957763  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1098 00:41:25.960795  Root Device read_resources bus 0 link: 0 done

 1099 00:41:25.964712  Done reading resources.

 1100 00:41:25.970963  Show resources in subtree (Root Device)...After reading.

 1101 00:41:25.974162   Root Device child on link 0 CPU_CLUSTER: 0

 1102 00:41:25.977587    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1103 00:41:25.978026     APIC: 00

 1104 00:41:25.980620     APIC: 03

 1105 00:41:25.981047     APIC: 01

 1106 00:41:25.983968     APIC: 06

 1107 00:41:25.984529     APIC: 02

 1108 00:41:25.984919     APIC: 05

 1109 00:41:25.987421     APIC: 04

 1110 00:41:25.987897     APIC: 07

 1111 00:41:25.991273    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1112 00:41:26.043943    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1113 00:41:26.044858    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1114 00:41:26.045296     PCI: 00:00.0

 1115 00:41:26.045707     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1116 00:41:26.046146     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1117 00:41:26.046635     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1118 00:41:26.093637     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1119 00:41:26.094530     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1120 00:41:26.094910     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1121 00:41:26.095752     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1122 00:41:26.096461     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1123 00:41:26.099446     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1124 00:41:26.105637     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1125 00:41:26.115723     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1126 00:41:26.125615     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1127 00:41:26.135701     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1128 00:41:26.145915     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1129 00:41:26.152480     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1130 00:41:26.163055     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1131 00:41:26.165211     PCI: 00:02.0

 1132 00:41:26.175504     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1133 00:41:26.185517     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1134 00:41:26.192054     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1135 00:41:26.195496     PCI: 00:04.0

 1136 00:41:26.198302     PCI: 00:08.0

 1137 00:41:26.208397     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1138 00:41:26.208919     PCI: 00:12.0

 1139 00:41:26.218309     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1140 00:41:26.221447     PCI: 00:14.0 child on link 0 USB0 port 0

 1141 00:41:26.231877     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1142 00:41:26.238135      USB0 port 0 child on link 0 USB2 port 0

 1143 00:41:26.238656       USB2 port 0

 1144 00:41:26.241712       USB2 port 1

 1145 00:41:26.242138       USB2 port 2

 1146 00:41:26.244704       USB2 port 3

 1147 00:41:26.245127       USB2 port 5

 1148 00:41:26.248351       USB2 port 6

 1149 00:41:26.248777       USB2 port 9

 1150 00:41:26.251540       USB3 port 0

 1151 00:41:26.252012       USB3 port 1

 1152 00:41:26.254530       USB3 port 2

 1153 00:41:26.257898       USB3 port 3

 1154 00:41:26.258362       USB3 port 4

 1155 00:41:26.261503     PCI: 00:14.2

 1156 00:41:26.271011     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1157 00:41:26.280820     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1158 00:41:26.281264     PCI: 00:14.3

 1159 00:41:26.290878     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1160 00:41:26.294514     PCI: 00:15.0 child on link 0 I2C: 01:15

 1161 00:41:26.304713     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1162 00:41:26.307663      I2C: 01:15

 1163 00:41:26.310946     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1164 00:41:26.320902     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1165 00:41:26.323748      I2C: 02:5d

 1166 00:41:26.324186      GENERIC: 0.0

 1167 00:41:26.327248     PCI: 00:16.0

 1168 00:41:26.337438     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1169 00:41:26.337948     PCI: 00:17.0

 1170 00:41:26.347160     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1171 00:41:26.357267     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1172 00:41:26.363593     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1173 00:41:26.373839     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1174 00:41:26.380244     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1175 00:41:26.390565     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1176 00:41:26.393309     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1177 00:41:26.403313     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1178 00:41:26.406674      I2C: 03:1a

 1179 00:41:26.407095      I2C: 03:38

 1180 00:41:26.410182      I2C: 03:39

 1181 00:41:26.410697      I2C: 03:3a

 1182 00:41:26.413973      I2C: 03:3b

 1183 00:41:26.417025     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1184 00:41:26.423334     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1185 00:41:26.433292     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1186 00:41:26.443291     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1187 00:41:26.446804      PCI: 01:00.0

 1188 00:41:26.456584      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1189 00:41:26.457104     PCI: 00:1e.0

 1190 00:41:26.469924     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1191 00:41:26.479465     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1192 00:41:26.482792     PCI: 00:1e.2 child on link 0 SPI: 00

 1193 00:41:26.492692     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 00:41:26.493224      SPI: 00

 1195 00:41:26.496341     PCI: 00:1e.3 child on link 0 SPI: 01

 1196 00:41:26.505756     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 00:41:26.509418      SPI: 01

 1198 00:41:26.512874     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1199 00:41:26.522633     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1200 00:41:26.528992     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1201 00:41:26.532596      PNP: 0c09.0

 1202 00:41:26.542294      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1203 00:41:26.542799     PCI: 00:1f.3

 1204 00:41:26.552315     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 00:41:26.562190     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1206 00:41:26.566067     PCI: 00:1f.4

 1207 00:41:26.572146     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1208 00:41:26.582217     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1209 00:41:26.585677     PCI: 00:1f.5

 1210 00:41:26.595148     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1211 00:41:26.601523  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1212 00:41:26.605070  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1213 00:41:26.615281  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1214 00:41:26.617952  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1215 00:41:26.621757  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1216 00:41:26.624835  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1217 00:41:26.627962  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1218 00:41:26.635108  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1219 00:41:26.641384  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1220 00:41:26.648218  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1221 00:41:26.657992  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1222 00:41:26.664997  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1223 00:41:26.667842  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1224 00:41:26.678027  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1225 00:41:26.681148  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1226 00:41:26.684315  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1227 00:41:26.691299  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1228 00:41:26.694305  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1229 00:41:26.701029  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1230 00:41:26.704031  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1231 00:41:26.710889  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1232 00:41:26.713944  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1233 00:41:26.720287  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1234 00:41:26.724076  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1235 00:41:26.730464  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1236 00:41:26.733900  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1237 00:41:26.740728  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1238 00:41:26.744469  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1239 00:41:26.747348  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1240 00:41:26.754325  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1241 00:41:26.757493  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1242 00:41:26.763948  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1243 00:41:26.767078  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1244 00:41:26.773737  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1245 00:41:26.776810  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1246 00:41:26.783159  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1247 00:41:26.786559  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1248 00:41:26.796873  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1249 00:41:26.800120  avoid_fixed_resources: DOMAIN: 0000

 1250 00:41:26.806873  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1251 00:41:26.809794  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1252 00:41:26.819914  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1253 00:41:26.826715  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1254 00:41:26.833123  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1255 00:41:26.842747  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1256 00:41:26.849727  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1257 00:41:26.856387  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1258 00:41:26.866268  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1259 00:41:26.872996  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1260 00:41:26.879170  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1261 00:41:26.886091  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1262 00:41:26.889145  Setting resources...

 1263 00:41:26.895710  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1264 00:41:26.899026  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1265 00:41:26.902885  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1266 00:41:26.909091  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1267 00:41:26.912666  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1268 00:41:26.919401  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1269 00:41:26.922582  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1270 00:41:26.928923  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1271 00:41:26.938948  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1272 00:41:26.942588  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1273 00:41:26.948785  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1274 00:41:26.952271  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1275 00:41:26.959247  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1276 00:41:26.962093  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1277 00:41:26.968996  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1278 00:41:26.972508  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1279 00:41:26.978891  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1280 00:41:26.981719  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1281 00:41:26.988578  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1282 00:41:26.992081  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1283 00:41:26.994758  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1284 00:41:27.001775  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1285 00:41:27.004867  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1286 00:41:27.011997  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1287 00:41:27.014852  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1288 00:41:27.021840  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1289 00:41:27.025473  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1290 00:41:27.031693  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1291 00:41:27.035229  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1292 00:41:27.041793  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1293 00:41:27.045136  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1294 00:41:27.052002  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1295 00:41:27.058489  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1296 00:41:27.064823  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1297 00:41:27.071606  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1298 00:41:27.081272  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1299 00:41:27.084281  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1300 00:41:27.091179  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1301 00:41:27.097842  Root Device assign_resources, bus 0 link: 0

 1302 00:41:27.100933  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1303 00:41:27.110946  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1304 00:41:27.117757  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1305 00:41:27.127763  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1306 00:41:27.134130  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1307 00:41:27.143764  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1308 00:41:27.150674  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1309 00:41:27.153611  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1310 00:41:27.160771  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1311 00:41:27.167051  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1312 00:41:27.176879  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1313 00:41:27.183683  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1314 00:41:27.193942  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1315 00:41:27.196919  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1316 00:41:27.203876  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1317 00:41:27.210402  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1318 00:41:27.213431  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1319 00:41:27.220102  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1320 00:41:27.226628  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1321 00:41:27.236803  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1322 00:41:27.243601  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1323 00:41:27.249781  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1324 00:41:27.259923  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1325 00:41:27.266395  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1326 00:41:27.273148  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1327 00:41:27.283396  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1328 00:41:27.286325  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1329 00:41:27.293748  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1330 00:41:27.300198  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1331 00:41:27.309669  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1332 00:41:27.319619  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1333 00:41:27.323803  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1334 00:41:27.329819  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1335 00:41:27.336230  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1336 00:41:27.342659  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1337 00:41:27.352643  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1338 00:41:27.355926  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1339 00:41:27.362776  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1340 00:41:27.369136  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1341 00:41:27.376132  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1342 00:41:27.379213  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1343 00:41:27.382238  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1344 00:41:27.389547  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1345 00:41:27.392506  LPC: Trying to open IO window from 800 size 1ff

 1346 00:41:27.402574  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1347 00:41:27.409456  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1348 00:41:27.418868  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1349 00:41:27.426180  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1350 00:41:27.432803  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1351 00:41:27.435854  Root Device assign_resources, bus 0 link: 0

 1352 00:41:27.439328  Done setting resources.

 1353 00:41:27.445602  Show resources in subtree (Root Device)...After assigning values.

 1354 00:41:27.449296   Root Device child on link 0 CPU_CLUSTER: 0

 1355 00:41:27.452398    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1356 00:41:27.455566     APIC: 00

 1357 00:41:27.456114     APIC: 03

 1358 00:41:27.456452     APIC: 01

 1359 00:41:27.458649     APIC: 06

 1360 00:41:27.459220     APIC: 02

 1361 00:41:27.462292     APIC: 05

 1362 00:41:27.462728     APIC: 04

 1363 00:41:27.463065     APIC: 07

 1364 00:41:27.468703    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1365 00:41:27.478918    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1366 00:41:27.488750    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1367 00:41:27.489221     PCI: 00:00.0

 1368 00:41:27.498685     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1369 00:41:27.508793     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1370 00:41:27.518093     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1371 00:41:27.528590     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1372 00:41:27.537938     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1373 00:41:27.548621     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1374 00:41:27.554966     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1375 00:41:27.565260     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1376 00:41:27.574835     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1377 00:41:27.584519     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1378 00:41:27.594514     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1379 00:41:27.601540     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1380 00:41:27.611616     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1381 00:41:27.620845     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1382 00:41:27.630667     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1383 00:41:27.640589     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1384 00:41:27.641114     PCI: 00:02.0

 1385 00:41:27.653578     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1386 00:41:27.664320     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1387 00:41:27.674044     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1388 00:41:27.674592     PCI: 00:04.0

 1389 00:41:27.676862     PCI: 00:08.0

 1390 00:41:27.686580     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1391 00:41:27.687117     PCI: 00:12.0

 1392 00:41:27.696616     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1393 00:41:27.703063     PCI: 00:14.0 child on link 0 USB0 port 0

 1394 00:41:27.713347     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1395 00:41:27.716466      USB0 port 0 child on link 0 USB2 port 0

 1396 00:41:27.720062       USB2 port 0

 1397 00:41:27.720584       USB2 port 1

 1398 00:41:27.723000       USB2 port 2

 1399 00:41:27.723424       USB2 port 3

 1400 00:41:27.726175       USB2 port 5

 1401 00:41:27.726600       USB2 port 6

 1402 00:41:27.730262       USB2 port 9

 1403 00:41:27.730791       USB3 port 0

 1404 00:41:27.733154       USB3 port 1

 1405 00:41:27.733675       USB3 port 2

 1406 00:41:27.736307       USB3 port 3

 1407 00:41:27.736730       USB3 port 4

 1408 00:41:27.739972     PCI: 00:14.2

 1409 00:41:27.749935     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1410 00:41:27.759634     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1411 00:41:27.762987     PCI: 00:14.3

 1412 00:41:27.773252     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1413 00:41:27.776015     PCI: 00:15.0 child on link 0 I2C: 01:15

 1414 00:41:27.785703     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1415 00:41:27.789918      I2C: 01:15

 1416 00:41:27.793044     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1417 00:41:27.802457     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1418 00:41:27.806166      I2C: 02:5d

 1419 00:41:27.806590      GENERIC: 0.0

 1420 00:41:27.809100     PCI: 00:16.0

 1421 00:41:27.819038     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1422 00:41:27.819482     PCI: 00:17.0

 1423 00:41:27.828734     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1424 00:41:27.838927     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1425 00:41:27.849200     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1426 00:41:27.858529     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1427 00:41:27.868589     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1428 00:41:27.877734     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1429 00:41:27.881253     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1430 00:41:27.891210     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1431 00:41:27.894650      I2C: 03:1a

 1432 00:41:27.894764      I2C: 03:38

 1433 00:41:27.897905      I2C: 03:39

 1434 00:41:27.898011      I2C: 03:3a

 1435 00:41:27.900882      I2C: 03:3b

 1436 00:41:27.904212     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1437 00:41:27.914172     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1438 00:41:27.924508     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1439 00:41:27.934276     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1440 00:41:27.934397      PCI: 01:00.0

 1441 00:41:27.947574      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1442 00:41:27.947720     PCI: 00:1e.0

 1443 00:41:27.957008     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1444 00:41:27.970733     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1445 00:41:27.973757     PCI: 00:1e.2 child on link 0 SPI: 00

 1446 00:41:27.983884     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1447 00:41:27.983972      SPI: 00

 1448 00:41:27.987107     PCI: 00:1e.3 child on link 0 SPI: 01

 1449 00:41:28.000323     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1450 00:41:28.000449      SPI: 01

 1451 00:41:28.003748     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1452 00:41:28.013605     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1453 00:41:28.023444     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1454 00:41:28.023575      PNP: 0c09.0

 1455 00:41:28.033145      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1456 00:41:28.033258     PCI: 00:1f.3

 1457 00:41:28.043110     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1458 00:41:28.056340     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1459 00:41:28.056427     PCI: 00:1f.4

 1460 00:41:28.066475     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1461 00:41:28.076007     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1462 00:41:28.076179     PCI: 00:1f.5

 1463 00:41:28.086403     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1464 00:41:28.089347  Done allocating resources.

 1465 00:41:28.096119  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1466 00:41:28.099532  Enabling resources...

 1467 00:41:28.103053  PCI: 00:00.0 subsystem <- 8086/9b61

 1468 00:41:28.106252  PCI: 00:00.0 cmd <- 06

 1469 00:41:28.109335  PCI: 00:02.0 subsystem <- 8086/9b41

 1470 00:41:28.112843  PCI: 00:02.0 cmd <- 03

 1471 00:41:28.116338  PCI: 00:08.0 cmd <- 06

 1472 00:41:28.119423  PCI: 00:12.0 subsystem <- 8086/02f9

 1473 00:41:28.119522  PCI: 00:12.0 cmd <- 02

 1474 00:41:28.126181  PCI: 00:14.0 subsystem <- 8086/02ed

 1475 00:41:28.126284  PCI: 00:14.0 cmd <- 02

 1476 00:41:28.129337  PCI: 00:14.2 cmd <- 02

 1477 00:41:28.132497  PCI: 00:14.3 subsystem <- 8086/02f0

 1478 00:41:28.136025  PCI: 00:14.3 cmd <- 02

 1479 00:41:28.139816  PCI: 00:15.0 subsystem <- 8086/02e8

 1480 00:41:28.142818  PCI: 00:15.0 cmd <- 02

 1481 00:41:28.145764  PCI: 00:15.1 subsystem <- 8086/02e9

 1482 00:41:28.149373  PCI: 00:15.1 cmd <- 02

 1483 00:41:28.152612  PCI: 00:16.0 subsystem <- 8086/02e0

 1484 00:41:28.155660  PCI: 00:16.0 cmd <- 02

 1485 00:41:28.159532  PCI: 00:17.0 subsystem <- 8086/02d3

 1486 00:41:28.162572  PCI: 00:17.0 cmd <- 03

 1487 00:41:28.165741  PCI: 00:19.0 subsystem <- 8086/02c5

 1488 00:41:28.165856  PCI: 00:19.0 cmd <- 02

 1489 00:41:28.169613  PCI: 00:1d.0 bridge ctrl <- 0013

 1490 00:41:28.175928  PCI: 00:1d.0 subsystem <- 8086/02b0

 1491 00:41:28.176069  PCI: 00:1d.0 cmd <- 06

 1492 00:41:28.179585  PCI: 00:1e.0 subsystem <- 8086/02a8

 1493 00:41:28.182616  PCI: 00:1e.0 cmd <- 06

 1494 00:41:28.186201  PCI: 00:1e.2 subsystem <- 8086/02aa

 1495 00:41:28.189397  PCI: 00:1e.2 cmd <- 06

 1496 00:41:28.192909  PCI: 00:1e.3 subsystem <- 8086/02ab

 1497 00:41:28.196094  PCI: 00:1e.3 cmd <- 02

 1498 00:41:28.199318  PCI: 00:1f.0 subsystem <- 8086/0284

 1499 00:41:28.202681  PCI: 00:1f.0 cmd <- 407

 1500 00:41:28.205889  PCI: 00:1f.3 subsystem <- 8086/02c8

 1501 00:41:28.209426  PCI: 00:1f.3 cmd <- 02

 1502 00:41:28.212590  PCI: 00:1f.4 subsystem <- 8086/02a3

 1503 00:41:28.216059  PCI: 00:1f.4 cmd <- 03

 1504 00:41:28.219042  PCI: 00:1f.5 subsystem <- 8086/02a4

 1505 00:41:28.222320  PCI: 00:1f.5 cmd <- 406

 1506 00:41:28.229598  PCI: 01:00.0 cmd <- 02

 1507 00:41:28.235082  done.

 1508 00:41:28.247916  ME: Version: 14.0.39.1367

 1509 00:41:28.254703  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1510 00:41:28.257634  Initializing devices...

 1511 00:41:28.258192  Root Device init ...

 1512 00:41:28.264510  Chrome EC: Set SMI mask to 0x0000000000000000

 1513 00:41:28.267804  Chrome EC: clear events_b mask to 0x0000000000000000

 1514 00:41:28.274276  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1515 00:41:28.281057  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1516 00:41:28.287255  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1517 00:41:28.290983  Chrome EC: Set WAKE mask to 0x0000000000000000

 1518 00:41:28.294509  Root Device init finished in 35177 usecs

 1519 00:41:28.298016  CPU_CLUSTER: 0 init ...

 1520 00:41:28.305133  CPU_CLUSTER: 0 init finished in 2447 usecs

 1521 00:41:28.308789  PCI: 00:00.0 init ...

 1522 00:41:28.311944  CPU TDP: 15 Watts

 1523 00:41:28.315547  CPU PL2 = 64 Watts

 1524 00:41:28.318464  PCI: 00:00.0 init finished in 7078 usecs

 1525 00:41:28.322298  PCI: 00:02.0 init ...

 1526 00:41:28.325624  PCI: 00:02.0 init finished in 2242 usecs

 1527 00:41:28.328606  PCI: 00:08.0 init ...

 1528 00:41:28.332471  PCI: 00:08.0 init finished in 2251 usecs

 1529 00:41:28.335092  PCI: 00:12.0 init ...

 1530 00:41:28.338299  PCI: 00:12.0 init finished in 2251 usecs

 1531 00:41:28.341610  PCI: 00:14.0 init ...

 1532 00:41:28.345226  PCI: 00:14.0 init finished in 2252 usecs

 1533 00:41:28.348529  PCI: 00:14.2 init ...

 1534 00:41:28.351563  PCI: 00:14.2 init finished in 2251 usecs

 1535 00:41:28.355300  PCI: 00:14.3 init ...

 1536 00:41:28.358503  PCI: 00:14.3 init finished in 2268 usecs

 1537 00:41:28.361508  PCI: 00:15.0 init ...

 1538 00:41:28.365321  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1539 00:41:28.368304  PCI: 00:15.0 init finished in 5974 usecs

 1540 00:41:28.371631  PCI: 00:15.1 init ...

 1541 00:41:28.375107  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1542 00:41:28.378744  PCI: 00:15.1 init finished in 5973 usecs

 1543 00:41:28.381783  PCI: 00:16.0 init ...

 1544 00:41:28.384943  PCI: 00:16.0 init finished in 2253 usecs

 1545 00:41:28.389242  PCI: 00:19.0 init ...

 1546 00:41:28.392480  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1547 00:41:28.399081  PCI: 00:19.0 init finished in 5976 usecs

 1548 00:41:28.399528  PCI: 00:1d.0 init ...

 1549 00:41:28.402543  Initializing PCH PCIe bridge.

 1550 00:41:28.405935  PCI: 00:1d.0 init finished in 5281 usecs

 1551 00:41:28.410351  PCI: 00:1f.0 init ...

 1552 00:41:28.413541  IOAPIC: Initializing IOAPIC at 0xfec00000

 1553 00:41:28.420453  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1554 00:41:28.420879  IOAPIC: ID = 0x02

 1555 00:41:28.423816  IOAPIC: Dumping registers

 1556 00:41:28.426980    reg 0x0000: 0x02000000

 1557 00:41:28.430372    reg 0x0001: 0x00770020

 1558 00:41:28.430930    reg 0x0002: 0x00000000

 1559 00:41:28.437350  PCI: 00:1f.0 init finished in 23526 usecs

 1560 00:41:28.440333  PCI: 00:1f.4 init ...

 1561 00:41:28.443774  PCI: 00:1f.4 init finished in 2261 usecs

 1562 00:41:28.454834  PCI: 01:00.0 init ...

 1563 00:41:28.457912  PCI: 01:00.0 init finished in 2243 usecs

 1564 00:41:28.462435  PNP: 0c09.0 init ...

 1565 00:41:28.466099  Google Chrome EC uptime: 11.081 seconds

 1566 00:41:28.472273  Google Chrome AP resets since EC boot: 0

 1567 00:41:28.475495  Google Chrome most recent AP reset causes:

 1568 00:41:28.482041  Google Chrome EC reset flags at last EC boot: reset-pin

 1569 00:41:28.485309  PNP: 0c09.0 init finished in 20647 usecs

 1570 00:41:28.488509  Devices initialized

 1571 00:41:28.491926  Show all devs... After init.

 1572 00:41:28.492348  Root Device: enabled 1

 1573 00:41:28.495695  CPU_CLUSTER: 0: enabled 1

 1574 00:41:28.498983  DOMAIN: 0000: enabled 1

 1575 00:41:28.499406  APIC: 00: enabled 1

 1576 00:41:28.502092  PCI: 00:00.0: enabled 1

 1577 00:41:28.505268  PCI: 00:02.0: enabled 1

 1578 00:41:28.508810  PCI: 00:04.0: enabled 0

 1579 00:41:28.509231  PCI: 00:05.0: enabled 0

 1580 00:41:28.512210  PCI: 00:12.0: enabled 1

 1581 00:41:28.515234  PCI: 00:12.5: enabled 0

 1582 00:41:28.519003  PCI: 00:12.6: enabled 0

 1583 00:41:28.519545  PCI: 00:14.0: enabled 1

 1584 00:41:28.521784  PCI: 00:14.1: enabled 0

 1585 00:41:28.525176  PCI: 00:14.3: enabled 1

 1586 00:41:28.525705  PCI: 00:14.5: enabled 0

 1587 00:41:28.528714  PCI: 00:15.0: enabled 1

 1588 00:41:28.531976  PCI: 00:15.1: enabled 1

 1589 00:41:28.534879  PCI: 00:15.2: enabled 0

 1590 00:41:28.535303  PCI: 00:15.3: enabled 0

 1591 00:41:28.538436  PCI: 00:16.0: enabled 1

 1592 00:41:28.541561  PCI: 00:16.1: enabled 0

 1593 00:41:28.544864  PCI: 00:16.2: enabled 0

 1594 00:41:28.545292  PCI: 00:16.3: enabled 0

 1595 00:41:28.548484  PCI: 00:16.4: enabled 0

 1596 00:41:28.551631  PCI: 00:16.5: enabled 0

 1597 00:41:28.554782  PCI: 00:17.0: enabled 1

 1598 00:41:28.555206  PCI: 00:19.0: enabled 1

 1599 00:41:28.558688  PCI: 00:19.1: enabled 0

 1600 00:41:28.561552  PCI: 00:19.2: enabled 0

 1601 00:41:28.562033  PCI: 00:1a.0: enabled 0

 1602 00:41:28.564831  PCI: 00:1c.0: enabled 0

 1603 00:41:28.568616  PCI: 00:1c.1: enabled 0

 1604 00:41:28.571521  PCI: 00:1c.2: enabled 0

 1605 00:41:28.572177  PCI: 00:1c.3: enabled 0

 1606 00:41:28.574903  PCI: 00:1c.4: enabled 0

 1607 00:41:28.578282  PCI: 00:1c.5: enabled 0

 1608 00:41:28.581825  PCI: 00:1c.6: enabled 0

 1609 00:41:28.582249  PCI: 00:1c.7: enabled 0

 1610 00:41:28.584769  PCI: 00:1d.0: enabled 1

 1611 00:41:28.587795  PCI: 00:1d.1: enabled 0

 1612 00:41:28.591671  PCI: 00:1d.2: enabled 0

 1613 00:41:28.592138  PCI: 00:1d.3: enabled 0

 1614 00:41:28.594968  PCI: 00:1d.4: enabled 0

 1615 00:41:28.597708  PCI: 00:1d.5: enabled 0

 1616 00:41:28.598134  PCI: 00:1e.0: enabled 1

 1617 00:41:28.601286  PCI: 00:1e.1: enabled 0

 1618 00:41:28.605035  PCI: 00:1e.2: enabled 1

 1619 00:41:28.607868  PCI: 00:1e.3: enabled 1

 1620 00:41:28.608293  PCI: 00:1f.0: enabled 1

 1621 00:41:28.610934  PCI: 00:1f.1: enabled 0

 1622 00:41:28.614391  PCI: 00:1f.2: enabled 0

 1623 00:41:28.618223  PCI: 00:1f.3: enabled 1

 1624 00:41:28.618741  PCI: 00:1f.4: enabled 1

 1625 00:41:28.621317  PCI: 00:1f.5: enabled 1

 1626 00:41:28.624299  PCI: 00:1f.6: enabled 0

 1627 00:41:28.627538  USB0 port 0: enabled 1

 1628 00:41:28.627992  I2C: 01:15: enabled 1

 1629 00:41:28.631135  I2C: 02:5d: enabled 1

 1630 00:41:28.634352  GENERIC: 0.0: enabled 1

 1631 00:41:28.634776  I2C: 03:1a: enabled 1

 1632 00:41:28.637500  I2C: 03:38: enabled 1

 1633 00:41:28.641094  I2C: 03:39: enabled 1

 1634 00:41:28.641515  I2C: 03:3a: enabled 1

 1635 00:41:28.644276  I2C: 03:3b: enabled 1

 1636 00:41:28.647455  PCI: 00:00.0: enabled 1

 1637 00:41:28.647909  SPI: 00: enabled 1

 1638 00:41:28.651226  SPI: 01: enabled 1

 1639 00:41:28.654141  PNP: 0c09.0: enabled 1

 1640 00:41:28.654560  USB2 port 0: enabled 1

 1641 00:41:28.657415  USB2 port 1: enabled 1

 1642 00:41:28.660507  USB2 port 2: enabled 0

 1643 00:41:28.660928  USB2 port 3: enabled 0

 1644 00:41:28.663984  USB2 port 5: enabled 0

 1645 00:41:28.667186  USB2 port 6: enabled 1

 1646 00:41:28.670270  USB2 port 9: enabled 1

 1647 00:41:28.670690  USB3 port 0: enabled 1

 1648 00:41:28.674496  USB3 port 1: enabled 1

 1649 00:41:28.677331  USB3 port 2: enabled 1

 1650 00:41:28.677848  USB3 port 3: enabled 1

 1651 00:41:28.680632  USB3 port 4: enabled 0

 1652 00:41:28.684012  APIC: 03: enabled 1

 1653 00:41:28.684473  APIC: 01: enabled 1

 1654 00:41:28.687421  APIC: 06: enabled 1

 1655 00:41:28.690629  APIC: 02: enabled 1

 1656 00:41:28.691244  APIC: 05: enabled 1

 1657 00:41:28.693704  APIC: 04: enabled 1

 1658 00:41:28.694123  APIC: 07: enabled 1

 1659 00:41:28.697382  PCI: 00:08.0: enabled 1

 1660 00:41:28.700295  PCI: 00:14.2: enabled 1

 1661 00:41:28.703339  PCI: 01:00.0: enabled 1

 1662 00:41:28.707392  Disabling ACPI via APMC:

 1663 00:41:28.710556  done.

 1664 00:41:28.713498  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1665 00:41:28.716903  ELOG: NV offset 0xaf0000 size 0x4000

 1666 00:41:28.724021  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1667 00:41:28.730677  ELOG: Event(17) added with size 13 at 2023-09-29 00:39:58 UTC

 1668 00:41:28.737548  POST: Unexpected post code in previous boot: 0x73

 1669 00:41:28.743903  ELOG: Event(A3) added with size 11 at 2023-09-29 00:39:58 UTC

 1670 00:41:28.750596  ELOG: Event(A6) added with size 13 at 2023-09-29 00:39:58 UTC

 1671 00:41:28.757239  ELOG: Event(92) added with size 9 at 2023-09-29 00:39:58 UTC

 1672 00:41:28.760589  ELOG: Event(93) added with size 9 at 2023-09-29 00:39:58 UTC

 1673 00:41:28.767311  ELOG: Event(9A) added with size 9 at 2023-09-29 00:39:58 UTC

 1674 00:41:28.774286  ELOG: Event(9E) added with size 10 at 2023-09-29 00:39:58 UTC

 1675 00:41:28.780442  ELOG: Event(9F) added with size 14 at 2023-09-29 00:39:58 UTC

 1676 00:41:28.787006  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1677 00:41:28.794041  ELOG: Event(A1) added with size 10 at 2023-09-29 00:39:58 UTC

 1678 00:41:28.800137  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1679 00:41:28.807183  ELOG: Event(A0) added with size 9 at 2023-09-29 00:39:58 UTC

 1680 00:41:28.810283  elog_add_boot_reason: Logged dev mode boot

 1681 00:41:28.813182  Finalize devices...

 1682 00:41:28.817168  PCI: 00:17.0 final

 1683 00:41:28.817616  Devices finalized

 1684 00:41:28.822964  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1685 00:41:28.826670  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1686 00:41:28.833141  ME: HFSTS1                  : 0x90000245

 1687 00:41:28.836266  ME: HFSTS2                  : 0x3B850126

 1688 00:41:28.839758  ME: HFSTS3                  : 0x00000020

 1689 00:41:28.843061  ME: HFSTS4                  : 0x00004800

 1690 00:41:28.849738  ME: HFSTS5                  : 0x00000000

 1691 00:41:28.852810  ME: HFSTS6                  : 0x40400006

 1692 00:41:28.856105  ME: Manufacturing Mode      : NO

 1693 00:41:28.859191  ME: FW Partition Table      : OK

 1694 00:41:28.862946  ME: Bringup Loader Failure  : NO

 1695 00:41:28.866194  ME: Firmware Init Complete  : YES

 1696 00:41:28.869640  ME: Boot Options Present    : NO

 1697 00:41:28.872825  ME: Update In Progress      : NO

 1698 00:41:28.875889  ME: D0i3 Support            : YES

 1699 00:41:28.879718  ME: Low Power State Enabled : NO

 1700 00:41:28.882998  ME: CPU Replaced            : NO

 1701 00:41:28.886138  ME: CPU Replacement Valid   : YES

 1702 00:41:28.889426  ME: Current Working State   : 5

 1703 00:41:28.892856  ME: Current Operation State : 1

 1704 00:41:28.896208  ME: Current Operation Mode  : 0

 1705 00:41:28.899462  ME: Error Code              : 0

 1706 00:41:28.902512  ME: CPU Debug Disabled      : YES

 1707 00:41:28.906609  ME: TXT Support             : NO

 1708 00:41:28.909345  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1709 00:41:28.916182  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1710 00:41:28.919193  CBFS @ c08000 size 3f8000

 1711 00:41:28.926088  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1712 00:41:28.929153  CBFS: Locating 'fallback/dsdt.aml'

 1713 00:41:28.932357  CBFS: Found @ offset 10bb80 size 3fa5

 1714 00:41:28.935582  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1715 00:41:28.938812  CBFS @ c08000 size 3f8000

 1716 00:41:28.945477  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1717 00:41:28.948886  CBFS: Locating 'fallback/slic'

 1718 00:41:28.952120  CBFS: 'fallback/slic' not found.

 1719 00:41:28.958917  ACPI: Writing ACPI tables at 99b3e000.

 1720 00:41:28.959334  ACPI:    * FACS

 1721 00:41:28.962214  ACPI:    * DSDT

 1722 00:41:28.965303  Ramoops buffer: 0x100000@0x99a3d000.

 1723 00:41:28.969167  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1724 00:41:28.975261  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1725 00:41:28.979254  Google Chrome EC: version:

 1726 00:41:28.982202  	ro: helios_v2.0.2659-56403530b

 1727 00:41:28.985267  	rw: helios_v2.0.2849-c41de27e7d

 1728 00:41:28.985718    running image: 1

 1729 00:41:28.989825  ACPI:    * FADT

 1730 00:41:28.990248  SCI is IRQ9

 1731 00:41:28.996502  ACPI: added table 1/32, length now 40

 1732 00:41:28.996928  ACPI:     * SSDT

 1733 00:41:28.999699  Found 1 CPU(s) with 8 core(s) each.

 1734 00:41:29.002943  Error: Could not locate 'wifi_sar' in VPD.

 1735 00:41:29.009495  Checking CBFS for default SAR values

 1736 00:41:29.012591  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1737 00:41:29.016373  CBFS @ c08000 size 3f8000

 1738 00:41:29.022646  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1739 00:41:29.026312  CBFS: Locating 'wifi_sar_defaults.hex'

 1740 00:41:29.029248  CBFS: Found @ offset 5fac0 size 77

 1741 00:41:29.032805  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1742 00:41:29.039219  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1743 00:41:29.042689  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1744 00:41:29.049147  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1745 00:41:29.052691  failed to find key in VPD: dsm_calib_r0_0

 1746 00:41:29.062992  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1747 00:41:29.065955  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1748 00:41:29.069484  failed to find key in VPD: dsm_calib_r0_1

 1749 00:41:29.079189  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1750 00:41:29.085678  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1751 00:41:29.089068  failed to find key in VPD: dsm_calib_r0_2

 1752 00:41:29.098959  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1753 00:41:29.102796  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1754 00:41:29.108553  failed to find key in VPD: dsm_calib_r0_3

 1755 00:41:29.115196  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1756 00:41:29.122016  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1757 00:41:29.125255  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1758 00:41:29.128476  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1759 00:41:29.132831  EC returned error result code 1

 1760 00:41:29.136297  EC returned error result code 1

 1761 00:41:29.140221  EC returned error result code 1

 1762 00:41:29.146223  PS2K: Bad resp from EC. Vivaldi disabled!

 1763 00:41:29.150450  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1764 00:41:29.156807  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1765 00:41:29.162928  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1766 00:41:29.166298  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1767 00:41:29.173121  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1768 00:41:29.179831  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1769 00:41:29.186224  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1770 00:41:29.189892  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1771 00:41:29.196041  ACPI: added table 2/32, length now 44

 1772 00:41:29.196486  ACPI:    * MCFG

 1773 00:41:29.199471  ACPI: added table 3/32, length now 48

 1774 00:41:29.202573  ACPI:    * TPM2

 1775 00:41:29.205793  TPM2 log created at 99a2d000

 1776 00:41:29.209521  ACPI: added table 4/32, length now 52

 1777 00:41:29.210041  ACPI:    * MADT

 1778 00:41:29.213310  SCI is IRQ9

 1779 00:41:29.216170  ACPI: added table 5/32, length now 56

 1780 00:41:29.216589  current = 99b43ac0

 1781 00:41:29.219266  ACPI:    * DMAR

 1782 00:41:29.222295  ACPI: added table 6/32, length now 60

 1783 00:41:29.225728  ACPI:    * IGD OpRegion

 1784 00:41:29.226145  GMA: Found VBT in CBFS

 1785 00:41:29.228925  GMA: Found valid VBT in CBFS

 1786 00:41:29.232744  ACPI: added table 7/32, length now 64

 1787 00:41:29.235869  ACPI:    * HPET

 1788 00:41:29.238872  ACPI: added table 8/32, length now 68

 1789 00:41:29.239290  ACPI: done.

 1790 00:41:29.242690  ACPI tables: 31744 bytes.

 1791 00:41:29.245730  smbios_write_tables: 99a2c000

 1792 00:41:29.249448  EC returned error result code 3

 1793 00:41:29.252816  Couldn't obtain OEM name from CBI

 1794 00:41:29.256175  Create SMBIOS type 17

 1795 00:41:29.259169  PCI: 00:00.0 (Intel Cannonlake)

 1796 00:41:29.263200  PCI: 00:14.3 (Intel WiFi)

 1797 00:41:29.266245  SMBIOS tables: 939 bytes.

 1798 00:41:29.269290  Writing table forward entry at 0x00000500

 1799 00:41:29.275849  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1800 00:41:29.279221  Writing coreboot table at 0x99b62000

 1801 00:41:29.285825   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1802 00:41:29.288651   1. 0000000000001000-000000000009ffff: RAM

 1803 00:41:29.292201   2. 00000000000a0000-00000000000fffff: RESERVED

 1804 00:41:29.299475   3. 0000000000100000-0000000099a2bfff: RAM

 1805 00:41:29.302232   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1806 00:41:29.308985   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1807 00:41:29.315408   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1808 00:41:29.318902   7. 000000009a000000-000000009f7fffff: RESERVED

 1809 00:41:29.325446   8. 00000000e0000000-00000000efffffff: RESERVED

 1810 00:41:29.329125   9. 00000000fc000000-00000000fc000fff: RESERVED

 1811 00:41:29.332175  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1812 00:41:29.338360  11. 00000000fed10000-00000000fed17fff: RESERVED

 1813 00:41:29.342365  12. 00000000fed80000-00000000fed83fff: RESERVED

 1814 00:41:29.348325  13. 00000000fed90000-00000000fed91fff: RESERVED

 1815 00:41:29.351715  14. 00000000feda0000-00000000feda1fff: RESERVED

 1816 00:41:29.358820  15. 0000000100000000-000000045e7fffff: RAM

 1817 00:41:29.361712  Graphics framebuffer located at 0xc0000000

 1818 00:41:29.365142  Passing 5 GPIOs to payload:

 1819 00:41:29.368895              NAME |       PORT | POLARITY |     VALUE

 1820 00:41:29.375242     write protect |  undefined |     high |       low

 1821 00:41:29.378346               lid |  undefined |     high |      high

 1822 00:41:29.384970             power |  undefined |     high |       low

 1823 00:41:29.391609             oprom |  undefined |     high |       low

 1824 00:41:29.394627          EC in RW | 0x000000cb |     high |       low

 1825 00:41:29.398063  Board ID: 4

 1826 00:41:29.401492  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1827 00:41:29.404891  CBFS @ c08000 size 3f8000

 1828 00:41:29.411741  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1829 00:41:29.418080  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1830 00:41:29.418598  coreboot table: 1492 bytes.

 1831 00:41:29.421270  IMD ROOT    0. 99fff000 00001000

 1832 00:41:29.424291  IMD SMALL   1. 99ffe000 00001000

 1833 00:41:29.428130  FSP MEMORY  2. 99c4e000 003b0000

 1834 00:41:29.431542  CONSOLE     3. 99c2e000 00020000

 1835 00:41:29.434425  FMAP        4. 99c2d000 0000054e

 1836 00:41:29.438442  TIME STAMP  5. 99c2c000 00000910

 1837 00:41:29.441245  VBOOT WORK  6. 99c18000 00014000

 1838 00:41:29.444266  MRC DATA    7. 99c16000 00001958

 1839 00:41:29.447872  ROMSTG STCK 8. 99c15000 00001000

 1840 00:41:29.451011  AFTER CAR   9. 99c0b000 0000a000

 1841 00:41:29.454863  RAMSTAGE   10. 99baf000 0005c000

 1842 00:41:29.458564  REFCODE    11. 99b7a000 00035000

 1843 00:41:29.461484  SMM BACKUP 12. 99b6a000 00010000

 1844 00:41:29.464909  COREBOOT   13. 99b62000 00008000

 1845 00:41:29.468295  ACPI       14. 99b3e000 00024000

 1846 00:41:29.471610  ACPI GNVS  15. 99b3d000 00001000

 1847 00:41:29.474782  RAMOOPS    16. 99a3d000 00100000

 1848 00:41:29.477742  TPM2 TCGLOG17. 99a2d000 00010000

 1849 00:41:29.481356  SMBIOS     18. 99a2c000 00000800

 1850 00:41:29.484634  IMD small region:

 1851 00:41:29.487778    IMD ROOT    0. 99ffec00 00000400

 1852 00:41:29.491058    FSP RUNTIME 1. 99ffebe0 00000004

 1853 00:41:29.494714    EC HOSTEVENT 2. 99ffebc0 00000008

 1854 00:41:29.498226    POWER STATE 3. 99ffeb80 00000040

 1855 00:41:29.501810    ROMSTAGE    4. 99ffeb60 00000004

 1856 00:41:29.504709    MEM INFO    5. 99ffe9a0 000001b9

 1857 00:41:29.507699    VPD         6. 99ffe920 0000006c

 1858 00:41:29.510825  MTRR: Physical address space:

 1859 00:41:29.517693  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1860 00:41:29.523828  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1861 00:41:29.530662  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1862 00:41:29.537723  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1863 00:41:29.543801  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1864 00:41:29.550995  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1865 00:41:29.557070  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1866 00:41:29.560523  MTRR: Fixed MSR 0x250 0x0606060606060606

 1867 00:41:29.563821  MTRR: Fixed MSR 0x258 0x0606060606060606

 1868 00:41:29.567097  MTRR: Fixed MSR 0x259 0x0000000000000000

 1869 00:41:29.573988  MTRR: Fixed MSR 0x268 0x0606060606060606

 1870 00:41:29.576752  MTRR: Fixed MSR 0x269 0x0606060606060606

 1871 00:41:29.579832  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1872 00:41:29.584017  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1873 00:41:29.587026  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1874 00:41:29.593208  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1875 00:41:29.596302  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1876 00:41:29.599998  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1877 00:41:29.603853  call enable_fixed_mtrr()

 1878 00:41:29.606520  CPU physical address size: 39 bits

 1879 00:41:29.613530  MTRR: default type WB/UC MTRR counts: 6/8.

 1880 00:41:29.616411  MTRR: WB selected as default type.

 1881 00:41:29.623101  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1882 00:41:29.626402  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1883 00:41:29.632817  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1884 00:41:29.639505  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1885 00:41:29.646395  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1886 00:41:29.652463  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1887 00:41:29.659795  MTRR: Fixed MSR 0x250 0x0606060606060606

 1888 00:41:29.662513  MTRR: Fixed MSR 0x258 0x0606060606060606

 1889 00:41:29.666135  MTRR: Fixed MSR 0x259 0x0000000000000000

 1890 00:41:29.669307  MTRR: Fixed MSR 0x268 0x0606060606060606

 1891 00:41:29.672398  MTRR: Fixed MSR 0x269 0x0606060606060606

 1892 00:41:29.679152  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1893 00:41:29.682579  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1894 00:41:29.685753  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1895 00:41:29.689090  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1896 00:41:29.695849  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1897 00:41:29.699187  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1898 00:41:29.699772  

 1899 00:41:29.700120  MTRR check

 1900 00:41:29.702889  Fixed MTRRs   : Enabled

 1901 00:41:29.705993  Variable MTRRs: Enabled

 1902 00:41:29.706638  

 1903 00:41:29.708730  call enable_fixed_mtrr()

 1904 00:41:29.712562  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1905 00:41:29.715629  CPU physical address size: 39 bits

 1906 00:41:29.722029  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1907 00:41:29.725822  CBFS @ c08000 size 3f8000

 1908 00:41:29.732185  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1909 00:41:29.735148  MTRR: Fixed MSR 0x250 0x0606060606060606

 1910 00:41:29.738674  MTRR: Fixed MSR 0x250 0x0606060606060606

 1911 00:41:29.742309  MTRR: Fixed MSR 0x258 0x0606060606060606

 1912 00:41:29.745121  MTRR: Fixed MSR 0x259 0x0000000000000000

 1913 00:41:29.752325  MTRR: Fixed MSR 0x268 0x0606060606060606

 1914 00:41:29.755099  MTRR: Fixed MSR 0x269 0x0606060606060606

 1915 00:41:29.758344  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1916 00:41:29.762135  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1917 00:41:29.768334  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1918 00:41:29.771718  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1919 00:41:29.774621  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1920 00:41:29.778684  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1921 00:41:29.784603  MTRR: Fixed MSR 0x258 0x0606060606060606

 1922 00:41:29.788015  MTRR: Fixed MSR 0x259 0x0000000000000000

 1923 00:41:29.791290  MTRR: Fixed MSR 0x268 0x0606060606060606

 1924 00:41:29.794843  MTRR: Fixed MSR 0x269 0x0606060606060606

 1925 00:41:29.801198  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1926 00:41:29.804437  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1927 00:41:29.807917  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1928 00:41:29.811017  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1929 00:41:29.818204  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1930 00:41:29.820774  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1931 00:41:29.824789  call enable_fixed_mtrr()

 1932 00:41:29.827812  call enable_fixed_mtrr()

 1933 00:41:29.831300  MTRR: Fixed MSR 0x250 0x0606060606060606

 1934 00:41:29.834430  MTRR: Fixed MSR 0x250 0x0606060606060606

 1935 00:41:29.837235  MTRR: Fixed MSR 0x258 0x0606060606060606

 1936 00:41:29.841087  MTRR: Fixed MSR 0x259 0x0000000000000000

 1937 00:41:29.847536  MTRR: Fixed MSR 0x268 0x0606060606060606

 1938 00:41:29.850758  MTRR: Fixed MSR 0x269 0x0606060606060606

 1939 00:41:29.854244  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1940 00:41:29.857129  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1941 00:41:29.863596  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1942 00:41:29.866929  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1943 00:41:29.870390  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1944 00:41:29.873819  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1945 00:41:29.879983  MTRR: Fixed MSR 0x258 0x0606060606060606

 1946 00:41:29.880438  call enable_fixed_mtrr()

 1947 00:41:29.887139  MTRR: Fixed MSR 0x259 0x0000000000000000

 1948 00:41:29.890257  MTRR: Fixed MSR 0x268 0x0606060606060606

 1949 00:41:29.893415  MTRR: Fixed MSR 0x269 0x0606060606060606

 1950 00:41:29.896925  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1951 00:41:29.903672  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1952 00:41:29.906783  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1953 00:41:29.910420  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1954 00:41:29.913517  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1955 00:41:29.920084  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1956 00:41:29.923076  CPU physical address size: 39 bits

 1957 00:41:29.926575  call enable_fixed_mtrr()

 1958 00:41:29.930072  MTRR: Fixed MSR 0x250 0x0606060606060606

 1959 00:41:29.933238  MTRR: Fixed MSR 0x250 0x0606060606060606

 1960 00:41:29.936176  MTRR: Fixed MSR 0x258 0x0606060606060606

 1961 00:41:29.943304  MTRR: Fixed MSR 0x259 0x0000000000000000

 1962 00:41:29.946492  MTRR: Fixed MSR 0x268 0x0606060606060606

 1963 00:41:29.950322  MTRR: Fixed MSR 0x269 0x0606060606060606

 1964 00:41:29.952895  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1965 00:41:29.959932  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1966 00:41:29.963134  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1967 00:41:29.966245  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1968 00:41:29.969409  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1969 00:41:29.973236  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1970 00:41:29.979679  MTRR: Fixed MSR 0x258 0x0606060606060606

 1971 00:41:29.982853  call enable_fixed_mtrr()

 1972 00:41:29.985670  MTRR: Fixed MSR 0x259 0x0000000000000000

 1973 00:41:29.989258  MTRR: Fixed MSR 0x268 0x0606060606060606

 1974 00:41:29.992335  MTRR: Fixed MSR 0x269 0x0606060606060606

 1975 00:41:29.999204  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1976 00:41:30.002764  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1977 00:41:30.006077  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1978 00:41:30.009307  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1979 00:41:30.012559  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1980 00:41:30.019152  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1981 00:41:30.022555  CPU physical address size: 39 bits

 1982 00:41:30.025921  CPU physical address size: 39 bits

 1983 00:41:30.029055  call enable_fixed_mtrr()

 1984 00:41:30.032389  CPU physical address size: 39 bits

 1985 00:41:30.035434  CPU physical address size: 39 bits

 1986 00:41:30.039149  CBFS: Locating 'fallback/payload'

 1987 00:41:30.042164  CPU physical address size: 39 bits

 1988 00:41:30.045199  CBFS: Found @ offset 1c96c0 size 3f798

 1989 00:41:30.052133  Checking segment from ROM address 0xffdd16f8

 1990 00:41:30.055379  Checking segment from ROM address 0xffdd1714

 1991 00:41:30.058882  Loading segment from ROM address 0xffdd16f8

 1992 00:41:30.061832    code (compression=0)

 1993 00:41:30.072018    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1994 00:41:30.078729  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1995 00:41:30.082038  it's not compressed!

 1996 00:41:30.173169  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1997 00:41:30.180234  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1998 00:41:30.186183  Loading segment from ROM address 0xffdd1714

 1999 00:41:30.186629    Entry Point 0x30000000

 2000 00:41:30.189547  Loaded segments

 2001 00:41:30.195514  Finalizing chipset.

 2002 00:41:30.198504  Finalizing SMM.

 2003 00:41:30.202585  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2004 00:41:30.205664  mp_park_aps done after 0 msecs.

 2005 00:41:30.211725  Jumping to boot code at 30000000(99b62000)

 2006 00:41:30.218691  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2007 00:41:30.219220  

 2008 00:41:30.219552  

 2009 00:41:30.219911  

 2010 00:41:30.222127  Starting depthcharge on Helios...

 2011 00:41:30.222653  

 2012 00:41:30.223973  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2013 00:41:30.224494  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2014 00:41:30.224908  Setting prompt string to ['hatch:']
 2015 00:41:30.225323  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2016 00:41:30.231880  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2017 00:41:30.232417  

 2018 00:41:30.238262  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2019 00:41:30.238777  

 2020 00:41:30.245274  board_setup: Info: eMMC controller not present; skipping

 2021 00:41:30.245805  

 2022 00:41:30.248098  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2023 00:41:30.248526  

 2024 00:41:30.254689  board_setup: Info: SDHCI controller not present; skipping

 2025 00:41:30.255219  

 2026 00:41:30.261733  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2027 00:41:30.262290  

 2028 00:41:30.262629  Wipe memory regions:

 2029 00:41:30.262938  

 2030 00:41:30.264645  	[0x00000000001000, 0x000000000a0000)

 2031 00:41:30.265066  

 2032 00:41:30.267769  	[0x00000000100000, 0x00000030000000)

 2033 00:41:30.334354  

 2034 00:41:30.337867  	[0x00000030657430, 0x00000099a2c000)

 2035 00:41:30.475100  

 2036 00:41:30.478200  	[0x00000100000000, 0x0000045e800000)

 2037 00:41:31.861133  

 2038 00:41:31.861670  R8152: Initializing

 2039 00:41:31.862053  

 2040 00:41:31.864094  Version 9 (ocp_data = 6010)

 2041 00:41:31.868386  

 2042 00:41:31.868909  R8152: Done initializing

 2043 00:41:31.869245  

 2044 00:41:31.871269  Adding net device

 2045 00:41:32.354886  

 2046 00:41:32.355409  R8152: Initializing

 2047 00:41:32.355789  

 2048 00:41:32.358024  Version 6 (ocp_data = 5c30)

 2049 00:41:32.358442  

 2050 00:41:32.361025  R8152: Done initializing

 2051 00:41:32.361440  

 2052 00:41:32.364122  net_add_device: Attemp to include the same device

 2053 00:41:32.367739  

 2054 00:41:32.374768  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2055 00:41:32.375191  

 2056 00:41:32.375520  

 2057 00:41:32.375871  

 2058 00:41:32.376625  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2060 00:41:32.477812  hatch: tftpboot 192.168.201.1 11637357/tftp-deploy-hvu02uy5/kernel/bzImage 11637357/tftp-deploy-hvu02uy5/kernel/cmdline 11637357/tftp-deploy-hvu02uy5/ramdisk/ramdisk.cpio.gz

 2061 00:41:32.478449  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2062 00:41:32.478881  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2063 00:41:32.483979  tftpboot 192.168.201.1 11637357/tftp-deploy-hvu02uy5/kernel/bzImploy-hvu02uy5/kernel/cmdline 11637357/tftp-deploy-hvu02uy5/ramdisk/ramdisk.cpio.gz

 2064 00:41:32.484556  

 2065 00:41:32.484889  Waiting for link

 2066 00:41:32.684874  

 2067 00:41:32.685495  done.

 2068 00:41:32.685844  

 2069 00:41:32.686158  MAC: 00:24:32:50:19:be

 2070 00:41:32.686462  

 2071 00:41:32.688391  Sending DHCP discover... done.

 2072 00:41:32.688811  

 2073 00:41:32.691255  Waiting for reply... done.

 2074 00:41:32.691710  

 2075 00:41:32.695152  Sending DHCP request... done.

 2076 00:41:32.695573  

 2077 00:41:32.698090  Waiting for reply... done.

 2078 00:41:32.701030  

 2079 00:41:32.701443  My ip is 192.168.201.15

 2080 00:41:32.701802  

 2081 00:41:32.704412  The DHCP server ip is 192.168.201.1

 2082 00:41:32.704834  

 2083 00:41:32.711267  TFTP server IP predefined by user: 192.168.201.1

 2084 00:41:32.711726  

 2085 00:41:32.718184  Bootfile predefined by user: 11637357/tftp-deploy-hvu02uy5/kernel/bzImage

 2086 00:41:32.718732  

 2087 00:41:32.721024  Sending tftp read request... done.

 2088 00:41:32.721487  

 2089 00:41:32.724777  Waiting for the transfer... 

 2090 00:41:32.725209  

 2091 00:41:33.360449  00000000 ################################################################

 2092 00:41:33.360644  

 2093 00:41:33.986672  00080000 ################################################################

 2094 00:41:33.987273  

 2095 00:41:34.696258  00100000 ################################################################

 2096 00:41:34.696799  

 2097 00:41:35.413707  00180000 ################################################################

 2098 00:41:35.414234  

 2099 00:41:36.112793  00200000 ################################################################

 2100 00:41:36.113372  

 2101 00:41:36.790936  00280000 ################################################################

 2102 00:41:36.791460  

 2103 00:41:37.469884  00300000 ################################################################

 2104 00:41:37.470407  

 2105 00:41:38.144869  00380000 ################################################################

 2106 00:41:38.145485  

 2107 00:41:38.870932  00400000 ################################################################

 2108 00:41:38.871449  

 2109 00:41:39.563036  00480000 ################################################################

 2110 00:41:39.563585  

 2111 00:41:40.284020  00500000 ################################################################

 2112 00:41:40.284582  

 2113 00:41:41.007964  00580000 ################################################################

 2114 00:41:41.008532  

 2115 00:41:41.695084  00600000 ################################################################

 2116 00:41:41.695248  

 2117 00:41:42.279229  00680000 ################################################################

 2118 00:41:42.279806  

 2119 00:41:42.979429  00700000 ################################################################

 2120 00:41:42.979995  

 2121 00:41:43.682497  00780000 ################################################################

 2122 00:41:43.683034  

 2123 00:41:44.277687  00800000 ################################################################

 2124 00:41:44.278217  

 2125 00:41:45.000123  00880000 ################################################################

 2126 00:41:45.000731  

 2127 00:41:45.690484  00900000 ################################################################

 2128 00:41:45.691025  

 2129 00:41:46.363347  00980000 ################################################################

 2130 00:41:46.363938  

 2131 00:41:47.078530  00a00000 ################################################################

 2132 00:41:47.079058  

 2133 00:41:47.709907  00a80000 ######################################################### done.

 2134 00:41:47.710417  

 2135 00:41:47.713403  The bootfile was 11473408 bytes long.

 2136 00:41:47.713895  

 2137 00:41:47.716291  Sending tftp read request... done.

 2138 00:41:47.716738  

 2139 00:41:47.719822  Waiting for the transfer... 

 2140 00:41:47.720264  

 2141 00:41:48.348607  00000000 ################################################################

 2142 00:41:48.348759  

 2143 00:41:49.020944  00080000 ################################################################

 2144 00:41:49.021095  

 2145 00:41:49.714203  00100000 ################################################################

 2146 00:41:49.714733  

 2147 00:41:50.353349  00180000 ################################################################

 2148 00:41:50.353875  

 2149 00:41:51.055102  00200000 ################################################################

 2150 00:41:51.055633  

 2151 00:41:51.758530  00280000 ################################################################

 2152 00:41:51.759070  

 2153 00:41:52.472443  00300000 ################################################################

 2154 00:41:52.472977  

 2155 00:41:53.070854  00380000 ################################################################

 2156 00:41:53.071442  

 2157 00:41:53.671344  00400000 ################################################################

 2158 00:41:53.671990  

 2159 00:41:54.390381  00480000 ################################################################

 2160 00:41:54.390987  

 2161 00:41:55.043522  00500000 ################################################################

 2162 00:41:55.044133  

 2163 00:41:55.750164  00580000 ################################################################

 2164 00:41:55.750702  

 2165 00:41:55.896418  00600000 ############# done.

 2166 00:41:55.896970  

 2167 00:41:55.899456  Sending tftp read request... done.

 2168 00:41:55.899995  

 2169 00:41:55.903332  Waiting for the transfer... 

 2170 00:41:55.903866  

 2171 00:41:55.904315  00000000 # done.

 2172 00:41:55.904748  

 2173 00:41:55.912715  Command line loaded dynamically from TFTP file: 11637357/tftp-deploy-hvu02uy5/kernel/cmdline

 2174 00:41:55.913263  

 2175 00:41:55.942365  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11637357/extract-nfsrootfs-tl4js2ty,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2176 00:41:55.942906  

 2177 00:41:55.949144  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2178 00:41:55.953005  

 2179 00:41:55.956654  Shutting down all USB controllers.

 2180 00:41:55.957192  

 2181 00:41:55.957640  Removing current net device

 2182 00:41:55.960676  

 2183 00:41:55.961118  Finalizing coreboot

 2184 00:41:55.961568  

 2185 00:41:55.967041  Exiting depthcharge with code 4 at timestamp: 33136132

 2186 00:41:55.967519  

 2187 00:41:55.968007  

 2188 00:41:55.968431  Starting kernel ...

 2189 00:41:55.968842  

 2190 00:41:55.969245  

 2191 00:41:55.970564  end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
 2192 00:41:55.971108  start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
 2193 00:41:55.971531  Setting prompt string to ['Linux version [0-9]']
 2194 00:41:55.972052  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2195 00:41:55.972495  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2197 00:46:11.971315  end: 2.2.5 auto-login-action (duration 00:04:16) [common]
 2199 00:46:11.971649  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
 2201 00:46:11.971951  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2204 00:46:11.972385  end: 2 depthcharge-action (duration 00:05:00) [common]
 2206 00:46:11.972632  Cleaning after the job
 2207 00:46:11.972727  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/ramdisk
 2208 00:46:11.973715  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/kernel
 2209 00:46:11.975525  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/nfsrootfs
 2210 00:46:12.100619  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11637357/tftp-deploy-hvu02uy5/modules
 2211 00:46:12.101372  start: 4.1 power-off (timeout 00:00:30) [common]
 2212 00:46:12.101560  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2213 00:46:12.177604  >> Command sent successfully.

 2214 00:46:12.180177  Returned 0 in 0 seconds
 2215 00:46:12.280567  end: 4.1 power-off (duration 00:00:00) [common]
 2217 00:46:12.280951  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2218 00:46:12.281241  Listened to connection for namespace 'common' for up to 1s
 2220 00:46:12.281651  Listened to connection for namespace 'common' for up to 1s
 2221 00:46:13.282184  Finalising connection for namespace 'common'
 2222 00:46:13.282371  Disconnecting from shell: Finalise
 2223 00:46:13.282467  
 2224 00:46:13.382806  end: 4.2 read-feedback (duration 00:00:01) [common]
 2225 00:46:13.382967  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11637357
 2226 00:46:13.910035  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11637357
 2227 00:46:13.910234  JobError: Your job cannot terminate cleanly.