Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 20:43:28.711710 lava-dispatcher, installed at version: 2023.10
2 20:43:28.711949 start: 0 validate
3 20:43:28.712086 Start time: 2023-12-07 20:43:28.712078+00:00 (UTC)
4 20:43:28.712214 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:43:28.712342 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 20:43:28.980763 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:43:28.980944 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.299-cip105%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:43:29.231546 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:43:29.232373 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.299-cip105%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 20:43:33.134588 validate duration: 4.42
12 20:43:33.134890 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:43:33.135004 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:43:33.135094 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:43:33.135231 Not decompressing ramdisk as can be used compressed.
16 20:43:33.135326 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 20:43:33.135393 saving as /var/lib/lava/dispatcher/tmp/12210509/tftp-deploy-1r1enml0/ramdisk/rootfs.cpio.gz
18 20:43:33.135463 total size: 8418130 (8 MB)
19 20:43:33.779847 progress 0 % (0 MB)
20 20:43:33.785265 progress 5 % (0 MB)
21 20:43:33.787606 progress 10 % (0 MB)
22 20:43:33.789869 progress 15 % (1 MB)
23 20:43:33.792137 progress 20 % (1 MB)
24 20:43:33.794342 progress 25 % (2 MB)
25 20:43:33.796588 progress 30 % (2 MB)
26 20:43:33.798752 progress 35 % (2 MB)
27 20:43:33.804716 progress 40 % (3 MB)
28 20:43:33.807036 progress 45 % (3 MB)
29 20:43:33.809298 progress 50 % (4 MB)
30 20:43:33.811562 progress 55 % (4 MB)
31 20:43:33.813803 progress 60 % (4 MB)
32 20:43:33.815797 progress 65 % (5 MB)
33 20:43:33.818081 progress 70 % (5 MB)
34 20:43:33.820283 progress 75 % (6 MB)
35 20:43:33.822433 progress 80 % (6 MB)
36 20:43:33.824604 progress 85 % (6 MB)
37 20:43:33.826783 progress 90 % (7 MB)
38 20:43:33.829001 progress 95 % (7 MB)
39 20:43:33.831020 progress 100 % (8 MB)
40 20:43:33.831248 8 MB downloaded in 0.70 s (11.54 MB/s)
41 20:43:33.831398 end: 1.1.1 http-download (duration 00:00:01) [common]
43 20:43:33.831632 end: 1.1 download-retry (duration 00:00:01) [common]
44 20:43:33.831715 start: 1.2 download-retry (timeout 00:09:59) [common]
45 20:43:33.831795 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 20:43:33.831933 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.299-cip105/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 20:43:33.831999 saving as /var/lib/lava/dispatcher/tmp/12210509/tftp-deploy-1r1enml0/kernel/bzImage
48 20:43:33.832067 total size: 11571200 (11 MB)
49 20:43:33.832128 No compression specified
50 20:43:33.833223 progress 0 % (0 MB)
51 20:43:33.836245 progress 5 % (0 MB)
52 20:43:33.839285 progress 10 % (1 MB)
53 20:43:33.842239 progress 15 % (1 MB)
54 20:43:33.845261 progress 20 % (2 MB)
55 20:43:33.848482 progress 25 % (2 MB)
56 20:43:33.851371 progress 30 % (3 MB)
57 20:43:33.854533 progress 35 % (3 MB)
58 20:43:33.857588 progress 40 % (4 MB)
59 20:43:33.860497 progress 45 % (4 MB)
60 20:43:33.863506 progress 50 % (5 MB)
61 20:43:33.866579 progress 55 % (6 MB)
62 20:43:33.869481 progress 60 % (6 MB)
63 20:43:33.872737 progress 65 % (7 MB)
64 20:43:33.875714 progress 70 % (7 MB)
65 20:43:33.878561 progress 75 % (8 MB)
66 20:43:33.881554 progress 80 % (8 MB)
67 20:43:33.884555 progress 85 % (9 MB)
68 20:43:33.887613 progress 90 % (9 MB)
69 20:43:33.890738 progress 95 % (10 MB)
70 20:43:33.893836 progress 100 % (11 MB)
71 20:43:33.893955 11 MB downloaded in 0.06 s (178.32 MB/s)
72 20:43:33.894096 end: 1.2.1 http-download (duration 00:00:00) [common]
74 20:43:33.894322 end: 1.2 download-retry (duration 00:00:00) [common]
75 20:43:33.894409 start: 1.3 download-retry (timeout 00:09:59) [common]
76 20:43:33.894494 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 20:43:33.894630 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.299-cip105/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 20:43:33.894696 saving as /var/lib/lava/dispatcher/tmp/12210509/tftp-deploy-1r1enml0/modules/modules.tar
79 20:43:33.894753 total size: 483888 (0 MB)
80 20:43:33.894812 Using unxz to decompress xz
81 20:43:33.899040 progress 6 % (0 MB)
82 20:43:33.899442 progress 13 % (0 MB)
83 20:43:33.899672 progress 20 % (0 MB)
84 20:43:33.901318 progress 27 % (0 MB)
85 20:43:33.903267 progress 33 % (0 MB)
86 20:43:33.905158 progress 40 % (0 MB)
87 20:43:33.907220 progress 47 % (0 MB)
88 20:43:33.909332 progress 54 % (0 MB)
89 20:43:33.911342 progress 60 % (0 MB)
90 20:43:33.913360 progress 67 % (0 MB)
91 20:43:33.915325 progress 74 % (0 MB)
92 20:43:33.917460 progress 81 % (0 MB)
93 20:43:33.919459 progress 88 % (0 MB)
94 20:43:33.921536 progress 94 % (0 MB)
95 20:43:33.923950 progress 100 % (0 MB)
96 20:43:33.930402 0 MB downloaded in 0.04 s (12.95 MB/s)
97 20:43:33.930651 end: 1.3.1 http-download (duration 00:00:00) [common]
99 20:43:33.930911 end: 1.3 download-retry (duration 00:00:00) [common]
100 20:43:33.931001 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 20:43:33.931097 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 20:43:33.931175 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 20:43:33.931257 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 20:43:33.931487 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j
105 20:43:33.931624 makedir: /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin
106 20:43:33.931730 makedir: /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/tests
107 20:43:33.931829 makedir: /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/results
108 20:43:33.931949 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-add-keys
109 20:43:33.932136 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-add-sources
110 20:43:33.932271 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-background-process-start
111 20:43:33.932402 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-background-process-stop
112 20:43:33.932529 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-common-functions
113 20:43:33.932655 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-echo-ipv4
114 20:43:33.932781 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-install-packages
115 20:43:33.932909 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-installed-packages
116 20:43:33.933034 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-os-build
117 20:43:33.933165 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-probe-channel
118 20:43:33.933292 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-probe-ip
119 20:43:33.933418 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-target-ip
120 20:43:33.933544 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-target-mac
121 20:43:33.933668 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-target-storage
122 20:43:33.933800 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-test-case
123 20:43:33.933928 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-test-event
124 20:43:33.934052 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-test-feedback
125 20:43:33.934178 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-test-raise
126 20:43:33.934305 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-test-reference
127 20:43:33.934431 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-test-runner
128 20:43:33.934556 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-test-set
129 20:43:33.934683 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-test-shell
130 20:43:33.934813 Updating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-install-packages (oe)
131 20:43:33.934968 Updating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/bin/lava-installed-packages (oe)
132 20:43:33.935093 Creating /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/environment
133 20:43:33.935195 LAVA metadata
134 20:43:33.935269 - LAVA_JOB_ID=12210509
135 20:43:33.935331 - LAVA_DISPATCHER_IP=192.168.201.1
136 20:43:33.935433 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 20:43:33.935501 skipped lava-vland-overlay
138 20:43:33.935574 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 20:43:33.935652 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 20:43:33.935712 skipped lava-multinode-overlay
141 20:43:33.935790 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 20:43:33.935877 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 20:43:33.935957 Loading test definitions
144 20:43:33.936058 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 20:43:33.936167 Using /lava-12210509 at stage 0
146 20:43:33.936508 uuid=12210509_1.4.2.3.1 testdef=None
147 20:43:33.936600 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 20:43:33.936687 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 20:43:33.937224 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 20:43:33.937444 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 20:43:33.938092 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 20:43:33.938327 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 20:43:33.938947 runner path: /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/0/tests/0_dmesg test_uuid 12210509_1.4.2.3.1
156 20:43:33.939102 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 20:43:33.939357 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 20:43:33.939429 Using /lava-12210509 at stage 1
160 20:43:33.939734 uuid=12210509_1.4.2.3.5 testdef=None
161 20:43:33.939822 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 20:43:33.939905 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 20:43:33.940419 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 20:43:33.940634 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 20:43:33.941278 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 20:43:33.941500 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 20:43:33.942126 runner path: /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/1/tests/1_bootrr test_uuid 12210509_1.4.2.3.5
170 20:43:33.942278 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 20:43:33.942484 Creating lava-test-runner.conf files
173 20:43:33.942546 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/0 for stage 0
174 20:43:33.942636 - 0_dmesg
175 20:43:33.942713 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12210509/lava-overlay-x_mpb45j/lava-12210509/1 for stage 1
176 20:43:33.942803 - 1_bootrr
177 20:43:33.942897 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 20:43:33.942982 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 20:43:33.951339 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 20:43:33.951451 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 20:43:33.951535 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 20:43:33.951617 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 20:43:33.951700 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 20:43:34.207641 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 20:43:34.208041 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 20:43:34.208197 extracting modules file /var/lib/lava/dispatcher/tmp/12210509/tftp-deploy-1r1enml0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12210509/extract-overlay-ramdisk-c90qysi5/ramdisk
187 20:43:34.230675 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 20:43:34.230868 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 20:43:34.231016 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12210509/compress-overlay-tf4mav1i/overlay-1.4.2.4.tar.gz to ramdisk
190 20:43:34.231087 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12210509/compress-overlay-tf4mav1i/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12210509/extract-overlay-ramdisk-c90qysi5/ramdisk
191 20:43:34.240024 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 20:43:34.240226 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 20:43:34.240319 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 20:43:34.240408 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 20:43:34.240489 Building ramdisk /var/lib/lava/dispatcher/tmp/12210509/extract-overlay-ramdisk-c90qysi5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12210509/extract-overlay-ramdisk-c90qysi5/ramdisk
196 20:43:34.384893 >> 53982 blocks
197 20:43:35.279446 rename /var/lib/lava/dispatcher/tmp/12210509/extract-overlay-ramdisk-c90qysi5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12210509/tftp-deploy-1r1enml0/ramdisk/ramdisk.cpio.gz
198 20:43:35.280014 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 20:43:35.280193 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 20:43:35.280345 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 20:43:35.280494 No mkimage arch provided, not using FIT.
202 20:43:35.280626 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 20:43:35.280758 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 20:43:35.280911 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 20:43:35.281051 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 20:43:35.281173 No LXC device requested
207 20:43:35.281299 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 20:43:35.281435 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 20:43:35.281557 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 20:43:35.281671 Checking files for TFTP limit of 4294967296 bytes.
211 20:43:35.282237 end: 1 tftp-deploy (duration 00:00:02) [common]
212 20:43:35.282375 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 20:43:35.282507 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 20:43:35.282684 substitutions:
215 20:43:35.282792 - {DTB}: None
216 20:43:35.282889 - {INITRD}: 12210509/tftp-deploy-1r1enml0/ramdisk/ramdisk.cpio.gz
217 20:43:35.282988 - {KERNEL}: 12210509/tftp-deploy-1r1enml0/kernel/bzImage
218 20:43:35.283086 - {LAVA_MAC}: None
219 20:43:35.283183 - {PRESEED_CONFIG}: None
220 20:43:35.283279 - {PRESEED_LOCAL}: None
221 20:43:35.283377 - {RAMDISK}: 12210509/tftp-deploy-1r1enml0/ramdisk/ramdisk.cpio.gz
222 20:43:35.283467 - {ROOT_PART}: None
223 20:43:35.283557 - {ROOT}: None
224 20:43:35.283644 - {SERVER_IP}: 192.168.201.1
225 20:43:35.283737 - {TEE}: None
226 20:43:35.283830 Parsed boot commands:
227 20:43:35.283925 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 20:43:35.284211 Parsed boot commands: tftpboot 192.168.201.1 12210509/tftp-deploy-1r1enml0/kernel/bzImage 12210509/tftp-deploy-1r1enml0/kernel/cmdline 12210509/tftp-deploy-1r1enml0/ramdisk/ramdisk.cpio.gz
229 20:43:35.284345 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 20:43:35.284477 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 20:43:35.284622 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 20:43:35.284752 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 20:43:35.284867 Not connected, no need to disconnect.
234 20:43:35.284985 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 20:43:35.285113 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 20:43:35.285217 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
237 20:43:35.290147 Setting prompt string to ['lava-test: # ']
238 20:43:35.290659 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 20:43:35.290819 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 20:43:35.290965 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 20:43:35.291099 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 20:43:35.291442 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
243 20:43:40.431053 >> Command sent successfully.
244 20:43:40.433570 Returned 0 in 5 seconds
245 20:43:40.534009 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 20:43:40.534471 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 20:43:40.534619 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 20:43:40.534749 Setting prompt string to 'Starting depthcharge on Helios...'
250 20:43:40.534857 Changing prompt to 'Starting depthcharge on Helios...'
251 20:43:40.534964 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 20:43:40.535335 [Enter `^Ec?' for help]
253 20:43:41.155220
254 20:43:41.155377
255 20:43:41.164968 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 20:43:41.168434 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 20:43:41.175084 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 20:43:41.178601 CPU: AES supported, TXT NOT supported, VT supported
259 20:43:41.185098 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 20:43:41.188361 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 20:43:41.194671 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 20:43:41.198219 VBOOT: Loading verstage.
263 20:43:41.201404 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 20:43:41.207881 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 20:43:41.211430 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 20:43:41.214742 CBFS @ c08000 size 3f8000
267 20:43:41.221291 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 20:43:41.224677 CBFS: Locating 'fallback/verstage'
269 20:43:41.227880 CBFS: Found @ offset 10fb80 size 1072c
270 20:43:41.231568
271 20:43:41.231654
272 20:43:41.241557 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 20:43:41.255704 Probing TPM: . done!
274 20:43:41.259739 TPM ready after 0 ms
275 20:43:41.262301 Connected to device vid:did:rid of 1ae0:0028:00
276 20:43:41.273028 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
277 20:43:41.276318 Initialized TPM device CR50 revision 0
278 20:43:41.325472 tlcl_send_startup: Startup return code is 0
279 20:43:41.325620 TPM: setup succeeded
280 20:43:41.338339 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 20:43:41.342048 Chrome EC: UHEPI supported
282 20:43:41.345498 Phase 1
283 20:43:41.348913 FMAP: area GBB found @ c05000 (12288 bytes)
284 20:43:41.355361 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 20:43:41.355448 Phase 2
286 20:43:41.358743 Phase 3
287 20:43:41.362088 FMAP: area GBB found @ c05000 (12288 bytes)
288 20:43:41.368595 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 20:43:41.375196 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 20:43:41.379010 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
291 20:43:41.385155 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 20:43:41.400953 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 20:43:41.404035 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
294 20:43:41.411171 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 20:43:41.415092 Phase 4
296 20:43:41.418153 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
297 20:43:41.424729 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 20:43:41.604711 VB2:vb2_rsa_verify_digest() Digest check failed!
299 20:43:41.611163 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 20:43:41.611315 Saving nvdata
301 20:43:41.614183 Reboot requested (10020007)
302 20:43:41.617868 board_reset() called!
303 20:43:41.617954 full_reset() called!
304 20:43:46.121594
305 20:43:46.121732
306 20:43:46.131533 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 20:43:46.135282 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 20:43:46.141977 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 20:43:46.145159 CPU: AES supported, TXT NOT supported, VT supported
310 20:43:46.151548 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 20:43:46.154881 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 20:43:46.161759 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 20:43:46.165065 VBOOT: Loading verstage.
314 20:43:46.167982 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 20:43:46.174429 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 20:43:46.181903 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 20:43:46.182240 CBFS @ c08000 size 3f8000
318 20:43:46.188262 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 20:43:46.192038 CBFS: Locating 'fallback/verstage'
320 20:43:46.194838 CBFS: Found @ offset 10fb80 size 1072c
321 20:43:46.199087
322 20:43:46.199505
323 20:43:46.208952 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 20:43:46.223435 Probing TPM: . done!
325 20:43:46.226544 TPM ready after 0 ms
326 20:43:46.229643 Connected to device vid:did:rid of 1ae0:0028:00
327 20:43:46.240322 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 20:43:46.243530 Initialized TPM device CR50 revision 0
329 20:43:46.293026 tlcl_send_startup: Startup return code is 0
330 20:43:46.293523 TPM: setup succeeded
331 20:43:46.306501 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 20:43:46.309940 Chrome EC: UHEPI supported
333 20:43:46.312837 Phase 1
334 20:43:46.316232 FMAP: area GBB found @ c05000 (12288 bytes)
335 20:43:46.322807 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 20:43:46.329617 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 20:43:46.332965 Recovery requested (1009000e)
338 20:43:46.339033 Saving nvdata
339 20:43:46.344872 tlcl_extend: response is 0
340 20:43:46.353683 tlcl_extend: response is 0
341 20:43:46.360760 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 20:43:46.364156 CBFS @ c08000 size 3f8000
343 20:43:46.370388 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 20:43:46.374014 CBFS: Locating 'fallback/romstage'
345 20:43:46.376729 CBFS: Found @ offset 80 size 145fc
346 20:43:46.380646 Accumulated console time in verstage 99 ms
347 20:43:46.381248
348 20:43:46.381593
349 20:43:46.393497 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 20:43:46.400131 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 20:43:46.403235 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 20:43:46.406426 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 20:43:46.413405 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 20:43:46.416710 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 20:43:46.420247 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 20:43:46.423182 TCO_STS: 0000 0000
357 20:43:46.426791 GEN_PMCON: e0015238 00000200
358 20:43:46.429965 GBLRST_CAUSE: 00000000 00000000
359 20:43:46.430353 prev_sleep_state 5
360 20:43:46.433303 Boot Count incremented to 73978
361 20:43:46.440591 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 20:43:46.443482 CBFS @ c08000 size 3f8000
363 20:43:46.450492 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 20:43:46.450977 CBFS: Locating 'fspm.bin'
365 20:43:46.456675 CBFS: Found @ offset 5ffc0 size 71000
366 20:43:46.460094 Chrome EC: UHEPI supported
367 20:43:46.466191 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 20:43:46.470335 Probing TPM: done!
369 20:43:46.476980 Connected to device vid:did:rid of 1ae0:0028:00
370 20:43:46.487014 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
371 20:43:46.492852 Initialized TPM device CR50 revision 0
372 20:43:46.501896 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 20:43:46.508707 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 20:43:46.511976 MRC cache found, size 1948
375 20:43:46.515428 bootmode is set to: 2
376 20:43:46.518519 PRMRR disabled by config.
377 20:43:46.521116 SPD INDEX = 1
378 20:43:46.524631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 20:43:46.527851 CBFS @ c08000 size 3f8000
380 20:43:46.534828 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 20:43:46.535354 CBFS: Locating 'spd.bin'
382 20:43:46.538289 CBFS: Found @ offset 5fb80 size 400
383 20:43:46.541220 SPD: module type is LPDDR3
384 20:43:46.544509 SPD: module part is
385 20:43:46.551919 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 20:43:46.555000 SPD: device width 4 bits, bus width 8 bits
387 20:43:46.557808 SPD: module size is 4096 MB (per channel)
388 20:43:46.561300 memory slot: 0 configuration done.
389 20:43:46.564363 memory slot: 2 configuration done.
390 20:43:46.616272 CBMEM:
391 20:43:46.619156 IMD: root @ 99fff000 254 entries.
392 20:43:46.622405 IMD: root @ 99ffec00 62 entries.
393 20:43:46.625326 External stage cache:
394 20:43:46.628792 IMD: root @ 9abff000 254 entries.
395 20:43:46.632432 IMD: root @ 9abfec00 62 entries.
396 20:43:46.639171 Chrome EC: clear events_b mask to 0x0000000020004000
397 20:43:46.652207 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 20:43:46.665157 tlcl_write: response is 0
399 20:43:46.674446 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 20:43:46.681028 MRC: TPM MRC hash updated successfully.
401 20:43:46.681552 2 DIMMs found
402 20:43:46.684129 SMM Memory Map
403 20:43:46.687734 SMRAM : 0x9a000000 0x1000000
404 20:43:46.691192 Subregion 0: 0x9a000000 0xa00000
405 20:43:46.694534 Subregion 1: 0x9aa00000 0x200000
406 20:43:46.697643 Subregion 2: 0x9ac00000 0x400000
407 20:43:46.700902 top_of_ram = 0x9a000000
408 20:43:46.705021 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 20:43:46.711401 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 20:43:46.713638 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 20:43:46.720288 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 20:43:46.723460 CBFS @ c08000 size 3f8000
413 20:43:46.726888 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 20:43:46.730363 CBFS: Locating 'fallback/postcar'
415 20:43:46.734126 CBFS: Found @ offset 107000 size 4b44
416 20:43:46.740316 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 20:43:46.753611 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 20:43:46.756326 Processing 180 relocs. Offset value of 0x97c0c000
419 20:43:46.764618 Accumulated console time in romstage 286 ms
420 20:43:46.765051
421 20:43:46.765392
422 20:43:46.774479 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 20:43:46.781584 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 20:43:46.784900 CBFS @ c08000 size 3f8000
425 20:43:46.787790 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 20:43:46.794872 CBFS: Locating 'fallback/ramstage'
427 20:43:46.797927 CBFS: Found @ offset 43380 size 1b9e8
428 20:43:46.804152 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 20:43:46.836473 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 20:43:46.839916 Processing 3976 relocs. Offset value of 0x98db0000
431 20:43:46.846711 Accumulated console time in postcar 52 ms
432 20:43:46.847141
433 20:43:46.847479
434 20:43:46.856369 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 20:43:46.862857 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 20:43:46.866146 WARNING: RO_VPD is uninitialized or empty.
437 20:43:46.869786 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 20:43:46.875904 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 20:43:46.875989 Normal boot.
440 20:43:46.883329 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 20:43:46.886158 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 20:43:46.890023 CBFS @ c08000 size 3f8000
443 20:43:46.896146 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 20:43:46.899641 CBFS: Locating 'cpu_microcode_blob.bin'
445 20:43:46.902697 CBFS: Found @ offset 14700 size 2ec00
446 20:43:46.906234 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 20:43:46.909894 Skip microcode update
448 20:43:46.912696 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 20:43:46.916337 CBFS @ c08000 size 3f8000
450 20:43:46.922943 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 20:43:46.926153 CBFS: Locating 'fsps.bin'
452 20:43:46.929359 CBFS: Found @ offset d1fc0 size 35000
453 20:43:46.954463 Detected 4 core, 8 thread CPU.
454 20:43:46.957905 Setting up SMI for CPU
455 20:43:46.961017 IED base = 0x9ac00000
456 20:43:46.961195 IED size = 0x00400000
457 20:43:46.964039 Will perform SMM setup.
458 20:43:46.970888 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 20:43:46.977410 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 20:43:46.980737 Processing 16 relocs. Offset value of 0x00030000
461 20:43:46.984657 Attempting to start 7 APs
462 20:43:46.987740 Waiting for 10ms after sending INIT.
463 20:43:47.004104 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
464 20:43:47.004282 done.
465 20:43:47.007378 AP: slot 7 apic_id 4.
466 20:43:47.010915 Waiting for 2nd SIPI to complete...done.
467 20:43:47.013916 AP: slot 3 apic_id 7.
468 20:43:47.017352 AP: slot 2 apic_id 6.
469 20:43:47.017550 AP: slot 6 apic_id 5.
470 20:43:47.020695 AP: slot 5 apic_id 2.
471 20:43:47.024461 AP: slot 4 apic_id 3.
472 20:43:47.030875 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 20:43:47.037291 Processing 13 relocs. Offset value of 0x00038000
474 20:43:47.040889 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 20:43:47.047032 Installing SMM handler to 0x9a000000
476 20:43:47.053779 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 20:43:47.060455 Processing 658 relocs. Offset value of 0x9a010000
478 20:43:47.067271 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 20:43:47.070622 Processing 13 relocs. Offset value of 0x9a008000
480 20:43:47.077611 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 20:43:47.084184 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 20:43:47.087507 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 20:43:47.094426 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 20:43:47.100918 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 20:43:47.107573 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 20:43:47.111494 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 20:43:47.117116 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 20:43:47.120943 Clearing SMI status registers
489 20:43:47.123806 SMI_STS: PM1
490 20:43:47.124304 PM1_STS: PWRBTN
491 20:43:47.127184 TCO_STS: SECOND_TO
492 20:43:47.130477 New SMBASE 0x9a000000
493 20:43:47.134229 In relocation handler: CPU 0
494 20:43:47.137442 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 20:43:47.140987 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 20:43:47.143711 Relocation complete.
497 20:43:47.147547 New SMBASE 0x99fffc00
498 20:43:47.147980 In relocation handler: CPU 1
499 20:43:47.153670 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
500 20:43:47.157289 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 20:43:47.160351 Relocation complete.
502 20:43:47.163970 New SMBASE 0x99ffe400
503 20:43:47.164471 In relocation handler: CPU 7
504 20:43:47.170462 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
505 20:43:47.173575 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 20:43:47.176823 Relocation complete.
507 20:43:47.177239 New SMBASE 0x99ffe800
508 20:43:47.179979 In relocation handler: CPU 6
509 20:43:47.186556 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
510 20:43:47.189883 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 20:43:47.193554 Relocation complete.
512 20:43:47.193686 New SMBASE 0x99fff400
513 20:43:47.196683 In relocation handler: CPU 3
514 20:43:47.203295 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
515 20:43:47.206395 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 20:43:47.209600 Relocation complete.
517 20:43:47.209693 New SMBASE 0x99fff800
518 20:43:47.213295 In relocation handler: CPU 2
519 20:43:47.216638 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
520 20:43:47.222976 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 20:43:47.226648 Relocation complete.
522 20:43:47.226734 New SMBASE 0x99ffec00
523 20:43:47.230533 In relocation handler: CPU 5
524 20:43:47.233556 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
525 20:43:47.239783 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 20:43:47.243521 Relocation complete.
527 20:43:47.243915 New SMBASE 0x99fff000
528 20:43:47.246429 In relocation handler: CPU 4
529 20:43:47.249942 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
530 20:43:47.256731 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 20:43:47.257122 Relocation complete.
532 20:43:47.260590 Initializing CPU #0
533 20:43:47.262986 CPU: vendor Intel device 806ec
534 20:43:47.266940 CPU: family 06, model 8e, stepping 0c
535 20:43:47.269645 Clearing out pending MCEs
536 20:43:47.273099 Setting up local APIC...
537 20:43:47.273508 apic_id: 0x00 done.
538 20:43:47.276786 Turbo is available but hidden
539 20:43:47.280825 Turbo is available and visible
540 20:43:47.283111 VMX status: enabled
541 20:43:47.286862 IA32_FEATURE_CONTROL status: locked
542 20:43:47.290016 Skip microcode update
543 20:43:47.290429 CPU #0 initialized
544 20:43:47.293022 Initializing CPU #1
545 20:43:47.296820 Initializing CPU #4
546 20:43:47.297228 Initializing CPU #5
547 20:43:47.299560 CPU: vendor Intel device 806ec
548 20:43:47.302942 CPU: family 06, model 8e, stepping 0c
549 20:43:47.306519 CPU: vendor Intel device 806ec
550 20:43:47.310328 CPU: family 06, model 8e, stepping 0c
551 20:43:47.313152 Clearing out pending MCEs
552 20:43:47.315966 Clearing out pending MCEs
553 20:43:47.320005 Setting up local APIC...
554 20:43:47.322624 CPU: vendor Intel device 806ec
555 20:43:47.326086 CPU: family 06, model 8e, stepping 0c
556 20:43:47.329155 Clearing out pending MCEs
557 20:43:47.329351 Setting up local APIC...
558 20:43:47.332644 Initializing CPU #3
559 20:43:47.336338 Initializing CPU #2
560 20:43:47.336532 CPU: vendor Intel device 806ec
561 20:43:47.342862 CPU: family 06, model 8e, stepping 0c
562 20:43:47.345850 CPU: vendor Intel device 806ec
563 20:43:47.349191 CPU: family 06, model 8e, stepping 0c
564 20:43:47.349374 Clearing out pending MCEs
565 20:43:47.352822 Clearing out pending MCEs
566 20:43:47.355928 Setting up local APIC...
567 20:43:47.359019 Setting up local APIC...
568 20:43:47.359201 apic_id: 0x02 done.
569 20:43:47.362343 apic_id: 0x03 done.
570 20:43:47.366034 VMX status: enabled
571 20:43:47.366215 VMX status: enabled
572 20:43:47.368977 IA32_FEATURE_CONTROL status: locked
573 20:43:47.375636 IA32_FEATURE_CONTROL status: locked
574 20:43:47.375818 Skip microcode update
575 20:43:47.379197 Skip microcode update
576 20:43:47.379380 CPU #5 initialized
577 20:43:47.382617 CPU #4 initialized
578 20:43:47.386141 Initializing CPU #7
579 20:43:47.386324 Initializing CPU #6
580 20:43:47.389322 CPU: vendor Intel device 806ec
581 20:43:47.392260 CPU: family 06, model 8e, stepping 0c
582 20:43:47.395728 CPU: vendor Intel device 806ec
583 20:43:47.399170 CPU: family 06, model 8e, stepping 0c
584 20:43:47.402145 Clearing out pending MCEs
585 20:43:47.405806 Clearing out pending MCEs
586 20:43:47.408950 Setting up local APIC...
587 20:43:47.412038 Setting up local APIC...
588 20:43:47.412240 apic_id: 0x01 done.
589 20:43:47.415910 apic_id: 0x04 done.
590 20:43:47.418841 Setting up local APIC...
591 20:43:47.419022 apic_id: 0x06 done.
592 20:43:47.422707 apic_id: 0x07 done.
593 20:43:47.425789 VMX status: enabled
594 20:43:47.425971 VMX status: enabled
595 20:43:47.429002 IA32_FEATURE_CONTROL status: locked
596 20:43:47.432100 IA32_FEATURE_CONTROL status: locked
597 20:43:47.435743 Skip microcode update
598 20:43:47.438780 Skip microcode update
599 20:43:47.438962 CPU #2 initialized
600 20:43:47.442358 CPU #3 initialized
601 20:43:47.442539 VMX status: enabled
602 20:43:47.445536 apic_id: 0x05 done.
603 20:43:47.448812 VMX status: enabled
604 20:43:47.449219 VMX status: enabled
605 20:43:47.452424 IA32_FEATURE_CONTROL status: locked
606 20:43:47.456147 IA32_FEATURE_CONTROL status: locked
607 20:43:47.459438 Skip microcode update
608 20:43:47.462325 Skip microcode update
609 20:43:47.462712 CPU #7 initialized
610 20:43:47.466017 CPU #6 initialized
611 20:43:47.468681 IA32_FEATURE_CONTROL status: locked
612 20:43:47.472568 Skip microcode update
613 20:43:47.472857 CPU #1 initialized
614 20:43:47.478787 bsp_do_flight_plan done after 464 msecs.
615 20:43:47.482006 CPU: frequency set to 4200 MHz
616 20:43:47.482217 Enabling SMIs.
617 20:43:47.482385 Locking SMM.
618 20:43:47.498287 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 20:43:47.501855 CBFS @ c08000 size 3f8000
620 20:43:47.508228 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 20:43:47.508468 CBFS: Locating 'vbt.bin'
622 20:43:47.511924 CBFS: Found @ offset 5f5c0 size 499
623 20:43:47.518353 Found a VBT of 4608 bytes after decompression
624 20:43:47.703550 Display FSP Version Info HOB
625 20:43:47.706555 Reference Code - CPU = 9.0.1e.30
626 20:43:47.710348 uCode Version = 0.0.0.ca
627 20:43:47.713257 TXT ACM version = ff.ff.ff.ffff
628 20:43:47.716805 Display FSP Version Info HOB
629 20:43:47.720657 Reference Code - ME = 9.0.1e.30
630 20:43:47.723480 MEBx version = 0.0.0.0
631 20:43:47.726684 ME Firmware Version = Consumer SKU
632 20:43:47.730107 Display FSP Version Info HOB
633 20:43:47.733297 Reference Code - CML PCH = 9.0.1e.30
634 20:43:47.736715 PCH-CRID Status = Disabled
635 20:43:47.739781 PCH-CRID Original Value = ff.ff.ff.ffff
636 20:43:47.743065 PCH-CRID New Value = ff.ff.ff.ffff
637 20:43:47.746489 OPROM - RST - RAID = ff.ff.ff.ffff
638 20:43:47.750025 ChipsetInit Base Version = ff.ff.ff.ffff
639 20:43:47.753305 ChipsetInit Oem Version = ff.ff.ff.ffff
640 20:43:47.756608 Display FSP Version Info HOB
641 20:43:47.763053 Reference Code - SA - System Agent = 9.0.1e.30
642 20:43:47.766495 Reference Code - MRC = 0.7.1.6c
643 20:43:47.766954 SA - PCIe Version = 9.0.1e.30
644 20:43:47.769626 SA-CRID Status = Disabled
645 20:43:47.772798 SA-CRID Original Value = 0.0.0.c
646 20:43:47.776670 SA-CRID New Value = 0.0.0.c
647 20:43:47.779466 OPROM - VBIOS = ff.ff.ff.ffff
648 20:43:47.782873 RTC Init
649 20:43:47.785963 Set power on after power failure.
650 20:43:47.786292 Disabling Deep S3
651 20:43:47.789251 Disabling Deep S3
652 20:43:47.789483 Disabling Deep S4
653 20:43:47.793108 Disabling Deep S4
654 20:43:47.793429 Disabling Deep S5
655 20:43:47.796173 Disabling Deep S5
656 20:43:47.802418 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1
657 20:43:47.802680 Enumerating buses...
658 20:43:47.809242 Show all devs... Before device enumeration.
659 20:43:47.809673 Root Device: enabled 1
660 20:43:47.812648 CPU_CLUSTER: 0: enabled 1
661 20:43:47.816182 DOMAIN: 0000: enabled 1
662 20:43:47.819352 APIC: 00: enabled 1
663 20:43:47.819930 PCI: 00:00.0: enabled 1
664 20:43:47.822503 PCI: 00:02.0: enabled 1
665 20:43:47.825733 PCI: 00:04.0: enabled 0
666 20:43:47.829052 PCI: 00:05.0: enabled 0
667 20:43:47.829373 PCI: 00:12.0: enabled 1
668 20:43:47.832343 PCI: 00:12.5: enabled 0
669 20:43:47.835446 PCI: 00:12.6: enabled 0
670 20:43:47.835674 PCI: 00:14.0: enabled 1
671 20:43:47.839012 PCI: 00:14.1: enabled 0
672 20:43:47.842252 PCI: 00:14.3: enabled 1
673 20:43:47.845444 PCI: 00:14.5: enabled 0
674 20:43:47.845626 PCI: 00:15.0: enabled 1
675 20:43:47.848512 PCI: 00:15.1: enabled 1
676 20:43:47.852171 PCI: 00:15.2: enabled 0
677 20:43:47.855356 PCI: 00:15.3: enabled 0
678 20:43:47.855537 PCI: 00:16.0: enabled 1
679 20:43:47.859167 PCI: 00:16.1: enabled 0
680 20:43:47.862434 PCI: 00:16.2: enabled 0
681 20:43:47.865608 PCI: 00:16.3: enabled 0
682 20:43:47.866031 PCI: 00:16.4: enabled 0
683 20:43:47.868974 PCI: 00:16.5: enabled 0
684 20:43:47.871969 PCI: 00:17.0: enabled 1
685 20:43:47.875687 PCI: 00:19.0: enabled 1
686 20:43:47.876331 PCI: 00:19.1: enabled 0
687 20:43:47.878932 PCI: 00:19.2: enabled 0
688 20:43:47.881913 PCI: 00:1a.0: enabled 0
689 20:43:47.882213 PCI: 00:1c.0: enabled 0
690 20:43:47.885137 PCI: 00:1c.1: enabled 0
691 20:43:47.888508 PCI: 00:1c.2: enabled 0
692 20:43:47.891740 PCI: 00:1c.3: enabled 0
693 20:43:47.891921 PCI: 00:1c.4: enabled 0
694 20:43:47.894918 PCI: 00:1c.5: enabled 0
695 20:43:47.898480 PCI: 00:1c.6: enabled 0
696 20:43:47.902283 PCI: 00:1c.7: enabled 0
697 20:43:47.902527 PCI: 00:1d.0: enabled 1
698 20:43:47.905534 PCI: 00:1d.1: enabled 0
699 20:43:47.908904 PCI: 00:1d.2: enabled 0
700 20:43:47.911770 PCI: 00:1d.3: enabled 0
701 20:43:47.911926 PCI: 00:1d.4: enabled 0
702 20:43:47.914960 PCI: 00:1d.5: enabled 1
703 20:43:47.918206 PCI: 00:1e.0: enabled 1
704 20:43:47.918360 PCI: 00:1e.1: enabled 0
705 20:43:47.921851 PCI: 00:1e.2: enabled 1
706 20:43:47.924880 PCI: 00:1e.3: enabled 1
707 20:43:47.928423 PCI: 00:1f.0: enabled 1
708 20:43:47.928642 PCI: 00:1f.1: enabled 1
709 20:43:47.931546 PCI: 00:1f.2: enabled 1
710 20:43:47.935045 PCI: 00:1f.3: enabled 1
711 20:43:47.938397 PCI: 00:1f.4: enabled 1
712 20:43:47.938825 PCI: 00:1f.5: enabled 1
713 20:43:47.942177 PCI: 00:1f.6: enabled 0
714 20:43:47.944930 USB0 port 0: enabled 1
715 20:43:47.945488 I2C: 00:15: enabled 1
716 20:43:47.948261 I2C: 00:5d: enabled 1
717 20:43:47.952088 GENERIC: 0.0: enabled 1
718 20:43:47.955071 I2C: 00:1a: enabled 1
719 20:43:47.955500 I2C: 00:38: enabled 1
720 20:43:47.958518 I2C: 00:39: enabled 1
721 20:43:47.961766 I2C: 00:3a: enabled 1
722 20:43:47.962360 I2C: 00:3b: enabled 1
723 20:43:47.965154 PCI: 00:00.0: enabled 1
724 20:43:47.968341 SPI: 00: enabled 1
725 20:43:47.968765 SPI: 01: enabled 1
726 20:43:47.971572 PNP: 0c09.0: enabled 1
727 20:43:47.974680 USB2 port 0: enabled 1
728 20:43:47.975019 USB2 port 1: enabled 1
729 20:43:47.978125 USB2 port 2: enabled 0
730 20:43:47.981360 USB2 port 3: enabled 0
731 20:43:47.981590 USB2 port 5: enabled 0
732 20:43:47.984603 USB2 port 6: enabled 1
733 20:43:47.988256 USB2 port 9: enabled 1
734 20:43:47.988440 USB3 port 0: enabled 1
735 20:43:47.991264 USB3 port 1: enabled 1
736 20:43:47.994648 USB3 port 2: enabled 1
737 20:43:47.997926 USB3 port 3: enabled 1
738 20:43:47.998111 USB3 port 4: enabled 0
739 20:43:48.001585 APIC: 01: enabled 1
740 20:43:48.004458 APIC: 06: enabled 1
741 20:43:48.004642 APIC: 07: enabled 1
742 20:43:48.008042 APIC: 03: enabled 1
743 20:43:48.008656 APIC: 02: enabled 1
744 20:43:48.011228 APIC: 05: enabled 1
745 20:43:48.014966 APIC: 04: enabled 1
746 20:43:48.015396 Compare with tree...
747 20:43:48.017877 Root Device: enabled 1
748 20:43:48.021362 CPU_CLUSTER: 0: enabled 1
749 20:43:48.021790 APIC: 00: enabled 1
750 20:43:48.024760 APIC: 01: enabled 1
751 20:43:48.028115 APIC: 06: enabled 1
752 20:43:48.028560 APIC: 07: enabled 1
753 20:43:48.031201 APIC: 03: enabled 1
754 20:43:48.035179 APIC: 02: enabled 1
755 20:43:48.039028 APIC: 05: enabled 1
756 20:43:48.039459 APIC: 04: enabled 1
757 20:43:48.041114 DOMAIN: 0000: enabled 1
758 20:43:48.044605 PCI: 00:00.0: enabled 1
759 20:43:48.048114 PCI: 00:02.0: enabled 1
760 20:43:48.048451 PCI: 00:04.0: enabled 0
761 20:43:48.051029 PCI: 00:05.0: enabled 0
762 20:43:48.054370 PCI: 00:12.0: enabled 1
763 20:43:48.057584 PCI: 00:12.5: enabled 0
764 20:43:48.057830 PCI: 00:12.6: enabled 0
765 20:43:48.061558 PCI: 00:14.0: enabled 1
766 20:43:48.064296 USB0 port 0: enabled 1
767 20:43:48.068015 USB2 port 0: enabled 1
768 20:43:48.070716 USB2 port 1: enabled 1
769 20:43:48.074728 USB2 port 2: enabled 0
770 20:43:48.075061 USB2 port 3: enabled 0
771 20:43:48.077407 USB2 port 5: enabled 0
772 20:43:48.080694 USB2 port 6: enabled 1
773 20:43:48.084316 USB2 port 9: enabled 1
774 20:43:48.087368 USB3 port 0: enabled 1
775 20:43:48.087663 USB3 port 1: enabled 1
776 20:43:48.090853 USB3 port 2: enabled 1
777 20:43:48.094088 USB3 port 3: enabled 1
778 20:43:48.097252 USB3 port 4: enabled 0
779 20:43:48.101244 PCI: 00:14.1: enabled 0
780 20:43:48.104048 PCI: 00:14.3: enabled 1
781 20:43:48.104316 PCI: 00:14.5: enabled 0
782 20:43:48.107583 PCI: 00:15.0: enabled 1
783 20:43:48.110932 I2C: 00:15: enabled 1
784 20:43:48.114318 PCI: 00:15.1: enabled 1
785 20:43:48.114564 I2C: 00:5d: enabled 1
786 20:43:48.117021 GENERIC: 0.0: enabled 1
787 20:43:48.120646 PCI: 00:15.2: enabled 0
788 20:43:48.124199 PCI: 00:15.3: enabled 0
789 20:43:48.127299 PCI: 00:16.0: enabled 1
790 20:43:48.127540 PCI: 00:16.1: enabled 0
791 20:43:48.130883 PCI: 00:16.2: enabled 0
792 20:43:48.134011 PCI: 00:16.3: enabled 0
793 20:43:48.137653 PCI: 00:16.4: enabled 0
794 20:43:48.141040 PCI: 00:16.5: enabled 0
795 20:43:48.141313 PCI: 00:17.0: enabled 1
796 20:43:48.144358 PCI: 00:19.0: enabled 1
797 20:43:48.147006 I2C: 00:1a: enabled 1
798 20:43:48.150766 I2C: 00:38: enabled 1
799 20:43:48.151008 I2C: 00:39: enabled 1
800 20:43:48.153905 I2C: 00:3a: enabled 1
801 20:43:48.157222 I2C: 00:3b: enabled 1
802 20:43:48.160462 PCI: 00:19.1: enabled 0
803 20:43:48.163977 PCI: 00:19.2: enabled 0
804 20:43:48.164255 PCI: 00:1a.0: enabled 0
805 20:43:48.167068 PCI: 00:1c.0: enabled 0
806 20:43:48.170409 PCI: 00:1c.1: enabled 0
807 20:43:48.173718 PCI: 00:1c.2: enabled 0
808 20:43:48.177557 PCI: 00:1c.3: enabled 0
809 20:43:48.177921 PCI: 00:1c.4: enabled 0
810 20:43:48.180487 PCI: 00:1c.5: enabled 0
811 20:43:48.183571 PCI: 00:1c.6: enabled 0
812 20:43:48.186739 PCI: 00:1c.7: enabled 0
813 20:43:48.187080 PCI: 00:1d.0: enabled 1
814 20:43:48.190472 PCI: 00:1d.1: enabled 0
815 20:43:48.193472 PCI: 00:1d.2: enabled 0
816 20:43:48.197078 PCI: 00:1d.3: enabled 0
817 20:43:48.200917 PCI: 00:1d.4: enabled 0
818 20:43:48.201164 PCI: 00:1d.5: enabled 1
819 20:43:48.203555 PCI: 00:00.0: enabled 1
820 20:43:48.207265 PCI: 00:1e.0: enabled 1
821 20:43:48.210886 PCI: 00:1e.1: enabled 0
822 20:43:48.214047 PCI: 00:1e.2: enabled 1
823 20:43:48.214332 SPI: 00: enabled 1
824 20:43:48.216987 PCI: 00:1e.3: enabled 1
825 20:43:48.220129 SPI: 01: enabled 1
826 20:43:48.223632 PCI: 00:1f.0: enabled 1
827 20:43:48.223878 PNP: 0c09.0: enabled 1
828 20:43:48.227222 PCI: 00:1f.1: enabled 1
829 20:43:48.230376 PCI: 00:1f.2: enabled 1
830 20:43:48.233287 PCI: 00:1f.3: enabled 1
831 20:43:48.236673 PCI: 00:1f.4: enabled 1
832 20:43:48.236914 PCI: 00:1f.5: enabled 1
833 20:43:48.240237 PCI: 00:1f.6: enabled 0
834 20:43:48.243004 Root Device scanning...
835 20:43:48.246838 scan_static_bus for Root Device
836 20:43:48.250138 CPU_CLUSTER: 0 enabled
837 20:43:48.250382 DOMAIN: 0000 enabled
838 20:43:48.253444 DOMAIN: 0000 scanning...
839 20:43:48.256495 PCI: pci_scan_bus for bus 00
840 20:43:48.259798 PCI: 00:00.0 [8086/0000] ops
841 20:43:48.263495 PCI: 00:00.0 [8086/9b61] enabled
842 20:43:48.266852 PCI: 00:02.0 [8086/0000] bus ops
843 20:43:48.269881 PCI: 00:02.0 [8086/9b41] enabled
844 20:43:48.273486 PCI: 00:04.0 [8086/1903] disabled
845 20:43:48.276576 PCI: 00:08.0 [8086/1911] enabled
846 20:43:48.279766 PCI: 00:12.0 [8086/02f9] enabled
847 20:43:48.283169 PCI: 00:14.0 [8086/0000] bus ops
848 20:43:48.286531 PCI: 00:14.0 [8086/02ed] enabled
849 20:43:48.289762 PCI: 00:14.2 [8086/02ef] enabled
850 20:43:48.293175 PCI: 00:14.3 [8086/02f0] enabled
851 20:43:48.296431 PCI: 00:15.0 [8086/0000] bus ops
852 20:43:48.299867 PCI: 00:15.0 [8086/02e8] enabled
853 20:43:48.302802 PCI: 00:15.1 [8086/0000] bus ops
854 20:43:48.306307 PCI: 00:15.1 [8086/02e9] enabled
855 20:43:48.309372 PCI: 00:16.0 [8086/0000] ops
856 20:43:48.313188 PCI: 00:16.0 [8086/02e0] enabled
857 20:43:48.316210 PCI: 00:17.0 [8086/0000] ops
858 20:43:48.319717 PCI: 00:17.0 [8086/02d3] enabled
859 20:43:48.323306 PCI: 00:19.0 [8086/0000] bus ops
860 20:43:48.326217 PCI: 00:19.0 [8086/02c5] enabled
861 20:43:48.329775 PCI: 00:1d.0 [8086/0000] bus ops
862 20:43:48.333395 PCI: 00:1d.0 [8086/02b0] enabled
863 20:43:48.339805 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 20:43:48.340072 PCI: 00:1e.0 [8086/0000] ops
865 20:43:48.343134 PCI: 00:1e.0 [8086/02a8] enabled
866 20:43:48.346054 PCI: 00:1e.2 [8086/0000] bus ops
867 20:43:48.349588 PCI: 00:1e.2 [8086/02aa] enabled
868 20:43:48.352679 PCI: 00:1e.3 [8086/0000] bus ops
869 20:43:48.356031 PCI: 00:1e.3 [8086/02ab] enabled
870 20:43:48.359386 PCI: 00:1f.0 [8086/0000] bus ops
871 20:43:48.362780 PCI: 00:1f.0 [8086/0284] enabled
872 20:43:48.369393 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 20:43:48.376020 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 20:43:48.379114 PCI: 00:1f.3 [8086/0000] bus ops
875 20:43:48.382711 PCI: 00:1f.3 [8086/02c8] enabled
876 20:43:48.386612 PCI: 00:1f.4 [8086/0000] bus ops
877 20:43:48.389492 PCI: 00:1f.4 [8086/02a3] enabled
878 20:43:48.392544 PCI: 00:1f.5 [8086/0000] bus ops
879 20:43:48.395785 PCI: 00:1f.5 [8086/02a4] enabled
880 20:43:48.399154 PCI: Leftover static devices:
881 20:43:48.399278 PCI: 00:05.0
882 20:43:48.399387 PCI: 00:12.5
883 20:43:48.402460 PCI: 00:12.6
884 20:43:48.402565 PCI: 00:14.1
885 20:43:48.405565 PCI: 00:14.5
886 20:43:48.405701 PCI: 00:15.2
887 20:43:48.409144 PCI: 00:15.3
888 20:43:48.409267 PCI: 00:16.1
889 20:43:48.409378 PCI: 00:16.2
890 20:43:48.412801 PCI: 00:16.3
891 20:43:48.412911 PCI: 00:16.4
892 20:43:48.415948 PCI: 00:16.5
893 20:43:48.416067 PCI: 00:19.1
894 20:43:48.416158 PCI: 00:19.2
895 20:43:48.419216 PCI: 00:1a.0
896 20:43:48.419409 PCI: 00:1c.0
897 20:43:48.422393 PCI: 00:1c.1
898 20:43:48.422554 PCI: 00:1c.2
899 20:43:48.422696 PCI: 00:1c.3
900 20:43:48.425830 PCI: 00:1c.4
901 20:43:48.425939 PCI: 00:1c.5
902 20:43:48.429800 PCI: 00:1c.6
903 20:43:48.429923 PCI: 00:1c.7
904 20:43:48.432413 PCI: 00:1d.1
905 20:43:48.432569 PCI: 00:1d.2
906 20:43:48.432683 PCI: 00:1d.3
907 20:43:48.435659 PCI: 00:1d.4
908 20:43:48.435803 PCI: 00:1d.5
909 20:43:48.438996 PCI: 00:1e.1
910 20:43:48.439131 PCI: 00:1f.1
911 20:43:48.439239 PCI: 00:1f.2
912 20:43:48.442267 PCI: 00:1f.6
913 20:43:48.445993 PCI: Check your devicetree.cb.
914 20:43:48.448989 PCI: 00:02.0 scanning...
915 20:43:48.452390 scan_generic_bus for PCI: 00:02.0
916 20:43:48.455399 scan_generic_bus for PCI: 00:02.0 done
917 20:43:48.462391 scan_bus: scanning of bus PCI: 00:02.0 took 10195 usecs
918 20:43:48.462826 PCI: 00:14.0 scanning...
919 20:43:48.465998 scan_static_bus for PCI: 00:14.0
920 20:43:48.469084 USB0 port 0 enabled
921 20:43:48.472383 USB0 port 0 scanning...
922 20:43:48.476145 scan_static_bus for USB0 port 0
923 20:43:48.476598 USB2 port 0 enabled
924 20:43:48.479097 USB2 port 1 enabled
925 20:43:48.482283 USB2 port 2 disabled
926 20:43:48.482876 USB2 port 3 disabled
927 20:43:48.485671 USB2 port 5 disabled
928 20:43:48.489105 USB2 port 6 enabled
929 20:43:48.489420 USB2 port 9 enabled
930 20:43:48.492394 USB3 port 0 enabled
931 20:43:48.492713 USB3 port 1 enabled
932 20:43:48.495829 USB3 port 2 enabled
933 20:43:48.499115 USB3 port 3 enabled
934 20:43:48.499409 USB3 port 4 disabled
935 20:43:48.502478 USB2 port 0 scanning...
936 20:43:48.505853 scan_static_bus for USB2 port 0
937 20:43:48.509254 scan_static_bus for USB2 port 0 done
938 20:43:48.515195 scan_bus: scanning of bus USB2 port 0 took 9698 usecs
939 20:43:48.519041 USB2 port 1 scanning...
940 20:43:48.522150 scan_static_bus for USB2 port 1
941 20:43:48.525199 scan_static_bus for USB2 port 1 done
942 20:43:48.528981 scan_bus: scanning of bus USB2 port 1 took 9699 usecs
943 20:43:48.532014 USB2 port 6 scanning...
944 20:43:48.535736 scan_static_bus for USB2 port 6
945 20:43:48.538971 scan_static_bus for USB2 port 6 done
946 20:43:48.545769 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
947 20:43:48.549295 USB2 port 9 scanning...
948 20:43:48.552474 scan_static_bus for USB2 port 9
949 20:43:48.555818 scan_static_bus for USB2 port 9 done
950 20:43:48.558986 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
951 20:43:48.562896 USB3 port 0 scanning...
952 20:43:48.565668 scan_static_bus for USB3 port 0
953 20:43:48.569011 scan_static_bus for USB3 port 0 done
954 20:43:48.575171 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
955 20:43:48.578574 USB3 port 1 scanning...
956 20:43:48.582040 scan_static_bus for USB3 port 1
957 20:43:48.585089 scan_static_bus for USB3 port 1 done
958 20:43:48.588959 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
959 20:43:48.591775 USB3 port 2 scanning...
960 20:43:48.594961 scan_static_bus for USB3 port 2
961 20:43:48.599303 scan_static_bus for USB3 port 2 done
962 20:43:48.605133 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
963 20:43:48.608559 USB3 port 3 scanning...
964 20:43:48.612028 scan_static_bus for USB3 port 3
965 20:43:48.614942 scan_static_bus for USB3 port 3 done
966 20:43:48.618749 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
967 20:43:48.624943 scan_static_bus for USB0 port 0 done
968 20:43:48.628116 scan_bus: scanning of bus USB0 port 0 took 155368 usecs
969 20:43:48.631460 scan_static_bus for PCI: 00:14.0 done
970 20:43:48.638522 scan_bus: scanning of bus PCI: 00:14.0 took 172990 usecs
971 20:43:48.641637 PCI: 00:15.0 scanning...
972 20:43:48.644877 scan_generic_bus for PCI: 00:15.0
973 20:43:48.648494 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 20:43:48.651351 scan_generic_bus for PCI: 00:15.0 done
975 20:43:48.658043 scan_bus: scanning of bus PCI: 00:15.0 took 14298 usecs
976 20:43:48.661208 PCI: 00:15.1 scanning...
977 20:43:48.664717 scan_generic_bus for PCI: 00:15.1
978 20:43:48.668020 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 20:43:48.671519 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 20:43:48.677852 scan_generic_bus for PCI: 00:15.1 done
981 20:43:48.680981 scan_bus: scanning of bus PCI: 00:15.1 took 18599 usecs
982 20:43:48.684801 PCI: 00:19.0 scanning...
983 20:43:48.688133 scan_generic_bus for PCI: 00:19.0
984 20:43:48.691132 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 20:43:48.697622 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 20:43:48.700964 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 20:43:48.704401 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 20:43:48.707866 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 20:43:48.714796 scan_generic_bus for PCI: 00:19.0 done
990 20:43:48.717800 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
991 20:43:48.721100 PCI: 00:1d.0 scanning...
992 20:43:48.724552 do_pci_scan_bridge for PCI: 00:1d.0
993 20:43:48.727698 PCI: pci_scan_bus for bus 01
994 20:43:48.730772 PCI: 01:00.0 [1c5c/1327] enabled
995 20:43:48.734174 Enabling Common Clock Configuration
996 20:43:48.737832 L1 Sub-State supported from root port 29
997 20:43:48.741281 L1 Sub-State Support = 0xf
998 20:43:48.744511 CommonModeRestoreTime = 0x28
999 20:43:48.747777 Power On Value = 0x16, Power On Scale = 0x0
1000 20:43:48.750983 ASPM: Enabled L1
1001 20:43:48.757621 scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
1002 20:43:48.758055 PCI: 00:1e.2 scanning...
1003 20:43:48.764269 scan_generic_bus for PCI: 00:1e.2
1004 20:43:48.767590 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 20:43:48.770684 scan_generic_bus for PCI: 00:1e.2 done
1006 20:43:48.777402 scan_bus: scanning of bus PCI: 00:1e.2 took 14012 usecs
1007 20:43:48.777678 PCI: 00:1e.3 scanning...
1008 20:43:48.780909 scan_generic_bus for PCI: 00:1e.3
1009 20:43:48.787328 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 20:43:48.790721 scan_generic_bus for PCI: 00:1e.3 done
1011 20:43:48.794285 scan_bus: scanning of bus PCI: 00:1e.3 took 13994 usecs
1012 20:43:48.797174 PCI: 00:1f.0 scanning...
1013 20:43:48.800690 scan_static_bus for PCI: 00:1f.0
1014 20:43:48.803794 PNP: 0c09.0 enabled
1015 20:43:48.809472 scan_static_bus for PCI: 00:1f.0 done
1016 20:43:48.814141 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1017 20:43:48.814330 PCI: 00:1f.3 scanning...
1018 20:43:48.820634 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1019 20:43:48.824298 PCI: 00:1f.4 scanning...
1020 20:43:48.827803 scan_generic_bus for PCI: 00:1f.4
1021 20:43:48.830952 scan_generic_bus for PCI: 00:1f.4 done
1022 20:43:48.837557 scan_bus: scanning of bus PCI: 00:1f.4 took 10175 usecs
1023 20:43:48.840346 PCI: 00:1f.5 scanning...
1024 20:43:48.844074 scan_generic_bus for PCI: 00:1f.5
1025 20:43:48.847677 scan_generic_bus for PCI: 00:1f.5 done
1026 20:43:48.853562 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1027 20:43:48.857088 scan_bus: scanning of bus DOMAIN: 0000 took 604986 usecs
1028 20:43:48.860417 scan_static_bus for Root Device done
1029 20:43:48.866683 scan_bus: scanning of bus Root Device took 624858 usecs
1030 20:43:48.866778 done
1031 20:43:48.870554 Chrome EC: UHEPI supported
1032 20:43:48.876932 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 20:43:48.883708 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 20:43:48.890212 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 20:43:48.896729 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 20:43:48.900111 SPI flash protection: WPSW=0 SRP0=0
1037 20:43:48.903336 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 20:43:48.909991 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1039 20:43:48.913323 found VGA at PCI: 00:02.0
1040 20:43:48.916889 Setting up VGA for PCI: 00:02.0
1041 20:43:48.920035 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 20:43:48.926855 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 20:43:48.929728 Allocating resources...
1044 20:43:48.929809 Reading resources...
1045 20:43:48.936082 Root Device read_resources bus 0 link: 0
1046 20:43:48.939947 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 20:43:48.946346 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 20:43:48.949523 DOMAIN: 0000 read_resources bus 0 link: 0
1049 20:43:48.956656 PCI: 00:14.0 read_resources bus 0 link: 0
1050 20:43:48.959842 USB0 port 0 read_resources bus 0 link: 0
1051 20:43:48.967824 USB0 port 0 read_resources bus 0 link: 0 done
1052 20:43:48.971213 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 20:43:48.978310 PCI: 00:15.0 read_resources bus 1 link: 0
1054 20:43:48.981385 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 20:43:48.988102 PCI: 00:15.1 read_resources bus 2 link: 0
1056 20:43:48.991347 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 20:43:48.998910 PCI: 00:19.0 read_resources bus 3 link: 0
1058 20:43:49.005583 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 20:43:49.008678 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 20:43:49.015582 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 20:43:49.018914 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 20:43:49.025272 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 20:43:49.028956 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 20:43:49.035477 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 20:43:49.038712 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 20:43:49.045490 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 20:43:49.052072 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 20:43:49.055413 Root Device read_resources bus 0 link: 0 done
1069 20:43:49.058359 Done reading resources.
1070 20:43:49.062071 Show resources in subtree (Root Device)...After reading.
1071 20:43:49.068470 Root Device child on link 0 CPU_CLUSTER: 0
1072 20:43:49.071911 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 20:43:49.072020 APIC: 00
1074 20:43:49.075606 APIC: 01
1075 20:43:49.075687 APIC: 06
1076 20:43:49.078471 APIC: 07
1077 20:43:49.078557 APIC: 03
1078 20:43:49.078624 APIC: 02
1079 20:43:49.081847 APIC: 05
1080 20:43:49.081932 APIC: 04
1081 20:43:49.085251 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 20:43:49.141649 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 20:43:49.142086 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 20:43:49.142256 PCI: 00:00.0
1085 20:43:49.142621 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 20:43:49.143049 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 20:43:49.143260 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 20:43:49.184684 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 20:43:49.185271 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 20:43:49.185581 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 20:43:49.185703 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 20:43:49.186176 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 20:43:49.192506 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 20:43:49.199723 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 20:43:49.209955 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 20:43:49.219576 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 20:43:49.229670 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 20:43:49.240045 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 20:43:49.249770 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 20:43:49.255762 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 20:43:49.259228 PCI: 00:02.0
1102 20:43:49.269362 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 20:43:49.279178 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 20:43:49.289451 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 20:43:49.289892 PCI: 00:04.0
1106 20:43:49.292268 PCI: 00:08.0
1107 20:43:49.301981 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 20:43:49.302280 PCI: 00:12.0
1109 20:43:49.312093 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 20:43:49.315489 PCI: 00:14.0 child on link 0 USB0 port 0
1111 20:43:49.325264 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 20:43:49.332137 USB0 port 0 child on link 0 USB2 port 0
1113 20:43:49.332554 USB2 port 0
1114 20:43:49.335206 USB2 port 1
1115 20:43:49.335655 USB2 port 2
1116 20:43:49.338752 USB2 port 3
1117 20:43:49.339161 USB2 port 5
1118 20:43:49.342203 USB2 port 6
1119 20:43:49.342599 USB2 port 9
1120 20:43:49.345521 USB3 port 0
1121 20:43:49.348829 USB3 port 1
1122 20:43:49.349273 USB3 port 2
1123 20:43:49.352039 USB3 port 3
1124 20:43:49.352549 USB3 port 4
1125 20:43:49.355783 PCI: 00:14.2
1126 20:43:49.365110 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 20:43:49.375096 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 20:43:49.375267 PCI: 00:14.3
1129 20:43:49.385097 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 20:43:49.388091 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 20:43:49.398165 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 20:43:49.401737 I2C: 01:15
1133 20:43:49.404906 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 20:43:49.414788 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 20:43:49.418187 I2C: 02:5d
1136 20:43:49.418367 GENERIC: 0.0
1137 20:43:49.421721 PCI: 00:16.0
1138 20:43:49.431646 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 20:43:49.431842 PCI: 00:17.0
1140 20:43:49.441011 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 20:43:49.451197 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 20:43:49.457894 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 20:43:49.467801 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 20:43:49.474634 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 20:43:49.484183 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 20:43:49.488015 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 20:43:49.497936 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 20:43:49.500927 I2C: 03:1a
1149 20:43:49.501362 I2C: 03:38
1150 20:43:49.504787 I2C: 03:39
1151 20:43:49.505385 I2C: 03:3a
1152 20:43:49.505864 I2C: 03:3b
1153 20:43:49.511149 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 20:43:49.517852 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 20:43:49.527480 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 20:43:49.537546 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 20:43:49.540600 PCI: 01:00.0
1158 20:43:49.550904 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 20:43:49.551045 PCI: 00:1e.0
1160 20:43:49.563738 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 20:43:49.570243 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 20:43:49.576951 PCI: 00:1e.2 child on link 0 SPI: 00
1163 20:43:49.587252 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 20:43:49.587691 SPI: 00
1165 20:43:49.590688 PCI: 00:1e.3 child on link 0 SPI: 01
1166 20:43:49.600839 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 20:43:49.604014 SPI: 01
1168 20:43:49.607308 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 20:43:49.617204 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 20:43:49.623611 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 20:43:49.627001 PNP: 0c09.0
1172 20:43:49.633664 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 20:43:49.636922 PCI: 00:1f.3
1174 20:43:49.646838 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 20:43:49.656705 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 20:43:49.656945 PCI: 00:1f.4
1177 20:43:49.667021 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 20:43:49.676666 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 20:43:49.679621 PCI: 00:1f.5
1180 20:43:49.686924 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 20:43:49.693440 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 20:43:49.700129 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 20:43:49.706305 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 20:43:49.709502 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 20:43:49.713459 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 20:43:49.716294 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 20:43:49.722975 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 20:43:49.729969 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 20:43:49.737006 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 20:43:49.743306 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 20:43:49.752880 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 20:43:49.759605 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 20:43:49.762939 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 20:43:49.769429 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 20:43:49.775975 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 20:43:49.780130 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 20:43:49.786411 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 20:43:49.789488 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 20:43:49.792650 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 20:43:49.799951 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 20:43:49.802658 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 20:43:49.809789 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 20:43:49.812989 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 20:43:49.819595 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 20:43:49.822846 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 20:43:49.829363 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 20:43:49.832724 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 20:43:49.839402 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 20:43:49.843389 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 20:43:49.849349 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 20:43:49.852856 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 20:43:49.855750 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 20:43:49.862879 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 20:43:49.865896 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 20:43:49.872521 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 20:43:49.876522 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 20:43:49.882275 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 20:43:49.889142 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 20:43:49.892336 avoid_fixed_resources: DOMAIN: 0000
1220 20:43:49.898919 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 20:43:49.905658 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 20:43:49.912211 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 20:43:49.922590 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 20:43:49.928974 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 20:43:49.936582 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 20:43:49.945599 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 20:43:49.952026 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 20:43:49.958745 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 20:43:49.965390 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 20:43:49.975224 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 20:43:49.981728 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 20:43:49.981920 Setting resources...
1233 20:43:49.989242 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 20:43:49.995761 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 20:43:49.998801 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 20:43:50.002296 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 20:43:50.005626 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 20:43:50.012411 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 20:43:50.019043 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 20:43:50.026172 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 20:43:50.032207 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 20:43:50.038714 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 20:43:50.041972 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 20:43:50.048988 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 20:43:50.051810 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 20:43:50.058231 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 20:43:50.061824 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 20:43:50.068847 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 20:43:50.071592 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 20:43:50.075028 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 20:43:50.081613 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 20:43:50.085138 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 20:43:50.091504 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 20:43:50.095130 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 20:43:50.101794 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 20:43:50.104804 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 20:43:50.111552 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 20:43:50.115013 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 20:43:50.121827 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 20:43:50.125165 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 20:43:50.128192 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 20:43:50.134806 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 20:43:50.138169 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 20:43:50.144809 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 20:43:50.151688 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 20:43:50.158082 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 20:43:50.168024 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 20:43:50.174263 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 20:43:50.177805 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 20:43:50.187497 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 20:43:50.191568 Root Device assign_resources, bus 0 link: 0
1272 20:43:50.194560 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 20:43:50.204597 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 20:43:50.210814 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 20:43:50.220682 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 20:43:50.227265 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 20:43:50.237292 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 20:43:50.243864 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 20:43:50.251075 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 20:43:50.253866 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 20:43:50.263816 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 20:43:50.270455 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 20:43:50.276965 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 20:43:50.286855 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 20:43:50.290234 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 20:43:50.297189 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 20:43:50.303449 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 20:43:50.310200 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 20:43:50.313431 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 20:43:50.323147 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 20:43:50.329720 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 20:43:50.336380 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 20:43:50.346266 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 20:43:50.352982 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 20:43:50.359605 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 20:43:50.369456 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 20:43:50.376026 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 20:43:50.382835 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 20:43:50.386281 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 20:43:50.396095 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 20:43:50.402527 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 20:43:50.412403 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 20:43:50.415726 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 20:43:50.425777 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 20:43:50.429031 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 20:43:50.438682 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 20:43:50.445434 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 20:43:50.452111 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 20:43:50.455082 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 20:43:50.465235 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 20:43:50.468673 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 20:43:50.471998 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 20:43:50.478855 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 20:43:50.481464 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 20:43:50.488200 LPC: Trying to open IO window from 800 size 1ff
1316 20:43:50.495029 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 20:43:50.504664 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 20:43:50.511556 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 20:43:50.521480 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 20:43:50.524893 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 20:43:50.527807 Root Device assign_resources, bus 0 link: 0
1322 20:43:50.531947 Done setting resources.
1323 20:43:50.538856 Show resources in subtree (Root Device)...After assigning values.
1324 20:43:50.544685 Root Device child on link 0 CPU_CLUSTER: 0
1325 20:43:50.547716 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 20:43:50.547797 APIC: 00
1327 20:43:50.551367 APIC: 01
1328 20:43:50.551448 APIC: 06
1329 20:43:50.551510 APIC: 07
1330 20:43:50.554711 APIC: 03
1331 20:43:50.554791 APIC: 02
1332 20:43:50.554854 APIC: 05
1333 20:43:50.558329 APIC: 04
1334 20:43:50.561128 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 20:43:50.571038 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 20:43:50.581290 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 20:43:50.584424 PCI: 00:00.0
1338 20:43:50.594011 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 20:43:50.604085 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 20:43:50.614166 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 20:43:50.620756 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 20:43:50.630628 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 20:43:50.640493 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 20:43:50.650288 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 20:43:50.659983 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 20:43:50.666875 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 20:43:50.676695 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 20:43:50.687026 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 20:43:50.696650 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 20:43:50.706737 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 20:43:50.716795 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 20:43:50.726263 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 20:43:50.732689 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 20:43:50.736103 PCI: 00:02.0
1355 20:43:50.746278 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 20:43:50.756028 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 20:43:50.765658 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 20:43:50.769131 PCI: 00:04.0
1359 20:43:50.769219 PCI: 00:08.0
1360 20:43:50.779137 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 20:43:50.782956 PCI: 00:12.0
1362 20:43:50.792583 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 20:43:50.795890 PCI: 00:14.0 child on link 0 USB0 port 0
1364 20:43:50.805581 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 20:43:50.812635 USB0 port 0 child on link 0 USB2 port 0
1366 20:43:50.812717 USB2 port 0
1367 20:43:50.815546 USB2 port 1
1368 20:43:50.815626 USB2 port 2
1369 20:43:50.819048 USB2 port 3
1370 20:43:50.819129 USB2 port 5
1371 20:43:50.822138 USB2 port 6
1372 20:43:50.822218 USB2 port 9
1373 20:43:50.825736 USB3 port 0
1374 20:43:50.825817 USB3 port 1
1375 20:43:50.828788 USB3 port 2
1376 20:43:50.828868 USB3 port 3
1377 20:43:50.832662 USB3 port 4
1378 20:43:50.832742 PCI: 00:14.2
1379 20:43:50.845547 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 20:43:50.855154 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 20:43:50.855236 PCI: 00:14.3
1382 20:43:50.865361 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 20:43:50.872007 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 20:43:50.882105 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 20:43:50.882187 I2C: 01:15
1386 20:43:50.885095 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 20:43:50.898860 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 20:43:50.898943 I2C: 02:5d
1389 20:43:50.901459 GENERIC: 0.0
1390 20:43:50.901539 PCI: 00:16.0
1391 20:43:50.911424 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 20:43:50.914771 PCI: 00:17.0
1393 20:43:50.924742 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 20:43:50.934469 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 20:43:50.944612 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 20:43:50.951402 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 20:43:50.960775 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 20:43:50.970693 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 20:43:50.977349 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 20:43:50.987886 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 20:43:50.987966 I2C: 03:1a
1402 20:43:50.991307 I2C: 03:38
1403 20:43:50.991386 I2C: 03:39
1404 20:43:50.993979 I2C: 03:3a
1405 20:43:50.994109 I2C: 03:3b
1406 20:43:50.997277 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 20:43:51.007506 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 20:43:51.016920 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 20:43:51.026844 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 20:43:51.030538 PCI: 01:00.0
1411 20:43:51.040333 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 20:43:51.043455 PCI: 00:1e.0
1413 20:43:51.053953 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 20:43:51.063158 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 20:43:51.066855 PCI: 00:1e.2 child on link 0 SPI: 00
1416 20:43:51.076861 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 20:43:51.079743 SPI: 00
1418 20:43:51.083198 PCI: 00:1e.3 child on link 0 SPI: 01
1419 20:43:51.093054 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 20:43:51.093137 SPI: 01
1421 20:43:51.100460 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 20:43:51.106186 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 20:43:51.116177 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 20:43:51.119635 PNP: 0c09.0
1425 20:43:51.126680 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 20:43:51.129407 PCI: 00:1f.3
1427 20:43:51.139423 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 20:43:51.149077 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 20:43:51.152540 PCI: 00:1f.4
1430 20:43:51.159038 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 20:43:51.168951 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 20:43:51.172006 PCI: 00:1f.5
1433 20:43:51.182409 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 20:43:51.185544 Done allocating resources.
1435 20:43:51.191939 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 20:43:51.192028 Enabling resources...
1437 20:43:51.199227 PCI: 00:00.0 subsystem <- 8086/9b61
1438 20:43:51.199308 PCI: 00:00.0 cmd <- 06
1439 20:43:51.202729 PCI: 00:02.0 subsystem <- 8086/9b41
1440 20:43:51.205475 PCI: 00:02.0 cmd <- 03
1441 20:43:51.208835 PCI: 00:08.0 cmd <- 06
1442 20:43:51.212345 PCI: 00:12.0 subsystem <- 8086/02f9
1443 20:43:51.215563 PCI: 00:12.0 cmd <- 02
1444 20:43:51.218716 PCI: 00:14.0 subsystem <- 8086/02ed
1445 20:43:51.222018 PCI: 00:14.0 cmd <- 02
1446 20:43:51.225601 PCI: 00:14.2 cmd <- 02
1447 20:43:51.228649 PCI: 00:14.3 subsystem <- 8086/02f0
1448 20:43:51.228730 PCI: 00:14.3 cmd <- 02
1449 20:43:51.235518 PCI: 00:15.0 subsystem <- 8086/02e8
1450 20:43:51.235599 PCI: 00:15.0 cmd <- 02
1451 20:43:51.238866 PCI: 00:15.1 subsystem <- 8086/02e9
1452 20:43:51.242508 PCI: 00:15.1 cmd <- 02
1453 20:43:51.245577 PCI: 00:16.0 subsystem <- 8086/02e0
1454 20:43:51.249076 PCI: 00:16.0 cmd <- 02
1455 20:43:51.252615 PCI: 00:17.0 subsystem <- 8086/02d3
1456 20:43:51.256171 PCI: 00:17.0 cmd <- 03
1457 20:43:51.258754 PCI: 00:19.0 subsystem <- 8086/02c5
1458 20:43:51.262157 PCI: 00:19.0 cmd <- 02
1459 20:43:51.265577 PCI: 00:1d.0 bridge ctrl <- 0013
1460 20:43:51.268964 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 20:43:51.272713 PCI: 00:1d.0 cmd <- 06
1462 20:43:51.275481 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 20:43:51.278568 PCI: 00:1e.0 cmd <- 06
1464 20:43:51.282130 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 20:43:51.285538 PCI: 00:1e.2 cmd <- 06
1466 20:43:51.288390 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 20:43:51.288471 PCI: 00:1e.3 cmd <- 02
1468 20:43:51.295753 PCI: 00:1f.0 subsystem <- 8086/0284
1469 20:43:51.295834 PCI: 00:1f.0 cmd <- 407
1470 20:43:51.302494 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 20:43:51.302574 PCI: 00:1f.3 cmd <- 02
1472 20:43:51.305328 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 20:43:51.308983 PCI: 00:1f.4 cmd <- 03
1474 20:43:51.312026 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 20:43:51.315186 PCI: 00:1f.5 cmd <- 406
1476 20:43:51.324281 PCI: 01:00.0 cmd <- 02
1477 20:43:51.329353 done.
1478 20:43:51.343161 ME: Version: 14.0.39.1367
1479 20:43:51.350491 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 13
1480 20:43:51.353087 Initializing devices...
1481 20:43:51.353168 Root Device init ...
1482 20:43:51.359386 Chrome EC: Set SMI mask to 0x0000000000000000
1483 20:43:51.363129 Chrome EC: clear events_b mask to 0x0000000000000000
1484 20:43:51.369745 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 20:43:51.376020 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 20:43:51.382671 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 20:43:51.386315 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 20:43:51.389277 Root Device init finished in 35162 usecs
1489 20:43:51.393124 CPU_CLUSTER: 0 init ...
1490 20:43:51.399453 CPU_CLUSTER: 0 init finished in 2449 usecs
1491 20:43:51.403992 PCI: 00:00.0 init ...
1492 20:43:51.407362 CPU TDP: 15 Watts
1493 20:43:51.410666 CPU PL2 = 64 Watts
1494 20:43:51.413802 PCI: 00:00.0 init finished in 7074 usecs
1495 20:43:51.417108 PCI: 00:02.0 init ...
1496 20:43:51.420335 PCI: 00:02.0 init finished in 2253 usecs
1497 20:43:51.423689 PCI: 00:08.0 init ...
1498 20:43:51.426955 PCI: 00:08.0 init finished in 2253 usecs
1499 20:43:51.430178 PCI: 00:12.0 init ...
1500 20:43:51.433784 PCI: 00:12.0 init finished in 2254 usecs
1501 20:43:51.436605 PCI: 00:14.0 init ...
1502 20:43:51.439866 PCI: 00:14.0 init finished in 2253 usecs
1503 20:43:51.443180 PCI: 00:14.2 init ...
1504 20:43:51.446562 PCI: 00:14.2 init finished in 2253 usecs
1505 20:43:51.450204 PCI: 00:14.3 init ...
1506 20:43:51.453364 PCI: 00:14.3 init finished in 2262 usecs
1507 20:43:51.456413 PCI: 00:15.0 init ...
1508 20:43:51.459893 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 20:43:51.463344 PCI: 00:15.0 init finished in 5980 usecs
1510 20:43:51.466425 PCI: 00:15.1 init ...
1511 20:43:51.470327 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 20:43:51.476360 PCI: 00:15.1 init finished in 5979 usecs
1513 20:43:51.476441 PCI: 00:16.0 init ...
1514 20:43:51.483331 PCI: 00:16.0 init finished in 2254 usecs
1515 20:43:51.486460 PCI: 00:19.0 init ...
1516 20:43:51.489605 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 20:43:51.492976 PCI: 00:19.0 init finished in 5980 usecs
1518 20:43:51.496409 PCI: 00:1d.0 init ...
1519 20:43:51.499900 Initializing PCH PCIe bridge.
1520 20:43:51.502874 PCI: 00:1d.0 init finished in 5289 usecs
1521 20:43:51.506473 PCI: 00:1f.0 init ...
1522 20:43:51.509725 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 20:43:51.516249 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 20:43:51.516331 IOAPIC: ID = 0x02
1525 20:43:51.519447 IOAPIC: Dumping registers
1526 20:43:51.523121 reg 0x0000: 0x02000000
1527 20:43:51.526162 reg 0x0001: 0x00770020
1528 20:43:51.526243 reg 0x0002: 0x00000000
1529 20:43:51.532993 PCI: 00:1f.0 init finished in 23558 usecs
1530 20:43:51.535928 PCI: 00:1f.4 init ...
1531 20:43:51.539098 PCI: 00:1f.4 init finished in 2264 usecs
1532 20:43:51.549940 PCI: 01:00.0 init ...
1533 20:43:51.553093 PCI: 01:00.0 init finished in 2253 usecs
1534 20:43:51.557650 PNP: 0c09.0 init ...
1535 20:43:51.560639 Google Chrome EC uptime: 11.100 seconds
1536 20:43:51.567392 Google Chrome AP resets since EC boot: 0
1537 20:43:51.570637 Google Chrome most recent AP reset causes:
1538 20:43:51.577226 Google Chrome EC reset flags at last EC boot: reset-pin
1539 20:43:51.580529 PNP: 0c09.0 init finished in 20582 usecs
1540 20:43:51.583615 Devices initialized
1541 20:43:51.587311 Show all devs... After init.
1542 20:43:51.587393 Root Device: enabled 1
1543 20:43:51.590616 CPU_CLUSTER: 0: enabled 1
1544 20:43:51.593781 DOMAIN: 0000: enabled 1
1545 20:43:51.593885 APIC: 00: enabled 1
1546 20:43:51.597463 PCI: 00:00.0: enabled 1
1547 20:43:51.600302 PCI: 00:02.0: enabled 1
1548 20:43:51.603918 PCI: 00:04.0: enabled 0
1549 20:43:51.604025 PCI: 00:05.0: enabled 0
1550 20:43:51.606805 PCI: 00:12.0: enabled 1
1551 20:43:51.610448 PCI: 00:12.5: enabled 0
1552 20:43:51.613898 PCI: 00:12.6: enabled 0
1553 20:43:51.614006 PCI: 00:14.0: enabled 1
1554 20:43:51.616610 PCI: 00:14.1: enabled 0
1555 20:43:51.620169 PCI: 00:14.3: enabled 1
1556 20:43:51.620274 PCI: 00:14.5: enabled 0
1557 20:43:51.623923 PCI: 00:15.0: enabled 1
1558 20:43:51.626837 PCI: 00:15.1: enabled 1
1559 20:43:51.630259 PCI: 00:15.2: enabled 0
1560 20:43:51.630343 PCI: 00:15.3: enabled 0
1561 20:43:51.633594 PCI: 00:16.0: enabled 1
1562 20:43:51.637657 PCI: 00:16.1: enabled 0
1563 20:43:51.639887 PCI: 00:16.2: enabled 0
1564 20:43:51.639967 PCI: 00:16.3: enabled 0
1565 20:43:51.643286 PCI: 00:16.4: enabled 0
1566 20:43:51.646346 PCI: 00:16.5: enabled 0
1567 20:43:51.649989 PCI: 00:17.0: enabled 1
1568 20:43:51.650070 PCI: 00:19.0: enabled 1
1569 20:43:51.653282 PCI: 00:19.1: enabled 0
1570 20:43:51.656621 PCI: 00:19.2: enabled 0
1571 20:43:51.659839 PCI: 00:1a.0: enabled 0
1572 20:43:51.659920 PCI: 00:1c.0: enabled 0
1573 20:43:51.663316 PCI: 00:1c.1: enabled 0
1574 20:43:51.666147 PCI: 00:1c.2: enabled 0
1575 20:43:51.669793 PCI: 00:1c.3: enabled 0
1576 20:43:51.669877 PCI: 00:1c.4: enabled 0
1577 20:43:51.672943 PCI: 00:1c.5: enabled 0
1578 20:43:51.676136 PCI: 00:1c.6: enabled 0
1579 20:43:51.676219 PCI: 00:1c.7: enabled 0
1580 20:43:51.679615 PCI: 00:1d.0: enabled 1
1581 20:43:51.682996 PCI: 00:1d.1: enabled 0
1582 20:43:51.686307 PCI: 00:1d.2: enabled 0
1583 20:43:51.686390 PCI: 00:1d.3: enabled 0
1584 20:43:51.689587 PCI: 00:1d.4: enabled 0
1585 20:43:51.693095 PCI: 00:1d.5: enabled 0
1586 20:43:51.695965 PCI: 00:1e.0: enabled 1
1587 20:43:51.696095 PCI: 00:1e.1: enabled 0
1588 20:43:51.699457 PCI: 00:1e.2: enabled 1
1589 20:43:51.702537 PCI: 00:1e.3: enabled 1
1590 20:43:51.705902 PCI: 00:1f.0: enabled 1
1591 20:43:51.705991 PCI: 00:1f.1: enabled 0
1592 20:43:51.709143 PCI: 00:1f.2: enabled 0
1593 20:43:51.712405 PCI: 00:1f.3: enabled 1
1594 20:43:51.716317 PCI: 00:1f.4: enabled 1
1595 20:43:51.716400 PCI: 00:1f.5: enabled 1
1596 20:43:51.718975 PCI: 00:1f.6: enabled 0
1597 20:43:51.722444 USB0 port 0: enabled 1
1598 20:43:51.722527 I2C: 01:15: enabled 1
1599 20:43:51.725771 I2C: 02:5d: enabled 1
1600 20:43:51.729218 GENERIC: 0.0: enabled 1
1601 20:43:51.729301 I2C: 03:1a: enabled 1
1602 20:43:51.732719 I2C: 03:38: enabled 1
1603 20:43:51.735662 I2C: 03:39: enabled 1
1604 20:43:51.738880 I2C: 03:3a: enabled 1
1605 20:43:51.738964 I2C: 03:3b: enabled 1
1606 20:43:51.742144 PCI: 00:00.0: enabled 1
1607 20:43:51.745455 SPI: 00: enabled 1
1608 20:43:51.745535 SPI: 01: enabled 1
1609 20:43:51.748866 PNP: 0c09.0: enabled 1
1610 20:43:51.752641 USB2 port 0: enabled 1
1611 20:43:51.752722 USB2 port 1: enabled 1
1612 20:43:51.755774 USB2 port 2: enabled 0
1613 20:43:51.759161 USB2 port 3: enabled 0
1614 20:43:51.759242 USB2 port 5: enabled 0
1615 20:43:51.762350 USB2 port 6: enabled 1
1616 20:43:51.765468 USB2 port 9: enabled 1
1617 20:43:51.765549 USB3 port 0: enabled 1
1618 20:43:51.768794 USB3 port 1: enabled 1
1619 20:43:51.772182 USB3 port 2: enabled 1
1620 20:43:51.775441 USB3 port 3: enabled 1
1621 20:43:51.775555 USB3 port 4: enabled 0
1622 20:43:51.778711 APIC: 01: enabled 1
1623 20:43:51.782439 APIC: 06: enabled 1
1624 20:43:51.782522 APIC: 07: enabled 1
1625 20:43:51.785438 APIC: 03: enabled 1
1626 20:43:51.785543 APIC: 02: enabled 1
1627 20:43:51.788539 APIC: 05: enabled 1
1628 20:43:51.792072 APIC: 04: enabled 1
1629 20:43:51.792168 PCI: 00:08.0: enabled 1
1630 20:43:51.795308 PCI: 00:14.2: enabled 1
1631 20:43:51.798686 PCI: 01:00.0: enabled 1
1632 20:43:51.801784 Disabling ACPI via APMC:
1633 20:43:51.805091 done.
1634 20:43:51.808351 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 20:43:51.812066 ELOG: NV offset 0xaf0000 size 0x4000
1636 20:43:51.819918 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 20:43:51.825688 ELOG: Event(17) added with size 13 at 2023-12-07 20:43:51 UTC
1638 20:43:51.832400 ELOG: Event(92) added with size 9 at 2023-12-07 20:43:51 UTC
1639 20:43:51.839336 ELOG: Event(93) added with size 9 at 2023-12-07 20:43:51 UTC
1640 20:43:51.845749 ELOG: Event(9A) added with size 9 at 2023-12-07 20:43:51 UTC
1641 20:43:51.852530 ELOG: Event(9E) added with size 10 at 2023-12-07 20:43:51 UTC
1642 20:43:51.858618 ELOG: Event(9F) added with size 14 at 2023-12-07 20:43:51 UTC
1643 20:43:51.862260 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 20:43:51.870151 ELOG: Event(A1) added with size 10 at 2023-12-07 20:43:51 UTC
1645 20:43:51.879447 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 20:43:51.886165 ELOG: Event(A0) added with size 9 at 2023-12-07 20:43:51 UTC
1647 20:43:51.889365 elog_add_boot_reason: Logged dev mode boot
1648 20:43:51.892772 Finalize devices...
1649 20:43:51.892856 PCI: 00:17.0 final
1650 20:43:51.896109 Devices finalized
1651 20:43:51.899567 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 20:43:51.906347 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 20:43:51.909831 ME: HFSTS1 : 0x90000245
1654 20:43:51.912497 ME: HFSTS2 : 0x3B850126
1655 20:43:51.919291 ME: HFSTS3 : 0x00000020
1656 20:43:51.923080 ME: HFSTS4 : 0x00004800
1657 20:43:51.925764 ME: HFSTS5 : 0x00000000
1658 20:43:51.929004 ME: HFSTS6 : 0x40400006
1659 20:43:51.932269 ME: Manufacturing Mode : NO
1660 20:43:51.936230 ME: FW Partition Table : OK
1661 20:43:51.939267 ME: Bringup Loader Failure : NO
1662 20:43:51.942309 ME: Firmware Init Complete : YES
1663 20:43:51.945713 ME: Boot Options Present : NO
1664 20:43:51.949154 ME: Update In Progress : NO
1665 20:43:51.952229 ME: D0i3 Support : YES
1666 20:43:51.955304 ME: Low Power State Enabled : NO
1667 20:43:51.958926 ME: CPU Replaced : NO
1668 20:43:51.962119 ME: CPU Replacement Valid : YES
1669 20:43:51.965342 ME: Current Working State : 5
1670 20:43:51.969181 ME: Current Operation State : 1
1671 20:43:51.972027 ME: Current Operation Mode : 0
1672 20:43:51.975643 ME: Error Code : 0
1673 20:43:51.979309 ME: CPU Debug Disabled : YES
1674 20:43:51.981859 ME: TXT Support : NO
1675 20:43:51.988657 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 20:43:51.995692 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 20:43:51.995779 CBFS @ c08000 size 3f8000
1678 20:43:52.001624 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 20:43:52.004857 CBFS: Locating 'fallback/dsdt.aml'
1680 20:43:52.008399 CBFS: Found @ offset 10bb80 size 3fa5
1681 20:43:52.015324 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 20:43:52.017999 CBFS @ c08000 size 3f8000
1683 20:43:52.024803 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 20:43:52.024885 CBFS: Locating 'fallback/slic'
1685 20:43:52.033783 CBFS: 'fallback/slic' not found.
1686 20:43:52.036695 ACPI: Writing ACPI tables at 99b3e000.
1687 20:43:52.036777 ACPI: * FACS
1688 20:43:52.040466 ACPI: * DSDT
1689 20:43:52.043421 Ramoops buffer: 0x100000@0x99a3d000.
1690 20:43:52.046625 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 20:43:52.053637 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 20:43:52.056668 Google Chrome EC: version:
1693 20:43:52.059884 ro: helios_v2.0.2659-56403530b
1694 20:43:52.063660 rw: helios_v2.0.2849-c41de27e7d
1695 20:43:52.063741 running image: 1
1696 20:43:52.067994 ACPI: * FADT
1697 20:43:52.068109 SCI is IRQ9
1698 20:43:52.074175 ACPI: added table 1/32, length now 40
1699 20:43:52.074255 ACPI: * SSDT
1700 20:43:52.077640 Found 1 CPU(s) with 8 core(s) each.
1701 20:43:52.080710 Error: Could not locate 'wifi_sar' in VPD.
1702 20:43:52.087153 Checking CBFS for default SAR values
1703 20:43:52.090825 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 20:43:52.093866 CBFS @ c08000 size 3f8000
1705 20:43:52.100625 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 20:43:52.103797 CBFS: Locating 'wifi_sar_defaults.hex'
1707 20:43:52.107114 CBFS: Found @ offset 5fac0 size 77
1708 20:43:52.110320 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 20:43:52.117522 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 20:43:52.120160 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 20:43:52.127216 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 20:43:52.130013 failed to find key in VPD: dsm_calib_r0_0
1713 20:43:52.140277 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 20:43:52.143348 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 20:43:52.149892 failed to find key in VPD: dsm_calib_r0_1
1716 20:43:52.157122 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 20:43:52.163261 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 20:43:52.166509 failed to find key in VPD: dsm_calib_r0_2
1719 20:43:52.176445 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 20:43:52.179693 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 20:43:52.186173 failed to find key in VPD: dsm_calib_r0_3
1722 20:43:52.193633 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 20:43:52.200042 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 20:43:52.202810 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 20:43:52.209747 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 20:43:52.213078 EC returned error result code 1
1727 20:43:52.216820 EC returned error result code 1
1728 20:43:52.220728 EC returned error result code 1
1729 20:43:52.223920 PS2K: Bad resp from EC. Vivaldi disabled!
1730 20:43:52.230123 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 20:43:52.236749 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 20:43:52.240025 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 20:43:52.247005 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 20:43:52.249868 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 20:43:52.256626 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 20:43:52.263106 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 20:43:52.269529 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 20:43:52.272808 ACPI: added table 2/32, length now 44
1739 20:43:52.272888 ACPI: * MCFG
1740 20:43:52.279881 ACPI: added table 3/32, length now 48
1741 20:43:52.279962 ACPI: * TPM2
1742 20:43:52.282737 TPM2 log created at 99a2d000
1743 20:43:52.286485 ACPI: added table 4/32, length now 52
1744 20:43:52.289759 ACPI: * MADT
1745 20:43:52.289840 SCI is IRQ9
1746 20:43:52.292971 ACPI: added table 5/32, length now 56
1747 20:43:52.296035 current = 99b43ac0
1748 20:43:52.296157 ACPI: * DMAR
1749 20:43:52.299647 ACPI: added table 6/32, length now 60
1750 20:43:52.302984 ACPI: * IGD OpRegion
1751 20:43:52.306052 GMA: Found VBT in CBFS
1752 20:43:52.309440 GMA: Found valid VBT in CBFS
1753 20:43:52.312491 ACPI: added table 7/32, length now 64
1754 20:43:52.312572 ACPI: * HPET
1755 20:43:52.319702 ACPI: added table 8/32, length now 68
1756 20:43:52.319783 ACPI: done.
1757 20:43:52.322625 ACPI tables: 31744 bytes.
1758 20:43:52.326093 smbios_write_tables: 99a2c000
1759 20:43:52.329287 EC returned error result code 3
1760 20:43:52.332516 Couldn't obtain OEM name from CBI
1761 20:43:52.335849 Create SMBIOS type 17
1762 20:43:52.339128 PCI: 00:00.0 (Intel Cannonlake)
1763 20:43:52.339211 PCI: 00:14.3 (Intel WiFi)
1764 20:43:52.342508 SMBIOS tables: 939 bytes.
1765 20:43:52.345863 Writing table forward entry at 0x00000500
1766 20:43:52.352663 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 20:43:52.355792 Writing coreboot table at 0x99b62000
1768 20:43:52.362265 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 20:43:52.369076 1. 0000000000001000-000000000009ffff: RAM
1770 20:43:52.372466 2. 00000000000a0000-00000000000fffff: RESERVED
1771 20:43:52.376082 3. 0000000000100000-0000000099a2bfff: RAM
1772 20:43:52.382398 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 20:43:52.385573 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 20:43:52.392397 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 20:43:52.398660 7. 000000009a000000-000000009f7fffff: RESERVED
1776 20:43:52.401773 8. 00000000e0000000-00000000efffffff: RESERVED
1777 20:43:52.408865 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 20:43:52.412076 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 20:43:52.418557 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 20:43:52.421609 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 20:43:52.425265 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 20:43:52.431562 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 20:43:52.434961 15. 0000000100000000-000000045e7fffff: RAM
1784 20:43:52.438522 Graphics framebuffer located at 0xc0000000
1785 20:43:52.441418 Passing 5 GPIOs to payload:
1786 20:43:52.447939 NAME | PORT | POLARITY | VALUE
1787 20:43:52.451650 write protect | undefined | high | low
1788 20:43:52.457907 lid | undefined | high | high
1789 20:43:52.464705 power | undefined | high | low
1790 20:43:52.467875 oprom | undefined | high | low
1791 20:43:52.474904 EC in RW | 0x000000cb | high | low
1792 20:43:52.474985 Board ID: 4
1793 20:43:52.481603 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 20:43:52.484628 CBFS @ c08000 size 3f8000
1795 20:43:52.487972 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 20:43:52.494898 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1797 20:43:52.497869 coreboot table: 1492 bytes.
1798 20:43:52.501157 IMD ROOT 0. 99fff000 00001000
1799 20:43:52.504453 IMD SMALL 1. 99ffe000 00001000
1800 20:43:52.507788 FSP MEMORY 2. 99c4e000 003b0000
1801 20:43:52.511230 CONSOLE 3. 99c2e000 00020000
1802 20:43:52.514419 FMAP 4. 99c2d000 0000054e
1803 20:43:52.518344 TIME STAMP 5. 99c2c000 00000910
1804 20:43:52.521304 VBOOT WORK 6. 99c18000 00014000
1805 20:43:52.524279 MRC DATA 7. 99c16000 00001958
1806 20:43:52.527579 ROMSTG STCK 8. 99c15000 00001000
1807 20:43:52.530879 AFTER CAR 9. 99c0b000 0000a000
1808 20:43:52.534344 RAMSTAGE 10. 99baf000 0005c000
1809 20:43:52.537928 REFCODE 11. 99b7a000 00035000
1810 20:43:52.541358 SMM BACKUP 12. 99b6a000 00010000
1811 20:43:52.544288 COREBOOT 13. 99b62000 00008000
1812 20:43:52.547359 ACPI 14. 99b3e000 00024000
1813 20:43:52.550994 ACPI GNVS 15. 99b3d000 00001000
1814 20:43:52.554313 RAMOOPS 16. 99a3d000 00100000
1815 20:43:52.557509 TPM2 TCGLOG17. 99a2d000 00010000
1816 20:43:52.561662 SMBIOS 18. 99a2c000 00000800
1817 20:43:52.564080 IMD small region:
1818 20:43:52.567687 IMD ROOT 0. 99ffec00 00000400
1819 20:43:52.570642 FSP RUNTIME 1. 99ffebe0 00000004
1820 20:43:52.574539 EC HOSTEVENT 2. 99ffebc0 00000008
1821 20:43:52.578007 POWER STATE 3. 99ffeb80 00000040
1822 20:43:52.581189 ROMSTAGE 4. 99ffeb60 00000004
1823 20:43:52.584407 MEM INFO 5. 99ffe9a0 000001b9
1824 20:43:52.587198 VPD 6. 99ffe920 0000006c
1825 20:43:52.590674 MTRR: Physical address space:
1826 20:43:52.597483 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 20:43:52.603908 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 20:43:52.610554 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 20:43:52.617300 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 20:43:52.620430 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 20:43:52.627814 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 20:43:52.634147 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 20:43:52.637069 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 20:43:52.643419 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 20:43:52.646943 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 20:43:52.650032 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 20:43:52.653650 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 20:43:52.659880 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 20:43:52.663461 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 20:43:52.667135 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 20:43:52.670674 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 20:43:52.676663 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 20:43:52.680089 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 20:43:52.683222 call enable_fixed_mtrr()
1845 20:43:52.686532 CPU physical address size: 39 bits
1846 20:43:52.689780 MTRR: default type WB/UC MTRR counts: 6/8.
1847 20:43:52.693178 MTRR: WB selected as default type.
1848 20:43:52.699676 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 20:43:52.706820 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 20:43:52.713098 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 20:43:52.720285 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 20:43:52.726126 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 20:43:52.733905 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 20:43:52.736363 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 20:43:52.739328 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 20:43:52.746111 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 20:43:52.749817 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 20:43:52.752894 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 20:43:52.756011 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 20:43:52.759283 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 20:43:52.766338 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 20:43:52.769792 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 20:43:52.772732 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 20:43:52.775927 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 20:43:52.782472 MTRR: Fixed MSR 0x250 0x0606060606060606
1866 20:43:52.786065 call enable_fixed_mtrr()
1867 20:43:52.789078 MTRR: Fixed MSR 0x258 0x0606060606060606
1868 20:43:52.792411 MTRR: Fixed MSR 0x259 0x0000000000000000
1869 20:43:52.796046 MTRR: Fixed MSR 0x268 0x0606060606060606
1870 20:43:52.799135 MTRR: Fixed MSR 0x269 0x0606060606060606
1871 20:43:52.805600 MTRR: Fixed MSR 0x26a 0x0606060606060606
1872 20:43:52.809068 MTRR: Fixed MSR 0x26b 0x0606060606060606
1873 20:43:52.812475 MTRR: Fixed MSR 0x26c 0x0606060606060606
1874 20:43:52.815966 MTRR: Fixed MSR 0x26d 0x0606060606060606
1875 20:43:52.822033 MTRR: Fixed MSR 0x26e 0x0606060606060606
1876 20:43:52.825518 MTRR: Fixed MSR 0x26f 0x0606060606060606
1877 20:43:52.828739 CPU physical address size: 39 bits
1878 20:43:52.832368 call enable_fixed_mtrr()
1879 20:43:52.835793 MTRR: Fixed MSR 0x250 0x0606060606060606
1880 20:43:52.835876
1881 20:43:52.838724 MTRR check
1882 20:43:52.838825 Fixed MTRRs : Enabled
1883 20:43:52.841928 Variable MTRRs: Enabled
1884 20:43:52.842009
1885 20:43:52.845280 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 20:43:52.852020 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 20:43:52.855197 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 20:43:52.858569 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 20:43:52.862132 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 20:43:52.868423 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 20:43:52.871746 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 20:43:52.875418 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 20:43:52.878853 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 20:43:52.881893 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 20:43:52.888295 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1896 20:43:52.891996 call enable_fixed_mtrr()
1897 20:43:52.895293 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1898 20:43:52.901636 CPU physical address size: 39 bits
1899 20:43:52.901718 CBFS @ c08000 size 3f8000
1900 20:43:52.908278 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1901 20:43:52.911474 CBFS: Locating 'fallback/payload'
1902 20:43:52.914889 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 20:43:52.921355 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 20:43:52.925194 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 20:43:52.928188 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 20:43:52.931843 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 20:43:52.938032 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 20:43:52.941261 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 20:43:52.944931 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 20:43:52.948467 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 20:43:52.954965 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 20:43:52.958045 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 20:43:52.961130 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 20:43:52.964353 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 20:43:52.971413 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 20:43:52.974417 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 20:43:52.977546 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 20:43:52.980833 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 20:43:52.987541 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 20:43:52.991059 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 20:43:52.994305 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 20:43:52.997766 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 20:43:53.004628 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 20:43:53.004710 call enable_fixed_mtrr()
1925 20:43:53.007402 CPU physical address size: 39 bits
1926 20:43:53.014230 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 20:43:53.017549 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 20:43:53.020786 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 20:43:53.023896 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 20:43:53.030898 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 20:43:53.033870 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 20:43:53.037136 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 20:43:53.040515 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 20:43:53.047490 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 20:43:53.050402 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 20:43:53.054096 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 20:43:53.057440 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 20:43:53.064277 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 20:43:53.064358 call enable_fixed_mtrr()
1940 20:43:53.070639 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 20:43:53.074460 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 20:43:53.077281 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 20:43:53.080518 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 20:43:53.083902 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 20:43:53.090726 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 20:43:53.094048 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 20:43:53.097129 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 20:43:53.100650 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 20:43:53.106905 CPU physical address size: 39 bits
1950 20:43:53.106986 call enable_fixed_mtrr()
1951 20:43:53.110104 call enable_fixed_mtrr()
1952 20:43:53.113825 CPU physical address size: 39 bits
1953 20:43:53.117158 CPU physical address size: 39 bits
1954 20:43:53.120474 CPU physical address size: 39 bits
1955 20:43:53.127124 CBFS: Found @ offset 1c96c0 size 3f798
1956 20:43:53.130358 Checking segment from ROM address 0xffdd16f8
1957 20:43:53.133903 Checking segment from ROM address 0xffdd1714
1958 20:43:53.140550 Loading segment from ROM address 0xffdd16f8
1959 20:43:53.140632 code (compression=0)
1960 20:43:53.150561 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 20:43:53.157154 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 20:43:53.160255 it's not compressed!
1963 20:43:53.253490 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 20:43:53.259996 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 20:43:53.262717 Loading segment from ROM address 0xffdd1714
1966 20:43:53.265855 Entry Point 0x30000000
1967 20:43:53.269321 Loaded segments
1968 20:43:53.274896 Finalizing chipset.
1969 20:43:53.278727 Finalizing SMM.
1970 20:43:53.282156 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1971 20:43:53.284988 mp_park_aps done after 0 msecs.
1972 20:43:53.291879 Jumping to boot code at 30000000(99b62000)
1973 20:43:53.298199 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 20:43:53.298283
1975 20:43:53.298382
1976 20:43:53.298479
1977 20:43:53.301121 Starting depthcharge on Helios...
1978 20:43:53.301228
1979 20:43:53.301583 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 20:43:53.301697 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 20:43:53.301788 Setting prompt string to ['hatch:']
1982 20:43:53.301878 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 20:43:53.311716 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 20:43:53.311800
1985 20:43:53.317822 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 20:43:53.317911
1987 20:43:53.324271 board_setup: Info: eMMC controller not present; skipping
1988 20:43:53.324355
1989 20:43:53.327520 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 20:43:53.327621
1991 20:43:53.334559 board_setup: Info: SDHCI controller not present; skipping
1992 20:43:53.334643
1993 20:43:53.341048 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 20:43:53.341135
1995 20:43:53.341218 Wipe memory regions:
1996 20:43:53.341297
1997 20:43:53.344444 [0x00000000001000, 0x000000000a0000)
1998 20:43:53.344528
1999 20:43:53.347860 [0x00000000100000, 0x00000030000000)
2000 20:43:53.414254
2001 20:43:53.417382 [0x00000030657430, 0x00000099a2c000)
2002 20:43:53.554662
2003 20:43:53.557611 [0x00000100000000, 0x0000045e800000)
2004 20:43:54.940538
2005 20:43:54.940676 R8152: Initializing
2006 20:43:54.940766
2007 20:43:54.943075 Version 9 (ocp_data = 6010)
2008 20:43:54.947549
2009 20:43:54.947632 R8152: Done initializing
2010 20:43:54.947716
2011 20:43:54.951031 Adding net device
2012 20:43:55.433595
2013 20:43:55.433729 R8152: Initializing
2014 20:43:55.433826
2015 20:43:55.437145 Version 6 (ocp_data = 5c30)
2016 20:43:55.437254
2017 20:43:55.440338 R8152: Done initializing
2018 20:43:55.440418
2019 20:43:55.443586 net_add_device: Attemp to include the same device
2020 20:43:55.446897
2021 20:43:55.454582 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 20:43:55.454663
2023 20:43:55.454726
2024 20:43:55.454785
2025 20:43:55.455056 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 20:43:55.555406 hatch: tftpboot 192.168.201.1 12210509/tftp-deploy-1r1enml0/kernel/bzImage 12210509/tftp-deploy-1r1enml0/kernel/cmdline 12210509/tftp-deploy-1r1enml0/ramdisk/ramdisk.cpio.gz
2028 20:43:55.555532 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 20:43:55.555618 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 20:43:55.560125 tftpboot 192.168.201.1 12210509/tftp-deploy-1r1enml0/kernel/bzImploy-1r1enml0/kernel/cmdline 12210509/tftp-deploy-1r1enml0/ramdisk/ramdisk.cpio.gz
2031 20:43:55.560213
2032 20:43:55.560297 Waiting for link
2033 20:43:55.760954
2034 20:43:55.761075 done.
2035 20:43:55.761166
2036 20:43:55.761245 MAC: 00:24:32:50:1a:5f
2037 20:43:55.761341
2038 20:43:55.764686 Sending DHCP discover... done.
2039 20:43:55.764769
2040 20:43:55.767273 Waiting for reply... done.
2041 20:43:55.767355
2042 20:43:55.770684 Sending DHCP request... done.
2043 20:43:55.770791
2044 20:43:55.774715 Waiting for reply... done.
2045 20:43:55.774833
2046 20:43:55.777351 My ip is 192.168.201.21
2047 20:43:55.777434
2048 20:43:55.780614 The DHCP server ip is 192.168.201.1
2049 20:43:55.780727
2050 20:43:55.787135 TFTP server IP predefined by user: 192.168.201.1
2051 20:43:55.787219
2052 20:43:55.794077 Bootfile predefined by user: 12210509/tftp-deploy-1r1enml0/kernel/bzImage
2053 20:43:55.794161
2054 20:43:55.797369 Sending tftp read request... done.
2055 20:43:55.797452
2056 20:43:55.800614 Waiting for the transfer...
2057 20:43:55.800698
2058 20:43:56.381477 00000000 ################################################################
2059 20:43:56.381619
2060 20:43:56.946683 00080000 ################################################################
2061 20:43:56.946814
2062 20:43:57.517975 00100000 ################################################################
2063 20:43:57.518119
2064 20:43:58.083064 00180000 ################################################################
2065 20:43:58.083215
2066 20:43:58.658863 00200000 ################################################################
2067 20:43:58.659006
2068 20:43:59.231879 00280000 ################################################################
2069 20:43:59.232026
2070 20:43:59.783342 00300000 ################################################################
2071 20:43:59.783489
2072 20:44:00.374465 00380000 ################################################################
2073 20:44:00.374919
2074 20:44:01.085667 00400000 ################################################################
2075 20:44:01.086220
2076 20:44:01.797856 00480000 ################################################################
2077 20:44:01.798475
2078 20:44:02.501461 00500000 ################################################################
2079 20:44:02.502158
2080 20:44:03.222773 00580000 ################################################################
2081 20:44:03.223329
2082 20:44:03.930338 00600000 ################################################################
2083 20:44:03.930864
2084 20:44:04.628364 00680000 ################################################################
2085 20:44:04.628888
2086 20:44:05.187528 00700000 ################################################################
2087 20:44:05.187682
2088 20:44:05.808611 00780000 ################################################################
2089 20:44:05.809235
2090 20:44:06.489604 00800000 ################################################################
2091 20:44:06.490117
2092 20:44:07.161282 00880000 ################################################################
2093 20:44:07.161872
2094 20:44:07.846368 00900000 ################################################################
2095 20:44:07.847016
2096 20:44:08.540724 00980000 ################################################################
2097 20:44:08.541244
2098 20:44:09.224889 00a00000 ################################################################
2099 20:44:09.225404
2100 20:44:09.912393 00a80000 ################################################################
2101 20:44:09.912886
2102 20:44:09.959118 00b00000 ##### done.
2103 20:44:09.959571
2104 20:44:09.962569 The bootfile was 11571200 bytes long.
2105 20:44:09.962990
2106 20:44:09.966296 Sending tftp read request... done.
2107 20:44:09.966712
2108 20:44:09.969282 Waiting for the transfer...
2109 20:44:09.969694
2110 20:44:10.575917 00000000 ################################################################
2111 20:44:10.576109
2112 20:44:11.179689 00080000 ################################################################
2113 20:44:11.179824
2114 20:44:11.759570 00100000 ################################################################
2115 20:44:11.759706
2116 20:44:12.373136 00180000 ################################################################
2117 20:44:12.373271
2118 20:44:12.996601 00200000 ################################################################
2119 20:44:12.996734
2120 20:44:13.614548 00280000 ################################################################
2121 20:44:13.614679
2122 20:44:14.242463 00300000 ################################################################
2123 20:44:14.242598
2124 20:44:14.854613 00380000 ################################################################
2125 20:44:14.854749
2126 20:44:15.463964 00400000 ################################################################
2127 20:44:15.464169
2128 20:44:16.033366 00480000 ################################################################
2129 20:44:16.033595
2130 20:44:16.621327 00500000 ################################################################
2131 20:44:16.621476
2132 20:44:17.207079 00580000 ################################################################
2133 20:44:17.207252
2134 20:44:17.737826 00600000 ################################################################
2135 20:44:17.737968
2136 20:44:18.268931 00680000 ################################################################
2137 20:44:18.269062
2138 20:44:18.792508 00700000 ################################################################
2139 20:44:18.792651
2140 20:44:19.303647 00780000 ################################################################
2141 20:44:19.303815
2142 20:44:19.834206 00800000 ################################################################
2143 20:44:19.834336
2144 20:44:20.136077 00880000 ##################################### done.
2145 20:44:20.136239
2146 20:44:20.139160 Sending tftp read request... done.
2147 20:44:20.139268
2148 20:44:20.142564 Waiting for the transfer...
2149 20:44:20.142665
2150 20:44:20.142769 00000000 # done.
2151 20:44:20.142862
2152 20:44:20.152399 Command line loaded dynamically from TFTP file: 12210509/tftp-deploy-1r1enml0/kernel/cmdline
2153 20:44:20.152504
2154 20:44:20.172973 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2155 20:44:20.173061
2156 20:44:20.178554 ec_init(0): CrosEC protocol v3 supported (256, 256)
2157 20:44:20.183164
2158 20:44:20.186601 Shutting down all USB controllers.
2159 20:44:20.186681
2160 20:44:20.186745 Removing current net device
2161 20:44:20.190115
2162 20:44:20.190195 Finalizing coreboot
2163 20:44:20.190260
2164 20:44:20.197028 Exiting depthcharge with code 4 at timestamp: 34283248
2165 20:44:20.197110
2166 20:44:20.197174
2167 20:44:20.197233 Starting kernel ...
2168 20:44:20.197290
2169 20:44:20.197668 end: 2.2.4 bootloader-commands (duration 00:00:27) [common]
2170 20:44:20.197763 start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
2171 20:44:20.197835 Setting prompt string to ['Linux version [0-9]']
2172 20:44:20.197900 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 20:44:20.197965 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 20:44:20.199867
2176 20:48:35.198779 end: 2.2.5 auto-login-action (duration 00:04:15) [common]
2178 20:48:35.199763 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
2180 20:48:35.200611 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2183 20:48:35.201857 end: 2 depthcharge-action (duration 00:05:00) [common]
2185 20:48:35.202913 Cleaning after the job
2186 20:48:35.203338 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210509/tftp-deploy-1r1enml0/ramdisk
2187 20:48:35.204843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210509/tftp-deploy-1r1enml0/kernel
2188 20:48:35.206671 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210509/tftp-deploy-1r1enml0/modules
2189 20:48:35.207271 start: 5.1 power-off (timeout 00:00:30) [common]
2190 20:48:35.207426 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2191 20:48:35.286541 >> Command sent successfully.
2192 20:48:35.292667 Returned 0 in 0 seconds
2193 20:48:35.393720 end: 5.1 power-off (duration 00:00:00) [common]
2195 20:48:35.395226 start: 5.2 read-feedback (timeout 00:10:00) [common]
2196 20:48:35.396471 Listened to connection for namespace 'common' for up to 1s
2198 20:48:35.397752 Listened to connection for namespace 'common' for up to 1s
2199 20:48:36.396495 Finalising connection for namespace 'common'
2200 20:48:36.397186 Disconnecting from shell: Finalise
2201 20:48:36.397588
2202 20:48:36.498739 end: 5.2 read-feedback (duration 00:00:01) [common]
2203 20:48:36.499332 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12210509
2204 20:48:36.520668 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12210509
2205 20:48:36.520800 JobError: Your job cannot terminate cleanly.