Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 20:43:28.286309 lava-dispatcher, installed at version: 2023.10
2 20:43:28.286514 start: 0 validate
3 20:43:28.286663 Start time: 2023-12-07 20:43:28.286655+00:00 (UTC)
4 20:43:28.286792 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:43:28.286928 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 20:43:28.537913 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:43:28.538088 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.299-cip105%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:43:28.796240 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:43:28.796414 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.299-cip105%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 20:43:29.055727 validate duration: 0.77
12 20:43:29.056021 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:43:29.056122 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:43:29.056207 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:43:29.056343 Not decompressing ramdisk as can be used compressed.
16 20:43:29.056429 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 20:43:29.056497 saving as /var/lib/lava/dispatcher/tmp/12210456/tftp-deploy-5jq7lmhl/ramdisk/rootfs.cpio.gz
18 20:43:29.056563 total size: 8418130 (8 MB)
19 20:43:29.057582 progress 0 % (0 MB)
20 20:43:29.060163 progress 5 % (0 MB)
21 20:43:29.062458 progress 10 % (0 MB)
22 20:43:29.064774 progress 15 % (1 MB)
23 20:43:29.067120 progress 20 % (1 MB)
24 20:43:29.069474 progress 25 % (2 MB)
25 20:43:29.071936 progress 30 % (2 MB)
26 20:43:29.074059 progress 35 % (2 MB)
27 20:43:29.076462 progress 40 % (3 MB)
28 20:43:29.078938 progress 45 % (3 MB)
29 20:43:29.081171 progress 50 % (4 MB)
30 20:43:29.083443 progress 55 % (4 MB)
31 20:43:29.085679 progress 60 % (4 MB)
32 20:43:29.087801 progress 65 % (5 MB)
33 20:43:29.090031 progress 70 % (5 MB)
34 20:43:29.092314 progress 75 % (6 MB)
35 20:43:29.094583 progress 80 % (6 MB)
36 20:43:29.096891 progress 85 % (6 MB)
37 20:43:29.099252 progress 90 % (7 MB)
38 20:43:29.101479 progress 95 % (7 MB)
39 20:43:29.103602 progress 100 % (8 MB)
40 20:43:29.103838 8 MB downloaded in 0.05 s (169.82 MB/s)
41 20:43:29.104009 end: 1.1.1 http-download (duration 00:00:00) [common]
43 20:43:29.104255 end: 1.1 download-retry (duration 00:00:00) [common]
44 20:43:29.104342 start: 1.2 download-retry (timeout 00:10:00) [common]
45 20:43:29.104425 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 20:43:29.104567 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.299-cip105/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 20:43:29.104635 saving as /var/lib/lava/dispatcher/tmp/12210456/tftp-deploy-5jq7lmhl/kernel/bzImage
48 20:43:29.104694 total size: 11571200 (11 MB)
49 20:43:29.104758 No compression specified
50 20:43:29.105831 progress 0 % (0 MB)
51 20:43:29.108881 progress 5 % (0 MB)
52 20:43:29.112043 progress 10 % (1 MB)
53 20:43:29.115058 progress 15 % (1 MB)
54 20:43:29.118182 progress 20 % (2 MB)
55 20:43:29.121357 progress 25 % (2 MB)
56 20:43:29.124360 progress 30 % (3 MB)
57 20:43:29.127502 progress 35 % (3 MB)
58 20:43:29.130613 progress 40 % (4 MB)
59 20:43:29.133621 progress 45 % (4 MB)
60 20:43:29.136780 progress 50 % (5 MB)
61 20:43:29.139972 progress 55 % (6 MB)
62 20:43:29.142945 progress 60 % (6 MB)
63 20:43:29.146043 progress 65 % (7 MB)
64 20:43:29.149164 progress 70 % (7 MB)
65 20:43:29.152150 progress 75 % (8 MB)
66 20:43:29.155507 progress 80 % (8 MB)
67 20:43:29.158653 progress 85 % (9 MB)
68 20:43:29.161657 progress 90 % (9 MB)
69 20:43:29.164833 progress 95 % (10 MB)
70 20:43:29.168044 progress 100 % (11 MB)
71 20:43:29.168164 11 MB downloaded in 0.06 s (173.88 MB/s)
72 20:43:29.168385 end: 1.2.1 http-download (duration 00:00:00) [common]
74 20:43:29.168694 end: 1.2 download-retry (duration 00:00:00) [common]
75 20:43:29.168835 start: 1.3 download-retry (timeout 00:10:00) [common]
76 20:43:29.168921 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 20:43:29.169077 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.299-cip105/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 20:43:29.169148 saving as /var/lib/lava/dispatcher/tmp/12210456/tftp-deploy-5jq7lmhl/modules/modules.tar
79 20:43:29.169210 total size: 483888 (0 MB)
80 20:43:29.169304 Using unxz to decompress xz
81 20:43:29.173741 progress 6 % (0 MB)
82 20:43:29.174194 progress 13 % (0 MB)
83 20:43:29.174554 progress 20 % (0 MB)
84 20:43:29.176177 progress 27 % (0 MB)
85 20:43:29.178219 progress 33 % (0 MB)
86 20:43:29.180264 progress 40 % (0 MB)
87 20:43:29.182237 progress 47 % (0 MB)
88 20:43:29.184235 progress 54 % (0 MB)
89 20:43:29.186451 progress 60 % (0 MB)
90 20:43:29.188800 progress 67 % (0 MB)
91 20:43:29.191069 progress 74 % (0 MB)
92 20:43:29.193243 progress 81 % (0 MB)
93 20:43:29.195342 progress 88 % (0 MB)
94 20:43:29.197545 progress 94 % (0 MB)
95 20:43:29.200093 progress 100 % (0 MB)
96 20:43:29.206860 0 MB downloaded in 0.04 s (12.26 MB/s)
97 20:43:29.207156 end: 1.3.1 http-download (duration 00:00:00) [common]
99 20:43:29.207533 end: 1.3 download-retry (duration 00:00:00) [common]
100 20:43:29.207646 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 20:43:29.207796 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 20:43:29.207878 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 20:43:29.207975 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 20:43:29.208228 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn
105 20:43:29.208368 makedir: /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin
106 20:43:29.208502 makedir: /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/tests
107 20:43:29.208620 makedir: /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/results
108 20:43:29.208767 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-add-keys
109 20:43:29.208916 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-add-sources
110 20:43:29.209080 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-background-process-start
111 20:43:29.209215 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-background-process-stop
112 20:43:29.209343 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-common-functions
113 20:43:29.209522 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-echo-ipv4
114 20:43:29.209654 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-install-packages
115 20:43:29.209826 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-installed-packages
116 20:43:29.210008 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-os-build
117 20:43:29.210171 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-probe-channel
118 20:43:29.210359 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-probe-ip
119 20:43:29.210503 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-target-ip
120 20:43:29.210643 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-target-mac
121 20:43:29.210817 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-target-storage
122 20:43:29.210949 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-test-case
123 20:43:29.211079 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-test-event
124 20:43:29.211206 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-test-feedback
125 20:43:29.211334 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-test-raise
126 20:43:29.211461 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-test-reference
127 20:43:29.211588 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-test-runner
128 20:43:29.211731 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-test-set
129 20:43:29.211874 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-test-shell
130 20:43:29.212064 Updating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-install-packages (oe)
131 20:43:29.212237 Updating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/bin/lava-installed-packages (oe)
132 20:43:29.212379 Creating /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/environment
133 20:43:29.212511 LAVA metadata
134 20:43:29.212586 - LAVA_JOB_ID=12210456
135 20:43:29.212651 - LAVA_DISPATCHER_IP=192.168.201.1
136 20:43:29.212786 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 20:43:29.212856 skipped lava-vland-overlay
138 20:43:29.212931 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 20:43:29.213043 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 20:43:29.213106 skipped lava-multinode-overlay
141 20:43:29.213178 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 20:43:29.213291 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 20:43:29.213370 Loading test definitions
144 20:43:29.213510 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 20:43:29.213590 Using /lava-12210456 at stage 0
146 20:43:29.213939 uuid=12210456_1.4.2.3.1 testdef=None
147 20:43:29.214028 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 20:43:29.214147 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 20:43:29.214729 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 20:43:29.214986 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 20:43:29.215722 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 20:43:29.215972 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 20:43:29.216720 runner path: /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/0/tests/0_dmesg test_uuid 12210456_1.4.2.3.1
156 20:43:29.216902 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 20:43:29.217182 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 20:43:29.217257 Using /lava-12210456 at stage 1
160 20:43:29.217609 uuid=12210456_1.4.2.3.5 testdef=None
161 20:43:29.217711 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 20:43:29.217796 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 20:43:29.218346 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 20:43:29.218597 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 20:43:29.219282 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 20:43:29.219540 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 20:43:29.220276 runner path: /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/1/tests/1_bootrr test_uuid 12210456_1.4.2.3.5
170 20:43:29.220490 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 20:43:29.220739 Creating lava-test-runner.conf files
173 20:43:29.220802 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/0 for stage 0
174 20:43:29.220922 - 0_dmesg
175 20:43:29.221005 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12210456/lava-overlay-ilbzuhfn/lava-12210456/1 for stage 1
176 20:43:29.221112 - 1_bootrr
177 20:43:29.221225 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 20:43:29.221311 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 20:43:29.230087 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 20:43:29.230226 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 20:43:29.230317 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 20:43:29.230431 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 20:43:29.230517 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 20:43:29.490147 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 20:43:29.490567 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 20:43:29.490724 extracting modules file /var/lib/lava/dispatcher/tmp/12210456/tftp-deploy-5jq7lmhl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12210456/extract-overlay-ramdisk-6keoumaf/ramdisk
187 20:43:29.512898 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 20:43:29.513119 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 20:43:29.513239 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12210456/compress-overlay-5ihf2qtd/overlay-1.4.2.4.tar.gz to ramdisk
190 20:43:29.513311 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12210456/compress-overlay-5ihf2qtd/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12210456/extract-overlay-ramdisk-6keoumaf/ramdisk
191 20:43:29.521918 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 20:43:29.522040 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 20:43:29.522133 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 20:43:29.522225 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 20:43:29.522305 Building ramdisk /var/lib/lava/dispatcher/tmp/12210456/extract-overlay-ramdisk-6keoumaf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12210456/extract-overlay-ramdisk-6keoumaf/ramdisk
196 20:43:29.666769 >> 53982 blocks
197 20:43:30.584710 rename /var/lib/lava/dispatcher/tmp/12210456/extract-overlay-ramdisk-6keoumaf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12210456/tftp-deploy-5jq7lmhl/ramdisk/ramdisk.cpio.gz
198 20:43:30.585154 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 20:43:30.585278 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 20:43:30.585386 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 20:43:30.585486 No mkimage arch provided, not using FIT.
202 20:43:30.585579 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 20:43:30.585667 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 20:43:30.585773 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 20:43:30.585865 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 20:43:30.585942 No LXC device requested
207 20:43:30.586023 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 20:43:30.586112 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 20:43:30.586198 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 20:43:30.586272 Checking files for TFTP limit of 4294967296 bytes.
211 20:43:30.586721 end: 1 tftp-deploy (duration 00:00:02) [common]
212 20:43:30.586828 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 20:43:30.586918 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 20:43:30.587042 substitutions:
215 20:43:30.587109 - {DTB}: None
216 20:43:30.587171 - {INITRD}: 12210456/tftp-deploy-5jq7lmhl/ramdisk/ramdisk.cpio.gz
217 20:43:30.587231 - {KERNEL}: 12210456/tftp-deploy-5jq7lmhl/kernel/bzImage
218 20:43:30.587289 - {LAVA_MAC}: None
219 20:43:30.587347 - {PRESEED_CONFIG}: None
220 20:43:30.587402 - {PRESEED_LOCAL}: None
221 20:43:30.587457 - {RAMDISK}: 12210456/tftp-deploy-5jq7lmhl/ramdisk/ramdisk.cpio.gz
222 20:43:30.587513 - {ROOT_PART}: None
223 20:43:30.587567 - {ROOT}: None
224 20:43:30.587622 - {SERVER_IP}: 192.168.201.1
225 20:43:30.587676 - {TEE}: None
226 20:43:30.587731 Parsed boot commands:
227 20:43:30.587824 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 20:43:30.588056 Parsed boot commands: tftpboot 192.168.201.1 12210456/tftp-deploy-5jq7lmhl/kernel/bzImage 12210456/tftp-deploy-5jq7lmhl/kernel/cmdline 12210456/tftp-deploy-5jq7lmhl/ramdisk/ramdisk.cpio.gz
229 20:43:30.588179 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 20:43:30.588298 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 20:43:30.588398 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 20:43:30.588484 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 20:43:30.588557 Not connected, no need to disconnect.
234 20:43:30.588633 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 20:43:30.588713 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 20:43:30.588780 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-12'
237 20:43:30.592768 Setting prompt string to ['lava-test: # ']
238 20:43:30.593128 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 20:43:30.593235 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 20:43:30.593334 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 20:43:30.593440 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 20:43:30.593639 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
243 20:43:35.732283 >> Command sent successfully.
244 20:43:35.734745 Returned 0 in 5 seconds
245 20:43:35.835115 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 20:43:35.835508 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 20:43:35.835613 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 20:43:35.835705 Setting prompt string to 'Starting depthcharge on Voema...'
250 20:43:35.835774 Changing prompt to 'Starting depthcharge on Voema...'
251 20:43:35.835843 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 20:43:35.836106 [Enter `^Ec?' for help]
253 20:43:37.400686
254 20:43:37.400844
255 20:43:37.407355 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 20:43:37.415169 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 20:43:37.418978 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 20:43:37.423045 CPU: AES supported, TXT NOT supported, VT supported
259 20:43:37.430259 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 20:43:37.434370 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 20:43:37.437499 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 20:43:37.442065 VBOOT: Loading verstage.
263 20:43:37.448934 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 20:43:37.452429 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 20:43:37.456384 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 20:43:37.463934 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 20:43:37.471117 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 20:43:37.475999
269 20:43:37.476084
270 20:43:37.483257 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 20:43:37.500616 Probing TPM: . done!
272 20:43:37.504247 TPM ready after 0 ms
273 20:43:37.508908 Connected to device vid:did:rid of 1ae0:0028:00
274 20:43:37.520611 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
275 20:43:37.524383 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 20:43:37.527756 Initialized TPM device CR50 revision 0
277 20:43:37.626833 tlcl_send_startup: Startup return code is 0
278 20:43:37.626979 TPM: setup succeeded
279 20:43:37.643729 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 20:43:37.655317 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 20:43:37.666999 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 20:43:37.676839 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 20:43:37.680503 Chrome EC: UHEPI supported
284 20:43:37.683710 Phase 1
285 20:43:37.687416 FMAP: area GBB found @ 1805000 (458752 bytes)
286 20:43:37.697020 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 20:43:37.704051 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 20:43:37.710488 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 20:43:37.717502 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 20:43:37.720586 Recovery requested (1009000e)
291 20:43:37.723637 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 20:43:37.735553 tlcl_extend: response is 0
293 20:43:37.741767 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 20:43:37.752253 tlcl_extend: response is 0
295 20:43:37.758732 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 20:43:37.765087 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 20:43:37.771594 BS: verstage times (exec / console): total (unknown) / 142 ms
298 20:43:37.771685
299 20:43:37.771754
300 20:43:37.785005 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 20:43:37.791434 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 20:43:37.795114 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 20:43:37.798412 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 20:43:37.804906 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 20:43:37.808044 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 20:43:37.811476 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 20:43:37.814914 TCO_STS: 0000 0000
308 20:43:37.818238 GEN_PMCON: d0015038 00002200
309 20:43:37.821333 GBLRST_CAUSE: 00000000 00000000
310 20:43:37.824701 HPR_CAUSE0: 00000000
311 20:43:37.824786 prev_sleep_state 5
312 20:43:37.827906 Boot Count incremented to 23527
313 20:43:37.834498 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 20:43:37.841198 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 20:43:37.851288 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 20:43:37.857712 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 20:43:37.861256 Chrome EC: UHEPI supported
318 20:43:37.867561 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 20:43:37.878758 Probing TPM: done!
320 20:43:37.885419 Connected to device vid:did:rid of 1ae0:0028:00
321 20:43:37.895427 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
322 20:43:37.898559 Initialized TPM device CR50 revision 0
323 20:43:37.913525 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 20:43:37.920756 MRC: Hash idx 0x100b comparison successful.
325 20:43:37.924151 MRC cache found, size faa8
326 20:43:37.924267 bootmode is set to: 2
327 20:43:37.928342 SPD index = 2
328 20:43:37.934698 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 20:43:37.934804 SPD: module type is LPDDR4X
330 20:43:37.942767 SPD: module part number is MT53D1G64D4NW-046
331 20:43:37.949180 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 20:43:37.952563 SPD: device width 16 bits, bus width 16 bits
333 20:43:37.955802 SPD: module size is 2048 MB (per channel)
334 20:43:38.387642 CBMEM:
335 20:43:38.391147 IMD: root @ 0x76fff000 254 entries.
336 20:43:38.394182 IMD: root @ 0x76ffec00 62 entries.
337 20:43:38.397722 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 20:43:38.404181 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 20:43:38.407400 External stage cache:
340 20:43:38.410940 IMD: root @ 0x7b3ff000 254 entries.
341 20:43:38.413866 IMD: root @ 0x7b3fec00 62 entries.
342 20:43:38.429184 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 20:43:38.435682 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 20:43:38.441989 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 20:43:38.455765 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 20:43:38.462153 cse_lite: Skip switching to RW in the recovery path
347 20:43:38.462247 8 DIMMs found
348 20:43:38.465669 SMM Memory Map
349 20:43:38.469005 SMRAM : 0x7b000000 0x800000
350 20:43:38.472163 Subregion 0: 0x7b000000 0x200000
351 20:43:38.475564 Subregion 1: 0x7b200000 0x200000
352 20:43:38.479282 Subregion 2: 0x7b400000 0x400000
353 20:43:38.479369 top_of_ram = 0x77000000
354 20:43:38.485638 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 20:43:38.492531 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 20:43:38.495701 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 20:43:38.501987 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 20:43:38.509896 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 20:43:38.516697 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 20:43:38.526850 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 20:43:38.529835 Processing 211 relocs. Offset value of 0x74c0b000
362 20:43:38.538570 BS: romstage times (exec / console): total (unknown) / 277 ms
363 20:43:38.544402
364 20:43:38.544490
365 20:43:38.554084 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 20:43:38.557716 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 20:43:38.567754 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 20:43:38.574246 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 20:43:38.580617 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 20:43:38.587236 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 20:43:38.631019 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 20:43:38.637743 Processing 5008 relocs. Offset value of 0x75d98000
373 20:43:38.640992 BS: postcar times (exec / console): total (unknown) / 59 ms
374 20:43:38.644218
375 20:43:38.644312
376 20:43:38.654246 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 20:43:38.654354 Normal boot
378 20:43:38.657498 FW_CONFIG value is 0x804c02
379 20:43:38.660788 PCI: 00:07.0 disabled by fw_config
380 20:43:38.664244 PCI: 00:07.1 disabled by fw_config
381 20:43:38.667418 PCI: 00:0d.2 disabled by fw_config
382 20:43:38.671039 PCI: 00:1c.7 disabled by fw_config
383 20:43:38.677406 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 20:43:38.684263 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 20:43:38.687499 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 20:43:38.690879 GENERIC: 0.0 disabled by fw_config
387 20:43:38.697489 GENERIC: 1.0 disabled by fw_config
388 20:43:38.701173 fw_config match found: DB_USB=USB3_ACTIVE
389 20:43:38.704272 fw_config match found: DB_USB=USB3_ACTIVE
390 20:43:38.707502 fw_config match found: DB_USB=USB3_ACTIVE
391 20:43:38.714089 fw_config match found: DB_USB=USB3_ACTIVE
392 20:43:38.717872 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 20:43:38.724521 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 20:43:38.731275 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 20:43:38.740994 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 20:43:38.744535 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 20:43:38.750999 microcode: Update skipped, already up-to-date
398 20:43:38.757824 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 20:43:38.784578 Detected 4 core, 8 thread CPU.
400 20:43:38.788175 Setting up SMI for CPU
401 20:43:38.791374 IED base = 0x7b400000
402 20:43:38.791463 IED size = 0x00400000
403 20:43:38.794636 Will perform SMM setup.
404 20:43:38.801219 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 20:43:38.808613 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 20:43:38.814809 Processing 16 relocs. Offset value of 0x00030000
407 20:43:38.817935 Attempting to start 7 APs
408 20:43:38.821433 Waiting for 10ms after sending INIT.
409 20:43:38.836480 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 20:43:38.840014 AP: slot 4 apic_id 7.
411 20:43:38.843049 AP: slot 5 apic_id 6.
412 20:43:38.843136 AP: slot 2 apic_id 5.
413 20:43:38.846781 AP: slot 7 apic_id 3.
414 20:43:38.849906 AP: slot 3 apic_id 2.
415 20:43:38.849993 done.
416 20:43:38.850062 AP: slot 6 apic_id 4.
417 20:43:38.856527 Waiting for 2nd SIPI to complete...done.
418 20:43:38.863049 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 20:43:38.869931 Processing 13 relocs. Offset value of 0x00038000
420 20:43:38.870024 Unable to locate Global NVS
421 20:43:38.879637 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 20:43:38.883298 Installing permanent SMM handler to 0x7b000000
423 20:43:38.892798 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 20:43:38.896427 Processing 794 relocs. Offset value of 0x7b010000
425 20:43:38.906293 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 20:43:38.909427 Processing 13 relocs. Offset value of 0x7b008000
427 20:43:38.916639 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 20:43:38.922828 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 20:43:38.926238 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 20:43:38.932936 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 20:43:38.939247 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 20:43:38.946077 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 20:43:38.952653 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 20:43:38.952744 Unable to locate Global NVS
435 20:43:38.962505 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 20:43:38.965881 Clearing SMI status registers
437 20:43:38.965968 SMI_STS: PM1
438 20:43:38.969217 PM1_STS: PWRBTN
439 20:43:38.976057 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 20:43:38.979161 In relocation handler: CPU 0
441 20:43:38.982332 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 20:43:38.989107 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 20:43:38.989195 Relocation complete.
444 20:43:38.999018 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 20:43:38.999146 In relocation handler: CPU 1
446 20:43:39.005605 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 20:43:39.005713 Relocation complete.
448 20:43:39.015345 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
449 20:43:39.015464 In relocation handler: CPU 2
450 20:43:39.022179 New SMBASE=0x7afff800 IEDBASE=0x7b400000
451 20:43:39.022292 Relocation complete.
452 20:43:39.032167 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
453 20:43:39.032279 In relocation handler: CPU 6
454 20:43:39.038545 New SMBASE=0x7affe800 IEDBASE=0x7b400000
455 20:43:39.042120 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 20:43:39.045359 Relocation complete.
457 20:43:39.052251 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
458 20:43:39.055266 In relocation handler: CPU 3
459 20:43:39.059150 New SMBASE=0x7afff400 IEDBASE=0x7b400000
460 20:43:39.062337 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 20:43:39.065368 Relocation complete.
462 20:43:39.072179 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
463 20:43:39.075331 In relocation handler: CPU 7
464 20:43:39.078663 New SMBASE=0x7affe400 IEDBASE=0x7b400000
465 20:43:39.082118 Relocation complete.
466 20:43:39.088966 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
467 20:43:39.091954 In relocation handler: CPU 5
468 20:43:39.095212 New SMBASE=0x7affec00 IEDBASE=0x7b400000
469 20:43:39.101773 Writing SMRR. base = 0x7b000006, mask=0xff800c00
470 20:43:39.105051 Relocation complete.
471 20:43:39.111928 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
472 20:43:39.114950 In relocation handler: CPU 4
473 20:43:39.118278 New SMBASE=0x7afff000 IEDBASE=0x7b400000
474 20:43:39.121635 Relocation complete.
475 20:43:39.121729 Initializing CPU #0
476 20:43:39.124996 CPU: vendor Intel device 806c1
477 20:43:39.128205 CPU: family 06, model 8c, stepping 01
478 20:43:39.131601 Clearing out pending MCEs
479 20:43:39.134885 Setting up local APIC...
480 20:43:39.138538 apic_id: 0x00 done.
481 20:43:39.141731 Turbo is available but hidden
482 20:43:39.141875 Turbo is available and visible
483 20:43:39.148275 microcode: Update skipped, already up-to-date
484 20:43:39.151460 CPU #0 initialized
485 20:43:39.151548 Initializing CPU #4
486 20:43:39.154861 Initializing CPU #5
487 20:43:39.158246 CPU: vendor Intel device 806c1
488 20:43:39.161478 CPU: family 06, model 8c, stepping 01
489 20:43:39.164736 CPU: vendor Intel device 806c1
490 20:43:39.167974 CPU: family 06, model 8c, stepping 01
491 20:43:39.171397 Clearing out pending MCEs
492 20:43:39.175091 Clearing out pending MCEs
493 20:43:39.175177 Initializing CPU #3
494 20:43:39.179296 Initializing CPU #7
495 20:43:39.179383 CPU: vendor Intel device 806c1
496 20:43:39.183086 CPU: family 06, model 8c, stepping 01
497 20:43:39.185751 Initializing CPU #1
498 20:43:39.189594 Initializing CPU #6
499 20:43:39.189680 Initializing CPU #2
500 20:43:39.192891 CPU: vendor Intel device 806c1
501 20:43:39.195949 CPU: family 06, model 8c, stepping 01
502 20:43:39.199461 CPU: vendor Intel device 806c1
503 20:43:39.202648 CPU: family 06, model 8c, stepping 01
504 20:43:39.205693 Clearing out pending MCEs
505 20:43:39.209469 Clearing out pending MCEs
506 20:43:39.212752 Setting up local APIC...
507 20:43:39.215719 Setting up local APIC...
508 20:43:39.219501 CPU: vendor Intel device 806c1
509 20:43:39.222229 CPU: family 06, model 8c, stepping 01
510 20:43:39.225902 CPU: vendor Intel device 806c1
511 20:43:39.228942 CPU: family 06, model 8c, stepping 01
512 20:43:39.232314 Clearing out pending MCEs
513 20:43:39.232425 Clearing out pending MCEs
514 20:43:39.235933 Clearing out pending MCEs
515 20:43:39.239436 Setting up local APIC...
516 20:43:39.242428 apic_id: 0x05 done.
517 20:43:39.242548 apic_id: 0x04 done.
518 20:43:39.248909 microcode: Update skipped, already up-to-date
519 20:43:39.252464 microcode: Update skipped, already up-to-date
520 20:43:39.256109 CPU #2 initialized
521 20:43:39.256202 CPU #6 initialized
522 20:43:39.259281 Setting up local APIC...
523 20:43:39.262451 apic_id: 0x03 done.
524 20:43:39.262538 Setting up local APIC...
525 20:43:39.265658 Setting up local APIC...
526 20:43:39.269531 microcode: Update skipped, already up-to-date
527 20:43:39.272561 apic_id: 0x02 done.
528 20:43:39.275717 CPU #7 initialized
529 20:43:39.279322 microcode: Update skipped, already up-to-date
530 20:43:39.282785 Setting up local APIC...
531 20:43:39.282873 CPU #3 initialized
532 20:43:39.285604 apic_id: 0x01 done.
533 20:43:39.289158 apic_id: 0x07 done.
534 20:43:39.289246 apic_id: 0x06 done.
535 20:43:39.295291 microcode: Update skipped, already up-to-date
536 20:43:39.298549 microcode: Update skipped, already up-to-date
537 20:43:39.305143 microcode: Update skipped, already up-to-date
538 20:43:39.305260 CPU #4 initialized
539 20:43:39.308956 CPU #5 initialized
540 20:43:39.309048 CPU #1 initialized
541 20:43:39.315260 bsp_do_flight_plan done after 454 msecs.
542 20:43:39.318739 CPU: frequency set to 4400 MHz
543 20:43:39.318890 Enabling SMIs.
544 20:43:39.325262 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
545 20:43:39.340903 SATAXPCIE1 indicates PCIe NVMe is present
546 20:43:39.344235 Probing TPM: done!
547 20:43:39.347713 Connected to device vid:did:rid of 1ae0:0028:00
548 20:43:39.358284 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
549 20:43:39.361427 Initialized TPM device CR50 revision 0
550 20:43:39.365276 Enabling S0i3.4
551 20:43:39.371365 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 20:43:39.374746 Found a VBT of 8704 bytes after decompression
553 20:43:39.381506 cse_lite: CSE RO boot. HybridStorageMode disabled
554 20:43:39.388376 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 20:43:39.463696 FSPS returned 0
556 20:43:39.466929 Executing Phase 1 of FspMultiPhaseSiInit
557 20:43:39.476734 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 20:43:39.480428 port C0 DISC req: usage 1 usb3 1 usb2 5
559 20:43:39.483239 Raw Buffer output 0 00000511
560 20:43:39.486601 Raw Buffer output 1 00000000
561 20:43:39.490575 pmc_send_ipc_cmd succeeded
562 20:43:39.497174 port C1 DISC req: usage 1 usb3 2 usb2 3
563 20:43:39.497260 Raw Buffer output 0 00000321
564 20:43:39.500318 Raw Buffer output 1 00000000
565 20:43:39.504637 pmc_send_ipc_cmd succeeded
566 20:43:39.509888 Detected 4 core, 8 thread CPU.
567 20:43:39.513132 Detected 4 core, 8 thread CPU.
568 20:43:39.713541 Display FSP Version Info HOB
569 20:43:39.716607 Reference Code - CPU = a.0.4c.31
570 20:43:39.719676 uCode Version = 0.0.0.86
571 20:43:39.723093 TXT ACM version = ff.ff.ff.ffff
572 20:43:39.726544 Reference Code - ME = a.0.4c.31
573 20:43:39.729975 MEBx version = 0.0.0.0
574 20:43:39.733352 ME Firmware Version = Consumer SKU
575 20:43:39.736804 Reference Code - PCH = a.0.4c.31
576 20:43:39.740135 PCH-CRID Status = Disabled
577 20:43:39.743072 PCH-CRID Original Value = ff.ff.ff.ffff
578 20:43:39.746550 PCH-CRID New Value = ff.ff.ff.ffff
579 20:43:39.750009 OPROM - RST - RAID = ff.ff.ff.ffff
580 20:43:39.753462 PCH Hsio Version = 4.0.0.0
581 20:43:39.757231 Reference Code - SA - System Agent = a.0.4c.31
582 20:43:39.760675 Reference Code - MRC = 2.0.0.1
583 20:43:39.763904 SA - PCIe Version = a.0.4c.31
584 20:43:39.767256 SA-CRID Status = Disabled
585 20:43:39.770469 SA-CRID Original Value = 0.0.0.1
586 20:43:39.770568 SA-CRID New Value = 0.0.0.1
587 20:43:39.773993 OPROM - VBIOS = ff.ff.ff.ffff
588 20:43:39.780787 IO Manageability Engine FW Version = 11.1.4.0
589 20:43:39.783801 PHY Build Version = 0.0.0.e0
590 20:43:39.787225 Thunderbolt(TM) FW Version = 0.0.0.0
591 20:43:39.793631 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 20:43:39.793733 ITSS IRQ Polarities Before:
593 20:43:39.797297 IPC0: 0xffffffff
594 20:43:39.800614 IPC1: 0xffffffff
595 20:43:39.800698 IPC2: 0xffffffff
596 20:43:39.803584 IPC3: 0xffffffff
597 20:43:39.803669 ITSS IRQ Polarities After:
598 20:43:39.807219 IPC0: 0xffffffff
599 20:43:39.807303 IPC1: 0xffffffff
600 20:43:39.810249 IPC2: 0xffffffff
601 20:43:39.813817 IPC3: 0xffffffff
602 20:43:39.816893 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 20:43:39.827390 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 20:43:39.840511 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 20:43:39.853669 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 20:43:39.860149 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
607 20:43:39.860234 Enumerating buses...
608 20:43:39.866827 Show all devs... Before device enumeration.
609 20:43:39.866912 Root Device: enabled 1
610 20:43:39.870437 DOMAIN: 0000: enabled 1
611 20:43:39.873420 CPU_CLUSTER: 0: enabled 1
612 20:43:39.876926 PCI: 00:00.0: enabled 1
613 20:43:39.877011 PCI: 00:02.0: enabled 1
614 20:43:39.880007 PCI: 00:04.0: enabled 1
615 20:43:39.883194 PCI: 00:05.0: enabled 1
616 20:43:39.883279 PCI: 00:06.0: enabled 0
617 20:43:39.886696 PCI: 00:07.0: enabled 0
618 20:43:39.889755 PCI: 00:07.1: enabled 0
619 20:43:39.894105 PCI: 00:07.2: enabled 0
620 20:43:39.894201 PCI: 00:07.3: enabled 0
621 20:43:39.897200 PCI: 00:08.0: enabled 1
622 20:43:39.899870 PCI: 00:09.0: enabled 0
623 20:43:39.903190 PCI: 00:0a.0: enabled 0
624 20:43:39.903275 PCI: 00:0d.0: enabled 1
625 20:43:39.906412 PCI: 00:0d.1: enabled 0
626 20:43:39.909913 PCI: 00:0d.2: enabled 0
627 20:43:39.913365 PCI: 00:0d.3: enabled 0
628 20:43:39.913449 PCI: 00:0e.0: enabled 0
629 20:43:39.916400 PCI: 00:10.2: enabled 1
630 20:43:39.919828 PCI: 00:10.6: enabled 0
631 20:43:39.919912 PCI: 00:10.7: enabled 0
632 20:43:39.923263 PCI: 00:12.0: enabled 0
633 20:43:39.926721 PCI: 00:12.6: enabled 0
634 20:43:39.929757 PCI: 00:13.0: enabled 0
635 20:43:39.929842 PCI: 00:14.0: enabled 1
636 20:43:39.933161 PCI: 00:14.1: enabled 0
637 20:43:39.936448 PCI: 00:14.2: enabled 1
638 20:43:39.939774 PCI: 00:14.3: enabled 1
639 20:43:39.939859 PCI: 00:15.0: enabled 1
640 20:43:39.943057 PCI: 00:15.1: enabled 1
641 20:43:39.946367 PCI: 00:15.2: enabled 1
642 20:43:39.949796 PCI: 00:15.3: enabled 1
643 20:43:39.949880 PCI: 00:16.0: enabled 1
644 20:43:39.953022 PCI: 00:16.1: enabled 0
645 20:43:39.956544 PCI: 00:16.2: enabled 0
646 20:43:39.959817 PCI: 00:16.3: enabled 0
647 20:43:39.959902 PCI: 00:16.4: enabled 0
648 20:43:39.963396 PCI: 00:16.5: enabled 0
649 20:43:39.966295 PCI: 00:17.0: enabled 1
650 20:43:39.966397 PCI: 00:19.0: enabled 0
651 20:43:39.969716 PCI: 00:19.1: enabled 1
652 20:43:39.973086 PCI: 00:19.2: enabled 0
653 20:43:39.976289 PCI: 00:1c.0: enabled 1
654 20:43:39.976373 PCI: 00:1c.1: enabled 0
655 20:43:39.979542 PCI: 00:1c.2: enabled 0
656 20:43:39.982882 PCI: 00:1c.3: enabled 0
657 20:43:39.986232 PCI: 00:1c.4: enabled 0
658 20:43:39.986330 PCI: 00:1c.5: enabled 0
659 20:43:39.989329 PCI: 00:1c.6: enabled 1
660 20:43:39.993026 PCI: 00:1c.7: enabled 0
661 20:43:39.996258 PCI: 00:1d.0: enabled 1
662 20:43:39.996343 PCI: 00:1d.1: enabled 0
663 20:43:39.999321 PCI: 00:1d.2: enabled 1
664 20:43:40.002591 PCI: 00:1d.3: enabled 0
665 20:43:40.002765 PCI: 00:1e.0: enabled 1
666 20:43:40.006076 PCI: 00:1e.1: enabled 0
667 20:43:40.009363 PCI: 00:1e.2: enabled 1
668 20:43:40.012890 PCI: 00:1e.3: enabled 1
669 20:43:40.012976 PCI: 00:1f.0: enabled 1
670 20:43:40.016358 PCI: 00:1f.1: enabled 0
671 20:43:40.019815 PCI: 00:1f.2: enabled 1
672 20:43:40.023038 PCI: 00:1f.3: enabled 1
673 20:43:40.023122 PCI: 00:1f.4: enabled 0
674 20:43:40.026059 PCI: 00:1f.5: enabled 1
675 20:43:40.029260 PCI: 00:1f.6: enabled 0
676 20:43:40.032855 PCI: 00:1f.7: enabled 0
677 20:43:40.032940 APIC: 00: enabled 1
678 20:43:40.035882 GENERIC: 0.0: enabled 1
679 20:43:40.039331 GENERIC: 0.0: enabled 1
680 20:43:40.039445 GENERIC: 1.0: enabled 1
681 20:43:40.042830 GENERIC: 0.0: enabled 1
682 20:43:40.046181 GENERIC: 1.0: enabled 1
683 20:43:40.049358 USB0 port 0: enabled 1
684 20:43:40.049466 GENERIC: 0.0: enabled 1
685 20:43:40.052579 USB0 port 0: enabled 1
686 20:43:40.055843 GENERIC: 0.0: enabled 1
687 20:43:40.055920 I2C: 00:1a: enabled 1
688 20:43:40.059639 I2C: 00:31: enabled 1
689 20:43:40.062545 I2C: 00:32: enabled 1
690 20:43:40.062689 I2C: 00:10: enabled 1
691 20:43:40.065982 I2C: 00:15: enabled 1
692 20:43:40.069587 GENERIC: 0.0: enabled 0
693 20:43:40.072715 GENERIC: 1.0: enabled 0
694 20:43:40.072792 GENERIC: 0.0: enabled 1
695 20:43:40.076230 SPI: 00: enabled 1
696 20:43:40.079537 SPI: 00: enabled 1
697 20:43:40.079630 PNP: 0c09.0: enabled 1
698 20:43:40.082616 GENERIC: 0.0: enabled 1
699 20:43:40.085735 USB3 port 0: enabled 1
700 20:43:40.085811 USB3 port 1: enabled 1
701 20:43:40.089197 USB3 port 2: enabled 0
702 20:43:40.092678 USB3 port 3: enabled 0
703 20:43:40.092763 USB2 port 0: enabled 0
704 20:43:40.096129 USB2 port 1: enabled 1
705 20:43:40.099410 USB2 port 2: enabled 1
706 20:43:40.102293 USB2 port 3: enabled 0
707 20:43:40.102398 USB2 port 4: enabled 1
708 20:43:40.105716 USB2 port 5: enabled 0
709 20:43:40.108948 USB2 port 6: enabled 0
710 20:43:40.109067 USB2 port 7: enabled 0
711 20:43:40.112385 USB2 port 8: enabled 0
712 20:43:40.115950 USB2 port 9: enabled 0
713 20:43:40.119043 USB3 port 0: enabled 0
714 20:43:40.119153 USB3 port 1: enabled 1
715 20:43:40.122523 USB3 port 2: enabled 0
716 20:43:40.126027 USB3 port 3: enabled 0
717 20:43:40.126211 GENERIC: 0.0: enabled 1
718 20:43:40.129119 GENERIC: 1.0: enabled 1
719 20:43:40.132436 APIC: 01: enabled 1
720 20:43:40.132610 APIC: 05: enabled 1
721 20:43:40.135999 APIC: 02: enabled 1
722 20:43:40.139393 APIC: 07: enabled 1
723 20:43:40.139616 APIC: 06: enabled 1
724 20:43:40.142861 APIC: 04: enabled 1
725 20:43:40.143085 APIC: 03: enabled 1
726 20:43:40.145947 Compare with tree...
727 20:43:40.149035 Root Device: enabled 1
728 20:43:40.152492 DOMAIN: 0000: enabled 1
729 20:43:40.152671 PCI: 00:00.0: enabled 1
730 20:43:40.155693 PCI: 00:02.0: enabled 1
731 20:43:40.159205 PCI: 00:04.0: enabled 1
732 20:43:40.162453 GENERIC: 0.0: enabled 1
733 20:43:40.165941 PCI: 00:05.0: enabled 1
734 20:43:40.166120 PCI: 00:06.0: enabled 0
735 20:43:40.169135 PCI: 00:07.0: enabled 0
736 20:43:40.172646 GENERIC: 0.0: enabled 1
737 20:43:40.175699 PCI: 00:07.1: enabled 0
738 20:43:40.179134 GENERIC: 1.0: enabled 1
739 20:43:40.179392 PCI: 00:07.2: enabled 0
740 20:43:40.182278 GENERIC: 0.0: enabled 1
741 20:43:40.185899 PCI: 00:07.3: enabled 0
742 20:43:40.189539 GENERIC: 1.0: enabled 1
743 20:43:40.192530 PCI: 00:08.0: enabled 1
744 20:43:40.192798 PCI: 00:09.0: enabled 0
745 20:43:40.195612 PCI: 00:0a.0: enabled 0
746 20:43:40.199179 PCI: 00:0d.0: enabled 1
747 20:43:40.202411 USB0 port 0: enabled 1
748 20:43:40.205598 USB3 port 0: enabled 1
749 20:43:40.205902 USB3 port 1: enabled 1
750 20:43:40.208856 USB3 port 2: enabled 0
751 20:43:40.212233 USB3 port 3: enabled 0
752 20:43:40.215176 PCI: 00:0d.1: enabled 0
753 20:43:40.218856 PCI: 00:0d.2: enabled 0
754 20:43:40.222084 GENERIC: 0.0: enabled 1
755 20:43:40.222331 PCI: 00:0d.3: enabled 0
756 20:43:40.225656 PCI: 00:0e.0: enabled 0
757 20:43:40.228679 PCI: 00:10.2: enabled 1
758 20:43:40.232063 PCI: 00:10.6: enabled 0
759 20:43:40.235790 PCI: 00:10.7: enabled 0
760 20:43:40.236097 PCI: 00:12.0: enabled 0
761 20:43:40.239070 PCI: 00:12.6: enabled 0
762 20:43:40.242002 PCI: 00:13.0: enabled 0
763 20:43:40.245233 PCI: 00:14.0: enabled 1
764 20:43:40.248638 USB0 port 0: enabled 1
765 20:43:40.248948 USB2 port 0: enabled 0
766 20:43:40.252350 USB2 port 1: enabled 1
767 20:43:40.255407 USB2 port 2: enabled 1
768 20:43:40.258918 USB2 port 3: enabled 0
769 20:43:40.262152 USB2 port 4: enabled 1
770 20:43:40.262490 USB2 port 5: enabled 0
771 20:43:40.265307 USB2 port 6: enabled 0
772 20:43:40.268794 USB2 port 7: enabled 0
773 20:43:40.271747 USB2 port 8: enabled 0
774 20:43:40.275194 USB2 port 9: enabled 0
775 20:43:40.278954 USB3 port 0: enabled 0
776 20:43:40.279264 USB3 port 1: enabled 1
777 20:43:40.281848 USB3 port 2: enabled 0
778 20:43:40.285594 USB3 port 3: enabled 0
779 20:43:40.288916 PCI: 00:14.1: enabled 0
780 20:43:40.291885 PCI: 00:14.2: enabled 1
781 20:43:40.292357 PCI: 00:14.3: enabled 1
782 20:43:40.295604 GENERIC: 0.0: enabled 1
783 20:43:40.298510 PCI: 00:15.0: enabled 1
784 20:43:40.301934 I2C: 00:1a: enabled 1
785 20:43:40.305216 I2C: 00:31: enabled 1
786 20:43:40.305652 I2C: 00:32: enabled 1
787 20:43:40.308859 PCI: 00:15.1: enabled 1
788 20:43:40.311583 I2C: 00:10: enabled 1
789 20:43:40.314923 PCI: 00:15.2: enabled 1
790 20:43:40.315353 PCI: 00:15.3: enabled 1
791 20:43:40.318599 PCI: 00:16.0: enabled 1
792 20:43:40.322300 PCI: 00:16.1: enabled 0
793 20:43:40.324903 PCI: 00:16.2: enabled 0
794 20:43:40.328296 PCI: 00:16.3: enabled 0
795 20:43:40.328865 PCI: 00:16.4: enabled 0
796 20:43:40.331984 PCI: 00:16.5: enabled 0
797 20:43:40.335047 PCI: 00:17.0: enabled 1
798 20:43:40.338859 PCI: 00:19.0: enabled 0
799 20:43:40.341750 PCI: 00:19.1: enabled 1
800 20:43:40.342190 I2C: 00:15: enabled 1
801 20:43:40.344915 PCI: 00:19.2: enabled 0
802 20:43:40.348590 PCI: 00:1d.0: enabled 1
803 20:43:40.351724 GENERIC: 0.0: enabled 1
804 20:43:40.354691 PCI: 00:1e.0: enabled 1
805 20:43:40.355156 PCI: 00:1e.1: enabled 0
806 20:43:40.405225 PCI: 00:1e.2: enabled 1
807 20:43:40.405886 SPI: 00: enabled 1
808 20:43:40.406383 PCI: 00:1e.3: enabled 1
809 20:43:40.406910 SPI: 00: enabled 1
810 20:43:40.407376 PCI: 00:1f.0: enabled 1
811 20:43:40.408221 PNP: 0c09.0: enabled 1
812 20:43:40.408688 PCI: 00:1f.1: enabled 0
813 20:43:40.409017 PCI: 00:1f.2: enabled 1
814 20:43:40.409328 GENERIC: 0.0: enabled 1
815 20:43:40.409625 GENERIC: 0.0: enabled 1
816 20:43:40.409919 GENERIC: 1.0: enabled 1
817 20:43:40.410211 PCI: 00:1f.3: enabled 1
818 20:43:40.410496 PCI: 00:1f.4: enabled 0
819 20:43:40.410825 PCI: 00:1f.5: enabled 1
820 20:43:40.411110 PCI: 00:1f.6: enabled 0
821 20:43:40.411389 PCI: 00:1f.7: enabled 0
822 20:43:40.411667 CPU_CLUSTER: 0: enabled 1
823 20:43:40.411947 APIC: 00: enabled 1
824 20:43:40.412227 APIC: 01: enabled 1
825 20:43:40.423666 APIC: 05: enabled 1
826 20:43:40.424229 APIC: 02: enabled 1
827 20:43:40.424593 APIC: 07: enabled 1
828 20:43:40.425248 APIC: 06: enabled 1
829 20:43:40.425590 APIC: 04: enabled 1
830 20:43:40.425904 APIC: 03: enabled 1
831 20:43:40.427378 Root Device scanning...
832 20:43:40.427807 scan_static_bus for Root Device
833 20:43:40.431705 DOMAIN: 0000 enabled
834 20:43:40.432138 CPU_CLUSTER: 0 enabled
835 20:43:40.434511 DOMAIN: 0000 scanning...
836 20:43:40.435195 PCI: pci_scan_bus for bus 00
837 20:43:40.438035 PCI: 00:00.0 [8086/0000] ops
838 20:43:40.441639 PCI: 00:00.0 [8086/9a12] enabled
839 20:43:40.444654 PCI: 00:02.0 [8086/0000] bus ops
840 20:43:40.447928 PCI: 00:02.0 [8086/9a40] enabled
841 20:43:40.451599 PCI: 00:04.0 [8086/0000] bus ops
842 20:43:40.454964 PCI: 00:04.0 [8086/9a03] enabled
843 20:43:40.458402 PCI: 00:05.0 [8086/9a19] enabled
844 20:43:40.461347 PCI: 00:07.0 [0000/0000] hidden
845 20:43:40.465109 PCI: 00:08.0 [8086/9a11] enabled
846 20:43:40.467687 PCI: 00:0a.0 [8086/9a0d] disabled
847 20:43:40.471637 PCI: 00:0d.0 [8086/0000] bus ops
848 20:43:40.474687 PCI: 00:0d.0 [8086/9a13] enabled
849 20:43:40.477868 PCI: 00:14.0 [8086/0000] bus ops
850 20:43:40.481705 PCI: 00:14.0 [8086/a0ed] enabled
851 20:43:40.484345 PCI: 00:14.2 [8086/a0ef] enabled
852 20:43:40.487917 PCI: 00:14.3 [8086/0000] bus ops
853 20:43:40.491082 PCI: 00:14.3 [8086/a0f0] enabled
854 20:43:40.494955 PCI: 00:15.0 [8086/0000] bus ops
855 20:43:40.497916 PCI: 00:15.0 [8086/a0e8] enabled
856 20:43:40.501144 PCI: 00:15.1 [8086/0000] bus ops
857 20:43:40.505091 PCI: 00:15.1 [8086/a0e9] enabled
858 20:43:40.508161 PCI: 00:15.2 [8086/0000] bus ops
859 20:43:40.511142 PCI: 00:15.2 [8086/a0ea] enabled
860 20:43:40.514434 PCI: 00:15.3 [8086/0000] bus ops
861 20:43:40.517764 PCI: 00:15.3 [8086/a0eb] enabled
862 20:43:40.521242 PCI: 00:16.0 [8086/0000] ops
863 20:43:40.524270 PCI: 00:16.0 [8086/a0e0] enabled
864 20:43:40.531195 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 20:43:40.534219 PCI: 00:19.0 [8086/0000] bus ops
866 20:43:40.537446 PCI: 00:19.0 [8086/a0c5] disabled
867 20:43:40.541187 PCI: 00:19.1 [8086/0000] bus ops
868 20:43:40.544384 PCI: 00:19.1 [8086/a0c6] enabled
869 20:43:40.547749 PCI: 00:1d.0 [8086/0000] bus ops
870 20:43:40.550736 PCI: 00:1d.0 [8086/a0b0] enabled
871 20:43:40.554524 PCI: 00:1e.0 [8086/0000] ops
872 20:43:40.557562 PCI: 00:1e.0 [8086/a0a8] enabled
873 20:43:40.560759 PCI: 00:1e.2 [8086/0000] bus ops
874 20:43:40.564344 PCI: 00:1e.2 [8086/a0aa] enabled
875 20:43:40.567497 PCI: 00:1e.3 [8086/0000] bus ops
876 20:43:40.571162 PCI: 00:1e.3 [8086/a0ab] enabled
877 20:43:40.574137 PCI: 00:1f.0 [8086/0000] bus ops
878 20:43:40.577185 PCI: 00:1f.0 [8086/a087] enabled
879 20:43:40.577617 RTC Init
880 20:43:40.580639 Set power on after power failure.
881 20:43:40.583864 Disabling Deep S3
882 20:43:40.588001 Disabling Deep S3
883 20:43:40.588433 Disabling Deep S4
884 20:43:40.590814 Disabling Deep S4
885 20:43:40.591281 Disabling Deep S5
886 20:43:40.594315 Disabling Deep S5
887 20:43:40.597869 PCI: 00:1f.2 [0000/0000] hidden
888 20:43:40.601158 PCI: 00:1f.3 [8086/0000] bus ops
889 20:43:40.604071 PCI: 00:1f.3 [8086/a0c8] enabled
890 20:43:40.607247 PCI: 00:1f.5 [8086/0000] bus ops
891 20:43:40.610538 PCI: 00:1f.5 [8086/a0a4] enabled
892 20:43:40.614125 PCI: Leftover static devices:
893 20:43:40.614552 PCI: 00:10.2
894 20:43:40.617098 PCI: 00:10.6
895 20:43:40.617530 PCI: 00:10.7
896 20:43:40.618051 PCI: 00:06.0
897 20:43:40.620816 PCI: 00:07.1
898 20:43:40.621288 PCI: 00:07.2
899 20:43:40.624316 PCI: 00:07.3
900 20:43:40.624746 PCI: 00:09.0
901 20:43:40.625085 PCI: 00:0d.1
902 20:43:40.627249 PCI: 00:0d.2
903 20:43:40.627805 PCI: 00:0d.3
904 20:43:40.630415 PCI: 00:0e.0
905 20:43:40.630915 PCI: 00:12.0
906 20:43:40.634158 PCI: 00:12.6
907 20:43:40.634591 PCI: 00:13.0
908 20:43:40.634998 PCI: 00:14.1
909 20:43:40.637625 PCI: 00:16.1
910 20:43:40.638225 PCI: 00:16.2
911 20:43:40.640398 PCI: 00:16.3
912 20:43:40.640823 PCI: 00:16.4
913 20:43:40.641159 PCI: 00:16.5
914 20:43:40.644062 PCI: 00:17.0
915 20:43:40.644528 PCI: 00:19.2
916 20:43:40.647340 PCI: 00:1e.1
917 20:43:40.647863 PCI: 00:1f.1
918 20:43:40.648338 PCI: 00:1f.4
919 20:43:40.650381 PCI: 00:1f.6
920 20:43:40.650932 PCI: 00:1f.7
921 20:43:40.653968 PCI: Check your devicetree.cb.
922 20:43:40.657352 PCI: 00:02.0 scanning...
923 20:43:40.660366 scan_generic_bus for PCI: 00:02.0
924 20:43:40.664368 scan_generic_bus for PCI: 00:02.0 done
925 20:43:40.670338 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 20:43:40.671094 PCI: 00:04.0 scanning...
927 20:43:40.677648 scan_generic_bus for PCI: 00:04.0
928 20:43:40.678311 GENERIC: 0.0 enabled
929 20:43:40.683984 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 20:43:40.687026 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 20:43:40.690248 PCI: 00:0d.0 scanning...
932 20:43:40.694295 scan_static_bus for PCI: 00:0d.0
933 20:43:40.697166 USB0 port 0 enabled
934 20:43:40.700585 USB0 port 0 scanning...
935 20:43:40.703709 scan_static_bus for USB0 port 0
936 20:43:40.704138 USB3 port 0 enabled
937 20:43:40.707523 USB3 port 1 enabled
938 20:43:40.710742 USB3 port 2 disabled
939 20:43:40.711271 USB3 port 3 disabled
940 20:43:40.713995 USB3 port 0 scanning...
941 20:43:40.716887 scan_static_bus for USB3 port 0
942 20:43:40.720272 scan_static_bus for USB3 port 0 done
943 20:43:40.723796 scan_bus: bus USB3 port 0 finished in 6 msecs
944 20:43:40.726813 USB3 port 1 scanning...
945 20:43:40.730313 scan_static_bus for USB3 port 1
946 20:43:40.733609 scan_static_bus for USB3 port 1 done
947 20:43:40.740079 scan_bus: bus USB3 port 1 finished in 6 msecs
948 20:43:40.743253 scan_static_bus for USB0 port 0 done
949 20:43:40.746802 scan_bus: bus USB0 port 0 finished in 43 msecs
950 20:43:40.749919 scan_static_bus for PCI: 00:0d.0 done
951 20:43:40.756965 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 20:43:40.760012 PCI: 00:14.0 scanning...
953 20:43:40.763226 scan_static_bus for PCI: 00:14.0
954 20:43:40.763653 USB0 port 0 enabled
955 20:43:40.766283 USB0 port 0 scanning...
956 20:43:40.769826 scan_static_bus for USB0 port 0
957 20:43:40.773373 USB2 port 0 disabled
958 20:43:40.773894 USB2 port 1 enabled
959 20:43:40.776448 USB2 port 2 enabled
960 20:43:40.779788 USB2 port 3 disabled
961 20:43:40.780212 USB2 port 4 enabled
962 20:43:40.783132 USB2 port 5 disabled
963 20:43:40.786362 USB2 port 6 disabled
964 20:43:40.786834 USB2 port 7 disabled
965 20:43:40.789998 USB2 port 8 disabled
966 20:43:40.793084 USB2 port 9 disabled
967 20:43:40.793649 USB3 port 0 disabled
968 20:43:40.796348 USB3 port 1 enabled
969 20:43:40.796773 USB3 port 2 disabled
970 20:43:40.800171 USB3 port 3 disabled
971 20:43:40.803208 USB2 port 1 scanning...
972 20:43:40.806326 scan_static_bus for USB2 port 1
973 20:43:40.809747 scan_static_bus for USB2 port 1 done
974 20:43:40.813014 scan_bus: bus USB2 port 1 finished in 6 msecs
975 20:43:40.816103 USB2 port 2 scanning...
976 20:43:40.820080 scan_static_bus for USB2 port 2
977 20:43:40.822727 scan_static_bus for USB2 port 2 done
978 20:43:40.829996 scan_bus: bus USB2 port 2 finished in 6 msecs
979 20:43:40.830527 USB2 port 4 scanning...
980 20:43:40.832977 scan_static_bus for USB2 port 4
981 20:43:40.839273 scan_static_bus for USB2 port 4 done
982 20:43:40.842691 scan_bus: bus USB2 port 4 finished in 6 msecs
983 20:43:40.846490 USB3 port 1 scanning...
984 20:43:40.849260 scan_static_bus for USB3 port 1
985 20:43:40.852684 scan_static_bus for USB3 port 1 done
986 20:43:40.856100 scan_bus: bus USB3 port 1 finished in 6 msecs
987 20:43:40.859695 scan_static_bus for USB0 port 0 done
988 20:43:40.866377 scan_bus: bus USB0 port 0 finished in 93 msecs
989 20:43:40.869203 scan_static_bus for PCI: 00:14.0 done
990 20:43:40.872745 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 20:43:40.876148 PCI: 00:14.3 scanning...
992 20:43:40.879573 scan_static_bus for PCI: 00:14.3
993 20:43:40.882504 GENERIC: 0.0 enabled
994 20:43:40.885754 scan_static_bus for PCI: 00:14.3 done
995 20:43:40.889140 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 20:43:40.892381 PCI: 00:15.0 scanning...
997 20:43:40.895966 scan_static_bus for PCI: 00:15.0
998 20:43:40.898866 I2C: 00:1a enabled
999 20:43:40.899299 I2C: 00:31 enabled
1000 20:43:40.902205 I2C: 00:32 enabled
1001 20:43:40.905604 scan_static_bus for PCI: 00:15.0 done
1002 20:43:40.912152 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 20:43:40.912728 PCI: 00:15.1 scanning...
1004 20:43:40.915590 scan_static_bus for PCI: 00:15.1
1005 20:43:40.918836 I2C: 00:10 enabled
1006 20:43:40.922942 scan_static_bus for PCI: 00:15.1 done
1007 20:43:40.929234 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 20:43:40.929891 PCI: 00:15.2 scanning...
1009 20:43:40.932155 scan_static_bus for PCI: 00:15.2
1010 20:43:40.938759 scan_static_bus for PCI: 00:15.2 done
1011 20:43:40.942564 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 20:43:40.945731 PCI: 00:15.3 scanning...
1013 20:43:40.949356 scan_static_bus for PCI: 00:15.3
1014 20:43:40.952254 scan_static_bus for PCI: 00:15.3 done
1015 20:43:40.955880 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 20:43:40.958980 PCI: 00:19.1 scanning...
1017 20:43:40.961968 scan_static_bus for PCI: 00:19.1
1018 20:43:40.965844 I2C: 00:15 enabled
1019 20:43:40.968872 scan_static_bus for PCI: 00:19.1 done
1020 20:43:40.972335 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 20:43:40.975258 PCI: 00:1d.0 scanning...
1022 20:43:40.978536 do_pci_scan_bridge for PCI: 00:1d.0
1023 20:43:40.981678 PCI: pci_scan_bus for bus 01
1024 20:43:40.985048 PCI: 01:00.0 [15b7/5009] enabled
1025 20:43:40.988825 GENERIC: 0.0 enabled
1026 20:43:40.991846 Enabling Common Clock Configuration
1027 20:43:40.995242 L1 Sub-State supported from root port 29
1028 20:43:40.998447 L1 Sub-State Support = 0x5
1029 20:43:41.002210 CommonModeRestoreTime = 0x28
1030 20:43:41.005581 Power On Value = 0x16, Power On Scale = 0x0
1031 20:43:41.008326 ASPM: Enabled L1
1032 20:43:41.013516 PCIe: Max_Payload_Size adjusted to 128
1033 20:43:41.015516 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 20:43:41.019069 PCI: 00:1e.2 scanning...
1035 20:43:41.022235 scan_generic_bus for PCI: 00:1e.2
1036 20:43:41.025540 SPI: 00 enabled
1037 20:43:41.032146 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 20:43:41.035876 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 20:43:41.039056 PCI: 00:1e.3 scanning...
1040 20:43:41.042404 scan_generic_bus for PCI: 00:1e.3
1041 20:43:41.042858 SPI: 00 enabled
1042 20:43:41.048700 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 20:43:41.055534 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 20:43:41.056040 PCI: 00:1f.0 scanning...
1045 20:43:41.059211 scan_static_bus for PCI: 00:1f.0
1046 20:43:41.062231 PNP: 0c09.0 enabled
1047 20:43:41.065597 PNP: 0c09.0 scanning...
1048 20:43:41.068717 scan_static_bus for PNP: 0c09.0
1049 20:43:41.072130 scan_static_bus for PNP: 0c09.0 done
1050 20:43:41.075318 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 20:43:41.082077 scan_static_bus for PCI: 00:1f.0 done
1052 20:43:41.085322 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 20:43:41.088537 PCI: 00:1f.2 scanning...
1054 20:43:41.091912 scan_static_bus for PCI: 00:1f.2
1055 20:43:41.092432 GENERIC: 0.0 enabled
1056 20:43:41.095241 GENERIC: 0.0 scanning...
1057 20:43:41.098452 scan_static_bus for GENERIC: 0.0
1058 20:43:41.101666 GENERIC: 0.0 enabled
1059 20:43:41.105438 GENERIC: 1.0 enabled
1060 20:43:41.108370 scan_static_bus for GENERIC: 0.0 done
1061 20:43:41.111870 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 20:43:41.115180 scan_static_bus for PCI: 00:1f.2 done
1063 20:43:41.121701 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 20:43:41.125280 PCI: 00:1f.3 scanning...
1065 20:43:41.128839 scan_static_bus for PCI: 00:1f.3
1066 20:43:41.131799 scan_static_bus for PCI: 00:1f.3 done
1067 20:43:41.134691 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 20:43:41.138264 PCI: 00:1f.5 scanning...
1069 20:43:41.142080 scan_generic_bus for PCI: 00:1f.5
1070 20:43:41.144949 scan_generic_bus for PCI: 00:1f.5 done
1071 20:43:41.151749 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 20:43:41.154746 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 20:43:41.158451 scan_static_bus for Root Device done
1074 20:43:41.164537 scan_bus: bus Root Device finished in 735 msecs
1075 20:43:41.165043 done
1076 20:43:41.171459 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 20:43:41.174948 Chrome EC: UHEPI supported
1078 20:43:41.181221 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 20:43:41.184762 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 20:43:41.191567 SPI flash protection: WPSW=0 SRP0=0
1081 20:43:41.194442 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 20:43:41.201151 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 20:43:41.204969 found VGA at PCI: 00:02.0
1084 20:43:41.207969 Setting up VGA for PCI: 00:02.0
1085 20:43:41.211388 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 20:43:41.217942 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 20:43:41.218367 Allocating resources...
1088 20:43:41.221134 Reading resources...
1089 20:43:41.224581 Root Device read_resources bus 0 link: 0
1090 20:43:41.228498 DOMAIN: 0000 read_resources bus 0 link: 0
1091 20:43:41.235728 PCI: 00:04.0 read_resources bus 1 link: 0
1092 20:43:41.238488 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 20:43:41.245573 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 20:43:41.248898 USB0 port 0 read_resources bus 0 link: 0
1095 20:43:41.255499 USB0 port 0 read_resources bus 0 link: 0 done
1096 20:43:41.258832 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 20:43:41.262254 PCI: 00:14.0 read_resources bus 0 link: 0
1098 20:43:41.269069 USB0 port 0 read_resources bus 0 link: 0
1099 20:43:41.272267 USB0 port 0 read_resources bus 0 link: 0 done
1100 20:43:41.279236 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 20:43:41.282601 PCI: 00:14.3 read_resources bus 0 link: 0
1102 20:43:41.288716 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 20:43:41.291988 PCI: 00:15.0 read_resources bus 0 link: 0
1104 20:43:41.299094 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 20:43:41.302123 PCI: 00:15.1 read_resources bus 0 link: 0
1106 20:43:41.309238 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 20:43:41.312285 PCI: 00:19.1 read_resources bus 0 link: 0
1108 20:43:41.319100 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 20:43:41.322530 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 20:43:41.329413 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 20:43:41.332212 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 20:43:41.339049 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 20:43:41.342701 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 20:43:41.349304 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 20:43:41.352476 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 20:43:41.359574 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 20:43:41.362454 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 20:43:41.365911 GENERIC: 0.0 read_resources bus 0 link: 0
1119 20:43:41.372755 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 20:43:41.376042 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 20:43:41.383291 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 20:43:41.386517 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 20:43:41.392772 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 20:43:41.396111 Root Device read_resources bus 0 link: 0 done
1125 20:43:41.399709 Done reading resources.
1126 20:43:41.406501 Show resources in subtree (Root Device)...After reading.
1127 20:43:41.409657 Root Device child on link 0 DOMAIN: 0000
1128 20:43:41.412758 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 20:43:41.422940 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 20:43:41.432737 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 20:43:41.436252 PCI: 00:00.0
1132 20:43:41.446250 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 20:43:41.452845 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 20:43:41.462586 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 20:43:41.473043 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 20:43:41.482759 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 20:43:41.493040 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 20:43:41.499357 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 20:43:41.509293 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 20:43:41.519195 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 20:43:41.529020 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 20:43:41.538891 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 20:43:41.549128 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 20:43:41.555673 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 20:43:41.565299 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 20:43:41.574969 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 20:43:41.585445 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 20:43:41.595138 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 20:43:41.605092 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 20:43:41.611561 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 20:43:41.622066 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 20:43:41.625374 PCI: 00:02.0
1153 20:43:41.634684 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 20:43:41.645108 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 20:43:41.655141 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 20:43:41.658124 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 20:43:41.667930 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 20:43:41.671122 GENERIC: 0.0
1159 20:43:41.671478 PCI: 00:05.0
1160 20:43:41.681381 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 20:43:41.687931 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 20:43:41.688377 GENERIC: 0.0
1163 20:43:41.691046 PCI: 00:08.0
1164 20:43:41.701327 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 20:43:41.702162 PCI: 00:0a.0
1166 20:43:41.704640 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 20:43:41.714278 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 20:43:41.721363 USB0 port 0 child on link 0 USB3 port 0
1169 20:43:41.721925 USB3 port 0
1170 20:43:41.724669 USB3 port 1
1171 20:43:41.725320 USB3 port 2
1172 20:43:41.727535 USB3 port 3
1173 20:43:41.731540 PCI: 00:14.0 child on link 0 USB0 port 0
1174 20:43:41.740803 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 20:43:41.747717 USB0 port 0 child on link 0 USB2 port 0
1176 20:43:41.747971 USB2 port 0
1177 20:43:41.750659 USB2 port 1
1178 20:43:41.750865 USB2 port 2
1179 20:43:41.754424 USB2 port 3
1180 20:43:41.754687 USB2 port 4
1181 20:43:41.757387 USB2 port 5
1182 20:43:41.757617 USB2 port 6
1183 20:43:41.760899 USB2 port 7
1184 20:43:41.761129 USB2 port 8
1185 20:43:41.763961 USB2 port 9
1186 20:43:41.764220 USB3 port 0
1187 20:43:41.767357 USB3 port 1
1188 20:43:41.767587 USB3 port 2
1189 20:43:41.770882 USB3 port 3
1190 20:43:41.773989 PCI: 00:14.2
1191 20:43:41.784090 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 20:43:41.794354 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 20:43:41.797602 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 20:43:41.807613 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 20:43:41.808042 GENERIC: 0.0
1196 20:43:41.813964 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 20:43:41.824212 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 20:43:41.824852 I2C: 00:1a
1199 20:43:41.827328 I2C: 00:31
1200 20:43:41.827748 I2C: 00:32
1201 20:43:41.830454 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 20:43:41.840465 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 20:43:41.844088 I2C: 00:10
1204 20:43:41.844710 PCI: 00:15.2
1205 20:43:41.854254 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 20:43:41.857281 PCI: 00:15.3
1207 20:43:41.866949 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 20:43:41.867386 PCI: 00:16.0
1209 20:43:41.876626 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 20:43:41.879959 PCI: 00:19.0
1211 20:43:41.883558 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 20:43:41.893386 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 20:43:41.896582 I2C: 00:15
1214 20:43:41.900297 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 20:43:41.909816 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 20:43:41.919703 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 20:43:41.926288 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 20:43:41.929821 GENERIC: 0.0
1219 20:43:41.929958 PCI: 01:00.0
1220 20:43:41.940015 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 20:43:41.949846 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 20:43:41.953271 PCI: 00:1e.0
1223 20:43:41.963361 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 20:43:41.966519 PCI: 00:1e.2 child on link 0 SPI: 00
1225 20:43:41.976631 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 20:43:41.980024 SPI: 00
1227 20:43:41.983646 PCI: 00:1e.3 child on link 0 SPI: 00
1228 20:43:41.993019 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 20:43:41.993128 SPI: 00
1230 20:43:41.999811 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 20:43:42.006605 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 20:43:42.009481 PNP: 0c09.0
1233 20:43:42.016644 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 20:43:42.022729 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 20:43:42.032848 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 20:43:42.039695 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 20:43:42.045998 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 20:43:42.046426 GENERIC: 0.0
1239 20:43:42.050323 GENERIC: 1.0
1240 20:43:42.050874 PCI: 00:1f.3
1241 20:43:42.059499 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 20:43:42.072944 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 20:43:42.073367 PCI: 00:1f.5
1244 20:43:42.083165 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 20:43:42.086136 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 20:43:42.086561 APIC: 00
1247 20:43:42.089310 APIC: 01
1248 20:43:42.089778 APIC: 05
1249 20:43:42.092741 APIC: 02
1250 20:43:42.093353 APIC: 07
1251 20:43:42.093885 APIC: 06
1252 20:43:42.095899 APIC: 04
1253 20:43:42.096342 APIC: 03
1254 20:43:42.102454 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 20:43:42.109040 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 20:43:42.115858 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 20:43:42.122864 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 20:43:42.125549 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 20:43:42.128725 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 20:43:42.138960 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 20:43:42.145307 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 20:43:42.151935 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 20:43:42.158796 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 20:43:42.165333 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 20:43:42.171955 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 20:43:42.182042 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 20:43:42.188404 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 20:43:42.191885 DOMAIN: 0000: Resource ranges:
1269 20:43:42.195061 * Base: 1000, Size: 800, Tag: 100
1270 20:43:42.198517 * Base: 1900, Size: e700, Tag: 100
1271 20:43:42.205204 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 20:43:42.211897 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 20:43:42.218370 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 20:43:42.224868 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 20:43:42.231615 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 20:43:42.241598 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 20:43:42.248248 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 20:43:42.254815 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 20:43:42.264957 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 20:43:42.271335 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 20:43:42.278196 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 20:43:42.288152 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 20:43:42.294792 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 20:43:42.301337 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 20:43:42.311290 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 20:43:42.317559 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 20:43:42.324712 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 20:43:42.334614 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 20:43:42.340846 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 20:43:42.347942 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 20:43:42.357533 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 20:43:42.363872 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 20:43:42.370638 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 20:43:42.380538 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 20:43:42.387216 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 20:43:42.390571 DOMAIN: 0000: Resource ranges:
1297 20:43:42.393647 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 20:43:42.400469 * Base: d0000000, Size: 28000000, Tag: 200
1299 20:43:42.403739 * Base: fa000000, Size: 1000000, Tag: 200
1300 20:43:42.406986 * Base: fb001000, Size: 2fff000, Tag: 200
1301 20:43:42.410536 * Base: fe010000, Size: 2e000, Tag: 200
1302 20:43:42.417076 * Base: fe03f000, Size: d41000, Tag: 200
1303 20:43:42.420495 * Base: fed88000, Size: 8000, Tag: 200
1304 20:43:42.423706 * Base: fed93000, Size: d000, Tag: 200
1305 20:43:42.426999 * Base: feda2000, Size: 1e000, Tag: 200
1306 20:43:42.433639 * Base: fede0000, Size: 1220000, Tag: 200
1307 20:43:42.437030 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 20:43:42.443752 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 20:43:42.450212 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 20:43:42.456842 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 20:43:42.463387 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 20:43:42.470443 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 20:43:42.476943 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 20:43:42.483398 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 20:43:42.489738 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 20:43:42.496796 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 20:43:42.503337 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 20:43:42.510434 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 20:43:42.516944 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 20:43:42.522904 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 20:43:42.530090 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 20:43:42.536878 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 20:43:42.543295 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 20:43:42.549853 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 20:43:42.556975 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 20:43:42.563081 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 20:43:42.570146 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 20:43:42.576360 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 20:43:42.583276 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 20:43:42.589502 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 20:43:42.600049 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 20:43:42.603184 PCI: 00:1d.0: Resource ranges:
1333 20:43:42.606134 * Base: 7fc00000, Size: 100000, Tag: 200
1334 20:43:42.612647 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 20:43:42.619452 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 20:43:42.629411 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 20:43:42.635873 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 20:43:42.639145 Root Device assign_resources, bus 0 link: 0
1339 20:43:42.645868 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 20:43:42.652664 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 20:43:42.662355 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 20:43:42.668796 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 20:43:42.675905 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 20:43:42.682552 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 20:43:42.685554 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 20:43:42.695396 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 20:43:42.702190 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 20:43:42.712135 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 20:43:42.715593 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 20:43:42.718652 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 20:43:42.728773 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 20:43:42.732062 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 20:43:42.739402 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 20:43:42.745376 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 20:43:42.755640 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 20:43:42.762822 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 20:43:42.765378 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 20:43:42.772205 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 20:43:42.778692 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 20:43:42.785049 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 20:43:42.788638 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 20:43:42.798572 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 20:43:42.802014 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 20:43:42.804958 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 20:43:42.815337 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 20:43:42.821380 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 20:43:42.831444 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 20:43:42.838305 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 20:43:42.844882 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 20:43:42.848218 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 20:43:42.857906 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 20:43:42.868093 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 20:43:42.874567 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 20:43:42.881657 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 20:43:42.887603 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 20:43:42.898192 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 20:43:42.901306 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 20:43:42.911525 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 20:43:42.914371 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 20:43:42.917910 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 20:43:42.927965 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 20:43:42.931169 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 20:43:42.937972 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 20:43:42.941514 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 20:43:42.945034 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 20:43:42.951180 LPC: Trying to open IO window from 800 size 1ff
1387 20:43:42.958141 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 20:43:42.967925 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 20:43:42.974034 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 20:43:42.981223 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 20:43:42.984354 Root Device assign_resources, bus 0 link: 0
1392 20:43:42.987814 Done setting resources.
1393 20:43:42.993862 Show resources in subtree (Root Device)...After assigning values.
1394 20:43:42.997226 Root Device child on link 0 DOMAIN: 0000
1395 20:43:43.000948 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 20:43:43.011102 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 20:43:43.020813 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 20:43:43.023868 PCI: 00:00.0
1399 20:43:43.033752 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 20:43:43.040418 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 20:43:43.050751 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 20:43:43.060596 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 20:43:43.070977 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 20:43:43.080621 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 20:43:43.090475 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 20:43:43.096831 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 20:43:43.107175 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 20:43:43.117211 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 20:43:43.127048 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 20:43:43.136803 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 20:43:43.143579 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 20:43:43.152998 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 20:43:43.163616 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 20:43:43.173167 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 20:43:43.182846 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 20:43:43.192864 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 20:43:43.203316 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 20:43:43.213176 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 20:43:43.213758 PCI: 00:02.0
1420 20:43:43.222880 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 20:43:43.232850 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 20:43:43.242565 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 20:43:43.249586 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 20:43:43.259180 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 20:43:43.259745 GENERIC: 0.0
1426 20:43:43.262762 PCI: 00:05.0
1427 20:43:43.272479 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 20:43:43.275917 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 20:43:43.279235 GENERIC: 0.0
1430 20:43:43.279808 PCI: 00:08.0
1431 20:43:43.288852 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 20:43:43.292515 PCI: 00:0a.0
1433 20:43:43.295585 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 20:43:43.305868 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 20:43:43.312219 USB0 port 0 child on link 0 USB3 port 0
1436 20:43:43.312798 USB3 port 0
1437 20:43:43.315468 USB3 port 1
1438 20:43:43.315940 USB3 port 2
1439 20:43:43.319135 USB3 port 3
1440 20:43:43.322319 PCI: 00:14.0 child on link 0 USB0 port 0
1441 20:43:43.331949 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 20:43:43.339067 USB0 port 0 child on link 0 USB2 port 0
1443 20:43:43.339490 USB2 port 0
1444 20:43:43.342421 USB2 port 1
1445 20:43:43.342979 USB2 port 2
1446 20:43:43.345701 USB2 port 3
1447 20:43:43.346219 USB2 port 4
1448 20:43:43.348806 USB2 port 5
1449 20:43:43.349334 USB2 port 6
1450 20:43:43.352348 USB2 port 7
1451 20:43:43.352786 USB2 port 8
1452 20:43:43.355264 USB2 port 9
1453 20:43:43.358550 USB3 port 0
1454 20:43:43.359121 USB3 port 1
1455 20:43:43.362398 USB3 port 2
1456 20:43:43.362967 USB3 port 3
1457 20:43:43.365656 PCI: 00:14.2
1458 20:43:43.375316 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 20:43:43.385679 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 20:43:43.388668 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 20:43:43.398698 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 20:43:43.401864 GENERIC: 0.0
1463 20:43:43.405221 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 20:43:43.415313 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 20:43:43.418351 I2C: 00:1a
1466 20:43:43.418979 I2C: 00:31
1467 20:43:43.421864 I2C: 00:32
1468 20:43:43.425197 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 20:43:43.435098 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 20:43:43.438913 I2C: 00:10
1471 20:43:43.439367 PCI: 00:15.2
1472 20:43:43.448341 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 20:43:43.451643 PCI: 00:15.3
1474 20:43:43.461638 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 20:43:43.462211 PCI: 00:16.0
1476 20:43:43.471798 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 20:43:43.474591 PCI: 00:19.0
1478 20:43:43.478570 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 20:43:43.487974 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 20:43:43.491365 I2C: 00:15
1481 20:43:43.494750 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 20:43:43.504651 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 20:43:43.517724 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 20:43:43.527993 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 20:43:43.528565 GENERIC: 0.0
1486 20:43:43.530921 PCI: 01:00.0
1487 20:43:43.540819 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 20:43:43.551187 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 20:43:43.551616 PCI: 00:1e.0
1490 20:43:43.564014 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 20:43:43.567395 PCI: 00:1e.2 child on link 0 SPI: 00
1492 20:43:43.577503 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 20:43:43.581161 SPI: 00
1494 20:43:43.583983 PCI: 00:1e.3 child on link 0 SPI: 00
1495 20:43:43.593913 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 20:43:43.594341 SPI: 00
1497 20:43:43.600857 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 20:43:43.607252 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 20:43:43.610477 PNP: 0c09.0
1500 20:43:43.617412 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 20:43:43.623822 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 20:43:43.630740 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 20:43:43.640598 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 20:43:43.646992 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 20:43:43.647436 GENERIC: 0.0
1506 20:43:43.650567 GENERIC: 1.0
1507 20:43:43.651022 PCI: 00:1f.3
1508 20:43:43.660753 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 20:43:43.674062 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 20:43:43.674592 PCI: 00:1f.5
1511 20:43:43.684094 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 20:43:43.687203 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 20:43:43.690542 APIC: 00
1514 20:43:43.691239 APIC: 01
1515 20:43:43.693678 APIC: 05
1516 20:43:43.694179 APIC: 02
1517 20:43:43.694519 APIC: 07
1518 20:43:43.696804 APIC: 06
1519 20:43:43.697263 APIC: 04
1520 20:43:43.697596 APIC: 03
1521 20:43:43.700817 Done allocating resources.
1522 20:43:43.707061 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1523 20:43:43.713860 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 20:43:43.716868 Configure GPIOs for I2S audio on UP4.
1525 20:43:43.724224 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 20:43:43.727008 Enabling resources...
1527 20:43:43.730431 PCI: 00:00.0 subsystem <- 8086/9a12
1528 20:43:43.733602 PCI: 00:00.0 cmd <- 06
1529 20:43:43.737184 PCI: 00:02.0 subsystem <- 8086/9a40
1530 20:43:43.740158 PCI: 00:02.0 cmd <- 03
1531 20:43:43.743566 PCI: 00:04.0 subsystem <- 8086/9a03
1532 20:43:43.746514 PCI: 00:04.0 cmd <- 02
1533 20:43:43.750041 PCI: 00:05.0 subsystem <- 8086/9a19
1534 20:43:43.750552 PCI: 00:05.0 cmd <- 02
1535 20:43:43.756462 PCI: 00:08.0 subsystem <- 8086/9a11
1536 20:43:43.756895 PCI: 00:08.0 cmd <- 06
1537 20:43:43.760093 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 20:43:43.763577 PCI: 00:0d.0 cmd <- 02
1539 20:43:43.766953 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 20:43:43.769987 PCI: 00:14.0 cmd <- 02
1541 20:43:43.773163 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 20:43:43.777065 PCI: 00:14.2 cmd <- 02
1543 20:43:43.780081 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 20:43:43.783033 PCI: 00:14.3 cmd <- 02
1545 20:43:43.786190 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 20:43:43.789986 PCI: 00:15.0 cmd <- 02
1547 20:43:43.792952 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 20:43:43.796139 PCI: 00:15.1 cmd <- 02
1549 20:43:43.799614 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 20:43:43.800040 PCI: 00:15.2 cmd <- 02
1551 20:43:43.806299 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 20:43:43.806776 PCI: 00:15.3 cmd <- 02
1553 20:43:43.809639 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 20:43:43.813303 PCI: 00:16.0 cmd <- 02
1555 20:43:43.816411 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 20:43:43.820308 PCI: 00:19.1 cmd <- 02
1557 20:43:43.822932 PCI: 00:1d.0 bridge ctrl <- 0013
1558 20:43:43.826238 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 20:43:43.829495 PCI: 00:1d.0 cmd <- 06
1560 20:43:43.833135 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 20:43:43.835994 PCI: 00:1e.0 cmd <- 06
1562 20:43:43.839605 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 20:43:43.842509 PCI: 00:1e.2 cmd <- 06
1564 20:43:43.845996 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 20:43:43.849399 PCI: 00:1e.3 cmd <- 02
1566 20:43:43.852736 PCI: 00:1f.0 subsystem <- 8086/a087
1567 20:43:43.853161 PCI: 00:1f.0 cmd <- 407
1568 20:43:43.859268 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 20:43:43.859696 PCI: 00:1f.3 cmd <- 02
1570 20:43:43.862282 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 20:43:43.866109 PCI: 00:1f.5 cmd <- 406
1572 20:43:43.870971 PCI: 01:00.0 cmd <- 02
1573 20:43:43.875039 done.
1574 20:43:43.878378 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 20:43:43.881533 Initializing devices...
1576 20:43:43.884963 Root Device init
1577 20:43:43.888119 Chrome EC: Set SMI mask to 0x0000000000000000
1578 20:43:43.895882 Chrome EC: clear events_b mask to 0x0000000000000000
1579 20:43:43.902711 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 20:43:43.909644 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 20:43:43.916359 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 20:43:43.919322 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 20:43:43.927076 fw_config match found: DB_USB=USB3_ACTIVE
1584 20:43:43.930221 Configure Right Type-C port orientation for retimer
1585 20:43:43.933562 Root Device init finished in 47 msecs
1586 20:43:43.937996 PCI: 00:00.0 init
1587 20:43:43.941244 CPU TDP = 9 Watts
1588 20:43:43.941669 CPU PL1 = 9 Watts
1589 20:43:43.944192 CPU PL2 = 40 Watts
1590 20:43:43.947682 CPU PL4 = 83 Watts
1591 20:43:43.951257 PCI: 00:00.0 init finished in 8 msecs
1592 20:43:43.951699 PCI: 00:02.0 init
1593 20:43:43.954584 GMA: Found VBT in CBFS
1594 20:43:43.957696 GMA: Found valid VBT in CBFS
1595 20:43:43.964887 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 20:43:43.971166 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 20:43:43.974010 PCI: 00:02.0 init finished in 18 msecs
1598 20:43:43.977582 PCI: 00:05.0 init
1599 20:43:43.980864 PCI: 00:05.0 init finished in 0 msecs
1600 20:43:43.984006 PCI: 00:08.0 init
1601 20:43:43.987448 PCI: 00:08.0 init finished in 0 msecs
1602 20:43:43.991006 PCI: 00:14.0 init
1603 20:43:43.995163 PCI: 00:14.0 init finished in 0 msecs
1604 20:43:43.997356 PCI: 00:14.2 init
1605 20:43:44.000676 PCI: 00:14.2 init finished in 0 msecs
1606 20:43:44.004193 PCI: 00:15.0 init
1607 20:43:44.004711 I2C bus 0 version 0x3230302a
1608 20:43:44.010458 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 20:43:44.013830 PCI: 00:15.0 init finished in 6 msecs
1610 20:43:44.014256 PCI: 00:15.1 init
1611 20:43:44.017559 I2C bus 1 version 0x3230302a
1612 20:43:44.020443 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 20:43:44.027062 PCI: 00:15.1 init finished in 6 msecs
1614 20:43:44.027579 PCI: 00:15.2 init
1615 20:43:44.030608 I2C bus 2 version 0x3230302a
1616 20:43:44.033828 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 20:43:44.037121 PCI: 00:15.2 init finished in 6 msecs
1618 20:43:44.040113 PCI: 00:15.3 init
1619 20:43:44.043338 I2C bus 3 version 0x3230302a
1620 20:43:44.046647 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 20:43:44.050552 PCI: 00:15.3 init finished in 6 msecs
1622 20:43:44.053815 PCI: 00:16.0 init
1623 20:43:44.056966 PCI: 00:16.0 init finished in 0 msecs
1624 20:43:44.060281 PCI: 00:19.1 init
1625 20:43:44.063793 I2C bus 5 version 0x3230302a
1626 20:43:44.066830 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 20:43:44.069992 PCI: 00:19.1 init finished in 6 msecs
1628 20:43:44.073693 PCI: 00:1d.0 init
1629 20:43:44.074120 Initializing PCH PCIe bridge.
1630 20:43:44.079790 PCI: 00:1d.0 init finished in 3 msecs
1631 20:43:44.083323 PCI: 00:1f.0 init
1632 20:43:44.086490 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 20:43:44.090021 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 20:43:44.093401 IOAPIC: ID = 0x02
1635 20:43:44.096387 IOAPIC: Dumping registers
1636 20:43:44.096806 reg 0x0000: 0x02000000
1637 20:43:44.100212 reg 0x0001: 0x00770020
1638 20:43:44.102996 reg 0x0002: 0x00000000
1639 20:43:44.106340 PCI: 00:1f.0 init finished in 21 msecs
1640 20:43:44.109538 PCI: 00:1f.2 init
1641 20:43:44.113308 Disabling ACPI via APMC.
1642 20:43:44.113731 APMC done.
1643 20:43:44.119821 PCI: 00:1f.2 init finished in 5 msecs
1644 20:43:44.129981 PCI: 01:00.0 init
1645 20:43:44.133230 PCI: 01:00.0 init finished in 0 msecs
1646 20:43:44.136918 PNP: 0c09.0 init
1647 20:43:44.139994 Google Chrome EC uptime: 8.276 seconds
1648 20:43:44.146408 Google Chrome AP resets since EC boot: 1
1649 20:43:44.149882 Google Chrome most recent AP reset causes:
1650 20:43:44.153480 0.452: 32775 shutdown: entering G3
1651 20:43:44.159701 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 20:43:44.163077 PNP: 0c09.0 init finished in 22 msecs
1653 20:43:44.168704 Devices initialized
1654 20:43:44.172218 Show all devs... After init.
1655 20:43:44.175337 Root Device: enabled 1
1656 20:43:44.175761 DOMAIN: 0000: enabled 1
1657 20:43:44.179327 CPU_CLUSTER: 0: enabled 1
1658 20:43:44.182032 PCI: 00:00.0: enabled 1
1659 20:43:44.185661 PCI: 00:02.0: enabled 1
1660 20:43:44.186192 PCI: 00:04.0: enabled 1
1661 20:43:44.189142 PCI: 00:05.0: enabled 1
1662 20:43:44.192133 PCI: 00:06.0: enabled 0
1663 20:43:44.195497 PCI: 00:07.0: enabled 0
1664 20:43:44.196012 PCI: 00:07.1: enabled 0
1665 20:43:44.198435 PCI: 00:07.2: enabled 0
1666 20:43:44.201748 PCI: 00:07.3: enabled 0
1667 20:43:44.205160 PCI: 00:08.0: enabled 1
1668 20:43:44.205585 PCI: 00:09.0: enabled 0
1669 20:43:44.208907 PCI: 00:0a.0: enabled 0
1670 20:43:44.212146 PCI: 00:0d.0: enabled 1
1671 20:43:44.215113 PCI: 00:0d.1: enabled 0
1672 20:43:44.215538 PCI: 00:0d.2: enabled 0
1673 20:43:44.218471 PCI: 00:0d.3: enabled 0
1674 20:43:44.222051 PCI: 00:0e.0: enabled 0
1675 20:43:44.222596 PCI: 00:10.2: enabled 1
1676 20:43:44.225159 PCI: 00:10.6: enabled 0
1677 20:43:44.228453 PCI: 00:10.7: enabled 0
1678 20:43:44.231805 PCI: 00:12.0: enabled 0
1679 20:43:44.232363 PCI: 00:12.6: enabled 0
1680 20:43:44.234989 PCI: 00:13.0: enabled 0
1681 20:43:44.238518 PCI: 00:14.0: enabled 1
1682 20:43:44.241601 PCI: 00:14.1: enabled 0
1683 20:43:44.242025 PCI: 00:14.2: enabled 1
1684 20:43:44.244947 PCI: 00:14.3: enabled 1
1685 20:43:44.248646 PCI: 00:15.0: enabled 1
1686 20:43:44.252007 PCI: 00:15.1: enabled 1
1687 20:43:44.252545 PCI: 00:15.2: enabled 1
1688 20:43:44.255222 PCI: 00:15.3: enabled 1
1689 20:43:44.258438 PCI: 00:16.0: enabled 1
1690 20:43:44.258890 PCI: 00:16.1: enabled 0
1691 20:43:44.261857 PCI: 00:16.2: enabled 0
1692 20:43:44.265127 PCI: 00:16.3: enabled 0
1693 20:43:44.268578 PCI: 00:16.4: enabled 0
1694 20:43:44.269132 PCI: 00:16.5: enabled 0
1695 20:43:44.271376 PCI: 00:17.0: enabled 0
1696 20:43:44.275266 PCI: 00:19.0: enabled 0
1697 20:43:44.278803 PCI: 00:19.1: enabled 1
1698 20:43:44.279340 PCI: 00:19.2: enabled 0
1699 20:43:44.281523 PCI: 00:1c.0: enabled 1
1700 20:43:44.284864 PCI: 00:1c.1: enabled 0
1701 20:43:44.288179 PCI: 00:1c.2: enabled 0
1702 20:43:44.288612 PCI: 00:1c.3: enabled 0
1703 20:43:44.291923 PCI: 00:1c.4: enabled 0
1704 20:43:44.295244 PCI: 00:1c.5: enabled 0
1705 20:43:44.298256 PCI: 00:1c.6: enabled 1
1706 20:43:44.298816 PCI: 00:1c.7: enabled 0
1707 20:43:44.301435 PCI: 00:1d.0: enabled 1
1708 20:43:44.304788 PCI: 00:1d.1: enabled 0
1709 20:43:44.305330 PCI: 00:1d.2: enabled 1
1710 20:43:44.308280 PCI: 00:1d.3: enabled 0
1711 20:43:44.311810 PCI: 00:1e.0: enabled 1
1712 20:43:44.315048 PCI: 00:1e.1: enabled 0
1713 20:43:44.315490 PCI: 00:1e.2: enabled 1
1714 20:43:44.317880 PCI: 00:1e.3: enabled 1
1715 20:43:44.321335 PCI: 00:1f.0: enabled 1
1716 20:43:44.324855 PCI: 00:1f.1: enabled 0
1717 20:43:44.325374 PCI: 00:1f.2: enabled 1
1718 20:43:44.328539 PCI: 00:1f.3: enabled 1
1719 20:43:44.331517 PCI: 00:1f.4: enabled 0
1720 20:43:44.334462 PCI: 00:1f.5: enabled 1
1721 20:43:44.334985 PCI: 00:1f.6: enabled 0
1722 20:43:44.338270 PCI: 00:1f.7: enabled 0
1723 20:43:44.341570 APIC: 00: enabled 1
1724 20:43:44.341995 GENERIC: 0.0: enabled 1
1725 20:43:44.344668 GENERIC: 0.0: enabled 1
1726 20:43:44.348196 GENERIC: 1.0: enabled 1
1727 20:43:44.351072 GENERIC: 0.0: enabled 1
1728 20:43:44.351497 GENERIC: 1.0: enabled 1
1729 20:43:44.354816 USB0 port 0: enabled 1
1730 20:43:44.357954 GENERIC: 0.0: enabled 1
1731 20:43:44.358378 USB0 port 0: enabled 1
1732 20:43:44.361338 GENERIC: 0.0: enabled 1
1733 20:43:44.364620 I2C: 00:1a: enabled 1
1734 20:43:44.368035 I2C: 00:31: enabled 1
1735 20:43:44.368569 I2C: 00:32: enabled 1
1736 20:43:44.371338 I2C: 00:10: enabled 1
1737 20:43:44.374763 I2C: 00:15: enabled 1
1738 20:43:44.375215 GENERIC: 0.0: enabled 0
1739 20:43:44.377758 GENERIC: 1.0: enabled 0
1740 20:43:44.381705 GENERIC: 0.0: enabled 1
1741 20:43:44.382141 SPI: 00: enabled 1
1742 20:43:44.384718 SPI: 00: enabled 1
1743 20:43:44.387787 PNP: 0c09.0: enabled 1
1744 20:43:44.388230 GENERIC: 0.0: enabled 1
1745 20:43:44.391217 USB3 port 0: enabled 1
1746 20:43:44.394779 USB3 port 1: enabled 1
1747 20:43:44.395212 USB3 port 2: enabled 0
1748 20:43:44.397766 USB3 port 3: enabled 0
1749 20:43:44.401275 USB2 port 0: enabled 0
1750 20:43:44.404366 USB2 port 1: enabled 1
1751 20:43:44.404803 USB2 port 2: enabled 1
1752 20:43:44.407981 USB2 port 3: enabled 0
1753 20:43:44.411534 USB2 port 4: enabled 1
1754 20:43:44.412069 USB2 port 5: enabled 0
1755 20:43:44.414841 USB2 port 6: enabled 0
1756 20:43:44.417718 USB2 port 7: enabled 0
1757 20:43:44.420970 USB2 port 8: enabled 0
1758 20:43:44.421408 USB2 port 9: enabled 0
1759 20:43:44.424844 USB3 port 0: enabled 0
1760 20:43:44.427585 USB3 port 1: enabled 1
1761 20:43:44.428115 USB3 port 2: enabled 0
1762 20:43:44.430869 USB3 port 3: enabled 0
1763 20:43:44.434708 GENERIC: 0.0: enabled 1
1764 20:43:44.437541 GENERIC: 1.0: enabled 1
1765 20:43:44.437963 APIC: 01: enabled 1
1766 20:43:44.441434 APIC: 05: enabled 1
1767 20:43:44.441970 APIC: 02: enabled 1
1768 20:43:44.444434 APIC: 07: enabled 1
1769 20:43:44.448190 APIC: 06: enabled 1
1770 20:43:44.448615 APIC: 04: enabled 1
1771 20:43:44.451394 APIC: 03: enabled 1
1772 20:43:44.454353 PCI: 01:00.0: enabled 1
1773 20:43:44.457785 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1774 20:43:44.463827 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 20:43:44.467149 ELOG: NV offset 0xf30000 size 0x1000
1776 20:43:44.474005 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 20:43:44.480696 ELOG: Event(17) added with size 13 at 2023-12-07 20:43:43 UTC
1778 20:43:44.488108 ELOG: Event(92) added with size 9 at 2023-12-07 20:43:43 UTC
1779 20:43:44.493880 ELOG: Event(93) added with size 9 at 2023-12-07 20:43:43 UTC
1780 20:43:44.501016 ELOG: Event(9E) added with size 10 at 2023-12-07 20:43:43 UTC
1781 20:43:44.507205 ELOG: Event(9F) added with size 14 at 2023-12-07 20:43:43 UTC
1782 20:43:44.514122 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1783 20:43:44.517213 ELOG: Event(A1) added with size 10 at 2023-12-07 20:43:43 UTC
1784 20:43:44.527148 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1785 20:43:44.534121 ELOG: Event(A0) added with size 9 at 2023-12-07 20:43:43 UTC
1786 20:43:44.536971 elog_add_boot_reason: Logged dev mode boot
1787 20:43:44.543526 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1788 20:43:44.543950 Finalize devices...
1789 20:43:44.547102 Devices finalized
1790 20:43:44.553796 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1791 20:43:44.557063 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1792 20:43:44.563554 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1793 20:43:44.566764 ME: HFSTS1 : 0x80030055
1794 20:43:44.573163 ME: HFSTS2 : 0x30280116
1795 20:43:44.576415 ME: HFSTS3 : 0x00000050
1796 20:43:44.579899 ME: HFSTS4 : 0x00004000
1797 20:43:44.586298 ME: HFSTS5 : 0x00000000
1798 20:43:44.589859 ME: HFSTS6 : 0x40400006
1799 20:43:44.592709 ME: Manufacturing Mode : YES
1800 20:43:44.596264 ME: SPI Protection Mode Enabled : NO
1801 20:43:44.599528 ME: FW Partition Table : OK
1802 20:43:44.606301 ME: Bringup Loader Failure : NO
1803 20:43:44.609657 ME: Firmware Init Complete : NO
1804 20:43:44.613119 ME: Boot Options Present : NO
1805 20:43:44.616280 ME: Update In Progress : NO
1806 20:43:44.619765 ME: D0i3 Support : YES
1807 20:43:44.623550 ME: Low Power State Enabled : NO
1808 20:43:44.626221 ME: CPU Replaced : YES
1809 20:43:44.629576 ME: CPU Replacement Valid : YES
1810 20:43:44.636226 ME: Current Working State : 5
1811 20:43:44.639904 ME: Current Operation State : 1
1812 20:43:44.643031 ME: Current Operation Mode : 3
1813 20:43:44.646349 ME: Error Code : 0
1814 20:43:44.649542 ME: Enhanced Debug Mode : NO
1815 20:43:44.652831 ME: CPU Debug Disabled : YES
1816 20:43:44.656467 ME: TXT Support : NO
1817 20:43:44.662479 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1818 20:43:44.669005 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1819 20:43:44.672734 CBFS: 'fallback/slic' not found.
1820 20:43:44.679191 ACPI: Writing ACPI tables at 76b01000.
1821 20:43:44.679273 ACPI: * FACS
1822 20:43:44.682565 ACPI: * DSDT
1823 20:43:44.685623 Ramoops buffer: 0x100000@0x76a00000.
1824 20:43:44.689152 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1825 20:43:44.695296 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1826 20:43:44.698902 Google Chrome EC: version:
1827 20:43:44.701918 ro: voema_v2.0.10114-a447f03e46
1828 20:43:44.705556 rw: voema_v2.0.10114-a447f03e46
1829 20:43:44.705672 running image: 2
1830 20:43:44.712139 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1831 20:43:44.716712 ACPI: * FADT
1832 20:43:44.717129 SCI is IRQ9
1833 20:43:44.723385 ACPI: added table 1/32, length now 40
1834 20:43:44.723904 ACPI: * SSDT
1835 20:43:44.726445 Found 1 CPU(s) with 8 core(s) each.
1836 20:43:44.733172 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1837 20:43:44.736350 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1838 20:43:44.739941 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1839 20:43:44.742938 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1840 20:43:44.749864 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1841 20:43:44.756184 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1842 20:43:44.759675 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1843 20:43:44.765857 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1844 20:43:44.773084 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1845 20:43:44.776101 \_SB.PCI0.RP09: Added StorageD3Enable property
1846 20:43:44.782827 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1847 20:43:44.785734 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1848 20:43:44.792719 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1849 20:43:44.796492 PS2K: Passing 80 keymaps to kernel
1850 20:43:44.803120 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1851 20:43:44.809432 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1852 20:43:44.816007 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1853 20:43:44.822384 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1854 20:43:44.829243 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1855 20:43:44.835629 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1856 20:43:44.842800 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1857 20:43:44.848832 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1858 20:43:44.852483 ACPI: added table 2/32, length now 44
1859 20:43:44.855768 ACPI: * MCFG
1860 20:43:44.859151 ACPI: added table 3/32, length now 48
1861 20:43:44.859235 ACPI: * TPM2
1862 20:43:44.862316 TPM2 log created at 0x769f0000
1863 20:43:44.865612 ACPI: added table 4/32, length now 52
1864 20:43:44.869748 ACPI: * MADT
1865 20:43:44.869837 SCI is IRQ9
1866 20:43:44.872326 ACPI: added table 5/32, length now 56
1867 20:43:44.876313 current = 76b09850
1868 20:43:44.876396 ACPI: * DMAR
1869 20:43:44.882456 ACPI: added table 6/32, length now 60
1870 20:43:44.885981 ACPI: added table 7/32, length now 64
1871 20:43:44.886065 ACPI: * HPET
1872 20:43:44.889240 ACPI: added table 8/32, length now 68
1873 20:43:44.892451 ACPI: done.
1874 20:43:44.892534 ACPI tables: 35216 bytes.
1875 20:43:44.895660 smbios_write_tables: 769ef000
1876 20:43:44.899009 EC returned error result code 3
1877 20:43:44.905386 Couldn't obtain OEM name from CBI
1878 20:43:44.908855 Create SMBIOS type 16
1879 20:43:44.908938 Create SMBIOS type 17
1880 20:43:44.911939 GENERIC: 0.0 (WIFI Device)
1881 20:43:44.915350 SMBIOS tables: 1734 bytes.
1882 20:43:44.919087 Writing table forward entry at 0x00000500
1883 20:43:44.925666 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1884 20:43:44.928597 Writing coreboot table at 0x76b25000
1885 20:43:44.935435 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1886 20:43:44.938532 1. 0000000000001000-000000000009ffff: RAM
1887 20:43:44.945266 2. 00000000000a0000-00000000000fffff: RESERVED
1888 20:43:44.948464 3. 0000000000100000-00000000769eefff: RAM
1889 20:43:44.955780 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1890 20:43:44.958565 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1891 20:43:44.965241 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1892 20:43:44.971888 7. 0000000077000000-000000007fbfffff: RESERVED
1893 20:43:44.974982 8. 00000000c0000000-00000000cfffffff: RESERVED
1894 20:43:44.982203 9. 00000000f8000000-00000000f9ffffff: RESERVED
1895 20:43:44.985399 10. 00000000fb000000-00000000fb000fff: RESERVED
1896 20:43:44.988632 11. 00000000fe000000-00000000fe00ffff: RESERVED
1897 20:43:44.995428 12. 00000000fed80000-00000000fed87fff: RESERVED
1898 20:43:44.998686 13. 00000000fed90000-00000000fed92fff: RESERVED
1899 20:43:45.004766 14. 00000000feda0000-00000000feda1fff: RESERVED
1900 20:43:45.008597 15. 00000000fedc0000-00000000feddffff: RESERVED
1901 20:43:45.011820 16. 0000000100000000-00000004803fffff: RAM
1902 20:43:45.015039 Passing 4 GPIOs to payload:
1903 20:43:45.021395 NAME | PORT | POLARITY | VALUE
1904 20:43:45.028126 lid | undefined | high | high
1905 20:43:45.031850 power | undefined | high | low
1906 20:43:45.038063 oprom | undefined | high | low
1907 20:43:45.041572 EC in RW | 0x000000e5 | high | high
1908 20:43:45.048159 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1909 20:43:45.051490 coreboot table: 1576 bytes.
1910 20:43:45.054983 IMD ROOT 0. 0x76fff000 0x00001000
1911 20:43:45.058631 IMD SMALL 1. 0x76ffe000 0x00001000
1912 20:43:45.061530 FSP MEMORY 2. 0x76c4e000 0x003b0000
1913 20:43:45.064635 VPD 3. 0x76c4d000 0x00000367
1914 20:43:45.071249 RO MCACHE 4. 0x76c4c000 0x00000fdc
1915 20:43:45.074816 CONSOLE 5. 0x76c2c000 0x00020000
1916 20:43:45.077945 FMAP 6. 0x76c2b000 0x00000578
1917 20:43:45.082101 TIME STAMP 7. 0x76c2a000 0x00000910
1918 20:43:45.085130 VBOOT WORK 8. 0x76c16000 0x00014000
1919 20:43:45.088165 ROMSTG STCK 9. 0x76c15000 0x00001000
1920 20:43:45.091835 AFTER CAR 10. 0x76c0a000 0x0000b000
1921 20:43:45.095220 RAMSTAGE 11. 0x76b97000 0x00073000
1922 20:43:45.101364 REFCODE 12. 0x76b42000 0x00055000
1923 20:43:45.105269 SMM BACKUP 13. 0x76b32000 0x00010000
1924 20:43:45.108521 4f444749 14. 0x76b30000 0x00002000
1925 20:43:45.111637 EXT VBT15. 0x76b2d000 0x0000219f
1926 20:43:45.114871 COREBOOT 16. 0x76b25000 0x00008000
1927 20:43:45.118175 ACPI 17. 0x76b01000 0x00024000
1928 20:43:45.121487 ACPI GNVS 18. 0x76b00000 0x00001000
1929 20:43:45.124668 RAMOOPS 19. 0x76a00000 0x00100000
1930 20:43:45.128318 TPM2 TCGLOG20. 0x769f0000 0x00010000
1931 20:43:45.135095 SMBIOS 21. 0x769ef000 0x00000800
1932 20:43:45.135523 IMD small region:
1933 20:43:45.139074 IMD ROOT 0. 0x76ffec00 0x00000400
1934 20:43:45.141623 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1935 20:43:45.148616 POWER STATE 2. 0x76ffeb80 0x00000044
1936 20:43:45.151692 ROMSTAGE 3. 0x76ffeb60 0x00000004
1937 20:43:45.155146 MEM INFO 4. 0x76ffe980 0x000001e0
1938 20:43:45.162064 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1939 20:43:45.164767 MTRR: Physical address space:
1940 20:43:45.171640 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1941 20:43:45.175066 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1942 20:43:45.181638 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1943 20:43:45.188207 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1944 20:43:45.195023 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1945 20:43:45.201344 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1946 20:43:45.208247 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1947 20:43:45.211581 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 20:43:45.214654 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 20:43:45.221516 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 20:43:45.224818 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 20:43:45.227843 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 20:43:45.231361 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 20:43:45.237679 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 20:43:45.241165 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 20:43:45.244209 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 20:43:45.247369 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 20:43:45.250748 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 20:43:45.256366 call enable_fixed_mtrr()
1959 20:43:45.259666 CPU physical address size: 39 bits
1960 20:43:45.266171 MTRR: default type WB/UC MTRR counts: 6/7.
1961 20:43:45.269524 MTRR: WB selected as default type.
1962 20:43:45.276167 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1963 20:43:45.279330 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1964 20:43:45.286551 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1965 20:43:45.293047 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1966 20:43:45.299641 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1967 20:43:45.306328 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1968 20:43:45.309832
1969 20:43:45.310321 MTRR check
1970 20:43:45.313244 Fixed MTRRs : Enabled
1971 20:43:45.313665 Variable MTRRs: Enabled
1972 20:43:45.313998
1973 20:43:45.319671 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 20:43:45.323114 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 20:43:45.326495 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 20:43:45.329827 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 20:43:45.336243 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 20:43:45.339638 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 20:43:45.342871 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 20:43:45.346043 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 20:43:45.353154 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 20:43:45.356257 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 20:43:45.359362 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 20:43:45.366638 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1985 20:43:45.370260 call enable_fixed_mtrr()
1986 20:43:45.373646 Checking cr50 for pending updates
1987 20:43:45.376896 CPU physical address size: 39 bits
1988 20:43:45.380393 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 20:43:45.384255 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 20:43:45.390788 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 20:43:45.393921 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 20:43:45.397390 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 20:43:45.400951 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 20:43:45.404286 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 20:43:45.410578 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 20:43:45.414106 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 20:43:45.417427 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 20:43:45.420425 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 20:43:45.427048 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 20:43:45.429969 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 20:43:45.436952 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 20:43:45.440011 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 20:43:45.443673 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 20:43:45.446884 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 20:43:45.453224 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 20:43:45.456658 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 20:43:45.460163 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 20:43:45.463464 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 20:43:45.469854 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 20:43:45.473201 call enable_fixed_mtrr()
2011 20:43:45.476480 call enable_fixed_mtrr()
2012 20:43:45.479836 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 20:43:45.483147 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 20:43:45.486267 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 20:43:45.492890 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 20:43:45.496403 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 20:43:45.500016 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 20:43:45.502854 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 20:43:45.509925 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 20:43:45.512859 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 20:43:45.516267 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 20:43:45.519898 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 20:43:45.526453 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 20:43:45.529433 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 20:43:45.536119 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 20:43:45.539296 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 20:43:45.542736 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 20:43:45.545957 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 20:43:45.549334 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 20:43:45.556407 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 20:43:45.559020 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 20:43:45.562707 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 20:43:45.565811 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 20:43:45.570407 call enable_fixed_mtrr()
2035 20:43:45.574231 call enable_fixed_mtrr()
2036 20:43:45.577090 CPU physical address size: 39 bits
2037 20:43:45.580849 CPU physical address size: 39 bits
2038 20:43:45.587543 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 20:43:45.591080 MTRR: Fixed MSR 0x250 0x0606060606060606
2040 20:43:45.594902 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 20:43:45.597487 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 20:43:45.604408 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 20:43:45.607686 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 20:43:45.610876 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 20:43:45.614588 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 20:43:45.620716 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 20:43:45.624139 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 20:43:45.627352 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 20:43:45.630384 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 20:43:45.638755 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 20:43:45.641873 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 20:43:45.645451 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 20:43:45.648792 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 20:43:45.655316 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 20:43:45.658605 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 20:43:45.661727 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 20:43:45.665452 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 20:43:45.672247 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 20:43:45.675557 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 20:43:45.678642 call enable_fixed_mtrr()
2061 20:43:45.681992 call enable_fixed_mtrr()
2062 20:43:45.685020 CPU physical address size: 39 bits
2063 20:43:45.688622 CPU physical address size: 39 bits
2064 20:43:45.695171 CPU physical address size: 39 bits
2065 20:43:45.698323 CPU physical address size: 39 bits
2066 20:43:45.701617 Reading cr50 TPM mode
2067 20:43:45.710927 BS: BS_PAYLOAD_LOAD entry times (exec / console): 332 / 6 ms
2068 20:43:45.721168 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2069 20:43:45.724412 Checking segment from ROM address 0xffc02b38
2070 20:43:45.728010 Checking segment from ROM address 0xffc02b54
2071 20:43:45.734559 Loading segment from ROM address 0xffc02b38
2072 20:43:45.734920 code (compression=0)
2073 20:43:45.744661 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2074 20:43:45.754165 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2075 20:43:45.754472 it's not compressed!
2076 20:43:45.894648 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2077 20:43:45.901359 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2078 20:43:45.907726 Loading segment from ROM address 0xffc02b54
2079 20:43:45.910918 Entry Point 0x30000000
2080 20:43:45.911017 Loaded segments
2081 20:43:45.917524 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2082 20:43:45.962992 Finalizing chipset.
2083 20:43:45.966346 Finalizing SMM.
2084 20:43:45.966806 APMC done.
2085 20:43:45.972984 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2086 20:43:45.977269 mp_park_aps done after 0 msecs.
2087 20:43:45.979861 Jumping to boot code at 0x30000000(0x76b25000)
2088 20:43:45.989963 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2089 20:43:45.990489
2090 20:43:45.990888
2091 20:43:45.991261
2092 20:43:45.992916 Starting depthcharge on Voema...
2093 20:43:45.993402
2094 20:43:45.994678 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2095 20:43:45.995353 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2096 20:43:45.995898 Setting prompt string to ['volteer:']
2097 20:43:45.996457 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2098 20:43:46.002710 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2099 20:43:46.003258
2100 20:43:46.009499 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2101 20:43:46.010008
2102 20:43:46.016233 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2103 20:43:46.016824
2104 20:43:46.019037 Failed to find eMMC card reader
2105 20:43:46.019641
2106 20:43:46.020176 Wipe memory regions:
2107 20:43:46.020595
2108 20:43:46.025783 [0x00000000001000, 0x000000000a0000)
2109 20:43:46.025871
2110 20:43:46.029513 [0x00000000100000, 0x00000030000000)
2111 20:43:46.062799
2112 20:43:46.066194 [0x00000032662db0, 0x000000769ef000)
2113 20:43:46.114588
2114 20:43:46.117804 [0x00000100000000, 0x00000480400000)
2115 20:43:46.741872
2116 20:43:46.745069 ec_init: CrosEC protocol v3 supported (256, 256)
2117 20:43:47.176546
2118 20:43:47.177106 R8152: Initializing
2119 20:43:47.177482
2120 20:43:47.180031 Version 6 (ocp_data = 5c30)
2121 20:43:47.180591
2122 20:43:47.183294 R8152: Done initializing
2123 20:43:47.183857
2124 20:43:47.186517 Adding net device
2125 20:43:47.487380
2126 20:43:47.490934 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 20:43:47.491506
2128 20:43:47.491895
2129 20:43:47.492244
2130 20:43:47.494263 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 20:43:47.595686 volteer: tftpboot 192.168.201.1 12210456/tftp-deploy-5jq7lmhl/kernel/bzImage 12210456/tftp-deploy-5jq7lmhl/kernel/cmdline 12210456/tftp-deploy-5jq7lmhl/ramdisk/ramdisk.cpio.gz
2133 20:43:47.596342 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 20:43:47.596829 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2135 20:43:47.601387 tftpboot 192.168.201.1 12210456/tftp-deploy-5jq7lmhl/kernel/bzIploy-5jq7lmhl/kernel/cmdline 12210456/tftp-deploy-5jq7lmhl/ramdisk/ramdisk.cpio.gz
2136 20:43:47.601874
2137 20:43:47.602241 Waiting for link
2138 20:43:47.805345
2139 20:43:47.805921 done.
2140 20:43:47.806299
2141 20:43:47.806689 MAC: 00:24:32:30:78:e4
2142 20:43:47.807031
2143 20:43:47.807972 Sending DHCP discover... done.
2144 20:43:47.808368
2145 20:43:47.812096 Waiting for reply... done.
2146 20:43:47.812761
2147 20:43:47.814708 Sending DHCP request... done.
2148 20:43:47.815176
2149 20:43:47.821871 Waiting for reply... done.
2150 20:43:47.822442
2151 20:43:47.822885 My ip is 192.168.201.13
2152 20:43:47.823236
2153 20:43:47.824591 The DHCP server ip is 192.168.201.1
2154 20:43:47.828108
2155 20:43:47.831170 TFTP server IP predefined by user: 192.168.201.1
2156 20:43:47.831596
2157 20:43:47.838025 Bootfile predefined by user: 12210456/tftp-deploy-5jq7lmhl/kernel/bzImage
2158 20:43:47.838554
2159 20:43:47.841111 Sending tftp read request... done.
2160 20:43:47.841698
2161 20:43:47.850074 Waiting for the transfer...
2162 20:43:47.850531
2163 20:43:48.517070 00000000 ################################################################
2164 20:43:48.517216
2165 20:43:49.125708 00080000 ################################################################
2166 20:43:49.126203
2167 20:43:49.808032 00100000 ################################################################
2168 20:43:49.808701
2169 20:43:50.444013 00180000 ################################################################
2170 20:43:50.444165
2171 20:43:51.012929 00200000 ################################################################
2172 20:43:51.013066
2173 20:43:51.589165 00280000 ################################################################
2174 20:43:51.589304
2175 20:43:52.164290 00300000 ################################################################
2176 20:43:52.164423
2177 20:43:52.732262 00380000 ################################################################
2178 20:43:52.732398
2179 20:43:53.292237 00400000 ################################################################
2180 20:43:53.292378
2181 20:43:53.851938 00480000 ################################################################
2182 20:43:53.852105
2183 20:43:54.394867 00500000 ################################################################
2184 20:43:54.395016
2185 20:43:54.949146 00580000 ################################################################
2186 20:43:54.949306
2187 20:43:55.526596 00600000 ################################################################
2188 20:43:55.526749
2189 20:43:56.112104 00680000 ################################################################
2190 20:43:56.112245
2191 20:43:56.687690 00700000 ################################################################
2192 20:43:56.687829
2193 20:43:57.225611 00780000 ################################################################
2194 20:43:57.225755
2195 20:43:57.758345 00800000 ################################################################
2196 20:43:57.758493
2197 20:43:58.291793 00880000 ################################################################
2198 20:43:58.291965
2199 20:43:58.820780 00900000 ################################################################
2200 20:43:58.820915
2201 20:43:59.347785 00980000 ################################################################
2202 20:43:59.347925
2203 20:43:59.871763 00a00000 ################################################################
2204 20:43:59.871906
2205 20:44:00.392759 00a80000 ################################################################
2206 20:44:00.392929
2207 20:44:00.432008 00b00000 ##### done.
2208 20:44:00.432135
2209 20:44:00.435907 The bootfile was 11571200 bytes long.
2210 20:44:00.436022
2211 20:44:00.438842 Sending tftp read request... done.
2212 20:44:00.438955
2213 20:44:00.442741 Waiting for the transfer...
2214 20:44:00.442859
2215 20:44:00.968177 00000000 ################################################################
2216 20:44:00.968316
2217 20:44:01.492845 00080000 ################################################################
2218 20:44:01.492983
2219 20:44:02.036004 00100000 ################################################################
2220 20:44:02.036143
2221 20:44:02.600825 00180000 ################################################################
2222 20:44:02.600959
2223 20:44:03.170438 00200000 ################################################################
2224 20:44:03.170573
2225 20:44:03.744450 00280000 ################################################################
2226 20:44:03.744581
2227 20:44:04.316161 00300000 ################################################################
2228 20:44:04.316321
2229 20:44:04.879689 00380000 ################################################################
2230 20:44:04.879830
2231 20:44:05.510981 00400000 ################################################################
2232 20:44:05.511474
2233 20:44:06.131515 00480000 ################################################################
2234 20:44:06.131646
2235 20:44:06.836061 00500000 ################################################################
2236 20:44:06.836552
2237 20:44:07.555962 00580000 ################################################################
2238 20:44:07.556491
2239 20:44:08.164672 00600000 ################################################################
2240 20:44:08.164938
2241 20:44:08.783134 00680000 ################################################################
2242 20:44:08.783302
2243 20:44:09.331569 00700000 ################################################################
2244 20:44:09.331705
2245 20:44:09.938393 00780000 ################################################################
2246 20:44:09.938576
2247 20:44:10.547127 00800000 ################################################################
2248 20:44:10.547265
2249 20:44:10.868652 00880000 ###################################### done.
2250 20:44:10.869183
2251 20:44:10.871726 Sending tftp read request... done.
2252 20:44:10.872232
2253 20:44:10.875109 Waiting for the transfer...
2254 20:44:10.875531
2255 20:44:10.878204 00000000 # done.
2256 20:44:10.878670
2257 20:44:10.884762 Command line loaded dynamically from TFTP file: 12210456/tftp-deploy-5jq7lmhl/kernel/cmdline
2258 20:44:10.885189
2259 20:44:10.901352 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2260 20:44:10.906759
2261 20:44:10.910229 Shutting down all USB controllers.
2262 20:44:10.910362
2263 20:44:10.910465 Removing current net device
2264 20:44:10.910563
2265 20:44:10.913102 Finalizing coreboot
2266 20:44:10.913233
2267 20:44:10.919687 Exiting depthcharge with code 4 at timestamp: 33547176
2268 20:44:10.919794
2269 20:44:10.919875
2270 20:44:10.919951 Starting kernel ...
2271 20:44:10.920024
2272 20:44:10.920095
2273 20:44:10.920525 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2274 20:44:10.920647 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2275 20:44:10.920743 Setting prompt string to ['Linux version [0-9]']
2276 20:44:10.920826 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2277 20:44:10.920912 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2279 20:48:30.920866 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2281 20:48:30.921072 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2283 20:48:30.921232 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2286 20:48:30.921482 end: 2 depthcharge-action (duration 00:05:00) [common]
2288 20:48:30.921701 Cleaning after the job
2289 20:48:30.921801 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210456/tftp-deploy-5jq7lmhl/ramdisk
2290 20:48:30.923189 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210456/tftp-deploy-5jq7lmhl/kernel
2291 20:48:30.925078 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210456/tftp-deploy-5jq7lmhl/modules
2292 20:48:30.925839 start: 5.1 power-off (timeout 00:00:30) [common]
2293 20:48:30.925997 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2294 20:48:31.005504 >> Command sent successfully.
2295 20:48:31.008027 Returned 0 in 0 seconds
2296 20:48:31.108379 end: 5.1 power-off (duration 00:00:00) [common]
2298 20:48:31.108682 start: 5.2 read-feedback (timeout 00:10:00) [common]
2299 20:48:31.108941 Listened to connection for namespace 'common' for up to 1s
2300 20:48:32.109889 Finalising connection for namespace 'common'
2301 20:48:32.110053 Disconnecting from shell: Finalise
2302 20:48:32.110130
2303 20:48:32.210415 end: 5.2 read-feedback (duration 00:00:01) [common]
2304 20:48:32.210537 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12210456
2305 20:48:32.228181 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12210456
2306 20:48:32.228340 JobError: Your job cannot terminate cleanly.