Boot log: acer-cbv514-1h-34uz-brya
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 20:43:23.916699 lava-dispatcher, installed at version: 2023.10
2 20:43:23.916939 start: 0 validate
3 20:43:23.917106 Start time: 2023-12-07 20:43:23.917097+00:00 (UTC)
4 20:43:23.917262 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:43:23.917443 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 20:43:24.180622 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:43:24.181330 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.299-cip105%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:43:24.446012 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:43:24.446765 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 20:43:24.718266 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:43:24.719180 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.299-cip105%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 20:43:24.989803 validate duration: 1.07
14 20:43:24.991231 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:43:24.991825 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:43:24.992315 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:43:24.992964 Not decompressing ramdisk as can be used compressed.
18 20:43:24.993441 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 20:43:24.993812 saving as /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/ramdisk/initrd.cpio.gz
20 20:43:24.994210 total size: 5432690 (5 MB)
21 20:43:25.001157 progress 0 % (0 MB)
22 20:43:25.010172 progress 5 % (0 MB)
23 20:43:25.017368 progress 10 % (0 MB)
24 20:43:25.022396 progress 15 % (0 MB)
25 20:43:25.026803 progress 20 % (1 MB)
26 20:43:25.030161 progress 25 % (1 MB)
27 20:43:25.033102 progress 30 % (1 MB)
28 20:43:25.036000 progress 35 % (1 MB)
29 20:43:25.038374 progress 40 % (2 MB)
30 20:43:25.040591 progress 45 % (2 MB)
31 20:43:25.042742 progress 50 % (2 MB)
32 20:43:25.044919 progress 55 % (2 MB)
33 20:43:25.046886 progress 60 % (3 MB)
34 20:43:25.048652 progress 65 % (3 MB)
35 20:43:25.050628 progress 70 % (3 MB)
36 20:43:25.052340 progress 75 % (3 MB)
37 20:43:25.053915 progress 80 % (4 MB)
38 20:43:25.055480 progress 85 % (4 MB)
39 20:43:25.057215 progress 90 % (4 MB)
40 20:43:25.058666 progress 95 % (4 MB)
41 20:43:25.060114 progress 100 % (5 MB)
42 20:43:25.060331 5 MB downloaded in 0.07 s (78.32 MB/s)
43 20:43:25.060501 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:43:25.060751 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:43:25.060842 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:43:25.060928 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:43:25.061067 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.299-cip105/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 20:43:25.061139 saving as /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/kernel/bzImage
50 20:43:25.061203 total size: 11571200 (11 MB)
51 20:43:25.061266 No compression specified
52 20:43:25.062606 progress 0 % (0 MB)
53 20:43:25.065612 progress 5 % (0 MB)
54 20:43:25.068790 progress 10 % (1 MB)
55 20:43:25.071788 progress 15 % (1 MB)
56 20:43:25.074911 progress 20 % (2 MB)
57 20:43:25.078126 progress 25 % (2 MB)
58 20:43:25.081107 progress 30 % (3 MB)
59 20:43:25.084266 progress 35 % (3 MB)
60 20:43:25.087443 progress 40 % (4 MB)
61 20:43:25.090433 progress 45 % (4 MB)
62 20:43:25.093572 progress 50 % (5 MB)
63 20:43:25.096694 progress 55 % (6 MB)
64 20:43:25.099687 progress 60 % (6 MB)
65 20:43:25.102822 progress 65 % (7 MB)
66 20:43:25.105923 progress 70 % (7 MB)
67 20:43:25.108859 progress 75 % (8 MB)
68 20:43:25.111963 progress 80 % (8 MB)
69 20:43:25.115024 progress 85 % (9 MB)
70 20:43:25.117908 progress 90 % (9 MB)
71 20:43:25.120998 progress 95 % (10 MB)
72 20:43:25.124109 progress 100 % (11 MB)
73 20:43:25.124229 11 MB downloaded in 0.06 s (175.10 MB/s)
74 20:43:25.124377 end: 1.2.1 http-download (duration 00:00:00) [common]
76 20:43:25.124616 end: 1.2 download-retry (duration 00:00:00) [common]
77 20:43:25.124703 start: 1.3 download-retry (timeout 00:10:00) [common]
78 20:43:25.124794 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 20:43:25.124936 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 20:43:25.125006 saving as /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/nfsrootfs/full.rootfs.tar
81 20:43:25.125067 total size: 133380384 (127 MB)
82 20:43:25.125130 Using unxz to decompress xz
83 20:43:25.129569 progress 0 % (0 MB)
84 20:43:25.469561 progress 5 % (6 MB)
85 20:43:25.821662 progress 10 % (12 MB)
86 20:43:26.109632 progress 15 % (19 MB)
87 20:43:26.293934 progress 20 % (25 MB)
88 20:43:26.535115 progress 25 % (31 MB)
89 20:43:26.879748 progress 30 % (38 MB)
90 20:43:27.221749 progress 35 % (44 MB)
91 20:43:27.623400 progress 40 % (50 MB)
92 20:43:28.010009 progress 45 % (57 MB)
93 20:43:28.369765 progress 50 % (63 MB)
94 20:43:28.745805 progress 55 % (69 MB)
95 20:43:29.110676 progress 60 % (76 MB)
96 20:43:29.473375 progress 65 % (82 MB)
97 20:43:29.837232 progress 70 % (89 MB)
98 20:43:30.204269 progress 75 % (95 MB)
99 20:43:30.646212 progress 80 % (101 MB)
100 20:43:31.085560 progress 85 % (108 MB)
101 20:43:31.354714 progress 90 % (114 MB)
102 20:43:31.708411 progress 95 % (120 MB)
103 20:43:32.107881 progress 100 % (127 MB)
104 20:43:32.113403 127 MB downloaded in 6.99 s (18.20 MB/s)
105 20:43:32.113650 end: 1.3.1 http-download (duration 00:00:07) [common]
107 20:43:32.113920 end: 1.3 download-retry (duration 00:00:07) [common]
108 20:43:32.114010 start: 1.4 download-retry (timeout 00:09:53) [common]
109 20:43:32.114096 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 20:43:32.114251 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.299-cip105/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 20:43:32.114321 saving as /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/modules/modules.tar
112 20:43:32.114382 total size: 483888 (0 MB)
113 20:43:32.114446 Using unxz to decompress xz
114 20:43:32.118714 progress 6 % (0 MB)
115 20:43:32.119115 progress 13 % (0 MB)
116 20:43:32.119361 progress 20 % (0 MB)
117 20:43:32.120968 progress 27 % (0 MB)
118 20:43:32.123008 progress 33 % (0 MB)
119 20:43:32.124884 progress 40 % (0 MB)
120 20:43:32.126846 progress 47 % (0 MB)
121 20:43:32.128762 progress 54 % (0 MB)
122 20:43:32.130777 progress 60 % (0 MB)
123 20:43:32.132789 progress 67 % (0 MB)
124 20:43:32.134836 progress 74 % (0 MB)
125 20:43:32.136880 progress 81 % (0 MB)
126 20:43:32.138833 progress 88 % (0 MB)
127 20:43:32.140776 progress 94 % (0 MB)
128 20:43:32.143243 progress 100 % (0 MB)
129 20:43:32.149682 0 MB downloaded in 0.04 s (13.07 MB/s)
130 20:43:32.149956 end: 1.4.1 http-download (duration 00:00:00) [common]
132 20:43:32.150220 end: 1.4 download-retry (duration 00:00:00) [common]
133 20:43:32.150321 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 20:43:32.150427 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 20:43:34.322350 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12210469/extract-nfsrootfs-hl63rzoe
136 20:43:34.322535 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 20:43:34.322636 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 20:43:34.322798 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt
139 20:43:34.322932 makedir: /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin
140 20:43:34.323040 makedir: /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/tests
141 20:43:34.323142 makedir: /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/results
142 20:43:34.323244 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-add-keys
143 20:43:34.323390 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-add-sources
144 20:43:34.323524 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-background-process-start
145 20:43:34.323655 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-background-process-stop
146 20:43:34.323786 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-common-functions
147 20:43:34.323918 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-echo-ipv4
148 20:43:34.324047 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-install-packages
149 20:43:34.324174 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-installed-packages
150 20:43:34.324300 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-os-build
151 20:43:34.324428 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-probe-channel
152 20:43:34.324556 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-probe-ip
153 20:43:34.324682 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-target-ip
154 20:43:34.324809 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-target-mac
155 20:43:34.324936 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-target-storage
156 20:43:34.325064 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-test-case
157 20:43:34.325194 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-test-event
158 20:43:34.325320 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-test-feedback
159 20:43:34.325452 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-test-raise
160 20:43:34.325578 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-test-reference
161 20:43:34.325706 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-test-runner
162 20:43:34.326136 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-test-set
163 20:43:34.326274 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-test-shell
164 20:43:34.326407 Updating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-install-packages (oe)
165 20:43:34.326564 Updating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/bin/lava-installed-packages (oe)
166 20:43:34.326690 Creating /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/environment
167 20:43:34.326789 LAVA metadata
168 20:43:34.326862 - LAVA_JOB_ID=12210469
169 20:43:34.326927 - LAVA_DISPATCHER_IP=192.168.201.1
170 20:43:34.327030 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 20:43:34.327097 skipped lava-vland-overlay
172 20:43:34.327173 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 20:43:34.327252 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 20:43:34.327315 skipped lava-multinode-overlay
175 20:43:34.327388 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 20:43:34.327472 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 20:43:34.327547 Loading test definitions
178 20:43:34.327634 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
179 20:43:34.327704 Using /lava-12210469 at stage 0
180 20:43:34.328015 uuid=12210469_1.5.2.3.1 testdef=None
181 20:43:34.328104 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 20:43:34.328189 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
183 20:43:34.328700 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 20:43:34.328925 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
186 20:43:34.329564 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 20:43:34.329794 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
189 20:43:34.330452 runner path: /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/0/tests/0_dmesg test_uuid 12210469_1.5.2.3.1
190 20:43:34.330608 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 20:43:34.330833 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
193 20:43:34.330905 Using /lava-12210469 at stage 1
194 20:43:34.331205 uuid=12210469_1.5.2.3.5 testdef=None
195 20:43:34.331294 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 20:43:34.331379 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
197 20:43:34.331849 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 20:43:34.332064 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
200 20:43:34.332705 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 20:43:34.332934 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
203 20:43:34.333560 runner path: /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/1/tests/1_bootrr test_uuid 12210469_1.5.2.3.5
204 20:43:34.333716 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 20:43:34.334090 Creating lava-test-runner.conf files
207 20:43:34.334157 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/0 for stage 0
208 20:43:34.334253 - 0_dmesg
209 20:43:34.334334 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12210469/lava-overlay-lfc9gsgt/lava-12210469/1 for stage 1
210 20:43:34.334427 - 1_bootrr
211 20:43:34.334523 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 20:43:34.334609 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
213 20:43:34.341873 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 20:43:34.341981 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
215 20:43:34.342068 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 20:43:34.342154 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 20:43:34.342239 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
218 20:43:34.478024 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 20:43:34.478396 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
220 20:43:34.478510 extracting modules file /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12210469/extract-nfsrootfs-hl63rzoe
221 20:43:34.499208 extracting modules file /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12210469/extract-overlay-ramdisk-o8ou5pkh/ramdisk
222 20:43:34.519669 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 20:43:34.519807 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 20:43:34.519900 [common] Applying overlay to NFS
225 20:43:34.519972 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12210469/compress-overlay-4pmwr1wi/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12210469/extract-nfsrootfs-hl63rzoe
226 20:43:34.528046 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 20:43:34.528158 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 20:43:34.528247 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 20:43:34.528338 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 20:43:34.528420 Building ramdisk /var/lib/lava/dispatcher/tmp/12210469/extract-overlay-ramdisk-o8ou5pkh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12210469/extract-overlay-ramdisk-o8ou5pkh/ramdisk
231 20:43:34.606272 >> 30353 blocks
232 20:43:35.187283 rename /var/lib/lava/dispatcher/tmp/12210469/extract-overlay-ramdisk-o8ou5pkh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/ramdisk/ramdisk.cpio.gz
233 20:43:35.187704 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 20:43:35.187824 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
235 20:43:35.187924 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
236 20:43:35.188018 No mkimage arch provided, not using FIT.
237 20:43:35.188106 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 20:43:35.188190 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 20:43:35.188295 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 20:43:35.188387 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
241 20:43:35.188470 No LXC device requested
242 20:43:35.188552 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 20:43:35.188642 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
244 20:43:35.188727 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 20:43:35.188801 Checking files for TFTP limit of 4294967296 bytes.
246 20:43:35.189207 end: 1 tftp-deploy (duration 00:00:10) [common]
247 20:43:35.189320 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 20:43:35.189412 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 20:43:35.189569 substitutions:
250 20:43:35.189655 - {DTB}: None
251 20:43:35.189747 - {INITRD}: 12210469/tftp-deploy-_kd2jvnh/ramdisk/ramdisk.cpio.gz
252 20:43:35.189809 - {KERNEL}: 12210469/tftp-deploy-_kd2jvnh/kernel/bzImage
253 20:43:35.189919 - {LAVA_MAC}: None
254 20:43:35.189977 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12210469/extract-nfsrootfs-hl63rzoe
255 20:43:35.190036 - {NFS_SERVER_IP}: 192.168.201.1
256 20:43:35.190091 - {PRESEED_CONFIG}: None
257 20:43:35.190145 - {PRESEED_LOCAL}: None
258 20:43:35.190200 - {RAMDISK}: 12210469/tftp-deploy-_kd2jvnh/ramdisk/ramdisk.cpio.gz
259 20:43:35.190255 - {ROOT_PART}: None
260 20:43:35.190309 - {ROOT}: None
261 20:43:35.190364 - {SERVER_IP}: 192.168.201.1
262 20:43:35.190420 - {TEE}: None
263 20:43:35.190508 Parsed boot commands:
264 20:43:35.190576 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 20:43:35.190754 Parsed boot commands: tftpboot 192.168.201.1 12210469/tftp-deploy-_kd2jvnh/kernel/bzImage 12210469/tftp-deploy-_kd2jvnh/kernel/cmdline 12210469/tftp-deploy-_kd2jvnh/ramdisk/ramdisk.cpio.gz
266 20:43:35.190843 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 20:43:35.190930 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 20:43:35.191023 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 20:43:35.191111 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 20:43:35.191181 Not connected, no need to disconnect.
271 20:43:35.191256 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 20:43:35.191344 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 20:43:35.191411 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-7'
274 20:43:35.195477 Setting prompt string to ['lava-test: # ']
275 20:43:35.195826 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 20:43:35.195950 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 20:43:35.196124 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 20:43:35.196246 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 20:43:35.196708 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=reboot'
280 20:43:40.337357 >> Command sent successfully.
281 20:43:40.349509 Returned 0 in 5 seconds
282 20:43:40.450922 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 20:43:40.452522 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 20:43:40.453217 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 20:43:40.453724 Setting prompt string to 'Starting depthcharge on Volmar...'
287 20:43:40.454216 Changing prompt to 'Starting depthcharge on Volmar...'
288 20:43:40.454634 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
289 20:43:40.455951 [Enter `^Ec?' for help]
290 20:43:41.818079
291 20:43:41.818724
292 20:43:41.824802 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
293 20:43:41.828105 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
294 20:43:41.834698 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
295 20:43:41.841079 CPU: AES supported, TXT NOT supported, VT supported
296 20:43:41.848709 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
297 20:43:41.849322 Cache size = 10 MiB
298 20:43:41.855711 MCH: device id 4609 (rev 04) is Alderlake-P
299 20:43:41.859948 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
300 20:43:41.863030 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
301 20:43:41.867524 VBOOT: Loading verstage.
302 20:43:41.870689 FMAP: Found "FLASH" version 1.1 at 0x1804000.
303 20:43:41.874317 FMAP: base = 0x0 size = 0x2000000 #areas = 37
304 20:43:41.881095 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
305 20:43:41.887536 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
306 20:43:41.898096 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
307 20:43:41.898668
308 20:43:41.899037
309 20:43:41.905308 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
310 20:43:41.912458 Probing TPM I2C: I2C bus 1 version 0x3230302a
311 20:43:41.916439 DW I2C bus 1 at 0xfe022000 (400 KHz)
312 20:43:41.919732 I2C TX abort detected (00000001)
313 20:43:41.923268 cr50_i2c_read: Address write failed
314 20:43:41.934853 .done! DID_VID 0x00281ae0
315 20:43:41.938072 TPM ready after 0 ms
316 20:43:41.941659 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
317 20:43:41.955679 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
318 20:43:41.959344 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
319 20:43:42.020082 tlcl_send_startup: Startup return code is 0
320 20:43:42.020628 TPM: setup succeeded
321 20:43:42.041833 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
322 20:43:42.063188 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
323 20:43:42.067130 Chrome EC: UHEPI supported
324 20:43:42.070226 Reading cr50 boot mode
325 20:43:42.085490 Cr50 says boot_mode is VERIFIED_RW(0x00).
326 20:43:42.086247 Phase 1
327 20:43:42.092157 FMAP: area GBB found @ 1805000 (458752 bytes)
328 20:43:42.098278 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
329 20:43:42.105110 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
330 20:43:42.111860 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
331 20:43:42.112576 Phase 2
332 20:43:42.115190 Phase 3
333 20:43:42.118646 FMAP: area GBB found @ 1805000 (458752 bytes)
334 20:43:42.125069 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
335 20:43:42.128582 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
336 20:43:42.135228 VB2:vb2_verify_keyblock() Checking keyblock signature...
337 20:43:42.142187 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
338 20:43:42.148621 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
339 20:43:42.155347 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
340 20:43:42.170140 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
341 20:43:42.173132 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
342 20:43:42.180473 VB2:vb2_verify_fw_preamble() Verifying preamble.
343 20:43:42.186985 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
344 20:43:42.193368 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
345 20:43:42.200016 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
346 20:43:42.203930 Phase 4
347 20:43:42.207360 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
348 20:43:42.213961 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
349 20:43:42.426612 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
350 20:43:42.433344 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
351 20:43:42.436821 Saving vboot hash.
352 20:43:42.443301 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
353 20:43:42.459438 tlcl_extend: response is 0
354 20:43:42.466237 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
355 20:43:42.469569 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
356 20:43:42.489656 tlcl_extend: response is 0
357 20:43:42.496249 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
358 20:43:42.516281 tlcl_lock_nv_write: response is 0
359 20:43:42.535680 tlcl_lock_nv_write: response is 0
360 20:43:42.536294 Slot A is selected
361 20:43:42.542314 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
362 20:43:42.548776 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
363 20:43:42.555310 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
364 20:43:42.562329 BS: verstage times (exec / console): total (unknown) / 263 ms
365 20:43:42.563046
366 20:43:42.563441
367 20:43:42.568908 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
368 20:43:42.573105 Google Chrome EC: version:
369 20:43:42.576561 ro: volmar_v2.0.14126-e605144e9c
370 20:43:42.580403 rw: volmar_v0.0.55-22d1557
371 20:43:42.582802 running image: 2
372 20:43:42.586332 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
373 20:43:42.596799 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
374 20:43:42.603152 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
375 20:43:42.609674 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
376 20:43:42.619841 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
377 20:43:42.629998 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
378 20:43:42.633279 EC took 942us to calculate image hash
379 20:43:42.643297 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
380 20:43:42.646434 VB2:sync_ec() select_rw=RW(active)
381 20:43:42.659081 Waited 270us to clear limit power flag.
382 20:43:42.662663 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
383 20:43:42.665350 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
384 20:43:42.669110 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
385 20:43:42.675469 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
386 20:43:42.678917 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
387 20:43:42.682426 TCO_STS: 0000 0000
388 20:43:42.682903 GEN_PMCON: d0015038 00002200
389 20:43:42.685958 GBLRST_CAUSE: 00000000 00000000
390 20:43:42.689535 HPR_CAUSE0: 00000000
391 20:43:42.692528 prev_sleep_state 5
392 20:43:42.695974 Abort disabling TXT, as CPU is not TXT capable.
393 20:43:42.703576 cse_lite: Number of partitions = 3
394 20:43:42.706980 cse_lite: Current partition = RO
395 20:43:42.707456 cse_lite: Next partition = RO
396 20:43:42.710351 cse_lite: Flags = 0x7
397 20:43:42.716982 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
398 20:43:42.726682 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
399 20:43:42.730215 FMAP: area SI_ME found @ 1000 (5238784 bytes)
400 20:43:42.736849 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
401 20:43:42.743754 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
402 20:43:42.750339 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
403 20:43:42.753529 cse_lite: CSE CBFS RW version : 16.1.25.2049
404 20:43:42.760022 cse_lite: Set Boot Partition Info Command (RW)
405 20:43:42.763647 HECI: Global Reset(Type:1) Command
406 20:43:44.188807 1215U
407 20:43:44.191569 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
408 20:43:44.198272 CPU: AES supported, TXT NOT supported, VT supported
409 20:43:44.205155 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
410 20:43:44.208585 Cache size = 10 MiB
411 20:43:44.211816 MCH: device id 4609 (rev 04) is Alderlake-P
412 20:43:44.218293 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
413 20:43:44.221722 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
414 20:43:44.225670 VBOOT: Loading verstage.
415 20:43:44.229667 FMAP: Found "FLASH" version 1.1 at 0x1804000.
416 20:43:44.232862 FMAP: base = 0x0 size = 0x2000000 #areas = 37
417 20:43:44.240302 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
418 20:43:44.247156 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
419 20:43:44.253917 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
420 20:43:44.257197
421 20:43:44.257812
422 20:43:44.264076 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
423 20:43:44.270633 Probing TPM I2C: I2C bus 1 version 0x3230302a
424 20:43:44.274419 DW I2C bus 1 at 0xfe022000 (400 KHz)
425 20:43:44.277343 done! DID_VID 0x00281ae0
426 20:43:44.280626 TPM ready after 0 ms
427 20:43:44.285097 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
428 20:43:44.296811 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
429 20:43:44.300405 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
430 20:43:44.363697 tlcl_send_startup: Startup return code is 0
431 20:43:44.364263 TPM: setup succeeded
432 20:43:44.384817 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
433 20:43:44.406541 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
434 20:43:44.410659 Chrome EC: UHEPI supported
435 20:43:44.414281 Reading cr50 boot mode
436 20:43:44.429063 Cr50 says boot_mode is VERIFIED_RW(0x00).
437 20:43:44.429604 Phase 1
438 20:43:44.436037 FMAP: area GBB found @ 1805000 (458752 bytes)
439 20:43:44.442348 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
440 20:43:44.449290 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
441 20:43:44.455765 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
442 20:43:44.459434 Phase 2
443 20:43:44.460015 Phase 3
444 20:43:44.462406 FMAP: area GBB found @ 1805000 (458752 bytes)
445 20:43:44.468907 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
446 20:43:44.472775 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
447 20:43:44.479063 VB2:vb2_verify_keyblock() Checking keyblock signature...
448 20:43:44.486242 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
449 20:43:44.492413 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
450 20:43:44.502535 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
451 20:43:44.514191 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
452 20:43:44.517458 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
453 20:43:44.524267 VB2:vb2_verify_fw_preamble() Verifying preamble.
454 20:43:44.531161 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
455 20:43:44.537549 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
456 20:43:44.544247 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
457 20:43:44.548083 Phase 4
458 20:43:44.551382 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
459 20:43:44.558289 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
460 20:43:44.770439 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
461 20:43:44.777348 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
462 20:43:44.781141 Saving vboot hash.
463 20:43:44.787435 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
464 20:43:44.802890 tlcl_extend: response is 0
465 20:43:44.810029 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
466 20:43:44.813532 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
467 20:43:44.830950 tlcl_extend: response is 0
468 20:43:44.837404 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
469 20:43:44.857279 tlcl_lock_nv_write: response is 0
470 20:43:44.876436 tlcl_lock_nv_write: response is 0
471 20:43:44.876972 Slot A is selected
472 20:43:44.883308 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
473 20:43:44.889871 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
474 20:43:44.896717 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
475 20:43:44.903437 BS: verstage times (exec / console): total (unknown) / 256 ms
476 20:43:44.903983
477 20:43:44.904379
478 20:43:44.910054 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
479 20:43:44.913914 Google Chrome EC: version:
480 20:43:44.916850 ro: volmar_v2.0.14126-e605144e9c
481 20:43:44.920116 rw: volmar_v0.0.55-22d1557
482 20:43:44.923550 running image: 2
483 20:43:44.926973 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
484 20:43:44.937239 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
485 20:43:44.943601 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
486 20:43:44.950343 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
487 20:43:44.960756 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
488 20:43:44.970977 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
489 20:43:44.974666 EC took 1256us to calculate image hash
490 20:43:44.985341 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
491 20:43:44.988115 VB2:sync_ec() select_rw=RW(active)
492 20:43:44.995759 Waited 270us to clear limit power flag.
493 20:43:45.001996 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
494 20:43:45.005398 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
495 20:43:45.008645 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
496 20:43:45.015328 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
497 20:43:45.018654 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
498 20:43:45.021735 TCO_STS: 0000 0000
499 20:43:45.022283 GEN_PMCON: d1001038 00002200
500 20:43:45.025497 GBLRST_CAUSE: 00000040 00000000
501 20:43:45.029340 HPR_CAUSE0: 00000000
502 20:43:45.032635 prev_sleep_state 5
503 20:43:45.035595 Abort disabling TXT, as CPU is not TXT capable.
504 20:43:45.043388 cse_lite: Number of partitions = 3
505 20:43:45.046910 cse_lite: Current partition = RW
506 20:43:45.047398 cse_lite: Next partition = RW
507 20:43:45.050031 cse_lite: Flags = 0x7
508 20:43:45.056896 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
509 20:43:45.066795 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
510 20:43:45.070045 FMAP: area SI_ME found @ 1000 (5238784 bytes)
511 20:43:45.077222 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
512 20:43:45.083839 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
513 20:43:45.090169 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
514 20:43:45.093703 cse_lite: CSE CBFS RW version : 16.1.25.2049
515 20:43:45.097383 Boot Count incremented to 1290
516 20:43:45.103959 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
517 20:43:45.110364 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
518 20:43:45.122961 Probing TPM I2C: done! DID_VID 0x00281ae0
519 20:43:45.126330 Locality already claimed
520 20:43:45.129398 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
521 20:43:45.149027 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
522 20:43:45.155828 MRC: Hash idx 0x100d comparison successful.
523 20:43:45.158842 MRC cache found, size f6c8
524 20:43:45.159332 bootmode is set to: 2
525 20:43:45.163993 EC returned error result code 3
526 20:43:45.167140 FW_CONFIG value from CBI is 0x131
527 20:43:45.173586 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
528 20:43:45.177405 SPD index = 0
529 20:43:45.183861 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
530 20:43:45.184449 SPD: module type is LPDDR4X
531 20:43:45.190446 SPD: module part number is K4U6E3S4AB-MGCL
532 20:43:45.197002 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
533 20:43:45.201164 SPD: device width 16 bits, bus width 16 bits
534 20:43:45.203873 SPD: module size is 1024 MB (per channel)
535 20:43:45.274189 CBMEM:
536 20:43:45.277469 IMD: root @ 0x76fff000 254 entries.
537 20:43:45.280322 IMD: root @ 0x76ffec00 62 entries.
538 20:43:45.288550 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
539 20:43:45.291682 RO_VPD is uninitialized or empty.
540 20:43:45.295113 FMAP: area RW_VPD found @ f29000 (8192 bytes)
541 20:43:45.302057 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
542 20:43:45.305558 External stage cache:
543 20:43:45.308361 IMD: root @ 0x7bbff000 254 entries.
544 20:43:45.312114 IMD: root @ 0x7bbfec00 62 entries.
545 20:43:45.318614 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
546 20:43:45.325373 MRC: Checking cached data update for 'RW_MRC_CACHE'.
547 20:43:45.328743 MRC: 'RW_MRC_CACHE' does not need update.
548 20:43:45.329352 8 DIMMs found
549 20:43:45.331654 SMM Memory Map
550 20:43:45.335350 SMRAM : 0x7b800000 0x800000
551 20:43:45.338332 Subregion 0: 0x7b800000 0x200000
552 20:43:45.341512 Subregion 1: 0x7ba00000 0x200000
553 20:43:45.345277 Subregion 2: 0x7bc00000 0x400000
554 20:43:45.348439 top_of_ram = 0x77000000
555 20:43:45.352050 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
556 20:43:45.358536 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
557 20:43:45.362158 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
558 20:43:45.368634 MTRR Range: Start=ff000000 End=0 (Size 1000000)
559 20:43:45.369143 Normal boot
560 20:43:45.378930 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
561 20:43:45.385130 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
562 20:43:45.392057 Processing 237 relocs. Offset value of 0x74ab9000
563 20:43:45.399775 BS: romstage times (exec / console): total (unknown) / 377 ms
564 20:43:45.406970
565 20:43:45.407525
566 20:43:45.413556 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
567 20:43:45.414149 Normal boot
568 20:43:45.420263 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
569 20:43:45.427108 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
570 20:43:45.433908 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
571 20:43:45.443824 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
572 20:43:45.492696 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
573 20:43:45.499158 Processing 5931 relocs. Offset value of 0x72a2f000
574 20:43:45.502419 BS: postcar times (exec / console): total (unknown) / 51 ms
575 20:43:45.505594
576 20:43:45.506173
577 20:43:45.512438 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
578 20:43:45.515813 Reserving BERT start 76a1e000, size 10000
579 20:43:45.518759 Normal boot
580 20:43:45.521934 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
581 20:43:45.528848 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
582 20:43:45.538613 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
583 20:43:45.542219 FMAP: area RW_VPD found @ f29000 (8192 bytes)
584 20:43:45.545382 Google Chrome EC: version:
585 20:43:45.549530 ro: volmar_v2.0.14126-e605144e9c
586 20:43:45.553183 rw: volmar_v0.0.55-22d1557
587 20:43:45.553672 running image: 2
588 20:43:45.556633 ACPI _SWS is PM1 Index 8 GPE Index -1
589 20:43:45.564033 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
590 20:43:45.567088 EC returned error result code 3
591 20:43:45.570617 FW_CONFIG value from CBI is 0x131
592 20:43:45.577347 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
593 20:43:45.580242 PCI: 00:1c.2 disabled by fw_config
594 20:43:45.584068 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
595 20:43:45.590717 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
596 20:43:45.597484 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
597 20:43:45.600596 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
598 20:43:45.607012 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
599 20:43:45.614281 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
600 20:43:45.617539 microcode: sig=0x906a4 pf=0x80 revision=0x423
601 20:43:45.624059 microcode: Update skipped, already up-to-date
602 20:43:45.630686 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
603 20:43:45.662137 Detected 6 core, 8 thread CPU.
604 20:43:45.665313 Setting up SMI for CPU
605 20:43:45.668539 IED base = 0x7bc00000
606 20:43:45.669013 IED size = 0x00400000
607 20:43:45.672087 Will perform SMM setup.
608 20:43:45.675618 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
609 20:43:45.679000 LAPIC 0x0 in XAPIC mode.
610 20:43:45.688807 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
611 20:43:45.691735 Processing 18 relocs. Offset value of 0x00030000
612 20:43:45.696766 Attempting to start 7 APs
613 20:43:45.699878 Waiting for 10ms after sending INIT.
614 20:43:45.713301 Waiting for SIPI to complete...
615 20:43:45.716298 done.
616 20:43:45.716776 LAPIC 0x1 in XAPIC mode.
617 20:43:45.719551 LAPIC 0x10 in XAPIC mode.
618 20:43:45.722980 LAPIC 0x9 in XAPIC mode.
619 20:43:45.726028 LAPIC 0x16 in XAPIC mode.
620 20:43:45.729361 AP: slot 4 apic_id 10, MCU rev: 0x00000423
621 20:43:45.733185 Waiting for SIPI to complete...
622 20:43:45.733756 done.
623 20:43:45.736238 LAPIC 0x12 in XAPIC mode.
624 20:43:45.739880 AP: slot 6 apic_id 9, MCU rev: 0x00000423
625 20:43:45.743091 LAPIC 0x14 in XAPIC mode.
626 20:43:45.746410 AP: slot 1 apic_id 12, MCU rev: 0x00000423
627 20:43:45.753175 AP: slot 3 apic_id 16, MCU rev: 0x00000423
628 20:43:45.756138 AP: slot 2 apic_id 14, MCU rev: 0x00000423
629 20:43:45.759718 AP: slot 5 apic_id 1, MCU rev: 0x00000423
630 20:43:45.763176 LAPIC 0x8 in XAPIC mode.
631 20:43:45.766423 AP: slot 7 apic_id 8, MCU rev: 0x00000423
632 20:43:45.769895 smm_setup_relocation_handler: enter
633 20:43:45.773343 smm_setup_relocation_handler: exit
634 20:43:45.783438 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
635 20:43:45.786434 Processing 11 relocs. Offset value of 0x00038000
636 20:43:45.792952 smm_module_setup_stub: stack_top = 0x7b804000
637 20:43:45.796347 smm_module_setup_stub: per cpu stack_size = 0x800
638 20:43:45.802785 smm_module_setup_stub: runtime.start32_offset = 0x4c
639 20:43:45.806351 smm_module_setup_stub: runtime.smm_size = 0x10000
640 20:43:45.813194 SMM Module: stub loaded at 38000. Will call 0x76a52094
641 20:43:45.816793 Installing permanent SMM handler to 0x7b800000
642 20:43:45.823494 smm_load_module: total_smm_space_needed e468, available -> 200000
643 20:43:45.833259 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
644 20:43:45.836946 Processing 255 relocs. Offset value of 0x7b9f6000
645 20:43:45.840233 smm_load_module: smram_start: 0x7b800000
646 20:43:45.843732 smm_load_module: smram_end: 7ba00000
647 20:43:45.849880 smm_load_module: handler start 0x7b9f6d5f
648 20:43:45.853462 smm_load_module: handler_size 98d0
649 20:43:45.856954 smm_load_module: fxsave_area 0x7b9ff000
650 20:43:45.859773 smm_load_module: fxsave_size 1000
651 20:43:45.863529 smm_load_module: CONFIG_MSEG_SIZE 0x0
652 20:43:45.869971 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
653 20:43:45.873634 smm_load_module: handler_mod_params.smbase = 0x7b800000
654 20:43:45.880083 smm_load_module: per_cpu_save_state_size = 0x400
655 20:43:45.883295 smm_load_module: num_cpus = 0x8
656 20:43:45.889765 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
657 20:43:45.893134 smm_load_module: total_save_state_size = 0x2000
658 20:43:45.896959 smm_load_module: cpu0 entry: 7b9e6000
659 20:43:45.903379 smm_create_map: cpus allowed in one segment 30
660 20:43:45.906631 smm_create_map: min # of segments needed 1
661 20:43:45.907112 CPU 0x0
662 20:43:45.909973 smbase 7b9e6000 entry 7b9ee000
663 20:43:45.916260 ss_start 7b9f5c00 code_end 7b9ee208
664 20:43:45.916740 CPU 0x1
665 20:43:45.920094 smbase 7b9e5c00 entry 7b9edc00
666 20:43:45.923057 ss_start 7b9f5800 code_end 7b9ede08
667 20:43:45.926494 CPU 0x2
668 20:43:45.929894 smbase 7b9e5800 entry 7b9ed800
669 20:43:45.933280 ss_start 7b9f5400 code_end 7b9eda08
670 20:43:45.933877 CPU 0x3
671 20:43:45.940107 smbase 7b9e5400 entry 7b9ed400
672 20:43:45.943571 ss_start 7b9f5000 code_end 7b9ed608
673 20:43:45.944049 CPU 0x4
674 20:43:45.946492 smbase 7b9e5000 entry 7b9ed000
675 20:43:45.953711 ss_start 7b9f4c00 code_end 7b9ed208
676 20:43:45.954342 CPU 0x5
677 20:43:45.957160 smbase 7b9e4c00 entry 7b9ecc00
678 20:43:45.963579 ss_start 7b9f4800 code_end 7b9ece08
679 20:43:45.964213 CPU 0x6
680 20:43:45.966713 smbase 7b9e4800 entry 7b9ec800
681 20:43:45.970395 ss_start 7b9f4400 code_end 7b9eca08
682 20:43:45.973716 CPU 0x7
683 20:43:45.976954 smbase 7b9e4400 entry 7b9ec400
684 20:43:45.980272 ss_start 7b9f4000 code_end 7b9ec608
685 20:43:45.990450 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
686 20:43:45.993940 Processing 11 relocs. Offset value of 0x7b9ee000
687 20:43:46.000123 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
688 20:43:46.003887 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
689 20:43:46.010341 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
690 20:43:46.016659 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
691 20:43:46.023538 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
692 20:43:46.030367 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
693 20:43:46.036861 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
694 20:43:46.043812 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
695 20:43:46.050356 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
696 20:43:46.056961 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
697 20:43:46.063601 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
698 20:43:46.066841 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
699 20:43:46.073576 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
700 20:43:46.080426 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
701 20:43:46.086980 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
702 20:43:46.090291 smm_module_setup_stub: stack_top = 0x7b804000
703 20:43:46.097552 smm_module_setup_stub: per cpu stack_size = 0x800
704 20:43:46.100611 smm_module_setup_stub: runtime.start32_offset = 0x4c
705 20:43:46.107073 smm_module_setup_stub: runtime.smm_size = 0x200000
706 20:43:46.113609 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
707 20:43:46.117063 Clearing SMI status registers
708 20:43:46.120530 SMI_STS: PM1
709 20:43:46.121081 PM1_STS: WAK PWRBTN
710 20:43:46.130414 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
711 20:43:46.130894 In relocation handler: CPU 0
712 20:43:46.137209 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
713 20:43:46.140617 Writing SMRR. base = 0x7b800006, mask=0xff800c00
714 20:43:46.143773 Relocation complete.
715 20:43:46.150422 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
716 20:43:46.154342 In relocation handler: CPU 5
717 20:43:46.157246 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
718 20:43:46.160873 Relocation complete.
719 20:43:46.166996 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
720 20:43:46.170362 In relocation handler: CPU 4
721 20:43:46.173679 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
722 20:43:46.177239 Writing SMRR. base = 0x7b800006, mask=0xff800c00
723 20:43:46.180564 Relocation complete.
724 20:43:46.187331 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
725 20:43:46.190418 In relocation handler: CPU 3
726 20:43:46.193881 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
727 20:43:46.201047 Writing SMRR. base = 0x7b800006, mask=0xff800c00
728 20:43:46.201528 Relocation complete.
729 20:43:46.207270 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
730 20:43:46.210925 In relocation handler: CPU 1
731 20:43:46.217265 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
732 20:43:46.221363 Writing SMRR. base = 0x7b800006, mask=0xff800c00
733 20:43:46.224549 Relocation complete.
734 20:43:46.230644 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
735 20:43:46.234125 In relocation handler: CPU 2
736 20:43:46.237246 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
737 20:43:46.240871 Writing SMRR. base = 0x7b800006, mask=0xff800c00
738 20:43:46.244234 Relocation complete.
739 20:43:46.251157 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
740 20:43:46.254273 In relocation handler: CPU 6
741 20:43:46.257704 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
742 20:43:46.260925 Relocation complete.
743 20:43:46.267596 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
744 20:43:46.270926 In relocation handler: CPU 7
745 20:43:46.274638 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
746 20:43:46.281391 Writing SMRR. base = 0x7b800006, mask=0xff800c00
747 20:43:46.282191 Relocation complete.
748 20:43:46.284754 Initializing CPU #0
749 20:43:46.287557 CPU: vendor Intel device 906a4
750 20:43:46.290886 CPU: family 06, model 9a, stepping 04
751 20:43:46.294111 Clearing out pending MCEs
752 20:43:46.297701 cpu: energy policy set to 7
753 20:43:46.300864 Turbo is available but hidden
754 20:43:46.304575 Turbo is available and visible
755 20:43:46.307566 microcode: Update skipped, already up-to-date
756 20:43:46.308261 CPU #0 initialized
757 20:43:46.310959 Initializing CPU #5
758 20:43:46.314783 Initializing CPU #3
759 20:43:46.315350 Initializing CPU #4
760 20:43:46.318147 CPU: vendor Intel device 906a4
761 20:43:46.321355 CPU: family 06, model 9a, stepping 04
762 20:43:46.324610 Initializing CPU #1
763 20:43:46.327695 CPU: vendor Intel device 906a4
764 20:43:46.331065 CPU: family 06, model 9a, stepping 04
765 20:43:46.334376 Initializing CPU #2
766 20:43:46.334919 Initializing CPU #6
767 20:43:46.337629 CPU: vendor Intel device 906a4
768 20:43:46.341442 CPU: family 06, model 9a, stepping 04
769 20:43:46.344670 Clearing out pending MCEs
770 20:43:46.348134 CPU: vendor Intel device 906a4
771 20:43:46.351009 CPU: family 06, model 9a, stepping 04
772 20:43:46.354732 CPU: vendor Intel device 906a4
773 20:43:46.357976 CPU: family 06, model 9a, stepping 04
774 20:43:46.361301 Clearing out pending MCEs
775 20:43:46.364323 Clearing out pending MCEs
776 20:43:46.368002 cpu: energy policy set to 7
777 20:43:46.371259 Clearing out pending MCEs
778 20:43:46.371740 cpu: energy policy set to 7
779 20:43:46.378030 microcode: Update skipped, already up-to-date
780 20:43:46.378568 CPU #4 initialized
781 20:43:46.381242 CPU: vendor Intel device 906a4
782 20:43:46.384876 CPU: family 06, model 9a, stepping 04
783 20:43:46.388239 cpu: energy policy set to 7
784 20:43:46.391618 cpu: energy policy set to 7
785 20:43:46.395114 microcode: Update skipped, already up-to-date
786 20:43:46.398397 CPU #1 initialized
787 20:43:46.401743 microcode: Update skipped, already up-to-date
788 20:43:46.404737 CPU #3 initialized
789 20:43:46.408549 microcode: Update skipped, already up-to-date
790 20:43:46.411517 CPU #2 initialized
791 20:43:46.414967 Clearing out pending MCEs
792 20:43:46.415442 Initializing CPU #7
793 20:43:46.418251 cpu: energy policy set to 7
794 20:43:46.421774 CPU: vendor Intel device 906a4
795 20:43:46.425028 CPU: family 06, model 9a, stepping 04
796 20:43:46.431853 microcode: Update skipped, already up-to-date
797 20:43:46.432332 CPU #6 initialized
798 20:43:46.434997 Clearing out pending MCEs
799 20:43:46.438067 Clearing out pending MCEs
800 20:43:46.441584 cpu: energy policy set to 7
801 20:43:46.442233 cpu: energy policy set to 7
802 20:43:46.448947 microcode: Update skipped, already up-to-date
803 20:43:46.449539 CPU #7 initialized
804 20:43:46.455021 microcode: Update skipped, already up-to-date
805 20:43:46.455589 CPU #5 initialized
806 20:43:46.461765 bsp_do_flight_plan done after 722 msecs.
807 20:43:46.465371 CPU: frequency set to 4400 MHz
808 20:43:46.466152 Enabling SMIs.
809 20:43:46.471374 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
810 20:43:46.487318 Probing TPM I2C: done! DID_VID 0x00281ae0
811 20:43:46.490585 Locality already claimed
812 20:43:46.494773 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
813 20:43:46.505784 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
814 20:43:46.508949 Enabling GPIO PM b/c CR50 has long IRQ pulse support
815 20:43:46.516089 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
816 20:43:46.522114 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
817 20:43:46.525388 Found a VBT of 9216 bytes after decompression
818 20:43:46.528733 PCI 1.0, PIN A, using IRQ #16
819 20:43:46.532418 PCI 2.0, PIN A, using IRQ #17
820 20:43:46.535609 PCI 4.0, PIN A, using IRQ #18
821 20:43:46.538943 PCI 5.0, PIN A, using IRQ #16
822 20:43:46.542515 PCI 6.0, PIN A, using IRQ #16
823 20:43:46.545660 PCI 6.2, PIN C, using IRQ #18
824 20:43:46.548955 PCI 7.0, PIN A, using IRQ #19
825 20:43:46.552294 PCI 7.1, PIN B, using IRQ #20
826 20:43:46.555385 PCI 7.2, PIN C, using IRQ #21
827 20:43:46.558928 PCI 7.3, PIN D, using IRQ #22
828 20:43:46.562286 PCI 8.0, PIN A, using IRQ #23
829 20:43:46.565343 PCI D.0, PIN A, using IRQ #17
830 20:43:46.565818 PCI D.1, PIN B, using IRQ #19
831 20:43:46.568987 PCI 10.0, PIN A, using IRQ #24
832 20:43:46.572271 PCI 10.1, PIN B, using IRQ #25
833 20:43:46.575653 PCI 10.6, PIN C, using IRQ #20
834 20:43:46.578929 PCI 10.7, PIN D, using IRQ #21
835 20:43:46.582309 PCI 11.0, PIN A, using IRQ #26
836 20:43:46.585395 PCI 11.1, PIN B, using IRQ #27
837 20:43:46.588782 PCI 11.2, PIN C, using IRQ #28
838 20:43:46.592101 PCI 11.3, PIN D, using IRQ #29
839 20:43:46.595644 PCI 12.0, PIN A, using IRQ #30
840 20:43:46.599232 PCI 12.6, PIN B, using IRQ #31
841 20:43:46.602574 PCI 12.7, PIN C, using IRQ #22
842 20:43:46.605955 PCI 13.0, PIN A, using IRQ #32
843 20:43:46.609697 PCI 13.1, PIN B, using IRQ #33
844 20:43:46.612123 PCI 13.2, PIN C, using IRQ #34
845 20:43:46.612607 PCI 13.3, PIN D, using IRQ #35
846 20:43:46.615731 PCI 14.0, PIN B, using IRQ #23
847 20:43:46.618854 PCI 14.1, PIN A, using IRQ #36
848 20:43:46.622314 PCI 14.3, PIN C, using IRQ #17
849 20:43:46.625491 PCI 15.0, PIN A, using IRQ #37
850 20:43:46.628867 PCI 15.1, PIN B, using IRQ #38
851 20:43:46.632636 PCI 15.2, PIN C, using IRQ #39
852 20:43:46.636038 PCI 15.3, PIN D, using IRQ #40
853 20:43:46.639463 PCI 16.0, PIN A, using IRQ #18
854 20:43:46.642351 PCI 16.1, PIN B, using IRQ #19
855 20:43:46.646043 PCI 16.2, PIN C, using IRQ #20
856 20:43:46.649336 PCI 16.3, PIN D, using IRQ #21
857 20:43:46.652964 PCI 16.4, PIN A, using IRQ #18
858 20:43:46.656145 PCI 16.5, PIN B, using IRQ #19
859 20:43:46.659415 PCI 17.0, PIN A, using IRQ #22
860 20:43:46.662376 PCI 19.0, PIN A, using IRQ #41
861 20:43:46.662925 PCI 19.1, PIN B, using IRQ #42
862 20:43:46.665826 PCI 19.2, PIN C, using IRQ #43
863 20:43:46.668857 PCI 1C.0, PIN A, using IRQ #16
864 20:43:46.672563 PCI 1C.1, PIN B, using IRQ #17
865 20:43:46.676203 PCI 1C.2, PIN C, using IRQ #18
866 20:43:46.679138 PCI 1C.3, PIN D, using IRQ #19
867 20:43:46.682736 PCI 1C.4, PIN A, using IRQ #16
868 20:43:46.686034 PCI 1C.5, PIN B, using IRQ #17
869 20:43:46.689205 PCI 1C.6, PIN C, using IRQ #18
870 20:43:46.693065 PCI 1C.7, PIN D, using IRQ #19
871 20:43:46.696219 PCI 1D.0, PIN A, using IRQ #16
872 20:43:46.699470 PCI 1D.1, PIN B, using IRQ #17
873 20:43:46.702468 PCI 1D.2, PIN C, using IRQ #18
874 20:43:46.705901 PCI 1D.3, PIN D, using IRQ #19
875 20:43:46.709333 PCI 1E.0, PIN A, using IRQ #23
876 20:43:46.712458 PCI 1E.1, PIN B, using IRQ #20
877 20:43:46.712934 PCI 1E.2, PIN C, using IRQ #44
878 20:43:46.716170 PCI 1E.3, PIN D, using IRQ #45
879 20:43:46.719255 PCI 1F.3, PIN B, using IRQ #22
880 20:43:46.722549 PCI 1F.4, PIN C, using IRQ #23
881 20:43:46.726009 PCI 1F.6, PIN D, using IRQ #20
882 20:43:46.729285 PCI 1F.7, PIN A, using IRQ #21
883 20:43:46.735762 IRQ: Using dynamically assigned PCI IO-APIC IRQs
884 20:43:46.742829 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
885 20:43:46.922016 FSPS returned 0
886 20:43:46.925015 Executing Phase 1 of FspMultiPhaseSiInit
887 20:43:46.935257 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
888 20:43:46.938436 port C0 DISC req: usage 1 usb3 1 usb2 1
889 20:43:46.941964 Raw Buffer output 0 00000111
890 20:43:46.945613 Raw Buffer output 1 00000000
891 20:43:46.949099 pmc_send_ipc_cmd succeeded
892 20:43:46.952257 port C1 DISC req: usage 1 usb3 3 usb2 3
893 20:43:46.955598 Raw Buffer output 0 00000331
894 20:43:46.958598 Raw Buffer output 1 00000000
895 20:43:46.962589 pmc_send_ipc_cmd succeeded
896 20:43:46.966575 Detected 6 core, 8 thread CPU.
897 20:43:46.969744 Detected 6 core, 8 thread CPU.
898 20:43:46.975474 Detected 6 core, 8 thread CPU.
899 20:43:46.978476 Detected 6 core, 8 thread CPU.
900 20:43:46.981582 Detected 6 core, 8 thread CPU.
901 20:43:46.984869 Detected 6 core, 8 thread CPU.
902 20:43:46.988462 Detected 6 core, 8 thread CPU.
903 20:43:46.991876 Detected 6 core, 8 thread CPU.
904 20:43:46.995166 Detected 6 core, 8 thread CPU.
905 20:43:46.998688 Detected 6 core, 8 thread CPU.
906 20:43:47.001944 Detected 6 core, 8 thread CPU.
907 20:43:47.005156 Detected 6 core, 8 thread CPU.
908 20:43:47.008427 Detected 6 core, 8 thread CPU.
909 20:43:47.011618 Detected 6 core, 8 thread CPU.
910 20:43:47.015186 Detected 6 core, 8 thread CPU.
911 20:43:47.018535 Detected 6 core, 8 thread CPU.
912 20:43:47.021800 Detected 6 core, 8 thread CPU.
913 20:43:47.025427 Detected 6 core, 8 thread CPU.
914 20:43:47.028700 Detected 6 core, 8 thread CPU.
915 20:43:47.031728 Detected 6 core, 8 thread CPU.
916 20:43:47.034925 Detected 6 core, 8 thread CPU.
917 20:43:47.035395 Detected 6 core, 8 thread CPU.
918 20:43:47.328454 Detected 6 core, 8 thread CPU.
919 20:43:47.331862 Detected 6 core, 8 thread CPU.
920 20:43:47.335163 Detected 6 core, 8 thread CPU.
921 20:43:47.338444 Detected 6 core, 8 thread CPU.
922 20:43:47.342193 Detected 6 core, 8 thread CPU.
923 20:43:47.345539 Detected 6 core, 8 thread CPU.
924 20:43:47.348976 Detected 6 core, 8 thread CPU.
925 20:43:47.352418 Detected 6 core, 8 thread CPU.
926 20:43:47.355512 Detected 6 core, 8 thread CPU.
927 20:43:47.358627 Detected 6 core, 8 thread CPU.
928 20:43:47.362011 Detected 6 core, 8 thread CPU.
929 20:43:47.365942 Detected 6 core, 8 thread CPU.
930 20:43:47.368861 Detected 6 core, 8 thread CPU.
931 20:43:47.372685 Detected 6 core, 8 thread CPU.
932 20:43:47.375454 Detected 6 core, 8 thread CPU.
933 20:43:47.378969 Detected 6 core, 8 thread CPU.
934 20:43:47.382612 Detected 6 core, 8 thread CPU.
935 20:43:47.383192 Detected 6 core, 8 thread CPU.
936 20:43:47.385726 Detected 6 core, 8 thread CPU.
937 20:43:47.389162 Detected 6 core, 8 thread CPU.
938 20:43:47.392328 Display FSP Version Info HOB
939 20:43:47.395906 Reference Code - CPU = c.0.65.70
940 20:43:47.399067 uCode Version = 0.0.4.23
941 20:43:47.402297 TXT ACM version = ff.ff.ff.ffff
942 20:43:47.405774 Reference Code - ME = c.0.65.70
943 20:43:47.409233 MEBx version = 0.0.0.0
944 20:43:47.412577 ME Firmware Version = Lite SKU
945 20:43:47.415797 Reference Code - PCH = c.0.65.70
946 20:43:47.418663 PCH-CRID Status = Disabled
947 20:43:47.422292 PCH-CRID Original Value = ff.ff.ff.ffff
948 20:43:47.425665 PCH-CRID New Value = ff.ff.ff.ffff
949 20:43:47.429093 OPROM - RST - RAID = ff.ff.ff.ffff
950 20:43:47.433277 PCH Hsio Version = 4.0.0.0
951 20:43:47.435740 Reference Code - SA - System Agent = c.0.65.70
952 20:43:47.438905 Reference Code - MRC = 0.0.3.80
953 20:43:47.442227 SA - PCIe Version = c.0.65.70
954 20:43:47.445599 SA-CRID Status = Disabled
955 20:43:47.449097 SA-CRID Original Value = 0.0.0.4
956 20:43:47.452409 SA-CRID New Value = 0.0.0.4
957 20:43:47.452983 OPROM - VBIOS = ff.ff.ff.ffff
958 20:43:47.459317 IO Manageability Engine FW Version = 24.0.4.0
959 20:43:47.462588 PHY Build Version = 0.0.0.2016
960 20:43:47.465824 Thunderbolt(TM) FW Version = 0.0.0.0
961 20:43:47.472358 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
962 20:43:47.478860 BS: BS_DEV_INIT_CHIPS run times (exec / console): 492 / 507 ms
963 20:43:47.479449 Enumerating buses...
964 20:43:47.486050 Show all devs... Before device enumeration.
965 20:43:47.486629 Root Device: enabled 1
966 20:43:47.489317 CPU_CLUSTER: 0: enabled 1
967 20:43:47.492659 DOMAIN: 0000: enabled 1
968 20:43:47.493229 GPIO: 0: enabled 1
969 20:43:47.495357 PCI: 00:00.0: enabled 1
970 20:43:47.499206 PCI: 00:01.0: enabled 0
971 20:43:47.502412 PCI: 00:01.1: enabled 0
972 20:43:47.502981 PCI: 00:02.0: enabled 1
973 20:43:47.505751 PCI: 00:04.0: enabled 1
974 20:43:47.509413 PCI: 00:05.0: enabled 0
975 20:43:47.512356 PCI: 00:06.0: enabled 1
976 20:43:47.512966 PCI: 00:06.2: enabled 0
977 20:43:47.515951 PCI: 00:07.0: enabled 0
978 20:43:47.519433 PCI: 00:07.1: enabled 0
979 20:43:47.520009 PCI: 00:07.2: enabled 0
980 20:43:47.522671 PCI: 00:07.3: enabled 0
981 20:43:47.525955 PCI: 00:08.0: enabled 0
982 20:43:47.529219 PCI: 00:09.0: enabled 0
983 20:43:47.529783 PCI: 00:0a.0: enabled 1
984 20:43:47.532789 PCI: 00:0d.0: enabled 1
985 20:43:47.535893 PCI: 00:0d.1: enabled 0
986 20:43:47.539614 PCI: 00:0d.2: enabled 0
987 20:43:47.540224 PCI: 00:0d.3: enabled 0
988 20:43:47.542743 PCI: 00:0e.0: enabled 0
989 20:43:47.546893 PCI: 00:10.0: enabled 0
990 20:43:47.549361 PCI: 00:10.1: enabled 0
991 20:43:47.549970 PCI: 00:10.6: enabled 0
992 20:43:47.552413 PCI: 00:10.7: enabled 0
993 20:43:47.555681 PCI: 00:12.0: enabled 0
994 20:43:47.556155 PCI: 00:12.6: enabled 0
995 20:43:47.559319 PCI: 00:12.7: enabled 0
996 20:43:47.562466 PCI: 00:13.0: enabled 0
997 20:43:47.566110 PCI: 00:14.0: enabled 1
998 20:43:47.566684 PCI: 00:14.1: enabled 0
999 20:43:47.569634 PCI: 00:14.2: enabled 1
1000 20:43:47.572483 PCI: 00:14.3: enabled 1
1001 20:43:47.576177 PCI: 00:15.0: enabled 1
1002 20:43:47.576751 PCI: 00:15.1: enabled 1
1003 20:43:47.579349 PCI: 00:15.2: enabled 0
1004 20:43:47.582227 PCI: 00:15.3: enabled 1
1005 20:43:47.585799 PCI: 00:16.0: enabled 1
1006 20:43:47.586309 PCI: 00:16.1: enabled 0
1007 20:43:47.589078 PCI: 00:16.2: enabled 0
1008 20:43:47.592553 PCI: 00:16.3: enabled 0
1009 20:43:47.593141 PCI: 00:16.4: enabled 0
1010 20:43:47.596142 PCI: 00:16.5: enabled 0
1011 20:43:47.599170 PCI: 00:17.0: enabled 1
1012 20:43:47.602777 PCI: 00:19.0: enabled 0
1013 20:43:47.603349 PCI: 00:19.1: enabled 1
1014 20:43:47.606047 PCI: 00:19.2: enabled 0
1015 20:43:47.609630 PCI: 00:1a.0: enabled 0
1016 20:43:47.612816 PCI: 00:1c.0: enabled 0
1017 20:43:47.613442 PCI: 00:1c.1: enabled 0
1018 20:43:47.616114 PCI: 00:1c.2: enabled 0
1019 20:43:47.618997 PCI: 00:1c.3: enabled 0
1020 20:43:47.622335 PCI: 00:1c.4: enabled 0
1021 20:43:47.622806 PCI: 00:1c.5: enabled 0
1022 20:43:47.626020 PCI: 00:1c.6: enabled 0
1023 20:43:47.629236 PCI: 00:1c.7: enabled 0
1024 20:43:47.629710 PCI: 00:1d.0: enabled 0
1025 20:43:47.632843 PCI: 00:1d.1: enabled 0
1026 20:43:47.635589 PCI: 00:1d.2: enabled 0
1027 20:43:47.639504 PCI: 00:1d.3: enabled 0
1028 20:43:47.640064 PCI: 00:1e.0: enabled 1
1029 20:43:47.642389 PCI: 00:1e.1: enabled 0
1030 20:43:47.645723 PCI: 00:1e.2: enabled 0
1031 20:43:47.649600 PCI: 00:1e.3: enabled 1
1032 20:43:47.650216 PCI: 00:1f.0: enabled 1
1033 20:43:47.652445 PCI: 00:1f.1: enabled 0
1034 20:43:47.655755 PCI: 00:1f.2: enabled 1
1035 20:43:47.659167 PCI: 00:1f.3: enabled 1
1036 20:43:47.659733 PCI: 00:1f.4: enabled 0
1037 20:43:47.662222 PCI: 00:1f.5: enabled 1
1038 20:43:47.665831 PCI: 00:1f.6: enabled 0
1039 20:43:47.669119 PCI: 00:1f.7: enabled 0
1040 20:43:47.669677 GENERIC: 0.0: enabled 1
1041 20:43:47.672560 GENERIC: 0.0: enabled 1
1042 20:43:47.676003 GENERIC: 1.0: enabled 1
1043 20:43:47.676561 GENERIC: 0.0: enabled 1
1044 20:43:47.679483 GENERIC: 1.0: enabled 1
1045 20:43:47.682277 USB0 port 0: enabled 1
1046 20:43:47.685581 USB0 port 0: enabled 1
1047 20:43:47.686100 GENERIC: 0.0: enabled 1
1048 20:43:47.689677 I2C: 00:1a: enabled 1
1049 20:43:47.692202 I2C: 00:31: enabled 1
1050 20:43:47.692666 I2C: 00:32: enabled 1
1051 20:43:47.695487 I2C: 00:50: enabled 1
1052 20:43:47.699494 I2C: 00:10: enabled 1
1053 20:43:47.700057 I2C: 00:15: enabled 1
1054 20:43:47.702300 I2C: 00:2c: enabled 1
1055 20:43:47.706187 GENERIC: 0.0: enabled 1
1056 20:43:47.706747 SPI: 00: enabled 1
1057 20:43:47.709168 PNP: 0c09.0: enabled 1
1058 20:43:47.712662 GENERIC: 0.0: enabled 1
1059 20:43:47.716033 USB3 port 0: enabled 1
1060 20:43:47.716596 USB3 port 1: enabled 0
1061 20:43:47.718795 USB3 port 2: enabled 1
1062 20:43:47.722571 USB3 port 3: enabled 0
1063 20:43:47.723036 USB2 port 0: enabled 1
1064 20:43:47.725895 USB2 port 1: enabled 0
1065 20:43:47.728920 USB2 port 2: enabled 1
1066 20:43:47.729384 USB2 port 3: enabled 0
1067 20:43:47.732688 USB2 port 4: enabled 0
1068 20:43:47.735854 USB2 port 5: enabled 1
1069 20:43:47.738955 USB2 port 6: enabled 0
1070 20:43:47.739421 USB2 port 7: enabled 0
1071 20:43:47.742730 USB2 port 8: enabled 1
1072 20:43:47.746056 USB2 port 9: enabled 1
1073 20:43:47.746631 USB3 port 0: enabled 1
1074 20:43:47.749061 USB3 port 1: enabled 0
1075 20:43:47.752481 USB3 port 2: enabled 0
1076 20:43:47.753044 USB3 port 3: enabled 0
1077 20:43:47.756308 GENERIC: 0.0: enabled 1
1078 20:43:47.759400 GENERIC: 1.0: enabled 1
1079 20:43:47.762554 APIC: 00: enabled 1
1080 20:43:47.763023 APIC: 12: enabled 1
1081 20:43:47.765836 APIC: 14: enabled 1
1082 20:43:47.766505 APIC: 16: enabled 1
1083 20:43:47.769428 APIC: 10: enabled 1
1084 20:43:47.772817 APIC: 01: enabled 1
1085 20:43:47.773379 APIC: 09: enabled 1
1086 20:43:47.775970 APIC: 08: enabled 1
1087 20:43:47.776542 Compare with tree...
1088 20:43:47.779016 Root Device: enabled 1
1089 20:43:47.782699 CPU_CLUSTER: 0: enabled 1
1090 20:43:47.785808 APIC: 00: enabled 1
1091 20:43:47.786302 APIC: 12: enabled 1
1092 20:43:47.789535 APIC: 14: enabled 1
1093 20:43:47.792688 APIC: 16: enabled 1
1094 20:43:47.793249 APIC: 10: enabled 1
1095 20:43:47.795787 APIC: 01: enabled 1
1096 20:43:47.799382 APIC: 09: enabled 1
1097 20:43:47.799942 APIC: 08: enabled 1
1098 20:43:47.802444 DOMAIN: 0000: enabled 1
1099 20:43:47.806001 GPIO: 0: enabled 1
1100 20:43:47.809579 PCI: 00:00.0: enabled 1
1101 20:43:47.810171 PCI: 00:01.0: enabled 0
1102 20:43:47.812500 PCI: 00:01.1: enabled 0
1103 20:43:47.816212 PCI: 00:02.0: enabled 1
1104 20:43:47.819480 PCI: 00:04.0: enabled 1
1105 20:43:47.822886 GENERIC: 0.0: enabled 1
1106 20:43:47.823453 PCI: 00:05.0: enabled 0
1107 20:43:47.826455 PCI: 00:06.0: enabled 1
1108 20:43:47.829427 PCI: 00:06.2: enabled 0
1109 20:43:47.832942 PCI: 00:08.0: enabled 0
1110 20:43:47.835853 PCI: 00:09.0: enabled 0
1111 20:43:47.836331 PCI: 00:0a.0: enabled 1
1112 20:43:47.839242 PCI: 00:0d.0: enabled 1
1113 20:43:47.843078 USB0 port 0: enabled 1
1114 20:43:47.846295 USB3 port 0: enabled 1
1115 20:43:47.846858 USB3 port 1: enabled 0
1116 20:43:47.849947 USB3 port 2: enabled 1
1117 20:43:47.852947 USB3 port 3: enabled 0
1118 20:43:47.856175 PCI: 00:0d.1: enabled 0
1119 20:43:47.859412 PCI: 00:0d.2: enabled 0
1120 20:43:47.860001 PCI: 00:0d.3: enabled 0
1121 20:43:47.862836 PCI: 00:0e.0: enabled 0
1122 20:43:47.866375 PCI: 00:10.0: enabled 0
1123 20:43:47.869814 PCI: 00:10.1: enabled 0
1124 20:43:47.873018 PCI: 00:10.6: enabled 0
1125 20:43:47.873579 PCI: 00:10.7: enabled 0
1126 20:43:47.876033 PCI: 00:12.0: enabled 0
1127 20:43:47.879493 PCI: 00:12.6: enabled 0
1128 20:43:47.882880 PCI: 00:12.7: enabled 0
1129 20:43:47.886332 PCI: 00:13.0: enabled 0
1130 20:43:47.886798 PCI: 00:14.0: enabled 1
1131 20:43:47.889800 USB0 port 0: enabled 1
1132 20:43:47.893520 USB2 port 0: enabled 1
1133 20:43:47.896389 USB2 port 1: enabled 0
1134 20:43:47.900026 USB2 port 2: enabled 1
1135 20:43:47.900588 USB2 port 3: enabled 0
1136 20:43:47.903306 USB2 port 4: enabled 0
1137 20:43:47.906574 USB2 port 5: enabled 1
1138 20:43:47.909979 USB2 port 6: enabled 0
1139 20:43:47.912854 USB2 port 7: enabled 0
1140 20:43:47.916575 USB2 port 8: enabled 1
1141 20:43:47.917039 USB2 port 9: enabled 1
1142 20:43:47.919614 USB3 port 0: enabled 1
1143 20:43:47.923060 USB3 port 1: enabled 0
1144 20:43:47.926530 USB3 port 2: enabled 0
1145 20:43:47.929710 USB3 port 3: enabled 0
1146 20:43:47.930312 PCI: 00:14.1: enabled 0
1147 20:43:47.933087 PCI: 00:14.2: enabled 1
1148 20:43:47.936618 PCI: 00:14.3: enabled 1
1149 20:43:47.939818 GENERIC: 0.0: enabled 1
1150 20:43:47.942903 PCI: 00:15.0: enabled 1
1151 20:43:47.943369 I2C: 00:1a: enabled 1
1152 20:43:47.946419 I2C: 00:31: enabled 1
1153 20:43:47.950056 I2C: 00:32: enabled 1
1154 20:43:47.953184 PCI: 00:15.1: enabled 1
1155 20:43:47.953746 I2C: 00:50: enabled 1
1156 20:43:47.956517 PCI: 00:15.2: enabled 0
1157 20:43:47.959919 PCI: 00:15.3: enabled 1
1158 20:43:47.963381 I2C: 00:10: enabled 1
1159 20:43:47.966228 PCI: 00:16.0: enabled 1
1160 20:43:47.966804 PCI: 00:16.1: enabled 0
1161 20:43:47.969871 PCI: 00:16.2: enabled 0
1162 20:43:47.973203 PCI: 00:16.3: enabled 0
1163 20:43:47.976517 PCI: 00:16.4: enabled 0
1164 20:43:47.980002 PCI: 00:16.5: enabled 0
1165 20:43:47.980569 PCI: 00:17.0: enabled 1
1166 20:43:47.982742 PCI: 00:19.0: enabled 0
1167 20:43:47.986129 PCI: 00:19.1: enabled 1
1168 20:43:47.990185 I2C: 00:15: enabled 1
1169 20:43:47.990746 I2C: 00:2c: enabled 1
1170 20:43:47.993140 PCI: 00:19.2: enabled 0
1171 20:43:47.996395 PCI: 00:1a.0: enabled 0
1172 20:43:47.999691 PCI: 00:1e.0: enabled 1
1173 20:43:48.002733 PCI: 00:1e.1: enabled 0
1174 20:43:48.003203 PCI: 00:1e.2: enabled 0
1175 20:43:48.006157 PCI: 00:1e.3: enabled 1
1176 20:43:48.010207 SPI: 00: enabled 1
1177 20:43:48.012867 PCI: 00:1f.0: enabled 1
1178 20:43:48.013343 PNP: 0c09.0: enabled 1
1179 20:43:48.016277 PCI: 00:1f.1: enabled 0
1180 20:43:48.019707 PCI: 00:1f.2: enabled 1
1181 20:43:48.023128 GENERIC: 0.0: enabled 1
1182 20:43:48.025948 GENERIC: 0.0: enabled 1
1183 20:43:48.029483 GENERIC: 1.0: enabled 1
1184 20:43:48.029989 PCI: 00:1f.3: enabled 1
1185 20:43:48.033217 PCI: 00:1f.4: enabled 0
1186 20:43:48.036666 PCI: 00:1f.5: enabled 1
1187 20:43:48.039811 PCI: 00:1f.6: enabled 0
1188 20:43:48.043211 PCI: 00:1f.7: enabled 0
1189 20:43:48.043769 Root Device scanning...
1190 20:43:48.046532 scan_static_bus for Root Device
1191 20:43:48.049429 CPU_CLUSTER: 0 enabled
1192 20:43:48.052904 DOMAIN: 0000 enabled
1193 20:43:48.053469 DOMAIN: 0000 scanning...
1194 20:43:48.055946 PCI: pci_scan_bus for bus 00
1195 20:43:48.059915 PCI: 00:00.0 [8086/0000] ops
1196 20:43:48.062741 PCI: 00:00.0 [8086/4609] enabled
1197 20:43:48.066347 PCI: 00:02.0 [8086/0000] bus ops
1198 20:43:48.069686 PCI: 00:02.0 [8086/46b3] enabled
1199 20:43:48.073001 PCI: 00:04.0 [8086/0000] bus ops
1200 20:43:48.076531 PCI: 00:04.0 [8086/461d] enabled
1201 20:43:48.079585 PCI: 00:06.0 [8086/0000] bus ops
1202 20:43:48.082869 PCI: 00:06.0 [8086/464d] enabled
1203 20:43:48.086035 PCI: 00:08.0 [8086/464f] disabled
1204 20:43:48.089611 PCI: 00:0a.0 [8086/467d] enabled
1205 20:43:48.092786 PCI: 00:0d.0 [8086/0000] bus ops
1206 20:43:48.096201 PCI: 00:0d.0 [8086/461e] enabled
1207 20:43:48.099711 PCI: 00:14.0 [8086/0000] bus ops
1208 20:43:48.102874 PCI: 00:14.0 [8086/51ed] enabled
1209 20:43:48.105961 PCI: 00:14.2 [8086/51ef] enabled
1210 20:43:48.109438 PCI: 00:14.3 [8086/0000] bus ops
1211 20:43:48.112743 PCI: 00:14.3 [8086/51f0] enabled
1212 20:43:48.116161 PCI: 00:15.0 [8086/0000] bus ops
1213 20:43:48.122555 PCI: 00:15.0 [8086/51e8] enabled
1214 20:43:48.125889 PCI: 00:15.1 [8086/0000] bus ops
1215 20:43:48.129217 PCI: 00:15.1 [8086/51e9] enabled
1216 20:43:48.132497 PCI: 00:15.2 [8086/0000] bus ops
1217 20:43:48.135998 PCI: 00:15.2 [8086/51ea] disabled
1218 20:43:48.139316 PCI: 00:15.3 [8086/0000] bus ops
1219 20:43:48.142952 PCI: 00:15.3 [8086/51eb] enabled
1220 20:43:48.143517 PCI: 00:16.0 [8086/0000] ops
1221 20:43:48.145685 PCI: 00:16.0 [8086/51e0] enabled
1222 20:43:48.152677 PCI: Static device PCI: 00:17.0 not found, disabling it.
1223 20:43:48.156413 PCI: 00:19.0 [8086/0000] bus ops
1224 20:43:48.159372 PCI: 00:19.0 [8086/51c5] disabled
1225 20:43:48.163030 PCI: 00:19.1 [8086/0000] bus ops
1226 20:43:48.166504 PCI: 00:19.1 [8086/51c6] enabled
1227 20:43:48.169350 PCI: 00:1e.0 [8086/0000] ops
1228 20:43:48.172835 PCI: 00:1e.0 [8086/51a8] enabled
1229 20:43:48.176103 PCI: 00:1e.3 [8086/0000] bus ops
1230 20:43:48.179510 PCI: 00:1e.3 [8086/51ab] enabled
1231 20:43:48.183007 PCI: 00:1f.0 [8086/0000] bus ops
1232 20:43:48.186277 PCI: 00:1f.0 [8086/5182] enabled
1233 20:43:48.189631 RTC Init
1234 20:43:48.192866 Set power on after power failure.
1235 20:43:48.193646 Disabling Deep S3
1236 20:43:48.196396 Disabling Deep S3
1237 20:43:48.199754 Disabling Deep S4
1238 20:43:48.200311 Disabling Deep S4
1239 20:43:48.203085 Disabling Deep S5
1240 20:43:48.203645 Disabling Deep S5
1241 20:43:48.206743 PCI: 00:1f.2 [0000/0000] hidden
1242 20:43:48.209913 PCI: 00:1f.3 [8086/0000] bus ops
1243 20:43:48.212974 PCI: 00:1f.3 [8086/51c8] enabled
1244 20:43:48.216006 PCI: 00:1f.5 [8086/0000] bus ops
1245 20:43:48.219595 PCI: 00:1f.5 [8086/51a4] enabled
1246 20:43:48.222643 GPIO: 0 enabled
1247 20:43:48.226547 PCI: Leftover static devices:
1248 20:43:48.227107 PCI: 00:01.0
1249 20:43:48.227483 PCI: 00:01.1
1250 20:43:48.229676 PCI: 00:05.0
1251 20:43:48.230182 PCI: 00:06.2
1252 20:43:48.232675 PCI: 00:09.0
1253 20:43:48.233141 PCI: 00:0d.1
1254 20:43:48.233506 PCI: 00:0d.2
1255 20:43:48.236287 PCI: 00:0d.3
1256 20:43:48.236749 PCI: 00:0e.0
1257 20:43:48.239741 PCI: 00:10.0
1258 20:43:48.240205 PCI: 00:10.1
1259 20:43:48.240576 PCI: 00:10.6
1260 20:43:48.242923 PCI: 00:10.7
1261 20:43:48.243385 PCI: 00:12.0
1262 20:43:48.246498 PCI: 00:12.6
1263 20:43:48.246958 PCI: 00:12.7
1264 20:43:48.249766 PCI: 00:13.0
1265 20:43:48.250306 PCI: 00:14.1
1266 20:43:48.250678 PCI: 00:16.1
1267 20:43:48.252898 PCI: 00:16.2
1268 20:43:48.253356 PCI: 00:16.3
1269 20:43:48.256356 PCI: 00:16.4
1270 20:43:48.256953 PCI: 00:16.5
1271 20:43:48.257335 PCI: 00:17.0
1272 20:43:48.259554 PCI: 00:19.2
1273 20:43:48.260039 PCI: 00:1a.0
1274 20:43:48.263119 PCI: 00:1e.1
1275 20:43:48.263698 PCI: 00:1e.2
1276 20:43:48.264070 PCI: 00:1f.1
1277 20:43:48.266395 PCI: 00:1f.4
1278 20:43:48.266852 PCI: 00:1f.6
1279 20:43:48.269786 PCI: 00:1f.7
1280 20:43:48.273403 PCI: Check your devicetree.cb.
1281 20:43:48.274014 PCI: 00:02.0 scanning...
1282 20:43:48.276617 scan_generic_bus for PCI: 00:02.0
1283 20:43:48.282892 scan_generic_bus for PCI: 00:02.0 done
1284 20:43:48.286101 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1285 20:43:48.289485 PCI: 00:04.0 scanning...
1286 20:43:48.293003 scan_generic_bus for PCI: 00:04.0
1287 20:43:48.293563 GENERIC: 0.0 enabled
1288 20:43:48.299522 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1289 20:43:48.306780 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1290 20:43:48.307344 PCI: 00:06.0 scanning...
1291 20:43:48.313052 do_pci_scan_bridge for PCI: 00:06.0
1292 20:43:48.313684 PCI: pci_scan_bus for bus 01
1293 20:43:48.316126 PCI: 01:00.0 [15b7/5009] enabled
1294 20:43:48.319674 Enabling Common Clock Configuration
1295 20:43:48.326294 L1 Sub-State supported from root port 6
1296 20:43:48.330002 L1 Sub-State Support = 0x5
1297 20:43:48.330565 CommonModeRestoreTime = 0x6e
1298 20:43:48.336353 Power On Value = 0x5, Power On Scale = 0x2
1299 20:43:48.336917 ASPM: Enabled L1
1300 20:43:48.339537 PCIe: Max_Payload_Size adjusted to 256
1301 20:43:48.343081 PCI: 01:00.0: Enabled LTR
1302 20:43:48.346134 PCI: 01:00.0: Programmed LTR max latencies
1303 20:43:48.353549 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1304 20:43:48.356671 PCI: 00:0d.0 scanning...
1305 20:43:48.359636 scan_static_bus for PCI: 00:0d.0
1306 20:43:48.360206 USB0 port 0 enabled
1307 20:43:48.363463 USB0 port 0 scanning...
1308 20:43:48.366409 scan_static_bus for USB0 port 0
1309 20:43:48.370200 USB3 port 0 enabled
1310 20:43:48.370705 USB3 port 1 disabled
1311 20:43:48.373349 USB3 port 2 enabled
1312 20:43:48.373971 USB3 port 3 disabled
1313 20:43:48.376635 USB3 port 0 scanning...
1314 20:43:48.379973 scan_static_bus for USB3 port 0
1315 20:43:48.383222 scan_static_bus for USB3 port 0 done
1316 20:43:48.390501 scan_bus: bus USB3 port 0 finished in 6 msecs
1317 20:43:48.391069 USB3 port 2 scanning...
1318 20:43:48.393290 scan_static_bus for USB3 port 2
1319 20:43:48.396575 scan_static_bus for USB3 port 2 done
1320 20:43:48.403183 scan_bus: bus USB3 port 2 finished in 6 msecs
1321 20:43:48.406766 scan_static_bus for USB0 port 0 done
1322 20:43:48.410223 scan_bus: bus USB0 port 0 finished in 43 msecs
1323 20:43:48.416328 scan_static_bus for PCI: 00:0d.0 done
1324 20:43:48.419916 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1325 20:43:48.423254 PCI: 00:14.0 scanning...
1326 20:43:48.426982 scan_static_bus for PCI: 00:14.0
1327 20:43:48.427548 USB0 port 0 enabled
1328 20:43:48.429762 USB0 port 0 scanning...
1329 20:43:48.433146 scan_static_bus for USB0 port 0
1330 20:43:48.436580 USB2 port 0 enabled
1331 20:43:48.437147 USB2 port 1 disabled
1332 20:43:48.439721 USB2 port 2 enabled
1333 20:43:48.443710 USB2 port 3 disabled
1334 20:43:48.444270 USB2 port 4 disabled
1335 20:43:48.446489 USB2 port 5 enabled
1336 20:43:48.446947 USB2 port 6 disabled
1337 20:43:48.450019 USB2 port 7 disabled
1338 20:43:48.453509 USB2 port 8 enabled
1339 20:43:48.454121 USB2 port 9 enabled
1340 20:43:48.456834 USB3 port 0 enabled
1341 20:43:48.460066 USB3 port 1 disabled
1342 20:43:48.460624 USB3 port 2 disabled
1343 20:43:48.463368 USB3 port 3 disabled
1344 20:43:48.466506 USB2 port 0 scanning...
1345 20:43:48.469653 scan_static_bus for USB2 port 0
1346 20:43:48.473258 scan_static_bus for USB2 port 0 done
1347 20:43:48.476442 scan_bus: bus USB2 port 0 finished in 6 msecs
1348 20:43:48.479669 USB2 port 2 scanning...
1349 20:43:48.483383 scan_static_bus for USB2 port 2
1350 20:43:48.486202 scan_static_bus for USB2 port 2 done
1351 20:43:48.489914 scan_bus: bus USB2 port 2 finished in 6 msecs
1352 20:43:48.493291 USB2 port 5 scanning...
1353 20:43:48.496849 scan_static_bus for USB2 port 5
1354 20:43:48.499906 scan_static_bus for USB2 port 5 done
1355 20:43:48.503594 scan_bus: bus USB2 port 5 finished in 6 msecs
1356 20:43:48.506627 USB2 port 8 scanning...
1357 20:43:48.510264 scan_static_bus for USB2 port 8
1358 20:43:48.513239 scan_static_bus for USB2 port 8 done
1359 20:43:48.519945 scan_bus: bus USB2 port 8 finished in 6 msecs
1360 20:43:48.520534 USB2 port 9 scanning...
1361 20:43:48.523173 scan_static_bus for USB2 port 9
1362 20:43:48.526609 scan_static_bus for USB2 port 9 done
1363 20:43:48.533212 scan_bus: bus USB2 port 9 finished in 6 msecs
1364 20:43:48.536796 USB3 port 0 scanning...
1365 20:43:48.539746 scan_static_bus for USB3 port 0
1366 20:43:48.543510 scan_static_bus for USB3 port 0 done
1367 20:43:48.546728 scan_bus: bus USB3 port 0 finished in 6 msecs
1368 20:43:48.550446 scan_static_bus for USB0 port 0 done
1369 20:43:48.557069 scan_bus: bus USB0 port 0 finished in 120 msecs
1370 20:43:48.560013 scan_static_bus for PCI: 00:14.0 done
1371 20:43:48.563897 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1372 20:43:48.566627 PCI: 00:14.3 scanning...
1373 20:43:48.570785 scan_static_bus for PCI: 00:14.3
1374 20:43:48.571360 GENERIC: 0.0 enabled
1375 20:43:48.577228 scan_static_bus for PCI: 00:14.3 done
1376 20:43:48.580239 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1377 20:43:48.583551 PCI: 00:15.0 scanning...
1378 20:43:48.586869 scan_static_bus for PCI: 00:15.0
1379 20:43:48.587330 I2C: 00:1a enabled
1380 20:43:48.590339 I2C: 00:31 enabled
1381 20:43:48.593354 I2C: 00:32 enabled
1382 20:43:48.596857 scan_static_bus for PCI: 00:15.0 done
1383 20:43:48.600080 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1384 20:43:48.604115 PCI: 00:15.1 scanning...
1385 20:43:48.607026 scan_static_bus for PCI: 00:15.1
1386 20:43:48.607496 I2C: 00:50 enabled
1387 20:43:48.613605 scan_static_bus for PCI: 00:15.1 done
1388 20:43:48.617233 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1389 20:43:48.620700 PCI: 00:15.3 scanning...
1390 20:43:48.623872 scan_static_bus for PCI: 00:15.3
1391 20:43:48.624370 I2C: 00:10 enabled
1392 20:43:48.627602 scan_static_bus for PCI: 00:15.3 done
1393 20:43:48.634494 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1394 20:43:48.637721 PCI: 00:19.1 scanning...
1395 20:43:48.640716 scan_static_bus for PCI: 00:19.1
1396 20:43:48.641183 I2C: 00:15 enabled
1397 20:43:48.644313 I2C: 00:2c enabled
1398 20:43:48.647202 scan_static_bus for PCI: 00:19.1 done
1399 20:43:48.650661 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1400 20:43:48.654146 PCI: 00:1e.3 scanning...
1401 20:43:48.657589 scan_generic_bus for PCI: 00:1e.3
1402 20:43:48.660487 SPI: 00 enabled
1403 20:43:48.664094 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1404 20:43:48.670778 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1405 20:43:48.674422 PCI: 00:1f.0 scanning...
1406 20:43:48.677714 scan_static_bus for PCI: 00:1f.0
1407 20:43:48.678323 PNP: 0c09.0 enabled
1408 20:43:48.680567 PNP: 0c09.0 scanning...
1409 20:43:48.683818 scan_static_bus for PNP: 0c09.0
1410 20:43:48.686950 scan_static_bus for PNP: 0c09.0 done
1411 20:43:48.690952 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1412 20:43:48.697368 scan_static_bus for PCI: 00:1f.0 done
1413 20:43:48.700625 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1414 20:43:48.703782 PCI: 00:1f.2 scanning...
1415 20:43:48.707305 scan_static_bus for PCI: 00:1f.2
1416 20:43:48.707870 GENERIC: 0.0 enabled
1417 20:43:48.710753 GENERIC: 0.0 scanning...
1418 20:43:48.714035 scan_static_bus for GENERIC: 0.0
1419 20:43:48.717111 GENERIC: 0.0 enabled
1420 20:43:48.717607 GENERIC: 1.0 enabled
1421 20:43:48.724180 scan_static_bus for GENERIC: 0.0 done
1422 20:43:48.727742 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1423 20:43:48.730806 scan_static_bus for PCI: 00:1f.2 done
1424 20:43:48.737752 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1425 20:43:48.738372 PCI: 00:1f.3 scanning...
1426 20:43:48.741252 scan_static_bus for PCI: 00:1f.3
1427 20:43:48.744459 scan_static_bus for PCI: 00:1f.3 done
1428 20:43:48.751126 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1429 20:43:48.754345 PCI: 00:1f.5 scanning...
1430 20:43:48.758046 scan_generic_bus for PCI: 00:1f.5
1431 20:43:48.760886 scan_generic_bus for PCI: 00:1f.5 done
1432 20:43:48.764342 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1433 20:43:48.770953 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1434 20:43:48.774354 scan_static_bus for Root Device done
1435 20:43:48.777805 scan_bus: bus Root Device finished in 729 msecs
1436 20:43:48.778402 done
1437 20:43:48.784503 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1438 20:43:48.791031 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1439 20:43:48.797774 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1440 20:43:48.801168 SPI flash protection: WPSW=0 SRP0=0
1441 20:43:48.804293 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1442 20:43:48.811032 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1443 20:43:48.814179 found VGA at PCI: 00:02.0
1444 20:43:48.817318 Setting up VGA for PCI: 00:02.0
1445 20:43:48.820884 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1446 20:43:48.828124 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1447 20:43:48.830934 Allocating resources...
1448 20:43:48.831401 Reading resources...
1449 20:43:48.834277 Root Device read_resources bus 0 link: 0
1450 20:43:48.840802 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1451 20:43:48.844208 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1452 20:43:48.847649 DOMAIN: 0000 read_resources bus 0 link: 0
1453 20:43:48.854508 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1454 20:43:48.860804 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1455 20:43:48.867654 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1456 20:43:48.874531 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1457 20:43:48.881332 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1458 20:43:48.888035 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1459 20:43:48.891183 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1460 20:43:48.897515 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1461 20:43:48.904712 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1462 20:43:48.911347 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1463 20:43:48.918096 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1464 20:43:48.924741 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1465 20:43:48.931148 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1466 20:43:48.937921 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1467 20:43:48.944687 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1468 20:43:48.951502 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1469 20:43:48.957953 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1470 20:43:48.964533 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1471 20:43:48.967941 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1472 20:43:48.974602 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1473 20:43:48.981310 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1474 20:43:48.984915 PCI: 00:04.0 read_resources bus 1 link: 0
1475 20:43:48.991276 PCI: 00:04.0 read_resources bus 1 link: 0 done
1476 20:43:48.994786 PCI: 00:06.0 read_resources bus 1 link: 0
1477 20:43:48.998269 PCI: 00:06.0 read_resources bus 1 link: 0 done
1478 20:43:49.004635 PCI: 00:0d.0 read_resources bus 0 link: 0
1479 20:43:49.008540 USB0 port 0 read_resources bus 0 link: 0
1480 20:43:49.011709 USB0 port 0 read_resources bus 0 link: 0 done
1481 20:43:49.018349 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1482 20:43:49.021533 PCI: 00:14.0 read_resources bus 0 link: 0
1483 20:43:49.024697 USB0 port 0 read_resources bus 0 link: 0
1484 20:43:49.031493 USB0 port 0 read_resources bus 0 link: 0 done
1485 20:43:49.034897 PCI: 00:14.0 read_resources bus 0 link: 0 done
1486 20:43:49.038813 PCI: 00:14.3 read_resources bus 0 link: 0
1487 20:43:49.044737 PCI: 00:14.3 read_resources bus 0 link: 0 done
1488 20:43:49.048192 PCI: 00:15.0 read_resources bus 0 link: 0
1489 20:43:49.051419 PCI: 00:15.0 read_resources bus 0 link: 0 done
1490 20:43:49.058323 PCI: 00:15.1 read_resources bus 0 link: 0
1491 20:43:49.061618 PCI: 00:15.1 read_resources bus 0 link: 0 done
1492 20:43:49.064993 PCI: 00:15.3 read_resources bus 0 link: 0
1493 20:43:49.072000 PCI: 00:15.3 read_resources bus 0 link: 0 done
1494 20:43:49.074715 PCI: 00:19.1 read_resources bus 0 link: 0
1495 20:43:49.078467 PCI: 00:19.1 read_resources bus 0 link: 0 done
1496 20:43:49.085169 PCI: 00:1e.3 read_resources bus 2 link: 0
1497 20:43:49.088576 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1498 20:43:49.091747 PCI: 00:1f.0 read_resources bus 0 link: 0
1499 20:43:49.098648 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1500 20:43:49.101962 PCI: 00:1f.2 read_resources bus 0 link: 0
1501 20:43:49.105345 GENERIC: 0.0 read_resources bus 0 link: 0
1502 20:43:49.112176 GENERIC: 0.0 read_resources bus 0 link: 0 done
1503 20:43:49.115339 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1504 20:43:49.122296 DOMAIN: 0000 read_resources bus 0 link: 0 done
1505 20:43:49.125574 Root Device read_resources bus 0 link: 0 done
1506 20:43:49.129062 Done reading resources.
1507 20:43:49.132425 Show resources in subtree (Root Device)...After reading.
1508 20:43:49.138891 Root Device child on link 0 CPU_CLUSTER: 0
1509 20:43:49.142589 CPU_CLUSTER: 0 child on link 0 APIC: 00
1510 20:43:49.143195 APIC: 00
1511 20:43:49.145701 APIC: 12
1512 20:43:49.146305 APIC: 14
1513 20:43:49.146677 APIC: 16
1514 20:43:49.148822 APIC: 10
1515 20:43:49.149279 APIC: 01
1516 20:43:49.152118 APIC: 09
1517 20:43:49.152679 APIC: 08
1518 20:43:49.155509 DOMAIN: 0000 child on link 0 GPIO: 0
1519 20:43:49.166085 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1520 20:43:49.175638 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1521 20:43:49.176225 GPIO: 0
1522 20:43:49.178861 PCI: 00:00.0
1523 20:43:49.189414 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1524 20:43:49.195542 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1525 20:43:49.205728 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1526 20:43:49.215213 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1527 20:43:49.225609 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1528 20:43:49.235553 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1529 20:43:49.245781 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1530 20:43:49.251827 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1531 20:43:49.261945 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1532 20:43:49.272375 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1533 20:43:49.281974 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1534 20:43:49.291883 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1535 20:43:49.302084 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1536 20:43:49.308580 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1537 20:43:49.318985 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1538 20:43:49.328706 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1539 20:43:49.338370 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1540 20:43:49.348780 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1541 20:43:49.358592 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1542 20:43:49.368404 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1543 20:43:49.378943 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1544 20:43:49.385639 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1545 20:43:49.395156 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1546 20:43:49.405101 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1547 20:43:49.415283 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1548 20:43:49.425339 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1549 20:43:49.435378 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1550 20:43:49.442410 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1551 20:43:49.445905 PCI: 00:02.0
1552 20:43:49.455780 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1553 20:43:49.465592 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1554 20:43:49.475426 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1555 20:43:49.478783 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1556 20:43:49.489055 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1557 20:43:49.492475 GENERIC: 0.0
1558 20:43:49.495776 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1559 20:43:49.502391 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1560 20:43:49.512105 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1561 20:43:49.522161 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1562 20:43:49.525612 PCI: 01:00.0
1563 20:43:49.535602 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1564 20:43:49.546307 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1565 20:43:49.546762 PCI: 00:08.0
1566 20:43:49.549308 PCI: 00:0a.0
1567 20:43:49.559298 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1568 20:43:49.562668 PCI: 00:0d.0 child on link 0 USB0 port 0
1569 20:43:49.572704 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1570 20:43:49.575935 USB0 port 0 child on link 0 USB3 port 0
1571 20:43:49.579240 USB3 port 0
1572 20:43:49.579676 USB3 port 1
1573 20:43:49.582674 USB3 port 2
1574 20:43:49.583114 USB3 port 3
1575 20:43:49.588970 PCI: 00:14.0 child on link 0 USB0 port 0
1576 20:43:49.599352 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1577 20:43:49.602492 USB0 port 0 child on link 0 USB2 port 0
1578 20:43:49.602945 USB2 port 0
1579 20:43:49.605950 USB2 port 1
1580 20:43:49.609269 USB2 port 2
1581 20:43:49.609932 USB2 port 3
1582 20:43:49.612755 USB2 port 4
1583 20:43:49.613283 USB2 port 5
1584 20:43:49.616028 USB2 port 6
1585 20:43:49.616560 USB2 port 7
1586 20:43:49.619395 USB2 port 8
1587 20:43:49.620013 USB2 port 9
1588 20:43:49.623005 USB3 port 0
1589 20:43:49.623529 USB3 port 1
1590 20:43:49.626075 USB3 port 2
1591 20:43:49.626583 USB3 port 3
1592 20:43:49.629186 PCI: 00:14.2
1593 20:43:49.639228 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1594 20:43:49.649352 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1595 20:43:49.652707 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1596 20:43:49.662542 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1597 20:43:49.665954 GENERIC: 0.0
1598 20:43:49.669193 PCI: 00:15.0 child on link 0 I2C: 00:1a
1599 20:43:49.679409 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1600 20:43:49.679972 I2C: 00:1a
1601 20:43:49.682765 I2C: 00:31
1602 20:43:49.683187 I2C: 00:32
1603 20:43:49.689259 PCI: 00:15.1 child on link 0 I2C: 00:50
1604 20:43:49.699533 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1605 20:43:49.699977 I2C: 00:50
1606 20:43:49.702793 PCI: 00:15.2
1607 20:43:49.706317 PCI: 00:15.3 child on link 0 I2C: 00:10
1608 20:43:49.716165 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1609 20:43:49.716661 I2C: 00:10
1610 20:43:49.720051 PCI: 00:16.0
1611 20:43:49.729691 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1612 20:43:49.730152 PCI: 00:19.0
1613 20:43:49.736839 PCI: 00:19.1 child on link 0 I2C: 00:15
1614 20:43:49.746458 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1615 20:43:49.746934 I2C: 00:15
1616 20:43:49.749344 I2C: 00:2c
1617 20:43:49.749770 PCI: 00:1e.0
1618 20:43:49.759630 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1619 20:43:49.766289 PCI: 00:1e.3 child on link 0 SPI: 00
1620 20:43:49.776014 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1621 20:43:49.776446 SPI: 00
1622 20:43:49.779433 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1623 20:43:49.789571 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1624 20:43:49.790131 PNP: 0c09.0
1625 20:43:49.799432 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1626 20:43:49.803047 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1627 20:43:49.812668 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1628 20:43:49.822675 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1629 20:43:49.826434 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1630 20:43:49.830080 GENERIC: 0.0
1631 20:43:49.830502 GENERIC: 1.0
1632 20:43:49.833105 PCI: 00:1f.3
1633 20:43:49.843073 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1634 20:43:49.853256 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1635 20:43:49.853983 PCI: 00:1f.5
1636 20:43:49.863316 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1637 20:43:49.869870 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1638 20:43:49.876467 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1639 20:43:49.883230 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1640 20:43:49.890174 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1641 20:43:49.893186 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1642 20:43:49.896443 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1643 20:43:49.902975 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1644 20:43:49.913237 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1645 20:43:49.919622 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1646 20:43:49.926632 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1647 20:43:49.933287 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1648 20:43:49.939802 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1649 20:43:49.946597 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1650 20:43:49.956678 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1651 20:43:49.960012 DOMAIN: 0000: Resource ranges:
1652 20:43:49.963485 * Base: 1000, Size: 800, Tag: 100
1653 20:43:49.966854 * Base: 1900, Size: e700, Tag: 100
1654 20:43:49.970142 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1655 20:43:49.976468 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1656 20:43:49.983155 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1657 20:43:49.993526 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1658 20:43:50.000141 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1659 20:43:50.006501 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1660 20:43:50.016888 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1661 20:43:50.023282 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1662 20:43:50.030273 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1663 20:43:50.040085 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1664 20:43:50.046700 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1665 20:43:50.053357 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1666 20:43:50.063305 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1667 20:43:50.069952 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1668 20:43:50.077057 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1669 20:43:50.083619 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1670 20:43:50.093388 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1671 20:43:50.099989 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1672 20:43:50.106561 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1673 20:43:50.116608 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1674 20:43:50.123347 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1675 20:43:50.129900 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1676 20:43:50.139859 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1677 20:43:50.146726 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1678 20:43:50.153269 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1679 20:43:50.163632 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1680 20:43:50.170042 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1681 20:43:50.176681 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1682 20:43:50.183867 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1683 20:43:50.193398 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1684 20:43:50.199905 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1685 20:43:50.206653 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1686 20:43:50.216999 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1687 20:43:50.220125 DOMAIN: 0000: Resource ranges:
1688 20:43:50.223610 * Base: 80400000, Size: 3fc00000, Tag: 200
1689 20:43:50.227027 * Base: d0000000, Size: 28000000, Tag: 200
1690 20:43:50.233285 * Base: fa000000, Size: 1000000, Tag: 200
1691 20:43:50.236711 * Base: fb001000, Size: 17ff000, Tag: 200
1692 20:43:50.240501 * Base: fe800000, Size: 300000, Tag: 200
1693 20:43:50.243580 * Base: feb80000, Size: 80000, Tag: 200
1694 20:43:50.250480 * Base: fed00000, Size: 40000, Tag: 200
1695 20:43:50.253757 * Base: fed70000, Size: 10000, Tag: 200
1696 20:43:50.256627 * Base: fed88000, Size: 8000, Tag: 200
1697 20:43:50.260086 * Base: fed93000, Size: d000, Tag: 200
1698 20:43:50.266853 * Base: feda2000, Size: 1e000, Tag: 200
1699 20:43:50.270430 * Base: fede0000, Size: 1220000, Tag: 200
1700 20:43:50.273678 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1701 20:43:50.280399 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1702 20:43:50.286879 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1703 20:43:50.293660 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1704 20:43:50.300395 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1705 20:43:50.307029 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1706 20:43:50.313613 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1707 20:43:50.320564 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1708 20:43:50.327360 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1709 20:43:50.333820 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1710 20:43:50.340356 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1711 20:43:50.347195 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1712 20:43:50.353699 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1713 20:43:50.360200 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1714 20:43:50.366875 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1715 20:43:50.373587 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1716 20:43:50.380341 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1717 20:43:50.386677 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1718 20:43:50.393403 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1719 20:43:50.400129 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1720 20:43:50.406934 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1721 20:43:50.417231 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1722 20:43:50.420031 PCI: 00:06.0: Resource ranges:
1723 20:43:50.423485 * Base: 80400000, Size: 100000, Tag: 200
1724 20:43:50.430239 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1725 20:43:50.437027 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1726 20:43:50.446697 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1727 20:43:50.453224 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1728 20:43:50.456737 Root Device assign_resources, bus 0 link: 0
1729 20:43:50.460459 DOMAIN: 0000 assign_resources, bus 0 link: 0
1730 20:43:50.470333 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1731 20:43:50.476557 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1732 20:43:50.486719 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1733 20:43:50.493162 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1734 20:43:50.496527 PCI: 00:04.0 assign_resources, bus 1 link: 0
1735 20:43:50.503412 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1736 20:43:50.509819 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1737 20:43:50.519764 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1738 20:43:50.529644 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1739 20:43:50.533453 PCI: 00:06.0 assign_resources, bus 1 link: 0
1740 20:43:50.543542 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1741 20:43:50.549631 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1742 20:43:50.556240 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1743 20:43:50.563157 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1744 20:43:50.569802 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1745 20:43:50.576214 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1746 20:43:50.579652 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1747 20:43:50.589484 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1748 20:43:50.592812 PCI: 00:14.0 assign_resources, bus 0 link: 0
1749 20:43:50.599742 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1750 20:43:50.606185 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1751 20:43:50.613005 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1752 20:43:50.622807 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1753 20:43:50.626352 PCI: 00:14.3 assign_resources, bus 0 link: 0
1754 20:43:50.632899 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1755 20:43:50.639496 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1756 20:43:50.642867 PCI: 00:15.0 assign_resources, bus 0 link: 0
1757 20:43:50.649527 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1758 20:43:50.655956 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1759 20:43:50.662545 PCI: 00:15.1 assign_resources, bus 0 link: 0
1760 20:43:50.665909 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1761 20:43:50.675909 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1762 20:43:50.679416 PCI: 00:15.3 assign_resources, bus 0 link: 0
1763 20:43:50.685874 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1764 20:43:50.692655 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1765 20:43:50.698999 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1766 20:43:50.705900 PCI: 00:19.1 assign_resources, bus 0 link: 0
1767 20:43:50.709054 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1768 20:43:50.719167 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1769 20:43:50.722375 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1770 20:43:50.725666 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1771 20:43:50.732459 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1772 20:43:50.735785 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1773 20:43:50.742047 LPC: Trying to open IO window from 800 size 1ff
1774 20:43:50.748826 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1775 20:43:50.759016 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1776 20:43:50.765783 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1777 20:43:50.769133 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1778 20:43:50.775786 Root Device assign_resources, bus 0 link: 0 done
1779 20:43:50.778945 Done setting resources.
1780 20:43:50.785654 Show resources in subtree (Root Device)...After assigning values.
1781 20:43:50.788717 Root Device child on link 0 CPU_CLUSTER: 0
1782 20:43:50.792192 CPU_CLUSTER: 0 child on link 0 APIC: 00
1783 20:43:50.795710 APIC: 00
1784 20:43:50.796217 APIC: 12
1785 20:43:50.796719 APIC: 14
1786 20:43:50.798914 APIC: 16
1787 20:43:50.799358 APIC: 10
1788 20:43:50.799717 APIC: 01
1789 20:43:50.802174 APIC: 09
1790 20:43:50.802634 APIC: 08
1791 20:43:50.805383 DOMAIN: 0000 child on link 0 GPIO: 0
1792 20:43:50.815257 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1793 20:43:50.825182 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1794 20:43:50.828715 GPIO: 0
1795 20:43:50.829158 PCI: 00:00.0
1796 20:43:50.838697 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1797 20:43:50.848839 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1798 20:43:50.858543 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1799 20:43:50.865150 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1800 20:43:50.875260 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1801 20:43:50.884928 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1802 20:43:50.895145 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1803 20:43:50.905216 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1804 20:43:50.915237 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1805 20:43:50.921695 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1806 20:43:50.931723 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1807 20:43:50.941546 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1808 20:43:50.951346 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1809 20:43:50.961383 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1810 20:43:50.971334 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1811 20:43:50.978213 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1812 20:43:50.987928 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1813 20:43:50.998085 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1814 20:43:51.008159 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1815 20:43:51.017905 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1816 20:43:51.027943 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1817 20:43:51.037642 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1818 20:43:51.047599 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1819 20:43:51.054365 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1820 20:43:51.067421 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1821 20:43:51.074088 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1822 20:43:51.084219 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1823 20:43:51.094049 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1824 20:43:51.094455 PCI: 00:02.0
1825 20:43:51.107324 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1826 20:43:51.117564 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1827 20:43:51.127633 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1828 20:43:51.130996 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1829 20:43:51.140832 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1830 20:43:51.144147 GENERIC: 0.0
1831 20:43:51.147533 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1832 20:43:51.157183 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1833 20:43:51.167464 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1834 20:43:51.180437 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1835 20:43:51.180913 PCI: 01:00.0
1836 20:43:51.190448 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1837 20:43:51.200496 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1838 20:43:51.203681 PCI: 00:08.0
1839 20:43:51.204161 PCI: 00:0a.0
1840 20:43:51.213677 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1841 20:43:51.220408 PCI: 00:0d.0 child on link 0 USB0 port 0
1842 20:43:51.230164 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1843 20:43:51.233605 USB0 port 0 child on link 0 USB3 port 0
1844 20:43:51.236956 USB3 port 0
1845 20:43:51.237385 USB3 port 1
1846 20:43:51.240436 USB3 port 2
1847 20:43:51.240861 USB3 port 3
1848 20:43:51.247005 PCI: 00:14.0 child on link 0 USB0 port 0
1849 20:43:51.256962 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1850 20:43:51.260346 USB0 port 0 child on link 0 USB2 port 0
1851 20:43:51.263701 USB2 port 0
1852 20:43:51.264128 USB2 port 1
1853 20:43:51.267296 USB2 port 2
1854 20:43:51.267719 USB2 port 3
1855 20:43:51.270624 USB2 port 4
1856 20:43:51.271048 USB2 port 5
1857 20:43:51.273567 USB2 port 6
1858 20:43:51.274030 USB2 port 7
1859 20:43:51.276772 USB2 port 8
1860 20:43:51.277235 USB2 port 9
1861 20:43:51.280040 USB3 port 0
1862 20:43:51.280414 USB3 port 1
1863 20:43:51.283391 USB3 port 2
1864 20:43:51.286896 USB3 port 3
1865 20:43:51.287313 PCI: 00:14.2
1866 20:43:51.297086 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1867 20:43:51.307040 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1868 20:43:51.313797 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1869 20:43:51.323900 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1870 20:43:51.324322 GENERIC: 0.0
1871 20:43:51.330135 PCI: 00:15.0 child on link 0 I2C: 00:1a
1872 20:43:51.340274 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1873 20:43:51.340701 I2C: 00:1a
1874 20:43:51.343514 I2C: 00:31
1875 20:43:51.344066 I2C: 00:32
1876 20:43:51.346598 PCI: 00:15.1 child on link 0 I2C: 00:50
1877 20:43:51.356530 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1878 20:43:51.359741 I2C: 00:50
1879 20:43:51.359822 PCI: 00:15.2
1880 20:43:51.366242 PCI: 00:15.3 child on link 0 I2C: 00:10
1881 20:43:51.376358 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1882 20:43:51.376442 I2C: 00:10
1883 20:43:51.379912 PCI: 00:16.0
1884 20:43:51.390016 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1885 20:43:51.390099 PCI: 00:19.0
1886 20:43:51.396309 PCI: 00:19.1 child on link 0 I2C: 00:15
1887 20:43:51.406403 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1888 20:43:51.406486 I2C: 00:15
1889 20:43:51.409719 I2C: 00:2c
1890 20:43:51.409800 PCI: 00:1e.0
1891 20:43:51.422922 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1892 20:43:51.426313 PCI: 00:1e.3 child on link 0 SPI: 00
1893 20:43:51.436515 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1894 20:43:51.436597 SPI: 00
1895 20:43:51.443195 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1896 20:43:51.449497 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1897 20:43:51.453154 PNP: 0c09.0
1898 20:43:51.459513 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1899 20:43:51.466622 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1900 20:43:51.476492 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1901 20:43:51.482817 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1902 20:43:51.489758 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1903 20:43:51.489905 GENERIC: 0.0
1904 20:43:51.493201 GENERIC: 1.0
1905 20:43:51.493282 PCI: 00:1f.3
1906 20:43:51.502878 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1907 20:43:51.516235 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1908 20:43:51.516318 PCI: 00:1f.5
1909 20:43:51.526191 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1910 20:43:51.529167 Done allocating resources.
1911 20:43:51.536182 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1912 20:43:51.542671 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1913 20:43:51.546141 Configure audio over I2S with MAX98373 NAU88L25B.
1914 20:43:51.550180 Enabling BT offload
1915 20:43:51.557624 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1916 20:43:51.560854 Enabling resources...
1917 20:43:51.564996 PCI: 00:00.0 subsystem <- 8086/4609
1918 20:43:51.568106 PCI: 00:00.0 cmd <- 06
1919 20:43:51.571013 PCI: 00:02.0 subsystem <- 8086/46b3
1920 20:43:51.574184 PCI: 00:02.0 cmd <- 03
1921 20:43:51.577782 PCI: 00:04.0 subsystem <- 8086/461d
1922 20:43:51.577927 PCI: 00:04.0 cmd <- 02
1923 20:43:51.581042 PCI: 00:06.0 bridge ctrl <- 0013
1924 20:43:51.584469 PCI: 00:06.0 subsystem <- 8086/464d
1925 20:43:51.587829 PCI: 00:06.0 cmd <- 106
1926 20:43:51.590826 PCI: 00:0a.0 subsystem <- 8086/467d
1927 20:43:51.594430 PCI: 00:0a.0 cmd <- 02
1928 20:43:51.597792 PCI: 00:0d.0 subsystem <- 8086/461e
1929 20:43:51.601062 PCI: 00:0d.0 cmd <- 02
1930 20:43:51.604136 PCI: 00:14.0 subsystem <- 8086/51ed
1931 20:43:51.607500 PCI: 00:14.0 cmd <- 02
1932 20:43:51.610911 PCI: 00:14.2 subsystem <- 8086/51ef
1933 20:43:51.610993 PCI: 00:14.2 cmd <- 02
1934 20:43:51.614610 PCI: 00:14.3 subsystem <- 8086/51f0
1935 20:43:51.617694 PCI: 00:14.3 cmd <- 02
1936 20:43:51.620948 PCI: 00:15.0 subsystem <- 8086/51e8
1937 20:43:51.624206 PCI: 00:15.0 cmd <- 02
1938 20:43:51.627293 PCI: 00:15.1 subsystem <- 8086/51e9
1939 20:43:51.631062 PCI: 00:15.1 cmd <- 06
1940 20:43:51.634107 PCI: 00:15.3 subsystem <- 8086/51eb
1941 20:43:51.637339 PCI: 00:15.3 cmd <- 02
1942 20:43:51.641008 PCI: 00:16.0 subsystem <- 8086/51e0
1943 20:43:51.641089 PCI: 00:16.0 cmd <- 02
1944 20:43:51.644211 PCI: 00:19.1 subsystem <- 8086/51c6
1945 20:43:51.647489 PCI: 00:19.1 cmd <- 02
1946 20:43:51.650700 PCI: 00:1e.0 subsystem <- 8086/51a8
1947 20:43:51.654137 PCI: 00:1e.0 cmd <- 06
1948 20:43:51.657486 PCI: 00:1e.3 subsystem <- 8086/51ab
1949 20:43:51.660727 PCI: 00:1e.3 cmd <- 02
1950 20:43:51.664220 PCI: 00:1f.0 subsystem <- 8086/5182
1951 20:43:51.667511 PCI: 00:1f.0 cmd <- 407
1952 20:43:51.670877 PCI: 00:1f.3 subsystem <- 8086/51c8
1953 20:43:51.670959 PCI: 00:1f.3 cmd <- 02
1954 20:43:51.673792 PCI: 00:1f.5 subsystem <- 8086/51a4
1955 20:43:51.677545 PCI: 00:1f.5 cmd <- 406
1956 20:43:51.681104 PCI: 01:00.0 cmd <- 02
1957 20:43:51.681185 done.
1958 20:43:51.687480 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1959 20:43:51.690659 ME: Version: Unavailable
1960 20:43:51.693852 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1961 20:43:51.697367 Initializing devices...
1962 20:43:51.700829 Root Device init
1963 20:43:51.700910 mainboard: EC init
1964 20:43:51.707240 Chrome EC: Set SMI mask to 0x0000000000000000
1965 20:43:51.710537 Chrome EC: UHEPI supported
1966 20:43:51.713847 Chrome EC: clear events_b mask to 0x0000000000000000
1967 20:43:51.720778 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1968 20:43:51.727103 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1969 20:43:51.733852 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1970 20:43:51.737152 Chrome EC: Set WAKE mask to 0x0000000000000000
1971 20:43:51.740837 Root Device init finished in 39 msecs
1972 20:43:51.744209 PCI: 00:00.0 init
1973 20:43:51.747532 CPU TDP = 15 Watts
1974 20:43:51.747614 CPU PL1 = 15 Watts
1975 20:43:51.750903 CPU PL2 = 55 Watts
1976 20:43:51.754220 CPU PL4 = 123 Watts
1977 20:43:51.757415 PCI: 00:00.0 init finished in 8 msecs
1978 20:43:51.757526 PCI: 00:02.0 init
1979 20:43:51.760668 GMA: Found VBT in CBFS
1980 20:43:51.764069 GMA: Found valid VBT in CBFS
1981 20:43:51.770566 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1982 20:43:51.777391 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1983 20:43:51.781028 PCI: 00:02.0 init finished in 18 msecs
1984 20:43:51.784120 PCI: 00:06.0 init
1985 20:43:51.787608 Initializing PCH PCIe bridge.
1986 20:43:51.790881 PCI: 00:06.0 init finished in 3 msecs
1987 20:43:51.790989 PCI: 00:0a.0 init
1988 20:43:51.794358 PCI: 00:0a.0 init finished in 0 msecs
1989 20:43:51.797294 PCI: 00:14.0 init
1990 20:43:51.800989 PCI: 00:14.0 init finished in 0 msecs
1991 20:43:51.803738 PCI: 00:14.2 init
1992 20:43:51.807465 PCI: 00:14.2 init finished in 0 msecs
1993 20:43:51.807547 PCI: 00:15.0 init
1994 20:43:51.810586 I2C bus 0 version 0x3230302a
1995 20:43:51.813807 DW I2C bus 0 at 0x80655000 (400 KHz)
1996 20:43:51.820385 PCI: 00:15.0 init finished in 6 msecs
1997 20:43:51.820466 PCI: 00:15.1 init
1998 20:43:51.823911 I2C bus 1 version 0x3230302a
1999 20:43:51.827577 DW I2C bus 1 at 0x80656000 (400 KHz)
2000 20:43:51.830691 PCI: 00:15.1 init finished in 6 msecs
2001 20:43:51.833975 PCI: 00:15.3 init
2002 20:43:51.837463 I2C bus 3 version 0x3230302a
2003 20:43:51.840414 DW I2C bus 3 at 0x80657000 (400 KHz)
2004 20:43:51.843730 PCI: 00:15.3 init finished in 6 msecs
2005 20:43:51.846997 PCI: 00:16.0 init
2006 20:43:51.850457 PCI: 00:16.0 init finished in 0 msecs
2007 20:43:51.850539 PCI: 00:19.1 init
2008 20:43:51.853783 I2C bus 5 version 0x3230302a
2009 20:43:51.857214 DW I2C bus 5 at 0x80659000 (400 KHz)
2010 20:43:51.860743 PCI: 00:19.1 init finished in 6 msecs
2011 20:43:51.863647 PCI: 00:1f.0 init
2012 20:43:51.867006 IOAPIC: Initializing IOAPIC at 0xfec00000
2013 20:43:51.870331 IOAPIC: ID = 0x02
2014 20:43:51.873531 IOAPIC: Dumping registers
2015 20:43:51.873650 reg 0x0000: 0x02000000
2016 20:43:51.876807 reg 0x0001: 0x00770020
2017 20:43:51.880566 reg 0x0002: 0x00000000
2018 20:43:51.883825 IOAPIC: 120 interrupts
2019 20:43:51.886777 IOAPIC: Clearing IOAPIC at 0xfec00000
2020 20:43:51.890419 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2021 20:43:51.896997 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2022 20:43:51.900383 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2023 20:43:51.906869 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2024 20:43:51.910199 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2025 20:43:51.916942 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2026 20:43:51.920072 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2027 20:43:51.923748 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2028 20:43:51.930084 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2029 20:43:51.933397 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2030 20:43:51.940093 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2031 20:43:51.943338 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2032 20:43:51.950011 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2033 20:43:51.953393 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2034 20:43:51.959895 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2035 20:43:51.963190 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2036 20:43:51.966765 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2037 20:43:51.972967 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2038 20:43:51.976525 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2039 20:43:51.982941 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2040 20:43:51.986316 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2041 20:43:51.993168 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2042 20:43:51.996646 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2043 20:43:52.002808 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2044 20:43:52.006475 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2045 20:43:52.009695 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2046 20:43:52.016485 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2047 20:43:52.019458 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2048 20:43:52.026223 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2049 20:43:52.029527 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2050 20:43:52.036173 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2051 20:43:52.039441 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2052 20:43:52.042826 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2053 20:43:52.049507 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2054 20:43:52.052858 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2055 20:43:52.059583 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2056 20:43:52.062877 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2057 20:43:52.069484 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2058 20:43:52.072873 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2059 20:43:52.079421 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2060 20:43:52.082731 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2061 20:43:52.086054 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2062 20:43:52.092909 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2063 20:43:52.096071 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2064 20:43:52.102771 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2065 20:43:52.105723 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2066 20:43:52.112474 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2067 20:43:52.115875 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2068 20:43:52.122645 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2069 20:43:52.125709 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2070 20:43:52.129149 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2071 20:43:52.135771 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2072 20:43:52.139143 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2073 20:43:52.145932 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2074 20:43:52.149123 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2075 20:43:52.155833 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2076 20:43:52.158900 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2077 20:43:52.165608 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2078 20:43:52.168878 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2079 20:43:52.172369 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2080 20:43:52.178950 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2081 20:43:52.182403 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2082 20:43:52.188780 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2083 20:43:52.192557 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2084 20:43:52.198691 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2085 20:43:52.202295 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2086 20:43:52.208616 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2087 20:43:52.212318 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2088 20:43:52.215611 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2089 20:43:52.222150 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2090 20:43:52.225355 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2091 20:43:52.231889 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2092 20:43:52.235496 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2093 20:43:52.242092 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2094 20:43:52.245216 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2095 20:43:52.251925 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2096 20:43:52.255371 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2097 20:43:52.258546 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2098 20:43:52.265285 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2099 20:43:52.268552 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2100 20:43:52.275180 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2101 20:43:52.278369 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2102 20:43:52.285108 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2103 20:43:52.288362 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2104 20:43:52.295504 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2105 20:43:52.298395 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2106 20:43:52.302047 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2107 20:43:52.308300 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2108 20:43:52.311741 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2109 20:43:52.318672 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2110 20:43:52.321799 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2111 20:43:52.328618 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2112 20:43:52.332024 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2113 20:43:52.338147 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2114 20:43:52.341616 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2115 20:43:52.344961 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2116 20:43:52.351589 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2117 20:43:52.355042 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2118 20:43:52.361802 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2119 20:43:52.364743 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2120 20:43:52.371512 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2121 20:43:52.374862 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2122 20:43:52.378275 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2123 20:43:52.384978 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2124 20:43:52.388300 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2125 20:43:52.395116 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2126 20:43:52.398151 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2127 20:43:52.404876 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2128 20:43:52.408685 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2129 20:43:52.414917 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2130 20:43:52.418224 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2131 20:43:52.421465 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2132 20:43:52.428391 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2133 20:43:52.431598 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2134 20:43:52.437956 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2135 20:43:52.441572 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2136 20:43:52.448020 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2137 20:43:52.451328 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2138 20:43:52.458470 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2139 20:43:52.461154 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2140 20:43:52.464493 IOAPIC: Bootstrap Processor Local APIC = 0x00
2141 20:43:52.471288 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2142 20:43:52.474436 PCI: 00:1f.0 init finished in 607 msecs
2143 20:43:52.477685 PCI: 00:1f.2 init
2144 20:43:52.481776 apm_control: Disabling ACPI.
2145 20:43:52.484871 APMC done.
2146 20:43:52.488620 PCI: 00:1f.2 init finished in 6 msecs
2147 20:43:52.488703 PCI: 00:1f.3 init
2148 20:43:52.491679 PCI: 00:1f.3 init finished in 0 msecs
2149 20:43:52.495080 PCI: 01:00.0 init
2150 20:43:52.498322 PCI: 01:00.0 init finished in 0 msecs
2151 20:43:52.501954 PNP: 0c09.0 init
2152 20:43:52.504890 Google Chrome EC uptime: 12.124 seconds
2153 20:43:52.508042 Google Chrome AP resets since EC boot: 1
2154 20:43:52.514979 Google Chrome most recent AP reset causes:
2155 20:43:52.518123 0.341: 32775 shutdown: entering G3
2156 20:43:52.524884 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2157 20:43:52.528225 PNP: 0c09.0 init finished in 23 msecs
2158 20:43:52.528324 GENERIC: 0.0 init
2159 20:43:52.531713 GENERIC: 0.0 init finished in 0 msecs
2160 20:43:52.535054 GENERIC: 1.0 init
2161 20:43:52.538392 GENERIC: 1.0 init finished in 0 msecs
2162 20:43:52.541835 Devices initialized
2163 20:43:52.544685 Show all devs... After init.
2164 20:43:52.544768 Root Device: enabled 1
2165 20:43:52.548210 CPU_CLUSTER: 0: enabled 1
2166 20:43:52.551666 DOMAIN: 0000: enabled 1
2167 20:43:52.554757 GPIO: 0: enabled 1
2168 20:43:52.554839 PCI: 00:00.0: enabled 1
2169 20:43:52.558055 PCI: 00:01.0: enabled 0
2170 20:43:52.561419 PCI: 00:01.1: enabled 0
2171 20:43:52.561502 PCI: 00:02.0: enabled 1
2172 20:43:52.564917 PCI: 00:04.0: enabled 1
2173 20:43:52.568267 PCI: 00:05.0: enabled 0
2174 20:43:52.571523 PCI: 00:06.0: enabled 1
2175 20:43:52.571606 PCI: 00:06.2: enabled 0
2176 20:43:52.574935 PCI: 00:07.0: enabled 0
2177 20:43:52.578138 PCI: 00:07.1: enabled 0
2178 20:43:52.581404 PCI: 00:07.2: enabled 0
2179 20:43:52.581486 PCI: 00:07.3: enabled 0
2180 20:43:52.584844 PCI: 00:08.0: enabled 0
2181 20:43:52.587929 PCI: 00:09.0: enabled 0
2182 20:43:52.591534 PCI: 00:0a.0: enabled 1
2183 20:43:52.591616 PCI: 00:0d.0: enabled 1
2184 20:43:52.594731 PCI: 00:0d.1: enabled 0
2185 20:43:52.598046 PCI: 00:0d.2: enabled 0
2186 20:43:52.598128 PCI: 00:0d.3: enabled 0
2187 20:43:52.601355 PCI: 00:0e.0: enabled 0
2188 20:43:52.604534 PCI: 00:10.0: enabled 0
2189 20:43:52.608144 PCI: 00:10.1: enabled 0
2190 20:43:52.608226 PCI: 00:10.6: enabled 0
2191 20:43:52.611424 PCI: 00:10.7: enabled 0
2192 20:43:52.614733 PCI: 00:12.0: enabled 0
2193 20:43:52.618069 PCI: 00:12.6: enabled 0
2194 20:43:52.618151 PCI: 00:12.7: enabled 0
2195 20:43:52.621288 PCI: 00:13.0: enabled 0
2196 20:43:52.624659 PCI: 00:14.0: enabled 1
2197 20:43:52.628010 PCI: 00:14.1: enabled 0
2198 20:43:52.628092 PCI: 00:14.2: enabled 1
2199 20:43:52.631048 PCI: 00:14.3: enabled 1
2200 20:43:52.634386 PCI: 00:15.0: enabled 1
2201 20:43:52.637738 PCI: 00:15.1: enabled 1
2202 20:43:52.637822 PCI: 00:15.2: enabled 0
2203 20:43:52.641555 PCI: 00:15.3: enabled 1
2204 20:43:52.644649 PCI: 00:16.0: enabled 1
2205 20:43:52.644731 PCI: 00:16.1: enabled 0
2206 20:43:52.648279 PCI: 00:16.2: enabled 0
2207 20:43:52.651075 PCI: 00:16.3: enabled 0
2208 20:43:52.654701 PCI: 00:16.4: enabled 0
2209 20:43:52.654784 PCI: 00:16.5: enabled 0
2210 20:43:52.657780 PCI: 00:17.0: enabled 0
2211 20:43:52.661359 PCI: 00:19.0: enabled 0
2212 20:43:52.664811 PCI: 00:19.1: enabled 1
2213 20:43:52.664892 PCI: 00:19.2: enabled 0
2214 20:43:52.667641 PCI: 00:1a.0: enabled 0
2215 20:43:52.670981 PCI: 00:1c.0: enabled 0
2216 20:43:52.674314 PCI: 00:1c.1: enabled 0
2217 20:43:52.674396 PCI: 00:1c.2: enabled 0
2218 20:43:52.677739 PCI: 00:1c.3: enabled 0
2219 20:43:52.680939 PCI: 00:1c.4: enabled 0
2220 20:43:52.681020 PCI: 00:1c.5: enabled 0
2221 20:43:52.684248 PCI: 00:1c.6: enabled 0
2222 20:43:52.687650 PCI: 00:1c.7: enabled 0
2223 20:43:52.691259 PCI: 00:1d.0: enabled 0
2224 20:43:52.691340 PCI: 00:1d.1: enabled 0
2225 20:43:52.694502 PCI: 00:1d.2: enabled 0
2226 20:43:52.697600 PCI: 00:1d.3: enabled 0
2227 20:43:52.701014 PCI: 00:1e.0: enabled 1
2228 20:43:52.701099 PCI: 00:1e.1: enabled 0
2229 20:43:52.704257 PCI: 00:1e.2: enabled 0
2230 20:43:52.707586 PCI: 00:1e.3: enabled 1
2231 20:43:52.710998 PCI: 00:1f.0: enabled 1
2232 20:43:52.711079 PCI: 00:1f.1: enabled 0
2233 20:43:52.714559 PCI: 00:1f.2: enabled 1
2234 20:43:52.717747 PCI: 00:1f.3: enabled 1
2235 20:43:52.720895 PCI: 00:1f.4: enabled 0
2236 20:43:52.720976 PCI: 00:1f.5: enabled 1
2237 20:43:52.724591 PCI: 00:1f.6: enabled 0
2238 20:43:52.727889 PCI: 00:1f.7: enabled 0
2239 20:43:52.727971 GENERIC: 0.0: enabled 1
2240 20:43:52.731189 GENERIC: 0.0: enabled 1
2241 20:43:52.734551 GENERIC: 1.0: enabled 1
2242 20:43:52.738092 GENERIC: 0.0: enabled 1
2243 20:43:52.738173 GENERIC: 1.0: enabled 1
2244 20:43:52.741422 USB0 port 0: enabled 1
2245 20:43:52.744137 USB0 port 0: enabled 1
2246 20:43:52.747681 GENERIC: 0.0: enabled 1
2247 20:43:52.747770 I2C: 00:1a: enabled 1
2248 20:43:52.750897 I2C: 00:31: enabled 1
2249 20:43:52.754323 I2C: 00:32: enabled 1
2250 20:43:52.754405 I2C: 00:50: enabled 1
2251 20:43:52.757755 I2C: 00:10: enabled 1
2252 20:43:52.760892 I2C: 00:15: enabled 1
2253 20:43:52.760975 I2C: 00:2c: enabled 1
2254 20:43:52.764746 GENERIC: 0.0: enabled 1
2255 20:43:52.767777 SPI: 00: enabled 1
2256 20:43:52.767859 PNP: 0c09.0: enabled 1
2257 20:43:52.771146 GENERIC: 0.0: enabled 1
2258 20:43:52.774493 USB3 port 0: enabled 1
2259 20:43:52.774575 USB3 port 1: enabled 0
2260 20:43:52.777436 USB3 port 2: enabled 1
2261 20:43:52.780703 USB3 port 3: enabled 0
2262 20:43:52.784027 USB2 port 0: enabled 1
2263 20:43:52.784110 USB2 port 1: enabled 0
2264 20:43:52.787611 USB2 port 2: enabled 1
2265 20:43:52.791070 USB2 port 3: enabled 0
2266 20:43:52.791152 USB2 port 4: enabled 0
2267 20:43:52.794248 USB2 port 5: enabled 1
2268 20:43:52.797422 USB2 port 6: enabled 0
2269 20:43:52.797504 USB2 port 7: enabled 0
2270 20:43:52.800853 USB2 port 8: enabled 1
2271 20:43:52.804161 USB2 port 9: enabled 1
2272 20:43:52.807455 USB3 port 0: enabled 1
2273 20:43:52.807537 USB3 port 1: enabled 0
2274 20:43:52.810552 USB3 port 2: enabled 0
2275 20:43:52.814057 USB3 port 3: enabled 0
2276 20:43:52.814139 GENERIC: 0.0: enabled 1
2277 20:43:52.817524 GENERIC: 1.0: enabled 1
2278 20:43:52.820798 APIC: 00: enabled 1
2279 20:43:52.820880 APIC: 12: enabled 1
2280 20:43:52.824101 APIC: 14: enabled 1
2281 20:43:52.827277 APIC: 16: enabled 1
2282 20:43:52.827359 APIC: 10: enabled 1
2283 20:43:52.830487 APIC: 01: enabled 1
2284 20:43:52.834191 APIC: 09: enabled 1
2285 20:43:52.834273 APIC: 08: enabled 1
2286 20:43:52.837307 PCI: 01:00.0: enabled 1
2287 20:43:52.844049 BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms
2288 20:43:52.847252 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2289 20:43:52.850452 ELOG: NV offset 0xf20000 size 0x4000
2290 20:43:52.857647 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2291 20:43:52.864877 ELOG: Event(17) added with size 13 at 2023-12-07 20:43:52 UTC
2292 20:43:52.871421 ELOG: Event(9E) added with size 10 at 2023-12-07 20:43:52 UTC
2293 20:43:52.878179 ELOG: Event(9F) added with size 14 at 2023-12-07 20:43:52 UTC
2294 20:43:52.884892 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2295 20:43:52.891398 ELOG: Event(A0) added with size 9 at 2023-12-07 20:43:52 UTC
2296 20:43:52.894607 elog_add_boot_reason: Logged dev mode boot
2297 20:43:52.901338 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2298 20:43:52.901421 Finalize devices...
2299 20:43:52.904846 PCI: 00:16.0 final
2300 20:43:52.908178 PCI: 00:1f.2 final
2301 20:43:52.908260 GENERIC: 0.0 final
2302 20:43:52.914689 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2303 20:43:52.917884 GENERIC: 1.0 final
2304 20:43:52.921277 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2305 20:43:52.924620 Devices finalized
2306 20:43:52.931213 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2307 20:43:52.934673 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2308 20:43:52.941245 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2309 20:43:52.944738 ME: HFSTS1 : 0x90000245
2310 20:43:52.950922 ME: HFSTS2 : 0x82100116
2311 20:43:52.954712 ME: HFSTS3 : 0x00000050
2312 20:43:52.957820 ME: HFSTS4 : 0x00004000
2313 20:43:52.964545 ME: HFSTS5 : 0x00000000
2314 20:43:52.967560 ME: HFSTS6 : 0x40600006
2315 20:43:52.971037 ME: Manufacturing Mode : NO
2316 20:43:52.974469 ME: SPI Protection Mode Enabled : YES
2317 20:43:52.980840 ME: FPFs Committed : YES
2318 20:43:52.984226 ME: Manufacturing Vars Locked : YES
2319 20:43:52.987655 ME: FW Partition Table : OK
2320 20:43:52.990988 ME: Bringup Loader Failure : NO
2321 20:43:52.994225 ME: Firmware Init Complete : YES
2322 20:43:52.997864 ME: Boot Options Present : NO
2323 20:43:53.000811 ME: Update In Progress : NO
2324 20:43:53.004484 ME: D0i3 Support : YES
2325 20:43:53.011515 ME: Low Power State Enabled : NO
2326 20:43:53.014287 ME: CPU Replaced : YES
2327 20:43:53.017620 ME: CPU Replacement Valid : YES
2328 20:43:53.021227 ME: Current Working State : 5
2329 20:43:53.024120 ME: Current Operation State : 1
2330 20:43:53.027805 ME: Current Operation Mode : 0
2331 20:43:53.031040 ME: Error Code : 0
2332 20:43:53.034411 ME: Enhanced Debug Mode : NO
2333 20:43:53.037583 ME: CPU Debug Disabled : YES
2334 20:43:53.044064 ME: TXT Support : NO
2335 20:43:53.047738 ME: WP for RO is enabled : YES
2336 20:43:53.054389 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2337 20:43:53.057618 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2338 20:43:53.061066 Ramoops buffer: 0x100000@0x76899000.
2339 20:43:53.067705 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2340 20:43:53.073984 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2341 20:43:53.077672 CBFS: 'fallback/slic' not found.
2342 20:43:53.084532 ACPI: Writing ACPI tables at 7686d000.
2343 20:43:53.084617 ACPI: * FACS
2344 20:43:53.087874 ACPI: * DSDT
2345 20:43:53.094091 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2346 20:43:53.097582 ACPI: * FADT
2347 20:43:53.097663 SCI is IRQ9
2348 20:43:53.100647 ACPI: added table 1/32, length now 40
2349 20:43:53.104185 ACPI: * SSDT
2350 20:43:53.107459 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2351 20:43:53.114895 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2352 20:43:53.118283 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2353 20:43:53.121482 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2354 20:43:53.128112 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2355 20:43:53.134879 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2356 20:43:53.141279 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2357 20:43:53.144524 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2358 20:43:53.151367 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2359 20:43:53.154780 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2360 20:43:53.161573 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2361 20:43:53.164654 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2362 20:43:53.171327 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2363 20:43:53.174662 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2364 20:43:53.182280 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2365 20:43:53.185356 PS2K: Passing 80 keymaps to kernel
2366 20:43:53.192214 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2367 20:43:53.198528 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2368 20:43:53.205157 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2369 20:43:53.212006 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2370 20:43:53.218605 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2371 20:43:53.225379 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2372 20:43:53.228706 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2373 20:43:53.234955 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2374 20:43:53.241767 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2375 20:43:53.248266 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2376 20:43:53.251919 ACPI: added table 2/32, length now 44
2377 20:43:53.254992 ACPI: * MCFG
2378 20:43:53.258576 ACPI: added table 3/32, length now 48
2379 20:43:53.258658 ACPI: * TPM2
2380 20:43:53.261876 TPM2 log created at 0x7685d000
2381 20:43:53.268038 ACPI: added table 4/32, length now 52
2382 20:43:53.268119 ACPI: * LPIT
2383 20:43:53.271612 ACPI: added table 5/32, length now 56
2384 20:43:53.274650 ACPI: * MADT
2385 20:43:53.274732 SCI is IRQ9
2386 20:43:53.278444 ACPI: added table 6/32, length now 60
2387 20:43:53.281703 cmd_reg from pmc_make_ipc_cmd 1052838
2388 20:43:53.288292 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2389 20:43:53.295018 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2390 20:43:53.301150 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2391 20:43:53.304510 PMC CrashLog size in discovery mode: 0xC00
2392 20:43:53.307811 cpu crashlog bar addr: 0x80640000
2393 20:43:53.311528 cpu discovery table offset: 0x6030
2394 20:43:53.317816 cpu_crashlog_discovery_table buffer count: 0x3
2395 20:43:53.324629 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2396 20:43:53.331461 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2397 20:43:53.337858 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2398 20:43:53.341214 PMC crashLog size in discovery mode : 0xC00
2399 20:43:53.347764 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2400 20:43:53.354443 discover mode PMC crashlog size adjusted to: 0x200
2401 20:43:53.361059 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2402 20:43:53.364630 discover mode PMC crashlog size adjusted to: 0x0
2403 20:43:53.367740 m_cpu_crashLog_size : 0x3480 bytes
2404 20:43:53.370998 CPU crashLog present.
2405 20:43:53.374373 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2406 20:43:53.384368 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2407 20:43:53.384450 current = 76876550
2408 20:43:53.387762 ACPI: * DMAR
2409 20:43:53.390933 ACPI: added table 7/32, length now 64
2410 20:43:53.394236 ACPI: added table 8/32, length now 68
2411 20:43:53.394318 ACPI: * HPET
2412 20:43:53.400989 ACPI: added table 9/32, length now 72
2413 20:43:53.401071 ACPI: done.
2414 20:43:53.404239 ACPI tables: 38528 bytes.
2415 20:43:53.408177 smbios_write_tables: 76857000
2416 20:43:53.411173 EC returned error result code 3
2417 20:43:53.414911 Couldn't obtain OEM name from CBI
2418 20:43:53.418284 Create SMBIOS type 16
2419 20:43:53.418366 Create SMBIOS type 17
2420 20:43:53.421609 Create SMBIOS type 20
2421 20:43:53.424793 GENERIC: 0.0 (WIFI Device)
2422 20:43:53.428194 SMBIOS tables: 2156 bytes.
2423 20:43:53.431646 Writing table forward entry at 0x00000500
2424 20:43:53.438394 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2425 20:43:53.441069 Writing coreboot table at 0x76891000
2426 20:43:53.447745 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2427 20:43:53.451416 1. 0000000000001000-000000000009ffff: RAM
2428 20:43:53.454500 2. 00000000000a0000-00000000000fffff: RESERVED
2429 20:43:53.461242 3. 0000000000100000-0000000076856fff: RAM
2430 20:43:53.467814 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2431 20:43:53.471363 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2432 20:43:53.477546 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2433 20:43:53.480917 7. 0000000077000000-00000000803fffff: RESERVED
2434 20:43:53.487502 8. 00000000c0000000-00000000cfffffff: RESERVED
2435 20:43:53.491467 9. 00000000f8000000-00000000f9ffffff: RESERVED
2436 20:43:53.494635 10. 00000000fb000000-00000000fb000fff: RESERVED
2437 20:43:53.500996 11. 00000000fc800000-00000000fe7fffff: RESERVED
2438 20:43:53.504180 12. 00000000feb00000-00000000feb7ffff: RESERVED
2439 20:43:53.511076 13. 00000000fec00000-00000000fecfffff: RESERVED
2440 20:43:53.514402 14. 00000000fed40000-00000000fed6ffff: RESERVED
2441 20:43:53.521206 15. 00000000fed80000-00000000fed87fff: RESERVED
2442 20:43:53.524145 16. 00000000fed90000-00000000fed92fff: RESERVED
2443 20:43:53.531165 17. 00000000feda0000-00000000feda1fff: RESERVED
2444 20:43:53.534503 18. 00000000fedc0000-00000000feddffff: RESERVED
2445 20:43:53.537638 19. 0000000100000000-000000027fbfffff: RAM
2446 20:43:53.541084 Passing 4 GPIOs to payload:
2447 20:43:53.547745 NAME | PORT | POLARITY | VALUE
2448 20:43:53.551086 lid | undefined | high | high
2449 20:43:53.557548 power | undefined | high | low
2450 20:43:53.561038 oprom | undefined | high | low
2451 20:43:53.567525 EC in RW | 0x00000151 | high | high
2452 20:43:53.567607 Board ID: 3
2453 20:43:53.570878 FW config: 0x131
2454 20:43:53.577520 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 2007
2455 20:43:53.580876 coreboot table: 1788 bytes.
2456 20:43:53.584198 IMD ROOT 0. 0x76fff000 0x00001000
2457 20:43:53.587761 IMD SMALL 1. 0x76ffe000 0x00001000
2458 20:43:53.591032 FSP MEMORY 2. 0x76afe000 0x00500000
2459 20:43:53.594000 CONSOLE 3. 0x76ade000 0x00020000
2460 20:43:53.597936 RW MCACHE 4. 0x76add000 0x0000043c
2461 20:43:53.600990 RO MCACHE 5. 0x76adc000 0x00000fd8
2462 20:43:53.607637 FMAP 6. 0x76adb000 0x0000064a
2463 20:43:53.610991 TIME STAMP 7. 0x76ada000 0x00000910
2464 20:43:53.614567 VBOOT WORK 8. 0x76ac6000 0x00014000
2465 20:43:53.617823 MEM INFO 9. 0x76ac5000 0x000003b8
2466 20:43:53.621359 ROMSTG STCK10. 0x76ac4000 0x00001000
2467 20:43:53.624329 AFTER CAR 11. 0x76ab8000 0x0000c000
2468 20:43:53.627530 RAMSTAGE 12. 0x76a2e000 0x0008a000
2469 20:43:53.631216 ACPI BERT 13. 0x76a1e000 0x00010000
2470 20:43:53.637512 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2471 20:43:53.641191 REFCODE 15. 0x769ae000 0x0006f000
2472 20:43:53.644284 SMM BACKUP 16. 0x7699e000 0x00010000
2473 20:43:53.647575 IGD OPREGION17. 0x76999000 0x00004203
2474 20:43:53.651004 RAMOOPS 18. 0x76899000 0x00100000
2475 20:43:53.654485 COREBOOT 19. 0x76891000 0x00008000
2476 20:43:53.657602 ACPI 20. 0x7686d000 0x00024000
2477 20:43:53.660848 TPM2 TCGLOG21. 0x7685d000 0x00010000
2478 20:43:53.667786 PMC CRASHLOG22. 0x7685c000 0x00000c00
2479 20:43:53.671264 CPU CRASHLOG23. 0x76858000 0x00003480
2480 20:43:53.674459 SMBIOS 24. 0x76857000 0x00001000
2481 20:43:53.674542 IMD small region:
2482 20:43:53.681173 IMD ROOT 0. 0x76ffec00 0x00000400
2483 20:43:53.684260 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2484 20:43:53.687943 VPD 2. 0x76ffeb60 0x0000006c
2485 20:43:53.690985 POWER STATE 3. 0x76ffeb00 0x00000044
2486 20:43:53.694334 ROMSTAGE 4. 0x76ffeae0 0x00000004
2487 20:43:53.697550 ACPI GNVS 5. 0x76ffea80 0x00000048
2488 20:43:53.704224 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2489 20:43:53.707832 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2490 20:43:53.711350 MTRR: Physical address space:
2491 20:43:53.717873 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2492 20:43:53.724424 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2493 20:43:53.730969 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2494 20:43:53.737659 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2495 20:43:53.744238 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2496 20:43:53.750780 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2497 20:43:53.754403 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2498 20:43:53.761241 MTRR: Fixed MSR 0x250 0x0606060606060606
2499 20:43:53.764129 MTRR: Fixed MSR 0x258 0x0606060606060606
2500 20:43:53.767398 MTRR: Fixed MSR 0x259 0x0000000000000000
2501 20:43:53.770880 MTRR: Fixed MSR 0x268 0x0606060606060606
2502 20:43:53.777529 MTRR: Fixed MSR 0x269 0x0606060606060606
2503 20:43:53.780748 MTRR: Fixed MSR 0x26a 0x0606060606060606
2504 20:43:53.783966 MTRR: Fixed MSR 0x26b 0x0606060606060606
2505 20:43:53.787551 MTRR: Fixed MSR 0x26c 0x0606060606060606
2506 20:43:53.794322 MTRR: Fixed MSR 0x26d 0x0606060606060606
2507 20:43:53.797295 MTRR: Fixed MSR 0x26e 0x0606060606060606
2508 20:43:53.800663 MTRR: Fixed MSR 0x26f 0x0606060606060606
2509 20:43:53.803935 call enable_fixed_mtrr()
2510 20:43:53.807460 CPU physical address size: 39 bits
2511 20:43:53.814126 MTRR: default type WB/UC MTRR counts: 6/6.
2512 20:43:53.817263 MTRR: UC selected as default type.
2513 20:43:53.824084 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2514 20:43:53.827210 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2515 20:43:53.834102 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2516 20:43:53.841151 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2517 20:43:53.847298 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2518 20:43:53.853681 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2519 20:43:53.860723 MTRR: Fixed MSR 0x250 0x0606060606060606
2520 20:43:53.863844 MTRR: Fixed MSR 0x258 0x0606060606060606
2521 20:43:53.867057 MTRR: Fixed MSR 0x259 0x0000000000000000
2522 20:43:53.870856 MTRR: Fixed MSR 0x268 0x0606060606060606
2523 20:43:53.877282 MTRR: Fixed MSR 0x269 0x0606060606060606
2524 20:43:53.880611 MTRR: Fixed MSR 0x26a 0x0606060606060606
2525 20:43:53.883755 MTRR: Fixed MSR 0x26b 0x0606060606060606
2526 20:43:53.887201 MTRR: Fixed MSR 0x26c 0x0606060606060606
2527 20:43:53.890511 MTRR: Fixed MSR 0x26d 0x0606060606060606
2528 20:43:53.897303 MTRR: Fixed MSR 0x26e 0x0606060606060606
2529 20:43:53.900645 MTRR: Fixed MSR 0x26f 0x0606060606060606
2530 20:43:53.903560 MTRR: Fixed MSR 0x250 0x0606060606060606
2531 20:43:53.907344 MTRR: Fixed MSR 0x250 0x0606060606060606
2532 20:43:53.914065 MTRR: Fixed MSR 0x250 0x0606060606060606
2533 20:43:53.917243 MTRR: Fixed MSR 0x250 0x0606060606060606
2534 20:43:53.920492 MTRR: Fixed MSR 0x258 0x0606060606060606
2535 20:43:53.923673 MTRR: Fixed MSR 0x259 0x0000000000000000
2536 20:43:53.930503 MTRR: Fixed MSR 0x268 0x0606060606060606
2537 20:43:53.933739 MTRR: Fixed MSR 0x269 0x0606060606060606
2538 20:43:53.937155 MTRR: Fixed MSR 0x26a 0x0606060606060606
2539 20:43:53.940393 MTRR: Fixed MSR 0x26b 0x0606060606060606
2540 20:43:53.944125 MTRR: Fixed MSR 0x26c 0x0606060606060606
2541 20:43:53.950607 MTRR: Fixed MSR 0x26d 0x0606060606060606
2542 20:43:53.953757 MTRR: Fixed MSR 0x26e 0x0606060606060606
2543 20:43:53.957141 MTRR: Fixed MSR 0x26f 0x0606060606060606
2544 20:43:53.960519 MTRR: Fixed MSR 0x258 0x0606060606060606
2545 20:43:53.963752 call enable_fixed_mtrr()
2546 20:43:53.967112 MTRR: Fixed MSR 0x259 0x0000000000000000
2547 20:43:53.973598 MTRR: Fixed MSR 0x268 0x0606060606060606
2548 20:43:53.976825 MTRR: Fixed MSR 0x269 0x0606060606060606
2549 20:43:53.980291 MTRR: Fixed MSR 0x250 0x0606060606060606
2550 20:43:53.983648 MTRR: Fixed MSR 0x258 0x0606060606060606
2551 20:43:53.989993 MTRR: Fixed MSR 0x259 0x0000000000000000
2552 20:43:53.993472 MTRR: Fixed MSR 0x268 0x0606060606060606
2553 20:43:53.996726 MTRR: Fixed MSR 0x269 0x0606060606060606
2554 20:43:53.999864 MTRR: Fixed MSR 0x26a 0x0606060606060606
2555 20:43:54.006981 MTRR: Fixed MSR 0x26b 0x0606060606060606
2556 20:43:54.010096 MTRR: Fixed MSR 0x26c 0x0606060606060606
2557 20:43:54.013202 MTRR: Fixed MSR 0x26d 0x0606060606060606
2558 20:43:54.016637 MTRR: Fixed MSR 0x26e 0x0606060606060606
2559 20:43:54.019847 MTRR: Fixed MSR 0x26f 0x0606060606060606
2560 20:43:54.026784 MTRR: Fixed MSR 0x26a 0x0606060606060606
2561 20:43:54.030297 MTRR: Fixed MSR 0x26b 0x0606060606060606
2562 20:43:54.033562 MTRR: Fixed MSR 0x26c 0x0606060606060606
2563 20:43:54.036959 MTRR: Fixed MSR 0x26d 0x0606060606060606
2564 20:43:54.043422 MTRR: Fixed MSR 0x26e 0x0606060606060606
2565 20:43:54.046863 MTRR: Fixed MSR 0x26f 0x0606060606060606
2566 20:43:54.050060 call enable_fixed_mtrr()
2567 20:43:54.050142 call enable_fixed_mtrr()
2568 20:43:54.056799 MTRR: Fixed MSR 0x258 0x0606060606060606
2569 20:43:54.060243 CPU physical address size: 39 bits
2570 20:43:54.063227 MTRR: Fixed MSR 0x250 0x0606060606060606
2571 20:43:54.066700 CPU physical address size: 39 bits
2572 20:43:54.070189 call enable_fixed_mtrr()
2573 20:43:54.073603 CPU physical address size: 39 bits
2574 20:43:54.076793 CPU physical address size: 39 bits
2575 20:43:54.079907 MTRR: Fixed MSR 0x258 0x0606060606060606
2576 20:43:54.083241 MTRR: Fixed MSR 0x258 0x0606060606060606
2577 20:43:54.086708 MTRR: Fixed MSR 0x259 0x0000000000000000
2578 20:43:54.093402 MTRR: Fixed MSR 0x259 0x0000000000000000
2579 20:43:54.096604 MTRR: Fixed MSR 0x268 0x0606060606060606
2580 20:43:54.100136 MTRR: Fixed MSR 0x269 0x0606060606060606
2581 20:43:54.103431 MTRR: Fixed MSR 0x268 0x0606060606060606
2582 20:43:54.110036 MTRR: Fixed MSR 0x269 0x0606060606060606
2583 20:43:54.113718 MTRR: Fixed MSR 0x259 0x0000000000000000
2584 20:43:54.116809 MTRR: Fixed MSR 0x268 0x0606060606060606
2585 20:43:54.120239 MTRR: Fixed MSR 0x269 0x0606060606060606
2586 20:43:54.126379 MTRR: Fixed MSR 0x26a 0x0606060606060606
2587 20:43:54.129871 MTRR: Fixed MSR 0x26b 0x0606060606060606
2588 20:43:54.133282 MTRR: Fixed MSR 0x26c 0x0606060606060606
2589 20:43:54.136327 MTRR: Fixed MSR 0x26d 0x0606060606060606
2590 20:43:54.143184 MTRR: Fixed MSR 0x26e 0x0606060606060606
2591 20:43:54.146292 MTRR: Fixed MSR 0x26f 0x0606060606060606
2592 20:43:54.149819 MTRR: Fixed MSR 0x26a 0x0606060606060606
2593 20:43:54.153148 call enable_fixed_mtrr()
2594 20:43:54.156225 MTRR: Fixed MSR 0x26a 0x0606060606060606
2595 20:43:54.159572 CPU physical address size: 39 bits
2596 20:43:54.166404 MTRR: Fixed MSR 0x26b 0x0606060606060606
2597 20:43:54.169486 MTRR: Fixed MSR 0x26b 0x0606060606060606
2598 20:43:54.172896 MTRR: Fixed MSR 0x26c 0x0606060606060606
2599 20:43:54.176412 MTRR: Fixed MSR 0x26d 0x0606060606060606
2600 20:43:54.183207 MTRR: Fixed MSR 0x26e 0x0606060606060606
2601 20:43:54.186385 MTRR: Fixed MSR 0x26f 0x0606060606060606
2602 20:43:54.189810 MTRR: Fixed MSR 0x26c 0x0606060606060606
2603 20:43:54.192641 call enable_fixed_mtrr()
2604 20:43:54.196526 MTRR: Fixed MSR 0x26d 0x0606060606060606
2605 20:43:54.199809 MTRR: Fixed MSR 0x26e 0x0606060606060606
2606 20:43:54.206302 MTRR: Fixed MSR 0x26f 0x0606060606060606
2607 20:43:54.209487 CPU physical address size: 39 bits
2608 20:43:54.209569 call enable_fixed_mtrr()
2609 20:43:54.212716 CPU physical address size: 39 bits
2610 20:43:54.218059
2611 20:43:54.218140 MTRR check
2612 20:43:54.220956 Fixed MTRRs : Enabled
2613 20:43:54.221039 Variable MTRRs: Enabled
2614 20:43:54.221104
2615 20:43:54.227570 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2616 20:43:54.231019 Checking cr50 for pending updates
2617 20:43:54.243331 Reading cr50 TPM mode
2618 20:43:54.258546 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2619 20:43:54.268305 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2620 20:43:54.272293 Checking segment from ROM address 0xf96cbe6c
2621 20:43:54.275404 Checking segment from ROM address 0xf96cbe88
2622 20:43:54.281803 Loading segment from ROM address 0xf96cbe6c
2623 20:43:54.281907 code (compression=1)
2624 20:43:54.292256 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2625 20:43:54.298665 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2626 20:43:54.302052 using LZMA
2627 20:43:54.324237 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2628 20:43:54.330549 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2629 20:43:54.338930 Loading segment from ROM address 0xf96cbe88
2630 20:43:54.342199 Entry Point 0x30000000
2631 20:43:54.342281 Loaded segments
2632 20:43:54.348617 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2633 20:43:54.355238 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2634 20:43:54.358982 Finalizing chipset.
2635 20:43:54.359066 apm_control: Finalizing SMM.
2636 20:43:54.362326 APMC done.
2637 20:43:54.365384 HECI: CSE device 16.1 is disabled
2638 20:43:54.368812 HECI: CSE device 16.2 is disabled
2639 20:43:54.372175 HECI: CSE device 16.3 is disabled
2640 20:43:54.375743 HECI: CSE device 16.4 is disabled
2641 20:43:54.378797 HECI: CSE device 16.5 is disabled
2642 20:43:54.382184 HECI: Sending End-of-Post
2643 20:43:54.390104 CSE: EOP requested action: continue boot
2644 20:43:54.393732 CSE EOP successful, continuing boot
2645 20:43:54.400112 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2646 20:43:54.403480 mp_park_aps done after 0 msecs.
2647 20:43:54.406907 Jumping to boot code at 0x30000000(0x76891000)
2648 20:43:54.417068 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2649 20:43:54.421250
2650 20:43:54.421335
2651 20:43:54.421400
2652 20:43:54.424242 Starting depthcharge on Volmar...
2653 20:43:54.424325
2654 20:43:54.424697 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2655 20:43:54.424797 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2656 20:43:54.424881 Setting prompt string to ['brya:']
2657 20:43:54.424963 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2658 20:43:54.431083 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2659 20:43:54.431166
2660 20:43:54.437624 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2661 20:43:54.437707
2662 20:43:54.444574 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2663 20:43:54.444657
2664 20:43:54.447722 configure_storage: Failed to remap 1C:2
2665 20:43:54.447804
2666 20:43:54.451200 Wipe memory regions:
2667 20:43:54.451283
2668 20:43:54.454329 [0x00000000001000, 0x000000000a0000)
2669 20:43:54.454412
2670 20:43:54.457476 [0x00000000100000, 0x00000030000000)
2671 20:43:54.565251
2672 20:43:54.568376 [0x00000032668e60, 0x00000076857000)
2673 20:43:54.719952
2674 20:43:54.723382 [0x00000100000000, 0x0000027fc00000)
2675 20:43:55.574672
2676 20:43:55.577488 ec_init: CrosEC protocol v3 supported (256, 256)
2677 20:43:56.186016
2678 20:43:56.186162 R8152: Initializing
2679 20:43:56.186230
2680 20:43:56.189417 Version 9 (ocp_data = 6010)
2681 20:43:56.189500
2682 20:43:56.193059 R8152: Done initializing
2683 20:43:56.193142
2684 20:43:56.196525 Adding net device
2685 20:43:56.497195
2686 20:43:56.500261 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2687 20:43:56.500349
2688 20:43:56.500415
2689 20:43:56.500477
2690 20:43:56.500754 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2692 20:43:56.601103 brya: tftpboot 192.168.201.1 12210469/tftp-deploy-_kd2jvnh/kernel/bzImage 12210469/tftp-deploy-_kd2jvnh/kernel/cmdline 12210469/tftp-deploy-_kd2jvnh/ramdisk/ramdisk.cpio.gz
2693 20:43:56.601226 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2694 20:43:56.601312 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2695 20:43:56.605706 tftpboot 192.168.201.1 12210469/tftp-deploy-_kd2jvnh/kernel/bzImploy-_kd2jvnh/kernel/cmdline 12210469/tftp-deploy-_kd2jvnh/ramdisk/ramdisk.cpio.gz
2696 20:43:56.605791
2697 20:43:56.605867 Waiting for link
2698 20:43:56.808126
2699 20:43:56.808253 done.
2700 20:43:56.808320
2701 20:43:56.808380 MAC: 00:e0:4c:68:02:37
2702 20:43:56.808443
2703 20:43:56.811574 Sending DHCP discover... done.
2704 20:43:56.811663
2705 20:43:56.814988 Waiting for reply... done.
2706 20:43:56.815062
2707 20:43:56.818274 Sending DHCP request... done.
2708 20:43:56.818352
2709 20:43:56.825070 Waiting for reply... done.
2710 20:43:56.825145
2711 20:43:56.825233 My ip is 192.168.201.15
2712 20:43:56.825295
2713 20:43:56.828248 The DHCP server ip is 192.168.201.1
2714 20:43:56.828316
2715 20:43:56.834753 TFTP server IP predefined by user: 192.168.201.1
2716 20:43:56.834843
2717 20:43:56.841961 Bootfile predefined by user: 12210469/tftp-deploy-_kd2jvnh/kernel/bzImage
2718 20:43:56.842035
2719 20:43:56.844736 Sending tftp read request... done.
2720 20:43:56.844808
2721 20:43:56.848229 Waiting for the transfer...
2722 20:43:56.848308
2723 20:43:57.124035 00000000 ################################################################
2724 20:43:57.124178
2725 20:43:57.400819 00080000 ################################################################
2726 20:43:57.400954
2727 20:43:57.679147 00100000 ################################################################
2728 20:43:57.679275
2729 20:43:57.945570 00180000 ################################################################
2730 20:43:57.945699
2731 20:43:58.197549 00200000 ################################################################
2732 20:43:58.197692
2733 20:43:58.459079 00280000 ################################################################
2734 20:43:58.459215
2735 20:43:58.722140 00300000 ################################################################
2736 20:43:58.722273
2737 20:43:58.995113 00380000 ################################################################
2738 20:43:58.995244
2739 20:43:59.273966 00400000 ################################################################
2740 20:43:59.274119
2741 20:43:59.552089 00480000 ################################################################
2742 20:43:59.552230
2743 20:43:59.814255 00500000 ################################################################
2744 20:43:59.814383
2745 20:44:00.080945 00580000 ################################################################
2746 20:44:00.081069
2747 20:44:00.357129 00600000 ################################################################
2748 20:44:00.357264
2749 20:44:00.653959 00680000 ################################################################
2750 20:44:00.654084
2751 20:44:00.912545 00700000 ################################################################
2752 20:44:00.912668
2753 20:44:01.190761 00780000 ################################################################
2754 20:44:01.190885
2755 20:44:01.440809 00800000 ################################################################
2756 20:44:01.440941
2757 20:44:01.689764 00880000 ################################################################
2758 20:44:01.689941
2759 20:44:01.942319 00900000 ################################################################
2760 20:44:01.942443
2761 20:44:02.195768 00980000 ################################################################
2762 20:44:02.195894
2763 20:44:02.475513 00a00000 ################################################################
2764 20:44:02.475646
2765 20:44:02.742180 00a80000 ################################################################
2766 20:44:02.742308
2767 20:44:02.758370 00b00000 ##### done.
2768 20:44:02.758459
2769 20:44:02.761876 The bootfile was 11571200 bytes long.
2770 20:44:02.761977
2771 20:44:02.765158 Sending tftp read request... done.
2772 20:44:02.769100
2773 20:44:02.769199 Waiting for the transfer...
2774 20:44:02.769300
2775 20:44:03.032374 00000000 ################################################################
2776 20:44:03.032494
2777 20:44:03.282500 00080000 ################################################################
2778 20:44:03.282621
2779 20:44:03.555344 00100000 ################################################################
2780 20:44:03.555472
2781 20:44:03.825938 00180000 ################################################################
2782 20:44:03.826061
2783 20:44:04.091966 00200000 ################################################################
2784 20:44:04.092097
2785 20:44:04.364428 00280000 ################################################################
2786 20:44:04.364558
2787 20:44:04.614576 00300000 ################################################################
2788 20:44:04.614710
2789 20:44:04.863888 00380000 ################################################################
2790 20:44:04.864008
2791 20:44:05.154566 00400000 ################################################################
2792 20:44:05.154691
2793 20:44:05.414964 00480000 ################################################################
2794 20:44:05.415125
2795 20:44:05.669488 00500000 ################################################################
2796 20:44:05.669640
2797 20:44:05.857316 00580000 ################################################ done.
2798 20:44:05.857428
2799 20:44:05.860915 Sending tftp read request... done.
2800 20:44:05.861005
2801 20:44:05.864135 Waiting for the transfer...
2802 20:44:05.864301
2803 20:44:05.867597 00000000 # done.
2804 20:44:05.867692
2805 20:44:05.874400 Command line loaded dynamically from TFTP file: 12210469/tftp-deploy-_kd2jvnh/kernel/cmdline
2806 20:44:05.874589
2807 20:44:05.900520 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12210469/extract-nfsrootfs-hl63rzoe,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2808 20:44:05.906286
2809 20:44:05.909551 Shutting down all USB controllers.
2810 20:44:05.909869
2811 20:44:05.910129 Removing current net device
2812 20:44:05.910342
2813 20:44:05.913182 Finalizing coreboot
2814 20:44:05.913642
2815 20:44:05.919578 Exiting depthcharge with code 4 at timestamp: 21753867
2816 20:44:05.920050
2817 20:44:05.920424
2818 20:44:05.920769 Starting kernel ...
2819 20:44:05.921101
2820 20:44:05.921424
2821 20:44:05.922724 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2822 20:44:05.923272 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2823 20:44:05.923737 Setting prompt string to ['Linux version [0-9]']
2824 20:44:05.924133 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2825 20:44:05.924519 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2827 20:48:34.924211 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2829 20:48:34.925479 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2831 20:48:34.926429 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2834 20:48:34.928139 end: 2 depthcharge-action (duration 00:05:00) [common]
2836 20:48:34.928825 Cleaning after the job
2837 20:48:34.928912 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/ramdisk
2838 20:48:34.930020 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/kernel
2839 20:48:34.931803 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/nfsrootfs
2840 20:48:35.008308 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210469/tftp-deploy-_kd2jvnh/modules
2841 20:48:35.009018 start: 5.1 power-off (timeout 00:00:30) [common]
2842 20:48:35.009191 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-7' '--port=1' '--command=off'
2843 20:48:35.092091 >> Command sent successfully.
2844 20:48:35.103840 Returned 0 in 0 seconds
2845 20:48:35.205259 end: 5.1 power-off (duration 00:00:00) [common]
2847 20:48:35.206870 start: 5.2 read-feedback (timeout 00:10:00) [common]
2848 20:48:35.208162 Listened to connection for namespace 'common' for up to 1s
2850 20:48:35.209548 Listened to connection for namespace 'common' for up to 1s
2851 20:48:36.208928 Finalising connection for namespace 'common'
2852 20:48:36.209610 Disconnecting from shell: Finalise
2853 20:48:36.210112
2854 20:48:36.311197 end: 5.2 read-feedback (duration 00:00:01) [common]
2855 20:48:36.311840 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12210469
2856 20:48:36.663585 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12210469
2857 20:48:36.663775 JobError: Your job cannot terminate cleanly.