Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 20:45:50.118314 lava-dispatcher, installed at version: 2023.10
2 20:45:50.118545 start: 0 validate
3 20:45:50.118683 Start time: 2023-12-07 20:45:50.118675+00:00 (UTC)
4 20:45:50.118809 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:45:50.118940 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 20:45:50.385910 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:45:50.386077 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.299-cip105%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:45:50.387104 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:45:50.387224 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 20:45:50.635787 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:45:50.635958 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.299-cip105%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 20:45:50.638321 validate duration: 0.52
14 20:45:50.638616 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:45:50.638713 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:45:50.638802 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:45:50.638925 Not decompressing ramdisk as can be used compressed.
18 20:45:50.639013 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 20:45:50.639081 saving as /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/ramdisk/initrd.cpio.gz
20 20:45:50.639145 total size: 5432480 (5 MB)
21 20:45:50.640166 progress 0 % (0 MB)
22 20:45:50.641816 progress 5 % (0 MB)
23 20:45:50.643253 progress 10 % (0 MB)
24 20:45:50.644735 progress 15 % (0 MB)
25 20:45:50.646495 progress 20 % (1 MB)
26 20:45:50.647980 progress 25 % (1 MB)
27 20:45:50.649502 progress 30 % (1 MB)
28 20:45:50.651155 progress 35 % (1 MB)
29 20:45:50.652643 progress 40 % (2 MB)
30 20:45:50.654040 progress 45 % (2 MB)
31 20:45:50.655706 progress 50 % (2 MB)
32 20:45:50.657311 progress 55 % (2 MB)
33 20:45:50.658778 progress 60 % (3 MB)
34 20:45:50.660173 progress 65 % (3 MB)
35 20:45:50.662069 progress 70 % (3 MB)
36 20:45:50.663487 progress 75 % (3 MB)
37 20:45:50.665011 progress 80 % (4 MB)
38 20:45:50.666546 progress 85 % (4 MB)
39 20:45:50.668226 progress 90 % (4 MB)
40 20:45:50.669720 progress 95 % (4 MB)
41 20:45:50.671156 progress 100 % (5 MB)
42 20:45:50.671385 5 MB downloaded in 0.03 s (160.78 MB/s)
43 20:45:50.671598 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:45:50.671905 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:45:50.671992 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:45:50.672075 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:45:50.672195 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.299-cip105/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 20:45:50.672263 saving as /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/kernel/bzImage
50 20:45:50.672411 total size: 11571200 (11 MB)
51 20:45:50.672524 No compression specified
52 20:45:50.673704 progress 0 % (0 MB)
53 20:45:50.677027 progress 5 % (0 MB)
54 20:45:50.680269 progress 10 % (1 MB)
55 20:45:50.683542 progress 15 % (1 MB)
56 20:45:50.686719 progress 20 % (2 MB)
57 20:45:50.689958 progress 25 % (2 MB)
58 20:45:50.693102 progress 30 % (3 MB)
59 20:45:50.696483 progress 35 % (3 MB)
60 20:45:50.699794 progress 40 % (4 MB)
61 20:45:50.703028 progress 45 % (4 MB)
62 20:45:50.706212 progress 50 % (5 MB)
63 20:45:50.709447 progress 55 % (6 MB)
64 20:45:50.712446 progress 60 % (6 MB)
65 20:45:50.715683 progress 65 % (7 MB)
66 20:45:50.718867 progress 70 % (7 MB)
67 20:45:50.721815 progress 75 % (8 MB)
68 20:45:50.724913 progress 80 % (8 MB)
69 20:45:50.727960 progress 85 % (9 MB)
70 20:45:50.730875 progress 90 % (9 MB)
71 20:45:50.733992 progress 95 % (10 MB)
72 20:45:50.737165 progress 100 % (11 MB)
73 20:45:50.737294 11 MB downloaded in 0.06 s (170.08 MB/s)
74 20:45:50.737446 end: 1.2.1 http-download (duration 00:00:00) [common]
76 20:45:50.737675 end: 1.2 download-retry (duration 00:00:00) [common]
77 20:45:50.737798 start: 1.3 download-retry (timeout 00:10:00) [common]
78 20:45:50.737882 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 20:45:50.738008 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 20:45:50.738076 saving as /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/nfsrootfs/full.rootfs.tar
81 20:45:50.738137 total size: 207157356 (197 MB)
82 20:45:50.738215 Using unxz to decompress xz
83 20:45:50.742659 progress 0 % (0 MB)
84 20:45:51.306187 progress 5 % (9 MB)
85 20:45:51.858755 progress 10 % (19 MB)
86 20:45:52.490304 progress 15 % (29 MB)
87 20:45:52.867873 progress 20 % (39 MB)
88 20:45:53.254585 progress 25 % (49 MB)
89 20:45:53.896918 progress 30 % (59 MB)
90 20:45:54.480219 progress 35 % (69 MB)
91 20:45:55.108364 progress 40 % (79 MB)
92 20:45:55.697920 progress 45 % (88 MB)
93 20:45:56.314751 progress 50 % (98 MB)
94 20:45:56.984295 progress 55 % (108 MB)
95 20:45:57.707401 progress 60 % (118 MB)
96 20:45:57.855735 progress 65 % (128 MB)
97 20:45:58.000373 progress 70 % (138 MB)
98 20:45:58.098619 progress 75 % (148 MB)
99 20:45:58.174086 progress 80 % (158 MB)
100 20:45:58.245537 progress 85 % (167 MB)
101 20:45:58.349540 progress 90 % (177 MB)
102 20:45:58.663511 progress 95 % (187 MB)
103 20:45:59.286258 progress 100 % (197 MB)
104 20:45:59.292935 197 MB downloaded in 8.55 s (23.09 MB/s)
105 20:45:59.293216 end: 1.3.1 http-download (duration 00:00:09) [common]
107 20:45:59.293510 end: 1.3 download-retry (duration 00:00:09) [common]
108 20:45:59.293600 start: 1.4 download-retry (timeout 00:09:51) [common]
109 20:45:59.293690 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 20:45:59.293829 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.299-cip105/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 20:45:59.293898 saving as /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/modules/modules.tar
112 20:45:59.293960 total size: 483888 (0 MB)
113 20:45:59.294024 Using unxz to decompress xz
114 20:45:59.298191 progress 6 % (0 MB)
115 20:45:59.298613 progress 13 % (0 MB)
116 20:45:59.298852 progress 20 % (0 MB)
117 20:45:59.300495 progress 27 % (0 MB)
118 20:45:59.302491 progress 33 % (0 MB)
119 20:45:59.304457 progress 40 % (0 MB)
120 20:45:59.306390 progress 47 % (0 MB)
121 20:45:59.308283 progress 54 % (0 MB)
122 20:45:59.310374 progress 60 % (0 MB)
123 20:45:59.312442 progress 67 % (0 MB)
124 20:45:59.314445 progress 74 % (0 MB)
125 20:45:59.316530 progress 81 % (0 MB)
126 20:45:59.318426 progress 88 % (0 MB)
127 20:45:59.320438 progress 94 % (0 MB)
128 20:45:59.322959 progress 100 % (0 MB)
129 20:45:59.329660 0 MB downloaded in 0.04 s (12.93 MB/s)
130 20:45:59.329928 end: 1.4.1 http-download (duration 00:00:00) [common]
132 20:45:59.330217 end: 1.4 download-retry (duration 00:00:00) [common]
133 20:45:59.330312 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 20:45:59.330403 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 20:46:02.935252 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12210448/extract-nfsrootfs-eu2zvxb9
136 20:46:02.935446 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
137 20:46:02.935551 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 20:46:02.935713 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l
139 20:46:02.935845 makedir: /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin
140 20:46:02.935949 makedir: /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/tests
141 20:46:02.936049 makedir: /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/results
142 20:46:02.936151 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-add-keys
143 20:46:02.936329 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-add-sources
144 20:46:02.936477 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-background-process-start
145 20:46:02.936608 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-background-process-stop
146 20:46:02.936742 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-common-functions
147 20:46:02.936869 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-echo-ipv4
148 20:46:02.936997 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-install-packages
149 20:46:02.937124 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-installed-packages
150 20:46:02.937250 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-os-build
151 20:46:02.937378 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-probe-channel
152 20:46:02.937506 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-probe-ip
153 20:46:02.937634 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-target-ip
154 20:46:02.937763 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-target-mac
155 20:46:02.937890 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-target-storage
156 20:46:02.938021 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-test-case
157 20:46:02.938152 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-test-event
158 20:46:02.938278 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-test-feedback
159 20:46:02.938408 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-test-raise
160 20:46:02.938535 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-test-reference
161 20:46:02.938663 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-test-runner
162 20:46:02.938790 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-test-set
163 20:46:02.938917 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-test-shell
164 20:46:02.939046 Updating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-add-keys (debian)
165 20:46:02.939220 Updating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-add-sources (debian)
166 20:46:02.939420 Updating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-install-packages (debian)
167 20:46:02.939570 Updating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-installed-packages (debian)
168 20:46:02.939714 Updating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/bin/lava-os-build (debian)
169 20:46:02.939842 Creating /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/environment
170 20:46:02.939941 LAVA metadata
171 20:46:02.940012 - LAVA_JOB_ID=12210448
172 20:46:02.940077 - LAVA_DISPATCHER_IP=192.168.201.1
173 20:46:02.940197 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 20:46:02.940265 skipped lava-vland-overlay
175 20:46:02.940387 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 20:46:02.940469 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 20:46:02.940531 skipped lava-multinode-overlay
178 20:46:02.940603 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 20:46:02.940684 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 20:46:02.940758 Loading test definitions
181 20:46:02.940848 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 20:46:02.940918 Using /lava-12210448 at stage 0
183 20:46:02.941207 uuid=12210448_1.5.2.3.1 testdef=None
184 20:46:02.941295 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 20:46:02.941381 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 20:46:02.941843 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 20:46:02.942066 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 20:46:02.942631 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 20:46:02.942866 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 20:46:02.943410 runner path: /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/0/tests/0_timesync-off test_uuid 12210448_1.5.2.3.1
193 20:46:02.943565 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 20:46:02.943790 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 20:46:02.943863 Using /lava-12210448 at stage 0
197 20:46:02.943959 Fetching tests from https://github.com/kernelci/test-definitions.git
198 20:46:02.944036 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/0/tests/1_kselftest-filesystems'
199 20:46:07.151650 Running '/usr/bin/git checkout kernelci.org
200 20:46:07.257636 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
201 20:46:07.258633 uuid=12210448_1.5.2.3.5 testdef=None
202 20:46:07.258828 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
204 20:46:07.259130 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
205 20:46:07.259967 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 20:46:07.260222 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
208 20:46:07.261255 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 20:46:07.261497 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
211 20:46:07.262497 runner path: /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/0/tests/1_kselftest-filesystems test_uuid 12210448_1.5.2.3.5
212 20:46:07.262590 BOARD='asus-C436FA-Flip-hatch'
213 20:46:07.262660 BRANCH='cip'
214 20:46:07.262721 SKIPFILE='/dev/null'
215 20:46:07.262781 SKIP_INSTALL='True'
216 20:46:07.262838 TESTPROG_URL='None'
217 20:46:07.262923 TST_CASENAME=''
218 20:46:07.262986 TST_CMDFILES='filesystems'
219 20:46:07.263136 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 20:46:07.263348 Creating lava-test-runner.conf files
222 20:46:07.263414 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12210448/lava-overlay-gvuusi8l/lava-12210448/0 for stage 0
223 20:46:07.263515 - 0_timesync-off
224 20:46:07.263586 - 1_kselftest-filesystems
225 20:46:07.263688 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
226 20:46:07.263787 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
227 20:46:15.081885 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 20:46:15.082075 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
229 20:46:15.082202 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 20:46:15.082311 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
231 20:46:15.082409 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
232 20:46:15.230020 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 20:46:15.230430 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
234 20:46:15.230549 extracting modules file /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12210448/extract-nfsrootfs-eu2zvxb9
235 20:46:15.257062 extracting modules file /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12210448/extract-overlay-ramdisk-8tk1a3eg/ramdisk
236 20:46:15.284512 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 20:46:15.284668 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
238 20:46:15.284769 [common] Applying overlay to NFS
239 20:46:15.284845 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12210448/compress-overlay-qagqcjxn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12210448/extract-nfsrootfs-eu2zvxb9
240 20:46:16.333736 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 20:46:16.333901 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
242 20:46:16.333999 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 20:46:16.334094 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
244 20:46:16.334183 Building ramdisk /var/lib/lava/dispatcher/tmp/12210448/extract-overlay-ramdisk-8tk1a3eg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12210448/extract-overlay-ramdisk-8tk1a3eg/ramdisk
245 20:46:16.422786 >> 30353 blocks
246 20:46:17.049923 rename /var/lib/lava/dispatcher/tmp/12210448/extract-overlay-ramdisk-8tk1a3eg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/ramdisk/ramdisk.cpio.gz
247 20:46:17.050405 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 20:46:17.050539 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
249 20:46:17.050648 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
250 20:46:17.050763 No mkimage arch provided, not using FIT.
251 20:46:17.050854 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 20:46:17.050958 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 20:46:17.051073 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
254 20:46:17.051181 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
255 20:46:17.051261 No LXC device requested
256 20:46:17.051367 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 20:46:17.051460 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
258 20:46:17.051565 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 20:46:17.051646 Checking files for TFTP limit of 4294967296 bytes.
260 20:46:17.052201 end: 1 tftp-deploy (duration 00:00:26) [common]
261 20:46:17.052352 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 20:46:17.052449 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 20:46:17.052599 substitutions:
264 20:46:17.052672 - {DTB}: None
265 20:46:17.052738 - {INITRD}: 12210448/tftp-deploy-06olfia6/ramdisk/ramdisk.cpio.gz
266 20:46:17.052819 - {KERNEL}: 12210448/tftp-deploy-06olfia6/kernel/bzImage
267 20:46:17.052881 - {LAVA_MAC}: None
268 20:46:17.052939 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12210448/extract-nfsrootfs-eu2zvxb9
269 20:46:17.053019 - {NFS_SERVER_IP}: 192.168.201.1
270 20:46:17.053078 - {PRESEED_CONFIG}: None
271 20:46:17.053134 - {PRESEED_LOCAL}: None
272 20:46:17.053207 - {RAMDISK}: 12210448/tftp-deploy-06olfia6/ramdisk/ramdisk.cpio.gz
273 20:46:17.053266 - {ROOT_PART}: None
274 20:46:17.053322 - {ROOT}: None
275 20:46:17.053393 - {SERVER_IP}: 192.168.201.1
276 20:46:17.053452 - {TEE}: None
277 20:46:17.053507 Parsed boot commands:
278 20:46:17.053563 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 20:46:17.053764 Parsed boot commands: tftpboot 192.168.201.1 12210448/tftp-deploy-06olfia6/kernel/bzImage 12210448/tftp-deploy-06olfia6/kernel/cmdline 12210448/tftp-deploy-06olfia6/ramdisk/ramdisk.cpio.gz
280 20:46:17.053870 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 20:46:17.053954 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 20:46:17.054064 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 20:46:17.054187 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 20:46:17.054298 Not connected, no need to disconnect.
285 20:46:17.054407 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 20:46:17.054533 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 20:46:17.054641 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
288 20:46:17.059016 Setting prompt string to ['lava-test: # ']
289 20:46:17.059451 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 20:46:17.059572 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 20:46:17.059703 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 20:46:17.059801 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 20:46:17.060012 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
294 20:46:22.191635 >> Command sent successfully.
295 20:46:22.194167 Returned 0 in 5 seconds
296 20:46:22.294587 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 20:46:22.294909 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 20:46:22.295012 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 20:46:22.295107 Setting prompt string to 'Starting depthcharge on Helios...'
301 20:46:22.295179 Changing prompt to 'Starting depthcharge on Helios...'
302 20:46:22.295249 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 20:46:22.295506 [Enter `^Ec?' for help]
304 20:46:22.926547
305 20:46:22.926731
306 20:46:22.936960 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 20:46:22.940303 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 20:46:22.946415 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 20:46:22.949893 CPU: AES supported, TXT NOT supported, VT supported
310 20:46:22.956465 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 20:46:22.959789 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 20:46:22.966631 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 20:46:22.970004 VBOOT: Loading verstage.
314 20:46:22.973358 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 20:46:22.980130 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 20:46:22.982955 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 20:46:22.986828 CBFS @ c08000 size 3f8000
318 20:46:22.993319 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 20:46:22.996707 CBFS: Locating 'fallback/verstage'
320 20:46:22.999832 CBFS: Found @ offset 10fb80 size 1072c
321 20:46:23.002790
322 20:46:23.002874
323 20:46:23.013182 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 20:46:23.027505 Probing TPM: . done!
325 20:46:23.030692 TPM ready after 0 ms
326 20:46:23.034161 Connected to device vid:did:rid of 1ae0:0028:00
327 20:46:23.044464 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 20:46:23.047810 Initialized TPM device CR50 revision 0
329 20:46:23.092103 tlcl_send_startup: Startup return code is 0
330 20:46:23.092205 TPM: setup succeeded
331 20:46:23.104733 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 20:46:23.108816 Chrome EC: UHEPI supported
333 20:46:23.112189 Phase 1
334 20:46:23.115600 FMAP: area GBB found @ c05000 (12288 bytes)
335 20:46:23.122312 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 20:46:23.125629 Phase 2
337 20:46:23.125713 Phase 3
338 20:46:23.128964 FMAP: area GBB found @ c05000 (12288 bytes)
339 20:46:23.135478 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 20:46:23.141978 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
341 20:46:23.145587 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
342 20:46:23.151610 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 20:46:23.167751 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
344 20:46:23.171241 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
345 20:46:23.177344 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 20:46:23.181454 Phase 4
347 20:46:23.184754 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
348 20:46:23.191436 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 20:46:23.370974 VB2:vb2_rsa_verify_digest() Digest check failed!
350 20:46:23.377960 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 20:46:23.378059 Saving nvdata
352 20:46:23.381412 Reboot requested (10020007)
353 20:46:23.384776 board_reset() called!
354 20:46:23.384859 full_reset() called!
355 20:46:27.893323
356 20:46:27.893476
357 20:46:27.903113 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 20:46:27.906796 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 20:46:27.913294 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 20:46:27.916715 CPU: AES supported, TXT NOT supported, VT supported
361 20:46:27.923566 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 20:46:27.926859 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 20:46:27.933075 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 20:46:27.936329 VBOOT: Loading verstage.
365 20:46:27.939756 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 20:46:27.946630 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 20:46:27.950266 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 20:46:27.952759 CBFS @ c08000 size 3f8000
369 20:46:27.959454 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 20:46:27.963170 CBFS: Locating 'fallback/verstage'
371 20:46:27.966538 CBFS: Found @ offset 10fb80 size 1072c
372 20:46:27.970068
373 20:46:27.970142
374 20:46:27.980142 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 20:46:27.993918 Probing TPM: . done!
376 20:46:27.997209 TPM ready after 0 ms
377 20:46:28.000597 Connected to device vid:did:rid of 1ae0:0028:00
378 20:46:28.010575 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
379 20:46:28.014153 Initialized TPM device CR50 revision 0
380 20:46:28.058831 tlcl_send_startup: Startup return code is 0
381 20:46:28.058958 TPM: setup succeeded
382 20:46:28.071518 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 20:46:28.074986 Chrome EC: UHEPI supported
384 20:46:28.078546 Phase 1
385 20:46:28.081605 FMAP: area GBB found @ c05000 (12288 bytes)
386 20:46:28.088710 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 20:46:28.095277 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 20:46:28.098798 Recovery requested (1009000e)
389 20:46:28.104064 Saving nvdata
390 20:46:28.110752 tlcl_extend: response is 0
391 20:46:28.118791 tlcl_extend: response is 0
392 20:46:28.125891 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 20:46:28.129573 CBFS @ c08000 size 3f8000
394 20:46:28.136492 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 20:46:28.139017 CBFS: Locating 'fallback/romstage'
396 20:46:28.142443 CBFS: Found @ offset 80 size 145fc
397 20:46:28.145720 Accumulated console time in verstage 98 ms
398 20:46:28.145819
399 20:46:28.145912
400 20:46:28.159193 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 20:46:28.165916 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 20:46:28.169402 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 20:46:28.172542 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 20:46:28.179188 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 20:46:28.182514 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 20:46:28.185956 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 20:46:28.189241 TCO_STS: 0000 0000
408 20:46:28.192022 GEN_PMCON: e0015238 00000200
409 20:46:28.195288 GBLRST_CAUSE: 00000000 00000000
410 20:46:28.195400 prev_sleep_state 5
411 20:46:28.198602 Boot Count incremented to 1641
412 20:46:28.205965 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 20:46:28.209290 CBFS @ c08000 size 3f8000
414 20:46:28.215230 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 20:46:28.215338 CBFS: Locating 'fspm.bin'
416 20:46:28.221748 CBFS: Found @ offset 5ffc0 size 71000
417 20:46:28.225401 Chrome EC: UHEPI supported
418 20:46:28.232020 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 20:46:28.235384 Probing TPM: done!
420 20:46:28.241916 Connected to device vid:did:rid of 1ae0:0028:00
421 20:46:28.251668 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
422 20:46:28.258137 Initialized TPM device CR50 revision 0
423 20:46:28.266882 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 20:46:28.273931 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 20:46:28.276812 MRC cache found, size 1948
426 20:46:28.280108 bootmode is set to: 2
427 20:46:28.283736 PRMRR disabled by config.
428 20:46:28.283824 SPD INDEX = 1
429 20:46:28.290373 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 20:46:28.293984 CBFS @ c08000 size 3f8000
431 20:46:28.299761 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 20:46:28.299847 CBFS: Locating 'spd.bin'
433 20:46:28.303451 CBFS: Found @ offset 5fb80 size 400
434 20:46:28.306704 SPD: module type is LPDDR3
435 20:46:28.309856 SPD: module part is
436 20:46:28.316324 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 20:46:28.319746 SPD: device width 4 bits, bus width 8 bits
438 20:46:28.323211 SPD: module size is 4096 MB (per channel)
439 20:46:28.326606 memory slot: 0 configuration done.
440 20:46:28.330075 memory slot: 2 configuration done.
441 20:46:28.380826 CBMEM:
442 20:46:28.384404 IMD: root @ 99fff000 254 entries.
443 20:46:28.387588 IMD: root @ 99ffec00 62 entries.
444 20:46:28.391012 External stage cache:
445 20:46:28.394484 IMD: root @ 9abff000 254 entries.
446 20:46:28.397913 IMD: root @ 9abfec00 62 entries.
447 20:46:28.400680 Chrome EC: clear events_b mask to 0x0000000020004000
448 20:46:28.421208 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 20:46:28.429692 tlcl_write: response is 0
450 20:46:28.439017 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 20:46:28.445631 MRC: TPM MRC hash updated successfully.
452 20:46:28.445718 2 DIMMs found
453 20:46:28.449487 SMM Memory Map
454 20:46:28.452173 SMRAM : 0x9a000000 0x1000000
455 20:46:28.455664 Subregion 0: 0x9a000000 0xa00000
456 20:46:28.459208 Subregion 1: 0x9aa00000 0x200000
457 20:46:28.462567 Subregion 2: 0x9ac00000 0x400000
458 20:46:28.465781 top_of_ram = 0x9a000000
459 20:46:28.469016 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 20:46:28.475365 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 20:46:28.478809 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 20:46:28.485535 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 20:46:28.489210 CBFS @ c08000 size 3f8000
464 20:46:28.492461 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 20:46:28.495433 CBFS: Locating 'fallback/postcar'
466 20:46:28.498872 CBFS: Found @ offset 107000 size 4b44
467 20:46:28.505521 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 20:46:28.517808 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 20:46:28.520640 Processing 180 relocs. Offset value of 0x97c0c000
470 20:46:28.529291 Accumulated console time in romstage 285 ms
471 20:46:28.529375
472 20:46:28.529443
473 20:46:28.539040 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 20:46:28.545579 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 20:46:28.548901 CBFS @ c08000 size 3f8000
476 20:46:28.552869 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 20:46:28.559412 CBFS: Locating 'fallback/ramstage'
478 20:46:28.562597 CBFS: Found @ offset 43380 size 1b9e8
479 20:46:28.569162 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 20:46:28.601129 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 20:46:28.604152 Processing 3976 relocs. Offset value of 0x98db0000
482 20:46:28.611129 Accumulated console time in postcar 52 ms
483 20:46:28.611216
484 20:46:28.611283
485 20:46:28.620969 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 20:46:28.627466 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 20:46:28.631077 WARNING: RO_VPD is uninitialized or empty.
488 20:46:28.634482 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 20:46:28.641085 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 20:46:28.641171 Normal boot.
491 20:46:28.647365 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 20:46:28.651251 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 20:46:28.654501 CBFS @ c08000 size 3f8000
494 20:46:28.660901 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 20:46:28.663923 CBFS: Locating 'cpu_microcode_blob.bin'
496 20:46:28.667366 CBFS: Found @ offset 14700 size 2ec00
497 20:46:28.670733 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 20:46:28.673942 Skip microcode update
499 20:46:28.680723 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 20:46:28.680808 CBFS @ c08000 size 3f8000
501 20:46:28.687075 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 20:46:28.690576 CBFS: Locating 'fsps.bin'
503 20:46:28.693868 CBFS: Found @ offset d1fc0 size 35000
504 20:46:28.719149 Detected 4 core, 8 thread CPU.
505 20:46:28.722385 Setting up SMI for CPU
506 20:46:28.725529 IED base = 0x9ac00000
507 20:46:28.725613 IED size = 0x00400000
508 20:46:28.729294 Will perform SMM setup.
509 20:46:28.735746 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 20:46:28.742474 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 20:46:28.745766 Processing 16 relocs. Offset value of 0x00030000
512 20:46:28.748957 Attempting to start 7 APs
513 20:46:28.752669 Waiting for 10ms after sending INIT.
514 20:46:28.768986 Waiting for 1st SIPI to complete...AP: slot 5 apic_id 1.
515 20:46:28.769072 done.
516 20:46:28.772200 AP: slot 6 apic_id 6.
517 20:46:28.775523 AP: slot 7 apic_id 7.
518 20:46:28.775606 AP: slot 1 apic_id 3.
519 20:46:28.778589 AP: slot 3 apic_id 2.
520 20:46:28.782613 Waiting for 2nd SIPI to complete...done.
521 20:46:28.785349 AP: slot 2 apic_id 4.
522 20:46:28.788756 AP: slot 4 apic_id 5.
523 20:46:28.795558 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 20:46:28.798961 Processing 13 relocs. Offset value of 0x00038000
525 20:46:28.805315 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 20:46:28.811637 Installing SMM handler to 0x9a000000
527 20:46:28.818453 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 20:46:28.821890 Processing 658 relocs. Offset value of 0x9a010000
529 20:46:28.831877 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 20:46:28.835015 Processing 13 relocs. Offset value of 0x9a008000
531 20:46:28.841665 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 20:46:28.848092 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 20:46:28.854954 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 20:46:28.858243 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 20:46:28.864792 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 20:46:28.871617 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 20:46:28.874889 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 20:46:28.881630 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 20:46:28.884761 Clearing SMI status registers
540 20:46:28.888734 SMI_STS: PM1
541 20:46:28.888818 PM1_STS: PWRBTN
542 20:46:28.891839 TCO_STS: SECOND_TO
543 20:46:28.894733 New SMBASE 0x9a000000
544 20:46:28.897993 In relocation handler: CPU 0
545 20:46:28.901814 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 20:46:28.905013 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 20:46:28.908453 Relocation complete.
548 20:46:28.911182 New SMBASE 0x99ffec00
549 20:46:28.911265 In relocation handler: CPU 5
550 20:46:28.918341 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
551 20:46:28.921626 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 20:46:28.924982 Relocation complete.
553 20:46:28.928235 New SMBASE 0x99fff000
554 20:46:28.928359 In relocation handler: CPU 4
555 20:46:28.934483 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
556 20:46:28.937816 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 20:46:28.941353 Relocation complete.
558 20:46:28.941436 New SMBASE 0x99fff800
559 20:46:28.944906 In relocation handler: CPU 2
560 20:46:28.951321 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
561 20:46:28.954436 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 20:46:28.957742 Relocation complete.
563 20:46:28.957825 New SMBASE 0x99fffc00
564 20:46:28.961686 In relocation handler: CPU 1
565 20:46:28.964592 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
566 20:46:28.971405 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 20:46:28.974343 Relocation complete.
568 20:46:28.974426 New SMBASE 0x99fff400
569 20:46:28.977628 In relocation handler: CPU 3
570 20:46:28.981018 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
571 20:46:28.987813 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 20:46:28.991067 Relocation complete.
573 20:46:28.991151 New SMBASE 0x99ffe400
574 20:46:28.994651 In relocation handler: CPU 7
575 20:46:28.997700 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
576 20:46:29.004330 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 20:46:29.004416 Relocation complete.
578 20:46:29.007808 New SMBASE 0x99ffe800
579 20:46:29.010939 In relocation handler: CPU 6
580 20:46:29.014623 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
581 20:46:29.021391 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 20:46:29.021475 Relocation complete.
583 20:46:29.024147 Initializing CPU #0
584 20:46:29.027575 CPU: vendor Intel device 806ec
585 20:46:29.030838 CPU: family 06, model 8e, stepping 0c
586 20:46:29.034772 Clearing out pending MCEs
587 20:46:29.037483 Setting up local APIC...
588 20:46:29.037566 apic_id: 0x00 done.
589 20:46:29.041101 Turbo is available but hidden
590 20:46:29.044333 Turbo is available and visible
591 20:46:29.047797 VMX status: enabled
592 20:46:29.051317 IA32_FEATURE_CONTROL status: locked
593 20:46:29.054030 Skip microcode update
594 20:46:29.054113 CPU #0 initialized
595 20:46:29.057473 Initializing CPU #5
596 20:46:29.057556 Initializing CPU #1
597 20:46:29.060805 Initializing CPU #3
598 20:46:29.064262 CPU: vendor Intel device 806ec
599 20:46:29.067547 CPU: family 06, model 8e, stepping 0c
600 20:46:29.071118 CPU: vendor Intel device 806ec
601 20:46:29.074542 CPU: family 06, model 8e, stepping 0c
602 20:46:29.077861 Clearing out pending MCEs
603 20:46:29.081007 Clearing out pending MCEs
604 20:46:29.083985 Setting up local APIC...
605 20:46:29.084069 Initializing CPU #6
606 20:46:29.087425 CPU: vendor Intel device 806ec
607 20:46:29.090897 CPU: family 06, model 8e, stepping 0c
608 20:46:29.094038 Clearing out pending MCEs
609 20:46:29.097385 Initializing CPU #2
610 20:46:29.097469 Initializing CPU #4
611 20:46:29.100657 CPU: vendor Intel device 806ec
612 20:46:29.103636 CPU: family 06, model 8e, stepping 0c
613 20:46:29.107070 Setting up local APIC...
614 20:46:29.110646 Clearing out pending MCEs
615 20:46:29.113555 CPU: vendor Intel device 806ec
616 20:46:29.117339 CPU: family 06, model 8e, stepping 0c
617 20:46:29.120489 Clearing out pending MCEs
618 20:46:29.123602 apic_id: 0x01 done.
619 20:46:29.123714 Setting up local APIC...
620 20:46:29.127298 Setting up local APIC...
621 20:46:29.130516 apic_id: 0x03 done.
622 20:46:29.130599 apic_id: 0x02 done.
623 20:46:29.133921 VMX status: enabled
624 20:46:29.137146 VMX status: enabled
625 20:46:29.140611 IA32_FEATURE_CONTROL status: locked
626 20:46:29.143868 IA32_FEATURE_CONTROL status: locked
627 20:46:29.143951 Skip microcode update
628 20:46:29.146650 Skip microcode update
629 20:46:29.150140 CPU #1 initialized
630 20:46:29.150225 CPU #3 initialized
631 20:46:29.153398 VMX status: enabled
632 20:46:29.156904 CPU: vendor Intel device 806ec
633 20:46:29.160243 CPU: family 06, model 8e, stepping 0c
634 20:46:29.163416 Initializing CPU #7
635 20:46:29.163500 Clearing out pending MCEs
636 20:46:29.166901 CPU: vendor Intel device 806ec
637 20:46:29.170137 CPU: family 06, model 8e, stepping 0c
638 20:46:29.173638 Setting up local APIC...
639 20:46:29.176944 apic_id: 0x04 done.
640 20:46:29.180618 Setting up local APIC...
641 20:46:29.180730 Clearing out pending MCEs
642 20:46:29.183777 apic_id: 0x06 done.
643 20:46:29.187112 Setting up local APIC...
644 20:46:29.190672 IA32_FEATURE_CONTROL status: locked
645 20:46:29.190761 VMX status: enabled
646 20:46:29.193878 apic_id: 0x05 done.
647 20:46:29.196714 IA32_FEATURE_CONTROL status: locked
648 20:46:29.200488 VMX status: enabled
649 20:46:29.203782 Skip microcode update
650 20:46:29.206937 IA32_FEATURE_CONTROL status: locked
651 20:46:29.207058 CPU #2 initialized
652 20:46:29.210720 Skip microcode update
653 20:46:29.213742 Skip microcode update
654 20:46:29.213865 CPU #5 initialized
655 20:46:29.217122 CPU #4 initialized
656 20:46:29.217260 apic_id: 0x07 done.
657 20:46:29.220553 VMX status: enabled
658 20:46:29.223398 VMX status: enabled
659 20:46:29.226420 IA32_FEATURE_CONTROL status: locked
660 20:46:29.230075 IA32_FEATURE_CONTROL status: locked
661 20:46:29.230159 Skip microcode update
662 20:46:29.233342 Skip microcode update
663 20:46:29.236591 CPU #6 initialized
664 20:46:29.236675 CPU #7 initialized
665 20:46:29.243300 bsp_do_flight_plan done after 456 msecs.
666 20:46:29.243411 CPU: frequency set to 4200 MHz
667 20:46:29.246622 Enabling SMIs.
668 20:46:29.246705 Locking SMM.
669 20:46:29.262396 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 20:46:29.265802 CBFS @ c08000 size 3f8000
671 20:46:29.272485 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 20:46:29.272605 CBFS: Locating 'vbt.bin'
673 20:46:29.276068 CBFS: Found @ offset 5f5c0 size 499
674 20:46:29.282695 Found a VBT of 4608 bytes after decompression
675 20:46:29.463957 Display FSP Version Info HOB
676 20:46:29.467483 Reference Code - CPU = 9.0.1e.30
677 20:46:29.470884 uCode Version = 0.0.0.ca
678 20:46:29.473884 TXT ACM version = ff.ff.ff.ffff
679 20:46:29.477329 Display FSP Version Info HOB
680 20:46:29.481053 Reference Code - ME = 9.0.1e.30
681 20:46:29.484038 MEBx version = 0.0.0.0
682 20:46:29.487637 ME Firmware Version = Consumer SKU
683 20:46:29.490721 Display FSP Version Info HOB
684 20:46:29.493859 Reference Code - CML PCH = 9.0.1e.30
685 20:46:29.497250 PCH-CRID Status = Disabled
686 20:46:29.500802 PCH-CRID Original Value = ff.ff.ff.ffff
687 20:46:29.504084 PCH-CRID New Value = ff.ff.ff.ffff
688 20:46:29.507371 OPROM - RST - RAID = ff.ff.ff.ffff
689 20:46:29.510552 ChipsetInit Base Version = ff.ff.ff.ffff
690 20:46:29.514272 ChipsetInit Oem Version = ff.ff.ff.ffff
691 20:46:29.517571 Display FSP Version Info HOB
692 20:46:29.523683 Reference Code - SA - System Agent = 9.0.1e.30
693 20:46:29.527070 Reference Code - MRC = 0.7.1.6c
694 20:46:29.527156 SA - PCIe Version = 9.0.1e.30
695 20:46:29.530895 SA-CRID Status = Disabled
696 20:46:29.534122 SA-CRID Original Value = 0.0.0.c
697 20:46:29.536920 SA-CRID New Value = 0.0.0.c
698 20:46:29.540662 OPROM - VBIOS = ff.ff.ff.ffff
699 20:46:29.543464 RTC Init
700 20:46:29.546990 Set power on after power failure.
701 20:46:29.547076 Disabling Deep S3
702 20:46:29.550443 Disabling Deep S3
703 20:46:29.550526 Disabling Deep S4
704 20:46:29.553716 Disabling Deep S4
705 20:46:29.553799 Disabling Deep S5
706 20:46:29.557009 Disabling Deep S5
707 20:46:29.563669 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
708 20:46:29.563754 Enumerating buses...
709 20:46:29.570114 Show all devs... Before device enumeration.
710 20:46:29.570201 Root Device: enabled 1
711 20:46:29.573739 CPU_CLUSTER: 0: enabled 1
712 20:46:29.576838 DOMAIN: 0000: enabled 1
713 20:46:29.580228 APIC: 00: enabled 1
714 20:46:29.580348 PCI: 00:00.0: enabled 1
715 20:46:29.583345 PCI: 00:02.0: enabled 1
716 20:46:29.586716 PCI: 00:04.0: enabled 0
717 20:46:29.589986 PCI: 00:05.0: enabled 0
718 20:46:29.590070 PCI: 00:12.0: enabled 1
719 20:46:29.593283 PCI: 00:12.5: enabled 0
720 20:46:29.596650 PCI: 00:12.6: enabled 0
721 20:46:29.599860 PCI: 00:14.0: enabled 1
722 20:46:29.599980 PCI: 00:14.1: enabled 0
723 20:46:29.603114 PCI: 00:14.3: enabled 1
724 20:46:29.606400 PCI: 00:14.5: enabled 0
725 20:46:29.606529 PCI: 00:15.0: enabled 1
726 20:46:29.610109 PCI: 00:15.1: enabled 1
727 20:46:29.613175 PCI: 00:15.2: enabled 0
728 20:46:29.616405 PCI: 00:15.3: enabled 0
729 20:46:29.616571 PCI: 00:16.0: enabled 1
730 20:46:29.619969 PCI: 00:16.1: enabled 0
731 20:46:29.623508 PCI: 00:16.2: enabled 0
732 20:46:29.626526 PCI: 00:16.3: enabled 0
733 20:46:29.626683 PCI: 00:16.4: enabled 0
734 20:46:29.629753 PCI: 00:16.5: enabled 0
735 20:46:29.633071 PCI: 00:17.0: enabled 1
736 20:46:29.636482 PCI: 00:19.0: enabled 1
737 20:46:29.636689 PCI: 00:19.1: enabled 0
738 20:46:29.639814 PCI: 00:19.2: enabled 0
739 20:46:29.643438 PCI: 00:1a.0: enabled 0
740 20:46:29.643686 PCI: 00:1c.0: enabled 0
741 20:46:29.646661 PCI: 00:1c.1: enabled 0
742 20:46:29.650023 PCI: 00:1c.2: enabled 0
743 20:46:29.653426 PCI: 00:1c.3: enabled 0
744 20:46:29.653733 PCI: 00:1c.4: enabled 0
745 20:46:29.656812 PCI: 00:1c.5: enabled 0
746 20:46:29.660107 PCI: 00:1c.6: enabled 0
747 20:46:29.663347 PCI: 00:1c.7: enabled 0
748 20:46:29.663654 PCI: 00:1d.0: enabled 1
749 20:46:29.666845 PCI: 00:1d.1: enabled 0
750 20:46:29.669545 PCI: 00:1d.2: enabled 0
751 20:46:29.673455 PCI: 00:1d.3: enabled 0
752 20:46:29.673796 PCI: 00:1d.4: enabled 0
753 20:46:29.676737 PCI: 00:1d.5: enabled 1
754 20:46:29.680122 PCI: 00:1e.0: enabled 1
755 20:46:29.680479 PCI: 00:1e.1: enabled 0
756 20:46:29.682931 PCI: 00:1e.2: enabled 1
757 20:46:29.686443 PCI: 00:1e.3: enabled 1
758 20:46:29.689852 PCI: 00:1f.0: enabled 1
759 20:46:29.690163 PCI: 00:1f.1: enabled 1
760 20:46:29.692870 PCI: 00:1f.2: enabled 1
761 20:46:29.696195 PCI: 00:1f.3: enabled 1
762 20:46:29.699766 PCI: 00:1f.4: enabled 1
763 20:46:29.700076 PCI: 00:1f.5: enabled 1
764 20:46:29.703058 PCI: 00:1f.6: enabled 0
765 20:46:29.706418 USB0 port 0: enabled 1
766 20:46:29.706726 I2C: 00:15: enabled 1
767 20:46:29.709629 I2C: 00:5d: enabled 1
768 20:46:29.713012 GENERIC: 0.0: enabled 1
769 20:46:29.716649 I2C: 00:1a: enabled 1
770 20:46:29.717008 I2C: 00:38: enabled 1
771 20:46:29.719635 I2C: 00:39: enabled 1
772 20:46:29.722779 I2C: 00:3a: enabled 1
773 20:46:29.723087 I2C: 00:3b: enabled 1
774 20:46:29.726257 PCI: 00:00.0: enabled 1
775 20:46:29.729639 SPI: 00: enabled 1
776 20:46:29.729947 SPI: 01: enabled 1
777 20:46:29.732655 PNP: 0c09.0: enabled 1
778 20:46:29.736193 USB2 port 0: enabled 1
779 20:46:29.736552 USB2 port 1: enabled 1
780 20:46:29.739128 USB2 port 2: enabled 0
781 20:46:29.742678 USB2 port 3: enabled 0
782 20:46:29.743010 USB2 port 5: enabled 0
783 20:46:29.746105 USB2 port 6: enabled 1
784 20:46:29.749390 USB2 port 9: enabled 1
785 20:46:29.752766 USB3 port 0: enabled 1
786 20:46:29.753085 USB3 port 1: enabled 1
787 20:46:29.756218 USB3 port 2: enabled 1
788 20:46:29.759725 USB3 port 3: enabled 1
789 20:46:29.760032 USB3 port 4: enabled 0
790 20:46:29.762364 APIC: 03: enabled 1
791 20:46:29.765639 APIC: 04: enabled 1
792 20:46:29.765957 APIC: 02: enabled 1
793 20:46:29.769049 APIC: 05: enabled 1
794 20:46:29.769370 APIC: 01: enabled 1
795 20:46:29.772495 APIC: 06: enabled 1
796 20:46:29.775705 APIC: 07: enabled 1
797 20:46:29.776041 Compare with tree...
798 20:46:29.779809 Root Device: enabled 1
799 20:46:29.782294 CPU_CLUSTER: 0: enabled 1
800 20:46:29.782625 APIC: 00: enabled 1
801 20:46:29.785667 APIC: 03: enabled 1
802 20:46:29.789176 APIC: 04: enabled 1
803 20:46:29.792254 APIC: 02: enabled 1
804 20:46:29.792628 APIC: 05: enabled 1
805 20:46:29.795661 APIC: 01: enabled 1
806 20:46:29.798973 APIC: 06: enabled 1
807 20:46:29.799355 APIC: 07: enabled 1
808 20:46:29.802461 DOMAIN: 0000: enabled 1
809 20:46:29.805864 PCI: 00:00.0: enabled 1
810 20:46:29.809203 PCI: 00:02.0: enabled 1
811 20:46:29.809628 PCI: 00:04.0: enabled 0
812 20:46:29.812094 PCI: 00:05.0: enabled 0
813 20:46:29.815412 PCI: 00:12.0: enabled 1
814 20:46:29.818880 PCI: 00:12.5: enabled 0
815 20:46:29.822157 PCI: 00:12.6: enabled 0
816 20:46:29.822457 PCI: 00:14.0: enabled 1
817 20:46:29.825268 USB0 port 0: enabled 1
818 20:46:29.828647 USB2 port 0: enabled 1
819 20:46:29.832125 USB2 port 1: enabled 1
820 20:46:29.835572 USB2 port 2: enabled 0
821 20:46:29.835874 USB2 port 3: enabled 0
822 20:46:29.838945 USB2 port 5: enabled 0
823 20:46:29.841636 USB2 port 6: enabled 1
824 20:46:29.845757 USB2 port 9: enabled 1
825 20:46:29.848445 USB3 port 0: enabled 1
826 20:46:29.851761 USB3 port 1: enabled 1
827 20:46:29.852130 USB3 port 2: enabled 1
828 20:46:29.855630 USB3 port 3: enabled 1
829 20:46:29.858952 USB3 port 4: enabled 0
830 20:46:29.861929 PCI: 00:14.1: enabled 0
831 20:46:29.864986 PCI: 00:14.3: enabled 1
832 20:46:29.865317 PCI: 00:14.5: enabled 0
833 20:46:29.868204 PCI: 00:15.0: enabled 1
834 20:46:29.871649 I2C: 00:15: enabled 1
835 20:46:29.874924 PCI: 00:15.1: enabled 1
836 20:46:29.878047 I2C: 00:5d: enabled 1
837 20:46:29.878431 GENERIC: 0.0: enabled 1
838 20:46:29.881460 PCI: 00:15.2: enabled 0
839 20:46:29.885157 PCI: 00:15.3: enabled 0
840 20:46:29.888493 PCI: 00:16.0: enabled 1
841 20:46:29.891677 PCI: 00:16.1: enabled 0
842 20:46:29.891981 PCI: 00:16.2: enabled 0
843 20:46:29.894661 PCI: 00:16.3: enabled 0
844 20:46:29.898239 PCI: 00:16.4: enabled 0
845 20:46:29.901493 PCI: 00:16.5: enabled 0
846 20:46:29.904925 PCI: 00:17.0: enabled 1
847 20:46:29.905372 PCI: 00:19.0: enabled 1
848 20:46:29.908218 I2C: 00:1a: enabled 1
849 20:46:29.911735 I2C: 00:38: enabled 1
850 20:46:29.914525 I2C: 00:39: enabled 1
851 20:46:29.914830 I2C: 00:3a: enabled 1
852 20:46:29.918020 I2C: 00:3b: enabled 1
853 20:46:29.921406 PCI: 00:19.1: enabled 0
854 20:46:29.924670 PCI: 00:19.2: enabled 0
855 20:46:29.928094 PCI: 00:1a.0: enabled 0
856 20:46:29.928469 PCI: 00:1c.0: enabled 0
857 20:46:29.931203 PCI: 00:1c.1: enabled 0
858 20:46:29.934605 PCI: 00:1c.2: enabled 0
859 20:46:29.937961 PCI: 00:1c.3: enabled 0
860 20:46:29.941614 PCI: 00:1c.4: enabled 0
861 20:46:29.942001 PCI: 00:1c.5: enabled 0
862 20:46:29.944719 PCI: 00:1c.6: enabled 0
863 20:46:29.948031 PCI: 00:1c.7: enabled 0
864 20:46:29.951269 PCI: 00:1d.0: enabled 1
865 20:46:29.954671 PCI: 00:1d.1: enabled 0
866 20:46:29.955102 PCI: 00:1d.2: enabled 0
867 20:46:29.958032 PCI: 00:1d.3: enabled 0
868 20:46:29.960586 PCI: 00:1d.4: enabled 0
869 20:46:29.964160 PCI: 00:1d.5: enabled 1
870 20:46:29.967651 PCI: 00:00.0: enabled 1
871 20:46:29.968082 PCI: 00:1e.0: enabled 1
872 20:46:29.971050 PCI: 00:1e.1: enabled 0
873 20:46:29.973937 PCI: 00:1e.2: enabled 1
874 20:46:29.977631 SPI: 00: enabled 1
875 20:46:29.978038 PCI: 00:1e.3: enabled 1
876 20:46:29.980726 SPI: 01: enabled 1
877 20:46:29.984363 PCI: 00:1f.0: enabled 1
878 20:46:29.987941 PNP: 0c09.0: enabled 1
879 20:46:29.988397 PCI: 00:1f.1: enabled 1
880 20:46:29.990793 PCI: 00:1f.2: enabled 1
881 20:46:29.994469 PCI: 00:1f.3: enabled 1
882 20:46:29.997446 PCI: 00:1f.4: enabled 1
883 20:46:30.000642 PCI: 00:1f.5: enabled 1
884 20:46:30.000947 PCI: 00:1f.6: enabled 0
885 20:46:30.003875 Root Device scanning...
886 20:46:30.007480 scan_static_bus for Root Device
887 20:46:30.011079 CPU_CLUSTER: 0 enabled
888 20:46:30.014260 DOMAIN: 0000 enabled
889 20:46:30.014553 DOMAIN: 0000 scanning...
890 20:46:30.017162 PCI: pci_scan_bus for bus 00
891 20:46:30.020808 PCI: 00:00.0 [8086/0000] ops
892 20:46:30.023791 PCI: 00:00.0 [8086/9b61] enabled
893 20:46:30.027179 PCI: 00:02.0 [8086/0000] bus ops
894 20:46:30.030618 PCI: 00:02.0 [8086/9b41] enabled
895 20:46:30.033889 PCI: 00:04.0 [8086/1903] disabled
896 20:46:30.037001 PCI: 00:08.0 [8086/1911] enabled
897 20:46:30.040858 PCI: 00:12.0 [8086/02f9] enabled
898 20:46:30.044225 PCI: 00:14.0 [8086/0000] bus ops
899 20:46:30.047071 PCI: 00:14.0 [8086/02ed] enabled
900 20:46:30.050504 PCI: 00:14.2 [8086/02ef] enabled
901 20:46:30.053783 PCI: 00:14.3 [8086/02f0] enabled
902 20:46:30.057068 PCI: 00:15.0 [8086/0000] bus ops
903 20:46:30.060336 PCI: 00:15.0 [8086/02e8] enabled
904 20:46:30.063625 PCI: 00:15.1 [8086/0000] bus ops
905 20:46:30.067050 PCI: 00:15.1 [8086/02e9] enabled
906 20:46:30.070447 PCI: 00:16.0 [8086/0000] ops
907 20:46:30.073697 PCI: 00:16.0 [8086/02e0] enabled
908 20:46:30.077104 PCI: 00:17.0 [8086/0000] ops
909 20:46:30.080882 PCI: 00:17.0 [8086/02d3] enabled
910 20:46:30.083896 PCI: 00:19.0 [8086/0000] bus ops
911 20:46:30.087212 PCI: 00:19.0 [8086/02c5] enabled
912 20:46:30.090615 PCI: 00:1d.0 [8086/0000] bus ops
913 20:46:30.094134 PCI: 00:1d.0 [8086/02b0] enabled
914 20:46:30.100591 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 20:46:30.104020 PCI: 00:1e.0 [8086/0000] ops
916 20:46:30.106791 PCI: 00:1e.0 [8086/02a8] enabled
917 20:46:30.110130 PCI: 00:1e.2 [8086/0000] bus ops
918 20:46:30.113523 PCI: 00:1e.2 [8086/02aa] enabled
919 20:46:30.116596 PCI: 00:1e.3 [8086/0000] bus ops
920 20:46:30.120342 PCI: 00:1e.3 [8086/02ab] enabled
921 20:46:30.123320 PCI: 00:1f.0 [8086/0000] bus ops
922 20:46:30.127155 PCI: 00:1f.0 [8086/0284] enabled
923 20:46:30.130403 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 20:46:30.136587 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 20:46:30.139736 PCI: 00:1f.3 [8086/0000] bus ops
926 20:46:30.143344 PCI: 00:1f.3 [8086/02c8] enabled
927 20:46:30.146904 PCI: 00:1f.4 [8086/0000] bus ops
928 20:46:30.150246 PCI: 00:1f.4 [8086/02a3] enabled
929 20:46:30.153610 PCI: 00:1f.5 [8086/0000] bus ops
930 20:46:30.156859 PCI: 00:1f.5 [8086/02a4] enabled
931 20:46:30.160134 PCI: Leftover static devices:
932 20:46:30.160614 PCI: 00:05.0
933 20:46:30.163059 PCI: 00:12.5
934 20:46:30.163381 PCI: 00:12.6
935 20:46:30.166493 PCI: 00:14.1
936 20:46:30.166578 PCI: 00:14.5
937 20:46:30.166646 PCI: 00:15.2
938 20:46:30.169924 PCI: 00:15.3
939 20:46:30.170012 PCI: 00:16.1
940 20:46:30.173069 PCI: 00:16.2
941 20:46:30.173162 PCI: 00:16.3
942 20:46:30.173232 PCI: 00:16.4
943 20:46:30.176608 PCI: 00:16.5
944 20:46:30.176691 PCI: 00:19.1
945 20:46:30.179839 PCI: 00:19.2
946 20:46:30.179918 PCI: 00:1a.0
947 20:46:30.182736 PCI: 00:1c.0
948 20:46:30.182848 PCI: 00:1c.1
949 20:46:30.182941 PCI: 00:1c.2
950 20:46:30.186090 PCI: 00:1c.3
951 20:46:30.186181 PCI: 00:1c.4
952 20:46:30.189273 PCI: 00:1c.5
953 20:46:30.189351 PCI: 00:1c.6
954 20:46:30.189416 PCI: 00:1c.7
955 20:46:30.192686 PCI: 00:1d.1
956 20:46:30.192794 PCI: 00:1d.2
957 20:46:30.196231 PCI: 00:1d.3
958 20:46:30.196340 PCI: 00:1d.4
959 20:46:30.196408 PCI: 00:1d.5
960 20:46:30.199407 PCI: 00:1e.1
961 20:46:30.199485 PCI: 00:1f.1
962 20:46:30.202823 PCI: 00:1f.2
963 20:46:30.202907 PCI: 00:1f.6
964 20:46:30.206070 PCI: Check your devicetree.cb.
965 20:46:30.209611 PCI: 00:02.0 scanning...
966 20:46:30.212945 scan_generic_bus for PCI: 00:02.0
967 20:46:30.216128 scan_generic_bus for PCI: 00:02.0 done
968 20:46:30.222962 scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
969 20:46:30.226402 PCI: 00:14.0 scanning...
970 20:46:30.229460 scan_static_bus for PCI: 00:14.0
971 20:46:30.229625 USB0 port 0 enabled
972 20:46:30.232788 USB0 port 0 scanning...
973 20:46:30.236141 scan_static_bus for USB0 port 0
974 20:46:30.239685 USB2 port 0 enabled
975 20:46:30.239896 USB2 port 1 enabled
976 20:46:30.242891 USB2 port 2 disabled
977 20:46:30.246208 USB2 port 3 disabled
978 20:46:30.246511 USB2 port 5 disabled
979 20:46:30.249644 USB2 port 6 enabled
980 20:46:30.250011 USB2 port 9 enabled
981 20:46:30.252840 USB3 port 0 enabled
982 20:46:30.256179 USB3 port 1 enabled
983 20:46:30.256758 USB3 port 2 enabled
984 20:46:30.259313 USB3 port 3 enabled
985 20:46:30.263208 USB3 port 4 disabled
986 20:46:30.263841 USB2 port 0 scanning...
987 20:46:30.266291 scan_static_bus for USB2 port 0
988 20:46:30.272548 scan_static_bus for USB2 port 0 done
989 20:46:30.276039 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
990 20:46:30.279651 USB2 port 1 scanning...
991 20:46:30.282536 scan_static_bus for USB2 port 1
992 20:46:30.285992 scan_static_bus for USB2 port 1 done
993 20:46:30.292319 scan_bus: scanning of bus USB2 port 1 took 9699 usecs
994 20:46:30.292760 USB2 port 6 scanning...
995 20:46:30.296374 scan_static_bus for USB2 port 6
996 20:46:30.302792 scan_static_bus for USB2 port 6 done
997 20:46:30.305778 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
998 20:46:30.309516 USB2 port 9 scanning...
999 20:46:30.312394 scan_static_bus for USB2 port 9
1000 20:46:30.315507 scan_static_bus for USB2 port 9 done
1001 20:46:30.322230 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
1002 20:46:30.322770 USB3 port 0 scanning...
1003 20:46:30.326167 scan_static_bus for USB3 port 0
1004 20:46:30.332277 scan_static_bus for USB3 port 0 done
1005 20:46:30.335824 scan_bus: scanning of bus USB3 port 0 took 9698 usecs
1006 20:46:30.339270 USB3 port 1 scanning...
1007 20:46:30.342360 scan_static_bus for USB3 port 1
1008 20:46:30.345766 scan_static_bus for USB3 port 1 done
1009 20:46:30.352645 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
1010 20:46:30.353180 USB3 port 2 scanning...
1011 20:46:30.356251 scan_static_bus for USB3 port 2
1012 20:46:30.362591 scan_static_bus for USB3 port 2 done
1013 20:46:30.365596 scan_bus: scanning of bus USB3 port 2 took 9697 usecs
1014 20:46:30.369392 USB3 port 3 scanning...
1015 20:46:30.372140 scan_static_bus for USB3 port 3
1016 20:46:30.375826 scan_static_bus for USB3 port 3 done
1017 20:46:30.382817 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
1018 20:46:30.385422 scan_static_bus for USB0 port 0 done
1019 20:46:30.392483 scan_bus: scanning of bus USB0 port 0 took 155354 usecs
1020 20:46:30.395623 scan_static_bus for PCI: 00:14.0 done
1021 20:46:30.398987 scan_bus: scanning of bus PCI: 00:14.0 took 172973 usecs
1022 20:46:30.402335 PCI: 00:15.0 scanning...
1023 20:46:30.405609 scan_generic_bus for PCI: 00:15.0
1024 20:46:30.408800 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 20:46:30.415502 scan_generic_bus for PCI: 00:15.0 done
1026 20:46:30.418477 scan_bus: scanning of bus PCI: 00:15.0 took 14288 usecs
1027 20:46:30.422030 PCI: 00:15.1 scanning...
1028 20:46:30.425632 scan_generic_bus for PCI: 00:15.1
1029 20:46:30.428643 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 20:46:30.435520 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 20:46:30.438936 scan_generic_bus for PCI: 00:15.1 done
1032 20:46:30.445427 scan_bus: scanning of bus PCI: 00:15.1 took 18610 usecs
1033 20:46:30.446008 PCI: 00:19.0 scanning...
1034 20:46:30.448748 scan_generic_bus for PCI: 00:19.0
1035 20:46:30.454959 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 20:46:30.458544 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 20:46:30.462006 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 20:46:30.465379 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 20:46:30.471889 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 20:46:30.475195 scan_generic_bus for PCI: 00:19.0 done
1041 20:46:30.481650 scan_bus: scanning of bus PCI: 00:19.0 took 30727 usecs
1042 20:46:30.482072 PCI: 00:1d.0 scanning...
1043 20:46:30.485288 do_pci_scan_bridge for PCI: 00:1d.0
1044 20:46:30.488537 PCI: pci_scan_bus for bus 01
1045 20:46:30.491816 PCI: 01:00.0 [1c5c/1327] enabled
1046 20:46:30.494831 Enabling Common Clock Configuration
1047 20:46:30.502016 L1 Sub-State supported from root port 29
1048 20:46:30.505554 L1 Sub-State Support = 0xf
1049 20:46:30.506143 CommonModeRestoreTime = 0x28
1050 20:46:30.511751 Power On Value = 0x16, Power On Scale = 0x0
1051 20:46:30.512625 ASPM: Enabled L1
1052 20:46:30.518730 scan_bus: scanning of bus PCI: 00:1d.0 took 32794 usecs
1053 20:46:30.522296 PCI: 00:1e.2 scanning...
1054 20:46:30.525195 scan_generic_bus for PCI: 00:1e.2
1055 20:46:30.528639 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 20:46:30.531567 scan_generic_bus for PCI: 00:1e.2 done
1057 20:46:30.538422 scan_bus: scanning of bus PCI: 00:1e.2 took 14019 usecs
1058 20:46:30.541511 PCI: 00:1e.3 scanning...
1059 20:46:30.544751 scan_generic_bus for PCI: 00:1e.3
1060 20:46:30.548442 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 20:46:30.551725 scan_generic_bus for PCI: 00:1e.3 done
1062 20:46:30.558083 scan_bus: scanning of bus PCI: 00:1e.3 took 13999 usecs
1063 20:46:30.558640 PCI: 00:1f.0 scanning...
1064 20:46:30.561635 scan_static_bus for PCI: 00:1f.0
1065 20:46:30.564761 PNP: 0c09.0 enabled
1066 20:46:30.568165 scan_static_bus for PCI: 00:1f.0 done
1067 20:46:30.574749 scan_bus: scanning of bus PCI: 00:1f.0 took 12049 usecs
1068 20:46:30.578139 PCI: 00:1f.3 scanning...
1069 20:46:30.581747 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1070 20:46:30.585008 PCI: 00:1f.4 scanning...
1071 20:46:30.588336 scan_generic_bus for PCI: 00:1f.4
1072 20:46:30.591378 scan_generic_bus for PCI: 00:1f.4 done
1073 20:46:30.598240 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1074 20:46:30.601440 PCI: 00:1f.5 scanning...
1075 20:46:30.604677 scan_generic_bus for PCI: 00:1f.5
1076 20:46:30.608018 scan_generic_bus for PCI: 00:1f.5 done
1077 20:46:30.614665 scan_bus: scanning of bus PCI: 00:1f.5 took 10179 usecs
1078 20:46:30.621861 scan_bus: scanning of bus DOMAIN: 0000 took 605060 usecs
1079 20:46:30.625283 scan_static_bus for Root Device done
1080 20:46:30.627754 scan_bus: scanning of bus Root Device took 624938 usecs
1081 20:46:30.631313 done
1082 20:46:30.631751 Chrome EC: UHEPI supported
1083 20:46:30.638094 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 20:46:30.645108 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 20:46:30.651767 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 20:46:30.658506 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 20:46:30.661688 SPI flash protection: WPSW=0 SRP0=0
1088 20:46:30.664800 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 20:46:30.671555 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1090 20:46:30.675411 found VGA at PCI: 00:02.0
1091 20:46:30.678612 Setting up VGA for PCI: 00:02.0
1092 20:46:30.681578 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 20:46:30.688075 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 20:46:30.691276 Allocating resources...
1095 20:46:30.691697 Reading resources...
1096 20:46:30.698285 Root Device read_resources bus 0 link: 0
1097 20:46:30.701687 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 20:46:30.708453 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 20:46:30.711178 DOMAIN: 0000 read_resources bus 0 link: 0
1100 20:46:30.718197 PCI: 00:14.0 read_resources bus 0 link: 0
1101 20:46:30.721554 USB0 port 0 read_resources bus 0 link: 0
1102 20:46:30.729326 USB0 port 0 read_resources bus 0 link: 0 done
1103 20:46:30.732770 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 20:46:30.739598 PCI: 00:15.0 read_resources bus 1 link: 0
1105 20:46:30.743056 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 20:46:30.750048 PCI: 00:15.1 read_resources bus 2 link: 0
1107 20:46:30.753194 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 20:46:30.760456 PCI: 00:19.0 read_resources bus 3 link: 0
1109 20:46:30.767310 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 20:46:30.770874 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 20:46:30.777378 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 20:46:30.780711 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 20:46:30.786907 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 20:46:30.790213 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 20:46:30.796931 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 20:46:30.800852 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 20:46:30.807253 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 20:46:30.813864 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 20:46:30.817432 Root Device read_resources bus 0 link: 0 done
1120 20:46:30.820279 Done reading resources.
1121 20:46:30.824256 Show resources in subtree (Root Device)...After reading.
1122 20:46:30.830065 Root Device child on link 0 CPU_CLUSTER: 0
1123 20:46:30.833869 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 20:46:30.834172 APIC: 00
1125 20:46:30.836819 APIC: 03
1126 20:46:30.837121 APIC: 04
1127 20:46:30.840386 APIC: 02
1128 20:46:30.840740 APIC: 05
1129 20:46:30.841106 APIC: 01
1130 20:46:30.843202 APIC: 06
1131 20:46:30.843506 APIC: 07
1132 20:46:30.846890 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 20:46:30.856887 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 20:46:30.909895 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 20:46:30.910560 PCI: 00:00.0
1136 20:46:30.911220 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 20:46:30.912434 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 20:46:30.912919 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 20:46:30.913222 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 20:46:30.934447 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 20:46:30.935109 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 20:46:30.935511 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 20:46:30.945060 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 20:46:30.951541 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 20:46:30.961529 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 20:46:30.971191 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 20:46:30.981705 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 20:46:30.990993 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 20:46:31.000870 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 20:46:31.010561 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 20:46:31.017460 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 20:46:31.020656 PCI: 00:02.0
1153 20:46:31.030444 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 20:46:31.040433 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 20:46:31.050333 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 20:46:31.050422 PCI: 00:04.0
1157 20:46:31.053772 PCI: 00:08.0
1158 20:46:31.063829 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 20:46:31.063944 PCI: 00:12.0
1160 20:46:31.073919 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 20:46:31.077201 PCI: 00:14.0 child on link 0 USB0 port 0
1162 20:46:31.087275 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 20:46:31.093985 USB0 port 0 child on link 0 USB2 port 0
1164 20:46:31.094087 USB2 port 0
1165 20:46:31.097185 USB2 port 1
1166 20:46:31.097268 USB2 port 2
1167 20:46:31.100589 USB2 port 3
1168 20:46:31.100674 USB2 port 5
1169 20:46:31.103569 USB2 port 6
1170 20:46:31.103652 USB2 port 9
1171 20:46:31.107108 USB3 port 0
1172 20:46:31.107190 USB3 port 1
1173 20:46:31.110059 USB3 port 2
1174 20:46:31.113682 USB3 port 3
1175 20:46:31.113765 USB3 port 4
1176 20:46:31.116654 PCI: 00:14.2
1177 20:46:31.126778 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 20:46:31.137068 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 20:46:31.137203 PCI: 00:14.3
1180 20:46:31.146867 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 20:46:31.150105 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 20:46:31.160232 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 20:46:31.163612 I2C: 01:15
1184 20:46:31.166241 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 20:46:31.176483 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 20:46:31.179436 I2C: 02:5d
1187 20:46:31.179533 GENERIC: 0.0
1188 20:46:31.183271 PCI: 00:16.0
1189 20:46:31.192745 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 20:46:31.192832 PCI: 00:17.0
1191 20:46:31.202906 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 20:46:31.213347 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 20:46:31.219205 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 20:46:31.229151 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 20:46:31.235913 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 20:46:31.245787 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 20:46:31.248963 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 20:46:31.258874 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 20:46:31.262510 I2C: 03:1a
1200 20:46:31.262592 I2C: 03:38
1201 20:46:31.265935 I2C: 03:39
1202 20:46:31.266034 I2C: 03:3a
1203 20:46:31.266130 I2C: 03:3b
1204 20:46:31.272747 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 20:46:31.278682 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 20:46:31.288728 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 20:46:31.298652 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 20:46:31.302306 PCI: 01:00.0
1209 20:46:31.312339 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 20:46:31.312450 PCI: 00:1e.0
1211 20:46:31.325179 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 20:46:31.335326 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 20:46:31.338643 PCI: 00:1e.2 child on link 0 SPI: 00
1214 20:46:31.348296 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 20:46:31.348418 SPI: 00
1216 20:46:31.351772 PCI: 00:1e.3 child on link 0 SPI: 01
1217 20:46:31.361857 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 20:46:31.365463 SPI: 01
1219 20:46:31.368656 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 20:46:31.378417 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 20:46:31.384769 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 20:46:31.388223 PNP: 0c09.0
1223 20:46:31.394582 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 20:46:31.397907 PCI: 00:1f.3
1225 20:46:31.407993 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 20:46:31.418046 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 20:46:31.421505 PCI: 00:1f.4
1228 20:46:31.427562 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 20:46:31.438274 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 20:46:31.440923 PCI: 00:1f.5
1231 20:46:31.451241 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 20:46:31.454049 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 20:46:31.460584 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 20:46:31.467627 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 20:46:31.470944 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 20:46:31.477736 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 20:46:31.480592 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 20:46:31.483935 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 20:46:31.490860 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 20:46:31.497004 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 20:46:31.503675 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 20:46:31.513396 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 20:46:31.520659 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 20:46:31.523508 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 20:46:31.529968 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 20:46:31.536817 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 20:46:31.540029 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 20:46:31.547154 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 20:46:31.550490 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 20:46:31.556831 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 20:46:31.559741 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 20:46:31.566676 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 20:46:31.570093 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 20:46:31.576957 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 20:46:31.579577 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 20:46:31.586444 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 20:46:31.589936 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 20:46:31.593025 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 20:46:31.599467 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 20:46:31.602722 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 20:46:31.609564 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 20:46:31.612999 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 20:46:31.619352 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 20:46:31.622771 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 20:46:31.629517 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 20:46:31.632626 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 20:46:31.639288 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 20:46:31.642622 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 20:46:31.652935 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 20:46:31.655487 avoid_fixed_resources: DOMAIN: 0000
1271 20:46:31.662348 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 20:46:31.665530 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 20:46:31.675667 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 20:46:31.682164 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 20:46:31.689215 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 20:46:31.698535 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 20:46:31.705404 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 20:46:31.712091 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 20:46:31.722035 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 20:46:31.728165 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 20:46:31.735625 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 20:46:31.742009 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 20:46:31.745104 Setting resources...
1284 20:46:31.751948 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 20:46:31.755584 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 20:46:31.758787 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 20:46:31.762053 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 20:46:31.768743 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 20:46:31.775001 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 20:46:31.778567 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 20:46:31.784841 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 20:46:31.795155 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 20:46:31.798103 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 20:46:31.804859 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 20:46:31.808221 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 20:46:31.814750 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 20:46:31.817867 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 20:46:31.824811 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 20:46:31.828095 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 20:46:31.834601 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 20:46:31.838013 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 20:46:31.841484 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 20:46:31.847959 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 20:46:31.851252 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 20:46:31.857581 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 20:46:31.861021 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 20:46:31.867754 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 20:46:31.871214 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 20:46:31.877314 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 20:46:31.880837 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 20:46:31.887770 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 20:46:31.890462 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 20:46:31.897373 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 20:46:31.900661 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 20:46:31.907295 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 20:46:31.913727 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 20:46:31.920181 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 20:46:31.926955 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 20:46:31.937064 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 20:46:31.940719 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 20:46:31.947157 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 20:46:31.953789 Root Device assign_resources, bus 0 link: 0
1323 20:46:31.956857 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 20:46:31.966608 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 20:46:31.973108 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 20:46:31.980172 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 20:46:31.989997 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 20:46:31.996940 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 20:46:32.006570 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 20:46:32.010016 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 20:46:32.016947 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 20:46:32.023226 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 20:46:32.033027 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 20:46:32.039805 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 20:46:32.050021 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 20:46:32.053403 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 20:46:32.056627 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 20:46:32.066767 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 20:46:32.069518 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 20:46:32.076094 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 20:46:32.082761 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 20:46:32.093089 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 20:46:32.099982 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 20:46:32.106152 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 20:46:32.116516 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 20:46:32.122861 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 20:46:32.129752 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 20:46:32.139500 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 20:46:32.143098 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 20:46:32.149094 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 20:46:32.155918 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 20:46:32.166223 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 20:46:32.172643 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 20:46:32.179408 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 20:46:32.185917 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 20:46:32.192433 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 20:46:32.199229 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 20:46:32.209028 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 20:46:32.212711 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 20:46:32.215474 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 20:46:32.226031 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 20:46:32.229271 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 20:46:32.235954 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 20:46:32.238988 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 20:46:32.245738 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 20:46:32.248941 LPC: Trying to open IO window from 800 size 1ff
1367 20:46:32.259072 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 20:46:32.265401 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 20:46:32.275178 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 20:46:32.282193 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 20:46:32.285714 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 20:46:32.292506 Root Device assign_resources, bus 0 link: 0
1373 20:46:32.295877 Done setting resources.
1374 20:46:32.302206 Show resources in subtree (Root Device)...After assigning values.
1375 20:46:32.305453 Root Device child on link 0 CPU_CLUSTER: 0
1376 20:46:32.308362 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 20:46:32.308444 APIC: 00
1378 20:46:32.311648 APIC: 03
1379 20:46:32.311729 APIC: 04
1380 20:46:32.315660 APIC: 02
1381 20:46:32.315766 APIC: 05
1382 20:46:32.315832 APIC: 01
1383 20:46:32.318566 APIC: 06
1384 20:46:32.318647 APIC: 07
1385 20:46:32.322126 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 20:46:32.331984 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 20:46:32.345115 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 20:46:32.345204 PCI: 00:00.0
1389 20:46:32.354956 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 20:46:32.364584 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 20:46:32.374531 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 20:46:32.384481 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 20:46:32.391115 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 20:46:32.401415 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 20:46:32.411222 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 20:46:32.420676 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 20:46:32.431122 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 20:46:32.437533 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 20:46:32.447366 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 20:46:32.457726 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 20:46:32.467055 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 20:46:32.476899 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 20:46:32.487126 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 20:46:32.496779 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 20:46:32.496921 PCI: 00:02.0
1406 20:46:32.506707 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 20:46:32.520473 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 20:46:32.527037 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 20:46:32.530451 PCI: 00:04.0
1410 20:46:32.530556 PCI: 00:08.0
1411 20:46:32.540343 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 20:46:32.543046 PCI: 00:12.0
1413 20:46:32.553500 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 20:46:32.556731 PCI: 00:14.0 child on link 0 USB0 port 0
1415 20:46:32.569749 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 20:46:32.573110 USB0 port 0 child on link 0 USB2 port 0
1417 20:46:32.573220 USB2 port 0
1418 20:46:32.576274 USB2 port 1
1419 20:46:32.576386 USB2 port 2
1420 20:46:32.579742 USB2 port 3
1421 20:46:32.583315 USB2 port 5
1422 20:46:32.583408 USB2 port 6
1423 20:46:32.586317 USB2 port 9
1424 20:46:32.586402 USB3 port 0
1425 20:46:32.589574 USB3 port 1
1426 20:46:32.589659 USB3 port 2
1427 20:46:32.593306 USB3 port 3
1428 20:46:32.593391 USB3 port 4
1429 20:46:32.596264 PCI: 00:14.2
1430 20:46:32.606365 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 20:46:32.616196 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 20:46:32.616293 PCI: 00:14.3
1433 20:46:32.628984 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 20:46:32.632276 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 20:46:32.642399 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 20:46:32.642489 I2C: 01:15
1437 20:46:32.649138 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 20:46:32.658867 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 20:46:32.658977 I2C: 02:5d
1440 20:46:32.662372 GENERIC: 0.0
1441 20:46:32.662466 PCI: 00:16.0
1442 20:46:32.675508 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 20:46:32.675644 PCI: 00:17.0
1444 20:46:32.685727 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 20:46:32.695773 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 20:46:32.705662 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 20:46:32.715046 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 20:46:32.721943 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 20:46:32.735186 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 20:46:32.738597 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 20:46:32.748660 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 20:46:32.748778 I2C: 03:1a
1453 20:46:32.751570 I2C: 03:38
1454 20:46:32.751654 I2C: 03:39
1455 20:46:32.754922 I2C: 03:3a
1456 20:46:32.755007 I2C: 03:3b
1457 20:46:32.761296 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 20:46:32.768152 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 20:46:32.778016 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 20:46:32.790926 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 20:46:32.791020 PCI: 01:00.0
1462 20:46:32.801241 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 20:46:32.804477 PCI: 00:1e.0
1464 20:46:32.814119 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 20:46:32.824219 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 20:46:32.830640 PCI: 00:1e.2 child on link 0 SPI: 00
1467 20:46:32.840626 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 20:46:32.840776 SPI: 00
1469 20:46:32.844116 PCI: 00:1e.3 child on link 0 SPI: 01
1470 20:46:32.853742 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 20:46:32.856899 SPI: 01
1472 20:46:32.860057 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 20:46:32.870091 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 20:46:32.876790 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 20:46:32.880316 PNP: 0c09.0
1476 20:46:32.890603 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 20:46:32.890720 PCI: 00:1f.3
1478 20:46:32.899767 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 20:46:32.909902 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 20:46:32.913284 PCI: 00:1f.4
1481 20:46:32.922924 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 20:46:32.933110 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 20:46:32.933215 PCI: 00:1f.5
1484 20:46:32.943069 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 20:46:32.946113 Done allocating resources.
1486 20:46:32.953052 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 20:46:32.956004 Enabling resources...
1488 20:46:32.959224 PCI: 00:00.0 subsystem <- 8086/9b61
1489 20:46:32.963258 PCI: 00:00.0 cmd <- 06
1490 20:46:32.965935 PCI: 00:02.0 subsystem <- 8086/9b41
1491 20:46:32.969097 PCI: 00:02.0 cmd <- 03
1492 20:46:32.969206 PCI: 00:08.0 cmd <- 06
1493 20:46:32.976150 PCI: 00:12.0 subsystem <- 8086/02f9
1494 20:46:32.976242 PCI: 00:12.0 cmd <- 02
1495 20:46:32.982245 PCI: 00:14.0 subsystem <- 8086/02ed
1496 20:46:32.982332 PCI: 00:14.0 cmd <- 02
1497 20:46:32.986094 PCI: 00:14.2 cmd <- 02
1498 20:46:32.989301 PCI: 00:14.3 subsystem <- 8086/02f0
1499 20:46:32.992283 PCI: 00:14.3 cmd <- 02
1500 20:46:32.996057 PCI: 00:15.0 subsystem <- 8086/02e8
1501 20:46:32.999037 PCI: 00:15.0 cmd <- 02
1502 20:46:33.002319 PCI: 00:15.1 subsystem <- 8086/02e9
1503 20:46:33.005494 PCI: 00:15.1 cmd <- 02
1504 20:46:33.009063 PCI: 00:16.0 subsystem <- 8086/02e0
1505 20:46:33.012464 PCI: 00:16.0 cmd <- 02
1506 20:46:33.015659 PCI: 00:17.0 subsystem <- 8086/02d3
1507 20:46:33.015749 PCI: 00:17.0 cmd <- 03
1508 20:46:33.022500 PCI: 00:19.0 subsystem <- 8086/02c5
1509 20:46:33.022621 PCI: 00:19.0 cmd <- 02
1510 20:46:33.025648 PCI: 00:1d.0 bridge ctrl <- 0013
1511 20:46:33.029115 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 20:46:33.032711 PCI: 00:1d.0 cmd <- 06
1513 20:46:33.035955 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 20:46:33.039329 PCI: 00:1e.0 cmd <- 06
1515 20:46:33.042838 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 20:46:33.045469 PCI: 00:1e.2 cmd <- 06
1517 20:46:33.048855 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 20:46:33.052743 PCI: 00:1e.3 cmd <- 02
1519 20:46:33.055735 PCI: 00:1f.0 subsystem <- 8086/0284
1520 20:46:33.058799 PCI: 00:1f.0 cmd <- 407
1521 20:46:33.062644 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 20:46:33.065376 PCI: 00:1f.3 cmd <- 02
1523 20:46:33.068582 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 20:46:33.071996 PCI: 00:1f.4 cmd <- 03
1525 20:46:33.075401 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 20:46:33.075485 PCI: 00:1f.5 cmd <- 406
1527 20:46:33.085618 PCI: 01:00.0 cmd <- 02
1528 20:46:33.091013 done.
1529 20:46:33.104587 ME: Version: 14.0.39.1367
1530 20:46:33.111288 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1531 20:46:33.114452 Initializing devices...
1532 20:46:33.114565 Root Device init ...
1533 20:46:33.120972 Chrome EC: Set SMI mask to 0x0000000000000000
1534 20:46:33.124438 Chrome EC: clear events_b mask to 0x0000000000000000
1535 20:46:33.130861 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 20:46:33.138157 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 20:46:33.144430 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 20:46:33.147815 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 20:46:33.151106 Root Device init finished in 35146 usecs
1540 20:46:33.154849 CPU_CLUSTER: 0 init ...
1541 20:46:33.161369 CPU_CLUSTER: 0 init finished in 2447 usecs
1542 20:46:33.165566 PCI: 00:00.0 init ...
1543 20:46:33.168427 CPU TDP: 15 Watts
1544 20:46:33.172560 CPU PL2 = 64 Watts
1545 20:46:33.175394 PCI: 00:00.0 init finished in 7078 usecs
1546 20:46:33.178771 PCI: 00:02.0 init ...
1547 20:46:33.182266 PCI: 00:02.0 init finished in 2252 usecs
1548 20:46:33.185595 PCI: 00:08.0 init ...
1549 20:46:33.188182 PCI: 00:08.0 init finished in 2251 usecs
1550 20:46:33.191728 PCI: 00:12.0 init ...
1551 20:46:33.195242 PCI: 00:12.0 init finished in 2244 usecs
1552 20:46:33.198241 PCI: 00:14.0 init ...
1553 20:46:33.201629 PCI: 00:14.0 init finished in 2251 usecs
1554 20:46:33.204951 PCI: 00:14.2 init ...
1555 20:46:33.208219 PCI: 00:14.2 init finished in 2252 usecs
1556 20:46:33.211699 PCI: 00:14.3 init ...
1557 20:46:33.215238 PCI: 00:14.3 init finished in 2269 usecs
1558 20:46:33.218460 PCI: 00:15.0 init ...
1559 20:46:33.221626 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 20:46:33.225524 PCI: 00:15.0 init finished in 5982 usecs
1561 20:46:33.228095 PCI: 00:15.1 init ...
1562 20:46:33.231639 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 20:46:33.235019 PCI: 00:15.1 init finished in 5974 usecs
1564 20:46:33.239063 PCI: 00:16.0 init ...
1565 20:46:33.242185 PCI: 00:16.0 init finished in 2252 usecs
1566 20:46:33.245810 PCI: 00:19.0 init ...
1567 20:46:33.248971 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 20:46:33.255649 PCI: 00:19.0 init finished in 5976 usecs
1569 20:46:33.255729 PCI: 00:1d.0 init ...
1570 20:46:33.259168 Initializing PCH PCIe bridge.
1571 20:46:33.262132 PCI: 00:1d.0 init finished in 5276 usecs
1572 20:46:33.267086 PCI: 00:1f.0 init ...
1573 20:46:33.270507 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 20:46:33.277038 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 20:46:33.277114 IOAPIC: ID = 0x02
1576 20:46:33.280202 IOAPIC: Dumping registers
1577 20:46:33.283711 reg 0x0000: 0x02000000
1578 20:46:33.286864 reg 0x0001: 0x00770020
1579 20:46:33.286938 reg 0x0002: 0x00000000
1580 20:46:33.294107 PCI: 00:1f.0 init finished in 23535 usecs
1581 20:46:33.297053 PCI: 00:1f.4 init ...
1582 20:46:33.300387 PCI: 00:1f.4 init finished in 2262 usecs
1583 20:46:33.311272 PCI: 01:00.0 init ...
1584 20:46:33.314578 PCI: 01:00.0 init finished in 2252 usecs
1585 20:46:33.319473 PNP: 0c09.0 init ...
1586 20:46:33.322711 Google Chrome EC uptime: 11.094 seconds
1587 20:46:33.329335 Google Chrome AP resets since EC boot: 0
1588 20:46:33.332758 Google Chrome most recent AP reset causes:
1589 20:46:33.338864 Google Chrome EC reset flags at last EC boot: reset-pin
1590 20:46:33.341884 PNP: 0c09.0 init finished in 20590 usecs
1591 20:46:33.345124 Devices initialized
1592 20:46:33.348733 Show all devs... After init.
1593 20:46:33.348817 Root Device: enabled 1
1594 20:46:33.352151 CPU_CLUSTER: 0: enabled 1
1595 20:46:33.354935 DOMAIN: 0000: enabled 1
1596 20:46:33.355018 APIC: 00: enabled 1
1597 20:46:33.358423 PCI: 00:00.0: enabled 1
1598 20:46:33.361623 PCI: 00:02.0: enabled 1
1599 20:46:33.365513 PCI: 00:04.0: enabled 0
1600 20:46:33.365596 PCI: 00:05.0: enabled 0
1601 20:46:33.368469 PCI: 00:12.0: enabled 1
1602 20:46:33.371913 PCI: 00:12.5: enabled 0
1603 20:46:33.375070 PCI: 00:12.6: enabled 0
1604 20:46:33.375153 PCI: 00:14.0: enabled 1
1605 20:46:33.378526 PCI: 00:14.1: enabled 0
1606 20:46:33.381703 PCI: 00:14.3: enabled 1
1607 20:46:33.381786 PCI: 00:14.5: enabled 0
1608 20:46:33.384801 PCI: 00:15.0: enabled 1
1609 20:46:33.388594 PCI: 00:15.1: enabled 1
1610 20:46:33.391804 PCI: 00:15.2: enabled 0
1611 20:46:33.391891 PCI: 00:15.3: enabled 0
1612 20:46:33.395233 PCI: 00:16.0: enabled 1
1613 20:46:33.398196 PCI: 00:16.1: enabled 0
1614 20:46:33.401499 PCI: 00:16.2: enabled 0
1615 20:46:33.401582 PCI: 00:16.3: enabled 0
1616 20:46:33.404782 PCI: 00:16.4: enabled 0
1617 20:46:33.408486 PCI: 00:16.5: enabled 0
1618 20:46:33.411237 PCI: 00:17.0: enabled 1
1619 20:46:33.411315 PCI: 00:19.0: enabled 1
1620 20:46:33.414351 PCI: 00:19.1: enabled 0
1621 20:46:33.417676 PCI: 00:19.2: enabled 0
1622 20:46:33.421595 PCI: 00:1a.0: enabled 0
1623 20:46:33.421685 PCI: 00:1c.0: enabled 0
1624 20:46:33.424224 PCI: 00:1c.1: enabled 0
1625 20:46:33.427579 PCI: 00:1c.2: enabled 0
1626 20:46:33.427689 PCI: 00:1c.3: enabled 0
1627 20:46:33.431043 PCI: 00:1c.4: enabled 0
1628 20:46:33.434197 PCI: 00:1c.5: enabled 0
1629 20:46:33.437734 PCI: 00:1c.6: enabled 0
1630 20:46:33.437817 PCI: 00:1c.7: enabled 0
1631 20:46:33.441186 PCI: 00:1d.0: enabled 1
1632 20:46:33.444765 PCI: 00:1d.1: enabled 0
1633 20:46:33.448056 PCI: 00:1d.2: enabled 0
1634 20:46:33.448170 PCI: 00:1d.3: enabled 0
1635 20:46:33.450860 PCI: 00:1d.4: enabled 0
1636 20:46:33.454537 PCI: 00:1d.5: enabled 0
1637 20:46:33.457733 PCI: 00:1e.0: enabled 1
1638 20:46:33.457838 PCI: 00:1e.1: enabled 0
1639 20:46:33.460917 PCI: 00:1e.2: enabled 1
1640 20:46:33.464126 PCI: 00:1e.3: enabled 1
1641 20:46:33.467497 PCI: 00:1f.0: enabled 1
1642 20:46:33.467608 PCI: 00:1f.1: enabled 0
1643 20:46:33.470845 PCI: 00:1f.2: enabled 0
1644 20:46:33.474162 PCI: 00:1f.3: enabled 1
1645 20:46:33.474273 PCI: 00:1f.4: enabled 1
1646 20:46:33.477579 PCI: 00:1f.5: enabled 1
1647 20:46:33.480961 PCI: 00:1f.6: enabled 0
1648 20:46:33.484691 USB0 port 0: enabled 1
1649 20:46:33.484775 I2C: 01:15: enabled 1
1650 20:46:33.487422 I2C: 02:5d: enabled 1
1651 20:46:33.490591 GENERIC: 0.0: enabled 1
1652 20:46:33.490703 I2C: 03:1a: enabled 1
1653 20:46:33.493862 I2C: 03:38: enabled 1
1654 20:46:33.497694 I2C: 03:39: enabled 1
1655 20:46:33.497778 I2C: 03:3a: enabled 1
1656 20:46:33.500548 I2C: 03:3b: enabled 1
1657 20:46:33.503881 PCI: 00:00.0: enabled 1
1658 20:46:33.503977 SPI: 00: enabled 1
1659 20:46:33.507486 SPI: 01: enabled 1
1660 20:46:33.510891 PNP: 0c09.0: enabled 1
1661 20:46:33.510971 USB2 port 0: enabled 1
1662 20:46:33.514270 USB2 port 1: enabled 1
1663 20:46:33.517126 USB2 port 2: enabled 0
1664 20:46:33.520413 USB2 port 3: enabled 0
1665 20:46:33.520495 USB2 port 5: enabled 0
1666 20:46:33.523673 USB2 port 6: enabled 1
1667 20:46:33.527448 USB2 port 9: enabled 1
1668 20:46:33.527546 USB3 port 0: enabled 1
1669 20:46:33.530293 USB3 port 1: enabled 1
1670 20:46:33.533562 USB3 port 2: enabled 1
1671 20:46:33.533643 USB3 port 3: enabled 1
1672 20:46:33.536835 USB3 port 4: enabled 0
1673 20:46:33.540281 APIC: 03: enabled 1
1674 20:46:33.540383 APIC: 04: enabled 1
1675 20:46:33.543964 APIC: 02: enabled 1
1676 20:46:33.546799 APIC: 05: enabled 1
1677 20:46:33.546900 APIC: 01: enabled 1
1678 20:46:33.550401 APIC: 06: enabled 1
1679 20:46:33.553686 APIC: 07: enabled 1
1680 20:46:33.553759 PCI: 00:08.0: enabled 1
1681 20:46:33.556595 PCI: 00:14.2: enabled 1
1682 20:46:33.560278 PCI: 01:00.0: enabled 1
1683 20:46:33.564014 Disabling ACPI via APMC:
1684 20:46:33.567364 done.
1685 20:46:33.570928 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 20:46:33.573699 ELOG: NV offset 0xaf0000 size 0x4000
1687 20:46:33.580406 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 20:46:33.587514 ELOG: Event(17) added with size 13 at 2023-12-07 20:44:01 UTC
1689 20:46:33.593778 ELOG: Event(92) added with size 9 at 2023-12-07 20:44:01 UTC
1690 20:46:33.600506 ELOG: Event(93) added with size 9 at 2023-12-07 20:44:01 UTC
1691 20:46:33.607062 ELOG: Event(9A) added with size 9 at 2023-12-07 20:44:01 UTC
1692 20:46:33.613789 ELOG: Event(9E) added with size 10 at 2023-12-07 20:44:01 UTC
1693 20:46:33.620744 ELOG: Event(9F) added with size 14 at 2023-12-07 20:44:01 UTC
1694 20:46:33.623996 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1695 20:46:33.631024 ELOG: Event(A1) added with size 10 at 2023-12-07 20:44:01 UTC
1696 20:46:33.640718 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 20:46:33.648068 ELOG: Event(A0) added with size 9 at 2023-12-07 20:44:01 UTC
1698 20:46:33.650729 elog_add_boot_reason: Logged dev mode boot
1699 20:46:33.650837 Finalize devices...
1700 20:46:33.654030 PCI: 00:17.0 final
1701 20:46:33.657358 Devices finalized
1702 20:46:33.661168 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 20:46:33.667816 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 20:46:33.670790 ME: HFSTS1 : 0x90000245
1705 20:46:33.674143 ME: HFSTS2 : 0x3B850126
1706 20:46:33.680368 ME: HFSTS3 : 0x00000020
1707 20:46:33.684009 ME: HFSTS4 : 0x00004800
1708 20:46:33.687229 ME: HFSTS5 : 0x00000000
1709 20:46:33.690442 ME: HFSTS6 : 0x40400006
1710 20:46:33.693585 ME: Manufacturing Mode : NO
1711 20:46:33.696918 ME: FW Partition Table : OK
1712 20:46:33.700460 ME: Bringup Loader Failure : NO
1713 20:46:33.703621 ME: Firmware Init Complete : YES
1714 20:46:33.707296 ME: Boot Options Present : NO
1715 20:46:33.710429 ME: Update In Progress : NO
1716 20:46:33.713923 ME: D0i3 Support : YES
1717 20:46:33.717381 ME: Low Power State Enabled : NO
1718 20:46:33.720032 ME: CPU Replaced : NO
1719 20:46:33.723724 ME: CPU Replacement Valid : YES
1720 20:46:33.727076 ME: Current Working State : 5
1721 20:46:33.730613 ME: Current Operation State : 1
1722 20:46:33.733749 ME: Current Operation Mode : 0
1723 20:46:33.737272 ME: Error Code : 0
1724 20:46:33.739984 ME: CPU Debug Disabled : YES
1725 20:46:33.743398 ME: TXT Support : NO
1726 20:46:33.750451 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 20:46:33.756812 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 20:46:33.756895 CBFS @ c08000 size 3f8000
1729 20:46:33.763502 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 20:46:33.767207 CBFS: Locating 'fallback/dsdt.aml'
1731 20:46:33.769958 CBFS: Found @ offset 10bb80 size 3fa5
1732 20:46:33.776810 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 20:46:33.779567 CBFS @ c08000 size 3f8000
1734 20:46:33.782871 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 20:46:33.786338 CBFS: Locating 'fallback/slic'
1736 20:46:33.792027 CBFS: 'fallback/slic' not found.
1737 20:46:33.798067 ACPI: Writing ACPI tables at 99b3e000.
1738 20:46:33.798156 ACPI: * FACS
1739 20:46:33.801267 ACPI: * DSDT
1740 20:46:33.804522 Ramoops buffer: 0x100000@0x99a3d000.
1741 20:46:33.808264 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 20:46:33.815044 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 20:46:33.817714 Google Chrome EC: version:
1744 20:46:33.821220 ro: helios_v2.0.2659-56403530b
1745 20:46:33.824405 rw: helios_v2.0.2849-c41de27e7d
1746 20:46:33.824488 running image: 1
1747 20:46:33.829192 ACPI: * FADT
1748 20:46:33.829309 SCI is IRQ9
1749 20:46:33.835466 ACPI: added table 1/32, length now 40
1750 20:46:33.835571 ACPI: * SSDT
1751 20:46:33.838507 Found 1 CPU(s) with 8 core(s) each.
1752 20:46:33.841726 Error: Could not locate 'wifi_sar' in VPD.
1753 20:46:33.848574 Checking CBFS for default SAR values
1754 20:46:33.852207 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 20:46:33.855486 CBFS @ c08000 size 3f8000
1756 20:46:33.861547 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 20:46:33.864919 CBFS: Locating 'wifi_sar_defaults.hex'
1758 20:46:33.868426 CBFS: Found @ offset 5fac0 size 77
1759 20:46:33.871895 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1760 20:46:33.878588 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1761 20:46:33.882027 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1762 20:46:33.888873 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1763 20:46:33.891591 failed to find key in VPD: dsm_calib_r0_0
1764 20:46:33.901461 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1765 20:46:33.904985 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1766 20:46:33.908623 failed to find key in VPD: dsm_calib_r0_1
1767 20:46:33.918145 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1768 20:46:33.924689 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1769 20:46:33.928035 failed to find key in VPD: dsm_calib_r0_2
1770 20:46:33.938041 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1771 20:46:33.941701 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1772 20:46:33.947876 failed to find key in VPD: dsm_calib_r0_3
1773 20:46:33.954931 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1774 20:46:33.960853 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1775 20:46:33.964195 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1776 20:46:33.967635 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1777 20:46:33.971655 EC returned error result code 1
1778 20:46:33.975730 EC returned error result code 1
1779 20:46:33.979201 EC returned error result code 1
1780 20:46:33.986069 PS2K: Bad resp from EC. Vivaldi disabled!
1781 20:46:33.989416 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1782 20:46:33.995626 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1783 20:46:34.002102 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1784 20:46:34.005623 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1785 20:46:34.012601 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1786 20:46:34.018628 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1787 20:46:34.025691 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1788 20:46:34.028968 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1789 20:46:34.035457 ACPI: added table 2/32, length now 44
1790 20:46:34.035542 ACPI: * MCFG
1791 20:46:34.039051 ACPI: added table 3/32, length now 48
1792 20:46:34.042172 ACPI: * TPM2
1793 20:46:34.045489 TPM2 log created at 99a2d000
1794 20:46:34.048526 ACPI: added table 4/32, length now 52
1795 20:46:34.048610 ACPI: * MADT
1796 20:46:34.051766 SCI is IRQ9
1797 20:46:34.055354 ACPI: added table 5/32, length now 56
1798 20:46:34.055462 current = 99b43ac0
1799 20:46:34.058687 ACPI: * DMAR
1800 20:46:34.062149 ACPI: added table 6/32, length now 60
1801 20:46:34.065370 ACPI: * IGD OpRegion
1802 20:46:34.065452 GMA: Found VBT in CBFS
1803 20:46:34.068623 GMA: Found valid VBT in CBFS
1804 20:46:34.071929 ACPI: added table 7/32, length now 64
1805 20:46:34.075312 ACPI: * HPET
1806 20:46:34.078280 ACPI: added table 8/32, length now 68
1807 20:46:34.078383 ACPI: done.
1808 20:46:34.081734 ACPI tables: 31744 bytes.
1809 20:46:34.085000 smbios_write_tables: 99a2c000
1810 20:46:34.088483 EC returned error result code 3
1811 20:46:34.091930 Couldn't obtain OEM name from CBI
1812 20:46:34.095240 Create SMBIOS type 17
1813 20:46:34.098752 PCI: 00:00.0 (Intel Cannonlake)
1814 20:46:34.101625 PCI: 00:14.3 (Intel WiFi)
1815 20:46:34.104948 SMBIOS tables: 939 bytes.
1816 20:46:34.108118 Writing table forward entry at 0x00000500
1817 20:46:34.115646 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 20:46:34.118435 Writing coreboot table at 0x99b62000
1819 20:46:34.125066 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 20:46:34.128768 1. 0000000000001000-000000000009ffff: RAM
1821 20:46:34.131310 2. 00000000000a0000-00000000000fffff: RESERVED
1822 20:46:34.138118 3. 0000000000100000-0000000099a2bfff: RAM
1823 20:46:34.141906 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 20:46:34.148025 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 20:46:34.154912 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 20:46:34.158560 7. 000000009a000000-000000009f7fffff: RESERVED
1827 20:46:34.164822 8. 00000000e0000000-00000000efffffff: RESERVED
1828 20:46:34.168205 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 20:46:34.171354 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 20:46:34.178186 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 20:46:34.181216 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 20:46:34.188024 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 20:46:34.190954 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 20:46:34.197819 15. 0000000100000000-000000045e7fffff: RAM
1835 20:46:34.201052 Graphics framebuffer located at 0xc0000000
1836 20:46:34.204245 Passing 5 GPIOs to payload:
1837 20:46:34.207715 NAME | PORT | POLARITY | VALUE
1838 20:46:34.214025 write protect | undefined | high | low
1839 20:46:34.217663 lid | undefined | high | high
1840 20:46:34.224583 power | undefined | high | low
1841 20:46:34.230466 oprom | undefined | high | low
1842 20:46:34.234147 EC in RW | 0x000000cb | high | low
1843 20:46:34.237319 Board ID: 4
1844 20:46:34.241069 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 20:46:34.244247 CBFS @ c08000 size 3f8000
1846 20:46:34.250447 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 20:46:34.257420 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1848 20:46:34.257502 coreboot table: 1492 bytes.
1849 20:46:34.260250 IMD ROOT 0. 99fff000 00001000
1850 20:46:34.263969 IMD SMALL 1. 99ffe000 00001000
1851 20:46:34.267325 FSP MEMORY 2. 99c4e000 003b0000
1852 20:46:34.270761 CONSOLE 3. 99c2e000 00020000
1853 20:46:34.273685 FMAP 4. 99c2d000 0000054e
1854 20:46:34.277023 TIME STAMP 5. 99c2c000 00000910
1855 20:46:34.280429 VBOOT WORK 6. 99c18000 00014000
1856 20:46:34.283789 MRC DATA 7. 99c16000 00001958
1857 20:46:34.286934 ROMSTG STCK 8. 99c15000 00001000
1858 20:46:34.290690 AFTER CAR 9. 99c0b000 0000a000
1859 20:46:34.293501 RAMSTAGE 10. 99baf000 0005c000
1860 20:46:34.297200 REFCODE 11. 99b7a000 00035000
1861 20:46:34.300664 SMM BACKUP 12. 99b6a000 00010000
1862 20:46:34.303978 COREBOOT 13. 99b62000 00008000
1863 20:46:34.306775 ACPI 14. 99b3e000 00024000
1864 20:46:34.310223 ACPI GNVS 15. 99b3d000 00001000
1865 20:46:34.313989 RAMOOPS 16. 99a3d000 00100000
1866 20:46:34.316957 TPM2 TCGLOG17. 99a2d000 00010000
1867 20:46:34.320525 SMBIOS 18. 99a2c000 00000800
1868 20:46:34.323957 IMD small region:
1869 20:46:34.327177 IMD ROOT 0. 99ffec00 00000400
1870 20:46:34.330159 FSP RUNTIME 1. 99ffebe0 00000004
1871 20:46:34.333842 EC HOSTEVENT 2. 99ffebc0 00000008
1872 20:46:34.337032 POWER STATE 3. 99ffeb80 00000040
1873 20:46:34.340860 ROMSTAGE 4. 99ffeb60 00000004
1874 20:46:34.343784 MEM INFO 5. 99ffe9a0 000001b9
1875 20:46:34.346978 VPD 6. 99ffe920 0000006c
1876 20:46:34.350177 MTRR: Physical address space:
1877 20:46:34.356985 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1878 20:46:34.363348 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1879 20:46:34.370129 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1880 20:46:34.376918 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1881 20:46:34.383749 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1882 20:46:34.389815 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1883 20:46:34.396890 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1884 20:46:34.399874 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 20:46:34.403645 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 20:46:34.406518 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 20:46:34.410040 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 20:46:34.416266 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 20:46:34.419664 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 20:46:34.423263 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 20:46:34.426577 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 20:46:34.432971 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 20:46:34.436253 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 20:46:34.439749 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 20:46:34.443004 call enable_fixed_mtrr()
1896 20:46:34.446389 CPU physical address size: 39 bits
1897 20:46:34.449643 MTRR: default type WB/UC MTRR counts: 6/8.
1898 20:46:34.456562 MTRR: WB selected as default type.
1899 20:46:34.459671 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1900 20:46:34.466317 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1901 20:46:34.473080 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1902 20:46:34.479155 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1903 20:46:34.486329 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1904 20:46:34.492607 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1905 20:46:34.495825 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 20:46:34.502715 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 20:46:34.505530 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 20:46:34.509170 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 20:46:34.512152 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 20:46:34.519116 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 20:46:34.522394 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 20:46:34.525779 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 20:46:34.529064 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 20:46:34.532577 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 20:46:34.538815 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 20:46:34.542425 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 20:46:34.546011 call enable_fixed_mtrr()
1918 20:46:34.548653 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 20:46:34.552601 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 20:46:34.558477 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 20:46:34.562258 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 20:46:34.565471 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 20:46:34.569072 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 20:46:34.571827 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 20:46:34.579003 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 20:46:34.582349 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 20:46:34.585512 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 20:46:34.588551 CPU physical address size: 39 bits
1929 20:46:34.592139 call enable_fixed_mtrr()
1930 20:46:34.595768 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 20:46:34.602088 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 20:46:34.605552 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 20:46:34.608580 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 20:46:34.612070 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 20:46:34.615413 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 20:46:34.622443 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 20:46:34.624978 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 20:46:34.628400 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 20:46:34.632301 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 20:46:34.638402 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 20:46:34.638492
1942 20:46:34.638559 MTRR check
1943 20:46:34.641980 Fixed MTRRs : Enabled
1944 20:46:34.645207 Variable MTRRs: Enabled
1945 20:46:34.645310
1946 20:46:34.645422 call enable_fixed_mtrr()
1947 20:46:34.652166 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1948 20:46:34.655422 CPU physical address size: 39 bits
1949 20:46:34.662123 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1950 20:46:34.665117 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 20:46:34.668552 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 20:46:34.671497 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 20:46:34.678415 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 20:46:34.682036 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 20:46:34.685276 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 20:46:34.688838 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 20:46:34.695195 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 20:46:34.698644 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 20:46:34.701251 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 20:46:34.704990 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 20:46:34.711754 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 20:46:34.714965 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 20:46:34.718023 call enable_fixed_mtrr()
1964 20:46:34.721232 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 20:46:34.724913 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 20:46:34.728394 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 20:46:34.734872 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 20:46:34.738189 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 20:46:34.741446 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 20:46:34.744543 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 20:46:34.751105 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 20:46:34.754430 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 20:46:34.757432 CPU physical address size: 39 bits
1974 20:46:34.761667 call enable_fixed_mtrr()
1975 20:46:34.764134 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 20:46:34.767428 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 20:46:34.773940 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 20:46:34.777649 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 20:46:34.781177 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 20:46:34.784019 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 20:46:34.787280 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 20:46:34.794187 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 20:46:34.797596 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 20:46:34.800942 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 20:46:34.803695 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 20:46:34.810300 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 20:46:34.813781 call enable_fixed_mtrr()
1988 20:46:34.817106 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 20:46:34.820565 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 20:46:34.824095 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 20:46:34.830058 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 20:46:34.833825 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 20:46:34.837117 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 20:46:34.840157 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 20:46:34.846848 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 20:46:34.850384 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 20:46:34.853618 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 20:46:34.856589 CPU physical address size: 39 bits
1999 20:46:34.860023 call enable_fixed_mtrr()
2000 20:46:34.863577 CPU physical address size: 39 bits
2001 20:46:34.866986 CPU physical address size: 39 bits
2002 20:46:34.869843 CBFS @ c08000 size 3f8000
2003 20:46:34.876722 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2004 20:46:34.879860 CBFS: Locating 'fallback/payload'
2005 20:46:34.882996 CPU physical address size: 39 bits
2006 20:46:34.886312 CBFS: Found @ offset 1c96c0 size 3f798
2007 20:46:34.889746 Checking segment from ROM address 0xffdd16f8
2008 20:46:34.896445 Checking segment from ROM address 0xffdd1714
2009 20:46:34.899616 Loading segment from ROM address 0xffdd16f8
2010 20:46:34.902978 code (compression=0)
2011 20:46:34.909960 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 20:46:34.919721 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 20:46:34.919889 it's not compressed!
2014 20:46:35.013248 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 20:46:35.020158 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 20:46:35.023231 Loading segment from ROM address 0xffdd1714
2017 20:46:35.026552 Entry Point 0x30000000
2018 20:46:35.029980 Loaded segments
2019 20:46:35.035657 Finalizing chipset.
2020 20:46:35.039070 Finalizing SMM.
2021 20:46:35.042262 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2022 20:46:35.045651 mp_park_aps done after 0 msecs.
2023 20:46:35.052052 Jumping to boot code at 30000000(99b62000)
2024 20:46:35.059077 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2025 20:46:35.059160
2026 20:46:35.059225
2027 20:46:35.059285
2028 20:46:35.061819 Starting depthcharge on Helios...
2029 20:46:35.061901
2030 20:46:35.062254 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2031 20:46:35.062353 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2032 20:46:35.062456 Setting prompt string to ['hatch:']
2033 20:46:35.062583 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2034 20:46:35.071728 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2035 20:46:35.071855
2036 20:46:35.078742 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2037 20:46:35.078903
2038 20:46:35.085208 board_setup: Info: eMMC controller not present; skipping
2039 20:46:35.085289
2040 20:46:35.088276 New NVMe Controller 0x30053ac0 @ 00:1d:00
2041 20:46:35.088397
2042 20:46:35.094924 board_setup: Info: SDHCI controller not present; skipping
2043 20:46:35.095006
2044 20:46:35.101955 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2045 20:46:35.102043
2046 20:46:35.102109 Wipe memory regions:
2047 20:46:35.102183
2048 20:46:35.105141 [0x00000000001000, 0x000000000a0000)
2049 20:46:35.105222
2050 20:46:35.108546 [0x00000000100000, 0x00000030000000)
2051 20:46:35.174793
2052 20:46:35.178063 [0x00000030657430, 0x00000099a2c000)
2053 20:46:35.316103
2054 20:46:35.319316 [0x00000100000000, 0x0000045e800000)
2055 20:46:36.700605
2056 20:46:36.700783 R8152: Initializing
2057 20:46:36.700907
2058 20:46:36.703808 Version 9 (ocp_data = 6010)
2059 20:46:36.708503
2060 20:46:36.708595 R8152: Done initializing
2061 20:46:36.708670
2062 20:46:36.711735 Adding net device
2063 20:46:37.194169
2064 20:46:37.194299 R8152: Initializing
2065 20:46:37.194372
2066 20:46:37.197522 Version 6 (ocp_data = 5c30)
2067 20:46:37.197677
2068 20:46:37.201002 R8152: Done initializing
2069 20:46:37.201109
2070 20:46:37.207806 net_add_device: Attemp to include the same device
2071 20:46:37.207928
2072 20:46:37.214596 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 20:46:37.214708
2074 20:46:37.214801
2075 20:46:37.214893
2076 20:46:37.215223 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 20:46:37.315575 hatch: tftpboot 192.168.201.1 12210448/tftp-deploy-06olfia6/kernel/bzImage 12210448/tftp-deploy-06olfia6/kernel/cmdline 12210448/tftp-deploy-06olfia6/ramdisk/ramdisk.cpio.gz
2079 20:46:37.315730 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 20:46:37.315817 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2081 20:46:37.320119 tftpboot 192.168.201.1 12210448/tftp-deploy-06olfia6/kernel/bzIploy-06olfia6/kernel/cmdline 12210448/tftp-deploy-06olfia6/ramdisk/ramdisk.cpio.gz
2082 20:46:37.320258
2083 20:46:37.320360 Waiting for link
2084 20:46:37.521328
2085 20:46:37.521490 done.
2086 20:46:37.521632
2087 20:46:37.521702 MAC: 00:24:32:50:19:be
2088 20:46:37.521763
2089 20:46:37.524545 Sending DHCP discover... done.
2090 20:46:37.524623
2091 20:46:37.527938 Waiting for reply... done.
2092 20:46:37.528017
2093 20:46:37.530765 Sending DHCP request... done.
2094 20:46:37.530845
2095 20:46:37.534781 Waiting for reply... done.
2096 20:46:37.534858
2097 20:46:37.538051 My ip is 192.168.201.15
2098 20:46:37.538129
2099 20:46:37.541131 The DHCP server ip is 192.168.201.1
2100 20:46:37.541207
2101 20:46:37.544146 TFTP server IP predefined by user: 192.168.201.1
2102 20:46:37.544245
2103 20:46:37.551048 Bootfile predefined by user: 12210448/tftp-deploy-06olfia6/kernel/bzImage
2104 20:46:37.551130
2105 20:46:37.554297 Sending tftp read request... done.
2106 20:46:37.554377
2107 20:46:37.561491 Waiting for the transfer...
2108 20:46:37.561575
2109 20:46:38.103722 00000000 ################################################################
2110 20:46:38.103856
2111 20:46:38.640416 00080000 ################################################################
2112 20:46:38.640553
2113 20:46:39.198796 00100000 ################################################################
2114 20:46:39.198939
2115 20:46:39.768829 00180000 ################################################################
2116 20:46:39.768993
2117 20:46:40.328598 00200000 ################################################################
2118 20:46:40.328772
2119 20:46:40.888202 00280000 ################################################################
2120 20:46:40.888392
2121 20:46:41.429171 00300000 ################################################################
2122 20:46:41.429305
2123 20:46:41.963671 00380000 ################################################################
2124 20:46:41.963867
2125 20:46:42.504410 00400000 ################################################################
2126 20:46:42.504560
2127 20:46:43.058450 00480000 ################################################################
2128 20:46:43.058612
2129 20:46:43.612341 00500000 ################################################################
2130 20:46:43.612491
2131 20:46:44.166566 00580000 ################################################################
2132 20:46:44.166703
2133 20:46:44.721854 00600000 ################################################################
2134 20:46:44.721990
2135 20:46:45.280119 00680000 ################################################################
2136 20:46:45.280315
2137 20:46:45.916929 00700000 ################################################################
2138 20:46:45.917426
2139 20:46:46.624421 00780000 ################################################################
2140 20:46:46.624934
2141 20:46:47.332649 00800000 ################################################################
2142 20:46:47.333242
2143 20:46:48.028842 00880000 ################################################################
2144 20:46:48.029382
2145 20:46:48.717062 00900000 ################################################################
2146 20:46:48.717555
2147 20:46:49.345112 00980000 ################################################################
2148 20:46:49.345253
2149 20:46:50.000150 00a00000 ################################################################
2150 20:46:50.000700
2151 20:46:50.675272 00a80000 ################################################################
2152 20:46:50.675438
2153 20:46:50.718129 00b00000 ##### done.
2154 20:46:50.718260
2155 20:46:50.721317 The bootfile was 11571200 bytes long.
2156 20:46:50.721403
2157 20:46:50.724946 Sending tftp read request... done.
2158 20:46:50.725032
2159 20:46:50.727662 Waiting for the transfer...
2160 20:46:50.727746
2161 20:46:51.298676 00000000 ################################################################
2162 20:46:51.298816
2163 20:46:51.888601 00080000 ################################################################
2164 20:46:51.888750
2165 20:46:52.457021 00100000 ################################################################
2166 20:46:52.457178
2167 20:46:53.040332 00180000 ################################################################
2168 20:46:53.040477
2169 20:46:53.614281 00200000 ################################################################
2170 20:46:53.614430
2171 20:46:54.204368 00280000 ################################################################
2172 20:46:54.204517
2173 20:46:54.785238 00300000 ################################################################
2174 20:46:54.785434
2175 20:46:55.378487 00380000 ################################################################
2176 20:46:55.378624
2177 20:46:55.967071 00400000 ################################################################
2178 20:46:55.967228
2179 20:46:56.550679 00480000 ################################################################
2180 20:46:56.550835
2181 20:46:57.132297 00500000 ################################################################
2182 20:46:57.132464
2183 20:46:57.548573 00580000 ################################################ done.
2184 20:46:57.548729
2185 20:46:57.551774 Sending tftp read request... done.
2186 20:46:57.551870
2187 20:46:57.555245 Waiting for the transfer...
2188 20:46:57.555340
2189 20:46:57.558428 00000000 # done.
2190 20:46:57.558516
2191 20:46:57.564941 Command line loaded dynamically from TFTP file: 12210448/tftp-deploy-06olfia6/kernel/cmdline
2192 20:46:57.568329
2193 20:46:57.594293 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12210448/extract-nfsrootfs-eu2zvxb9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2194 20:46:57.594450
2195 20:46:57.601367 ec_init(0): CrosEC protocol v3 supported (256, 256)
2196 20:46:57.606467
2197 20:46:57.609469 Shutting down all USB controllers.
2198 20:46:57.609568
2199 20:46:57.609634 Removing current net device
2200 20:46:57.613855
2201 20:46:57.613961 Finalizing coreboot
2202 20:46:57.614026
2203 20:46:57.620260 Exiting depthcharge with code 4 at timestamp: 29910224
2204 20:46:57.620410
2205 20:46:57.620477
2206 20:46:57.620538 Starting kernel ...
2207 20:46:57.620597
2208 20:46:57.620653
2209 20:46:57.621037 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2210 20:46:57.621134 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2211 20:46:57.621210 Setting prompt string to ['Linux version [0-9]']
2212 20:46:57.621276 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2213 20:46:57.621343 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2215 20:51:16.621389 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2217 20:51:16.621660 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2219 20:51:16.621828 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2222 20:51:16.622089 end: 2 depthcharge-action (duration 00:05:00) [common]
2224 20:51:16.622317 Cleaning after the job
2225 20:51:16.622412 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/ramdisk
2226 20:51:16.623386 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/kernel
2227 20:51:16.625204 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/nfsrootfs
2228 20:51:16.718623 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12210448/tftp-deploy-06olfia6/modules
2229 20:51:16.719350 start: 4.1 power-off (timeout 00:00:30) [common]
2230 20:51:16.719524 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2231 20:51:16.795795 >> Command sent successfully.
2232 20:51:16.798207 Returned 0 in 0 seconds
2233 20:51:16.898566 end: 4.1 power-off (duration 00:00:00) [common]
2235 20:51:16.898896 start: 4.2 read-feedback (timeout 00:10:00) [common]
2236 20:51:16.899158 Listened to connection for namespace 'common' for up to 1s
2238 20:51:16.899532 Listened to connection for namespace 'common' for up to 1s
2239 20:51:17.900085 Finalising connection for namespace 'common'
2240 20:51:17.900259 Disconnecting from shell: Finalise
2241 20:51:17.900348
2242 20:51:18.000657 end: 4.2 read-feedback (duration 00:00:01) [common]
2243 20:51:18.000795 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12210448
2244 20:51:18.583826 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12210448
2245 20:51:18.584014 JobError: Your job cannot terminate cleanly.