Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 10:09:10.980273 lava-dispatcher, installed at version: 2023.10
2 10:09:10.980482 start: 0 validate
3 10:09:10.980609 Start time: 2024-01-13 10:09:10.980601+00:00 (UTC)
4 10:09:10.980724 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:09:10.980856 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 10:09:11.253358 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:09:11.254067 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.304-cip106%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:09:11.525939 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:09:11.526696 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 10:09:11.797224 Using caching service: 'http://localhost/cache/?uri=%s'
11 10:09:11.797992 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.304-cip106%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 10:09:12.075920 validate duration: 1.10
14 10:09:12.076242 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 10:09:12.076336 start: 1.1 download-retry (timeout 00:10:00) [common]
16 10:09:12.076418 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 10:09:12.076546 Not decompressing ramdisk as can be used compressed.
18 10:09:12.076627 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 10:09:12.076689 saving as /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/ramdisk/initrd.cpio.gz
20 10:09:12.076750 total size: 5432480 (5 MB)
21 10:09:12.077774 progress 0 % (0 MB)
22 10:09:12.079479 progress 5 % (0 MB)
23 10:09:12.080910 progress 10 % (0 MB)
24 10:09:12.082299 progress 15 % (0 MB)
25 10:09:12.083851 progress 20 % (1 MB)
26 10:09:12.085249 progress 25 % (1 MB)
27 10:09:12.086625 progress 30 % (1 MB)
28 10:09:12.088182 progress 35 % (1 MB)
29 10:09:12.089533 progress 40 % (2 MB)
30 10:09:12.090894 progress 45 % (2 MB)
31 10:09:12.092295 progress 50 % (2 MB)
32 10:09:12.093805 progress 55 % (2 MB)
33 10:09:12.095155 progress 60 % (3 MB)
34 10:09:12.096545 progress 65 % (3 MB)
35 10:09:12.098075 progress 70 % (3 MB)
36 10:09:12.099427 progress 75 % (3 MB)
37 10:09:12.100820 progress 80 % (4 MB)
38 10:09:12.102170 progress 85 % (4 MB)
39 10:09:12.103723 progress 90 % (4 MB)
40 10:09:12.105127 progress 95 % (4 MB)
41 10:09:12.106494 progress 100 % (5 MB)
42 10:09:12.106696 5 MB downloaded in 0.03 s (173.01 MB/s)
43 10:09:12.106841 end: 1.1.1 http-download (duration 00:00:00) [common]
45 10:09:12.107070 end: 1.1 download-retry (duration 00:00:00) [common]
46 10:09:12.107151 start: 1.2 download-retry (timeout 00:10:00) [common]
47 10:09:12.107230 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 10:09:12.107350 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.304-cip106/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 10:09:12.107415 saving as /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/kernel/bzImage
50 10:09:12.107473 total size: 11575296 (11 MB)
51 10:09:12.107531 No compression specified
52 10:09:12.108577 progress 0 % (0 MB)
53 10:09:12.111582 progress 5 % (0 MB)
54 10:09:12.114667 progress 10 % (1 MB)
55 10:09:12.117641 progress 15 % (1 MB)
56 10:09:12.120839 progress 20 % (2 MB)
57 10:09:12.123942 progress 25 % (2 MB)
58 10:09:12.126930 progress 30 % (3 MB)
59 10:09:12.130075 progress 35 % (3 MB)
60 10:09:12.133208 progress 40 % (4 MB)
61 10:09:12.136195 progress 45 % (4 MB)
62 10:09:12.139262 progress 50 % (5 MB)
63 10:09:12.142442 progress 55 % (6 MB)
64 10:09:12.145364 progress 60 % (6 MB)
65 10:09:12.148417 progress 65 % (7 MB)
66 10:09:12.151395 progress 70 % (7 MB)
67 10:09:12.154287 progress 75 % (8 MB)
68 10:09:12.157329 progress 80 % (8 MB)
69 10:09:12.160282 progress 85 % (9 MB)
70 10:09:12.163080 progress 90 % (9 MB)
71 10:09:12.166035 progress 95 % (10 MB)
72 10:09:12.169017 progress 100 % (11 MB)
73 10:09:12.169148 11 MB downloaded in 0.06 s (179.00 MB/s)
74 10:09:12.169288 end: 1.2.1 http-download (duration 00:00:00) [common]
76 10:09:12.169511 end: 1.2 download-retry (duration 00:00:00) [common]
77 10:09:12.169599 start: 1.3 download-retry (timeout 00:10:00) [common]
78 10:09:12.169681 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 10:09:12.169817 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 10:09:12.169882 saving as /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/nfsrootfs/full.rootfs.tar
81 10:09:12.169940 total size: 207157356 (197 MB)
82 10:09:12.169999 Using unxz to decompress xz
83 10:09:12.174221 progress 0 % (0 MB)
84 10:09:12.720588 progress 5 % (9 MB)
85 10:09:13.243519 progress 10 % (19 MB)
86 10:09:13.843834 progress 15 % (29 MB)
87 10:09:14.201914 progress 20 % (39 MB)
88 10:09:14.560541 progress 25 % (49 MB)
89 10:09:15.160553 progress 30 % (59 MB)
90 10:09:15.701364 progress 35 % (69 MB)
91 10:09:16.313163 progress 40 % (79 MB)
92 10:09:16.863489 progress 45 % (88 MB)
93 10:09:17.469618 progress 50 % (98 MB)
94 10:09:18.121809 progress 55 % (108 MB)
95 10:09:18.824286 progress 60 % (118 MB)
96 10:09:18.960852 progress 65 % (128 MB)
97 10:09:19.098862 progress 70 % (138 MB)
98 10:09:19.191715 progress 75 % (148 MB)
99 10:09:19.262048 progress 80 % (158 MB)
100 10:09:19.331848 progress 85 % (167 MB)
101 10:09:19.430810 progress 90 % (177 MB)
102 10:09:19.698594 progress 95 % (187 MB)
103 10:09:20.283798 progress 100 % (197 MB)
104 10:09:20.290089 197 MB downloaded in 8.12 s (24.33 MB/s)
105 10:09:20.290342 end: 1.3.1 http-download (duration 00:00:08) [common]
107 10:09:20.290606 end: 1.3 download-retry (duration 00:00:08) [common]
108 10:09:20.290698 start: 1.4 download-retry (timeout 00:09:52) [common]
109 10:09:20.290786 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 10:09:20.290946 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.304-cip106/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 10:09:20.291016 saving as /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/modules/modules.tar
112 10:09:20.291077 total size: 483980 (0 MB)
113 10:09:20.291141 Using unxz to decompress xz
114 10:09:20.295359 progress 6 % (0 MB)
115 10:09:20.295758 progress 13 % (0 MB)
116 10:09:20.295990 progress 20 % (0 MB)
117 10:09:20.297542 progress 27 % (0 MB)
118 10:09:20.299532 progress 33 % (0 MB)
119 10:09:20.301426 progress 40 % (0 MB)
120 10:09:20.303357 progress 47 % (0 MB)
121 10:09:20.305279 progress 54 % (0 MB)
122 10:09:20.307245 progress 60 % (0 MB)
123 10:09:20.309252 progress 67 % (0 MB)
124 10:09:20.311235 progress 74 % (0 MB)
125 10:09:20.313267 progress 81 % (0 MB)
126 10:09:20.315160 progress 88 % (0 MB)
127 10:09:20.317100 progress 94 % (0 MB)
128 10:09:20.319487 progress 100 % (0 MB)
129 10:09:20.325925 0 MB downloaded in 0.03 s (13.25 MB/s)
130 10:09:20.326169 end: 1.4.1 http-download (duration 00:00:00) [common]
132 10:09:20.326424 end: 1.4 download-retry (duration 00:00:00) [common]
133 10:09:20.326516 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 10:09:20.326609 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 10:09:23.836757 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12522701/extract-nfsrootfs-o54cebwo
136 10:09:23.836959 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
137 10:09:23.837057 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 10:09:23.837221 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h
139 10:09:23.837352 makedir: /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin
140 10:09:23.837477 makedir: /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/tests
141 10:09:23.837617 makedir: /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/results
142 10:09:23.837747 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-add-keys
143 10:09:23.837889 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-add-sources
144 10:09:23.838017 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-background-process-start
145 10:09:23.838153 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-background-process-stop
146 10:09:23.838283 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-common-functions
147 10:09:23.838406 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-echo-ipv4
148 10:09:23.838532 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-install-packages
149 10:09:23.838655 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-installed-packages
150 10:09:23.838777 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-os-build
151 10:09:23.838899 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-probe-channel
152 10:09:23.839021 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-probe-ip
153 10:09:23.839144 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-target-ip
154 10:09:23.839266 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-target-mac
155 10:09:23.839387 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-target-storage
156 10:09:23.839511 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-test-case
157 10:09:23.839680 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-test-event
158 10:09:23.839802 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-test-feedback
159 10:09:23.839927 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-test-raise
160 10:09:23.840048 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-test-reference
161 10:09:23.840214 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-test-runner
162 10:09:23.840337 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-test-set
163 10:09:23.840460 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-test-shell
164 10:09:23.840584 Updating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-add-keys (debian)
165 10:09:23.840735 Updating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-add-sources (debian)
166 10:09:23.840874 Updating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-install-packages (debian)
167 10:09:23.841012 Updating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-installed-packages (debian)
168 10:09:23.841148 Updating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/bin/lava-os-build (debian)
169 10:09:23.841268 Creating /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/environment
170 10:09:23.841362 LAVA metadata
171 10:09:23.841429 - LAVA_JOB_ID=12522701
172 10:09:23.841490 - LAVA_DISPATCHER_IP=192.168.201.1
173 10:09:23.841587 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 10:09:23.841653 skipped lava-vland-overlay
175 10:09:23.841724 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 10:09:23.841801 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 10:09:23.841860 skipped lava-multinode-overlay
178 10:09:23.841942 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 10:09:23.842020 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 10:09:23.842091 Loading test definitions
181 10:09:23.842178 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 10:09:23.842246 Using /lava-12522701 at stage 0
183 10:09:23.842526 uuid=12522701_1.5.2.3.1 testdef=None
184 10:09:23.842611 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 10:09:23.842693 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 10:09:23.843142 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 10:09:23.843357 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 10:09:23.843943 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 10:09:23.844413 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 10:09:23.844952 runner path: /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/0/tests/0_timesync-off test_uuid 12522701_1.5.2.3.1
193 10:09:23.845103 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 10:09:23.845325 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 10:09:23.845401 Using /lava-12522701 at stage 0
197 10:09:23.845503 Fetching tests from https://github.com/kernelci/test-definitions.git
198 10:09:23.845601 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/0/tests/1_kselftest-filesystems'
199 10:09:29.418593 Running '/usr/bin/git checkout kernelci.org
200 10:09:29.567124 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
201 10:09:29.567876 uuid=12522701_1.5.2.3.5 testdef=None
202 10:09:29.568036 end: 1.5.2.3.5 git-repo-action (duration 00:00:06) [common]
204 10:09:29.568336 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
205 10:09:29.569093 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 10:09:29.569327 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
208 10:09:29.570289 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 10:09:29.570525 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
211 10:09:29.571458 runner path: /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/0/tests/1_kselftest-filesystems test_uuid 12522701_1.5.2.3.5
212 10:09:29.571551 BOARD='asus-C436FA-Flip-hatch'
213 10:09:29.571616 BRANCH='cip'
214 10:09:29.571676 SKIPFILE='/dev/null'
215 10:09:29.571733 SKIP_INSTALL='True'
216 10:09:29.571789 TESTPROG_URL='None'
217 10:09:29.571845 TST_CASENAME=''
218 10:09:29.571900 TST_CMDFILES='filesystems'
219 10:09:29.572040 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 10:09:29.572249 Creating lava-test-runner.conf files
222 10:09:29.572315 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12522701/lava-overlay-tfuj4o3h/lava-12522701/0 for stage 0
223 10:09:29.572409 - 0_timesync-off
224 10:09:29.572474 - 1_kselftest-filesystems
225 10:09:29.572570 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
226 10:09:29.572657 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
227 10:09:36.924428 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
228 10:09:36.924588 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
229 10:09:36.924678 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 10:09:36.924775 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
231 10:09:36.924864 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
232 10:09:37.060978 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 10:09:37.061375 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
234 10:09:37.061486 extracting modules file /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12522701/extract-nfsrootfs-o54cebwo
235 10:09:37.082004 extracting modules file /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12522701/extract-overlay-ramdisk-6yo9gpdo/ramdisk
236 10:09:37.102842 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 10:09:37.102980 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
238 10:09:37.103076 [common] Applying overlay to NFS
239 10:09:37.103148 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12522701/compress-overlay-9919zio6/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12522701/extract-nfsrootfs-o54cebwo
240 10:09:38.023077 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 10:09:38.023245 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
242 10:09:38.023340 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 10:09:38.023431 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
244 10:09:38.023510 Building ramdisk /var/lib/lava/dispatcher/tmp/12522701/extract-overlay-ramdisk-6yo9gpdo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12522701/extract-overlay-ramdisk-6yo9gpdo/ramdisk
245 10:09:38.114341 >> 30353 blocks
246 10:09:38.698039 rename /var/lib/lava/dispatcher/tmp/12522701/extract-overlay-ramdisk-6yo9gpdo/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/ramdisk/ramdisk.cpio.gz
247 10:09:38.698486 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 10:09:38.698597 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
249 10:09:38.698693 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
250 10:09:38.698786 No mkimage arch provided, not using FIT.
251 10:09:38.698899 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 10:09:38.699047 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 10:09:38.699171 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
254 10:09:38.699264 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 10:09:38.699342 No LXC device requested
256 10:09:38.699422 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 10:09:38.699517 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 10:09:38.699595 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 10:09:38.699667 Checking files for TFTP limit of 4294967296 bytes.
260 10:09:38.700111 end: 1 tftp-deploy (duration 00:00:27) [common]
261 10:09:38.700241 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 10:09:38.700331 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 10:09:38.700455 substitutions:
264 10:09:38.700520 - {DTB}: None
265 10:09:38.700581 - {INITRD}: 12522701/tftp-deploy-mlp5jx7d/ramdisk/ramdisk.cpio.gz
266 10:09:38.700641 - {KERNEL}: 12522701/tftp-deploy-mlp5jx7d/kernel/bzImage
267 10:09:38.700698 - {LAVA_MAC}: None
268 10:09:38.700754 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12522701/extract-nfsrootfs-o54cebwo
269 10:09:38.700809 - {NFS_SERVER_IP}: 192.168.201.1
270 10:09:38.700864 - {PRESEED_CONFIG}: None
271 10:09:38.700919 - {PRESEED_LOCAL}: None
272 10:09:38.700973 - {RAMDISK}: 12522701/tftp-deploy-mlp5jx7d/ramdisk/ramdisk.cpio.gz
273 10:09:38.701027 - {ROOT_PART}: None
274 10:09:38.701080 - {ROOT}: None
275 10:09:38.701134 - {SERVER_IP}: 192.168.201.1
276 10:09:38.701186 - {TEE}: None
277 10:09:38.701239 Parsed boot commands:
278 10:09:38.701292 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 10:09:38.701470 Parsed boot commands: tftpboot 192.168.201.1 12522701/tftp-deploy-mlp5jx7d/kernel/bzImage 12522701/tftp-deploy-mlp5jx7d/kernel/cmdline 12522701/tftp-deploy-mlp5jx7d/ramdisk/ramdisk.cpio.gz
280 10:09:38.701555 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 10:09:38.701640 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 10:09:38.701731 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 10:09:38.701814 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 10:09:38.701885 Not connected, no need to disconnect.
285 10:09:38.701957 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 10:09:38.702038 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 10:09:38.702106 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
288 10:09:38.706284 Setting prompt string to ['lava-test: # ']
289 10:09:38.706655 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 10:09:38.706796 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 10:09:38.706921 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 10:09:38.707041 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 10:09:38.707362 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
294 10:09:43.847936 >> Command sent successfully.
295 10:09:43.851812 Returned 0 in 5 seconds
296 10:09:43.952332 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 10:09:43.952721 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 10:09:43.952850 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 10:09:43.952964 Setting prompt string to 'Starting depthcharge on Helios...'
301 10:09:43.953051 Changing prompt to 'Starting depthcharge on Helios...'
302 10:09:43.953137 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 10:09:43.953448 [Enter `^Ec?' for help]
304 10:09:44.579575
305 10:09:44.580339
306 10:09:44.589017 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 10:09:44.592957 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 10:09:44.599202 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 10:09:44.602809 CPU: AES supported, TXT NOT supported, VT supported
310 10:09:44.609448 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 10:09:44.612600 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 10:09:44.619964 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 10:09:44.622501 VBOOT: Loading verstage.
314 10:09:44.626279 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 10:09:44.632460 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 10:09:44.636892 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 10:09:44.638947 CBFS @ c08000 size 3f8000
318 10:09:44.646118 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 10:09:44.649662 CBFS: Locating 'fallback/verstage'
320 10:09:44.652450 CBFS: Found @ offset 10fb80 size 1072c
321 10:09:44.655864
322 10:09:44.656502
323 10:09:44.665884 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 10:09:44.680337 Probing TPM: . done!
325 10:09:44.683869 TPM ready after 0 ms
326 10:09:44.687427 Connected to device vid:did:rid of 1ae0:0028:00
327 10:09:44.697159 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 10:09:44.700362 Initialized TPM device CR50 revision 0
329 10:09:44.749095 tlcl_send_startup: Startup return code is 0
330 10:09:44.749692 TPM: setup succeeded
331 10:09:44.761195 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 10:09:44.765252 Chrome EC: UHEPI supported
333 10:09:44.768988 Phase 1
334 10:09:44.771507 FMAP: area GBB found @ c05000 (12288 bytes)
335 10:09:44.778522 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 10:09:44.779103 Phase 2
337 10:09:44.781845 Phase 3
338 10:09:44.785493 FMAP: area GBB found @ c05000 (12288 bytes)
339 10:09:44.792520 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 10:09:44.799110 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
341 10:09:44.802116 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
342 10:09:44.808672 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 10:09:44.825034 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
344 10:09:44.827947 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
345 10:09:44.835131 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 10:09:44.838661 Phase 4
347 10:09:44.841801 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
348 10:09:44.848213 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 10:09:45.027755 VB2:vb2_rsa_verify_digest() Digest check failed!
350 10:09:45.034163 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 10:09:45.034726 Saving nvdata
352 10:09:45.037222 Reboot requested (10020007)
353 10:09:45.040704 board_reset() called!
354 10:09:45.041291 full_reset() called!
355 10:09:49.545961
356 10:09:49.546481
357 10:09:49.555880 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 10:09:49.559459 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 10:09:49.566321 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 10:09:49.569209 CPU: AES supported, TXT NOT supported, VT supported
361 10:09:49.576130 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 10:09:49.579404 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 10:09:49.586820 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 10:09:49.589796 VBOOT: Loading verstage.
365 10:09:49.594613 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 10:09:49.599923 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 10:09:49.602917 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 10:09:49.606488 CBFS @ c08000 size 3f8000
369 10:09:49.612711 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 10:09:49.616180 CBFS: Locating 'fallback/verstage'
371 10:09:49.619283 CBFS: Found @ offset 10fb80 size 1072c
372 10:09:49.623251
373 10:09:49.623827
374 10:09:49.632891 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 10:09:49.647065 Probing TPM: . done!
376 10:09:49.650802 TPM ready after 0 ms
377 10:09:49.653799 Connected to device vid:did:rid of 1ae0:0028:00
378 10:09:49.664278 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
379 10:09:49.667850 Initialized TPM device CR50 revision 0
380 10:09:49.716246 tlcl_send_startup: Startup return code is 0
381 10:09:49.716830 TPM: setup succeeded
382 10:09:49.728657 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 10:09:49.732233 Chrome EC: UHEPI supported
384 10:09:49.735597 Phase 1
385 10:09:49.739174 FMAP: area GBB found @ c05000 (12288 bytes)
386 10:09:49.746199 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 10:09:49.752652 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 10:09:49.755624 Recovery requested (1009000e)
389 10:09:49.761301 Saving nvdata
390 10:09:49.767194 tlcl_extend: response is 0
391 10:09:49.776614 tlcl_extend: response is 0
392 10:09:49.783288 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 10:09:49.786554 CBFS @ c08000 size 3f8000
394 10:09:49.793257 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 10:09:49.796176 CBFS: Locating 'fallback/romstage'
396 10:09:49.799976 CBFS: Found @ offset 80 size 145fc
397 10:09:49.803451 Accumulated console time in verstage 98 ms
398 10:09:49.804037
399 10:09:49.804465
400 10:09:49.816176 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 10:09:49.823002 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 10:09:49.826649 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 10:09:49.829882 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 10:09:49.836790 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 10:09:49.839856 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 10:09:49.842793 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 10:09:49.845896 TCO_STS: 0000 0000
408 10:09:49.849342 GEN_PMCON: e0015238 00000200
409 10:09:49.852421 GBLRST_CAUSE: 00000000 00000000
410 10:09:49.852898 prev_sleep_state 5
411 10:09:49.855961 Boot Count incremented to 75998
412 10:09:49.862990 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 10:09:49.866440 CBFS @ c08000 size 3f8000
414 10:09:49.872812 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 10:09:49.873374 CBFS: Locating 'fspm.bin'
416 10:09:49.875951 CBFS: Found @ offset 5ffc0 size 71000
417 10:09:49.880774 Chrome EC: UHEPI supported
418 10:09:49.887868 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 10:09:49.892658 Probing TPM: done!
420 10:09:49.899640 Connected to device vid:did:rid of 1ae0:0028:00
421 10:09:49.909506 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
422 10:09:49.915293 Initialized TPM device CR50 revision 0
423 10:09:49.924781 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 10:09:49.931316 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 10:09:49.934477 MRC cache found, size 1948
426 10:09:49.937927 bootmode is set to: 2
427 10:09:49.941365 PRMRR disabled by config.
428 10:09:49.941939 SPD INDEX = 1
429 10:09:49.947615 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 10:09:49.951659 CBFS @ c08000 size 3f8000
431 10:09:49.957939 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 10:09:49.958420 CBFS: Locating 'spd.bin'
433 10:09:49.960564 CBFS: Found @ offset 5fb80 size 400
434 10:09:49.964223 SPD: module type is LPDDR3
435 10:09:49.967834 SPD: module part is
436 10:09:49.974161 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 10:09:49.977598 SPD: device width 4 bits, bus width 8 bits
438 10:09:49.980973 SPD: module size is 4096 MB (per channel)
439 10:09:49.984086 memory slot: 0 configuration done.
440 10:09:49.987786 memory slot: 2 configuration done.
441 10:09:50.038701 CBMEM:
442 10:09:50.041917 IMD: root @ 99fff000 254 entries.
443 10:09:50.044976 IMD: root @ 99ffec00 62 entries.
444 10:09:50.048325 External stage cache:
445 10:09:50.052043 IMD: root @ 9abff000 254 entries.
446 10:09:50.055243 IMD: root @ 9abfec00 62 entries.
447 10:09:50.061833 Chrome EC: clear events_b mask to 0x0000000020004000
448 10:09:50.074690 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 10:09:50.088031 tlcl_write: response is 0
450 10:09:50.097003 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 10:09:50.103564 MRC: TPM MRC hash updated successfully.
452 10:09:50.104206 2 DIMMs found
453 10:09:50.107074 SMM Memory Map
454 10:09:50.110713 SMRAM : 0x9a000000 0x1000000
455 10:09:50.113692 Subregion 0: 0x9a000000 0xa00000
456 10:09:50.116874 Subregion 1: 0x9aa00000 0x200000
457 10:09:50.120444 Subregion 2: 0x9ac00000 0x400000
458 10:09:50.123829 top_of_ram = 0x9a000000
459 10:09:50.127363 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 10:09:50.133513 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 10:09:50.136888 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 10:09:50.143587 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 10:09:50.147186 CBFS @ c08000 size 3f8000
464 10:09:50.150522 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 10:09:50.153263 CBFS: Locating 'fallback/postcar'
466 10:09:50.159879 CBFS: Found @ offset 107000 size 4b44
467 10:09:50.163325 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 10:09:50.175837 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 10:09:50.179458 Processing 180 relocs. Offset value of 0x97c0c000
470 10:09:50.187875 Accumulated console time in romstage 286 ms
471 10:09:50.188534
472 10:09:50.188922
473 10:09:50.197987 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 10:09:50.204791 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 10:09:50.207626 CBFS @ c08000 size 3f8000
476 10:09:50.211011 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 10:09:50.217619 CBFS: Locating 'fallback/ramstage'
478 10:09:50.221326 CBFS: Found @ offset 43380 size 1b9e8
479 10:09:50.227528 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 10:09:50.259420 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 10:09:50.263392 Processing 3976 relocs. Offset value of 0x98db0000
482 10:09:50.269811 Accumulated console time in postcar 52 ms
483 10:09:50.270386
484 10:09:50.270766
485 10:09:50.279391 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 10:09:50.286009 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 10:09:50.289612 WARNING: RO_VPD is uninitialized or empty.
488 10:09:50.292618 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 10:09:50.299378 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 10:09:50.299960 Normal boot.
491 10:09:50.306332 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 10:09:50.309584 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 10:09:50.312686 CBFS @ c08000 size 3f8000
494 10:09:50.319565 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 10:09:50.322790 CBFS: Locating 'cpu_microcode_blob.bin'
496 10:09:50.325942 CBFS: Found @ offset 14700 size 2ec00
497 10:09:50.329557 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 10:09:50.333021 Skip microcode update
499 10:09:50.335807 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 10:09:50.339182 CBFS @ c08000 size 3f8000
501 10:09:50.345774 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 10:09:50.348922 CBFS: Locating 'fsps.bin'
503 10:09:50.352578 CBFS: Found @ offset d1fc0 size 35000
504 10:09:50.377461 Detected 4 core, 8 thread CPU.
505 10:09:50.381002 Setting up SMI for CPU
506 10:09:50.384380 IED base = 0x9ac00000
507 10:09:50.384948 IED size = 0x00400000
508 10:09:50.387934 Will perform SMM setup.
509 10:09:50.393996 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 10:09:50.401081 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 10:09:50.404244 Processing 16 relocs. Offset value of 0x00030000
512 10:09:50.408118 Attempting to start 7 APs
513 10:09:50.410838 Waiting for 10ms after sending INIT.
514 10:09:50.427789 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
515 10:09:50.428420 done.
516 10:09:50.430719 AP: slot 1 apic_id 3.
517 10:09:50.434091 AP: slot 3 apic_id 2.
518 10:09:50.434658 AP: slot 4 apic_id 5.
519 10:09:50.438577 AP: slot 5 apic_id 4.
520 10:09:50.440547 AP: slot 7 apic_id 7.
521 10:09:50.441027 AP: slot 6 apic_id 6.
522 10:09:50.447675 Waiting for 2nd SIPI to complete...done.
523 10:09:50.454061 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 10:09:50.460213 Processing 13 relocs. Offset value of 0x00038000
525 10:09:50.464197 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 10:09:50.470299 Installing SMM handler to 0x9a000000
527 10:09:50.477351 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 10:09:50.483529 Processing 658 relocs. Offset value of 0x9a010000
529 10:09:50.489956 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 10:09:50.493501 Processing 13 relocs. Offset value of 0x9a008000
531 10:09:50.500112 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 10:09:50.507225 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 10:09:50.513295 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 10:09:50.516850 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 10:09:50.523345 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 10:09:50.530273 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 10:09:50.533373 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 10:09:50.540439 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 10:09:50.543312 Clearing SMI status registers
540 10:09:50.546852 SMI_STS: PM1
541 10:09:50.547426 PM1_STS: PWRBTN
542 10:09:50.550794 TCO_STS: SECOND_TO
543 10:09:50.553404 New SMBASE 0x9a000000
544 10:09:50.557207 In relocation handler: CPU 0
545 10:09:50.560006 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 10:09:50.563127 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 10:09:50.567160 Relocation complete.
548 10:09:50.570591 New SMBASE 0x99fff800
549 10:09:50.571181 In relocation handler: CPU 2
550 10:09:50.576877 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
551 10:09:50.580564 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 10:09:50.583217 Relocation complete.
553 10:09:50.586848 New SMBASE 0x99ffec00
554 10:09:50.587428 In relocation handler: CPU 5
555 10:09:50.593210 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
556 10:09:50.596377 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 10:09:50.599973 Relocation complete.
558 10:09:50.600615 New SMBASE 0x99fff000
559 10:09:50.603164 In relocation handler: CPU 4
560 10:09:50.610451 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
561 10:09:50.613320 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 10:09:50.616384 Relocation complete.
563 10:09:50.616861 New SMBASE 0x99fff400
564 10:09:50.619713 In relocation handler: CPU 3
565 10:09:50.626712 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
566 10:09:50.629970 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 10:09:50.633122 Relocation complete.
568 10:09:50.633550 New SMBASE 0x99fffc00
569 10:09:50.636614 In relocation handler: CPU 1
570 10:09:50.640241 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
571 10:09:50.647174 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 10:09:50.649682 Relocation complete.
573 10:09:50.650207 New SMBASE 0x99ffe400
574 10:09:50.652967 In relocation handler: CPU 7
575 10:09:50.656014 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
576 10:09:50.662783 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 10:09:50.666142 Relocation complete.
578 10:09:50.666577 New SMBASE 0x99ffe800
579 10:09:50.669880 In relocation handler: CPU 6
580 10:09:50.673001 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
581 10:09:50.680232 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 10:09:50.680769 Relocation complete.
583 10:09:50.683372 Initializing CPU #0
584 10:09:50.686375 CPU: vendor Intel device 806ec
585 10:09:50.689806 CPU: family 06, model 8e, stepping 0c
586 10:09:50.693198 Clearing out pending MCEs
587 10:09:50.696252 Setting up local APIC...
588 10:09:50.696788 apic_id: 0x00 done.
589 10:09:50.699883 Turbo is available but hidden
590 10:09:50.703119 Turbo is available and visible
591 10:09:50.706236 VMX status: enabled
592 10:09:50.709661 IA32_FEATURE_CONTROL status: locked
593 10:09:50.712731 Skip microcode update
594 10:09:50.713168 CPU #0 initialized
595 10:09:50.715897 Initializing CPU #2
596 10:09:50.719923 Initializing CPU #4
597 10:09:50.720513 Initializing CPU #5
598 10:09:50.723437 CPU: vendor Intel device 806ec
599 10:09:50.726081 CPU: family 06, model 8e, stepping 0c
600 10:09:50.729978 CPU: vendor Intel device 806ec
601 10:09:50.732433 CPU: family 06, model 8e, stepping 0c
602 10:09:50.736034 Clearing out pending MCEs
603 10:09:50.739629 Initializing CPU #3
604 10:09:50.740209 Initializing CPU #1
605 10:09:50.742534 CPU: vendor Intel device 806ec
606 10:09:50.745957 CPU: family 06, model 8e, stepping 0c
607 10:09:50.748973 CPU: vendor Intel device 806ec
608 10:09:50.755878 CPU: family 06, model 8e, stepping 0c
609 10:09:50.756479 Clearing out pending MCEs
610 10:09:50.759197 Clearing out pending MCEs
611 10:09:50.762599 Setting up local APIC...
612 10:09:50.763148 Initializing CPU #7
613 10:09:50.765804 Initializing CPU #6
614 10:09:50.768902 CPU: vendor Intel device 806ec
615 10:09:50.773025 CPU: family 06, model 8e, stepping 0c
616 10:09:50.776335 apic_id: 0x03 done.
617 10:09:50.778939 Setting up local APIC...
618 10:09:50.779474 Clearing out pending MCEs
619 10:09:50.782334 CPU: vendor Intel device 806ec
620 10:09:50.786605 CPU: family 06, model 8e, stepping 0c
621 10:09:50.788901 Clearing out pending MCEs
622 10:09:50.792367 Setting up local APIC...
623 10:09:50.795597 Clearing out pending MCEs
624 10:09:50.799326 CPU: vendor Intel device 806ec
625 10:09:50.802687 CPU: family 06, model 8e, stepping 0c
626 10:09:50.805541 Setting up local APIC...
627 10:09:50.806082 VMX status: enabled
628 10:09:50.808989 apic_id: 0x02 done.
629 10:09:50.812734 IA32_FEATURE_CONTROL status: locked
630 10:09:50.815301 VMX status: enabled
631 10:09:50.815738 Skip microcode update
632 10:09:50.818920 IA32_FEATURE_CONTROL status: locked
633 10:09:50.822747 CPU #1 initialized
634 10:09:50.825519 Skip microcode update
635 10:09:50.826059 Setting up local APIC...
636 10:09:50.829254 CPU #3 initialized
637 10:09:50.832432 apic_id: 0x04 done.
638 10:09:50.832971 apic_id: 0x05 done.
639 10:09:50.835517 VMX status: enabled
640 10:09:50.838803 VMX status: enabled
641 10:09:50.842382 IA32_FEATURE_CONTROL status: locked
642 10:09:50.845841 IA32_FEATURE_CONTROL status: locked
643 10:09:50.846381 Skip microcode update
644 10:09:50.848692 Skip microcode update
645 10:09:50.851995 CPU #5 initialized
646 10:09:50.852566 CPU #4 initialized
647 10:09:50.855840 apic_id: 0x07 done.
648 10:09:50.858826 Clearing out pending MCEs
649 10:09:50.859367 VMX status: enabled
650 10:09:50.862845 Setting up local APIC...
651 10:09:50.865108 Setting up local APIC...
652 10:09:50.865542 apic_id: 0x06 done.
653 10:09:50.872222 IA32_FEATURE_CONTROL status: locked
654 10:09:50.872755 VMX status: enabled
655 10:09:50.875155 Skip microcode update
656 10:09:50.878895 IA32_FEATURE_CONTROL status: locked
657 10:09:50.879478 CPU #7 initialized
658 10:09:50.882286 Skip microcode update
659 10:09:50.885343 apic_id: 0x01 done.
660 10:09:50.885824 CPU #6 initialized
661 10:09:50.888449 VMX status: enabled
662 10:09:50.891948 IA32_FEATURE_CONTROL status: locked
663 10:09:50.895167 Skip microcode update
664 10:09:50.895732 CPU #2 initialized
665 10:09:50.901957 bsp_do_flight_plan done after 452 msecs.
666 10:09:50.905274 CPU: frequency set to 4200 MHz
667 10:09:50.905845 Enabling SMIs.
668 10:09:50.906223 Locking SMM.
669 10:09:50.921685 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 10:09:50.925019 CBFS @ c08000 size 3f8000
671 10:09:50.931422 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 10:09:50.931996 CBFS: Locating 'vbt.bin'
673 10:09:50.935668 CBFS: Found @ offset 5f5c0 size 499
674 10:09:50.942400 Found a VBT of 4608 bytes after decompression
675 10:09:51.126963 Display FSP Version Info HOB
676 10:09:51.130012 Reference Code - CPU = 9.0.1e.30
677 10:09:51.133580 uCode Version = 0.0.0.ca
678 10:09:51.136586 TXT ACM version = ff.ff.ff.ffff
679 10:09:51.140090 Display FSP Version Info HOB
680 10:09:51.143980 Reference Code - ME = 9.0.1e.30
681 10:09:51.146822 MEBx version = 0.0.0.0
682 10:09:51.150418 ME Firmware Version = Consumer SKU
683 10:09:51.153573 Display FSP Version Info HOB
684 10:09:51.156795 Reference Code - CML PCH = 9.0.1e.30
685 10:09:51.157268 PCH-CRID Status = Disabled
686 10:09:51.163598 PCH-CRID Original Value = ff.ff.ff.ffff
687 10:09:51.166501 PCH-CRID New Value = ff.ff.ff.ffff
688 10:09:51.169693 OPROM - RST - RAID = ff.ff.ff.ffff
689 10:09:51.173221 ChipsetInit Base Version = ff.ff.ff.ffff
690 10:09:51.176435 ChipsetInit Oem Version = ff.ff.ff.ffff
691 10:09:51.180039 Display FSP Version Info HOB
692 10:09:51.186692 Reference Code - SA - System Agent = 9.0.1e.30
693 10:09:51.189992 Reference Code - MRC = 0.7.1.6c
694 10:09:51.190564 SA - PCIe Version = 9.0.1e.30
695 10:09:51.193045 SA-CRID Status = Disabled
696 10:09:51.196424 SA-CRID Original Value = 0.0.0.c
697 10:09:51.199637 SA-CRID New Value = 0.0.0.c
698 10:09:51.203347 OPROM - VBIOS = ff.ff.ff.ffff
699 10:09:51.206622 RTC Init
700 10:09:51.209425 Set power on after power failure.
701 10:09:51.209902 Disabling Deep S3
702 10:09:51.213103 Disabling Deep S3
703 10:09:51.213528 Disabling Deep S4
704 10:09:51.216331 Disabling Deep S4
705 10:09:51.216759 Disabling Deep S5
706 10:09:51.219516 Disabling Deep S5
707 10:09:51.226298 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
708 10:09:51.226832 Enumerating buses...
709 10:09:51.232697 Show all devs... Before device enumeration.
710 10:09:51.233268 Root Device: enabled 1
711 10:09:51.236479 CPU_CLUSTER: 0: enabled 1
712 10:09:51.239595 DOMAIN: 0000: enabled 1
713 10:09:51.243174 APIC: 00: enabled 1
714 10:09:51.243741 PCI: 00:00.0: enabled 1
715 10:09:51.246450 PCI: 00:02.0: enabled 1
716 10:09:51.249364 PCI: 00:04.0: enabled 0
717 10:09:51.249934 PCI: 00:05.0: enabled 0
718 10:09:51.252873 PCI: 00:12.0: enabled 1
719 10:09:51.256713 PCI: 00:12.5: enabled 0
720 10:09:51.260309 PCI: 00:12.6: enabled 0
721 10:09:51.260878 PCI: 00:14.0: enabled 1
722 10:09:51.263461 PCI: 00:14.1: enabled 0
723 10:09:51.265969 PCI: 00:14.3: enabled 1
724 10:09:51.269791 PCI: 00:14.5: enabled 0
725 10:09:51.270359 PCI: 00:15.0: enabled 1
726 10:09:51.272627 PCI: 00:15.1: enabled 1
727 10:09:51.275821 PCI: 00:15.2: enabled 0
728 10:09:51.279444 PCI: 00:15.3: enabled 0
729 10:09:51.279916 PCI: 00:16.0: enabled 1
730 10:09:51.282576 PCI: 00:16.1: enabled 0
731 10:09:51.285879 PCI: 00:16.2: enabled 0
732 10:09:51.288928 PCI: 00:16.3: enabled 0
733 10:09:51.289400 PCI: 00:16.4: enabled 0
734 10:09:51.292785 PCI: 00:16.5: enabled 0
735 10:09:51.296238 PCI: 00:17.0: enabled 1
736 10:09:51.296800 PCI: 00:19.0: enabled 1
737 10:09:51.299917 PCI: 00:19.1: enabled 0
738 10:09:51.302658 PCI: 00:19.2: enabled 0
739 10:09:51.306010 PCI: 00:1a.0: enabled 0
740 10:09:51.306579 PCI: 00:1c.0: enabled 0
741 10:09:51.309286 PCI: 00:1c.1: enabled 0
742 10:09:51.312404 PCI: 00:1c.2: enabled 0
743 10:09:51.315980 PCI: 00:1c.3: enabled 0
744 10:09:51.316604 PCI: 00:1c.4: enabled 0
745 10:09:51.318873 PCI: 00:1c.5: enabled 0
746 10:09:51.322655 PCI: 00:1c.6: enabled 0
747 10:09:51.323232 PCI: 00:1c.7: enabled 0
748 10:09:51.326371 PCI: 00:1d.0: enabled 1
749 10:09:51.329307 PCI: 00:1d.1: enabled 0
750 10:09:51.332344 PCI: 00:1d.2: enabled 0
751 10:09:51.332913 PCI: 00:1d.3: enabled 0
752 10:09:51.335596 PCI: 00:1d.4: enabled 0
753 10:09:51.339054 PCI: 00:1d.5: enabled 1
754 10:09:51.342718 PCI: 00:1e.0: enabled 1
755 10:09:51.343286 PCI: 00:1e.1: enabled 0
756 10:09:51.345925 PCI: 00:1e.2: enabled 1
757 10:09:51.348750 PCI: 00:1e.3: enabled 1
758 10:09:51.352992 PCI: 00:1f.0: enabled 1
759 10:09:51.353563 PCI: 00:1f.1: enabled 1
760 10:09:51.355438 PCI: 00:1f.2: enabled 1
761 10:09:51.358832 PCI: 00:1f.3: enabled 1
762 10:09:51.362249 PCI: 00:1f.4: enabled 1
763 10:09:51.362726 PCI: 00:1f.5: enabled 1
764 10:09:51.365205 PCI: 00:1f.6: enabled 0
765 10:09:51.368997 USB0 port 0: enabled 1
766 10:09:51.369472 I2C: 00:15: enabled 1
767 10:09:51.371831 I2C: 00:5d: enabled 1
768 10:09:51.375665 GENERIC: 0.0: enabled 1
769 10:09:51.376299 I2C: 00:1a: enabled 1
770 10:09:51.378759 I2C: 00:38: enabled 1
771 10:09:51.382275 I2C: 00:39: enabled 1
772 10:09:51.382864 I2C: 00:3a: enabled 1
773 10:09:51.385101 I2C: 00:3b: enabled 1
774 10:09:51.389455 PCI: 00:00.0: enabled 1
775 10:09:51.390027 SPI: 00: enabled 1
776 10:09:51.392004 SPI: 01: enabled 1
777 10:09:51.395150 PNP: 0c09.0: enabled 1
778 10:09:51.395718 USB2 port 0: enabled 1
779 10:09:51.398930 USB2 port 1: enabled 1
780 10:09:51.401831 USB2 port 2: enabled 0
781 10:09:51.405754 USB2 port 3: enabled 0
782 10:09:51.406333 USB2 port 5: enabled 0
783 10:09:51.408597 USB2 port 6: enabled 1
784 10:09:51.412013 USB2 port 9: enabled 1
785 10:09:51.412650 USB3 port 0: enabled 1
786 10:09:51.415090 USB3 port 1: enabled 1
787 10:09:51.418065 USB3 port 2: enabled 1
788 10:09:51.421864 USB3 port 3: enabled 1
789 10:09:51.422436 USB3 port 4: enabled 0
790 10:09:51.425201 APIC: 03: enabled 1
791 10:09:51.425796 APIC: 01: enabled 1
792 10:09:51.428270 APIC: 02: enabled 1
793 10:09:51.431591 APIC: 05: enabled 1
794 10:09:51.432180 APIC: 04: enabled 1
795 10:09:51.435712 APIC: 06: enabled 1
796 10:09:51.438693 APIC: 07: enabled 1
797 10:09:51.439263 Compare with tree...
798 10:09:51.441805 Root Device: enabled 1
799 10:09:51.444956 CPU_CLUSTER: 0: enabled 1
800 10:09:51.445524 APIC: 00: enabled 1
801 10:09:51.448521 APIC: 03: enabled 1
802 10:09:51.452167 APIC: 01: enabled 1
803 10:09:51.452736 APIC: 02: enabled 1
804 10:09:51.455654 APIC: 05: enabled 1
805 10:09:51.458002 APIC: 04: enabled 1
806 10:09:51.458572 APIC: 06: enabled 1
807 10:09:51.461760 APIC: 07: enabled 1
808 10:09:51.465101 DOMAIN: 0000: enabled 1
809 10:09:51.468185 PCI: 00:00.0: enabled 1
810 10:09:51.468657 PCI: 00:02.0: enabled 1
811 10:09:51.472047 PCI: 00:04.0: enabled 0
812 10:09:51.474859 PCI: 00:05.0: enabled 0
813 10:09:51.478614 PCI: 00:12.0: enabled 1
814 10:09:51.481930 PCI: 00:12.5: enabled 0
815 10:09:51.482503 PCI: 00:12.6: enabled 0
816 10:09:51.485385 PCI: 00:14.0: enabled 1
817 10:09:51.487890 USB0 port 0: enabled 1
818 10:09:51.491590 USB2 port 0: enabled 1
819 10:09:51.494721 USB2 port 1: enabled 1
820 10:09:51.495196 USB2 port 2: enabled 0
821 10:09:51.498291 USB2 port 3: enabled 0
822 10:09:51.501583 USB2 port 5: enabled 0
823 10:09:51.504545 USB2 port 6: enabled 1
824 10:09:51.508206 USB2 port 9: enabled 1
825 10:09:51.511254 USB3 port 0: enabled 1
826 10:09:51.511822 USB3 port 1: enabled 1
827 10:09:51.514858 USB3 port 2: enabled 1
828 10:09:51.518191 USB3 port 3: enabled 1
829 10:09:51.521108 USB3 port 4: enabled 0
830 10:09:51.524718 PCI: 00:14.1: enabled 0
831 10:09:51.525288 PCI: 00:14.3: enabled 1
832 10:09:51.528195 PCI: 00:14.5: enabled 0
833 10:09:51.531362 PCI: 00:15.0: enabled 1
834 10:09:51.534713 I2C: 00:15: enabled 1
835 10:09:51.537762 PCI: 00:15.1: enabled 1
836 10:09:51.538330 I2C: 00:5d: enabled 1
837 10:09:51.541441 GENERIC: 0.0: enabled 1
838 10:09:51.544554 PCI: 00:15.2: enabled 0
839 10:09:51.548341 PCI: 00:15.3: enabled 0
840 10:09:51.551318 PCI: 00:16.0: enabled 1
841 10:09:51.551903 PCI: 00:16.1: enabled 0
842 10:09:51.554623 PCI: 00:16.2: enabled 0
843 10:09:51.558325 PCI: 00:16.3: enabled 0
844 10:09:51.560984 PCI: 00:16.4: enabled 0
845 10:09:51.561457 PCI: 00:16.5: enabled 0
846 10:09:51.564182 PCI: 00:17.0: enabled 1
847 10:09:51.567944 PCI: 00:19.0: enabled 1
848 10:09:51.571255 I2C: 00:1a: enabled 1
849 10:09:51.574204 I2C: 00:38: enabled 1
850 10:09:51.574677 I2C: 00:39: enabled 1
851 10:09:51.577590 I2C: 00:3a: enabled 1
852 10:09:51.581015 I2C: 00:3b: enabled 1
853 10:09:51.584778 PCI: 00:19.1: enabled 0
854 10:09:51.585364 PCI: 00:19.2: enabled 0
855 10:09:51.587522 PCI: 00:1a.0: enabled 0
856 10:09:51.590551 PCI: 00:1c.0: enabled 0
857 10:09:51.594020 PCI: 00:1c.1: enabled 0
858 10:09:51.597777 PCI: 00:1c.2: enabled 0
859 10:09:51.598349 PCI: 00:1c.3: enabled 0
860 10:09:51.601089 PCI: 00:1c.4: enabled 0
861 10:09:51.604437 PCI: 00:1c.5: enabled 0
862 10:09:51.607733 PCI: 00:1c.6: enabled 0
863 10:09:51.610796 PCI: 00:1c.7: enabled 0
864 10:09:51.611369 PCI: 00:1d.0: enabled 1
865 10:09:51.614210 PCI: 00:1d.1: enabled 0
866 10:09:51.616973 PCI: 00:1d.2: enabled 0
867 10:09:51.620849 PCI: 00:1d.3: enabled 0
868 10:09:51.624223 PCI: 00:1d.4: enabled 0
869 10:09:51.624791 PCI: 00:1d.5: enabled 1
870 10:09:51.627578 PCI: 00:00.0: enabled 1
871 10:09:51.630515 PCI: 00:1e.0: enabled 1
872 10:09:51.634005 PCI: 00:1e.1: enabled 0
873 10:09:51.637455 PCI: 00:1e.2: enabled 1
874 10:09:51.638027 SPI: 00: enabled 1
875 10:09:51.640970 PCI: 00:1e.3: enabled 1
876 10:09:51.643695 SPI: 01: enabled 1
877 10:09:51.647091 PCI: 00:1f.0: enabled 1
878 10:09:51.647660 PNP: 0c09.0: enabled 1
879 10:09:51.650229 PCI: 00:1f.1: enabled 1
880 10:09:51.653690 PCI: 00:1f.2: enabled 1
881 10:09:51.657075 PCI: 00:1f.3: enabled 1
882 10:09:51.660405 PCI: 00:1f.4: enabled 1
883 10:09:51.660971 PCI: 00:1f.5: enabled 1
884 10:09:51.663738 PCI: 00:1f.6: enabled 0
885 10:09:51.666555 Root Device scanning...
886 10:09:51.670160 scan_static_bus for Root Device
887 10:09:51.673653 CPU_CLUSTER: 0 enabled
888 10:09:51.674218 DOMAIN: 0000 enabled
889 10:09:51.677037 DOMAIN: 0000 scanning...
890 10:09:51.680249 PCI: pci_scan_bus for bus 00
891 10:09:51.683473 PCI: 00:00.0 [8086/0000] ops
892 10:09:51.686714 PCI: 00:00.0 [8086/9b61] enabled
893 10:09:51.690116 PCI: 00:02.0 [8086/0000] bus ops
894 10:09:51.693423 PCI: 00:02.0 [8086/9b41] enabled
895 10:09:51.696448 PCI: 00:04.0 [8086/1903] disabled
896 10:09:51.700536 PCI: 00:08.0 [8086/1911] enabled
897 10:09:51.703512 PCI: 00:12.0 [8086/02f9] enabled
898 10:09:51.707098 PCI: 00:14.0 [8086/0000] bus ops
899 10:09:51.710129 PCI: 00:14.0 [8086/02ed] enabled
900 10:09:51.713163 PCI: 00:14.2 [8086/02ef] enabled
901 10:09:51.716581 PCI: 00:14.3 [8086/02f0] enabled
902 10:09:51.720006 PCI: 00:15.0 [8086/0000] bus ops
903 10:09:51.723802 PCI: 00:15.0 [8086/02e8] enabled
904 10:09:51.726939 PCI: 00:15.1 [8086/0000] bus ops
905 10:09:51.730165 PCI: 00:15.1 [8086/02e9] enabled
906 10:09:51.733047 PCI: 00:16.0 [8086/0000] ops
907 10:09:51.736342 PCI: 00:16.0 [8086/02e0] enabled
908 10:09:51.739697 PCI: 00:17.0 [8086/0000] ops
909 10:09:51.743433 PCI: 00:17.0 [8086/02d3] enabled
910 10:09:51.746732 PCI: 00:19.0 [8086/0000] bus ops
911 10:09:51.750153 PCI: 00:19.0 [8086/02c5] enabled
912 10:09:51.753582 PCI: 00:1d.0 [8086/0000] bus ops
913 10:09:51.756752 PCI: 00:1d.0 [8086/02b0] enabled
914 10:09:51.760314 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 10:09:51.763264 PCI: 00:1e.0 [8086/0000] ops
916 10:09:51.766795 PCI: 00:1e.0 [8086/02a8] enabled
917 10:09:51.770166 PCI: 00:1e.2 [8086/0000] bus ops
918 10:09:51.773179 PCI: 00:1e.2 [8086/02aa] enabled
919 10:09:51.776364 PCI: 00:1e.3 [8086/0000] bus ops
920 10:09:51.779494 PCI: 00:1e.3 [8086/02ab] enabled
921 10:09:51.783009 PCI: 00:1f.0 [8086/0000] bus ops
922 10:09:51.786699 PCI: 00:1f.0 [8086/0284] enabled
923 10:09:51.792758 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 10:09:51.799535 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 10:09:51.802945 PCI: 00:1f.3 [8086/0000] bus ops
926 10:09:51.806381 PCI: 00:1f.3 [8086/02c8] enabled
927 10:09:51.809852 PCI: 00:1f.4 [8086/0000] bus ops
928 10:09:51.812771 PCI: 00:1f.4 [8086/02a3] enabled
929 10:09:51.816520 PCI: 00:1f.5 [8086/0000] bus ops
930 10:09:51.819516 PCI: 00:1f.5 [8086/02a4] enabled
931 10:09:51.823442 PCI: Leftover static devices:
932 10:09:51.824013 PCI: 00:05.0
933 10:09:51.826183 PCI: 00:12.5
934 10:09:51.826759 PCI: 00:12.6
935 10:09:51.827253 PCI: 00:14.1
936 10:09:51.829629 PCI: 00:14.5
937 10:09:51.830155 PCI: 00:15.2
938 10:09:51.833154 PCI: 00:15.3
939 10:09:51.833737 PCI: 00:16.1
940 10:09:51.834233 PCI: 00:16.2
941 10:09:51.835821 PCI: 00:16.3
942 10:09:51.836399 PCI: 00:16.4
943 10:09:51.839257 PCI: 00:16.5
944 10:09:51.839737 PCI: 00:19.1
945 10:09:51.840333 PCI: 00:19.2
946 10:09:51.842603 PCI: 00:1a.0
947 10:09:51.843175 PCI: 00:1c.0
948 10:09:51.846089 PCI: 00:1c.1
949 10:09:51.846570 PCI: 00:1c.2
950 10:09:51.849231 PCI: 00:1c.3
951 10:09:51.849807 PCI: 00:1c.4
952 10:09:51.850298 PCI: 00:1c.5
953 10:09:51.853058 PCI: 00:1c.6
954 10:09:51.853632 PCI: 00:1c.7
955 10:09:51.855777 PCI: 00:1d.1
956 10:09:51.856413 PCI: 00:1d.2
957 10:09:51.856966 PCI: 00:1d.3
958 10:09:51.859215 PCI: 00:1d.4
959 10:09:51.859699 PCI: 00:1d.5
960 10:09:51.862604 PCI: 00:1e.1
961 10:09:51.863185 PCI: 00:1f.1
962 10:09:51.863672 PCI: 00:1f.2
963 10:09:51.865862 PCI: 00:1f.6
964 10:09:51.869062 PCI: Check your devicetree.cb.
965 10:09:51.872729 PCI: 00:02.0 scanning...
966 10:09:51.875965 scan_generic_bus for PCI: 00:02.0
967 10:09:51.879084 scan_generic_bus for PCI: 00:02.0 done
968 10:09:51.885799 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
969 10:09:51.886366 PCI: 00:14.0 scanning...
970 10:09:51.888992 scan_static_bus for PCI: 00:14.0
971 10:09:51.892611 USB0 port 0 enabled
972 10:09:51.895834 USB0 port 0 scanning...
973 10:09:51.899915 scan_static_bus for USB0 port 0
974 10:09:51.900526 USB2 port 0 enabled
975 10:09:51.902520 USB2 port 1 enabled
976 10:09:51.906227 USB2 port 2 disabled
977 10:09:51.906791 USB2 port 3 disabled
978 10:09:51.909624 USB2 port 5 disabled
979 10:09:51.912531 USB2 port 6 enabled
980 10:09:51.913002 USB2 port 9 enabled
981 10:09:51.916244 USB3 port 0 enabled
982 10:09:51.916808 USB3 port 1 enabled
983 10:09:51.919500 USB3 port 2 enabled
984 10:09:51.922393 USB3 port 3 enabled
985 10:09:51.922958 USB3 port 4 disabled
986 10:09:51.925748 USB2 port 0 scanning...
987 10:09:51.929070 scan_static_bus for USB2 port 0
988 10:09:51.932262 scan_static_bus for USB2 port 0 done
989 10:09:51.939209 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
990 10:09:51.942659 USB2 port 1 scanning...
991 10:09:51.945614 scan_static_bus for USB2 port 1
992 10:09:51.948969 scan_static_bus for USB2 port 1 done
993 10:09:51.952552 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
994 10:09:51.955911 USB2 port 6 scanning...
995 10:09:51.959389 scan_static_bus for USB2 port 6
996 10:09:51.962721 scan_static_bus for USB2 port 6 done
997 10:09:51.968838 scan_bus: scanning of bus USB2 port 6 took 9712 usecs
998 10:09:51.972405 USB2 port 9 scanning...
999 10:09:51.975671 scan_static_bus for USB2 port 9
1000 10:09:51.978793 scan_static_bus for USB2 port 9 done
1001 10:09:51.982550 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
1002 10:09:51.985290 USB3 port 0 scanning...
1003 10:09:51.988696 scan_static_bus for USB3 port 0
1004 10:09:51.992170 scan_static_bus for USB3 port 0 done
1005 10:09:51.999671 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
1006 10:09:52.002614 USB3 port 1 scanning...
1007 10:09:52.005435 scan_static_bus for USB3 port 1
1008 10:09:52.009352 scan_static_bus for USB3 port 1 done
1009 10:09:52.012222 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
1010 10:09:52.015363 USB3 port 2 scanning...
1011 10:09:52.018806 scan_static_bus for USB3 port 2
1012 10:09:52.022503 scan_static_bus for USB3 port 2 done
1013 10:09:52.029544 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
1014 10:09:52.031705 USB3 port 3 scanning...
1015 10:09:52.035613 scan_static_bus for USB3 port 3
1016 10:09:52.038914 scan_static_bus for USB3 port 3 done
1017 10:09:52.042619 scan_bus: scanning of bus USB3 port 3 took 9699 usecs
1018 10:09:52.046712 scan_static_bus for USB0 port 0 done
1019 10:09:52.052167 scan_bus: scanning of bus USB0 port 0 took 155366 usecs
1020 10:09:52.055687 scan_static_bus for PCI: 00:14.0 done
1021 10:09:52.062092 scan_bus: scanning of bus PCI: 00:14.0 took 172986 usecs
1022 10:09:52.065574 PCI: 00:15.0 scanning...
1023 10:09:52.068437 scan_generic_bus for PCI: 00:15.0
1024 10:09:52.072380 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 10:09:52.075353 scan_generic_bus for PCI: 00:15.0 done
1026 10:09:52.082164 scan_bus: scanning of bus PCI: 00:15.0 took 14291 usecs
1027 10:09:52.085263 PCI: 00:15.1 scanning...
1028 10:09:52.088579 scan_generic_bus for PCI: 00:15.1
1029 10:09:52.092248 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 10:09:52.095018 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 10:09:52.101758 scan_generic_bus for PCI: 00:15.1 done
1032 10:09:52.104883 scan_bus: scanning of bus PCI: 00:15.1 took 18593 usecs
1033 10:09:52.108770 PCI: 00:19.0 scanning...
1034 10:09:52.112012 scan_generic_bus for PCI: 00:19.0
1035 10:09:52.115003 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 10:09:52.121410 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 10:09:52.125406 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 10:09:52.128553 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 10:09:52.131934 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 10:09:52.135168 scan_generic_bus for PCI: 00:19.0 done
1041 10:09:52.141901 scan_bus: scanning of bus PCI: 00:19.0 took 30730 usecs
1042 10:09:52.145243 PCI: 00:1d.0 scanning...
1043 10:09:52.148920 do_pci_scan_bridge for PCI: 00:1d.0
1044 10:09:52.151688 PCI: pci_scan_bus for bus 01
1045 10:09:52.155140 PCI: 01:00.0 [1c5c/1327] enabled
1046 10:09:52.158593 Enabling Common Clock Configuration
1047 10:09:52.161944 L1 Sub-State supported from root port 29
1048 10:09:52.164942 L1 Sub-State Support = 0xf
1049 10:09:52.168437 CommonModeRestoreTime = 0x28
1050 10:09:52.171678 Power On Value = 0x16, Power On Scale = 0x0
1051 10:09:52.174491 ASPM: Enabled L1
1052 10:09:52.181127 scan_bus: scanning of bus PCI: 00:1d.0 took 32782 usecs
1053 10:09:52.181677 PCI: 00:1e.2 scanning...
1054 10:09:52.184703 scan_generic_bus for PCI: 00:1e.2
1055 10:09:52.191450 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 10:09:52.194891 scan_generic_bus for PCI: 00:1e.2 done
1057 10:09:52.198062 scan_bus: scanning of bus PCI: 00:1e.2 took 14005 usecs
1058 10:09:52.201326 PCI: 00:1e.3 scanning...
1059 10:09:52.204700 scan_generic_bus for PCI: 00:1e.3
1060 10:09:52.208544 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 10:09:52.215046 scan_generic_bus for PCI: 00:1e.3 done
1062 10:09:52.218306 scan_bus: scanning of bus PCI: 00:1e.3 took 14015 usecs
1063 10:09:52.221263 PCI: 00:1f.0 scanning...
1064 10:09:52.224578 scan_static_bus for PCI: 00:1f.0
1065 10:09:52.228269 PNP: 0c09.0 enabled
1066 10:09:52.231659 scan_static_bus for PCI: 00:1f.0 done
1067 10:09:52.238146 scan_bus: scanning of bus PCI: 00:1f.0 took 12058 usecs
1068 10:09:52.238725 PCI: 00:1f.3 scanning...
1069 10:09:52.244849 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1070 10:09:52.248190 PCI: 00:1f.4 scanning...
1071 10:09:52.251363 scan_generic_bus for PCI: 00:1f.4
1072 10:09:52.254906 scan_generic_bus for PCI: 00:1f.4 done
1073 10:09:52.260888 scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
1074 10:09:52.265006 PCI: 00:1f.5 scanning...
1075 10:09:52.267827 scan_generic_bus for PCI: 00:1f.5
1076 10:09:52.271240 scan_generic_bus for PCI: 00:1f.5 done
1077 10:09:52.277851 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1078 10:09:52.281047 scan_bus: scanning of bus DOMAIN: 0000 took 605061 usecs
1079 10:09:52.284496 scan_static_bus for Root Device done
1080 10:09:52.291482 scan_bus: scanning of bus Root Device took 624916 usecs
1081 10:09:52.292107 done
1082 10:09:52.294631 Chrome EC: UHEPI supported
1083 10:09:52.301335 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 10:09:52.307907 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 10:09:52.314554 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 10:09:52.320774 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 10:09:52.324320 SPI flash protection: WPSW=0 SRP0=0
1088 10:09:52.327820 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 10:09:52.334460 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1090 10:09:52.337596 found VGA at PCI: 00:02.0
1091 10:09:52.340818 Setting up VGA for PCI: 00:02.0
1092 10:09:52.344833 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 10:09:52.351622 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 10:09:52.353968 Allocating resources...
1095 10:09:52.354532 Reading resources...
1096 10:09:52.357379 Root Device read_resources bus 0 link: 0
1097 10:09:52.363989 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 10:09:52.367317 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 10:09:52.373748 DOMAIN: 0000 read_resources bus 0 link: 0
1100 10:09:52.380534 PCI: 00:14.0 read_resources bus 0 link: 0
1101 10:09:52.383990 USB0 port 0 read_resources bus 0 link: 0
1102 10:09:52.391167 USB0 port 0 read_resources bus 0 link: 0 done
1103 10:09:52.395212 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 10:09:52.402049 PCI: 00:15.0 read_resources bus 1 link: 0
1105 10:09:52.405530 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 10:09:52.411717 PCI: 00:15.1 read_resources bus 2 link: 0
1107 10:09:52.415062 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 10:09:52.422281 PCI: 00:19.0 read_resources bus 3 link: 0
1109 10:09:52.429142 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 10:09:52.432633 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 10:09:52.439801 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 10:09:52.442554 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 10:09:52.449220 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 10:09:52.452889 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 10:09:52.459300 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 10:09:52.462663 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 10:09:52.469397 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 10:09:52.476451 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 10:09:52.479472 Root Device read_resources bus 0 link: 0 done
1120 10:09:52.482521 Done reading resources.
1121 10:09:52.485790 Show resources in subtree (Root Device)...After reading.
1122 10:09:52.492550 Root Device child on link 0 CPU_CLUSTER: 0
1123 10:09:52.495620 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 10:09:52.496409 APIC: 00
1125 10:09:52.498891 APIC: 03
1126 10:09:52.499358 APIC: 01
1127 10:09:52.502471 APIC: 02
1128 10:09:52.503028 APIC: 05
1129 10:09:52.503404 APIC: 04
1130 10:09:52.505513 APIC: 06
1131 10:09:52.505979 APIC: 07
1132 10:09:52.508864 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 10:09:52.565350 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 10:09:52.566328 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 10:09:52.566738 PCI: 00:00.0
1136 10:09:52.567093 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 10:09:52.567503 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 10:09:52.567853 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 10:09:52.597128 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 10:09:52.598071 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 10:09:52.598549 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 10:09:52.598941 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 10:09:52.604840 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 10:09:52.614903 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 10:09:52.624707 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 10:09:52.634703 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 10:09:52.644733 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 10:09:52.654566 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 10:09:52.664451 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 10:09:52.670681 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 10:09:52.680981 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 10:09:52.684641 PCI: 00:02.0
1153 10:09:52.694265 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 10:09:52.704132 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 10:09:52.710806 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 10:09:52.714378 PCI: 00:04.0
1157 10:09:52.714940 PCI: 00:08.0
1158 10:09:52.724506 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 10:09:52.727563 PCI: 00:12.0
1160 10:09:52.737471 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 10:09:52.741010 PCI: 00:14.0 child on link 0 USB0 port 0
1162 10:09:52.750543 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 10:09:52.754389 USB0 port 0 child on link 0 USB2 port 0
1164 10:09:52.757508 USB2 port 0
1165 10:09:52.758072 USB2 port 1
1166 10:09:52.760923 USB2 port 2
1167 10:09:52.761485 USB2 port 3
1168 10:09:52.763977 USB2 port 5
1169 10:09:52.767261 USB2 port 6
1170 10:09:52.767821 USB2 port 9
1171 10:09:52.770981 USB3 port 0
1172 10:09:52.771557 USB3 port 1
1173 10:09:52.773950 USB3 port 2
1174 10:09:52.774412 USB3 port 3
1175 10:09:52.777293 USB3 port 4
1176 10:09:52.777755 PCI: 00:14.2
1177 10:09:52.786779 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 10:09:52.796852 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 10:09:52.800594 PCI: 00:14.3
1180 10:09:52.810725 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 10:09:52.814123 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 10:09:52.823818 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 10:09:52.824433 I2C: 01:15
1184 10:09:52.830063 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 10:09:52.840335 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 10:09:52.840900 I2C: 02:5d
1187 10:09:52.843407 GENERIC: 0.0
1188 10:09:52.843902 PCI: 00:16.0
1189 10:09:52.853696 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 10:09:52.857037 PCI: 00:17.0
1191 10:09:52.863274 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 10:09:52.873287 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 10:09:52.883438 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 10:09:52.889934 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 10:09:52.899635 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 10:09:52.906700 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 10:09:52.913174 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 10:09:52.922907 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 10:09:52.923456 I2C: 03:1a
1200 10:09:52.926543 I2C: 03:38
1201 10:09:52.927099 I2C: 03:39
1202 10:09:52.930067 I2C: 03:3a
1203 10:09:52.930630 I2C: 03:3b
1204 10:09:52.932952 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 10:09:52.943805 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 10:09:52.953374 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 10:09:52.962642 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 10:09:52.963204 PCI: 01:00.0
1209 10:09:52.972876 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 10:09:52.976635 PCI: 00:1e.0
1211 10:09:52.985921 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 10:09:52.996139 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 10:09:52.999553 PCI: 00:1e.2 child on link 0 SPI: 00
1214 10:09:53.009152 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 10:09:53.012452 SPI: 00
1216 10:09:53.016108 PCI: 00:1e.3 child on link 0 SPI: 01
1217 10:09:53.025926 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 10:09:53.026493 SPI: 01
1219 10:09:53.032661 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 10:09:53.038911 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 10:09:53.049775 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 10:09:53.050330 PNP: 0c09.0
1223 10:09:53.059056 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 10:09:53.062494 PCI: 00:1f.3
1225 10:09:53.072106 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 10:09:53.081950 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 10:09:53.082691 PCI: 00:1f.4
1228 10:09:53.092294 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 10:09:53.101997 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 10:09:53.102562 PCI: 00:1f.5
1231 10:09:53.111814 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 10:09:53.119038 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 10:09:53.125010 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 10:09:53.131832 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 10:09:53.134899 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 10:09:53.138043 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 10:09:53.141590 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 10:09:53.145039 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 10:09:53.151698 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 10:09:53.158025 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 10:09:53.168616 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 10:09:53.174938 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 10:09:53.181670 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 10:09:53.187600 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 10:09:53.194719 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 10:09:53.197997 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 10:09:53.204496 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 10:09:53.207392 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 10:09:53.214478 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 10:09:53.217702 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 10:09:53.224404 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 10:09:53.227913 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 10:09:53.234048 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 10:09:53.237490 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 10:09:53.243717 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 10:09:53.247732 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 10:09:53.251551 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 10:09:53.257619 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 10:09:53.260586 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 10:09:53.267069 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 10:09:53.270856 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 10:09:53.276971 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 10:09:53.280771 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 10:09:53.287128 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 10:09:53.290638 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 10:09:53.296976 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 10:09:53.300512 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 10:09:53.307382 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 10:09:53.313698 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 10:09:53.316770 avoid_fixed_resources: DOMAIN: 0000
1271 10:09:53.323503 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 10:09:53.330316 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 10:09:53.337074 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 10:09:53.343718 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 10:09:53.353867 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 10:09:53.360481 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 10:09:53.367008 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 10:09:53.377288 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 10:09:53.383113 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 10:09:53.389687 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 10:09:53.397234 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 10:09:53.406695 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 10:09:53.407269 Setting resources...
1284 10:09:53.413765 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 10:09:53.416673 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 10:09:53.423036 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 10:09:53.426794 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 10:09:53.429968 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 10:09:53.436857 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 10:09:53.443308 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 10:09:53.449988 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 10:09:53.456573 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 10:09:53.463471 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 10:09:53.466663 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 10:09:53.472877 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 10:09:53.476534 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 10:09:53.479786 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 10:09:53.486586 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 10:09:53.489786 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 10:09:53.496365 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 10:09:53.499618 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 10:09:53.505759 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 10:09:53.509238 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 10:09:53.516230 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 10:09:53.519749 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 10:09:53.526154 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 10:09:53.529648 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 10:09:53.536171 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 10:09:53.539604 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 10:09:53.542661 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 10:09:53.549639 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 10:09:53.552802 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 10:09:53.559600 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 10:09:53.563186 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 10:09:53.569024 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 10:09:53.576124 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 10:09:53.582690 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 10:09:53.592501 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 10:09:53.599048 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 10:09:53.602870 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 10:09:53.611950 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 10:09:53.616037 Root Device assign_resources, bus 0 link: 0
1323 10:09:53.618917 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 10:09:53.628584 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 10:09:53.635278 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 10:09:53.645531 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 10:09:53.652196 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 10:09:53.661693 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 10:09:53.669019 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 10:09:53.674929 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 10:09:53.678047 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 10:09:53.688283 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 10:09:53.695062 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 10:09:53.702044 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 10:09:53.711961 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 10:09:53.715725 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 10:09:53.721552 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 10:09:53.728655 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 10:09:53.731681 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 10:09:53.739102 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 10:09:53.746110 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 10:09:53.755436 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 10:09:53.761866 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 10:09:53.768527 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 10:09:53.777985 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 10:09:53.785045 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 10:09:53.792142 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 10:09:53.801985 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 10:09:53.805554 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 10:09:53.811728 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 10:09:53.818611 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 10:09:53.828266 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 10:09:53.838143 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 10:09:53.841313 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 10:09:53.848270 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 10:09:53.854435 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 10:09:53.861311 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 10:09:53.870714 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 10:09:53.874597 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 10:09:53.880499 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 10:09:53.887047 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 10:09:53.893823 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 10:09:53.897123 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 10:09:53.903620 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 10:09:53.907307 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 10:09:53.913927 LPC: Trying to open IO window from 800 size 1ff
1367 10:09:53.919935 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 10:09:53.927317 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 10:09:53.937037 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 10:09:53.943604 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 10:09:53.950274 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 10:09:53.953877 Root Device assign_resources, bus 0 link: 0
1373 10:09:53.957140 Done setting resources.
1374 10:09:53.963582 Show resources in subtree (Root Device)...After assigning values.
1375 10:09:53.967043 Root Device child on link 0 CPU_CLUSTER: 0
1376 10:09:53.973152 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 10:09:53.973619 APIC: 00
1378 10:09:53.973986 APIC: 03
1379 10:09:53.976945 APIC: 01
1380 10:09:53.977494 APIC: 02
1381 10:09:53.977864 APIC: 05
1382 10:09:53.980111 APIC: 04
1383 10:09:53.980573 APIC: 06
1384 10:09:53.983336 APIC: 07
1385 10:09:53.987087 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 10:09:53.996713 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 10:09:54.006589 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 10:09:54.010284 PCI: 00:00.0
1389 10:09:54.019981 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 10:09:54.026468 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 10:09:54.036434 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 10:09:54.046147 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 10:09:54.055679 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 10:09:54.065801 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 10:09:54.075894 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 10:09:54.082190 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 10:09:54.092285 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 10:09:54.101858 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 10:09:54.111977 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 10:09:54.121646 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 10:09:54.131320 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 10:09:54.141882 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 10:09:54.147878 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 10:09:54.158237 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 10:09:54.161110 PCI: 00:02.0
1406 10:09:54.171280 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 10:09:54.181194 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 10:09:54.191063 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 10:09:54.191165 PCI: 00:04.0
1410 10:09:54.194529 PCI: 00:08.0
1411 10:09:54.203923 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 10:09:54.204013 PCI: 00:12.0
1413 10:09:54.217316 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 10:09:54.220802 PCI: 00:14.0 child on link 0 USB0 port 0
1415 10:09:54.230797 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 10:09:54.233968 USB0 port 0 child on link 0 USB2 port 0
1417 10:09:54.237175 USB2 port 0
1418 10:09:54.237259 USB2 port 1
1419 10:09:54.240442 USB2 port 2
1420 10:09:54.243807 USB2 port 3
1421 10:09:54.243894 USB2 port 5
1422 10:09:54.247129 USB2 port 6
1423 10:09:54.247211 USB2 port 9
1424 10:09:54.250730 USB3 port 0
1425 10:09:54.250813 USB3 port 1
1426 10:09:54.253954 USB3 port 2
1427 10:09:54.254036 USB3 port 3
1428 10:09:54.257024 USB3 port 4
1429 10:09:54.257107 PCI: 00:14.2
1430 10:09:54.267185 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 10:09:54.277113 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 10:09:54.279987 PCI: 00:14.3
1433 10:09:54.290089 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 10:09:54.294313 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 10:09:54.307189 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 10:09:54.307619 I2C: 01:15
1437 10:09:54.310526 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 10:09:54.320318 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 10:09:54.323609 I2C: 02:5d
1440 10:09:54.324028 GENERIC: 0.0
1441 10:09:54.326897 PCI: 00:16.0
1442 10:09:54.336637 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 10:09:54.340035 PCI: 00:17.0
1444 10:09:54.349820 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 10:09:54.359728 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 10:09:54.366151 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 10:09:54.376435 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 10:09:54.385789 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 10:09:54.395883 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 10:09:54.399257 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 10:09:54.409772 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 10:09:54.412280 I2C: 03:1a
1453 10:09:54.412414 I2C: 03:38
1454 10:09:54.415872 I2C: 03:39
1455 10:09:54.415974 I2C: 03:3a
1456 10:09:54.419410 I2C: 03:3b
1457 10:09:54.422514 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 10:09:54.432510 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 10:09:54.442149 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 10:09:54.452397 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 10:09:54.455856 PCI: 01:00.0
1462 10:09:54.465538 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 10:09:54.465728 PCI: 00:1e.0
1464 10:09:54.478832 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 10:09:54.488318 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 10:09:54.491687 PCI: 00:1e.2 child on link 0 SPI: 00
1467 10:09:54.502224 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 10:09:54.502339 SPI: 00
1469 10:09:54.509622 PCI: 00:1e.3 child on link 0 SPI: 01
1470 10:09:54.518645 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 10:09:54.518796 SPI: 01
1472 10:09:54.525001 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 10:09:54.532205 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 10:09:54.541677 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 10:09:54.541846 PNP: 0c09.0
1476 10:09:54.551872 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 10:09:54.552043 PCI: 00:1f.3
1478 10:09:54.565157 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 10:09:54.575005 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 10:09:54.575218 PCI: 00:1f.4
1481 10:09:54.584636 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 10:09:54.595226 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 10:09:54.598628 PCI: 00:1f.5
1484 10:09:54.608559 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 10:09:54.611492 Done allocating resources.
1486 10:09:54.614762 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 10:09:54.617936 Enabling resources...
1488 10:09:54.621452 PCI: 00:00.0 subsystem <- 8086/9b61
1489 10:09:54.624976 PCI: 00:00.0 cmd <- 06
1490 10:09:54.628414 PCI: 00:02.0 subsystem <- 8086/9b41
1491 10:09:54.631496 PCI: 00:02.0 cmd <- 03
1492 10:09:54.634689 PCI: 00:08.0 cmd <- 06
1493 10:09:54.638305 PCI: 00:12.0 subsystem <- 8086/02f9
1494 10:09:54.641381 PCI: 00:12.0 cmd <- 02
1495 10:09:54.645603 PCI: 00:14.0 subsystem <- 8086/02ed
1496 10:09:54.648229 PCI: 00:14.0 cmd <- 02
1497 10:09:54.648780 PCI: 00:14.2 cmd <- 02
1498 10:09:54.655066 PCI: 00:14.3 subsystem <- 8086/02f0
1499 10:09:54.655623 PCI: 00:14.3 cmd <- 02
1500 10:09:54.658160 PCI: 00:15.0 subsystem <- 8086/02e8
1501 10:09:54.661256 PCI: 00:15.0 cmd <- 02
1502 10:09:54.665021 PCI: 00:15.1 subsystem <- 8086/02e9
1503 10:09:54.668401 PCI: 00:15.1 cmd <- 02
1504 10:09:54.671738 PCI: 00:16.0 subsystem <- 8086/02e0
1505 10:09:54.675287 PCI: 00:16.0 cmd <- 02
1506 10:09:54.678249 PCI: 00:17.0 subsystem <- 8086/02d3
1507 10:09:54.681106 PCI: 00:17.0 cmd <- 03
1508 10:09:54.684525 PCI: 00:19.0 subsystem <- 8086/02c5
1509 10:09:54.688523 PCI: 00:19.0 cmd <- 02
1510 10:09:54.691343 PCI: 00:1d.0 bridge ctrl <- 0013
1511 10:09:54.694792 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 10:09:54.697915 PCI: 00:1d.0 cmd <- 06
1513 10:09:54.700843 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 10:09:54.701397 PCI: 00:1e.0 cmd <- 06
1515 10:09:54.708177 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 10:09:54.708745 PCI: 00:1e.2 cmd <- 06
1517 10:09:54.711708 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 10:09:54.714482 PCI: 00:1e.3 cmd <- 02
1519 10:09:54.718372 PCI: 00:1f.0 subsystem <- 8086/0284
1520 10:09:54.720893 PCI: 00:1f.0 cmd <- 407
1521 10:09:54.724856 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 10:09:54.727370 PCI: 00:1f.3 cmd <- 02
1523 10:09:54.731133 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 10:09:54.735450 PCI: 00:1f.4 cmd <- 03
1525 10:09:54.738292 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 10:09:54.740712 PCI: 00:1f.5 cmd <- 406
1527 10:09:54.749144 PCI: 01:00.0 cmd <- 02
1528 10:09:54.754545 done.
1529 10:09:54.765724 ME: Version: 14.0.39.1367
1530 10:09:54.772405 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1531 10:09:54.775922 Initializing devices...
1532 10:09:54.776521 Root Device init ...
1533 10:09:54.782127 Chrome EC: Set SMI mask to 0x0000000000000000
1534 10:09:54.785266 Chrome EC: clear events_b mask to 0x0000000000000000
1535 10:09:54.792828 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 10:09:54.798979 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 10:09:54.805230 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 10:09:54.808779 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 10:09:54.811703 Root Device init finished in 35165 usecs
1540 10:09:54.815179 CPU_CLUSTER: 0 init ...
1541 10:09:54.821774 CPU_CLUSTER: 0 init finished in 2439 usecs
1542 10:09:54.826215 PCI: 00:00.0 init ...
1543 10:09:54.829716 CPU TDP: 15 Watts
1544 10:09:54.832774 CPU PL2 = 64 Watts
1545 10:09:54.836221 PCI: 00:00.0 init finished in 7071 usecs
1546 10:09:54.839636 PCI: 00:02.0 init ...
1547 10:09:54.843361 PCI: 00:02.0 init finished in 2244 usecs
1548 10:09:54.846639 PCI: 00:08.0 init ...
1549 10:09:54.850300 PCI: 00:08.0 init finished in 2252 usecs
1550 10:09:54.852762 PCI: 00:12.0 init ...
1551 10:09:54.856119 PCI: 00:12.0 init finished in 2252 usecs
1552 10:09:54.859733 PCI: 00:14.0 init ...
1553 10:09:54.862970 PCI: 00:14.0 init finished in 2253 usecs
1554 10:09:54.866163 PCI: 00:14.2 init ...
1555 10:09:54.869382 PCI: 00:14.2 init finished in 2253 usecs
1556 10:09:54.872702 PCI: 00:14.3 init ...
1557 10:09:54.876159 PCI: 00:14.3 init finished in 2270 usecs
1558 10:09:54.879265 PCI: 00:15.0 init ...
1559 10:09:54.882683 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 10:09:54.885535 PCI: 00:15.0 init finished in 5967 usecs
1561 10:09:54.889029 PCI: 00:15.1 init ...
1562 10:09:54.892702 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 10:09:54.898993 PCI: 00:15.1 init finished in 5976 usecs
1564 10:09:54.899558 PCI: 00:16.0 init ...
1565 10:09:54.905970 PCI: 00:16.0 init finished in 2243 usecs
1566 10:09:54.906531 PCI: 00:19.0 init ...
1567 10:09:54.912286 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 10:09:54.915817 PCI: 00:19.0 init finished in 5975 usecs
1569 10:09:54.919125 PCI: 00:1d.0 init ...
1570 10:09:54.922489 Initializing PCH PCIe bridge.
1571 10:09:54.925260 PCI: 00:1d.0 init finished in 5286 usecs
1572 10:09:54.928858 PCI: 00:1f.0 init ...
1573 10:09:54.932028 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 10:09:54.938444 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 10:09:54.938989 IOAPIC: ID = 0x02
1576 10:09:54.941832 IOAPIC: Dumping registers
1577 10:09:54.945121 reg 0x0000: 0x02000000
1578 10:09:54.948532 reg 0x0001: 0x00770020
1579 10:09:54.949006 reg 0x0002: 0x00000000
1580 10:09:54.955269 PCI: 00:1f.0 init finished in 23544 usecs
1581 10:09:54.958694 PCI: 00:1f.4 init ...
1582 10:09:54.961736 PCI: 00:1f.4 init finished in 2263 usecs
1583 10:09:54.972093 PCI: 01:00.0 init ...
1584 10:09:54.976013 PCI: 01:00.0 init finished in 2253 usecs
1585 10:09:54.979845 PNP: 0c09.0 init ...
1586 10:09:54.983142 Google Chrome EC uptime: 11.103 seconds
1587 10:09:54.989714 Google Chrome AP resets since EC boot: 0
1588 10:09:54.993004 Google Chrome most recent AP reset causes:
1589 10:09:54.999806 Google Chrome EC reset flags at last EC boot: reset-pin
1590 10:09:55.002703 PNP: 0c09.0 init finished in 20601 usecs
1591 10:09:55.006935 Devices initialized
1592 10:09:55.009727 Show all devs... After init.
1593 10:09:55.010284 Root Device: enabled 1
1594 10:09:55.012953 CPU_CLUSTER: 0: enabled 1
1595 10:09:55.016257 DOMAIN: 0000: enabled 1
1596 10:09:55.016809 APIC: 00: enabled 1
1597 10:09:55.019770 PCI: 00:00.0: enabled 1
1598 10:09:55.022569 PCI: 00:02.0: enabled 1
1599 10:09:55.026197 PCI: 00:04.0: enabled 0
1600 10:09:55.026654 PCI: 00:05.0: enabled 0
1601 10:09:55.029722 PCI: 00:12.0: enabled 1
1602 10:09:55.032672 PCI: 00:12.5: enabled 0
1603 10:09:55.036217 PCI: 00:12.6: enabled 0
1604 10:09:55.036894 PCI: 00:14.0: enabled 1
1605 10:09:55.039181 PCI: 00:14.1: enabled 0
1606 10:09:55.042541 PCI: 00:14.3: enabled 1
1607 10:09:55.043101 PCI: 00:14.5: enabled 0
1608 10:09:55.046008 PCI: 00:15.0: enabled 1
1609 10:09:55.049300 PCI: 00:15.1: enabled 1
1610 10:09:55.052586 PCI: 00:15.2: enabled 0
1611 10:09:55.053044 PCI: 00:15.3: enabled 0
1612 10:09:55.056417 PCI: 00:16.0: enabled 1
1613 10:09:55.059228 PCI: 00:16.1: enabled 0
1614 10:09:55.062502 PCI: 00:16.2: enabled 0
1615 10:09:55.062985 PCI: 00:16.3: enabled 0
1616 10:09:55.066233 PCI: 00:16.4: enabled 0
1617 10:09:55.068898 PCI: 00:16.5: enabled 0
1618 10:09:55.072673 PCI: 00:17.0: enabled 1
1619 10:09:55.073575 PCI: 00:19.0: enabled 1
1620 10:09:55.075962 PCI: 00:19.1: enabled 0
1621 10:09:55.078782 PCI: 00:19.2: enabled 0
1622 10:09:55.082567 PCI: 00:1a.0: enabled 0
1623 10:09:55.083115 PCI: 00:1c.0: enabled 0
1624 10:09:55.085984 PCI: 00:1c.1: enabled 0
1625 10:09:55.089232 PCI: 00:1c.2: enabled 0
1626 10:09:55.089750 PCI: 00:1c.3: enabled 0
1627 10:09:55.091867 PCI: 00:1c.4: enabled 0
1628 10:09:55.095623 PCI: 00:1c.5: enabled 0
1629 10:09:55.099403 PCI: 00:1c.6: enabled 0
1630 10:09:55.100026 PCI: 00:1c.7: enabled 0
1631 10:09:55.101890 PCI: 00:1d.0: enabled 1
1632 10:09:55.105253 PCI: 00:1d.1: enabled 0
1633 10:09:55.108802 PCI: 00:1d.2: enabled 0
1634 10:09:55.109319 PCI: 00:1d.3: enabled 0
1635 10:09:55.112425 PCI: 00:1d.4: enabled 0
1636 10:09:55.115862 PCI: 00:1d.5: enabled 0
1637 10:09:55.118770 PCI: 00:1e.0: enabled 1
1638 10:09:55.119337 PCI: 00:1e.1: enabled 0
1639 10:09:55.122622 PCI: 00:1e.2: enabled 1
1640 10:09:55.125363 PCI: 00:1e.3: enabled 1
1641 10:09:55.125920 PCI: 00:1f.0: enabled 1
1642 10:09:55.128547 PCI: 00:1f.1: enabled 0
1643 10:09:55.132128 PCI: 00:1f.2: enabled 0
1644 10:09:55.136154 PCI: 00:1f.3: enabled 1
1645 10:09:55.136708 PCI: 00:1f.4: enabled 1
1646 10:09:55.138492 PCI: 00:1f.5: enabled 1
1647 10:09:55.141591 PCI: 00:1f.6: enabled 0
1648 10:09:55.145474 USB0 port 0: enabled 1
1649 10:09:55.146028 I2C: 01:15: enabled 1
1650 10:09:55.148389 I2C: 02:5d: enabled 1
1651 10:09:55.152023 GENERIC: 0.0: enabled 1
1652 10:09:55.152625 I2C: 03:1a: enabled 1
1653 10:09:55.155242 I2C: 03:38: enabled 1
1654 10:09:55.158589 I2C: 03:39: enabled 1
1655 10:09:55.159147 I2C: 03:3a: enabled 1
1656 10:09:55.162281 I2C: 03:3b: enabled 1
1657 10:09:55.164963 PCI: 00:00.0: enabled 1
1658 10:09:55.165520 SPI: 00: enabled 1
1659 10:09:55.168550 SPI: 01: enabled 1
1660 10:09:55.171735 PNP: 0c09.0: enabled 1
1661 10:09:55.172244 USB2 port 0: enabled 1
1662 10:09:55.174968 USB2 port 1: enabled 1
1663 10:09:55.178536 USB2 port 2: enabled 0
1664 10:09:55.181585 USB2 port 3: enabled 0
1665 10:09:55.182143 USB2 port 5: enabled 0
1666 10:09:55.184732 USB2 port 6: enabled 1
1667 10:09:55.187957 USB2 port 9: enabled 1
1668 10:09:55.188491 USB3 port 0: enabled 1
1669 10:09:55.191577 USB3 port 1: enabled 1
1670 10:09:55.194772 USB3 port 2: enabled 1
1671 10:09:55.195228 USB3 port 3: enabled 1
1672 10:09:55.198235 USB3 port 4: enabled 0
1673 10:09:55.201338 APIC: 03: enabled 1
1674 10:09:55.201794 APIC: 01: enabled 1
1675 10:09:55.204864 APIC: 02: enabled 1
1676 10:09:55.208525 APIC: 05: enabled 1
1677 10:09:55.209078 APIC: 04: enabled 1
1678 10:09:55.211421 APIC: 06: enabled 1
1679 10:09:55.211979 APIC: 07: enabled 1
1680 10:09:55.215069 PCI: 00:08.0: enabled 1
1681 10:09:55.218463 PCI: 00:14.2: enabled 1
1682 10:09:55.221554 PCI: 01:00.0: enabled 1
1683 10:09:55.225355 Disabling ACPI via APMC:
1684 10:09:55.225914 done.
1685 10:09:55.231211 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 10:09:55.234898 ELOG: NV offset 0xaf0000 size 0x4000
1687 10:09:55.241371 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 10:09:55.248144 ELOG: Event(17) added with size 13 at 2024-01-13 10:09:55 UTC
1689 10:09:55.254972 ELOG: Event(92) added with size 9 at 2024-01-13 10:09:55 UTC
1690 10:09:55.261618 ELOG: Event(93) added with size 9 at 2024-01-13 10:09:55 UTC
1691 10:09:55.268942 ELOG: Event(9A) added with size 9 at 2024-01-13 10:09:55 UTC
1692 10:09:55.275135 ELOG: Event(9E) added with size 10 at 2024-01-13 10:09:55 UTC
1693 10:09:55.281392 ELOG: Event(9F) added with size 14 at 2024-01-13 10:09:55 UTC
1694 10:09:55.284282 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1695 10:09:55.292177 ELOG: Event(A1) added with size 10 at 2024-01-13 10:09:55 UTC
1696 10:09:55.302128 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 10:09:55.308750 ELOG: Event(A0) added with size 9 at 2024-01-13 10:09:55 UTC
1698 10:09:55.311603 elog_add_boot_reason: Logged dev mode boot
1699 10:09:55.314799 Finalize devices...
1700 10:09:55.315352 PCI: 00:17.0 final
1701 10:09:55.318138 Devices finalized
1702 10:09:55.321121 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 10:09:55.327595 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 10:09:55.331486 ME: HFSTS1 : 0x90000245
1705 10:09:55.334428 ME: HFSTS2 : 0x3B850126
1706 10:09:55.342001 ME: HFSTS3 : 0x00000020
1707 10:09:55.344494 ME: HFSTS4 : 0x00004800
1708 10:09:55.347946 ME: HFSTS5 : 0x00000000
1709 10:09:55.351057 ME: HFSTS6 : 0x40400006
1710 10:09:55.354239 ME: Manufacturing Mode : NO
1711 10:09:55.357525 ME: FW Partition Table : OK
1712 10:09:55.361123 ME: Bringup Loader Failure : NO
1713 10:09:55.364621 ME: Firmware Init Complete : YES
1714 10:09:55.367548 ME: Boot Options Present : NO
1715 10:09:55.370739 ME: Update In Progress : NO
1716 10:09:55.374014 ME: D0i3 Support : YES
1717 10:09:55.377832 ME: Low Power State Enabled : NO
1718 10:09:55.380658 ME: CPU Replaced : NO
1719 10:09:55.387006 ME: CPU Replacement Valid : YES
1720 10:09:55.387551 ME: Current Working State : 5
1721 10:09:55.390805 ME: Current Operation State : 1
1722 10:09:55.393797 ME: Current Operation Mode : 0
1723 10:09:55.397424 ME: Error Code : 0
1724 10:09:55.400332 ME: CPU Debug Disabled : YES
1725 10:09:55.403472 ME: TXT Support : NO
1726 10:09:55.410371 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 10:09:55.416981 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 10:09:55.417611 CBFS @ c08000 size 3f8000
1729 10:09:55.423936 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 10:09:55.427177 CBFS: Locating 'fallback/dsdt.aml'
1731 10:09:55.434640 CBFS: Found @ offset 10bb80 size 3fa5
1732 10:09:55.436739 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 10:09:55.440697 CBFS @ c08000 size 3f8000
1734 10:09:55.446988 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 10:09:55.450238 CBFS: Locating 'fallback/slic'
1736 10:09:55.453014 CBFS: 'fallback/slic' not found.
1737 10:09:55.456657 ACPI: Writing ACPI tables at 99b3e000.
1738 10:09:55.459895 ACPI: * FACS
1739 10:09:55.460496 ACPI: * DSDT
1740 10:09:55.466398 Ramoops buffer: 0x100000@0x99a3d000.
1741 10:09:55.469834 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 10:09:55.473765 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 10:09:55.476747 Google Chrome EC: version:
1744 10:09:55.480249 ro: helios_v2.0.2659-56403530b
1745 10:09:55.483498 rw: helios_v2.0.2849-c41de27e7d
1746 10:09:55.486412 running image: 1
1747 10:09:55.490139 ACPI: * FADT
1748 10:09:55.490700 SCI is IRQ9
1749 10:09:55.496407 ACPI: added table 1/32, length now 40
1750 10:09:55.496868 ACPI: * SSDT
1751 10:09:55.499720 Found 1 CPU(s) with 8 core(s) each.
1752 10:09:55.503001 Error: Could not locate 'wifi_sar' in VPD.
1753 10:09:55.509750 Checking CBFS for default SAR values
1754 10:09:55.512955 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 10:09:55.516479 CBFS @ c08000 size 3f8000
1756 10:09:55.523318 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 10:09:55.526451 CBFS: Locating 'wifi_sar_defaults.hex'
1758 10:09:55.529868 CBFS: Found @ offset 5fac0 size 77
1759 10:09:55.532987 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1760 10:09:55.539792 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1761 10:09:55.542811 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1762 10:09:55.549896 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1763 10:09:55.552755 failed to find key in VPD: dsm_calib_r0_0
1764 10:09:55.562704 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1765 10:09:55.565944 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1766 10:09:55.569245 failed to find key in VPD: dsm_calib_r0_1
1767 10:09:55.579471 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1768 10:09:55.585839 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1769 10:09:55.589217 failed to find key in VPD: dsm_calib_r0_2
1770 10:09:55.598713 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1771 10:09:55.602500 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1772 10:09:55.608903 failed to find key in VPD: dsm_calib_r0_3
1773 10:09:55.615687 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1774 10:09:55.622610 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1775 10:09:55.625568 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1776 10:09:55.632441 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1777 10:09:55.635576 EC returned error result code 1
1778 10:09:55.639133 EC returned error result code 1
1779 10:09:55.642253 EC returned error result code 1
1780 10:09:55.645167 PS2K: Bad resp from EC. Vivaldi disabled!
1781 10:09:55.652453 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1782 10:09:55.658819 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1783 10:09:55.662111 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1784 10:09:55.668886 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1785 10:09:55.672461 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1786 10:09:55.678849 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1787 10:09:55.686087 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1788 10:09:55.692115 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1789 10:09:55.694901 ACPI: added table 2/32, length now 44
1790 10:09:55.695432 ACPI: * MCFG
1791 10:09:55.701832 ACPI: added table 3/32, length now 48
1792 10:09:55.702391 ACPI: * TPM2
1793 10:09:55.705044 TPM2 log created at 99a2d000
1794 10:09:55.708602 ACPI: added table 4/32, length now 52
1795 10:09:55.711525 ACPI: * MADT
1796 10:09:55.712135 SCI is IRQ9
1797 10:09:55.715374 ACPI: added table 5/32, length now 56
1798 10:09:55.718414 current = 99b43ac0
1799 10:09:55.718982 ACPI: * DMAR
1800 10:09:55.721905 ACPI: added table 6/32, length now 60
1801 10:09:55.725386 ACPI: * IGD OpRegion
1802 10:09:55.728395 GMA: Found VBT in CBFS
1803 10:09:55.731476 GMA: Found valid VBT in CBFS
1804 10:09:55.734957 ACPI: added table 7/32, length now 64
1805 10:09:55.735520 ACPI: * HPET
1806 10:09:55.738588 ACPI: added table 8/32, length now 68
1807 10:09:55.741246 ACPI: done.
1808 10:09:55.744988 ACPI tables: 31744 bytes.
1809 10:09:55.748614 smbios_write_tables: 99a2c000
1810 10:09:55.751209 EC returned error result code 3
1811 10:09:55.755123 Couldn't obtain OEM name from CBI
1812 10:09:55.758472 Create SMBIOS type 17
1813 10:09:55.761407 PCI: 00:00.0 (Intel Cannonlake)
1814 10:09:55.761976 PCI: 00:14.3 (Intel WiFi)
1815 10:09:55.764846 SMBIOS tables: 939 bytes.
1816 10:09:55.768788 Writing table forward entry at 0x00000500
1817 10:09:55.774785 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 10:09:55.778242 Writing coreboot table at 0x99b62000
1819 10:09:55.785014 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 10:09:55.787706 1. 0000000000001000-000000000009ffff: RAM
1821 10:09:55.794661 2. 00000000000a0000-00000000000fffff: RESERVED
1822 10:09:55.797802 3. 0000000000100000-0000000099a2bfff: RAM
1823 10:09:55.804393 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 10:09:55.807723 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 10:09:55.814278 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 10:09:55.820543 7. 000000009a000000-000000009f7fffff: RESERVED
1827 10:09:55.823967 8. 00000000e0000000-00000000efffffff: RESERVED
1828 10:09:55.828164 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 10:09:55.834435 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 10:09:55.837524 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 10:09:55.844430 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 10:09:55.847491 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 10:09:55.854369 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 10:09:55.857014 15. 0000000100000000-000000045e7fffff: RAM
1835 10:09:55.860638 Graphics framebuffer located at 0xc0000000
1836 10:09:55.863910 Passing 5 GPIOs to payload:
1837 10:09:55.870779 NAME | PORT | POLARITY | VALUE
1838 10:09:55.874120 write protect | undefined | high | low
1839 10:09:55.880974 lid | undefined | high | high
1840 10:09:55.886568 power | undefined | high | low
1841 10:09:55.891029 oprom | undefined | high | low
1842 10:09:55.896649 EC in RW | 0x000000cb | high | low
1843 10:09:55.897212 Board ID: 4
1844 10:09:55.903322 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 10:09:55.903909 CBFS @ c08000 size 3f8000
1846 10:09:55.910044 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 10:09:55.916708 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1848 10:09:55.919768 coreboot table: 1492 bytes.
1849 10:09:55.923421 IMD ROOT 0. 99fff000 00001000
1850 10:09:55.927175 IMD SMALL 1. 99ffe000 00001000
1851 10:09:55.929575 FSP MEMORY 2. 99c4e000 003b0000
1852 10:09:55.933082 CONSOLE 3. 99c2e000 00020000
1853 10:09:55.937277 FMAP 4. 99c2d000 0000054e
1854 10:09:55.939964 TIME STAMP 5. 99c2c000 00000910
1855 10:09:55.943408 VBOOT WORK 6. 99c18000 00014000
1856 10:09:55.946763 MRC DATA 7. 99c16000 00001958
1857 10:09:55.949990 ROMSTG STCK 8. 99c15000 00001000
1858 10:09:55.953017 AFTER CAR 9. 99c0b000 0000a000
1859 10:09:55.956898 RAMSTAGE 10. 99baf000 0005c000
1860 10:09:55.959844 REFCODE 11. 99b7a000 00035000
1861 10:09:55.963588 SMM BACKUP 12. 99b6a000 00010000
1862 10:09:55.967018 COREBOOT 13. 99b62000 00008000
1863 10:09:55.970028 ACPI 14. 99b3e000 00024000
1864 10:09:55.973729 ACPI GNVS 15. 99b3d000 00001000
1865 10:09:55.976214 RAMOOPS 16. 99a3d000 00100000
1866 10:09:55.980228 TPM2 TCGLOG17. 99a2d000 00010000
1867 10:09:55.983272 SMBIOS 18. 99a2c000 00000800
1868 10:09:55.983821 IMD small region:
1869 10:09:55.989983 IMD ROOT 0. 99ffec00 00000400
1870 10:09:55.993244 FSP RUNTIME 1. 99ffebe0 00000004
1871 10:09:55.996427 EC HOSTEVENT 2. 99ffebc0 00000008
1872 10:09:55.999708 POWER STATE 3. 99ffeb80 00000040
1873 10:09:56.003208 ROMSTAGE 4. 99ffeb60 00000004
1874 10:09:56.006740 MEM INFO 5. 99ffe9a0 000001b9
1875 10:09:56.009554 VPD 6. 99ffe920 0000006c
1876 10:09:56.012874 MTRR: Physical address space:
1877 10:09:56.019581 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1878 10:09:56.026747 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1879 10:09:56.029630 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1880 10:09:56.036329 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1881 10:09:56.043022 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1882 10:09:56.049336 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1883 10:09:56.056878 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1884 10:09:56.059714 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 10:09:56.062681 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 10:09:56.069372 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 10:09:56.073013 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 10:09:56.076165 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 10:09:56.079125 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 10:09:56.086108 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 10:09:56.088835 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 10:09:56.092146 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 10:09:56.095545 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 10:09:56.102085 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 10:09:56.105871 call enable_fixed_mtrr()
1896 10:09:56.108712 CPU physical address size: 39 bits
1897 10:09:56.112104 MTRR: default type WB/UC MTRR counts: 6/8.
1898 10:09:56.115205 MTRR: WB selected as default type.
1899 10:09:56.122137 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1900 10:09:56.128809 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1901 10:09:56.135176 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1902 10:09:56.141951 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1903 10:09:56.145207 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1904 10:09:56.151618 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1905 10:09:56.159097 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 10:09:56.162089 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 10:09:56.165604 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 10:09:56.169305 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 10:09:56.175582 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 10:09:56.178734 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 10:09:56.181946 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 10:09:56.184828 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 10:09:56.191923 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 10:09:56.195154 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 10:09:56.198031 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 10:09:56.198461
1917 10:09:56.201449 MTRR check
1918 10:09:56.201881 Fixed MTRRs : Enabled
1919 10:09:56.204694 Variable MTRRs: Enabled
1920 10:09:56.205212
1921 10:09:56.208414 call enable_fixed_mtrr()
1922 10:09:56.214926 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1923 10:09:56.218694 CPU physical address size: 39 bits
1924 10:09:56.221399 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1925 10:09:56.225030 CBFS @ c08000 size 3f8000
1926 10:09:56.231435 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1927 10:09:56.235040 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 10:09:56.237952 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 10:09:56.244974 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 10:09:56.248831 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 10:09:56.251317 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 10:09:56.254794 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 10:09:56.257896 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 10:09:56.264270 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 10:09:56.267703 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 10:09:56.270897 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 10:09:56.274443 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 10:09:56.281389 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 10:09:56.284466 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 10:09:56.287330 call enable_fixed_mtrr()
1941 10:09:56.290901 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 10:09:56.294472 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 10:09:56.301014 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 10:09:56.304695 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 10:09:56.307730 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 10:09:56.310770 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 10:09:56.313947 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 10:09:56.320687 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 10:09:56.323961 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 10:09:56.327275 CPU physical address size: 39 bits
1951 10:09:56.330293 call enable_fixed_mtrr()
1952 10:09:56.333607 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 10:09:56.337295 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 10:09:56.343723 MTRR: Fixed MSR 0x258 0x0606060606060606
1955 10:09:56.347523 MTRR: Fixed MSR 0x259 0x0000000000000000
1956 10:09:56.350289 MTRR: Fixed MSR 0x268 0x0606060606060606
1957 10:09:56.353861 MTRR: Fixed MSR 0x269 0x0606060606060606
1958 10:09:56.360700 MTRR: Fixed MSR 0x26a 0x0606060606060606
1959 10:09:56.363634 MTRR: Fixed MSR 0x26b 0x0606060606060606
1960 10:09:56.367469 MTRR: Fixed MSR 0x26c 0x0606060606060606
1961 10:09:56.370370 MTRR: Fixed MSR 0x26d 0x0606060606060606
1962 10:09:56.377301 MTRR: Fixed MSR 0x26e 0x0606060606060606
1963 10:09:56.380088 MTRR: Fixed MSR 0x26f 0x0606060606060606
1964 10:09:56.383999 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 10:09:56.386724 call enable_fixed_mtrr()
1966 10:09:56.389805 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 10:09:56.393762 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 10:09:56.400379 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 10:09:56.403849 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 10:09:56.406126 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 10:09:56.409879 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 10:09:56.416466 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 10:09:56.420006 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 10:09:56.423391 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 10:09:56.426072 CPU physical address size: 39 bits
1976 10:09:56.429524 call enable_fixed_mtrr()
1977 10:09:56.432791 CPU physical address size: 39 bits
1978 10:09:56.436209 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 10:09:56.442774 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 10:09:56.445915 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 10:09:56.449338 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 10:09:56.452680 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 10:09:56.459584 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 10:09:56.462601 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 10:09:56.465881 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 10:09:56.469355 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 10:09:56.472587 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 10:09:56.479336 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 10:09:56.483044 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 10:09:56.486453 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 10:09:56.488865 call enable_fixed_mtrr()
1992 10:09:56.492215 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 10:09:56.495896 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 10:09:56.502428 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 10:09:56.505772 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 10:09:56.509325 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 10:09:56.512568 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 10:09:56.519213 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 10:09:56.523391 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 10:09:56.525810 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 10:09:56.529268 CPU physical address size: 39 bits
2002 10:09:56.532291 call enable_fixed_mtrr()
2003 10:09:56.535876 CPU physical address size: 39 bits
2004 10:09:56.538901 CPU physical address size: 39 bits
2005 10:09:56.542637 CBFS: Locating 'fallback/payload'
2006 10:09:56.549151 CBFS: Found @ offset 1c96c0 size 3f798
2007 10:09:56.552303 Checking segment from ROM address 0xffdd16f8
2008 10:09:56.556214 Checking segment from ROM address 0xffdd1714
2009 10:09:56.562361 Loading segment from ROM address 0xffdd16f8
2010 10:09:56.562934 code (compression=0)
2011 10:09:56.572325 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 10:09:56.582371 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 10:09:56.582946 it's not compressed!
2014 10:09:56.675725 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 10:09:56.681901 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 10:09:56.685176 Loading segment from ROM address 0xffdd1714
2017 10:09:56.688270 Entry Point 0x30000000
2018 10:09:56.691266 Loaded segments
2019 10:09:56.697085 Finalizing chipset.
2020 10:09:56.700741 Finalizing SMM.
2021 10:09:56.703812 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2022 10:09:56.707250 mp_park_aps done after 0 msecs.
2023 10:09:56.714354 Jumping to boot code at 30000000(99b62000)
2024 10:09:56.720505 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2025 10:09:56.721082
2026 10:09:56.721562
2027 10:09:56.722009
2028 10:09:56.724414 Starting depthcharge on Helios...
2029 10:09:56.724891
2030 10:09:56.726196 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2031 10:09:56.726802 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2032 10:09:56.727290 Setting prompt string to ['hatch:']
2033 10:09:56.727810 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2034 10:09:56.733593 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2035 10:09:56.734176
2036 10:09:56.740856 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2037 10:09:56.741440
2038 10:09:56.746778 board_setup: Info: eMMC controller not present; skipping
2039 10:09:56.747342
2040 10:09:56.750172 New NVMe Controller 0x30053ac0 @ 00:1d:00
2041 10:09:56.750760
2042 10:09:56.758061 board_setup: Info: SDHCI controller not present; skipping
2043 10:09:56.758640
2044 10:09:56.763751 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2045 10:09:56.764442
2046 10:09:56.764946 Wipe memory regions:
2047 10:09:56.765399
2048 10:09:56.766717 [0x00000000001000, 0x000000000a0000)
2049 10:09:56.767190
2050 10:09:56.770636 [0x00000000100000, 0x00000030000000)
2051 10:09:56.836835
2052 10:09:56.839664 [0x00000030657430, 0x00000099a2c000)
2053 10:09:56.977015
2054 10:09:56.980127 [0x00000100000000, 0x0000045e800000)
2055 10:09:58.362885
2056 10:09:58.363452 R8152: Initializing
2057 10:09:58.363936
2058 10:09:58.365677 Version 9 (ocp_data = 6010)
2059 10:09:58.370495
2060 10:09:58.371179 R8152: Done initializing
2061 10:09:58.371671
2062 10:09:58.373249 Adding net device
2063 10:09:58.856277
2064 10:09:58.856852 R8152: Initializing
2065 10:09:58.857429
2066 10:09:58.859502 Version 6 (ocp_data = 5c30)
2067 10:09:58.860136
2068 10:09:58.862125 R8152: Done initializing
2069 10:09:58.862223
2070 10:09:58.869500 net_add_device: Attemp to include the same device
2071 10:09:58.869658
2072 10:09:58.876511 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 10:09:58.876680
2074 10:09:58.876760
2075 10:09:58.876830
2076 10:09:58.877138 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 10:09:58.977886 hatch: tftpboot 192.168.201.1 12522701/tftp-deploy-mlp5jx7d/kernel/bzImage 12522701/tftp-deploy-mlp5jx7d/kernel/cmdline 12522701/tftp-deploy-mlp5jx7d/ramdisk/ramdisk.cpio.gz
2079 10:09:58.978160 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 10:09:58.978317 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2081 10:09:58.982859 tftpboot 192.168.201.1 12522701/tftp-deploy-mlp5jx7d/kernel/bzImploy-mlp5jx7d/kernel/cmdline 12522701/tftp-deploy-mlp5jx7d/ramdisk/ramdisk.cpio.gz
2082 10:09:58.983124
2083 10:09:58.983281 Waiting for link
2084 10:09:59.184264
2085 10:09:59.184836 done.
2086 10:09:59.185320
2087 10:09:59.185775 MAC: 00:24:32:50:1a:5f
2088 10:09:59.186246
2089 10:09:59.188225 Sending DHCP discover... done.
2090 10:09:59.188821
2091 10:09:59.190197 Waiting for reply... done.
2092 10:09:59.190675
2093 10:09:59.193651 Sending DHCP request... done.
2094 10:09:59.194127
2095 10:09:59.200963 Waiting for reply... done.
2096 10:09:59.201527
2097 10:09:59.202013 My ip is 192.168.201.21
2098 10:09:59.202466
2099 10:09:59.203316 The DHCP server ip is 192.168.201.1
2100 10:09:59.203719
2101 10:09:59.211041 TFTP server IP predefined by user: 192.168.201.1
2102 10:09:59.211644
2103 10:09:59.216719 Bootfile predefined by user: 12522701/tftp-deploy-mlp5jx7d/kernel/bzImage
2104 10:09:59.217184
2105 10:09:59.220320 Sending tftp read request... done.
2106 10:09:59.220884
2107 10:09:59.229259 Waiting for the transfer...
2108 10:09:59.229822
2109 10:09:59.897256 00000000 ################################################################
2110 10:09:59.897759
2111 10:10:00.599873 00080000 ################################################################
2112 10:10:00.600426
2113 10:10:01.330548 00100000 ################################################################
2114 10:10:01.331188
2115 10:10:02.040410 00180000 ################################################################
2116 10:10:02.040937
2117 10:10:02.764893 00200000 ################################################################
2118 10:10:02.765636
2119 10:10:03.490033 00280000 ################################################################
2120 10:10:03.490549
2121 10:10:04.187128 00300000 ################################################################
2122 10:10:04.187652
2123 10:10:04.891968 00380000 ################################################################
2124 10:10:04.892529
2125 10:10:05.612915 00400000 ################################################################
2126 10:10:05.613486
2127 10:10:06.321837 00480000 ################################################################
2128 10:10:06.322412
2129 10:10:07.030486 00500000 ################################################################
2130 10:10:07.031035
2131 10:10:07.739761 00580000 ################################################################
2132 10:10:07.740417
2133 10:10:08.457115 00600000 ################################################################
2134 10:10:08.457682
2135 10:10:09.186649 00680000 ################################################################
2136 10:10:09.187231
2137 10:10:09.899593 00700000 ################################################################
2138 10:10:09.900152
2139 10:10:10.588218 00780000 ################################################################
2140 10:10:10.588781
2141 10:10:11.292770 00800000 ################################################################
2142 10:10:11.293298
2143 10:10:12.006901 00880000 ################################################################
2144 10:10:12.007650
2145 10:10:12.729694 00900000 ################################################################
2146 10:10:12.730203
2147 10:10:13.428869 00980000 ################################################################
2148 10:10:13.429459
2149 10:10:14.159843 00a00000 ################################################################
2150 10:10:14.160475
2151 10:10:14.872781 00a80000 ################################################################
2152 10:10:14.873346
2153 10:10:14.929136 00b00000 ###### done.
2154 10:10:14.929683
2155 10:10:14.932364 The bootfile was 11575296 bytes long.
2156 10:10:14.932974
2157 10:10:14.935726 Sending tftp read request... done.
2158 10:10:14.936176
2159 10:10:14.938750 Waiting for the transfer...
2160 10:10:14.939167
2161 10:10:15.618779 00000000 ################################################################
2162 10:10:15.619320
2163 10:10:16.279992 00080000 ################################################################
2164 10:10:16.280553
2165 10:10:16.948380 00100000 ################################################################
2166 10:10:16.948882
2167 10:10:17.608824 00180000 ################################################################
2168 10:10:17.609339
2169 10:10:18.285204 00200000 ################################################################
2170 10:10:18.285719
2171 10:10:18.974216 00280000 ################################################################
2172 10:10:18.974731
2173 10:10:19.646535 00300000 ################################################################
2174 10:10:19.647082
2175 10:10:20.329386 00380000 ################################################################
2176 10:10:20.329899
2177 10:10:21.021071 00400000 ################################################################
2178 10:10:21.021570
2179 10:10:21.708373 00480000 ################################################################
2180 10:10:21.708881
2181 10:10:22.394184 00500000 ################################################################
2182 10:10:22.394693
2183 10:10:22.906702 00580000 ################################################ done.
2184 10:10:22.907248
2185 10:10:22.910542 Sending tftp read request... done.
2186 10:10:22.911004
2187 10:10:22.912829 Waiting for the transfer...
2188 10:10:22.913242
2189 10:10:22.913572 00000000 # done.
2190 10:10:22.913911
2191 10:10:22.922896 Command line loaded dynamically from TFTP file: 12522701/tftp-deploy-mlp5jx7d/kernel/cmdline
2192 10:10:22.923441
2193 10:10:22.952767 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12522701/extract-nfsrootfs-o54cebwo,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2194 10:10:22.953362
2195 10:10:22.959196 ec_init(0): CrosEC protocol v3 supported (256, 256)
2196 10:10:22.963312
2197 10:10:22.966597 Shutting down all USB controllers.
2198 10:10:22.967058
2199 10:10:22.967512 Removing current net device
2200 10:10:22.969773
2201 10:10:22.970232 Finalizing coreboot
2202 10:10:22.970622
2203 10:10:22.976431 Exiting depthcharge with code 4 at timestamp: 33635160
2204 10:10:22.976976
2205 10:10:22.977336
2206 10:10:22.977669 Starting kernel ...
2207 10:10:22.977995
2208 10:10:22.979287 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2209 10:10:22.979788 start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
2210 10:10:22.980217 Setting prompt string to ['Linux version [0-9]']
2211 10:10:22.980583 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2212 10:10:22.981038 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2213 10:10:22.982106
2215 10:14:38.980860 end: 2.2.5 auto-login-action (duration 00:04:16) [common]
2217 10:14:38.981992 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
2219 10:14:38.982831 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2222 10:14:38.984425 end: 2 depthcharge-action (duration 00:05:00) [common]
2224 10:14:38.985559 Cleaning after the job
2225 10:14:38.985646 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/ramdisk
2226 10:14:38.986578 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/kernel
2227 10:14:38.988397 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/nfsrootfs
2228 10:14:39.079069 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12522701/tftp-deploy-mlp5jx7d/modules
2229 10:14:39.079771 start: 4.1 power-off (timeout 00:00:30) [common]
2230 10:14:39.079933 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2231 10:14:39.158232 >> Command sent successfully.
2232 10:14:39.163115 Returned 0 in 0 seconds
2233 10:14:39.264289 end: 4.1 power-off (duration 00:00:00) [common]
2235 10:14:39.265873 start: 4.2 read-feedback (timeout 00:10:00) [common]
2236 10:14:39.267220 Listened to connection for namespace 'common' for up to 1s
2238 10:14:39.268570 Listened to connection for namespace 'common' for up to 1s
2239 10:14:40.267959 Finalising connection for namespace 'common'
2240 10:14:40.268677 Disconnecting from shell: Finalise
2241 10:14:40.269111
2242 10:14:40.370321 end: 4.2 read-feedback (duration 00:00:01) [common]
2243 10:14:40.370929 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12522701
2244 10:14:40.948407 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12522701
2245 10:14:40.948598 JobError: Your job cannot terminate cleanly.