Info: SOL payload already de-activated Never mind [SOL Session operational. Use ~? for help] [serdes_init]:SerDes0 init success! [serdes_hilink1_init]:hilink1_mode hccs0 8 lane 5G [serdes_cs_hw_calibration_optionV2_exec]:Macro1 CS1 LC Vco Cal done!(LCVCOCALDONE) in 0ms [SerdesCsCalib]:Macro1 CS1 PLL lock success!(0 ms) [serdes_init]:SerDes1 init success! Continue to dreset PCS Continue to dreset HLLC Continue to open PCS RX Wait for HLLC Training........OK Wait for HLLC1 Training........OK Wait for S1 HLLC Training........OK Wait for S1 HLLC1 Training........OK Open Secondary socket Window Djtag secondary 0x4004001d818 and 0x400d000d818 init Macro 0 Download Firmware Success!! Macro 1 Download Firmware Success!! Macro 0 Download Firmware Success!! Macro 1 Download Firmware Success!! [serdes_hilink0_init]:hilink0_mode hccs1 8 lane 16 bit Halt Macro 0 MCU!! Release Macro 0 MCU!! Temperature: 26 (0x1A) [serdes_init]:SerDes0 init success! [serdes_hilink1_init]:hilink1_mode hccs0 8 lane 16 bit Halt Macro 1 MCU!! Release Macro 1 MCU!! Temperature: 26 (0x1A) [serdes_init]:SerDes1 init success! [serdes_hilink0_init]:hilink0_mode hccs1 8 lane 16 bit Halt Macro 0 MCU!! Release Macro 0 MCU!! Temperature: 26 (0x1A) [serdes_init]:SerDes0 init success! [serdes_hilink1_init]:hilink1_mode hccs0 8 lane 16 bit Halt Macro 1 MCU!! Release Macro 1 MCU!! Temperature: 26 (0x1A) [serdes_init]:SerDes1 init success! Continue to dreset PCS Continue to dreset HLLC Continue to Enable CTLE Continue to open PCS RX Wait for HLLC Training........OK Wait for HLLC1 Training........OK Wait for S1 HLLC Training........OK Wait for S1 HLLC1 Training........OK S0 HLLC0 Interrupt status(0x4) = 0x0 S0 HLLC1 Interrupt status(0x4) = 0x0 S1 HLLC0 Interrupt status(0x4) = 0x0 S1 HLLC1 Interrupt status(0x4) = 0x0 Config Secondary socket Open Secondary socket Window close NB CS2 to PA Config socket0 NA PA Enable socket0 PA 2+2 Mode Config Secondary socket PA clean S0 remap for PA....Done clean remap for PA....Done Enable socket1 PA 2+2 Mode Djtag Secondary 0x4006001d818 Init S1 Preinit S1 Preinit End Config Secondary socket AA&LLC close S1 NB CS2 to PA OK1OK2OK3Djtag Secondary 0x408d000d818 Init Visit S1 NB Visit S1 NB DONE S1 NA PCIE clean remap.........Done S1 NA PCIE MEM CONFIG.........Done S1 NB PCIE clean remap.........Done S1 NB PCIE MEM CONFIG.........Done NB/TB PLL Init TB PLL init....OK NB PLL init....OK [LPC] S1 MBIGEN CONFIG Done cadd-symbol-file /home/s00296804/Edk2/Build/D05Source/RELEASE_GCC49/AARCH64/HwPkg/Override/ArmPlatformPkg/Sec/Sec/DEBUG/ArmPlatformSec.dll 0xA4801800 Trust Zone Configuration is disabled Boot firmware (version Hisilicon D05 UEFI 16.12 Release built at 05/15/2017 07:53) init BMC. TempVer:0x20 GetDeviceId return Success GetVariable Not Found! Get Default Setup Configration &&&Now config iBMC BIOS WDT [action:0 countdown:3928 timeruse 2! Memory Init PEIM Loaded GetVariable Not Found! Get Default Setup Configration ------------------- Start RegisterTest: RegisterTest OK! ------------------- socket[0] Totem B I2C0 init ok. socket[0] Totem B I2C1 init ok. socket[1] Totem B I2C0 init ok. socket[1] Totem B I2C1 init ok. socket[0] channel[0] dimm[0] read from SPD, I2C Port:1 SlaveAddr:0x54 --------------------------------------------------------------------- SPD_KEY_BYTE : DDR4 SPD_KEY_BYTE2 : RDIMM SPD_MODULE_ORG_DDR4 : 0x8 SPD_MIN_TCK_DDR4 : 0x7 SPD_MAX_TCK_DDR4 : 0xD SPD_FTB_MIN_TCK_DDR4 : 0xD6 DimmMaxFreq : 2401Mbps pGblData->Channel[0][0].Dimm[0].DramWidth : X4 pGblData->Channel[0][0].Dimm[0].RankNum : 2 pGblData->Channel[0][0].Dimm[0].ddrFreq : 2400Mbps pGblData->Channel[0][0].Dimm[0].minTck : 8330 --------------------------------------------------------------------- socket[0] channel[0] dimm[1] read from SPD, I2C Port:1 SlaveAddr:0x55 --------------------------------------------------------------------- SPD_KEY_BYTE : Empty Socket[0] Channel[0] Dimm[1] is empty. --------------------------------------------------------------------- pGblData->Channel[0][0].RankPresent : 0x3 socket[0] channel[1] dimm[0] read from SPD, I2C Port:0 SlaveAddr:0x54 --------------------------------------------------------------------- SPD_KEY_BYTE : DDR4 SPD_KEY_BYTE2 : RDIMM SPD_MODULE_ORG_DDR4 : 0x8 SPD_MIN_TCK_DDR4 : 0x7 SPD_MAX_TCK_DDR4 : 0xD SPD_FTB_MIN_TCK_DDR4 : 0xD6 DimmMaxFreq : 2401Mbps pGblData->Channel[0][1].Dimm[0].DramWidth : X4 pGblData->Channel[0][1].Dimm[0].RankNum : 2 pGblData->Channel[0][1].Dimm[0].ddrFreq : 2400Mbps pGblData->Channel[0][1].Dimm[0].minTck : 8330 --------------------------------------------------------------------- socket[0] channel[1] dimm[1] read from SPD, I2C Port:0 SlaveAddr:0x55 --------------------------------------------------------------------- SPD_KEY_BYTE : Empty Socket[0] Channel[1] Dimm[1] is empty. --------------------------------------------------------------------- pGblData->Channel[0][1].RankPresent : 0x3 socket[0] channel[2] dimm[0] read from SPD, I2C Port:1 SlaveAddr:0x50 --------------------------------------------------------------------- SPD_KEY_BYTE : DDR4 SPD_KEY_BYTE2 : RDIMM SPD_MODULE_ORG_DDR4 : 0x8 SPD_MIN_TCK_DDR4 : 0x7 SPD_MAX_TCK_DDR4 : 0xD SPD_FTB_MIN_TCK_DDR4 : 0xD6 DimmMaxFreq : 2401Mbps pGblData->Channel[0][2].Dimm[0].DramWidth : X4 pGblData->Channel[0][2].Dimm[0].RankNum : 2 pGblData->Channel[0][2].Dimm[0].ddrFreq : 2400Mbps pGblData->Channel[0][2].Dimm[0].minTck : 8330 --------------------------------------------------------------------- socket[0] channel[2] dimm[1] read from SPD, I2C Port:1 SlaveAddr:0x51 --------------------------------------------------------------------- SPD_KEY_BYTE : Empty Socket[0] Channel[2] Dimm[1] is empty. --------------------------------------------------------------------- pGblData->Channel[0][2].RankPresent : 0x3 socket[0] channel[3] dimm[0] read from SPD, I2C Port:0 SlaveAddr:0x50 --------------------------------------------------------------------- SPD_KEY_BYTE : DDR4 SPD_KEY_BYTE2 : RDIMM SPD_MODULE_ORG_DDR4 : 0x8 SPD_MIN_TCK_DDR4 : 0x7 SPD_MAX_TCK_DDR4 : 0xD SPD_FTB_MIN_TCK_DDR4 : 0xD6 DimmMaxFreq : 2401Mbps pGblData->Channel[0][3].Dimm[0].DramWidth : X4 pGblData->Channel[0][3].Dimm[0].RankNum : 2 pGblData->Channel[0][3].Dimm[0].ddrFreq : 2400Mbps pGblData->Channel[0][3].Dimm[0].minTck : 8330 --------------------------------------------------------------------- socket[0] channel[3] dimm[1] read from SPD, I2C Port:0 SlaveAddr:0x51 --------------------------------------------------------------------- SPD_KEY_BYTE : Empty Socket[0] Channel[3] Dimm[1] is empty. --------------------------------------------------------------------- pGblData->Channel[0][3].RankPresent : 0x3 socket[1] channel[0] dimm[0] read from SPD, I2C Port:1 SlaveAddr:0x54 --------------------------------------------------------------------- SPD_KEY_BYTE : DDR4 SPD_KEY_BYTE2 : RDIMM SPD_MODULE_ORG_DDR4 : 0x8 SPD_MIN_TCK_DDR4 : 0x7 SPD_MAX_TCK_DDR4 : 0xD SPD_FTB_MIN_TCK_DDR4 : 0xD6 DimmMaxFreq : 2401Mbps pGblData->Channel[1][0].Dimm[0].DramWidth : X4 pGblData->Channel[1][0].Dimm[0].RankNum : 2 pGblData->Channel[1][0].Dimm[0].ddrFreq : 2400Mbps pGblData->Channel[1][0].Dimm[0].minTck : 8330 --------------------------------------------------------------------- socket[1] channel[0] dimm[1] read from SPD, I2C Port:1 SlaveAddr:0x55 --------------------------------------------------------------------- SPD_KEY_BYTE : Empty Socket[1] Channel[0] Dimm[1] is empty. --------------------------------------------------------------------- pGblData->Channel[1][0].RankPresent : 0x3 socket[1] channel[1] dimm[0] read from SPD, I2C Port:0 SlaveAddr:0x54 --------------------------------------------------------------------- SPD_KEY_BYTE : DDR4 SPD_KEY_BYTE2 : RDIMM SPD_MODULE_ORG_DDR4 : 0x8 SPD_MIN_TCK_DDR4 : 0x7 SPD_MAX_TCK_DDR4 : 0xD SPD_FTB_MIN_TCK_DDR4 : 0xD6 DimmMaxFreq : 2401Mbps pGblData->Channel[1][1].Dimm[0].DramWidth : X4 pGblData->Channel[1][1].Dimm[0].RankNum : 2 pGblData->Channel[1][1].Dimm[0].ddrFreq : 2400Mbps pGblData->Channel[1][1].Dimm[0].minTck : 8330 --------------------------------------------------------------------- socket[1] channel[1] dimm[1] read from SPD, I2C Port:0 SlaveAddr:0x55 --------------------------------------------------------------------- SPD_KEY_BYTE : Empty Socket[1] Channel[1] Dimm[1] is empty. --------------------------------------------------------------------- pGblData->Channel[1][1].RankPresent : 0x3 socket[1] channel[2] dimm[0] read from SPD, I2C Port:1 SlaveAddr:0x50 --------------------------------------------------------------------- SPD_KEY_BYTE : DDR4 SPD_KEY_BYTE2 : RDIMM SPD_MODULE_ORG_DDR4 : 0x8 SPD_MIN_TCK_DDR4 : 0x7 SPD_MAX_TCK_DDR4 : 0xD SPD_FTB_MIN_TCK_DDR4 : 0xD6 DimmMaxFreq : 2401Mbps pGblData->Channel[1][2].Dimm[0].DramWidth : X4 pGblData->Channel[1][2].Dimm[0].RankNum : 2 pGblData->Channel[1][2].Dimm[0].ddrFreq : 2400Mbps pGblData->Channel[1][2].Dimm[0].minTck : 8330 --------------------------------------------------------------------- socket[1] channel[2] dimm[1] read from SPD, I2C Port:1 SlaveAddr:0x51 --------------------------------------------------------------------- SPD_KEY_BYTE : Empty Socket[1] Channel[2] Dimm[1] is empty. --------------------------------------------------------------------- pGblData->Channel[1][2].RankPresent : 0x3 socket[1] channel[3] dimm[0] read from SPD, I2C Port:0 SlaveAddr:0x50 --------------------------------------------------------------------- SPD_KEY_BYTE : DDR4 SPD_KEY_BYTE2 : RDIMM SPD_MODULE_ORG_DDR4 : 0x8 SPD_MIN_TCK_DDR4 : 0x7 SPD_MAX_TCK_DDR4 : 0xD SPD_FTB_MIN_TCK_DDR4 : 0xD6 DimmMaxFreq : 2401Mbps pGblData->Channel[1][3].Dimm[0].DramWidth : X4 pGblData->Channel[1][3].Dimm[0].RankNum : 2 pGblData->Channel[1][3].Dimm[0].ddrFreq : 2400Mbps pGblData->Channel[1][3].Dimm[0].minTck : 8330 --------------------------------------------------------------------- socket[1] channel[3] dimm[1] read from SPD, I2C Port:0 SlaveAddr:0x51 --------------------------------------------------------------------- SPD_KEY_BYTE : Empty Socket[1] Channel[3] Dimm[1] is empty. --------------------------------------------------------------------- pGblData->Channel[1][3].RankPresent : 0x3 DimmMaxFreq : 2401Mbps GblData->Freq : 2400 GblData->Tck : 8333 GblData->DdrFreqIdx : 13 Check dimm status ok! pGblData->MaxSPCNum = 2 skt[0] ch[0] maxPORFreqIdx = 13 skt[0] ch[1] maxPORFreqIdx = 13 skt[0] ch[2] maxPORFreqIdx = 13 skt[0] ch[3] maxPORFreqIdx = 13 skt[1] ch[0] maxPORFreqIdx = 13 skt[1] ch[1] maxPORFreqIdx = 13 skt[1] ch[2] maxPORFreqIdx = 13 skt[1] ch[3] maxPORFreqIdx = 13 --------------------------------------------------------------------- --------------------------------------------------------------------- PORFreqTable result(max system ddr frequency): pGblData->DdrFreqIdx = 13 pGblData->DevParaFreqIdx = 13 pGblData->Tck = 8333 pGblData->Freq = 2400 --------------------------------------------------------------------- --------------------------------------------------------------------- Set ddr frequency ok! Get dimm spd information socket[0] channel[0] dimm[0] i2c port[1] slaveAddr[0x54] SPD information: SPD_MIN_TRCD_DDR4: 0x6E SPD_FTB_TRCD_DDR4: 0x0 SPD_MIN_TRRDL_DDR4: 0x28 SPD_FTB_TRRDL_DDR4: 0x9C SPD_MIN_TRRDS_DDR4: 0x1B SPD_FTB_TRRDS_DDR4: 0xB5 SPD_EXT_TRC_TRAS_DDR4: 0x11 SPD_MIN_TRAS_DDR4: 0x0 SPD_MIN_TRC_DDR4: 0x6E SPD_FTB_TRC_DDR4: 0x0 SPD_MIN_TRFC1_MSB_DDR4: 0xA SPD_MIN_TRFC1_LSB_DDR4: 0xF0 tRFC: 0xAF0 tempCkNum: 0x55730 SPD_MIN_TAA_DDR4: 0x6E SPD_FTB_TAA: 0x0 SPD_TFAW_UPPER_DDR4: 0x0 SPD_MIN_TFAW_DDR4: 0x68 SPD_MIN_TRP_DDR4: 0x6E SPD_FTB_TRP_DDR4: 0x0 SPD_MIN_TCCDL_DDR4: 0x28 SPD_FTB_TCCDL_DDR4: 0x0 --------------------------------------------------------------------- pGblData item skt ch dimm value --------------------------------------------------------------------- SDRAMCapacity 0 0 0 0x5 BGNum 0 0 0 4 BankNum 0 0 0 16 ColBits 0 0 0 10 RowBits 0 0 0 17 SpdMirror 0 0 0 1 SpdVdd 0 0 0 3 PrimaryBusWidth 0 0 0 64 ExtensionBusWidth 0 0 0 8 RankSize 0 0 0 16384 SpdRMId 0 0 0 0x3206 SpdMMfgId 0 0 0 0xCE00 SpdMMDate 0 0 0 0x2817 SpdSerialNum 0 0 0 0x4F82936 SpdMinTRCD 0 0 0 0x6E SpdMinTRCDFtb 0 0 0 0x0 nRCD 0 0 0 0x35B6 SpdMinTRRDL 0 0 0 0x28 SpdMinTRRD 0 0 0 0x1B SpdMinTRAS 0 0 0 0x100 SpdMinTRC 0 0 0 0x16E SpdMinTRCFtb 0 0 0 0x0 SpdMinTRFC 0 0 0 0xAF0 SpdMinTAA 0 0 0 0x6E SpdMinTAAFtb 0 0 0 0x0 SpdMinTFAW 0 0 0 0x68 SpdMinTRP 0 0 0 0x6E SpdMinTRPFtb 0 0 0 0x0 nRP 0 0 0 0x35B6 SpdMinTCCDL 0 0 0 0x28 SpdMinTCCDLFtb 0 0 0 0x0 SpdModuleAttr 0 0 0 0x0 SpdAddrMap 0 0 0 0x1 --------------------------------------------------------------------- socket[0] channel[0] SPD information: --------------------------------------------------------------------- item skt ch value --------------------------------------------------------------------- nWR 0 0 0ps nRCD 0 0 13750ps nRRDL 0 0 4900ps nRRD 0 0 3300ps nRAS 0 0 32000ps nRC 0 0 45750ps nRFC 0 0 350000ps nWTR 0 0 0ps nRTP 0 0 0ps nAA 0 0 13750ps nFAW 0 0 13000ps nRP 0 0 13750ps nCCDL 0 0 5000ps --------------------------------------------------------------------- socket[0] channel[1] dimm[0] i2c port[0] slaveAddr[0x54] SPD information: SPD_MIN_TRCD_DDR4: 0x6E SPD_FTB_TRCD_DDR4: 0x0 SPD_MIN_TRRDL_DDR4: 0x28 SPD_FTB_TRRDL_DDR4: 0x9C SPD_MIN_TRRDS_DDR4: 0x1B SPD_FTB_TRRDS_DDR4: 0xB5 SPD_EXT_TRC_TRAS_DDR4: 0x11 SPD_MIN_TRAS_DDR4: 0x0 SPD_MIN_TRC_DDR4: 0x6E SPD_FTB_TRC_DDR4: 0x0 SPD_MIN_TRFC1_MSB_DDR4: 0xA SPD_MIN_TRFC1_LSB_DDR4: 0xF0 tRFC: 0xAF0 tempCkNum: 0x55730 SPD_MIN_TAA_DDR4: 0x6E SPD_FTB_TAA: 0x0 SPD_TFAW_UPPER_DDR4: 0x0 SPD_MIN_TFAW_DDR4: 0x68 SPD_MIN_TRP_DDR4: 0x6E SPD_FTB_TRP_DDR4: 0x0 SPD_MIN_TCCDL_DDR4: 0x28 SPD_FTB_TCCDL_DDR4: 0x0 --------------------------------------------------------------------- pGblData item skt ch dimm value --------------------------------------------------------------------- SDRAMCapacity 0 1 0 0x5 BGNum 0 1 0 4 BankNum 0 1 0 16 ColBits 0 1 0 10 RowBits 0 1 0 17 SpdMirror 0 1 0 1 SpdVdd 0 1 0 3 PrimaryBusWidth 0 1 0 64 ExtensionBusWidth 0 1 0 8 RankSize 0 1 0 16384 SpdRMId 0 1 0 0x3206 SpdMMfgId 0 1 0 0xCE00 SpdMMDate 0 1 0 0x2817 SpdSerialNum 0 1 0 0xE3F82936 SpdMinTRCD 0 1 0 0x6E SpdMinTRCDFtb 0 1 0 0x0 nRCD 0 1 0 0x35B6 SpdMinTRRDL 0 1 0 0x28 SpdMinTRRD 0 1 0 0x1B SpdMinTRAS 0 1 0 0x100 SpdMinTRC 0 1 0 0x16E SpdMinTRCFtb 0 1 0 0x0 SpdMinTRFC 0 1 0 0xAF0 SpdMinTAA 0 1 0 0x6E SpdMinTAAFtb 0 1 0 0x0 SpdMinTFAW 0 1 0 0x68 SpdMinTRP 0 1 0 0x6E SpdMinTRPFtb 0 1 0 0x0 nRP 0 1 0 0x35B6 SpdMinTCCDL 0 1 0 0x28 SpdMinTCCDLFtb 0 1 0 0x0 SpdModuleAttr 0 1 0 0x0 SpdAddrMap 0 1 0 0x1 --------------------------------------------------------------------- socket[0] channel[1] SPD information: --------------------------------------------------------------------- item skt ch value --------------------------------------------------------------------- nWR 0 1 0ps nRCD 0 1 13750ps nRRDL 0 1 4900ps nRRD 0 1 3300ps nRAS 0 1 32000ps nRC 0 1 45750ps nRFC 0 1 350000ps nWTR 0 1 0ps nRTP 0 1 0ps nAA 0 1 13750ps nFAW 0 1 13000ps nRP 0 1 13750ps nCCDL 0 1 5000ps --------------------------------------------------------------------- socket[0] channel[2] dimm[0] i2c port[1] slaveAddr[0x50] SPD information: SPD_MIN_TRCD_DDR4: 0x6E SPD_FTB_TRCD_DDR4: 0x0 SPD_MIN_TRRDL_DDR4: 0x28 SPD_FTB_TRRDL_DDR4: 0x9C SPD_MIN_TRRDS_DDR4: 0x1B SPD_FTB_TRRDS_DDR4: 0xB5 SPD_EXT_TRC_TRAS_DDR4: 0x11 SPD_MIN_TRAS_DDR4: 0x0 SPD_MIN_TRC_DDR4: 0x6E SPD_FTB_TRC_DDR4: 0x0 SPD_MIN_TRFC1_MSB_DDR4: 0xA SPD_MIN_TRFC1_LSB_DDR4: 0xF0 tRFC: 0xAF0 tempCkNum: 0x55730 SPD_MIN_TAA_DDR4: 0x6E SPD_FTB_TAA: 0x0 SPD_TFAW_UPPER_DDR4: 0x0 SPD_MIN_TFAW_DDR4: 0x68 SPD_MIN_TRP_DDR4: 0x6E SPD_FTB_TRP_DDR4: 0x0 SPD_MIN_TCCDL_DDR4: 0x28 SPD_FTB_TCCDL_DDR4: 0x0 --------------------------------------------------------------------- pGblData item skt ch dimm value --------------------------------------------------------------------- SDRAMCapacity 0 2 0 0x5 BGNum 0 2 0 4 BankNum 0 2 0 16 ColBits 0 2 0 10 RowBits 0 2 0 17 SpdMirror 0 2 0 1 SpdVdd 0 2 0 3 PrimaryBusWidth 0 2 0 64 ExtensionBusWidth 0 2 0 8 RankSize 0 2 0 16384 SpdRMId 0 2 0 0x3206 SpdMMfgId 0 2 0 0xCE00 SpdMMDate 0 2 0 0x2817 SpdSerialNum 0 2 0 0xDFF32936 SpdMinTRCD 0 2 0 0x6E SpdMinTRCDFtb 0 2 0 0x0 nRCD 0 2 0 0x35B6 SpdMinTRRDL 0 2 0 0x28 SpdMinTRRD 0 2 0 0x1B SpdMinTRAS 0 2 0 0x100 SpdMinTRC 0 2 0 0x16E SpdMinTRCFtb 0 2 0 0x0 SpdMinTRFC 0 2 0 0xAF0 SpdMinTAA 0 2 0 0x6E SpdMinTAAFtb 0 2 0 0x0 SpdMinTFAW 0 2 0 0x68 SpdMinTRP 0 2 0 0x6E SpdMinTRPFtb 0 2 0 0x0 nRP 0 2 0 0x35B6 SpdMinTCCDL 0 2 0 0x28 SpdMinTCCDLFtb 0 2 0 0x0 SpdModuleAttr 0 2 0 0x0 SpdAddrMap 0 2 0 0x1 --------------------------------------------------------------------- socket[0] channel[2] SPD information: --------------------------------------------------------------------- item skt ch value --------------------------------------------------------------------- nWR 0 2 0ps nRCD 0 2 13750ps nRRDL 0 2 4900ps nRRD 0 2 3300ps nRAS 0 2 32000ps nRC 0 2 45750ps nRFC 0 2 350000ps nWTR 0 2 0ps nRTP 0 2 0ps nAA 0 2 13750ps nFAW 0 2 13000ps nRP 0 2 13750ps nCCDL 0 2 5000ps --------------------------------------------------------------------- socket[0] channel[3] dimm[0] i2c port[0] slaveAddr[0x50] SPD information: SPD_MIN_TRCD_DDR4: 0x6E SPD_FTB_TRCD_DDR4: 0x0 SPD_MIN_TRRDL_DDR4: 0x28 SPD_FTB_TRRDL_DDR4: 0x9C SPD_MIN_TRRDS_DDR4: 0x1B SPD_FTB_TRRDS_DDR4: 0xB5 SPD_EXT_TRC_TRAS_DDR4: 0x11 SPD_MIN_TRAS_DDR4: 0x0 SPD_MIN_TRC_DDR4: 0x6E SPD_FTB_TRC_DDR4: 0x0 SPD_MIN_TRFC1_MSB_DDR4: 0xA SPD_MIN_TRFC1_LSB_DDR4: 0xF0 tRFC: 0xAF0 tempCkNum: 0x55730 SPD_MIN_TAA_DDR4: 0x6E SPD_FTB_TAA: 0x0 SPD_TFAW_UPPER_DDR4: 0x0 SPD_MIN_TFAW_DDR4: 0x68 SPD_MIN_TRP_DDR4: 0x6E SPD_FTB_TRP_DDR4: 0x0 SPD_MIN_TCCDL_DDR4: 0x28 SPD_FTB_TCCDL_DDR4: 0x0 --------------------------------------------------------------------- pGblData item skt ch dimm value --------------------------------------------------------------------- SDRAMCapacity 0 3 0 0x5 BGNum 0 3 0 4 BankNum 0 3 0 16 ColBits 0 3 0 10 RowBits 0 3 0 17 SpdMirror 0 3 0 1 SpdVdd 0 3 0 3 PrimaryBusWidth 0 3 0 64 ExtensionBusWidth 0 3 0 8 RankSize 0 3 0 16384 SpdRMId 0 3 0 0x3206 SpdMMfgId 0 3 0 0xCE00 SpdMMDate 0 3 0 0x2817 SpdSerialNum 0 3 0 0xF5F02936 SpdMinTRCD 0 3 0 0x6E SpdMinTRCDFtb 0 3 0 0x0 nRCD 0 3 0 0x35B6 SpdMinTRRDL 0 3 0 0x28 SpdMinTRRD 0 3 0 0x1B SpdMinTRAS 0 3 0 0x100 SpdMinTRC 0 3 0 0x16E SpdMinTRCFtb 0 3 0 0x0 SpdMinTRFC 0 3 0 0xAF0 SpdMinTAA 0 3 0 0x6E SpdMinTAAFtb 0 3 0 0x0 SpdMinTFAW 0 3 0 0x68 SpdMinTRP 0 3 0 0x6E SpdMinTRPFtb 0 3 0 0x0 nRP 0 3 0 0x35B6 SpdMinTCCDL 0 3 0 0x28 SpdMinTCCDLFtb 0 3 0 0x0 SpdModuleAttr 0 3 0 0x0 SpdAddrMap 0 3 0 0x1 --------------------------------------------------------------------- socket[0] channel[3] SPD information: --------------------------------------------------------------------- item skt ch value --------------------------------------------------------------------- nWR 0 3 0ps nRCD 0 3 13750ps nRRDL 0 3 4900ps nRRD 0 3 3300ps nRAS 0 3 32000ps nRC 0 3 45750ps nRFC 0 3 350000ps nWTR 0 3 0ps nRTP 0 3 0ps nAA 0 3 13750ps nFAW 0 3 13000ps nRP 0 3 13750ps nCCDL 0 3 5000ps --------------------------------------------------------------------- socket[1] channel[0] dimm[0] i2c port[1] slaveAddr[0x54] SPD information: SPD_MIN_TRCD_DDR4: 0x6E SPD_FTB_TRCD_DDR4: 0x0 SPD_MIN_TRRDL_DDR4: 0x28 SPD_FTB_TRRDL_DDR4: 0x9C SPD_MIN_TRRDS_DDR4: 0x1B SPD_FTB_TRRDS_DDR4: 0xB5 SPD_EXT_TRC_TRAS_DDR4: 0x11 SPD_MIN_TRAS_DDR4: 0x0 SPD_MIN_TRC_DDR4: 0x6E SPD_FTB_TRC_DDR4: 0x0 SPD_MIN_TRFC1_MSB_DDR4: 0xA SPD_MIN_TRFC1_LSB_DDR4: 0xF0 tRFC: 0xAF0 tempCkNum: 0x55730 SPD_MIN_TAA_DDR4: 0x6E SPD_FTB_TAA: 0x0 SPD_TFAW_UPPER_DDR4: 0x0 SPD_MIN_TFAW_DDR4: 0x68 SPD_MIN_TRP_DDR4: 0x6E SPD_FTB_TRP_DDR4: 0x0 SPD_MIN_TCCDL_DDR4: 0x28 SPD_FTB_TCCDL_DDR4: 0x0 --------------------------------------------------------------------- pGblData item skt ch dimm value --------------------------------------------------------------------- SDRAMCapacity 1 0 0 0x5 BGNum 1 0 0 4 BankNum 1 0 0 16 ColBits 1 0 0 10 RowBits 1 0 0 17 SpdMirror 1 0 0 1 SpdVdd 1 0 0 3 PrimaryBusWidth 1 0 0 64 ExtensionBusWidth 1 0 0 8 RankSize 1 0 0 16384 SpdRMId 1 0 0 0x3206 SpdMMfgId 1 0 0 0xCE00 SpdMMDate 1 0 0 0x2817 SpdSerialNum 1 0 0 0xE2F32936 SpdMinTRCD 1 0 0 0x6E SpdMinTRCDFtb 1 0 0 0x0 nRCD 1 0 0 0x35B6 SpdMinTRRDL 1 0 0 0x28 SpdMinTRRD 1 0 0 0x1B SpdMinTRAS 1 0 0 0x100 SpdMinTRC 1 0 0 0x16E SpdMinTRCFtb 1 0 0 0x0 SpdMinTRFC 1 0 0 0xAF0 SpdMinTAA 1 0 0 0x6E SpdMinTAAFtb 1 0 0 0x0 SpdMinTFAW 1 0 0 0x68 SpdMinTRP 1 0 0 0x6E SpdMinTRPFtb 1 0 0 0x0 nRP 1 0 0 0x35B6 SpdMinTCCDL 1 0 0 0x28 SpdMinTCCDLFtb 1 0 0 0x0 SpdModuleAttr 1 0 0 0x0 SpdAddrMap 1 0 0 0x1 --------------------------------------------------------------------- socket[1] channel[0] SPD information: --------------------------------------------------------------------- item skt ch value --------------------------------------------------------------------- nWR 1 0 0ps nRCD 1 0 13750ps nRRDL 1 0 4900ps nRRD 1 0 3300ps nRAS 1 0 32000ps nRC 1 0 45750ps nRFC 1 0 350000ps nWTR 1 0 0ps nRTP 1 0 0ps nAA 1 0 13750ps nFAW 1 0 13000ps nRP 1 0 13750ps nCCDL 1 0 5000ps --------------------------------------------------------------------- socket[1] channel[1] dimm[0] i2c port[0] slaveAddr[0x54] SPD information: SPD_MIN_TRCD_DDR4: 0x6E SPD_FTB_TRCD_DDR4: 0x0 SPD_MIN_TRRDL_DDR4: 0x28 SPD_FTB_TRRDL_DDR4: 0x9C SPD_MIN_TRRDS_DDR4: 0x1B SPD_FTB_TRRDS_DDR4: 0xB5 SPD_EXT_TRC_TRAS_DDR4: 0x11 SPD_MIN_TRAS_DDR4: 0x0 SPD_MIN_TRC_DDR4: 0x6E SPD_FTB_TRC_DDR4: 0x0 SPD_MIN_TRFC1_MSB_DDR4: 0xA SPD_MIN_TRFC1_LSB_DDR4: 0xF0 tRFC: 0xAF0 tempCkNum: 0x55730 SPD_MIN_TAA_DDR4: 0x6E SPD_FTB_TAA: 0x0 SPD_TFAW_UPPER_DDR4: 0x0 SPD_MIN_TFAW_DDR4: 0x68 SPD_MIN_TRP_DDR4: 0x6E SPD_FTB_TRP_DDR4: 0x0 SPD_MIN_TCCDL_DDR4: 0x28 SPD_FTB_TCCDL_DDR4: 0x0 --------------------------------------------------------------------- pGblData item skt ch dimm value --------------------------------------------------------------------- SDRAMCapacity 1 1 0 0x5 BGNum 1 1 0 4 BankNum 1 1 0 16 ColBits 1 1 0 10 RowBits 1 1 0 17 SpdMirror 1 1 0 1 SpdVdd 1 1 0 3 PrimaryBusWidth 1 1 0 64 ExtensionBusWidth 1 1 0 8 RankSize 1 1 0 16384 SpdRMId 1 1 0 0x3206 SpdMMfgId 1 1 0 0xCE00 SpdMMDate 1 1 0 0x2817 SpdSerialNum 1 1 0 0x9AF22936 SpdMinTRCD 1 1 0 0x6E SpdMinTRCDFtb 1 1 0 0x0 nRCD 1 1 0 0x35B6 SpdMinTRRDL 1 1 0 0x28 SpdMinTRRD 1 1 0 0x1B SpdMinTRAS 1 1 0 0x100 SpdMinTRC 1 1 0 0x16E SpdMinTRCFtb 1 1 0 0x0 SpdMinTRFC 1 1 0 0xAF0 SpdMinTAA 1 1 0 0x6E SpdMinTAAFtb 1 1 0 0x0 SpdMinTFAW 1 1 0 0x68 SpdMinTRP 1 1 0 0x6E SpdMinTRPFtb 1 1 0 0x0 nRP 1 1 0 0x35B6 SpdMinTCCDL 1 1 0 0x28 SpdMinTCCDLFtb 1 1 0 0x0 SpdModuleAttr 1 1 0 0x0 SpdAddrMap 1 1 0 0x1 --------------------------------------------------------------------- socket[1] channel[1] SPD information: --------------------------------------------------------------------- item skt ch value --------------------------------------------------------------------- nWR 1 1 0ps nRCD 1 1 13750ps nRRDL 1 1 4900ps nRRD 1 1 3300ps nRAS 1 1 32000ps nRC 1 1 45750ps nRFC 1 1 350000ps nWTR 1 1 0ps nRTP 1 1 0ps nAA 1 1 13750ps nFAW 1 1 13000ps nRP 1 1 13750ps nCCDL 1 1 5000ps --------------------------------------------------------------------- socket[1] channel[2] dimm[0] i2c port[1] slaveAddr[0x50] SPD information: SPD_MIN_TRCD_DDR4: 0x6E SPD_FTB_TRCD_DDR4: 0x0 SPD_MIN_TRRDL_DDR4: 0x28 SPD_FTB_TRRDL_DDR4: 0x9C SPD_MIN_TRRDS_DDR4: 0x1B SPD_FTB_TRRDS_DDR4: 0xB5 SPD_EXT_TRC_TRAS_DDR4: 0x11 SPD_MIN_TRAS_DDR4: 0x0 SPD_MIN_TRC_DDR4: 0x6E SPD_FTB_TRC_DDR4: 0x0 SPD_MIN_TRFC1_MSB_DDR4: 0xA SPD_MIN_TRFC1_LSB_DDR4: 0xF0 tRFC: 0xAF0 tempCkNum: 0x55730 SPD_MIN_TAA_DDR4: 0x6E SPD_FTB_TAA: 0x0 SPD_TFAW_UPPER_DDR4: 0x0 SPD_MIN_TFAW_DDR4: 0x68 SPD_MIN_TRP_DDR4: 0x6E SPD_FTB_TRP_DDR4: 0x0 SPD_MIN_TCCDL_DDR4: 0x28 SPD_FTB_TCCDL_DDR4: 0x0 --------------------------------------------------------------------- pGblData item skt ch dimm value --------------------------------------------------------------------- SDRAMCapacity 1 2 0 0x5 BGNum 1 2 0 4 BankNum 1 2 0 16 ColBits 1 2 0 10 RowBits 1 2 0 17 SpdMirror 1 2 0 1 SpdVdd 1 2 0 3 PrimaryBusWidth 1 2 0 64 ExtensionBusWidth 1 2 0 8 RankSize 1 2 0 16384 SpdRMId 1 2 0 0x3206 SpdMMfgId 1 2 0 0xCE00 SpdMMDate 1 2 0 0x2817 SpdSerialNum 1 2 0 0x9BF22936 SpdMinTRCD 1 2 0 0x6E SpdMinTRCDFtb 1 2 0 0x0 nRCD 1 2 0 0x35B6 SpdMinTRRDL 1 2 0 0x28 SpdMinTRRD 1 2 0 0x1B SpdMinTRAS 1 2 0 0x100 SpdMinTRC 1 2 0 0x16E SpdMinTRCFtb 1 2 0 0x0 SpdMinTRFC 1 2 0 0xAF0 SpdMinTAA 1 2 0 0x6E SpdMinTAAFtb 1 2 0 0x0 SpdMinTFAW 1 2 0 0x68 SpdMinTRP 1 2 0 0x6E SpdMinTRPFtb 1 2 0 0x0 nRP 1 2 0 0x35B6 SpdMinTCCDL 1 2 0 0x28 SpdMinTCCDLFtb 1 2 0 0x0 SpdModuleAttr 1 2 0 0x0 SpdAddrMap 1 2 0 0x1 --------------------------------------------------------------------- socket[1] channel[2] SPD information: --------------------------------------------------------------------- item skt ch value --------------------------------------------------------------------- nWR 1 2 0ps nRCD 1 2 13750ps nRRDL 1 2 4900ps nRRD 1 2 3300ps nRAS 1 2 32000ps nRC 1 2 45750ps nRFC 1 2 350000ps nWTR 1 2 0ps nRTP 1 2 0ps nAA 1 2 13750ps nFAW 1 2 13000ps nRP 1 2 13750ps nCCDL 1 2 5000ps --------------------------------------------------------------------- socket[1] channel[3] dimm[0] i2c port[0] slaveAddr[0x50] SPD information: SPD_MIN_TRCD_DDR4: 0x6E SPD_FTB_TRCD_DDR4: 0x0 SPD_MIN_TRRDL_DDR4: 0x28 SPD_FTB_TRRDL_DDR4: 0x9C SPD_MIN_TRRDS_DDR4: 0x1B SPD_FTB_TRRDS_DDR4: 0xB5 SPD_EXT_TRC_TRAS_DDR4: 0x11 SPD_MIN_TRAS_DDR4: 0x0 SPD_MIN_TRC_DDR4: 0x6E SPD_FTB_TRC_DDR4: 0x0 SPD_MIN_TRFC1_MSB_DDR4: 0xA SPD_MIN_TRFC1_LSB_DDR4: 0xF0 tRFC: 0xAF0 tempCkNum: 0x55730 SPD_MIN_TAA_DDR4: 0x6E SPD_FTB_TAA: 0x0 SPD_TFAW_UPPER_DDR4: 0x0 SPD_MIN_TFAW_DDR4: 0x68 SPD_MIN_TRP_DDR4: 0x6E SPD_FTB_TRP_DDR4: 0x0 SPD_MIN_TCCDL_DDR4: 0x28 SPD_FTB_TCCDL_DDR4: 0x0 --------------------------------------------------------------------- pGblData item skt ch dimm value --------------------------------------------------------------------- SDRAMCapacity 1 3 0 0x5 BGNum 1 3 0 4 BankNum 1 3 0 16 ColBits 1 3 0 10 RowBits 1 3 0 17 SpdMirror 1 3 0 1 SpdVdd 1 3 0 3 PrimaryBusWidth 1 3 0 64 ExtensionBusWidth 1 3 0 8 RankSize 1 3 0 16384 SpdRMId 1 3 0 0x3206 SpdMMfgId 1 3 0 0xCE00 SpdMMDate 1 3 0 0x2817 SpdSerialNum 1 3 0 0x84E82936 SpdMinTRCD 1 3 0 0x6E SpdMinTRCDFtb 1 3 0 0x0 nRCD 1 3 0 0x35B6 SpdMinTRRDL 1 3 0 0x28 SpdMinTRRD 1 3 0 0x1B SpdMinTRAS 1 3 0 0x100 SpdMinTRC 1 3 0 0x16E SpdMinTRCFtb 1 3 0 0x0 SpdMinTRFC 1 3 0 0xAF0 SpdMinTAA 1 3 0 0x6E SpdMinTAAFtb 1 3 0 0x0 SpdMinTFAW 1 3 0 0x68 SpdMinTRP 1 3 0 0x6E SpdMinTRPFtb 1 3 0 0x0 nRP 1 3 0 0x35B6 SpdMinTCCDL 1 3 0 0x28 SpdMinTCCDLFtb 1 3 0 0x0 SpdModuleAttr 1 3 0 0x0 SpdAddrMap 1 3 0 0x1 --------------------------------------------------------------------- socket[1] channel[3] SPD information: --------------------------------------------------------------------- item skt ch value --------------------------------------------------------------------- nWR 1 3 0ps nRCD 1 3 13750ps nRRDL 1 3 4900ps nRRD 1 3 3300ps nRAS 1 3 32000ps nRC 1 3 45750ps nRFC 1 3 350000ps nWTR 1 3 0ps nRTP 1 3 0ps nAA 1 3 13750ps nFAW 1 3 13000ps nRP 1 3 13750ps nCCDL 1 3 5000ps --------------------------------------------------------------------- --------------------------------------------------------------------- Socket Channel Dimm Present Rank0 Rank1 Rank2 Rank3 0 0 0 YES YES YES NOT NOT 0 0 1 NOT NOT NOT NOT NOT 0 0 2 NOT NOT NOT NOT NOT 0 1 0 YES YES YES NOT NOT 0 1 1 NOT NOT NOT NOT NOT 0 1 2 NOT NOT NOT NOT NOT 0 2 0 YES YES YES NOT NOT 0 2 1 NOT NOT NOT NOT NOT 0 2 2 NOT NOT NOT NOT NOT 0 3 0 YES YES YES NOT NOT 0 3 1 NOT NOT NOT NOT NOT 0 3 2 NOT NOT NOT NOT NOT 1 0 0 YES YES YES NOT NOT 1 0 1 NOT NOT NOT NOT NOT 1 0 2 NOT NOT NOT NOT NOT 1 1 0 YES YES YES NOT NOT 1 1 1 NOT NOT NOT NOT NOT 1 1 2 NOT NOT NOT NOT NOT 1 2 0 YES YES YES NOT NOT 1 2 1 NOT NOT NOT NOT NOT 1 2 2 NOT NOT NOT NOT NOT 1 3 0 YES YES YES NOT NOT 1 3 1 NOT NOT NOT NOT NOT 1 3 2 NOT NOT NOT NOT NOT --------------------------------------------------------------------- ********************************************************************** Socket[0] Channel[0] Base:[0x60340000] Speed:[2400] ********************************************************************** ========================== config parameters from SPD ========================== DDR PHY PLL config.....................................OK! Top module cfg.........................................OK ch[0] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8 rank[0]: dmc_odt_config [0x603480A0]:wodt:0x1;rodt:0x2 rank[1]: dmc_odt_config [0x603480A4]:wodt:0x2;rodt:0x1 Dmc init static........................................OK Phy init dynamic.......................................OK [software pad_cal_0]: pvtr=0x1F; pvtn=0x1A; pvtp=0xC [software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD dimm[0] rcd init finished! rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[0] sdram init finished! rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[1] sdram init finished! ----------------------------------------------------- Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6 rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810 ----------------------------------------------------- Dram init..............................................OK socket[0] channel[0] rank[0] Phy gate leveling.....OK socket[0] channel[0] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001 lat_adj_start of rank 1 byte 1 is set to 0x00000001 lat_adj_start of rank 1 byte 6 is set to 0x00000001 lat_adj_start of rank 1 byte 7 is set to 0x00000001 OK socket[0] channel[0] rank[0] Phy write leveling.....OK socket[0] channel[0] rank[1] Phy write leveling.....OK socket[0] channel[0] rank[0] Phy write leveling 2...OK socket[0] channel[0] rank[1] Phy write leveling 2...OK socket[0] channel[0] rank[0] Read data eye training start: socket[0] channel[0] rank[0] Read data eye training end socket[0] channel[0] rank[1] Read data eye training start: socket[0] channel[0] rank[1] Read data eye training end socket[0] channel[0] rank[0] Write data eye training start: socket[0] channel[0] rank[0] Write data eye training end socket[0] channel[0] rank[1] Write data eye training start: socket[0] channel[0] rank[1] Write data eye training end socket[0] channel[0] Rx vref training start socket[0] channel[0] Rx vref training end socket[0] channel[0] rank[0] Read data eye training start: socket[0] channel[0] rank[0] Read data eye training end socket[0] channel[0] rank[1] Read data eye training start: socket[0] channel[0] rank[1] Read data eye training end socket[0] channel[0] rank[0] RxPerBitTrainingExmbistOptimize start: socket[0] channel[0] rank[0] RxPerBitTrainingExmbistOptimize end socket[0] channel[0] rank[1] RxPerBitTrainingExmbistOptimize start: socket[0] channel[0] rank[1] RxPerBitTrainingExmbistOptimize end socket[0] channel[0] Tx vref training start socket[0] channel[0] Tx vref training end socket[0] channel[0] rank[0] Write data eye training start: socket[0] channel[0] rank[0] Write data eye training end socket[0] channel[0] rank[1] Write data eye training start: socket[0] channel[0] rank[1] Write data eye training end //---------------------------------- sfc test rank0 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata sfc test rank1 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata //---------------------------------- ********************************************************************** Socket[0] Channel[0] DDR Init Finished! ********************************************************************** ********************************************************************** Socket[0] Channel[1] Base:[0x60350000] Speed:[2400] ********************************************************************** ========================== config parameters from SPD ========================== DDR PHY PLL config.....................................OK! Top module cfg.........................................OK ch[1] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8 rank[0]: dmc_odt_config [0x603580A0]:wodt:0x1;rodt:0x2 rank[1]: dmc_odt_config [0x603580A4]:wodt:0x2;rodt:0x1 Dmc init static........................................OK Phy init dynamic.......................................OK [software pad_cal_0]: pvtr=0x1F; pvtn=0x1B; pvtp=0xC [software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD dimm[0] rcd init finished! rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[0] sdram init finished! rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[1] sdram init finished! ----------------------------------------------------- Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6 rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810 ----------------------------------------------------- Dram init..............................................OK socket[0] channel[1] rank[0] Phy gate leveling.....OK socket[0] channel[1] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001 lat_adj_start of rank 1 byte 1 is set to 0x00000001 lat_adj_start of rank 1 byte 6 is set to 0x00000001 lat_adj_start of rank 1 byte 7 is set to 0x00000001 OK socket[0] channel[1] rank[0] Phy write leveling.....OK socket[0] channel[1] rank[1] Phy write leveling.....OK socket[0] channel[1] rank[0] Phy write leveling 2...OK socket[0] channel[1] rank[1] Phy write leveling 2...OK socket[0] channel[1] rank[0] Read data eye training start: socket[0] channel[1] rank[0] Read data eye training end socket[0] channel[1] rank[1] Read data eye training start: socket[0] channel[1] rank[1] Read data eye training end socket[0] channel[1] rank[0] Write data eye training start: socket[0] channel[1] rank[0] Write data eye training end socket[0] channel[1] rank[1] Write data eye training start: socket[0] channel[1] rank[1] Write data eye training end socket[0] channel[1] Rx vref training start socket[0] channel[1] Rx vref training end socket[0] channel[1] rank[0] Read data eye training start: socket[0] channel[1] rank[0] Read data eye training end socket[0] channel[1] rank[1] Read data eye training start: socket[0] channel[1] rank[1] Read data eye training end socket[0] channel[1] rank[0] RxPerBitTrainingExmbistOptimize start: socket[0] channel[1] rank[0] RxPerBitTrainingExmbistOptimize end socket[0] channel[1] rank[1] RxPerBitTrainingExmbistOptimize start: socket[0] channel[1] rank[1] RxPerBitTrainingExmbistOptimize end socket[0] channel[1] Tx vref training start socket[0] channel[1] Tx vref training end socket[0] channel[1] rank[0] Write data eye training start: socket[0] channel[1] rank[0] Write data eye training end socket[0] channel[1] rank[1] Write data eye training start: socket[0] channel[1] rank[1] Write data eye training end //---------------------------------- sfc test rank0 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata sfc test rank1 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata //---------------------------------- ********************************************************************** Socket[0] Channel[1] DDR Init Finished! ********************************************************************** ********************************************************************** Socket[0] Channel[2] Base:[0x40340000] Speed:[2400] ********************************************************************** ========================== config parameters from SPD ========================== DDR PHY PLL config.....................................OK! Top module cfg.........................................OK ch[2] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8 rank[0]: dmc_odt_config [0x403480A0]:wodt:0x1;rodt:0x2 rank[1]: dmc_odt_config [0x403480A4]:wodt:0x2;rodt:0x1 Dmc init static........................................OK Phy init dynamic.......................................OK [software pad_cal_0]: pvtr=0x1F; pvtn=0x1A; pvtp=0xC [software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD dimm[0] rcd init finished! rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[0] sdram init finished! rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[1] sdram init finished! ----------------------------------------------------- Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6 rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810 ----------------------------------------------------- Dram init..............................................OK socket[0] channel[2] rank[0] Phy gate leveling.....OK socket[0] channel[2] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001 lat_adj_start of rank 1 byte 1 is set to 0x00000001 lat_adj_start of rank 1 byte 2 is set to 0x00000001 lat_adj_start of rank 1 byte 3 is set to 0x00000001 lat_adj_start of rank 1 byte 4 is set to 0x00000001 lat_adj_start of rank 1 byte 5 is set to 0x00000001 lat_adj_start of rank 1 byte 6 is set to 0x00000001 lat_adj_start of rank 1 byte 7 is set to 0x00000001 OK socket[0] channel[2] rank[0] Phy write leveling.....OK socket[0] channel[2] rank[1] Phy write leveling.....OK socket[0] channel[2] rank[0] Phy write leveling 2...OK socket[0] channel[2] rank[1] Phy write leveling 2...OK socket[0] channel[2] rank[0] Read data eye training start: socket[0] channel[2] rank[0] Read data eye training end socket[0] channel[2] rank[1] Read data eye training start: socket[0] channel[2] rank[1] Read data eye training end socket[0] channel[2] rank[0] Write data eye training start: socket[0] channel[2] rank[0] Write data eye training end socket[0] channel[2] rank[1] Write data eye training start: socket[0] channel[2] rank[1] Write data eye training end socket[0] channel[2] Rx vref training start socket[0] channel[2] Rx vref training end socket[0] channel[2] rank[0] Read data eye training start: socket[0] channel[2] rank[0] Read data eye training end socket[0] channel[2] rank[1] Read data eye training start: socket[0] channel[2] rank[1] Read data eye training end socket[0] channel[2] rank[0] RxPerBitTrainingExmbistOptimize start: socket[0] channel[2] rank[0] RxPerBitTrainingExmbistOptimize end socket[0] channel[2] rank[1] RxPerBitTrainingExmbistOptimize start: socket[0] channel[2] rank[1] RxPerBitTrainingExmbistOptimize end socket[0] channel[2] Tx vref training start socket[0] channel[2] Tx vref training end socket[0] channel[2] rank[0] Write data eye training start: socket[0] channel[2] rank[0] Write data eye training end socket[0] channel[2] rank[1] Write data eye training start: socket[0] channel[2] rank[1] Write data eye training end //---------------------------------- sfc test rank0 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata sfc test rank1 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata //---------------------------------- ********************************************************************** Socket[0] Channel[2] DDR Init Finished! ********************************************************************** ********************************************************************** Socket[0] Channel[3] Base:[0x40350000] Speed:[2400] ********************************************************************** ========================== config parameters from SPD ========================== DDR PHY PLL config.....................................OK! Top module cfg.........................................OK ch[3] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8 rank[0]: dmc_odt_config [0x403580A0]:wodt:0x1;rodt:0x2 rank[1]: dmc_odt_config [0x403580A4]:wodt:0x2;rodt:0x1 Dmc init static........................................OK Phy init dynamic.......................................OK [software pad_cal_0]: pvtr=0x1F; pvtn=0x1B; pvtp=0xC [software pad_cal_1]: pvtr=0x1F; pvtn=0x1C; pvtp=0xD dimm[0] rcd init finished! rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[0] sdram init finished! rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[1] sdram init finished! ----------------------------------------------------- Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6 rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810 ----------------------------------------------------- Dram init..............................................OK socket[0] channel[3] rank[0] Phy gate leveling.....OK socket[0] channel[3] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001 lat_adj_start of rank 1 byte 1 is set to 0x00000001 lat_adj_start of rank 1 byte 2 is set to 0x00000001 lat_adj_start of rank 1 byte 3 is set to 0x00000001 lat_adj_start of rank 1 byte 4 is set to 0x00000001 lat_adj_start of rank 1 byte 5 is set to 0x00000001 lat_adj_start of rank 1 byte 6 is set to 0x00000001 lat_adj_start of rank 1 byte 7 is set to 0x00000001 OK socket[0] channel[3] rank[0] Phy write leveling.....OK socket[0] channel[3] rank[1] Phy write leveling.....OK socket[0] channel[3] rank[0] Phy write leveling 2...OK socket[0] channel[3] rank[1] Phy write leveling 2...OK socket[0] channel[3] rank[0] Read data eye training start: socket[0] channel[3] rank[0] Read data eye training end socket[0] channel[3] rank[1] Read data eye training start: socket[0] channel[3] rank[1] Read data eye training end socket[0] channel[3] rank[0] Write data eye training start: socket[0] channel[3] rank[0] Write data eye training end socket[0] channel[3] rank[1] Write data eye training start: socket[0] channel[3] rank[1] Write data eye training end socket[0] channel[3] Rx vref training start socket[0] channel[3] Rx vref training end socket[0] channel[3] rank[0] Read data eye training start: socket[0] channel[3] rank[0] Read data eye training end socket[0] channel[3] rank[1] Read data eye training start: socket[0] channel[3] rank[1] Read data eye training end socket[0] channel[3] rank[0] RxPerBitTrainingExmbistOptimize start: socket[0] channel[3] rank[0] RxPerBitTrainingExmbistOptimize end socket[0] channel[3] rank[1] RxPerBitTrainingExmbistOptimize start: socket[0] channel[3] rank[1] RxPerBitTrainingExmbistOptimize end socket[0] channel[3] Tx vref training start socket[0] channel[3] Tx vref training end socket[0] channel[3] rank[0] Write data eye training start: socket[0] channel[3] rank[0] Write data eye training end socket[0] channel[3] rank[1] Write data eye training start: socket[0] channel[3] rank[1] Write data eye training end //---------------------------------- sfc test rank0 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata sfc test rank1 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata //---------------------------------- ********************************************************************** Socket[0] Channel[3] DDR Init Finished! ********************************************************************** ********************************************************************** Socket[1] Channel[0] Base:[0x40060340000] Speed:[2400] ********************************************************************** ========================== config parameters from SPD ========================== DDR PHY PLL config.....................................OK! Top module cfg.........................................OK ch[0] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8 rank[0]: dmc_odt_config [0x603480A0]:wodt:0x1;rodt:0x2 rank[1]: dmc_odt_config [0x603480A4]:wodt:0x2;rodt:0x1 Dmc init static........................................OK Phy init dynamic.......................................OK [software pad_cal_0]: pvtr=0x1F; pvtn=0x19; pvtp=0xB [software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD dimm[0] rcd init finished! rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[0] sdram init finished! rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[1] sdram init finished! ----------------------------------------------------- Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6 rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810 ----------------------------------------------------- Dram init..............................................OK socket[1] channel[0] rank[0] Phy gate leveling.....OK socket[1] channel[0] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001 lat_adj_start of rank 1 byte 1 is set to 0x00000001 lat_adj_start of rank 1 byte 6 is set to 0x00000001 lat_adj_start of rank 1 byte 7 is set to 0x00000001 OK socket[1] channel[0] rank[0] Phy write leveling.....OK socket[1] channel[0] rank[1] Phy write leveling.....OK socket[1] channel[0] rank[0] Phy write leveling 2...OK socket[1] channel[0] rank[1] Phy write leveling 2...OK socket[1] channel[0] rank[0] Read data eye training start: socket[1] channel[0] rank[0] Read data eye training end socket[1] channel[0] rank[1] Read data eye training start: socket[1] channel[0] rank[1] Read data eye training end socket[1] channel[0] rank[0] Write data eye training start: socket[1] channel[0] rank[0] Write data eye training end socket[1] channel[0] rank[1] Write data eye training start: socket[1] channel[0] rank[1] Write data eye training end socket[1] channel[0] Rx vref training start socket[1] channel[0] Rx vref training end socket[1] channel[0] rank[0] Read data eye training start: socket[1] channel[0] rank[0] Read data eye training end socket[1] channel[0] rank[1] Read data eye training start: socket[1] channel[0] rank[1] Read data eye training end socket[1] channel[0] rank[0] RxPerBitTrainingExmbistOptimize start: socket[1] channel[0] rank[0] RxPerBitTrainingExmbistOptimize end socket[1] channel[0] rank[1] RxPerBitTrainingExmbistOptimize start: socket[1] channel[0] rank[1] RxPerBitTrainingExmbistOptimize end socket[1] channel[0] Tx vref training start socket[1] channel[0] Tx vref training end socket[1] channel[0] rank[0] Write data eye training start: socket[1] channel[0] rank[0] Write data eye training end socket[1] channel[0] rank[1] Write data eye training start: socket[1] channel[0] rank[1] Write data eye training end //---------------------------------- sfc test rank0 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata sfc test rank1 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata //---------------------------------- ********************************************************************** Socket[1] Channel[0] DDR Init Finished! ********************************************************************** ********************************************************************** Socket[1] Channel[1] Base:[0x40060350000] Speed:[2400] ********************************************************************** ========================== config parameters from SPD ========================== DDR PHY PLL config.....................................OK! Top module cfg.........................................OK ch[1] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8 rank[0]: dmc_odt_config [0x603580A0]:wodt:0x1;rodt:0x2 rank[1]: dmc_odt_config [0x603580A4]:wodt:0x2;rodt:0x1 Dmc init static........................................OK Phy init dynamic.......................................OK [software pad_cal_0]: pvtr=0x1F; pvtn=0x1A; pvtp=0xC [software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD dimm[0] rcd init finished! rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[0] sdram init finished! rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[1] sdram init finished! ----------------------------------------------------- Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6 rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810 ----------------------------------------------------- Dram init..............................................OK socket[1] channel[1] rank[0] Phy gate leveling.....OK socket[1] channel[1] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001 lat_adj_start of rank 1 byte 1 is set to 0x00000001 lat_adj_start of rank 1 byte 6 is set to 0x00000001 lat_adj_start of rank 1 byte 7 is set to 0x00000001 OK socket[1] channel[1] rank[0] Phy write leveling.....OK socket[1] channel[1] rank[1] Phy write leveling.....OK socket[1] channel[1] rank[0] Phy write leveling 2...OK socket[1] channel[1] rank[1] Phy write leveling 2...OK socket[1] channel[1] rank[0] Read data eye training start: socket[1] channel[1] rank[0] Read data eye training end socket[1] channel[1] rank[1] Read data eye training start: socket[1] channel[1] rank[1] Read data eye training end socket[1] channel[1] rank[0] Write data eye training start: socket[1] channel[1] rank[0] Write data eye training end socket[1] channel[1] rank[1] Write data eye training start: socket[1] channel[1] rank[1] Write data eye training end socket[1] channel[1] Rx vref training start socket[1] channel[1] Rx vref training end socket[1] channel[1] rank[0] Read data eye training start: socket[1] channel[1] rank[0] Read data eye training end socket[1] channel[1] rank[1] Read data eye training start: socket[1] channel[1] rank[1] Read data eye training end socket[1] channel[1] rank[0] RxPerBitTrainingExmbistOptimize start: socket[1] channel[1] rank[0] RxPerBitTrainingExmbistOptimize end socket[1] channel[1] rank[1] RxPerBitTrainingExmbistOptimize start: socket[1] channel[1] rank[1] RxPerBitTrainingExmbistOptimize end socket[1] channel[1] Tx vref training start socket[1] channel[1] Tx vref training end socket[1] channel[1] rank[0] Write data eye training start: socket[1] channel[1] rank[0] Write data eye training end socket[1] channel[1] rank[1] Write data eye training start: socket[1] channel[1] rank[1] Write data eye training end //---------------------------------- sfc test rank0 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata sfc test rank1 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata //---------------------------------- ********************************************************************** Socket[1] Channel[1] DDR Init Finished! ********************************************************************** ********************************************************************** Socket[1] Channel[2] Base:[0x40040340000] Speed:[2400] ********************************************************************** ========================== config parameters from SPD ========================== DDR PHY PLL config.....................................OK! Top module cfg.........................................OK ch[2] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8 rank[0]: dmc_odt_config [0x403480A0]:wodt:0x1;rodt:0x2 rank[1]: dmc_odt_config [0x403480A4]:wodt:0x2;rodt:0x1 Dmc init static........................................OK Phy init dynamic.......................................OK [software pad_cal_0]: pvtr=0x1F; pvtn=0x1B; pvtp=0xC [software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD dimm[0] rcd init finished! rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[0] sdram init finished! rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[1] sdram init finished! ----------------------------------------------------- Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6 rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810 ----------------------------------------------------- Dram init..............................................OK socket[1] channel[2] rank[0] Phy gate leveling.....OK socket[1] channel[2] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001 lat_adj_start of rank 1 byte 1 is set to 0x00000001 lat_adj_start of rank 1 byte 2 is set to 0x00000001 lat_adj_start of rank 1 byte 3 is set to 0x00000001 lat_adj_start of rank 1 byte 4 is set to 0x00000001 lat_adj_start of rank 1 byte 5 is set to 0x00000001 lat_adj_start of rank 1 byte 6 is set to 0x00000001 lat_adj_start of rank 1 byte 7 is set to 0x00000001 OK socket[1] channel[2] rank[0] Phy write leveling.....OK socket[1] channel[2] rank[1] Phy write leveling.....OK socket[1] channel[2] rank[0] Phy write leveling 2...OK socket[1] channel[2] rank[1] Phy write leveling 2...OK socket[1] channel[2] rank[0] Read data eye training start: socket[1] channel[2] rank[0] Read data eye training end socket[1] channel[2] rank[1] Read data eye training start: socket[1] channel[2] rank[1] Read data eye training end socket[1] channel[2] rank[0] Write data eye training start: socket[1] channel[2] rank[0] Write data eye training end socket[1] channel[2] rank[1] Write data eye training start: socket[1] channel[2] rank[1] Write data eye training end socket[1] channel[2] Rx vref training start socket[1] channel[2] Rx vref training end socket[1] channel[2] rank[0] Read data eye training start: socket[1] channel[2] rank[0] Read data eye training end socket[1] channel[2] rank[1] Read data eye training start: socket[1] channel[2] rank[1] Read data eye training end socket[1] channel[2] rank[0] RxPerBitTrainingExmbistOptimize start: socket[1] channel[2] rank[0] RxPerBitTrainingExmbistOptimize end socket[1] channel[2] rank[1] RxPerBitTrainingExmbistOptimize start: socket[1] channel[2] rank[1] RxPerBitTrainingExmbistOptimize end socket[1] channel[2] Tx vref training start socket[1] channel[2] Tx vref training end socket[1] channel[2] rank[0] Write data eye training start: socket[1] channel[2] rank[0] Write data eye training end socket[1] channel[2] rank[1] Write data eye training start: socket[1] channel[2] rank[1] Write data eye training end //---------------------------------- sfc test rank0 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata sfc test rank1 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata //---------------------------------- ********************************************************************** Socket[1] Channel[2] DDR Init Finished! ********************************************************************** ********************************************************************** Socket[1] Channel[3] Base:[0x40040350000] Speed:[2400] ********************************************************************** ========================== config parameters from SPD ========================== DDR PHY PLL config.....................................OK! Top module cfg.........................................OK ch[3] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8 rank[0]: dmc_odt_config [0x403580A0]:wodt:0x1;rodt:0x2 rank[1]: dmc_odt_config [0x403580A4]:wodt:0x2;rodt:0x1 Dmc init static........................................OK Phy init dynamic.......................................OK [software pad_cal_0]: pvtr=0x1F; pvtn=0x1B; pvtp=0xC [software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD dimm[0] rcd init finished! rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[0] sdram init finished! rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4; rank[1] sdram init finished! ----------------------------------------------------- Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6 rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810 ----------------------------------------------------- Dram init..............................................OK socket[1] channel[3] rank[0] Phy gate leveling.....OK socket[1] channel[3] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001 lat_adj_start of rank 1 byte 1 is set to 0x00000001 lat_adj_start of rank 1 byte 2 is set to 0x00000001 lat_adj_start of rank 1 byte 3 is set to 0x00000001 lat_adj_start of rank 1 byte 4 is set to 0x00000001 lat_adj_start of rank 1 byte 5 is set to 0x00000001 lat_adj_start of rank 1 byte 6 is set to 0x00000001 lat_adj_start of rank 1 byte 7 is set to 0x00000001 OK socket[1] channel[3] rank[0] Phy write leveling.....OK socket[1] channel[3] rank[1] Phy write leveling.....OK socket[1] channel[3] rank[0] Phy write leveling 2...OK socket[1] channel[3] rank[1] Phy write leveling 2...OK socket[1] channel[3] rank[0] Read data eye training start: socket[1] channel[3] rank[0] Read data eye training end socket[1] channel[3] rank[1] Read data eye training start: socket[1] channel[3] rank[1] Read data eye training end socket[1] channel[3] rank[0] Write data eye training start: socket[1] channel[3] rank[0] Write data eye training end socket[1] channel[3] rank[1] Write data eye training start: socket[1] channel[3] rank[1] Write data eye training end socket[1] channel[3] Rx vref training start socket[1] channel[3] Rx vref training end socket[1] channel[3] rank[0] Read data eye training start: socket[1] channel[3] rank[0] Read data eye training end socket[1] channel[3] rank[1] Read data eye training start: socket[1] channel[3] rank[1] Read data eye training end socket[1] channel[3] rank[0] RxPerBitTrainingExmbistOptimize start: socket[1] channel[3] rank[0] RxPerBitTrainingExmbistOptimize end socket[1] channel[3] rank[1] RxPerBitTrainingExmbistOptimize start: socket[1] channel[3] rank[1] RxPerBitTrainingExmbistOptimize end socket[1] channel[3] Tx vref training start socket[1] channel[3] Tx vref training end socket[1] channel[3] rank[0] Write data eye training start: socket[1] channel[3] rank[0] Write data eye training end socket[1] channel[3] rank[1] Write data eye training start: socket[1] channel[3] rank[1] Write data eye training end //---------------------------------- sfc test rank0 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata sfc test rank1 [0]wdata: 0x11111111 - 0x11111111 rdata [1]wdata: 0x11111111 - 0x11111111 rdata [2]wdata: 0x22222222 - 0x22222222 rdata [3]wdata: 0x22222222 - 0x22222222 rdata [4]wdata: 0x33333333 - 0x33333333 rdata [5]wdata: 0x33333333 - 0x33333333 rdata [6]wdata: 0x44444444 - 0x44444444 rdata [7]wdata: 0x44444444 - 0x44444444 rdata [8]wdata: 0x55555555 - 0x55555555 rdata [9]wdata: 0x55555555 - 0x55555555 rdata [10]wdata: 0x66666666 - 0x66666666 rdata [11]wdata: 0x66666666 - 0x66666666 rdata [12]wdata: 0x77777777 - 0x77777777 rdata [13]wdata: 0x77777777 - 0x77777777 rdata [14]wdata: 0x88888888 - 0x88888888 rdata [15]wdata: 0x88888888 - 0x88888888 rdata [16]wdata: 0x44332211 - 0x44332211 rdata [17]wdata: 0x88776655 - 0x88776655 rdata //---------------------------------- ********************************************************************** Socket[1] Channel[3] DDR Init Finished! ********************************************************************** ======================================================================================== | socekt 0 | ======================================================================================== | Slot | Channel 0 | Channel 1 | Channel 2 | Channel 3 | ======================================================================================== | 0 | Samsung | Samsung | Samsung | Samsung | | | Montage | Montage | Montage | Montage | | | 32GB(2RX4) | 32GB(2RX4) | 32GB(2RX4) | 32GB(2RX4) | | | 2400 | 2400 | 2400 | 2400 | | | ww282017 | ww282017 | ww282017 | ww282017 | | | M393A4K40BB1-CRC | M393A4K40BB1-CRC | M393A4K40BB1-CRC | M393A4K40BB1-CRC | | | | | | | ---------------------------------------------------------------------------------------- | 1 | NO DIMM | NO DIMM | NO DIMM | NO DIMM | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ---------------------------------------------------------------------------------------- | 2 | NO DIMM | NO DIMM | NO DIMM | NO DIMM | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ---------------------------------------------------------------------------------------- ======================================================================================== | socekt 1 | ======================================================================================== | Slot | Channel 0 | Channel 1 | Channel 2 | Channel 3 | ======================================================================================== | 0 | Samsung | Samsung | Samsung | Samsung | | | Montage | Montage | Montage | Montage | | | 32GB(2RX4) | 32GB(2RX4) | 32GB(2RX4) | 32GB(2RX4) | | | 2400 | 2400 | 2400 | 2400 | | | ww282017 | ww282017 | ww282017 | ww282017 | | | M393A4K40BB1-CRC | M393A4K40BB1-CRC | M393A4K40BB1-CRC | M393A4K40BB1-CRC | | | | | | | ---------------------------------------------------------------------------------------- | 1 | NO DIMM | NO DIMM | NO DIMM | NO DIMM | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ---------------------------------------------------------------------------------------- | 2 | NO DIMM | NO DIMM | NO DIMM | NO DIMM | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ---------------------------------------------------------------------------------------- socket[0] channel[0] rank[0] memory clean start. socket[0] channel[1] rank[0] memory clean start. socket[0] channel[2] rank[0] memory clean start. socket[0] channel[3] rank[0] memory clean start. socket[1] channel[0] rank[0] memory clean start. socket[1] channel[1] rank[0] memory clean start. socket[1] channel[2] rank[0] memory clean start. socket[1] channel[3] rank[0] memory clean start. all rank[0] memory clean ok! socket[0] channel[0] rank[0] memory clean read start. socket[0] channel[1] rank[0] memory clean read start. socket[0] channel[2] rank[0] memory clean read start. socket[0] channel[3] rank[0] memory clean read start. socket[1] channel[0] rank[0] memory clean read start. socket[1] channel[1] rank[0] memory clean read start. socket[1] channel[2] rank[0] memory clean read start. socket[1] channel[3] rank[0] memory clean read start. all rank[0] memory clean read ok! socket[0] channel[0] rank[1] memory clean start. socket[0] channel[1] rank[1] memory clean start. socket[0] channel[2] rank[1] memory clean start. socket[0] channel[3] rank[1] memory clean start. socket[1] channel[0] rank[1] memory clean start. socket[1] channel[1] rank[1] memory clean start. socket[1] channel[2] rank[1] memory clean start. socket[1] channel[3] rank[1] memory clean start. all rank[1] memory clean ok! socket[0] channel[0] rank[1] memory clean read start. socket[0] channel[1] rank[1] memory clean read start. socket[0] channel[2] rank[1] memory clean read start. socket[0] channel[3] rank[1] memory clean read start. socket[1] channel[0] rank[1] memory clean read start. socket[1] channel[1] rank[1] memory clean read start. socket[1] channel[2] rank[1] memory clean read start. socket[1] channel[3] rank[1] memory clean read start. all rank[1] memory clean read ok! RAM Diagnose or not ? (Press 'Ctrl+t' or 'Ctrl+T' to Begin Memory Diagnose) Now wait for 3 seconds... Not Press 'Ctrl+t' or 'Ctrl+T', The RAM Diagnose Exit Start config DAW. Record Interrupts Interrupt Status:[SocketId: 0] [DieId: 1] [DDRC0] = 0xB0111168 Interrupt Status:[SocketId: 0] [DieId: 1] [DDRC1] = 0xA0311168 Interrupt Status:[SocketId: 0] [DieId: 3] [DDRC0] = 0x10201051 Interrupt Status:[SocketId: 0] [DieId: 3] [DDRC1] = 0x301164 Interrupt Status:[SocketId: 0] [DieId: 1] [RASC0] = 0x16323 Interrupt Status:[SocketId: 0] [DieId: 1] [RASC1] = 0x403103 Interrupt Status:[SocketId: 0] [DieId: 3] [RASC0] = 0x613010 Interrupt Status:[SocketId: 0] [DieId: 3] [RASC1] = 0xB03112 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS0_INT0] = 0x8A Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS1_INT0] = 0x10 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS2_INT0] = 0x220 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS3_INT0] = 0x708 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS4_INT0] = 0x40 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS5_INT0] = 0x20 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS6_INT0] = 0x4 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS0_INT1] = 0x8089 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS1_INT1] = 0x980 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS2_INT1] = 0xCA0040 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS3_INT1] = 0x42AC0C Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS5_INT1] = 0x4404 Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS6_INT1] = 0x5960 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS0_INT0] = 0x6 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS1_INT0] = 0x16 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS2_INT0] = 0x38 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS3_INT0] = 0x10 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS4_INT0] = 0x82 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS5_INT0] = 0x40 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS0_INT1] = 0x1400 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS1_INT1] = 0x2C4 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS2_INT1] = 0xC044 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS3_INT1] = 0x80820 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS4_INT1] = 0x8008 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS5_INT1] = 0xD06 Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS6_INT1] = 0x181 Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS0_INT0] = 0x68 Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS1_INT0] = 0xE4 Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS2_INT0] = 0x74 Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS0_INT1] = 0x3CBC Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS1_INT1] = 0x2410 Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS2_INT1] = 0x40 Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS0_INT0] = 0xEC Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS1_INT0] = 0x3B Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS2_INT0] = 0xFC Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS0_INT1] = 0xB144 Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS1_INT1] = 0x346D Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS2_INT1] = 0xE8B1 Interrupt Status:[SocketId: 0] [DieId: 1] [HHA0] = 0x98020 Interrupt Status:[SocketId: 0] [DieId: 1] [HHA1] = 0x400 Interrupt Status:[SocketId: 0] [DieId: 3] [HHA0] = 0x9121 Interrupt Status:[SocketId: 0] [DieId: 3] [HHA1] = 0x80200 Interrupt Status:[SocketId: 0] [DieId: 1] [LLC0] = 0x2A0 Interrupt Status:[SocketId: 0] [DieId: 1] [LLC1] = 0xA80 Interrupt Status:[SocketId: 0] [DieId: 1] [LLC3] = 0x20000 Interrupt Status:[SocketId: 0] [DieId: 3] [LLC0] = 0x400 Interrupt Status:[SocketId: 0] [DieId: 3] [LLC1] = 0x4020 Interrupt Status:[SocketId: 0] [DieId: 3] [LLC2] = 0x10001 Interrupt Status:[SocketId: 0] [DieId: 3] [LLC3] = 0x280 Interrupt Status:[SocketId: 0] [DieId: 1] [AA_CLUSTER0] = 0x3 Interrupt Status:[SocketId: 0] [DieId: 1] [AA_CLUSTER1] = 0x4 Interrupt Status:[SocketId: 0] [DieId: 1] [AA_CLUSTER2] = 0x2 Interrupt Status:[SocketId: 0] [DieId: 1] [AA_CLUSTER3] = 0x2 Interrupt Status:[SocketId: 0] [DieId: 1] [AA_POE] = 0x7 Interrupt Status:[SocketId: 0] [DieId: 3] [AA_CLUSTER3] = 0x2 Interrupt Status:[SocketId: 0] [DieId: 3] [AA_POE] = 0x7 Interrupt Status:[SocketId: 0] [DieId: 0] [AA_SAS] = 0x1 Interrupt Status:[SocketId: 0] [DieId: 2] [AA_ALG] = 0x3 Interrupt Status:[SocketId: 0] [DieId: 2] [AA_PCIE] = 0x3 Interrupt Status:[SocketId: 0] [DieId: 1] [AA_SRAM] = 0x8 Interrupt Status:[SocketId: 0] [DieId: 3] [AA_SRAM] = 0xEF Interrupt Status:[SocketId: 1] [DieId: 1] [DDRC0] = 0x9111115C Interrupt Status:[SocketId: 1] [DieId: 1] [DDRC1] = 0xE1501004 Interrupt Status:[SocketId: 1] [DieId: 3] [DDRC0] = 0xC1001179 Interrupt Status:[SocketId: 1] [DieId: 3] [DDRC1] = 0xA0311050 Interrupt Status:[SocketId: 1] [DieId: 1] [RASC0] = 0xA12321 Interrupt Status:[SocketId: 1] [DieId: 1] [RASC1] = 0x207222 Interrupt Status:[SocketId: 1] [DieId: 3] [RASC0] = 0x31A022 Interrupt Status:[SocketId: 1] [DieId: 3] [RASC1] = 0x6110 Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS0_INT0] = 0x68 Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS1_INT0] = 0x2C Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS2_INT0] = 0xA Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS3_INT0] = 0x613 Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS4_INT0] = 0x12 Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS0_INT1] = 0x7E4 Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS1_INT1] = 0x305 Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS2_INT1] = 0x124000 Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS3_INT1] = 0x823060 Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS4_INT1] = 0x201 Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS5_INT1] = 0x35E Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS6_INT1] = 0x1D55 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS0_INT0] = 0x2 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS2_INT0] = 0x800 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS3_INT0] = 0x200 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS4_INT0] = 0x86 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS5_INT0] = 0x20 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS6_INT0] = 0x8C Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS0_INT1] = 0x100 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS1_INT1] = 0x5C8D Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS2_INT1] = 0x3CACC Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS3_INT1] = 0x18388 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS4_INT1] = 0x4180 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS5_INT1] = 0x8882 Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS6_INT1] = 0xB104 Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS0_INT0] = 0x60 Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS1_INT0] = 0x3C Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS2_INT0] = 0xC8 Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS0_INT1] = 0x810 Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS1_INT1] = 0x3043 Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS2_INT1] = 0x4029 Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS0_INT0] = 0x8 Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS2_INT0] = 0xE Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS0_INT1] = 0xA05C Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS1_INT1] = 0x4940 Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS2_INT1] = 0x2D4D Interrupt Status:[SocketId: 1] [DieId: 1] [HHA0] = 0xC011 Interrupt Status:[SocketId: 1] [DieId: 1] [HHA1] = 0x8A041 Interrupt Status:[SocketId: 1] [DieId: 3] [HHA0] = 0x30 Interrupt Status:[SocketId: 1] [DieId: 3] [HHA1] = 0x48002 Interrupt Status:[SocketId: 1] [DieId: 1] [LLC0] = 0x8220 Interrupt Status:[SocketId: 1] [DieId: 1] [LLC1] = 0x8000 Interrupt Status:[SocketId: 1] [DieId: 1] [LLC3] = 0x20 Interrupt Status:[SocketId: 1] [DieId: 3] [LLC0] = 0x5000 Interrupt Status:[SocketId: 1] [DieId: 3] [LLC2] = 0x20 Interrupt Status:[SocketId: 1] [DieId: 1] [AA_CLUSTER3] = 0x2 Interrupt Status:[SocketId: 1] [DieId: 1] [AA_POE] = 0x6 Interrupt Status:[SocketId: 1] [DieId: 3] [AA_CLUSTER1] = 0x2 Interrupt Status:[SocketId: 1] [DieId: 3] [AA_CLUSTER3] = 0x1 Interrupt Status:[SocketId: 1] [DieId: 3] [AA_POE] = 0x2 Interrupt Status:[SocketId: 1] [DieId: 0] [AA_ALG] = 0x1 Interrupt Status:[SocketId: 1] [DieId: 0] [AA_PCIE] = 0x2 Interrupt Status:[SocketId: 1] [DieId: 2] [AA_ALG] = 0x1 Interrupt Status:[SocketId: 1] [DieId: 2] [AA_SAS] = 0x1 Interrupt Status:[SocketId: 1] [DieId: 1] [AA_SRAM] = 0xFD Interrupt Status:[SocketId: 1] [DieId: 3] [AA_SRAM] = 0x7B Clear Interrupts Clear DDRC Clear RASC Clear CS Clear SLLC Clear HHA Clear LLC Clear AA Clear SRAM Clear DDRC Clear RASC Clear CS Clear SLLC Clear HHA Clear LLC Clear AA Clear SRAM Clear Interrupt End Enable Channel Interleave for socket[0] Enable Channel Interleave for socket[0] Daw Cinfig :Skt 0 Ch: 3 , Base = 0x0, Size = 0x40000000, DieInterLeaveEn = 0 ColBits = 0xA RowBits = 0x11 Banknum = 0x10 RankSize = 0x400000000 Ranknum = 0x2 DramWidth = 0x4 Size = 0x1000000000 Daw Config: Skt 0 Ch: 3 , Base = 0x1000000000, Size = 0x1000000000, DieInterLeaveEn = 0 LowMemory(<4G):Base=0x0, Size=0x40000000 HighMemory(>4G):Base=0x1040000000, Size=0x7C0000000 HighMemory(>4G):Base=0x1040000000, Size=0x7C0000000 HighMemory(>4G):Base=0x1800000000, Size=0x7FC000000 ColBits = 0xA RowBits = 0x11 Banknum = 0x10 RankSize = 0x400000000 Ranknum = 0x2 DramWidth = 0x4 Size = 0x1000000000 Daw Config: Skt 0 Ch: 1 , Base = 0x2000000000, Size = 0x1000000000, DieInterLeaveEn = 0 HighMemory(>4G):Base=0x2000000000, Size=0xFFC000000 Enable Channel Interleave for socket[1] Enable Channel Interleave for socket[1] Daw Cinfig :Skt 1 Ch: 3 , Base = 0x0, Size = 0x40000000, DieInterLeaveEn = 0 ColBits = 0xA RowBits = 0x11 Banknum = 0x10 RankSize = 0x400000000 Ranknum = 0x2 DramWidth = 0x4 Size = 0x1000000000 Daw Config: Skt 1 Ch: 3 , Base = 0x1000000000, Size = 0x1000000000, DieInterLeaveEn = 0 HighMemory(>4G):Base=0x41000000000, Size=0xFFC000000 ColBits = 0xA RowBits = 0x11 Banknum = 0x10 RankSize = 0x400000000 Ranknum = 0x2 DramWidth = 0x4 Size = 0x1000000000 Daw Config: Skt 1 Ch: 1 , Base = 0x2000000000, Size = 0x1000000000, DieInterLeaveEn = 0 HighMemory(>4G):Base=0x42000000000, Size=0xFFC000000 Finish Config DAW. Start config RAS or ECC. pGblData->mem.rascBypass = 1 pGblData->mem.demandScrubMode = 0 pGblData->mem.patrolScrubMode = 0 skt[0] ch[0] ecc enable. skt[0] ch[1] ecc enable. skt[0] ch[2] ecc enable. skt[0] ch[3] ecc enable. skt[1] ch[0] ecc enable. skt[1] ch[1] ecc enable. skt[1] ch[2] ecc enable. skt[1] ch[3] ecc enable. Finish config RAS or ECC. Clean ddrc or rasc interrupt OK NOTICE: PL011_UART_BASE: 0x602b0000 NOTICE: BL1: 0x3fc8a000 - 0x3fc8b000 [size = 4096] NOTICE: Booting Trusted Firmware NOTICE: BL1: v1.1(release):50e18f8 NOTICE: BL1: Built : 08:50:23, Feb 25 2017 NOTICE: BL1: Booting BL2 NOTICE: BL2: v1.1(release):50e18f8 NOTICE: BL2: Built : 08:50:24, Feb 25 2017 NOTICE: BL1: Booting BL3-1 NOTICE: Before BL31 EL3 MMU NOTICE: After BL31 EL3 MMU NOTICE: BL3-1: v1.1(release):50e18f8 NOTICE: BL3-1: Built : 08:50:27, Feb 25 2017 NOTICE: [runtime_svc_init]:[94L] rt_svc_descs_num=0x1 NOTICE: [runtime_svc_init]:[109L] start_oen=4 end_oen=4 call_type=1 std_svc NOTICE: [psci_init_aff_map]:[296L] mpidr = 0 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 0 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 1 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 2 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 3 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 4 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 5 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 6 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 7 NOTICE: [psci_init_aff_map]:[296L] mpidr = 0 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 8 NOTICE: [psci_init_aff_map]:[296L] mpidr = 100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 9 NOTICE: [psci_init_aff_map]:[296L] mpidr = 200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 10 NOTICE: [psci_init_aff_map]:[296L] mpidr = 300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 11 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 12 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 13 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 14 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 15 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 16 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 17 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 18 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 19 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 20 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 21 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 22 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 23 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 24 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 25 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 26 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 27 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 28 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 29 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 30 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 31 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 32 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 33 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 34 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 35 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 36 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 37 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 38 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 39 NOTICE: [psci_init_aff_map]:[296L] mpidr = 0 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 40 NOTICE: [psci_init_aff_map]:[296L] mpidr = 1 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 41 NOTICE: [psci_init_aff_map]:[296L] mpidr = 2 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 42 NOTICE: [psci_init_aff_map]:[296L] mpidr = 3 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 43 NOTICE: [psci_init_aff_map]:[296L] mpidr = 100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 44 NOTICE: [psci_init_aff_map]:[296L] mpidr = 101 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 45 NOTICE: [psci_init_aff_map]:[296L] mpidr = 102 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 46 NOTICE: [psci_init_aff_map]:[296L] mpidr = 103 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 47 NOTICE: [psci_init_aff_map]:[296L] mpidr = 200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 48 NOTICE: [psci_init_aff_map]:[296L] mpidr = 201 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 49 NOTICE: [psci_init_aff_map]:[296L] mpidr = 202 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 50 NOTICE: [psci_init_aff_map]:[296L] mpidr = 203 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 51 NOTICE: [psci_init_aff_map]:[296L] mpidr = 300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 52 NOTICE: [psci_init_aff_map]:[296L] mpidr = 301 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 53 NOTICE: [psci_init_aff_map]:[296L] mpidr = 302 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 54 NOTICE: [psci_init_aff_map]:[296L] mpidr = 303 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 55 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 56 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10001 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 57 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10002 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 58 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10003 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 59 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 60 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10101 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 61 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10102 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 62 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10103 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 63 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 64 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10201 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 65 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10202 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 66 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10203 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 67 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 68 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10301 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 69 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10302 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 70 NOTICE: [psci_init_aff_map]:[296L] mpidr = 10303 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 71 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 72 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20001 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 73 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20002 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 74 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20003 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 75 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 76 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20101 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 77 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20102 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 78 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20103 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 79 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 80 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20201 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 81 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20202 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 82 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20203 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 83 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 84 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20301 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 85 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20302 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 86 NOTICE: [psci_init_aff_map]:[296L] mpidr = 20303 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 87 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 88 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30001 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 89 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30002 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 90 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30003 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 91 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 92 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30101 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 93 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30102 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 94 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30103 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 95 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 96 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30201 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 97 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30202 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 98 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30203 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 99 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 100 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30301 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 101 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30302 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 102 NOTICE: [psci_init_aff_map]:[296L] mpidr = 30303 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 103 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 104 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40001 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 105 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40002 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 106 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40003 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 107 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 108 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40101 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 109 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40102 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 110 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40103 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 111 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 112 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40201 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 113 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40202 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 114 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40203 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 115 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 116 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40301 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 117 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40302 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 118 NOTICE: [psci_init_aff_map]:[296L] mpidr = 40303 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 119 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 120 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50001 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 121 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50002 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 122 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50003 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 123 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 124 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50101 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 125 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50102 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 126 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50103 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 127 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 128 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50201 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 129 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50202 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 130 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50203 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 131 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 132 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50301 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 133 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50302 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 134 NOTICE: [psci_init_aff_map]:[296L] mpidr = 50303 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 135 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 136 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60001 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 137 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60002 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 138 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60003 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 139 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 140 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60101 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 141 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60102 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 142 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60103 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 143 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 144 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60201 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 145 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60202 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 146 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60203 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 147 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 148 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60301 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 149 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60302 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 150 NOTICE: [psci_init_aff_map]:[296L] mpidr = 60303 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 151 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70000 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 152 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70001 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 153 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70002 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 154 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70003 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 155 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70100 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 156 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70101 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 157 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70102 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 158 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70103 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 159 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70200 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 160 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70201 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 161 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70202 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 162 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70203 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 163 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70300 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 164 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70301 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 165 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70302 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 166 NOTICE: [psci_init_aff_map]:[296L] mpidr = 70303 NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0 NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 167 NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5e800 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7ef80 :486=170 [serdes_hilink2_init]:hilink2_mode pcie2 8 lane Halt Macro 2 MCU!! Macro 2 Download Firmware Success!! Release Macro 2 MCU!! Temperature: 28 (0x1C) Temperature: 28 (0x1C) [serdes_init]:SerDes2 init success! Halt Macro 3 MCU!! Macro 3 Download Firmware Success!! Release Macro 3 MCU!! Temperature: 29 (0x1D) Temperature: 30 (0x1E) [serdes_init]:SerDes3 init success! Halt Macro 4 MCU!! Macro 4 Download Firmware Success!! Release Macro 4 MCU!! Temperature: 30 (0x1E) Temperature: 30 (0x1E) [serdes_init]:SerDes4 init success! [serdes_hilink5_init]:hilink5_mode sas1 4 lane Halt Macro 5 MCU!! Macro 5 Download Firmware Success!! Release Macro 5 MCU!! Temperature: 30 (0x1E) Temperature: 30 (0x1E) [serdes_init]:SerDes5 init success! [serdes_hilink6_init] lane 0 =>sas1 lane 0 [serdes_hilink6_init] lane 1 =>sas1 lane 1 [serdes_hilink6_init] lane 2 =>sas1 lane 2 [serdes_hilink6_init] lane 3 =>sas1 lane 3 Halt Macro 6 MCU!! Macro 6 Download Firmware Success!! Release Macro 6 MCU!! Temperature: 30 (0x1E) Temperature: 30 (0x1E) [serdes_init]:SerDes6 init success! [serdes_hilink0_init]:hilink0_mode pcie5 8 lane Halt Macro 0 MCU!! Macro 0 Download Firmware Success!! Release Macro 0 MCU!! Temperature: 27 (0x1B) Temperature: 27 (0x1B) [serdes_init]:SerDes0 init success! [serdes_hilink1_init]:hilink1_mode pcie4 8 lane Halt Macro 1 MCU!! Macro 1 Download Firmware Success!! Release Macro 1 MCU!! Temperature: 27 (0x1B) Temperature: 27 (0x1B) [serdes_init]:SerDes1 init success! [serdes_hilink5_init]:hilink5_mode pcie6 1 lane and pcie7 1 lane Halt Macro 5 MCU!! Macro 5 Download Firmware Success!! Release Macro 5 MCU!! Temperature: 27 (0x1B) Temperature: 27 (0x1B) [serdes_init]:SerDes5 init success! [serdes_hilink6_init] lane 0 =>sas5 lane 0 [serdes_hilink6_init] lane 1 =>sas5 lane 1 Halt Macro 6 MCU!! Macro 6 Download Firmware Success!! Release Macro 6 MCU!! Temperature: 27 (0x1B) Temperature: 27 (0x1B) [serdes_init]:SerDes6 init success! [serdes_hilink2_init]:hilink2_mode pcie2 8 lane Halt Macro 2 MCU!! Macro 2 Download Firmware Success!! Release Macro 2 MCU!! Temperature: 28 (0x1C) Temperature: 28 (0x1C) [serdes_init]:SerDes2 init success! Halt Macro 3 MCU!! Macro 3 Download Firmware Success!! Release Macro 3 MCU!! Temperature: 29 (0x1D) Temperature: 30 (0x1E) [serdes_init]:SerDes3 init success! Halt Macro 4 MCU!! Macro 4 Download Firmware Success!! Release Macro 4 MCU!! Temperature: 30 (0x1E) Temperature: 30 (0x1E) [serdes_init]:SerDes4 init success! [serdes_hilink5_init]:hilink5_mode sas1 4 lane Halt Macro 5 MCU!! Macro 5 Download Firmware Success!! Release Macro 5 MCU!! Temperature: 30 (0x1E) Temperature: 30 (0x1E) [serdes_init]:SerDes5 init success! [serdes_hilink6_init] lane 0 =>sas1 lane 0 [serdes_hilink6_init] lane 1 =>sas1 lane 1 [serdes_hilink6_init] lane 2 =>sas1 lane 2 [serdes_hilink6_init] lane 3 =>sas1 lane 3 Halt Macro 6 MCU!! Macro 6 Download Firmware Success!! Release Macro 6 MCU!! Temperature: 30 (0x1E) Temperature: 30 (0x1E) [serdes_init]:SerDes6 init success! [serdes_hilink0_init]:hilink0_mode pcie5 8 lane Halt Macro 0 MCU!! Macro 0 Download Firmware Success!! Release Macro 0 MCU!! Temperature: 27 (0x1B) Temperature: 27 (0x1B) [serdes_init]:SerDes0 init success! [serdes_hilink1_init]:hilink1_mode pcie4 8 lane Halt Macro 1 MCU!! Macro 1 Download Firmware Success!! Release Macro 1 MCU!! Temperature: 27 (0x1B) Temperature: 27 (0x1B) [serdes_init]:SerDes1 init success! [serdes_hilink5_init]:hilink5_mode pcie6 1 lane and pcie7 1 lane Halt Macro 5 MCU!! Macro 5 Download Firmware Success!! Release Macro 5 MCU!! Temperature: 27 (0x1B) Temperature: 27 (0x1B) [serdes_init]:SerDes5 init success! [serdes_hilink6_init] lane 0 =>sas5 lane 0 [serdes_hilink6_init] lane 1 =>sas5 lane 1 Halt Macro 6 MCU!! Macro 6 Download Firmware Success!! Release Macro 6 MCU!! Temperature: 27 (0x1B) Temperature: 27 (0x1B) [serdes_init]:SerDes6 init success! InfoFromBmc.ProductName TaiShan 2280 InfoFromBmc.SerialNum 2102311TBJ10H8000087 InfoFromBmc.ManufactureType02 Huawei InfoFromBmc.AssetTag InfoFromBmc.SrNumType02 024APL10H8000090 InfoFromBmc.AssetTagType03 InfoFromBmc.SrNumType03 To be filled by O.E.M. InfoFromBmc.VersionType03 InfoFromBmc.ChassisType03 InfoFromBmc.ManufacturerType03 Huawei Create event for smbios table transfer success. VerStr:1.12 Create event for miscellaneous ipmi operation success. Locate gEfiPciIoProtocol Failed. DawNum[0] = 2,DawNum[1] = 1,DawNum[2] =2,DawNum[3] =1 0 Base = 0x0, Size = 0x40000000 0 Base = 0x1000000000, Size = 0x1000000000 1 Base = 0x2000000000, Size = 0x1000000000 2 Base = 0x40000000000, Size = 0x40000000 2 Base = 0x41000000000, Size = 0x1000000000 3 Base = 0x42000000000, Size = 0x1000000000 [gmac_initialize]:[3650L] GpriData=0x3E8DE018 pPriv->ulMacSpeed:9 pPriv->ulMacDuplex:1 pPriv->ulPort:0 pPriv->ulGEBase:0xC7040000 pPriv->ulPpeCommonBase:0xC5070000 pPriv->ulPpeTNLBase:0xC5000000 pPriv->ulRCBCommonBase:0xC5080000 pPriv->ulRCBCommonEntryBase:0xC5080000 pPriv->ulRCBSramEntryBase:0xC5090000 pPriv->ulRingNum:0 pPriv->ulRingAddr:0 pPriv->ulMacAddr:0xA0 0xA3 0x3B 0xC1 0x40 0xE8 DSAF_init tbl_tcam_data 0x3F196CA0:0xA0A33BC1 0x40E80000 0x00000000 0x00000001 0x3F196CB0:0x00000000 tbl_tcam_ucast 0x3F196CA8:0x00000000 0x00000001 0x00000000 0x00000001 0x3F196CB8:0x0000007F 0x00000000 0x0000007F 0x00000000 0x3F196CC8:0x01000204 ----ok LocateProtocol mOemXgeStatusProtocol success. RXRING = 0x3E8D9000 TXRING = 0x3E8D4000 pPriv->ulTxMask = 512 RXBUFF = 0x3E6D3000 TXBUFF = 0x3E4D2000 [gmac_initialize]:[3650L] GpriData=0x3E44C018 pPriv->ulMacSpeed:9 pPriv->ulMacDuplex:1 pPriv->ulPort:1 pPriv->ulGEBase:0xC7044000 pPriv->ulPpeCommonBase:0xC5070000 pPriv->ulPpeTNLBase:0xC5010000 pPriv->ulRCBCommonBase:0xC5080000 pPriv->ulRCBCommonEntryBase:0xC5080000 pPriv->ulRCBSramEntryBase:0xC5090000 pPriv->ulRingNum:16 pPriv->ulRingAddr:1048576 pPriv->ulMacAddr:0xA0 0xA3 0x3B 0xC1 0x40 0xE9 DSAF_init tbl_tcam_data 0x3F196CA0:0xA0A33BC1 0x40E90001 0x00000000 0x00000001 0x3F196CB0:0x00000000 tbl_tcam_ucast 0x3F196CA8:0x00000000 0x00000001 0x00000000 0x00000001 0x3F196CB8:0x0000008F 0x00000000 0x0000008F 0xC13BA3A0 0x3F196CC8:0x0000E940 ----ok LocateProtocol mOemXgeStatusProtocol success. RXRING = 0x3E447000 TXRING = 0x3E442000 pPriv->ulTxMask = 512 RXBUFF = 0x3E241000 TXBUFF = 0x3E040000 [gmac_initialize]:[3650L] GpriData=0x3DFB8018 pPriv->ulMacSpeed:8 pPriv->ulMacDuplex:1 pPriv->ulPort:4 pPriv->ulGEBase:0xC7050000 pPriv->ulPpeCommonBase:0xC5070000 pPriv->ulPpeTNLBase:0xC5040000 pPriv->ulRCBCommonBase:0xC5080000 pPriv->ulRCBCommonEntryBase:0xC5080000 pPriv->ulRCBSramEntryBase:0xC5090000 pPriv->ulRingNum:64 pPriv->ulRingAddr:4194304 pPriv->ulMacAddr:0xA0 0xA3 0x3B 0xC1 0x40 0xE6 PhyID : 0x1410DD0 PhyAddr: 0x0 ETH_PhyInit 1928; Marvell 88E1512 detect! MII_CTRL_REG = 0x3100 MII_STAT_REG = 0x7949 page 18, reg20:0x1 page 0, reg17:0x4040 Phy Init OK DSAF_init tbl_tcam_data 0x3F196CA0:0xA0A33BC1 0x40E60004 0x00000000 0x00000001 0x3F196CB0:0x00000000 tbl_tcam_ucast 0x3F196CA8:0x00000000 0x00000001 0x00000000 0x00000001 0x3F196CB8:0x000000BF 0x00000000 0x000000BF 0xAFAFAFAF 0x3F196CC8:0xAFAFAFAF ----ok RXRING = 0x3DFB3000 TXRING = 0x3DFAD000 pPriv->ulTxMask = 512 RXBUFF = 0x3DDAB000 TXBUFF = 0x3DBA9000 [gmac_initialize]:[3650L] GpriData=0x3DB21018 pPriv->ulMacSpeed:8 pPriv->ulMacDuplex:1 pPriv->ulPort:5 pPriv->ulGEBase:0xC7054000 pPriv->ulPpeCommonBase:0xC5070000 pPriv->ulPpeTNLBase:0xC5050000 pPriv->ulRCBCommonBase:0xC5080000 pPriv->ulRCBCommonEntryBase:0xC5080000 pPriv->ulRCBSramEntryBase:0xC5090000 pPriv->ulRingNum:80 pPriv->ulRingAddr:5242880 pPriv->ulMacAddr:0xA0 0xA3 0x3B 0xC1 0x40 0xE7 PhyID : 0x1410DD0 PhyAddr: 0x1 ETH_PhyInit 1928; Marvell 88E1512 detect! MII_CTRL_REG = 0x3100 MII_STAT_REG = 0x7949 page 18, reg20:0x1 page 0, reg17:0x4000 Phy Init OK DSAF_init tbl_tcam_data 0x3F196CA0:0xA0A33BC1 0x40E70005 0x00000000 0x00000001 0x3F196CB0:0x00000000 tbl_tcam_ucast 0x3F196CA8:0x00000000 0x00000001 0x00000000 0x00000001 0x3F196CB8:0x000000CF 0x00000000 0x000000CF 0xAFAFAFAF 0x3F196CC8:0xAFAFAFAF ----ok RXRING = 0x3DB1C000 TXRING = 0x3DB17000 pPriv->ulTxMask = 512 RXBUFF = 0x3D916000 TXBUFF = 0x3D714000 SasDriverInitialize Ok!!! [sas_init,2173]Card:1 init ok [Higgs_StartPhy,185]Card:1 no cable on phy:0, default as electric cable [Higgs_IntrInquiryOperation,219]Identify info:0x20010202,DevType:2--2,uiPhyContext:0x0 [Higgs_PhyCtrlUpDown,332]Higgs_PhyCtrlUpDown at uiPhyId = 0x0 [Higgs_PhyCtrlUpDown,346]uiPhyId:0x0, uiIrqVal:0x26 [Higgs_PhyUp,503]phyid:0,Rate is 11 [SAINI_ClearPortRsc,449]Card:1 port:0 clr port rsc,remove all device from device list of Disc [SAINI_ExpanderBufferSwitch,1306]EXPANDER Buffer function is 2 ! [SAL_AbortSataDevIo,175]Now let's start AbortSataDev reset Io Card:1 msg:3D5CC9F0(uni id:0x0) to dev addr:0x500E004AAAAAAA00(sal dev:3D5D42D8) done func is NULL,v_pstMsg->stStatus.enDrvResp803 [SAL_AbortSataDevIo,175]Now let's start AbortSataDev reset Io Card:1 msg:3D5CCFD8(uni id:0x0) to dev addr:0x500E004AAAAAAA01(sal dev:3D5D4598) done func is NULL,v_pstMsg->stStatus.enDrvResp803 [SAL_AbortTaskSet,646]Now let's start abort SAS dev Io Card:1 msg:3D5CD5C0 to dev addr:0x500E004AAAAAAA1E(sal dev:3D5D4858),v_pstMsg->stStatus.enDrvResp803,pstMsg->pfnDone:31B85BF8 [SasScanDisk,838]Open Card:1 Phy:0 success! Success to register SasDevice:Port 0 SasAddr 0x500E004AAAAAAA00, status = Success Success to register SasDevice:Port 0 SasAddr 0x500E004AAAAAAA01, status = Success SasDriverStart Ok!!! SmiControllerDriverSupported - Status:Success Install GopDevicePath Handle 0 Install GopDevicePath Handle 3D54D898 Install GopDevicePath Status Success SmiGraphicsOutputSetMode + Resetting Memory setModeEx + programModeRegisters + [LPC] CRT_PLL1_750HS = 0x1D40A02 [LPC] CRT_PLL2_750HS = 0x206B851E [LPC] SECONDARY_DISPLAY_CTRL = 0x2087106 setModeEx - SmiGraphicsOutputSetMode x=640 y=480 SmiGraphicsOutputSetMode - SmiGraphicsOutputConstructor - [=3h[=3h[=3h[=3h[=3h[=3hSmiGraphicsOutputQueryMode + SmiGraphicsOutputQueryMode - SmiGraphicsOutputQueryMode + SmiGraphicsOutputQueryMode - SmiGraphicsOutputQueryMode + SmiGraphicsOutputQueryMode - SmiGraphicsOutputQueryMode + SmiGraphicsOutputQueryMode - [=3hSmiGraphicsOutputQueryMode + SmiGraphicsOutputQueryMode - [=3hSmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported SmiControllerDriverSupported - Status:Unsupported Press Enter to boot OS immediately. Press any other key in 10 seconds to stop automatical booting... SmiGraphicsOutputQueryMode + SmiGraphicsOutputQueryMode - ..Welcome to GRUB! GNU GRUB version 2.11 Minimal BASH-like line editing is supported. For the first word, TAB lists possible command completions. Anywhere else TAB lists possible device or file completions. grub> linux (tftp,192.168.201.1)/12799800/tftp-deploy-pfgboj3j/kernel/Image pcie_aspm=off pci=pcie_bus_perf root=/dev/ram0 ip=:::::eth0:dhcp linux (tftp,192.168.201.1)/12799800/tftp-deploy-pfgboj3j/kernel/Image pci e _aspm=off pci=pcie_bus_perf root=/dev/ram0 ip=:::::eth0:dhcp grub> devicetree (tftp,192.168.201.1)/12799800/tftp-deploy-pfgboj3j/dtb/hip07-d05.dtb devicetree (tftp,192.168.201.1)/12799800/tftp-deploy-pfgboj3j/dtb/hip07-d 0 5.dtb grub> initrd (tftp,192.168.201.1)/12799800/tftp-deploy-pfgboj3j/ramdisk/ramdisk.cpio.gz initrd (tftp,192.168.201.1)/12799800/tftp-deploy-pfgboj3j/ramdisk/ramdisk . cpio.gz grub> boot boot EFI stub: Booting Linux Kernel... EFI stub: Using DTB from configuration table EFI stub: Exiting boot services and installing virtual address map... [SAL_ClearAffiliationSMP,325]it is going to hard reset dev:0x500E004AAAAAAA1F [SAL_ClearAffiliationSMP,325]it is going to hard reset dev:0x500E004AAAAAAA1F SAS ExitBootServicesEvent GMAC ExitBootServicesEvent GMAC ExitBootServicesEvent GMAC ExitBootServicesEvent GMAC ExitBootServicesEvent OHCI ExitBootServicesEvent IPMI ExitBootService Event TransferSmbiosToBMC EVENT. Transfer Smbios Table To iBMC Success. GetVariable Status : Not Found. NOTICE: [psci_smc_handler]:[347L] PSCI_VERSION CALL NOTICE: [psci_version]:[99L] PSCI_MAJOR_VER: 10000: PSCI_MINOR_VER: 0 0809;;70 0809;;70 0809;;70 0809;;70 0809;;70 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10001 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5e880 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f190 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10002 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5e900 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f3a0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10003 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5e980 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f5b0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10100 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ea00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f7c0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10101 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ea80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f9d0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10102 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5eb00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7fbe0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10103 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5eb80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7fdf0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10200 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ec00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80000 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10201 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ec80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80210 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10202 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ed00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80420 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10203 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ed80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80630 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10300 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ee00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80840 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10301 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ee80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80a50 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10302 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ef00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80c60 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x10303 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ef80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80e70 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30000 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x0 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5f800 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83180 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30001 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5f880 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83390 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30002 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5f900 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc835a0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30003 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5f980 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc837b0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30100 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fa00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc839c0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30101 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fa80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83bd0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30102 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fb00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83de0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30103 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fb80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83ff0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30200 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fc00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84200 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30201 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fc80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84410 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30202 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fd00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84620 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30203 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fd80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84830 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30300 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fe00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84a40 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30301 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fe80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84c50 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30302 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ff00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84e60 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x30303 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ff80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc85070 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50000 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x0 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60800 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87380 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50001 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60880 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87590 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50002 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60900 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc877a0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50003 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60980 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc879b0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50100 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60a00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87bc0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50101 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60a80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87dd0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50102 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60b00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87fe0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50103 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60b80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc881f0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50200 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60c00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88400 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50201 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60c80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88610 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50202 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60d00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88820 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50203 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60d80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88a30 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50300 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60e00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88c40 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50301 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60e80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88e50 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50302 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60f00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc89060 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x50303 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60f80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc89270 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70000 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x0 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61800 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8b580 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70001 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61880 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8b790 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70002 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61900 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8b9a0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70003 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61980 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8bbb0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70100 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61a00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8bdc0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70101 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61a80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8bfd0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70102 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61b00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8c1e0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70103 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61b80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8c3f0 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70200 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61c00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8c600 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70201 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61c80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8c810 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70202 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61d00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8ca20 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70203 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61d80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8cc30 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70300 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61e00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8ce40 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70301 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61e80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8d050 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70302 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61f00 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8d260 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL NOTICE: [psci_smc_handler]:[409L] x1=0x70303 x2=0xec21e0 x3=0x0 NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020 NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000 NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000 0809;;70 NOTICE: [psci_afflvl_power_on_finish]:[504L] NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61f80 NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8d470 NOTICE: [psci_afflvl_power_on_finish]:[562L] 00><21>0 [ 0.000000] Booting Linux on physical CPU 0x0000010000 [0x410fd082] [ 0.000000] Linux version 4.19.306-cip107 (KernelCI@build-j113456-arm64-gcc-10-defconfig-kselftest-9ntfg) (gcc version 10.2.1 20210110 (Debian 10.2.1-6)) #1 SMP PREEMPT Mon Feb 19 05:24:10 UTC 2024 [ 0.000000] Machine model: Hisilicon Hip07 D05 Development Board [ 0.000000] efi: Getting EFI parameters from FDT: [ 0.000000] efi: EFI v2.60 by EDK II [ 0.000000] efi: SMBIOS=0x3f130000 SMBIOS 3.0=0x39d00000 ACPI=0x39dd0000 ACPI 2.0=0x39dd0014 MEMATTR=0x3cdf2018 [ 0.000000] cma: Reserved 32 MiB at 0x000000003d000000 [ 0.000000] OF: NUMA: parsing numa-distance-map-v1 [ 0.000000] NUMA: Warning: invalid memblk node 4 [mem 0x1040000000-0x1ffbffffff] [ 0.000000] NUMA: Faking a node at [mem 0x0000000000000000-0x0000042ffbffffff] [ 0.000000] NUMA: NODE_DATA [mem 0x42ffbfbc900-0x42ffbfbe1bf] [ 0.000000] Zone ranges: [ 0.000000] DMA32 [mem 0x0000000000000000-0x00000000ffffffff] [ 0.000000] Normal [mem 0x0000000100000000-0x0000042ffbffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000031b4ffff] [ 0.000000] node 0: [mem 0x0000000031b50000-0x0000000031b6ffff] [ 0.000000] node 0: [mem 0x0000000031b70000-0x0000000031b7afff] [ 0.000000] node 0: [mem 0x0000000031b7b000-0x0000000031b7efff] [ 0.000000] node 0: [mem 0x0000000031b7f000-0x0000000039bfffff] [ 0.000000] node 0: [mem 0x0000000039c00000-0x0000000039c4ffff] [ 0.000000] node 0: [mem 0x0000000039c50000-0x0000000039c9ffff] [ 0.000000] node 0: [mem 0x0000000039ca0000-0x0000000039caffff] [ 0.000000] node 0: [mem 0x0000000039cb0000-0x0000000039ceffff] [ 0.000000] node 0: [mem 0x0000000039cf0000-0x0000000039dbffff] [ 0.000000] node 0: [mem 0x0000000039dc0000-0x0000000039ddffff] [ 0.000000] node 0: [mem 0x0000000039de0000-0x000000003a13ffff] [ 0.000000] node 0: [mem 0x000000003a140000-0x000000003f12ffff] [ 0.000000] node 0: [mem 0x000000003f130000-0x000000003f15ffff] [ 0.000000] node 0: [mem 0x000000003f160000-0x000000003fbfffff] [ 0.000000] node 0: [mem 0x0000001040000000-0x0000001ffbffffff] [ 0.000000] node 0: [mem 0x0000002000000000-0x0000002ffbffffff] [ 0.000000] node 0: [mem 0x0000041000000000-0x0000041ffbffffff] [ 0.000000] node 0: [mem 0x0000042000000000-0x0000042ffbffffff] [ 0.000000] Zeroed struct page in unavailable ranges: 84 pages [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000042ffbffffff] [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] psci: SMC Calling Convention v1.0 [ 0.000000] percpu: Embedded 26 pages/cpu s65544 r8192 d32760 u106496 [ 0.000000] Detected PIPT I-cache on CPU0 [ 0.000000] ARM_SMCCC_ARCH_WORKAROUND_1 missing from firmware [ 0.000000] CPU features: enabling workaround for EL2 vector hardening [ 0.000000] CPU features: enabling workaround for Spectre-BHB [ 0.000000] CPU features: enabling workaround for ARM erratum 1742098 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 65994768 [ 0.000000] Policy zone: Normal [ 0.000000] Kernel command line: BOOT_IMAGE=(tftp,192.168.201.1)/12799800/tftp-deploy-pfgboj3j/kernel/Image pcie_aspm=off pci=pcie_bus_perf root=/dev/ram0 ip=:::::eth0:dhcp [ 0.000000] log_buf_len individual max cpu contribution: 4096 bytes [ 0.000000] log_buf_len total cpu_extra contributions: 258048 bytes [ 0.000000] log_buf_len min size: 131072 bytes [ 0.000000] log_buf_len: 524288 bytes [ 0.000000] early log buf free: 126124(96%) [ 0.000000] software IO TLB: mapped [mem 0x35c00000-0x39c00000] (64MB) [ 0.000000] Memory: 263809516K/268169216K available (14652K kernel code, 2160K rwdata, 5744K rodata, 1920K init, 12349K bss, 4326932K reserved, 32768K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=64, Nodes=1 [ 0.000000] ftrace: allocating 47012 entries in 184 pages [ 0.000000] ftrace: allocated 184 pages with 4 groups [ 0.000000] Running RCU self tests [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU lockdep checking is enabled. [ 0.000000] Tasks RCU enabled. [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode [ 0.000000] GICv3: Distributor has no Range Selector support [ 0.000000] GICv3: VLPI support, direct LPI support [ 0.000000] ITS [mem 0x4c000000-0x4c03ffff] [ 0.000000] ITS@0x000000004c000000: Using ITS number 0 [ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802 [ 0.000000] ITS@0x000000004c000000: allocated 524288 Devices @42efa800000 (flat, esz 8, psz 16K, shr 1) [ 0.000000] ITS@0x000000004c000000: allocated 65536 Virtual CPUs @42efb280000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS@0x000000004c000000: allocated 512 Interrupt Collections @42efb246000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS [mem 0x6c000000-0x6c03ffff] [ 0.000000] ITS@0x000000006c000000: Using ITS number 1 [ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802 [ 0.000000] ITS@0x000000006c000000: allocated 524288 Devices @42efa400000 (flat, esz 8, psz 16K, shr 1) [ 0.000000] ITS@0x000000006c000000: allocated 65536 Virtual CPUs @42efb300000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS@0x000000006c000000: allocated 512 Interrupt Collections @42efb247000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS [mem 0xc6000000-0xc603ffff] [ 0.000000] ITS@0x00000000c6000000: Using ITS number 2 [ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802 [ 0.000000] ITS@0x00000000c6000000: allocated 524288 Devices @42efa000000 (flat, esz 8, psz 16K, shr 1) [ 0.000000] ITS@0x00000000c6000000: allocated 65536 Virtual CPUs @42efb380000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS@0x00000000c6000000: allocated 512 Interrupt Collections @42efb248000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS [mem 0x8c6000000-0x8c603ffff] [ 0.000000] ITS@0x00000008c6000000: Using ITS number 3 [ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802 [ 0.000000] ITS@0x00000008c6000000: allocated 524288 Devices @42ef9800000 (flat, esz 8, psz 16K, shr 1) [ 0.000000] ITS@0x00000008c6000000: allocated 65536 Virtual CPUs @42ef9c80000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS@0x00000008c6000000: allocated 512 Interrupt Collections @42efb24a000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS [mem 0x4004c000000-0x4004c03ffff] [ 0.000000] ITS@0x000004004c000000: Using ITS number 4 [ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802 [ 0.000000] ITS@0x000004004c000000: allocated 524288 Devices @42ef9400000 (flat, esz 8, psz 16K, shr 1) [ 0.000000] ITS@0x000004004c000000: allocated 65536 Virtual CPUs @42ef9d00000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS@0x000004004c000000: allocated 512 Interrupt Collections @42efb24b000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS [mem 0x4006c000000-0x4006c03ffff] [ 0.000000] ITS@0x000004006c000000: Using ITS number 5 [ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802 [ 0.000000] ITS@0x000004006c000000: allocated 524288 Devices @42ef9000000 (flat, esz 8, psz 16K, shr 1) [ 0.000000] ITS@0x000004006c000000: allocated 65536 Virtual CPUs @42ef9d80000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS@0x000004006c000000: allocated 512 Interrupt Collections @42efb24c000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS [mem 0x400c6000000-0x400c603ffff] [ 0.000000] ITS@0x00000400c6000000: Using ITS number 6 [ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802 [ 0.000000] ITS@0x00000400c6000000: allocated 524288 Devices @42ef8c00000 (flat, esz 8, psz 16K, shr 1) [ 0.000000] ITS@0x00000400c6000000: allocated 65536 Virtual CPUs @42ef9e00000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS@0x00000400c6000000: allocated 512 Interrupt Collections @42efb24e000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS [mem 0x408c6000000-0x408c603ffff] [ 0.000000] ITS@0x00000408c6000000: Using ITS number 7 [ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802 [ 0.000000] ITS@0x00000408c6000000: allocated 524288 Devices @42ef8800000 (flat, esz 8, psz 16K, shr 1) [ 0.000000] ITS@0x00000408c6000000: allocated 65536 Virtual CPUs @42ef9e80000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] ITS@0x00000408c6000000: allocated 512 Interrupt Collections @42ef9c50000 (flat, esz 8, psz 4K, shr 1) [ 0.000000] GIC: using LPI property table @0x0000042ef9c60000 [ 0.000000] ITS: Using DirectLPI for VPE invalidation [ 0.000000] ITS: Enabling GICv4 support [ 0.000000] GICv3: CPU0: found redistributor 10000 region 0:0x000000004d100000 [ 0.000000] CPU0: using LPI pending table @0x0000042ef9c70000 [ 0.000000] arch_timer: cp15 timer(s) running at 50.00MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xb8812736b, max_idle_ns: 440795202655 ns [ 0.000001] sched_clock: 56 bits at 50MHz, resolution 20ns, wraps every 4398046511100ns [ 0.000273] Console: colour dummy device 80x25 [ 0.002906] console [tty0] enabled [ 0.002926] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar [ 0.002954] ... MAX_LOCKDEP_SUBCLASSES: 8 [ 0.002972] ... MAX_LOCK_DEPTH: 48 [ 0.002989] ... MAX_LOCKDEP_KEYS: 8191 [ 0.003007] ... CLASSHASH_SIZE: 4096 [ 0.003025] ... MAX_LOCKDEP_ENTRIES: 32768 [ 0.003043] ... MAX_LOCKDEP_CHAINS: 65536 [ 0.003061] ... CHAINHASH_SIZE: 32768 [ 0.003079] memory used by lock dependency info: 7391 kB [ 0.003100] per task-struct memory footprint: 1920 bytes [ 0.003198] Calibrating delay loop (skipped), value calculated using timer frequency.. 100.00 BogoMIPS (lpj=200000) [ 0.003236] pid_max: default: 65536 minimum: 512 [ 0.003365] Security Framework initialized [ 0.083359] Dentry cache hash table entries: 16777216 (order: 15, 134217728 bytes) [ 0.123276] Inode-cache hash table entries: 8388608 (order: 14, 67108864 bytes) [ 0.124636] Mount-cache hash table entries: 262144 (order: 9, 2097152 bytes) [ 0.125924] Mountpoint-cache hash table entries: 262144 (order: 9, 2097152 bytes) [ 0.222337] ASID allocator initialised with 32768 entries [ 0.222505] rcu: Hierarchical SRCU implementation. [ 0.222981] Platform MSI: interrupt-controller@4c000000 domain created [ 0.223023] Platform MSI: interrupt-controller@6c000000 domain created [ 0.223063] Platform MSI: interrupt-controller@c6000000 domain created [ 0.223102] Platform MSI: interrupt-controller@8,c6000000 domain created [ 0.223141] Platform MSI: interrupt-controller@400,4c000000 domain created [ 0.223181] Platform MSI: interrupt-controller@400,6c000000 domain created [ 0.223221] Platform MSI: interrupt-controller@400,c6000000 domain created [ 0.223261] Platform MSI: interrupt-controller@408,c6000000 domain created [ 0.223348] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@4c000000 domain created [ 0.223393] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@6c000000 domain created [ 0.223438] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@c6000000 domain created [ 0.223484] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@8,c6000000 domain created [ 0.223529] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@400,4c000000 domain created [ 0.223575] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@400,6c000000 domain created [ 0.223622] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@400,c6000000 domain created [ 0.223668] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@408,c6000000 domain created [ 0.224144] Remapping and enabling EFI services. [ 0.228336] smp: Bringing up secondary CPUs ... [ 0.279570] Detected PIPT I-cache on CPU1 [ 0.279587] GICv3: CPU1: found redistributor 10001 region 0:0x000000004d140000 [ 0.279658] CPU1: using LPI pending table @0x0000042eec270000 [ 0.279857] CPU1: Booted secondary processor 0x0000010001 [0x410fd082] [ 0.331901] Detected PIPT I-cache on CPU2 [ 0.331912] GICv3: CPU2: found redistributor 10002 region 0:0x000000004d180000 [ 0.331982] CPU2: using LPI pending table @0x0000042eec290000 [ 0.332136] CPU2: Booted secondary processor 0x0000010002 [0x410fd082] [ 0.384241] Detected PIPT I-cache on CPU3 [ 0.384250] GICv3: CPU3: found redistributor 10003 region 0:0x000000004d1c0000 [ 0.384318] CPU3: using LPI pending table @0x0000042eec2e0000 [ 0.384470] CPU3: Booted secondary processor 0x0000010003 [0x410fd082] [ 0.436583] Detected PIPT I-cache on CPU4 [ 0.436595] GICv3: CPU4: found redistributor 10100 region 0:0x000000004d200000 [ 0.436666] CPU4: using LPI pending table @0x0000042eec310000 [ 0.436820] CPU4: Booted secondary processor 0x0000010100 [0x410fd082] [ 0.488921] Detected PIPT I-cache on CPU5 [ 0.488932] GICv3: CPU5: found redistributor 10101 region 0:0x000000004d240000 [ 0.489001] CPU5: using LPI pending table @0x0000042eec370000 [ 0.489151] CPU5: Booted secondary processor 0x0000010101 [0x410fd082] [ 0.541262] Detected PIPT I-cache on CPU6 [ 0.541273] GICv3: CPU6: found redistributor 10102 region 0:0x000000004d280000 [ 0.541345] CPU6: using LPI pending table @0x0000042eec380000 [ 0.541497] CPU6: Booted secondary processor 0x0000010102 [0x410fd082] [ 0.593603] Detected PIPT I-cache on CPU7 [ 0.593614] GICv3: CPU7: found redistributor 10103 region 0:0x000000004d2c0000 [ 0.593683] CPU7: using LPI pending table @0x0000042eec3e0000 [ 0.593835] CPU7: Booted secondary processor 0x0000010103 [0x410fd082] [ 0.645945] Detected PIPT I-cache on CPU8 [ 0.645957] GICv3: CPU8: found redistributor 10200 region 0:0x000000004d300000 [ 0.646027] CPU8: using LPI pending table @0x0000042eebc00000 [ 0.646180] CPU8: Booted secondary processor 0x0000010200 [0x410fd082] [ 0.698284] Detected PIPT I-cache on CPU9 [ 0.698295] GICv3: CPU9: found redistributor 10201 region 0:0x000000004d340000 [ 0.698361] CPU9: using LPI pending table @0x0000042eebc60000 [ 0.698513] CPU9: Booted secondary processor 0x0000010201 [0x410fd082] [ 0.750625] Detected PIPT I-cache on CPU10 [ 0.750636] GICv3: CPU10: found redistributor 10202 region 0:0x000000004d380000 [ 0.750707] CPU10: using LPI pending table @0x0000042eebc80000 [ 0.750859] CPU10: Booted secondary processor 0x0000010202 [0x410fd082] [ 0.802965] Detected PIPT I-cache on CPU11 [ 0.802977] GICv3: CPU11: found redistributor 10203 region 0:0x000000004d3c0000 [ 0.803045] CPU11: using LPI pending table @0x0000042eebcd0000 [ 0.803196] CPU11: Booted secondary processor 0x0000010203 [0x410fd082] [ 0.855307] Detected PIPT I-cache on CPU12 [ 0.855320] GICv3: CPU12: found redistributor 10300 region 0:0x000000004d400000 [ 0.855387] CPU12: using LPI pending table @0x0000042eebcf0000 [ 0.855541] CPU12: Booted secondary processor 0x0000010300 [0x410fd082] [ 0.907645] Detected PIPT I-cache on CPU13 [ 0.907657] GICv3: CPU13: found redistributor 10301 region 0:0x000000004d440000 [ 0.907726] CPU13: using LPI pending table @0x0000042eebd50000 [ 0.907878] CPU13: Booted secondary processor 0x0000010301 [0x410fd082] [ 0.959986] Detected PIPT I-cache on CPU14 [ 0.959998] GICv3: CPU14: found redistributor 10302 region 0:0x000000004d480000 [ 0.960065] CPU14: using LPI pending table @0x0000042eebd70000 [ 0.960216] CPU14: Booted secondary processor 0x0000010302 [0x410fd082] [ 1.012326] Detected PIPT I-cache on CPU15 [ 1.012338] GICv3: CPU15: found redistributor 10303 region 0:0x000000004d4c0000 [ 1.012406] CPU15: using LPI pending table @0x0000042eebd90000 [ 1.012558] CPU15: Booted secondary processor 0x0000010303 [0x410fd082] [ 1.064326] Detected PIPT I-cache on CPU16 [ 1.064344] GICv3: CPU16: found redistributor 30000 region 1:0x000000006d100000 [ 1.064417] CPU16: using LPI pending table @0x0000042eebdf0000 [ 1.064620] CPU16: Booted secondary processor 0x0000030000 [0x410fd082] [ 1.116662] Detected PIPT I-cache on CPU17 [ 1.116675] GICv3: CPU17: found redistributor 30001 region 1:0x000000006d140000 [ 1.116750] CPU17: using LPI pending table @0x0000042eebe00000 [ 1.116947] CPU17: Booted secondary processor 0x0000030001 [0x410fd082] [ 1.169003] Detected PIPT I-cache on CPU18 [ 1.169016] GICv3: CPU18: found redistributor 30002 region 1:0x000000006d180000 [ 1.169087] CPU18: using LPI pending table @0x0000042eebe60000 [ 1.169285] CPU18: Booted secondary processor 0x0000030002 [0x410fd082] [ 1.221343] Detected PIPT I-cache on CPU19 [ 1.221357] GICv3: CPU19: found redistributor 30003 region 1:0x000000006d1c0000 [ 1.221429] CPU19: using LPI pending table @0x0000042eebe80000 [ 1.221627] CPU19: Booted secondary processor 0x0000030003 [0x410fd082] [ 1.273687] Detected PIPT I-cache on CPU20 [ 1.273706] GICv3: CPU20: found redistributor 30100 region 1:0x000000006d200000 [ 1.273779] CPU20: using LPI pending table @0x0000042eebee0000 [ 1.273980] CPU20: Booted secondary processor 0x0000030100 [0x410fd082] [ 1.326023] Detected PIPT I-cache on CPU21 [ 1.326037] GICv3: CPU21: found redistributor 30101 region 1:0x000000006d240000 [ 1.326108] CPU21: using LPI pending table @0x0000042eebef0000 [ 1.326305] CPU21: Booted secondary processor 0x0000030101 [0x410fd082] [ 1.378364] Detected PIPT I-cache on CPU22 [ 1.378378] GICv3: CPU22: found redistributor 30102 region 1:0x000000006d280000 [ 1.378450] CPU22: using LPI pending table @0x0000042eebf50000 [ 1.378645] CPU22: Booted secondary processor 0x0000030102 [0x410fd082] [ 1.430705] Detected PIPT I-cache on CPU23 [ 1.430720] GICv3: CPU23: found redistributor 30103 region 1:0x000000006d2c0000 [ 1.430791] CPU23: using LPI pending table @0x0000042eebf70000 [ 1.430989] CPU23: Booted secondary processor 0x0000030103 [0x410fd082] [ 1.483050] Detected PIPT I-cache on CPU24 [ 1.483069] GICv3: CPU24: found redistributor 30200 region 1:0x000000006d300000 [ 1.483143] CPU24: using LPI pending table @0x0000042eebfe0000 [ 1.483347] CPU24: Booted secondary processor 0x0000030200 [0x410fd082] [ 1.535385] Detected PIPT I-cache on CPU25 [ 1.535399] GICv3: CPU25: found redistributor 30201 region 1:0x000000006d340000 [ 1.535470] CPU25: using LPI pending table @0x0000042eebff0000 [ 1.535664] CPU25: Booted secondary processor 0x0000030201 [0x410fd082] [ 1.587726] Detected PIPT I-cache on CPU26 [ 1.587741] GICv3: CPU26: found redistributor 30202 region 1:0x000000006d380000 [ 1.587812] CPU26: using LPI pending table @0x0000042eeb850000 [ 1.588010] CPU26: Booted secondary processor 0x0000030202 [0x410fd082] [ 1.640066] Detected PIPT I-cache on CPU27 [ 1.640081] GICv3: CPU27: found redistributor 30203 region 1:0x000000006d3c0000 [ 1.640154] CPU27: using LPI pending table @0x0000042eeb870000 [ 1.640349] CPU27: Booted secondary processor 0x0000030203 [0x410fd082] [ 1.692411] Detected PIPT I-cache on CPU28 [ 1.692431] GICv3: CPU28: found redistributor 30300 region 1:0x000000006d400000 [ 1.692502] CPU28: using LPI pending table @0x0000042eeb8d0000 [ 1.692703] CPU28: Booted secondary processor 0x0000030300 [0x410fd082] [ 1.744747] Detected PIPT I-cache on CPU29 [ 1.744762] GICv3: CPU29: found redistributor 30301 region 1:0x000000006d440000 [ 1.744833] CPU29: using LPI pending table @0x0000042eeb8e0000 [ 1.745031] CPU29: Booted secondary processor 0x0000030301 [0x410fd082] [ 1.797087] Detected PIPT I-cache on CPU30 [ 1.797101] GICv3: CPU30: found redistributor 30302 region 1:0x000000006d480000 [ 1.797176] CPU30: using LPI pending table @0x0000042eeb940000 [ 1.797372] CPU30: Booted secondary processor 0x0000030302 [0x410fd082] [ 1.849428] Detected PIPT I-cache on CPU31 [ 1.849443] GICv3: CPU31: found redistributor 30303 region 1:0x000000006d4c0000 [ 1.849515] CPU31: using LPI pending table @0x0000042eeb960000 [ 1.849709] CPU31: Booted secondary processor 0x0000030303 [0x410fd082] [ 1.901462] Detected PIPT I-cache on CPU32 [ 1.901516] GICv3: CPU32: found redistributor 50000 region 2:0x000004004d100000 [ 1.901562] CPU32: using LPI pending table @0x0000042eeb9b0000 [ 1.901816] CPU32: Booted secondary processor 0x0000050000 [0x410fd082] [ 1.953777] Detected PIPT I-cache on CPU33 [ 1.953806] GICv3: CPU33: found redistributor 50001 region 2:0x000004004d140000 [ 1.953844] CPU33: using LPI pending table @0x0000042eeb9e0000 [ 1.954034] CPU33: Booted secondary processor 0x0000050001 [0x410fd082] [ 2.006117] Detected PIPT I-cache on CPU34 [ 2.006147] GICv3: CPU34: found redistributor 50002 region 2:0x000004004d180000 [ 2.006186] CPU34: using LPI pending table @0x0000042eeba40000 [ 2.006377] CPU34: Booted secondary processor 0x0000050002 [0x410fd082] [ 2.058457] Detected PIPT I-cache on CPU35 [ 2.058486] GICv3: CPU35: found redistributor 50003 region 2:0x000004004d1c0000 [ 2.058524] CPU35: using LPI pending table @0x0000042eeba50000 [ 2.058715] CPU35: Booted secondary processor 0x0000050003 [0x410fd082] [ 2.110800] Detected PIPT I-cache on CPU36 [ 2.110830] GICv3: CPU36: found redistributor 50100 region 2:0x000004004d200000 [ 2.110869] CPU36: using LPI pending table @0x0000042eebab0000 [ 2.111064] CPU36: Booted secondary processor 0x0000050100 [0x410fd082] [ 2.163137] Detected PIPT I-cache on CPU37 [ 2.163166] GICv3: CPU37: found redistributor 50101 region 2:0x000004004d240000 [ 2.163206] CPU37: using LPI pending table @0x0000042eebad0000 [ 2.163397] CPU37: Booted secondary processor 0x0000050101 [0x410fd082] [ 2.215479] Detected PIPT I-cache on CPU38 [ 2.215508] GICv3: CPU38: found redistributor 50102 region 2:0x000004004d280000 [ 2.215547] CPU38: using LPI pending table @0x0000042eebb30000 [ 2.215738] CPU38: Booted secondary processor 0x0000050102 [0x410fd082] [ 2.267818] Detected PIPT I-cache on CPU39 [ 2.267848] GICv3: CPU39: found redistributor 50103 region 2:0x000004004d2c0000 [ 2.267887] CPU39: using LPI pending table @0x0000042eebb50000 [ 2.268078] CPU39: Booted secondary processor 0x0000050103 [0x410fd082] [ 2.320161] Detected PIPT I-cache on CPU40 [ 2.320193] GICv3: CPU40: found redistributor 50200 region 2:0x000004004d300000 [ 2.320232] CPU40: using LPI pending table @0x0000042eebb70000 [ 2.320429] CPU40: Booted secondary processor 0x0000050200 [0x410fd082] [ 2.372499] Detected PIPT I-cache on CPU41 [ 2.372528] GICv3: CPU41: found redistributor 50201 region 2:0x000004004d340000 [ 2.372567] CPU41: using LPI pending table @0x0000042eebbd0000 [ 2.372760] CPU41: Booted secondary processor 0x0000050201 [0x410fd082] [ 2.424839] Detected PIPT I-cache on CPU42 [ 2.424869] GICv3: CPU42: found redistributor 50202 region 2:0x000004004d380000 [ 2.424908] CPU42: using LPI pending table @0x0000042eebbe0000 [ 2.425101] CPU42: Booted secondary processor 0x0000050202 [0x410fd082] [ 2.477181] Detected PIPT I-cache on CPU43 [ 2.477211] GICv3: CPU43: found redistributor 50203 region 2:0x000004004d3c0000 [ 2.477251] CPU43: using LPI pending table @0x0000042eeb440000 [ 2.477444] CPU43: Booted secondary processor 0x0000050203 [0x410fd082] [ 2.529522] Detected PIPT I-cache on CPU44 [ 2.529554] GICv3: CPU44: found redistributor 50300 region 2:0x000004004d400000 [ 2.529594] CPU44: using LPI pending table @0x0000042eeb470000 [ 2.529791] CPU44: Booted secondary processor 0x0000050300 [0x410fd082] [ 2.581861] Detected PIPT I-cache on CPU45 [ 2.581891] GICv3: CPU45: found redistributor 50301 region 2:0x000004004d440000 [ 2.581931] CPU45: using LPI pending table @0x0000042eeb4c0000 [ 2.582123] CPU45: Booted secondary processor 0x0000050301 [0x410fd082] [ 2.634201] Detected PIPT I-cache on CPU46 [ 2.634231] GICv3: CPU46: found redistributor 50302 region 2:0x000004004d480000 [ 2.634270] CPU46: using LPI pending table @0x0000042eeb4e0000 [ 2.634462] CPU46: Booted secondary processor 0x0000050302 [0x410fd082] [ 2.686541] Detected PIPT I-cache on CPU47 [ 2.686572] GICv3: CPU47: found redistributor 50303 region 2:0x000004004d4c0000 [ 2.686612] CPU47: using LPI pending table @0x0000042eeb540000 [ 2.686804] CPU47: Booted secondary processor 0x0000050303 [0x410fd082] [ 2.738540] Detected PIPT I-cache on CPU48 [ 2.738580] GICv3: CPU48: found redistributor 70000 region 3:0x000004006d100000 [ 2.738609] CPU48: using LPI pending table @0x0000042eeb560000 [ 2.738772] CPU48: Booted secondary processor 0x0000070000 [0x410fd082] [ 2.790877] Detected PIPT I-cache on CPU49 [ 2.790911] GICv3: CPU49: found redistributor 70001 region 3:0x000004006d140000 [ 2.790940] CPU49: using LPI pending table @0x0000042eeb5b0000 [ 2.791095] CPU49: Booted secondary processor 0x0000070001 [0x410fd082] [ 2.843217] Detected PIPT I-cache on CPU50 [ 2.843250] GICv3: CPU50: found redistributor 70002 region 3:0x000004006d180000 [ 2.843278] CPU50: using LPI pending table @0x0000042eeb5d0000 [ 2.843432] CPU50: Booted secondary processor 0x0000070002 [0x410fd082] [ 2.895559] Detected PIPT I-cache on CPU51 [ 2.895592] GICv3: CPU51: found redistributor 70003 region 3:0x000004006d1c0000 [ 2.895622] CPU51: using LPI pending table @0x0000042eeb630000 [ 2.895775] CPU51: Booted secondary processor 0x0000070003 [0x410fd082] [ 2.947902] Detected PIPT I-cache on CPU52 [ 2.947940] GICv3: CPU52: found redistributor 70100 region 3:0x000004006d200000 [ 2.947969] CPU52: using LPI pending table @0x0000042eeb650000 [ 2.948132] CPU52: Booted secondary processor 0x0000070100 [0x410fd082] [ 3.000240] Detected PIPT I-cache on CPU53 [ 3.000273] GICv3: CPU53: found redistributor 70101 region 3:0x000004006d240000 [ 3.000301] CPU53: using LPI pending table @0x0000042eeb6b0000 [ 3.000453] CPU53: Booted secondary processor 0x0000070101 [0x410fd082] [ 3.052580] Detected PIPT I-cache on CPU54 [ 3.052613] GICv3: CPU54: found redistributor 70102 region 3:0x000004006d280000 [ 3.052641] CPU54: using LPI pending table @0x0000042eeb6c0000 [ 3.052797] CPU54: Booted secondary processor 0x0000070102 [0x410fd082] [ 3.104919] Detected PIPT I-cache on CPU55 [ 3.104952] GICv3: CPU55: found redistributor 70103 region 3:0x000004006d2c0000 [ 3.104981] CPU55: using LPI pending table @0x0000042eeb730000 [ 3.105134] CPU55: Booted secondary processor 0x0000070103 [0x410fd082] [ 3.157264] Detected PIPT I-cache on CPU56 [ 3.157302] GICv3: CPU56: found redistributor 70200 region 3:0x000004006d300000 [ 3.157332] CPU56: using LPI pending table @0x0000042eeb740000 [ 3.157493] CPU56: Booted secondary processor 0x0000070200 [0x410fd082] [ 3.209600] Detected PIPT I-cache on CPU57 [ 3.209634] GICv3: CPU57: found redistributor 70201 region 3:0x000004006d340000 [ 3.209663] CPU57: using LPI pending table @0x0000042eeb7a0000 [ 3.209817] CPU57: Booted secondary processor 0x0000070201 [0x410fd082] [ 3.261940] Detected PIPT I-cache on CPU58 [ 3.261974] GICv3: CPU58: found redistributor 70202 region 3:0x000004006d380000 [ 3.262002] CPU58: using LPI pending table @0x0000042eeb7c0000 [ 3.262156] CPU58: Booted secondary processor 0x0000070202 [0x410fd082] [ 3.314281] Detected PIPT I-cache on CPU59 [ 3.314315] GICv3: CPU59: found redistributor 70203 region 3:0x000004006d3c0000 [ 3.314344] CPU59: using LPI pending table @0x0000042eeb020000 [ 3.314496] CPU59: Booted secondary processor 0x0000070203 [0x410fd082] [ 3.366626] Detected PIPT I-cache on CPU60 [ 3.366665] GICv3: CPU60: found redistributor 70300 region 3:0x000004006d400000 [ 3.366694] CPU60: using LPI pending table @0x0000042eeb030000 [ 3.366856] CPU60: Booted secondary processor 0x0000070300 [0x410fd082] [ 3.418962] Detected PIPT I-cache on CPU61 [ 3.418996] GICv3: CPU61: found redistributor 70301 region 3:0x000004006d440000 [ 3.419025] CPU61: using LPI pending table @0x0000042eeb090000 [ 3.419178] CPU61: Booted secondary processor 0x0000070301 [0x410fd082] [ 3.471303] Detected PIPT I-cache on CPU62 [ 3.471337] GICv3: CPU62: found redistributor 70302 region 3:0x000004006d480000 [ 3.471367] CPU62: using LPI pending table @0x0000042eeb0b0000 [ 3.471520] CPU62: Booted secondary processor 0x0000070302 [0x410fd082] [ 3.523643] Detected PIPT I-cache on CPU63 [ 3.523677] GICv3: CPU63: found redistributor 70303 region 3:0x000004006d4c0000 [ 3.523706] CPU63: using LPI pending table @0x0000042eeb110000 [ 3.523858] CPU63: Booted secondary processor 0x0000070303 [0x410fd082] [ 3.524140] smp: Brought up 1 node, 64 CPUs [ 3.529264] SMP: Total of 64 processors activated. [ 3.529286] CPU features: detected: GIC system register CPU interface [ 3.529312] CPU features: detected: 32-bit EL0 Support [ 3.531526] CPU: All CPU(s) started at EL2 [ 3.531891] alternatives: patching kernel code [ 3.534262] devtmpfs: initialized [ 3.543661] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 3.544176] futex hash table entries: 16384 (order: 9, 2097152 bytes) [ 3.547441] pinctrl core: initialized pinctrl subsystem [ 3.548978] SMBIOS 3.0.0 present. [ 3.549004] DMI: Huawei TaiShan 2280 /D05, BIOS Hisilicon D05 UEFI 16.12 Release 05/15/2017 [ 3.549646] NET: Registered protocol family 16 [ 3.551724] audit: initializing netlink subsys (disabled) [ 3.551916] audit: type=2000 audit(1.768:1): state=initialized audit_enabled=0 res=1 [ 3.553231] cpuidle: using governor menu [ 3.553554] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 3.556329] DMA: preallocated 256 KiB pool for atomic allocations [ 3.557145] Serial: AMBA PL011 UART driver [ 3.596493] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages [ 3.597342] cryptd: max_cpu_qlen set to 1000 [ 3.598462] ACPI: Interpreter disabled. [ 3.599592] vgaarb: loaded [ 3.600095] SCSI subsystem initialized [ 3.600708] usbcore: registered new interface driver usbfs [ 3.600790] usbcore: registered new interface driver hub [ 3.600993] usbcore: registered new device driver usb [ 3.601727] pps_core: LinuxPPS API ver. 1 registered [ 3.601754] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 3.601814] PTP clock support registered [ 3.601975] EDAC MC: Ver: 3.0.0 [ 3.602535] Registered efivars operations [ 3.603393] Advanced Linux Sound Architecture Driver Initialized. [ 3.604729] clocksource: Switched to clocksource arch_sys_counter [ 3.686053] VFS: Disk quotas dquot_6.6.0 [ 3.686136] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 3.686362] pnp: PnP ACPI: disabled [ 3.695127] NET: Registered protocol family 2 [ 3.696479] IP idents hash table entries: 262144 (order: 9, 2097152 bytes) [ 3.700131] tcp_listen_portaddr_hash hash table entries: 65536 (order: 10, 4718592 bytes) [ 3.705936] TCP established hash table entries: 524288 (order: 10, 4194304 bytes) [ 3.707913] TCP bind hash table entries: 65536 (order: 10, 4194304 bytes) [ 3.712621] TCP: Hash tables configured (established 524288 bind 65536) [ 3.715211] UDP hash table entries: 65536 (order: 11, 10485760 bytes) [ 3.727765] UDP-Lite hash table entries: 65536 (order: 11, 10485760 bytes) [ 3.738985] NET: Registered protocol family 1 [ 3.739668] RPC: Registered named UNIX socket transport module. [ 3.739701] RPC: Registered udp transport module. [ 3.739721] RPC: Registered tcp transport module. [ 3.739742] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 3.740014] Unpacking initramfs... [ 4.182263] Freeing initrd memory: 16372K [ 4.189318] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available [ 4.189854] kvm [1]: 8-bit VMID [ 4.193419] kvm [1]: GICv4 support disabled [ 4.193440] kvm [1]: vgic-v2@fe020000 [ 4.193489] kvm [1]: GIC system register CPU interface enabled [ 4.195476] kvm [1]: vgic interrupt IRQ1 [ 4.197334] kvm [1]: Hyp mode initialized successfully [ 4.206614] Initialise system trusted keyrings [ 4.206878] workingset: timestamp_bits=44 max_order=26 bucket_order=0 [ 4.217592] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 4.218310] NFS: Registering the id_resolver key type [ 4.218364] Key type id_resolver registered [ 4.218392] Key type id_legacy registered [ 4.218420] nfs4filelayout_init: NFSv4 File Layout Driver Registering... [ 4.218458] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... [ 4.218652] 9p: Installing v9fs 9p2000 file system support [ 4.222018] Key type asymmetric registered [ 4.222053] Asymmetric key parser 'x509' registered [ 4.222120] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244) [ 4.222162] io scheduler noop registered [ 4.222184] io scheduler deadline registered [ 4.222333] io scheduler cfq registered (default) [ 4.222356] io scheduler mq-deadline registered [ 4.222380] io scheduler kyber registered [ 4.222553] test_firmware: interface ready [ 4.230556] hisi-lpc a01b0000.isa: registered range [0x0000000000ffbfff - 0x0000000000ffffff] [ 4.239749] hisi-pcie-almost-ecam af800000.pcie: host bridge /soc/pcie@a00a0000 ranges: [ 4.239805] hisi-pcie-almost-ecam af800000.pcie: MEM 0xa8000000..0xaf7effff -> 0xa8000000 [ 4.239851] hisi-pcie-almost-ecam af800000.pcie: IO 0xaf7f0000..0xaf7fffff -> 0x00000000 [ 4.240073] hisi-pcie-almost-ecam af800000.pcie: ECAM at [mem 0xaf800000-0xafffffff] for [bus f8-ff] [ 4.240256] hisi-pcie-almost-ecam af800000.pcie: PCI host bridge to bus 0000:f8 [ 4.240289] pci_bus 0000:f8: root bus resource [bus f8-ff] [ 4.240313] pci_bus 0000:f8: root bus resource [mem 0xa8000000-0xaf7effff] [ 4.240341] pci_bus 0000:f8: root bus resource [io 0x0000-0xffff] [ 4.240425] pci_bus 0000:f8: 2-byte config write to 0000:f8:00.0 offset 0x4 may corrupt adjacent RW1C bits [ 4.241486] pci 0000:f8:00.0: bridge configuration invalid ([bus 81-81]), reconfiguring [ 4.293343] pci 0000:f8:00.0: BAR 0: assigned [mem 0xa8000000-0xa800ffff] [ 4.293375] pci 0000:f8:00.0: PCI bridge to [bus f9] [ 4.293415] pci 0000:f8:00.0: Max Payload Size set to 512/ 512 (was 128), Max Read Rq 512 [ 4.294534] EINJ: ACPI disabled. [ 4.305432] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 4.308028] SuperH (H)SCI(F) driver initialized [ 4.308469] msm_serial: driver initialized [ 4.309091] arm-smmu-v3 d0040000.smmu_alg: option hisilicon,broken-prefetch-cmd [ 4.309354] arm-smmu-v3 d0040000.smmu_alg: ias 44-bit, oas 44-bit (features 0x00000f0d) [ 4.313227] arm-smmu-v3 8d0040000.smmu_alg: option hisilicon,broken-prefetch-cmd [ 4.313473] arm-smmu-v3 8d0040000.smmu_alg: ias 44-bit, oas 44-bit (features 0x00000f0d) [ 4.317173] arm-smmu-v3 400d0040000.smmu_alg: option hisilicon,broken-prefetch-cmd [ 4.317442] arm-smmu-v3 400d0040000.smmu_alg: ias 44-bit, oas 44-bit (features 0x00000f0d) [ 4.320936] arm-smmu-v3 408d0040000.smmu_alg: option hisilicon,broken-prefetch-cmd [ 4.321200] arm-smmu-v3 408d0040000.smmu_alg: ias 44-bit, oas 44-bit (features 0x00000f0d) [ 4.377177] loop: module loaded [ 4.407860] scsi host0: hisi_sas_v2_hw [ 5.046752] hisi_sas_v2_hw a2000000.sas: phyup: phy0 link_rate=11 [ 5.046809] hisi_sas_v2_hw a2000000.sas: phyup: phy1 link_rate=11 [ 5.047886] hisi_sas_v2_hw a2000000.sas: dev[0:2] found [ 5.051747] hisi_sas_v2_hw a2000000.sas: phyup: phy2 link_rate=11 [ 5.051780] hisi_sas_v2_hw a2000000.sas: phyup: phy3 link_rate=11 [ 5.051813] hisi_sas_v2_hw a2000000.sas: phyup: phy4 link_rate=11 [ 5.051852] hisi_sas_v2_hw a2000000.sas: phyup: phy5 link_rate=11 [ 5.051890] hisi_sas_v2_hw a2000000.sas: phyup: phy6 link_rate=11 [ 5.051925] hisi_sas_v2_hw a2000000.sas: phyup: phy7 link_rate=11 [ 5.055832] hisi_sas_v2_hw a2000000.sas: dev[2:5] found [ 5.058823] hisi_sas_v2_hw a2000000.sas: dev[4:5] found [ 5.061564] hisi_sas_v2_hw a2000000.sas: dev[1:1] found [ 5.344416] ata1.00: ATA-8: MG04ACA400N, FJ3J, max UDMA/100 [ 5.344461] ata1.00: 7814037168 sectors, multi 16: LBA48 NCQ (depth 32) [ 5.347153] ata1.00: configured for UDMA/100 [ 5.359753] ata2.00: ATA-8: MG04ACA400N, FJ3J, max UDMA/100 [ 5.359792] ata2.00: 7814037168 sectors, multi 16: LBA48 NCQ (depth 32) [ 5.362542] ata2.00: configured for UDMA/100 [ 5.368894] scsi 0:0:0:0: Direct-Access ATA MG04ACA400N FJ3J PQ: 0 ANSI: 5 [ 5.369770] sd 0:0:0:0: [sda] 7814037168 512-byte logical blocks: (4.00 TB/3.64 TiB) [ 5.369866] sd 0:0:0:0: [sda] Write Protect is off [ 5.369933] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 5.371316] scsi 0:0:1:0: Direct-Access ATA MG04ACA400N FJ3J PQ: 0 ANSI: 5 [ 5.371901] sd 0:0:1:0: [sdb] 7814037168 512-byte logical blocks: (4.00 TB/3.64 TiB) [ 5.371974] sd 0:0:1:0: [sdb] Write Protect is off [ 5.372038] sd 0:0:1:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA [ 5.373953] scsi 0:0:2:0: Enclosure 12G SAS Expander RevB PQ: 0 ANSI: 6 [ 5.374101] scsi 0:0:2:0: Power-on or device reset occurred [ 5.395734] sd 0:0:1:0: [sdb] Attached SCSI disk [ 5.410204] sda: sda1 sda2 sda3 [ 5.414951] sd 0:0:0:0: [sda] Attached SCSI disk [ 5.561987] thunder_xcv, ver 1.0 [ 5.562058] thunder_bgx, ver 1.0 [ 5.562120] nicpf, ver 1.0 [ 6.471543] mdio_bus Mii-603c0000.mdio: MDIO reset fail [ 7.313335] hns-nic soc:ethernet@4: No valid mac, use random mac 26:77:5e:e1:1a:54 [ 7.394982] hns-nic soc:ethernet@5: No valid mac, use random mac c2:cc:c9:40:2c:34 [ 7.474870] hns-nic soc:ethernet@0: No valid mac, use random mac 2a:cf:f8:5b:a5:3f [ 7.486096] hns-nic soc:ethernet@1: No valid mac, use random mac a2:64:18:bd:b6:9e [ 7.497310] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k [ 7.497339] e1000e: Copyright(c) 1999 - 2015 Intel Corporation. [ 7.497432] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.4.0-k [ 7.497460] igb: Copyright (c) 2007-2014 Intel Corporation. [ 7.497532] igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.4.0-k [ 7.497565] igbvf: Copyright (c) 2009 - 2012 Intel Corporation. [ 7.498056] sky2: driver version 1.30 [ 7.498935] VFIO - User Level meta-driver version: 0.3 [ 7.500337] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 7.500367] ehci-pci: EHCI PCI platform driver [ 7.500425] ehci-platform: EHCI generic platform driver [ 7.500666] ehci-platform a7020000.ehci: EHCI Host Controller [ 7.500787] ehci-platform a7020000.ehci: new USB bus registered, assigned bus number 1 [ 7.501143] ehci-platform a7020000.ehci: irq 339, io mem 0xa7020000 [ 7.516735] ehci-platform a7020000.ehci: USB 2.0 started, EHCI 1.00 [ 7.517669] hub 1-0:1.0: USB hub found [ 7.517752] hub 1-0:1.0: 2 ports detected [ 7.518498] ehci-orion: EHCI orion driver [ 7.518650] ehci-exynos: EHCI EXYNOS driver [ 7.518783] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 7.518839] ohci-pci: OHCI PCI platform driver [ 7.518902] ohci-platform: OHCI generic platform driver [ 7.519091] ohci-platform a7030000.ohci: Generic Platform OHCI controller [ 7.519133] ohci-platform a7030000.ohci: new USB bus registered, assigned bus number 2 [ 7.519326] ohci-platform a7030000.ohci: irq 340, io mem 0xa7030000 [ 7.581324] hub 2-0:1.0: USB hub found [ 7.581373] hub 2-0:1.0: 2 ports detected [ 7.581882] ohci-exynos: OHCI EXYNOS driver [ 7.582394] usbcore: registered new interface driver usb-storage [ 7.649005] i2c /dev entries driver [ 7.653839] sdhci: Secure Digital Host Controller Interface driver [ 7.653869] sdhci: Copyright(c) Pierre Ossman [ 7.654226] Synopsys Designware Multimedia Card Interface Driver [ 7.655234] sdhci-pltfm: SDHCI platform and OF driver helper [ 7.658827] ledtrig-cpu: registered to indicate activity on CPUs [ 7.660147] usbcore: registered new interface driver usbhid [ 7.660174] usbhid: USB HID core driver [ 7.663714] ipip: IPv4 and MPLS over IPv4 tunneling driver [ 7.664149] IPv4 over IPsec tunneling driver [ 7.665140] NET: Registered protocol family 10 [ 7.667365] Segment Routing with IPv6 [ 7.668392] NET: Registered protocol family 17 [ 7.668475] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this. [ 7.668582] 8021q: 802.1Q VLAN Support v1.8 [ 7.668774] 9pnet: Installing 9P2000 support [ 7.668874] Key type dns_resolver registered [ 7.670924] registered taskstats version 1 [ 7.670946] Loading compiled-in X.509 certificates [ 7.671671] 602b0000.uart: ttyAMA0 at MMIO 0x602b0000 (irq = 341, base_baud = 0) is a SBSA [ 7.772731] usb 1-1: new high-speed USB device number 2 using ehci-platform [ 7.773587] console [ttyAMA0] enabled [ 7.933717] hub 1-1:1.0: USB hub found [ 7.937224] hctosys: unable to open rtc device (rtc0) [ 7.940199] hub 1-1:1.0: 4 ports detected [ 8.053249] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 8.184723] usb 1-2: new high-speed USB device number 3 using ehci-platform [ 11.545565] hub 1-2:1.0: USB hub found [ 11.549442] hub 1-2:1.0: 4 ports detected [ 11.840726] usb 1-2.1: new full-speed USB device number 4 using ehci-platform [ 11.958269] input: Keyboard/Mouse KVM 1.1.0 as /devices/platform/soc/a7020000.ehci/usb1/1-2/1-2.1/1-2.1:1.0/0003:12D1:0003.0001/input/input0 [ 12.029666] hid-generic 0003:12D1:0003.0001: input: USB HID v1.10 Keyboard [Keyboard/Mouse KVM 1.1.0] on usb-a7020000.ehci-2.1/input0 [ 12.043100] input: Keyboard/Mouse KVM 1.1.0 as /devices/platform/soc/a7020000.ehci/usb1/1-2/1-2.1/1-2.1:1.1/0003:12D1:0003.0002/input/input1 [ 12.055891] hid-generic 0003:12D1:0003.0002: input: USB HID v1.10 Mouse [Keyboard/Mouse KVM 1.1.0] on usb-a7020000.ehci-2.1/input1 [ 12.212959] hns-nic soc:ethernet@4 eth0: link up [ 12.217686] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 12.236732] Sending DHCP requests .., OK [ 15.256825] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.227 [ 15.264955] IP-Config: Complete: [ 15.268186] device=eth0, hwaddr=26:77:5e:e1:1a:54, ipaddr=192.168.201.227, mask=255.255.255.0, gw=192.168.201.1 [ 15.278757] host=192.168.201.227, domain=lava-rack, nis-domain=(none) [ 15.285661] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath= [ 15.285664] nameserver0=192.168.201.1 [ 15.297309] ALSA device list: [ 15.300279] No soundcards found. [ 15.310836] Freeing unused kernel memory: 1920K [ 15.315882] Run /init as init process Starting syslogd: OK Starting klogd: OK Running sysctl: OK Populating /dev using udev: [ 15.398107] udevd[2281]: starting version 3.2.9 [ 15.403815] random: udevd: uninitialized urandom read (16 bytes read) [ 15.410545] random: udevd: uninitialized urandom read (16 bytes read) [ 15.417071] random: udevd: uninitialized urandom read (16 bytes read) [ 15.426480] udevd[2281]: specified user 'tss' unknown [ 15.431613] udevd[2281]: specified group 'tss' unknown [ 15.438925] udevd[2282]: starting eudev-3.2.9 done Saving random seed: OK Starting network: ip: RTNETLINK answers: File exists FAIL Starting dropbear sshd: OK /bin/sh: can't access tty; job control turned off / # / # # # / # export SHELL=/bin/sh export SHELL=/bin/sh / # . /lava-12799800/environment . /lava-12799800/environment / # /lava-12799800/bin/lava-test-runner /lava-12799800/0 /lava-12799800/bin/lava-test-runner /lava-12799800/0 + export 'TESTRUN_ID=0_dmesg' + cd /lava-12799800/0/tests/0_dmes[ 16.824612] g + cat uuid + UUID=12799800_1.5.2.3.1 + set +x + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh [ 16.852951] [ 16.878222] [ 16.903534] + set +x [ 16.913115] / # # export SHELL=/bin/sh # / # . /lava-12799800/environment export SHELL=/bin/sh / # /lava-12799800/bin/lava-test-runner /lava-12799800/1 . /lava-12799800/environment / # /lava-12799800/bin/lava-test-runner /lava-12799800/1 + export 'TESTRUN_ID=1_bootrr' + cd /lava-12799800/1/tests/1_bo[ 17.484178] otrr + cat uuid + UUID=12799800_1.5.2.3.5 + set +x + export 'PATH=/opt/bootrr/libexec/bootrr/helpers:/lava-12799800/1/../bin:/sbin:/usr/sbin:/bin:/usr/bin' + cd /opt/bootrr/libexec/bootrr + sh helpers/bootrr-auto /lava-12799800/1/../bin/lava-test-case [ 17.514295] /lava-12799800/1/../bin/lava-test-case [ 17.538416] /lava-12799800/1/../bin/lava-test-case [ 17.553977] + set +x [ 17.574298] ��9����$?� @