Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 05:30:54.423054 lava-dispatcher, installed at version: 2024.01
2 05:30:54.423295 start: 0 validate
3 05:30:54.423452 Start time: 2024-02-19 05:30:54.423444+00:00 (UTC)
4 05:30:54.423593 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:30:54.423739 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 05:30:54.696698 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:30:54.696964 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.306-cip107%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:30:54.962407 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:30:54.962650 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.306-cip107%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 05:31:03.396085 validate duration: 8.97
12 05:31:03.396493 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 05:31:03.396655 start: 1.1 download-retry (timeout 00:10:00) [common]
14 05:31:03.396761 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 05:31:03.396912 Not decompressing ramdisk as can be used compressed.
16 05:31:03.397043 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 05:31:03.397161 saving as /var/lib/lava/dispatcher/tmp/12799724/tftp-deploy-_1ic2q_x/ramdisk/rootfs.cpio.gz
18 05:31:03.397268 total size: 8418130 (8 MB)
19 05:31:05.373210 progress 0 % (0 MB)
20 05:31:05.385294 progress 5 % (0 MB)
21 05:31:05.397396 progress 10 % (0 MB)
22 05:31:05.407097 progress 15 % (1 MB)
23 05:31:05.413337 progress 20 % (1 MB)
24 05:31:05.418231 progress 25 % (2 MB)
25 05:31:05.422460 progress 30 % (2 MB)
26 05:31:05.425820 progress 35 % (2 MB)
27 05:31:05.429238 progress 40 % (3 MB)
28 05:31:05.432449 progress 45 % (3 MB)
29 05:31:05.435272 progress 50 % (4 MB)
30 05:31:05.438028 progress 55 % (4 MB)
31 05:31:05.440508 progress 60 % (4 MB)
32 05:31:05.442812 progress 65 % (5 MB)
33 05:31:05.445307 progress 70 % (5 MB)
34 05:31:05.447778 progress 75 % (6 MB)
35 05:31:05.450249 progress 80 % (6 MB)
36 05:31:05.452741 progress 85 % (6 MB)
37 05:31:05.455210 progress 90 % (7 MB)
38 05:31:05.457711 progress 95 % (7 MB)
39 05:31:05.460035 progress 100 % (8 MB)
40 05:31:05.460304 8 MB downloaded in 2.06 s (3.89 MB/s)
41 05:31:05.460478 end: 1.1.1 http-download (duration 00:00:02) [common]
43 05:31:05.460810 end: 1.1 download-retry (duration 00:00:02) [common]
44 05:31:05.460920 start: 1.2 download-retry (timeout 00:09:58) [common]
45 05:31:05.461017 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 05:31:05.461159 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.306-cip107/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 05:31:05.461238 saving as /var/lib/lava/dispatcher/tmp/12799724/tftp-deploy-_1ic2q_x/kernel/bzImage
48 05:31:05.461306 total size: 11579392 (11 MB)
49 05:31:05.461374 No compression specified
50 05:31:05.719190 progress 0 % (0 MB)
51 05:31:05.727894 progress 5 % (0 MB)
52 05:31:05.736880 progress 10 % (1 MB)
53 05:31:05.743883 progress 15 % (1 MB)
54 05:31:05.749288 progress 20 % (2 MB)
55 05:31:05.754172 progress 25 % (2 MB)
56 05:31:05.758553 progress 30 % (3 MB)
57 05:31:05.762493 progress 35 % (3 MB)
58 05:31:05.766259 progress 40 % (4 MB)
59 05:31:05.769807 progress 45 % (5 MB)
60 05:31:05.773140 progress 50 % (5 MB)
61 05:31:05.776639 progress 55 % (6 MB)
62 05:31:05.780152 progress 60 % (6 MB)
63 05:31:05.783486 progress 65 % (7 MB)
64 05:31:05.787011 progress 70 % (7 MB)
65 05:31:05.790455 progress 75 % (8 MB)
66 05:31:05.793745 progress 80 % (8 MB)
67 05:31:05.797242 progress 85 % (9 MB)
68 05:31:05.800747 progress 90 % (9 MB)
69 05:31:05.804006 progress 95 % (10 MB)
70 05:31:05.807445 progress 100 % (11 MB)
71 05:31:05.807639 11 MB downloaded in 0.35 s (31.89 MB/s)
72 05:31:05.807806 end: 1.2.1 http-download (duration 00:00:00) [common]
74 05:31:05.808071 end: 1.2 download-retry (duration 00:00:00) [common]
75 05:31:05.808172 start: 1.3 download-retry (timeout 00:09:58) [common]
76 05:31:05.808282 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 05:31:05.808439 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.306-cip107/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 05:31:05.808518 saving as /var/lib/lava/dispatcher/tmp/12799724/tftp-deploy-_1ic2q_x/modules/modules.tar
79 05:31:05.808588 total size: 484720 (0 MB)
80 05:31:05.808658 Using unxz to decompress xz
81 05:31:05.813156 progress 6 % (0 MB)
82 05:31:05.813631 progress 13 % (0 MB)
83 05:31:05.813906 progress 20 % (0 MB)
84 05:31:05.815701 progress 27 % (0 MB)
85 05:31:05.817912 progress 33 % (0 MB)
86 05:31:05.820168 progress 40 % (0 MB)
87 05:31:05.822274 progress 47 % (0 MB)
88 05:31:05.824639 progress 54 % (0 MB)
89 05:31:05.826787 progress 60 % (0 MB)
90 05:31:05.828983 progress 67 % (0 MB)
91 05:31:05.831319 progress 74 % (0 MB)
92 05:31:05.833664 progress 81 % (0 MB)
93 05:31:05.835862 progress 87 % (0 MB)
94 05:31:05.837965 progress 94 % (0 MB)
95 05:31:05.840601 progress 100 % (0 MB)
96 05:31:05.848102 0 MB downloaded in 0.04 s (11.70 MB/s)
97 05:31:05.848446 end: 1.3.1 http-download (duration 00:00:00) [common]
99 05:31:05.848774 end: 1.3 download-retry (duration 00:00:00) [common]
100 05:31:05.848882 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
101 05:31:05.848990 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
102 05:31:05.849083 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 05:31:05.849190 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
104 05:31:05.849448 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6
105 05:31:05.849601 makedir: /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin
106 05:31:05.849731 makedir: /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/tests
107 05:31:05.849847 makedir: /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/results
108 05:31:05.849979 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-add-keys
109 05:31:05.850158 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-add-sources
110 05:31:05.850364 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-background-process-start
111 05:31:05.850533 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-background-process-stop
112 05:31:05.850684 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-common-functions
113 05:31:05.850829 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-echo-ipv4
114 05:31:05.850973 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-install-packages
115 05:31:05.851115 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-installed-packages
116 05:31:05.851267 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-os-build
117 05:31:05.851414 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-probe-channel
118 05:31:05.851560 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-probe-ip
119 05:31:05.851764 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-target-ip
120 05:31:05.851941 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-target-mac
121 05:31:05.852085 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-target-storage
122 05:31:05.852279 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-test-case
123 05:31:05.852483 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-test-event
124 05:31:05.852631 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-test-feedback
125 05:31:05.852776 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-test-raise
126 05:31:05.852939 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-test-reference
127 05:31:05.853131 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-test-runner
128 05:31:05.853286 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-test-set
129 05:31:05.853445 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-test-shell
130 05:31:05.853643 Updating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-install-packages (oe)
131 05:31:05.853831 Updating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/bin/lava-installed-packages (oe)
132 05:31:05.853982 Creating /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/environment
133 05:31:05.854157 LAVA metadata
134 05:31:05.854275 - LAVA_JOB_ID=12799724
135 05:31:05.854350 - LAVA_DISPATCHER_IP=192.168.201.1
136 05:31:05.854484 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
137 05:31:05.854594 skipped lava-vland-overlay
138 05:31:05.854720 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 05:31:05.854815 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
140 05:31:05.854889 skipped lava-multinode-overlay
141 05:31:05.854975 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 05:31:05.855132 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
143 05:31:05.855254 Loading test definitions
144 05:31:05.855366 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
145 05:31:05.855452 Using /lava-12799724 at stage 0
146 05:31:05.855900 uuid=12799724_1.4.2.3.1 testdef=None
147 05:31:05.856002 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 05:31:05.856106 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
149 05:31:05.856838 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 05:31:05.857160 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
152 05:31:05.857977 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 05:31:05.858315 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
155 05:31:05.859147 runner path: /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/0/tests/0_dmesg test_uuid 12799724_1.4.2.3.1
156 05:31:05.859334 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 05:31:05.859689 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
159 05:31:05.859817 Using /lava-12799724 at stage 1
160 05:31:05.860209 uuid=12799724_1.4.2.3.5 testdef=None
161 05:31:05.860321 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 05:31:05.860417 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
163 05:31:05.861040 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 05:31:05.861375 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
166 05:31:05.862211 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 05:31:05.862492 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
169 05:31:05.863332 runner path: /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/1/tests/1_bootrr test_uuid 12799724_1.4.2.3.5
170 05:31:05.863508 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 05:31:05.863747 Creating lava-test-runner.conf files
173 05:31:05.863820 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/0 for stage 0
174 05:31:05.863924 - 0_dmesg
175 05:31:05.864015 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12799724/lava-overlay-mxtzhy_6/lava-12799724/1 for stage 1
176 05:31:05.864130 - 1_bootrr
177 05:31:05.864281 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 05:31:05.864412 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
179 05:31:05.873787 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 05:31:05.873944 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
181 05:31:05.874048 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 05:31:05.874146 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 05:31:05.874243 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
184 05:31:06.205372 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 05:31:06.205830 start: 1.4.4 extract-modules (timeout 00:09:57) [common]
186 05:31:06.205979 extracting modules file /var/lib/lava/dispatcher/tmp/12799724/tftp-deploy-_1ic2q_x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12799724/extract-overlay-ramdisk-kr5heej8/ramdisk
187 05:31:06.230921 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 05:31:06.231098 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
189 05:31:06.231206 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12799724/compress-overlay-xlh9flql/overlay-1.4.2.4.tar.gz to ramdisk
190 05:31:06.231303 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12799724/compress-overlay-xlh9flql/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12799724/extract-overlay-ramdisk-kr5heej8/ramdisk
191 05:31:06.243299 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 05:31:06.243470 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
193 05:31:06.243581 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 05:31:06.243683 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
195 05:31:06.243776 Building ramdisk /var/lib/lava/dispatcher/tmp/12799724/extract-overlay-ramdisk-kr5heej8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12799724/extract-overlay-ramdisk-kr5heej8/ramdisk
196 05:31:06.409293 >> 53982 blocks
197 05:31:07.441384 rename /var/lib/lava/dispatcher/tmp/12799724/extract-overlay-ramdisk-kr5heej8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12799724/tftp-deploy-_1ic2q_x/ramdisk/ramdisk.cpio.gz
198 05:31:07.441925 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 05:31:07.442108 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
200 05:31:07.442263 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
201 05:31:07.442406 No mkimage arch provided, not using FIT.
202 05:31:07.442538 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 05:31:07.442665 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 05:31:07.442811 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 05:31:07.442962 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
206 05:31:07.443090 No LXC device requested
207 05:31:07.443201 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 05:31:07.443306 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
209 05:31:07.443401 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 05:31:07.443489 Checking files for TFTP limit of 4294967296 bytes.
211 05:31:07.444052 end: 1 tftp-deploy (duration 00:00:04) [common]
212 05:31:07.444219 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 05:31:07.444344 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 05:31:07.444489 substitutions:
215 05:31:07.444567 - {DTB}: None
216 05:31:07.444639 - {INITRD}: 12799724/tftp-deploy-_1ic2q_x/ramdisk/ramdisk.cpio.gz
217 05:31:07.444707 - {KERNEL}: 12799724/tftp-deploy-_1ic2q_x/kernel/bzImage
218 05:31:07.444819 - {LAVA_MAC}: None
219 05:31:07.444915 - {PRESEED_CONFIG}: None
220 05:31:07.445007 - {PRESEED_LOCAL}: None
221 05:31:07.445076 - {RAMDISK}: 12799724/tftp-deploy-_1ic2q_x/ramdisk/ramdisk.cpio.gz
222 05:31:07.445141 - {ROOT_PART}: None
223 05:31:07.445204 - {ROOT}: None
224 05:31:07.445266 - {SERVER_IP}: 192.168.201.1
225 05:31:07.445329 - {TEE}: None
226 05:31:07.445391 Parsed boot commands:
227 05:31:07.445451 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 05:31:07.445667 Parsed boot commands: tftpboot 192.168.201.1 12799724/tftp-deploy-_1ic2q_x/kernel/bzImage 12799724/tftp-deploy-_1ic2q_x/kernel/cmdline 12799724/tftp-deploy-_1ic2q_x/ramdisk/ramdisk.cpio.gz
229 05:31:07.445813 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 05:31:07.445943 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 05:31:07.446047 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 05:31:07.446143 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 05:31:07.446221 Not connected, no need to disconnect.
234 05:31:07.446305 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 05:31:07.446394 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 05:31:07.446473 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
237 05:31:07.450978 Setting prompt string to ['lava-test: # ']
238 05:31:07.451416 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 05:31:07.451544 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 05:31:07.451656 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 05:31:07.451762 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 05:31:07.452150 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
243 05:31:12.591845 >> Command sent successfully.
244 05:31:12.595319 Returned 0 in 5 seconds
245 05:31:12.695737 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 05:31:12.696204 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 05:31:12.696357 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 05:31:12.696491 Setting prompt string to 'Starting depthcharge on Helios...'
250 05:31:12.696596 Changing prompt to 'Starting depthcharge on Helios...'
251 05:31:12.696711 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 05:31:12.697125 [Enter `^Ec?' for help]
253 05:31:13.318175
254 05:31:13.318360
255 05:31:13.328627 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 05:31:13.331862 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 05:31:13.338589 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 05:31:13.341507 CPU: AES supported, TXT NOT supported, VT supported
259 05:31:13.348329 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 05:31:13.351939 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 05:31:13.358210 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 05:31:13.361905 VBOOT: Loading verstage.
263 05:31:13.365296 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 05:31:13.372077 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 05:31:13.375234 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 05:31:13.378495 CBFS @ c08000 size 3f8000
267 05:31:13.385604 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 05:31:13.388610 CBFS: Locating 'fallback/verstage'
269 05:31:13.391710 CBFS: Found @ offset 10fb80 size 1072c
270 05:31:13.391811
271 05:31:13.394821
272 05:31:13.404748 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 05:31:13.419000 Probing TPM: . done!
274 05:31:13.422896 TPM ready after 0 ms
275 05:31:13.426019 Connected to device vid:did:rid of 1ae0:0028:00
276 05:31:13.436705 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
277 05:31:13.439892 Initialized TPM device CR50 revision 0
278 05:31:13.485350 tlcl_send_startup: Startup return code is 0
279 05:31:13.485518 TPM: setup succeeded
280 05:31:13.498034 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 05:31:13.501670 Chrome EC: UHEPI supported
282 05:31:13.505322 Phase 1
283 05:31:13.508648 FMAP: area GBB found @ c05000 (12288 bytes)
284 05:31:13.515267 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 05:31:13.515369 Phase 2
286 05:31:13.518314 Phase 3
287 05:31:13.521955 FMAP: area GBB found @ c05000 (12288 bytes)
288 05:31:13.528906 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 05:31:13.534872 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 05:31:13.538498 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
291 05:31:13.544736 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 05:31:13.560345 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 05:31:13.564070 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
294 05:31:13.570408 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 05:31:13.574764 Phase 4
296 05:31:13.578104 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
297 05:31:13.584555 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 05:31:13.764115 VB2:vb2_rsa_verify_digest() Digest check failed!
299 05:31:13.770495 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 05:31:13.770612 Saving nvdata
301 05:31:13.774491 Reboot requested (10020007)
302 05:31:13.777540 board_reset() called!
303 05:31:13.777641 full_reset() called!
304 05:31:18.286742
305 05:31:18.287171
306 05:31:18.296182 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 05:31:18.299631 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 05:31:18.306185 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 05:31:18.309825 CPU: AES supported, TXT NOT supported, VT supported
310 05:31:18.316531 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 05:31:18.319768 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 05:31:18.326534 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 05:31:18.329270 VBOOT: Loading verstage.
314 05:31:18.332916 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 05:31:18.339345 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 05:31:18.343120 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 05:31:18.346067 CBFS @ c08000 size 3f8000
318 05:31:18.352763 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 05:31:18.355754 CBFS: Locating 'fallback/verstage'
320 05:31:18.359417 CBFS: Found @ offset 10fb80 size 1072c
321 05:31:18.359897
322 05:31:18.362897
323 05:31:18.372433 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 05:31:18.387455 Probing TPM: . done!
325 05:31:18.390277 TPM ready after 0 ms
326 05:31:18.394001 Connected to device vid:did:rid of 1ae0:0028:00
327 05:31:18.403692 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 05:31:18.407848 Initialized TPM device CR50 revision 0
329 05:31:18.453102 tlcl_send_startup: Startup return code is 0
330 05:31:18.453658 TPM: setup succeeded
331 05:31:18.465840 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 05:31:18.469185 Chrome EC: UHEPI supported
333 05:31:18.472710 Phase 1
334 05:31:18.475868 FMAP: area GBB found @ c05000 (12288 bytes)
335 05:31:18.482922 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 05:31:18.489195 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 05:31:18.492414 Recovery requested (1009000e)
338 05:31:18.492817 Saving nvdata
339 05:31:18.504315 tlcl_extend: response is 0
340 05:31:18.512903 tlcl_extend: response is 0
341 05:31:18.520150 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 05:31:18.523763 CBFS @ c08000 size 3f8000
343 05:31:18.530213 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 05:31:18.533124 CBFS: Locating 'fallback/romstage'
345 05:31:18.536707 CBFS: Found @ offset 80 size 145fc
346 05:31:18.539761 Accumulated console time in verstage 98 ms
347 05:31:18.540315
348 05:31:18.540775
349 05:31:18.553122 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 05:31:18.559693 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 05:31:18.562938 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 05:31:18.566154 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 05:31:18.572702 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 05:31:18.576070 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 05:31:18.579675 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 05:31:18.582676 TCO_STS: 0000 0000
357 05:31:18.586123 GEN_PMCON: e0015238 00000200
358 05:31:18.589400 GBLRST_CAUSE: 00000000 00000000
359 05:31:18.590041 prev_sleep_state 5
360 05:31:18.593240 Boot Count incremented to 70352
361 05:31:18.599622 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 05:31:18.602918 CBFS @ c08000 size 3f8000
363 05:31:18.609957 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 05:31:18.610429 CBFS: Locating 'fspm.bin'
365 05:31:18.616330 CBFS: Found @ offset 5ffc0 size 71000
366 05:31:18.619602 Chrome EC: UHEPI supported
367 05:31:18.625937 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 05:31:18.629526 Probing TPM: done!
369 05:31:18.636346 Connected to device vid:did:rid of 1ae0:0028:00
370 05:31:18.646802 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
371 05:31:18.652341 Initialized TPM device CR50 revision 0
372 05:31:18.661602 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 05:31:18.668220 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 05:31:18.671432 MRC cache found, size 1948
375 05:31:18.675278 bootmode is set to: 2
376 05:31:18.678023 PRMRR disabled by config.
377 05:31:18.678521 SPD INDEX = 1
378 05:31:18.684347 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 05:31:18.687652 CBFS @ c08000 size 3f8000
380 05:31:18.691561 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 05:31:18.695297 CBFS: Locating 'spd.bin'
382 05:31:18.698369 CBFS: Found @ offset 5fb80 size 400
383 05:31:18.701522 SPD: module type is LPDDR3
384 05:31:18.704283 SPD: module part is
385 05:31:18.711173 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 05:31:18.714891 SPD: device width 4 bits, bus width 8 bits
387 05:31:18.718354 SPD: module size is 4096 MB (per channel)
388 05:31:18.721061 memory slot: 0 configuration done.
389 05:31:18.724922 memory slot: 2 configuration done.
390 05:31:18.775519 CBMEM:
391 05:31:18.778582 IMD: root @ 99fff000 254 entries.
392 05:31:18.782166 IMD: root @ 99ffec00 62 entries.
393 05:31:18.785021 External stage cache:
394 05:31:18.788458 IMD: root @ 9abff000 254 entries.
395 05:31:18.792024 IMD: root @ 9abfec00 62 entries.
396 05:31:18.795589 Chrome EC: clear events_b mask to 0x0000000020004000
397 05:31:18.810938 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 05:31:18.824923 tlcl_write: response is 0
399 05:31:18.833380 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 05:31:18.839803 MRC: TPM MRC hash updated successfully.
401 05:31:18.840339 2 DIMMs found
402 05:31:18.843815 SMM Memory Map
403 05:31:18.847209 SMRAM : 0x9a000000 0x1000000
404 05:31:18.850333 Subregion 0: 0x9a000000 0xa00000
405 05:31:18.853542 Subregion 1: 0x9aa00000 0x200000
406 05:31:18.857219 Subregion 2: 0x9ac00000 0x400000
407 05:31:18.859990 top_of_ram = 0x9a000000
408 05:31:18.863346 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 05:31:18.870317 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 05:31:18.873437 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 05:31:18.879862 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 05:31:18.883200 CBFS @ c08000 size 3f8000
413 05:31:18.886267 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 05:31:18.889604 CBFS: Locating 'fallback/postcar'
415 05:31:18.896353 CBFS: Found @ offset 107000 size 4b44
416 05:31:18.899793 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 05:31:18.912102 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 05:31:18.915407 Processing 180 relocs. Offset value of 0x97c0c000
419 05:31:18.923687 Accumulated console time in romstage 285 ms
420 05:31:18.924183
421 05:31:18.924560
422 05:31:18.934322 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 05:31:18.939895 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 05:31:18.943647 CBFS @ c08000 size 3f8000
425 05:31:18.950341 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 05:31:18.953414 CBFS: Locating 'fallback/ramstage'
427 05:31:18.957207 CBFS: Found @ offset 43380 size 1b9e8
428 05:31:18.963444 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 05:31:18.995161 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 05:31:18.998203 Processing 3976 relocs. Offset value of 0x98db0000
431 05:31:19.005016 Accumulated console time in postcar 52 ms
432 05:31:19.005514
433 05:31:19.005832
434 05:31:19.015241 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 05:31:19.021973 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 05:31:19.025143 WARNING: RO_VPD is uninitialized or empty.
437 05:31:19.028345 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 05:31:19.035638 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 05:31:19.036141 Normal boot.
440 05:31:19.041982 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 05:31:19.045352 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 05:31:19.048875 CBFS @ c08000 size 3f8000
443 05:31:19.055387 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 05:31:19.058341 CBFS: Locating 'cpu_microcode_blob.bin'
445 05:31:19.061469 CBFS: Found @ offset 14700 size 2ec00
446 05:31:19.064729 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 05:31:19.068154 Skip microcode update
448 05:31:19.070869 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 05:31:19.074891 CBFS @ c08000 size 3f8000
450 05:31:19.081325 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 05:31:19.084655 CBFS: Locating 'fsps.bin'
452 05:31:19.087595 CBFS: Found @ offset d1fc0 size 35000
453 05:31:19.113510 Detected 4 core, 8 thread CPU.
454 05:31:19.116582 Setting up SMI for CPU
455 05:31:19.119963 IED base = 0x9ac00000
456 05:31:19.120217 IED size = 0x00400000
457 05:31:19.123168 Will perform SMM setup.
458 05:31:19.130281 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 05:31:19.136318 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 05:31:19.139642 Processing 16 relocs. Offset value of 0x00030000
461 05:31:19.143458 Attempting to start 7 APs
462 05:31:19.146950 Waiting for 10ms after sending INIT.
463 05:31:19.163625 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
464 05:31:19.164126 done.
465 05:31:19.166609 AP: slot 5 apic_id 5.
466 05:31:19.170024 AP: slot 2 apic_id 4.
467 05:31:19.170538 AP: slot 7 apic_id 6.
468 05:31:19.173131 AP: slot 6 apic_id 7.
469 05:31:19.176277 AP: slot 4 apic_id 2.
470 05:31:19.176776 AP: slot 1 apic_id 3.
471 05:31:19.183595 Waiting for 2nd SIPI to complete...done.
472 05:31:19.189381 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 05:31:19.195924 Processing 13 relocs. Offset value of 0x00038000
474 05:31:19.199966 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 05:31:19.206682 Installing SMM handler to 0x9a000000
476 05:31:19.213313 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 05:31:19.216363 Processing 658 relocs. Offset value of 0x9a010000
478 05:31:19.226505 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 05:31:19.229844 Processing 13 relocs. Offset value of 0x9a008000
480 05:31:19.235918 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 05:31:19.242770 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 05:31:19.246284 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 05:31:19.252688 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 05:31:19.259632 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 05:31:19.266297 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 05:31:19.269285 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 05:31:19.276085 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 05:31:19.279485 Clearing SMI status registers
489 05:31:19.282928 SMI_STS: PM1
490 05:31:19.283416 PM1_STS: PWRBTN
491 05:31:19.286138 TCO_STS: SECOND_TO
492 05:31:19.289949 New SMBASE 0x9a000000
493 05:31:19.290501 In relocation handler: CPU 0
494 05:31:19.296376 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 05:31:19.299652 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 05:31:19.302959 Relocation complete.
497 05:31:19.303360 New SMBASE 0x99fff400
498 05:31:19.306471 In relocation handler: CPU 3
499 05:31:19.313132 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
500 05:31:19.316133 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 05:31:19.319630 Relocation complete.
502 05:31:19.320125 New SMBASE 0x99ffe400
503 05:31:19.322887 In relocation handler: CPU 7
504 05:31:19.326563 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
505 05:31:19.332756 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 05:31:19.336727 Relocation complete.
507 05:31:19.337239 New SMBASE 0x99ffe800
508 05:31:19.339705 In relocation handler: CPU 6
509 05:31:19.343006 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
510 05:31:19.349597 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 05:31:19.349963 Relocation complete.
512 05:31:19.352807 New SMBASE 0x99ffec00
513 05:31:19.355936 In relocation handler: CPU 5
514 05:31:19.359737 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
515 05:31:19.366626 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 05:31:19.367113 Relocation complete.
517 05:31:19.369251 New SMBASE 0x99fff800
518 05:31:19.373553 In relocation handler: CPU 2
519 05:31:19.376842 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
520 05:31:19.383592 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 05:31:19.384098 Relocation complete.
522 05:31:19.386206 New SMBASE 0x99fff000
523 05:31:19.389676 In relocation handler: CPU 4
524 05:31:19.393002 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
525 05:31:19.399491 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 05:31:19.399892 Relocation complete.
527 05:31:19.402720 New SMBASE 0x99fffc00
528 05:31:19.406024 In relocation handler: CPU 1
529 05:31:19.409043 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
530 05:31:19.415803 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 05:31:19.416201 Relocation complete.
532 05:31:19.419193 Initializing CPU #0
533 05:31:19.422887 CPU: vendor Intel device 806ec
534 05:31:19.425817 CPU: family 06, model 8e, stepping 0c
535 05:31:19.429047 Clearing out pending MCEs
536 05:31:19.432647 Setting up local APIC...
537 05:31:19.433010 apic_id: 0x00 done.
538 05:31:19.435975 Turbo is available but hidden
539 05:31:19.439153 Turbo is available and visible
540 05:31:19.442336 VMX status: enabled
541 05:31:19.445540 IA32_FEATURE_CONTROL status: locked
542 05:31:19.445935 Skip microcode update
543 05:31:19.448905 CPU #0 initialized
544 05:31:19.452497 Initializing CPU #3
545 05:31:19.452860 Initializing CPU #2
546 05:31:19.455918 Initializing CPU #5
547 05:31:19.459239 CPU: vendor Intel device 806ec
548 05:31:19.462506 CPU: family 06, model 8e, stepping 0c
549 05:31:19.465674 Initializing CPU #1
550 05:31:19.466219 Initializing CPU #4
551 05:31:19.469308 CPU: vendor Intel device 806ec
552 05:31:19.472528 CPU: family 06, model 8e, stepping 0c
553 05:31:19.475580 Clearing out pending MCEs
554 05:31:19.479122 Clearing out pending MCEs
555 05:31:19.482606 Setting up local APIC...
556 05:31:19.483002 Initializing CPU #7
557 05:31:19.486089 Initializing CPU #6
558 05:31:19.489246 CPU: vendor Intel device 806ec
559 05:31:19.492329 CPU: family 06, model 8e, stepping 0c
560 05:31:19.495482 CPU: vendor Intel device 806ec
561 05:31:19.499159 CPU: family 06, model 8e, stepping 0c
562 05:31:19.502225 Clearing out pending MCEs
563 05:31:19.505508 Clearing out pending MCEs
564 05:31:19.505905 Setting up local APIC...
565 05:31:19.508671 CPU: vendor Intel device 806ec
566 05:31:19.515729 CPU: family 06, model 8e, stepping 0c
567 05:31:19.516377 Clearing out pending MCEs
568 05:31:19.519166 CPU: vendor Intel device 806ec
569 05:31:19.522270 CPU: family 06, model 8e, stepping 0c
570 05:31:19.525500 CPU: vendor Intel device 806ec
571 05:31:19.528610 CPU: family 06, model 8e, stepping 0c
572 05:31:19.531848 Clearing out pending MCEs
573 05:31:19.535121 Clearing out pending MCEs
574 05:31:19.538314 Setting up local APIC...
575 05:31:19.541636 apic_id: 0x04 done.
576 05:31:19.542000 Setting up local APIC...
577 05:31:19.544944 Setting up local APIC...
578 05:31:19.548081 VMX status: enabled
579 05:31:19.548533 apic_id: 0x01 done.
580 05:31:19.551687 Setting up local APIC...
581 05:31:19.554783 VMX status: enabled
582 05:31:19.555180 apic_id: 0x05 done.
583 05:31:19.558259 IA32_FEATURE_CONTROL status: locked
584 05:31:19.561430 VMX status: enabled
585 05:31:19.564902 Skip microcode update
586 05:31:19.567610 IA32_FEATURE_CONTROL status: locked
587 05:31:19.567972 CPU #2 initialized
588 05:31:19.571670 Skip microcode update
589 05:31:19.574974 apic_id: 0x03 done.
590 05:31:19.578168 Setting up local APIC...
591 05:31:19.581431 IA32_FEATURE_CONTROL status: locked
592 05:31:19.581831 VMX status: enabled
593 05:31:19.584500 apic_id: 0x02 done.
594 05:31:19.588138 IA32_FEATURE_CONTROL status: locked
595 05:31:19.591263 VMX status: enabled
596 05:31:19.591751 Skip microcode update
597 05:31:19.594211 IA32_FEATURE_CONTROL status: locked
598 05:31:19.597836 CPU #1 initialized
599 05:31:19.601223 Skip microcode update
600 05:31:19.601586 apic_id: 0x06 done.
601 05:31:19.604334 apic_id: 0x07 done.
602 05:31:19.608060 VMX status: enabled
603 05:31:19.608474 VMX status: enabled
604 05:31:19.611330 IA32_FEATURE_CONTROL status: locked
605 05:31:19.614318 IA32_FEATURE_CONTROL status: locked
606 05:31:19.618246 Skip microcode update
607 05:31:19.621317 Skip microcode update
608 05:31:19.621688 CPU #7 initialized
609 05:31:19.624674 CPU #6 initialized
610 05:31:19.627821 Skip microcode update
611 05:31:19.628190 CPU #4 initialized
612 05:31:19.631503 CPU #5 initialized
613 05:31:19.631971 CPU #3 initialized
614 05:31:19.634865 bsp_do_flight_plan done after 452 msecs.
615 05:31:19.638336 CPU: frequency set to 4200 MHz
616 05:31:19.641231 Enabling SMIs.
617 05:31:19.641655 Locking SMM.
618 05:31:19.657074 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 05:31:19.660950 CBFS @ c08000 size 3f8000
620 05:31:19.667434 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 05:31:19.667971 CBFS: Locating 'vbt.bin'
622 05:31:19.670446 CBFS: Found @ offset 5f5c0 size 499
623 05:31:19.677333 Found a VBT of 4608 bytes after decompression
624 05:31:19.859807 Display FSP Version Info HOB
625 05:31:19.863109 Reference Code - CPU = 9.0.1e.30
626 05:31:19.866646 uCode Version = 0.0.0.ca
627 05:31:19.869530 TXT ACM version = ff.ff.ff.ffff
628 05:31:19.873212 Display FSP Version Info HOB
629 05:31:19.877184 Reference Code - ME = 9.0.1e.30
630 05:31:19.880286 MEBx version = 0.0.0.0
631 05:31:19.883751 ME Firmware Version = Consumer SKU
632 05:31:19.886946 Display FSP Version Info HOB
633 05:31:19.890203 Reference Code - CML PCH = 9.0.1e.30
634 05:31:19.890736 PCH-CRID Status = Disabled
635 05:31:19.896877 PCH-CRID Original Value = ff.ff.ff.ffff
636 05:31:19.900162 PCH-CRID New Value = ff.ff.ff.ffff
637 05:31:19.903246 OPROM - RST - RAID = ff.ff.ff.ffff
638 05:31:19.906653 ChipsetInit Base Version = ff.ff.ff.ffff
639 05:31:19.909743 ChipsetInit Oem Version = ff.ff.ff.ffff
640 05:31:19.913246 Display FSP Version Info HOB
641 05:31:19.916454 Reference Code - SA - System Agent = 9.0.1e.30
642 05:31:19.920242 Reference Code - MRC = 0.7.1.6c
643 05:31:19.923669 SA - PCIe Version = 9.0.1e.30
644 05:31:19.926938 SA-CRID Status = Disabled
645 05:31:19.930018 SA-CRID Original Value = 0.0.0.c
646 05:31:19.933546 SA-CRID New Value = 0.0.0.c
647 05:31:19.936583 OPROM - VBIOS = ff.ff.ff.ffff
648 05:31:19.936995 RTC Init
649 05:31:19.943263 Set power on after power failure.
650 05:31:19.943795 Disabling Deep S3
651 05:31:19.946410 Disabling Deep S3
652 05:31:19.946957 Disabling Deep S4
653 05:31:19.949493 Disabling Deep S4
654 05:31:19.949929 Disabling Deep S5
655 05:31:19.953457 Disabling Deep S5
656 05:31:19.959965 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
657 05:31:19.960545 Enumerating buses...
658 05:31:19.966416 Show all devs... Before device enumeration.
659 05:31:19.966932 Root Device: enabled 1
660 05:31:19.969970 CPU_CLUSTER: 0: enabled 1
661 05:31:19.972836 DOMAIN: 0000: enabled 1
662 05:31:19.973225 APIC: 00: enabled 1
663 05:31:19.976766 PCI: 00:00.0: enabled 1
664 05:31:19.979601 PCI: 00:02.0: enabled 1
665 05:31:19.983103 PCI: 00:04.0: enabled 0
666 05:31:19.983597 PCI: 00:05.0: enabled 0
667 05:31:19.986260 PCI: 00:12.0: enabled 1
668 05:31:19.990258 PCI: 00:12.5: enabled 0
669 05:31:19.993342 PCI: 00:12.6: enabled 0
670 05:31:19.993731 PCI: 00:14.0: enabled 1
671 05:31:19.996443 PCI: 00:14.1: enabled 0
672 05:31:20.000100 PCI: 00:14.3: enabled 1
673 05:31:20.000651 PCI: 00:14.5: enabled 0
674 05:31:20.003178 PCI: 00:15.0: enabled 1
675 05:31:20.006411 PCI: 00:15.1: enabled 1
676 05:31:20.009692 PCI: 00:15.2: enabled 0
677 05:31:20.010092 PCI: 00:15.3: enabled 0
678 05:31:20.012997 PCI: 00:16.0: enabled 1
679 05:31:20.016715 PCI: 00:16.1: enabled 0
680 05:31:20.020346 PCI: 00:16.2: enabled 0
681 05:31:20.020873 PCI: 00:16.3: enabled 0
682 05:31:20.023362 PCI: 00:16.4: enabled 0
683 05:31:20.025973 PCI: 00:16.5: enabled 0
684 05:31:20.029928 PCI: 00:17.0: enabled 1
685 05:31:20.030336 PCI: 00:19.0: enabled 1
686 05:31:20.033166 PCI: 00:19.1: enabled 0
687 05:31:20.036286 PCI: 00:19.2: enabled 0
688 05:31:20.036702 PCI: 00:1a.0: enabled 0
689 05:31:20.039661 PCI: 00:1c.0: enabled 0
690 05:31:20.042992 PCI: 00:1c.1: enabled 0
691 05:31:20.046114 PCI: 00:1c.2: enabled 0
692 05:31:20.046555 PCI: 00:1c.3: enabled 0
693 05:31:20.049374 PCI: 00:1c.4: enabled 0
694 05:31:20.053009 PCI: 00:1c.5: enabled 0
695 05:31:20.055778 PCI: 00:1c.6: enabled 0
696 05:31:20.056158 PCI: 00:1c.7: enabled 0
697 05:31:20.059281 PCI: 00:1d.0: enabled 1
698 05:31:20.062935 PCI: 00:1d.1: enabled 0
699 05:31:20.063414 PCI: 00:1d.2: enabled 0
700 05:31:20.065936 PCI: 00:1d.3: enabled 0
701 05:31:20.069654 PCI: 00:1d.4: enabled 0
702 05:31:20.072676 PCI: 00:1d.5: enabled 1
703 05:31:20.073053 PCI: 00:1e.0: enabled 1
704 05:31:20.075748 PCI: 00:1e.1: enabled 0
705 05:31:20.079493 PCI: 00:1e.2: enabled 1
706 05:31:20.083042 PCI: 00:1e.3: enabled 1
707 05:31:20.083517 PCI: 00:1f.0: enabled 1
708 05:31:20.086160 PCI: 00:1f.1: enabled 1
709 05:31:20.089069 PCI: 00:1f.2: enabled 1
710 05:31:20.092296 PCI: 00:1f.3: enabled 1
711 05:31:20.092677 PCI: 00:1f.4: enabled 1
712 05:31:20.095733 PCI: 00:1f.5: enabled 1
713 05:31:20.099602 PCI: 00:1f.6: enabled 0
714 05:31:20.099988 USB0 port 0: enabled 1
715 05:31:20.103126 I2C: 00:15: enabled 1
716 05:31:20.105531 I2C: 00:5d: enabled 1
717 05:31:20.109808 GENERIC: 0.0: enabled 1
718 05:31:20.110378 I2C: 00:1a: enabled 1
719 05:31:20.112721 I2C: 00:38: enabled 1
720 05:31:20.116085 I2C: 00:39: enabled 1
721 05:31:20.116607 I2C: 00:3a: enabled 1
722 05:31:20.118953 I2C: 00:3b: enabled 1
723 05:31:20.122768 PCI: 00:00.0: enabled 1
724 05:31:20.123240 SPI: 00: enabled 1
725 05:31:20.125680 SPI: 01: enabled 1
726 05:31:20.128809 PNP: 0c09.0: enabled 1
727 05:31:20.129188 USB2 port 0: enabled 1
728 05:31:20.132779 USB2 port 1: enabled 1
729 05:31:20.135522 USB2 port 2: enabled 0
730 05:31:20.135897 USB2 port 3: enabled 0
731 05:31:20.139688 USB2 port 5: enabled 0
732 05:31:20.142233 USB2 port 6: enabled 1
733 05:31:20.142702 USB2 port 9: enabled 1
734 05:31:20.145568 USB3 port 0: enabled 1
735 05:31:20.149168 USB3 port 1: enabled 1
736 05:31:20.152789 USB3 port 2: enabled 1
737 05:31:20.153167 USB3 port 3: enabled 1
738 05:31:20.155397 USB3 port 4: enabled 0
739 05:31:20.159599 APIC: 03: enabled 1
740 05:31:20.160077 APIC: 04: enabled 1
741 05:31:20.162300 APIC: 01: enabled 1
742 05:31:20.162678 APIC: 02: enabled 1
743 05:31:20.165488 APIC: 05: enabled 1
744 05:31:20.169087 APIC: 07: enabled 1
745 05:31:20.169555 APIC: 06: enabled 1
746 05:31:20.172626 Compare with tree...
747 05:31:20.176382 Root Device: enabled 1
748 05:31:20.176860 CPU_CLUSTER: 0: enabled 1
749 05:31:20.179263 APIC: 00: enabled 1
750 05:31:20.182689 APIC: 03: enabled 1
751 05:31:20.183184 APIC: 04: enabled 1
752 05:31:20.186239 APIC: 01: enabled 1
753 05:31:20.188973 APIC: 02: enabled 1
754 05:31:20.189389 APIC: 05: enabled 1
755 05:31:20.192774 APIC: 07: enabled 1
756 05:31:20.195672 APIC: 06: enabled 1
757 05:31:20.199311 DOMAIN: 0000: enabled 1
758 05:31:20.199855 PCI: 00:00.0: enabled 1
759 05:31:20.202365 PCI: 00:02.0: enabled 1
760 05:31:20.205488 PCI: 00:04.0: enabled 0
761 05:31:20.208773 PCI: 00:05.0: enabled 0
762 05:31:20.212365 PCI: 00:12.0: enabled 1
763 05:31:20.212869 PCI: 00:12.5: enabled 0
764 05:31:20.215105 PCI: 00:12.6: enabled 0
765 05:31:20.218933 PCI: 00:14.0: enabled 1
766 05:31:20.221772 USB0 port 0: enabled 1
767 05:31:20.225575 USB2 port 0: enabled 1
768 05:31:20.226088 USB2 port 1: enabled 1
769 05:31:20.228581 USB2 port 2: enabled 0
770 05:31:20.231935 USB2 port 3: enabled 0
771 05:31:20.235704 USB2 port 5: enabled 0
772 05:31:20.238889 USB2 port 6: enabled 1
773 05:31:20.241952 USB2 port 9: enabled 1
774 05:31:20.242360 USB3 port 0: enabled 1
775 05:31:20.245340 USB3 port 1: enabled 1
776 05:31:20.248765 USB3 port 2: enabled 1
777 05:31:20.252000 USB3 port 3: enabled 1
778 05:31:20.255298 USB3 port 4: enabled 0
779 05:31:20.255807 PCI: 00:14.1: enabled 0
780 05:31:20.258680 PCI: 00:14.3: enabled 1
781 05:31:20.261853 PCI: 00:14.5: enabled 0
782 05:31:20.265094 PCI: 00:15.0: enabled 1
783 05:31:20.268278 I2C: 00:15: enabled 1
784 05:31:20.268792 PCI: 00:15.1: enabled 1
785 05:31:20.272042 I2C: 00:5d: enabled 1
786 05:31:20.274966 GENERIC: 0.0: enabled 1
787 05:31:20.278437 PCI: 00:15.2: enabled 0
788 05:31:20.281737 PCI: 00:15.3: enabled 0
789 05:31:20.282248 PCI: 00:16.0: enabled 1
790 05:31:20.285171 PCI: 00:16.1: enabled 0
791 05:31:20.288282 PCI: 00:16.2: enabled 0
792 05:31:20.291733 PCI: 00:16.3: enabled 0
793 05:31:20.292242 PCI: 00:16.4: enabled 0
794 05:31:20.295182 PCI: 00:16.5: enabled 0
795 05:31:20.298749 PCI: 00:17.0: enabled 1
796 05:31:20.301253 PCI: 00:19.0: enabled 1
797 05:31:20.304937 I2C: 00:1a: enabled 1
798 05:31:20.305458 I2C: 00:38: enabled 1
799 05:31:20.307933 I2C: 00:39: enabled 1
800 05:31:20.311219 I2C: 00:3a: enabled 1
801 05:31:20.315328 I2C: 00:3b: enabled 1
802 05:31:20.315840 PCI: 00:19.1: enabled 0
803 05:31:20.318690 PCI: 00:19.2: enabled 0
804 05:31:20.321150 PCI: 00:1a.0: enabled 0
805 05:31:20.324987 PCI: 00:1c.0: enabled 0
806 05:31:20.327950 PCI: 00:1c.1: enabled 0
807 05:31:20.328396 PCI: 00:1c.2: enabled 0
808 05:31:20.331168 PCI: 00:1c.3: enabled 0
809 05:31:20.334670 PCI: 00:1c.4: enabled 0
810 05:31:20.337856 PCI: 00:1c.5: enabled 0
811 05:31:20.340975 PCI: 00:1c.6: enabled 0
812 05:31:20.341383 PCI: 00:1c.7: enabled 0
813 05:31:20.344295 PCI: 00:1d.0: enabled 1
814 05:31:20.347968 PCI: 00:1d.1: enabled 0
815 05:31:20.351302 PCI: 00:1d.2: enabled 0
816 05:31:20.354468 PCI: 00:1d.3: enabled 0
817 05:31:20.354999 PCI: 00:1d.4: enabled 0
818 05:31:20.357747 PCI: 00:1d.5: enabled 1
819 05:31:20.361205 PCI: 00:00.0: enabled 1
820 05:31:20.364354 PCI: 00:1e.0: enabled 1
821 05:31:20.367769 PCI: 00:1e.1: enabled 0
822 05:31:20.368309 PCI: 00:1e.2: enabled 1
823 05:31:20.370837 SPI: 00: enabled 1
824 05:31:20.374404 PCI: 00:1e.3: enabled 1
825 05:31:20.374815 SPI: 01: enabled 1
826 05:31:20.377895 PCI: 00:1f.0: enabled 1
827 05:31:20.380791 PNP: 0c09.0: enabled 1
828 05:31:20.384628 PCI: 00:1f.1: enabled 1
829 05:31:20.387970 PCI: 00:1f.2: enabled 1
830 05:31:20.388528 PCI: 00:1f.3: enabled 1
831 05:31:20.391534 PCI: 00:1f.4: enabled 1
832 05:31:20.394939 PCI: 00:1f.5: enabled 1
833 05:31:20.397388 PCI: 00:1f.6: enabled 0
834 05:31:20.400890 Root Device scanning...
835 05:31:20.404238 scan_static_bus for Root Device
836 05:31:20.404683 CPU_CLUSTER: 0 enabled
837 05:31:20.407789 DOMAIN: 0000 enabled
838 05:31:20.411259 DOMAIN: 0000 scanning...
839 05:31:20.414637 PCI: pci_scan_bus for bus 00
840 05:31:20.417495 PCI: 00:00.0 [8086/0000] ops
841 05:31:20.421185 PCI: 00:00.0 [8086/9b61] enabled
842 05:31:20.424172 PCI: 00:02.0 [8086/0000] bus ops
843 05:31:20.427886 PCI: 00:02.0 [8086/9b41] enabled
844 05:31:20.430895 PCI: 00:04.0 [8086/1903] disabled
845 05:31:20.434506 PCI: 00:08.0 [8086/1911] enabled
846 05:31:20.437875 PCI: 00:12.0 [8086/02f9] enabled
847 05:31:20.440810 PCI: 00:14.0 [8086/0000] bus ops
848 05:31:20.443938 PCI: 00:14.0 [8086/02ed] enabled
849 05:31:20.447725 PCI: 00:14.2 [8086/02ef] enabled
850 05:31:20.450987 PCI: 00:14.3 [8086/02f0] enabled
851 05:31:20.453876 PCI: 00:15.0 [8086/0000] bus ops
852 05:31:20.457517 PCI: 00:15.0 [8086/02e8] enabled
853 05:31:20.460940 PCI: 00:15.1 [8086/0000] bus ops
854 05:31:20.464281 PCI: 00:15.1 [8086/02e9] enabled
855 05:31:20.467017 PCI: 00:16.0 [8086/0000] ops
856 05:31:20.470452 PCI: 00:16.0 [8086/02e0] enabled
857 05:31:20.470888 PCI: 00:17.0 [8086/0000] ops
858 05:31:20.474069 PCI: 00:17.0 [8086/02d3] enabled
859 05:31:20.477151 PCI: 00:19.0 [8086/0000] bus ops
860 05:31:20.480657 PCI: 00:19.0 [8086/02c5] enabled
861 05:31:20.484076 PCI: 00:1d.0 [8086/0000] bus ops
862 05:31:20.487275 PCI: 00:1d.0 [8086/02b0] enabled
863 05:31:20.493798 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 05:31:20.496877 PCI: 00:1e.0 [8086/0000] ops
865 05:31:20.500707 PCI: 00:1e.0 [8086/02a8] enabled
866 05:31:20.503459 PCI: 00:1e.2 [8086/0000] bus ops
867 05:31:20.507140 PCI: 00:1e.2 [8086/02aa] enabled
868 05:31:20.510699 PCI: 00:1e.3 [8086/0000] bus ops
869 05:31:20.514593 PCI: 00:1e.3 [8086/02ab] enabled
870 05:31:20.517504 PCI: 00:1f.0 [8086/0000] bus ops
871 05:31:20.521202 PCI: 00:1f.0 [8086/0284] enabled
872 05:31:20.527260 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 05:31:20.530152 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 05:31:20.534528 PCI: 00:1f.3 [8086/0000] bus ops
875 05:31:20.537302 PCI: 00:1f.3 [8086/02c8] enabled
876 05:31:20.540641 PCI: 00:1f.4 [8086/0000] bus ops
877 05:31:20.543957 PCI: 00:1f.4 [8086/02a3] enabled
878 05:31:20.547631 PCI: 00:1f.5 [8086/0000] bus ops
879 05:31:20.551101 PCI: 00:1f.5 [8086/02a4] enabled
880 05:31:20.553740 PCI: Leftover static devices:
881 05:31:20.557479 PCI: 00:05.0
882 05:31:20.557989 PCI: 00:12.5
883 05:31:20.560830 PCI: 00:12.6
884 05:31:20.561413 PCI: 00:14.1
885 05:31:20.561846 PCI: 00:14.5
886 05:31:20.563787 PCI: 00:15.2
887 05:31:20.564194 PCI: 00:15.3
888 05:31:20.566968 PCI: 00:16.1
889 05:31:20.567376 PCI: 00:16.2
890 05:31:20.567788 PCI: 00:16.3
891 05:31:20.570140 PCI: 00:16.4
892 05:31:20.570550 PCI: 00:16.5
893 05:31:20.573251 PCI: 00:19.1
894 05:31:20.573662 PCI: 00:19.2
895 05:31:20.574077 PCI: 00:1a.0
896 05:31:20.576647 PCI: 00:1c.0
897 05:31:20.577041 PCI: 00:1c.1
898 05:31:20.580448 PCI: 00:1c.2
899 05:31:20.580907 PCI: 00:1c.3
900 05:31:20.583734 PCI: 00:1c.4
901 05:31:20.584223 PCI: 00:1c.5
902 05:31:20.584587 PCI: 00:1c.6
903 05:31:20.586947 PCI: 00:1c.7
904 05:31:20.587445 PCI: 00:1d.1
905 05:31:20.590095 PCI: 00:1d.2
906 05:31:20.590485 PCI: 00:1d.3
907 05:31:20.590791 PCI: 00:1d.4
908 05:31:20.593742 PCI: 00:1d.5
909 05:31:20.594101 PCI: 00:1e.1
910 05:31:20.596767 PCI: 00:1f.1
911 05:31:20.597157 PCI: 00:1f.2
912 05:31:20.597541 PCI: 00:1f.6
913 05:31:20.600296 PCI: Check your devicetree.cb.
914 05:31:20.604028 PCI: 00:02.0 scanning...
915 05:31:20.607214 scan_generic_bus for PCI: 00:02.0
916 05:31:20.610678 scan_generic_bus for PCI: 00:02.0 done
917 05:31:20.617216 scan_bus: scanning of bus PCI: 00:02.0 took 10181 usecs
918 05:31:20.620358 PCI: 00:14.0 scanning...
919 05:31:20.623596 scan_static_bus for PCI: 00:14.0
920 05:31:20.627423 USB0 port 0 enabled
921 05:31:20.628047 USB0 port 0 scanning...
922 05:31:20.630080 scan_static_bus for USB0 port 0
923 05:31:20.633501 USB2 port 0 enabled
924 05:31:20.636657 USB2 port 1 enabled
925 05:31:20.637025 USB2 port 2 disabled
926 05:31:20.639867 USB2 port 3 disabled
927 05:31:20.640274 USB2 port 5 disabled
928 05:31:20.643233 USB2 port 6 enabled
929 05:31:20.646441 USB2 port 9 enabled
930 05:31:20.646810 USB3 port 0 enabled
931 05:31:20.650252 USB3 port 1 enabled
932 05:31:20.653544 USB3 port 2 enabled
933 05:31:20.653814 USB3 port 3 enabled
934 05:31:20.656570 USB3 port 4 disabled
935 05:31:20.660068 USB2 port 0 scanning...
936 05:31:20.663321 scan_static_bus for USB2 port 0
937 05:31:20.666430 scan_static_bus for USB2 port 0 done
938 05:31:20.669820 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
939 05:31:20.673154 USB2 port 1 scanning...
940 05:31:20.677123 scan_static_bus for USB2 port 1
941 05:31:20.679636 scan_static_bus for USB2 port 1 done
942 05:31:20.686526 scan_bus: scanning of bus USB2 port 1 took 9697 usecs
943 05:31:20.689899 USB2 port 6 scanning...
944 05:31:20.692954 scan_static_bus for USB2 port 6
945 05:31:20.696385 scan_static_bus for USB2 port 6 done
946 05:31:20.699887 scan_bus: scanning of bus USB2 port 6 took 9695 usecs
947 05:31:20.703467 USB2 port 9 scanning...
948 05:31:20.706769 scan_static_bus for USB2 port 9
949 05:31:20.709956 scan_static_bus for USB2 port 9 done
950 05:31:20.716816 scan_bus: scanning of bus USB2 port 9 took 9686 usecs
951 05:31:20.720029 USB3 port 0 scanning...
952 05:31:20.723058 scan_static_bus for USB3 port 0
953 05:31:20.726746 scan_static_bus for USB3 port 0 done
954 05:31:20.729752 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
955 05:31:20.733495 USB3 port 1 scanning...
956 05:31:20.736825 scan_static_bus for USB3 port 1
957 05:31:20.739947 scan_static_bus for USB3 port 1 done
958 05:31:20.746259 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
959 05:31:20.750303 USB3 port 2 scanning...
960 05:31:20.753566 scan_static_bus for USB3 port 2
961 05:31:20.755982 scan_static_bus for USB3 port 2 done
962 05:31:20.759671 scan_bus: scanning of bus USB3 port 2 took 9688 usecs
963 05:31:20.762937 USB3 port 3 scanning...
964 05:31:20.766227 scan_static_bus for USB3 port 3
965 05:31:20.769552 scan_static_bus for USB3 port 3 done
966 05:31:20.776605 scan_bus: scanning of bus USB3 port 3 took 9687 usecs
967 05:31:20.780285 scan_static_bus for USB0 port 0 done
968 05:31:20.786309 scan_bus: scanning of bus USB0 port 0 took 155297 usecs
969 05:31:20.789972 scan_static_bus for PCI: 00:14.0 done
970 05:31:20.796369 scan_bus: scanning of bus PCI: 00:14.0 took 172910 usecs
971 05:31:20.796866 PCI: 00:15.0 scanning...
972 05:31:20.799790 scan_generic_bus for PCI: 00:15.0
973 05:31:20.806407 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 05:31:20.809543 scan_generic_bus for PCI: 00:15.0 done
975 05:31:20.816639 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
976 05:31:20.817183 PCI: 00:15.1 scanning...
977 05:31:20.820118 scan_generic_bus for PCI: 00:15.1
978 05:31:20.826017 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 05:31:20.829724 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 05:31:20.832902 scan_generic_bus for PCI: 00:15.1 done
981 05:31:20.839591 scan_bus: scanning of bus PCI: 00:15.1 took 18577 usecs
982 05:31:20.842603 PCI: 00:19.0 scanning...
983 05:31:20.845767 scan_generic_bus for PCI: 00:19.0
984 05:31:20.849046 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 05:31:20.853055 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 05:31:20.856611 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 05:31:20.862439 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 05:31:20.866140 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 05:31:20.869647 scan_generic_bus for PCI: 00:19.0 done
990 05:31:20.875867 scan_bus: scanning of bus PCI: 00:19.0 took 30718 usecs
991 05:31:20.876445 PCI: 00:1d.0 scanning...
992 05:31:20.882583 do_pci_scan_bridge for PCI: 00:1d.0
993 05:31:20.883121 PCI: pci_scan_bus for bus 01
994 05:31:20.885925 PCI: 01:00.0 [1c5c/1327] enabled
995 05:31:20.892790 Enabling Common Clock Configuration
996 05:31:20.896315 L1 Sub-State supported from root port 29
997 05:31:20.899819 L1 Sub-State Support = 0xf
998 05:31:20.902811 CommonModeRestoreTime = 0x28
999 05:31:20.906035 Power On Value = 0x16, Power On Scale = 0x0
1000 05:31:20.906542 ASPM: Enabled L1
1001 05:31:20.913303 scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs
1002 05:31:20.916487 PCI: 00:1e.2 scanning...
1003 05:31:20.920093 scan_generic_bus for PCI: 00:1e.2
1004 05:31:20.922465 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 05:31:20.926683 scan_generic_bus for PCI: 00:1e.2 done
1006 05:31:20.932833 scan_bus: scanning of bus PCI: 00:1e.2 took 13994 usecs
1007 05:31:20.936632 PCI: 00:1e.3 scanning...
1008 05:31:20.939577 scan_generic_bus for PCI: 00:1e.3
1009 05:31:20.943075 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 05:31:20.946038 scan_generic_bus for PCI: 00:1e.3 done
1011 05:31:20.952762 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1012 05:31:20.956044 PCI: 00:1f.0 scanning...
1013 05:31:20.959510 scan_static_bus for PCI: 00:1f.0
1014 05:31:20.960018 PNP: 0c09.0 enabled
1015 05:31:20.962697 scan_static_bus for PCI: 00:1f.0 done
1016 05:31:20.969408 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1017 05:31:20.972598 PCI: 00:1f.3 scanning...
1018 05:31:20.979540 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1019 05:31:20.980053 PCI: 00:1f.4 scanning...
1020 05:31:20.982489 scan_generic_bus for PCI: 00:1f.4
1021 05:31:20.989288 scan_generic_bus for PCI: 00:1f.4 done
1022 05:31:20.992546 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1023 05:31:20.996210 PCI: 00:1f.5 scanning...
1024 05:31:20.999589 scan_generic_bus for PCI: 00:1f.5
1025 05:31:21.002443 scan_generic_bus for PCI: 00:1f.5 done
1026 05:31:21.009344 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1027 05:31:21.015933 scan_bus: scanning of bus DOMAIN: 0000 took 604802 usecs
1028 05:31:21.019247 scan_static_bus for Root Device done
1029 05:31:21.022446 scan_bus: scanning of bus Root Device took 624660 usecs
1030 05:31:21.025664 done
1031 05:31:21.029383 Chrome EC: UHEPI supported
1032 05:31:21.032706 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 05:31:21.039478 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 05:31:21.045851 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 05:31:21.052321 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 05:31:21.055320 SPI flash protection: WPSW=0 SRP0=0
1037 05:31:21.062090 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 05:31:21.065379 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 05:31:21.069082 found VGA at PCI: 00:02.0
1040 05:31:21.072275 Setting up VGA for PCI: 00:02.0
1041 05:31:21.078537 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 05:31:21.081722 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 05:31:21.085092 Allocating resources...
1044 05:31:21.088785 Reading resources...
1045 05:31:21.091968 Root Device read_resources bus 0 link: 0
1046 05:31:21.095366 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 05:31:21.101998 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 05:31:21.105297 DOMAIN: 0000 read_resources bus 0 link: 0
1049 05:31:21.112828 PCI: 00:14.0 read_resources bus 0 link: 0
1050 05:31:21.115847 USB0 port 0 read_resources bus 0 link: 0
1051 05:31:21.124410 USB0 port 0 read_resources bus 0 link: 0 done
1052 05:31:21.127337 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 05:31:21.134628 PCI: 00:15.0 read_resources bus 1 link: 0
1054 05:31:21.138489 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 05:31:21.144543 PCI: 00:15.1 read_resources bus 2 link: 0
1056 05:31:21.147951 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 05:31:21.155555 PCI: 00:19.0 read_resources bus 3 link: 0
1058 05:31:21.162261 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 05:31:21.165392 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 05:31:21.172057 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 05:31:21.174859 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 05:31:21.181609 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 05:31:21.184997 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 05:31:21.192170 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 05:31:21.195732 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 05:31:21.201954 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 05:31:21.205312 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 05:31:21.211945 Root Device read_resources bus 0 link: 0 done
1069 05:31:21.215236 Done reading resources.
1070 05:31:21.218369 Show resources in subtree (Root Device)...After reading.
1071 05:31:21.226113 Root Device child on link 0 CPU_CLUSTER: 0
1072 05:31:21.229037 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 05:31:21.229338 APIC: 00
1074 05:31:21.231967 APIC: 03
1075 05:31:21.232266 APIC: 04
1076 05:31:21.232497 APIC: 01
1077 05:31:21.235393 APIC: 02
1078 05:31:21.235746 APIC: 05
1079 05:31:21.239116 APIC: 07
1080 05:31:21.239645 APIC: 06
1081 05:31:21.242219 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 05:31:21.252294 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 05:31:21.308330 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 05:31:21.308867 PCI: 00:00.0
1085 05:31:21.309341 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 05:31:21.310149 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 05:31:21.310514 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 05:31:21.310927 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 05:31:21.315902 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 05:31:21.319402 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 05:31:21.329400 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 05:31:21.338872 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 05:31:21.349540 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 05:31:21.355933 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 05:31:21.365584 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 05:31:21.375536 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 05:31:21.385745 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 05:31:21.395139 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 05:31:21.405289 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 05:31:21.411845 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 05:31:21.415263 PCI: 00:02.0
1102 05:31:21.425112 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 05:31:21.435577 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 05:31:21.445113 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 05:31:21.445505 PCI: 00:04.0
1106 05:31:21.448579 PCI: 00:08.0
1107 05:31:21.458646 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 05:31:21.459149 PCI: 00:12.0
1109 05:31:21.468700 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 05:31:21.472345 PCI: 00:14.0 child on link 0 USB0 port 0
1111 05:31:21.482364 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 05:31:21.489199 USB0 port 0 child on link 0 USB2 port 0
1113 05:31:21.489742 USB2 port 0
1114 05:31:21.492426 USB2 port 1
1115 05:31:21.492956 USB2 port 2
1116 05:31:21.495715 USB2 port 3
1117 05:31:21.496240 USB2 port 5
1118 05:31:21.498523 USB2 port 6
1119 05:31:21.498948 USB2 port 9
1120 05:31:21.501729 USB3 port 0
1121 05:31:21.502175 USB3 port 1
1122 05:31:21.505225 USB3 port 2
1123 05:31:21.508769 USB3 port 3
1124 05:31:21.509304 USB3 port 4
1125 05:31:21.512036 PCI: 00:14.2
1126 05:31:21.521882 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 05:31:21.531749 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 05:31:21.532200 PCI: 00:14.3
1129 05:31:21.542275 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 05:31:21.545490 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 05:31:21.555137 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 05:31:21.558247 I2C: 01:15
1133 05:31:21.562266 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 05:31:21.571713 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 05:31:21.572129 I2C: 02:5d
1136 05:31:21.575050 GENERIC: 0.0
1137 05:31:21.575456 PCI: 00:16.0
1138 05:31:21.585589 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 05:31:21.588532 PCI: 00:17.0
1140 05:31:21.598411 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 05:31:21.604988 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 05:31:21.614950 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 05:31:21.621649 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 05:31:21.631862 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 05:31:21.641642 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 05:31:21.644764 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 05:31:21.654329 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 05:31:21.654828 I2C: 03:1a
1149 05:31:21.658390 I2C: 03:38
1150 05:31:21.658815 I2C: 03:39
1151 05:31:21.661660 I2C: 03:3a
1152 05:31:21.662323 I2C: 03:3b
1153 05:31:21.668152 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 05:31:21.674750 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 05:31:21.684605 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 05:31:21.694568 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 05:31:21.695036 PCI: 01:00.0
1158 05:31:21.705101 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 05:31:21.707719 PCI: 00:1e.0
1160 05:31:21.717933 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 05:31:21.727970 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 05:31:21.731711 PCI: 00:1e.2 child on link 0 SPI: 00
1163 05:31:21.741446 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 05:31:21.744892 SPI: 00
1165 05:31:21.747914 PCI: 00:1e.3 child on link 0 SPI: 01
1166 05:31:21.757612 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 05:31:21.758236 SPI: 01
1168 05:31:21.764701 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 05:31:21.771370 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 05:31:21.781041 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 05:31:21.781704 PNP: 0c09.0
1172 05:31:21.790648 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 05:31:21.794333 PCI: 00:1f.3
1174 05:31:21.803971 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 05:31:21.814170 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 05:31:21.814696 PCI: 00:1f.4
1177 05:31:21.823743 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 05:31:21.834480 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 05:31:21.834974 PCI: 00:1f.5
1180 05:31:21.844136 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 05:31:21.851297 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 05:31:21.857718 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 05:31:21.863920 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 05:31:21.867592 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 05:31:21.870554 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 05:31:21.873835 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 05:31:21.877164 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 05:31:21.884024 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 05:31:21.890711 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 05:31:21.900702 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 05:31:21.907255 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 05:31:21.913995 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 05:31:21.917678 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 05:31:21.927452 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 05:31:21.930549 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 05:31:21.937251 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 05:31:21.940610 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 05:31:21.947103 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 05:31:21.950375 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 05:31:21.957058 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 05:31:21.960363 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 05:31:21.963668 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 05:31:21.970510 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 05:31:21.973295 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 05:31:21.980349 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 05:31:21.983641 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 05:31:21.990487 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 05:31:21.993766 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 05:31:22.000562 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 05:31:22.003438 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 05:31:22.009578 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 05:31:22.012828 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 05:31:22.019685 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 05:31:22.023442 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 05:31:22.030125 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 05:31:22.033039 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 05:31:22.039458 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 05:31:22.046101 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 05:31:22.049425 avoid_fixed_resources: DOMAIN: 0000
1220 05:31:22.055963 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 05:31:22.062771 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 05:31:22.069546 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 05:31:22.075752 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 05:31:22.085601 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 05:31:22.092407 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 05:31:22.099826 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 05:31:22.108987 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 05:31:22.115830 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 05:31:22.122681 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 05:31:22.129348 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 05:31:22.139369 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 05:31:22.139880 Setting resources...
1233 05:31:22.146208 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 05:31:22.148867 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 05:31:22.155691 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 05:31:22.159150 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 05:31:22.162131 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 05:31:22.168503 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 05:31:22.175790 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 05:31:22.181718 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 05:31:22.188355 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 05:31:22.195022 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 05:31:22.198915 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 05:31:22.201773 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 05:31:22.208631 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 05:31:22.211319 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 05:31:22.218196 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 05:31:22.221388 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 05:31:22.228331 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 05:31:22.231867 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 05:31:22.238245 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 05:31:22.241973 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 05:31:22.248853 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 05:31:22.251569 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 05:31:22.258158 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 05:31:22.261422 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 05:31:22.268841 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 05:31:22.271987 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 05:31:22.275341 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 05:31:22.281561 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 05:31:22.284724 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 05:31:22.292020 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 05:31:22.294826 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 05:31:22.301276 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 05:31:22.308009 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 05:31:22.314427 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 05:31:22.321238 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 05:31:22.331228 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 05:31:22.335113 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 05:31:22.341419 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 05:31:22.348346 Root Device assign_resources, bus 0 link: 0
1272 05:31:22.351713 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 05:31:22.361556 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 05:31:22.368241 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 05:31:22.374992 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 05:31:22.385014 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 05:31:22.392152 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 05:31:22.402154 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 05:31:22.405237 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 05:31:22.411926 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 05:31:22.418262 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 05:31:22.427802 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 05:31:22.434725 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 05:31:22.445037 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 05:31:22.448355 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 05:31:22.451479 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 05:31:22.461216 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 05:31:22.464739 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 05:31:22.471465 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 05:31:22.478228 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 05:31:22.488377 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 05:31:22.495078 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 05:31:22.501212 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 05:31:22.511489 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 05:31:22.517958 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 05:31:22.524405 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 05:31:22.534544 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 05:31:22.537855 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 05:31:22.541582 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 05:31:22.551655 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 05:31:22.561318 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 05:31:22.567836 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 05:31:22.574583 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 05:31:22.581265 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 05:31:22.587933 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 05:31:22.594212 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 05:31:22.604385 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 05:31:22.607319 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 05:31:22.610485 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 05:31:22.620586 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 05:31:22.623604 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 05:31:22.630575 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 05:31:22.633989 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 05:31:22.640652 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 05:31:22.643928 LPC: Trying to open IO window from 800 size 1ff
1316 05:31:22.653891 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 05:31:22.660429 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 05:31:22.667452 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 05:31:22.677444 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 05:31:22.680721 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 05:31:22.686991 Root Device assign_resources, bus 0 link: 0
1322 05:31:22.687384 Done setting resources.
1323 05:31:22.694210 Show resources in subtree (Root Device)...After assigning values.
1324 05:31:22.700894 Root Device child on link 0 CPU_CLUSTER: 0
1325 05:31:22.704178 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 05:31:22.704618 APIC: 00
1327 05:31:22.707518 APIC: 03
1328 05:31:22.707902 APIC: 04
1329 05:31:22.708207 APIC: 01
1330 05:31:22.710580 APIC: 02
1331 05:31:22.710979 APIC: 05
1332 05:31:22.713860 APIC: 07
1333 05:31:22.714289 APIC: 06
1334 05:31:22.717182 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 05:31:22.727168 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 05:31:22.740461 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 05:31:22.740990 PCI: 00:00.0
1338 05:31:22.750408 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 05:31:22.760592 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 05:31:22.770464 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 05:31:22.777274 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 05:31:22.787426 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 05:31:22.796841 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 05:31:22.806351 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 05:31:22.816205 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 05:31:22.826288 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 05:31:22.833012 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 05:31:22.842878 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 05:31:22.852432 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 05:31:22.862616 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 05:31:22.872656 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 05:31:22.882656 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 05:31:22.889318 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 05:31:22.892937 PCI: 00:02.0
1355 05:31:22.902652 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 05:31:22.912218 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 05:31:22.922169 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 05:31:22.925417 PCI: 00:04.0
1359 05:31:22.925992 PCI: 00:08.0
1360 05:31:22.935479 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 05:31:22.938881 PCI: 00:12.0
1362 05:31:22.948859 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 05:31:22.951767 PCI: 00:14.0 child on link 0 USB0 port 0
1364 05:31:22.961804 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 05:31:22.968199 USB0 port 0 child on link 0 USB2 port 0
1366 05:31:22.968726 USB2 port 0
1367 05:31:22.971983 USB2 port 1
1368 05:31:22.972545 USB2 port 2
1369 05:31:22.975141 USB2 port 3
1370 05:31:22.975566 USB2 port 5
1371 05:31:22.978534 USB2 port 6
1372 05:31:22.979007 USB2 port 9
1373 05:31:22.981837 USB3 port 0
1374 05:31:22.982381 USB3 port 1
1375 05:31:22.984754 USB3 port 2
1376 05:31:22.988440 USB3 port 3
1377 05:31:22.988724 USB3 port 4
1378 05:31:22.991870 PCI: 00:14.2
1379 05:31:23.001053 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 05:31:23.010721 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 05:31:23.010816 PCI: 00:14.3
1382 05:31:23.021282 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 05:31:23.027764 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 05:31:23.037633 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 05:31:23.037814 I2C: 01:15
1386 05:31:23.044180 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 05:31:23.054553 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 05:31:23.054836 I2C: 02:5d
1389 05:31:23.057531 GENERIC: 0.0
1390 05:31:23.057725 PCI: 00:16.0
1391 05:31:23.067463 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 05:31:23.070490 PCI: 00:17.0
1393 05:31:23.081172 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 05:31:23.091304 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 05:31:23.100404 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 05:31:23.106939 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 05:31:23.117432 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 05:31:23.127877 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 05:31:23.133676 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 05:31:23.143433 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 05:31:23.143843 I2C: 03:1a
1402 05:31:23.146644 I2C: 03:38
1403 05:31:23.147188 I2C: 03:39
1404 05:31:23.150332 I2C: 03:3a
1405 05:31:23.150836 I2C: 03:3b
1406 05:31:23.153806 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 05:31:23.163770 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 05:31:23.173144 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 05:31:23.182989 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 05:31:23.186716 PCI: 01:00.0
1411 05:31:23.196335 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 05:31:23.199576 PCI: 00:1e.0
1413 05:31:23.209891 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 05:31:23.219845 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 05:31:23.223124 PCI: 00:1e.2 child on link 0 SPI: 00
1416 05:31:23.233097 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 05:31:23.236233 SPI: 00
1418 05:31:23.239572 PCI: 00:1e.3 child on link 0 SPI: 01
1419 05:31:23.249849 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 05:31:23.252680 SPI: 01
1421 05:31:23.256281 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 05:31:23.262621 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 05:31:23.272467 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 05:31:23.275596 PNP: 0c09.0
1425 05:31:23.282442 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 05:31:23.286097 PCI: 00:1f.3
1427 05:31:23.295972 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 05:31:23.305491 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 05:31:23.308938 PCI: 00:1f.4
1430 05:31:23.315826 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 05:31:23.325171 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 05:31:23.329173 PCI: 00:1f.5
1433 05:31:23.338392 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 05:31:23.341782 Done allocating resources.
1435 05:31:23.348122 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 05:31:23.348404 Enabling resources...
1437 05:31:23.355388 PCI: 00:00.0 subsystem <- 8086/9b61
1438 05:31:23.355612 PCI: 00:00.0 cmd <- 06
1439 05:31:23.359111 PCI: 00:02.0 subsystem <- 8086/9b41
1440 05:31:23.361857 PCI: 00:02.0 cmd <- 03
1441 05:31:23.365730 PCI: 00:08.0 cmd <- 06
1442 05:31:23.369415 PCI: 00:12.0 subsystem <- 8086/02f9
1443 05:31:23.372120 PCI: 00:12.0 cmd <- 02
1444 05:31:23.375419 PCI: 00:14.0 subsystem <- 8086/02ed
1445 05:31:23.378748 PCI: 00:14.0 cmd <- 02
1446 05:31:23.382289 PCI: 00:14.2 cmd <- 02
1447 05:31:23.385182 PCI: 00:14.3 subsystem <- 8086/02f0
1448 05:31:23.385510 PCI: 00:14.3 cmd <- 02
1449 05:31:23.392652 PCI: 00:15.0 subsystem <- 8086/02e8
1450 05:31:23.392970 PCI: 00:15.0 cmd <- 02
1451 05:31:23.395870 PCI: 00:15.1 subsystem <- 8086/02e9
1452 05:31:23.399527 PCI: 00:15.1 cmd <- 02
1453 05:31:23.402609 PCI: 00:16.0 subsystem <- 8086/02e0
1454 05:31:23.405714 PCI: 00:16.0 cmd <- 02
1455 05:31:23.409729 PCI: 00:17.0 subsystem <- 8086/02d3
1456 05:31:23.413079 PCI: 00:17.0 cmd <- 03
1457 05:31:23.416150 PCI: 00:19.0 subsystem <- 8086/02c5
1458 05:31:23.419347 PCI: 00:19.0 cmd <- 02
1459 05:31:23.422943 PCI: 00:1d.0 bridge ctrl <- 0013
1460 05:31:23.425954 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 05:31:23.429165 PCI: 00:1d.0 cmd <- 06
1462 05:31:23.432663 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 05:31:23.435998 PCI: 00:1e.0 cmd <- 06
1464 05:31:23.439005 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 05:31:23.439552 PCI: 00:1e.2 cmd <- 06
1466 05:31:23.445721 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 05:31:23.446166 PCI: 00:1e.3 cmd <- 02
1468 05:31:23.449006 PCI: 00:1f.0 subsystem <- 8086/0284
1469 05:31:23.452357 PCI: 00:1f.0 cmd <- 407
1470 05:31:23.455546 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 05:31:23.459013 PCI: 00:1f.3 cmd <- 02
1472 05:31:23.462692 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 05:31:23.466021 PCI: 00:1f.4 cmd <- 03
1474 05:31:23.469189 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 05:31:23.472460 PCI: 00:1f.5 cmd <- 406
1476 05:31:23.480982 PCI: 01:00.0 cmd <- 02
1477 05:31:23.486150 done.
1478 05:31:23.498372 ME: Version: 14.0.39.1367
1479 05:31:23.504649 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1480 05:31:23.508417 Initializing devices...
1481 05:31:23.508822 Root Device init ...
1482 05:31:23.514661 Chrome EC: Set SMI mask to 0x0000000000000000
1483 05:31:23.518435 Chrome EC: clear events_b mask to 0x0000000000000000
1484 05:31:23.524883 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 05:31:23.531468 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 05:31:23.538331 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 05:31:23.541625 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 05:31:23.544720 Root Device init finished in 35185 usecs
1489 05:31:23.547905 CPU_CLUSTER: 0 init ...
1490 05:31:23.555059 CPU_CLUSTER: 0 init finished in 2449 usecs
1491 05:31:23.558925 PCI: 00:00.0 init ...
1492 05:31:23.562095 CPU TDP: 15 Watts
1493 05:31:23.565391 CPU PL2 = 64 Watts
1494 05:31:23.568544 PCI: 00:00.0 init finished in 7081 usecs
1495 05:31:23.572116 PCI: 00:02.0 init ...
1496 05:31:23.575941 PCI: 00:02.0 init finished in 2253 usecs
1497 05:31:23.578510 PCI: 00:08.0 init ...
1498 05:31:23.582053 PCI: 00:08.0 init finished in 2255 usecs
1499 05:31:23.585114 PCI: 00:12.0 init ...
1500 05:31:23.588986 PCI: 00:12.0 init finished in 2253 usecs
1501 05:31:23.592125 PCI: 00:14.0 init ...
1502 05:31:23.595643 PCI: 00:14.0 init finished in 2243 usecs
1503 05:31:23.599057 PCI: 00:14.2 init ...
1504 05:31:23.602138 PCI: 00:14.2 init finished in 2252 usecs
1505 05:31:23.605795 PCI: 00:14.3 init ...
1506 05:31:23.608736 PCI: 00:14.3 init finished in 2271 usecs
1507 05:31:23.612326 PCI: 00:15.0 init ...
1508 05:31:23.615412 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 05:31:23.618713 PCI: 00:15.0 init finished in 5971 usecs
1510 05:31:23.621872 PCI: 00:15.1 init ...
1511 05:31:23.625488 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 05:31:23.628650 PCI: 00:15.1 init finished in 5980 usecs
1513 05:31:23.632176 PCI: 00:16.0 init ...
1514 05:31:23.635157 PCI: 00:16.0 init finished in 2253 usecs
1515 05:31:23.639584 PCI: 00:19.0 init ...
1516 05:31:23.642627 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 05:31:23.649258 PCI: 00:19.0 init finished in 5978 usecs
1518 05:31:23.649685 PCI: 00:1d.0 init ...
1519 05:31:23.652636 Initializing PCH PCIe bridge.
1520 05:31:23.655537 PCI: 00:1d.0 init finished in 5286 usecs
1521 05:31:23.660791 PCI: 00:1f.0 init ...
1522 05:31:23.664043 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 05:31:23.670619 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 05:31:23.671014 IOAPIC: ID = 0x02
1525 05:31:23.673825 IOAPIC: Dumping registers
1526 05:31:23.677317 reg 0x0000: 0x02000000
1527 05:31:23.680688 reg 0x0001: 0x00770020
1528 05:31:23.681100 reg 0x0002: 0x00000000
1529 05:31:23.687300 PCI: 00:1f.0 init finished in 23560 usecs
1530 05:31:23.690812 PCI: 00:1f.4 init ...
1531 05:31:23.693874 PCI: 00:1f.4 init finished in 2263 usecs
1532 05:31:23.704714 PCI: 01:00.0 init ...
1533 05:31:23.707981 PCI: 01:00.0 init finished in 2253 usecs
1534 05:31:23.712740 PNP: 0c09.0 init ...
1535 05:31:23.716039 Google Chrome EC uptime: 11.050 seconds
1536 05:31:23.722631 Google Chrome AP resets since EC boot: 0
1537 05:31:23.725937 Google Chrome most recent AP reset causes:
1538 05:31:23.732566 Google Chrome EC reset flags at last EC boot: reset-pin
1539 05:31:23.735669 PNP: 0c09.0 init finished in 20570 usecs
1540 05:31:23.739033 Devices initialized
1541 05:31:23.739439 Show all devs... After init.
1542 05:31:23.742323 Root Device: enabled 1
1543 05:31:23.745714 CPU_CLUSTER: 0: enabled 1
1544 05:31:23.748927 DOMAIN: 0000: enabled 1
1545 05:31:23.749465 APIC: 00: enabled 1
1546 05:31:23.752187 PCI: 00:00.0: enabled 1
1547 05:31:23.755830 PCI: 00:02.0: enabled 1
1548 05:31:23.759043 PCI: 00:04.0: enabled 0
1549 05:31:23.759429 PCI: 00:05.0: enabled 0
1550 05:31:23.762080 PCI: 00:12.0: enabled 1
1551 05:31:23.765160 PCI: 00:12.5: enabled 0
1552 05:31:23.768811 PCI: 00:12.6: enabled 0
1553 05:31:23.769338 PCI: 00:14.0: enabled 1
1554 05:31:23.772528 PCI: 00:14.1: enabled 0
1555 05:31:23.775879 PCI: 00:14.3: enabled 1
1556 05:31:23.776317 PCI: 00:14.5: enabled 0
1557 05:31:23.779209 PCI: 00:15.0: enabled 1
1558 05:31:23.782625 PCI: 00:15.1: enabled 1
1559 05:31:23.785665 PCI: 00:15.2: enabled 0
1560 05:31:23.786053 PCI: 00:15.3: enabled 0
1561 05:31:23.788788 PCI: 00:16.0: enabled 1
1562 05:31:23.792197 PCI: 00:16.1: enabled 0
1563 05:31:23.795519 PCI: 00:16.2: enabled 0
1564 05:31:23.795908 PCI: 00:16.3: enabled 0
1565 05:31:23.798741 PCI: 00:16.4: enabled 0
1566 05:31:23.801978 PCI: 00:16.5: enabled 0
1567 05:31:23.805387 PCI: 00:17.0: enabled 1
1568 05:31:23.805774 PCI: 00:19.0: enabled 1
1569 05:31:23.808352 PCI: 00:19.1: enabled 0
1570 05:31:23.811936 PCI: 00:19.2: enabled 0
1571 05:31:23.812363 PCI: 00:1a.0: enabled 0
1572 05:31:23.815061 PCI: 00:1c.0: enabled 0
1573 05:31:23.818270 PCI: 00:1c.1: enabled 0
1574 05:31:23.821463 PCI: 00:1c.2: enabled 0
1575 05:31:23.821969 PCI: 00:1c.3: enabled 0
1576 05:31:23.824653 PCI: 00:1c.4: enabled 0
1577 05:31:23.828004 PCI: 00:1c.5: enabled 0
1578 05:31:23.831340 PCI: 00:1c.6: enabled 0
1579 05:31:23.831948 PCI: 00:1c.7: enabled 0
1580 05:31:23.834926 PCI: 00:1d.0: enabled 1
1581 05:31:23.838605 PCI: 00:1d.1: enabled 0
1582 05:31:23.841671 PCI: 00:1d.2: enabled 0
1583 05:31:23.842316 PCI: 00:1d.3: enabled 0
1584 05:31:23.844665 PCI: 00:1d.4: enabled 0
1585 05:31:23.848310 PCI: 00:1d.5: enabled 0
1586 05:31:23.851567 PCI: 00:1e.0: enabled 1
1587 05:31:23.851846 PCI: 00:1e.1: enabled 0
1588 05:31:23.854973 PCI: 00:1e.2: enabled 1
1589 05:31:23.858293 PCI: 00:1e.3: enabled 1
1590 05:31:23.858653 PCI: 00:1f.0: enabled 1
1591 05:31:23.860920 PCI: 00:1f.1: enabled 0
1592 05:31:23.864232 PCI: 00:1f.2: enabled 0
1593 05:31:23.867629 PCI: 00:1f.3: enabled 1
1594 05:31:23.867907 PCI: 00:1f.4: enabled 1
1595 05:31:23.870846 PCI: 00:1f.5: enabled 1
1596 05:31:23.874108 PCI: 00:1f.6: enabled 0
1597 05:31:23.877893 USB0 port 0: enabled 1
1598 05:31:23.878270 I2C: 01:15: enabled 1
1599 05:31:23.881069 I2C: 02:5d: enabled 1
1600 05:31:23.884195 GENERIC: 0.0: enabled 1
1601 05:31:23.884527 I2C: 03:1a: enabled 1
1602 05:31:23.887703 I2C: 03:38: enabled 1
1603 05:31:23.891020 I2C: 03:39: enabled 1
1604 05:31:23.891294 I2C: 03:3a: enabled 1
1605 05:31:23.894614 I2C: 03:3b: enabled 1
1606 05:31:23.897387 PCI: 00:00.0: enabled 1
1607 05:31:23.897665 SPI: 00: enabled 1
1608 05:31:23.900745 SPI: 01: enabled 1
1609 05:31:23.904109 PNP: 0c09.0: enabled 1
1610 05:31:23.904415 USB2 port 0: enabled 1
1611 05:31:23.907573 USB2 port 1: enabled 1
1612 05:31:23.911001 USB2 port 2: enabled 0
1613 05:31:23.914428 USB2 port 3: enabled 0
1614 05:31:23.914704 USB2 port 5: enabled 0
1615 05:31:23.917169 USB2 port 6: enabled 1
1616 05:31:23.920972 USB2 port 9: enabled 1
1617 05:31:23.921252 USB3 port 0: enabled 1
1618 05:31:23.923778 USB3 port 1: enabled 1
1619 05:31:23.927417 USB3 port 2: enabled 1
1620 05:31:23.927748 USB3 port 3: enabled 1
1621 05:31:23.930887 USB3 port 4: enabled 0
1622 05:31:23.934366 APIC: 03: enabled 1
1623 05:31:23.934642 APIC: 04: enabled 1
1624 05:31:23.937601 APIC: 01: enabled 1
1625 05:31:23.940577 APIC: 02: enabled 1
1626 05:31:23.940880 APIC: 05: enabled 1
1627 05:31:23.943870 APIC: 07: enabled 1
1628 05:31:23.944146 APIC: 06: enabled 1
1629 05:31:23.946846 PCI: 00:08.0: enabled 1
1630 05:31:23.950508 PCI: 00:14.2: enabled 1
1631 05:31:23.954039 PCI: 01:00.0: enabled 1
1632 05:31:23.957196 Disabling ACPI via APMC:
1633 05:31:23.957487 done.
1634 05:31:23.963766 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 05:31:23.967189 ELOG: NV offset 0xaf0000 size 0x4000
1636 05:31:23.973968 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 05:31:23.980596 ELOG: Event(17) added with size 13 at 2024-02-19 05:30:44 UTC
1638 05:31:23.987392 ELOG: Event(92) added with size 9 at 2024-02-19 05:30:44 UTC
1639 05:31:23.994444 ELOG: Event(93) added with size 9 at 2024-02-19 05:30:45 UTC
1640 05:31:24.000619 ELOG: Event(9A) added with size 9 at 2024-02-19 05:30:45 UTC
1641 05:31:24.007027 ELOG: Event(9E) added with size 10 at 2024-02-19 05:30:45 UTC
1642 05:31:24.013726 ELOG: Event(9F) added with size 14 at 2024-02-19 05:30:45 UTC
1643 05:31:24.016944 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 05:31:24.024910 ELOG: Event(A1) added with size 10 at 2024-02-19 05:30:45 UTC
1645 05:31:24.034780 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 05:31:24.041262 ELOG: Event(A0) added with size 9 at 2024-02-19 05:30:45 UTC
1647 05:31:24.044759 elog_add_boot_reason: Logged dev mode boot
1648 05:31:24.045113 Finalize devices...
1649 05:31:24.048158 PCI: 00:17.0 final
1650 05:31:24.051406 Devices finalized
1651 05:31:24.054551 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 05:31:24.061227 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 05:31:24.064497 ME: HFSTS1 : 0x90000245
1654 05:31:24.067874 ME: HFSTS2 : 0x3B850126
1655 05:31:24.074735 ME: HFSTS3 : 0x00000020
1656 05:31:24.077817 ME: HFSTS4 : 0x00004800
1657 05:31:24.081288 ME: HFSTS5 : 0x00000000
1658 05:31:24.084647 ME: HFSTS6 : 0x40400006
1659 05:31:24.087618 ME: Manufacturing Mode : NO
1660 05:31:24.091017 ME: FW Partition Table : OK
1661 05:31:24.094450 ME: Bringup Loader Failure : NO
1662 05:31:24.097741 ME: Firmware Init Complete : YES
1663 05:31:24.101040 ME: Boot Options Present : NO
1664 05:31:24.104087 ME: Update In Progress : NO
1665 05:31:24.107822 ME: D0i3 Support : YES
1666 05:31:24.110972 ME: Low Power State Enabled : NO
1667 05:31:24.114066 ME: CPU Replaced : NO
1668 05:31:24.117198 ME: CPU Replacement Valid : YES
1669 05:31:24.120504 ME: Current Working State : 5
1670 05:31:24.123912 ME: Current Operation State : 1
1671 05:31:24.127041 ME: Current Operation Mode : 0
1672 05:31:24.130430 ME: Error Code : 0
1673 05:31:24.133743 ME: CPU Debug Disabled : YES
1674 05:31:24.137053 ME: TXT Support : NO
1675 05:31:24.144002 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 05:31:24.147504 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 05:31:24.150741 CBFS @ c08000 size 3f8000
1678 05:31:24.157457 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 05:31:24.160482 CBFS: Locating 'fallback/dsdt.aml'
1680 05:31:24.163299 CBFS: Found @ offset 10bb80 size 3fa5
1681 05:31:24.170146 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 05:31:24.173423 CBFS @ c08000 size 3f8000
1683 05:31:24.176827 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 05:31:24.179837 CBFS: Locating 'fallback/slic'
1685 05:31:24.184936 CBFS: 'fallback/slic' not found.
1686 05:31:24.191941 ACPI: Writing ACPI tables at 99b3e000.
1687 05:31:24.192429 ACPI: * FACS
1688 05:31:24.194841 ACPI: * DSDT
1689 05:31:24.198612 Ramoops buffer: 0x100000@0x99a3d000.
1690 05:31:24.201889 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 05:31:24.208648 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 05:31:24.212143 Google Chrome EC: version:
1693 05:31:24.214971 ro: helios_v2.0.2659-56403530b
1694 05:31:24.218208 rw: helios_v2.0.2849-c41de27e7d
1695 05:31:24.218593 running image: 1
1696 05:31:24.222179 ACPI: * FADT
1697 05:31:24.222574 SCI is IRQ9
1698 05:31:24.229024 ACPI: added table 1/32, length now 40
1699 05:31:24.229425 ACPI: * SSDT
1700 05:31:24.232227 Found 1 CPU(s) with 8 core(s) each.
1701 05:31:24.235698 Error: Could not locate 'wifi_sar' in VPD.
1702 05:31:24.242399 Checking CBFS for default SAR values
1703 05:31:24.245634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 05:31:24.248677 CBFS @ c08000 size 3f8000
1705 05:31:24.255297 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 05:31:24.258892 CBFS: Locating 'wifi_sar_defaults.hex'
1707 05:31:24.262036 CBFS: Found @ offset 5fac0 size 77
1708 05:31:24.265441 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 05:31:24.272408 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 05:31:24.275671 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 05:31:24.282113 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 05:31:24.285249 failed to find key in VPD: dsm_calib_r0_0
1713 05:31:24.295091 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 05:31:24.298288 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 05:31:24.301701 failed to find key in VPD: dsm_calib_r0_1
1716 05:31:24.311499 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 05:31:24.318176 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 05:31:24.321581 failed to find key in VPD: dsm_calib_r0_2
1719 05:31:24.331764 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 05:31:24.335128 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 05:31:24.341145 failed to find key in VPD: dsm_calib_r0_3
1722 05:31:24.348017 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 05:31:24.354594 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 05:31:24.358422 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 05:31:24.361130 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 05:31:24.365458 EC returned error result code 1
1727 05:31:24.369172 EC returned error result code 1
1728 05:31:24.372971 EC returned error result code 1
1729 05:31:24.379028 PS2K: Bad resp from EC. Vivaldi disabled!
1730 05:31:24.382761 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 05:31:24.389295 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 05:31:24.395620 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 05:31:24.399512 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 05:31:24.406497 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 05:31:24.412727 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 05:31:24.419235 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 05:31:24.422295 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 05:31:24.428897 ACPI: added table 2/32, length now 44
1739 05:31:24.429332 ACPI: * MCFG
1740 05:31:24.432306 ACPI: added table 3/32, length now 48
1741 05:31:24.435724 ACPI: * TPM2
1742 05:31:24.438858 TPM2 log created at 99a2d000
1743 05:31:24.442241 ACPI: added table 4/32, length now 52
1744 05:31:24.442696 ACPI: * MADT
1745 05:31:24.445531 SCI is IRQ9
1746 05:31:24.448716 ACPI: added table 5/32, length now 56
1747 05:31:24.449176 current = 99b43ac0
1748 05:31:24.452069 ACPI: * DMAR
1749 05:31:24.456044 ACPI: added table 6/32, length now 60
1750 05:31:24.458635 ACPI: * IGD OpRegion
1751 05:31:24.459065 GMA: Found VBT in CBFS
1752 05:31:24.462444 GMA: Found valid VBT in CBFS
1753 05:31:24.465795 ACPI: added table 7/32, length now 64
1754 05:31:24.468909 ACPI: * HPET
1755 05:31:24.472146 ACPI: added table 8/32, length now 68
1756 05:31:24.472656 ACPI: done.
1757 05:31:24.475165 ACPI tables: 31744 bytes.
1758 05:31:24.479270 smbios_write_tables: 99a2c000
1759 05:31:24.482427 EC returned error result code 3
1760 05:31:24.485683 Couldn't obtain OEM name from CBI
1761 05:31:24.489112 Create SMBIOS type 17
1762 05:31:24.492160 PCI: 00:00.0 (Intel Cannonlake)
1763 05:31:24.495893 PCI: 00:14.3 (Intel WiFi)
1764 05:31:24.499188 SMBIOS tables: 939 bytes.
1765 05:31:24.502129 Writing table forward entry at 0x00000500
1766 05:31:24.508800 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 05:31:24.512305 Writing coreboot table at 0x99b62000
1768 05:31:24.519069 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 05:31:24.522378 1. 0000000000001000-000000000009ffff: RAM
1770 05:31:24.525667 2. 00000000000a0000-00000000000fffff: RESERVED
1771 05:31:24.532341 3. 0000000000100000-0000000099a2bfff: RAM
1772 05:31:24.534984 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 05:31:24.541893 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 05:31:24.549128 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 05:31:24.551750 7. 000000009a000000-000000009f7fffff: RESERVED
1776 05:31:24.558267 8. 00000000e0000000-00000000efffffff: RESERVED
1777 05:31:24.561711 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 05:31:24.565207 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 05:31:24.572225 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 05:31:24.575423 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 05:31:24.581938 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 05:31:24.585216 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 05:31:24.588276 15. 0000000100000000-000000045e7fffff: RAM
1784 05:31:24.595250 Graphics framebuffer located at 0xc0000000
1785 05:31:24.598424 Passing 5 GPIOs to payload:
1786 05:31:24.601514 NAME | PORT | POLARITY | VALUE
1787 05:31:24.607848 write protect | undefined | high | low
1788 05:31:24.611397 lid | undefined | high | high
1789 05:31:24.617930 power | undefined | high | low
1790 05:31:24.624567 oprom | undefined | high | low
1791 05:31:24.627784 EC in RW | 0x000000cb | high | low
1792 05:31:24.631081 Board ID: 4
1793 05:31:24.634503 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 05:31:24.637586 CBFS @ c08000 size 3f8000
1795 05:31:24.644275 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 05:31:24.648171 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1797 05:31:24.651379 coreboot table: 1492 bytes.
1798 05:31:24.654032 IMD ROOT 0. 99fff000 00001000
1799 05:31:24.657980 IMD SMALL 1. 99ffe000 00001000
1800 05:31:24.660696 FSP MEMORY 2. 99c4e000 003b0000
1801 05:31:24.664476 CONSOLE 3. 99c2e000 00020000
1802 05:31:24.667780 FMAP 4. 99c2d000 0000054e
1803 05:31:24.670807 TIME STAMP 5. 99c2c000 00000910
1804 05:31:24.674036 VBOOT WORK 6. 99c18000 00014000
1805 05:31:24.677337 MRC DATA 7. 99c16000 00001958
1806 05:31:24.680791 ROMSTG STCK 8. 99c15000 00001000
1807 05:31:24.684308 AFTER CAR 9. 99c0b000 0000a000
1808 05:31:24.687496 RAMSTAGE 10. 99baf000 0005c000
1809 05:31:24.690803 REFCODE 11. 99b7a000 00035000
1810 05:31:24.694417 SMM BACKUP 12. 99b6a000 00010000
1811 05:31:24.697554 COREBOOT 13. 99b62000 00008000
1812 05:31:24.700806 ACPI 14. 99b3e000 00024000
1813 05:31:24.704664 ACPI GNVS 15. 99b3d000 00001000
1814 05:31:24.708133 RAMOOPS 16. 99a3d000 00100000
1815 05:31:24.711159 TPM2 TCGLOG17. 99a2d000 00010000
1816 05:31:24.714414 SMBIOS 18. 99a2c000 00000800
1817 05:31:24.717512 IMD small region:
1818 05:31:24.720827 IMD ROOT 0. 99ffec00 00000400
1819 05:31:24.723886 FSP RUNTIME 1. 99ffebe0 00000004
1820 05:31:24.727697 EC HOSTEVENT 2. 99ffebc0 00000008
1821 05:31:24.730581 POWER STATE 3. 99ffeb80 00000040
1822 05:31:24.734037 ROMSTAGE 4. 99ffeb60 00000004
1823 05:31:24.737239 MEM INFO 5. 99ffe9a0 000001b9
1824 05:31:24.740573 VPD 6. 99ffe920 0000006c
1825 05:31:24.744332 MTRR: Physical address space:
1826 05:31:24.750545 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 05:31:24.757194 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 05:31:24.763650 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 05:31:24.770099 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 05:31:24.776609 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 05:31:24.783316 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 05:31:24.790075 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 05:31:24.793827 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 05:31:24.796572 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 05:31:24.800285 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 05:31:24.806513 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 05:31:24.810368 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 05:31:24.813854 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 05:31:24.816870 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 05:31:24.820158 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 05:31:24.826767 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 05:31:24.830466 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 05:31:24.833824 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 05:31:24.836908 call enable_fixed_mtrr()
1845 05:31:24.839892 CPU physical address size: 39 bits
1846 05:31:24.846872 MTRR: default type WB/UC MTRR counts: 6/8.
1847 05:31:24.849644 MTRR: WB selected as default type.
1848 05:31:24.853155 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 05:31:24.859733 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 05:31:24.866353 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 05:31:24.873014 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 05:31:24.879709 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 05:31:24.886016 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 05:31:24.889394 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 05:31:24.895963 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 05:31:24.899204 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 05:31:24.902348 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 05:31:24.905979 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 05:31:24.912632 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 05:31:24.915502 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 05:31:24.918746 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 05:31:24.922055 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 05:31:24.929228 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 05:31:24.932474 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 05:31:24.932777
1866 05:31:24.933012 MTRR check
1867 05:31:24.935729 call enable_fixed_mtrr()
1868 05:31:24.939148 Fixed MTRRs : Enabled
1869 05:31:24.942511 Variable MTRRs: Enabled
1870 05:31:24.942812
1871 05:31:24.945822 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 05:31:24.948549 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 05:31:24.951767 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 05:31:24.958621 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 05:31:24.961836 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 05:31:24.965106 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 05:31:24.968351 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 05:31:24.975393 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 05:31:24.978663 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 05:31:24.981679 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 05:31:24.985270 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 05:31:24.991517 MTRR: Fixed MSR 0x250 0x0606060606060606
1883 05:31:24.991913 call enable_fixed_mtrr()
1884 05:31:24.998026 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 05:31:25.001818 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 05:31:25.005065 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 05:31:25.008554 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 05:31:25.011884 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 05:31:25.018193 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 05:31:25.021482 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 05:31:25.025003 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 05:31:25.028235 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 05:31:25.034606 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 05:31:25.037963 CPU physical address size: 39 bits
1895 05:31:25.041635 call enable_fixed_mtrr()
1896 05:31:25.044815 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 05:31:25.048167 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 05:31:25.051429 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 05:31:25.058001 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 05:31:25.061329 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 05:31:25.064447 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 05:31:25.068183 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 05:31:25.074791 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 05:31:25.077917 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 05:31:25.080862 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 05:31:25.084544 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 05:31:25.091238 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 05:31:25.091540 call enable_fixed_mtrr()
1909 05:31:25.097694 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 05:31:25.100824 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 05:31:25.104600 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 05:31:25.107684 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 05:31:25.114534 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 05:31:25.117513 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 05:31:25.120747 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 05:31:25.124089 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 05:31:25.130374 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 05:31:25.134116 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 05:31:25.137316 CPU physical address size: 39 bits
1920 05:31:25.140715 call enable_fixed_mtrr()
1921 05:31:25.144146 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1922 05:31:25.147549 CPU physical address size: 39 bits
1923 05:31:25.153509 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1924 05:31:25.156781 CPU physical address size: 39 bits
1925 05:31:25.160696 CBFS @ c08000 size 3f8000
1926 05:31:25.167409 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1927 05:31:25.170748 CBFS: Locating 'fallback/payload'
1928 05:31:25.173890 CPU physical address size: 39 bits
1929 05:31:25.177045 CBFS: Found @ offset 1c96c0 size 3f798
1930 05:31:25.180060 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 05:31:25.183534 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 05:31:25.189878 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 05:31:25.193572 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 05:31:25.196766 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 05:31:25.199950 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 05:31:25.206640 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 05:31:25.210742 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 05:31:25.213992 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 05:31:25.216886 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 05:31:25.223526 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 05:31:25.226838 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 05:31:25.230294 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 05:31:25.233223 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 05:31:25.240196 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 05:31:25.243256 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 05:31:25.246541 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 05:31:25.250129 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 05:31:25.256407 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 05:31:25.259748 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 05:31:25.263125 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 05:31:25.266862 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 05:31:25.269914 call enable_fixed_mtrr()
1953 05:31:25.273163 call enable_fixed_mtrr()
1954 05:31:25.276381 CPU physical address size: 39 bits
1955 05:31:25.279488 CPU physical address size: 39 bits
1956 05:31:25.282828 Checking segment from ROM address 0xffdd16f8
1957 05:31:25.290193 Checking segment from ROM address 0xffdd1714
1958 05:31:25.292998 Loading segment from ROM address 0xffdd16f8
1959 05:31:25.296589 code (compression=0)
1960 05:31:25.303526 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 05:31:25.313335 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 05:31:25.316394 it's not compressed!
1963 05:31:25.406877 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 05:31:25.413850 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 05:31:25.416918 Loading segment from ROM address 0xffdd1714
1966 05:31:25.420617 Entry Point 0x30000000
1967 05:31:25.423716 Loaded segments
1968 05:31:25.429030 Finalizing chipset.
1969 05:31:25.432826 Finalizing SMM.
1970 05:31:25.436205 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1971 05:31:25.439576 mp_park_aps done after 0 msecs.
1972 05:31:25.445893 Jumping to boot code at 30000000(99b62000)
1973 05:31:25.452278 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 05:31:25.452922
1975 05:31:25.453292
1976 05:31:25.453772
1977 05:31:25.455866 Starting depthcharge on Helios...
1978 05:31:25.456349
1979 05:31:25.457521 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 05:31:25.458073 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 05:31:25.458535 Setting prompt string to ['hatch:']
1982 05:31:25.459047 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 05:31:25.465933 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 05:31:25.466468
1985 05:31:25.472545 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 05:31:25.472990
1987 05:31:25.479173 board_setup: Info: eMMC controller not present; skipping
1988 05:31:25.479633
1989 05:31:25.483044 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 05:31:25.483595
1991 05:31:25.489026 board_setup: Info: SDHCI controller not present; skipping
1992 05:31:25.489595
1993 05:31:25.491820 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 05:31:25.495381
1995 05:31:25.495822 Wipe memory regions:
1996 05:31:25.496309
1997 05:31:25.498473 [0x00000000001000, 0x000000000a0000)
1998 05:31:25.498918
1999 05:31:25.501925 [0x00000000100000, 0x00000030000000)
2000 05:31:25.568163
2001 05:31:25.571621 [0x00000030657430, 0x00000099a2c000)
2002 05:31:25.718183
2003 05:31:25.721370 [0x00000100000000, 0x0000045e800000)
2004 05:31:27.177646
2005 05:31:27.178139 R8152: Initializing
2006 05:31:27.178482
2007 05:31:27.180656 Version 9 (ocp_data = 6010)
2008 05:31:27.185233
2009 05:31:27.185712 R8152: Done initializing
2010 05:31:27.186154
2011 05:31:27.188563 Adding net device
2012 05:31:27.670923
2013 05:31:27.671595 R8152: Initializing
2014 05:31:27.672154
2015 05:31:27.674002 Version 6 (ocp_data = 5c30)
2016 05:31:27.674560
2017 05:31:27.677557 R8152: Done initializing
2018 05:31:27.678093
2019 05:31:27.681109 net_add_device: Attemp to include the same device
2020 05:31:27.684438
2021 05:31:27.691444 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 05:31:27.691847
2023 05:31:27.692172
2024 05:31:27.692564
2025 05:31:27.693366 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 05:31:27.794411 hatch: tftpboot 192.168.201.1 12799724/tftp-deploy-_1ic2q_x/kernel/bzImage 12799724/tftp-deploy-_1ic2q_x/kernel/cmdline 12799724/tftp-deploy-_1ic2q_x/ramdisk/ramdisk.cpio.gz
2028 05:31:27.795029 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 05:31:27.795433 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 05:31:27.800330 tftpboot 192.168.201.1 12799724/tftp-deploy-_1ic2q_x/kernel/bzImploy-_1ic2q_x/kernel/cmdline 12799724/tftp-deploy-_1ic2q_x/ramdisk/ramdisk.cpio.gz
2031 05:31:27.800765
2032 05:31:27.801099 Waiting for link
2033 05:31:28.001073
2034 05:31:28.001575 done.
2035 05:31:28.002021
2036 05:31:28.002491 MAC: 00:24:32:50:1a:59
2037 05:31:28.002901
2038 05:31:28.004280 Sending DHCP discover... done.
2039 05:31:28.004730
2040 05:31:28.007610 Waiting for reply... done.
2041 05:31:28.008082
2042 05:31:28.011277 Sending DHCP request... done.
2043 05:31:28.011796
2044 05:31:28.017893 Waiting for reply... done.
2045 05:31:28.018288
2046 05:31:28.018599 My ip is 192.168.201.14
2047 05:31:28.018887
2048 05:31:28.021195 The DHCP server ip is 192.168.201.1
2049 05:31:28.021588
2050 05:31:28.027840 TFTP server IP predefined by user: 192.168.201.1
2051 05:31:28.028236
2052 05:31:28.034327 Bootfile predefined by user: 12799724/tftp-deploy-_1ic2q_x/kernel/bzImage
2053 05:31:28.034772
2054 05:31:28.037387 Sending tftp read request... done.
2055 05:31:28.037780
2056 05:31:28.045781 Waiting for the transfer...
2057 05:31:28.046181
2058 05:31:28.725823 00000000 ################################################################
2059 05:31:28.726291
2060 05:31:29.315919 00080000 ################################################################
2061 05:31:29.316067
2062 05:31:29.898992 00100000 ################################################################
2063 05:31:29.899147
2064 05:31:30.528466 00180000 ################################################################
2065 05:31:30.528615
2066 05:31:31.077754 00200000 ################################################################
2067 05:31:31.077911
2068 05:31:31.622209 00280000 ################################################################
2069 05:31:31.622350
2070 05:31:32.170456 00300000 ################################################################
2071 05:31:32.170635
2072 05:31:32.718572 00380000 ################################################################
2073 05:31:32.718748
2074 05:31:33.250495 00400000 ################################################################
2075 05:31:33.250647
2076 05:31:33.775556 00480000 ################################################################
2077 05:31:33.775747
2078 05:31:34.300976 00500000 ################################################################
2079 05:31:34.301139
2080 05:31:34.835891 00580000 ################################################################
2081 05:31:34.836059
2082 05:31:35.354073 00600000 ################################################################
2083 05:31:35.354224
2084 05:31:35.873401 00680000 ################################################################
2085 05:31:35.873552
2086 05:31:36.388715 00700000 ################################################################
2087 05:31:36.388864
2088 05:31:36.905270 00780000 ################################################################
2089 05:31:36.905424
2090 05:31:37.417884 00800000 ################################################################
2091 05:31:37.418033
2092 05:31:37.925538 00880000 ################################################################
2093 05:31:37.925695
2094 05:31:38.432920 00900000 ################################################################
2095 05:31:38.433070
2096 05:31:38.939060 00980000 ################################################################
2097 05:31:38.939225
2098 05:31:39.445984 00a00000 ################################################################
2099 05:31:39.446136
2100 05:31:39.955605 00a80000 ################################################################
2101 05:31:39.955746
2102 05:31:40.002279 00b00000 ###### done.
2103 05:31:40.002445
2104 05:31:40.005508 The bootfile was 11579392 bytes long.
2105 05:31:40.005603
2106 05:31:40.008840 Sending tftp read request... done.
2107 05:31:40.008930
2108 05:31:40.011518 Waiting for the transfer...
2109 05:31:40.011606
2110 05:31:40.541954 00000000 ################################################################
2111 05:31:40.542109
2112 05:31:41.056157 00080000 ################################################################
2113 05:31:41.056329
2114 05:31:41.572202 00100000 ################################################################
2115 05:31:41.572361
2116 05:31:42.082841 00180000 ################################################################
2117 05:31:42.082990
2118 05:31:42.591069 00200000 ################################################################
2119 05:31:42.591221
2120 05:31:43.100863 00280000 ################################################################
2121 05:31:43.101006
2122 05:31:43.619081 00300000 ################################################################
2123 05:31:43.619234
2124 05:31:44.141493 00380000 ################################################################
2125 05:31:44.141643
2126 05:31:44.662043 00400000 ################################################################
2127 05:31:44.662187
2128 05:31:45.180773 00480000 ################################################################
2129 05:31:45.180947
2130 05:31:45.702747 00500000 ################################################################
2131 05:31:45.702930
2132 05:31:46.220453 00580000 ################################################################
2133 05:31:46.220601
2134 05:31:46.740675 00600000 ################################################################
2135 05:31:46.740826
2136 05:31:47.267358 00680000 ################################################################
2137 05:31:47.267505
2138 05:31:47.808917 00700000 ################################################################
2139 05:31:47.809062
2140 05:31:48.364940 00780000 ################################################################
2141 05:31:48.365098
2142 05:31:48.890173 00800000 ################################################################
2143 05:31:48.890322
2144 05:31:49.222751 00880000 ###################################### done.
2145 05:31:49.222905
2146 05:31:49.226168 Sending tftp read request... done.
2147 05:31:49.226295
2148 05:31:49.229524 Waiting for the transfer...
2149 05:31:49.229617
2150 05:31:49.229690 00000000 # done.
2151 05:31:49.229760
2152 05:31:49.239146 Command line loaded dynamically from TFTP file: 12799724/tftp-deploy-_1ic2q_x/kernel/cmdline
2153 05:31:49.239241
2154 05:31:49.259139 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2155 05:31:49.259239
2156 05:31:49.262360 ec_init(0): CrosEC protocol v3 supported (256, 256)
2157 05:31:49.270262
2158 05:31:49.273139 Shutting down all USB controllers.
2159 05:31:49.273232
2160 05:31:49.273305 Removing current net device
2161 05:31:49.277200
2162 05:31:49.277294 Finalizing coreboot
2163 05:31:49.277367
2164 05:31:49.283732 Exiting depthcharge with code 4 at timestamp: 31188989
2165 05:31:49.283826
2166 05:31:49.283899
2167 05:31:49.283967 Starting kernel ...
2168 05:31:49.284032
2169 05:31:49.284095
2170 05:31:49.284498 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2171 05:31:49.284603 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2172 05:31:49.284690 Setting prompt string to ['Linux version [0-9]']
2173 05:31:49.284765 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 05:31:49.284840 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2176 05:36:07.285696 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2178 05:36:07.286755 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2180 05:36:07.287598 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2183 05:36:07.289601 end: 2 depthcharge-action (duration 00:05:00) [common]
2185 05:36:07.290703 Cleaning after the job
2186 05:36:07.291162 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12799724/tftp-deploy-_1ic2q_x/ramdisk
2187 05:36:07.298722 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12799724/tftp-deploy-_1ic2q_x/kernel
2188 05:36:07.307900 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12799724/tftp-deploy-_1ic2q_x/modules
2189 05:36:07.311948 start: 5.1 power-off (timeout 00:00:30) [common]
2190 05:36:07.312816 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2191 05:36:07.417578 >> Command sent successfully.
2192 05:36:07.422324 Returned 0 in 0 seconds
2193 05:36:07.523369 end: 5.1 power-off (duration 00:00:00) [common]
2195 05:36:07.525231 start: 5.2 read-feedback (timeout 00:10:00) [common]
2196 05:36:07.526600 Listened to connection for namespace 'common' for up to 1s
2198 05:36:07.527925 Listened to connection for namespace 'common' for up to 1s
2199 05:36:08.527395 Finalising connection for namespace 'common'
2200 05:36:08.528059 Disconnecting from shell: Finalise
2201 05:36:08.528492
2202 05:36:08.629476 end: 5.2 read-feedback (duration 00:00:01) [common]
2203 05:36:08.630041 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12799724
2204 05:36:08.684851 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12799724
2205 05:36:08.685070 JobError: Your job cannot terminate cleanly.