Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 05:30:13.975100 lava-dispatcher, installed at version: 2024.01
2 05:30:13.975349 start: 0 validate
3 05:30:13.975501 Start time: 2024-02-19 05:30:13.975493+00:00 (UTC)
4 05:30:13.975691 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:30:13.975901 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 05:30:13.979080 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:30:13.979223 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.306-cip107%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:30:22.978953 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:30:22.979599 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.306-cip107%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 05:30:23.984782 validate duration: 10.01
12 05:30:23.985092 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 05:30:23.985214 start: 1.1 download-retry (timeout 00:10:00) [common]
14 05:30:23.985331 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 05:30:23.985473 Not decompressing ramdisk as can be used compressed.
16 05:30:23.985607 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 05:30:23.985712 saving as /var/lib/lava/dispatcher/tmp/12799741/tftp-deploy-xuuj5cil/ramdisk/rootfs.cpio.gz
18 05:30:23.985818 total size: 8418130 (8 MB)
19 05:30:23.987119 progress 0 % (0 MB)
20 05:30:23.989757 progress 5 % (0 MB)
21 05:30:23.992322 progress 10 % (0 MB)
22 05:30:23.994970 progress 15 % (1 MB)
23 05:30:23.997688 progress 20 % (1 MB)
24 05:30:24.000298 progress 25 % (2 MB)
25 05:30:24.002895 progress 30 % (2 MB)
26 05:30:24.005276 progress 35 % (2 MB)
27 05:30:24.007943 progress 40 % (3 MB)
28 05:30:24.010642 progress 45 % (3 MB)
29 05:30:24.013282 progress 50 % (4 MB)
30 05:30:24.015865 progress 55 % (4 MB)
31 05:30:24.018462 progress 60 % (4 MB)
32 05:30:24.020833 progress 65 % (5 MB)
33 05:30:24.023342 progress 70 % (5 MB)
34 05:30:24.026043 progress 75 % (6 MB)
35 05:30:24.028631 progress 80 % (6 MB)
36 05:30:24.031139 progress 85 % (6 MB)
37 05:30:24.033748 progress 90 % (7 MB)
38 05:30:24.036406 progress 95 % (7 MB)
39 05:30:24.038824 progress 100 % (8 MB)
40 05:30:24.039089 8 MB downloaded in 0.05 s (150.70 MB/s)
41 05:30:24.039290 end: 1.1.1 http-download (duration 00:00:00) [common]
43 05:30:24.039585 end: 1.1 download-retry (duration 00:00:00) [common]
44 05:30:24.039688 start: 1.2 download-retry (timeout 00:10:00) [common]
45 05:30:24.039790 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 05:30:24.039941 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.306-cip107/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 05:30:24.040027 saving as /var/lib/lava/dispatcher/tmp/12799741/tftp-deploy-xuuj5cil/kernel/bzImage
48 05:30:24.040100 total size: 11579392 (11 MB)
49 05:30:24.040173 No compression specified
50 05:30:24.041538 progress 0 % (0 MB)
51 05:30:24.045161 progress 5 % (0 MB)
52 05:30:24.048847 progress 10 % (1 MB)
53 05:30:24.052569 progress 15 % (1 MB)
54 05:30:24.056112 progress 20 % (2 MB)
55 05:30:24.059823 progress 25 % (2 MB)
56 05:30:24.063385 progress 30 % (3 MB)
57 05:30:24.066839 progress 35 % (3 MB)
58 05:30:24.070490 progress 40 % (4 MB)
59 05:30:24.074171 progress 45 % (5 MB)
60 05:30:24.077574 progress 50 % (5 MB)
61 05:30:24.081171 progress 55 % (6 MB)
62 05:30:24.084792 progress 60 % (6 MB)
63 05:30:24.088233 progress 65 % (7 MB)
64 05:30:24.091703 progress 70 % (7 MB)
65 05:30:24.095180 progress 75 % (8 MB)
66 05:30:24.098452 progress 80 % (8 MB)
67 05:30:24.101914 progress 85 % (9 MB)
68 05:30:24.105376 progress 90 % (9 MB)
69 05:30:24.108651 progress 95 % (10 MB)
70 05:30:24.112305 progress 100 % (11 MB)
71 05:30:24.112494 11 MB downloaded in 0.07 s (152.55 MB/s)
72 05:30:24.112705 end: 1.2.1 http-download (duration 00:00:00) [common]
74 05:30:24.112967 end: 1.2 download-retry (duration 00:00:00) [common]
75 05:30:24.113068 start: 1.3 download-retry (timeout 00:10:00) [common]
76 05:30:24.113174 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 05:30:24.113325 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.306-cip107/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 05:30:24.113408 saving as /var/lib/lava/dispatcher/tmp/12799741/tftp-deploy-xuuj5cil/modules/modules.tar
79 05:30:24.113479 total size: 484720 (0 MB)
80 05:30:24.113552 Using unxz to decompress xz
81 05:30:24.118117 progress 6 % (0 MB)
82 05:30:24.118618 progress 13 % (0 MB)
83 05:30:24.118898 progress 20 % (0 MB)
84 05:30:24.120672 progress 27 % (0 MB)
85 05:30:24.122947 progress 33 % (0 MB)
86 05:30:24.125258 progress 40 % (0 MB)
87 05:30:24.127335 progress 47 % (0 MB)
88 05:30:24.129730 progress 54 % (0 MB)
89 05:30:24.131906 progress 60 % (0 MB)
90 05:30:24.134103 progress 67 % (0 MB)
91 05:30:24.136433 progress 74 % (0 MB)
92 05:30:24.138742 progress 81 % (0 MB)
93 05:30:24.141023 progress 87 % (0 MB)
94 05:30:24.143105 progress 94 % (0 MB)
95 05:30:24.145765 progress 100 % (0 MB)
96 05:30:24.153463 0 MB downloaded in 0.04 s (11.56 MB/s)
97 05:30:24.153770 end: 1.3.1 http-download (duration 00:00:00) [common]
99 05:30:24.154108 end: 1.3 download-retry (duration 00:00:00) [common]
100 05:30:24.154219 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 05:30:24.154332 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 05:30:24.154425 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 05:30:24.154524 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 05:30:24.154776 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b
105 05:30:24.154972 makedir: /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin
106 05:30:24.155126 makedir: /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/tests
107 05:30:24.155274 makedir: /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/results
108 05:30:24.155438 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-add-keys
109 05:30:24.155655 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-add-sources
110 05:30:24.155843 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-background-process-start
111 05:30:24.156021 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-background-process-stop
112 05:30:24.156239 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-common-functions
113 05:30:24.156426 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-echo-ipv4
114 05:30:24.156612 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-install-packages
115 05:30:24.156778 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-installed-packages
116 05:30:24.156926 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-os-build
117 05:30:24.157073 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-probe-channel
118 05:30:24.157226 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-probe-ip
119 05:30:24.157371 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-target-ip
120 05:30:24.157517 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-target-mac
121 05:30:24.157662 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-target-storage
122 05:30:24.157819 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-test-case
123 05:30:24.157967 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-test-event
124 05:30:24.158131 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-test-feedback
125 05:30:24.158286 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-test-raise
126 05:30:24.158434 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-test-reference
127 05:30:24.158579 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-test-runner
128 05:30:24.158723 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-test-set
129 05:30:24.158869 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-test-shell
130 05:30:24.159069 Updating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-install-packages (oe)
131 05:30:24.159293 Updating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/bin/lava-installed-packages (oe)
132 05:30:24.159482 Creating /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/environment
133 05:30:24.159639 LAVA metadata
134 05:30:24.159760 - LAVA_JOB_ID=12799741
135 05:30:24.159867 - LAVA_DISPATCHER_IP=192.168.201.1
136 05:30:24.160027 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 05:30:24.160137 skipped lava-vland-overlay
138 05:30:24.160263 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 05:30:24.160391 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 05:30:24.160495 skipped lava-multinode-overlay
141 05:30:24.160613 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 05:30:24.160737 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 05:30:24.160829 Loading test definitions
144 05:30:24.160939 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 05:30:24.161027 Using /lava-12799741 at stage 0
146 05:30:24.161392 uuid=12799741_1.4.2.3.1 testdef=None
147 05:30:24.161495 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 05:30:24.161593 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 05:30:24.162325 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 05:30:24.162739 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 05:30:24.163817 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 05:30:24.164230 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 05:30:24.165084 runner path: /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/0/tests/0_dmesg test_uuid 12799741_1.4.2.3.1
156 05:30:24.165268 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 05:30:24.165541 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 05:30:24.165645 Using /lava-12799741 at stage 1
160 05:30:24.166024 uuid=12799741_1.4.2.3.5 testdef=None
161 05:30:24.166126 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 05:30:24.166223 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 05:30:24.166770 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 05:30:24.167026 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 05:30:24.167762 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 05:30:24.168029 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 05:30:24.168928 runner path: /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/1/tests/1_bootrr test_uuid 12799741_1.4.2.3.5
170 05:30:24.169148 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 05:30:24.169533 Creating lava-test-runner.conf files
173 05:30:24.169638 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/0 for stage 0
174 05:30:24.169776 - 0_dmesg
175 05:30:24.169901 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12799741/lava-overlay-aais0s7b/lava-12799741/1 for stage 1
176 05:30:24.170038 - 1_bootrr
177 05:30:24.170187 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 05:30:24.170317 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 05:30:24.180360 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 05:30:24.180529 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 05:30:24.180676 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 05:30:24.180779 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 05:30:24.180879 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 05:30:24.465873 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 05:30:24.466386 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 05:30:24.466561 extracting modules file /var/lib/lava/dispatcher/tmp/12799741/tftp-deploy-xuuj5cil/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12799741/extract-overlay-ramdisk-13n2y4du/ramdisk
187 05:30:24.500026 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 05:30:24.500247 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 05:30:24.500398 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12799741/compress-overlay-8mo188wr/overlay-1.4.2.4.tar.gz to ramdisk
190 05:30:24.500519 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12799741/compress-overlay-8mo188wr/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12799741/extract-overlay-ramdisk-13n2y4du/ramdisk
191 05:30:24.514755 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 05:30:24.514945 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 05:30:24.515099 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 05:30:24.515249 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 05:30:24.515386 Building ramdisk /var/lib/lava/dispatcher/tmp/12799741/extract-overlay-ramdisk-13n2y4du/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12799741/extract-overlay-ramdisk-13n2y4du/ramdisk
196 05:30:24.676953 >> 53982 blocks
197 05:30:25.672938 rename /var/lib/lava/dispatcher/tmp/12799741/extract-overlay-ramdisk-13n2y4du/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12799741/tftp-deploy-xuuj5cil/ramdisk/ramdisk.cpio.gz
198 05:30:25.673456 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 05:30:25.673599 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 05:30:25.673726 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 05:30:25.673835 No mkimage arch provided, not using FIT.
202 05:30:25.673935 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 05:30:25.674027 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 05:30:25.674134 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 05:30:25.674232 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 05:30:25.674342 No LXC device requested
207 05:30:25.674432 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 05:30:25.674528 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 05:30:25.674620 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 05:30:25.674702 Checking files for TFTP limit of 4294967296 bytes.
211 05:30:25.675263 end: 1 tftp-deploy (duration 00:00:02) [common]
212 05:30:25.675397 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 05:30:25.675507 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 05:30:25.675651 substitutions:
215 05:30:25.675728 - {DTB}: None
216 05:30:25.675801 - {INITRD}: 12799741/tftp-deploy-xuuj5cil/ramdisk/ramdisk.cpio.gz
217 05:30:25.675869 - {KERNEL}: 12799741/tftp-deploy-xuuj5cil/kernel/bzImage
218 05:30:25.675946 - {LAVA_MAC}: None
219 05:30:25.676018 - {PRESEED_CONFIG}: None
220 05:30:25.676082 - {PRESEED_LOCAL}: None
221 05:30:25.676147 - {RAMDISK}: 12799741/tftp-deploy-xuuj5cil/ramdisk/ramdisk.cpio.gz
222 05:30:25.676210 - {ROOT_PART}: None
223 05:30:25.676273 - {ROOT}: None
224 05:30:25.676334 - {SERVER_IP}: 192.168.201.1
225 05:30:25.676395 - {TEE}: None
226 05:30:25.676456 Parsed boot commands:
227 05:30:25.676542 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 05:30:25.676785 Parsed boot commands: tftpboot 192.168.201.1 12799741/tftp-deploy-xuuj5cil/kernel/bzImage 12799741/tftp-deploy-xuuj5cil/kernel/cmdline 12799741/tftp-deploy-xuuj5cil/ramdisk/ramdisk.cpio.gz
229 05:30:25.676887 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 05:30:25.676982 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 05:30:25.677097 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 05:30:25.677199 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 05:30:25.677279 Not connected, no need to disconnect.
234 05:30:25.677362 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 05:30:25.677452 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 05:30:25.677533 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-11'
237 05:30:25.681854 Setting prompt string to ['lava-test: # ']
238 05:30:25.682260 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 05:30:25.682407 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 05:30:25.682515 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 05:30:25.682621 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 05:30:25.682856 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
243 05:30:30.818868 >> Command sent successfully.
244 05:30:30.821772 Returned 0 in 5 seconds
245 05:30:30.922192 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 05:30:30.922565 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 05:30:30.922678 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 05:30:30.922779 Setting prompt string to 'Starting depthcharge on Voema...'
250 05:30:30.922859 Changing prompt to 'Starting depthcharge on Voema...'
251 05:30:30.922963 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 05:30:30.923329 [Enter `^Ec?' for help]
253 05:30:32.485634
254 05:30:32.485789
255 05:30:32.495439 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 05:30:32.498867 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 05:30:32.505303 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 05:30:32.508881 CPU: AES supported, TXT NOT supported, VT supported
259 05:30:32.515524 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 05:30:32.519193 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 05:30:32.526155 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 05:30:32.529604 VBOOT: Loading verstage.
263 05:30:32.532820 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 05:30:32.539379 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 05:30:32.542853 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 05:30:32.549347 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 05:30:32.559608 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 05:30:32.559707
269 05:30:32.559806
270 05:30:32.569880 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 05:30:32.585609 Probing TPM: . done!
272 05:30:32.589541 TPM ready after 0 ms
273 05:30:32.592966 Connected to device vid:did:rid of 1ae0:0028:00
274 05:30:32.603947 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
275 05:30:32.610618 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 05:30:32.613917 Initialized TPM device CR50 revision 0
277 05:30:32.668766 tlcl_send_startup: Startup return code is 0
278 05:30:32.668875 TPM: setup succeeded
279 05:30:32.684734 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 05:30:32.698683 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 05:30:32.711236 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 05:30:32.721694 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 05:30:32.725031 Chrome EC: UHEPI supported
284 05:30:32.728507 Phase 1
285 05:30:32.731868 FMAP: area GBB found @ 1805000 (458752 bytes)
286 05:30:32.741708 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 05:30:32.748319 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 05:30:32.754700 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 05:30:32.761690 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 05:30:32.764686 Recovery requested (1009000e)
291 05:30:32.768143 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 05:30:32.779881 tlcl_extend: response is 0
293 05:30:32.786706 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 05:30:32.796205 tlcl_extend: response is 0
295 05:30:32.802883 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 05:30:32.809482 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 05:30:32.816074 BS: verstage times (exec / console): total (unknown) / 142 ms
298 05:30:32.816172
299 05:30:32.816270
300 05:30:32.829836 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 05:30:32.836341 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 05:30:32.839217 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 05:30:32.842588 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 05:30:32.849160 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 05:30:32.852518 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 05:30:32.855878 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 05:30:32.859598 TCO_STS: 0000 0000
308 05:30:32.862476 GEN_PMCON: d0015038 00002200
309 05:30:32.865799 GBLRST_CAUSE: 00000000 00000000
310 05:30:32.865898 HPR_CAUSE0: 00000000
311 05:30:32.869255 prev_sleep_state 5
312 05:30:32.872865 Boot Count incremented to 24745
313 05:30:32.879032 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 05:30:32.885732 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 05:30:32.892248 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 05:30:32.898913 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 05:30:32.903924 Chrome EC: UHEPI supported
318 05:30:32.910406 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 05:30:32.923170 Probing TPM: done!
320 05:30:32.929649 Connected to device vid:did:rid of 1ae0:0028:00
321 05:30:32.939678 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
322 05:30:32.943664 Initialized TPM device CR50 revision 0
323 05:30:32.957860 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 05:30:32.964458 MRC: Hash idx 0x100b comparison successful.
325 05:30:32.968117 MRC cache found, size faa8
326 05:30:32.968220 bootmode is set to: 2
327 05:30:32.971482 SPD index = 2
328 05:30:32.978136 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 05:30:32.981489 SPD: module type is LPDDR4X
330 05:30:32.984776 SPD: module part number is MT53D1G64D4NW-046
331 05:30:32.991534 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 05:30:32.994454 SPD: device width 16 bits, bus width 16 bits
333 05:30:33.000987 SPD: module size is 2048 MB (per channel)
334 05:30:33.429517 CBMEM:
335 05:30:33.432599 IMD: root @ 0x76fff000 254 entries.
336 05:30:33.435979 IMD: root @ 0x76ffec00 62 entries.
337 05:30:33.439167 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 05:30:33.446191 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 05:30:33.449611 External stage cache:
340 05:30:33.452926 IMD: root @ 0x7b3ff000 254 entries.
341 05:30:33.455930 IMD: root @ 0x7b3fec00 62 entries.
342 05:30:33.470857 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 05:30:33.477234 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 05:30:33.484001 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 05:30:33.497472 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 05:30:33.504210 cse_lite: Skip switching to RW in the recovery path
347 05:30:33.504348 8 DIMMs found
348 05:30:33.504459 SMM Memory Map
349 05:30:33.507455 SMRAM : 0x7b000000 0x800000
350 05:30:33.514073 Subregion 0: 0x7b000000 0x200000
351 05:30:33.517528 Subregion 1: 0x7b200000 0x200000
352 05:30:33.521144 Subregion 2: 0x7b400000 0x400000
353 05:30:33.521275 top_of_ram = 0x77000000
354 05:30:33.527431 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 05:30:33.534356 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 05:30:33.537526 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 05:30:33.543943 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 05:30:33.550534 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 05:30:33.557206 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 05:30:33.567382 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 05:30:33.573878 Processing 211 relocs. Offset value of 0x74c0b000
362 05:30:33.580366 BS: romstage times (exec / console): total (unknown) / 277 ms
363 05:30:33.586145
364 05:30:33.586275
365 05:30:33.596921 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 05:30:33.600361 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 05:30:33.607284 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 05:30:33.617013 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 05:30:33.623362 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 05:30:33.630082 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 05:30:33.673091 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 05:30:33.679748 Processing 5008 relocs. Offset value of 0x75d98000
373 05:30:33.683084 BS: postcar times (exec / console): total (unknown) / 59 ms
374 05:30:33.686369
375 05:30:33.686470
376 05:30:33.696143 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 05:30:33.696347 Normal boot
378 05:30:33.699544 FW_CONFIG value is 0x804c02
379 05:30:33.703037 PCI: 00:07.0 disabled by fw_config
380 05:30:33.706160 PCI: 00:07.1 disabled by fw_config
381 05:30:33.709705 PCI: 00:0d.2 disabled by fw_config
382 05:30:33.712821 PCI: 00:1c.7 disabled by fw_config
383 05:30:33.719458 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 05:30:33.726148 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 05:30:33.729547 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 05:30:33.732818 GENERIC: 0.0 disabled by fw_config
387 05:30:33.739619 GENERIC: 1.0 disabled by fw_config
388 05:30:33.742832 fw_config match found: DB_USB=USB3_ACTIVE
389 05:30:33.746309 fw_config match found: DB_USB=USB3_ACTIVE
390 05:30:33.749659 fw_config match found: DB_USB=USB3_ACTIVE
391 05:30:33.756326 fw_config match found: DB_USB=USB3_ACTIVE
392 05:30:33.759277 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 05:30:33.766160 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 05:30:33.776202 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 05:30:33.783109 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 05:30:33.785795 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 05:30:33.792589 microcode: Update skipped, already up-to-date
398 05:30:33.799408 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 05:30:33.826749 Detected 4 core, 8 thread CPU.
400 05:30:33.829788 Setting up SMI for CPU
401 05:30:33.833255 IED base = 0x7b400000
402 05:30:33.833358 IED size = 0x00400000
403 05:30:33.836834 Will perform SMM setup.
404 05:30:33.843504 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 05:30:33.850042 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 05:30:33.856680 Processing 16 relocs. Offset value of 0x00030000
407 05:30:33.859969 Attempting to start 7 APs
408 05:30:33.863155 Waiting for 10ms after sending INIT.
409 05:30:33.878634 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 05:30:33.881843 AP: slot 2 apic_id 5.
411 05:30:33.885116 AP: slot 6 apic_id 4.
412 05:30:33.885224 AP: slot 5 apic_id 6.
413 05:30:33.888542 AP: slot 4 apic_id 7.
414 05:30:33.892129 AP: slot 3 apic_id 3.
415 05:30:33.892233 AP: slot 7 apic_id 2.
416 05:30:33.892333 done.
417 05:30:33.898585 Waiting for 2nd SIPI to complete...done.
418 05:30:33.905320 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 05:30:33.913416 Processing 13 relocs. Offset value of 0x00038000
420 05:30:33.915102 Unable to locate Global NVS
421 05:30:33.921973 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 05:30:33.925213 Installing permanent SMM handler to 0x7b000000
423 05:30:33.935061 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 05:30:33.938598 Processing 794 relocs. Offset value of 0x7b010000
425 05:30:33.948356 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 05:30:33.951805 Processing 13 relocs. Offset value of 0x7b008000
427 05:30:33.958056 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 05:30:33.964590 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 05:30:33.968426 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 05:30:33.974623 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 05:30:33.981446 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 05:30:33.987912 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 05:30:33.994715 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 05:30:33.994854 Unable to locate Global NVS
435 05:30:34.004754 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 05:30:34.008208 Clearing SMI status registers
437 05:30:34.008314 SMI_STS: PM1
438 05:30:34.011547 PM1_STS: PWRBTN
439 05:30:34.017668 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 05:30:34.020991 In relocation handler: CPU 0
441 05:30:34.024433 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 05:30:34.031147 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 05:30:34.031252 Relocation complete.
444 05:30:34.041155 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 05:30:34.041255 In relocation handler: CPU 1
446 05:30:34.047853 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 05:30:34.047950 Relocation complete.
448 05:30:34.054389 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
449 05:30:34.057587 In relocation handler: CPU 2
450 05:30:34.064281 New SMBASE=0x7afff800 IEDBASE=0x7b400000
451 05:30:34.064379 Relocation complete.
452 05:30:34.071455 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
453 05:30:34.074191 In relocation handler: CPU 6
454 05:30:34.081008 New SMBASE=0x7affe800 IEDBASE=0x7b400000
455 05:30:34.084255 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 05:30:34.087932 Relocation complete.
457 05:30:34.094255 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
458 05:30:34.097660 In relocation handler: CPU 5
459 05:30:34.100886 New SMBASE=0x7affec00 IEDBASE=0x7b400000
460 05:30:34.104282 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 05:30:34.107748 Relocation complete.
462 05:30:34.114559 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
463 05:30:34.117907 In relocation handler: CPU 4
464 05:30:34.121127 New SMBASE=0x7afff000 IEDBASE=0x7b400000
465 05:30:34.124547 Relocation complete.
466 05:30:34.130818 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
467 05:30:34.134170 In relocation handler: CPU 3
468 05:30:34.137498 New SMBASE=0x7afff400 IEDBASE=0x7b400000
469 05:30:34.140612 Relocation complete.
470 05:30:34.147457 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
471 05:30:34.150829 In relocation handler: CPU 7
472 05:30:34.154235 New SMBASE=0x7affe400 IEDBASE=0x7b400000
473 05:30:34.160973 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 05:30:34.161071 Relocation complete.
475 05:30:34.164181 Initializing CPU #0
476 05:30:34.167672 CPU: vendor Intel device 806c1
477 05:30:34.171088 CPU: family 06, model 8c, stepping 01
478 05:30:34.174344 Clearing out pending MCEs
479 05:30:34.177697 Setting up local APIC...
480 05:30:34.177794 apic_id: 0x00 done.
481 05:30:34.181117 Turbo is available but hidden
482 05:30:34.184338 Turbo is available and visible
483 05:30:34.190807 microcode: Update skipped, already up-to-date
484 05:30:34.190905 CPU #0 initialized
485 05:30:34.194194 Initializing CPU #1
486 05:30:34.197565 Initializing CPU #7
487 05:30:34.197665 Initializing CPU #6
488 05:30:34.200812 Initializing CPU #2
489 05:30:34.204547 CPU: vendor Intel device 806c1
490 05:30:34.207595 CPU: family 06, model 8c, stepping 01
491 05:30:34.211296 CPU: vendor Intel device 806c1
492 05:30:34.214138 CPU: family 06, model 8c, stepping 01
493 05:30:34.217654 Clearing out pending MCEs
494 05:30:34.221137 Clearing out pending MCEs
495 05:30:34.221241 Initializing CPU #5
496 05:30:34.224357 Initializing CPU #4
497 05:30:34.227741 CPU: vendor Intel device 806c1
498 05:30:34.231114 CPU: family 06, model 8c, stepping 01
499 05:30:34.234109 CPU: vendor Intel device 806c1
500 05:30:34.237365 CPU: family 06, model 8c, stepping 01
501 05:30:34.240725 Clearing out pending MCEs
502 05:30:34.244090 Clearing out pending MCEs
503 05:30:34.244185 Setting up local APIC...
504 05:30:34.247455 CPU: vendor Intel device 806c1
505 05:30:34.250863 CPU: family 06, model 8c, stepping 01
506 05:30:34.254304 Initializing CPU #3
507 05:30:34.257684 Setting up local APIC...
508 05:30:34.261450 CPU: vendor Intel device 806c1
509 05:30:34.265340 CPU: family 06, model 8c, stepping 01
510 05:30:34.265436 Clearing out pending MCEs
511 05:30:34.268149 Clearing out pending MCEs
512 05:30:34.271497 Setting up local APIC...
513 05:30:34.274728 Setting up local APIC...
514 05:30:34.274824 apic_id: 0x05 done.
515 05:30:34.278395 apic_id: 0x04 done.
516 05:30:34.281634 microcode: Update skipped, already up-to-date
517 05:30:34.288446 microcode: Update skipped, already up-to-date
518 05:30:34.288541 CPU #2 initialized
519 05:30:34.291656 CPU #6 initialized
520 05:30:34.294735 Setting up local APIC...
521 05:30:34.298236 CPU: vendor Intel device 806c1
522 05:30:34.301629 CPU: family 06, model 8c, stepping 01
523 05:30:34.301726 Setting up local APIC...
524 05:30:34.305127 apic_id: 0x02 done.
525 05:30:34.308240 apic_id: 0x03 done.
526 05:30:34.311374 microcode: Update skipped, already up-to-date
527 05:30:34.318339 microcode: Update skipped, already up-to-date
528 05:30:34.318438 CPU #7 initialized
529 05:30:34.321968 CPU #3 initialized
530 05:30:34.322064 apic_id: 0x06 done.
531 05:30:34.325409 apic_id: 0x07 done.
532 05:30:34.328009 Clearing out pending MCEs
533 05:30:34.331809 microcode: Update skipped, already up-to-date
534 05:30:34.338250 microcode: Update skipped, already up-to-date
535 05:30:34.338347 CPU #5 initialized
536 05:30:34.341726 CPU #4 initialized
537 05:30:34.341840 Setting up local APIC...
538 05:30:34.345043 apic_id: 0x01 done.
539 05:30:34.351379 microcode: Update skipped, already up-to-date
540 05:30:34.351476 CPU #1 initialized
541 05:30:34.354694 bsp_do_flight_plan done after 454 msecs.
542 05:30:34.357953 CPU: frequency set to 4400 MHz
543 05:30:34.361293 Enabling SMIs.
544 05:30:34.368180 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 05:30:34.383336 SATAXPCIE1 indicates PCIe NVMe is present
546 05:30:34.386913 Probing TPM: done!
547 05:30:34.390544 Connected to device vid:did:rid of 1ae0:0028:00
548 05:30:34.400981 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
549 05:30:34.404428 Initialized TPM device CR50 revision 0
550 05:30:34.407475 Enabling S0i3.4
551 05:30:34.413787 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 05:30:34.417286 Found a VBT of 8704 bytes after decompression
553 05:30:34.423875 cse_lite: CSE RO boot. HybridStorageMode disabled
554 05:30:34.430504 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 05:30:34.505673 FSPS returned 0
556 05:30:34.508757 Executing Phase 1 of FspMultiPhaseSiInit
557 05:30:34.518808 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 05:30:34.522177 port C0 DISC req: usage 1 usb3 1 usb2 5
559 05:30:34.525487 Raw Buffer output 0 00000511
560 05:30:34.528813 Raw Buffer output 1 00000000
561 05:30:34.532696 pmc_send_ipc_cmd succeeded
562 05:30:34.539494 port C1 DISC req: usage 1 usb3 2 usb2 3
563 05:30:34.539592 Raw Buffer output 0 00000321
564 05:30:34.542914 Raw Buffer output 1 00000000
565 05:30:34.546774 pmc_send_ipc_cmd succeeded
566 05:30:34.552131 Detected 4 core, 8 thread CPU.
567 05:30:34.555187 Detected 4 core, 8 thread CPU.
568 05:30:34.755884 Display FSP Version Info HOB
569 05:30:34.758943 Reference Code - CPU = a.0.4c.31
570 05:30:34.762243 uCode Version = 0.0.0.86
571 05:30:34.765917 TXT ACM version = ff.ff.ff.ffff
572 05:30:34.768906 Reference Code - ME = a.0.4c.31
573 05:30:34.772288 MEBx version = 0.0.0.0
574 05:30:34.775697 ME Firmware Version = Consumer SKU
575 05:30:34.779246 Reference Code - PCH = a.0.4c.31
576 05:30:34.782365 PCH-CRID Status = Disabled
577 05:30:34.785816 PCH-CRID Original Value = ff.ff.ff.ffff
578 05:30:34.789159 PCH-CRID New Value = ff.ff.ff.ffff
579 05:30:34.792431 OPROM - RST - RAID = ff.ff.ff.ffff
580 05:30:34.795458 PCH Hsio Version = 4.0.0.0
581 05:30:34.798802 Reference Code - SA - System Agent = a.0.4c.31
582 05:30:34.802277 Reference Code - MRC = 2.0.0.1
583 05:30:34.805884 SA - PCIe Version = a.0.4c.31
584 05:30:34.809080 SA-CRID Status = Disabled
585 05:30:34.812364 SA-CRID Original Value = 0.0.0.1
586 05:30:34.815236 SA-CRID New Value = 0.0.0.1
587 05:30:34.818577 OPROM - VBIOS = ff.ff.ff.ffff
588 05:30:34.822216 IO Manageability Engine FW Version = 11.1.4.0
589 05:30:34.825334 PHY Build Version = 0.0.0.e0
590 05:30:34.828730 Thunderbolt(TM) FW Version = 0.0.0.0
591 05:30:34.835412 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 05:30:34.838678 ITSS IRQ Polarities Before:
593 05:30:34.838772 IPC0: 0xffffffff
594 05:30:34.842844 IPC1: 0xffffffff
595 05:30:34.842938 IPC2: 0xffffffff
596 05:30:34.846454 IPC3: 0xffffffff
597 05:30:34.846550 ITSS IRQ Polarities After:
598 05:30:34.849672 IPC0: 0xffffffff
599 05:30:34.849766 IPC1: 0xffffffff
600 05:30:34.852938 IPC2: 0xffffffff
601 05:30:34.853032 IPC3: 0xffffffff
602 05:30:34.860068 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 05:30:34.869817 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 05:30:34.883091 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 05:30:34.896359 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 05:30:34.899506 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
607 05:30:34.902878 Enumerating buses...
608 05:30:34.906140 Show all devs... Before device enumeration.
609 05:30:34.909437 Root Device: enabled 1
610 05:30:34.912765 DOMAIN: 0000: enabled 1
611 05:30:34.915955 CPU_CLUSTER: 0: enabled 1
612 05:30:34.916049 PCI: 00:00.0: enabled 1
613 05:30:34.919481 PCI: 00:02.0: enabled 1
614 05:30:34.922798 PCI: 00:04.0: enabled 1
615 05:30:34.926135 PCI: 00:05.0: enabled 1
616 05:30:34.926229 PCI: 00:06.0: enabled 0
617 05:30:34.929685 PCI: 00:07.0: enabled 0
618 05:30:34.933006 PCI: 00:07.1: enabled 0
619 05:30:34.936330 PCI: 00:07.2: enabled 0
620 05:30:34.936453 PCI: 00:07.3: enabled 0
621 05:30:34.939841 PCI: 00:08.0: enabled 1
622 05:30:34.942561 PCI: 00:09.0: enabled 0
623 05:30:34.942655 PCI: 00:0a.0: enabled 0
624 05:30:34.945958 PCI: 00:0d.0: enabled 1
625 05:30:34.949282 PCI: 00:0d.1: enabled 0
626 05:30:34.952876 PCI: 00:0d.2: enabled 0
627 05:30:34.952970 PCI: 00:0d.3: enabled 0
628 05:30:34.956140 PCI: 00:0e.0: enabled 0
629 05:30:34.959146 PCI: 00:10.2: enabled 1
630 05:30:34.962919 PCI: 00:10.6: enabled 0
631 05:30:34.963013 PCI: 00:10.7: enabled 0
632 05:30:34.965761 PCI: 00:12.0: enabled 0
633 05:30:34.969574 PCI: 00:12.6: enabled 0
634 05:30:34.972556 PCI: 00:13.0: enabled 0
635 05:30:34.972675 PCI: 00:14.0: enabled 1
636 05:30:34.976051 PCI: 00:14.1: enabled 0
637 05:30:34.979225 PCI: 00:14.2: enabled 1
638 05:30:34.982580 PCI: 00:14.3: enabled 1
639 05:30:34.982674 PCI: 00:15.0: enabled 1
640 05:30:34.985875 PCI: 00:15.1: enabled 1
641 05:30:34.989180 PCI: 00:15.2: enabled 1
642 05:30:34.989274 PCI: 00:15.3: enabled 1
643 05:30:34.992532 PCI: 00:16.0: enabled 1
644 05:30:34.995897 PCI: 00:16.1: enabled 0
645 05:30:34.999242 PCI: 00:16.2: enabled 0
646 05:30:34.999336 PCI: 00:16.3: enabled 0
647 05:30:35.002799 PCI: 00:16.4: enabled 0
648 05:30:35.005748 PCI: 00:16.5: enabled 0
649 05:30:35.009132 PCI: 00:17.0: enabled 1
650 05:30:35.009226 PCI: 00:19.0: enabled 0
651 05:30:35.012337 PCI: 00:19.1: enabled 1
652 05:30:35.015739 PCI: 00:19.2: enabled 0
653 05:30:35.019187 PCI: 00:1c.0: enabled 1
654 05:30:35.019281 PCI: 00:1c.1: enabled 0
655 05:30:35.022605 PCI: 00:1c.2: enabled 0
656 05:30:35.025909 PCI: 00:1c.3: enabled 0
657 05:30:35.028741 PCI: 00:1c.4: enabled 0
658 05:30:35.028835 PCI: 00:1c.5: enabled 0
659 05:30:35.032105 PCI: 00:1c.6: enabled 1
660 05:30:35.035566 PCI: 00:1c.7: enabled 0
661 05:30:35.035660 PCI: 00:1d.0: enabled 1
662 05:30:35.038817 PCI: 00:1d.1: enabled 0
663 05:30:35.042192 PCI: 00:1d.2: enabled 1
664 05:30:35.045430 PCI: 00:1d.3: enabled 0
665 05:30:35.045524 PCI: 00:1e.0: enabled 1
666 05:30:35.048952 PCI: 00:1e.1: enabled 0
667 05:30:35.051819 PCI: 00:1e.2: enabled 1
668 05:30:35.055284 PCI: 00:1e.3: enabled 1
669 05:30:35.055378 PCI: 00:1f.0: enabled 1
670 05:30:35.058645 PCI: 00:1f.1: enabled 0
671 05:30:35.062136 PCI: 00:1f.2: enabled 1
672 05:30:35.065282 PCI: 00:1f.3: enabled 1
673 05:30:35.065377 PCI: 00:1f.4: enabled 0
674 05:30:35.068576 PCI: 00:1f.5: enabled 1
675 05:30:35.072010 PCI: 00:1f.6: enabled 0
676 05:30:35.075408 PCI: 00:1f.7: enabled 0
677 05:30:35.075502 APIC: 00: enabled 1
678 05:30:35.078744 GENERIC: 0.0: enabled 1
679 05:30:35.081788 GENERIC: 0.0: enabled 1
680 05:30:35.081882 GENERIC: 1.0: enabled 1
681 05:30:35.085329 GENERIC: 0.0: enabled 1
682 05:30:35.088818 GENERIC: 1.0: enabled 1
683 05:30:35.091973 USB0 port 0: enabled 1
684 05:30:35.092066 GENERIC: 0.0: enabled 1
685 05:30:35.095349 USB0 port 0: enabled 1
686 05:30:35.098518 GENERIC: 0.0: enabled 1
687 05:30:35.098613 I2C: 00:1a: enabled 1
688 05:30:35.101927 I2C: 00:31: enabled 1
689 05:30:35.105314 I2C: 00:32: enabled 1
690 05:30:35.105428 I2C: 00:10: enabled 1
691 05:30:35.108154 I2C: 00:15: enabled 1
692 05:30:35.111454 GENERIC: 0.0: enabled 0
693 05:30:35.115235 GENERIC: 1.0: enabled 0
694 05:30:35.115328 GENERIC: 0.0: enabled 1
695 05:30:35.118844 SPI: 00: enabled 1
696 05:30:35.121340 SPI: 00: enabled 1
697 05:30:35.121434 PNP: 0c09.0: enabled 1
698 05:30:35.124660 GENERIC: 0.0: enabled 1
699 05:30:35.128125 USB3 port 0: enabled 1
700 05:30:35.128219 USB3 port 1: enabled 1
701 05:30:35.131510 USB3 port 2: enabled 0
702 05:30:35.134912 USB3 port 3: enabled 0
703 05:30:35.138148 USB2 port 0: enabled 0
704 05:30:35.138242 USB2 port 1: enabled 1
705 05:30:35.141239 USB2 port 2: enabled 1
706 05:30:35.144914 USB2 port 3: enabled 0
707 05:30:35.145009 USB2 port 4: enabled 1
708 05:30:35.147739 USB2 port 5: enabled 0
709 05:30:35.151149 USB2 port 6: enabled 0
710 05:30:35.154504 USB2 port 7: enabled 0
711 05:30:35.154598 USB2 port 8: enabled 0
712 05:30:35.157875 USB2 port 9: enabled 0
713 05:30:35.161184 USB3 port 0: enabled 0
714 05:30:35.161292 USB3 port 1: enabled 1
715 05:30:35.164413 USB3 port 2: enabled 0
716 05:30:35.167662 USB3 port 3: enabled 0
717 05:30:35.167755 GENERIC: 0.0: enabled 1
718 05:30:35.170971 GENERIC: 1.0: enabled 1
719 05:30:35.174642 APIC: 01: enabled 1
720 05:30:35.174738 APIC: 05: enabled 1
721 05:30:35.177621 APIC: 03: enabled 1
722 05:30:35.181258 APIC: 07: enabled 1
723 05:30:35.181359 APIC: 06: enabled 1
724 05:30:35.184220 APIC: 04: enabled 1
725 05:30:35.187626 APIC: 02: enabled 1
726 05:30:35.187753 Compare with tree...
727 05:30:35.190993 Root Device: enabled 1
728 05:30:35.194198 DOMAIN: 0000: enabled 1
729 05:30:35.194309 PCI: 00:00.0: enabled 1
730 05:30:35.197866 PCI: 00:02.0: enabled 1
731 05:30:35.200757 PCI: 00:04.0: enabled 1
732 05:30:35.204175 GENERIC: 0.0: enabled 1
733 05:30:35.207363 PCI: 00:05.0: enabled 1
734 05:30:35.210948 PCI: 00:06.0: enabled 0
735 05:30:35.211107 PCI: 00:07.0: enabled 0
736 05:30:35.214170 GENERIC: 0.0: enabled 1
737 05:30:35.217601 PCI: 00:07.1: enabled 0
738 05:30:35.220544 GENERIC: 1.0: enabled 1
739 05:30:35.224035 PCI: 00:07.2: enabled 0
740 05:30:35.224129 GENERIC: 0.0: enabled 1
741 05:30:35.227468 PCI: 00:07.3: enabled 0
742 05:30:35.231043 GENERIC: 1.0: enabled 1
743 05:30:35.234418 PCI: 00:08.0: enabled 1
744 05:30:35.237267 PCI: 00:09.0: enabled 0
745 05:30:35.237370 PCI: 00:0a.0: enabled 0
746 05:30:35.240964 PCI: 00:0d.0: enabled 1
747 05:30:35.244249 USB0 port 0: enabled 1
748 05:30:35.247339 USB3 port 0: enabled 1
749 05:30:35.251052 USB3 port 1: enabled 1
750 05:30:35.251173 USB3 port 2: enabled 0
751 05:30:35.253973 USB3 port 3: enabled 0
752 05:30:35.257797 PCI: 00:0d.1: enabled 0
753 05:30:35.260394 PCI: 00:0d.2: enabled 0
754 05:30:35.263898 GENERIC: 0.0: enabled 1
755 05:30:35.264153 PCI: 00:0d.3: enabled 0
756 05:30:35.267403 PCI: 00:0e.0: enabled 0
757 05:30:35.270540 PCI: 00:10.2: enabled 1
758 05:30:35.274011 PCI: 00:10.6: enabled 0
759 05:30:35.277539 PCI: 00:10.7: enabled 0
760 05:30:35.277852 PCI: 00:12.0: enabled 0
761 05:30:35.280444 PCI: 00:12.6: enabled 0
762 05:30:35.284255 PCI: 00:13.0: enabled 0
763 05:30:35.287124 PCI: 00:14.0: enabled 1
764 05:30:35.290398 USB0 port 0: enabled 1
765 05:30:35.290631 USB2 port 0: enabled 0
766 05:30:35.294084 USB2 port 1: enabled 1
767 05:30:35.297226 USB2 port 2: enabled 1
768 05:30:35.300660 USB2 port 3: enabled 0
769 05:30:35.303897 USB2 port 4: enabled 1
770 05:30:35.307098 USB2 port 5: enabled 0
771 05:30:35.307444 USB2 port 6: enabled 0
772 05:30:35.310344 USB2 port 7: enabled 0
773 05:30:35.313668 USB2 port 8: enabled 0
774 05:30:35.317574 USB2 port 9: enabled 0
775 05:30:35.320352 USB3 port 0: enabled 0
776 05:30:35.323691 USB3 port 1: enabled 1
777 05:30:35.324037 USB3 port 2: enabled 0
778 05:30:35.327790 USB3 port 3: enabled 0
779 05:30:35.330525 PCI: 00:14.1: enabled 0
780 05:30:35.334206 PCI: 00:14.2: enabled 1
781 05:30:35.337552 PCI: 00:14.3: enabled 1
782 05:30:35.337942 GENERIC: 0.0: enabled 1
783 05:30:35.340269 PCI: 00:15.0: enabled 1
784 05:30:35.343881 I2C: 00:1a: enabled 1
785 05:30:35.346759 I2C: 00:31: enabled 1
786 05:30:35.350216 I2C: 00:32: enabled 1
787 05:30:35.350725 PCI: 00:15.1: enabled 1
788 05:30:35.353433 I2C: 00:10: enabled 1
789 05:30:35.356723 PCI: 00:15.2: enabled 1
790 05:30:35.360494 PCI: 00:15.3: enabled 1
791 05:30:35.360856 PCI: 00:16.0: enabled 1
792 05:30:35.364306 PCI: 00:16.1: enabled 0
793 05:30:35.366991 PCI: 00:16.2: enabled 0
794 05:30:35.370245 PCI: 00:16.3: enabled 0
795 05:30:35.373792 PCI: 00:16.4: enabled 0
796 05:30:35.374216 PCI: 00:16.5: enabled 0
797 05:30:35.376499 PCI: 00:17.0: enabled 1
798 05:30:35.379914 PCI: 00:19.0: enabled 0
799 05:30:35.383667 PCI: 00:19.1: enabled 1
800 05:30:35.386488 I2C: 00:15: enabled 1
801 05:30:35.386837 PCI: 00:19.2: enabled 0
802 05:30:35.389808 PCI: 00:1d.0: enabled 1
803 05:30:35.393075 GENERIC: 0.0: enabled 1
804 05:30:35.396490 PCI: 00:1e.0: enabled 1
805 05:30:35.399726 PCI: 00:1e.1: enabled 0
806 05:30:35.400104 PCI: 00:1e.2: enabled 1
807 05:30:35.403220 SPI: 00: enabled 1
808 05:30:35.406617 PCI: 00:1e.3: enabled 1
809 05:30:35.409738 SPI: 00: enabled 1
810 05:30:35.410240 PCI: 00:1f.0: enabled 1
811 05:30:35.413138 PNP: 0c09.0: enabled 1
812 05:30:35.416372 PCI: 00:1f.1: enabled 0
813 05:30:35.419732 PCI: 00:1f.2: enabled 1
814 05:30:35.423064 GENERIC: 0.0: enabled 1
815 05:30:35.423430 GENERIC: 0.0: enabled 1
816 05:30:35.426454 GENERIC: 1.0: enabled 1
817 05:30:35.429873 PCI: 00:1f.3: enabled 1
818 05:30:35.433308 PCI: 00:1f.4: enabled 0
819 05:30:35.436777 PCI: 00:1f.5: enabled 1
820 05:30:35.437150 PCI: 00:1f.6: enabled 0
821 05:30:35.439766 PCI: 00:1f.7: enabled 0
822 05:30:35.442784 CPU_CLUSTER: 0: enabled 1
823 05:30:35.446403 APIC: 00: enabled 1
824 05:30:35.446771 APIC: 01: enabled 1
825 05:30:35.449930 APIC: 05: enabled 1
826 05:30:35.452804 APIC: 03: enabled 1
827 05:30:35.453172 APIC: 07: enabled 1
828 05:30:35.456219 APIC: 06: enabled 1
829 05:30:35.499968 APIC: 04: enabled 1
830 05:30:35.500579 APIC: 02: enabled 1
831 05:30:35.501028 Root Device scanning...
832 05:30:35.501638 scan_static_bus for Root Device
833 05:30:35.501966 DOMAIN: 0000 enabled
834 05:30:35.502495 CPU_CLUSTER: 0 enabled
835 05:30:35.502792 DOMAIN: 0000 scanning...
836 05:30:35.503060 PCI: pci_scan_bus for bus 00
837 05:30:35.503322 PCI: 00:00.0 [8086/0000] ops
838 05:30:35.503581 PCI: 00:00.0 [8086/9a12] enabled
839 05:30:35.503838 PCI: 00:02.0 [8086/0000] bus ops
840 05:30:35.504090 PCI: 00:02.0 [8086/9a40] enabled
841 05:30:35.504342 PCI: 00:04.0 [8086/0000] bus ops
842 05:30:35.505013 PCI: 00:04.0 [8086/9a03] enabled
843 05:30:35.505382 PCI: 00:05.0 [8086/9a19] enabled
844 05:30:35.508778 PCI: 00:07.0 [0000/0000] hidden
845 05:30:35.509148 PCI: 00:08.0 [8086/9a11] enabled
846 05:30:35.512051 PCI: 00:0a.0 [8086/9a0d] disabled
847 05:30:35.515468 PCI: 00:0d.0 [8086/0000] bus ops
848 05:30:35.518666 PCI: 00:0d.0 [8086/9a13] enabled
849 05:30:35.522102 PCI: 00:14.0 [8086/0000] bus ops
850 05:30:35.525337 PCI: 00:14.0 [8086/a0ed] enabled
851 05:30:35.528445 PCI: 00:14.2 [8086/a0ef] enabled
852 05:30:35.531986 PCI: 00:14.3 [8086/0000] bus ops
853 05:30:35.535372 PCI: 00:14.3 [8086/a0f0] enabled
854 05:30:35.538893 PCI: 00:15.0 [8086/0000] bus ops
855 05:30:35.542538 PCI: 00:15.0 [8086/a0e8] enabled
856 05:30:35.545246 PCI: 00:15.1 [8086/0000] bus ops
857 05:30:35.548706 PCI: 00:15.1 [8086/a0e9] enabled
858 05:30:35.552198 PCI: 00:15.2 [8086/0000] bus ops
859 05:30:35.555727 PCI: 00:15.2 [8086/a0ea] enabled
860 05:30:35.558892 PCI: 00:15.3 [8086/0000] bus ops
861 05:30:35.561967 PCI: 00:15.3 [8086/a0eb] enabled
862 05:30:35.565284 PCI: 00:16.0 [8086/0000] ops
863 05:30:35.569187 PCI: 00:16.0 [8086/a0e0] enabled
864 05:30:35.572391 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 05:30:35.575162 PCI: 00:19.0 [8086/0000] bus ops
866 05:30:35.581853 PCI: 00:19.0 [8086/a0c5] disabled
867 05:30:35.585186 PCI: 00:19.1 [8086/0000] bus ops
868 05:30:35.588857 PCI: 00:19.1 [8086/a0c6] enabled
869 05:30:35.591691 PCI: 00:1d.0 [8086/0000] bus ops
870 05:30:35.595351 PCI: 00:1d.0 [8086/a0b0] enabled
871 05:30:35.595880 PCI: 00:1e.0 [8086/0000] ops
872 05:30:35.598890 PCI: 00:1e.0 [8086/a0a8] enabled
873 05:30:35.602580 PCI: 00:1e.2 [8086/0000] bus ops
874 05:30:35.605043 PCI: 00:1e.2 [8086/a0aa] enabled
875 05:30:35.608467 PCI: 00:1e.3 [8086/0000] bus ops
876 05:30:35.612222 PCI: 00:1e.3 [8086/a0ab] enabled
877 05:30:35.615270 PCI: 00:1f.0 [8086/0000] bus ops
878 05:30:35.618265 PCI: 00:1f.0 [8086/a087] enabled
879 05:30:35.621611 RTC Init
880 05:30:35.625367 Set power on after power failure.
881 05:30:35.625888 Disabling Deep S3
882 05:30:35.628260 Disabling Deep S3
883 05:30:35.631776 Disabling Deep S4
884 05:30:35.632275 Disabling Deep S4
885 05:30:35.635017 Disabling Deep S5
886 05:30:35.635418 Disabling Deep S5
887 05:30:35.638207 PCI: 00:1f.2 [0000/0000] hidden
888 05:30:35.641872 PCI: 00:1f.3 [8086/0000] bus ops
889 05:30:35.644991 PCI: 00:1f.3 [8086/a0c8] enabled
890 05:30:35.648483 PCI: 00:1f.5 [8086/0000] bus ops
891 05:30:35.651975 PCI: 00:1f.5 [8086/a0a4] enabled
892 05:30:35.655361 PCI: Leftover static devices:
893 05:30:35.658600 PCI: 00:10.2
894 05:30:35.658999 PCI: 00:10.6
895 05:30:35.659316 PCI: 00:10.7
896 05:30:35.661640 PCI: 00:06.0
897 05:30:35.662213 PCI: 00:07.1
898 05:30:35.664952 PCI: 00:07.2
899 05:30:35.665446 PCI: 00:07.3
900 05:30:35.665776 PCI: 00:09.0
901 05:30:35.668273 PCI: 00:0d.1
902 05:30:35.668717 PCI: 00:0d.2
903 05:30:35.671751 PCI: 00:0d.3
904 05:30:35.672240 PCI: 00:0e.0
905 05:30:35.672556 PCI: 00:12.0
906 05:30:35.675208 PCI: 00:12.6
907 05:30:35.675596 PCI: 00:13.0
908 05:30:35.678713 PCI: 00:14.1
909 05:30:35.679196 PCI: 00:16.1
910 05:30:35.681435 PCI: 00:16.2
911 05:30:35.681841 PCI: 00:16.3
912 05:30:35.682154 PCI: 00:16.4
913 05:30:35.684768 PCI: 00:16.5
914 05:30:35.685168 PCI: 00:17.0
915 05:30:35.688534 PCI: 00:19.2
916 05:30:35.688970 PCI: 00:1e.1
917 05:30:35.689287 PCI: 00:1f.1
918 05:30:35.691817 PCI: 00:1f.4
919 05:30:35.692180 PCI: 00:1f.6
920 05:30:35.695138 PCI: 00:1f.7
921 05:30:35.698047 PCI: Check your devicetree.cb.
922 05:30:35.698550 PCI: 00:02.0 scanning...
923 05:30:35.705186 scan_generic_bus for PCI: 00:02.0
924 05:30:35.708412 scan_generic_bus for PCI: 00:02.0 done
925 05:30:35.711322 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 05:30:35.714840 PCI: 00:04.0 scanning...
927 05:30:35.718033 scan_generic_bus for PCI: 00:04.0
928 05:30:35.721376 GENERIC: 0.0 enabled
929 05:30:35.725106 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 05:30:35.731349 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 05:30:35.734832 PCI: 00:0d.0 scanning...
932 05:30:35.738336 scan_static_bus for PCI: 00:0d.0
933 05:30:35.738822 USB0 port 0 enabled
934 05:30:35.741232 USB0 port 0 scanning...
935 05:30:35.744526 scan_static_bus for USB0 port 0
936 05:30:35.748271 USB3 port 0 enabled
937 05:30:35.748814 USB3 port 1 enabled
938 05:30:35.751487 USB3 port 2 disabled
939 05:30:35.755163 USB3 port 3 disabled
940 05:30:35.755642 USB3 port 0 scanning...
941 05:30:35.757772 scan_static_bus for USB3 port 0
942 05:30:35.764484 scan_static_bus for USB3 port 0 done
943 05:30:35.767722 scan_bus: bus USB3 port 0 finished in 6 msecs
944 05:30:35.771432 USB3 port 1 scanning...
945 05:30:35.774831 scan_static_bus for USB3 port 1
946 05:30:35.778257 scan_static_bus for USB3 port 1 done
947 05:30:35.781329 scan_bus: bus USB3 port 1 finished in 6 msecs
948 05:30:35.784560 scan_static_bus for USB0 port 0 done
949 05:30:35.791454 scan_bus: bus USB0 port 0 finished in 43 msecs
950 05:30:35.794820 scan_static_bus for PCI: 00:0d.0 done
951 05:30:35.797367 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 05:30:35.800931 PCI: 00:14.0 scanning...
953 05:30:35.804107 scan_static_bus for PCI: 00:14.0
954 05:30:35.807330 USB0 port 0 enabled
955 05:30:35.810825 USB0 port 0 scanning...
956 05:30:35.813990 scan_static_bus for USB0 port 0
957 05:30:35.814350 USB2 port 0 disabled
958 05:30:35.817234 USB2 port 1 enabled
959 05:30:35.817632 USB2 port 2 enabled
960 05:30:35.820875 USB2 port 3 disabled
961 05:30:35.824232 USB2 port 4 enabled
962 05:30:35.824589 USB2 port 5 disabled
963 05:30:35.827884 USB2 port 6 disabled
964 05:30:35.830486 USB2 port 7 disabled
965 05:30:35.830967 USB2 port 8 disabled
966 05:30:35.834137 USB2 port 9 disabled
967 05:30:35.837478 USB3 port 0 disabled
968 05:30:35.837838 USB3 port 1 enabled
969 05:30:35.840670 USB3 port 2 disabled
970 05:30:35.844362 USB3 port 3 disabled
971 05:30:35.844761 USB2 port 1 scanning...
972 05:30:35.847509 scan_static_bus for USB2 port 1
973 05:30:35.850448 scan_static_bus for USB2 port 1 done
974 05:30:35.857486 scan_bus: bus USB2 port 1 finished in 6 msecs
975 05:30:35.860556 USB2 port 2 scanning...
976 05:30:35.864213 scan_static_bus for USB2 port 2
977 05:30:35.867729 scan_static_bus for USB2 port 2 done
978 05:30:35.871107 scan_bus: bus USB2 port 2 finished in 6 msecs
979 05:30:35.874281 USB2 port 4 scanning...
980 05:30:35.877510 scan_static_bus for USB2 port 4
981 05:30:35.880838 scan_static_bus for USB2 port 4 done
982 05:30:35.884045 scan_bus: bus USB2 port 4 finished in 6 msecs
983 05:30:35.887310 USB3 port 1 scanning...
984 05:30:35.890623 scan_static_bus for USB3 port 1
985 05:30:35.894077 scan_static_bus for USB3 port 1 done
986 05:30:35.900087 scan_bus: bus USB3 port 1 finished in 6 msecs
987 05:30:35.903455 scan_static_bus for USB0 port 0 done
988 05:30:35.907070 scan_bus: bus USB0 port 0 finished in 93 msecs
989 05:30:35.910663 scan_static_bus for PCI: 00:14.0 done
990 05:30:35.917030 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 05:30:35.920168 PCI: 00:14.3 scanning...
992 05:30:35.923508 scan_static_bus for PCI: 00:14.3
993 05:30:35.923872 GENERIC: 0.0 enabled
994 05:30:35.927320 scan_static_bus for PCI: 00:14.3 done
995 05:30:35.934010 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 05:30:35.936950 PCI: 00:15.0 scanning...
997 05:30:35.939921 scan_static_bus for PCI: 00:15.0
998 05:30:35.940389 I2C: 00:1a enabled
999 05:30:35.943378 I2C: 00:31 enabled
1000 05:30:35.943835 I2C: 00:32 enabled
1001 05:30:35.950233 scan_static_bus for PCI: 00:15.0 done
1002 05:30:35.953286 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 05:30:35.956875 PCI: 00:15.1 scanning...
1004 05:30:35.960159 scan_static_bus for PCI: 00:15.1
1005 05:30:35.960522 I2C: 00:10 enabled
1006 05:30:35.966324 scan_static_bus for PCI: 00:15.1 done
1007 05:30:35.969863 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 05:30:35.973373 PCI: 00:15.2 scanning...
1009 05:30:35.976815 scan_static_bus for PCI: 00:15.2
1010 05:30:35.979535 scan_static_bus for PCI: 00:15.2 done
1011 05:30:35.983366 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 05:30:35.986149 PCI: 00:15.3 scanning...
1013 05:30:35.989751 scan_static_bus for PCI: 00:15.3
1014 05:30:35.993202 scan_static_bus for PCI: 00:15.3 done
1015 05:30:35.999378 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 05:30:36.002905 PCI: 00:19.1 scanning...
1017 05:30:36.006382 scan_static_bus for PCI: 00:19.1
1018 05:30:36.006752 I2C: 00:15 enabled
1019 05:30:36.009526 scan_static_bus for PCI: 00:19.1 done
1020 05:30:36.016090 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 05:30:36.020002 PCI: 00:1d.0 scanning...
1022 05:30:36.022982 do_pci_scan_bridge for PCI: 00:1d.0
1023 05:30:36.026240 PCI: pci_scan_bus for bus 01
1024 05:30:36.029736 PCI: 01:00.0 [15b7/5009] enabled
1025 05:30:36.030121 GENERIC: 0.0 enabled
1026 05:30:36.033068 Enabling Common Clock Configuration
1027 05:30:36.039916 L1 Sub-State supported from root port 29
1028 05:30:36.042960 L1 Sub-State Support = 0x5
1029 05:30:36.043412 CommonModeRestoreTime = 0x28
1030 05:30:36.049411 Power On Value = 0x16, Power On Scale = 0x0
1031 05:30:36.049835 ASPM: Enabled L1
1032 05:30:36.052721 PCIe: Max_Payload_Size adjusted to 128
1033 05:30:36.059662 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 05:30:36.062900 PCI: 00:1e.2 scanning...
1035 05:30:36.066595 scan_generic_bus for PCI: 00:1e.2
1036 05:30:36.067067 SPI: 00 enabled
1037 05:30:36.072432 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 05:30:36.079563 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 05:30:36.080026 PCI: 00:1e.3 scanning...
1040 05:30:36.082889 scan_generic_bus for PCI: 00:1e.3
1041 05:30:36.086944 SPI: 00 enabled
1042 05:30:36.090711 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 05:30:36.096943 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 05:30:36.100715 PCI: 00:1f.0 scanning...
1045 05:30:36.103719 scan_static_bus for PCI: 00:1f.0
1046 05:30:36.104081 PNP: 0c09.0 enabled
1047 05:30:36.106930 PNP: 0c09.0 scanning...
1048 05:30:36.110811 scan_static_bus for PNP: 0c09.0
1049 05:30:36.114067 scan_static_bus for PNP: 0c09.0 done
1050 05:30:36.120554 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 05:30:36.124164 scan_static_bus for PCI: 00:1f.0 done
1052 05:30:36.127290 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 05:30:36.130435 PCI: 00:1f.2 scanning...
1054 05:30:36.133838 scan_static_bus for PCI: 00:1f.2
1055 05:30:36.137265 GENERIC: 0.0 enabled
1056 05:30:36.137626 GENERIC: 0.0 scanning...
1057 05:30:36.140173 scan_static_bus for GENERIC: 0.0
1058 05:30:36.143553 GENERIC: 0.0 enabled
1059 05:30:36.147024 GENERIC: 1.0 enabled
1060 05:30:36.150325 scan_static_bus for GENERIC: 0.0 done
1061 05:30:36.153844 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 05:30:36.160420 scan_static_bus for PCI: 00:1f.2 done
1063 05:30:36.163531 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 05:30:36.166756 PCI: 00:1f.3 scanning...
1065 05:30:36.170308 scan_static_bus for PCI: 00:1f.3
1066 05:30:36.173775 scan_static_bus for PCI: 00:1f.3 done
1067 05:30:36.177245 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 05:30:36.180227 PCI: 00:1f.5 scanning...
1069 05:30:36.183591 scan_generic_bus for PCI: 00:1f.5
1070 05:30:36.187040 scan_generic_bus for PCI: 00:1f.5 done
1071 05:30:36.193547 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 05:30:36.196806 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 05:30:36.199933 scan_static_bus for Root Device done
1074 05:30:36.206562 scan_bus: bus Root Device finished in 736 msecs
1075 05:30:36.206924 done
1076 05:30:36.213720 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 05:30:36.217010 Chrome EC: UHEPI supported
1078 05:30:36.223889 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 05:30:36.230163 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 05:30:36.233394 SPI flash protection: WPSW=0 SRP0=1
1081 05:30:36.237165 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 05:30:36.243194 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 05:30:36.246915 found VGA at PCI: 00:02.0
1084 05:30:36.250154 Setting up VGA for PCI: 00:02.0
1085 05:30:36.253441 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 05:30:36.259651 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 05:30:36.260104 Allocating resources...
1088 05:30:36.263092 Reading resources...
1089 05:30:36.266480 Root Device read_resources bus 0 link: 0
1090 05:30:36.273207 DOMAIN: 0000 read_resources bus 0 link: 0
1091 05:30:36.276246 PCI: 00:04.0 read_resources bus 1 link: 0
1092 05:30:36.282701 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 05:30:36.286255 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 05:30:36.289710 USB0 port 0 read_resources bus 0 link: 0
1095 05:30:36.296892 USB0 port 0 read_resources bus 0 link: 0 done
1096 05:30:36.300298 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 05:30:36.306993 PCI: 00:14.0 read_resources bus 0 link: 0
1098 05:30:36.310392 USB0 port 0 read_resources bus 0 link: 0
1099 05:30:36.316907 USB0 port 0 read_resources bus 0 link: 0 done
1100 05:30:36.320482 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 05:30:36.326935 PCI: 00:14.3 read_resources bus 0 link: 0
1102 05:30:36.330232 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 05:30:36.337081 PCI: 00:15.0 read_resources bus 0 link: 0
1104 05:30:36.339942 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 05:30:36.346707 PCI: 00:15.1 read_resources bus 0 link: 0
1106 05:30:36.350167 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 05:30:36.357057 PCI: 00:19.1 read_resources bus 0 link: 0
1108 05:30:36.359928 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 05:30:36.366945 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 05:30:36.369879 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 05:30:36.377054 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 05:30:36.380267 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 05:30:36.387088 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 05:30:36.390283 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 05:30:36.396533 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 05:30:36.399835 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 05:30:36.403421 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 05:30:36.410124 GENERIC: 0.0 read_resources bus 0 link: 0
1119 05:30:36.413497 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 05:30:36.420251 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 05:30:36.427268 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 05:30:36.429958 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 05:30:36.433379 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 05:30:36.440268 Root Device read_resources bus 0 link: 0 done
1125 05:30:36.443906 Done reading resources.
1126 05:30:36.447169 Show resources in subtree (Root Device)...After reading.
1127 05:30:36.453575 Root Device child on link 0 DOMAIN: 0000
1128 05:30:36.456917 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 05:30:36.466839 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 05:30:36.476702 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 05:30:36.477117 PCI: 00:00.0
1132 05:30:36.486801 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 05:30:36.496905 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 05:30:36.507274 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 05:30:36.516517 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 05:30:36.523773 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 05:30:36.533219 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 05:30:36.543390 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 05:30:36.553325 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 05:30:36.562809 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 05:30:36.572677 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 05:30:36.579570 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 05:30:36.589763 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 05:30:36.599432 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 05:30:36.609343 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 05:30:36.619477 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 05:30:36.626393 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 05:30:36.636076 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 05:30:36.646159 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 05:30:36.656041 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 05:30:36.665684 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 05:30:36.666144 PCI: 00:02.0
1153 05:30:36.679182 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 05:30:36.688872 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 05:30:36.695743 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 05:30:36.702660 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 05:30:36.712140 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 05:30:36.712596 GENERIC: 0.0
1159 05:30:36.715728 PCI: 00:05.0
1160 05:30:36.725307 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 05:30:36.729095 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 05:30:36.732417 GENERIC: 0.0
1163 05:30:36.732930 PCI: 00:08.0
1164 05:30:36.742005 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 05:30:36.745300 PCI: 00:0a.0
1166 05:30:36.748669 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 05:30:36.758719 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 05:30:36.761887 USB0 port 0 child on link 0 USB3 port 0
1169 05:30:36.765174 USB3 port 0
1170 05:30:36.765564 USB3 port 1
1171 05:30:36.768756 USB3 port 2
1172 05:30:36.769206 USB3 port 3
1173 05:30:36.775157 PCI: 00:14.0 child on link 0 USB0 port 0
1174 05:30:36.785107 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 05:30:36.788654 USB0 port 0 child on link 0 USB2 port 0
1176 05:30:36.792055 USB2 port 0
1177 05:30:36.792547 USB2 port 1
1178 05:30:36.795487 USB2 port 2
1179 05:30:36.795942 USB2 port 3
1180 05:30:36.799247 USB2 port 4
1181 05:30:36.799636 USB2 port 5
1182 05:30:36.801691 USB2 port 6
1183 05:30:36.802079 USB2 port 7
1184 05:30:36.805204 USB2 port 8
1185 05:30:36.805593 USB2 port 9
1186 05:30:36.808600 USB3 port 0
1187 05:30:36.809032 USB3 port 1
1188 05:30:36.811995 USB3 port 2
1189 05:30:36.815171 USB3 port 3
1190 05:30:36.815560 PCI: 00:14.2
1191 05:30:36.825101 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 05:30:36.835265 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 05:30:36.838687 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 05:30:36.848376 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 05:30:36.852047 GENERIC: 0.0
1196 05:30:36.854888 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 05:30:36.865141 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 05:30:36.868344 I2C: 00:1a
1199 05:30:36.868825 I2C: 00:31
1200 05:30:36.871743 I2C: 00:32
1201 05:30:36.875644 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 05:30:36.885213 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 05:30:36.885673 I2C: 00:10
1204 05:30:36.888416 PCI: 00:15.2
1205 05:30:36.897983 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 05:30:36.898434 PCI: 00:15.3
1207 05:30:36.908315 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 05:30:36.911252 PCI: 00:16.0
1209 05:30:36.921272 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 05:30:36.921709 PCI: 00:19.0
1211 05:30:36.928451 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 05:30:36.938009 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 05:30:36.938438 I2C: 00:15
1214 05:30:36.941989 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 05:30:36.952031 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 05:30:36.961797 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 05:30:36.971164 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 05:30:36.971676 GENERIC: 0.0
1219 05:30:36.974785 PCI: 01:00.0
1220 05:30:36.984724 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 05:30:36.994260 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 05:30:36.994723 PCI: 00:1e.0
1223 05:30:37.008053 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 05:30:37.010889 PCI: 00:1e.2 child on link 0 SPI: 00
1225 05:30:37.021319 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 05:30:37.021775 SPI: 00
1227 05:30:37.027728 PCI: 00:1e.3 child on link 0 SPI: 00
1228 05:30:37.037981 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 05:30:37.038473 SPI: 00
1230 05:30:37.040733 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 05:30:37.050942 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 05:30:37.051388 PNP: 0c09.0
1233 05:30:37.061141 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 05:30:37.064231 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 05:30:37.073951 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 05:30:37.084239 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 05:30:37.087462 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 05:30:37.091527 GENERIC: 0.0
1239 05:30:37.092028 GENERIC: 1.0
1240 05:30:37.093827 PCI: 00:1f.3
1241 05:30:37.103680 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 05:30:37.113855 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 05:30:37.117564 PCI: 00:1f.5
1244 05:30:37.124058 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 05:30:37.130919 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 05:30:37.131420 APIC: 00
1247 05:30:37.131734 APIC: 01
1248 05:30:37.134284 APIC: 05
1249 05:30:37.134673 APIC: 03
1250 05:30:37.134987 APIC: 07
1251 05:30:37.137323 APIC: 06
1252 05:30:37.137818 APIC: 04
1253 05:30:37.140467 APIC: 02
1254 05:30:37.147321 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 05:30:37.153996 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 05:30:37.160764 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 05:30:37.163857 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 05:30:37.170536 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 05:30:37.174159 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 05:30:37.180718 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 05:30:37.186930 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 05:30:37.196863 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 05:30:37.203575 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 05:30:37.210304 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 05:30:37.216495 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 05:30:37.223279 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 05:30:37.229991 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 05:30:37.233356 DOMAIN: 0000: Resource ranges:
1269 05:30:37.236860 * Base: 1000, Size: 800, Tag: 100
1270 05:30:37.243294 * Base: 1900, Size: e700, Tag: 100
1271 05:30:37.246713 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 05:30:37.253415 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 05:30:37.259795 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 05:30:37.270288 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 05:30:37.276532 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 05:30:37.283153 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 05:30:37.293044 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 05:30:37.299351 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 05:30:37.306150 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 05:30:37.315913 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 05:30:37.323034 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 05:30:37.329180 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 05:30:37.335897 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 05:30:37.346356 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 05:30:37.352456 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 05:30:37.359288 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 05:30:37.368931 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 05:30:37.375816 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 05:30:37.382327 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 05:30:37.392666 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 05:30:37.399026 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 05:30:37.405628 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 05:30:37.415587 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 05:30:37.422119 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 05:30:37.428558 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 05:30:37.432401 DOMAIN: 0000: Resource ranges:
1297 05:30:37.439105 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 05:30:37.442023 * Base: d0000000, Size: 28000000, Tag: 200
1299 05:30:37.445182 * Base: fa000000, Size: 1000000, Tag: 200
1300 05:30:37.451781 * Base: fb001000, Size: 2fff000, Tag: 200
1301 05:30:37.455047 * Base: fe010000, Size: 2e000, Tag: 200
1302 05:30:37.458913 * Base: fe03f000, Size: d41000, Tag: 200
1303 05:30:37.462016 * Base: fed88000, Size: 8000, Tag: 200
1304 05:30:37.468725 * Base: fed93000, Size: d000, Tag: 200
1305 05:30:37.472071 * Base: feda2000, Size: 1e000, Tag: 200
1306 05:30:37.475525 * Base: fede0000, Size: 1220000, Tag: 200
1307 05:30:37.481788 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 05:30:37.488303 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 05:30:37.495095 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 05:30:37.501646 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 05:30:37.508552 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 05:30:37.515062 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 05:30:37.521664 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 05:30:37.528337 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 05:30:37.535083 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 05:30:37.541464 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 05:30:37.547941 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 05:30:37.554552 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 05:30:37.561581 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 05:30:37.568399 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 05:30:37.574661 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 05:30:37.581237 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 05:30:37.588065 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 05:30:37.594476 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 05:30:37.601219 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 05:30:37.607246 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 05:30:37.614317 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 05:30:37.621344 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 05:30:37.627473 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 05:30:37.634791 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 05:30:37.640848 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 05:30:37.644081 PCI: 00:1d.0: Resource ranges:
1333 05:30:37.650752 * Base: 7fc00000, Size: 100000, Tag: 200
1334 05:30:37.656945 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 05:30:37.664308 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 05:30:37.670906 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 05:30:37.677574 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 05:30:37.684191 Root Device assign_resources, bus 0 link: 0
1339 05:30:37.686622 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 05:30:37.696605 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 05:30:37.703559 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 05:30:37.713252 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 05:30:37.720017 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 05:30:37.723608 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 05:30:37.730052 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 05:30:37.737026 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 05:30:37.746877 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 05:30:37.753177 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 05:30:37.760132 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 05:30:37.763428 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 05:30:37.773296 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 05:30:37.776732 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 05:30:37.780342 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 05:30:37.789696 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 05:30:37.796680 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 05:30:37.806421 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 05:30:37.809432 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 05:30:37.816169 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 05:30:37.822706 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 05:30:37.825740 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 05:30:37.832523 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 05:30:37.838948 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 05:30:37.845890 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 05:30:37.849302 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 05:30:37.859301 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 05:30:37.865649 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 05:30:37.875284 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 05:30:37.882157 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 05:30:37.885234 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 05:30:37.892266 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 05:30:37.899229 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 05:30:37.908822 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 05:30:37.918501 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 05:30:37.922318 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 05:30:37.932079 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 05:30:37.938665 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 05:30:37.945308 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 05:30:37.951775 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 05:30:37.958662 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 05:30:37.961576 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 05:30:37.971381 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 05:30:37.974633 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 05:30:37.978398 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 05:30:37.984695 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 05:30:37.988200 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 05:30:37.994938 LPC: Trying to open IO window from 800 size 1ff
1387 05:30:38.001530 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 05:30:38.011324 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 05:30:38.017873 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 05:30:38.024396 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 05:30:38.027746 Root Device assign_resources, bus 0 link: 0
1392 05:30:38.031445 Done setting resources.
1393 05:30:38.037920 Show resources in subtree (Root Device)...After assigning values.
1394 05:30:38.041052 Root Device child on link 0 DOMAIN: 0000
1395 05:30:38.044533 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 05:30:38.054718 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 05:30:38.064337 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 05:30:38.067921 PCI: 00:00.0
1399 05:30:38.074948 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 05:30:38.084850 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 05:30:38.094181 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 05:30:38.104210 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 05:30:38.114205 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 05:30:38.123923 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 05:30:38.131029 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 05:30:38.140703 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 05:30:38.150131 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 05:30:38.160315 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 05:30:38.170090 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 05:30:38.179978 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 05:30:38.187066 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 05:30:38.196768 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 05:30:38.206461 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 05:30:38.216408 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 05:30:38.226336 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 05:30:38.236739 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 05:30:38.242882 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 05:30:38.253088 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 05:30:38.256850 PCI: 00:02.0
1420 05:30:38.266449 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 05:30:38.275911 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 05:30:38.285765 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 05:30:38.289193 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 05:30:38.302692 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 05:30:38.303278 GENERIC: 0.0
1426 05:30:38.306407 PCI: 00:05.0
1427 05:30:38.316029 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 05:30:38.319194 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 05:30:38.322848 GENERIC: 0.0
1430 05:30:38.323269 PCI: 00:08.0
1431 05:30:38.332368 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 05:30:38.336057 PCI: 00:0a.0
1433 05:30:38.339145 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 05:30:38.349120 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 05:30:38.355422 USB0 port 0 child on link 0 USB3 port 0
1436 05:30:38.355811 USB3 port 0
1437 05:30:38.358773 USB3 port 1
1438 05:30:38.359367 USB3 port 2
1439 05:30:38.362048 USB3 port 3
1440 05:30:38.365637 PCI: 00:14.0 child on link 0 USB0 port 0
1441 05:30:38.376115 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 05:30:38.382627 USB0 port 0 child on link 0 USB2 port 0
1443 05:30:38.383126 USB2 port 0
1444 05:30:38.385699 USB2 port 1
1445 05:30:38.386193 USB2 port 2
1446 05:30:38.389064 USB2 port 3
1447 05:30:38.389451 USB2 port 4
1448 05:30:38.392793 USB2 port 5
1449 05:30:38.393286 USB2 port 6
1450 05:30:38.395276 USB2 port 7
1451 05:30:38.395660 USB2 port 8
1452 05:30:38.398622 USB2 port 9
1453 05:30:38.399011 USB3 port 0
1454 05:30:38.402311 USB3 port 1
1455 05:30:38.405786 USB3 port 2
1456 05:30:38.406173 USB3 port 3
1457 05:30:38.408437 PCI: 00:14.2
1458 05:30:38.418376 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 05:30:38.428796 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 05:30:38.431609 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 05:30:38.441686 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 05:30:38.445226 GENERIC: 0.0
1463 05:30:38.448320 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 05:30:38.458636 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 05:30:38.461442 I2C: 00:1a
1466 05:30:38.461861 I2C: 00:31
1467 05:30:38.464952 I2C: 00:32
1468 05:30:38.468419 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 05:30:38.478498 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 05:30:38.481913 I2C: 00:10
1471 05:30:38.482301 PCI: 00:15.2
1472 05:30:38.491622 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 05:30:38.494989 PCI: 00:15.3
1474 05:30:38.504932 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 05:30:38.505461 PCI: 00:16.0
1476 05:30:38.514648 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 05:30:38.517981 PCI: 00:19.0
1478 05:30:38.521496 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 05:30:38.531102 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 05:30:38.534185 I2C: 00:15
1481 05:30:38.537866 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 05:30:38.547273 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 05:30:38.560812 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 05:30:38.570658 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 05:30:38.570752 GENERIC: 0.0
1486 05:30:38.573878 PCI: 01:00.0
1487 05:30:38.583627 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 05:30:38.593703 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 05:30:38.596995 PCI: 00:1e.0
1490 05:30:38.606798 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 05:30:38.610135 PCI: 00:1e.2 child on link 0 SPI: 00
1492 05:30:38.620523 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 05:30:38.623448 SPI: 00
1494 05:30:38.626903 PCI: 00:1e.3 child on link 0 SPI: 00
1495 05:30:38.636975 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 05:30:38.637121 SPI: 00
1497 05:30:38.643565 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 05:30:38.650316 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 05:30:38.653530 PNP: 0c09.0
1500 05:30:38.660272 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 05:30:38.666928 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 05:30:38.676631 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 05:30:38.683369 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 05:30:38.690046 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 05:30:38.690275 GENERIC: 0.0
1506 05:30:38.693717 GENERIC: 1.0
1507 05:30:38.693945 PCI: 00:1f.3
1508 05:30:38.706392 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 05:30:38.717163 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 05:30:38.717626 PCI: 00:1f.5
1511 05:30:38.726658 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 05:30:38.733243 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 05:30:38.733801 APIC: 00
1514 05:30:38.734142 APIC: 01
1515 05:30:38.736724 APIC: 05
1516 05:30:38.737148 APIC: 03
1517 05:30:38.740239 APIC: 07
1518 05:30:38.740661 APIC: 06
1519 05:30:38.740978 APIC: 04
1520 05:30:38.743152 APIC: 02
1521 05:30:38.746571 Done allocating resources.
1522 05:30:38.749774 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1523 05:30:38.756447 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 05:30:38.759564 Configure GPIOs for I2S audio on UP4.
1525 05:30:38.767035 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 05:30:38.770518 Enabling resources...
1527 05:30:38.773654 PCI: 00:00.0 subsystem <- 8086/9a12
1528 05:30:38.776994 PCI: 00:00.0 cmd <- 06
1529 05:30:38.779842 PCI: 00:02.0 subsystem <- 8086/9a40
1530 05:30:38.783625 PCI: 00:02.0 cmd <- 03
1531 05:30:38.786768 PCI: 00:04.0 subsystem <- 8086/9a03
1532 05:30:38.787133 PCI: 00:04.0 cmd <- 02
1533 05:30:38.793934 PCI: 00:05.0 subsystem <- 8086/9a19
1534 05:30:38.794300 PCI: 00:05.0 cmd <- 02
1535 05:30:38.797064 PCI: 00:08.0 subsystem <- 8086/9a11
1536 05:30:38.800660 PCI: 00:08.0 cmd <- 06
1537 05:30:38.804021 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 05:30:38.807120 PCI: 00:0d.0 cmd <- 02
1539 05:30:38.810771 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 05:30:38.813878 PCI: 00:14.0 cmd <- 02
1541 05:30:38.817020 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 05:30:38.820715 PCI: 00:14.2 cmd <- 02
1543 05:30:38.824095 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 05:30:38.827070 PCI: 00:14.3 cmd <- 02
1545 05:30:38.830407 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 05:30:38.830772 PCI: 00:15.0 cmd <- 02
1547 05:30:38.837268 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 05:30:38.837737 PCI: 00:15.1 cmd <- 02
1549 05:30:38.840676 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 05:30:38.844166 PCI: 00:15.2 cmd <- 02
1551 05:30:38.847016 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 05:30:38.850593 PCI: 00:15.3 cmd <- 02
1553 05:30:38.854090 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 05:30:38.857365 PCI: 00:16.0 cmd <- 02
1555 05:30:38.860583 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 05:30:38.863814 PCI: 00:19.1 cmd <- 02
1557 05:30:38.867446 PCI: 00:1d.0 bridge ctrl <- 0013
1558 05:30:38.870723 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 05:30:38.874242 PCI: 00:1d.0 cmd <- 06
1560 05:30:38.877018 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 05:30:38.877397 PCI: 00:1e.0 cmd <- 06
1562 05:30:38.884379 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 05:30:38.884787 PCI: 00:1e.2 cmd <- 06
1564 05:30:38.887608 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 05:30:38.890885 PCI: 00:1e.3 cmd <- 02
1566 05:30:38.894270 PCI: 00:1f.0 subsystem <- 8086/a087
1567 05:30:38.897073 PCI: 00:1f.0 cmd <- 407
1568 05:30:38.900993 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 05:30:38.904144 PCI: 00:1f.3 cmd <- 02
1570 05:30:38.907547 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 05:30:38.910952 PCI: 00:1f.5 cmd <- 406
1572 05:30:38.914340 PCI: 01:00.0 cmd <- 02
1573 05:30:38.918471 done.
1574 05:30:38.921696 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 05:30:38.925373 Initializing devices...
1576 05:30:38.928926 Root Device init
1577 05:30:38.932390 Chrome EC: Set SMI mask to 0x0000000000000000
1578 05:30:38.938339 Chrome EC: clear events_b mask to 0x0000000000000000
1579 05:30:38.945057 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 05:30:38.948560 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 05:30:38.955590 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 05:30:38.961938 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 05:30:38.965247 fw_config match found: DB_USB=USB3_ACTIVE
1584 05:30:38.971654 Configure Right Type-C port orientation for retimer
1585 05:30:38.974844 Root Device init finished in 43 msecs
1586 05:30:38.978448 PCI: 00:00.0 init
1587 05:30:38.981786 CPU TDP = 9 Watts
1588 05:30:38.982178 CPU PL1 = 9 Watts
1589 05:30:38.985375 CPU PL2 = 40 Watts
1590 05:30:38.985859 CPU PL4 = 83 Watts
1591 05:30:38.991367 PCI: 00:00.0 init finished in 8 msecs
1592 05:30:38.991723 PCI: 00:02.0 init
1593 05:30:38.994996 GMA: Found VBT in CBFS
1594 05:30:38.998222 GMA: Found valid VBT in CBFS
1595 05:30:39.005025 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 05:30:39.011230 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 05:30:39.014628 PCI: 00:02.0 init finished in 18 msecs
1598 05:30:39.018050 PCI: 00:05.0 init
1599 05:30:39.021487 PCI: 00:05.0 init finished in 0 msecs
1600 05:30:39.024896 PCI: 00:08.0 init
1601 05:30:39.028139 PCI: 00:08.0 init finished in 0 msecs
1602 05:30:39.031542 PCI: 00:14.0 init
1603 05:30:39.035058 PCI: 00:14.0 init finished in 0 msecs
1604 05:30:39.035411 PCI: 00:14.2 init
1605 05:30:39.040876 PCI: 00:14.2 init finished in 0 msecs
1606 05:30:39.040968 PCI: 00:15.0 init
1607 05:30:39.044598 I2C bus 0 version 0x3230302a
1608 05:30:39.047751 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 05:30:39.050723 PCI: 00:15.0 init finished in 6 msecs
1610 05:30:39.054461 PCI: 00:15.1 init
1611 05:30:39.058077 I2C bus 1 version 0x3230302a
1612 05:30:39.060949 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 05:30:39.064852 PCI: 00:15.1 init finished in 6 msecs
1614 05:30:39.068026 PCI: 00:15.2 init
1615 05:30:39.071104 I2C bus 2 version 0x3230302a
1616 05:30:39.074466 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 05:30:39.077793 PCI: 00:15.2 init finished in 6 msecs
1618 05:30:39.081054 PCI: 00:15.3 init
1619 05:30:39.084581 I2C bus 3 version 0x3230302a
1620 05:30:39.087595 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 05:30:39.091214 PCI: 00:15.3 init finished in 6 msecs
1622 05:30:39.091306 PCI: 00:16.0 init
1623 05:30:39.097522 PCI: 00:16.0 init finished in 0 msecs
1624 05:30:39.097614 PCI: 00:19.1 init
1625 05:30:39.101019 I2C bus 5 version 0x3230302a
1626 05:30:39.104202 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 05:30:39.107374 PCI: 00:19.1 init finished in 6 msecs
1628 05:30:39.111215 PCI: 00:1d.0 init
1629 05:30:39.114847 Initializing PCH PCIe bridge.
1630 05:30:39.118086 PCI: 00:1d.0 init finished in 3 msecs
1631 05:30:39.120998 PCI: 00:1f.0 init
1632 05:30:39.124546 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 05:30:39.131579 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 05:30:39.131689 IOAPIC: ID = 0x02
1635 05:30:39.134706 IOAPIC: Dumping registers
1636 05:30:39.138099 reg 0x0000: 0x02000000
1637 05:30:39.141495 reg 0x0001: 0x00770020
1638 05:30:39.141707 reg 0x0002: 0x00000000
1639 05:30:39.148358 PCI: 00:1f.0 init finished in 21 msecs
1640 05:30:39.148569 PCI: 00:1f.2 init
1641 05:30:39.151684 Disabling ACPI via APMC.
1642 05:30:39.154640 APMC done.
1643 05:30:39.157817 PCI: 00:1f.2 init finished in 5 msecs
1644 05:30:39.169367 PCI: 01:00.0 init
1645 05:30:39.172570 PCI: 01:00.0 init finished in 0 msecs
1646 05:30:39.176001 PNP: 0c09.0 init
1647 05:30:39.179262 Google Chrome EC uptime: 8.247 seconds
1648 05:30:39.186087 Google Chrome AP resets since EC boot: 1
1649 05:30:39.189462 Google Chrome most recent AP reset causes:
1650 05:30:39.192698 0.451: 32775 shutdown: entering G3
1651 05:30:39.199232 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 05:30:39.202544 PNP: 0c09.0 init finished in 22 msecs
1653 05:30:39.207818 Devices initialized
1654 05:30:39.211045 Show all devs... After init.
1655 05:30:39.214421 Root Device: enabled 1
1656 05:30:39.214811 DOMAIN: 0000: enabled 1
1657 05:30:39.217846 CPU_CLUSTER: 0: enabled 1
1658 05:30:39.221165 PCI: 00:00.0: enabled 1
1659 05:30:39.224713 PCI: 00:02.0: enabled 1
1660 05:30:39.225077 PCI: 00:04.0: enabled 1
1661 05:30:39.228064 PCI: 00:05.0: enabled 1
1662 05:30:39.231327 PCI: 00:06.0: enabled 0
1663 05:30:39.234367 PCI: 00:07.0: enabled 0
1664 05:30:39.234729 PCI: 00:07.1: enabled 0
1665 05:30:39.237796 PCI: 00:07.2: enabled 0
1666 05:30:39.241206 PCI: 00:07.3: enabled 0
1667 05:30:39.244696 PCI: 00:08.0: enabled 1
1668 05:30:39.245062 PCI: 00:09.0: enabled 0
1669 05:30:39.248136 PCI: 00:0a.0: enabled 0
1670 05:30:39.251071 PCI: 00:0d.0: enabled 1
1671 05:30:39.251434 PCI: 00:0d.1: enabled 0
1672 05:30:39.254547 PCI: 00:0d.2: enabled 0
1673 05:30:39.257996 PCI: 00:0d.3: enabled 0
1674 05:30:39.261360 PCI: 00:0e.0: enabled 0
1675 05:30:39.261723 PCI: 00:10.2: enabled 1
1676 05:30:39.264193 PCI: 00:10.6: enabled 0
1677 05:30:39.267678 PCI: 00:10.7: enabled 0
1678 05:30:39.271136 PCI: 00:12.0: enabled 0
1679 05:30:39.271499 PCI: 00:12.6: enabled 0
1680 05:30:39.274400 PCI: 00:13.0: enabled 0
1681 05:30:39.277520 PCI: 00:14.0: enabled 1
1682 05:30:39.281422 PCI: 00:14.1: enabled 0
1683 05:30:39.281829 PCI: 00:14.2: enabled 1
1684 05:30:39.284854 PCI: 00:14.3: enabled 1
1685 05:30:39.287810 PCI: 00:15.0: enabled 1
1686 05:30:39.291182 PCI: 00:15.1: enabled 1
1687 05:30:39.291547 PCI: 00:15.2: enabled 1
1688 05:30:39.294796 PCI: 00:15.3: enabled 1
1689 05:30:39.297405 PCI: 00:16.0: enabled 1
1690 05:30:39.297767 PCI: 00:16.1: enabled 0
1691 05:30:39.300890 PCI: 00:16.2: enabled 0
1692 05:30:39.304169 PCI: 00:16.3: enabled 0
1693 05:30:39.307394 PCI: 00:16.4: enabled 0
1694 05:30:39.307750 PCI: 00:16.5: enabled 0
1695 05:30:39.311209 PCI: 00:17.0: enabled 0
1696 05:30:39.314194 PCI: 00:19.0: enabled 0
1697 05:30:39.317753 PCI: 00:19.1: enabled 1
1698 05:30:39.318115 PCI: 00:19.2: enabled 0
1699 05:30:39.320767 PCI: 00:1c.0: enabled 1
1700 05:30:39.324342 PCI: 00:1c.1: enabled 0
1701 05:30:39.327334 PCI: 00:1c.2: enabled 0
1702 05:30:39.327696 PCI: 00:1c.3: enabled 0
1703 05:30:39.330729 PCI: 00:1c.4: enabled 0
1704 05:30:39.334171 PCI: 00:1c.5: enabled 0
1705 05:30:39.334534 PCI: 00:1c.6: enabled 1
1706 05:30:39.337562 PCI: 00:1c.7: enabled 0
1707 05:30:39.341097 PCI: 00:1d.0: enabled 1
1708 05:30:39.343926 PCI: 00:1d.1: enabled 0
1709 05:30:39.344287 PCI: 00:1d.2: enabled 1
1710 05:30:39.347184 PCI: 00:1d.3: enabled 0
1711 05:30:39.350944 PCI: 00:1e.0: enabled 1
1712 05:30:39.354211 PCI: 00:1e.1: enabled 0
1713 05:30:39.354569 PCI: 00:1e.2: enabled 1
1714 05:30:39.357791 PCI: 00:1e.3: enabled 1
1715 05:30:39.361087 PCI: 00:1f.0: enabled 1
1716 05:30:39.363823 PCI: 00:1f.1: enabled 0
1717 05:30:39.364179 PCI: 00:1f.2: enabled 1
1718 05:30:39.367276 PCI: 00:1f.3: enabled 1
1719 05:30:39.370737 PCI: 00:1f.4: enabled 0
1720 05:30:39.374136 PCI: 00:1f.5: enabled 1
1721 05:30:39.374494 PCI: 00:1f.6: enabled 0
1722 05:30:39.377632 PCI: 00:1f.7: enabled 0
1723 05:30:39.380510 APIC: 00: enabled 1
1724 05:30:39.380895 GENERIC: 0.0: enabled 1
1725 05:30:39.383735 GENERIC: 0.0: enabled 1
1726 05:30:39.387352 GENERIC: 1.0: enabled 1
1727 05:30:39.390882 GENERIC: 0.0: enabled 1
1728 05:30:39.391238 GENERIC: 1.0: enabled 1
1729 05:30:39.394215 USB0 port 0: enabled 1
1730 05:30:39.397460 GENERIC: 0.0: enabled 1
1731 05:30:39.397818 USB0 port 0: enabled 1
1732 05:30:39.400531 GENERIC: 0.0: enabled 1
1733 05:30:39.403835 I2C: 00:1a: enabled 1
1734 05:30:39.407457 I2C: 00:31: enabled 1
1735 05:30:39.407811 I2C: 00:32: enabled 1
1736 05:30:39.410760 I2C: 00:10: enabled 1
1737 05:30:39.414048 I2C: 00:15: enabled 1
1738 05:30:39.414429 GENERIC: 0.0: enabled 0
1739 05:30:39.417442 GENERIC: 1.0: enabled 0
1740 05:30:39.420323 GENERIC: 0.0: enabled 1
1741 05:30:39.420708 SPI: 00: enabled 1
1742 05:30:39.423648 SPI: 00: enabled 1
1743 05:30:39.427100 PNP: 0c09.0: enabled 1
1744 05:30:39.427458 GENERIC: 0.0: enabled 1
1745 05:30:39.430613 USB3 port 0: enabled 1
1746 05:30:39.433693 USB3 port 1: enabled 1
1747 05:30:39.434108 USB3 port 2: enabled 0
1748 05:30:39.436989 USB3 port 3: enabled 0
1749 05:30:39.440187 USB2 port 0: enabled 0
1750 05:30:39.444007 USB2 port 1: enabled 1
1751 05:30:39.444367 USB2 port 2: enabled 1
1752 05:30:39.446870 USB2 port 3: enabled 0
1753 05:30:39.450286 USB2 port 4: enabled 1
1754 05:30:39.450648 USB2 port 5: enabled 0
1755 05:30:39.453962 USB2 port 6: enabled 0
1756 05:30:39.457123 USB2 port 7: enabled 0
1757 05:30:39.460102 USB2 port 8: enabled 0
1758 05:30:39.460460 USB2 port 9: enabled 0
1759 05:30:39.463525 USB3 port 0: enabled 0
1760 05:30:39.466955 USB3 port 1: enabled 1
1761 05:30:39.467394 USB3 port 2: enabled 0
1762 05:30:39.470487 USB3 port 3: enabled 0
1763 05:30:39.473886 GENERIC: 0.0: enabled 1
1764 05:30:39.476716 GENERIC: 1.0: enabled 1
1765 05:30:39.477073 APIC: 01: enabled 1
1766 05:30:39.480182 APIC: 05: enabled 1
1767 05:30:39.480778 APIC: 03: enabled 1
1768 05:30:39.483527 APIC: 07: enabled 1
1769 05:30:39.487053 APIC: 06: enabled 1
1770 05:30:39.487413 APIC: 04: enabled 1
1771 05:30:39.490443 APIC: 02: enabled 1
1772 05:30:39.493571 PCI: 01:00.0: enabled 1
1773 05:30:39.496574 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1774 05:30:39.503226 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 05:30:39.506675 ELOG: NV offset 0xf30000 size 0x1000
1776 05:30:39.513809 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 05:30:39.520215 ELOG: Event(17) added with size 13 at 2024-02-19 05:30:39 UTC
1778 05:30:39.526897 ELOG: Event(92) added with size 9 at 2024-02-19 05:30:39 UTC
1779 05:30:39.533624 ELOG: Event(93) added with size 9 at 2024-02-19 05:30:39 UTC
1780 05:30:39.540076 ELOG: Event(9E) added with size 10 at 2024-02-19 05:30:39 UTC
1781 05:30:39.546496 ELOG: Event(9F) added with size 14 at 2024-02-19 05:30:39 UTC
1782 05:30:39.549951 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1783 05:30:39.556670 ELOG: Event(A1) added with size 10 at 2024-02-19 05:30:39 UTC
1784 05:30:39.566983 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1785 05:30:39.573158 ELOG: Event(A0) added with size 9 at 2024-02-19 05:30:39 UTC
1786 05:30:39.576566 elog_add_boot_reason: Logged dev mode boot
1787 05:30:39.583212 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1788 05:30:39.583607 Finalize devices...
1789 05:30:39.586655 Devices finalized
1790 05:30:39.592929 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1791 05:30:39.596130 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1792 05:30:39.603115 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1793 05:30:39.606568 ME: HFSTS1 : 0x80030055
1794 05:30:39.612897 ME: HFSTS2 : 0x30280116
1795 05:30:39.616281 ME: HFSTS3 : 0x00000050
1796 05:30:39.619741 ME: HFSTS4 : 0x00004000
1797 05:30:39.626022 ME: HFSTS5 : 0x00000000
1798 05:30:39.629516 ME: HFSTS6 : 0x40400006
1799 05:30:39.632696 ME: Manufacturing Mode : YES
1800 05:30:39.635876 ME: SPI Protection Mode Enabled : NO
1801 05:30:39.639466 ME: FW Partition Table : OK
1802 05:30:39.642461 ME: Bringup Loader Failure : NO
1803 05:30:39.649920 ME: Firmware Init Complete : NO
1804 05:30:39.653015 ME: Boot Options Present : NO
1805 05:30:39.655732 ME: Update In Progress : NO
1806 05:30:39.659550 ME: D0i3 Support : YES
1807 05:30:39.662338 ME: Low Power State Enabled : NO
1808 05:30:39.665939 ME: CPU Replaced : YES
1809 05:30:39.669369 ME: CPU Replacement Valid : YES
1810 05:30:39.672582 ME: Current Working State : 5
1811 05:30:39.679311 ME: Current Operation State : 1
1812 05:30:39.682736 ME: Current Operation Mode : 3
1813 05:30:39.685537 ME: Error Code : 0
1814 05:30:39.689102 ME: Enhanced Debug Mode : NO
1815 05:30:39.692334 ME: CPU Debug Disabled : YES
1816 05:30:39.695790 ME: TXT Support : NO
1817 05:30:39.702027 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1818 05:30:39.708671 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1819 05:30:39.712129 CBFS: 'fallback/slic' not found.
1820 05:30:39.715520 ACPI: Writing ACPI tables at 76b01000.
1821 05:30:39.719019 ACPI: * FACS
1822 05:30:39.719404 ACPI: * DSDT
1823 05:30:39.725794 Ramoops buffer: 0x100000@0x76a00000.
1824 05:30:39.728660 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1825 05:30:39.732004 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1826 05:30:39.736071 Google Chrome EC: version:
1827 05:30:39.739485 ro: voema_v2.0.10114-a447f03e46
1828 05:30:39.743232 rw: voema_v2.0.10114-a447f03e46
1829 05:30:39.746427 running image: 2
1830 05:30:39.752680 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1831 05:30:39.756083 ACPI: * FADT
1832 05:30:39.756467 SCI is IRQ9
1833 05:30:39.759497 ACPI: added table 1/32, length now 40
1834 05:30:39.762630 ACPI: * SSDT
1835 05:30:39.766232 Found 1 CPU(s) with 8 core(s) each.
1836 05:30:39.772753 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1837 05:30:39.776145 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1838 05:30:39.779647 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1839 05:30:39.782919 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1840 05:30:39.789522 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1841 05:30:39.795761 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1842 05:30:39.799280 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1843 05:30:39.806076 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1844 05:30:39.812546 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1845 05:30:39.815901 \_SB.PCI0.RP09: Added StorageD3Enable property
1846 05:30:39.819562 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1847 05:30:39.825663 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1848 05:30:39.832774 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1849 05:30:39.835522 PS2K: Passing 80 keymaps to kernel
1850 05:30:39.842295 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1851 05:30:39.849462 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1852 05:30:39.855777 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1853 05:30:39.862745 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1854 05:30:39.869130 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1855 05:30:39.875670 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1856 05:30:39.882437 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1857 05:30:39.889148 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1858 05:30:39.892262 ACPI: added table 2/32, length now 44
1859 05:30:39.892681 ACPI: * MCFG
1860 05:30:39.898906 ACPI: added table 3/32, length now 48
1861 05:30:39.899317 ACPI: * TPM2
1862 05:30:39.902241 TPM2 log created at 0x769f0000
1863 05:30:39.905823 ACPI: added table 4/32, length now 52
1864 05:30:39.908983 ACPI: * MADT
1865 05:30:39.909335 SCI is IRQ9
1866 05:30:39.912462 ACPI: added table 5/32, length now 56
1867 05:30:39.915253 current = 76b09850
1868 05:30:39.915638 ACPI: * DMAR
1869 05:30:39.918713 ACPI: added table 6/32, length now 60
1870 05:30:39.925353 ACPI: added table 7/32, length now 64
1871 05:30:39.925801 ACPI: * HPET
1872 05:30:39.928735 ACPI: added table 8/32, length now 68
1873 05:30:39.931924 ACPI: done.
1874 05:30:39.932383 ACPI tables: 35216 bytes.
1875 05:30:39.935462 smbios_write_tables: 769ef000
1876 05:30:39.938898 EC returned error result code 3
1877 05:30:39.942328 Couldn't obtain OEM name from CBI
1878 05:30:39.946862 Create SMBIOS type 16
1879 05:30:39.949986 Create SMBIOS type 17
1880 05:30:39.953285 GENERIC: 0.0 (WIFI Device)
1881 05:30:39.953651 SMBIOS tables: 1734 bytes.
1882 05:30:39.960220 Writing table forward entry at 0x00000500
1883 05:30:39.966432 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1884 05:30:39.970014 Writing coreboot table at 0x76b25000
1885 05:30:39.976573 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1886 05:30:39.979866 1. 0000000000001000-000000000009ffff: RAM
1887 05:30:39.983741 2. 00000000000a0000-00000000000fffff: RESERVED
1888 05:30:39.989852 3. 0000000000100000-00000000769eefff: RAM
1889 05:30:39.993193 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1890 05:30:39.999926 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1891 05:30:40.006551 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1892 05:30:40.009684 7. 0000000077000000-000000007fbfffff: RESERVED
1893 05:30:40.013092 8. 00000000c0000000-00000000cfffffff: RESERVED
1894 05:30:40.019970 9. 00000000f8000000-00000000f9ffffff: RESERVED
1895 05:30:40.023048 10. 00000000fb000000-00000000fb000fff: RESERVED
1896 05:30:40.029784 11. 00000000fe000000-00000000fe00ffff: RESERVED
1897 05:30:40.033279 12. 00000000fed80000-00000000fed87fff: RESERVED
1898 05:30:40.039775 13. 00000000fed90000-00000000fed92fff: RESERVED
1899 05:30:40.043330 14. 00000000feda0000-00000000feda1fff: RESERVED
1900 05:30:40.049965 15. 00000000fedc0000-00000000feddffff: RESERVED
1901 05:30:40.053197 16. 0000000100000000-00000004803fffff: RAM
1902 05:30:40.056597 Passing 4 GPIOs to payload:
1903 05:30:40.059555 NAME | PORT | POLARITY | VALUE
1904 05:30:40.066424 lid | undefined | high | high
1905 05:30:40.069897 power | undefined | high | low
1906 05:30:40.076524 oprom | undefined | high | low
1907 05:30:40.082911 EC in RW | 0x000000e5 | high | high
1908 05:30:40.090053 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1909 05:30:40.090604 coreboot table: 1576 bytes.
1910 05:30:40.093252 IMD ROOT 0. 0x76fff000 0x00001000
1911 05:30:40.099930 IMD SMALL 1. 0x76ffe000 0x00001000
1912 05:30:40.102937 FSP MEMORY 2. 0x76c4e000 0x003b0000
1913 05:30:40.106212 VPD 3. 0x76c4d000 0x00000367
1914 05:30:40.109515 RO MCACHE 4. 0x76c4c000 0x00000fdc
1915 05:30:40.112944 CONSOLE 5. 0x76c2c000 0x00020000
1916 05:30:40.116117 FMAP 6. 0x76c2b000 0x00000578
1917 05:30:40.119253 TIME STAMP 7. 0x76c2a000 0x00000910
1918 05:30:40.122814 VBOOT WORK 8. 0x76c16000 0x00014000
1919 05:30:40.129447 ROMSTG STCK 9. 0x76c15000 0x00001000
1920 05:30:40.132920 AFTER CAR 10. 0x76c0a000 0x0000b000
1921 05:30:40.136058 RAMSTAGE 11. 0x76b97000 0x00073000
1922 05:30:40.139330 REFCODE 12. 0x76b42000 0x00055000
1923 05:30:40.142537 SMM BACKUP 13. 0x76b32000 0x00010000
1924 05:30:40.145996 4f444749 14. 0x76b30000 0x00002000
1925 05:30:40.149402 EXT VBT15. 0x76b2d000 0x0000219f
1926 05:30:40.152674 COREBOOT 16. 0x76b25000 0x00008000
1927 05:30:40.156039 ACPI 17. 0x76b01000 0x00024000
1928 05:30:40.162831 ACPI GNVS 18. 0x76b00000 0x00001000
1929 05:30:40.166284 RAMOOPS 19. 0x76a00000 0x00100000
1930 05:30:40.169155 TPM2 TCGLOG20. 0x769f0000 0x00010000
1931 05:30:40.172737 SMBIOS 21. 0x769ef000 0x00000800
1932 05:30:40.173123 IMD small region:
1933 05:30:40.179345 IMD ROOT 0. 0x76ffec00 0x00000400
1934 05:30:40.182740 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1935 05:30:40.186210 POWER STATE 2. 0x76ffeb80 0x00000044
1936 05:30:40.189434 ROMSTAGE 3. 0x76ffeb60 0x00000004
1937 05:30:40.192670 MEM INFO 4. 0x76ffe980 0x000001e0
1938 05:30:40.199515 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1939 05:30:40.202904 MTRR: Physical address space:
1940 05:30:40.209439 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1941 05:30:40.216234 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1942 05:30:40.223092 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1943 05:30:40.229007 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1944 05:30:40.232545 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1945 05:30:40.238911 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1946 05:30:40.245451 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1947 05:30:40.248604 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 05:30:40.255656 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 05:30:40.258988 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 05:30:40.262383 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 05:30:40.265329 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 05:30:40.272316 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 05:30:40.275049 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 05:30:40.278598 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 05:30:40.281860 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 05:30:40.288604 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 05:30:40.292113 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 05:30:40.295469 call enable_fixed_mtrr()
1959 05:30:40.298732 CPU physical address size: 39 bits
1960 05:30:40.305230 MTRR: default type WB/UC MTRR counts: 6/7.
1961 05:30:40.308728 MTRR: WB selected as default type.
1962 05:30:40.315381 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1963 05:30:40.318722 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1964 05:30:40.325100 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1965 05:30:40.331791 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1966 05:30:40.338352 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1967 05:30:40.344893 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1968 05:30:40.348759
1969 05:30:40.348862 MTRR check
1970 05:30:40.352443 Fixed MTRRs : Enabled
1971 05:30:40.352539 Variable MTRRs: Enabled
1972 05:30:40.352661
1973 05:30:40.359046 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 05:30:40.362332 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 05:30:40.365727 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 05:30:40.369127 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 05:30:40.375333 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 05:30:40.378607 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 05:30:40.382004 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 05:30:40.385342 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 05:30:40.392086 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 05:30:40.395488 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 05:30:40.398742 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 05:30:40.406050 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 05:30:40.406153 call enable_fixed_mtrr()
1986 05:30:40.413031 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 05:30:40.416126 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 05:30:40.419907 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 05:30:40.422774 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 05:30:40.429557 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 05:30:40.432956 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 05:30:40.436287 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 05:30:40.440030 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 05:30:40.446109 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 05:30:40.449198 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 05:30:40.452687 CPU physical address size: 39 bits
1997 05:30:40.458066 call enable_fixed_mtrr()
1998 05:30:40.461363 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 05:30:40.467979 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 05:30:40.471617 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 05:30:40.475238 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 05:30:40.478274 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 05:30:40.484704 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 05:30:40.488031 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 05:30:40.491434 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 05:30:40.495179 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 05:30:40.501536 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 05:30:40.504751 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 05:30:40.507552 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 05:30:40.515044 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 05:30:40.515484 call enable_fixed_mtrr()
2012 05:30:40.522063 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 05:30:40.525063 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 05:30:40.528996 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 05:30:40.531616 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 05:30:40.538467 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 05:30:40.541851 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 05:30:40.545079 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 05:30:40.548368 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 05:30:40.555005 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 05:30:40.558242 CPU physical address size: 39 bits
2022 05:30:40.563228 call enable_fixed_mtrr()
2023 05:30:40.566611 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 05:30:40.569848 CPU physical address size: 39 bits
2025 05:30:40.576797 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 05:30:40.579739 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 05:30:40.583463 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 05:30:40.586556 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 05:30:40.593299 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 05:30:40.596976 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 05:30:40.600020 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 05:30:40.603350 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 05:30:40.610048 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 05:30:40.613109 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 05:30:40.620151 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 05:30:40.620538 call enable_fixed_mtrr()
2037 05:30:40.626945 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 05:30:40.629668 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 05:30:40.633145 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 05:30:40.636685 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 05:30:40.642946 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 05:30:40.646578 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 05:30:40.649800 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 05:30:40.653109 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 05:30:40.659757 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 05:30:40.662780 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 05:30:40.666465 CPU physical address size: 39 bits
2048 05:30:40.673172 call enable_fixed_mtrr()
2049 05:30:40.679984 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2050 05:30:40.683396 MTRR: Fixed MSR 0x250 0x0606060606060606
2051 05:30:40.686924 Checking cr50 for pending updates
2052 05:30:40.690292 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 05:30:40.693506 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 05:30:40.700319 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 05:30:40.703831 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 05:30:40.706766 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 05:30:40.710126 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 05:30:40.713274 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 05:30:40.719967 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 05:30:40.723445 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 05:30:40.726387 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 05:30:40.731926 Reading cr50 TPM mode
2063 05:30:40.735409 call enable_fixed_mtrr()
2064 05:30:40.738952 CPU physical address size: 39 bits
2065 05:30:40.741953 BS: BS_PAYLOAD_LOAD entry times (exec / console): 50 / 8 ms
2066 05:30:40.745891 CPU physical address size: 39 bits
2067 05:30:40.755821 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2068 05:30:40.758936 CPU physical address size: 39 bits
2069 05:30:40.765411 Checking segment from ROM address 0xffc02b38
2070 05:30:40.769045 Checking segment from ROM address 0xffc02b54
2071 05:30:40.775266 Loading segment from ROM address 0xffc02b38
2072 05:30:40.775817 code (compression=0)
2073 05:30:40.785771 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2074 05:30:40.792178 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2075 05:30:40.795349 it's not compressed!
2076 05:30:40.944671 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2077 05:30:40.951468 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2078 05:30:40.958516 Loading segment from ROM address 0xffc02b54
2079 05:30:40.961482 Entry Point 0x30000000
2080 05:30:40.961924 Loaded segments
2081 05:30:40.967924 BS: BS_PAYLOAD_LOAD run times (exec / console): 153 / 65 ms
2082 05:30:41.013905 Finalizing chipset.
2083 05:30:41.017049 Finalizing SMM.
2084 05:30:41.017489 APMC done.
2085 05:30:41.023889 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2086 05:30:41.027235 mp_park_aps done after 0 msecs.
2087 05:30:41.030704 Jumping to boot code at 0x30000000(0x76b25000)
2088 05:30:41.040560 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2089 05:30:41.041096
2090 05:30:41.041439
2091 05:30:41.043371
2092 05:30:41.043789 Starting depthcharge on Voema...
2093 05:30:41.044867 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2094 05:30:41.045355 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2095 05:30:41.045763 Setting prompt string to ['volteer:']
2096 05:30:41.046186 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2097 05:30:41.046859
2098 05:30:41.053846 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2099 05:30:41.054282
2100 05:30:41.060009 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2101 05:30:41.060435
2102 05:30:41.066890 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2103 05:30:41.067317
2104 05:30:41.070236 Failed to find eMMC card reader
2105 05:30:41.070680
2106 05:30:41.071017 Wipe memory regions:
2107 05:30:41.073307
2108 05:30:41.076483 [0x00000000001000, 0x000000000a0000)
2109 05:30:41.076955
2110 05:30:41.079925 [0x00000000100000, 0x00000030000000)
2111 05:30:41.119101
2112 05:30:41.122205 [0x00000032662db0, 0x000000769ef000)
2113 05:30:41.176186
2114 05:30:41.179495 [0x00000100000000, 0x00000480400000)
2115 05:30:41.856023
2116 05:30:41.858911 ec_init: CrosEC protocol v3 supported (256, 256)
2117 05:30:42.291859
2118 05:30:42.292317 R8152: Initializing
2119 05:30:42.292671
2120 05:30:42.295438 Version 6 (ocp_data = 5c30)
2121 05:30:42.295905
2122 05:30:42.298655 R8152: Done initializing
2123 05:30:42.299055
2124 05:30:42.301712 Adding net device
2125 05:30:42.602822
2126 05:30:42.606199 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 05:30:42.606628
2128 05:30:42.606965
2129 05:30:42.607280
2130 05:30:42.610121 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 05:30:42.711392 volteer: tftpboot 192.168.201.1 12799741/tftp-deploy-xuuj5cil/kernel/bzImage 12799741/tftp-deploy-xuuj5cil/kernel/cmdline 12799741/tftp-deploy-xuuj5cil/ramdisk/ramdisk.cpio.gz
2133 05:30:42.711982 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 05:30:42.712421 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2135 05:30:42.716731 tftpboot 192.168.201.1 12799741/tftp-deploy-xuuj5cil/kernel/bzImloy-xuuj5cil/kernel/cmdline 12799741/tftp-deploy-xuuj5cil/ramdisk/ramdisk.cpio.gz
2136 05:30:42.717233
2137 05:30:42.717589 Waiting for link
2138 05:30:42.920407
2139 05:30:42.920608 done.
2140 05:30:42.920725
2141 05:30:42.920798 MAC: 00:24:32:30:77:d1
2142 05:30:42.920877
2143 05:30:42.923740 Sending DHCP discover... done.
2144 05:30:42.923825
2145 05:30:42.927170 Waiting for reply... done.
2146 05:30:42.927256
2147 05:30:42.930637 Sending DHCP request... done.
2148 05:30:42.930722
2149 05:30:42.937289 Waiting for reply... done.
2150 05:30:42.937383
2151 05:30:42.937456 My ip is 192.168.201.13
2152 05:30:42.937525
2153 05:30:42.940579 The DHCP server ip is 192.168.201.1
2154 05:30:42.940699
2155 05:30:42.947361 TFTP server IP predefined by user: 192.168.201.1
2156 05:30:42.947456
2157 05:30:42.953580 Bootfile predefined by user: 12799741/tftp-deploy-xuuj5cil/kernel/bzImage
2158 05:30:42.953674
2159 05:30:42.956993 Sending tftp read request... done.
2160 05:30:42.957088
2161 05:30:42.960519 Waiting for the transfer...
2162 05:30:42.960611
2163 05:30:43.638344 00000000 ################################################################
2164 05:30:43.638490
2165 05:30:44.270033 00080000 ################################################################
2166 05:30:44.270179
2167 05:30:44.832129 00100000 ################################################################
2168 05:30:44.832277
2169 05:30:45.428849 00180000 ################################################################
2170 05:30:45.428998
2171 05:30:46.081541 00200000 ################################################################
2172 05:30:46.081680
2173 05:30:46.738662 00280000 ################################################################
2174 05:30:46.738805
2175 05:30:47.353308 00300000 ################################################################
2176 05:30:47.353455
2177 05:30:47.924493 00380000 ################################################################
2178 05:30:47.924688
2179 05:30:48.477512 00400000 ################################################################
2180 05:30:48.477659
2181 05:30:49.009012 00480000 ################################################################
2182 05:30:49.009168
2183 05:30:49.543538 00500000 ################################################################
2184 05:30:49.543691
2185 05:30:50.086659 00580000 ################################################################
2186 05:30:50.086831
2187 05:30:50.641682 00600000 ################################################################
2188 05:30:50.641863
2189 05:30:51.185721 00680000 ################################################################
2190 05:30:51.185903
2191 05:30:51.730509 00700000 ################################################################
2192 05:30:51.730653
2193 05:30:52.281620 00780000 ################################################################
2194 05:30:52.281799
2195 05:30:52.862111 00800000 ################################################################
2196 05:30:52.862261
2197 05:30:53.415617 00880000 ################################################################
2198 05:30:53.415767
2199 05:30:53.954261 00900000 ################################################################
2200 05:30:53.954411
2201 05:30:54.493212 00980000 ################################################################
2202 05:30:54.493368
2203 05:30:55.052676 00a00000 ################################################################
2204 05:30:55.052889
2205 05:30:55.587701 00a80000 ################################################################
2206 05:30:55.587915
2207 05:30:55.636551 00b00000 ###### done.
2208 05:30:55.636769
2209 05:30:55.639757 The bootfile was 11579392 bytes long.
2210 05:30:55.639881
2211 05:30:55.643016 Sending tftp read request... done.
2212 05:30:55.643147
2213 05:30:55.645961 Waiting for the transfer...
2214 05:30:55.646091
2215 05:30:56.179509 00000000 ################################################################
2216 05:30:56.179685
2217 05:30:56.707618 00080000 ################################################################
2218 05:30:56.707784
2219 05:30:57.233170 00100000 ################################################################
2220 05:30:57.233382
2221 05:30:57.755780 00180000 ################################################################
2222 05:30:57.755970
2223 05:30:58.279502 00200000 ################################################################
2224 05:30:58.279702
2225 05:30:58.805324 00280000 ################################################################
2226 05:30:58.805502
2227 05:30:59.326431 00300000 ################################################################
2228 05:30:59.326597
2229 05:30:59.850773 00380000 ################################################################
2230 05:30:59.850944
2231 05:31:00.376138 00400000 ################################################################
2232 05:31:00.376300
2233 05:31:00.898472 00480000 ################################################################
2234 05:31:00.898640
2235 05:31:01.421445 00500000 ################################################################
2236 05:31:01.421645
2237 05:31:01.948000 00580000 ################################################################
2238 05:31:01.948163
2239 05:31:02.467939 00600000 ################################################################
2240 05:31:02.468105
2241 05:31:03.006528 00680000 ################################################################
2242 05:31:03.006694
2243 05:31:03.548463 00700000 ################################################################
2244 05:31:03.548634
2245 05:31:04.077959 00780000 ################################################################
2246 05:31:04.078109
2247 05:31:04.652156 00800000 ################################################################
2248 05:31:04.652306
2249 05:31:04.994361 00880000 ###################################### done.
2250 05:31:04.994519
2251 05:31:04.997638 Sending tftp read request... done.
2252 05:31:04.997733
2253 05:31:05.001107 Waiting for the transfer...
2254 05:31:05.001202
2255 05:31:05.001299 00000000 # done.
2256 05:31:05.001393
2257 05:31:05.010778 Command line loaded dynamically from TFTP file: 12799741/tftp-deploy-xuuj5cil/kernel/cmdline
2258 05:31:05.010878
2259 05:31:05.027246 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2260 05:31:05.030736
2261 05:31:05.034024 Shutting down all USB controllers.
2262 05:31:05.034116
2263 05:31:05.034211 Removing current net device
2264 05:31:05.034304
2265 05:31:05.037301 Finalizing coreboot
2266 05:31:05.037395
2267 05:31:05.044288 Exiting depthcharge with code 4 at timestamp: 32584742
2268 05:31:05.044382
2269 05:31:05.044478
2270 05:31:05.044596 Starting kernel ...
2271 05:31:05.044696
2272 05:31:05.044785
2273 05:31:05.045266 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2274 05:31:05.045390 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2275 05:31:05.045478 Setting prompt string to ['Linux version [0-9]']
2276 05:31:05.045556 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2277 05:31:05.045635 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2279 05:35:26.046251 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2281 05:35:26.047162 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2283 05:35:26.047899 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2286 05:35:26.049572 end: 2 depthcharge-action (duration 00:05:00) [common]
2288 05:35:26.050641 Cleaning after the job
2289 05:35:26.051046 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12799741/tftp-deploy-xuuj5cil/ramdisk
2290 05:35:26.056937 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12799741/tftp-deploy-xuuj5cil/kernel
2291 05:35:26.063766 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12799741/tftp-deploy-xuuj5cil/modules
2292 05:35:26.066799 start: 5.1 power-off (timeout 00:00:30) [common]
2293 05:35:26.067523 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2294 05:35:26.189823 >> Command sent successfully.
2295 05:35:26.194659 Returned 0 in 0 seconds
2296 05:35:26.295636 end: 5.1 power-off (duration 00:00:00) [common]
2298 05:35:26.297216 start: 5.2 read-feedback (timeout 00:10:00) [common]
2299 05:35:26.298413 Listened to connection for namespace 'common' for up to 1s
2300 05:35:27.299116 Finalising connection for namespace 'common'
2301 05:35:27.299775 Disconnecting from shell: Finalise
2302 05:35:27.300174
2303 05:35:27.401105 end: 5.2 read-feedback (duration 00:00:01) [common]
2304 05:35:27.401692 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12799741
2305 05:35:27.456952 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12799741
2306 05:35:27.457184 JobError: Your job cannot terminate cleanly.