Boot log: acer-cp514-2h-1130g7-volteer

    1 18:34:04.905508  lava-dispatcher, installed at version: 2024.03
    2 18:34:04.905705  start: 0 validate
    3 18:34:04.905838  Start time: 2024-06-06 18:34:04.905831+00:00 (UTC)
    4 18:34:04.905973  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:34:04.906101  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
    6 18:34:05.171991  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:34:05.172164  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.315-cip110%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 18:34:05.429082  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:34:05.429259  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.315-cip110%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 18:34:09.554827  validate duration: 4.65
   12 18:34:09.555128  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 18:34:09.555300  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 18:34:09.555403  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 18:34:09.555539  Not decompressing ramdisk as can be used compressed.
   16 18:34:09.555633  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
   17 18:34:09.555700  saving as /var/lib/lava/dispatcher/tmp/14214089/tftp-deploy-ywqn_dor/ramdisk/rootfs.cpio.gz
   18 18:34:09.555766  total size: 8417901 (8 MB)
   19 18:34:10.451583  progress   0 % (0 MB)
   20 18:34:10.454084  progress   5 % (0 MB)
   21 18:34:10.456503  progress  10 % (0 MB)
   22 18:34:10.458962  progress  15 % (1 MB)
   23 18:34:10.461505  progress  20 % (1 MB)
   24 18:34:10.463904  progress  25 % (2 MB)
   25 18:34:10.466354  progress  30 % (2 MB)
   26 18:34:10.468617  progress  35 % (2 MB)
   27 18:34:10.471060  progress  40 % (3 MB)
   28 18:34:10.473504  progress  45 % (3 MB)
   29 18:34:10.475865  progress  50 % (4 MB)
   30 18:34:10.478288  progress  55 % (4 MB)
   31 18:34:10.480668  progress  60 % (4 MB)
   32 18:34:10.482851  progress  65 % (5 MB)
   33 18:34:10.485211  progress  70 % (5 MB)
   34 18:34:10.487558  progress  75 % (6 MB)
   35 18:34:10.490200  progress  80 % (6 MB)
   36 18:34:10.492812  progress  85 % (6 MB)
   37 18:34:10.495287  progress  90 % (7 MB)
   38 18:34:10.497648  progress  95 % (7 MB)
   39 18:34:10.499792  progress 100 % (8 MB)
   40 18:34:10.500066  8 MB downloaded in 0.94 s (8.50 MB/s)
   41 18:34:10.500277  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 18:34:10.500708  end: 1.1 download-retry (duration 00:00:01) [common]
   44 18:34:10.500836  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 18:34:10.500952  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 18:34:10.501117  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.315-cip110/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 18:34:10.501214  saving as /var/lib/lava/dispatcher/tmp/14214089/tftp-deploy-ywqn_dor/kernel/bzImage
   48 18:34:10.501313  total size: 17121280 (16 MB)
   49 18:34:10.501405  No compression specified
   50 18:34:10.502762  progress   0 % (0 MB)
   51 18:34:10.507528  progress   5 % (0 MB)
   52 18:34:10.512238  progress  10 % (1 MB)
   53 18:34:10.517054  progress  15 % (2 MB)
   54 18:34:10.521853  progress  20 % (3 MB)
   55 18:34:10.526582  progress  25 % (4 MB)
   56 18:34:10.531291  progress  30 % (4 MB)
   57 18:34:10.536088  progress  35 % (5 MB)
   58 18:34:10.540852  progress  40 % (6 MB)
   59 18:34:10.545805  progress  45 % (7 MB)
   60 18:34:10.550540  progress  50 % (8 MB)
   61 18:34:10.555310  progress  55 % (9 MB)
   62 18:34:10.560037  progress  60 % (9 MB)
   63 18:34:10.564783  progress  65 % (10 MB)
   64 18:34:10.569513  progress  70 % (11 MB)
   65 18:34:10.574187  progress  75 % (12 MB)
   66 18:34:10.578804  progress  80 % (13 MB)
   67 18:34:10.583595  progress  85 % (13 MB)
   68 18:34:10.588239  progress  90 % (14 MB)
   69 18:34:10.592928  progress  95 % (15 MB)
   70 18:34:10.597504  progress 100 % (16 MB)
   71 18:34:10.597688  16 MB downloaded in 0.10 s (169.43 MB/s)
   72 18:34:10.597851  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 18:34:10.598109  end: 1.2 download-retry (duration 00:00:00) [common]
   75 18:34:10.598199  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 18:34:10.598297  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 18:34:10.598458  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.315-cip110/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 18:34:10.598566  saving as /var/lib/lava/dispatcher/tmp/14214089/tftp-deploy-ywqn_dor/modules/modules.tar
   79 18:34:10.598659  total size: 1253780 (1 MB)
   80 18:34:10.598753  Using unxz to decompress xz
   81 18:34:10.602874  progress   2 % (0 MB)
   82 18:34:10.603481  progress   7 % (0 MB)
   83 18:34:10.607501  progress  13 % (0 MB)
   84 18:34:10.611583  progress  18 % (0 MB)
   85 18:34:10.616221  progress  23 % (0 MB)
   86 18:34:10.620208  progress  28 % (0 MB)
   87 18:34:10.624227  progress  33 % (0 MB)
   88 18:34:10.627712  progress  39 % (0 MB)
   89 18:34:10.631554  progress  44 % (0 MB)
   90 18:34:10.636489  progress  49 % (0 MB)
   91 18:34:10.640458  progress  54 % (0 MB)
   92 18:34:10.644114  progress  60 % (0 MB)
   93 18:34:10.648704  progress  65 % (0 MB)
   94 18:34:10.651902  progress  70 % (0 MB)
   95 18:34:10.655919  progress  75 % (0 MB)
   96 18:34:10.659839  progress  81 % (0 MB)
   97 18:34:10.664208  progress  86 % (1 MB)
   98 18:34:10.668281  progress  91 % (1 MB)
   99 18:34:10.672297  progress  96 % (1 MB)
  100 18:34:10.681907  1 MB downloaded in 0.08 s (14.36 MB/s)
  101 18:34:10.682153  end: 1.3.1 http-download (duration 00:00:00) [common]
  103 18:34:10.682448  end: 1.3 download-retry (duration 00:00:00) [common]
  104 18:34:10.682577  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  105 18:34:10.682743  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  106 18:34:10.682880  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  107 18:34:10.683038  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  108 18:34:10.683313  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5
  109 18:34:10.683486  makedir: /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin
  110 18:34:10.683623  makedir: /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/tests
  111 18:34:10.683761  makedir: /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/results
  112 18:34:10.683909  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-add-keys
  113 18:34:10.684094  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-add-sources
  114 18:34:10.684264  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-background-process-start
  115 18:34:10.684426  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-background-process-stop
  116 18:34:10.684631  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-common-functions
  117 18:34:10.684770  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-echo-ipv4
  118 18:34:10.684896  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-install-packages
  119 18:34:10.685030  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-installed-packages
  120 18:34:10.685157  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-os-build
  121 18:34:10.685308  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-probe-channel
  122 18:34:10.685484  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-probe-ip
  123 18:34:10.685621  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-target-ip
  124 18:34:10.685745  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-target-mac
  125 18:34:10.685879  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-target-storage
  126 18:34:10.686006  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-test-case
  127 18:34:10.686129  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-test-event
  128 18:34:10.686300  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-test-feedback
  129 18:34:10.686476  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-test-raise
  130 18:34:10.686613  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-test-reference
  131 18:34:10.686753  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-test-runner
  132 18:34:10.686877  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-test-set
  133 18:34:10.687002  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-test-shell
  134 18:34:10.687137  Updating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-install-packages (oe)
  135 18:34:10.687282  Updating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/bin/lava-installed-packages (oe)
  136 18:34:10.687410  Creating /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/environment
  137 18:34:10.687531  LAVA metadata
  138 18:34:10.687609  - LAVA_JOB_ID=14214089
  139 18:34:10.687676  - LAVA_DISPATCHER_IP=192.168.201.1
  140 18:34:10.687779  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  141 18:34:10.687849  skipped lava-vland-overlay
  142 18:34:10.687942  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  143 18:34:10.688024  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  144 18:34:10.688088  skipped lava-multinode-overlay
  145 18:34:10.688180  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  146 18:34:10.688267  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  147 18:34:10.688343  Loading test definitions
  148 18:34:10.688482  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  149 18:34:10.688621  Using /lava-14214089 at stage 0
  150 18:34:10.688942  uuid=14214089_1.4.2.3.1 testdef=None
  151 18:34:10.689042  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  152 18:34:10.689131  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  153 18:34:10.689677  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  155 18:34:10.689926  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  156 18:34:10.690604  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  158 18:34:10.690991  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  159 18:34:10.691961  runner path: /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/0/tests/0_dmesg test_uuid 14214089_1.4.2.3.1
  160 18:34:10.692158  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  162 18:34:10.692521  Creating lava-test-runner.conf files
  163 18:34:10.692659  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14214089/lava-overlay-y17lw7c5/lava-14214089/0 for stage 0
  164 18:34:10.692753  - 0_dmesg
  165 18:34:10.692853  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  166 18:34:10.692955  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  167 18:34:10.701575  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  168 18:34:10.701703  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  169 18:34:10.701825  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  170 18:34:10.701952  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  171 18:34:10.702071  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  172 18:34:10.943853  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  173 18:34:10.944227  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  174 18:34:10.944353  extracting modules file /var/lib/lava/dispatcher/tmp/14214089/tftp-deploy-ywqn_dor/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14214089/extract-overlay-ramdisk-4a5w1nx1/ramdisk
  175 18:34:10.974895  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  176 18:34:10.975063  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  177 18:34:10.975164  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14214089/compress-overlay-tn6moc8d/overlay-1.4.2.4.tar.gz to ramdisk
  178 18:34:10.975237  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14214089/compress-overlay-tn6moc8d/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14214089/extract-overlay-ramdisk-4a5w1nx1/ramdisk
  179 18:34:10.981633  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  180 18:34:10.981746  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  181 18:34:10.981838  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  182 18:34:10.981929  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  183 18:34:10.982007  Building ramdisk /var/lib/lava/dispatcher/tmp/14214089/extract-overlay-ramdisk-4a5w1nx1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14214089/extract-overlay-ramdisk-4a5w1nx1/ramdisk
  184 18:34:11.129388  >> 62600 blocks

  185 18:34:12.168298  rename /var/lib/lava/dispatcher/tmp/14214089/extract-overlay-ramdisk-4a5w1nx1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14214089/tftp-deploy-ywqn_dor/ramdisk/ramdisk.cpio.gz
  186 18:34:12.168766  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  187 18:34:12.168901  start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
  188 18:34:12.169011  start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
  189 18:34:12.169109  No mkimage arch provided, not using FIT.
  190 18:34:12.169199  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  191 18:34:12.169286  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  192 18:34:12.169388  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  193 18:34:12.169479  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
  194 18:34:12.169558  No LXC device requested
  195 18:34:12.169638  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  196 18:34:12.169733  start: 1.6 deploy-device-env (timeout 00:09:57) [common]
  197 18:34:12.169819  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  198 18:34:12.169891  Checking files for TFTP limit of 4294967296 bytes.
  199 18:34:12.170287  end: 1 tftp-deploy (duration 00:00:03) [common]
  200 18:34:12.170419  start: 2 depthcharge-action (timeout 00:05:00) [common]
  201 18:34:12.170515  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  202 18:34:12.170643  substitutions:
  203 18:34:12.170714  - {DTB}: None
  204 18:34:12.170779  - {INITRD}: 14214089/tftp-deploy-ywqn_dor/ramdisk/ramdisk.cpio.gz
  205 18:34:12.170840  - {KERNEL}: 14214089/tftp-deploy-ywqn_dor/kernel/bzImage
  206 18:34:12.170899  - {LAVA_MAC}: None
  207 18:34:12.170957  - {PRESEED_CONFIG}: None
  208 18:34:12.171015  - {PRESEED_LOCAL}: None
  209 18:34:12.171072  - {RAMDISK}: 14214089/tftp-deploy-ywqn_dor/ramdisk/ramdisk.cpio.gz
  210 18:34:12.171129  - {ROOT_PART}: None
  211 18:34:12.171185  - {ROOT}: None
  212 18:34:12.171241  - {SERVER_IP}: 192.168.201.1
  213 18:34:12.171297  - {TEE}: None
  214 18:34:12.171352  Parsed boot commands:
  215 18:34:12.171406  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  216 18:34:12.171567  Parsed boot commands: tftpboot 192.168.201.1 14214089/tftp-deploy-ywqn_dor/kernel/bzImage 14214089/tftp-deploy-ywqn_dor/kernel/cmdline 14214089/tftp-deploy-ywqn_dor/ramdisk/ramdisk.cpio.gz
  217 18:34:12.171672  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  218 18:34:12.171832  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  219 18:34:12.171962  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  220 18:34:12.172085  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  221 18:34:12.172203  Not connected, no need to disconnect.
  222 18:34:12.172293  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  223 18:34:12.172385  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  224 18:34:12.172457  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-1'
  225 18:34:12.175799  Setting prompt string to ['lava-test: # ']
  226 18:34:12.176147  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  227 18:34:12.176259  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  228 18:34:12.176363  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  229 18:34:12.176455  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  230 18:34:12.176678  Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cp514-2h-1130g7-volteer-cbg-1']
  231 18:34:20.800287  Returned 0 in 8 seconds
  232 18:34:20.901215  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  234 18:34:20.902670  end: 2.2.2 reset-device (duration 00:00:09) [common]
  235 18:34:20.903235  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  236 18:34:20.903982  Setting prompt string to 'Starting depthcharge on Voema...'
  237 18:34:20.904634  Changing prompt to 'Starting depthcharge on Voema...'
  238 18:34:20.905114  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  239 18:34:20.906974  [Enter `^Ec?' for help]

  240 18:34:20.907412  

  241 18:34:20.907842  

  242 18:34:20.908399  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  243 18:34:20.908958  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  244 18:34:20.909309  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  245 18:34:20.909692  CPU: AES supported, TXT NOT supported, VT supported

  246 18:34:20.910240  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  247 18:34:20.910617  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  248 18:34:20.911210  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  249 18:34:20.911534  VBOOT: Loading verstage.

  250 18:34:20.911839  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  251 18:34:20.912228  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  252 18:34:20.912530  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  253 18:34:20.912875  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  254 18:34:20.913181  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  255 18:34:20.913477  

  256 18:34:20.913766  

  257 18:34:20.914054  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  258 18:34:20.914354  Probing TPM: . done!

  259 18:34:20.914820  TPM ready after 0 ms

  260 18:34:20.915089  Connected to device vid:did:rid of 1ae0:0028:00

  261 18:34:20.915372  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523

  262 18:34:20.915655  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  263 18:34:20.915930  Initialized TPM device CR50 revision 0

  264 18:34:20.916146  tlcl_send_startup: Startup return code is 0

  265 18:34:20.916472  TPM: setup succeeded

  266 18:34:20.916718  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  267 18:34:20.916932  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  268 18:34:20.917207  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  269 18:34:20.917422  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  270 18:34:20.917632  Chrome EC: UHEPI supported

  271 18:34:20.917841  Phase 1

  272 18:34:20.918049  FMAP: area GBB found @ 1805000 (458752 bytes)

  273 18:34:20.918258  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  274 18:34:20.918470  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  275 18:34:20.918819  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  276 18:34:20.919051  VB2:vb2_check_recovery() Recovery was requested manually

  277 18:34:20.919274  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  278 18:34:20.919641  Recovery requested (1009000e)

  279 18:34:20.919895  TPM: Extending digest for VBOOT: boot mode into PCR 0

  280 18:34:20.920057  tlcl_extend: response is 0

  281 18:34:20.920217  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  282 18:34:20.920423  tlcl_extend: response is 0

  283 18:34:20.920601  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  284 18:34:20.920764  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  285 18:34:20.921020  BS: verstage times (exec / console): total (unknown) / 147 ms

  286 18:34:20.921239  

  287 18:34:20.921410  

  288 18:34:20.921577  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  289 18:34:20.921779  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  290 18:34:20.921988  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  291 18:34:20.922149  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  292 18:34:20.922324  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  293 18:34:20.922483  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  294 18:34:20.922658  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  295 18:34:20.922815  TCO_STS:   0000 0000

  296 18:34:20.922992  GEN_PMCON: d0015038 00002200

  297 18:34:20.923149  GBLRST_CAUSE: 00000000 00000000

  298 18:34:20.923305  HPR_CAUSE0: 00000000

  299 18:34:20.923481  prev_sleep_state 5

  300 18:34:20.923638  Boot Count incremented to 31563

  301 18:34:20.923792  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  302 18:34:20.923957  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  303 18:34:20.924124  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  304 18:34:20.924286  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  305 18:34:20.924448  Chrome EC: UHEPI supported

  306 18:34:20.924641  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  307 18:34:20.924826  Probing TPM:  done!

  308 18:34:20.924951  Connected to device vid:did:rid of 1ae0:0028:00

  309 18:34:20.925076  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523

  310 18:34:20.925203  Initialized TPM device CR50 revision 0

  311 18:34:20.925325  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  312 18:34:20.925450  MRC: Hash idx 0x100b comparison successful.

  313 18:34:20.925575  MRC cache found, size faa8

  314 18:34:20.925708  bootmode is set to: 2

  315 18:34:20.925871  SPD index = 0

  316 18:34:20.926016  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  317 18:34:20.926145  SPD: module type is LPDDR4X

  318 18:34:20.926272  SPD: module part number is MT53E512M64D4NW-046

  319 18:34:20.926398  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  320 18:34:20.926522  SPD: device width 16 bits, bus width 16 bits

  321 18:34:20.926648  SPD: module size is 1024 MB (per channel)

  322 18:34:20.926772  CBMEM:

  323 18:34:20.926897  IMD: root @ 0x76fff000 254 entries.

  324 18:34:20.927045  IMD: root @ 0x76ffec00 62 entries.

  325 18:34:20.927170  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  326 18:34:20.927534  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  327 18:34:20.927698  External stage cache:

  328 18:34:20.927827  IMD: root @ 0x7b3ff000 254 entries.

  329 18:34:20.927954  IMD: root @ 0x7b3fec00 62 entries.

  330 18:34:20.928079  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  331 18:34:20.928203  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  332 18:34:20.928329  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  333 18:34:20.928454  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  334 18:34:20.928597  cse_lite: Skip switching to RW in the recovery path

  335 18:34:20.928743  8 DIMMs found

  336 18:34:20.928871  SMM Memory Map

  337 18:34:20.929023  SMRAM       : 0x7b000000 0x800000

  338 18:34:20.929179   Subregion 0: 0x7b000000 0x200000

  339 18:34:20.929327   Subregion 1: 0x7b200000 0x200000

  340 18:34:20.929455   Subregion 2: 0x7b400000 0x400000

  341 18:34:20.929598  top_of_ram = 0x77000000

  342 18:34:20.929746  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  343 18:34:20.929879  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  344 18:34:20.929985  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  345 18:34:20.930089  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  346 18:34:20.930193  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  347 18:34:20.930297  Decompressing stage fallback/postcar @ 0x76c0bfc0 (38208 bytes)

  348 18:34:20.930402  Loading module at 0x76c0c000 with entry 0x76c0c000. filesize: 0x5150 memsize: 0x9500

  349 18:34:20.930508  Processing 211 relocs. Offset value of 0x74c0c000

  350 18:34:20.930611  BS: romstage times (exec / console): total (unknown) / 277 ms

  351 18:34:20.930715  

  352 18:34:20.930817  

  353 18:34:20.930920  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  354 18:34:20.931052  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  355 18:34:20.931170  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  356 18:34:20.931277  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  357 18:34:20.931382  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4d0ec

  358 18:34:20.931488  Decompressing stage fallback/ramstage @ 0x76b98fc0 (463536 bytes)

  359 18:34:20.931593  Loading module at 0x76b99000 with entry 0x76b99000. filesize: 0x4d5d8 memsize: 0x71270

  360 18:34:20.931699  Processing 5008 relocs. Offset value of 0x75d99000

  361 18:34:20.931804  BS: postcar times (exec / console): total (unknown) / 59 ms

  362 18:34:20.931908  

  363 18:34:20.932012  

  364 18:34:20.932115  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  365 18:34:20.932220  Normal boot

  366 18:34:20.932329  FW_CONFIG value is 0x804c02

  367 18:34:20.932433  PCI: 00:07.0 disabled by fw_config

  368 18:34:20.932535  PCI: 00:07.1 disabled by fw_config

  369 18:34:20.932646  PCI: 00:0d.2 disabled by fw_config

  370 18:34:20.932750  PCI: 00:1c.7 disabled by fw_config

  371 18:34:20.932871  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  372 18:34:20.932980  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  373 18:34:20.933097  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  374 18:34:20.933217  GENERIC: 0.0 disabled by fw_config

  375 18:34:20.933320  GENERIC: 1.0 disabled by fw_config

  376 18:34:20.933442  fw_config match found: DB_USB=USB3_ACTIVE

  377 18:34:20.933546  fw_config match found: DB_USB=USB3_ACTIVE

  378 18:34:20.933651  fw_config match found: DB_USB=USB3_ACTIVE

  379 18:34:20.933755  fw_config match found: DB_USB=USB3_ACTIVE

  380 18:34:20.933858  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  381 18:34:20.933962  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  382 18:34:20.934066  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  383 18:34:20.934171  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4d09c

  384 18:34:20.934275  microcode: sig=0x806c1 pf=0x80 revision=0x86

  385 18:34:20.934380  microcode: Update skipped, already up-to-date

  386 18:34:20.934499  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4d30c

  387 18:34:20.934604  Detected 4 core, 8 thread CPU.

  388 18:34:20.934708  Setting up SMI for CPU

  389 18:34:20.934821  IED base = 0x7b400000

  390 18:34:20.934909  IED size = 0x00400000

  391 18:34:20.935012  Will perform SMM setup.

  392 18:34:20.935101  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  393 18:34:20.935210  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  394 18:34:20.935301  Processing 16 relocs. Offset value of 0x00030000

  395 18:34:20.935402  Attempting to start 7 APs

  396 18:34:20.935493  Waiting for 10ms after sending INIT.

  397 18:34:20.935582  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  398 18:34:20.935671  done.

  399 18:34:20.935759  AP: slot 2 apic_id 3.

  400 18:34:20.935848  AP: slot 6 apic_id 2.

  401 18:34:20.935937  Waiting for 2nd SIPI to complete...done.

  402 18:34:20.936039  AP: slot 5 apic_id 4.

  403 18:34:20.936127  AP: slot 7 apic_id 6.

  404 18:34:20.936216  AP: slot 3 apic_id 7.

  405 18:34:20.936304  AP: slot 4 apic_id 5.

  406 18:34:20.936393  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  407 18:34:20.936496  Processing 13 relocs. Offset value of 0x00038000

  408 18:34:20.936606  Unable to locate Global NVS

  409 18:34:20.936698  SMM Module: stub loaded at 0x00038000. Will call 0x76bb7318(0x00000000)

  410 18:34:20.936789  Installing permanent SMM handler to 0x7b000000

  411 18:34:20.936890  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  412 18:34:20.936984  Processing 794 relocs. Offset value of 0x7b010000

  413 18:34:20.937293  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  414 18:34:20.937398  Processing 13 relocs. Offset value of 0x7b008000

  415 18:34:20.937489  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  416 18:34:20.937580  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  417 18:34:20.937670  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  418 18:34:20.937760  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  419 18:34:20.937850  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  420 18:34:20.937939  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  421 18:34:20.938029  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  422 18:34:20.938117  Unable to locate Global NVS

  423 18:34:20.938206  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  424 18:34:20.938295  Clearing SMI status registers

  425 18:34:20.938384  SMI_STS: PM1 

  426 18:34:20.938472  PM1_STS: PWRBTN 

  427 18:34:20.938561  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  428 18:34:20.938651  In relocation handler: CPU 0

  429 18:34:20.938739  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  430 18:34:20.938829  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  431 18:34:20.938918  Relocation complete.

  432 18:34:20.939007  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  433 18:34:20.939115  In relocation handler: CPU 1

  434 18:34:20.939260  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  435 18:34:20.939356  Relocation complete.

  436 18:34:20.939448  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  437 18:34:20.939538  In relocation handler: CPU 7

  438 18:34:20.939627  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  439 18:34:20.939717  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  440 18:34:20.939806  Relocation complete.

  441 18:34:20.939899  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  442 18:34:20.939977  In relocation handler: CPU 4

  443 18:34:20.940055  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  444 18:34:20.940134  Relocation complete.

  445 18:34:20.940211  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  446 18:34:20.940290  In relocation handler: CPU 5

  447 18:34:20.940368  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  448 18:34:20.940447  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  449 18:34:20.940536  Relocation complete.

  450 18:34:20.940633  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  451 18:34:20.940713  In relocation handler: CPU 3

  452 18:34:20.940791  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  453 18:34:20.940870  Relocation complete.

  454 18:34:20.940948  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  455 18:34:20.941036  In relocation handler: CPU 6

  456 18:34:20.941117  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  457 18:34:20.941197  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  458 18:34:20.941275  Relocation complete.

  459 18:34:20.941354  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  460 18:34:20.941433  In relocation handler: CPU 2

  461 18:34:20.941510  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  462 18:34:20.941589  Relocation complete.

  463 18:34:20.941666  Initializing CPU #0

  464 18:34:20.941754  CPU: vendor Intel device 806c1

  465 18:34:20.941834  CPU: family 06, model 8c, stepping 01

  466 18:34:20.941912  Clearing out pending MCEs

  467 18:34:20.941990  Setting up local APIC...

  468 18:34:20.942067   apic_id: 0x00 done.

  469 18:34:20.942157  Turbo is available but hidden

  470 18:34:20.942235  Turbo is available and visible

  471 18:34:20.942313  microcode: Update skipped, already up-to-date

  472 18:34:20.942390  CPU #0 initialized

  473 18:34:20.942479  Initializing CPU #1

  474 18:34:20.942556  Initializing CPU #7

  475 18:34:20.942632  Initializing CPU #5

  476 18:34:20.942710  Initializing CPU #4

  477 18:34:20.942798  Initializing CPU #2

  478 18:34:20.942876  Initializing CPU #6

  479 18:34:20.942953  CPU: vendor Intel device 806c1

  480 18:34:20.943040  CPU: family 06, model 8c, stepping 01

  481 18:34:20.943120  CPU: vendor Intel device 806c1

  482 18:34:20.943197  CPU: family 06, model 8c, stepping 01

  483 18:34:20.943274  Clearing out pending MCEs

  484 18:34:20.943352  Clearing out pending MCEs

  485 18:34:20.943428  Setting up local APIC...

  486 18:34:20.943518  CPU: vendor Intel device 806c1

  487 18:34:20.943596  CPU: family 06, model 8c, stepping 01

  488 18:34:20.943674  CPU: vendor Intel device 806c1

  489 18:34:20.943752  CPU: family 06, model 8c, stepping 01

  490 18:34:20.943831  CPU: vendor Intel device 806c1

  491 18:34:20.943908  CPU: family 06, model 8c, stepping 01

  492 18:34:20.943985  Clearing out pending MCEs

  493 18:34:20.944062  Clearing out pending MCEs

  494 18:34:20.944139  Setting up local APIC...

  495 18:34:20.944216  Setting up local APIC...

  496 18:34:20.944293  Clearing out pending MCEs

  497 18:34:20.944370   apic_id: 0x04 done.

  498 18:34:20.944447  Setting up local APIC...

  499 18:34:20.944525  Setting up local APIC...

  500 18:34:20.944622  Initializing CPU #3

  501 18:34:20.944701  CPU: vendor Intel device 806c1

  502 18:34:20.944778  CPU: family 06, model 8c, stepping 01

  503 18:34:20.944864  CPU: vendor Intel device 806c1

  504 18:34:20.944933  CPU: family 06, model 8c, stepping 01

  505 18:34:20.945002  Clearing out pending MCEs

  506 18:34:20.945071  Clearing out pending MCEs

  507 18:34:20.945140  Setting up local APIC...

  508 18:34:20.945209  microcode: Update skipped, already up-to-date

  509 18:34:20.945279   apic_id: 0x05 done.

  510 18:34:20.945347  CPU #5 initialized

  511 18:34:20.945416  microcode: Update skipped, already up-to-date

  512 18:34:20.945485   apic_id: 0x01 done.

  513 18:34:20.945555   apic_id: 0x02 done.

  514 18:34:20.945623   apic_id: 0x03 done.

  515 18:34:20.945692  microcode: Update skipped, already up-to-date

  516 18:34:20.945761  microcode: Update skipped, already up-to-date

  517 18:34:20.945830  CPU #6 initialized

  518 18:34:20.945899  CPU #2 initialized

  519 18:34:20.945967  CPU #4 initialized

  520 18:34:20.946036  microcode: Update skipped, already up-to-date

  521 18:34:20.946104   apic_id: 0x06 done.

  522 18:34:20.946173  Setting up local APIC...

  523 18:34:20.946251  CPU #1 initialized

  524 18:34:20.946322  microcode: Update skipped, already up-to-date

  525 18:34:20.946391   apic_id: 0x07 done.

  526 18:34:20.946460  CPU #7 initialized

  527 18:34:20.946742  microcode: Update skipped, already up-to-date

  528 18:34:20.946819  CPU #3 initialized

  529 18:34:20.946902  bsp_do_flight_plan done after 464 msecs.

  530 18:34:20.946973  CPU: frequency set to 4000 MHz

  531 18:34:20.947042  Enabling SMIs.

  532 18:34:20.947112  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  533 18:34:20.947181  SATAXPCIE1 indicates PCIe NVMe is present

  534 18:34:20.947254  Probing TPM:  done!

  535 18:34:20.947403  Connected to device vid:did:rid of 1ae0:0028:00

  536 18:34:20.947519  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523

  537 18:34:20.947681  Initialized TPM device CR50 revision 0

  538 18:34:20.947810  Enabling S0i3.4

  539 18:34:20.947932  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4d1fc

  540 18:34:20.948065  Found a VBT of 8704 bytes after decompression

  541 18:34:20.948187  cse_lite: CSE RO boot. HybridStorageMode disabled

  542 18:34:20.948316  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  543 18:34:20.948437  FSPS returned 0

  544 18:34:20.948574  Executing Phase 1 of FspMultiPhaseSiInit

  545 18:34:20.948697  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  546 18:34:20.948830  port C0 DISC req: usage 1 usb3 1 usb2 5

  547 18:34:20.948949  Raw Buffer output 0 00000511

  548 18:34:20.949068  Raw Buffer output 1 00000000

  549 18:34:20.949186  pmc_send_ipc_cmd succeeded

  550 18:34:20.949315  port C1 DISC req: usage 1 usb3 2 usb2 3

  551 18:34:20.949434  Raw Buffer output 0 00000321

  552 18:34:20.949552  Raw Buffer output 1 00000000

  553 18:34:20.949670  pmc_send_ipc_cmd succeeded

  554 18:34:20.949798  Detected 4 core, 8 thread CPU.

  555 18:34:20.949919  Detected 4 core, 8 thread CPU.

  556 18:34:20.950025  Display FSP Version Info HOB

  557 18:34:20.950132  Reference Code - CPU = a.0.4c.31

  558 18:34:20.950238  uCode Version = 0.0.0.86

  559 18:34:20.950345  TXT ACM version = ff.ff.ff.ffff

  560 18:34:20.950452  Reference Code - ME = a.0.4c.31

  561 18:34:20.950558  MEBx version = 0.0.0.0

  562 18:34:20.950665  ME Firmware Version = Consumer SKU

  563 18:34:20.950771  Reference Code - PCH = a.0.4c.31

  564 18:34:20.950878  PCH-CRID Status = Disabled

  565 18:34:20.950987  PCH-CRID Original Value = ff.ff.ff.ffff

  566 18:34:20.951066  PCH-CRID New Value = ff.ff.ff.ffff

  567 18:34:20.951130  OPROM - RST - RAID = ff.ff.ff.ffff

  568 18:34:20.951193  PCH Hsio Version = 4.0.0.0

  569 18:34:20.951256  Reference Code - SA - System Agent = a.0.4c.31

  570 18:34:20.951319  Reference Code - MRC = 2.0.0.1

  571 18:34:20.951381  SA - PCIe Version = a.0.4c.31

  572 18:34:20.951444  SA-CRID Status = Disabled

  573 18:34:20.951506  SA-CRID Original Value = 0.0.0.1

  574 18:34:20.951569  SA-CRID New Value = 0.0.0.1

  575 18:34:20.951632  OPROM - VBIOS = ff.ff.ff.ffff

  576 18:34:20.951695  IO Manageability Engine FW Version = 11.1.4.0

  577 18:34:20.951757  PHY Build Version = 0.0.0.e0

  578 18:34:20.951820  Thunderbolt(TM) FW Version = 0.0.0.0

  579 18:34:20.951882  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  580 18:34:20.951945  ITSS IRQ Polarities Before:

  581 18:34:20.952007  IPC0: 0xffffffff

  582 18:34:20.952070  IPC1: 0xffffffff

  583 18:34:20.952132  IPC2: 0xffffffff

  584 18:34:20.952194  IPC3: 0xffffffff

  585 18:34:20.952256  ITSS IRQ Polarities After:

  586 18:34:20.952318  IPC0: 0xffffffff

  587 18:34:20.952380  IPC1: 0xffffffff

  588 18:34:20.952442  IPC2: 0xffffffff

  589 18:34:20.952504  IPC3: 0xffffffff

  590 18:34:20.952580  Found PCIe Root Port #9 at PCI: 00:1d.0.

  591 18:34:20.952646  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  592 18:34:20.952712  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  593 18:34:20.952777  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  594 18:34:20.952841  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  595 18:34:20.952904  Enumerating buses...

  596 18:34:20.952967  Show all devs... Before device enumeration.

  597 18:34:20.953030  Root Device: enabled 1

  598 18:34:20.953092  DOMAIN: 0000: enabled 1

  599 18:34:20.953155  CPU_CLUSTER: 0: enabled 1

  600 18:34:20.953217  PCI: 00:00.0: enabled 1

  601 18:34:20.953280  PCI: 00:02.0: enabled 1

  602 18:34:20.953341  PCI: 00:04.0: enabled 1

  603 18:34:20.953403  PCI: 00:05.0: enabled 1

  604 18:34:20.953465  PCI: 00:06.0: enabled 0

  605 18:34:20.953527  PCI: 00:07.0: enabled 0

  606 18:34:20.953589  PCI: 00:07.1: enabled 0

  607 18:34:20.953651  PCI: 00:07.2: enabled 0

  608 18:34:20.953714  PCI: 00:07.3: enabled 0

  609 18:34:20.953775  PCI: 00:08.0: enabled 1

  610 18:34:20.953837  PCI: 00:09.0: enabled 0

  611 18:34:20.953898  PCI: 00:0a.0: enabled 0

  612 18:34:20.953960  PCI: 00:0d.0: enabled 1

  613 18:34:20.954021  PCI: 00:0d.1: enabled 0

  614 18:34:20.954084  PCI: 00:0d.2: enabled 0

  615 18:34:20.954145  PCI: 00:0d.3: enabled 0

  616 18:34:20.954207  PCI: 00:0e.0: enabled 0

  617 18:34:20.954269  PCI: 00:10.2: enabled 1

  618 18:34:20.954331  PCI: 00:10.6: enabled 0

  619 18:34:20.954392  PCI: 00:10.7: enabled 0

  620 18:34:20.954454  PCI: 00:12.0: enabled 0

  621 18:34:20.954516  PCI: 00:12.6: enabled 0

  622 18:34:20.954578  PCI: 00:13.0: enabled 0

  623 18:34:20.954640  PCI: 00:14.0: enabled 1

  624 18:34:20.954702  PCI: 00:14.1: enabled 0

  625 18:34:20.954763  PCI: 00:14.2: enabled 1

  626 18:34:20.954835  PCI: 00:14.3: enabled 1

  627 18:34:20.954890  PCI: 00:15.0: enabled 1

  628 18:34:20.954947  PCI: 00:15.1: enabled 1

  629 18:34:20.955003  PCI: 00:15.2: enabled 1

  630 18:34:20.955059  PCI: 00:15.3: enabled 1

  631 18:34:20.955115  PCI: 00:16.0: enabled 1

  632 18:34:20.955172  PCI: 00:16.1: enabled 0

  633 18:34:20.955228  PCI: 00:16.2: enabled 0

  634 18:34:20.955284  PCI: 00:16.3: enabled 0

  635 18:34:20.955368  PCI: 00:16.4: enabled 0

  636 18:34:20.955426  PCI: 00:16.5: enabled 0

  637 18:34:20.955483  PCI: 00:17.0: enabled 1

  638 18:34:20.955540  PCI: 00:19.0: enabled 0

  639 18:34:20.955597  PCI: 00:19.1: enabled 1

  640 18:34:20.955653  PCI: 00:19.2: enabled 0

  641 18:34:20.955710  PCI: 00:1c.0: enabled 1

  642 18:34:20.955774  PCI: 00:1c.1: enabled 0

  643 18:34:20.955833  PCI: 00:1c.2: enabled 0

  644 18:34:20.955889  PCI: 00:1c.3: enabled 0

  645 18:34:20.955945  PCI: 00:1c.4: enabled 0

  646 18:34:20.956002  PCI: 00:1c.5: enabled 0

  647 18:34:20.956058  PCI: 00:1c.6: enabled 1

  648 18:34:20.956115  PCI: 00:1c.7: enabled 0

  649 18:34:20.956171  PCI: 00:1d.0: enabled 1

  650 18:34:20.956227  PCI: 00:1d.1: enabled 0

  651 18:34:20.956480  PCI: 00:1d.2: enabled 1

  652 18:34:20.956554  PCI: 00:1d.3: enabled 0

  653 18:34:20.956619  PCI: 00:1e.0: enabled 1

  654 18:34:20.956677  PCI: 00:1e.1: enabled 0

  655 18:34:20.956734  PCI: 00:1e.2: enabled 1

  656 18:34:20.956791  PCI: 00:1e.3: enabled 1

  657 18:34:20.956859  PCI: 00:1f.0: enabled 1

  658 18:34:20.956916  PCI: 00:1f.1: enabled 0

  659 18:34:20.956973  PCI: 00:1f.2: enabled 1

  660 18:34:20.957029  PCI: 00:1f.3: enabled 1

  661 18:34:20.957085  PCI: 00:1f.4: enabled 0

  662 18:34:20.957142  PCI: 00:1f.5: enabled 1

  663 18:34:20.957208  PCI: 00:1f.6: enabled 0

  664 18:34:20.957265  PCI: 00:1f.7: enabled 0

  665 18:34:20.957335  APIC: 00: enabled 1

  666 18:34:20.957397  GENERIC: 0.0: enabled 1

  667 18:34:20.957453  GENERIC: 0.0: enabled 1

  668 18:34:20.957510  GENERIC: 1.0: enabled 1

  669 18:34:20.957574  GENERIC: 0.0: enabled 1

  670 18:34:20.957633  GENERIC: 1.0: enabled 1

  671 18:34:20.957690  USB0 port 0: enabled 1

  672 18:34:20.957746  GENERIC: 0.0: enabled 1

  673 18:34:20.957802  USB0 port 0: enabled 1

  674 18:34:20.957859  GENERIC: 0.0: enabled 1

  675 18:34:20.957915  I2C: 00:1a: enabled 1

  676 18:34:20.957971  I2C: 00:31: enabled 1

  677 18:34:20.958036  I2C: 00:32: enabled 1

  678 18:34:20.958093  I2C: 00:10: enabled 1

  679 18:34:20.958150  I2C: 00:15: enabled 1

  680 18:34:20.958206  GENERIC: 0.0: enabled 0

  681 18:34:20.958263  GENERIC: 1.0: enabled 0

  682 18:34:20.958328  GENERIC: 0.0: enabled 1

  683 18:34:20.958385  SPI: 00: enabled 1

  684 18:34:20.958442  SPI: 00: enabled 1

  685 18:34:20.958498  PNP: 0c09.0: enabled 1

  686 18:34:20.958554  GENERIC: 0.0: enabled 1

  687 18:34:20.958610  USB3 port 0: enabled 1

  688 18:34:20.958667  USB3 port 1: enabled 1

  689 18:34:20.958723  USB3 port 2: enabled 0

  690 18:34:20.958780  USB3 port 3: enabled 0

  691 18:34:20.958836  USB2 port 0: enabled 0

  692 18:34:20.958892  USB2 port 1: enabled 1

  693 18:34:20.958949  USB2 port 2: enabled 1

  694 18:34:20.959006  USB2 port 3: enabled 0

  695 18:34:20.959062  USB2 port 4: enabled 1

  696 18:34:20.959119  USB2 port 5: enabled 0

  697 18:34:20.959175  USB2 port 6: enabled 0

  698 18:34:20.959231  USB2 port 7: enabled 0

  699 18:34:20.959286  USB2 port 8: enabled 0

  700 18:34:20.959343  USB2 port 9: enabled 0

  701 18:34:20.959399  USB3 port 0: enabled 0

  702 18:34:20.959455  USB3 port 1: enabled 1

  703 18:34:20.959511  USB3 port 2: enabled 0

  704 18:34:20.959567  USB3 port 3: enabled 0

  705 18:34:20.959623  GENERIC: 0.0: enabled 1

  706 18:34:20.959679  GENERIC: 1.0: enabled 1

  707 18:34:20.959735  APIC: 01: enabled 1

  708 18:34:20.959792  APIC: 03: enabled 1

  709 18:34:20.959861  APIC: 07: enabled 1

  710 18:34:20.959917  APIC: 05: enabled 1

  711 18:34:20.959971  APIC: 04: enabled 1

  712 18:34:20.960026  APIC: 02: enabled 1

  713 18:34:20.960081  APIC: 06: enabled 1

  714 18:34:20.960136  Compare with tree...

  715 18:34:20.960191  Root Device: enabled 1

  716 18:34:20.960247   DOMAIN: 0000: enabled 1

  717 18:34:20.960302    PCI: 00:00.0: enabled 1

  718 18:34:20.960358    PCI: 00:02.0: enabled 1

  719 18:34:20.960414    PCI: 00:04.0: enabled 1

  720 18:34:20.960469     GENERIC: 0.0: enabled 1

  721 18:34:20.960524    PCI: 00:05.0: enabled 1

  722 18:34:20.960611    PCI: 00:06.0: enabled 0

  723 18:34:20.960680    PCI: 00:07.0: enabled 0

  724 18:34:20.960736     GENERIC: 0.0: enabled 1

  725 18:34:20.960791    PCI: 00:07.1: enabled 0

  726 18:34:20.960846     GENERIC: 1.0: enabled 1

  727 18:34:20.960902    PCI: 00:07.2: enabled 0

  728 18:34:20.960956     GENERIC: 0.0: enabled 1

  729 18:34:20.961011    PCI: 00:07.3: enabled 0

  730 18:34:20.961076     GENERIC: 1.0: enabled 1

  731 18:34:20.961131    PCI: 00:08.0: enabled 1

  732 18:34:20.961186    PCI: 00:09.0: enabled 0

  733 18:34:20.961241    PCI: 00:0a.0: enabled 0

  734 18:34:20.961297    PCI: 00:0d.0: enabled 1

  735 18:34:20.961352     USB0 port 0: enabled 1

  736 18:34:20.961407      USB3 port 0: enabled 1

  737 18:34:20.961471      USB3 port 1: enabled 1

  738 18:34:20.961527      USB3 port 2: enabled 0

  739 18:34:20.961582      USB3 port 3: enabled 0

  740 18:34:20.961637    PCI: 00:0d.1: enabled 0

  741 18:34:20.961692    PCI: 00:0d.2: enabled 0

  742 18:34:20.961748     GENERIC: 0.0: enabled 1

  743 18:34:20.961803    PCI: 00:0d.3: enabled 0

  744 18:34:20.961859    PCI: 00:0e.0: enabled 0

  745 18:34:20.961914    PCI: 00:10.2: enabled 1

  746 18:34:20.961970    PCI: 00:10.6: enabled 0

  747 18:34:20.962025    PCI: 00:10.7: enabled 0

  748 18:34:20.962088    PCI: 00:12.0: enabled 0

  749 18:34:20.962145    PCI: 00:12.6: enabled 0

  750 18:34:20.962200    PCI: 00:13.0: enabled 0

  751 18:34:20.962255    PCI: 00:14.0: enabled 1

  752 18:34:20.962311     USB0 port 0: enabled 1

  753 18:34:20.962366      USB2 port 0: enabled 0

  754 18:34:20.962422      USB2 port 1: enabled 1

  755 18:34:20.962486      USB2 port 2: enabled 1

  756 18:34:20.962541      USB2 port 3: enabled 0

  757 18:34:20.962596      USB2 port 4: enabled 1

  758 18:34:20.962652      USB2 port 5: enabled 0

  759 18:34:20.962715      USB2 port 6: enabled 0

  760 18:34:20.962770      USB2 port 7: enabled 0

  761 18:34:20.962826      USB2 port 8: enabled 0

  762 18:34:20.962881      USB2 port 9: enabled 0

  763 18:34:20.962944      USB3 port 0: enabled 0

  764 18:34:20.963001      USB3 port 1: enabled 1

  765 18:34:20.963056      USB3 port 2: enabled 0

  766 18:34:20.963111      USB3 port 3: enabled 0

  767 18:34:20.963166    PCI: 00:14.1: enabled 0

  768 18:34:20.963222    PCI: 00:14.2: enabled 1

  769 18:34:20.963277    PCI: 00:14.3: enabled 1

  770 18:34:20.963339     GENERIC: 0.0: enabled 1

  771 18:34:20.963394    PCI: 00:15.0: enabled 1

  772 18:34:20.963449     I2C: 00:1a: enabled 1

  773 18:34:20.963505     I2C: 00:31: enabled 1

  774 18:34:20.963560     I2C: 00:32: enabled 1

  775 18:34:20.963615    PCI: 00:15.1: enabled 1

  776 18:34:20.963670     I2C: 00:10: enabled 1

  777 18:34:20.963725    PCI: 00:15.2: enabled 1

  778 18:34:20.963788    PCI: 00:15.3: enabled 1

  779 18:34:20.963843    PCI: 00:16.0: enabled 1

  780 18:34:20.963899    PCI: 00:16.1: enabled 0

  781 18:34:20.963953    PCI: 00:16.2: enabled 0

  782 18:34:20.964009    PCI: 00:16.3: enabled 0

  783 18:34:20.964063    PCI: 00:16.4: enabled 0

  784 18:34:20.964118    PCI: 00:16.5: enabled 0

  785 18:34:20.964173    PCI: 00:17.0: enabled 1

  786 18:34:20.964228    PCI: 00:19.0: enabled 0

  787 18:34:20.964283    PCI: 00:19.1: enabled 1

  788 18:34:20.964338     I2C: 00:15: enabled 1

  789 18:34:20.964393    PCI: 00:19.2: enabled 0

  790 18:34:20.964448    PCI: 00:1d.0: enabled 1

  791 18:34:20.964503     GENERIC: 0.0: enabled 1

  792 18:34:20.964591    PCI: 00:1e.0: enabled 1

  793 18:34:20.964661    PCI: 00:1e.1: enabled 0

  794 18:34:20.964717    PCI: 00:1e.2: enabled 1

  795 18:34:20.964772     SPI: 00: enabled 1

  796 18:34:20.964826    PCI: 00:1e.3: enabled 1

  797 18:34:20.964881     SPI: 00: enabled 1

  798 18:34:20.964936    PCI: 00:1f.0: enabled 1

  799 18:34:20.964991     PNP: 0c09.0: enabled 1

  800 18:34:20.965046    PCI: 00:1f.1: enabled 0

  801 18:34:20.965101    PCI: 00:1f.2: enabled 1

  802 18:34:20.965155     GENERIC: 0.0: enabled 1

  803 18:34:20.965211      GENERIC: 0.0: enabled 1

  804 18:34:20.965266      GENERIC: 1.0: enabled 1

  805 18:34:20.965321    PCI: 00:1f.3: enabled 1

  806 18:34:20.965376    PCI: 00:1f.4: enabled 0

  807 18:34:20.965431    PCI: 00:1f.5: enabled 1

  808 18:34:20.965486    PCI: 00:1f.6: enabled 0

  809 18:34:20.965733    PCI: 00:1f.7: enabled 0

  810 18:34:20.965795   CPU_CLUSTER: 0: enabled 1

  811 18:34:20.965851    APIC: 00: enabled 1

  812 18:34:20.965907    APIC: 01: enabled 1

  813 18:34:20.965963    APIC: 03: enabled 1

  814 18:34:20.966019    APIC: 07: enabled 1

  815 18:34:20.966074    APIC: 05: enabled 1

  816 18:34:20.966130    APIC: 04: enabled 1

  817 18:34:20.966185    APIC: 02: enabled 1

  818 18:34:20.966240    APIC: 06: enabled 1

  819 18:34:20.966295  Root Device scanning...

  820 18:34:20.966350  scan_static_bus for Root Device

  821 18:34:20.966406  DOMAIN: 0000 enabled

  822 18:34:20.966461  CPU_CLUSTER: 0 enabled

  823 18:34:20.966516  DOMAIN: 0000 scanning...

  824 18:34:20.966571  PCI: pci_scan_bus for bus 00

  825 18:34:20.966626  PCI: 00:00.0 [8086/0000] ops

  826 18:34:20.966692  PCI: 00:00.0 [8086/9a12] enabled

  827 18:34:20.966749  PCI: 00:02.0 [8086/0000] bus ops

  828 18:34:20.966804  PCI: 00:02.0 [8086/9a40] enabled

  829 18:34:20.966860  PCI: 00:04.0 [8086/0000] bus ops

  830 18:34:20.966916  PCI: 00:04.0 [8086/9a03] enabled

  831 18:34:20.966972  PCI: 00:05.0 [8086/9a19] enabled

  832 18:34:20.967034  PCI: 00:07.0 [0000/0000] hidden

  833 18:34:20.967091  PCI: 00:08.0 [8086/9a11] enabled

  834 18:34:20.967146  PCI: 00:0a.0 [8086/9a0d] disabled

  835 18:34:20.967201  PCI: 00:0d.0 [8086/0000] bus ops

  836 18:34:20.967257  PCI: 00:0d.0 [8086/9a13] enabled

  837 18:34:20.967312  PCI: 00:14.0 [8086/0000] bus ops

  838 18:34:20.967368  PCI: 00:14.0 [8086/a0ed] enabled

  839 18:34:20.967423  PCI: 00:14.2 [8086/a0ef] enabled

  840 18:34:20.967479  PCI: 00:14.3 [8086/0000] bus ops

  841 18:34:20.967534  PCI: 00:14.3 [8086/a0f0] enabled

  842 18:34:20.967590  PCI: 00:15.0 [8086/0000] bus ops

  843 18:34:20.967645  PCI: 00:15.0 [8086/a0e8] enabled

  844 18:34:20.967700  PCI: 00:15.1 [8086/0000] bus ops

  845 18:34:20.967756  PCI: 00:15.1 [8086/a0e9] enabled

  846 18:34:20.967811  PCI: 00:15.2 [8086/0000] bus ops

  847 18:34:20.967866  PCI: 00:15.2 [8086/a0ea] enabled

  848 18:34:20.967921  PCI: 00:15.3 [8086/0000] bus ops

  849 18:34:20.967983  PCI: 00:15.3 [8086/a0eb] enabled

  850 18:34:20.968040  PCI: 00:16.0 [8086/0000] ops

  851 18:34:20.968095  PCI: 00:16.0 [8086/a0e0] enabled

  852 18:34:20.968151  PCI: Static device PCI: 00:17.0 not found, disabling it.

  853 18:34:20.968206  PCI: 00:19.0 [8086/0000] bus ops

  854 18:34:20.968262  PCI: 00:19.0 [8086/a0c5] disabled

  855 18:34:20.968318  PCI: 00:19.1 [8086/0000] bus ops

  856 18:34:20.968374  PCI: 00:19.1 [8086/a0c6] enabled

  857 18:34:20.968436  PCI: 00:1d.0 [8086/0000] bus ops

  858 18:34:20.968493  PCI: 00:1d.0 [8086/a0b0] enabled

  859 18:34:20.968555  PCI: 00:1e.0 [8086/0000] ops

  860 18:34:20.968613  PCI: 00:1e.0 [8086/a0a8] enabled

  861 18:34:20.968668  PCI: 00:1e.2 [8086/0000] bus ops

  862 18:34:20.968724  PCI: 00:1e.2 [8086/a0aa] enabled

  863 18:34:20.968789  PCI: 00:1e.3 [8086/0000] bus ops

  864 18:34:20.968845  PCI: 00:1e.3 [8086/a0ab] enabled

  865 18:34:20.968900  PCI: 00:1f.0 [8086/0000] bus ops

  866 18:34:20.968955  PCI: 00:1f.0 [8086/a087] enabled

  867 18:34:20.969010  RTC Init

  868 18:34:20.969065  Set power on after power failure.

  869 18:34:20.969121  Disabling Deep S3

  870 18:34:20.969183  Disabling Deep S3

  871 18:34:20.969240  Disabling Deep S4

  872 18:34:20.969295  Disabling Deep S4

  873 18:34:20.969350  Disabling Deep S5

  874 18:34:20.969404  Disabling Deep S5

  875 18:34:20.969459  PCI: 00:1f.2 [0000/0000] hidden

  876 18:34:20.969514  PCI: 00:1f.3 [8086/0000] bus ops

  877 18:34:20.969570  PCI: 00:1f.3 [8086/a0c8] enabled

  878 18:34:20.969634  PCI: 00:1f.5 [8086/0000] bus ops

  879 18:34:20.969689  PCI: 00:1f.5 [8086/a0a4] enabled

  880 18:34:20.969745  PCI: Leftover static devices:

  881 18:34:20.969800  PCI: 00:10.2

  882 18:34:20.969855  PCI: 00:10.6

  883 18:34:20.969910  PCI: 00:10.7

  884 18:34:20.969965  PCI: 00:06.0

  885 18:34:20.970035  PCI: 00:07.1

  886 18:34:20.970091  PCI: 00:07.2

  887 18:34:20.970146  PCI: 00:07.3

  888 18:34:20.970201  PCI: 00:09.0

  889 18:34:20.970256  PCI: 00:0d.1

  890 18:34:20.970311  PCI: 00:0d.2

  891 18:34:20.970367  PCI: 00:0d.3

  892 18:34:20.970422  PCI: 00:0e.0

  893 18:34:20.970477  PCI: 00:12.0

  894 18:34:20.970532  PCI: 00:12.6

  895 18:34:20.970587  PCI: 00:13.0

  896 18:34:20.970642  PCI: 00:14.1

  897 18:34:20.970697  PCI: 00:16.1

  898 18:34:20.970753  PCI: 00:16.2

  899 18:34:20.970808  PCI: 00:16.3

  900 18:34:20.970862  PCI: 00:16.4

  901 18:34:20.970917  PCI: 00:16.5

  902 18:34:20.970972  PCI: 00:17.0

  903 18:34:20.971028  PCI: 00:19.2

  904 18:34:20.971082  PCI: 00:1e.1

  905 18:34:20.971137  PCI: 00:1f.1

  906 18:34:20.971192  PCI: 00:1f.4

  907 18:34:20.971247  PCI: 00:1f.6

  908 18:34:20.971302  PCI: 00:1f.7

  909 18:34:20.971357  PCI: Check your devicetree.cb.

  910 18:34:20.971413  PCI: 00:02.0 scanning...

  911 18:34:20.971468  scan_generic_bus for PCI: 00:02.0

  912 18:34:20.971523  scan_generic_bus for PCI: 00:02.0 done

  913 18:34:20.971578  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  914 18:34:20.971634  PCI: 00:04.0 scanning...

  915 18:34:20.971689  scan_generic_bus for PCI: 00:04.0

  916 18:34:20.971744  GENERIC: 0.0 enabled

  917 18:34:20.971799  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  918 18:34:20.971855  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  919 18:34:20.971910  PCI: 00:0d.0 scanning...

  920 18:34:20.971965  scan_static_bus for PCI: 00:0d.0

  921 18:34:20.972020  USB0 port 0 enabled

  922 18:34:20.972075  USB0 port 0 scanning...

  923 18:34:20.972130  scan_static_bus for USB0 port 0

  924 18:34:20.972185  USB3 port 0 enabled

  925 18:34:20.972240  USB3 port 1 enabled

  926 18:34:20.972296  USB3 port 2 disabled

  927 18:34:20.972351  USB3 port 3 disabled

  928 18:34:20.972406  USB3 port 0 scanning...

  929 18:34:20.972461  scan_static_bus for USB3 port 0

  930 18:34:20.972534  scan_static_bus for USB3 port 0 done

  931 18:34:20.972611  scan_bus: bus USB3 port 0 finished in 6 msecs

  932 18:34:20.972667  USB3 port 1 scanning...

  933 18:34:20.972723  scan_static_bus for USB3 port 1

  934 18:34:20.972778  scan_static_bus for USB3 port 1 done

  935 18:34:20.972834  scan_bus: bus USB3 port 1 finished in 6 msecs

  936 18:34:20.972889  scan_static_bus for USB0 port 0 done

  937 18:34:20.972944  scan_bus: bus USB0 port 0 finished in 43 msecs

  938 18:34:20.973000  scan_static_bus for PCI: 00:0d.0 done

  939 18:34:20.973056  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  940 18:34:20.973111  PCI: 00:14.0 scanning...

  941 18:34:20.973167  scan_static_bus for PCI: 00:14.0

  942 18:34:20.973223  USB0 port 0 enabled

  943 18:34:20.973278  USB0 port 0 scanning...

  944 18:34:20.973333  scan_static_bus for USB0 port 0

  945 18:34:20.973388  USB2 port 0 disabled

  946 18:34:20.973444  USB2 port 1 enabled

  947 18:34:20.973500  USB2 port 2 enabled

  948 18:34:20.973556  USB2 port 3 disabled

  949 18:34:20.973612  USB2 port 4 enabled

  950 18:34:20.973667  USB2 port 5 disabled

  951 18:34:20.973722  USB2 port 6 disabled

  952 18:34:20.973784  USB2 port 7 disabled

  953 18:34:20.973841  USB2 port 8 disabled

  954 18:34:20.973896  USB2 port 9 disabled

  955 18:34:20.973951  USB3 port 0 disabled

  956 18:34:20.974006  USB3 port 1 enabled

  957 18:34:20.974061  USB3 port 2 disabled

  958 18:34:20.974116  USB3 port 3 disabled

  959 18:34:20.974368  USB2 port 1 scanning...

  960 18:34:20.974431  scan_static_bus for USB2 port 1

  961 18:34:20.974488  scan_static_bus for USB2 port 1 done

  962 18:34:20.974544  scan_bus: bus USB2 port 1 finished in 6 msecs

  963 18:34:20.974600  USB2 port 2 scanning...

  964 18:34:20.974663  scan_static_bus for USB2 port 2

  965 18:34:20.974720  scan_static_bus for USB2 port 2 done

  966 18:34:20.974776  scan_bus: bus USB2 port 2 finished in 6 msecs

  967 18:34:20.974832  USB2 port 4 scanning...

  968 18:34:20.974888  scan_static_bus for USB2 port 4

  969 18:34:20.974951  scan_static_bus for USB2 port 4 done

  970 18:34:20.975008  scan_bus: bus USB2 port 4 finished in 6 msecs

  971 18:34:20.975064  USB3 port 1 scanning...

  972 18:34:20.975119  scan_static_bus for USB3 port 1

  973 18:34:20.975174  scan_static_bus for USB3 port 1 done

  974 18:34:20.975230  scan_bus: bus USB3 port 1 finished in 6 msecs

  975 18:34:20.975285  scan_static_bus for USB0 port 0 done

  976 18:34:20.975348  scan_bus: bus USB0 port 0 finished in 93 msecs

  977 18:34:20.975405  scan_static_bus for PCI: 00:14.0 done

  978 18:34:20.975461  scan_bus: bus PCI: 00:14.0 finished in 109 msecs

  979 18:34:20.975517  PCI: 00:14.3 scanning...

  980 18:34:20.975571  scan_static_bus for PCI: 00:14.3

  981 18:34:20.975626  GENERIC: 0.0 enabled

  982 18:34:20.975682  scan_static_bus for PCI: 00:14.3 done

  983 18:34:20.975737  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  984 18:34:20.975793  PCI: 00:15.0 scanning...

  985 18:34:20.975849  scan_static_bus for PCI: 00:15.0

  986 18:34:20.975904  I2C: 00:1a enabled

  987 18:34:20.975959  I2C: 00:31 enabled

  988 18:34:20.976014  I2C: 00:32 enabled

  989 18:34:20.976069  scan_static_bus for PCI: 00:15.0 done

  990 18:34:20.976125  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

  991 18:34:20.976180  PCI: 00:15.1 scanning...

  992 18:34:20.976235  scan_static_bus for PCI: 00:15.1

  993 18:34:20.976290  I2C: 00:10 enabled

  994 18:34:20.976345  scan_static_bus for PCI: 00:15.1 done

  995 18:34:20.976400  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  996 18:34:20.976455  PCI: 00:15.2 scanning...

  997 18:34:20.976511  scan_static_bus for PCI: 00:15.2

  998 18:34:20.976608  scan_static_bus for PCI: 00:15.2 done

  999 18:34:20.976665  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1000 18:34:20.976720  PCI: 00:15.3 scanning...

 1001 18:34:20.976776  scan_static_bus for PCI: 00:15.3

 1002 18:34:20.976831  scan_static_bus for PCI: 00:15.3 done

 1003 18:34:20.976886  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1004 18:34:20.976941  PCI: 00:19.1 scanning...

 1005 18:34:20.976996  scan_static_bus for PCI: 00:19.1

 1006 18:34:20.977051  I2C: 00:15 enabled

 1007 18:34:20.977105  scan_static_bus for PCI: 00:19.1 done

 1008 18:34:20.977161  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1009 18:34:20.977216  PCI: 00:1d.0 scanning...

 1010 18:34:20.977272  do_pci_scan_bridge for PCI: 00:1d.0

 1011 18:34:20.977327  PCI: pci_scan_bus for bus 01

 1012 18:34:20.977382  PCI: 01:00.0 [1c5c/174a] enabled

 1013 18:34:20.977437  GENERIC: 0.0 enabled

 1014 18:34:20.977492  Enabling Common Clock Configuration

 1015 18:34:20.977547  L1 Sub-State supported from root port 29

 1016 18:34:20.977602  L1 Sub-State Support = 0xf

 1017 18:34:20.977658  CommonModeRestoreTime = 0x28

 1018 18:34:20.977715  Power On Value = 0x16, Power On Scale = 0x0

 1019 18:34:20.977771  ASPM: Enabled L1

 1020 18:34:20.977826  PCIe: Max_Payload_Size adjusted to 128

 1021 18:34:20.977882  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1022 18:34:20.977937  PCI: 00:1e.2 scanning...

 1023 18:34:20.977992  scan_generic_bus for PCI: 00:1e.2

 1024 18:34:20.978048  SPI: 00 enabled

 1025 18:34:20.978110  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1026 18:34:20.978169  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1027 18:34:20.978226  PCI: 00:1e.3 scanning...

 1028 18:34:20.978282  scan_generic_bus for PCI: 00:1e.3

 1029 18:34:20.978337  SPI: 00 enabled

 1030 18:34:20.978393  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1031 18:34:20.978449  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1032 18:34:20.978504  PCI: 00:1f.0 scanning...

 1033 18:34:20.978569  scan_static_bus for PCI: 00:1f.0

 1034 18:34:20.978625  PNP: 0c09.0 enabled

 1035 18:34:20.978679  PNP: 0c09.0 scanning...

 1036 18:34:20.978735  scan_static_bus for PNP: 0c09.0

 1037 18:34:20.978789  scan_static_bus for PNP: 0c09.0 done

 1038 18:34:20.978844  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1039 18:34:20.978899  scan_static_bus for PCI: 00:1f.0 done

 1040 18:34:20.978962  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1041 18:34:20.979018  PCI: 00:1f.2 scanning...

 1042 18:34:20.979073  scan_static_bus for PCI: 00:1f.2

 1043 18:34:20.979128  GENERIC: 0.0 enabled

 1044 18:34:20.979182  GENERIC: 0.0 scanning...

 1045 18:34:20.979237  scan_static_bus for GENERIC: 0.0

 1046 18:34:20.979291  GENERIC: 0.0 enabled

 1047 18:34:20.979346  GENERIC: 1.0 enabled

 1048 18:34:20.979400  scan_static_bus for GENERIC: 0.0 done

 1049 18:34:20.979455  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1050 18:34:20.979510  scan_static_bus for PCI: 00:1f.2 done

 1051 18:34:20.979564  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1052 18:34:20.979619  PCI: 00:1f.3 scanning...

 1053 18:34:20.979674  scan_static_bus for PCI: 00:1f.3

 1054 18:34:20.979729  scan_static_bus for PCI: 00:1f.3 done

 1055 18:34:20.979784  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1056 18:34:20.979839  PCI: 00:1f.5 scanning...

 1057 18:34:20.979893  scan_generic_bus for PCI: 00:1f.5

 1058 18:34:20.979956  scan_generic_bus for PCI: 00:1f.5 done

 1059 18:34:20.980012  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1060 18:34:20.980067  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1061 18:34:20.980122  scan_static_bus for Root Device done

 1062 18:34:20.980176  scan_bus: bus Root Device finished in 736 msecs

 1063 18:34:20.980231  done

 1064 18:34:20.980286  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1065 18:34:20.980341  Chrome EC: UHEPI supported

 1066 18:34:20.980405  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1067 18:34:20.980461  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1068 18:34:20.980516  SPI flash protection: WPSW=0 SRP0=0

 1069 18:34:20.980616  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1070 18:34:20.980673  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms

 1071 18:34:20.980736  found VGA at PCI: 00:02.0

 1072 18:34:20.980794  Setting up VGA for PCI: 00:02.0

 1073 18:34:20.981041  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1074 18:34:20.981103  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1075 18:34:20.981160  Allocating resources...

 1076 18:34:20.981225  Reading resources...

 1077 18:34:20.981281  Root Device read_resources bus 0 link: 0

 1078 18:34:20.981336  DOMAIN: 0000 read_resources bus 0 link: 0

 1079 18:34:20.981391  PCI: 00:04.0 read_resources bus 1 link: 0

 1080 18:34:20.981447  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1081 18:34:20.981501  PCI: 00:0d.0 read_resources bus 0 link: 0

 1082 18:34:20.981556  USB0 port 0 read_resources bus 0 link: 0

 1083 18:34:20.981611  USB0 port 0 read_resources bus 0 link: 0 done

 1084 18:34:20.981674  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1085 18:34:20.981730  PCI: 00:14.0 read_resources bus 0 link: 0

 1086 18:34:20.981786  USB0 port 0 read_resources bus 0 link: 0

 1087 18:34:20.981841  USB0 port 0 read_resources bus 0 link: 0 done

 1088 18:34:20.981896  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1089 18:34:20.981951  PCI: 00:14.3 read_resources bus 0 link: 0

 1090 18:34:20.982006  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1091 18:34:20.982061  PCI: 00:15.0 read_resources bus 0 link: 0

 1092 18:34:20.982116  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1093 18:34:20.982179  PCI: 00:15.1 read_resources bus 0 link: 0

 1094 18:34:20.982235  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1095 18:34:20.982290  PCI: 00:19.1 read_resources bus 0 link: 0

 1096 18:34:20.982345  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1097 18:34:20.982399  PCI: 00:1d.0 read_resources bus 1 link: 0

 1098 18:34:20.982453  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1099 18:34:20.982509  PCI: 00:1e.2 read_resources bus 2 link: 0

 1100 18:34:20.982563  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1101 18:34:20.982618  PCI: 00:1e.3 read_resources bus 3 link: 0

 1102 18:34:20.982672  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1103 18:34:20.982727  PCI: 00:1f.0 read_resources bus 0 link: 0

 1104 18:34:20.982782  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1105 18:34:20.982837  PCI: 00:1f.2 read_resources bus 0 link: 0

 1106 18:34:20.982892  GENERIC: 0.0 read_resources bus 0 link: 0

 1107 18:34:20.982947  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1108 18:34:20.983002  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1109 18:34:20.983058  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1110 18:34:20.983113  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1111 18:34:20.983167  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1112 18:34:20.983222  Root Device read_resources bus 0 link: 0 done

 1113 18:34:20.983277  Done reading resources.

 1114 18:34:20.983332  Show resources in subtree (Root Device)...After reading.

 1115 18:34:20.983387   Root Device child on link 0 DOMAIN: 0000

 1116 18:34:20.983442    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1117 18:34:20.983497    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1118 18:34:20.983553    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1119 18:34:20.983609     PCI: 00:00.0

 1120 18:34:20.983663     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1121 18:34:20.983719     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1122 18:34:20.983774     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1123 18:34:20.983829     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1124 18:34:20.983885     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1125 18:34:20.983940     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1126 18:34:20.983995     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1127 18:34:20.984050     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1128 18:34:20.984105     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1129 18:34:20.984160     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1130 18:34:20.984215     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1131 18:34:20.984270     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1132 18:34:20.984326     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1133 18:34:20.984381     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1134 18:34:20.984437     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1135 18:34:20.984492     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1136 18:34:20.984556     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1137 18:34:20.984655     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1138 18:34:20.984711     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1139 18:34:20.984958     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1140 18:34:20.985026     PCI: 00:02.0

 1141 18:34:20.985083     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1142 18:34:20.985140     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1143 18:34:20.985195     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1144 18:34:20.985251     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1145 18:34:20.985307     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1146 18:34:20.985363      GENERIC: 0.0

 1147 18:34:20.985418     PCI: 00:05.0

 1148 18:34:20.985472     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1149 18:34:20.985528     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1150 18:34:20.985583      GENERIC: 0.0

 1151 18:34:20.985637     PCI: 00:08.0

 1152 18:34:20.985701     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1153 18:34:20.985758     PCI: 00:0a.0

 1154 18:34:20.985814     PCI: 00:0d.0 child on link 0 USB0 port 0

 1155 18:34:20.985869     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1156 18:34:20.985925      USB0 port 0 child on link 0 USB3 port 0

 1157 18:34:20.985981       USB3 port 0

 1158 18:34:20.986035       USB3 port 1

 1159 18:34:20.986090       USB3 port 2

 1160 18:34:20.986152       USB3 port 3

 1161 18:34:20.986208     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 18:34:20.986264     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1163 18:34:20.986319      USB0 port 0 child on link 0 USB2 port 0

 1164 18:34:20.986374       USB2 port 0

 1165 18:34:20.986429       USB2 port 1

 1166 18:34:20.986483       USB2 port 2

 1167 18:34:20.986538       USB2 port 3

 1168 18:34:20.986592       USB2 port 4

 1169 18:34:20.986647       USB2 port 5

 1170 18:34:20.986709       USB2 port 6

 1171 18:34:20.986764       USB2 port 7

 1172 18:34:20.986819       USB2 port 8

 1173 18:34:20.986873       USB2 port 9

 1174 18:34:20.986927       USB3 port 0

 1175 18:34:20.986981       USB3 port 1

 1176 18:34:20.987043       USB3 port 2

 1177 18:34:20.987098       USB3 port 3

 1178 18:34:20.987152     PCI: 00:14.2

 1179 18:34:20.987207     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1180 18:34:20.987263     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1181 18:34:20.988605     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1182 18:34:20.998606     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1183 18:34:21.001896      GENERIC: 0.0

 1184 18:34:21.005111     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1185 18:34:21.014952     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 18:34:21.018643      I2C: 00:1a

 1187 18:34:21.018727      I2C: 00:31

 1188 18:34:21.022043      I2C: 00:32

 1189 18:34:21.025028     PCI: 00:15.1 child on link 0 I2C: 00:10

 1190 18:34:21.035265     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1191 18:34:21.035872      I2C: 00:10

 1192 18:34:21.038486     PCI: 00:15.2

 1193 18:34:21.048705     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 18:34:21.049164     PCI: 00:15.3

 1195 18:34:21.058375     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1196 18:34:21.061967     PCI: 00:16.0

 1197 18:34:21.071738     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1198 18:34:21.072169     PCI: 00:19.0

 1199 18:34:21.078434     PCI: 00:19.1 child on link 0 I2C: 00:15

 1200 18:34:21.088351     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1201 18:34:21.088908      I2C: 00:15

 1202 18:34:21.094856     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1203 18:34:21.101753     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1204 18:34:21.111840     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1205 18:34:21.121851     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1206 18:34:21.122282      GENERIC: 0.0

 1207 18:34:21.124865      PCI: 01:00.0

 1208 18:34:21.134822      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1209 18:34:21.144774      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1210 18:34:21.151632      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1211 18:34:21.154793     PCI: 00:1e.0

 1212 18:34:21.164704     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1213 18:34:21.171159     PCI: 00:1e.2 child on link 0 SPI: 00

 1214 18:34:21.181406     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 18:34:21.181903      SPI: 00

 1216 18:34:21.185021     PCI: 00:1e.3 child on link 0 SPI: 00

 1217 18:34:21.195141     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1218 18:34:21.195587      SPI: 00

 1219 18:34:21.201634     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1220 18:34:21.208333     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1221 18:34:21.211394      PNP: 0c09.0

 1222 18:34:21.221513      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1223 18:34:21.224894     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1224 18:34:21.234331     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1225 18:34:21.241181     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1226 18:34:21.247804      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1227 18:34:21.248227       GENERIC: 0.0

 1228 18:34:21.251501       GENERIC: 1.0

 1229 18:34:21.252010     PCI: 00:1f.3

 1230 18:34:21.261366     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1231 18:34:21.274699     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1232 18:34:21.275136     PCI: 00:1f.5

 1233 18:34:21.284605     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1234 18:34:21.287639    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1235 18:34:21.287974     APIC: 00

 1236 18:34:21.291238     APIC: 01

 1237 18:34:21.291459     APIC: 03

 1238 18:34:21.294299     APIC: 07

 1239 18:34:21.294521     APIC: 05

 1240 18:34:21.294697     APIC: 04

 1241 18:34:21.297749     APIC: 02

 1242 18:34:21.297972     APIC: 06

 1243 18:34:21.304526  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1244 18:34:21.311068   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1245 18:34:21.317767   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1246 18:34:21.324494   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1247 18:34:21.327876    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1248 18:34:21.330982    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1249 18:34:21.337867    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1250 18:34:21.344703   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1251 18:34:21.351332   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1252 18:34:21.358108   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1253 18:34:21.364225  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1254 18:34:21.371343  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1255 18:34:21.380852   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1256 18:34:21.387517   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1257 18:34:21.394431   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1258 18:34:21.397766   DOMAIN: 0000: Resource ranges:

 1259 18:34:21.401347   * Base: 1000, Size: 800, Tag: 100

 1260 18:34:21.403996   * Base: 1900, Size: e700, Tag: 100

 1261 18:34:21.410694    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1262 18:34:21.417401  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1263 18:34:21.424086  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1264 18:34:21.430563   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1265 18:34:21.440671   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1266 18:34:21.447123   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1267 18:34:21.454154   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1268 18:34:21.463744   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1269 18:34:21.470447   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1270 18:34:21.477144   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1271 18:34:21.487079   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1272 18:34:21.493829   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1273 18:34:21.500196   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1274 18:34:21.507098   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1275 18:34:21.516817   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1276 18:34:21.523681   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1277 18:34:21.530664   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1278 18:34:21.540410   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1279 18:34:21.547111   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1280 18:34:21.553803   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1281 18:34:21.563900   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1282 18:34:21.570571   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1283 18:34:21.576924   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1284 18:34:21.586828   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1285 18:34:21.593384   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1286 18:34:21.596668   DOMAIN: 0000: Resource ranges:

 1287 18:34:21.600591   * Base: 7fc00000, Size: 40400000, Tag: 200

 1288 18:34:21.606884   * Base: d0000000, Size: 28000000, Tag: 200

 1289 18:34:21.610430   * Base: fa000000, Size: 1000000, Tag: 200

 1290 18:34:21.613386   * Base: fb001000, Size: 2fff000, Tag: 200

 1291 18:34:21.616996   * Base: fe010000, Size: 2e000, Tag: 200

 1292 18:34:21.623485   * Base: fe03f000, Size: d41000, Tag: 200

 1293 18:34:21.626693   * Base: fed88000, Size: 8000, Tag: 200

 1294 18:34:21.630068   * Base: fed93000, Size: d000, Tag: 200

 1295 18:34:21.633129   * Base: feda2000, Size: 1e000, Tag: 200

 1296 18:34:21.639895   * Base: fede0000, Size: 1220000, Tag: 200

 1297 18:34:21.643549   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1298 18:34:21.649848    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1299 18:34:21.656677    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1300 18:34:21.663269    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1301 18:34:21.670197    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1302 18:34:21.676697    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1303 18:34:21.683580    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1304 18:34:21.689683    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1305 18:34:21.696598    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1306 18:34:21.703640    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1307 18:34:21.709774    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1308 18:34:21.716673    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1309 18:34:21.723485    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1310 18:34:21.729972    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1311 18:34:21.736744    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1312 18:34:21.743507    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1313 18:34:21.749981    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1314 18:34:21.756704    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1315 18:34:21.763565    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1316 18:34:21.769832    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1317 18:34:21.776655    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1318 18:34:21.783281    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1319 18:34:21.789860    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1320 18:34:21.796605  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1321 18:34:21.806546  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1322 18:34:21.809825   PCI: 00:1d.0: Resource ranges:

 1323 18:34:21.813201   * Base: 7fc00000, Size: 100000, Tag: 200

 1324 18:34:21.819538    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1325 18:34:21.826233    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1326 18:34:21.832795    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1327 18:34:21.843058  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1328 18:34:21.849443  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1329 18:34:21.852604  Root Device assign_resources, bus 0 link: 0

 1330 18:34:21.856372  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1331 18:34:21.866945  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1332 18:34:21.873410  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1333 18:34:21.883479  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1334 18:34:21.890003  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1335 18:34:21.896500  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1336 18:34:21.899903  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1337 18:34:21.906450  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1338 18:34:21.916461  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1339 18:34:21.923350  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1340 18:34:21.930082  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1341 18:34:21.933352  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1342 18:34:21.943103  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1343 18:34:21.946450  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1344 18:34:21.950002  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1345 18:34:21.959765  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1346 18:34:21.966413  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1347 18:34:21.976399  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1348 18:34:21.979846  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1349 18:34:21.983043  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1350 18:34:21.993329  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1351 18:34:21.996870  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1352 18:34:22.003592  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1353 18:34:22.010242  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1354 18:34:22.013351  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1355 18:34:22.020330  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1356 18:34:22.027117  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1357 18:34:22.036836  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1358 18:34:22.043702  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1359 18:34:22.053576  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1360 18:34:22.057103  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1361 18:34:22.060609  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1362 18:34:22.070594  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1363 18:34:22.081003  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1364 18:34:22.090490  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1365 18:34:22.094134  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1366 18:34:22.100892  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1367 18:34:22.110383  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1368 18:34:22.117109  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1369 18:34:22.120704  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1370 18:34:22.131063  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1371 18:34:22.134454  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1372 18:34:22.140884  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1373 18:34:22.147390  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1374 18:34:22.154355  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1375 18:34:22.157600  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1376 18:34:22.160711  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1377 18:34:22.167865  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1378 18:34:22.170797  LPC: Trying to open IO window from 800 size 1ff

 1379 18:34:22.181052  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1380 18:34:22.187577  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1381 18:34:22.197535  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1382 18:34:22.200605  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1383 18:34:22.204348  Root Device assign_resources, bus 0 link: 0

 1384 18:34:22.207351  Done setting resources.

 1385 18:34:22.214323  Show resources in subtree (Root Device)...After assigning values.

 1386 18:34:22.217538   Root Device child on link 0 DOMAIN: 0000

 1387 18:34:22.224170    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1388 18:34:22.233843    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1389 18:34:22.240438    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1390 18:34:22.243836     PCI: 00:00.0

 1391 18:34:22.253707     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1392 18:34:22.263840     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1393 18:34:22.274079     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1394 18:34:22.280420     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1395 18:34:22.290389     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1396 18:34:22.300226     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1397 18:34:22.310715     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1398 18:34:22.320111     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1399 18:34:22.326828     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1400 18:34:22.337105     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1401 18:34:22.347151     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1402 18:34:22.356814     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1403 18:34:22.366986     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1404 18:34:22.374135     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1405 18:34:22.383993     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1406 18:34:22.393594     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1407 18:34:22.403698     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1408 18:34:22.413553     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1409 18:34:22.423919     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1410 18:34:22.433571     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1411 18:34:22.433656     PCI: 00:02.0

 1412 18:34:22.443760     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1413 18:34:22.456922     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1414 18:34:22.463923     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1415 18:34:22.470278     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1416 18:34:22.480254     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1417 18:34:22.480351      GENERIC: 0.0

 1418 18:34:22.483877     PCI: 00:05.0

 1419 18:34:22.493763     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1420 18:34:22.496767     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1421 18:34:22.500443      GENERIC: 0.0

 1422 18:34:22.500595     PCI: 00:08.0

 1423 18:34:22.510142     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1424 18:34:22.513734     PCI: 00:0a.0

 1425 18:34:22.516812     PCI: 00:0d.0 child on link 0 USB0 port 0

 1426 18:34:22.527156     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1427 18:34:22.533888      USB0 port 0 child on link 0 USB3 port 0

 1428 18:34:22.534287       USB3 port 0

 1429 18:34:22.537645       USB3 port 1

 1430 18:34:22.538167       USB3 port 2

 1431 18:34:22.540586       USB3 port 3

 1432 18:34:22.544301     PCI: 00:14.0 child on link 0 USB0 port 0

 1433 18:34:22.553784     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1434 18:34:22.560692      USB0 port 0 child on link 0 USB2 port 0

 1435 18:34:22.560789       USB2 port 0

 1436 18:34:22.563750       USB2 port 1

 1437 18:34:22.563863       USB2 port 2

 1438 18:34:22.566913       USB2 port 3

 1439 18:34:22.567051       USB2 port 4

 1440 18:34:22.570169       USB2 port 5

 1441 18:34:22.570323       USB2 port 6

 1442 18:34:22.573529       USB2 port 7

 1443 18:34:22.573643       USB2 port 8

 1444 18:34:22.576919       USB2 port 9

 1445 18:34:22.577069       USB3 port 0

 1446 18:34:22.580412       USB3 port 1

 1447 18:34:22.580595       USB3 port 2

 1448 18:34:22.583694       USB3 port 3

 1449 18:34:22.583833     PCI: 00:14.2

 1450 18:34:22.597113     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1451 18:34:22.607401     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1452 18:34:22.610640     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1453 18:34:22.620465     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1454 18:34:22.624407      GENERIC: 0.0

 1455 18:34:22.627299     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1456 18:34:22.637387     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1457 18:34:22.640580      I2C: 00:1a

 1458 18:34:22.641198      I2C: 00:31

 1459 18:34:22.641738      I2C: 00:32

 1460 18:34:22.647399     PCI: 00:15.1 child on link 0 I2C: 00:10

 1461 18:34:22.657458     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1462 18:34:22.658032      I2C: 00:10

 1463 18:34:22.660464     PCI: 00:15.2

 1464 18:34:22.670405     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1465 18:34:22.670832     PCI: 00:15.3

 1466 18:34:22.684026     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1467 18:34:22.684681     PCI: 00:16.0

 1468 18:34:22.693774     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1469 18:34:22.697149     PCI: 00:19.0

 1470 18:34:22.700283     PCI: 00:19.1 child on link 0 I2C: 00:15

 1471 18:34:22.710319     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1472 18:34:22.713715      I2C: 00:15

 1473 18:34:22.717459     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1474 18:34:22.727460     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1475 18:34:22.737380     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1476 18:34:22.747007     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1477 18:34:22.750548      GENERIC: 0.0

 1478 18:34:22.750969      PCI: 01:00.0

 1479 18:34:22.761024      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1480 18:34:22.773855      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1481 18:34:22.783966      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1482 18:34:22.784514     PCI: 00:1e.0

 1483 18:34:22.797404     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1484 18:34:22.800598     PCI: 00:1e.2 child on link 0 SPI: 00

 1485 18:34:22.810718     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1486 18:34:22.811301      SPI: 00

 1487 18:34:22.813783     PCI: 00:1e.3 child on link 0 SPI: 00

 1488 18:34:22.827046     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1489 18:34:22.827602      SPI: 00

 1490 18:34:22.830756     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1491 18:34:22.840873     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1492 18:34:22.841531      PNP: 0c09.0

 1493 18:34:22.850742      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1494 18:34:22.854331     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1495 18:34:22.864378     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1496 18:34:22.874029     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1497 18:34:22.877336      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1498 18:34:22.880932       GENERIC: 0.0

 1499 18:34:22.881501       GENERIC: 1.0

 1500 18:34:22.884110     PCI: 00:1f.3

 1501 18:34:22.893854     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1502 18:34:22.903787     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1503 18:34:22.907048     PCI: 00:1f.5

 1504 18:34:22.917364     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1505 18:34:22.920311    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1506 18:34:22.920952     APIC: 00

 1507 18:34:22.923706     APIC: 01

 1508 18:34:22.924182     APIC: 03

 1509 18:34:22.927241     APIC: 07

 1510 18:34:22.927732     APIC: 05

 1511 18:34:22.928154     APIC: 04

 1512 18:34:22.930155     APIC: 02

 1513 18:34:22.930643     APIC: 06

 1514 18:34:22.933967  Done allocating resources.

 1515 18:34:22.940689  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1516 18:34:22.946967  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1517 18:34:22.950336  Configure GPIOs for I2S audio on UP4.

 1518 18:34:22.957376  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1519 18:34:22.960655  Enabling resources...

 1520 18:34:22.963410  PCI: 00:00.0 subsystem <- 8086/9a12

 1521 18:34:22.964023  PCI: 00:00.0 cmd <- 06

 1522 18:34:22.970341  PCI: 00:02.0 subsystem <- 8086/9a40

 1523 18:34:22.970774  PCI: 00:02.0 cmd <- 03

 1524 18:34:22.973850  PCI: 00:04.0 subsystem <- 8086/9a03

 1525 18:34:22.977035  PCI: 00:04.0 cmd <- 02

 1526 18:34:22.980528  PCI: 00:05.0 subsystem <- 8086/9a19

 1527 18:34:22.983610  PCI: 00:05.0 cmd <- 02

 1528 18:34:22.987258  PCI: 00:08.0 subsystem <- 8086/9a11

 1529 18:34:22.990319  PCI: 00:08.0 cmd <- 06

 1530 18:34:22.993732  PCI: 00:0d.0 subsystem <- 8086/9a13

 1531 18:34:22.997232  PCI: 00:0d.0 cmd <- 02

 1532 18:34:23.000336  PCI: 00:14.0 subsystem <- 8086/a0ed

 1533 18:34:23.003742  PCI: 00:14.0 cmd <- 02

 1534 18:34:23.007013  PCI: 00:14.2 subsystem <- 8086/a0ef

 1535 18:34:23.007700  PCI: 00:14.2 cmd <- 02

 1536 18:34:23.013772  PCI: 00:14.3 subsystem <- 8086/a0f0

 1537 18:34:23.014198  PCI: 00:14.3 cmd <- 02

 1538 18:34:23.017089  PCI: 00:15.0 subsystem <- 8086/a0e8

 1539 18:34:23.020543  PCI: 00:15.0 cmd <- 02

 1540 18:34:23.023898  PCI: 00:15.1 subsystem <- 8086/a0e9

 1541 18:34:23.027092  PCI: 00:15.1 cmd <- 02

 1542 18:34:23.030843  PCI: 00:15.2 subsystem <- 8086/a0ea

 1543 18:34:23.033829  PCI: 00:15.2 cmd <- 02

 1544 18:34:23.037561  PCI: 00:15.3 subsystem <- 8086/a0eb

 1545 18:34:23.040626  PCI: 00:15.3 cmd <- 02

 1546 18:34:23.044265  PCI: 00:16.0 subsystem <- 8086/a0e0

 1547 18:34:23.047221  PCI: 00:16.0 cmd <- 02

 1548 18:34:23.050682  PCI: 00:19.1 subsystem <- 8086/a0c6

 1549 18:34:23.051124  PCI: 00:19.1 cmd <- 02

 1550 18:34:23.054479  PCI: 00:1d.0 bridge ctrl <- 0013

 1551 18:34:23.060979  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1552 18:34:23.061418  PCI: 00:1d.0 cmd <- 06

 1553 18:34:23.064130  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1554 18:34:23.067580  PCI: 00:1e.0 cmd <- 06

 1555 18:34:23.070678  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1556 18:34:23.074372  PCI: 00:1e.2 cmd <- 06

 1557 18:34:23.077972  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1558 18:34:23.081045  PCI: 00:1e.3 cmd <- 02

 1559 18:34:23.084523  PCI: 00:1f.0 subsystem <- 8086/a087

 1560 18:34:23.087440  PCI: 00:1f.0 cmd <- 407

 1561 18:34:23.091138  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1562 18:34:23.094279  PCI: 00:1f.3 cmd <- 02

 1563 18:34:23.097850  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1564 18:34:23.098283  PCI: 00:1f.5 cmd <- 406

 1565 18:34:23.103369  PCI: 01:00.0 cmd <- 02

 1566 18:34:23.108063  done.

 1567 18:34:23.110981  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1568 18:34:23.114750  Initializing devices...

 1569 18:34:23.118132  Root Device init

 1570 18:34:23.120896  Chrome EC: Set SMI mask to 0x0000000000000000

 1571 18:34:23.127556  Chrome EC: clear events_b mask to 0x0000000000000000

 1572 18:34:23.134286  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1573 18:34:23.137656  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1574 18:34:23.144985  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1575 18:34:23.151737  Chrome EC: Set WAKE mask to 0x0000000000000000

 1576 18:34:23.155194  fw_config match found: DB_USB=USB3_ACTIVE

 1577 18:34:23.161647  Configure Right Type-C port orientation for retimer

 1578 18:34:23.164690  Root Device init finished in 44 msecs

 1579 18:34:23.168403  PCI: 00:00.0 init

 1580 18:34:23.172011  CPU TDP = 9 Watts

 1581 18:34:23.172454  CPU PL1 = 9 Watts

 1582 18:34:23.174977  CPU PL2 = 40 Watts

 1583 18:34:23.178555  CPU PL4 = 83 Watts

 1584 18:34:23.181604  PCI: 00:00.0 init finished in 8 msecs

 1585 18:34:23.182038  PCI: 00:02.0 init

 1586 18:34:23.185193  GMA: Found VBT in CBFS

 1587 18:34:23.188257  GMA: Found valid VBT in CBFS

 1588 18:34:23.194916  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1589 18:34:23.201381                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1590 18:34:23.204949  PCI: 00:02.0 init finished in 18 msecs

 1591 18:34:23.208007  PCI: 00:05.0 init

 1592 18:34:23.211645  PCI: 00:05.0 init finished in 0 msecs

 1593 18:34:23.214881  PCI: 00:08.0 init

 1594 18:34:23.218465  PCI: 00:08.0 init finished in 0 msecs

 1595 18:34:23.221229  PCI: 00:14.0 init

 1596 18:34:23.224748  PCI: 00:14.0 init finished in 0 msecs

 1597 18:34:23.228263  PCI: 00:14.2 init

 1598 18:34:23.231684  PCI: 00:14.2 init finished in 0 msecs

 1599 18:34:23.234735  PCI: 00:15.0 init

 1600 18:34:23.235276  I2C bus 0 version 0x3230302a

 1601 18:34:23.241413  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1602 18:34:23.244568  PCI: 00:15.0 init finished in 6 msecs

 1603 18:34:23.245005  PCI: 00:15.1 init

 1604 18:34:23.248316  I2C bus 1 version 0x3230302a

 1605 18:34:23.251440  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1606 18:34:23.254961  PCI: 00:15.1 init finished in 6 msecs

 1607 18:34:23.258162  PCI: 00:15.2 init

 1608 18:34:23.261474  I2C bus 2 version 0x3230302a

 1609 18:34:23.265047  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1610 18:34:23.268136  PCI: 00:15.2 init finished in 6 msecs

 1611 18:34:23.271658  PCI: 00:15.3 init

 1612 18:34:23.274696  I2C bus 3 version 0x3230302a

 1613 18:34:23.278608  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1614 18:34:23.281657  PCI: 00:15.3 init finished in 6 msecs

 1615 18:34:23.285255  PCI: 00:16.0 init

 1616 18:34:23.288294  PCI: 00:16.0 init finished in 0 msecs

 1617 18:34:23.291722  PCI: 00:19.1 init

 1618 18:34:23.292370  I2C bus 5 version 0x3230302a

 1619 18:34:23.298071  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1620 18:34:23.301798  PCI: 00:19.1 init finished in 6 msecs

 1621 18:34:23.302286  PCI: 00:1d.0 init

 1622 18:34:23.304931  Initializing PCH PCIe bridge.

 1623 18:34:23.308395  PCI: 00:1d.0 init finished in 3 msecs

 1624 18:34:23.312334  PCI: 00:1f.0 init

 1625 18:34:23.315865  IOAPIC: Initializing IOAPIC at 0xfec00000

 1626 18:34:23.322543  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1627 18:34:23.323104  IOAPIC: ID = 0x02

 1628 18:34:23.325690  IOAPIC: Dumping registers

 1629 18:34:23.329011    reg 0x0000: 0x02000000

 1630 18:34:23.332020    reg 0x0001: 0x00770020

 1631 18:34:23.332439    reg 0x0002: 0x00000000

 1632 18:34:23.338580  PCI: 00:1f.0 init finished in 21 msecs

 1633 18:34:23.339003  PCI: 00:1f.2 init

 1634 18:34:23.341991  Disabling ACPI via APMC.

 1635 18:34:23.345886  APMC done.

 1636 18:34:23.348752  PCI: 00:1f.2 init finished in 5 msecs

 1637 18:34:23.360906  PCI: 01:00.0 init

 1638 18:34:23.363900  PCI: 01:00.0 init finished in 0 msecs

 1639 18:34:23.367534  PNP: 0c09.0 init

 1640 18:34:23.370499  Google Chrome EC uptime: 10.177 seconds

 1641 18:34:23.377214  Google Chrome AP resets since EC boot: 0

 1642 18:34:23.380670  Google Chrome most recent AP reset causes:

 1643 18:34:23.387404  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1644 18:34:23.390963  PNP: 0c09.0 init finished in 19 msecs

 1645 18:34:23.395985  Devices initialized

 1646 18:34:23.399402  Show all devs... After init.

 1647 18:34:23.402686  Root Device: enabled 1

 1648 18:34:23.403114  DOMAIN: 0000: enabled 1

 1649 18:34:23.405868  CPU_CLUSTER: 0: enabled 1

 1650 18:34:23.408933  PCI: 00:00.0: enabled 1

 1651 18:34:23.412305  PCI: 00:02.0: enabled 1

 1652 18:34:23.412382  PCI: 00:04.0: enabled 1

 1653 18:34:23.415413  PCI: 00:05.0: enabled 1

 1654 18:34:23.419081  PCI: 00:06.0: enabled 0

 1655 18:34:23.422108  PCI: 00:07.0: enabled 0

 1656 18:34:23.422199  PCI: 00:07.1: enabled 0

 1657 18:34:23.425381  PCI: 00:07.2: enabled 0

 1658 18:34:23.428726  PCI: 00:07.3: enabled 0

 1659 18:34:23.431979  PCI: 00:08.0: enabled 1

 1660 18:34:23.432064  PCI: 00:09.0: enabled 0

 1661 18:34:23.435240  PCI: 00:0a.0: enabled 0

 1662 18:34:23.438904  PCI: 00:0d.0: enabled 1

 1663 18:34:23.441915  PCI: 00:0d.1: enabled 0

 1664 18:34:23.442013  PCI: 00:0d.2: enabled 0

 1665 18:34:23.445844  PCI: 00:0d.3: enabled 0

 1666 18:34:23.448966  PCI: 00:0e.0: enabled 0

 1667 18:34:23.449444  PCI: 00:10.2: enabled 1

 1668 18:34:23.452388  PCI: 00:10.6: enabled 0

 1669 18:34:23.455728  PCI: 00:10.7: enabled 0

 1670 18:34:23.458765  PCI: 00:12.0: enabled 0

 1671 18:34:23.459191  PCI: 00:12.6: enabled 0

 1672 18:34:23.462016  PCI: 00:13.0: enabled 0

 1673 18:34:23.465676  PCI: 00:14.0: enabled 1

 1674 18:34:23.468872  PCI: 00:14.1: enabled 0

 1675 18:34:23.469339  PCI: 00:14.2: enabled 1

 1676 18:34:23.472385  PCI: 00:14.3: enabled 1

 1677 18:34:23.475455  PCI: 00:15.0: enabled 1

 1678 18:34:23.479282  PCI: 00:15.1: enabled 1

 1679 18:34:23.479707  PCI: 00:15.2: enabled 1

 1680 18:34:23.482454  PCI: 00:15.3: enabled 1

 1681 18:34:23.485403  PCI: 00:16.0: enabled 1

 1682 18:34:23.485827  PCI: 00:16.1: enabled 0

 1683 18:34:23.488962  PCI: 00:16.2: enabled 0

 1684 18:34:23.492182  PCI: 00:16.3: enabled 0

 1685 18:34:23.495320  PCI: 00:16.4: enabled 0

 1686 18:34:23.495749  PCI: 00:16.5: enabled 0

 1687 18:34:23.498961  PCI: 00:17.0: enabled 0

 1688 18:34:23.502051  PCI: 00:19.0: enabled 0

 1689 18:34:23.505645  PCI: 00:19.1: enabled 1

 1690 18:34:23.506122  PCI: 00:19.2: enabled 0

 1691 18:34:23.509279  PCI: 00:1c.0: enabled 1

 1692 18:34:23.512409  PCI: 00:1c.1: enabled 0

 1693 18:34:23.516230  PCI: 00:1c.2: enabled 0

 1694 18:34:23.516816  PCI: 00:1c.3: enabled 0

 1695 18:34:23.518852  PCI: 00:1c.4: enabled 0

 1696 18:34:23.522656  PCI: 00:1c.5: enabled 0

 1697 18:34:23.523190  PCI: 00:1c.6: enabled 1

 1698 18:34:23.525471  PCI: 00:1c.7: enabled 0

 1699 18:34:23.528986  PCI: 00:1d.0: enabled 1

 1700 18:34:23.531963  PCI: 00:1d.1: enabled 0

 1701 18:34:23.532392  PCI: 00:1d.2: enabled 1

 1702 18:34:23.535095  PCI: 00:1d.3: enabled 0

 1703 18:34:23.539030  PCI: 00:1e.0: enabled 1

 1704 18:34:23.542119  PCI: 00:1e.1: enabled 0

 1705 18:34:23.542543  PCI: 00:1e.2: enabled 1

 1706 18:34:23.545523  PCI: 00:1e.3: enabled 1

 1707 18:34:23.549089  PCI: 00:1f.0: enabled 1

 1708 18:34:23.551892  PCI: 00:1f.1: enabled 0

 1709 18:34:23.552316  PCI: 00:1f.2: enabled 1

 1710 18:34:23.555708  PCI: 00:1f.3: enabled 1

 1711 18:34:23.558955  PCI: 00:1f.4: enabled 0

 1712 18:34:23.561932  PCI: 00:1f.5: enabled 1

 1713 18:34:23.562426  PCI: 00:1f.6: enabled 0

 1714 18:34:23.565527  PCI: 00:1f.7: enabled 0

 1715 18:34:23.568667  APIC: 00: enabled 1

 1716 18:34:23.569129  GENERIC: 0.0: enabled 1

 1717 18:34:23.571813  GENERIC: 0.0: enabled 1

 1718 18:34:23.575056  GENERIC: 1.0: enabled 1

 1719 18:34:23.578413  GENERIC: 0.0: enabled 1

 1720 18:34:23.578973  GENERIC: 1.0: enabled 1

 1721 18:34:23.582100  USB0 port 0: enabled 1

 1722 18:34:23.585029  GENERIC: 0.0: enabled 1

 1723 18:34:23.585456  USB0 port 0: enabled 1

 1724 18:34:23.588716  GENERIC: 0.0: enabled 1

 1725 18:34:23.591964  I2C: 00:1a: enabled 1

 1726 18:34:23.595115  I2C: 00:31: enabled 1

 1727 18:34:23.595539  I2C: 00:32: enabled 1

 1728 18:34:23.598521  I2C: 00:10: enabled 1

 1729 18:34:23.602002  I2C: 00:15: enabled 1

 1730 18:34:23.602425  GENERIC: 0.0: enabled 0

 1731 18:34:23.605269  GENERIC: 1.0: enabled 0

 1732 18:34:23.608604  GENERIC: 0.0: enabled 1

 1733 18:34:23.609032  SPI: 00: enabled 1

 1734 18:34:23.611591  SPI: 00: enabled 1

 1735 18:34:23.615237  PNP: 0c09.0: enabled 1

 1736 18:34:23.615661  GENERIC: 0.0: enabled 1

 1737 18:34:23.618492  USB3 port 0: enabled 1

 1738 18:34:23.621887  USB3 port 1: enabled 1

 1739 18:34:23.622356  USB3 port 2: enabled 0

 1740 18:34:23.624695  USB3 port 3: enabled 0

 1741 18:34:23.628433  USB2 port 0: enabled 0

 1742 18:34:23.631397  USB2 port 1: enabled 1

 1743 18:34:23.631824  USB2 port 2: enabled 1

 1744 18:34:23.634987  USB2 port 3: enabled 0

 1745 18:34:23.638016  USB2 port 4: enabled 1

 1746 18:34:23.638559  USB2 port 5: enabled 0

 1747 18:34:23.641660  USB2 port 6: enabled 0

 1748 18:34:23.644599  USB2 port 7: enabled 0

 1749 18:34:23.648149  USB2 port 8: enabled 0

 1750 18:34:23.648601  USB2 port 9: enabled 0

 1751 18:34:23.651743  USB3 port 0: enabled 0

 1752 18:34:23.654875  USB3 port 1: enabled 1

 1753 18:34:23.655304  USB3 port 2: enabled 0

 1754 18:34:23.658297  USB3 port 3: enabled 0

 1755 18:34:23.661268  GENERIC: 0.0: enabled 1

 1756 18:34:23.664646  GENERIC: 1.0: enabled 1

 1757 18:34:23.665075  APIC: 01: enabled 1

 1758 18:34:23.668377  APIC: 03: enabled 1

 1759 18:34:23.668870  APIC: 07: enabled 1

 1760 18:34:23.671300  APIC: 05: enabled 1

 1761 18:34:23.674626  APIC: 04: enabled 1

 1762 18:34:23.675120  APIC: 02: enabled 1

 1763 18:34:23.678187  APIC: 06: enabled 1

 1764 18:34:23.681471  PCI: 01:00.0: enabled 1

 1765 18:34:23.685026  BS: BS_DEV_INIT run times (exec / console): 31 / 536 ms

 1766 18:34:23.691610  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1767 18:34:23.694915  ELOG: NV offset 0xf30000 size 0x1000

 1768 18:34:23.701814  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1769 18:34:23.707831  ELOG: Event(17) added with size 13 at 2024-06-06 18:32:58 UTC

 1770 18:34:23.714498  ELOG: Event(92) added with size 9 at 2024-06-06 18:32:58 UTC

 1771 18:34:23.721518  ELOG: Event(93) added with size 9 at 2024-06-06 18:32:58 UTC

 1772 18:34:23.727931  ELOG: Event(9E) added with size 10 at 2024-06-06 18:32:58 UTC

 1773 18:34:23.734474  ELOG: Event(9F) added with size 14 at 2024-06-06 18:32:58 UTC

 1774 18:34:23.738191  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1775 18:34:23.744961  ELOG: Event(A1) added with size 10 at 2024-06-06 18:32:58 UTC

 1776 18:34:23.755335  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 1777 18:34:23.761121  ELOG: Event(A0) added with size 9 at 2024-06-06 18:32:58 UTC

 1778 18:34:23.764799  elog_add_boot_reason: Logged dev mode boot

 1779 18:34:23.771169  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1780 18:34:23.771592  Finalize devices...

 1781 18:34:23.774260  Devices finalized

 1782 18:34:23.777820  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1783 18:34:23.784627  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1784 18:34:23.791163  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1785 18:34:23.794614  ME: HFSTS1                      : 0x80030055

 1786 18:34:23.797977  ME: HFSTS2                      : 0x30280116

 1787 18:34:23.804677  ME: HFSTS3                      : 0x00000050

 1788 18:34:23.807860  ME: HFSTS4                      : 0x00004000

 1789 18:34:23.811414  ME: HFSTS5                      : 0x00000000

 1790 18:34:23.817935  ME: HFSTS6                      : 0x00400006

 1791 18:34:23.820876  ME: Manufacturing Mode          : YES

 1792 18:34:23.824608  ME: SPI Protection Mode Enabled : NO

 1793 18:34:23.827764  ME: FW Partition Table          : OK

 1794 18:34:23.831172  ME: Bringup Loader Failure      : NO

 1795 18:34:23.834286  ME: Firmware Init Complete      : NO

 1796 18:34:23.841072  ME: Boot Options Present        : NO

 1797 18:34:23.844300  ME: Update In Progress          : NO

 1798 18:34:23.847884  ME: D0i3 Support                : YES

 1799 18:34:23.851007  ME: Low Power State Enabled     : NO

 1800 18:34:23.854134  ME: CPU Replaced                : YES

 1801 18:34:23.857493  ME: CPU Replacement Valid       : YES

 1802 18:34:23.860732  ME: Current Working State       : 5

 1803 18:34:23.864317  ME: Current Operation State     : 1

 1804 18:34:23.870887  ME: Current Operation Mode      : 3

 1805 18:34:23.874051  ME: Error Code                  : 0

 1806 18:34:23.877308  ME: Enhanced Debug Mode         : NO

 1807 18:34:23.880852  ME: CPU Debug Disabled          : YES

 1808 18:34:23.883847  ME: TXT Support                 : NO

 1809 18:34:23.890667  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1810 18:34:23.897153  ELOG: Event(91) added with size 10 at 2024-06-06 18:32:58 UTC

 1811 18:34:23.900590  Chrome EC: clear events_b mask to 0x0000000020004000

 1812 18:34:23.908309  BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms

 1813 18:34:23.918196  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4d1c4

 1814 18:34:23.921293  CBFS: 'fallback/slic' not found.

 1815 18:34:23.924705  ACPI: Writing ACPI tables at 76b02000.

 1816 18:34:23.925133  ACPI:    * FACS

 1817 18:34:23.928251  ACPI:    * DSDT

 1818 18:34:23.931313  Ramoops buffer: 0x100000@0x76a01000.

 1819 18:34:23.934791  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1820 18:34:23.941227  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1821 18:34:23.944407  Google Chrome EC: version:

 1822 18:34:23.948019  	ro: voema_v2.0.7540-147f8d37d1

 1823 18:34:23.951147  	rw: voema_v2.0.7540-147f8d37d1

 1824 18:34:23.951530    running image: 1

 1825 18:34:23.957575  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1826 18:34:23.962515  ACPI:    * FADT

 1827 18:34:23.962938  SCI is IRQ9

 1828 18:34:23.969241  ACPI: added table 1/32, length now 40

 1829 18:34:23.969691  ACPI:     * SSDT

 1830 18:34:23.972314  Found 1 CPU(s) with 8 core(s) each.

 1831 18:34:23.979133  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1832 18:34:23.982211  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1833 18:34:23.985405  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1834 18:34:23.988924  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1835 18:34:23.995619  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1836 18:34:24.002210  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1837 18:34:24.005492  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1838 18:34:24.011925  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1839 18:34:24.018721  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1840 18:34:24.022184  \_SB.PCI0.RP09: Added StorageD3Enable property

 1841 18:34:24.025396  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1842 18:34:24.032320  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1843 18:34:24.039444  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1844 18:34:24.042785  PS2K: Passing 80 keymaps to kernel

 1845 18:34:24.048948  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1846 18:34:24.055984  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1847 18:34:24.062588  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1848 18:34:24.069214  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1849 18:34:24.075835  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1850 18:34:24.082534  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1851 18:34:24.089423  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1852 18:34:24.095758  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1853 18:34:24.098916  ACPI: added table 2/32, length now 44

 1854 18:34:24.099440  ACPI:    * MCFG

 1855 18:34:24.105903  ACPI: added table 3/32, length now 48

 1856 18:34:24.106500  ACPI:    * TPM2

 1857 18:34:24.109102  TPM2 log created at 0x769f1000

 1858 18:34:24.112654  ACPI: added table 4/32, length now 52

 1859 18:34:24.115590  ACPI:    * MADT

 1860 18:34:24.116010  SCI is IRQ9

 1861 18:34:24.118824  ACPI: added table 5/32, length now 56

 1862 18:34:24.122284  current = 76b0a850

 1863 18:34:24.122704  ACPI:    * DMAR

 1864 18:34:24.125690  ACPI: added table 6/32, length now 60

 1865 18:34:24.132360  ACPI: added table 7/32, length now 64

 1866 18:34:24.132842  ACPI:    * HPET

 1867 18:34:24.135685  ACPI: added table 8/32, length now 68

 1868 18:34:24.138989  ACPI: done.

 1869 18:34:24.139519  ACPI tables: 35216 bytes.

 1870 18:34:24.142038  smbios_write_tables: 769f0000

 1871 18:34:24.145459  EC returned error result code 3

 1872 18:34:24.149052  Couldn't obtain OEM name from CBI

 1873 18:34:24.153066  Create SMBIOS type 16

 1874 18:34:24.156078  Create SMBIOS type 17

 1875 18:34:24.159332  GENERIC: 0.0 (WIFI Device)

 1876 18:34:24.159756  SMBIOS tables: 1750 bytes.

 1877 18:34:24.166450  Writing table forward entry at 0x00000500

 1878 18:34:24.172943  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 292c

 1879 18:34:24.176154  Writing coreboot table at 0x76b26000

 1880 18:34:24.182801   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1881 18:34:24.185941   1. 0000000000001000-000000000009ffff: RAM

 1882 18:34:24.189447   2. 00000000000a0000-00000000000fffff: RESERVED

 1883 18:34:24.195991   3. 0000000000100000-00000000769effff: RAM

 1884 18:34:24.199727   4. 00000000769f0000-0000000076b98fff: CONFIGURATION TABLES

 1885 18:34:24.205928   5. 0000000076b99000-0000000076c0afff: RAMSTAGE

 1886 18:34:24.212644   6. 0000000076c0b000-0000000076ffffff: CONFIGURATION TABLES

 1887 18:34:24.215887   7. 0000000077000000-000000007fbfffff: RESERVED

 1888 18:34:24.219420   8. 00000000c0000000-00000000cfffffff: RESERVED

 1889 18:34:24.225943   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1890 18:34:24.229043  10. 00000000fb000000-00000000fb000fff: RESERVED

 1891 18:34:24.235644  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1892 18:34:24.239244  12. 00000000fed80000-00000000fed87fff: RESERVED

 1893 18:34:24.245816  13. 00000000fed90000-00000000fed92fff: RESERVED

 1894 18:34:24.249175  14. 00000000feda0000-00000000feda1fff: RESERVED

 1895 18:34:24.256130  15. 00000000fedc0000-00000000feddffff: RESERVED

 1896 18:34:24.259133  16. 0000000100000000-00000002803fffff: RAM

 1897 18:34:24.262319  Passing 4 GPIOs to payload:

 1898 18:34:24.265857              NAME |       PORT | POLARITY |     VALUE

 1899 18:34:24.272507               lid |  undefined |     high |      high

 1900 18:34:24.275901             power |  undefined |     high |       low

 1901 18:34:24.282698             oprom |  undefined |     high |       low

 1902 18:34:24.288843          EC in RW | 0x000000e5 |     high |       low

 1903 18:34:24.295727  Wrote coreboot table at: 0x76b26000, 0x610 bytes, checksum be2a

 1904 18:34:24.296252  coreboot table: 1576 bytes.

 1905 18:34:24.302407  IMD ROOT    0. 0x76fff000 0x00001000

 1906 18:34:24.305487  IMD SMALL   1. 0x76ffe000 0x00001000

 1907 18:34:24.308627  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1908 18:34:24.312349  RO MCACHE   3. 0x76c4d000 0x00000fdc

 1909 18:34:24.315270  CONSOLE     4. 0x76c2d000 0x00020000

 1910 18:34:24.318610  FMAP        5. 0x76c2c000 0x00000578

 1911 18:34:24.322271  TIME STAMP  6. 0x76c2b000 0x00000910

 1912 18:34:24.325327  VBOOT WORK  7. 0x76c17000 0x00014000

 1913 18:34:24.331982  ROMSTG STCK 8. 0x76c16000 0x00001000

 1914 18:34:24.335790  AFTER CAR   9. 0x76c0b000 0x0000b000

 1915 18:34:24.338801  RAMSTAGE   10. 0x76b98000 0x00073000

 1916 18:34:24.342268  REFCODE    11. 0x76b43000 0x00055000

 1917 18:34:24.345265  SMM BACKUP 12. 0x76b33000 0x00010000

 1918 18:34:24.348613  4f444749   13. 0x76b31000 0x00002000

 1919 18:34:24.352357  EXT VBT14. 0x76b2e000 0x0000219f

 1920 18:34:24.355271  COREBOOT   15. 0x76b26000 0x00008000

 1921 18:34:24.358897  ACPI       16. 0x76b02000 0x00024000

 1922 18:34:24.361963  ACPI GNVS  17. 0x76b01000 0x00001000

 1923 18:34:24.368912  RAMOOPS    18. 0x76a01000 0x00100000

 1924 18:34:24.372024  TPM2 TCGLOG19. 0x769f1000 0x00010000

 1925 18:34:24.375705  SMBIOS     20. 0x769f0000 0x00000800

 1926 18:34:24.376236  IMD small region:

 1927 18:34:24.382195    IMD ROOT    0. 0x76ffec00 0x00000400

 1928 18:34:24.385348    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1929 18:34:24.388800    VPD         2. 0x76ffe9a0 0x00000235

 1930 18:34:24.391842    POWER STATE 3. 0x76ffe940 0x00000044

 1931 18:34:24.395461    ROMSTAGE    4. 0x76ffe920 0x00000004

 1932 18:34:24.399010    MEM INFO    5. 0x76ffe740 0x000001e0

 1933 18:34:24.405213  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1934 18:34:24.408918  MTRR: Physical address space:

 1935 18:34:24.415187  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1936 18:34:24.421814  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1937 18:34:24.428537  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1938 18:34:24.435435  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1939 18:34:24.441874  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1940 18:34:24.445251  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1941 18:34:24.451593  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1942 18:34:24.458570  MTRR: Fixed MSR 0x250 0x0606060606060606

 1943 18:34:24.462027  MTRR: Fixed MSR 0x258 0x0606060606060606

 1944 18:34:24.464986  MTRR: Fixed MSR 0x259 0x0000000000000000

 1945 18:34:24.468165  MTRR: Fixed MSR 0x268 0x0606060606060606

 1946 18:34:24.474984  MTRR: Fixed MSR 0x269 0x0606060606060606

 1947 18:34:24.478436  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1948 18:34:24.481786  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1949 18:34:24.484898  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1950 18:34:24.488095  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1951 18:34:24.494905  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1952 18:34:24.497940  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1953 18:34:24.501768  call enable_fixed_mtrr()

 1954 18:34:24.504832  CPU physical address size: 39 bits

 1955 18:34:24.508254  MTRR: default type WB/UC MTRR counts: 6/6.

 1956 18:34:24.515001  MTRR: UC selected as default type.

 1957 18:34:24.518115  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1958 18:34:24.524772  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1959 18:34:24.531302  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1960 18:34:24.538052  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1961 18:34:24.544663  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1962 18:34:24.551321  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1963 18:34:24.554537  MTRR: Fixed MSR 0x250 0x0606060606060606

 1964 18:34:24.561194  MTRR: Fixed MSR 0x258 0x0606060606060606

 1965 18:34:24.564484  MTRR: Fixed MSR 0x259 0x0000000000000000

 1966 18:34:24.567880  MTRR: Fixed MSR 0x268 0x0606060606060606

 1967 18:34:24.571205  MTRR: Fixed MSR 0x269 0x0606060606060606

 1968 18:34:24.577981  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1969 18:34:24.581050  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1970 18:34:24.584634  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1971 18:34:24.587545  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1972 18:34:24.594450  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1973 18:34:24.598171  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1974 18:34:24.598703  

 1975 18:34:24.600999  MTRR check

 1976 18:34:24.601508  call enable_fixed_mtrr()

 1977 18:34:24.604586  Fixed MTRRs   : Enabled

 1978 18:34:24.607681  Variable MTRRs: Enabled

 1979 18:34:24.608200  

 1980 18:34:24.611079  CPU physical address size: 39 bits

 1981 18:34:24.618070  BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms

 1982 18:34:24.620907  MTRR: Fixed MSR 0x250 0x0606060606060606

 1983 18:34:24.624439  MTRR: Fixed MSR 0x250 0x0606060606060606

 1984 18:34:24.630977  MTRR: Fixed MSR 0x258 0x0606060606060606

 1985 18:34:24.634246  MTRR: Fixed MSR 0x259 0x0000000000000000

 1986 18:34:24.637820  MTRR: Fixed MSR 0x268 0x0606060606060606

 1987 18:34:24.641115  MTRR: Fixed MSR 0x269 0x0606060606060606

 1988 18:34:24.647392  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1989 18:34:24.651105  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1990 18:34:24.653989  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1991 18:34:24.657641  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1992 18:34:24.664031  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1993 18:34:24.667637  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1994 18:34:24.670469  MTRR: Fixed MSR 0x258 0x0606060606060606

 1995 18:34:24.677532  MTRR: Fixed MSR 0x259 0x0000000000000000

 1996 18:34:24.680694  MTRR: Fixed MSR 0x268 0x0606060606060606

 1997 18:34:24.684034  MTRR: Fixed MSR 0x269 0x0606060606060606

 1998 18:34:24.687611  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1999 18:34:24.694032  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2000 18:34:24.697465  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2001 18:34:24.700755  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2002 18:34:24.703613  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2003 18:34:24.710408  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2004 18:34:24.713923  call enable_fixed_mtrr()

 2005 18:34:24.714357  call enable_fixed_mtrr()

 2006 18:34:24.724143  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4df60

 2007 18:34:24.726943  MTRR: Fixed MSR 0x250 0x0606060606060606

 2008 18:34:24.730165  MTRR: Fixed MSR 0x250 0x0606060606060606

 2009 18:34:24.733958  MTRR: Fixed MSR 0x258 0x0606060606060606

 2010 18:34:24.740344  MTRR: Fixed MSR 0x259 0x0000000000000000

 2011 18:34:24.743499  MTRR: Fixed MSR 0x268 0x0606060606060606

 2012 18:34:24.747221  MTRR: Fixed MSR 0x269 0x0606060606060606

 2013 18:34:24.750451  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2014 18:34:24.757050  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2015 18:34:24.760015  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2016 18:34:24.763722  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2017 18:34:24.766897  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2018 18:34:24.770400  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2019 18:34:24.776637  MTRR: Fixed MSR 0x258 0x0606060606060606

 2020 18:34:24.779926  call enable_fixed_mtrr()

 2021 18:34:24.783338  MTRR: Fixed MSR 0x259 0x0000000000000000

 2022 18:34:24.786548  MTRR: Fixed MSR 0x268 0x0606060606060606

 2023 18:34:24.789962  MTRR: Fixed MSR 0x269 0x0606060606060606

 2024 18:34:24.796482  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2025 18:34:24.800040  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2026 18:34:24.803645  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2027 18:34:24.806771  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2028 18:34:24.813352  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2029 18:34:24.816506  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2030 18:34:24.819817  CPU physical address size: 39 bits

 2031 18:34:24.824004  call enable_fixed_mtrr()

 2032 18:34:24.827094  MTRR: Fixed MSR 0x250 0x0606060606060606

 2033 18:34:24.834004  MTRR: Fixed MSR 0x250 0x0606060606060606

 2034 18:34:24.837043  MTRR: Fixed MSR 0x258 0x0606060606060606

 2035 18:34:24.840411  MTRR: Fixed MSR 0x259 0x0000000000000000

 2036 18:34:24.843909  MTRR: Fixed MSR 0x268 0x0606060606060606

 2037 18:34:24.850516  MTRR: Fixed MSR 0x269 0x0606060606060606

 2038 18:34:24.853561  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2039 18:34:24.856892  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2040 18:34:24.860374  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2041 18:34:24.867153  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2042 18:34:24.870347  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2043 18:34:24.873410  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2044 18:34:24.880240  MTRR: Fixed MSR 0x258 0x0606060606060606

 2045 18:34:24.880690  call enable_fixed_mtrr()

 2046 18:34:24.886720  MTRR: Fixed MSR 0x259 0x0000000000000000

 2047 18:34:24.889981  MTRR: Fixed MSR 0x268 0x0606060606060606

 2048 18:34:24.893513  MTRR: Fixed MSR 0x269 0x0606060606060606

 2049 18:34:24.896827  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2050 18:34:24.903260  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2051 18:34:24.906940  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2052 18:34:24.909982  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2053 18:34:24.913084  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2054 18:34:24.916897  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2055 18:34:24.923268  CPU physical address size: 39 bits

 2056 18:34:24.926706  call enable_fixed_mtrr()

 2057 18:34:24.929935  CPU physical address size: 39 bits

 2058 18:34:24.933373  CPU physical address size: 39 bits

 2059 18:34:24.936349  CPU physical address size: 39 bits

 2060 18:34:24.940080  CPU physical address size: 39 bits

 2061 18:34:24.946623  Checking segment from ROM address 0xffc02b38

 2062 18:34:24.949662  Checking segment from ROM address 0xffc02b54

 2063 18:34:24.956463  Loading segment from ROM address 0xffc02b38

 2064 18:34:24.956948    code (compression=0)

 2065 18:34:24.966431    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2066 18:34:24.973242  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2067 18:34:24.976424  it's not compressed!

 2068 18:34:25.115238  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2069 18:34:25.121911  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2070 18:34:25.128600  Loading segment from ROM address 0xffc02b54

 2071 18:34:25.129036    Entry Point 0x30000000

 2072 18:34:25.132143  Loaded segments

 2073 18:34:25.138895  BS: BS_PAYLOAD_LOAD run times (exec / console): 451 / 63 ms

 2074 18:34:25.181535  Finalizing chipset.

 2075 18:34:25.184954  Finalizing SMM.

 2076 18:34:25.185389  APMC done.

 2077 18:34:25.191340  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2078 18:34:25.194432  mp_park_aps done after 0 msecs.

 2079 18:34:25.198098  Jumping to boot code at 0x30000000(0x76b26000)

 2080 18:34:25.207785  CPU0: stack: 0x76bef000 - 0x76bf0000, lowest used address 0x76befa78, stack used: 1416 bytes

 2081 18:34:25.207971  

 2082 18:34:25.208126  

 2083 18:34:25.208262  

 2084 18:34:25.211224  Starting depthcharge on Voema...

 2085 18:34:25.211391  

 2086 18:34:25.211901  end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
 2087 18:34:25.212107  start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
 2088 18:34:25.212286  Setting prompt string to ['volteer:']
 2089 18:34:25.212460  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
 2090 18:34:25.221415  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2091 18:34:25.221699  

 2092 18:34:25.227935  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2093 18:34:25.228137  

 2094 18:34:25.231030  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2095 18:34:25.234591  

 2096 18:34:25.237597  Failed to find eMMC card reader

 2097 18:34:25.237850  

 2098 18:34:25.238064  Wipe memory regions:

 2099 18:34:25.238267  

 2100 18:34:25.244794  	[0x00000000001000, 0x000000000a0000)

 2101 18:34:25.245232  

 2102 18:34:25.247953  	[0x00000000100000, 0x00000030000000)

 2103 18:34:25.272990  

 2104 18:34:25.275869  	[0x00000032662db0, 0x000000769f0000)

 2105 18:34:25.311161  

 2106 18:34:25.314686  	[0x00000100000000, 0x00000280400000)

 2107 18:34:25.514676  

 2108 18:34:25.517619  ec_init: CrosEC protocol v3 supported (256, 256)

 2109 18:34:25.518051  

 2110 18:34:25.524167  update_port_state: port C0 state: usb enable 1 mux conn 0

 2111 18:34:25.524626  

 2112 18:34:25.534219  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2113 18:34:25.534654  

 2114 18:34:25.537771  pmc_check_ipc_sts: STS_BUSY done after 1562 us

 2115 18:34:25.538205  

 2116 18:34:25.544163  send_conn_disc_msg: pmc_send_cmd succeeded

 2117 18:34:25.977515  

 2118 18:34:25.978033  R8152: Initializing

 2119 18:34:25.978378  

 2120 18:34:25.980429  Version 6 (ocp_data = 5c30)

 2121 18:34:25.980900  

 2122 18:34:25.984495  R8152: Done initializing

 2123 18:34:25.985029  

 2124 18:34:25.986998  Adding net device

 2125 18:34:26.288991  

 2126 18:34:26.291863  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2127 18:34:26.292325  

 2128 18:34:26.292716  


 2129 18:34:26.295822  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2131 18:34:26.397174  volteer: tftpboot 192.168.201.1 14214089/tftp-deploy-ywqn_dor/kernel/bzImage 14214089/tftp-deploy-ywqn_dor/kernel/cmdline 14214089/tftp-deploy-ywqn_dor/ramdisk/ramdisk.cpio.gz

 2132 18:34:26.397794  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2133 18:34:26.398272  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
 2134 18:34:26.403077  tftpboot 192.168.201.1 14214089/tftp-deploy-ywqn_dor/kernel/bzIploy-ywqn_dor/kernel/cmdline 14214089/tftp-deploy-ywqn_dor/ramdisk/ramdisk.cpio.gz

 2135 18:34:26.403613  

 2136 18:34:26.403948  Waiting for link

 2137 18:34:26.606424  

 2138 18:34:26.606947  done.

 2139 18:34:26.607311  

 2140 18:34:26.607650  MAC: 00:24:32:30:78:74

 2141 18:34:26.607981  

 2142 18:34:26.609774  Sending DHCP discover... done.

 2143 18:34:26.610233  

 2144 18:34:26.612854  Waiting for reply... done.

 2145 18:34:26.613312  

 2146 18:34:26.616355  Sending DHCP request... done.

 2147 18:34:26.616892  

 2148 18:34:26.619503  Waiting for reply... done.

 2149 18:34:26.620007  

 2150 18:34:26.623022  My ip is 192.168.201.14

 2151 18:34:26.623482  

 2152 18:34:26.626152  The DHCP server ip is 192.168.201.1

 2153 18:34:26.626612  

 2154 18:34:26.629517  TFTP server IP predefined by user: 192.168.201.1

 2155 18:34:26.629980  

 2156 18:34:26.635884  Bootfile predefined by user: 14214089/tftp-deploy-ywqn_dor/kernel/bzImage

 2157 18:34:26.636347  

 2158 18:34:26.639810  Sending tftp read request... done.

 2159 18:34:26.640330  

 2160 18:34:26.647969  Waiting for the transfer... 

 2161 18:34:26.648463  

 2162 18:34:27.323504  00000000 ################################################################

 2163 18:34:27.324161  

 2164 18:34:27.945666  00080000 ################################################################

 2165 18:34:27.945803  

 2166 18:34:28.487641  00100000 ################################################################

 2167 18:34:28.487779  

 2168 18:34:29.027249  00180000 ################################################################

 2169 18:34:29.027383  

 2170 18:34:29.570140  00200000 ################################################################

 2171 18:34:29.570278  

 2172 18:34:30.103803  00280000 ################################################################

 2173 18:34:30.103942  

 2174 18:34:30.636327  00300000 ################################################################

 2175 18:34:30.636471  

 2176 18:34:31.166312  00380000 ################################################################

 2177 18:34:31.166453  

 2178 18:34:31.705183  00400000 ################################################################

 2179 18:34:31.705354  

 2180 18:34:32.252262  00480000 ################################################################

 2181 18:34:32.252433  

 2182 18:34:32.913002  00500000 ################################################################

 2183 18:34:32.913621  

 2184 18:34:33.631939  00580000 ################################################################

 2185 18:34:33.632468  

 2186 18:34:34.260951  00600000 ################################################################

 2187 18:34:34.261109  

 2188 18:34:34.916686  00680000 ################################################################

 2189 18:34:34.917230  

 2190 18:34:35.633374  00700000 ################################################################

 2191 18:34:35.633905  

 2192 18:34:36.358027  00780000 ################################################################

 2193 18:34:36.358586  

 2194 18:34:37.071656  00800000 ################################################################

 2195 18:34:37.072195  

 2196 18:34:37.788315  00880000 ################################################################

 2197 18:34:37.788856  

 2198 18:34:38.509771  00900000 ################################################################

 2199 18:34:38.510355  

 2200 18:34:39.221565  00980000 ################################################################

 2201 18:34:39.222154  

 2202 18:34:39.931185  00a00000 ################################################################

 2203 18:34:39.931921  

 2204 18:34:40.670178  00a80000 ################################################################

 2205 18:34:40.670860  

 2206 18:34:41.381947  00b00000 ################################################################

 2207 18:34:41.382515  

 2208 18:34:42.063465  00b80000 ################################################################

 2209 18:34:42.063990  

 2210 18:34:42.733461  00c00000 ################################################################

 2211 18:34:42.733819  

 2212 18:34:43.420353  00c80000 ################################################################

 2213 18:34:43.420953  

 2214 18:34:44.102770  00d00000 ################################################################

 2215 18:34:44.103461  

 2216 18:34:44.804272  00d80000 ################################################################

 2217 18:34:44.804419  

 2218 18:34:45.406212  00e00000 ################################################################

 2219 18:34:45.406362  

 2220 18:34:45.973825  00e80000 ################################################################

 2221 18:34:45.973988  

 2222 18:34:46.536416  00f00000 ################################################################

 2223 18:34:46.536582  

 2224 18:34:47.095774  00f80000 ################################################################

 2225 18:34:47.095971  

 2226 18:34:47.464156  01000000 ########################################### done.

 2227 18:34:47.464296  

 2228 18:34:47.467348  The bootfile was 17121280 bytes long.

 2229 18:34:47.467501  

 2230 18:34:47.470683  Sending tftp read request... done.

 2231 18:34:47.470777  

 2232 18:34:47.473933  Waiting for the transfer... 

 2233 18:34:47.474022  

 2234 18:34:48.010834  00000000 ################################################################

 2235 18:34:48.010992  

 2236 18:34:48.548430  00080000 ################################################################

 2237 18:34:48.548624  

 2238 18:34:49.069986  00100000 ################################################################

 2239 18:34:49.070176  

 2240 18:34:49.609140  00180000 ################################################################

 2241 18:34:49.609301  

 2242 18:34:50.156098  00200000 ################################################################

 2243 18:34:50.156261  

 2244 18:34:50.684288  00280000 ################################################################

 2245 18:34:50.684491  

 2246 18:34:51.232756  00300000 ################################################################

 2247 18:34:51.232929  

 2248 18:34:51.758135  00380000 ################################################################

 2249 18:34:51.758289  

 2250 18:34:52.291172  00400000 ################################################################

 2251 18:34:52.291323  

 2252 18:34:52.836284  00480000 ################################################################

 2253 18:34:52.836433  

 2254 18:34:53.361066  00500000 ################################################################

 2255 18:34:53.361213  

 2256 18:34:53.901640  00580000 ################################################################

 2257 18:34:53.901796  

 2258 18:34:54.455441  00600000 ################################################################

 2259 18:34:54.455578  

 2260 18:34:55.007062  00680000 ################################################################

 2261 18:34:55.007217  

 2262 18:34:55.548305  00700000 ################################################################

 2263 18:34:55.548439  

 2264 18:34:56.091144  00780000 ################################################################

 2265 18:34:56.091294  

 2266 18:34:56.629770  00800000 ################################################################

 2267 18:34:56.629932  

 2268 18:34:57.160783  00880000 ################################################################

 2269 18:34:57.160951  

 2270 18:34:57.697493  00900000 ################################################################

 2271 18:34:57.697656  

 2272 18:34:58.075087  00980000 ############################################## done.

 2273 18:34:58.075243  

 2274 18:34:58.078458  Sending tftp read request... done.

 2275 18:34:58.078667  

 2276 18:34:58.081510  Waiting for the transfer... 

 2277 18:34:58.081644  

 2278 18:34:58.081716  00000000 # done.

 2279 18:34:58.081780  

 2280 18:34:58.091634  Command line loaded dynamically from TFTP file: 14214089/tftp-deploy-ywqn_dor/kernel/cmdline

 2281 18:34:58.091843  

 2282 18:34:58.104751  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2283 18:34:58.112300  

 2284 18:34:58.115785  Shutting down all USB controllers.

 2285 18:34:58.115913  

 2286 18:34:58.115982  Removing current net device

 2287 18:34:58.116045  

 2288 18:34:58.119430  Finalizing coreboot

 2289 18:34:58.119551  

 2290 18:34:58.125598  Exiting depthcharge with code 4 at timestamp: 41582272

 2291 18:34:58.125769  

 2292 18:34:58.125870  

 2293 18:34:58.126000  Starting kernel ...

 2294 18:34:58.126129  

 2295 18:34:58.126216  

 2296 18:34:58.126991  end: 2.2.4 bootloader-commands (duration 00:00:33) [common]
 2297 18:34:58.127092  start: 2.2.5 auto-login-action (timeout 00:04:14) [common]
 2298 18:34:58.127169  Setting prompt string to ['Linux version [0-9]']
 2299 18:34:58.127238  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2300 18:34:58.127307  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2302 18:39:12.128043  end: 2.2.5 auto-login-action (duration 00:04:14) [common]
 2304 18:39:12.129553  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 254 seconds'
 2306 18:39:12.130373  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2309 18:39:12.131856  end: 2 depthcharge-action (duration 00:05:00) [common]
 2311 18:39:12.133337  Cleaning after the job
 2312 18:39:12.133785  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14214089/tftp-deploy-ywqn_dor/ramdisk
 2313 18:39:12.140409  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14214089/tftp-deploy-ywqn_dor/kernel
 2314 18:39:12.150599  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14214089/tftp-deploy-ywqn_dor/modules
 2315 18:39:12.154238  start: 4.1 power-off (timeout 00:00:30) [common]
 2316 18:39:12.155026  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-1', '--port=1', '--command=off']
 2317 18:39:13.069521  >> Command sent successfully.

 2318 18:39:13.079666  Returned 0 in 0 seconds
 2319 18:39:13.180877  end: 4.1 power-off (duration 00:00:01) [common]
 2321 18:39:13.182257  start: 4.2 read-feedback (timeout 00:09:59) [common]
 2322 18:39:13.183391  Listened to connection for namespace 'common' for up to 1s
 2324 18:39:13.184647  Listened to connection for namespace 'common' for up to 1s
 2325 18:39:14.184099  Finalising connection for namespace 'common'
 2326 18:39:14.184775  Disconnecting from shell: Finalise
 2327 18:39:14.185146  
 2328 18:39:14.286159  end: 4.2 read-feedback (duration 00:00:01) [common]
 2329 18:39:14.286786  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14214089
 2330 18:39:14.304910  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14214089
 2331 18:39:14.305053  JobError: Your job cannot terminate cleanly.