Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:28:38.812184 lava-dispatcher, installed at version: 2022.10
2 12:28:38.812356 start: 0 validate
3 12:28:38.812481 Start time: 2022-12-01 12:28:38.812472+00:00 (UTC)
4 12:28:38.812603 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:28:38.812726 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221125.0%2Fx86%2Frootfs.cpio.gz exists
6 12:28:39.102743 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:28:39.103641 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:28:40.112155 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:28:40.112866 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:28:40.132007 validate duration: 1.32
12 12:28:40.133273 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:28:40.133810 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:28:40.134318 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:28:40.134945 Not decompressing ramdisk as can be used compressed.
16 12:28:40.135570 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221125.0/x86/rootfs.cpio.gz
17 12:28:40.135926 saving as /var/lib/lava/dispatcher/tmp/8193648/tftp-deploy-wq20atio/ramdisk/rootfs.cpio.gz
18 12:28:40.136320 total size: 8415491 (8MB)
19 12:28:40.141645 progress 0% (0MB)
20 12:28:40.155071 progress 5% (0MB)
21 12:28:40.171013 progress 10% (0MB)
22 12:28:40.184536 progress 15% (1MB)
23 12:28:40.198313 progress 20% (1MB)
24 12:28:40.212641 progress 25% (2MB)
25 12:28:40.229031 progress 30% (2MB)
26 12:28:40.242263 progress 35% (2MB)
27 12:28:40.255098 progress 40% (3MB)
28 12:28:40.270536 progress 45% (3MB)
29 12:28:40.286538 progress 50% (4MB)
30 12:28:40.298800 progress 55% (4MB)
31 12:28:40.309973 progress 60% (4MB)
32 12:28:40.319797 progress 65% (5MB)
33 12:28:40.330888 progress 70% (5MB)
34 12:28:40.342999 progress 75% (6MB)
35 12:28:40.354718 progress 80% (6MB)
36 12:28:40.382085 progress 85% (6MB)
37 12:28:40.412330 progress 90% (7MB)
38 12:28:40.446379 progress 95% (7MB)
39 12:28:40.476432 progress 100% (8MB)
40 12:28:40.477650 8MB downloaded in 0.34s (23.51MB/s)
41 12:28:40.478348 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:28:40.479475 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:28:40.479891 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:28:40.480292 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:28:40.480738 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:28:40.481066 saving as /var/lib/lava/dispatcher/tmp/8193648/tftp-deploy-wq20atio/kernel/bzImage
48 12:28:40.481354 total size: 7188368 (6MB)
49 12:28:40.481633 No compression specified
50 12:28:40.486483 progress 0% (0MB)
51 12:28:40.497633 progress 5% (0MB)
52 12:28:40.511175 progress 10% (0MB)
53 12:28:40.522707 progress 15% (1MB)
54 12:28:40.534539 progress 20% (1MB)
55 12:28:40.547449 progress 25% (1MB)
56 12:28:40.558983 progress 30% (2MB)
57 12:28:40.572964 progress 35% (2MB)
58 12:28:40.585501 progress 40% (2MB)
59 12:28:40.597566 progress 45% (3MB)
60 12:28:40.608673 progress 50% (3MB)
61 12:28:40.621928 progress 55% (3MB)
62 12:28:40.633621 progress 60% (4MB)
63 12:28:40.645945 progress 65% (4MB)
64 12:28:40.659247 progress 70% (4MB)
65 12:28:40.670915 progress 75% (5MB)
66 12:28:40.683191 progress 80% (5MB)
67 12:28:40.695464 progress 85% (5MB)
68 12:28:40.707983 progress 90% (6MB)
69 12:28:40.720845 progress 95% (6MB)
70 12:28:40.730656 progress 100% (6MB)
71 12:28:40.730976 6MB downloaded in 0.25s (27.46MB/s)
72 12:28:40.731128 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:28:40.731371 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:28:40.731460 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:28:40.731560 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:28:40.731698 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:28:40.731772 saving as /var/lib/lava/dispatcher/tmp/8193648/tftp-deploy-wq20atio/modules/modules.tar
79 12:28:40.731835 total size: 54724 (0MB)
80 12:28:40.731910 Using unxz to decompress xz
81 12:28:40.754853 progress 59% (0MB)
82 12:28:40.761544 progress 100% (0MB)
83 12:28:40.763537 0MB downloaded in 0.03s (1.65MB/s)
84 12:28:40.763803 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:28:40.764136 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:28:40.764237 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 12:28:40.764334 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 12:28:40.764420 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:28:40.764505 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 12:28:40.764679 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74
92 12:28:40.764786 makedir: /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin
93 12:28:40.764870 makedir: /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/tests
94 12:28:40.764950 makedir: /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/results
95 12:28:40.765057 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-add-keys
96 12:28:40.765201 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-add-sources
97 12:28:40.765344 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-background-process-start
98 12:28:40.765472 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-background-process-stop
99 12:28:40.765583 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-common-functions
100 12:28:40.765692 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-echo-ipv4
101 12:28:40.765803 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-install-packages
102 12:28:40.765913 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-installed-packages
103 12:28:40.766021 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-os-build
104 12:28:40.766174 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-probe-channel
105 12:28:40.766284 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-probe-ip
106 12:28:40.766396 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-target-ip
107 12:28:40.766504 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-target-mac
108 12:28:40.766612 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-target-storage
109 12:28:40.766724 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-test-case
110 12:28:40.766849 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-test-event
111 12:28:40.766959 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-test-feedback
112 12:28:40.767068 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-test-raise
113 12:28:40.767181 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-test-reference
114 12:28:40.767289 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-test-runner
115 12:28:40.767397 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-test-set
116 12:28:40.767505 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-test-shell
117 12:28:40.767616 Updating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-install-packages (oe)
118 12:28:40.767729 Updating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/bin/lava-installed-packages (oe)
119 12:28:40.767829 Creating /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/environment
120 12:28:40.767919 LAVA metadata
121 12:28:40.767992 - LAVA_JOB_ID=8193648
122 12:28:40.768056 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:28:40.768159 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 12:28:40.768226 skipped lava-vland-overlay
125 12:28:40.768303 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:28:40.768388 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 12:28:40.768453 skipped lava-multinode-overlay
128 12:28:40.768528 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:28:40.768611 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 12:28:40.768687 Loading test definitions
131 12:28:40.768786 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 12:28:40.768859 Using /lava-8193648 at stage 0
133 12:28:40.769135 uuid=8193648_1.4.2.3.1 testdef=None
134 12:28:40.769225 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:28:40.769314 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 12:28:40.769851 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:28:40.770171 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 12:28:40.770762 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:28:40.771016 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 12:28:40.771604 runner path: /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/0/tests/0_dmesg test_uuid 8193648_1.4.2.3.1
143 12:28:40.771768 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:28:40.772001 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 12:28:40.772075 Using /lava-8193648 at stage 1
147 12:28:40.772318 uuid=8193648_1.4.2.3.5 testdef=None
148 12:28:40.772424 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 12:28:40.772528 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 12:28:40.772973 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 12:28:40.773195 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 12:28:40.773762 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 12:28:40.773999 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 12:28:40.774590 runner path: /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/1/tests/1_bootrr test_uuid 8193648_1.4.2.3.5
157 12:28:40.774731 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 12:28:40.774941 Creating lava-test-runner.conf files
160 12:28:40.775005 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/0 for stage 0
161 12:28:40.775086 - 0_dmesg
162 12:28:40.775159 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193648/lava-overlay-q9xh_c74/lava-8193648/1 for stage 1
163 12:28:40.775243 - 1_bootrr
164 12:28:40.775333 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 12:28:40.775421 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 12:28:40.781597 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 12:28:40.781707 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 12:28:40.781797 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 12:28:40.781884 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 12:28:40.781970 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 12:28:40.970225 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 12:28:40.970552 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 12:28:40.970659 extracting modules file /var/lib/lava/dispatcher/tmp/8193648/tftp-deploy-wq20atio/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8193648/extract-overlay-ramdisk-uwlb3zc4/ramdisk
174 12:28:40.975161 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 12:28:40.975279 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 12:28:40.975366 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8193648/compress-overlay-mh7z5_7d/overlay-1.4.2.4.tar.gz to ramdisk
177 12:28:40.975439 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8193648/compress-overlay-mh7z5_7d/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8193648/extract-overlay-ramdisk-uwlb3zc4/ramdisk
178 12:28:40.979417 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 12:28:40.979531 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 12:28:40.979622 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 12:28:40.979713 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 12:28:40.979793 Building ramdisk /var/lib/lava/dispatcher/tmp/8193648/extract-overlay-ramdisk-uwlb3zc4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8193648/extract-overlay-ramdisk-uwlb3zc4/ramdisk
183 12:28:41.044374 >> 48044 blocks
184 12:28:41.804515 rename /var/lib/lava/dispatcher/tmp/8193648/extract-overlay-ramdisk-uwlb3zc4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8193648/tftp-deploy-wq20atio/ramdisk/ramdisk.cpio.gz
185 12:28:41.804951 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 12:28:41.805122 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 12:28:41.805306 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 12:28:41.805436 No mkimage arch provided, not using FIT.
189 12:28:41.805530 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 12:28:41.805661 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 12:28:41.805775 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 12:28:41.805884 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 12:28:41.805976 No LXC device requested
194 12:28:41.806085 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 12:28:41.806180 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 12:28:41.806262 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 12:28:41.806334 Checking files for TFTP limit of 4294967296 bytes.
198 12:28:41.806727 end: 1 tftp-deploy (duration 00:00:02) [common]
199 12:28:41.806837 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 12:28:41.806935 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 12:28:41.807062 substitutions:
202 12:28:41.807131 - {DTB}: None
203 12:28:41.807196 - {INITRD}: 8193648/tftp-deploy-wq20atio/ramdisk/ramdisk.cpio.gz
204 12:28:41.807258 - {KERNEL}: 8193648/tftp-deploy-wq20atio/kernel/bzImage
205 12:28:41.807317 - {LAVA_MAC}: None
206 12:28:41.807374 - {PRESEED_CONFIG}: None
207 12:28:41.807432 - {PRESEED_LOCAL}: None
208 12:28:41.807489 - {RAMDISK}: 8193648/tftp-deploy-wq20atio/ramdisk/ramdisk.cpio.gz
209 12:28:41.807545 - {ROOT_PART}: None
210 12:28:41.807601 - {ROOT}: None
211 12:28:41.807657 - {SERVER_IP}: 192.168.201.1
212 12:28:41.807713 - {TEE}: None
213 12:28:41.807769 Parsed boot commands:
214 12:28:41.807824 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 12:28:41.807980 Parsed boot commands: tftpboot 192.168.201.1 8193648/tftp-deploy-wq20atio/kernel/bzImage 8193648/tftp-deploy-wq20atio/kernel/cmdline 8193648/tftp-deploy-wq20atio/ramdisk/ramdisk.cpio.gz
216 12:28:41.808073 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 12:28:41.808165 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 12:28:41.808264 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 12:28:41.808356 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 12:28:41.808426 Not connected, no need to disconnect.
221 12:28:41.808520 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 12:28:41.808608 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 12:28:41.808690 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-8'
224 12:28:41.811472 Setting prompt string to ['lava-test: # ']
225 12:28:41.811756 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 12:28:41.811860 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 12:28:41.811953 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 12:28:41.812046 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 12:28:41.812228 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
230 12:28:41.830971 >> Command sent successfully.
231 12:28:41.832842 Returned 0 in 0 seconds
232 12:28:41.933454 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 12:28:41.934006 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 12:28:41.934147 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 12:28:41.934232 Setting prompt string to 'Starting depthcharge on Magolor...'
237 12:28:41.934297 Changing prompt to 'Starting depthcharge on Magolor...'
238 12:28:41.934363 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
239 12:28:41.934620 [Enter `^Ec?' for help]
240 12:28:48.797977
241 12:28:48.798177
242 12:28:48.807967 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
243 12:28:48.811092 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
244 12:28:48.817990 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
245 12:28:48.821033 CPU: AES supported, TXT NOT supported, VT supported
246 12:28:48.828089 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
247 12:28:48.831320 PCH: device id 4d87 (rev 01) is Jasperlake Super
248 12:28:48.834661 IGD: device id 4e55 (rev 01) is Jasperlake GT4
249 12:28:48.839051 VBOOT: Loading verstage.
250 12:28:48.845911 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 12:28:48.849052 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
252 12:28:48.856026 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 12:28:48.859261 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
254 12:28:48.862364
255 12:28:48.862439
256 12:28:48.872353 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
257 12:28:48.886532 Probing TPM: . done!
258 12:28:48.889657 TPM ready after 0 ms
259 12:28:48.893426 Connected to device vid:did:rid of 1ae0:0028:00
260 12:28:48.904281 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
261 12:28:48.911449 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
262 12:28:48.914318 Initialized TPM device CR50 revision 0
263 12:28:48.971675 tlcl_send_startup: Startup return code is 0
264 12:28:48.971790 TPM: setup succeeded
265 12:28:48.985499 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
266 12:28:48.999428 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 12:28:49.014034 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
268 12:28:49.024209 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 12:28:49.027871 Chrome EC: UHEPI supported
270 12:28:49.031008 Phase 1
271 12:28:49.034227 FMAP: area GBB found @ c05000 (12288 bytes)
272 12:28:49.040657 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 12:28:49.048123 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 12:28:49.051294 Recovery requested (1009000e)
275 12:28:49.060044 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 12:28:49.066435 tlcl_extend: response is 0
277 12:28:49.073317 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 12:28:49.082855 tlcl_extend: response is 0
279 12:28:49.089568 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
280 12:28:49.092694 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
281 12:28:49.098995 BS: verstage times (exec / console): total (unknown) / 124 ms
282 12:28:49.103301
283 12:28:49.103386
284 12:28:49.113484 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
285 12:28:49.116564 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 12:28:49.123663 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 12:28:49.126702 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
288 12:28:49.130412 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 12:28:49.136680 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
290 12:28:49.139972 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
291 12:28:49.143198 TCO_STS: 0000 0001
292 12:28:49.146948 GEN_PMCON: d0015038 00002200
293 12:28:49.147029 GBLRST_CAUSE: 00000000 00000000
294 12:28:49.150107 prev_sleep_state 5
295 12:28:49.153288 Boot Count incremented to 9174
296 12:28:49.160293 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
297 12:28:49.163665 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
298 12:28:49.168199 Chrome EC: UHEPI supported
299 12:28:49.174473 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
300 12:28:49.180820 Probing TPM: done!
301 12:28:49.187812 Connected to device vid:did:rid of 1ae0:0028:00
302 12:28:49.197415 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
303 12:28:49.201327 Initialized TPM device CR50 revision 0
304 12:28:49.216362 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
305 12:28:49.219642 MRC: Hash idx 0x100b comparison successful.
306 12:28:49.222815
307 12:28:49.222896 MRC cache found, size 5458
308 12:28:49.226607 bootmode is set to: 2
309 12:28:49.226686 SPD INDEX = 0
310 12:28:49.233505 CBFS: Found 'spd.bin' @0x40c40 size 0x600
311 12:28:49.233593 SPD: module type is LPDDR4X
312 12:28:49.236649
313 12:28:49.239920 SPD: module part number is MT53E512M32D2NP-046 WT:E
314 12:28:49.246825 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
315 12:28:49.249958 SPD: device width 16 bits, bus width 32 bits
316 12:28:49.256996 SPD: module size is 4096 MB (per channel)
317 12:28:49.260193 meminit_channels: DRAM half-populated
318 12:28:49.342197 CBMEM:
319 12:28:49.345361 IMD: root @ 0x76fff000 254 entries.
320 12:28:49.348447 IMD: root @ 0x76ffec00 62 entries.
321 12:28:49.351730 FMAP: area RO_VPD found @ c00000 (16384 bytes)
322 12:28:49.358262 WARNING: RO_VPD is uninitialized or empty.
323 12:28:49.361574 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
324 12:28:49.365416 External stage cache:
325 12:28:49.368641 IMD: root @ 0x7b3ff000 254 entries.
326 12:28:49.372469 IMD: root @ 0x7b3fec00 62 entries.
327 12:28:49.382143 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
328 12:28:49.389008 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
329 12:28:49.395445 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
330 12:28:49.403584 MRC: 'RECOVERY_MRC_CACHE' does not need update.
331 12:28:49.406887 cse_lite: Skip switching to RW in the recovery path
332 12:28:49.410551
333 12:28:49.411063 1 DIMMs found
334 12:28:49.411486 SMM Memory Map
335 12:28:49.413728 SMRAM : 0x7b000000 0x800000
336 12:28:49.416907 Subregion 0: 0x7b000000 0x200000
337 12:28:49.420209
338 12:28:49.423303 Subregion 1: 0x7b200000 0x200000
339 12:28:49.426886 Subregion 2: 0x7b400000 0x400000
340 12:28:49.427370 top_of_ram = 0x77000000
341 12:28:49.433061 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 12:28:49.440067 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 12:28:49.443124 MTRR Range: Start=ff000000 End=0 (Size 1000000)
344 12:28:49.450217 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
345 12:28:49.453420 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
346 12:28:49.456512
347 12:28:49.466541 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
348 12:28:49.469867 Processing 188 relocs. Offset value of 0x74c0e000
349 12:28:49.478623 BS: romstage times (exec / console): total (unknown) / 255 ms
350 12:28:49.483337
351 12:28:49.483872
352 12:28:49.493384 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
353 12:28:49.496460 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 12:28:49.500175
355 12:28:49.503312 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 12:28:49.509703 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 12:28:49.565833 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 12:28:49.572798 Processing 4805 relocs. Offset value of 0x75da8000
359 12:28:49.575678 BS: postcar times (exec / console): total (unknown) / 42 ms
360 12:28:49.579156
361 12:28:49.579608
362 12:28:49.589054 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 12:28:49.589529 Normal boot
364 12:28:49.592884 EC returned error result code 3
365 12:28:49.596021 FW_CONFIG value is 0x204
366 12:28:49.599272 GENERIC: 0.0 disabled by fw_config
367 12:28:49.606306 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 12:28:49.609271 I2C: 00:10 disabled by fw_config
369 12:28:49.612445 I2C: 00:10 disabled by fw_config
370 12:28:49.616179 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 12:28:49.622554 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 12:28:49.625729 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 12:28:49.632445 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 12:28:49.635651 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 12:28:49.638846 I2C: 00:10 disabled by fw_config
376 12:28:49.645794 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 12:28:49.652234 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 12:28:49.655420 I2C: 00:1a disabled by fw_config
379 12:28:49.658643 I2C: 00:1a disabled by fw_config
380 12:28:49.665788 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 12:28:49.669056 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 12:28:49.672198 GENERIC: 0.0 disabled by fw_config
383 12:28:49.678549 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 12:28:49.682303 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 12:28:49.688697 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 12:28:49.691961 microcode: Update skipped, already up-to-date
387 12:28:49.698629 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 12:28:49.724581 Detected 2 core, 2 thread CPU.
389 12:28:49.727694 Setting up SMI for CPU
390 12:28:49.730747 IED base = 0x7b400000
391 12:28:49.731054 IED size = 0x00400000
392 12:28:49.734440 Will perform SMM setup.
393 12:28:49.737630 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 12:28:49.747110 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 12:28:49.750801 Processing 16 relocs. Offset value of 0x00030000
396 12:28:49.753952 Attempting to start 1 APs
397 12:28:49.757696 Waiting for 10ms after sending INIT.
398 12:28:49.774177 Waiting for 1st SIPI to complete...done.
399 12:28:49.774273 AP: slot 1 apic_id 2.
400 12:28:49.780413 Waiting for 2nd SIPI to complete...done.
401 12:28:49.787340 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 12:28:49.793734 Processing 13 relocs. Offset value of 0x00038000
403 12:28:49.793818 Unable to locate Global NVS
404 12:28:49.803520 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 12:28:49.806686 Installing permanent SMM handler to 0x7b000000
406 12:28:49.816867 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 12:28:49.819966 Processing 704 relocs. Offset value of 0x7b010000
408 12:28:49.826391 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 12:28:49.830199
410 12:28:49.833424 Processing 13 relocs. Offset value of 0x7b008000
411 12:28:49.839762 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 12:28:49.842895 Unable to locate Global NVS
413 12:28:49.849863 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
414 12:28:49.852996 Clearing SMI status registers
415 12:28:49.853079 SMI_STS: PM1
416 12:28:49.856233 PM1_STS: PWRBTN
417 12:28:49.856315 TCO_STS: INTRD_DET
418 12:28:49.866348 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 12:28:49.866432 In relocation handler: CPU 0
420 12:28:49.872870 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 12:28:49.876588 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 12:28:49.879658 Relocation complete.
423 12:28:49.886613 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 12:28:49.889888 In relocation handler: CPU 1
425 12:28:49.893878 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 12:28:49.897126 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 12:28:49.900213 Relocation complete.
428 12:28:49.903300 Initializing CPU #0
429 12:28:49.907134 CPU: vendor Intel device 906c0
430 12:28:49.910350 CPU: family 06, model 9c, stepping 00
431 12:28:49.913504 Clearing out pending MCEs
432 12:28:49.913587 Setting up local APIC...
433 12:28:49.916738 apic_id: 0x00 done.
434 12:28:49.919865 Turbo is available but hidden
435 12:28:49.923810 Turbo is available and visible
436 12:28:49.927079 microcode: Update skipped, already up-to-date
437 12:28:49.930295 CPU #0 initialized
438 12:28:49.933265 Initializing CPU #1
439 12:28:49.936552 CPU: vendor Intel device 906c0
440 12:28:49.939726 CPU: family 06, model 9c, stepping 00
441 12:28:49.939810 Clearing out pending MCEs
442 12:28:49.943344 Setting up local APIC...
443 12:28:49.946473 apic_id: 0x02 done.
444 12:28:49.950276 microcode: Update skipped, already up-to-date
445 12:28:49.953499 CPU #1 initialized
446 12:28:49.956699 bsp_do_flight_plan done after 173 msecs.
447 12:28:49.959895 CPU: frequency set to 2800 MHz
448 12:28:49.963169 Enabling SMIs.
449 12:28:49.966351 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
450 12:28:49.978343 Probing TPM: done!
451 12:28:49.984480 Connected to device vid:did:rid of 1ae0:0028:00
452 12:28:49.994587 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
453 12:28:49.997639 Initialized TPM device CR50 revision 0
454 12:28:50.000904 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 12:28:50.008202 Found a VBT of 7680 bytes after decompression
456 12:28:50.014676 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 12:28:50.050017 Detected 2 core, 2 thread CPU.
458 12:28:50.053157 Detected 2 core, 2 thread CPU.
459 12:28:50.415669 Display FSP Version Info HOB
460 12:28:50.418865 Reference Code - CPU = 8.7.22.30
461 12:28:50.421970 uCode Version = 24.0.0.1f
462 12:28:50.425207 TXT ACM version = ff.ff.ff.ffff
463 12:28:50.429005 Reference Code - ME = 8.7.22.30
464 12:28:50.432122 MEBx version = 0.0.0.0
465 12:28:50.435372 ME Firmware Version = Consumer SKU
466 12:28:50.438569 Reference Code - PCH = 8.7.22.30
467 12:28:50.441680 PCH-CRID Status = Disabled
468 12:28:50.445468 PCH-CRID Original Value = ff.ff.ff.ffff
469 12:28:50.448696 PCH-CRID New Value = ff.ff.ff.ffff
470 12:28:50.451687 OPROM - RST - RAID = ff.ff.ff.ffff
471 12:28:50.455577 PCH Hsio Version = 4.0.0.0
472 12:28:50.458674 Reference Code - SA - System Agent = 8.7.22.30
473 12:28:50.461823 Reference Code - MRC = 0.0.4.68
474 12:28:50.465520 SA - PCIe Version = 8.7.22.30
475 12:28:50.469361 SA-CRID Status = Disabled
476 12:28:50.473839 SA-CRID Original Value = 0.0.0.0
477 12:28:50.473930 SA-CRID New Value = 0.0.0.0
478 12:28:50.477145 OPROM - VBIOS = ff.ff.ff.ffff
479 12:28:50.483623 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 12:28:50.487331 PHY Build Version = ff.ff.ff.ffff
481 12:28:50.491133 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 12:28:50.497513 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 12:28:50.497623 ITSS IRQ Polarities Before:
484 12:28:50.501090 IPC0: 0xffffffff
485 12:28:50.501204 IPC1: 0xffffffff
486 12:28:50.504186 IPC2: 0xffffffff
487 12:28:50.504278 IPC3: 0xffffffff
488 12:28:50.507557
489 12:28:50.507645 ITSS IRQ Polarities After:
490 12:28:50.510806 IPC0: 0xffffffff
491 12:28:50.510887 IPC1: 0xffffffff
492 12:28:50.513936 IPC2: 0xffffffff
493 12:28:50.514034 IPC3: 0xffffffff
494 12:28:50.527181 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
495 12:28:50.533976 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
496 12:28:50.537254 Enumerating buses...
497 12:28:50.540332 Show all devs... Before device enumeration.
498 12:28:50.544100 Root Device: enabled 1
499 12:28:50.544185 CPU_CLUSTER: 0: enabled 1
500 12:28:50.547255
501 12:28:50.547340 DOMAIN: 0000: enabled 1
502 12:28:50.550431 PCI: 00:00.0: enabled 1
503 12:28:50.553615 PCI: 00:02.0: enabled 1
504 12:28:50.553699 PCI: 00:04.0: enabled 1
505 12:28:50.557504 PCI: 00:05.0: enabled 1
506 12:28:50.560455 PCI: 00:09.0: enabled 0
507 12:28:50.563617 PCI: 00:12.6: enabled 0
508 12:28:50.563708 PCI: 00:14.0: enabled 1
509 12:28:50.566751 PCI: 00:14.1: enabled 0
510 12:28:50.570495 PCI: 00:14.2: enabled 0
511 12:28:50.573570 PCI: 00:14.3: enabled 1
512 12:28:50.573676 PCI: 00:14.5: enabled 1
513 12:28:50.576835 PCI: 00:15.0: enabled 1
514 12:28:50.580074 PCI: 00:15.1: enabled 1
515 12:28:50.583236 PCI: 00:15.2: enabled 1
516 12:28:50.583401 PCI: 00:15.3: enabled 1
517 12:28:50.587056 PCI: 00:16.0: enabled 1
518 12:28:50.590196 PCI: 00:16.1: enabled 0
519 12:28:50.590312 PCI: 00:16.4: enabled 0
520 12:28:50.593354 PCI: 00:16.5: enabled 0
521 12:28:50.596516 PCI: 00:17.0: enabled 0
522 12:28:50.599747 PCI: 00:19.0: enabled 1
523 12:28:50.599843 PCI: 00:19.1: enabled 0
524 12:28:50.603069 PCI: 00:19.2: enabled 1
525 12:28:50.606325 PCI: 00:1a.0: enabled 1
526 12:28:50.609635 PCI: 00:1c.0: enabled 0
527 12:28:50.609739 PCI: 00:1c.1: enabled 0
528 12:28:50.613572 PCI: 00:1c.2: enabled 0
529 12:28:50.616649 PCI: 00:1c.3: enabled 0
530 12:28:50.619828 PCI: 00:1c.4: enabled 0
531 12:28:50.619954 PCI: 00:1c.5: enabled 0
532 12:28:50.622937 PCI: 00:1c.6: enabled 0
533 12:28:50.626235 PCI: 00:1c.7: enabled 1
534 12:28:50.626374 PCI: 00:1e.0: enabled 0
535 12:28:50.629945
536 12:28:50.630115 PCI: 00:1e.1: enabled 0
537 12:28:50.633229 PCI: 00:1e.2: enabled 1
538 12:28:50.636339 PCI: 00:1e.3: enabled 0
539 12:28:50.636523 PCI: 00:1f.0: enabled 1
540 12:28:50.639442 PCI: 00:1f.1: enabled 1
541 12:28:50.643320 PCI: 00:1f.2: enabled 1
542 12:28:50.646411 PCI: 00:1f.3: enabled 1
543 12:28:50.646657 PCI: 00:1f.4: enabled 0
544 12:28:50.649754 PCI: 00:1f.5: enabled 1
545 12:28:50.652881 PCI: 00:1f.7: enabled 0
546 12:28:50.656098 GENERIC: 0.0: enabled 1
547 12:28:50.656496 GENERIC: 0.0: enabled 1
548 12:28:50.659856 USB0 port 0: enabled 1
549 12:28:50.663062 GENERIC: 0.0: enabled 1
550 12:28:50.663493 I2C: 00:2c: enabled 1
551 12:28:50.666256 I2C: 00:15: enabled 1
552 12:28:50.669327 GENERIC: 0.0: enabled 0
553 12:28:50.673066 I2C: 00:15: enabled 1
554 12:28:50.673477 I2C: 00:10: enabled 0
555 12:28:50.676321 I2C: 00:10: enabled 0
556 12:28:50.679446 I2C: 00:2c: enabled 1
557 12:28:50.679918 I2C: 00:40: enabled 1
558 12:28:50.682652 I2C: 00:10: enabled 1
559 12:28:50.685838 I2C: 00:39: enabled 1
560 12:28:50.686324 I2C: 00:36: enabled 1
561 12:28:50.689728 I2C: 00:10: enabled 0
562 12:28:50.692799 I2C: 00:0c: enabled 1
563 12:28:50.693229 I2C: 00:50: enabled 1
564 12:28:50.695980 I2C: 00:1a: enabled 1
565 12:28:50.699145 I2C: 00:1a: enabled 0
566 12:28:50.699592 I2C: 00:1a: enabled 0
567 12:28:50.702990 I2C: 00:28: enabled 1
568 12:28:50.706117 I2C: 00:29: enabled 1
569 12:28:50.706578 PCI: 00:00.0: enabled 1
570 12:28:50.709298 SPI: 00: enabled 1
571 12:28:50.712514 PNP: 0c09.0: enabled 1
572 12:28:50.712925 GENERIC: 0.0: enabled 0
573 12:28:50.715704 USB2 port 0: enabled 1
574 12:28:50.719542 USB2 port 1: enabled 1
575 12:28:50.722422 USB2 port 2: enabled 1
576 12:28:50.722855 USB2 port 3: enabled 1
577 12:28:50.725672 USB2 port 4: enabled 0
578 12:28:50.728931 USB2 port 5: enabled 1
579 12:28:50.729363 USB2 port 6: enabled 0
580 12:28:50.732052 USB2 port 7: enabled 1
581 12:28:50.735962 USB3 port 0: enabled 1
582 12:28:50.736433 USB3 port 1: enabled 1
583 12:28:50.738905
584 12:28:50.739338 USB3 port 2: enabled 1
585 12:28:50.742134 USB3 port 3: enabled 1
586 12:28:50.745246 APIC: 00: enabled 1
587 12:28:50.745678 APIC: 02: enabled 1
588 12:28:50.749159 Compare with tree...
589 12:28:50.749590 Root Device: enabled 1
590 12:28:50.752309
591 12:28:50.752775 CPU_CLUSTER: 0: enabled 1
592 12:28:50.755289 APIC: 00: enabled 1
593 12:28:50.758571 APIC: 02: enabled 1
594 12:28:50.759000 DOMAIN: 0000: enabled 1
595 12:28:50.761696 PCI: 00:00.0: enabled 1
596 12:28:50.765612 PCI: 00:02.0: enabled 1
597 12:28:50.768854 PCI: 00:04.0: enabled 1
598 12:28:50.772028 GENERIC: 0.0: enabled 1
599 12:28:50.772496 PCI: 00:05.0: enabled 1
600 12:28:50.775087 GENERIC: 0.0: enabled 1
601 12:28:50.778772 PCI: 00:09.0: enabled 0
602 12:28:50.781929 PCI: 00:12.6: enabled 0
603 12:28:50.785147 PCI: 00:14.0: enabled 1
604 12:28:50.785622 USB0 port 0: enabled 1
605 12:28:50.788459 USB2 port 0: enabled 1
606 12:28:50.791471 USB2 port 1: enabled 1
607 12:28:50.795469 USB2 port 2: enabled 1
608 12:28:50.798654 USB2 port 3: enabled 1
609 12:28:50.801737 USB2 port 4: enabled 0
610 12:28:50.802239 USB2 port 5: enabled 1
611 12:28:50.804961 USB2 port 6: enabled 0
612 12:28:50.808202 USB2 port 7: enabled 1
613 12:28:50.811364 USB3 port 0: enabled 1
614 12:28:50.814679 USB3 port 1: enabled 1
615 12:28:50.815172 USB3 port 2: enabled 1
616 12:28:50.817934
617 12:28:50.818452 USB3 port 3: enabled 1
618 12:28:50.821703 PCI: 00:14.1: enabled 0
619 12:28:50.824841 PCI: 00:14.2: enabled 0
620 12:28:50.828013 PCI: 00:14.3: enabled 1
621 12:28:50.831315 GENERIC: 0.0: enabled 1
622 12:28:50.831783 PCI: 00:14.5: enabled 1
623 12:28:50.835058 PCI: 00:15.0: enabled 1
624 12:28:50.838361 I2C: 00:2c: enabled 1
625 12:28:50.841359 I2C: 00:15: enabled 1
626 12:28:50.841893 PCI: 00:15.1: enabled 1
627 12:28:50.844734 PCI: 00:15.2: enabled 1
628 12:28:50.847922 GENERIC: 0.0: enabled 0
629 12:28:50.851088 I2C: 00:15: enabled 1
630 12:28:50.854277 I2C: 00:10: enabled 0
631 12:28:50.854858 I2C: 00:10: enabled 0
632 12:28:50.857735 I2C: 00:2c: enabled 1
633 12:28:50.860807 I2C: 00:40: enabled 1
634 12:28:50.864588 I2C: 00:10: enabled 1
635 12:28:50.865024 I2C: 00:39: enabled 1
636 12:28:50.867847 PCI: 00:15.3: enabled 1
637 12:28:50.870474 I2C: 00:36: enabled 1
638 12:28:50.874159 I2C: 00:10: enabled 0
639 12:28:50.877317 I2C: 00:0c: enabled 1
640 12:28:50.877399 I2C: 00:50: enabled 1
641 12:28:50.880290 PCI: 00:16.0: enabled 1
642 12:28:50.884091 PCI: 00:16.1: enabled 0
643 12:28:50.887079 PCI: 00:16.4: enabled 0
644 12:28:50.887162 PCI: 00:16.5: enabled 0
645 12:28:50.890243 PCI: 00:17.0: enabled 0
646 12:28:50.893557 PCI: 00:19.0: enabled 1
647 12:28:50.896771 I2C: 00:1a: enabled 1
648 12:28:50.900394 I2C: 00:1a: enabled 0
649 12:28:50.900477 I2C: 00:1a: enabled 0
650 12:28:50.903559 I2C: 00:28: enabled 1
651 12:28:50.906681 I2C: 00:29: enabled 1
652 12:28:50.910448 PCI: 00:19.1: enabled 0
653 12:28:50.910531 PCI: 00:19.2: enabled 1
654 12:28:50.913643 PCI: 00:1a.0: enabled 1
655 12:28:50.916967 PCI: 00:1e.0: enabled 0
656 12:28:50.920142 PCI: 00:1e.1: enabled 0
657 12:28:50.923236 PCI: 00:1e.2: enabled 1
658 12:28:50.923318 SPI: 00: enabled 1
659 12:28:50.926917 PCI: 00:1e.3: enabled 0
660 12:28:50.929980 PCI: 00:1f.0: enabled 1
661 12:28:50.933127 PNP: 0c09.0: enabled 1
662 12:28:50.933209 PCI: 00:1f.1: enabled 1
663 12:28:50.936429
664 12:28:50.936512 PCI: 00:1f.2: enabled 1
665 12:28:50.939671 PCI: 00:1f.3: enabled 1
666 12:28:50.943313 GENERIC: 0.0: enabled 0
667 12:28:50.946388 PCI: 00:1f.4: enabled 0
668 12:28:50.946480 PCI: 00:1f.5: enabled 1
669 12:28:50.949564
670 12:28:50.949646 PCI: 00:1f.7: enabled 0
671 12:28:50.953421 Root Device scanning...
672 12:28:50.956596 scan_static_bus for Root Device
673 12:28:50.959711 CPU_CLUSTER: 0 enabled
674 12:28:50.959793 DOMAIN: 0000 enabled
675 12:28:50.962774 DOMAIN: 0000 scanning...
676 12:28:50.965998 PCI: pci_scan_bus for bus 00
677 12:28:50.969784 PCI: 00:00.0 [8086/0000] ops
678 12:28:50.972927 PCI: 00:00.0 [8086/4e22] enabled
679 12:28:50.976063 PCI: 00:02.0 [8086/0000] bus ops
680 12:28:50.979246 PCI: 00:02.0 [8086/4e55] enabled
681 12:28:50.982828 PCI: 00:04.0 [8086/0000] bus ops
682 12:28:50.985979 PCI: 00:04.0 [8086/4e03] enabled
683 12:28:50.989187 PCI: 00:05.0 [8086/0000] bus ops
684 12:28:50.992956 PCI: 00:05.0 [8086/4e19] enabled
685 12:28:50.996155 PCI: 00:08.0 [8086/4e11] enabled
686 12:28:50.999286 PCI: 00:14.0 [8086/0000] bus ops
687 12:28:51.002355 PCI: 00:14.0 [8086/4ded] enabled
688 12:28:51.006179 PCI: 00:14.2 [8086/4def] disabled
689 12:28:51.009582 PCI: 00:14.3 [8086/0000] bus ops
690 12:28:51.012495 PCI: 00:14.3 [8086/4df0] enabled
691 12:28:51.015793 PCI: 00:14.5 [8086/0000] ops
692 12:28:51.019456 PCI: 00:14.5 [8086/4df8] enabled
693 12:28:51.022700 PCI: 00:15.0 [8086/0000] bus ops
694 12:28:51.025823 PCI: 00:15.0 [8086/4de8] enabled
695 12:28:51.028911 PCI: 00:15.1 [8086/0000] bus ops
696 12:28:51.032161 PCI: 00:15.1 [8086/4de9] enabled
697 12:28:51.035331 PCI: 00:15.2 [8086/0000] bus ops
698 12:28:51.039106 PCI: 00:15.2 [8086/4dea] enabled
699 12:28:51.042390 PCI: 00:15.3 [8086/0000] bus ops
700 12:28:51.045692 PCI: 00:15.3 [8086/4deb] enabled
701 12:28:51.048767 PCI: 00:16.0 [8086/0000] ops
702 12:28:51.051875 PCI: 00:16.0 [8086/4de0] enabled
703 12:28:51.055770 PCI: 00:19.0 [8086/0000] bus ops
704 12:28:51.058924 PCI: 00:19.0 [8086/4dc5] enabled
705 12:28:51.062032 PCI: 00:19.2 [8086/0000] ops
706 12:28:51.065209 PCI: 00:19.2 [8086/4dc7] enabled
707 12:28:51.068379 PCI: 00:1a.0 [8086/0000] ops
708 12:28:51.071614 PCI: 00:1a.0 [8086/4dc4] enabled
709 12:28:51.075313 PCI: 00:1e.0 [8086/0000] ops
710 12:28:51.078400 PCI: 00:1e.0 [8086/4da8] disabled
711 12:28:51.081631 PCI: 00:1e.2 [8086/0000] bus ops
712 12:28:51.085298 PCI: 00:1e.2 [8086/4daa] enabled
713 12:28:51.088445 PCI: 00:1f.0 [8086/0000] bus ops
714 12:28:51.091678 PCI: 00:1f.0 [8086/4d87] enabled
715 12:28:51.094884 PCI: Static device PCI: 00:1f.1 not found, disabling it.
716 12:28:51.098037 RTC Init
717 12:28:51.101899 Set power on after power failure.
718 12:28:51.101979 Disabling Deep S3
719 12:28:51.104857 Disabling Deep S3
720 12:28:51.104929 Disabling Deep S4
721 12:28:51.108085 Disabling Deep S4
722 12:28:51.111272 Disabling Deep S5
723 12:28:51.111354 Disabling Deep S5
724 12:28:51.114914 PCI: 00:1f.2 [0000/0000] hidden
725 12:28:51.118049 PCI: 00:1f.3 [8086/0000] bus ops
726 12:28:51.121403 PCI: 00:1f.3 [8086/4dc8] enabled
727 12:28:51.124619 PCI: 00:1f.5 [8086/0000] bus ops
728 12:28:51.128280 PCI: 00:1f.5 [8086/4da4] enabled
729 12:28:51.131427 PCI: Leftover static devices:
730 12:28:51.131510 PCI: 00:12.6
731 12:28:51.134604 PCI: 00:09.0
732 12:28:51.134685 PCI: 00:14.1
733 12:28:51.137779 PCI: 00:16.1
734 12:28:51.137861 PCI: 00:16.4
735 12:28:51.137926 PCI: 00:16.5
736 12:28:51.141555 PCI: 00:17.0
737 12:28:51.141638 PCI: 00:19.1
738 12:28:51.145469 PCI: 00:1e.1
739 12:28:51.145551 PCI: 00:1e.3
740 12:28:51.145615 PCI: 00:1f.1
741 12:28:51.148466 PCI: 00:1f.4
742 12:28:51.148549 PCI: 00:1f.7
743 12:28:51.152272 PCI: Check your devicetree.cb.
744 12:28:51.155529 PCI: 00:02.0 scanning...
745 12:28:51.159272 scan_generic_bus for PCI: 00:02.0
746 12:28:51.162462 scan_generic_bus for PCI: 00:02.0 done
747 12:28:51.165512 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
748 12:28:51.168843 PCI: 00:04.0 scanning...
749 12:28:51.172026 scan_generic_bus for PCI: 00:04.0
750 12:28:51.175287 GENERIC: 0.0 enabled
751 12:28:51.182172 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
752 12:28:51.185346 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
753 12:28:51.188465 PCI: 00:05.0 scanning...
754 12:28:51.191701 scan_generic_bus for PCI: 00:05.0
755 12:28:51.194973 GENERIC: 0.0 enabled
756 12:28:51.198631 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
757 12:28:51.201919
758 12:28:51.205040 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
759 12:28:51.208193 PCI: 00:14.0 scanning...
760 12:28:51.211969 scan_static_bus for PCI: 00:14.0
761 12:28:51.212051 USB0 port 0 enabled
762 12:28:51.215190 USB0 port 0 scanning...
763 12:28:51.218309 scan_static_bus for USB0 port 0
764 12:28:51.221307 USB2 port 0 enabled
765 12:28:51.221389 USB2 port 1 enabled
766 12:28:51.225273 USB2 port 2 enabled
767 12:28:51.228526 USB2 port 3 enabled
768 12:28:51.228608 USB2 port 4 disabled
769 12:28:51.231605 USB2 port 5 enabled
770 12:28:51.234702 USB2 port 6 disabled
771 12:28:51.234784 USB2 port 7 enabled
772 12:28:51.237904 USB3 port 0 enabled
773 12:28:51.237986 USB3 port 1 enabled
774 12:28:51.241740 USB3 port 2 enabled
775 12:28:51.244843 USB3 port 3 enabled
776 12:28:51.244925 USB2 port 0 scanning...
777 12:28:51.247962 scan_static_bus for USB2 port 0
778 12:28:51.251202 scan_static_bus for USB2 port 0 done
779 12:28:51.254451
780 12:28:51.258197 scan_bus: bus USB2 port 0 finished in 6 msecs
781 12:28:51.261317 USB2 port 1 scanning...
782 12:28:51.264565 scan_static_bus for USB2 port 1
783 12:28:51.267667 scan_static_bus for USB2 port 1 done
784 12:28:51.270903 scan_bus: bus USB2 port 1 finished in 6 msecs
785 12:28:51.274636 USB2 port 2 scanning...
786 12:28:51.277884 scan_static_bus for USB2 port 2
787 12:28:51.281038 scan_static_bus for USB2 port 2 done
788 12:28:51.284096 scan_bus: bus USB2 port 2 finished in 6 msecs
789 12:28:51.287458 USB2 port 3 scanning...
790 12:28:51.291167 scan_static_bus for USB2 port 3
791 12:28:51.294400 scan_static_bus for USB2 port 3 done
792 12:28:51.300688 scan_bus: bus USB2 port 3 finished in 6 msecs
793 12:28:51.300806 USB2 port 5 scanning...
794 12:28:51.303903 scan_static_bus for USB2 port 5
795 12:28:51.310383 scan_static_bus for USB2 port 5 done
796 12:28:51.313758 scan_bus: bus USB2 port 5 finished in 6 msecs
797 12:28:51.317052 USB2 port 7 scanning...
798 12:28:51.320304 scan_static_bus for USB2 port 7
799 12:28:51.323651 scan_static_bus for USB2 port 7 done
800 12:28:51.326882 scan_bus: bus USB2 port 7 finished in 6 msecs
801 12:28:51.330602 USB3 port 0 scanning...
802 12:28:51.333675 scan_static_bus for USB3 port 0
803 12:28:51.336772 scan_static_bus for USB3 port 0 done
804 12:28:51.340584 scan_bus: bus USB3 port 0 finished in 6 msecs
805 12:28:51.343841 USB3 port 1 scanning...
806 12:28:51.347031 scan_static_bus for USB3 port 1
807 12:28:51.350206 scan_static_bus for USB3 port 1 done
808 12:28:51.356554 scan_bus: bus USB3 port 1 finished in 6 msecs
809 12:28:51.356637 USB3 port 2 scanning...
810 12:28:51.360383 scan_static_bus for USB3 port 2
811 12:28:51.366659 scan_static_bus for USB3 port 2 done
812 12:28:51.370294 scan_bus: bus USB3 port 2 finished in 6 msecs
813 12:28:51.373654 USB3 port 3 scanning...
814 12:28:51.376846 scan_static_bus for USB3 port 3
815 12:28:51.379954 scan_static_bus for USB3 port 3 done
816 12:28:51.383183 scan_bus: bus USB3 port 3 finished in 6 msecs
817 12:28:51.386822 scan_static_bus for USB0 port 0 done
818 12:28:51.393080 scan_bus: bus USB0 port 0 finished in 172 msecs
819 12:28:51.396933 scan_static_bus for PCI: 00:14.0 done
820 12:28:51.400070 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
821 12:28:51.403260 PCI: 00:14.3 scanning...
822 12:28:51.406522 scan_static_bus for PCI: 00:14.3
823 12:28:51.409650 GENERIC: 0.0 enabled
824 12:28:51.413352 scan_static_bus for PCI: 00:14.3 done
825 12:28:51.416453 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
826 12:28:51.419570 PCI: 00:15.0 scanning...
827 12:28:51.423302 scan_static_bus for PCI: 00:15.0
828 12:28:51.426567 I2C: 00:2c enabled
829 12:28:51.426651 I2C: 00:15 enabled
830 12:28:51.433003 scan_static_bus for PCI: 00:15.0 done
831 12:28:51.436078 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
832 12:28:51.439789 PCI: 00:15.1 scanning...
833 12:28:51.443023 scan_static_bus for PCI: 00:15.1
834 12:28:51.446256 scan_static_bus for PCI: 00:15.1 done
835 12:28:51.449428 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
836 12:28:51.452639 PCI: 00:15.2 scanning...
837 12:28:51.456330 scan_static_bus for PCI: 00:15.2
838 12:28:51.459433 GENERIC: 0.0 disabled
839 12:28:51.459516 I2C: 00:15 enabled
840 12:28:51.462629
841 12:28:51.462711 I2C: 00:10 disabled
842 12:28:51.465850 I2C: 00:10 disabled
843 12:28:51.465933 I2C: 00:2c enabled
844 12:28:51.469176 I2C: 00:40 enabled
845 12:28:51.469269 I2C: 00:10 enabled
846 12:28:51.472805
847 12:28:51.472889 I2C: 00:39 enabled
848 12:28:51.475907 scan_static_bus for PCI: 00:15.2 done
849 12:28:51.481986 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
850 12:28:51.482092 PCI: 00:15.3 scanning...
851 12:28:51.485752 scan_static_bus for PCI: 00:15.3
852 12:28:51.488824 I2C: 00:36 enabled
853 12:28:51.491932 I2C: 00:10 disabled
854 12:28:51.492014 I2C: 00:0c enabled
855 12:28:51.495795 I2C: 00:50 enabled
856 12:28:51.498949 scan_static_bus for PCI: 00:15.3 done
857 12:28:51.502149 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
858 12:28:51.505450 PCI: 00:19.0 scanning...
859 12:28:51.508710 scan_static_bus for PCI: 00:19.0
860 12:28:51.511863 I2C: 00:1a enabled
861 12:28:51.511946 I2C: 00:1a disabled
862 12:28:51.515223
863 12:28:51.515307 I2C: 00:1a disabled
864 12:28:51.518403 I2C: 00:28 enabled
865 12:28:51.518485 I2C: 00:29 enabled
866 12:28:51.522212 scan_static_bus for PCI: 00:19.0 done
867 12:28:51.528694 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
868 12:28:51.531839 PCI: 00:1e.2 scanning...
869 12:28:51.534927 scan_generic_bus for PCI: 00:1e.2
870 12:28:51.535010 SPI: 00 enabled
871 12:28:51.541955 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
872 12:28:51.548275 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
873 12:28:51.548358 PCI: 00:1f.0 scanning...
874 12:28:51.551475 scan_static_bus for PCI: 00:1f.0
875 12:28:51.555152 PNP: 0c09.0 enabled
876 12:28:51.558228 PNP: 0c09.0 scanning...
877 12:28:51.561211 scan_static_bus for PNP: 0c09.0
878 12:28:51.564977 scan_static_bus for PNP: 0c09.0 done
879 12:28:51.568237 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
880 12:28:51.571382 scan_static_bus for PCI: 00:1f.0 done
881 12:28:51.577672 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
882 12:28:51.581271 PCI: 00:1f.3 scanning...
883 12:28:51.584421 scan_static_bus for PCI: 00:1f.3
884 12:28:51.584503 GENERIC: 0.0 disabled
885 12:28:51.587994 scan_static_bus for PCI: 00:1f.3 done
886 12:28:51.591159
887 12:28:51.594322 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
888 12:28:51.597448 PCI: 00:1f.5 scanning...
889 12:28:51.601167 scan_generic_bus for PCI: 00:1f.5
890 12:28:51.604503 scan_generic_bus for PCI: 00:1f.5 done
891 12:28:51.607739 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
892 12:28:51.614173 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
893 12:28:51.617363 scan_static_bus for Root Device done
894 12:28:51.620601 scan_bus: bus Root Device finished in 664 msecs
895 12:28:51.623896 done
896 12:28:51.627187 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1083 ms
897 12:28:51.631117 Chrome EC: UHEPI supported
898 12:28:51.637455 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
899 12:28:51.643928 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
900 12:28:51.647202 SPI flash protection: WPSW=1 SRP0=1
901 12:28:51.654078 fast_spi_flash_protect: FPR 0 is enabled for range 0x00bca000-0x00bf9fff
902 12:28:51.660586 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
903 12:28:51.666886 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 31 ms
904 12:28:51.666970 found VGA at PCI: 00:02.0
905 12:28:51.670221
906 12:28:51.670304 Setting up VGA for PCI: 00:02.0
907 12:28:51.676798 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
908 12:28:51.680493 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
909 12:28:51.683632
910 12:28:51.683715 Allocating resources...
911 12:28:51.687320 Reading resources...
912 12:28:51.690379 Root Device read_resources bus 0 link: 0
913 12:28:51.693578 CPU_CLUSTER: 0 read_resources bus 0 link: 0
914 12:28:51.696845
915 12:28:51.699996 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
916 12:28:51.703775 DOMAIN: 0000 read_resources bus 0 link: 0
917 12:28:51.710773 PCI: 00:04.0 read_resources bus 1 link: 0
918 12:28:51.713895 PCI: 00:04.0 read_resources bus 1 link: 0 done
919 12:28:51.720796 PCI: 00:05.0 read_resources bus 2 link: 0
920 12:28:51.724674 PCI: 00:05.0 read_resources bus 2 link: 0 done
921 12:28:51.727850 PCI: 00:14.0 read_resources bus 0 link: 0
922 12:28:51.734902 USB0 port 0 read_resources bus 0 link: 0
923 12:28:51.789583 USB0 port 0 read_resources bus 0 link: 0 done
924 12:28:51.789928 PCI: 00:14.0 read_resources bus 0 link: 0 done
925 12:28:51.790059 PCI: 00:14.3 read_resources bus 0 link: 0
926 12:28:51.790156 PCI: 00:14.3 read_resources bus 0 link: 0 done
927 12:28:51.790409 PCI: 00:15.0 read_resources bus 0 link: 0
928 12:28:51.790475 PCI: 00:15.0 read_resources bus 0 link: 0 done
929 12:28:51.790534 PCI: 00:15.2 read_resources bus 0 link: 0
930 12:28:51.790884 PCI: 00:15.2 read_resources bus 0 link: 0 done
931 12:28:51.791157 PCI: 00:15.3 read_resources bus 0 link: 0
932 12:28:51.791229 PCI: 00:15.3 read_resources bus 0 link: 0 done
933 12:28:51.791292 PCI: 00:19.0 read_resources bus 0 link: 0
934 12:28:51.825608 PCI: 00:19.0 read_resources bus 0 link: 0 done
935 12:28:51.825748 PCI: 00:1e.2 read_resources bus 3 link: 0
936 12:28:51.825823 PCI: 00:1e.2 read_resources bus 3 link: 0 done
937 12:28:51.826099 PCI: 00:1f.0 read_resources bus 0 link: 0
938 12:28:51.826174 PCI: 00:1f.0 read_resources bus 0 link: 0 done
939 12:28:51.826237 PCI: 00:1f.3 read_resources bus 0 link: 0
940 12:28:51.826310 PCI: 00:1f.3 read_resources bus 0 link: 0 done
941 12:28:51.829407 DOMAIN: 0000 read_resources bus 0 link: 0 done
942 12:28:51.832625 Root Device read_resources bus 0 link: 0 done
943 12:28:51.835829 Done reading resources.
944 12:28:51.839024 Show resources in subtree (Root Device)...After reading.
945 12:28:51.842790
946 12:28:51.845940 Root Device child on link 0 CPU_CLUSTER: 0
947 12:28:51.849048 CPU_CLUSTER: 0 child on link 0 APIC: 00
948 12:28:51.849137 APIC: 00
949 12:28:51.852260 APIC: 02
950 12:28:51.855548 DOMAIN: 0000 child on link 0 PCI: 00:00.0
951 12:28:51.865583 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
952 12:28:51.875759 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
953 12:28:51.875847 PCI: 00:00.0
954 12:28:51.885146 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
955 12:28:51.895281 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
956 12:28:51.905082 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
957 12:28:51.914812 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
958 12:28:51.925002 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
959 12:28:51.931396 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
960 12:28:51.935052
961 12:28:51.941425 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
962 12:28:51.951310 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
963 12:28:51.960953 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
964 12:28:51.970817 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
965 12:28:51.981184 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
966 12:28:51.987208 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
967 12:28:51.997269 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
968 12:28:52.007332 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
969 12:28:52.016868 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
970 12:28:52.026936 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
971 12:28:52.037173 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
972 12:28:52.043568 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
973 12:28:52.053681 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
974 12:28:52.056762 PCI: 00:02.0
975 12:28:52.066708 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
976 12:28:52.076779 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
977 12:28:52.086225 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
978 12:28:52.089928 PCI: 00:04.0 child on link 0 GENERIC: 0.0
979 12:28:52.099937 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
980 12:28:52.100023 GENERIC: 0.0
981 12:28:52.106250 PCI: 00:05.0 child on link 0 GENERIC: 0.0
982 12:28:52.116151 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
983 12:28:52.116235 GENERIC: 0.0
984 12:28:52.119251 PCI: 00:08.0
985 12:28:52.129601 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
986 12:28:52.132734 PCI: 00:14.0 child on link 0 USB0 port 0
987 12:28:52.142754 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
988 12:28:52.149118 USB0 port 0 child on link 0 USB2 port 0
989 12:28:52.149201 USB2 port 0
990 12:28:52.152130 USB2 port 1
991 12:28:52.152212 USB2 port 2
992 12:28:52.156008 USB2 port 3
993 12:28:52.156093 USB2 port 4
994 12:28:52.159135 USB2 port 5
995 12:28:52.159218 USB2 port 6
996 12:28:52.162426 USB2 port 7
997 12:28:52.162508 USB3 port 0
998 12:28:52.165530 USB3 port 1
999 12:28:52.165613 USB3 port 2
1000 12:28:52.169242 USB3 port 3
1001 12:28:52.169324 PCI: 00:14.2
1002 12:28:52.175476 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1003 12:28:52.185651 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1004 12:28:52.185733 GENERIC: 0.0
1005 12:28:52.188704 PCI: 00:14.5
1006 12:28:52.199002 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1007 12:28:52.202243 PCI: 00:15.0 child on link 0 I2C: 00:2c
1008 12:28:52.211719 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1009 12:28:52.215450 I2C: 00:2c
1010 12:28:52.215532 I2C: 00:15
1011 12:28:52.218639 PCI: 00:15.1
1012 12:28:52.228686 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 12:28:52.231849 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1014 12:28:52.241883 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1015 12:28:52.241966 GENERIC: 0.0
1016 12:28:52.245073 I2C: 00:15
1017 12:28:52.245155 I2C: 00:10
1018 12:28:52.248284 I2C: 00:10
1019 12:28:52.248366 I2C: 00:2c
1020 12:28:52.251964 I2C: 00:40
1021 12:28:52.252045 I2C: 00:10
1022 12:28:52.255124 I2C: 00:39
1023 12:28:52.258293 PCI: 00:15.3 child on link 0 I2C: 00:36
1024 12:28:52.267994 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 12:28:52.268077 I2C: 00:36
1026 12:28:52.271425 I2C: 00:10
1027 12:28:52.271506 I2C: 00:0c
1028 12:28:52.274687 I2C: 00:50
1029 12:28:52.274769 PCI: 00:16.0
1030 12:28:52.284361 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1031 12:28:52.291164 PCI: 00:19.0 child on link 0 I2C: 00:1a
1032 12:28:52.301209 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1033 12:28:52.301321 I2C: 00:1a
1034 12:28:52.304426 I2C: 00:1a
1035 12:28:52.304514 I2C: 00:1a
1036 12:28:52.307699 I2C: 00:28
1037 12:28:52.307779 I2C: 00:29
1038 12:28:52.310837 PCI: 00:19.2
1039 12:28:52.320950 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1040 12:28:52.330610 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1041 12:28:52.330691 PCI: 00:1a.0
1042 12:28:52.340351 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1043 12:28:52.343953 PCI: 00:1e.0
1044 12:28:52.347258 PCI: 00:1e.2 child on link 0 SPI: 00
1045 12:28:52.356671 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1046 12:28:52.359920 SPI: 00
1047 12:28:52.363757 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1048 12:28:52.373119 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1049 12:28:52.373201 PNP: 0c09.0
1050 12:28:52.383136 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1051 12:28:52.383218 PCI: 00:1f.2
1052 12:28:52.393009 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1053 12:28:52.403732 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1054 12:28:52.407030 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1055 12:28:52.417203 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1056 12:28:52.427124 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1057 12:28:52.427206 GENERIC: 0.0
1058 12:28:52.430226 PCI: 00:1f.5
1059 12:28:52.440033 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1060 12:28:52.446871 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1061 12:28:52.453242 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1062 12:28:52.460005 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1063 12:28:52.466846 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1064 12:28:52.476637 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1065 12:28:52.482964 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1066 12:28:52.486774 DOMAIN: 0000: Resource ranges:
1067 12:28:52.489969 * Base: 1000, Size: 800, Tag: 100
1068 12:28:52.492992 * Base: 1900, Size: e700, Tag: 100
1069 12:28:52.499336 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1070 12:28:52.506315 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1071 12:28:52.512645 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1072 12:28:52.519348 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1073 12:28:52.526208 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1074 12:28:52.535738 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1075 12:28:52.542223 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1076 12:28:52.549098 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1077 12:28:52.559084 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1078 12:28:52.565447 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1079 12:28:52.572411 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1080 12:28:52.582038 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1081 12:28:52.588891 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1082 12:28:52.595271 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1083 12:28:52.605213 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1084 12:28:52.612008 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1085 12:28:52.618437 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1086 12:28:52.628409 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1087 12:28:52.634720 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1088 12:28:52.641598 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1089 12:28:52.651672 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1090 12:28:52.658006 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1091 12:28:52.664333 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1092 12:28:52.674596 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1093 12:28:52.677731 DOMAIN: 0000: Resource ranges:
1094 12:28:52.680852 * Base: 7fc00000, Size: 40400000, Tag: 200
1095 12:28:52.684156 * Base: d0000000, Size: 2b000000, Tag: 200
1096 12:28:52.687835 * Base: fb001000, Size: 2fff000, Tag: 200
1097 12:28:52.694061 * Base: fe010000, Size: 22000, Tag: 200
1098 12:28:52.697210 * Base: fe033000, Size: a4d000, Tag: 200
1099 12:28:52.700989 * Base: fea88000, Size: 2f8000, Tag: 200
1100 12:28:52.703947 * Base: fed88000, Size: 8000, Tag: 200
1101 12:28:52.710736 * Base: fed93000, Size: d000, Tag: 200
1102 12:28:52.713939 * Base: feda2000, Size: 125e000, Tag: 200
1103 12:28:52.717090 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1104 12:28:52.727111 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1105 12:28:52.733704 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1106 12:28:52.740523 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1107 12:28:52.746925 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1108 12:28:52.753555 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1109 12:28:52.760183 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1110 12:28:52.767096 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1111 12:28:52.773382 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1112 12:28:52.779805 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1113 12:28:52.786732 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1114 12:28:52.793095 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1115 12:28:52.799831 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1116 12:28:52.806062 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1117 12:28:52.812911 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1118 12:28:52.819705 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1119 12:28:52.825983 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1120 12:28:52.833010 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1121 12:28:52.839360 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1122 12:28:52.846027 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1123 12:28:52.852408 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1124 12:28:52.858875 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1125 12:28:52.865796 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1126 12:28:52.868900 Root Device assign_resources, bus 0 link: 0
1127 12:28:52.875886 DOMAIN: 0000 assign_resources, bus 0 link: 0
1128 12:28:52.882224 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1129 12:28:52.892421 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1130 12:28:52.898863 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1131 12:28:52.905071 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1132 12:28:52.912084 PCI: 00:04.0 assign_resources, bus 1 link: 0
1133 12:28:52.915051 PCI: 00:04.0 assign_resources, bus 1 link: 0
1134 12:28:52.925026 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1135 12:28:52.928225 PCI: 00:05.0 assign_resources, bus 2 link: 0
1136 12:28:52.931343 PCI: 00:05.0 assign_resources, bus 2 link: 0
1137 12:28:52.935022
1138 12:28:52.941451 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1139 12:28:52.948234 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1140 12:28:52.954619 PCI: 00:14.0 assign_resources, bus 0 link: 0
1141 12:28:52.957850 PCI: 00:14.0 assign_resources, bus 0 link: 0
1142 12:28:52.968088 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1143 12:28:52.971227 PCI: 00:14.3 assign_resources, bus 0 link: 0
1144 12:28:52.974426 PCI: 00:14.3 assign_resources, bus 0 link: 0
1145 12:28:52.985141 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1146 12:28:52.991403 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1147 12:28:52.995268 PCI: 00:15.0 assign_resources, bus 0 link: 0
1148 12:28:52.998579
1149 12:28:53.001637 PCI: 00:15.0 assign_resources, bus 0 link: 0
1150 12:28:53.007921 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1151 12:28:53.018082 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1152 12:28:53.021274 PCI: 00:15.2 assign_resources, bus 0 link: 0
1153 12:28:53.027646 PCI: 00:15.2 assign_resources, bus 0 link: 0
1154 12:28:53.034517 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1155 12:28:53.037813 PCI: 00:15.3 assign_resources, bus 0 link: 0
1156 12:28:53.044756 PCI: 00:15.3 assign_resources, bus 0 link: 0
1157 12:28:53.051073 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1158 12:28:53.061245 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1159 12:28:53.064383 PCI: 00:19.0 assign_resources, bus 0 link: 0
1160 12:28:53.070678 PCI: 00:19.0 assign_resources, bus 0 link: 0
1161 12:28:53.077722 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1162 12:28:53.084136 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1163 12:28:53.094099 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1164 12:28:53.097263 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1165 12:28:53.104208 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1166 12:28:53.107181 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1167 12:28:53.114178 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1168 12:28:53.117275 LPC: Trying to open IO window from 800 size 1ff
1169 12:28:53.124110 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1170 12:28:53.127336
1171 12:28:53.133640 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1172 12:28:53.136826 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1173 12:28:53.143636 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1174 12:28:53.150001 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1175 12:28:53.153274 DOMAIN: 0000 assign_resources, bus 0 link: 0
1176 12:28:53.157144
1177 12:28:53.160354 Root Device assign_resources, bus 0 link: 0
1178 12:28:53.163614 Done setting resources.
1179 12:28:53.169828 Show resources in subtree (Root Device)...After assigning values.
1180 12:28:53.173453 Root Device child on link 0 CPU_CLUSTER: 0
1181 12:28:53.176624 CPU_CLUSTER: 0 child on link 0 APIC: 00
1182 12:28:53.179913 APIC: 00
1183 12:28:53.179987 APIC: 02
1184 12:28:53.183142 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1185 12:28:53.193195 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1186 12:28:53.202807 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1187 12:28:53.206551 PCI: 00:00.0
1188 12:28:53.212830 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1189 12:28:53.222694 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1190 12:28:53.232348 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1191 12:28:53.242347 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1192 12:28:53.252410 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1193 12:28:53.262610 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1194 12:28:53.269200 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1195 12:28:53.278884 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1196 12:28:53.288534 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1197 12:28:53.298468 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1198 12:28:53.308574 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1199 12:28:53.318590 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1200 12:28:53.324729 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1201 12:28:53.334824 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1202 12:28:53.344999 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1203 12:28:53.354331 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1204 12:28:53.364593 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1205 12:28:53.374716 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1206 12:28:53.380784 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1207 12:28:53.384022 PCI: 00:02.0
1208 12:28:53.394077 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1209 12:28:53.404099 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1210 12:28:53.414181 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1211 12:28:53.417386 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1212 12:28:53.430652 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1213 12:28:53.430737 GENERIC: 0.0
1214 12:28:53.433826 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1215 12:28:53.447305 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1216 12:28:53.447393 GENERIC: 0.0
1217 12:28:53.450436 PCI: 00:08.0
1218 12:28:53.460566 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1219 12:28:53.463567 PCI: 00:14.0 child on link 0 USB0 port 0
1220 12:28:53.473260 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1221 12:28:53.480264 USB0 port 0 child on link 0 USB2 port 0
1222 12:28:53.480350 USB2 port 0
1223 12:28:53.483433 USB2 port 1
1224 12:28:53.483517 USB2 port 2
1225 12:28:53.486638 USB2 port 3
1226 12:28:53.486722 USB2 port 4
1227 12:28:53.490224 USB2 port 5
1228 12:28:53.490308 USB2 port 6
1229 12:28:53.493373 USB2 port 7
1230 12:28:53.493456 USB3 port 0
1231 12:28:53.496539 USB3 port 1
1232 12:28:53.496623 USB3 port 2
1233 12:28:53.499557 USB3 port 3
1234 12:28:53.499640 PCI: 00:14.2
1235 12:28:53.506392 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1236 12:28:53.516239 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1237 12:28:53.516326 GENERIC: 0.0
1238 12:28:53.519373 PCI: 00:14.5
1239 12:28:53.529353 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1240 12:28:53.532997 PCI: 00:15.0 child on link 0 I2C: 00:2c
1241 12:28:53.545594 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1242 12:28:53.545680 I2C: 00:2c
1243 12:28:53.545747 I2C: 00:15
1244 12:28:53.549319 PCI: 00:15.1
1245 12:28:53.558905 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1246 12:28:53.562067 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1247 12:28:53.575461 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1248 12:28:53.575563 GENERIC: 0.0
1249 12:28:53.578542 I2C: 00:15
1250 12:28:53.578655 I2C: 00:10
1251 12:28:53.578720 I2C: 00:10
1252 12:28:53.582432
1253 12:28:53.582505 I2C: 00:2c
1254 12:28:53.582578 I2C: 00:40
1255 12:28:53.585493 I2C: 00:10
1256 12:28:53.585572 I2C: 00:39
1257 12:28:53.591834 PCI: 00:15.3 child on link 0 I2C: 00:36
1258 12:28:53.601781 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1259 12:28:53.601868 I2C: 00:36
1260 12:28:53.605478 I2C: 00:10
1261 12:28:53.605563 I2C: 00:0c
1262 12:28:53.608723 I2C: 00:50
1263 12:28:53.608808 PCI: 00:16.0
1264 12:28:53.618718 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1265 12:28:53.625196 PCI: 00:19.0 child on link 0 I2C: 00:1a
1266 12:28:53.635185 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1267 12:28:53.635269 I2C: 00:1a
1268 12:28:53.638419 I2C: 00:1a
1269 12:28:53.638496 I2C: 00:1a
1270 12:28:53.641533 I2C: 00:28
1271 12:28:53.641608 I2C: 00:29
1272 12:28:53.644669 PCI: 00:19.2
1273 12:28:53.654691 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1274 12:28:53.664909 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1275 12:28:53.667916 PCI: 00:1a.0
1276 12:28:53.678146 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1277 12:28:53.678228 PCI: 00:1e.0
1278 12:28:53.681236 PCI: 00:1e.2 child on link 0 SPI: 00
1279 12:28:53.690874 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1280 12:28:53.694176 SPI: 00
1281 12:28:53.698134 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1282 12:28:53.707497 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1283 12:28:53.707581 PNP: 0c09.0
1284 12:28:53.717559 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1285 12:28:53.717640 PCI: 00:1f.2
1286 12:28:53.727492 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1287 12:28:53.737645 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1288 12:28:53.740815 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1289 12:28:53.754050 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1290 12:28:53.763698 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1291 12:28:53.763785 GENERIC: 0.0
1292 12:28:53.766839 PCI: 00:1f.5
1293 12:28:53.777178 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1294 12:28:53.780239 Done allocating resources.
1295 12:28:53.786517 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2093 ms
1296 12:28:53.786601 Enabling resources...
1297 12:28:53.793761 PCI: 00:00.0 subsystem <- 8086/4e22
1298 12:28:53.793852 PCI: 00:00.0 cmd <- 06
1299 12:28:53.796906 PCI: 00:02.0 subsystem <- 8086/4e55
1300 12:28:53.800199 PCI: 00:02.0 cmd <- 03
1301 12:28:53.803281 PCI: 00:04.0 subsystem <- 8086/4e03
1302 12:28:53.807112 PCI: 00:04.0 cmd <- 02
1303 12:28:53.810467 PCI: 00:05.0 bridge ctrl <- 0003
1304 12:28:53.813796 PCI: 00:05.0 subsystem <- 8086/4e19
1305 12:28:53.817015 PCI: 00:05.0 cmd <- 02
1306 12:28:53.820157 PCI: 00:08.0 cmd <- 06
1307 12:28:53.823239 PCI: 00:14.0 subsystem <- 8086/4ded
1308 12:28:53.823800 PCI: 00:14.0 cmd <- 02
1309 12:28:53.830776 PCI: 00:14.3 subsystem <- 8086/4df0
1310 12:28:53.831289 PCI: 00:14.3 cmd <- 02
1311 12:28:53.833671 PCI: 00:14.5 subsystem <- 8086/4df8
1312 12:28:53.836919 PCI: 00:14.5 cmd <- 06
1313 12:28:53.839970 PCI: 00:15.0 subsystem <- 8086/4de8
1314 12:28:53.843146 PCI: 00:15.0 cmd <- 02
1315 12:28:53.846925 PCI: 00:15.1 subsystem <- 8086/4de9
1316 12:28:53.850142 PCI: 00:15.1 cmd <- 02
1317 12:28:53.853332 PCI: 00:15.2 subsystem <- 8086/4dea
1318 12:28:53.856811 PCI: 00:15.2 cmd <- 02
1319 12:28:53.859809 PCI: 00:15.3 subsystem <- 8086/4deb
1320 12:28:53.863665 PCI: 00:15.3 cmd <- 02
1321 12:28:53.866733 PCI: 00:16.0 subsystem <- 8086/4de0
1322 12:28:53.867200 PCI: 00:16.0 cmd <- 02
1323 12:28:53.873218 PCI: 00:19.0 subsystem <- 8086/4dc5
1324 12:28:53.873727 PCI: 00:19.0 cmd <- 02
1325 12:28:53.876360 PCI: 00:19.2 subsystem <- 8086/4dc7
1326 12:28:53.879512 PCI: 00:19.2 cmd <- 06
1327 12:28:53.883677 PCI: 00:1a.0 subsystem <- 8086/4dc4
1328 12:28:53.886496 PCI: 00:1a.0 cmd <- 06
1329 12:28:53.889527 PCI: 00:1e.2 subsystem <- 8086/4daa
1330 12:28:53.893049 PCI: 00:1e.2 cmd <- 06
1331 12:28:53.896281 PCI: 00:1f.0 subsystem <- 8086/4d87
1332 12:28:53.899910 PCI: 00:1f.0 cmd <- 407
1333 12:28:53.902871 PCI: 00:1f.3 subsystem <- 8086/4dc8
1334 12:28:53.906263 PCI: 00:1f.3 cmd <- 02
1335 12:28:53.909229 PCI: 00:1f.5 subsystem <- 8086/4da4
1336 12:28:53.909701 PCI: 00:1f.5 cmd <- 406
1337 12:28:53.914995 done.
1338 12:28:53.918141 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1339 12:28:53.921921 Initializing devices...
1340 12:28:53.925216 Root Device init
1341 12:28:53.925795 mainboard: EC init
1342 12:28:53.931485 Chrome EC: Set SMI mask to 0x0000000000000000
1343 12:28:53.935239 Chrome EC: clear events_b mask to 0x0000000000000000
1344 12:28:53.941915 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1345 12:28:53.948341 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1346 12:28:53.955087 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1347 12:28:53.958390 Chrome EC: Set WAKE mask to 0x0000000000000000
1348 12:28:53.965906 Root Device init finished in 36 msecs
1349 12:28:53.969414 PCI: 00:00.0 init
1350 12:28:53.969993 CPU TDP = 6 Watts
1351 12:28:53.972340 CPU PL1 = 7 Watts
1352 12:28:53.976122 CPU PL2 = 12 Watts
1353 12:28:53.979259 PCI: 00:00.0 init finished in 6 msecs
1354 12:28:53.979842 PCI: 00:02.0 init
1355 12:28:53.982471 GMA: Found VBT in CBFS
1356 12:28:53.985709 GMA: Found valid VBT in CBFS
1357 12:28:53.993061 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1358 12:28:53.999025 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1359 12:28:54.002279 PCI: 00:02.0 init finished in 18 msecs
1360 12:28:54.006106 PCI: 00:08.0 init
1361 12:28:54.009282 PCI: 00:08.0 init finished in 0 msecs
1362 12:28:54.012482 PCI: 00:14.0 init
1363 12:28:54.015867 XHCI: Updated LFPS sampling OFF time to 9 ms
1364 12:28:54.018950 PCI: 00:14.0 init finished in 4 msecs
1365 12:28:54.022218 PCI: 00:15.0 init
1366 12:28:54.025314 I2C bus 0 version 0x3230302a
1367 12:28:54.029228 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1368 12:28:54.032331 PCI: 00:15.0 init finished in 6 msecs
1369 12:28:54.035482 PCI: 00:15.1 init
1370 12:28:54.039089 I2C bus 1 version 0x3230302a
1371 12:28:54.042296 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1372 12:28:54.045458 PCI: 00:15.1 init finished in 6 msecs
1373 12:28:54.048697 PCI: 00:15.2 init
1374 12:28:54.049163 I2C bus 2 version 0x3230302a
1375 12:28:54.055911 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1376 12:28:54.058741 PCI: 00:15.2 init finished in 6 msecs
1377 12:28:54.059216 PCI: 00:15.3 init
1378 12:28:54.062473 I2C bus 3 version 0x3230302a
1379 12:28:54.065409 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1380 12:28:54.068528 PCI: 00:15.3 init finished in 6 msecs
1381 12:28:54.072174 PCI: 00:16.0 init
1382 12:28:54.075538 PCI: 00:16.0 init finished in 0 msecs
1383 12:28:54.078917 PCI: 00:19.0 init
1384 12:28:54.081837 I2C bus 4 version 0x3230302a
1385 12:28:54.085160 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1386 12:28:54.088212 PCI: 00:19.0 init finished in 6 msecs
1387 12:28:54.091904 PCI: 00:1a.0 init
1388 12:28:54.095590 PCI: 00:1a.0 init finished in 0 msecs
1389 12:28:54.098453 PCI: 00:1f.0 init
1390 12:28:54.101535 IOAPIC: Initializing IOAPIC at 0xfec00000
1391 12:28:54.104683 IOAPIC: Bootstrap Processor Local APIC = 0x00
1392 12:28:54.108654 IOAPIC: ID = 0x02
1393 12:28:54.111704 IOAPIC: Dumping registers
1394 12:28:54.112183 reg 0x0000: 0x02000000
1395 12:28:54.115047 reg 0x0001: 0x00770020
1396 12:28:54.118135 reg 0x0002: 0x00000000
1397 12:28:54.121312 PCI: 00:1f.0 init finished in 21 msecs
1398 12:28:54.125213 PCI: 00:1f.2 init
1399 12:28:54.128409 Disabling ACPI via APMC.
1400 12:28:54.128999 APMC done.
1401 12:28:54.131557
1402 12:28:54.134801 PCI: 00:1f.2 init finished in 5 msecs
1403 12:28:54.145161 PNP: 0c09.0 init
1404 12:28:54.148485 Google Chrome EC uptime: 6.546 seconds
1405 12:28:54.155051 Google Chrome AP resets since EC boot: 0
1406 12:28:54.158254 Google Chrome most recent AP reset causes:
1407 12:28:54.165186 Google Chrome EC reset flags at last EC boot: reset-pin
1408 12:28:54.168318 PNP: 0c09.0 init finished in 18 msecs
1409 12:28:54.168862 Devices initialized
1410 12:28:54.171735 Show all devs... After init.
1411 12:28:54.174734 Root Device: enabled 1
1412 12:28:54.177914 CPU_CLUSTER: 0: enabled 1
1413 12:28:54.181096 DOMAIN: 0000: enabled 1
1414 12:28:54.181572 PCI: 00:00.0: enabled 1
1415 12:28:54.185290 PCI: 00:02.0: enabled 1
1416 12:28:54.188376 PCI: 00:04.0: enabled 1
1417 12:28:54.188918 PCI: 00:05.0: enabled 1
1418 12:28:54.191491 PCI: 00:09.0: enabled 0
1419 12:28:54.194492 PCI: 00:12.6: enabled 0
1420 12:28:54.197778 PCI: 00:14.0: enabled 1
1421 12:28:54.198309 PCI: 00:14.1: enabled 0
1422 12:28:54.201859 PCI: 00:14.2: enabled 0
1423 12:28:54.204770 PCI: 00:14.3: enabled 1
1424 12:28:54.207889 PCI: 00:14.5: enabled 1
1425 12:28:54.208393 PCI: 00:15.0: enabled 1
1426 12:28:54.211018 PCI: 00:15.1: enabled 1
1427 12:28:54.214267 PCI: 00:15.2: enabled 1
1428 12:28:54.217412 PCI: 00:15.3: enabled 1
1429 12:28:54.217886 PCI: 00:16.0: enabled 1
1430 12:28:54.221208 PCI: 00:16.1: enabled 0
1431 12:28:54.224257 PCI: 00:16.4: enabled 0
1432 12:28:54.224735 PCI: 00:16.5: enabled 0
1433 12:28:54.227378
1434 12:28:54.227855 PCI: 00:17.0: enabled 0
1435 12:28:54.231062 PCI: 00:19.0: enabled 1
1436 12:28:54.234103 PCI: 00:19.1: enabled 0
1437 12:28:54.234580 PCI: 00:19.2: enabled 1
1438 12:28:54.237340 PCI: 00:1a.0: enabled 1
1439 12:28:54.240534 PCI: 00:1c.0: enabled 0
1440 12:28:54.244150 PCI: 00:1c.1: enabled 0
1441 12:28:54.244629 PCI: 00:1c.2: enabled 0
1442 12:28:54.247306 PCI: 00:1c.3: enabled 0
1443 12:28:54.250439 PCI: 00:1c.4: enabled 0
1444 12:28:54.254287 PCI: 00:1c.5: enabled 0
1445 12:28:54.254818 PCI: 00:1c.6: enabled 0
1446 12:28:54.257388 PCI: 00:1c.7: enabled 1
1447 12:28:54.260628 PCI: 00:1e.0: enabled 0
1448 12:28:54.263796 PCI: 00:1e.1: enabled 0
1449 12:28:54.264350 PCI: 00:1e.2: enabled 1
1450 12:28:54.266910 PCI: 00:1e.3: enabled 0
1451 12:28:54.270760 PCI: 00:1f.0: enabled 1
1452 12:28:54.271239 PCI: 00:1f.1: enabled 0
1453 12:28:54.273932 PCI: 00:1f.2: enabled 1
1454 12:28:54.277194 PCI: 00:1f.3: enabled 1
1455 12:28:54.280415 PCI: 00:1f.4: enabled 0
1456 12:28:54.280893 PCI: 00:1f.5: enabled 1
1457 12:28:54.283627 PCI: 00:1f.7: enabled 0
1458 12:28:54.286998 GENERIC: 0.0: enabled 1
1459 12:28:54.290170 GENERIC: 0.0: enabled 1
1460 12:28:54.290645 USB0 port 0: enabled 1
1461 12:28:54.293438 GENERIC: 0.0: enabled 1
1462 12:28:54.296617 I2C: 00:2c: enabled 1
1463 12:28:54.297093 I2C: 00:15: enabled 1
1464 12:28:54.300393 GENERIC: 0.0: enabled 0
1465 12:28:54.303606 I2C: 00:15: enabled 1
1466 12:28:54.304087 I2C: 00:10: enabled 0
1467 12:28:54.306726
1468 12:28:54.307207 I2C: 00:10: enabled 0
1469 12:28:54.310170 I2C: 00:2c: enabled 1
1470 12:28:54.313236 I2C: 00:40: enabled 1
1471 12:28:54.313708 I2C: 00:10: enabled 1
1472 12:28:54.316976 I2C: 00:39: enabled 1
1473 12:28:54.320134 I2C: 00:36: enabled 1
1474 12:28:54.320611 I2C: 00:10: enabled 0
1475 12:28:54.323263 I2C: 00:0c: enabled 1
1476 12:28:54.326713 I2C: 00:50: enabled 1
1477 12:28:54.327283 I2C: 00:1a: enabled 1
1478 12:28:54.329732 I2C: 00:1a: enabled 0
1479 12:28:54.332976 I2C: 00:1a: enabled 0
1480 12:28:54.333468 I2C: 00:28: enabled 1
1481 12:28:54.336609 I2C: 00:29: enabled 1
1482 12:28:54.339864 PCI: 00:00.0: enabled 1
1483 12:28:54.340462 SPI: 00: enabled 1
1484 12:28:54.342705 PNP: 0c09.0: enabled 1
1485 12:28:54.346537 GENERIC: 0.0: enabled 0
1486 12:28:54.347008 USB2 port 0: enabled 1
1487 12:28:54.349731 USB2 port 1: enabled 1
1488 12:28:54.352918 USB2 port 2: enabled 1
1489 12:28:54.356152 USB2 port 3: enabled 1
1490 12:28:54.356625 USB2 port 4: enabled 0
1491 12:28:54.359204 USB2 port 5: enabled 1
1492 12:28:54.363006 USB2 port 6: enabled 0
1493 12:28:54.363595 USB2 port 7: enabled 1
1494 12:28:54.366260 USB3 port 0: enabled 1
1495 12:28:54.369318 USB3 port 1: enabled 1
1496 12:28:54.369798 USB3 port 2: enabled 1
1497 12:28:54.372419
1498 12:28:54.372892 USB3 port 3: enabled 1
1499 12:28:54.376138 APIC: 00: enabled 1
1500 12:28:54.376632 APIC: 02: enabled 1
1501 12:28:54.379327 PCI: 00:08.0: enabled 1
1502 12:28:54.386126 BS: BS_DEV_INIT run times (exec / console): 24 / 436 ms
1503 12:28:54.389650 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1504 12:28:54.392548 ELOG: NV offset 0xbfa000 size 0x1000
1505 12:28:54.401035 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1506 12:28:54.407282 ELOG: Event(17) added with size 13 at 2022-12-01 12:28:53 UTC
1507 12:28:54.414221 ELOG: Event(92) added with size 9 at 2022-12-01 12:28:53 UTC
1508 12:28:54.420644 ELOG: Event(93) added with size 9 at 2022-12-01 12:28:53 UTC
1509 12:28:54.427560 ELOG: Event(9E) added with size 10 at 2022-12-01 12:28:53 UTC
1510 12:28:54.433761 ELOG: Event(9F) added with size 14 at 2022-12-01 12:28:53 UTC
1511 12:28:54.440562 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1512 12:28:54.443558 ELOG: Event(A1) added with size 10 at 2022-12-01 12:28:53 UTC
1513 12:28:54.453784 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1514 12:28:54.460036 ELOG: Event(A0) added with size 9 at 2022-12-01 12:28:53 UTC
1515 12:28:54.463301 elog_add_boot_reason: Logged dev mode boot
1516 12:28:54.470192 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1517 12:28:54.470672 Finalize devices...
1518 12:28:54.473488 Devices finalized
1519 12:28:54.479905 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1520 12:28:54.483190 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1521 12:28:54.489579 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1522 12:28:54.492836 ME: HFSTS1 : 0x80030045
1523 12:28:54.496247 ME: HFSTS2 : 0x30280136
1524 12:28:54.503196 ME: HFSTS3 : 0x00000050
1525 12:28:54.506232 ME: HFSTS4 : 0x00004000
1526 12:28:54.509514 ME: HFSTS5 : 0x00000000
1527 12:28:54.512544 ME: HFSTS6 : 0x40400006
1528 12:28:54.515933 ME: Manufacturing Mode : NO
1529 12:28:54.519135 ME: FW Partition Table : OK
1530 12:28:54.522956 ME: Bringup Loader Failure : NO
1531 12:28:54.526419 ME: Firmware Init Complete : NO
1532 12:28:54.529579 ME: Boot Options Present : NO
1533 12:28:54.532611 ME: Update In Progress : NO
1534 12:28:54.536017 ME: D0i3 Support : YES
1535 12:28:54.538963 ME: Low Power State Enabled : NO
1536 12:28:54.542870 ME: CPU Replaced : YES
1537 12:28:54.546106 ME: CPU Replacement Valid : YES
1538 12:28:54.549093 ME: Current Working State : 5
1539 12:28:54.552707 ME: Current Operation State : 1
1540 12:28:54.555821 ME: Current Operation Mode : 3
1541 12:28:54.559013 ME: Error Code : 0
1542 12:28:54.562324 ME: CPU Debug Disabled : YES
1543 12:28:54.565479 ME: TXT Support : NO
1544 12:28:54.572402 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1545 12:28:54.578739 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1546 12:28:54.582138 ACPI: Writing ACPI tables at 76b27000.
1547 12:28:54.585164 ACPI: * FACS
1548 12:28:54.585667 ACPI: * DSDT
1549 12:28:54.588989 Ramoops buffer: 0x100000@0x76a26000.
1550 12:28:54.595234 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1551 12:28:54.598411 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1552 12:28:54.602134 Google Chrome EC: version:
1553 12:28:54.605199 ro: magolor_1.1.9999-103b6f9
1554 12:28:54.608495 rw: magolor_1.1.9999-103b6f9
1555 12:28:54.608984 running image: 1
1556 12:28:54.614981 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1557 12:28:54.619368 ACPI: * FADT
1558 12:28:54.619803 SCI is IRQ9
1559 12:28:54.626414 ACPI: added table 1/32, length now 40
1560 12:28:54.626850 ACPI: * SSDT
1561 12:28:54.629696 Found 1 CPU(s) with 2 core(s) each.
1562 12:28:54.632794 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1563 12:28:54.639117 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1564 12:28:54.642950 Could not locate 'wifi_sar' in VPD.
1565 12:28:54.646122 Checking CBFS for default SAR values
1566 12:28:54.652373 wifi_sar_defaults.hex has bad len in CBFS
1567 12:28:54.656029 failed from getting SAR limits!
1568 12:28:54.659171 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1569 12:28:54.666135 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1570 12:28:54.669414 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1571 12:28:54.675821 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1572 12:28:54.678850 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1573 12:28:54.685791 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1574 12:28:54.689284 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1575 12:28:54.695578 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1576 12:28:54.702504 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1577 12:28:54.709091 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1578 12:28:54.712441 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1579 12:28:54.718951 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1580 12:28:54.725338 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1581 12:28:54.728967 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1582 12:28:54.732152 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1583 12:28:54.739643 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1584 12:28:54.742824 PS2K: Passing 101 keymaps to kernel
1585 12:28:54.749609 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1586 12:28:54.756434 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1587 12:28:54.759640 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1588 12:28:54.766123 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1589 12:28:54.772581 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1590 12:28:54.776475 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1591 12:28:54.782856 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1592 12:28:54.789135 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1593 12:28:54.792886 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1594 12:28:54.799724 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1595 12:28:54.802968 ACPI: added table 2/32, length now 44
1596 12:28:54.806025 ACPI: * MCFG
1597 12:28:54.809146 ACPI: added table 3/32, length now 48
1598 12:28:54.809693 ACPI: * TPM2
1599 12:28:54.812239 TPM2 log created at 0x76a16000
1600 12:28:54.816132 ACPI: added table 4/32, length now 52
1601 12:28:54.819455 ACPI: * MADT
1602 12:28:54.819882 SCI is IRQ9
1603 12:28:54.822718 ACPI: added table 5/32, length now 56
1604 12:28:54.825904 current = 76b2d580
1605 12:28:54.829022 ACPI: * DMAR
1606 12:28:54.832126 ACPI: added table 6/32, length now 60
1607 12:28:54.836010 ACPI: added table 7/32, length now 64
1608 12:28:54.836441 ACPI: * HPET
1609 12:28:54.839117 ACPI: added table 8/32, length now 68
1610 12:28:54.842199
1611 12:28:54.842626 ACPI: done.
1612 12:28:54.845716 ACPI tables: 26304 bytes.
1613 12:28:54.849222 smbios_write_tables: 76a15000
1614 12:28:54.852397 EC returned error result code 3
1615 12:28:54.855452 Couldn't obtain OEM name from CBI
1616 12:28:54.859119 Create SMBIOS type 16
1617 12:28:54.859598 Create SMBIOS type 17
1618 12:28:54.862304 GENERIC: 0.0 (WIFI Device)
1619 12:28:54.865780 SMBIOS tables: 913 bytes.
1620 12:28:54.869629 Writing table forward entry at 0x00000500
1621 12:28:54.875559 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1622 12:28:54.878757 Writing coreboot table at 0x76b4b000
1623 12:28:54.886153 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1624 12:28:54.889207 1. 0000000000001000-000000000009ffff: RAM
1625 12:28:54.895657 2. 00000000000a0000-00000000000fffff: RESERVED
1626 12:28:54.898992 3. 0000000000100000-0000000076a14fff: RAM
1627 12:28:54.905598 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1628 12:28:54.908269 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1629 12:28:54.915188 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1630 12:28:54.918366 7. 0000000077000000-000000007fbfffff: RESERVED
1631 12:28:54.925570 8. 00000000c0000000-00000000cfffffff: RESERVED
1632 12:28:54.928857 9. 00000000fb000000-00000000fb000fff: RESERVED
1633 12:28:54.934739 10. 00000000fe000000-00000000fe00ffff: RESERVED
1634 12:28:54.938526 11. 00000000fea80000-00000000fea87fff: RESERVED
1635 12:28:54.945175 12. 00000000fed80000-00000000fed87fff: RESERVED
1636 12:28:54.948503 13. 00000000fed90000-00000000fed92fff: RESERVED
1637 12:28:54.951366 14. 00000000feda0000-00000000feda1fff: RESERVED
1638 12:28:54.955284
1639 12:28:54.958496 15. 0000000100000000-00000001803fffff: RAM
1640 12:28:54.961673 Passing 4 GPIOs to payload:
1641 12:28:54.965406 NAME | PORT | POLARITY | VALUE
1642 12:28:54.971400 lid | undefined | high | high
1643 12:28:54.974616 power | undefined | high | low
1644 12:28:54.981788 oprom | undefined | high | low
1645 12:28:54.987833 EC in RW | 0x000000b9 | high | low
1646 12:28:54.994569 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 1496
1647 12:28:54.995103 coreboot table: 1504 bytes.
1648 12:28:54.998132 IMD ROOT 0. 0x76fff000 0x00001000
1649 12:28:55.001387
1650 12:28:55.004263 IMD SMALL 1. 0x76ffe000 0x00001000
1651 12:28:55.007425 FSP MEMORY 2. 0x76c4e000 0x003b0000
1652 12:28:55.010748 CONSOLE 3. 0x76c2e000 0x00020000
1653 12:28:55.014382 FMAP 4. 0x76c2d000 0x00000578
1654 12:28:55.017580 TIME STAMP 5. 0x76c2c000 0x00000910
1655 12:28:55.020637 VBOOT WORK 6. 0x76c18000 0x00014000
1656 12:28:55.023990 ROMSTG STCK 7. 0x76c17000 0x00001000
1657 12:28:55.028135 AFTER CAR 8. 0x76c0d000 0x0000a000
1658 12:28:55.034152 RAMSTAGE 9. 0x76ba7000 0x00066000
1659 12:28:55.037354 REFCODE 10. 0x76b67000 0x00040000
1660 12:28:55.040534 SMM BACKUP 11. 0x76b57000 0x00010000
1661 12:28:55.043904 4f444749 12. 0x76b55000 0x00002000
1662 12:28:55.047013 EXT VBT13. 0x76b53000 0x00001c43
1663 12:28:55.050821 COREBOOT 14. 0x76b4b000 0x00008000
1664 12:28:55.054319 ACPI 15. 0x76b27000 0x00024000
1665 12:28:55.057225 ACPI GNVS 16. 0x76b26000 0x00001000
1666 12:28:55.060620 RAMOOPS 17. 0x76a26000 0x00100000
1667 12:28:55.067077 TPM2 TCGLOG18. 0x76a16000 0x00010000
1668 12:28:55.070609 SMBIOS 19. 0x76a15000 0x00000800
1669 12:28:55.071154 IMD small region:
1670 12:28:55.073454 IMD ROOT 0. 0x76ffec00 0x00000400
1671 12:28:55.080072 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1672 12:28:55.083276 VPD 2. 0x76ffeb80 0x0000004c
1673 12:28:55.087164 POWER STATE 3. 0x76ffeb40 0x00000040
1674 12:28:55.090248 ROMSTAGE 4. 0x76ffeb20 0x00000004
1675 12:28:55.093290 MEM INFO 5. 0x76ffe940 0x000001e0
1676 12:28:55.099758 BS: BS_WRITE_TABLES run times (exec / console): 6 / 516 ms
1677 12:28:55.103410 MTRR: Physical address space:
1678 12:28:55.109622 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1679 12:28:55.116676 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1680 12:28:55.123149 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1681 12:28:55.129782 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1682 12:28:55.135993 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1683 12:28:55.139131 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1684 12:28:55.145754 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1685 12:28:55.152714 MTRR: Fixed MSR 0x250 0x0606060606060606
1686 12:28:55.155826 MTRR: Fixed MSR 0x258 0x0606060606060606
1687 12:28:55.159203 MTRR: Fixed MSR 0x259 0x0000000000000000
1688 12:28:55.162729 MTRR: Fixed MSR 0x268 0x0606060606060606
1689 12:28:55.165739 MTRR: Fixed MSR 0x269 0x0606060606060606
1690 12:28:55.172552 MTRR: Fixed MSR 0x26a 0x0606060606060606
1691 12:28:55.175670 MTRR: Fixed MSR 0x26b 0x0606060606060606
1692 12:28:55.178851 MTRR: Fixed MSR 0x26c 0x0606060606060606
1693 12:28:55.182122 MTRR: Fixed MSR 0x26d 0x0606060606060606
1694 12:28:55.189103 MTRR: Fixed MSR 0x26e 0x0606060606060606
1695 12:28:55.192361 MTRR: Fixed MSR 0x26f 0x0606060606060606
1696 12:28:55.195564 call enable_fixed_mtrr()
1697 12:28:55.198639 CPU physical address size: 39 bits
1698 12:28:55.201906 MTRR: default type WB/UC MTRR counts: 6/5.
1699 12:28:55.205912 MTRR: UC selected as default type.
1700 12:28:55.212319 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1701 12:28:55.218590 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1702 12:28:55.225567 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1703 12:28:55.231962 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1704 12:28:55.238734 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1705 12:28:55.239189
1706 12:28:55.239531 MTRR check
1707 12:28:55.241842 Fixed MTRRs : Enabled
1708 12:28:55.245160 Variable MTRRs: Enabled
1709 12:28:55.245591
1710 12:28:55.248414 MTRR: Fixed MSR 0x250 0x0606060606060606
1711 12:28:55.251489 MTRR: Fixed MSR 0x258 0x0606060606060606
1712 12:28:55.255269 MTRR: Fixed MSR 0x259 0x0000000000000000
1713 12:28:55.261761 MTRR: Fixed MSR 0x268 0x0606060606060606
1714 12:28:55.264791 MTRR: Fixed MSR 0x269 0x0606060606060606
1715 12:28:55.268479 MTRR: Fixed MSR 0x26a 0x0606060606060606
1716 12:28:55.271675 MTRR: Fixed MSR 0x26b 0x0606060606060606
1717 12:28:55.277881 MTRR: Fixed MSR 0x26c 0x0606060606060606
1718 12:28:55.281677 MTRR: Fixed MSR 0x26d 0x0606060606060606
1719 12:28:55.285251 MTRR: Fixed MSR 0x26e 0x0606060606060606
1720 12:28:55.288243 MTRR: Fixed MSR 0x26f 0x0606060606060606
1721 12:28:55.294651 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1722 12:28:55.297716 call enable_fixed_mtrr()
1723 12:28:55.301105 Checking cr50 for pending updates
1724 12:28:55.304459 CPU physical address size: 39 bits
1725 12:28:55.308158 Reading cr50 TPM mode
1726 12:28:55.317874 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1727 12:28:55.325445 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1728 12:28:55.328742 Checking segment from ROM address 0xfff9d5b8
1729 12:28:55.335110 Checking segment from ROM address 0xfff9d5d4
1730 12:28:55.338351 Loading segment from ROM address 0xfff9d5b8
1731 12:28:55.341507 code (compression=0)
1732 12:28:55.348455 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1733 12:28:55.358002 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1734 12:28:55.361816 it's not compressed!
1735 12:28:55.486725 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1736 12:28:55.493476 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1737 12:28:55.500602 Loading segment from ROM address 0xfff9d5d4
1738 12:28:55.504720 Entry Point 0x30000000
1739 12:28:55.505273 Loaded segments
1740 12:28:55.510544 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1741 12:28:55.527262 Finalizing chipset.
1742 12:28:55.530520 Finalizing SMM.
1743 12:28:55.530956 APMC done.
1744 12:28:55.536934 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1745 12:28:55.540293 mp_park_aps done after 0 msecs.
1746 12:28:55.543354 Jumping to boot code at 0x30000000(0x76b4b000)
1747 12:28:55.553550 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1748 12:28:55.553987
1749 12:28:55.554350
1750 12:28:55.554672
1751 12:28:55.556753 Starting depthcharge on Magolor...
1752 12:28:55.557202
1753 12:28:55.558250 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
1754 12:28:55.558769 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
1755 12:28:55.559192 Setting prompt string to ['dedede:']
1756 12:28:55.559585 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:46)
1757 12:28:55.566881 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1758 12:28:55.567352
1759 12:28:55.573033 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1760 12:28:55.573475
1761 12:28:55.576614 fw_config match found: AUDIO_AMP=UNPROVISIONED
1762 12:28:55.577033
1763 12:28:55.579749 Wipe memory regions:
1764 12:28:55.580183
1765 12:28:55.582942 [0x00000000001000, 0x000000000a0000)
1766 12:28:55.583387
1767 12:28:55.586280 [0x00000000100000, 0x00000030000000)
1768 12:28:55.586714
1769 12:28:55.719001 [0x00000031062170, 0x00000076a15000)
1770 12:28:55.719497
1771 12:28:55.891328 [0x00000100000000, 0x00000180400000)
1772 12:28:55.891830
1773 12:28:56.954274 R8152: Initializing
1774 12:28:56.954544
1775 12:28:56.957404 Version 6 (ocp_data = 5c30)
1776 12:28:56.957676
1777 12:28:56.961104 R8152: Done initializing
1778 12:28:56.961312
1779 12:28:56.964323 Adding net device
1780 12:28:56.964535
1781 12:28:56.967613 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1782 12:28:56.970936
1783 12:28:56.971141
1784 12:28:56.971299
1785 12:28:56.971725 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1787 12:28:57.072737 dedede: tftpboot 192.168.201.1 8193648/tftp-deploy-wq20atio/kernel/bzImage 8193648/tftp-deploy-wq20atio/kernel/cmdline 8193648/tftp-deploy-wq20atio/ramdisk/ramdisk.cpio.gz
1788 12:28:57.072960 Setting prompt string to 'Starting kernel'
1789 12:28:57.073084 Setting prompt string to ['Starting kernel']
1790 12:28:57.073194 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1791 12:28:57.073318 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1792 12:28:57.077027 tftpboot 192.168.201.1 8193648/tftp-deploy-wq20atio/kernel/bzImy-wq20atio/kernel/cmdline 8193648/tftp-deploy-wq20atio/ramdisk/ramdisk.cpio.gz
1793 12:28:57.077157
1794 12:28:57.077263 Waiting for link
1795 12:28:57.077372
1796 12:28:57.279041 done.
1797 12:28:57.279281
1798 12:28:57.279428 MAC: 00:24:32:30:7b:c4
1799 12:28:57.279561
1800 12:28:57.282559 Sending DHCP discover... done.
1801 12:28:57.282745
1802 12:28:57.285682 Waiting for reply... done.
1803 12:28:57.285875
1804 12:28:57.288927 Sending DHCP request... done.
1805 12:28:57.289128
1806 12:28:57.296086 Waiting for reply... done.
1807 12:28:57.296270
1808 12:28:57.296412 My ip is 192.168.201.12
1809 12:28:57.296542
1810 12:28:57.299255 The DHCP server ip is 192.168.201.1
1811 12:28:57.299455
1812 12:28:57.305491 TFTP server IP predefined by user: 192.168.201.1
1813 12:28:57.305682
1814 12:28:57.311864 Bootfile predefined by user: 8193648/tftp-deploy-wq20atio/kernel/bzImage
1815 12:28:57.312084
1816 12:28:57.315630 Sending tftp read request... done.
1817 12:28:57.315817
1818 12:28:57.318686 Waiting for the transfer...
1819 12:28:57.318872
1820 12:28:57.940019 00000000 ################################################################
1821 12:28:57.940218
1822 12:28:58.536821 00080000 ################################################################
1823 12:28:58.536966
1824 12:28:59.196904 00100000 ################################################################
1825 12:28:59.197417
1826 12:28:59.926007 00180000 ################################################################
1827 12:28:59.926577
1828 12:29:00.638940 00200000 ################################################################
1829 12:29:00.639512
1830 12:29:01.333398 00280000 ################################################################
1831 12:29:01.333945
1832 12:29:01.986251 00300000 ################################################################
1833 12:29:01.986402
1834 12:29:02.547829 00380000 ################################################################
1835 12:29:02.547980
1836 12:29:03.131444 00400000 ################################################################
1837 12:29:03.131681
1838 12:29:03.684589 00480000 ################################################################
1839 12:29:03.684729
1840 12:29:04.243397 00500000 ################################################################
1841 12:29:04.243563
1842 12:29:04.780967 00580000 ################################################################
1843 12:29:04.781102
1844 12:29:05.326040 00600000 ################################################################
1845 12:29:05.326187
1846 12:29:05.702373 00680000 ############################################## done.
1847 12:29:05.702516
1848 12:29:05.705604 The bootfile was 7188368 bytes long.
1849 12:29:05.705693
1850 12:29:05.709436 Sending tftp read request... done.
1851 12:29:05.709524
1852 12:29:05.712571 Waiting for the transfer...
1853 12:29:05.712657
1854 12:29:06.246576 00000000 ################################################################
1855 12:29:06.246712
1856 12:29:06.786895 00080000 ################################################################
1857 12:29:06.787074
1858 12:29:07.337895 00100000 ################################################################
1859 12:29:07.338033
1860 12:29:07.877802 00180000 ################################################################
1861 12:29:07.877935
1862 12:29:08.410198 00200000 ################################################################
1863 12:29:08.410337
1864 12:29:08.965965 00280000 ################################################################
1865 12:29:08.966117
1866 12:29:09.514217 00300000 ################################################################
1867 12:29:09.514358
1868 12:29:10.055300 00380000 ################################################################
1869 12:29:10.055436
1870 12:29:10.590839 00400000 ################################################################
1871 12:29:10.590977
1872 12:29:11.167467 00480000 ################################################################
1873 12:29:11.167601
1874 12:29:11.757780 00500000 ################################################################
1875 12:29:11.757933
1876 12:29:12.338813 00580000 ################################################################
1877 12:29:12.338961
1878 12:29:12.904505 00600000 ################################################################
1879 12:29:12.904683
1880 12:29:13.474965 00680000 ################################################################
1881 12:29:13.475161
1882 12:29:14.040692 00700000 ################################################################
1883 12:29:14.040841
1884 12:29:14.618826 00780000 ################################################################
1885 12:29:14.618998
1886 12:29:14.794558 00800000 #################### done.
1887 12:29:14.794708
1888 12:29:14.797778 Sending tftp read request... done.
1889 12:29:14.797864
1890 12:29:14.801607 Waiting for the transfer...
1891 12:29:14.801682
1892 12:29:14.801745 00000000 # done.
1893 12:29:14.801807
1894 12:29:14.811118 Command line loaded dynamically from TFTP file: 8193648/tftp-deploy-wq20atio/kernel/cmdline
1895 12:29:14.811211
1896 12:29:14.824235 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1897 12:29:14.824323
1898 12:29:14.827862 ec_init: CrosEC protocol v3 supported (256, 256)
1899 12:29:14.827947
1900 12:29:14.838087 Shutting down all USB controllers.
1901 12:29:14.838184
1902 12:29:14.838250 Removing current net device
1903 12:29:14.838312
1904 12:29:14.841212 Finalizing coreboot
1905 12:29:14.841295
1906 12:29:14.847975 Exiting depthcharge with code 4 at timestamp: 26091692
1907 12:29:14.848059
1908 12:29:14.848126
1909 12:29:14.848187 Starting kernel ...
1910 12:29:14.848246
1911 12:29:14.848304
1912 12:29:14.848359
1913 12:29:14.848724 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
1914 12:29:14.848841 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
1915 12:29:14.848930 Setting prompt string to ['Linux version [0-9]']
1916 12:29:14.848999 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1917 12:29:14.849068 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1919 12:33:41.849159 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
1921 12:33:41.849521 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
1923 12:33:41.849785 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1926 12:33:41.850234 end: 2 depthcharge-action (duration 00:05:00) [common]
1928 12:33:41.850625 Cleaning after the job
1929 12:33:41.850770 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193648/tftp-deploy-wq20atio/ramdisk
1930 12:33:41.851921 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193648/tftp-deploy-wq20atio/kernel
1931 12:33:41.852854 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193648/tftp-deploy-wq20atio/modules
1932 12:33:41.853133 start: 5.1 power-off (timeout 00:00:30) [common]
1933 12:33:41.853416 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
1934 12:33:41.873738 >> Command sent successfully.
1935 12:33:41.875885 Returned 0 in 0 seconds
1936 12:33:41.976738 end: 5.1 power-off (duration 00:00:00) [common]
1938 12:33:41.977215 start: 5.2 read-feedback (timeout 00:10:00) [common]
1939 12:33:41.977554 Listened to connection for namespace 'common' for up to 1s
1940 12:33:42.277168 Listened to connection for namespace 'common' for up to 1s
1941 12:33:42.281647 Listened to connection for namespace 'common' for up to 1s
1942 12:33:42.285553 Listened to connection for namespace 'common' for up to 1s
1943 12:33:42.289329 Listened to connection for namespace 'common' for up to 1s
1944 12:33:42.293713 Listened to connection for namespace 'common' for up to 1s
1945 12:33:42.297895 Listened to connection for namespace 'common' for up to 1s
1946 12:33:42.301656 Listened to connection for namespace 'common' for up to 1s
1947 12:33:42.305905 Listened to connection for namespace 'common' for up to 1s
1948 12:33:42.309585 Listened to connection for namespace 'common' for up to 1s
1949 12:33:42.336480 Listened to connection for namespace 'common' for up to 1s
1950 12:33:42.336836 Listened to connection for namespace 'common' for up to 1s
1951 12:33:42.340062 Listened to connection for namespace 'common' for up to 1s
1952 12:33:42.978147 Finalising connection for namespace 'common'
1953 12:33:42.978355 Disconnecting from shell: Finalise
1954 12:33:42.978455
1955 12:33:43.079168 end: 5.2 read-feedback (duration 00:00:01) [common]
1956 12:33:43.079321 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8193648
1957 12:33:43.084361 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8193648
1958 12:33:43.084499 JobError: Your job cannot terminate cleanly.