Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:28:39.584718 lava-dispatcher, installed at version: 2022.10
2 12:28:39.584906 start: 0 validate
3 12:28:39.585035 Start time: 2022-12-01 12:28:39.585026+00:00 (UTC)
4 12:28:39.585158 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:28:39.585285 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221125.0%2Fx86%2Frootfs.cpio.gz exists
6 12:28:39.588818 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:28:39.588949 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:28:40.090649 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:28:40.091302 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:28:40.102600 validate duration: 0.52
12 12:28:40.103825 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:28:40.104353 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:28:40.104828 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:28:40.105396 Not decompressing ramdisk as can be used compressed.
16 12:28:40.105953 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221125.0/x86/rootfs.cpio.gz
17 12:28:40.106334 saving as /var/lib/lava/dispatcher/tmp/8193657/tftp-deploy-_wlj5hov/ramdisk/rootfs.cpio.gz
18 12:28:40.106658 total size: 8415491 (8MB)
19 12:28:40.121183 progress 0% (0MB)
20 12:28:40.145889 progress 5% (0MB)
21 12:28:40.190674 progress 10% (0MB)
22 12:28:40.230742 progress 15% (1MB)
23 12:28:40.275949 progress 20% (1MB)
24 12:28:40.312112 progress 25% (2MB)
25 12:28:40.340475 progress 30% (2MB)
26 12:28:40.363157 progress 35% (2MB)
27 12:28:40.388201 progress 40% (3MB)
28 12:28:40.419539 progress 45% (3MB)
29 12:28:40.443938 progress 50% (4MB)
30 12:28:40.464263 progress 55% (4MB)
31 12:28:40.489209 progress 60% (4MB)
32 12:28:40.523352 progress 65% (5MB)
33 12:28:40.566455 progress 70% (5MB)
34 12:28:40.607724 progress 75% (6MB)
35 12:28:40.653418 progress 80% (6MB)
36 12:28:40.698946 progress 85% (6MB)
37 12:28:40.732961 progress 90% (7MB)
38 12:28:40.763170 progress 95% (7MB)
39 12:28:40.787324 progress 100% (8MB)
40 12:28:40.787651 8MB downloaded in 0.68s (11.79MB/s)
41 12:28:40.787816 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:28:40.788109 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:28:40.788200 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:28:40.788289 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:28:40.788392 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:28:40.788463 saving as /var/lib/lava/dispatcher/tmp/8193657/tftp-deploy-_wlj5hov/kernel/bzImage
48 12:28:40.788526 total size: 7188368 (6MB)
49 12:28:40.788587 No compression specified
50 12:28:40.800624 progress 0% (0MB)
51 12:28:40.830553 progress 5% (0MB)
52 12:28:40.855319 progress 10% (0MB)
53 12:28:40.885145 progress 15% (1MB)
54 12:28:40.911005 progress 20% (1MB)
55 12:28:40.942487 progress 25% (1MB)
56 12:28:40.966403 progress 30% (2MB)
57 12:28:40.992787 progress 35% (2MB)
58 12:28:41.018967 progress 40% (2MB)
59 12:28:41.048598 progress 45% (3MB)
60 12:28:41.071554 progress 50% (3MB)
61 12:28:41.098215 progress 55% (3MB)
62 12:28:41.121026 progress 60% (4MB)
63 12:28:41.142555 progress 65% (4MB)
64 12:28:41.169781 progress 70% (4MB)
65 12:28:41.192859 progress 75% (5MB)
66 12:28:41.215083 progress 80% (5MB)
67 12:28:41.241754 progress 85% (5MB)
68 12:28:41.268254 progress 90% (6MB)
69 12:28:41.293926 progress 95% (6MB)
70 12:28:41.314344 progress 100% (6MB)
71 12:28:41.314606 6MB downloaded in 0.53s (13.03MB/s)
72 12:28:41.314769 end: 1.2.1 http-download (duration 00:00:01) [common]
74 12:28:41.315013 end: 1.2 download-retry (duration 00:00:01) [common]
75 12:28:41.315102 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:28:41.315218 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:28:41.315342 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:28:41.315438 saving as /var/lib/lava/dispatcher/tmp/8193657/tftp-deploy-_wlj5hov/modules/modules.tar
79 12:28:41.315503 total size: 54724 (0MB)
80 12:28:41.315574 Using unxz to decompress xz
81 12:28:41.331994 progress 59% (0MB)
82 12:28:41.334914 progress 100% (0MB)
83 12:28:41.336683 0MB downloaded in 0.02s (2.47MB/s)
84 12:28:41.336934 end: 1.3.1 http-download (duration 00:00:00) [common]
86 12:28:41.337204 end: 1.3 download-retry (duration 00:00:00) [common]
87 12:28:41.337326 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 12:28:41.337480 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 12:28:41.337582 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 12:28:41.337682 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 12:28:41.337869 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o
92 12:28:41.337978 makedir: /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin
93 12:28:41.338119 makedir: /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/tests
94 12:28:41.338206 makedir: /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/results
95 12:28:41.338312 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-add-keys
96 12:28:41.338485 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-add-sources
97 12:28:41.338610 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-background-process-start
98 12:28:41.338743 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-background-process-stop
99 12:28:41.338860 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-common-functions
100 12:28:41.338973 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-echo-ipv4
101 12:28:41.339129 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-install-packages
102 12:28:41.339280 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-installed-packages
103 12:28:41.339404 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-os-build
104 12:28:41.339532 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-probe-channel
105 12:28:41.339649 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-probe-ip
106 12:28:41.339807 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-target-ip
107 12:28:41.339937 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-target-mac
108 12:28:41.340055 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-target-storage
109 12:28:41.340177 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-test-case
110 12:28:41.340331 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-test-event
111 12:28:41.340458 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-test-feedback
112 12:28:41.340623 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-test-raise
113 12:28:41.340757 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-test-reference
114 12:28:41.340885 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-test-runner
115 12:28:41.340999 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-test-set
116 12:28:41.341112 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-test-shell
117 12:28:41.341226 Updating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-install-packages (oe)
118 12:28:41.341387 Updating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/bin/lava-installed-packages (oe)
119 12:28:41.341499 Creating /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/environment
120 12:28:41.341647 LAVA metadata
121 12:28:41.341736 - LAVA_JOB_ID=8193657
122 12:28:41.341806 - LAVA_DISPATCHER_IP=192.168.201.1
123 12:28:41.341932 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 12:28:41.342001 skipped lava-vland-overlay
125 12:28:41.342091 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 12:28:41.342183 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 12:28:41.342251 skipped lava-multinode-overlay
128 12:28:41.342342 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 12:28:41.342427 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 12:28:41.342539 Loading test definitions
131 12:28:41.342643 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 12:28:41.342721 Using /lava-8193657 at stage 0
133 12:28:41.342995 uuid=8193657_1.4.2.3.1 testdef=None
134 12:28:41.343088 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 12:28:41.343226 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 12:28:41.343748 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 12:28:41.343981 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 12:28:41.344616 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 12:28:41.344862 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 12:28:41.345409 runner path: /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/0/tests/0_dmesg test_uuid 8193657_1.4.2.3.1
143 12:28:41.345563 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 12:28:41.345799 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 12:28:41.345875 Using /lava-8193657 at stage 1
147 12:28:41.346162 uuid=8193657_1.4.2.3.5 testdef=None
148 12:28:41.346358 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 12:28:41.346451 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 12:28:41.346928 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 12:28:41.347154 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 12:28:41.347817 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 12:28:41.348071 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 12:28:41.348671 runner path: /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/1/tests/1_bootrr test_uuid 8193657_1.4.2.3.5
157 12:28:41.348874 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 12:28:41.349101 Creating lava-test-runner.conf files
160 12:28:41.349167 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/0 for stage 0
161 12:28:41.349249 - 0_dmesg
162 12:28:41.349357 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193657/lava-overlay-c52tei4o/lava-8193657/1 for stage 1
163 12:28:41.349471 - 1_bootrr
164 12:28:41.349563 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 12:28:41.349655 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 12:28:41.355947 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 12:28:41.356072 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 12:28:41.356165 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 12:28:41.356260 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 12:28:41.356349 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 12:28:41.542669 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 12:28:41.543016 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 12:28:41.543140 extracting modules file /var/lib/lava/dispatcher/tmp/8193657/tftp-deploy-_wlj5hov/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8193657/extract-overlay-ramdisk-o8uvvq43/ramdisk
174 12:28:41.547669 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 12:28:41.547783 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 12:28:41.547872 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8193657/compress-overlay-om0_fh65/overlay-1.4.2.4.tar.gz to ramdisk
177 12:28:41.547947 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8193657/compress-overlay-om0_fh65/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8193657/extract-overlay-ramdisk-o8uvvq43/ramdisk
178 12:28:41.552054 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 12:28:41.552174 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 12:28:41.552268 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 12:28:41.552424 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 12:28:41.552537 Building ramdisk /var/lib/lava/dispatcher/tmp/8193657/extract-overlay-ramdisk-o8uvvq43/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8193657/extract-overlay-ramdisk-o8uvvq43/ramdisk
183 12:28:41.618017 >> 48044 blocks
184 12:28:42.391847 rename /var/lib/lava/dispatcher/tmp/8193657/extract-overlay-ramdisk-o8uvvq43/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8193657/tftp-deploy-_wlj5hov/ramdisk/ramdisk.cpio.gz
185 12:28:42.392298 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 12:28:42.392444 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 12:28:42.392562 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 12:28:42.392666 No mkimage arch provided, not using FIT.
189 12:28:42.392759 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 12:28:42.392860 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 12:28:42.392957 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 12:28:42.393051 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 12:28:42.393134 No LXC device requested
194 12:28:42.393227 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 12:28:42.393324 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 12:28:42.393408 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 12:28:42.393508 Checking files for TFTP limit of 4294967296 bytes.
198 12:28:42.394028 end: 1 tftp-deploy (duration 00:00:02) [common]
199 12:28:42.394169 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 12:28:42.394319 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 12:28:42.394456 substitutions:
202 12:28:42.394528 - {DTB}: None
203 12:28:42.394604 - {INITRD}: 8193657/tftp-deploy-_wlj5hov/ramdisk/ramdisk.cpio.gz
204 12:28:42.394669 - {KERNEL}: 8193657/tftp-deploy-_wlj5hov/kernel/bzImage
205 12:28:42.394729 - {LAVA_MAC}: None
206 12:28:42.394798 - {PRESEED_CONFIG}: None
207 12:28:42.394857 - {PRESEED_LOCAL}: None
208 12:28:42.394915 - {RAMDISK}: 8193657/tftp-deploy-_wlj5hov/ramdisk/ramdisk.cpio.gz
209 12:28:42.394979 - {ROOT_PART}: None
210 12:28:42.395038 - {ROOT}: None
211 12:28:42.395095 - {SERVER_IP}: 192.168.201.1
212 12:28:42.395152 - {TEE}: None
213 12:28:42.395221 Parsed boot commands:
214 12:28:42.395277 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 12:28:42.395442 Parsed boot commands: tftpboot 192.168.201.1 8193657/tftp-deploy-_wlj5hov/kernel/bzImage 8193657/tftp-deploy-_wlj5hov/kernel/cmdline 8193657/tftp-deploy-_wlj5hov/ramdisk/ramdisk.cpio.gz
216 12:28:42.395549 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 12:28:42.395641 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 12:28:42.395751 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 12:28:42.395845 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 12:28:42.395916 Not connected, no need to disconnect.
221 12:28:42.396025 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 12:28:42.396135 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 12:28:42.396207 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
224 12:28:42.399199 Setting prompt string to ['lava-test: # ']
225 12:28:42.399572 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 12:28:42.399699 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 12:28:42.399803 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 12:28:42.399936 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 12:28:42.400155 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
230 12:28:42.421587 >> Command sent successfully.
231 12:28:42.423854 Returned 0 in 0 seconds
232 12:28:42.524664 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 12:28:42.525269 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 12:28:42.525373 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 12:28:42.525461 Setting prompt string to 'Starting depthcharge on Voema...'
237 12:28:42.525528 Changing prompt to 'Starting depthcharge on Voema...'
238 12:28:42.525596 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 12:28:42.525872 [Enter `^Ec?' for help]
240 12:28:50.261860
241 12:28:50.262026
242 12:28:50.272019 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 12:28:50.275161 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 12:28:50.281531 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 12:28:50.285164 CPU: AES supported, TXT NOT supported, VT supported
246 12:28:50.292104 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 12:28:50.298430 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 12:28:50.301620 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 12:28:50.304710 VBOOT: Loading verstage.
250 12:28:50.308401 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 12:28:50.311487
252 12:28:50.314710 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 12:28:50.318461 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 12:28:50.329150 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 12:28:50.335559 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 12:28:50.335643
257 12:28:50.335708
258 12:28:50.348417 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 12:28:50.362511 Probing TPM: . done!
260 12:28:50.365740 TPM ready after 0 ms
261 12:28:50.368944 Connected to device vid:did:rid of 1ae0:0028:00
262 12:28:50.380780 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
263 12:28:50.386909 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 12:28:50.390786 Initialized TPM device CR50 revision 0
265 12:28:50.442186 tlcl_send_startup: Startup return code is 0
266 12:28:50.442324 TPM: setup succeeded
267 12:28:50.457371 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 12:28:50.471256 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 12:28:50.484127 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 12:28:50.494087 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 12:28:50.498036 Chrome EC: UHEPI supported
272 12:28:50.501006 Phase 1
273 12:28:50.504114 FMAP: area GBB found @ 1805000 (458752 bytes)
274 12:28:50.514537 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 12:28:50.520781 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 12:28:50.527696 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
277 12:28:50.533932 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
278 12:28:50.537814 Recovery requested (1009000e)
279 12:28:50.540924 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 12:28:50.552796 tlcl_extend: response is 0
281 12:28:50.559125 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 12:28:50.569321 tlcl_extend: response is 0
283 12:28:50.575545 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 12:28:50.582551 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 12:28:50.588864 BS: verstage times (exec / console): total (unknown) / 142 ms
286 12:28:50.588988
287 12:28:50.589055
288 12:28:50.602084 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 12:28:50.608933 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 12:28:50.612104 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 12:28:50.615269 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 12:28:50.622269 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 12:28:50.625346 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 12:28:50.628473 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
295 12:28:50.631749 TCO_STS: 0000 0000
296 12:28:50.635695 GEN_PMCON: d0015038 00002200
297 12:28:50.638804 GBLRST_CAUSE: 00000000 00000000
298 12:28:50.638995 HPR_CAUSE0: 00000000
299 12:28:50.641943
300 12:28:50.642141 prev_sleep_state 5
301 12:28:50.645201 Boot Count incremented to 12741
302 12:28:50.652178 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 12:28:50.658558 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
304 12:28:50.668531 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
305 12:28:50.675519 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
306 12:28:50.678690 Chrome EC: UHEPI supported
307 12:28:50.685074 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
308 12:28:50.696494 Probing TPM: done!
309 12:28:50.704082 Connected to device vid:did:rid of 1ae0:0028:00
310 12:28:50.711720 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
311 12:28:50.721272 Initialized TPM device CR50 revision 0
312 12:28:50.731329 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 12:28:50.737668 MRC: Hash idx 0x100b comparison successful.
314 12:28:50.741364 MRC cache found, size faa8
315 12:28:50.741814 bootmode is set to: 2
316 12:28:50.744529 SPD index = 0
317 12:28:50.751007 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
318 12:28:50.754647 SPD: module type is LPDDR4X
319 12:28:50.761074 SPD: module part number is MT53E512M64D4NW-046
320 12:28:50.764322 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
321 12:28:50.771108 SPD: device width 16 bits, bus width 16 bits
322 12:28:50.774308 SPD: module size is 1024 MB (per channel)
323 12:28:51.207474 CBMEM:
324 12:28:51.210603 IMD: root @ 0x76fff000 254 entries.
325 12:28:51.214424 IMD: root @ 0x76ffec00 62 entries.
326 12:28:51.217604 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
327 12:28:51.223980 FMAP: area RW_VPD found @ f35000 (8192 bytes)
328 12:28:51.227230 External stage cache:
329 12:28:51.230322 IMD: root @ 0x7b3ff000 254 entries.
330 12:28:51.233956 IMD: root @ 0x7b3fec00 62 entries.
331 12:28:51.249162 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
332 12:28:51.256199 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 12:28:51.262527 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
334 12:28:51.276464 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 12:28:51.280226 cse_lite: Skip switching to RW in the recovery path
336 12:28:51.284055 8 DIMMs found
337 12:28:51.284143 SMM Memory Map
338 12:28:51.287318 SMRAM : 0x7b000000 0x800000
339 12:28:51.290469 Subregion 0: 0x7b000000 0x200000
340 12:28:51.293810 Subregion 1: 0x7b200000 0x200000
341 12:28:51.297429 Subregion 2: 0x7b400000 0x400000
342 12:28:51.300687 top_of_ram = 0x77000000
343 12:28:51.307116 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 12:28:51.310317 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 12:28:51.316926 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
346 12:28:51.320239 MTRR Range: Start=ff000000 End=0 (Size 1000000)
347 12:28:51.330478 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
348 12:28:51.336726 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
349 12:28:51.346943 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
350 12:28:51.350148 Processing 211 relocs. Offset value of 0x74c0b000
351 12:28:51.359693 BS: romstage times (exec / console): total (unknown) / 277 ms
352 12:28:51.365417
353 12:28:51.365502
354 12:28:51.375491 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
355 12:28:51.378653 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
356 12:28:51.388562 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
357 12:28:51.394963 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
358 12:28:51.401955 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
359 12:28:51.408378 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
360 12:28:51.454986 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
361 12:28:51.461890 Processing 5008 relocs. Offset value of 0x75d98000
362 12:28:51.465112 BS: postcar times (exec / console): total (unknown) / 59 ms
363 12:28:51.468340
364 12:28:51.468425
365 12:28:51.468492
366 12:28:51.478850 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
367 12:28:51.478999 Normal boot
368 12:28:51.481935 FW_CONFIG value is 0x804c02
369 12:28:51.485046 PCI: 00:07.0 disabled by fw_config
370 12:28:51.488760 PCI: 00:07.1 disabled by fw_config
371 12:28:51.491848 PCI: 00:0d.2 disabled by fw_config
372 12:28:51.495030 PCI: 00:1c.7 disabled by fw_config
373 12:28:51.501993 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 12:28:51.508596 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 12:28:51.511801 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 12:28:51.515054 GENERIC: 0.0 disabled by fw_config
377 12:28:51.521460 GENERIC: 1.0 disabled by fw_config
378 12:28:51.524629 fw_config match found: DB_USB=USB3_ACTIVE
379 12:28:51.528494 fw_config match found: DB_USB=USB3_ACTIVE
380 12:28:51.531694 fw_config match found: DB_USB=USB3_ACTIVE
381 12:28:51.537895 fw_config match found: DB_USB=USB3_ACTIVE
382 12:28:51.541213 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 12:28:51.548212 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 12:28:51.557590 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 12:28:51.564293 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
386 12:28:51.568023 microcode: sig=0x806c1 pf=0x80 revision=0x86
387 12:28:51.574387 microcode: Update skipped, already up-to-date
388 12:28:51.581178 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
389 12:28:51.608887 Detected 4 core, 8 thread CPU.
390 12:28:51.612131 Setting up SMI for CPU
391 12:28:51.615314 IED base = 0x7b400000
392 12:28:51.615394 IED size = 0x00400000
393 12:28:51.618496 Will perform SMM setup.
394 12:28:51.625806 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
395 12:28:51.632298 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
396 12:28:51.638660 Processing 16 relocs. Offset value of 0x00030000
397 12:28:51.641863 Attempting to start 7 APs
398 12:28:51.645182 Waiting for 10ms after sending INIT.
399 12:28:51.661161 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
400 12:28:51.664428 AP: slot 7 apic_id 7.
401 12:28:51.667504 AP: slot 3 apic_id 6.
402 12:28:51.667589 AP: slot 5 apic_id 2.
403 12:28:51.670703 AP: slot 4 apic_id 3.
404 12:28:51.674342 AP: slot 2 apic_id 5.
405 12:28:51.674427 AP: slot 6 apic_id 4.
406 12:28:51.674493 done.
407 12:28:51.681122 Waiting for 2nd SIPI to complete...done.
408 12:28:51.687252 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 12:28:51.694223 Processing 13 relocs. Offset value of 0x00038000
410 12:28:51.694309 Unable to locate Global NVS
411 12:28:51.697465
412 12:28:51.703700 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
413 12:28:51.707472 Installing permanent SMM handler to 0x7b000000
414 12:28:51.717033 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
415 12:28:51.720719 Processing 794 relocs. Offset value of 0x7b010000
416 12:28:51.730293 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
417 12:28:51.734188 Processing 13 relocs. Offset value of 0x7b008000
418 12:28:51.740429 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
419 12:28:51.746738 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
420 12:28:51.750524 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
421 12:28:51.756891 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
422 12:28:51.763895 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
423 12:28:51.770194 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
424 12:28:51.777087 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
425 12:28:51.777195 Unable to locate Global NVS
426 12:28:51.786994 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
427 12:28:51.790024 Clearing SMI status registers
428 12:28:51.790151 SMI_STS: PM1
429 12:28:51.793327 PM1_STS: PWRBTN
430 12:28:51.800214 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
431 12:28:51.803429 In relocation handler: CPU 0
432 12:28:51.806544 New SMBASE=0x7b000000 IEDBASE=0x7b400000
433 12:28:51.813462 Writing SMRR. base = 0x7b000006, mask=0xff800c00
434 12:28:51.813558 Relocation complete.
435 12:28:51.816554
436 12:28:51.822997 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
437 12:28:51.826017 In relocation handler: CPU 1
438 12:28:51.829919 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
439 12:28:51.830032 Relocation complete.
440 12:28:51.839626 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
441 12:28:51.839750 In relocation handler: CPU 6
442 12:28:51.843296
443 12:28:51.846477 New SMBASE=0x7affe800 IEDBASE=0x7b400000
444 12:28:51.849617 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 12:28:51.852815 Relocation complete.
446 12:28:51.859912 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
447 12:28:51.862999 In relocation handler: CPU 2
448 12:28:51.866197 New SMBASE=0x7afff800 IEDBASE=0x7b400000
449 12:28:51.869923 Relocation complete.
450 12:28:51.876249 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 12:28:51.879521 In relocation handler: CPU 5
452 12:28:51.883232 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 12:28:51.889526 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 12:28:51.889607 Relocation complete.
455 12:28:51.895902 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
456 12:28:51.899786
457 12:28:51.899864 In relocation handler: CPU 4
458 12:28:51.906300 New SMBASE=0x7afff000 IEDBASE=0x7b400000
459 12:28:51.906383 Relocation complete.
460 12:28:51.912789 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
461 12:28:51.916034 In relocation handler: CPU 7
462 12:28:51.922485 New SMBASE=0x7affe400 IEDBASE=0x7b400000
463 12:28:51.922565 Relocation complete.
464 12:28:51.929554 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
465 12:28:51.932488 In relocation handler: CPU 3
466 12:28:51.939352 New SMBASE=0x7afff400 IEDBASE=0x7b400000
467 12:28:51.942594 Writing SMRR. base = 0x7b000006, mask=0xff800c00
468 12:28:51.946138 Relocation complete.
469 12:28:51.946214 Initializing CPU #0
470 12:28:51.949895 CPU: vendor Intel device 806c1
471 12:28:51.953141 CPU: family 06, model 8c, stepping 01
472 12:28:51.956347 Clearing out pending MCEs
473 12:28:51.960152 Setting up local APIC...
474 12:28:51.960232 apic_id: 0x00 done.
475 12:28:51.963289 Turbo is available but hidden
476 12:28:51.966411 Turbo is available and visible
477 12:28:51.973297 microcode: Update skipped, already up-to-date
478 12:28:51.973376 CPU #0 initialized
479 12:28:51.976480 Initializing CPU #6
480 12:28:51.979793 Initializing CPU #2
481 12:28:51.982841 CPU: vendor Intel device 806c1
482 12:28:51.986506 CPU: family 06, model 8c, stepping 01
483 12:28:51.986582 Initializing CPU #3
484 12:28:51.989795 Initializing CPU #7
485 12:28:51.992879 CPU: vendor Intel device 806c1
486 12:28:51.996462 CPU: family 06, model 8c, stepping 01
487 12:28:51.999823 CPU: vendor Intel device 806c1
488 12:28:52.003081 CPU: family 06, model 8c, stepping 01
489 12:28:52.006165 Clearing out pending MCEs
490 12:28:52.009827 Clearing out pending MCEs
491 12:28:52.009905 Setting up local APIC...
492 12:28:52.012929 Initializing CPU #4
493 12:28:52.016129 Initializing CPU #5
494 12:28:52.019422 CPU: vendor Intel device 806c1
495 12:28:52.023185 CPU: family 06, model 8c, stepping 01
496 12:28:52.026277 CPU: vendor Intel device 806c1
497 12:28:52.029425 CPU: family 06, model 8c, stepping 01
498 12:28:52.033383 Clearing out pending MCEs
499 12:28:52.033458 Clearing out pending MCEs
500 12:28:52.036424 apic_id: 0x06 done.
501 12:28:52.039759 Setting up local APIC...
502 12:28:52.039836 Initializing CPU #1
503 12:28:52.042881
504 12:28:52.046037 microcode: Update skipped, already up-to-date
505 12:28:52.049768 apic_id: 0x07 done.
506 12:28:52.049844 CPU #3 initialized
507 12:28:52.052903 microcode: Update skipped, already up-to-date
508 12:28:52.056152
509 12:28:52.056228 CPU: vendor Intel device 806c1
510 12:28:52.062905 CPU: family 06, model 8c, stepping 01
511 12:28:52.062984 CPU #7 initialized
512 12:28:52.066039 CPU: vendor Intel device 806c1
513 12:28:52.069848 CPU: family 06, model 8c, stepping 01
514 12:28:52.072989 Clearing out pending MCEs
515 12:28:52.076080 Clearing out pending MCEs
516 12:28:52.079411 Setting up local APIC...
517 12:28:52.079479 Setting up local APIC...
518 12:28:52.083003 apic_id: 0x03 done.
519 12:28:52.086182 Setting up local APIC...
520 12:28:52.086253 apic_id: 0x05 done.
521 12:28:52.089208 Setting up local APIC...
522 12:28:52.092957 Clearing out pending MCEs
523 12:28:52.096088 apic_id: 0x02 done.
524 12:28:52.096159 apic_id: 0x04 done.
525 12:28:52.102930 microcode: Update skipped, already up-to-date
526 12:28:52.103014 Setting up local APIC...
527 12:28:52.106211 CPU #2 initialized
528 12:28:52.109123 microcode: Update skipped, already up-to-date
529 12:28:52.116048 microcode: Update skipped, already up-to-date
530 12:28:52.119134 microcode: Update skipped, already up-to-date
531 12:28:52.122442 CPU #5 initialized
532 12:28:52.122516 CPU #4 initialized
533 12:28:52.125571 CPU #6 initialized
534 12:28:52.129425 apic_id: 0x01 done.
535 12:28:52.132640 microcode: Update skipped, already up-to-date
536 12:28:52.135793 CPU #1 initialized
537 12:28:52.138839 bsp_do_flight_plan done after 455 msecs.
538 12:28:52.142628 CPU: frequency set to 4000 MHz
539 12:28:52.142700 Enabling SMIs.
540 12:28:52.148984 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
541 12:28:52.166091 SATAXPCIE1 indicates PCIe NVMe is present
542 12:28:52.169158 Probing TPM: done!
543 12:28:52.172922 Connected to device vid:did:rid of 1ae0:0028:00
544 12:28:52.183000 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
545 12:28:52.186697 Initialized TPM device CR50 revision 0
546 12:28:52.189845 Enabling S0i3.4
547 12:28:52.196438 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
548 12:28:52.199573 Found a VBT of 8704 bytes after decompression
549 12:28:52.206570 cse_lite: CSE RO boot. HybridStorageMode disabled
550 12:28:52.212856 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
551 12:28:52.288035 FSPS returned 0
552 12:28:52.291783 Executing Phase 1 of FspMultiPhaseSiInit
553 12:28:52.301294 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
554 12:28:52.305050 port C0 DISC req: usage 1 usb3 1 usb2 5
555 12:28:52.308095 Raw Buffer output 0 00000511
556 12:28:52.311233 Raw Buffer output 1 00000000
557 12:28:52.315314 pmc_send_ipc_cmd succeeded
558 12:28:52.318308 port C1 DISC req: usage 1 usb3 2 usb2 3
559 12:28:52.321506
560 12:28:52.321591 Raw Buffer output 0 00000321
561 12:28:52.324780 Raw Buffer output 1 00000000
562 12:28:52.329177 pmc_send_ipc_cmd succeeded
563 12:28:52.334311 Detected 4 core, 8 thread CPU.
564 12:28:52.337557 Detected 4 core, 8 thread CPU.
565 12:28:52.571790 Display FSP Version Info HOB
566 12:28:52.574946 Reference Code - CPU = a.0.4c.31
567 12:28:52.578053 uCode Version = 0.0.0.86
568 12:28:52.581318 TXT ACM version = ff.ff.ff.ffff
569 12:28:52.584981 Reference Code - ME = a.0.4c.31
570 12:28:52.588132 MEBx version = 0.0.0.0
571 12:28:52.591439 ME Firmware Version = Consumer SKU
572 12:28:52.594504 Reference Code - PCH = a.0.4c.31
573 12:28:52.598133 PCH-CRID Status = Disabled
574 12:28:52.601202 PCH-CRID Original Value = ff.ff.ff.ffff
575 12:28:52.604394 PCH-CRID New Value = ff.ff.ff.ffff
576 12:28:52.608182 OPROM - RST - RAID = ff.ff.ff.ffff
577 12:28:52.611336 PCH Hsio Version = 4.0.0.0
578 12:28:52.614514 Reference Code - SA - System Agent = a.0.4c.31
579 12:28:52.617671 Reference Code - MRC = 2.0.0.1
580 12:28:52.621276 SA - PCIe Version = a.0.4c.31
581 12:28:52.624453 SA-CRID Status = Disabled
582 12:28:52.627628 SA-CRID Original Value = 0.0.0.1
583 12:28:52.630919 SA-CRID New Value = 0.0.0.1
584 12:28:52.634160 OPROM - VBIOS = ff.ff.ff.ffff
585 12:28:52.637837 IO Manageability Engine FW Version = 11.1.4.0
586 12:28:52.640855 PHY Build Version = 0.0.0.e0
587 12:28:52.643987 Thunderbolt(TM) FW Version = 0.0.0.0
588 12:28:52.650890 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
589 12:28:52.654084 ITSS IRQ Polarities Before:
590 12:28:52.654166 IPC0: 0xffffffff
591 12:28:52.657304 IPC1: 0xffffffff
592 12:28:52.657386 IPC2: 0xffffffff
593 12:28:52.661055 IPC3: 0xffffffff
594 12:28:52.664193 ITSS IRQ Polarities After:
595 12:28:52.664276 IPC0: 0xffffffff
596 12:28:52.667377 IPC1: 0xffffffff
597 12:28:52.667459 IPC2: 0xffffffff
598 12:28:52.670633 IPC3: 0xffffffff
599 12:28:52.673903 Found PCIe Root Port #9 at PCI: 00:1d.0.
600 12:28:52.687167 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
601 12:28:52.697181 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
602 12:28:52.710090 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
603 12:28:52.716938 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
604 12:28:52.720168 Enumerating buses...
605 12:28:52.723885 Show all devs... Before device enumeration.
606 12:28:52.726930 Root Device: enabled 1
607 12:28:52.727013 DOMAIN: 0000: enabled 1
608 12:28:52.730276 CPU_CLUSTER: 0: enabled 1
609 12:28:52.733601 PCI: 00:00.0: enabled 1
610 12:28:52.736722 PCI: 00:02.0: enabled 1
611 12:28:52.736812 PCI: 00:04.0: enabled 1
612 12:28:52.740454 PCI: 00:05.0: enabled 1
613 12:28:52.743570 PCI: 00:06.0: enabled 0
614 12:28:52.746699 PCI: 00:07.0: enabled 0
615 12:28:52.746782 PCI: 00:07.1: enabled 0
616 12:28:52.750331 PCI: 00:07.2: enabled 0
617 12:28:52.753457 PCI: 00:07.3: enabled 0
618 12:28:52.756845 PCI: 00:08.0: enabled 1
619 12:28:52.756936 PCI: 00:09.0: enabled 0
620 12:28:52.760117 PCI: 00:0a.0: enabled 0
621 12:28:52.763804 PCI: 00:0d.0: enabled 1
622 12:28:52.763886 PCI: 00:0d.1: enabled 0
623 12:28:52.766967
624 12:28:52.767067 PCI: 00:0d.2: enabled 0
625 12:28:52.770216 PCI: 00:0d.3: enabled 0
626 12:28:52.773346 PCI: 00:0e.0: enabled 0
627 12:28:52.773436 PCI: 00:10.2: enabled 1
628 12:28:52.777108 PCI: 00:10.6: enabled 0
629 12:28:52.780362 PCI: 00:10.7: enabled 0
630 12:28:52.783486 PCI: 00:12.0: enabled 0
631 12:28:52.783587 PCI: 00:12.6: enabled 0
632 12:28:52.786733 PCI: 00:13.0: enabled 0
633 12:28:52.789855 PCI: 00:14.0: enabled 1
634 12:28:52.793672 PCI: 00:14.1: enabled 0
635 12:28:52.793754 PCI: 00:14.2: enabled 1
636 12:28:52.796804 PCI: 00:14.3: enabled 1
637 12:28:52.799827 PCI: 00:15.0: enabled 1
638 12:28:52.803436 PCI: 00:15.1: enabled 1
639 12:28:52.803521 PCI: 00:15.2: enabled 1
640 12:28:52.806679 PCI: 00:15.3: enabled 1
641 12:28:52.809812 PCI: 00:16.0: enabled 1
642 12:28:52.809895 PCI: 00:16.1: enabled 0
643 12:28:52.813317 PCI: 00:16.2: enabled 0
644 12:28:52.816360 PCI: 00:16.3: enabled 0
645 12:28:52.820223 PCI: 00:16.4: enabled 0
646 12:28:52.820300 PCI: 00:16.5: enabled 0
647 12:28:52.823269 PCI: 00:17.0: enabled 1
648 12:28:52.826458 PCI: 00:19.0: enabled 0
649 12:28:52.830282 PCI: 00:19.1: enabled 1
650 12:28:52.830356 PCI: 00:19.2: enabled 0
651 12:28:52.833535 PCI: 00:1c.0: enabled 1
652 12:28:52.836818 PCI: 00:1c.1: enabled 0
653 12:28:52.839883 PCI: 00:1c.2: enabled 0
654 12:28:52.839961 PCI: 00:1c.3: enabled 0
655 12:28:52.842886 PCI: 00:1c.4: enabled 0
656 12:28:52.846568 PCI: 00:1c.5: enabled 0
657 12:28:52.846640 PCI: 00:1c.6: enabled 1
658 12:28:52.849846
659 12:28:52.849916 PCI: 00:1c.7: enabled 0
660 12:28:52.853474 PCI: 00:1d.0: enabled 1
661 12:28:52.856688 PCI: 00:1d.1: enabled 0
662 12:28:52.856759 PCI: 00:1d.2: enabled 1
663 12:28:52.860036 PCI: 00:1d.3: enabled 0
664 12:28:52.863183 PCI: 00:1e.0: enabled 1
665 12:28:52.866255 PCI: 00:1e.1: enabled 0
666 12:28:52.866326 PCI: 00:1e.2: enabled 1
667 12:28:52.869958 PCI: 00:1e.3: enabled 1
668 12:28:52.873122 PCI: 00:1f.0: enabled 1
669 12:28:52.876430 PCI: 00:1f.1: enabled 0
670 12:28:52.876504 PCI: 00:1f.2: enabled 1
671 12:28:52.879566 PCI: 00:1f.3: enabled 1
672 12:28:52.883245 PCI: 00:1f.4: enabled 0
673 12:28:52.886457 PCI: 00:1f.5: enabled 1
674 12:28:52.886527 PCI: 00:1f.6: enabled 0
675 12:28:52.889870 PCI: 00:1f.7: enabled 0
676 12:28:52.892911 APIC: 00: enabled 1
677 12:28:52.892988 GENERIC: 0.0: enabled 1
678 12:28:52.896130 GENERIC: 0.0: enabled 1
679 12:28:52.899490 GENERIC: 1.0: enabled 1
680 12:28:52.903071 GENERIC: 0.0: enabled 1
681 12:28:52.903150 GENERIC: 1.0: enabled 1
682 12:28:52.906206 USB0 port 0: enabled 1
683 12:28:52.909420 GENERIC: 0.0: enabled 1
684 12:28:52.909505 USB0 port 0: enabled 1
685 12:28:52.913144 GENERIC: 0.0: enabled 1
686 12:28:52.916200 I2C: 00:1a: enabled 1
687 12:28:52.919265 I2C: 00:31: enabled 1
688 12:28:52.919341 I2C: 00:32: enabled 1
689 12:28:52.922978 I2C: 00:10: enabled 1
690 12:28:52.926137 I2C: 00:15: enabled 1
691 12:28:52.926207 GENERIC: 0.0: enabled 0
692 12:28:52.929966 GENERIC: 1.0: enabled 0
693 12:28:52.933007 GENERIC: 0.0: enabled 1
694 12:28:52.933083 SPI: 00: enabled 1
695 12:28:52.936260 SPI: 00: enabled 1
696 12:28:52.939491 PNP: 0c09.0: enabled 1
697 12:28:52.939567 GENERIC: 0.0: enabled 1
698 12:28:52.943065 USB3 port 0: enabled 1
699 12:28:52.946170 USB3 port 1: enabled 1
700 12:28:52.946247 USB3 port 2: enabled 0
701 12:28:52.949468
702 12:28:52.949547 USB3 port 3: enabled 0
703 12:28:52.952630 USB2 port 0: enabled 0
704 12:28:52.956456 USB2 port 1: enabled 1
705 12:28:52.956526 USB2 port 2: enabled 1
706 12:28:52.959757 USB2 port 3: enabled 0
707 12:28:52.962991 USB2 port 4: enabled 1
708 12:28:52.963061 USB2 port 5: enabled 0
709 12:28:52.966112 USB2 port 6: enabled 0
710 12:28:52.969234 USB2 port 7: enabled 0
711 12:28:52.972944 USB2 port 8: enabled 0
712 12:28:52.973019 USB2 port 9: enabled 0
713 12:28:52.976280 USB3 port 0: enabled 0
714 12:28:52.979454 USB3 port 1: enabled 1
715 12:28:52.979531 USB3 port 2: enabled 0
716 12:28:52.982537 USB3 port 3: enabled 0
717 12:28:52.986298 GENERIC: 0.0: enabled 1
718 12:28:52.989437 GENERIC: 1.0: enabled 1
719 12:28:52.989513 APIC: 01: enabled 1
720 12:28:52.992480 APIC: 05: enabled 1
721 12:28:52.992556 APIC: 06: enabled 1
722 12:28:52.995848 APIC: 03: enabled 1
723 12:28:52.999756 APIC: 02: enabled 1
724 12:28:52.999827 APIC: 04: enabled 1
725 12:28:53.002824 APIC: 07: enabled 1
726 12:28:53.005971 Compare with tree...
727 12:28:53.006101 Root Device: enabled 1
728 12:28:53.009122 DOMAIN: 0000: enabled 1
729 12:28:53.012441 PCI: 00:00.0: enabled 1
730 12:28:53.016136 PCI: 00:02.0: enabled 1
731 12:28:53.016219 PCI: 00:04.0: enabled 1
732 12:28:53.019327 GENERIC: 0.0: enabled 1
733 12:28:53.022559 PCI: 00:05.0: enabled 1
734 12:28:53.025684 PCI: 00:06.0: enabled 0
735 12:28:53.029437 PCI: 00:07.0: enabled 0
736 12:28:53.029520 GENERIC: 0.0: enabled 1
737 12:28:53.032611 PCI: 00:07.1: enabled 0
738 12:28:53.035736 GENERIC: 1.0: enabled 1
739 12:28:53.039044 PCI: 00:07.2: enabled 0
740 12:28:53.042768 GENERIC: 0.0: enabled 1
741 12:28:53.042851 PCI: 00:07.3: enabled 0
742 12:28:53.045875 GENERIC: 1.0: enabled 1
743 12:28:53.049113 PCI: 00:08.0: enabled 1
744 12:28:53.052277 PCI: 00:09.0: enabled 0
745 12:28:53.056166 PCI: 00:0a.0: enabled 0
746 12:28:53.056250 PCI: 00:0d.0: enabled 1
747 12:28:53.059240 USB0 port 0: enabled 1
748 12:28:53.062424 USB3 port 0: enabled 1
749 12:28:53.065637 USB3 port 1: enabled 1
750 12:28:53.069427 USB3 port 2: enabled 0
751 12:28:53.072595 USB3 port 3: enabled 0
752 12:28:53.072678 PCI: 00:0d.1: enabled 0
753 12:28:53.075844 PCI: 00:0d.2: enabled 0
754 12:28:53.078920 GENERIC: 0.0: enabled 1
755 12:28:53.082690 PCI: 00:0d.3: enabled 0
756 12:28:53.085880 PCI: 00:0e.0: enabled 0
757 12:28:53.085963 PCI: 00:10.2: enabled 1
758 12:28:53.088965 PCI: 00:10.6: enabled 0
759 12:28:53.092129 PCI: 00:10.7: enabled 0
760 12:28:53.095932 PCI: 00:12.0: enabled 0
761 12:28:53.096018 PCI: 00:12.6: enabled 0
762 12:28:53.099008
763 12:28:53.099093 PCI: 00:13.0: enabled 0
764 12:28:53.102171 PCI: 00:14.0: enabled 1
765 12:28:53.105911 USB0 port 0: enabled 1
766 12:28:53.108937 USB2 port 0: enabled 0
767 12:28:53.112057 USB2 port 1: enabled 1
768 12:28:53.112141 USB2 port 2: enabled 1
769 12:28:53.115928 USB2 port 3: enabled 0
770 12:28:53.118983 USB2 port 4: enabled 1
771 12:28:53.122111 USB2 port 5: enabled 0
772 12:28:53.125337 USB2 port 6: enabled 0
773 12:28:53.125421 USB2 port 7: enabled 0
774 12:28:53.129116 USB2 port 8: enabled 0
775 12:28:53.132290 USB2 port 9: enabled 0
776 12:28:53.135391 USB3 port 0: enabled 0
777 12:28:53.139184 USB3 port 1: enabled 1
778 12:28:53.142331 USB3 port 2: enabled 0
779 12:28:53.142416 USB3 port 3: enabled 0
780 12:28:53.145651 PCI: 00:14.1: enabled 0
781 12:28:53.148616 PCI: 00:14.2: enabled 1
782 12:28:53.152457 PCI: 00:14.3: enabled 1
783 12:28:53.155788 GENERIC: 0.0: enabled 1
784 12:28:53.155872 PCI: 00:15.0: enabled 1
785 12:28:53.158983 I2C: 00:1a: enabled 1
786 12:28:53.162216 I2C: 00:31: enabled 1
787 12:28:53.165388 I2C: 00:32: enabled 1
788 12:28:53.165472 PCI: 00:15.1: enabled 1
789 12:28:53.168515
790 12:28:53.168600 I2C: 00:10: enabled 1
791 12:28:53.172129 PCI: 00:15.2: enabled 1
792 12:28:53.175282 PCI: 00:15.3: enabled 1
793 12:28:53.178453 PCI: 00:16.0: enabled 1
794 12:28:53.178537 PCI: 00:16.1: enabled 0
795 12:28:53.181709 PCI: 00:16.2: enabled 0
796 12:28:53.185496 PCI: 00:16.3: enabled 0
797 12:28:53.189308 PCI: 00:16.4: enabled 0
798 12:28:53.189393 PCI: 00:16.5: enabled 0
799 12:28:53.193114
800 12:28:53.193198 PCI: 00:17.0: enabled 1
801 12:28:53.196779 PCI: 00:19.0: enabled 0
802 12:28:53.200009 PCI: 00:19.1: enabled 1
803 12:28:53.200093 I2C: 00:15: enabled 1
804 12:28:53.203390 PCI: 00:19.2: enabled 0
805 12:28:53.206450 PCI: 00:1d.0: enabled 1
806 12:28:53.209642 GENERIC: 0.0: enabled 1
807 12:28:53.212781 PCI: 00:1e.0: enabled 1
808 12:28:53.212865 PCI: 00:1e.1: enabled 0
809 12:28:53.216499 PCI: 00:1e.2: enabled 1
810 12:28:53.219548 SPI: 00: enabled 1
811 12:28:53.269781 PCI: 00:1e.3: enabled 1
812 12:28:53.269878 SPI: 00: enabled 1
813 12:28:53.269945 PCI: 00:1f.0: enabled 1
814 12:28:53.270485 PNP: 0c09.0: enabled 1
815 12:28:53.270570 PCI: 00:1f.1: enabled 0
816 12:28:53.270826 PCI: 00:1f.2: enabled 1
817 12:28:53.270894 GENERIC: 0.0: enabled 1
818 12:28:53.270956 GENERIC: 0.0: enabled 1
819 12:28:53.271015 GENERIC: 1.0: enabled 1
820 12:28:53.271072 PCI: 00:1f.3: enabled 1
821 12:28:53.271129 PCI: 00:1f.4: enabled 0
822 12:28:53.271185 PCI: 00:1f.5: enabled 1
823 12:28:53.271442 PCI: 00:1f.6: enabled 0
824 12:28:53.271517 PCI: 00:1f.7: enabled 0
825 12:28:53.271573 CPU_CLUSTER: 0: enabled 1
826 12:28:53.271629 APIC: 00: enabled 1
827 12:28:53.271684 APIC: 01: enabled 1
828 12:28:53.271924 APIC: 05: enabled 1
829 12:28:53.271998 APIC: 06: enabled 1
830 12:28:53.272054 APIC: 03: enabled 1
831 12:28:53.276176 APIC: 02: enabled 1
832 12:28:53.276260 APIC: 04: enabled 1
833 12:28:53.276327 APIC: 07: enabled 1
834 12:28:53.280100 Root Device scanning...
835 12:28:53.283346 scan_static_bus for Root Device
836 12:28:53.287193 DOMAIN: 0000 enabled
837 12:28:53.290260 CPU_CLUSTER: 0 enabled
838 12:28:53.290346 DOMAIN: 0000 scanning...
839 12:28:53.293379 PCI: pci_scan_bus for bus 00
840 12:28:53.296542 PCI: 00:00.0 [8086/0000] ops
841 12:28:53.300335 PCI: 00:00.0 [8086/9a12] enabled
842 12:28:53.303453 PCI: 00:02.0 [8086/0000] bus ops
843 12:28:53.306683 PCI: 00:02.0 [8086/9a40] enabled
844 12:28:53.310414 PCI: 00:04.0 [8086/0000] bus ops
845 12:28:53.313476 PCI: 00:04.0 [8086/9a03] enabled
846 12:28:53.316662 PCI: 00:05.0 [8086/9a19] enabled
847 12:28:53.320291 PCI: 00:07.0 [0000/0000] hidden
848 12:28:53.323395 PCI: 00:08.0 [8086/9a11] enabled
849 12:28:53.326486 PCI: 00:0a.0 [8086/9a0d] disabled
850 12:28:53.329681 PCI: 00:0d.0 [8086/0000] bus ops
851 12:28:53.333493 PCI: 00:0d.0 [8086/9a13] enabled
852 12:28:53.336528 PCI: 00:14.0 [8086/0000] bus ops
853 12:28:53.339774 PCI: 00:14.0 [8086/a0ed] enabled
854 12:28:53.342935 PCI: 00:14.2 [8086/a0ef] enabled
855 12:28:53.346760 PCI: 00:14.3 [8086/0000] bus ops
856 12:28:53.349949 PCI: 00:14.3 [8086/a0f0] enabled
857 12:28:53.353044 PCI: 00:15.0 [8086/0000] bus ops
858 12:28:53.356830 PCI: 00:15.0 [8086/a0e8] enabled
859 12:28:53.359874 PCI: 00:15.1 [8086/0000] bus ops
860 12:28:53.363122 PCI: 00:15.1 [8086/a0e9] enabled
861 12:28:53.366353 PCI: 00:15.2 [8086/0000] bus ops
862 12:28:53.369561 PCI: 00:15.2 [8086/a0ea] enabled
863 12:28:53.372789 PCI: 00:15.3 [8086/0000] bus ops
864 12:28:53.376402 PCI: 00:15.3 [8086/a0eb] enabled
865 12:28:53.379433 PCI: 00:16.0 [8086/0000] ops
866 12:28:53.382569 PCI: 00:16.0 [8086/a0e0] enabled
867 12:28:53.389466 PCI: Static device PCI: 00:17.0 not found, disabling it.
868 12:28:53.392600 PCI: 00:19.0 [8086/0000] bus ops
869 12:28:53.396461 PCI: 00:19.0 [8086/a0c5] disabled
870 12:28:53.399508 PCI: 00:19.1 [8086/0000] bus ops
871 12:28:53.402740 PCI: 00:19.1 [8086/a0c6] enabled
872 12:28:53.405914 PCI: 00:1d.0 [8086/0000] bus ops
873 12:28:53.409162 PCI: 00:1d.0 [8086/a0b0] enabled
874 12:28:53.412853 PCI: 00:1e.0 [8086/0000] ops
875 12:28:53.416078 PCI: 00:1e.0 [8086/a0a8] enabled
876 12:28:53.419094 PCI: 00:1e.2 [8086/0000] bus ops
877 12:28:53.422921 PCI: 00:1e.2 [8086/a0aa] enabled
878 12:28:53.426040 PCI: 00:1e.3 [8086/0000] bus ops
879 12:28:53.429180 PCI: 00:1e.3 [8086/a0ab] enabled
880 12:28:53.432484 PCI: 00:1f.0 [8086/0000] bus ops
881 12:28:53.436202 PCI: 00:1f.0 [8086/a087] enabled
882 12:28:53.436280 RTC Init
883 12:28:53.439502 Set power on after power failure.
884 12:28:53.442695 Disabling Deep S3
885 12:28:53.445914 Disabling Deep S3
886 12:28:53.445999 Disabling Deep S4
887 12:28:53.449134 Disabling Deep S4
888 12:28:53.449218 Disabling Deep S5
889 12:28:53.452895 Disabling Deep S5
890 12:28:53.456023 PCI: 00:1f.2 [0000/0000] hidden
891 12:28:53.459186 PCI: 00:1f.3 [8086/0000] bus ops
892 12:28:53.462891 PCI: 00:1f.3 [8086/a0c8] enabled
893 12:28:53.466057 PCI: 00:1f.5 [8086/0000] bus ops
894 12:28:53.469167 PCI: 00:1f.5 [8086/a0a4] enabled
895 12:28:53.472535 PCI: Leftover static devices:
896 12:28:53.472619 PCI: 00:10.2
897 12:28:53.476302 PCI: 00:10.6
898 12:28:53.476386 PCI: 00:10.7
899 12:28:53.476452 PCI: 00:06.0
900 12:28:53.479484 PCI: 00:07.1
901 12:28:53.479568 PCI: 00:07.2
902 12:28:53.482635 PCI: 00:07.3
903 12:28:53.482718 PCI: 00:09.0
904 12:28:53.482784 PCI: 00:0d.1
905 12:28:53.485755
906 12:28:53.485839 PCI: 00:0d.2
907 12:28:53.485919 PCI: 00:0d.3
908 12:28:53.488892 PCI: 00:0e.0
909 12:28:53.488975 PCI: 00:12.0
910 12:28:53.492630 PCI: 00:12.6
911 12:28:53.492713 PCI: 00:13.0
912 12:28:53.492778 PCI: 00:14.1
913 12:28:53.495714 PCI: 00:16.1
914 12:28:53.495798 PCI: 00:16.2
915 12:28:53.498841 PCI: 00:16.3
916 12:28:53.498936 PCI: 00:16.4
917 12:28:53.499003 PCI: 00:16.5
918 12:28:53.502490
919 12:28:53.502574 PCI: 00:17.0
920 12:28:53.502640 PCI: 00:19.2
921 12:28:53.505664 PCI: 00:1e.1
922 12:28:53.505748 PCI: 00:1f.1
923 12:28:53.508816 PCI: 00:1f.4
924 12:28:53.508899 PCI: 00:1f.6
925 12:28:53.508964 PCI: 00:1f.7
926 12:28:53.511894 PCI: Check your devicetree.cb.
927 12:28:53.515561 PCI: 00:02.0 scanning...
928 12:28:53.518586 scan_generic_bus for PCI: 00:02.0
929 12:28:53.522381 scan_generic_bus for PCI: 00:02.0 done
930 12:28:53.528593 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
931 12:28:53.532198 PCI: 00:04.0 scanning...
932 12:28:53.535369 scan_generic_bus for PCI: 00:04.0
933 12:28:53.535452 GENERIC: 0.0 enabled
934 12:28:53.541738 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
935 12:28:53.548543 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
936 12:28:53.548627 PCI: 00:0d.0 scanning...
937 12:28:53.551754 scan_static_bus for PCI: 00:0d.0
938 12:28:53.555039 USB0 port 0 enabled
939 12:28:53.558721 USB0 port 0 scanning...
940 12:28:53.561969 scan_static_bus for USB0 port 0
941 12:28:53.562088 USB3 port 0 enabled
942 12:28:53.565118 USB3 port 1 enabled
943 12:28:53.568284 USB3 port 2 disabled
944 12:28:53.568367 USB3 port 3 disabled
945 12:28:53.572166 USB3 port 0 scanning...
946 12:28:53.575290 scan_static_bus for USB3 port 0
947 12:28:53.578473 scan_static_bus for USB3 port 0 done
948 12:28:53.584775 scan_bus: bus USB3 port 0 finished in 6 msecs
949 12:28:53.584859 USB3 port 1 scanning...
950 12:28:53.588547 scan_static_bus for USB3 port 1
951 12:28:53.594799 scan_static_bus for USB3 port 1 done
952 12:28:53.598736 scan_bus: bus USB3 port 1 finished in 6 msecs
953 12:28:53.601642 scan_static_bus for USB0 port 0 done
954 12:28:53.604805 scan_bus: bus USB0 port 0 finished in 43 msecs
955 12:28:53.611763 scan_static_bus for PCI: 00:0d.0 done
956 12:28:53.615016 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
957 12:28:53.618038 PCI: 00:14.0 scanning...
958 12:28:53.621305 scan_static_bus for PCI: 00:14.0
959 12:28:53.625126 USB0 port 0 enabled
960 12:28:53.625210 USB0 port 0 scanning...
961 12:28:53.628217 scan_static_bus for USB0 port 0
962 12:28:53.631438 USB2 port 0 disabled
963 12:28:53.634447 USB2 port 1 enabled
964 12:28:53.634532 USB2 port 2 enabled
965 12:28:53.637628 USB2 port 3 disabled
966 12:28:53.637712 USB2 port 4 enabled
967 12:28:53.641491
968 12:28:53.641575 USB2 port 5 disabled
969 12:28:53.644546 USB2 port 6 disabled
970 12:28:53.644631 USB2 port 7 disabled
971 12:28:53.647691 USB2 port 8 disabled
972 12:28:53.651447 USB2 port 9 disabled
973 12:28:53.651533 USB3 port 0 disabled
974 12:28:53.654676 USB3 port 1 enabled
975 12:28:53.657817 USB3 port 2 disabled
976 12:28:53.657902 USB3 port 3 disabled
977 12:28:53.660923 USB2 port 1 scanning...
978 12:28:53.664229 scan_static_bus for USB2 port 1
979 12:28:53.667920 scan_static_bus for USB2 port 1 done
980 12:28:53.674362 scan_bus: bus USB2 port 1 finished in 6 msecs
981 12:28:53.674451 USB2 port 2 scanning...
982 12:28:53.677439 scan_static_bus for USB2 port 2
983 12:28:53.681204 scan_static_bus for USB2 port 2 done
984 12:28:53.684440
985 12:28:53.687699 scan_bus: bus USB2 port 2 finished in 6 msecs
986 12:28:53.690835 USB2 port 4 scanning...
987 12:28:53.694094 scan_static_bus for USB2 port 4
988 12:28:53.697881 scan_static_bus for USB2 port 4 done
989 12:28:53.701112 scan_bus: bus USB2 port 4 finished in 6 msecs
990 12:28:53.704235 USB3 port 1 scanning...
991 12:28:53.707461 scan_static_bus for USB3 port 1
992 12:28:53.710509 scan_static_bus for USB3 port 1 done
993 12:28:53.714269 scan_bus: bus USB3 port 1 finished in 6 msecs
994 12:28:53.720480 scan_static_bus for USB0 port 0 done
995 12:28:53.724233 scan_bus: bus USB0 port 0 finished in 93 msecs
996 12:28:53.727459 scan_static_bus for PCI: 00:14.0 done
997 12:28:53.733707 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
998 12:28:53.733794 PCI: 00:14.3 scanning...
999 12:28:53.737501 scan_static_bus for PCI: 00:14.3
1000 12:28:53.740759 GENERIC: 0.0 enabled
1001 12:28:53.743927 scan_static_bus for PCI: 00:14.3 done
1002 12:28:53.750752 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1003 12:28:53.750839 PCI: 00:15.0 scanning...
1004 12:28:53.754029 scan_static_bus for PCI: 00:15.0
1005 12:28:53.757228 I2C: 00:1a enabled
1006 12:28:53.761019 I2C: 00:31 enabled
1007 12:28:53.761104 I2C: 00:32 enabled
1008 12:28:53.764223 scan_static_bus for PCI: 00:15.0 done
1009 12:28:53.771156 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1010 12:28:53.771243 PCI: 00:15.1 scanning...
1011 12:28:53.775031 scan_static_bus for PCI: 00:15.1
1012 12:28:53.778240 I2C: 00:10 enabled
1013 12:28:53.781347 scan_static_bus for PCI: 00:15.1 done
1014 12:28:53.787798 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1015 12:28:53.787887 PCI: 00:15.2 scanning...
1016 12:28:53.791116 scan_static_bus for PCI: 00:15.2
1017 12:28:53.798058 scan_static_bus for PCI: 00:15.2 done
1018 12:28:53.801290 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1019 12:28:53.804314 PCI: 00:15.3 scanning...
1020 12:28:53.807392 scan_static_bus for PCI: 00:15.3
1021 12:28:53.811209 scan_static_bus for PCI: 00:15.3 done
1022 12:28:53.814879 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1023 12:28:53.818146 PCI: 00:19.1 scanning...
1024 12:28:53.821262 scan_static_bus for PCI: 00:19.1
1025 12:28:53.824876 I2C: 00:15 enabled
1026 12:28:53.828115 scan_static_bus for PCI: 00:19.1 done
1027 12:28:53.831103 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1028 12:28:53.834854 PCI: 00:1d.0 scanning...
1029 12:28:53.838023 do_pci_scan_bridge for PCI: 00:1d.0
1030 12:28:53.841074 PCI: pci_scan_bus for bus 01
1031 12:28:53.844265 PCI: 01:00.0 [1c5c/174a] enabled
1032 12:28:53.848078 GENERIC: 0.0 enabled
1033 12:28:53.851217 Enabling Common Clock Configuration
1034 12:28:53.854500 L1 Sub-State supported from root port 29
1035 12:28:53.857749 L1 Sub-State Support = 0xf
1036 12:28:53.860902 CommonModeRestoreTime = 0x28
1037 12:28:53.864024 Power On Value = 0x16, Power On Scale = 0x0
1038 12:28:53.867280 ASPM: Enabled L1
1039 12:28:53.871148 PCIe: Max_Payload_Size adjusted to 128
1040 12:28:53.877402 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1041 12:28:53.877892 PCI: 00:1e.2 scanning...
1042 12:28:53.880554 scan_generic_bus for PCI: 00:1e.2
1043 12:28:53.884497
1044 12:28:53.885054 SPI: 00 enabled
1045 12:28:53.890703 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1046 12:28:53.893985 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1047 12:28:53.897218 PCI: 00:1e.3 scanning...
1048 12:28:53.900926 scan_generic_bus for PCI: 00:1e.3
1049 12:28:53.903959 SPI: 00 enabled
1050 12:28:53.907256 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1051 12:28:53.910335
1052 12:28:53.914342 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1053 12:28:53.917384 PCI: 00:1f.0 scanning...
1054 12:28:53.920561 scan_static_bus for PCI: 00:1f.0
1055 12:28:53.921045 PNP: 0c09.0 enabled
1056 12:28:53.923969 PNP: 0c09.0 scanning...
1057 12:28:53.926986 scan_static_bus for PNP: 0c09.0
1058 12:28:53.930235 scan_static_bus for PNP: 0c09.0 done
1059 12:28:53.936978 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1060 12:28:53.939872 scan_static_bus for PCI: 00:1f.0 done
1061 12:28:53.943769 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1062 12:28:53.946962 PCI: 00:1f.2 scanning...
1063 12:28:53.950076 scan_static_bus for PCI: 00:1f.2
1064 12:28:53.953173 GENERIC: 0.0 enabled
1065 12:28:53.957063 GENERIC: 0.0 scanning...
1066 12:28:53.960500 scan_static_bus for GENERIC: 0.0
1067 12:28:53.961088 GENERIC: 0.0 enabled
1068 12:28:53.963381 GENERIC: 1.0 enabled
1069 12:28:53.966456 scan_static_bus for GENERIC: 0.0 done
1070 12:28:53.973480 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1071 12:28:53.976555 scan_static_bus for PCI: 00:1f.2 done
1072 12:28:53.979820 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1073 12:28:53.982969 PCI: 00:1f.3 scanning...
1074 12:28:53.986917 scan_static_bus for PCI: 00:1f.3
1075 12:28:53.989912 scan_static_bus for PCI: 00:1f.3 done
1076 12:28:53.996275 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1077 12:28:53.996821 PCI: 00:1f.5 scanning...
1078 12:28:53.999513 scan_generic_bus for PCI: 00:1f.5
1079 12:28:54.005858 scan_generic_bus for PCI: 00:1f.5 done
1080 12:28:54.009776 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1081 12:28:54.016253 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1082 12:28:54.019576 scan_static_bus for Root Device done
1083 12:28:54.022823 scan_bus: bus Root Device finished in 736 msecs
1084 12:28:54.023303 done
1085 12:28:54.029665 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1086 12:28:54.032746 Chrome EC: UHEPI supported
1087 12:28:54.039584 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1088 12:28:54.046092 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1089 12:28:54.049283 SPI flash protection: WPSW=0 SRP0=0
1090 12:28:54.052495 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1091 12:28:54.059418 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1092 12:28:54.062765 found VGA at PCI: 00:02.0
1093 12:28:54.065959 Setting up VGA for PCI: 00:02.0
1094 12:28:54.072510 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1095 12:28:54.075476 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1096 12:28:54.079383 Allocating resources...
1097 12:28:54.079931 Reading resources...
1098 12:28:54.085713 Root Device read_resources bus 0 link: 0
1099 12:28:54.088819 DOMAIN: 0000 read_resources bus 0 link: 0
1100 12:28:54.095869 PCI: 00:04.0 read_resources bus 1 link: 0
1101 12:28:54.098863 PCI: 00:04.0 read_resources bus 1 link: 0 done
1102 12:28:54.105186 PCI: 00:0d.0 read_resources bus 0 link: 0
1103 12:28:54.108549 USB0 port 0 read_resources bus 0 link: 0
1104 12:28:54.115559 USB0 port 0 read_resources bus 0 link: 0 done
1105 12:28:54.118577 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1106 12:28:54.121860 PCI: 00:14.0 read_resources bus 0 link: 0
1107 12:28:54.128409 USB0 port 0 read_resources bus 0 link: 0
1108 12:28:54.131593 USB0 port 0 read_resources bus 0 link: 0 done
1109 12:28:54.138540 PCI: 00:14.0 read_resources bus 0 link: 0 done
1110 12:28:54.141673 PCI: 00:14.3 read_resources bus 0 link: 0
1111 12:28:54.148575 PCI: 00:14.3 read_resources bus 0 link: 0 done
1112 12:28:54.151832 PCI: 00:15.0 read_resources bus 0 link: 0
1113 12:28:54.158629 PCI: 00:15.0 read_resources bus 0 link: 0 done
1114 12:28:54.161975 PCI: 00:15.1 read_resources bus 0 link: 0
1115 12:28:54.168758 PCI: 00:15.1 read_resources bus 0 link: 0 done
1116 12:28:54.171975 PCI: 00:19.1 read_resources bus 0 link: 0
1117 12:28:54.179122 PCI: 00:19.1 read_resources bus 0 link: 0 done
1118 12:28:54.182191 PCI: 00:1d.0 read_resources bus 1 link: 0
1119 12:28:54.188772 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1120 12:28:54.192568 PCI: 00:1e.2 read_resources bus 2 link: 0
1121 12:28:54.198764 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1122 12:28:54.202666 PCI: 00:1e.3 read_resources bus 3 link: 0
1123 12:28:54.208993 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1124 12:28:54.212164 PCI: 00:1f.0 read_resources bus 0 link: 0
1125 12:28:54.218966 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1126 12:28:54.222212 PCI: 00:1f.2 read_resources bus 0 link: 0
1127 12:28:54.225331 GENERIC: 0.0 read_resources bus 0 link: 0
1128 12:28:54.232807 GENERIC: 0.0 read_resources bus 0 link: 0 done
1129 12:28:54.235944 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1130 12:28:54.243524 DOMAIN: 0000 read_resources bus 0 link: 0 done
1131 12:28:54.246567 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1132 12:28:54.253457 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1133 12:28:54.256629 Root Device read_resources bus 0 link: 0 done
1134 12:28:54.259832 Done reading resources.
1135 12:28:54.266210 Show resources in subtree (Root Device)...After reading.
1136 12:28:54.270006 Root Device child on link 0 DOMAIN: 0000
1137 12:28:54.273202 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1138 12:28:54.282787 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1139 12:28:54.293235 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1140 12:28:54.296489 PCI: 00:00.0
1141 12:28:54.305973 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1142 12:28:54.313080 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1143 12:28:54.322498 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1144 12:28:54.332953 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1145 12:28:54.342682 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1146 12:28:54.352728 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1147 12:28:54.359195 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1148 12:28:54.363006
1149 12:28:54.369297 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1150 12:28:54.379326 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1151 12:28:54.389650 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1152 12:28:54.398981 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1153 12:28:54.409251 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1154 12:28:54.415417 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1155 12:28:54.425446 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1156 12:28:54.435354 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1157 12:28:54.445352 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1158 12:28:54.455437 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1159 12:28:54.465646 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1160 12:28:54.472059 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1161 12:28:54.481851 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1162 12:28:54.485005 PCI: 00:02.0
1163 12:28:54.495624 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1164 12:28:54.504921 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1165 12:28:54.515265 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1166 12:28:54.518504 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1167 12:28:54.529047 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1168 12:28:54.531333 GENERIC: 0.0
1169 12:28:54.531820 PCI: 00:05.0
1170 12:28:54.541475 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1171 12:28:54.548509 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1172 12:28:54.549015 GENERIC: 0.0
1173 12:28:54.551363 PCI: 00:08.0
1174 12:28:54.561589 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 12:28:54.562032 PCI: 00:0a.0
1176 12:28:54.564781 PCI: 00:0d.0 child on link 0 USB0 port 0
1177 12:28:54.574890 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1178 12:28:54.581429 USB0 port 0 child on link 0 USB3 port 0
1179 12:28:54.581968 USB3 port 0
1180 12:28:54.584489 USB3 port 1
1181 12:28:54.584976 USB3 port 2
1182 12:28:54.588250 USB3 port 3
1183 12:28:54.591538 PCI: 00:14.0 child on link 0 USB0 port 0
1184 12:28:54.601487 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1185 12:28:54.607804 USB0 port 0 child on link 0 USB2 port 0
1186 12:28:54.608248 USB2 port 0
1187 12:28:54.611007 USB2 port 1
1188 12:28:54.611500 USB2 port 2
1189 12:28:54.614229 USB2 port 3
1190 12:28:54.614720 USB2 port 4
1191 12:28:54.618101 USB2 port 5
1192 12:28:54.618592 USB2 port 6
1193 12:28:54.621135 USB2 port 7
1194 12:28:54.621623 USB2 port 8
1195 12:28:54.624323 USB2 port 9
1196 12:28:54.624811 USB3 port 0
1197 12:28:54.627559 USB3 port 1
1198 12:28:54.628047 USB3 port 2
1199 12:28:54.630755
1200 12:28:54.631312 USB3 port 3
1201 12:28:54.634766 PCI: 00:14.2
1202 12:28:54.644060 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 12:28:54.654124 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1204 12:28:54.657827 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1205 12:28:54.667267 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1206 12:28:54.667732 GENERIC: 0.0
1207 12:28:54.673729 PCI: 00:15.0 child on link 0 I2C: 00:1a
1208 12:28:54.683804 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 12:28:54.684312 I2C: 00:1a
1210 12:28:54.686995 I2C: 00:31
1211 12:28:54.687429 I2C: 00:32
1212 12:28:54.690890 PCI: 00:15.1 child on link 0 I2C: 00:10
1213 12:28:54.700424 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:28:54.703500 I2C: 00:10
1215 12:28:54.703956 PCI: 00:15.2
1216 12:28:54.713533 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 12:28:54.716907 PCI: 00:15.3
1218 12:28:54.727031 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 12:28:54.727477 PCI: 00:16.0
1220 12:28:54.737262 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1221 12:28:54.740264 PCI: 00:19.0
1222 12:28:54.743346 PCI: 00:19.1 child on link 0 I2C: 00:15
1223 12:28:54.753830 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 12:28:54.756983 I2C: 00:15
1225 12:28:54.760243 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1226 12:28:54.769792 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1227 12:28:54.780137 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1228 12:28:54.786425 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1229 12:28:54.790319 GENERIC: 0.0
1230 12:28:54.790771 PCI: 01:00.0
1231 12:28:54.793421
1232 12:28:54.803338 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 12:28:54.809662 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1234 12:28:54.820071 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1235 12:28:54.823209 PCI: 00:1e.0
1236 12:28:54.833318 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1237 12:28:54.836503 PCI: 00:1e.2 child on link 0 SPI: 00
1238 12:28:54.846583 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 12:28:54.849703 SPI: 00
1240 12:28:54.852884 PCI: 00:1e.3 child on link 0 SPI: 00
1241 12:28:54.862618 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 12:28:54.863063 SPI: 00
1243 12:28:54.866681 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1244 12:28:54.876109 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1245 12:28:54.879299 PNP: 0c09.0
1246 12:28:54.886430 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1247 12:28:54.892860 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1248 12:28:54.899348 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1249 12:28:54.909336 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1250 12:28:54.915715 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1251 12:28:54.916326 GENERIC: 0.0
1252 12:28:54.919519 GENERIC: 1.0
1253 12:28:54.919992 PCI: 00:1f.3
1254 12:28:54.929148 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1255 12:28:54.939150 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1256 12:28:54.942315 PCI: 00:1f.5
1257 12:28:54.952523 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1258 12:28:54.955718 CPU_CLUSTER: 0 child on link 0 APIC: 00
1259 12:28:54.956210 APIC: 00
1260 12:28:54.958967 APIC: 01
1261 12:28:54.959453 APIC: 05
1262 12:28:54.959836 APIC: 06
1263 12:28:54.962600 APIC: 03
1264 12:28:54.963173 APIC: 02
1265 12:28:54.965648 APIC: 04
1266 12:28:54.966250 APIC: 07
1267 12:28:54.972585 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1268 12:28:54.978819 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1269 12:28:54.985853 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1270 12:28:54.992133 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1271 12:28:54.995444 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1272 12:28:54.998481 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1273 12:28:55.005465 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1274 12:28:55.011868 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1275 12:28:55.018545 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1276 12:28:55.025208 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1277 12:28:55.032123 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1278 12:28:55.038469 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1279 12:28:55.048180 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1280 12:28:55.055139 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1281 12:28:55.062131 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1282 12:28:55.065146 DOMAIN: 0000: Resource ranges:
1283 12:28:55.068125 * Base: 1000, Size: 800, Tag: 100
1284 12:28:55.072011 * Base: 1900, Size: e700, Tag: 100
1285 12:28:55.078500 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1286 12:28:55.085082 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1287 12:28:55.091238 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1288 12:28:55.098386 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1289 12:28:55.108321 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1290 12:28:55.114639 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1291 12:28:55.121780 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1292 12:28:55.131405 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1293 12:28:55.137758 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1294 12:28:55.144353 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1295 12:28:55.151437 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1296 12:28:55.154462
1297 12:28:55.161392 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1298 12:28:55.168304 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1299 12:28:55.174243 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1300 12:28:55.184862 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1301 12:28:55.190998 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1302 12:28:55.197403 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1303 12:28:55.207655 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1304 12:28:55.214219 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1305 12:28:55.221218 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1306 12:28:55.230702 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1307 12:28:55.237346 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1308 12:28:55.243631 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1309 12:28:55.247869
1310 12:28:55.253972 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1311 12:28:55.260261 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1312 12:28:55.264085 DOMAIN: 0000: Resource ranges:
1313 12:28:55.267151 * Base: 7fc00000, Size: 40400000, Tag: 200
1314 12:28:55.274033 * Base: d0000000, Size: 28000000, Tag: 200
1315 12:28:55.277103 * Base: fa000000, Size: 1000000, Tag: 200
1316 12:28:55.280376 * Base: fb001000, Size: 2fff000, Tag: 200
1317 12:28:55.286793 * Base: fe010000, Size: 2e000, Tag: 200
1318 12:28:55.290698 * Base: fe03f000, Size: d41000, Tag: 200
1319 12:28:55.294149 * Base: fed88000, Size: 8000, Tag: 200
1320 12:28:55.296908 * Base: fed93000, Size: d000, Tag: 200
1321 12:28:55.303627 * Base: feda2000, Size: 1e000, Tag: 200
1322 12:28:55.306955 * Base: fede0000, Size: 1220000, Tag: 200
1323 12:28:55.309903 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1324 12:28:55.316490 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1325 12:28:55.323448 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1326 12:28:55.329810 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1327 12:28:55.336934 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1328 12:28:55.343254 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1329 12:28:55.350327 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1330 12:28:55.356672 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1331 12:28:55.362854 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1332 12:28:55.369931 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1333 12:28:55.376784 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1334 12:28:55.383069 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1335 12:28:55.389952 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1336 12:28:55.396526 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1337 12:28:55.403240 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1338 12:28:55.409655 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1339 12:28:55.416228 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1340 12:28:55.423088 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1341 12:28:55.429279 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1342 12:28:55.436356 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1343 12:28:55.442557 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1344 12:28:55.449604 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1345 12:28:55.456270 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1346 12:28:55.465820 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1347 12:28:55.472683 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1348 12:28:55.475695 PCI: 00:1d.0: Resource ranges:
1349 12:28:55.478941 * Base: 7fc00000, Size: 100000, Tag: 200
1350 12:28:55.485950 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1351 12:28:55.492641 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1352 12:28:55.499151 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1353 12:28:55.509249 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1354 12:28:55.515694 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1355 12:28:55.518849 Root Device assign_resources, bus 0 link: 0
1356 12:28:55.525870 DOMAIN: 0000 assign_resources, bus 0 link: 0
1357 12:28:55.532318 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1358 12:28:55.541985 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1359 12:28:55.549052 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1360 12:28:55.558490 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1361 12:28:55.562225 PCI: 00:04.0 assign_resources, bus 1 link: 0
1362 12:28:55.565342 PCI: 00:04.0 assign_resources, bus 1 link: 0
1363 12:28:55.575490 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1364 12:28:55.582284 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1365 12:28:55.591896 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1366 12:28:55.595311 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1367 12:28:55.601581 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1368 12:28:55.608611 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1369 12:28:55.615039 PCI: 00:14.0 assign_resources, bus 0 link: 0
1370 12:28:55.618253 PCI: 00:14.0 assign_resources, bus 0 link: 0
1371 12:28:55.625411 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1372 12:28:55.628428
1373 12:28:55.634726 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1374 12:28:55.641180 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1375 12:28:55.648073 PCI: 00:14.3 assign_resources, bus 0 link: 0
1376 12:28:55.651321 PCI: 00:14.3 assign_resources, bus 0 link: 0
1377 12:28:55.661429 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1378 12:28:55.665038 PCI: 00:15.0 assign_resources, bus 0 link: 0
1379 12:28:55.667988 PCI: 00:15.0 assign_resources, bus 0 link: 0
1380 12:28:55.671073
1381 12:28:55.677943 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1382 12:28:55.681038 PCI: 00:15.1 assign_resources, bus 0 link: 0
1383 12:28:55.687929 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 12:28:55.694095 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1385 12:28:55.704088 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1386 12:28:55.710749 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1387 12:28:55.720638 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1388 12:28:55.724233 PCI: 00:19.1 assign_resources, bus 0 link: 0
1389 12:28:55.730445 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 12:28:55.737508 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1391 12:28:55.746846 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1392 12:28:55.757297 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1393 12:28:55.760529 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 12:28:55.770183 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1395 12:28:55.776473 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1396 12:28:55.783305 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1397 12:28:55.790277 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 12:28:55.796585 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 12:28:55.803229 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 12:28:55.806551 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 12:28:55.816598 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 12:28:55.819667 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 12:28:55.822969 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 12:28:55.830161 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 12:28:55.833206 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 12:28:55.840220 LPC: Trying to open IO window from 800 size 1ff
1407 12:28:55.846351 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1408 12:28:55.856202 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1409 12:28:55.862839 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1410 12:28:55.869743 DOMAIN: 0000 assign_resources, bus 0 link: 0
1411 12:28:55.873049 Root Device assign_resources, bus 0 link: 0
1412 12:28:55.876111 Done setting resources.
1413 12:28:55.882710 Show resources in subtree (Root Device)...After assigning values.
1414 12:28:55.885897 Root Device child on link 0 DOMAIN: 0000
1415 12:28:55.889464 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 12:28:55.899071 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1417 12:28:55.909488 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1418 12:28:55.912440 PCI: 00:00.0
1419 12:28:55.922650 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 12:28:55.929494 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 12:28:55.939262 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 12:28:55.948884 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 12:28:55.959161 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 12:28:55.968700 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 12:28:55.978795 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 12:28:55.985451 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 12:28:55.995680 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 12:28:56.005203 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1429 12:28:56.015052 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1430 12:28:56.025370 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1431 12:28:56.031740 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1432 12:28:56.041797 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1433 12:28:56.052112 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1434 12:28:56.061628 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1435 12:28:56.071848 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1436 12:28:56.081411 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1437 12:28:56.088431 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1438 12:28:56.091549
1439 12:28:56.098350 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1440 12:28:56.101562 PCI: 00:02.0
1441 12:28:56.111207 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1442 12:28:56.121286 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1443 12:28:56.131410 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1444 12:28:56.137818 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1445 12:28:56.147780 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1446 12:28:56.148217 GENERIC: 0.0
1447 12:28:56.150860 PCI: 00:05.0
1448 12:28:56.160822 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1449 12:28:56.164505 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1450 12:28:56.167714 GENERIC: 0.0
1451 12:28:56.168142 PCI: 00:08.0
1452 12:28:56.177851 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1453 12:28:56.180925 PCI: 00:0a.0
1454 12:28:56.184731 PCI: 00:0d.0 child on link 0 USB0 port 0
1455 12:28:56.194397 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1456 12:28:56.200891 USB0 port 0 child on link 0 USB3 port 0
1457 12:28:56.201451 USB3 port 0
1458 12:28:56.204055 USB3 port 1
1459 12:28:56.204555 USB3 port 2
1460 12:28:56.207538 USB3 port 3
1461 12:28:56.210901 PCI: 00:14.0 child on link 0 USB0 port 0
1462 12:28:56.220714 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1463 12:28:56.227552 USB0 port 0 child on link 0 USB2 port 0
1464 12:28:56.228148 USB2 port 0
1465 12:28:56.230844 USB2 port 1
1466 12:28:56.231385 USB2 port 2
1467 12:28:56.233952 USB2 port 3
1468 12:28:56.234538 USB2 port 4
1469 12:28:56.237123 USB2 port 5
1470 12:28:56.237664 USB2 port 6
1471 12:28:56.240473 USB2 port 7
1472 12:28:56.243698 USB2 port 8
1473 12:28:56.244273 USB2 port 9
1474 12:28:56.247260 USB3 port 0
1475 12:28:56.247824 USB3 port 1
1476 12:28:56.250359 USB3 port 2
1477 12:28:56.250755 USB3 port 3
1478 12:28:56.253479 PCI: 00:14.2
1479 12:28:56.263656 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1480 12:28:56.273182 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1481 12:28:56.276949 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1482 12:28:56.286993 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1483 12:28:56.290232 GENERIC: 0.0
1484 12:28:56.293445 PCI: 00:15.0 child on link 0 I2C: 00:1a
1485 12:28:56.303226 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1486 12:28:56.306284 I2C: 00:1a
1487 12:28:56.306515 I2C: 00:31
1488 12:28:56.309521 I2C: 00:32
1489 12:28:56.313384 PCI: 00:15.1 child on link 0 I2C: 00:10
1490 12:28:56.322969 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1491 12:28:56.326704 I2C: 00:10
1492 12:28:56.326988 PCI: 00:15.2
1493 12:28:56.336311 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1494 12:28:56.339540 PCI: 00:15.3
1495 12:28:56.350018 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1496 12:28:56.350328 PCI: 00:16.0
1497 12:28:56.363219 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1498 12:28:56.363659 PCI: 00:19.0
1499 12:28:56.366478 PCI: 00:19.1 child on link 0 I2C: 00:15
1500 12:28:56.376637 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1501 12:28:56.379838 I2C: 00:15
1502 12:28:56.382989 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1503 12:28:56.393070 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1504 12:28:56.405902 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1505 12:28:56.416075 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1506 12:28:56.416483 GENERIC: 0.0
1507 12:28:56.419237 PCI: 01:00.0
1508 12:28:56.429275 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1509 12:28:56.439523 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1510 12:28:56.449096 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1511 12:28:56.452692 PCI: 00:1e.0
1512 12:28:56.462513 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1513 12:28:56.465866 PCI: 00:1e.2 child on link 0 SPI: 00
1514 12:28:56.475649 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1515 12:28:56.479336 SPI: 00
1516 12:28:56.482483 PCI: 00:1e.3 child on link 0 SPI: 00
1517 12:28:56.492135 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1518 12:28:56.495242 SPI: 00
1519 12:28:56.499041 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1520 12:28:56.505635 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1521 12:28:56.509204
1522 12:28:56.509587 PNP: 0c09.0
1523 12:28:56.518510 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1524 12:28:56.522317 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1525 12:28:56.532434 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1526 12:28:56.542196 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1527 12:28:56.545466 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1528 12:28:56.548699 GENERIC: 0.0
1529 12:28:56.549067 GENERIC: 1.0
1530 12:28:56.551690 PCI: 00:1f.3
1531 12:28:56.562189 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1532 12:28:56.572104 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1533 12:28:56.572478 PCI: 00:1f.5
1534 12:28:56.584887 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1535 12:28:56.588498 CPU_CLUSTER: 0 child on link 0 APIC: 00
1536 12:28:56.588872 APIC: 00
1537 12:28:56.591665 APIC: 01
1538 12:28:56.592033 APIC: 05
1539 12:28:56.592324 APIC: 06
1540 12:28:56.594822 APIC: 03
1541 12:28:56.595230 APIC: 02
1542 12:28:56.598108 APIC: 04
1543 12:28:56.598471 APIC: 07
1544 12:28:56.601939 Done allocating resources.
1545 12:28:56.608194 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1546 12:28:56.611453 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1547 12:28:56.618184 Configure GPIOs for I2S audio on UP4.
1548 12:28:56.624840 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1549 12:28:56.625206 Enabling resources...
1550 12:28:56.631789 PCI: 00:00.0 subsystem <- 8086/9a12
1551 12:28:56.632153 PCI: 00:00.0 cmd <- 06
1552 12:28:56.635164 PCI: 00:02.0 subsystem <- 8086/9a40
1553 12:28:56.638191 PCI: 00:02.0 cmd <- 03
1554 12:28:56.641469 PCI: 00:04.0 subsystem <- 8086/9a03
1555 12:28:56.644707 PCI: 00:04.0 cmd <- 02
1556 12:28:56.647836 PCI: 00:05.0 subsystem <- 8086/9a19
1557 12:28:56.651131 PCI: 00:05.0 cmd <- 02
1558 12:28:56.654184 PCI: 00:08.0 subsystem <- 8086/9a11
1559 12:28:56.658035 PCI: 00:08.0 cmd <- 06
1560 12:28:56.661212 PCI: 00:0d.0 subsystem <- 8086/9a13
1561 12:28:56.664443 PCI: 00:0d.0 cmd <- 02
1562 12:28:56.667701 PCI: 00:14.0 subsystem <- 8086/a0ed
1563 12:28:56.670843 PCI: 00:14.0 cmd <- 02
1564 12:28:56.674017 PCI: 00:14.2 subsystem <- 8086/a0ef
1565 12:28:56.674428 PCI: 00:14.2 cmd <- 02
1566 12:28:56.681091 PCI: 00:14.3 subsystem <- 8086/a0f0
1567 12:28:56.681349 PCI: 00:14.3 cmd <- 02
1568 12:28:56.684338 PCI: 00:15.0 subsystem <- 8086/a0e8
1569 12:28:56.687618 PCI: 00:15.0 cmd <- 02
1570 12:28:56.690669 PCI: 00:15.1 subsystem <- 8086/a0e9
1571 12:28:56.693841 PCI: 00:15.1 cmd <- 02
1572 12:28:56.697541 PCI: 00:15.2 subsystem <- 8086/a0ea
1573 12:28:56.700691 PCI: 00:15.2 cmd <- 02
1574 12:28:56.703973 PCI: 00:15.3 subsystem <- 8086/a0eb
1575 12:28:56.707594 PCI: 00:15.3 cmd <- 02
1576 12:28:56.710544 PCI: 00:16.0 subsystem <- 8086/a0e0
1577 12:28:56.713769 PCI: 00:16.0 cmd <- 02
1578 12:28:56.717493 PCI: 00:19.1 subsystem <- 8086/a0c6
1579 12:28:56.720594 PCI: 00:19.1 cmd <- 02
1580 12:28:56.723887 PCI: 00:1d.0 bridge ctrl <- 0013
1581 12:28:56.727047 PCI: 00:1d.0 subsystem <- 8086/a0b0
1582 12:28:56.727303 PCI: 00:1d.0 cmd <- 06
1583 12:28:56.733934 PCI: 00:1e.0 subsystem <- 8086/a0a8
1584 12:28:56.734221 PCI: 00:1e.0 cmd <- 06
1585 12:28:56.737285 PCI: 00:1e.2 subsystem <- 8086/a0aa
1586 12:28:56.740510 PCI: 00:1e.2 cmd <- 06
1587 12:28:56.743752 PCI: 00:1e.3 subsystem <- 8086/a0ab
1588 12:28:56.747410 PCI: 00:1e.3 cmd <- 02
1589 12:28:56.750081 PCI: 00:1f.0 subsystem <- 8086/a087
1590 12:28:56.753973 PCI: 00:1f.0 cmd <- 407
1591 12:28:56.757226 PCI: 00:1f.3 subsystem <- 8086/a0c8
1592 12:28:56.760447 PCI: 00:1f.3 cmd <- 02
1593 12:28:56.763452 PCI: 00:1f.5 subsystem <- 8086/a0a4
1594 12:28:56.766754 PCI: 00:1f.5 cmd <- 406
1595 12:28:56.770508 PCI: 01:00.0 cmd <- 02
1596 12:28:56.774792 done.
1597 12:28:56.778542 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1598 12:28:56.781755 Initializing devices...
1599 12:28:56.785061 Root Device init
1600 12:28:56.788242 Chrome EC: Set SMI mask to 0x0000000000000000
1601 12:28:56.796621 Chrome EC: clear events_b mask to 0x0000000000000000
1602 12:28:56.803075 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1603 12:28:56.809520 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1604 12:28:56.815909 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1605 12:28:56.819281 Chrome EC: Set WAKE mask to 0x0000000000000000
1606 12:28:56.827597 fw_config match found: DB_USB=USB3_ACTIVE
1607 12:28:56.830649 Configure Right Type-C port orientation for retimer
1608 12:28:56.833896 Root Device init finished in 47 msecs
1609 12:28:56.838467 PCI: 00:00.0 init
1610 12:28:56.841622 CPU TDP = 9 Watts
1611 12:28:56.841880 CPU PL1 = 9 Watts
1612 12:28:56.844976 CPU PL2 = 40 Watts
1613 12:28:56.848022 CPU PL4 = 83 Watts
1614 12:28:56.851469 PCI: 00:00.0 init finished in 8 msecs
1615 12:28:56.851796 PCI: 00:02.0 init
1616 12:28:56.854517 GMA: Found VBT in CBFS
1617 12:28:56.858218 GMA: Found valid VBT in CBFS
1618 12:28:56.864631 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1619 12:28:56.871211 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1620 12:28:56.875021 PCI: 00:02.0 init finished in 18 msecs
1621 12:28:56.878215 PCI: 00:05.0 init
1622 12:28:56.881110 PCI: 00:05.0 init finished in 0 msecs
1623 12:28:56.884515 PCI: 00:08.0 init
1624 12:28:56.887806 PCI: 00:08.0 init finished in 0 msecs
1625 12:28:56.891005 PCI: 00:14.0 init
1626 12:28:56.894765 PCI: 00:14.0 init finished in 0 msecs
1627 12:28:56.897982 PCI: 00:14.2 init
1628 12:28:56.900959 PCI: 00:14.2 init finished in 0 msecs
1629 12:28:56.904307 PCI: 00:15.0 init
1630 12:28:56.907336 I2C bus 0 version 0x3230302a
1631 12:28:56.910951 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1632 12:28:56.914022 PCI: 00:15.0 init finished in 6 msecs
1633 12:28:56.914246 PCI: 00:15.1 init
1634 12:28:56.917132 I2C bus 1 version 0x3230302a
1635 12:28:56.920711 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1636 12:28:56.927393 PCI: 00:15.1 init finished in 6 msecs
1637 12:28:56.927709 PCI: 00:15.2 init
1638 12:28:56.930333 I2C bus 2 version 0x3230302a
1639 12:28:56.933686 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1640 12:28:56.936952 PCI: 00:15.2 init finished in 6 msecs
1641 12:28:56.940771 PCI: 00:15.3 init
1642 12:28:56.943846 I2C bus 3 version 0x3230302a
1643 12:28:56.947809 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1644 12:28:56.950776 PCI: 00:15.3 init finished in 6 msecs
1645 12:28:56.954200 PCI: 00:16.0 init
1646 12:28:56.957377 PCI: 00:16.0 init finished in 0 msecs
1647 12:28:56.960343 PCI: 00:19.1 init
1648 12:28:56.964592 I2C bus 5 version 0x3230302a
1649 12:28:56.967527 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1650 12:28:56.970863 PCI: 00:19.1 init finished in 6 msecs
1651 12:28:56.973526 PCI: 00:1d.0 init
1652 12:28:56.973729 Initializing PCH PCIe bridge.
1653 12:28:56.977344
1654 12:28:56.980502 PCI: 00:1d.0 init finished in 3 msecs
1655 12:28:56.983580 PCI: 00:1f.0 init
1656 12:28:56.986784 IOAPIC: Initializing IOAPIC at 0xfec00000
1657 12:28:56.990574 IOAPIC: Bootstrap Processor Local APIC = 0x00
1658 12:28:56.993848 IOAPIC: ID = 0x02
1659 12:28:56.997078 IOAPIC: Dumping registers
1660 12:28:56.997342 reg 0x0000: 0x02000000
1661 12:28:57.000179 reg 0x0001: 0x00770020
1662 12:28:57.003307 reg 0x0002: 0x00000000
1663 12:28:57.006612 PCI: 00:1f.0 init finished in 21 msecs
1664 12:28:57.010507 PCI: 00:1f.2 init
1665 12:28:57.013459 Disabling ACPI via APMC.
1666 12:28:57.017157 APMC done.
1667 12:28:57.020314 PCI: 00:1f.2 init finished in 5 msecs
1668 12:28:57.031054 PCI: 01:00.0 init
1669 12:28:57.034876 PCI: 01:00.0 init finished in 0 msecs
1670 12:28:57.037997 PNP: 0c09.0 init
1671 12:28:57.041105 Google Chrome EC uptime: 8.410 seconds
1672 12:28:57.047977 Google Chrome AP resets since EC boot: 1
1673 12:28:57.051359 Google Chrome most recent AP reset causes:
1674 12:28:57.054521 0.347: 32775 shutdown: entering G3
1675 12:28:57.061326 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1676 12:28:57.064471 PNP: 0c09.0 init finished in 22 msecs
1677 12:28:57.069949 Devices initialized
1678 12:28:57.073143 Show all devs... After init.
1679 12:28:57.076368 Root Device: enabled 1
1680 12:28:57.076462 DOMAIN: 0000: enabled 1
1681 12:28:57.080171 CPU_CLUSTER: 0: enabled 1
1682 12:28:57.083292 PCI: 00:00.0: enabled 1
1683 12:28:57.086323 PCI: 00:02.0: enabled 1
1684 12:28:57.086406 PCI: 00:04.0: enabled 1
1685 12:28:57.089706 PCI: 00:05.0: enabled 1
1686 12:28:57.093500 PCI: 00:06.0: enabled 0
1687 12:28:57.096729 PCI: 00:07.0: enabled 0
1688 12:28:57.096812 PCI: 00:07.1: enabled 0
1689 12:28:57.099802 PCI: 00:07.2: enabled 0
1690 12:28:57.102931 PCI: 00:07.3: enabled 0
1691 12:28:57.106777 PCI: 00:08.0: enabled 1
1692 12:28:57.106862 PCI: 00:09.0: enabled 0
1693 12:28:57.109932 PCI: 00:0a.0: enabled 0
1694 12:28:57.112912 PCI: 00:0d.0: enabled 1
1695 12:28:57.112995 PCI: 00:0d.1: enabled 0
1696 12:28:57.116135
1697 12:28:57.116264 PCI: 00:0d.2: enabled 0
1698 12:28:57.119955 PCI: 00:0d.3: enabled 0
1699 12:28:57.123171 PCI: 00:0e.0: enabled 0
1700 12:28:57.123255 PCI: 00:10.2: enabled 1
1701 12:28:57.126221 PCI: 00:10.6: enabled 0
1702 12:28:57.129969 PCI: 00:10.7: enabled 0
1703 12:28:57.133188 PCI: 00:12.0: enabled 0
1704 12:28:57.133271 PCI: 00:12.6: enabled 0
1705 12:28:57.136468 PCI: 00:13.0: enabled 0
1706 12:28:57.139661 PCI: 00:14.0: enabled 1
1707 12:28:57.143673 PCI: 00:14.1: enabled 0
1708 12:28:57.143756 PCI: 00:14.2: enabled 1
1709 12:28:57.146067 PCI: 00:14.3: enabled 1
1710 12:28:57.150068 PCI: 00:15.0: enabled 1
1711 12:28:57.153283 PCI: 00:15.1: enabled 1
1712 12:28:57.153371 PCI: 00:15.2: enabled 1
1713 12:28:57.156586 PCI: 00:15.3: enabled 1
1714 12:28:57.159838 PCI: 00:16.0: enabled 1
1715 12:28:57.159921 PCI: 00:16.1: enabled 0
1716 12:28:57.163026 PCI: 00:16.2: enabled 0
1717 12:28:57.165990 PCI: 00:16.3: enabled 0
1718 12:28:57.169383 PCI: 00:16.4: enabled 0
1719 12:28:57.169465 PCI: 00:16.5: enabled 0
1720 12:28:57.173148 PCI: 00:17.0: enabled 0
1721 12:28:57.176362 PCI: 00:19.0: enabled 0
1722 12:28:57.179608 PCI: 00:19.1: enabled 1
1723 12:28:57.179692 PCI: 00:19.2: enabled 0
1724 12:28:57.182843 PCI: 00:1c.0: enabled 1
1725 12:28:57.185950 PCI: 00:1c.1: enabled 0
1726 12:28:57.189265 PCI: 00:1c.2: enabled 0
1727 12:28:57.189348 PCI: 00:1c.3: enabled 0
1728 12:28:57.193193 PCI: 00:1c.4: enabled 0
1729 12:28:57.196264 PCI: 00:1c.5: enabled 0
1730 12:28:57.199573 PCI: 00:1c.6: enabled 1
1731 12:28:57.199656 PCI: 00:1c.7: enabled 0
1732 12:28:57.202713 PCI: 00:1d.0: enabled 1
1733 12:28:57.205970 PCI: 00:1d.1: enabled 0
1734 12:28:57.206168 PCI: 00:1d.2: enabled 1
1735 12:28:57.209687 PCI: 00:1d.3: enabled 0
1736 12:28:57.212876 PCI: 00:1e.0: enabled 1
1737 12:28:57.216024 PCI: 00:1e.1: enabled 0
1738 12:28:57.216107 PCI: 00:1e.2: enabled 1
1739 12:28:57.219112 PCI: 00:1e.3: enabled 1
1740 12:28:57.222407 PCI: 00:1f.0: enabled 1
1741 12:28:57.225995 PCI: 00:1f.1: enabled 0
1742 12:28:57.226099 PCI: 00:1f.2: enabled 1
1743 12:28:57.229237 PCI: 00:1f.3: enabled 1
1744 12:28:57.232992 PCI: 00:1f.4: enabled 0
1745 12:28:57.236120 PCI: 00:1f.5: enabled 1
1746 12:28:57.236232 PCI: 00:1f.6: enabled 0
1747 12:28:57.239727 PCI: 00:1f.7: enabled 0
1748 12:28:57.242959 APIC: 00: enabled 1
1749 12:28:57.243384 GENERIC: 0.0: enabled 1
1750 12:28:57.246140 GENERIC: 0.0: enabled 1
1751 12:28:57.249441 GENERIC: 1.0: enabled 1
1752 12:28:57.252775 GENERIC: 0.0: enabled 1
1753 12:28:57.253200 GENERIC: 1.0: enabled 1
1754 12:28:57.255945 USB0 port 0: enabled 1
1755 12:28:57.259790 GENERIC: 0.0: enabled 1
1756 12:28:57.260248 USB0 port 0: enabled 1
1757 12:28:57.262851 GENERIC: 0.0: enabled 1
1758 12:28:57.266021 I2C: 00:1a: enabled 1
1759 12:28:57.269145 I2C: 00:31: enabled 1
1760 12:28:57.269451 I2C: 00:32: enabled 1
1761 12:28:57.272429 I2C: 00:10: enabled 1
1762 12:28:57.275512 I2C: 00:15: enabled 1
1763 12:28:57.275755 GENERIC: 0.0: enabled 0
1764 12:28:57.278900 GENERIC: 1.0: enabled 0
1765 12:28:57.282491 GENERIC: 0.0: enabled 1
1766 12:28:57.282679 SPI: 00: enabled 1
1767 12:28:57.285613 SPI: 00: enabled 1
1768 12:28:57.288769 PNP: 0c09.0: enabled 1
1769 12:28:57.288957 GENERIC: 0.0: enabled 1
1770 12:28:57.291996 USB3 port 0: enabled 1
1771 12:28:57.295946 USB3 port 1: enabled 1
1772 12:28:57.299206 USB3 port 2: enabled 0
1773 12:28:57.299399 USB3 port 3: enabled 0
1774 12:28:57.302224 USB2 port 0: enabled 0
1775 12:28:57.305364 USB2 port 1: enabled 1
1776 12:28:57.305554 USB2 port 2: enabled 1
1777 12:28:57.309271 USB2 port 3: enabled 0
1778 12:28:57.312503 USB2 port 4: enabled 1
1779 12:28:57.315522 USB2 port 5: enabled 0
1780 12:28:57.315712 USB2 port 6: enabled 0
1781 12:28:57.318558 USB2 port 7: enabled 0
1782 12:28:57.322410 USB2 port 8: enabled 0
1783 12:28:57.322596 USB2 port 9: enabled 0
1784 12:28:57.325321 USB3 port 0: enabled 0
1785 12:28:57.328483 USB3 port 1: enabled 1
1786 12:28:57.328736 USB3 port 2: enabled 0
1787 12:28:57.331742 USB3 port 3: enabled 0
1788 12:28:57.335589 GENERIC: 0.0: enabled 1
1789 12:28:57.338778 GENERIC: 1.0: enabled 1
1790 12:28:57.338947 APIC: 01: enabled 1
1791 12:28:57.342007 APIC: 05: enabled 1
1792 12:28:57.342193 APIC: 06: enabled 1
1793 12:28:57.345205
1794 12:28:57.345388 APIC: 03: enabled 1
1795 12:28:57.348983 APIC: 02: enabled 1
1796 12:28:57.349166 APIC: 04: enabled 1
1797 12:28:57.352077 APIC: 07: enabled 1
1798 12:28:57.355422 PCI: 01:00.0: enabled 1
1799 12:28:57.358638 BS: BS_DEV_INIT run times (exec / console): 35 / 540 ms
1800 12:28:57.365386 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1801 12:28:57.368310 ELOG: NV offset 0xf30000 size 0x1000
1802 12:28:57.375352 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1803 12:28:57.381758 ELOG: Event(17) added with size 13 at 2022-12-01 12:28:57 UTC
1804 12:28:57.388666 ELOG: Event(92) added with size 9 at 2022-12-01 12:28:57 UTC
1805 12:28:57.395227 ELOG: Event(93) added with size 9 at 2022-12-01 12:28:57 UTC
1806 12:28:57.401676 ELOG: Event(9E) added with size 10 at 2022-12-01 12:28:57 UTC
1807 12:28:57.407943 ELOG: Event(9F) added with size 14 at 2022-12-01 12:28:57 UTC
1808 12:28:57.414743 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1809 12:28:57.421549 ELOG: Event(A1) added with size 10 at 2022-12-01 12:28:57 UTC
1810 12:28:57.424803 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1811 12:28:57.431033 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1812 12:28:57.434726 Finalize devices...
1813 12:28:57.434923 Devices finalized
1814 12:28:57.441238 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1815 12:28:57.447561 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1816 12:28:57.450825 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1817 12:28:57.457920 ME: HFSTS1 : 0x80030055
1818 12:28:57.461151 ME: HFSTS2 : 0x30280116
1819 12:28:57.464385 ME: HFSTS3 : 0x00000050
1820 12:28:57.470799 ME: HFSTS4 : 0x00004000
1821 12:28:57.474058 ME: HFSTS5 : 0x00000000
1822 12:28:57.480926 ME: HFSTS6 : 0x00400006
1823 12:28:57.484117 ME: Manufacturing Mode : YES
1824 12:28:57.487390 ME: SPI Protection Mode Enabled : NO
1825 12:28:57.491041 ME: FW Partition Table : OK
1826 12:28:57.494195 ME: Bringup Loader Failure : NO
1827 12:28:57.497441 ME: Firmware Init Complete : NO
1828 12:28:57.500562 ME: Boot Options Present : NO
1829 12:28:57.504400 ME: Update In Progress : NO
1830 12:28:57.510640 ME: D0i3 Support : YES
1831 12:28:57.513833 ME: Low Power State Enabled : NO
1832 12:28:57.517455 ME: CPU Replaced : YES
1833 12:28:57.520645 ME: CPU Replacement Valid : YES
1834 12:28:57.523926 ME: Current Working State : 5
1835 12:28:57.527619 ME: Current Operation State : 1
1836 12:28:57.530726 ME: Current Operation Mode : 3
1837 12:28:57.533835 ME: Error Code : 0
1838 12:28:57.537099 ME: Enhanced Debug Mode : NO
1839 12:28:57.544231 ME: CPU Debug Disabled : YES
1840 12:28:57.547390 ME: TXT Support : NO
1841 12:28:57.553759 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1842 12:28:57.560806 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1843 12:28:57.563924 CBFS: 'fallback/slic' not found.
1844 12:28:57.567162 ACPI: Writing ACPI tables at 76b01000.
1845 12:28:57.570390 ACPI: * FACS
1846 12:28:57.570730 ACPI: * DSDT
1847 12:28:57.573927 Ramoops buffer: 0x100000@0x76a00000.
1848 12:28:57.580449 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1849 12:28:57.583826 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1850 12:28:57.587026 Google Chrome EC: version:
1851 12:28:57.590120 ro: voema_v2.0.7540-147f8d37d1
1852 12:28:57.593889 rw: voema_v2.0.7540-147f8d37d1
1853 12:28:57.597033 running image: 2
1854 12:28:57.603347 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1855 12:28:57.607178 ACPI: * FADT
1856 12:28:57.607474 SCI is IRQ9
1857 12:28:57.610219 ACPI: added table 1/32, length now 40
1858 12:28:57.613342 ACPI: * SSDT
1859 12:28:57.616435 Found 1 CPU(s) with 8 core(s) each.
1860 12:28:57.619725 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1861 12:28:57.623424 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1862 12:28:57.630326 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1863 12:28:57.633233 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1864 12:28:57.640138 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1865 12:28:57.643255 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1866 12:28:57.646328
1867 12:28:57.649613 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1868 12:28:57.656568 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1869 12:28:57.663147 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1870 12:28:57.666307 \_SB.PCI0.RP09: Added StorageD3Enable property
1871 12:28:57.669395 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1872 12:28:57.676106 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1873 12:28:57.679422 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1874 12:28:57.683224 PS2K: Passing 80 keymaps to kernel
1875 12:28:57.686294
1876 12:28:57.689405 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1877 12:28:57.692569
1878 12:28:57.695796 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1879 12:28:57.702922 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1880 12:28:57.709544 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1881 12:28:57.715957 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1882 12:28:57.722909 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1883 12:28:57.729241 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1884 12:28:57.735645 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1885 12:28:57.739133 ACPI: added table 2/32, length now 44
1886 12:28:57.742192 ACPI: * MCFG
1887 12:28:57.746025 ACPI: added table 3/32, length now 48
1888 12:28:57.749333 ACPI: * TPM2
1889 12:28:57.752396 TPM2 log created at 0x769f0000
1890 12:28:57.755519 ACPI: added table 4/32, length now 52
1891 12:28:57.755637 ACPI: * MADT
1892 12:28:57.758924 SCI is IRQ9
1893 12:28:57.762799 ACPI: added table 5/32, length now 56
1894 12:28:57.762917 current = 76b09850
1895 12:28:57.765819 ACPI: * DMAR
1896 12:28:57.769067 ACPI: added table 6/32, length now 60
1897 12:28:57.772308 ACPI: added table 7/32, length now 64
1898 12:28:57.775553 ACPI: * HPET
1899 12:28:57.778755 ACPI: added table 8/32, length now 68
1900 12:28:57.778873 ACPI: done.
1901 12:28:57.781753 ACPI tables: 35216 bytes.
1902 12:28:57.785695 smbios_write_tables: 769ef000
1903 12:28:57.788868 EC returned error result code 3
1904 12:28:57.792027 Couldn't obtain OEM name from CBI
1905 12:28:57.795285 Create SMBIOS type 16
1906 12:28:57.799027 Create SMBIOS type 17
1907 12:28:57.799171 GENERIC: 0.0 (WIFI Device)
1908 12:28:57.802194 SMBIOS tables: 1750 bytes.
1909 12:28:57.805386 Writing table forward entry at 0x00000500
1910 12:28:57.808619
1911 12:28:57.811837 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1912 12:28:57.815395 Writing coreboot table at 0x76b25000
1913 12:28:57.818598
1914 12:28:57.821889 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1915 12:28:57.829028 1. 0000000000001000-000000000009ffff: RAM
1916 12:28:57.832264 2. 00000000000a0000-00000000000fffff: RESERVED
1917 12:28:57.835285 3. 0000000000100000-00000000769eefff: RAM
1918 12:28:57.841812 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1919 12:28:57.848372 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1920 12:28:57.852199 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1921 12:28:57.858635 7. 0000000077000000-000000007fbfffff: RESERVED
1922 12:28:57.862026 8. 00000000c0000000-00000000cfffffff: RESERVED
1923 12:28:57.868453 9. 00000000f8000000-00000000f9ffffff: RESERVED
1924 12:28:57.871619 10. 00000000fb000000-00000000fb000fff: RESERVED
1925 12:28:57.878399 11. 00000000fe000000-00000000fe00ffff: RESERVED
1926 12:28:57.881406 12. 00000000fed80000-00000000fed87fff: RESERVED
1927 12:28:57.885264 13. 00000000fed90000-00000000fed92fff: RESERVED
1928 12:28:57.891636 14. 00000000feda0000-00000000feda1fff: RESERVED
1929 12:28:57.894877 15. 00000000fedc0000-00000000feddffff: RESERVED
1930 12:28:57.901816 16. 0000000100000000-00000002803fffff: RAM
1931 12:28:57.902102 Passing 4 GPIOs to payload:
1932 12:28:57.908108 NAME | PORT | POLARITY | VALUE
1933 12:28:57.914478 lid | undefined | high | high
1934 12:28:57.918070 power | undefined | high | low
1935 12:28:57.924673 oprom | undefined | high | low
1936 12:28:57.927888 EC in RW | 0x000000e5 | high | high
1937 12:28:57.935030 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5f28
1938 12:28:57.937945 coreboot table: 1576 bytes.
1939 12:28:57.941111 IMD ROOT 0. 0x76fff000 0x00001000
1940 12:28:57.944298 IMD SMALL 1. 0x76ffe000 0x00001000
1941 12:28:57.951180 FSP MEMORY 2. 0x76c4e000 0x003b0000
1942 12:28:57.954396 VPD 3. 0x76c4d000 0x00000367
1943 12:28:57.958197 RO MCACHE 4. 0x76c4c000 0x00000fdc
1944 12:28:57.961400 CONSOLE 5. 0x76c2c000 0x00020000
1945 12:28:57.964597 FMAP 6. 0x76c2b000 0x00000578
1946 12:28:57.967826 TIME STAMP 7. 0x76c2a000 0x00000910
1947 12:28:57.970972 VBOOT WORK 8. 0x76c16000 0x00014000
1948 12:28:57.974297 ROMSTG STCK 9. 0x76c15000 0x00001000
1949 12:28:57.981116 AFTER CAR 10. 0x76c0a000 0x0000b000
1950 12:28:57.984317 RAMSTAGE 11. 0x76b97000 0x00073000
1951 12:28:57.987531 REFCODE 12. 0x76b42000 0x00055000
1952 12:28:57.990868 SMM BACKUP 13. 0x76b32000 0x00010000
1953 12:28:57.994291 4f444749 14. 0x76b30000 0x00002000
1954 12:28:57.997600 EXT VBT15. 0x76b2d000 0x0000219f
1955 12:28:58.000893 COREBOOT 16. 0x76b25000 0x00008000
1956 12:28:58.004272 ACPI 17. 0x76b01000 0x00024000
1957 12:28:58.007706 ACPI GNVS 18. 0x76b00000 0x00001000
1958 12:28:58.014449 RAMOOPS 19. 0x76a00000 0x00100000
1959 12:28:58.017773 TPM2 TCGLOG20. 0x769f0000 0x00010000
1960 12:28:58.020997 SMBIOS 21. 0x769ef000 0x00000800
1961 12:28:58.021215 IMD small region:
1962 12:28:58.027498 IMD ROOT 0. 0x76ffec00 0x00000400
1963 12:28:58.030896 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1964 12:28:58.034076 POWER STATE 2. 0x76ffeb80 0x00000044
1965 12:28:58.037488 ROMSTAGE 3. 0x76ffeb60 0x00000004
1966 12:28:58.040514 MEM INFO 4. 0x76ffe980 0x000001e0
1967 12:28:58.047468 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1968 12:28:58.050589 MTRR: Physical address space:
1969 12:28:58.057180 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1970 12:28:58.064244 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1971 12:28:58.070843 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1972 12:28:58.077062 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1973 12:28:58.080252 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1974 12:28:58.087319 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1975 12:28:58.093657 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1976 12:28:58.097088 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 12:28:58.104096 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 12:28:58.107127 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 12:28:58.110449 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 12:28:58.113591 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 12:28:58.120241 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 12:28:58.123303 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 12:28:58.127061 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 12:28:58.130323 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 12:28:58.137046 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 12:28:58.140254 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 12:28:58.143499 call enable_fixed_mtrr()
1988 12:28:58.146566 CPU physical address size: 39 bits
1989 12:28:58.149773 MTRR: default type WB/UC MTRR counts: 6/6.
1990 12:28:58.153569 MTRR: UC selected as default type.
1991 12:28:58.159995 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1992 12:28:58.167157 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1993 12:28:58.173547 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1994 12:28:58.179963 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1995 12:28:58.186816 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1996 12:28:58.193076 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1997 12:28:58.193170
1998 12:28:58.196529 MTRR check
1999 12:28:58.196613 Fixed MTRRs : Enabled
2000 12:28:58.199747 Variable MTRRs: Enabled
2001 12:28:58.199838
2002 12:28:58.202825 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 12:28:58.209589 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 12:28:58.212823 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 12:28:58.216306 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 12:28:58.219352 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 12:28:58.222637 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 12:28:58.229763 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 12:28:58.232911 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 12:28:58.236155 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 12:28:58.239315 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 12:28:58.245777 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 12:28:58.252400 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2014 12:28:58.255707 call enable_fixed_mtrr()
2015 12:28:58.260347 Checking cr50 for pending updates
2016 12:28:58.260477 CPU physical address size: 39 bits
2017 12:28:58.266927 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 12:28:58.270164 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 12:28:58.273521 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 12:28:58.276924 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 12:28:58.280080 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 12:28:58.283226
2023 12:28:58.287193 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 12:28:58.290445 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 12:28:58.293730 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 12:28:58.296844 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 12:28:58.303343 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 12:28:58.306566 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 12:28:58.309895 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 12:28:58.316711 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 12:28:58.316893 call enable_fixed_mtrr()
2032 12:28:58.323609 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 12:28:58.326813 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 12:28:58.330009 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 12:28:58.333332 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 12:28:58.340206 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 12:28:58.343582 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 12:28:58.346742 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 12:28:58.350284 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 12:28:58.356540 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 12:28:58.359922 CPU physical address size: 39 bits
2042 12:28:58.363166 call enable_fixed_mtrr()
2043 12:28:58.367081 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 12:28:58.370190 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 12:28:58.376577 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 12:28:58.379634 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 12:28:58.382956 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 12:28:58.386758 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 12:28:58.393082 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 12:28:58.396231 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 12:28:58.399983 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 12:28:58.403213 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 12:28:58.409474 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 12:28:58.413112 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 12:28:58.416307 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 12:28:58.423073 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 12:28:58.426198 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 12:28:58.429947 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 12:28:58.433109 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 12:28:58.439324 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 12:28:58.443019 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 12:28:58.446338 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 12:28:58.449442 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 12:28:58.453086 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 12:28:58.456225
2066 12:28:58.459613 call enable_fixed_mtrr()
2067 12:28:58.459698 call enable_fixed_mtrr()
2068 12:28:58.462784 CPU physical address size: 39 bits
2069 12:28:58.465977 CPU physical address size: 39 bits
2070 12:28:58.469216
2071 12:28:58.472393 CPU physical address size: 39 bits
2072 12:28:58.476953 Reading cr50 TPM mode
2073 12:28:58.480343 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 12:28:58.484024 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 12:28:58.486701 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 12:28:58.490097 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 12:28:58.493327 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 12:28:58.499914 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 12:28:58.503262 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 12:28:58.507227 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 12:28:58.510354 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 12:28:58.516988 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 12:28:58.520113 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 12:28:58.523439 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 12:28:58.530387 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 12:28:58.530474 call enable_fixed_mtrr()
2087 12:28:58.536691 MTRR: Fixed MSR 0x259 0x0000000000000000
2088 12:28:58.539840 MTRR: Fixed MSR 0x268 0x0606060606060606
2089 12:28:58.543591 MTRR: Fixed MSR 0x269 0x0606060606060606
2090 12:28:58.546746 MTRR: Fixed MSR 0x26a 0x0606060606060606
2091 12:28:58.553128 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 12:28:58.557084 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 12:28:58.559875 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 12:28:58.563067 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 12:28:58.566287 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 12:28:58.570236
2097 12:28:58.573478 CPU physical address size: 39 bits
2098 12:28:58.576570 call enable_fixed_mtrr()
2099 12:28:58.583134 BS: BS_PAYLOAD_LOAD entry times (exec / console): 221 / 6 ms
2100 12:28:58.587083 CPU physical address size: 39 bits
2101 12:28:58.593392 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 12:28:58.596476 Checking segment from ROM address 0xffc02b38
2103 12:28:58.603393 Checking segment from ROM address 0xffc02b54
2104 12:28:58.606539 Loading segment from ROM address 0xffc02b38
2105 12:28:58.609748 code (compression=0)
2106 12:28:58.616686 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 12:28:58.626192 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 12:28:58.630018 it's not compressed!
2109 12:28:58.767278 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 12:28:58.774294 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 12:28:58.780669 Loading segment from ROM address 0xffc02b54
2112 12:28:58.780796 Entry Point 0x30000000
2113 12:28:58.783887 Loaded segments
2114 12:28:58.790929 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2115 12:28:58.834530 Finalizing chipset.
2116 12:28:58.837701 Finalizing SMM.
2117 12:28:58.838196 APMC done.
2118 12:28:58.844045 BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms
2119 12:28:58.847982 mp_park_aps done after 0 msecs.
2120 12:28:58.850953 Jumping to boot code at 0x30000000(0x76b25000)
2121 12:28:58.860687 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 12:28:58.861174
2123 12:28:58.861553
2124 12:28:58.864413
2125 12:28:58.864849
2126 12:28:58.866087 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2127 12:28:58.866647 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2128 12:28:58.867097 Setting prompt string to ['volteer:']
2129 12:28:58.867499 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2130 12:28:58.868359 Starting depthcharge on Voema...
2131 12:28:58.868733
2132 12:28:58.873750 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2133 12:28:58.874261
2134 12:28:58.880688 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2135 12:28:58.881159
2136 12:28:58.887162 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2137 12:28:58.887598
2138 12:28:58.890372 Failed to find eMMC card reader
2139 12:28:58.890850
2140 12:28:58.893569 Wipe memory regions:
2141 12:28:58.894077
2142 12:28:58.897382 [0x00000000001000, 0x000000000a0000)
2143 12:28:58.897879
2144 12:28:58.900370 [0x00000000100000, 0x00000030000000)
2145 12:28:58.900989
2146 12:28:58.929636 [0x00000032662db0, 0x000000769ef000)
2147 12:28:58.930201
2148 12:28:58.968014 [0x00000100000000, 0x00000280400000)
2149 12:28:58.968143
2150 12:28:59.175552 ec_init: CrosEC protocol v3 supported (256, 256)
2151 12:28:59.176064
2152 12:28:59.182128 update_port_state: port C0 state: usb enable 1 mux conn 0
2153 12:28:59.182604
2154 12:28:59.192277 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2155 12:28:59.192717
2156 12:28:59.195511 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2157 12:28:59.195993
2158 12:28:59.202019 send_conn_disc_msg: pmc_send_cmd succeeded
2159 12:28:59.202535
2160 12:28:59.633389 R8152: Initializing
2161 12:28:59.633936
2162 12:28:59.636953 Version 6 (ocp_data = 5c30)
2163 12:28:59.637438
2164 12:28:59.639897 R8152: Done initializing
2165 12:28:59.640332
2166 12:28:59.643018 Adding net device
2167 12:28:59.643529
2168 12:28:59.948560 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2169 12:28:59.949166
2170 12:28:59.949561
2171 12:28:59.949918
2172 12:28:59.952227 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 12:29:00.054104 volteer: tftpboot 192.168.201.1 8193657/tftp-deploy-_wlj5hov/kernel/bzImage 8193657/tftp-deploy-_wlj5hov/kernel/cmdline 8193657/tftp-deploy-_wlj5hov/ramdisk/ramdisk.cpio.gz
2175 12:29:00.054895 Setting prompt string to 'Starting kernel'
2176 12:29:00.055286 Setting prompt string to ['Starting kernel']
2177 12:29:00.055674 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2178 12:29:00.056088 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2179 12:29:00.060098 tftpboot 192.168.201.1 8193657/tftp-deploy-_wlj5hov/kernel/bzImoy-_wlj5hov/kernel/cmdline 8193657/tftp-deploy-_wlj5hov/ramdisk/ramdisk.cpio.gz
2180 12:29:00.060552
2181 12:29:00.060933 Waiting for link
2182 12:29:00.061253
2183 12:29:00.264373 done.
2184 12:29:00.264930
2185 12:29:00.265320 MAC: 00:24:32:30:7c:e4
2186 12:29:00.265650
2187 12:29:00.268230 Sending DHCP discover... done.
2188 12:29:00.268711
2189 12:29:00.271247 Waiting for reply... done.
2190 12:29:00.271683
2191 12:29:00.274426 Sending DHCP request... done.
2192 12:29:00.274907
2193 12:29:00.280803 Waiting for reply... done.
2194 12:29:00.281282
2195 12:29:00.281656 My ip is 192.168.201.23
2196 12:29:00.281985
2197 12:29:00.284716 The DHCP server ip is 192.168.201.1
2198 12:29:00.287848
2199 12:29:00.290875 TFTP server IP predefined by user: 192.168.201.1
2200 12:29:00.291361
2201 12:29:00.297188 Bootfile predefined by user: 8193657/tftp-deploy-_wlj5hov/kernel/bzImage
2202 12:29:00.297674
2203 12:29:00.301008 Sending tftp read request... done.
2204 12:29:00.301591
2205 12:29:00.307923 Waiting for the transfer...
2206 12:29:00.308401
2207 12:29:00.997879 00000000 ################################################################
2208 12:29:00.998470
2209 12:29:01.697324 00080000 ################################################################
2210 12:29:01.698105
2211 12:29:02.275949 00100000 ################################################################
2212 12:29:02.276100
2213 12:29:02.824038 00180000 ################################################################
2214 12:29:02.824184
2215 12:29:03.389264 00200000 ################################################################
2216 12:29:03.389398
2217 12:29:03.934603 00280000 ################################################################
2218 12:29:03.934742
2219 12:29:04.479295 00300000 ################################################################
2220 12:29:04.479440
2221 12:29:05.014458 00380000 ################################################################
2222 12:29:05.014602
2223 12:29:05.539429 00400000 ################################################################
2224 12:29:05.539587
2225 12:29:06.069939 00480000 ################################################################
2226 12:29:06.070082
2227 12:29:06.590864 00500000 ################################################################
2228 12:29:06.591023
2229 12:29:07.122337 00580000 ################################################################
2230 12:29:07.122483
2231 12:29:07.652086 00600000 ################################################################
2232 12:29:07.652223
2233 12:29:08.023038 00680000 ############################################## done.
2234 12:29:08.023175
2235 12:29:08.026107 The bootfile was 7188368 bytes long.
2236 12:29:08.026209
2237 12:29:08.029343 Sending tftp read request... done.
2238 12:29:08.029418
2239 12:29:08.032685 Waiting for the transfer...
2240 12:29:08.032767
2241 12:29:08.551677 00000000 ################################################################
2242 12:29:08.551822
2243 12:29:09.088528 00080000 ################################################################
2244 12:29:09.088666
2245 12:29:09.616964 00100000 ################################################################
2246 12:29:09.617114
2247 12:29:10.152591 00180000 ################################################################
2248 12:29:10.152747
2249 12:29:10.681927 00200000 ################################################################
2250 12:29:10.682073
2251 12:29:11.253992 00280000 ################################################################
2252 12:29:11.254194
2253 12:29:11.838358 00300000 ################################################################
2254 12:29:11.838496
2255 12:29:12.405704 00380000 ################################################################
2256 12:29:12.405859
2257 12:29:12.951707 00400000 ################################################################
2258 12:29:12.951847
2259 12:29:13.502576 00480000 ################################################################
2260 12:29:13.502714
2261 12:29:14.051138 00500000 ################################################################
2262 12:29:14.051274
2263 12:29:14.585633 00580000 ################################################################
2264 12:29:14.585770
2265 12:29:15.144180 00600000 ################################################################
2266 12:29:15.144329
2267 12:29:15.708690 00680000 ################################################################
2268 12:29:15.708843
2269 12:29:16.289987 00700000 ################################################################
2270 12:29:16.290144
2271 12:29:16.823119 00780000 ################################################################
2272 12:29:16.823279
2273 12:29:16.996621 00800000 #################### done.
2274 12:29:16.996754
2275 12:29:16.999803 Sending tftp read request... done.
2276 12:29:16.999889
2277 12:29:17.002897 Waiting for the transfer...
2278 12:29:17.002982
2279 12:29:17.003049 00000000 # done.
2280 12:29:17.003114
2281 12:29:17.012867 Command line loaded dynamically from TFTP file: 8193657/tftp-deploy-_wlj5hov/kernel/cmdline
2282 12:29:17.012952
2283 12:29:17.026263 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2284 12:29:17.026351
2285 12:29:17.033737 Shutting down all USB controllers.
2286 12:29:17.033822
2287 12:29:17.033890 Removing current net device
2288 12:29:17.033954
2289 12:29:17.036726 Finalizing coreboot
2290 12:29:17.036811
2291 12:29:17.043074 Exiting depthcharge with code 4 at timestamp: 26819622
2292 12:29:17.043160
2293 12:29:17.043228
2294 12:29:17.043290 Starting kernel ...
2295 12:29:17.043351
2296 12:29:17.043421
2297 12:29:17.043513
2298 12:29:17.043881 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2299 12:29:17.043991 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2300 12:29:17.044067 Setting prompt string to ['Linux version [0-9]']
2301 12:29:17.044137 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2302 12:29:17.044207 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2304 12:33:42.044245 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2306 12:33:42.044570 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2308 12:33:42.044817 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2311 12:33:42.045205 end: 2 depthcharge-action (duration 00:05:00) [common]
2313 12:33:42.045432 Cleaning after the job
2314 12:33:42.045519 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193657/tftp-deploy-_wlj5hov/ramdisk
2315 12:33:42.046222 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193657/tftp-deploy-_wlj5hov/kernel
2316 12:33:42.046754 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193657/tftp-deploy-_wlj5hov/modules
2317 12:33:42.046944 start: 5.1 power-off (timeout 00:00:30) [common]
2318 12:33:42.047095 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2319 12:33:42.066705 >> Command sent successfully.
2320 12:33:42.068830 Returned 0 in 0 seconds
2321 12:33:42.169580 end: 5.1 power-off (duration 00:00:00) [common]
2323 12:33:42.169957 start: 5.2 read-feedback (timeout 00:10:00) [common]
2324 12:33:42.170230 Listened to connection for namespace 'common' for up to 1s
2325 12:33:43.174136 Finalising connection for namespace 'common'
2326 12:33:43.174324 Disconnecting from shell: Finalise
2327 12:33:43.275071 end: 5.2 read-feedback (duration 00:00:01) [common]
2328 12:33:43.275233 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8193657
2329 12:33:43.280776 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8193657
2330 12:33:43.280936 JobError: Your job cannot terminate cleanly.