Boot log: dell-latitude-5400-4305U-sarien

    1 12:28:36.395850  lava-dispatcher, installed at version: 2022.10
    2 12:28:36.396066  start: 0 validate
    3 12:28:36.396222  Start time: 2022-12-01 12:28:36.396214+00:00 (UTC)
    4 12:28:36.396372  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:28:36.396523  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221125.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:28:36.686469  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:28:36.686709  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:28:36.975689  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:28:36.975865  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:28:37.266554  validate duration: 0.87
   12 12:28:37.266882  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:28:37.267011  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:28:37.267127  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:28:37.267254  Not decompressing ramdisk as can be used compressed.
   16 12:28:37.267358  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221125.0/x86/rootfs.cpio.gz
   17 12:28:37.267438  saving as /var/lib/lava/dispatcher/tmp/8193654/tftp-deploy-siz69mjx/ramdisk/rootfs.cpio.gz
   18 12:28:37.267549  total size: 8415491 (8MB)
   19 12:28:37.268819  progress   0% (0MB)
   20 12:28:37.271335  progress   5% (0MB)
   21 12:28:37.273901  progress  10% (0MB)
   22 12:28:37.276448  progress  15% (1MB)
   23 12:28:37.279007  progress  20% (1MB)
   24 12:28:37.281687  progress  25% (2MB)
   25 12:28:37.284377  progress  30% (2MB)
   26 12:28:37.286880  progress  35% (2MB)
   27 12:28:37.289569  progress  40% (3MB)
   28 12:28:37.292259  progress  45% (3MB)
   29 12:28:37.294940  progress  50% (4MB)
   30 12:28:37.297628  progress  55% (4MB)
   31 12:28:37.300369  progress  60% (4MB)
   32 12:28:37.302651  progress  65% (5MB)
   33 12:28:37.305067  progress  70% (5MB)
   34 12:28:37.307514  progress  75% (6MB)
   35 12:28:37.309947  progress  80% (6MB)
   36 12:28:37.312388  progress  85% (6MB)
   37 12:28:37.314836  progress  90% (7MB)
   38 12:28:37.317115  progress  95% (7MB)
   39 12:28:37.319628  progress 100% (8MB)
   40 12:28:37.319947  8MB downloaded in 0.05s (153.19MB/s)
   41 12:28:37.320126  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 12:28:37.320434  end: 1.1 download-retry (duration 00:00:00) [common]
   44 12:28:37.320547  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 12:28:37.320648  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 12:28:37.320783  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 12:28:37.320861  saving as /var/lib/lava/dispatcher/tmp/8193654/tftp-deploy-siz69mjx/kernel/bzImage
   48 12:28:37.320950  total size: 7188368 (6MB)
   49 12:28:37.321022  No compression specified
   50 12:28:39.821135  progress   0% (0MB)
   51 12:28:39.823227  progress   5% (0MB)
   52 12:28:39.825308  progress  10% (0MB)
   53 12:28:39.827444  progress  15% (1MB)
   54 12:28:39.829519  progress  20% (1MB)
   55 12:28:39.831592  progress  25% (1MB)
   56 12:28:39.833646  progress  30% (2MB)
   57 12:28:39.835716  progress  35% (2MB)
   58 12:28:39.837748  progress  40% (2MB)
   59 12:28:39.839774  progress  45% (3MB)
   60 12:28:39.841799  progress  50% (3MB)
   61 12:28:39.843825  progress  55% (3MB)
   62 12:28:39.845838  progress  60% (4MB)
   63 12:28:39.847866  progress  65% (4MB)
   64 12:28:39.849884  progress  70% (4MB)
   65 12:28:39.851904  progress  75% (5MB)
   66 12:28:39.853919  progress  80% (5MB)
   67 12:28:39.855943  progress  85% (5MB)
   68 12:28:39.857976  progress  90% (6MB)
   69 12:28:39.859998  progress  95% (6MB)
   70 12:28:39.862027  progress 100% (6MB)
   71 12:28:39.862258  6MB downloaded in 2.54s (2.70MB/s)
   72 12:28:39.862432  end: 1.2.1 http-download (duration 00:00:03) [common]
   74 12:28:39.862720  end: 1.2 download-retry (duration 00:00:03) [common]
   75 12:28:39.862839  start: 1.3 download-retry (timeout 00:09:57) [common]
   76 12:28:39.862947  start: 1.3.1 http-download (timeout 00:09:57) [common]
   77 12:28:39.863072  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 12:28:39.863152  saving as /var/lib/lava/dispatcher/tmp/8193654/tftp-deploy-siz69mjx/modules/modules.tar
   79 12:28:39.863222  total size: 54724 (0MB)
   80 12:28:39.863298  Using unxz to decompress xz
   81 12:28:39.866992  progress  59% (0MB)
   82 12:28:39.867429  progress 100% (0MB)
   83 12:28:39.871250  0MB downloaded in 0.01s (6.51MB/s)
   84 12:28:39.871520  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 12:28:39.871826  end: 1.3 download-retry (duration 00:00:00) [common]
   87 12:28:39.871942  start: 1.4 prepare-tftp-overlay (timeout 00:09:57) [common]
   88 12:28:39.872055  start: 1.4.1 extract-nfsrootfs (timeout 00:09:57) [common]
   89 12:28:39.872167  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 12:28:39.872269  start: 1.4.2 lava-overlay (timeout 00:09:57) [common]
   91 12:28:39.872469  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y
   92 12:28:39.872595  makedir: /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin
   93 12:28:39.872698  makedir: /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/tests
   94 12:28:39.872791  makedir: /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/results
   95 12:28:39.872916  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-add-keys
   96 12:28:39.873077  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-add-sources
   97 12:28:39.873213  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-background-process-start
   98 12:28:39.873356  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-background-process-stop
   99 12:28:39.873492  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-common-functions
  100 12:28:39.873623  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-echo-ipv4
  101 12:28:39.873756  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-install-packages
  102 12:28:39.873891  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-installed-packages
  103 12:28:39.874023  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-os-build
  104 12:28:39.874150  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-probe-channel
  105 12:28:39.874286  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-probe-ip
  106 12:28:39.874419  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-target-ip
  107 12:28:39.874546  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-target-mac
  108 12:28:39.874677  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-target-storage
  109 12:28:39.874824  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-test-case
  110 12:28:39.874956  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-test-event
  111 12:28:39.875093  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-test-feedback
  112 12:28:39.875226  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-test-raise
  113 12:28:39.875365  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-test-reference
  114 12:28:39.875494  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-test-runner
  115 12:28:39.875630  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-test-set
  116 12:28:39.875761  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-test-shell
  117 12:28:39.875891  Updating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-install-packages (oe)
  118 12:28:39.876029  Updating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/bin/lava-installed-packages (oe)
  119 12:28:39.876151  Creating /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/environment
  120 12:28:39.876254  LAVA metadata
  121 12:28:39.876340  - LAVA_JOB_ID=8193654
  122 12:28:39.876417  - LAVA_DISPATCHER_IP=192.168.201.1
  123 12:28:39.876544  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:57) [common]
  124 12:28:39.876623  skipped lava-vland-overlay
  125 12:28:39.876716  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 12:28:39.876817  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:57) [common]
  127 12:28:39.876898  skipped lava-multinode-overlay
  128 12:28:39.876987  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 12:28:39.877090  start: 1.4.2.3 test-definition (timeout 00:09:57) [common]
  130 12:28:39.877179  Loading test definitions
  131 12:28:39.877293  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:57) [common]
  132 12:28:39.877382  Using /lava-8193654 at stage 0
  133 12:28:39.877714  uuid=8193654_1.4.2.3.1 testdef=None
  134 12:28:39.877818  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 12:28:39.877930  start: 1.4.2.3.2 test-overlay (timeout 00:09:57) [common]
  136 12:28:39.878501  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 12:28:39.878780  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:57) [common]
  139 12:28:39.879470  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 12:28:39.879757  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:57) [common]
  142 12:28:39.880410  runner path: /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/0/tests/0_dmesg test_uuid 8193654_1.4.2.3.1
  143 12:28:39.880586  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 12:28:39.880861  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:57) [common]
  146 12:28:39.880956  Using /lava-8193654 at stage 1
  147 12:28:39.881242  uuid=8193654_1.4.2.3.5 testdef=None
  148 12:28:39.881352  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 12:28:39.881456  start: 1.4.2.3.6 test-overlay (timeout 00:09:57) [common]
  150 12:28:39.881990  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 12:28:39.882259  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:57) [common]
  153 12:28:39.882943  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 12:28:39.883232  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:57) [common]
  156 12:28:39.883882  runner path: /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/1/tests/1_bootrr test_uuid 8193654_1.4.2.3.5
  157 12:28:39.884049  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 12:28:39.884298  Creating lava-test-runner.conf files
  160 12:28:39.884380  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/0 for stage 0
  161 12:28:39.884476  - 0_dmesg
  162 12:28:39.884566  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193654/lava-overlay-vuw0e72y/lava-8193654/1 for stage 1
  163 12:28:39.884664  - 1_bootrr
  164 12:28:39.884774  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 12:28:39.884875  start: 1.4.2.4 compress-overlay (timeout 00:09:57) [common]
  166 12:28:39.891993  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 12:28:39.892126  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:57) [common]
  168 12:28:39.892253  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 12:28:39.892356  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 12:28:39.892463  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
  171 12:28:40.096613  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 12:28:40.097005  start: 1.4.4 extract-modules (timeout 00:09:57) [common]
  173 12:28:40.097134  extracting modules file /var/lib/lava/dispatcher/tmp/8193654/tftp-deploy-siz69mjx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8193654/extract-overlay-ramdisk-rvlmme4n/ramdisk
  174 12:28:40.102322  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 12:28:40.102461  start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
  176 12:28:40.102565  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8193654/compress-overlay-nw7t0p39/overlay-1.4.2.4.tar.gz to ramdisk
  177 12:28:40.102652  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8193654/compress-overlay-nw7t0p39/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8193654/extract-overlay-ramdisk-rvlmme4n/ramdisk
  178 12:28:40.107177  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 12:28:40.107300  start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
  180 12:28:40.107414  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 12:28:40.107520  start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
  182 12:28:40.107618  Building ramdisk /var/lib/lava/dispatcher/tmp/8193654/extract-overlay-ramdisk-rvlmme4n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8193654/extract-overlay-ramdisk-rvlmme4n/ramdisk
  183 12:28:40.178549  >> 48044 blocks

  184 12:28:41.018100  rename /var/lib/lava/dispatcher/tmp/8193654/extract-overlay-ramdisk-rvlmme4n/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8193654/tftp-deploy-siz69mjx/ramdisk/ramdisk.cpio.gz
  185 12:28:41.018560  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 12:28:41.018706  start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
  187 12:28:41.018835  start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
  188 12:28:41.018947  No mkimage arch provided, not using FIT.
  189 12:28:41.019061  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 12:28:41.019163  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 12:28:41.019284  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 12:28:41.019394  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
  193 12:28:41.019486  No LXC device requested
  194 12:28:41.019585  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 12:28:41.019690  start: 1.6 deploy-device-env (timeout 00:09:56) [common]
  196 12:28:41.019790  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 12:28:41.019873  Checking files for TFTP limit of 4294967296 bytes.
  198 12:28:41.020371  end: 1 tftp-deploy (duration 00:00:04) [common]
  199 12:28:41.020503  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 12:28:41.020624  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 12:28:41.020768  substitutions:
  202 12:28:41.020854  - {DTB}: None
  203 12:28:41.020934  - {INITRD}: 8193654/tftp-deploy-siz69mjx/ramdisk/ramdisk.cpio.gz
  204 12:28:41.021007  - {KERNEL}: 8193654/tftp-deploy-siz69mjx/kernel/bzImage
  205 12:28:41.021076  - {LAVA_MAC}: None
  206 12:28:41.021151  - {PRESEED_CONFIG}: None
  207 12:28:41.021218  - {PRESEED_LOCAL}: None
  208 12:28:41.021283  - {RAMDISK}: 8193654/tftp-deploy-siz69mjx/ramdisk/ramdisk.cpio.gz
  209 12:28:41.021355  - {ROOT_PART}: None
  210 12:28:41.021420  - {ROOT}: None
  211 12:28:41.021484  - {SERVER_IP}: 192.168.201.1
  212 12:28:41.021554  - {TEE}: None
  213 12:28:41.021619  Parsed boot commands:
  214 12:28:41.021687  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 12:28:41.021861  Parsed boot commands: tftpboot 192.168.201.1 8193654/tftp-deploy-siz69mjx/kernel/bzImage 8193654/tftp-deploy-siz69mjx/kernel/cmdline 8193654/tftp-deploy-siz69mjx/ramdisk/ramdisk.cpio.gz
  216 12:28:41.021978  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 12:28:41.022090  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 12:28:41.022206  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 12:28:41.022317  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 12:28:41.022403  Not connected, no need to disconnect.
  221 12:28:41.022501  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 12:28:41.022600  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 12:28:41.022684  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-4305U-sarien-cbg-1'
  224 12:28:41.025703  Setting prompt string to ['lava-test: # ']
  225 12:28:41.026041  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 12:28:41.026175  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 12:28:41.026300  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 12:28:41.026410  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 12:28:41.026624  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=reboot'
  230 12:28:41.047496  >> Command sent successfully.

  231 12:28:41.049688  Returned 0 in 0 seconds
  232 12:28:41.150510  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 12:28:41.151156  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 12:28:41.151276  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 12:28:41.151416  Setting prompt string to 'Starting depthcharge on sarien...'
  237 12:28:41.151524  Changing prompt to 'Starting depthcharge on sarien...'
  238 12:28:41.151610  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  239 12:28:41.151909  [Enter `^Ec?' for help]
  240 12:28:55.783446  
  241 12:28:55.783619  
  242 12:28:55.791722  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
  243 12:28:55.796231  CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
  244 12:28:55.800918  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
  245 12:28:55.801187  
  246 12:28:55.806076  CPU: AES supported, TXT NOT supported, VT supported
  247 12:28:55.811511  MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
  248 12:28:55.816650  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
  249 12:28:55.820489  IGD: device id 3ea1 (rev 02) is Unknown
  250 12:28:55.823997  VBOOT: Loading verstage.
  251 12:28:55.827173  CBFS @ 1d00000 size 300000
  252 12:28:55.827721  
  253 12:28:55.833306  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  254 12:28:55.833589  
  255 12:28:55.836857  CBFS: Locating 'fallback/verstage'
  256 12:28:55.840277  CBFS: Found @ offset 10f6c0 size 1435c
  257 12:28:55.841002  
  258 12:28:55.855441  
  259 12:28:55.855771  
  260 12:28:55.855856  
  261 12:28:55.856449  
  262 12:28:55.864360  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
  263 12:28:55.871136  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
  264 12:28:55.874290  done! DID_VID 0x00281ae0
  265 12:28:55.875955  TPM ready after 0 ms
  266 12:28:55.876705  
  267 12:28:55.880252  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  268 12:28:55.981082  tlcl_send_startup: Startup return code is 0
  269 12:28:55.981429  
  270 12:28:55.982805  TPM: setup succeeded
  271 12:28:55.983084  
  272 12:28:56.001586  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
  273 12:28:56.002210  
  274 12:28:56.005425  Checking cr50 for recovery request
  275 12:28:56.015314  Phase 1
  276 12:28:56.020185  FMAP: Found "FLASH" version 1.1 at 1c10000.
  277 12:28:56.020777  
  278 12:28:56.025214  FMAP: base = fe000000 size = 2000000 #areas = 37
  279 12:28:56.029289  FMAP: area GBB found @ 1c11000 (978944 bytes)
  280 12:28:56.037006  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  281 12:28:56.037516  Phase 2
  282 12:28:56.038154  
  283 12:28:56.038643  Phase 3
  284 12:28:56.043309  FMAP: area GBB found @ 1c11000 (978944 bytes)
  285 12:28:56.050407  VB2:vb2_report_dev_firmware() This is developer signed firmware
  286 12:28:56.055059  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  287 12:28:56.059669  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  288 12:28:56.060143  
  289 12:28:56.065858  VB2:vb2_verify_keyblock() Checking key block signature...
  290 12:28:56.079522  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  291 12:28:56.084055  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
  292 12:28:56.089092  VB2:vb2_verify_fw_preamble() Verifying preamble.
  293 12:28:56.092345  Phase 4
  294 12:28:56.097534  FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
  295 12:28:56.104498  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  296 12:28:56.105116  
  297 12:28:56.273040  VB2:vb2_rsa_verify_digest() Digest check failed!
  298 12:28:56.273616  
  299 12:28:56.278186  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
  300 12:28:56.279332  Saving nvdata
  301 12:28:56.282771  Reboot requested (10020007)
  302 12:28:56.285245  board_reset() called!
  303 12:28:56.287526  full_reset() called!
  304 12:29:00.875936  
  305 12:29:00.876515  
  306 12:29:00.876610  
  307 12:29:00.884682  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
  308 12:29:00.888851  CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
  309 12:29:00.893870  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
  310 12:29:00.898937  CPU: AES supported, TXT NOT supported, VT supported
  311 12:29:00.903657  MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
  312 12:29:00.903935  
  313 12:29:00.909300  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
  314 12:29:00.913085  IGD: device id 3ea1 (rev 02) is Unknown
  315 12:29:00.913670  
  316 12:29:00.916993  VBOOT: Loading verstage.
  317 12:29:00.917549  
  318 12:29:00.919516  CBFS @ 1d00000 size 300000
  319 12:29:00.925939  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  320 12:29:00.926235  
  321 12:29:00.929268  CBFS: Locating 'fallback/verstage'
  322 12:29:00.933718  CBFS: Found @ offset 10f6c0 size 1435c
  323 12:29:00.946931  
  324 12:29:00.947219  
  325 12:29:00.947297  
  326 12:29:00.955413  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
  327 12:29:00.962972  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
  328 12:29:00.965668  done! DID_VID 0x00281ae0
  329 12:29:00.966193  
  330 12:29:00.967601  TPM ready after 0 ms
  331 12:29:00.971935  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  332 12:29:01.070575  tlcl_send_startup: Startup return code is 0
  333 12:29:01.072618  TPM: setup succeeded
  334 12:29:01.072894  
  335 12:29:01.090919  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
  336 12:29:01.094737  Checking cr50 for recovery request
  337 12:29:01.095300  
  338 12:29:01.104855  Phase 1
  339 12:29:01.108729  FMAP: Found "FLASH" version 1.1 at 1c10000.
  340 12:29:01.113907  FMAP: base = fe000000 size = 2000000 #areas = 37
  341 12:29:01.118508  FMAP: area GBB found @ 1c11000 (978944 bytes)
  342 12:29:01.119115  
  343 12:29:01.125785  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  344 12:29:01.132368  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  345 12:29:01.135147  Recovery requested (1009000e)
  346 12:29:01.136456  Saving nvdata
  347 12:29:01.152187  tlcl_extend: response is 0
  348 12:29:01.166305  tlcl_extend: response is 0
  349 12:29:01.166599  
  350 12:29:01.169713  CBFS @ 1d00000 size 300000
  351 12:29:01.175940  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  352 12:29:01.179493  CBFS: Locating 'fallback/romstage'
  353 12:29:01.183904  CBFS: Found @ offset 80 size 15b2c
  354 12:29:01.184449  
  355 12:29:01.184727  
  356 12:29:01.184807  
  357 12:29:01.185492  
  358 12:29:01.192856  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
  359 12:29:01.193130  
  360 12:29:01.197958  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
  361 12:29:01.199191  
  362 12:29:01.202242  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  363 12:29:01.206765  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  364 12:29:01.210660  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  365 12:29:01.215307  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
  366 12:29:01.217325  TCO_STS:   0000 0004
  367 12:29:01.219903  GEN_PMCON: d0015209 00002200
  368 12:29:01.223252  GBLRST_CAUSE: 00000000 00000000
  369 12:29:01.225560  prev_sleep_state 5
  370 12:29:01.229143  Boot Count incremented to 7968
  371 12:29:01.231964  CBFS @ 1d00000 size 300000
  372 12:29:01.238169  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  373 12:29:01.241094  CBFS: Locating 'fspm.bin'
  374 12:29:01.244807  CBFS: Found @ offset 60fc0 size 70000
  375 12:29:01.245345  
  376 12:29:01.250454  FMAP: Found "FLASH" version 1.1 at 1c10000.
  377 12:29:01.254865  FMAP: base = fe000000 size = 2000000 #areas = 37
  378 12:29:01.260783  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
  379 12:29:01.261090  
  380 12:29:01.267024  Probing TPM I2C: done! DID_VID 0x00281ae0
  381 12:29:01.269518  Locality already claimed
  382 12:29:01.269821  
  383 12:29:01.273006  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  384 12:29:01.292900  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  385 12:29:01.300061  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  386 12:29:01.302895  MRC cache found, size 18e0
  387 12:29:01.304538  bootmode is set to :2
  388 12:29:01.305122  
  389 12:29:01.394113  CBMEM:
  390 12:29:01.397833  IMD: root @ 89fff000 254 entries.
  391 12:29:01.400780  IMD: root @ 89ffec00 62 entries.
  392 12:29:01.403476  External stage cache:
  393 12:29:01.407282  IMD: root @ 8abff000 254 entries.
  394 12:29:01.410762  IMD: root @ 8abfec00 62 entries.
  395 12:29:01.416457  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
  396 12:29:01.419387  creating vboot_handoff structure
  397 12:29:01.419662  
  398 12:29:01.441038  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  399 12:29:01.455928  tlcl_write: response is 0
  400 12:29:01.475046  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  401 12:29:01.479822  MRC: TPM MRC hash updated successfully.
  402 12:29:01.480596  1 DIMMs found
  403 12:29:01.483568  top_of_ram = 0x8a000000
  404 12:29:01.488433  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
  405 12:29:01.488705  
  406 12:29:01.494052  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  407 12:29:01.496253  CBFS @ 1d00000 size 300000
  408 12:29:01.496564  
  409 12:29:01.502050  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  410 12:29:01.502631  
  411 12:29:01.505404  CBFS: Locating 'fallback/postcar'
  412 12:29:01.505836  
  413 12:29:01.509895  CBFS: Found @ offset 107000 size 41a4
  414 12:29:01.515773  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
  415 12:29:01.526865  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
  416 12:29:01.531440  Processing 126 relocs. Offset value of 0x87cdd000
  417 12:29:01.533616  
  418 12:29:01.533912  
  419 12:29:01.533996  
  420 12:29:01.542485  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
  421 12:29:01.544936  CBFS @ 1d00000 size 300000
  422 12:29:01.551048  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  423 12:29:01.554826  CBFS: Locating 'fallback/ramstage'
  424 12:29:01.558960  CBFS: Found @ offset 458c0 size 1a8a8
  425 12:29:01.565728  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
  426 12:29:01.592911  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
  427 12:29:01.597495  Processing 3754 relocs. Offset value of 0x88e81000
  428 12:29:01.602997  
  429 12:29:01.603284  
  430 12:29:01.603366  
  431 12:29:01.611600  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
  432 12:29:01.616438  FMAP: Found "FLASH" version 1.1 at 1c10000.
  433 12:29:01.620497  FMAP: base = fe000000 size = 2000000 #areas = 37
  434 12:29:01.620789  
  435 12:29:01.625852  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
  436 12:29:01.629866  WARNING: RO_VPD is uninitialized or empty.
  437 12:29:01.630145  
  438 12:29:01.634622  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
  439 12:29:01.639279  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
  440 12:29:01.640789  Normal boot.
  441 12:29:01.647761  BS: BS_PRE_DEVICE times (us): entry 0 run 56 exit 1163
  442 12:29:01.650432  CBFS @ 1d00000 size 300000
  443 12:29:01.656583  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  444 12:29:01.661195  CBFS: Locating 'cpu_microcode_blob.bin'
  445 12:29:01.664529  CBFS: Found @ offset 15c40 size 2fc00
  446 12:29:01.669243  microcode: sig=0x806ec pf=0x80 revision=0xb7
  447 12:29:01.671066  Skip microcode update
  448 12:29:01.673796  CBFS @ 1d00000 size 300000
  449 12:29:01.680203  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  450 12:29:01.682562  CBFS: Locating 'fsps.bin'
  451 12:29:01.682912  
  452 12:29:01.686871  CBFS: Found @ offset d1fc0 size 35000
  453 12:29:01.721685  Detected 2 core, 2 thread CPU.
  454 12:29:01.723533  Setting up SMI for CPU
  455 12:29:01.725935  IED base = 0x8ac00000
  456 12:29:01.728183  IED size = 0x00400000
  457 12:29:01.731086  Will perform SMM setup.
  458 12:29:01.735530  CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
  459 12:29:01.743881  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  460 12:29:01.748060  Processing 16 relocs. Offset value of 0x00030000
  461 12:29:01.748337  
  462 12:29:01.751415  Attempting to start 1 APs
  463 12:29:01.754772  Waiting for 10ms after sending INIT.
  464 12:29:01.768879  Waiting for 1st SIPI to complete...done.
  465 12:29:01.769364  
  466 12:29:01.770782  AP: slot 1 apic_id 2.
  467 12:29:01.771048  
  468 12:29:01.775483  Waiting for 2nd SIPI to complete...done.
  469 12:29:01.782852  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  470 12:29:01.788019  Processing 13 relocs. Offset value of 0x00038000
  471 12:29:01.793947  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
  472 12:29:01.794477  
  473 12:29:01.797804  Installing SMM handler to 0x8a000000
  474 12:29:01.806279  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
  475 12:29:01.811554  Processing 867 relocs. Offset value of 0x8a010000
  476 12:29:01.819954  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
  477 12:29:01.824585  Processing 13 relocs. Offset value of 0x8a008000
  478 12:29:01.830419  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
  479 12:29:01.837253  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
  480 12:29:01.839712  Clearing SMI status registers
  481 12:29:01.841649  SMI_STS: PM1 
  482 12:29:01.843923  PM1_STS: WAK PWRBTN 
  483 12:29:01.846222  TCO_STS: BOOT SECOND_TO 
  484 12:29:01.848118  GPE0 STD STS: eSPI 
  485 12:29:01.850255  New SMBASE 0x8a000000
  486 12:29:01.853248  In relocation handler: CPU 0
  487 12:29:01.857803  New SMBASE=0x8a000000 IEDBASE=0x8ac00000
  488 12:29:01.862496  Writing SMRR. base = 0x8a000006, mask=0xff000800
  489 12:29:01.864694  Relocation complete.
  490 12:29:01.867104  New SMBASE 0x89fffc00
  491 12:29:01.869539  In relocation handler: CPU 1
  492 12:29:01.873650  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
  493 12:29:01.878438  Writing SMRR. base = 0x8a000006, mask=0xff000800
  494 12:29:01.881201  Relocation complete.
  495 12:29:01.882590  Initializing CPU #0
  496 12:29:01.886422  CPU: vendor Intel device 806ec
  497 12:29:01.889491  CPU: family 06, model 8e, stepping 0c
  498 12:29:01.889769  
  499 12:29:01.892088  Clearing out pending MCEs
  500 12:29:01.896816  Setting up local APIC... apic_id: 0x00 done.
  501 12:29:01.900160  Turbo is available but hidden
  502 12:29:01.902437  Turbo has been enabled
  503 12:29:01.904383  VMX status: enabled
  504 12:29:01.907437  IA32_FEATURE_CONTROL status: locked
  505 12:29:01.908015  
  506 12:29:01.909822  Skip microcode update
  507 12:29:01.910115  
  508 12:29:01.912096  CPU #0 initialized
  509 12:29:01.912372  
  510 12:29:01.914667  Initializing CPU #1
  511 12:29:01.917525  CPU: vendor Intel device 806ec
  512 12:29:01.922080  CPU: family 06, model 8e, stepping 0c
  513 12:29:01.924094  Clearing out pending MCEs
  514 12:29:01.928086  Setting up local APIC... apic_id: 0x02 done.
  515 12:29:01.928386  
  516 12:29:01.930539  VMX status: enabled
  517 12:29:01.934039  IA32_FEATURE_CONTROL status: locked
  518 12:29:01.936779  Skip microcode update
  519 12:29:01.939029  CPU #1 initialized
  520 12:29:01.942807  bsp_do_flight_plan done after 163 msecs.
  521 12:29:01.946329  CPU: frequency set to 2200 MHz
  522 12:29:01.947312  Enabling SMIs.
  523 12:29:01.948806  Locking SMM.
  524 12:29:01.952037  CBFS @ 1d00000 size 300000
  525 12:29:01.958485  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  526 12:29:01.960491  CBFS: Locating 'vbt.bin'
  527 12:29:01.960766  
  528 12:29:01.964165  CBFS: Found @ offset 60a40 size 4a0
  529 12:29:01.964441  
  530 12:29:01.969469  Found a VBT of 4608 bytes after decompression
  531 12:29:01.983361  FMAP: area GBB found @ 1c11000 (978944 bytes)
  532 12:29:02.101091  Detected 2 core, 2 thread CPU.
  533 12:29:02.103396  Detected 2 core, 2 thread CPU.
  534 12:29:02.330268  Display FSP Version Info HOB
  535 12:29:02.334067  Reference Code - CPU = 7.0.5e.40
  536 12:29:02.336389  uCode Version = 0.0.0.b8
  537 12:29:02.339235  Display FSP Version Info HOB
  538 12:29:02.342162  Reference Code - ME = 7.0.5e.40
  539 12:29:02.344611  MEBx version = 0.0.0.0
  540 12:29:02.348580  ME Firmware Version = Consumer SKU
  541 12:29:02.351232  Display FSP Version Info HOB
  542 12:29:02.355063  Reference Code - CNL PCH = 7.0.5e.40
  543 12:29:02.357150  PCH-CRID Status = Disabled
  544 12:29:02.357582  
  545 12:29:02.361332  CNL PCH H A0 Hsio Version = 2.0.0.0
  546 12:29:02.365348  CNL PCH H Ax Hsio Version = 9.0.0.0
  547 12:29:02.368359  CNL PCH H Bx Hsio Version = a.0.0.0
  548 12:29:02.371755  CNL PCH LP B0 Hsio Version = 7.0.0.0
  549 12:29:02.375860  CNL PCH LP Bx Hsio Version = 6.0.0.0
  550 12:29:02.379641  CNL PCH LP Dx Hsio Version = 7.0.0.0
  551 12:29:02.380219  
  552 12:29:02.382635  Display FSP Version Info HOB
  553 12:29:02.386782  Reference Code - SA - System Agent = 7.0.5e.40
  554 12:29:02.390474  Reference Code - MRC = 0.7.1.68
  555 12:29:02.393576  SA - PCIe Version = 7.0.5e.40
  556 12:29:02.396192  SA-CRID Status = Disabled
  557 12:29:02.399260  SA-CRID Original Value = 0.0.0.c
  558 12:29:02.402092  SA-CRID New Value = 0.0.0.c
  559 12:29:02.420907  RTC Init
  560 12:29:02.424322  Set power off after power failure.
  561 12:29:02.426275  Disabling Deep S3
  562 12:29:02.428253  Disabling Deep S3
  563 12:29:02.430504  Disabling Deep S4
  564 12:29:02.432210  Disabling Deep S4
  565 12:29:02.433912  Disabling Deep S5
  566 12:29:02.434441  
  567 12:29:02.435264  Disabling Deep S5
  568 12:29:02.442217  BS: BS_DEV_INIT_CHIPS times (us): entry 301121 run 470526 exit 16230
  569 12:29:02.442499  
  570 12:29:02.444246  Enumerating buses...
  571 12:29:02.444623  
  572 12:29:02.449201  Show all devs... Before device enumeration.
  573 12:29:02.451616  Root Device: enabled 1
  574 12:29:02.454490  CPU_CLUSTER: 0: enabled 1
  575 12:29:02.456237  DOMAIN: 0000: enabled 1
  576 12:29:02.456791  
  577 12:29:02.458498  APIC: 00: enabled 1
  578 12:29:02.459086  
  579 12:29:02.460400  PCI: 00:00.0: enabled 1
  580 12:29:02.460793  
  581 12:29:02.463529  PCI: 00:02.0: enabled 1
  582 12:29:02.465775  PCI: 00:04.0: enabled 1
  583 12:29:02.468442  PCI: 00:12.0: enabled 1
  584 12:29:02.470634  PCI: 00:12.5: enabled 0
  585 12:29:02.473047  PCI: 00:12.6: enabled 0
  586 12:29:02.473546  
  587 12:29:02.475482  PCI: 00:13.0: enabled 0
  588 12:29:02.478014  PCI: 00:14.0: enabled 1
  589 12:29:02.480602  PCI: 00:14.1: enabled 0
  590 12:29:02.482496  PCI: 00:14.3: enabled 1
  591 12:29:02.485093  PCI: 00:14.5: enabled 0
  592 12:29:02.485411  
  593 12:29:02.487942  PCI: 00:15.0: enabled 1
  594 12:29:02.490298  PCI: 00:15.1: enabled 1
  595 12:29:02.492156  PCI: 00:15.2: enabled 0
  596 12:29:02.492625  
  597 12:29:02.494517  PCI: 00:15.3: enabled 0
  598 12:29:02.497414  PCI: 00:16.0: enabled 1
  599 12:29:02.500015  PCI: 00:16.1: enabled 0
  600 12:29:02.502287  PCI: 00:16.2: enabled 0
  601 12:29:02.502555  
  602 12:29:02.504387  PCI: 00:16.3: enabled 0
  603 12:29:02.504979  
  604 12:29:02.507053  PCI: 00:16.4: enabled 0
  605 12:29:02.509320  PCI: 00:16.5: enabled 0
  606 12:29:02.511552  PCI: 00:17.0: enabled 1
  607 12:29:02.511826  
  608 12:29:02.514448  PCI: 00:19.0: enabled 1
  609 12:29:02.516936  PCI: 00:19.1: enabled 0
  610 12:29:02.519069  PCI: 00:19.2: enabled 1
  611 12:29:02.521155  PCI: 00:1a.0: enabled 0
  612 12:29:02.523504  PCI: 00:1c.0: enabled 1
  613 12:29:02.524144  
  614 12:29:02.526511  PCI: 00:1c.1: enabled 0
  615 12:29:02.528830  PCI: 00:1c.2: enabled 0
  616 12:29:02.532031  PCI: 00:1c.3: enabled 0
  617 12:29:02.533461  PCI: 00:1c.4: enabled 0
  618 12:29:02.536585  PCI: 00:1c.5: enabled 0
  619 12:29:02.538505  PCI: 00:1c.6: enabled 0
  620 12:29:02.539078  
  621 12:29:02.540783  PCI: 00:1c.7: enabled 1
  622 12:29:02.541294  
  623 12:29:02.543282  PCI: 00:1d.0: enabled 1
  624 12:29:02.543703  
  625 12:29:02.545677  PCI: 00:1d.1: enabled 1
  626 12:29:02.547817  PCI: 00:1d.2: enabled 0
  627 12:29:02.548343  
  628 12:29:02.550623  PCI: 00:1d.3: enabled 0
  629 12:29:02.551186  
  630 12:29:02.553078  PCI: 00:1d.4: enabled 1
  631 12:29:02.555242  PCI: 00:1e.0: enabled 0
  632 12:29:02.555513  
  633 12:29:02.558266  PCI: 00:1e.1: enabled 0
  634 12:29:02.558556  
  635 12:29:02.560643  PCI: 00:1e.2: enabled 0
  636 12:29:02.563067  PCI: 00:1e.3: enabled 0
  637 12:29:02.565180  PCI: 00:1f.0: enabled 1
  638 12:29:02.567635  PCI: 00:1f.1: enabled 1
  639 12:29:02.570018  PCI: 00:1f.2: enabled 1
  640 12:29:02.570299  
  641 12:29:02.572246  PCI: 00:1f.3: enabled 1
  642 12:29:02.572600  
  643 12:29:02.575396  PCI: 00:1f.4: enabled 1
  644 12:29:02.577331  PCI: 00:1f.5: enabled 1
  645 12:29:02.580217  PCI: 00:1f.6: enabled 1
  646 12:29:02.581872  USB0 port 0: enabled 1
  647 12:29:02.584701  I2C: 00:10: enabled 1
  648 12:29:02.586535  I2C: 00:10: enabled 1
  649 12:29:02.588883  I2C: 00:34: enabled 1
  650 12:29:02.590742  I2C: 00:2c: enabled 1
  651 12:29:02.591254  
  652 12:29:02.593622  I2C: 00:50: enabled 1
  653 12:29:02.596380  PNP: 0c09.0: enabled 1
  654 12:29:02.598682  USB2 port 0: enabled 1
  655 12:29:02.600093  USB2 port 1: enabled 1
  656 12:29:02.603378  USB2 port 2: enabled 1
  657 12:29:02.605156  USB2 port 4: enabled 1
  658 12:29:02.607359  USB2 port 5: enabled 1
  659 12:29:02.609436  USB2 port 6: enabled 1
  660 12:29:02.612110  USB2 port 7: enabled 1
  661 12:29:02.614618  USB2 port 8: enabled 1
  662 12:29:02.616898  USB2 port 9: enabled 1
  663 12:29:02.619487  USB3 port 0: enabled 1
  664 12:29:02.621385  USB3 port 1: enabled 1
  665 12:29:02.621668  
  666 12:29:02.623314  USB3 port 2: enabled 1
  667 12:29:02.625769  USB3 port 3: enabled 1
  668 12:29:02.627919  USB3 port 4: enabled 1
  669 12:29:02.628213  
  670 12:29:02.631010  APIC: 02: enabled 1
  671 12:29:02.632294  Compare with tree...
  672 12:29:02.634956  Root Device: enabled 1
  673 12:29:02.637935   CPU_CLUSTER: 0: enabled 1
  674 12:29:02.639557    APIC: 00: enabled 1
  675 12:29:02.639908  
  676 12:29:02.641993    APIC: 02: enabled 1
  677 12:29:02.644469   DOMAIN: 0000: enabled 1
  678 12:29:02.645049  
  679 12:29:02.646910    PCI: 00:00.0: enabled 1
  680 12:29:02.650247    PCI: 00:02.0: enabled 1
  681 12:29:02.652244    PCI: 00:04.0: enabled 1
  682 12:29:02.655212    PCI: 00:12.0: enabled 1
  683 12:29:02.657973    PCI: 00:12.5: enabled 0
  684 12:29:02.659919    PCI: 00:12.6: enabled 0
  685 12:29:02.660306  
  686 12:29:02.663052    PCI: 00:13.0: enabled 0
  687 12:29:02.666018    PCI: 00:14.0: enabled 1
  688 12:29:02.667995     USB0 port 0: enabled 1
  689 12:29:02.671383      USB2 port 0: enabled 1
  690 12:29:02.673623      USB2 port 1: enabled 1
  691 12:29:02.676231      USB2 port 2: enabled 1
  692 12:29:02.678972      USB2 port 4: enabled 1
  693 12:29:02.681802      USB2 port 5: enabled 1
  694 12:29:02.684604      USB2 port 6: enabled 1
  695 12:29:02.687224      USB2 port 7: enabled 1
  696 12:29:02.687490  
  697 12:29:02.690250      USB2 port 8: enabled 1
  698 12:29:02.692739      USB2 port 9: enabled 1
  699 12:29:02.693254  
  700 12:29:02.695074      USB3 port 0: enabled 1
  701 12:29:02.695606  
  702 12:29:02.698641      USB3 port 1: enabled 1
  703 12:29:02.701078      USB3 port 2: enabled 1
  704 12:29:02.703335      USB3 port 3: enabled 1
  705 12:29:02.706159      USB3 port 4: enabled 1
  706 12:29:02.708847    PCI: 00:14.1: enabled 0
  707 12:29:02.711587    PCI: 00:14.3: enabled 1
  708 12:29:02.714166    PCI: 00:14.5: enabled 0
  709 12:29:02.717342    PCI: 00:15.0: enabled 1
  710 12:29:02.719185     I2C: 00:10: enabled 1
  711 12:29:02.722257     I2C: 00:10: enabled 1
  712 12:29:02.724753     I2C: 00:34: enabled 1
  713 12:29:02.727414    PCI: 00:15.1: enabled 1
  714 12:29:02.729806     I2C: 00:2c: enabled 1
  715 12:29:02.731886    PCI: 00:15.2: enabled 0
  716 12:29:02.734617    PCI: 00:15.3: enabled 0
  717 12:29:02.737301    PCI: 00:16.0: enabled 1
  718 12:29:02.739867    PCI: 00:16.1: enabled 0
  719 12:29:02.742829    PCI: 00:16.2: enabled 0
  720 12:29:02.745259    PCI: 00:16.3: enabled 0
  721 12:29:02.747527    PCI: 00:16.4: enabled 0
  722 12:29:02.750881    PCI: 00:16.5: enabled 0
  723 12:29:02.753680    PCI: 00:17.0: enabled 1
  724 12:29:02.756036    PCI: 00:19.0: enabled 1
  725 12:29:02.757983     I2C: 00:50: enabled 1
  726 12:29:02.760910    PCI: 00:19.1: enabled 0
  727 12:29:02.763509    PCI: 00:19.2: enabled 1
  728 12:29:02.765995    PCI: 00:1a.0: enabled 0
  729 12:29:02.769064    PCI: 00:1c.0: enabled 1
  730 12:29:02.771639    PCI: 00:1c.1: enabled 0
  731 12:29:02.774408    PCI: 00:1c.2: enabled 0
  732 12:29:02.776389    PCI: 00:1c.3: enabled 0
  733 12:29:02.778932    PCI: 00:1c.4: enabled 0
  734 12:29:02.782008    PCI: 00:1c.5: enabled 0
  735 12:29:02.784876    PCI: 00:1c.6: enabled 0
  736 12:29:02.787672    PCI: 00:1c.7: enabled 1
  737 12:29:02.789328    PCI: 00:1d.0: enabled 1
  738 12:29:02.789608  
  739 12:29:02.792769    PCI: 00:1d.1: enabled 1
  740 12:29:02.794834    PCI: 00:1d.2: enabled 0
  741 12:29:02.798108    PCI: 00:1d.3: enabled 0
  742 12:29:02.800832    PCI: 00:1d.4: enabled 1
  743 12:29:02.803242    PCI: 00:1e.0: enabled 0
  744 12:29:02.805284    PCI: 00:1e.1: enabled 0
  745 12:29:02.807861    PCI: 00:1e.2: enabled 0
  746 12:29:02.808142  
  747 12:29:02.811027    PCI: 00:1e.3: enabled 0
  748 12:29:02.813612    PCI: 00:1f.0: enabled 1
  749 12:29:02.815975     PNP: 0c09.0: enabled 1
  750 12:29:02.819079    PCI: 00:1f.1: enabled 1
  751 12:29:02.821510    PCI: 00:1f.2: enabled 1
  752 12:29:02.821808  
  753 12:29:02.823940    PCI: 00:1f.3: enabled 1
  754 12:29:02.826312    PCI: 00:1f.4: enabled 1
  755 12:29:02.826615  
  756 12:29:02.828780    PCI: 00:1f.5: enabled 1
  757 12:29:02.829100  
  758 12:29:02.831938    PCI: 00:1f.6: enabled 1
  759 12:29:02.833829  Root Device scanning...
  760 12:29:02.834514  
  761 12:29:02.837630  root_dev_scan_bus for Root Device
  762 12:29:02.838007  
  763 12:29:02.840016  CPU_CLUSTER: 0 enabled
  764 12:29:02.842780  DOMAIN: 0000 enabled
  765 12:29:02.845014  DOMAIN: 0000 scanning...
  766 12:29:02.845579  
  767 12:29:02.848020  PCI: pci_scan_bus for bus 00
  768 12:29:02.851357  PCI: 00:00.0 [8086/0000] ops
  769 12:29:02.854443  PCI: 00:00.0 [8086/3e35] enabled
  770 12:29:02.857627  PCI: 00:02.0 [8086/0000] ops
  771 12:29:02.860623  PCI: 00:02.0 [8086/3ea1] enabled
  772 12:29:02.860908  
  773 12:29:02.864190  PCI: 00:04.0 [8086/1903] enabled
  774 12:29:02.867618  PCI: 00:08.0 [8086/1911] enabled
  775 12:29:02.870389  PCI: 00:12.0 [8086/9df9] enabled
  776 12:29:02.874170  PCI: 00:14.0 [8086/0000] bus ops
  777 12:29:02.877020  PCI: 00:14.0 [8086/9ded] enabled
  778 12:29:02.881033  PCI: 00:14.2 [8086/9def] enabled
  779 12:29:02.883937  PCI: 00:14.3 [8086/9df0] enabled
  780 12:29:02.887412  PCI: 00:15.0 [8086/0000] bus ops
  781 12:29:02.887959  
  782 12:29:02.890487  PCI: 00:15.0 [8086/9de8] enabled
  783 12:29:02.893942  PCI: 00:15.1 [8086/0000] bus ops
  784 12:29:02.897353  PCI: 00:15.1 [8086/9de9] enabled
  785 12:29:02.900408  PCI: 00:16.0 [8086/0000] ops
  786 12:29:02.903776  PCI: 00:16.0 [8086/9de0] enabled
  787 12:29:02.906219  PCI: 00:17.0 [8086/0000] ops
  788 12:29:02.909980  PCI: 00:17.0 [8086/9dd3] enabled
  789 12:29:02.913341  PCI: 00:19.0 [8086/0000] bus ops
  790 12:29:02.916897  PCI: 00:19.0 [8086/9dc5] enabled
  791 12:29:02.919761  PCI: 00:19.2 [8086/0000] ops
  792 12:29:02.922785  PCI: 00:19.2 [8086/9dc7] enabled
  793 12:29:02.926172  PCI: 00:1c.0 [8086/0000] bus ops
  794 12:29:02.929185  PCI: 00:1c.0 [8086/9dbf] enabled
  795 12:29:02.935648  PCI: Static device PCI: 00:1c.7 not found, disabling it.
  796 12:29:02.937936  PCI: 00:1d.0 [8086/0000] bus ops
  797 12:29:02.941850  PCI: 00:1d.0 [8086/9db4] enabled
  798 12:29:02.947138  PCI: Static device PCI: 00:1d.1 not found, disabling it.
  799 12:29:02.947838  
  800 12:29:02.952815  PCI: Static device PCI: 00:1d.4 not found, disabling it.
  801 12:29:02.953088  
  802 12:29:02.956208  PCI: 00:1f.0 [8086/0000] bus ops
  803 12:29:02.956840  
  804 12:29:02.959604  PCI: 00:1f.0 [8086/9d84] enabled
  805 12:29:02.964847  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  806 12:29:02.970787  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  807 12:29:02.973878  PCI: 00:1f.3 [8086/0000] bus ops
  808 12:29:02.977758  PCI: 00:1f.3 [8086/9dc8] enabled
  809 12:29:02.980508  PCI: 00:1f.4 [8086/0000] bus ops
  810 12:29:02.980791  
  811 12:29:02.984619  PCI: 00:1f.4 [8086/9da3] enabled
  812 12:29:02.987549  PCI: 00:1f.5 [8086/0000] bus ops
  813 12:29:02.987841  
  814 12:29:02.991092  PCI: 00:1f.5 [8086/9da4] enabled
  815 12:29:02.991375  
  816 12:29:02.993992  PCI: 00:1f.6 [8086/15be] enabled
  817 12:29:02.997550  PCI: Leftover static devices:
  818 12:29:02.998346  PCI: 00:12.5
  819 12:29:02.999925  PCI: 00:12.6
  820 12:29:03.000193  
  821 12:29:03.001131  PCI: 00:13.0
  822 12:29:03.003047  PCI: 00:14.1
  823 12:29:03.003750  PCI: 00:14.5
  824 12:29:03.005311  PCI: 00:15.2
  825 12:29:03.006611  PCI: 00:15.3
  826 12:29:03.008211  PCI: 00:16.1
  827 12:29:03.010006  PCI: 00:16.2
  828 12:29:03.010565  PCI: 00:16.3
  829 12:29:03.010831  
  830 12:29:03.012443  PCI: 00:16.4
  831 12:29:03.013950  PCI: 00:16.5
  832 12:29:03.015216  PCI: 00:19.1
  833 12:29:03.016434  PCI: 00:1a.0
  834 12:29:03.017716  PCI: 00:1c.1
  835 12:29:03.019388  PCI: 00:1c.2
  836 12:29:03.020375  PCI: 00:1c.3
  837 12:29:03.022127  PCI: 00:1c.4
  838 12:29:03.022861  PCI: 00:1c.5
  839 12:29:03.024879  PCI: 00:1c.6
  840 12:29:03.025757  PCI: 00:1c.7
  841 12:29:03.026781  PCI: 00:1d.1
  842 12:29:03.027241  
  843 12:29:03.028084  PCI: 00:1d.2
  844 12:29:03.028504  
  845 12:29:03.029819  PCI: 00:1d.3
  846 12:29:03.031363  PCI: 00:1d.4
  847 12:29:03.032528  PCI: 00:1e.0
  848 12:29:03.032809  
  849 12:29:03.033811  PCI: 00:1e.1
  850 12:29:03.035000  PCI: 00:1e.2
  851 12:29:03.036721  PCI: 00:1e.3
  852 12:29:03.037028  
  853 12:29:03.037617  PCI: 00:1f.1
  854 12:29:03.037888  
  855 12:29:03.040184  PCI: 00:1f.2
  856 12:29:03.043084  PCI: Check your devicetree.cb.
  857 12:29:03.044880  PCI: 00:14.0 scanning...
  858 12:29:03.048243  scan_usb_bus for PCI: 00:14.0
  859 12:29:03.050290  USB0 port 0 enabled
  860 12:29:03.052905  USB0 port 0 scanning...
  861 12:29:03.056284  scan_usb_bus for USB0 port 0
  862 12:29:03.057659  USB2 port 0 enabled
  863 12:29:03.057951  
  864 12:29:03.060039  USB2 port 1 enabled
  865 12:29:03.062373  USB2 port 2 enabled
  866 12:29:03.064245  USB2 port 4 enabled
  867 12:29:03.066032  USB2 port 5 enabled
  868 12:29:03.066487  
  869 12:29:03.068151  USB2 port 6 enabled
  870 12:29:03.068438  
  871 12:29:03.070375  USB2 port 7 enabled
  872 12:29:03.070823  
  873 12:29:03.072565  USB2 port 8 enabled
  874 12:29:03.074949  USB2 port 9 enabled
  875 12:29:03.076195  USB3 port 0 enabled
  876 12:29:03.078987  USB3 port 1 enabled
  877 12:29:03.080606  USB3 port 2 enabled
  878 12:29:03.082395  USB3 port 3 enabled
  879 12:29:03.082969  
  880 12:29:03.085009  USB3 port 4 enabled
  881 12:29:03.086645  USB2 port 0 scanning...
  882 12:29:03.090164  scan_usb_bus for USB2 port 0
  883 12:29:03.093902  scan_usb_bus for USB2 port 0 done
  884 12:29:03.099275  scan_bus: scanning of bus USB2 port 0 took 9060 usecs
  885 12:29:03.101148  USB2 port 1 scanning...
  886 12:29:03.104351  scan_usb_bus for USB2 port 1
  887 12:29:03.107923  scan_usb_bus for USB2 port 1 done
  888 12:29:03.108402  
  889 12:29:03.113628  scan_bus: scanning of bus USB2 port 1 took 9059 usecs
  890 12:29:03.116411  USB2 port 2 scanning...
  891 12:29:03.118740  scan_usb_bus for USB2 port 2
  892 12:29:03.122578  scan_usb_bus for USB2 port 2 done
  893 12:29:03.127700  scan_bus: scanning of bus USB2 port 2 took 9062 usecs
  894 12:29:03.130613  USB2 port 4 scanning...
  895 12:29:03.133338  scan_usb_bus for USB2 port 4
  896 12:29:03.136728  scan_usb_bus for USB2 port 4 done
  897 12:29:03.142334  scan_bus: scanning of bus USB2 port 4 took 9062 usecs
  898 12:29:03.145349  USB2 port 5 scanning...
  899 12:29:03.147633  scan_usb_bus for USB2 port 5
  900 12:29:03.151146  scan_usb_bus for USB2 port 5 done
  901 12:29:03.151636  
  902 12:29:03.156364  scan_bus: scanning of bus USB2 port 5 took 9060 usecs
  903 12:29:03.157046  
  904 12:29:03.158891  USB2 port 6 scanning...
  905 12:29:03.161890  scan_usb_bus for USB2 port 6
  906 12:29:03.162169  
  907 12:29:03.165588  scan_usb_bus for USB2 port 6 done
  908 12:29:03.166208  
  909 12:29:03.170866  scan_bus: scanning of bus USB2 port 6 took 9060 usecs
  910 12:29:03.173783  USB2 port 7 scanning...
  911 12:29:03.176834  scan_usb_bus for USB2 port 7
  912 12:29:03.180405  scan_usb_bus for USB2 port 7 done
  913 12:29:03.185094  scan_bus: scanning of bus USB2 port 7 took 9059 usecs
  914 12:29:03.187772  USB2 port 8 scanning...
  915 12:29:03.188353  
  916 12:29:03.190788  scan_usb_bus for USB2 port 8
  917 12:29:03.191276  
  918 12:29:03.194479  scan_usb_bus for USB2 port 8 done
  919 12:29:03.199493  scan_bus: scanning of bus USB2 port 8 took 9060 usecs
  920 12:29:03.201873  USB2 port 9 scanning...
  921 12:29:03.205084  scan_usb_bus for USB2 port 9
  922 12:29:03.205392  
  923 12:29:03.208884  scan_usb_bus for USB2 port 9 done
  924 12:29:03.214720  scan_bus: scanning of bus USB2 port 9 took 9061 usecs
  925 12:29:03.216909  USB3 port 0 scanning...
  926 12:29:03.219609  scan_usb_bus for USB3 port 0
  927 12:29:03.222988  scan_usb_bus for USB3 port 0 done
  928 12:29:03.228417  scan_bus: scanning of bus USB3 port 0 took 9059 usecs
  929 12:29:03.230836  USB3 port 1 scanning...
  930 12:29:03.231118  
  931 12:29:03.234298  scan_usb_bus for USB3 port 1
  932 12:29:03.237842  scan_usb_bus for USB3 port 1 done
  933 12:29:03.243107  scan_bus: scanning of bus USB3 port 1 took 9061 usecs
  934 12:29:03.246053  USB3 port 2 scanning...
  935 12:29:03.248606  scan_usb_bus for USB3 port 2
  936 12:29:03.251972  scan_usb_bus for USB3 port 2 done
  937 12:29:03.252269  
  938 12:29:03.258002  scan_bus: scanning of bus USB3 port 2 took 9060 usecs
  939 12:29:03.259921  USB3 port 3 scanning...
  940 12:29:03.262834  scan_usb_bus for USB3 port 3
  941 12:29:03.267111  scan_usb_bus for USB3 port 3 done
  942 12:29:03.271803  scan_bus: scanning of bus USB3 port 3 took 9060 usecs
  943 12:29:03.274091  USB3 port 4 scanning...
  944 12:29:03.277316  scan_usb_bus for USB3 port 4
  945 12:29:03.281217  scan_usb_bus for USB3 port 4 done
  946 12:29:03.286555  scan_bus: scanning of bus USB3 port 4 took 9060 usecs
  947 12:29:03.289387  scan_usb_bus for USB0 port 0 done
  948 12:29:03.289918  
  949 12:29:03.294777  scan_bus: scanning of bus USB0 port 0 took 239297 usecs
  950 12:29:03.295270  
  951 12:29:03.298908  scan_usb_bus for PCI: 00:14.0 done
  952 12:29:03.299271  
  953 12:29:03.304142  scan_bus: scanning of bus PCI: 00:14.0 took 256228 usecs
  954 12:29:03.304517  
  955 12:29:03.306563  PCI: 00:15.0 scanning...
  956 12:29:03.310636  scan_generic_bus for PCI: 00:15.0
  957 12:29:03.314909  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
  958 12:29:03.319082  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
  959 12:29:03.323205  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
  960 12:29:03.326598  scan_generic_bus for PCI: 00:15.0 done
  961 12:29:03.326888  
  962 12:29:03.332415  scan_bus: scanning of bus PCI: 00:15.0 took 22411 usecs
  963 12:29:03.334778  PCI: 00:15.1 scanning...
  964 12:29:03.338775  scan_generic_bus for PCI: 00:15.1
  965 12:29:03.342425  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
  966 12:29:03.346928  scan_generic_bus for PCI: 00:15.1 done
  967 12:29:03.351954  scan_bus: scanning of bus PCI: 00:15.1 took 14214 usecs
  968 12:29:03.354223  PCI: 00:19.0 scanning...
  969 12:29:03.354495  
  970 12:29:03.358435  scan_generic_bus for PCI: 00:19.0
  971 12:29:03.362019  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
  972 12:29:03.362329  
  973 12:29:03.366330  scan_generic_bus for PCI: 00:19.0 done
  974 12:29:03.371690  scan_bus: scanning of bus PCI: 00:19.0 took 14211 usecs
  975 12:29:03.374054  PCI: 00:1c.0 scanning...
  976 12:29:03.374502  
  977 12:29:03.378342  do_pci_scan_bridge for PCI: 00:1c.0
  978 12:29:03.381776  PCI: pci_scan_bus for bus 01
  979 12:29:03.384343  PCI: 01:00.0 [10ec/525a] enabled
  980 12:29:03.387322  Capability: type 0x01 @ 0x80
  981 12:29:03.390170  Capability: type 0x05 @ 0x90
  982 12:29:03.390636  
  983 12:29:03.393377  Capability: type 0x10 @ 0xb0
  984 12:29:03.396330  Capability: type 0x10 @ 0x40
  985 12:29:03.396827  
  986 12:29:03.399883  Enabling Common Clock Configuration
  987 12:29:03.404434  L1 Sub-State supported from root port 28
  988 12:29:03.407369  L1 Sub-State Support = 0xf
  989 12:29:03.409771  CommonModeRestoreTime = 0x3c
  990 12:29:03.410322  
  991 12:29:03.414356  Power On Value = 0x6, Power On Scale = 0x1
  992 12:29:03.416344  ASPM: Enabled L0s and L1
  993 12:29:03.416613  
  994 12:29:03.419351  Capability: type 0x01 @ 0x80
  995 12:29:03.423211  Capability: type 0x05 @ 0x90
  996 12:29:03.425548  Capability: type 0x10 @ 0xb0
  997 12:29:03.430830  scan_bus: scanning of bus PCI: 00:1c.0 took 53657 usecs
  998 12:29:03.433477  PCI: 00:1d.0 scanning...
  999 12:29:03.437599  do_pci_scan_bridge for PCI: 00:1d.0
 1000 12:29:03.440859  PCI: pci_scan_bus for bus 02
 1001 12:29:03.443472  PCI: 02:00.0 [1e95/9100] enabled
 1002 12:29:03.443755  
 1003 12:29:03.447055  Capability: type 0x01 @ 0x40
 1004 12:29:03.449996  Capability: type 0x05 @ 0x50
 1005 12:29:03.452398  Capability: type 0x10 @ 0x70
 1006 12:29:03.455727  Capability: type 0x10 @ 0x40
 1007 12:29:03.459442  Enabling Common Clock Configuration
 1008 12:29:03.463158  L1 Sub-State supported from root port 29
 1009 12:29:03.463602  
 1010 12:29:03.466183  L1 Sub-State Support = 0xf
 1011 12:29:03.468673  CommonModeRestoreTime = 0x28
 1012 12:29:03.468950  
 1013 12:29:03.473267  Power On Value = 0x16, Power On Scale = 0x0
 1014 12:29:03.473556  
 1015 12:29:03.474958  ASPM: Enabled L1
 1016 12:29:03.477707  Capability: type 0x01 @ 0x40
 1017 12:29:03.478313  
 1018 12:29:03.481142  Capability: type 0x05 @ 0x50
 1019 12:29:03.483999  Capability: type 0x10 @ 0x70
 1020 12:29:03.484717  
 1021 12:29:03.489396  scan_bus: scanning of bus PCI: 00:1d.0 took 52960 usecs
 1022 12:29:03.490086  
 1023 12:29:03.491847  PCI: 00:1f.0 scanning...
 1024 12:29:03.492135  
 1025 12:29:03.495386  scan_lpc_bus for PCI: 00:1f.0
 1026 12:29:03.495933  
 1027 12:29:03.497382  PNP: 0c09.0 enabled
 1028 12:29:03.501225  scan_lpc_bus for PCI: 00:1f.0 done
 1029 12:29:03.506474  scan_bus: scanning of bus PCI: 00:1f.0 took 11454 usecs
 1030 12:29:03.508591  PCI: 00:1f.3 scanning...
 1031 12:29:03.509006  
 1032 12:29:03.514507  scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
 1033 12:29:03.514791  
 1034 12:29:03.517003  PCI: 00:1f.4 scanning...
 1035 12:29:03.517284  
 1036 12:29:03.520748  scan_generic_bus for PCI: 00:1f.4
 1037 12:29:03.521316  
 1038 12:29:03.525092  scan_generic_bus for PCI: 00:1f.4 done
 1039 12:29:03.530788  scan_bus: scanning of bus PCI: 00:1f.4 took 10129 usecs
 1040 12:29:03.533471  PCI: 00:1f.5 scanning...
 1041 12:29:03.536619  scan_generic_bus for PCI: 00:1f.5
 1042 12:29:03.540550  scan_generic_bus for PCI: 00:1f.5 done
 1043 12:29:03.546351  scan_bus: scanning of bus PCI: 00:1f.5 took 10127 usecs
 1044 12:29:03.551922  scan_bus: scanning of bus DOMAIN: 0000 took 703726 usecs
 1045 12:29:03.555852  root_dev_scan_bus for Root Device done
 1046 12:29:03.561312  scan_bus: scanning of bus Root Device took 723864 usecs
 1047 12:29:03.562036  done
 1048 12:29:03.567965  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
 1049 12:29:03.573591  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1050 12:29:03.573994  
 1051 12:29:03.581949  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
 1052 12:29:03.589103  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
 1053 12:29:03.592440  SPI flash protection: WPSW=1 SRP0=1
 1054 12:29:03.599099  fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
 1055 12:29:03.599447  
 1056 12:29:03.604450  MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
 1057 12:29:03.604739  
 1058 12:29:03.611034  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1119811 exit 42596
 1059 12:29:03.613389  found VGA at PCI: 00:02.0
 1060 12:29:03.613672  
 1061 12:29:03.617191  Setting up VGA for PCI: 00:02.0
 1062 12:29:03.622558  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1063 12:29:03.626694  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1064 12:29:03.629485  Allocating resources...
 1065 12:29:03.629810  
 1066 12:29:03.631369  Reading resources...
 1067 12:29:03.635740  Root Device read_resources bus 0 link: 0
 1068 12:29:03.640831  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1069 12:29:03.645289  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1070 12:29:03.649895  DOMAIN: 0000 read_resources bus 0 link: 0
 1071 12:29:03.656202  PCI: 00:14.0 read_resources bus 0 link: 0
 1072 12:29:03.660417  USB0 port 0 read_resources bus 0 link: 0
 1073 12:29:03.669672  USB0 port 0 read_resources bus 0 link: 0 done
 1074 12:29:03.675242  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1075 12:29:03.679967  PCI: 00:15.0 read_resources bus 1 link: 0
 1076 12:29:03.685972  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1077 12:29:03.690446  PCI: 00:15.1 read_resources bus 2 link: 0
 1078 12:29:03.696495  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1079 12:29:03.701214  PCI: 00:19.0 read_resources bus 3 link: 0
 1080 12:29:03.706928  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1081 12:29:03.710840  PCI: 00:1c.0 read_resources bus 1 link: 0
 1082 12:29:03.711126  
 1083 12:29:03.716573  PCI: 00:1c.0 read_resources bus 1 link: 0 done
 1084 12:29:03.720960  PCI: 00:1d.0 read_resources bus 2 link: 0
 1085 12:29:03.726231  PCI: 00:1d.0 read_resources bus 2 link: 0 done
 1086 12:29:03.730725  PCI: 00:1f.0 read_resources bus 0 link: 0
 1087 12:29:03.736019  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1088 12:29:03.736416  
 1089 12:29:03.742885  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1090 12:29:03.748027  Root Device read_resources bus 0 link: 0 done
 1091 12:29:03.750438  Done reading resources.
 1092 12:29:03.750732  
 1093 12:29:03.755438  Show resources in subtree (Root Device)...After reading.
 1094 12:29:03.755733  
 1095 12:29:03.760515   Root Device child on link 0 CPU_CLUSTER: 0
 1096 12:29:03.764643    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1097 12:29:03.765870     APIC: 00
 1098 12:29:03.767125     APIC: 02
 1099 12:29:03.771055    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1100 12:29:03.780238    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1101 12:29:03.790606    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1102 12:29:03.791777     PCI: 00:00.0
 1103 12:29:03.792293  
 1104 12:29:03.801397     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1105 12:29:03.811127     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1106 12:29:03.820427     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1107 12:29:03.828982     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1108 12:29:03.829407  
 1109 12:29:03.838618     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1110 12:29:03.847861     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1111 12:29:03.857229     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1112 12:29:03.866317     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
 1113 12:29:03.875600     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
 1114 12:29:03.876191  
 1115 12:29:03.885256     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
 1116 12:29:03.885865  
 1117 12:29:03.894702     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
 1118 12:29:03.905031     PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
 1119 12:29:03.913705     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
 1120 12:29:03.923199     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
 1121 12:29:03.924382     PCI: 00:02.0
 1122 12:29:03.924799  
 1123 12:29:03.934549     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1124 12:29:03.945429     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1125 12:29:03.953948     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1126 12:29:03.954771     PCI: 00:04.0
 1127 12:29:03.955154  
 1128 12:29:03.964800     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
 1129 12:29:03.965261  
 1130 12:29:03.966489     PCI: 00:08.0
 1131 12:29:03.967091  
 1132 12:29:03.976537     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1133 12:29:03.976889  
 1134 12:29:03.978517     PCI: 00:12.0
 1135 12:29:03.988065     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1136 12:29:03.993088     PCI: 00:14.0 child on link 0 USB0 port 0
 1137 12:29:04.002834     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1138 12:29:04.007127      USB0 port 0 child on link 0 USB2 port 0
 1139 12:29:04.007426  
 1140 12:29:04.008741       USB2 port 0
 1141 12:29:04.009358  
 1142 12:29:04.010646       USB2 port 1
 1143 12:29:04.012882       USB2 port 2
 1144 12:29:04.014373       USB2 port 4
 1145 12:29:04.015813       USB2 port 5
 1146 12:29:04.016449  
 1147 12:29:04.018128       USB2 port 6
 1148 12:29:04.019359       USB2 port 7
 1149 12:29:04.019649  
 1150 12:29:04.020666       USB2 port 8
 1151 12:29:04.020951  
 1152 12:29:04.022861       USB2 port 9
 1153 12:29:04.024205       USB3 port 0
 1154 12:29:04.024501  
 1155 12:29:04.026351       USB3 port 1
 1156 12:29:04.027004  
 1157 12:29:04.028691       USB3 port 2
 1158 12:29:04.030159       USB3 port 3
 1159 12:29:04.031303       USB3 port 4
 1160 12:29:04.031776  
 1161 12:29:04.033476     PCI: 00:14.2
 1162 12:29:04.043013     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1163 12:29:04.052753     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1164 12:29:04.055076     PCI: 00:14.3
 1165 12:29:04.065209     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1166 12:29:04.069199     PCI: 00:15.0 child on link 0 I2C: 01:10
 1167 12:29:04.078877     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1168 12:29:04.079496  
 1169 12:29:04.080311      I2C: 01:10
 1170 12:29:04.081977      I2C: 01:10
 1171 12:29:04.082441  
 1172 12:29:04.083633      I2C: 01:34
 1173 12:29:04.088020     PCI: 00:15.1 child on link 0 I2C: 02:2c
 1174 12:29:04.097720     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1175 12:29:04.098343  
 1176 12:29:04.098936      I2C: 02:2c
 1177 12:29:04.100775     PCI: 00:16.0
 1178 12:29:04.110763     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1179 12:29:04.112320     PCI: 00:17.0
 1180 12:29:04.121381     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1181 12:29:04.121674  
 1182 12:29:04.130578     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1183 12:29:04.131221  
 1184 12:29:04.138911     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1185 12:29:04.146655     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1186 12:29:04.147312  
 1187 12:29:04.155079     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1188 12:29:04.164344     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1189 12:29:04.168826     PCI: 00:19.0 child on link 0 I2C: 03:50
 1190 12:29:04.178568     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1191 12:29:04.188861     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1192 12:29:04.189916      I2C: 03:50
 1193 12:29:04.192097     PCI: 00:19.2
 1194 12:29:04.202681     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1195 12:29:04.213467     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1196 12:29:04.216888     PCI: 00:1c.0 child on link 0 PCI: 01:00.0
 1197 12:29:04.225549     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1198 12:29:04.235127     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1199 12:29:04.235430  
 1200 12:29:04.244867     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1201 12:29:04.245458  
 1202 12:29:04.246212      PCI: 01:00.0
 1203 12:29:04.255630      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
 1204 12:29:04.260309     PCI: 00:1d.0 child on link 0 PCI: 02:00.0
 1205 12:29:04.268877     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1206 12:29:04.278242     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1207 12:29:04.278580  
 1208 12:29:04.287577     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1209 12:29:04.289878      PCI: 02:00.0
 1210 12:29:04.299315      PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1211 12:29:04.304041     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1212 12:29:04.312119     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1213 12:29:04.312465  
 1214 12:29:04.321163     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1215 12:29:04.321606  
 1216 12:29:04.322872      PNP: 0c09.0
 1217 12:29:04.331381      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
 1218 12:29:04.340462      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
 1219 12:29:04.348420      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
 1220 12:29:04.350663     PCI: 00:1f.3
 1221 12:29:04.359885     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1222 12:29:04.360315  
 1223 12:29:04.370304     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1224 12:29:04.372618     PCI: 00:1f.4
 1225 12:29:04.380897     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1226 12:29:04.381209  
 1227 12:29:04.391366     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1228 12:29:04.392142     PCI: 00:1f.5
 1229 12:29:04.392784  
 1230 12:29:04.401703     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1231 12:29:04.401995  
 1232 12:29:04.402958     PCI: 00:1f.6
 1233 12:29:04.412626     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
 1234 12:29:04.418574  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1235 12:29:04.418867  
 1236 12:29:04.425058  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1237 12:29:04.431738  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1238 12:29:04.432028  
 1239 12:29:04.438327  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1240 12:29:04.438988  
 1241 12:29:04.445436  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1242 12:29:04.448654  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1243 12:29:04.452319  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1244 12:29:04.452953  
 1245 12:29:04.455631  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1246 12:29:04.455924  
 1247 12:29:04.459368  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1248 12:29:04.466361  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1249 12:29:04.473197  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1250 12:29:04.473495  
 1251 12:29:04.480780  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1252 12:29:04.481439  
 1253 12:29:04.489520  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1254 12:29:04.496036  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1255 12:29:04.499898  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem
 1256 12:29:04.507594  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1257 12:29:04.516075  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1258 12:29:04.524262  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1259 12:29:04.531093  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1260 12:29:04.531552  
 1261 12:29:04.535090  PCI: 02:00.0 10 *  [0x0 - 0x3fff] mem
 1262 12:29:04.543255  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1263 12:29:04.547480  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1264 12:29:04.552025  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1265 12:29:04.557074  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem
 1266 12:29:04.557366  
 1267 12:29:04.561735  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem
 1268 12:29:04.562063  
 1269 12:29:04.566843  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem
 1270 12:29:04.567129  
 1271 12:29:04.571598  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem
 1272 12:29:04.571893  
 1273 12:29:04.576233  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem
 1274 12:29:04.581743  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem
 1275 12:29:04.585927  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem
 1276 12:29:04.586501  
 1277 12:29:04.591229  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem
 1278 12:29:04.596210  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem
 1279 12:29:04.600917  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem
 1280 12:29:04.605846  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem
 1281 12:29:04.610729  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem
 1282 12:29:04.615110  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem
 1283 12:29:04.615539  
 1284 12:29:04.620015  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem
 1285 12:29:04.620309  
 1286 12:29:04.624828  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem
 1287 12:29:04.629825  PCI: 00:16.0 10 *  [0x11349000 - 0x11349fff] mem
 1288 12:29:04.635076  PCI: 00:19.0 10 *  [0x1134a000 - 0x1134afff] mem
 1289 12:29:04.640311  PCI: 00:19.0 18 *  [0x1134b000 - 0x1134bfff] mem
 1290 12:29:04.644550  PCI: 00:19.2 18 *  [0x1134c000 - 0x1134cfff] mem
 1291 12:29:04.644848  
 1292 12:29:04.649398  PCI: 00:1f.5 10 *  [0x1134d000 - 0x1134dfff] mem
 1293 12:29:04.654112  PCI: 00:17.0 24 *  [0x1134e000 - 0x1134e7ff] mem
 1294 12:29:04.659232  PCI: 00:17.0 14 *  [0x1134f000 - 0x1134f0ff] mem
 1295 12:29:04.663952  PCI: 00:1f.4 10 *  [0x11350000 - 0x113500ff] mem
 1296 12:29:04.672535  DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
 1297 12:29:04.676552  avoid_fixed_resources: DOMAIN: 0000
 1298 12:29:04.682478  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1299 12:29:04.688549  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1300 12:29:04.695676  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1301 12:29:04.703488  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
 1302 12:29:04.711184  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
 1303 12:29:04.718407  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
 1304 12:29:04.718836  
 1305 12:29:04.726623  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
 1306 12:29:04.726927  
 1307 12:29:04.733871  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1308 12:29:04.741166  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1309 12:29:04.748952  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1310 12:29:04.756670  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1311 12:29:04.763842  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1312 12:29:04.765889  Setting resources...
 1313 12:29:04.771759  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1314 12:29:04.772050  
 1315 12:29:04.776352  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1316 12:29:04.776639  
 1317 12:29:04.780289  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1318 12:29:04.780884  
 1319 12:29:04.783942  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1320 12:29:04.784513  
 1321 12:29:04.788657  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1322 12:29:04.794275  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1323 12:29:04.800901  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1324 12:29:04.807086  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1325 12:29:04.807649  
 1326 12:29:04.813034  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1327 12:29:04.813694  
 1328 12:29:04.819417  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1329 12:29:04.827123  DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
 1330 12:29:04.832102  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1331 12:29:04.837348  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1332 12:29:04.842547  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1333 12:29:04.846866  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem
 1334 12:29:04.851733  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem
 1335 12:29:04.856609  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem
 1336 12:29:04.856906  
 1337 12:29:04.861717  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem
 1338 12:29:04.866593  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem
 1339 12:29:04.871614  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem
 1340 12:29:04.875682  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem
 1341 12:29:04.875967  
 1342 12:29:04.880563  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem
 1343 12:29:04.885744  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem
 1344 12:29:04.891000  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem
 1345 12:29:04.895230  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem
 1346 12:29:04.899974  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem
 1347 12:29:04.904827  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem
 1348 12:29:04.909880  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem
 1349 12:29:04.915092  PCI: 00:16.0 10 *  [0xd1349000 - 0xd1349fff] mem
 1350 12:29:04.915731  
 1351 12:29:04.920264  PCI: 00:19.0 10 *  [0xd134a000 - 0xd134afff] mem
 1352 12:29:04.924770  PCI: 00:19.0 18 *  [0xd134b000 - 0xd134bfff] mem
 1353 12:29:04.925057  
 1354 12:29:04.929409  PCI: 00:19.2 18 *  [0xd134c000 - 0xd134cfff] mem
 1355 12:29:04.929785  
 1356 12:29:04.934377  PCI: 00:1f.5 10 *  [0xd134d000 - 0xd134dfff] mem
 1357 12:29:04.939170  PCI: 00:17.0 24 *  [0xd134e000 - 0xd134e7ff] mem
 1358 12:29:04.943900  PCI: 00:17.0 14 *  [0xd134f000 - 0xd134f0ff] mem
 1359 12:29:04.948717  PCI: 00:1f.4 10 *  [0xd1350000 - 0xd13500ff] mem
 1360 12:29:04.956338  DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
 1361 12:29:04.963996  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1362 12:29:04.971128  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1363 12:29:04.978476  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1364 12:29:04.983626  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem
 1365 12:29:04.990692  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
 1366 12:29:04.997794  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1367 12:29:04.998200  
 1368 12:29:05.005741  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1369 12:29:05.013199  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
 1370 12:29:05.013639  
 1371 12:29:05.017744  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1103fff] mem
 1372 12:29:05.025298  PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
 1373 12:29:05.029964  Root Device assign_resources, bus 0 link: 0
 1374 12:29:05.030279  
 1375 12:29:05.034441  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1376 12:29:05.043278  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1377 12:29:05.051446  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1378 12:29:05.058672  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1379 12:29:05.067349  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
 1380 12:29:05.075743  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
 1381 12:29:05.084326  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
 1382 12:29:05.091650  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
 1383 12:29:05.092022  
 1384 12:29:05.096391  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1385 12:29:05.101383  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1386 12:29:05.101946  
 1387 12:29:05.109587  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
 1388 12:29:05.117945  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
 1389 12:29:05.126152  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
 1390 12:29:05.126449  
 1391 12:29:05.134595  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
 1392 12:29:05.138794  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1393 12:29:05.144067  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1394 12:29:05.151372  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
 1395 12:29:05.151669  
 1396 12:29:05.156410  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1397 12:29:05.156938  
 1398 12:29:05.160819  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1399 12:29:05.168830  PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
 1400 12:29:05.169273  
 1401 12:29:05.177671  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
 1402 12:29:05.185266  PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
 1403 12:29:05.192940  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1404 12:29:05.200373  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1405 12:29:05.200664  
 1406 12:29:05.208424  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1407 12:29:05.215861  PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
 1408 12:29:05.224045  PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
 1409 12:29:05.224341  
 1410 12:29:05.231713  PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
 1411 12:29:05.236435  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1412 12:29:05.241386  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1413 12:29:05.249231  PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
 1414 12:29:05.257957  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1415 12:29:05.258698  
 1416 12:29:05.266986  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1417 12:29:05.275478  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1418 12:29:05.275900  
 1419 12:29:05.280192  PCI: 00:1c.0 assign_resources, bus 1 link: 0
 1420 12:29:05.288202  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
 1421 12:29:05.292992  PCI: 00:1c.0 assign_resources, bus 1 link: 0
 1422 12:29:05.301333  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
 1423 12:29:05.301658  
 1424 12:29:05.310644  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
 1425 12:29:05.319064  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
 1426 12:29:05.323110  PCI: 00:1d.0 assign_resources, bus 2 link: 0
 1427 12:29:05.332026  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
 1428 12:29:05.336590  PCI: 00:1d.0 assign_resources, bus 2 link: 0
 1429 12:29:05.341637  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1430 12:29:05.346503  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1431 12:29:05.347048  
 1432 12:29:05.351072  LPC: Trying to open IO window from 930 size 8
 1433 12:29:05.355033  LPC: Trying to open IO window from 940 size 8
 1434 12:29:05.360437  LPC: Trying to open IO window from 950 size 10
 1435 12:29:05.368158  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
 1436 12:29:05.376809  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
 1437 12:29:05.384994  PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
 1438 12:29:05.392709  PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
 1439 12:29:05.393004  
 1440 12:29:05.400412  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
 1441 12:29:05.400967  
 1442 12:29:05.405613  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1443 12:29:05.409993  Root Device assign_resources, bus 0 link: 0
 1444 12:29:05.413279  Done setting resources.
 1445 12:29:05.419036  Show resources in subtree (Root Device)...After assigning values.
 1446 12:29:05.423900   Root Device child on link 0 CPU_CLUSTER: 0
 1447 12:29:05.428465    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1448 12:29:05.429046     APIC: 00
 1449 12:29:05.429530  
 1450 12:29:05.430329     APIC: 02
 1451 12:29:05.434772    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1452 12:29:05.435073  
 1453 12:29:05.444669    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1454 12:29:05.455107    DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1455 12:29:05.456901     PCI: 00:00.0
 1456 12:29:05.467315     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1457 12:29:05.475811     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1458 12:29:05.484962     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1459 12:29:05.485579  
 1460 12:29:05.494944     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1461 12:29:05.495474  
 1462 12:29:05.503956     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1463 12:29:05.513397     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1464 12:29:05.522962     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1465 12:29:05.531491     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
 1466 12:29:05.540731     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
 1467 12:29:05.551022     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
 1468 12:29:05.559784     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
 1469 12:29:05.560277  
 1470 12:29:05.570179     PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
 1471 12:29:05.578881     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
 1472 12:29:05.579388  
 1473 12:29:05.587937     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
 1474 12:29:05.590192     PCI: 00:02.0
 1475 12:29:05.600430     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1476 12:29:05.610934     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1477 12:29:05.620601     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1478 12:29:05.621801     PCI: 00:04.0
 1479 12:29:05.632370     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
 1480 12:29:05.634481     PCI: 00:08.0
 1481 12:29:05.644287     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
 1482 12:29:05.644905  
 1483 12:29:05.645767     PCI: 00:12.0
 1484 12:29:05.655933     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
 1485 12:29:05.660958     PCI: 00:14.0 child on link 0 USB0 port 0
 1486 12:29:05.670528     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
 1487 12:29:05.671087  
 1488 12:29:05.675204      USB0 port 0 child on link 0 USB2 port 0
 1489 12:29:05.676839       USB2 port 0
 1490 12:29:05.677289  
 1491 12:29:05.678497       USB2 port 1
 1492 12:29:05.680846       USB2 port 2
 1493 12:29:05.683016       USB2 port 4
 1494 12:29:05.684289       USB2 port 5
 1495 12:29:05.685782       USB2 port 6
 1496 12:29:05.686256  
 1497 12:29:05.687520       USB2 port 7
 1498 12:29:05.689102       USB2 port 8
 1499 12:29:05.690925       USB2 port 9
 1500 12:29:05.691759  
 1501 12:29:05.693455       USB3 port 0
 1502 12:29:05.695226       USB3 port 1
 1503 12:29:05.695920       USB3 port 2
 1504 12:29:05.696206  
 1505 12:29:05.698080       USB3 port 3
 1506 12:29:05.699660       USB3 port 4
 1507 12:29:05.700406  
 1508 12:29:05.701553     PCI: 00:14.2
 1509 12:29:05.702248  
 1510 12:29:05.712099     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
 1511 12:29:05.712618  
 1512 12:29:05.722398     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
 1513 12:29:05.724006     PCI: 00:14.3
 1514 12:29:05.734024     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
 1515 12:29:05.734574  
 1516 12:29:05.738259     PCI: 00:15.0 child on link 0 I2C: 01:10
 1517 12:29:05.748344     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
 1518 12:29:05.748758  
 1519 12:29:05.750008      I2C: 01:10
 1520 12:29:05.751870      I2C: 01:10
 1521 12:29:05.753026      I2C: 01:34
 1522 12:29:05.753431  
 1523 12:29:05.757601     PCI: 00:15.1 child on link 0 I2C: 02:2c
 1524 12:29:05.758137  
 1525 12:29:05.768090     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
 1526 12:29:05.768397  
 1527 12:29:05.769794      I2C: 02:2c
 1528 12:29:05.771071     PCI: 00:16.0
 1529 12:29:05.782102     PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
 1530 12:29:05.782923     PCI: 00:17.0
 1531 12:29:05.793021     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
 1532 12:29:05.803791     PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
 1533 12:29:05.812545     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1534 12:29:05.813183  
 1535 12:29:05.821390     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1536 12:29:05.830470     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1537 12:29:05.840919     PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
 1538 12:29:05.845379     PCI: 00:19.0 child on link 0 I2C: 03:50
 1539 12:29:05.855084     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
 1540 12:29:05.865716     PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
 1541 12:29:05.866959      I2C: 03:50
 1542 12:29:05.868995     PCI: 00:19.2
 1543 12:29:05.880427     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1544 12:29:05.890443     PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
 1545 12:29:05.891200  
 1546 12:29:05.894656     PCI: 00:1c.0 child on link 0 PCI: 01:00.0
 1547 12:29:05.895180  
 1548 12:29:05.904010     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1549 12:29:05.913617     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1550 12:29:05.924238     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1551 12:29:05.925988      PCI: 01:00.0
 1552 12:29:05.936476      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
 1553 12:29:05.941594     PCI: 00:1d.0 child on link 0 PCI: 02:00.0
 1554 12:29:05.950316     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1555 12:29:05.960851     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1556 12:29:05.970397     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
 1557 12:29:05.973069      PCI: 02:00.0
 1558 12:29:05.982544      PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
 1559 12:29:05.982842  
 1560 12:29:05.986854     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1561 12:29:05.987281  
 1562 12:29:05.995549     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1563 12:29:05.996017  
 1564 12:29:06.005222     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1565 12:29:06.006497      PNP: 0c09.0
 1566 12:29:06.014874      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
 1567 12:29:06.023424      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
 1568 12:29:06.032102      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
 1569 12:29:06.034257     PCI: 00:1f.3
 1570 12:29:06.043839     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
 1571 12:29:06.044142  
 1572 12:29:06.054582     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
 1573 12:29:06.056463     PCI: 00:1f.4
 1574 12:29:06.065352     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1575 12:29:06.076340     PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
 1576 12:29:06.077536     PCI: 00:1f.5
 1577 12:29:06.087599     PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
 1578 12:29:06.089361     PCI: 00:1f.6
 1579 12:29:06.099820     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
 1580 12:29:06.102932  Done allocating resources.
 1581 12:29:06.108723  BS: BS_DEV_RESOURCES times (us): entry 0 run 2491308 exit 36
 1582 12:29:06.111137  Enabling resources...
 1583 12:29:06.115721  PCI: 00:00.0 subsystem <- 1028/3e35
 1584 12:29:06.116020  
 1585 12:29:06.118168  PCI: 00:00.0 cmd <- 06
 1586 12:29:06.122201  PCI: 00:02.0 subsystem <- 1028/3ea1
 1587 12:29:06.123863  PCI: 00:02.0 cmd <- 03
 1588 12:29:06.124494  
 1589 12:29:06.127971  PCI: 00:04.0 subsystem <- 1028/1903
 1590 12:29:06.130426  PCI: 00:04.0 cmd <- 02
 1591 12:29:06.132753  PCI: 00:08.0 cmd <- 06
 1592 12:29:06.133044  
 1593 12:29:06.137044  PCI: 00:12.0 subsystem <- 1028/9df9
 1594 12:29:06.137338  
 1595 12:29:06.139036  PCI: 00:12.0 cmd <- 02
 1596 12:29:06.143130  PCI: 00:14.0 subsystem <- 1028/9ded
 1597 12:29:06.143420  
 1598 12:29:06.145604  PCI: 00:14.0 cmd <- 02
 1599 12:29:06.147952  PCI: 00:14.2 cmd <- 02
 1600 12:29:06.152048  PCI: 00:14.3 subsystem <- 1028/9df0
 1601 12:29:06.154344  PCI: 00:14.3 cmd <- 02
 1602 12:29:06.158902  PCI: 00:15.0 subsystem <- 1028/9de8
 1603 12:29:06.160859  PCI: 00:15.0 cmd <- 02
 1604 12:29:06.164278  PCI: 00:15.1 subsystem <- 1028/9de9
 1605 12:29:06.164935  
 1606 12:29:06.167211  PCI: 00:15.1 cmd <- 02
 1607 12:29:06.170796  PCI: 00:16.0 subsystem <- 1028/9de0
 1608 12:29:06.173247  PCI: 00:16.0 cmd <- 02
 1609 12:29:06.177152  PCI: 00:17.0 subsystem <- 1028/9dd3
 1610 12:29:06.179220  PCI: 00:17.0 cmd <- 03
 1611 12:29:06.183957  PCI: 00:19.0 subsystem <- 1028/9dc5
 1612 12:29:06.186218  PCI: 00:19.0 cmd <- 06
 1613 12:29:06.189407  PCI: 00:19.2 subsystem <- 1028/9dc7
 1614 12:29:06.189698  
 1615 12:29:06.192528  PCI: 00:19.2 cmd <- 06
 1616 12:29:06.192821  
 1617 12:29:06.195726  PCI: 00:1c.0 bridge ctrl <- 0003
 1618 12:29:06.198849  PCI: 00:1c.0 subsystem <- 1028/9dbf
 1619 12:29:06.199138  
 1620 12:29:06.201966  Capability: type 0x10 @ 0x40
 1621 12:29:06.204876  Capability: type 0x05 @ 0x80
 1622 12:29:06.207920  Capability: type 0x0d @ 0x90
 1623 12:29:06.210796  PCI: 00:1c.0 cmd <- 06
 1624 12:29:06.214325  PCI: 00:1d.0 bridge ctrl <- 0003
 1625 12:29:06.217245  PCI: 00:1d.0 subsystem <- 1028/9db4
 1626 12:29:06.220364  Capability: type 0x10 @ 0x40
 1627 12:29:06.223690  Capability: type 0x05 @ 0x80
 1628 12:29:06.226556  Capability: type 0x0d @ 0x90
 1629 12:29:06.228515  PCI: 00:1d.0 cmd <- 06
 1630 12:29:06.232808  PCI: 00:1f.0 subsystem <- 1028/9d84
 1631 12:29:06.234791  PCI: 00:1f.0 cmd <- 407
 1632 12:29:06.235220  
 1633 12:29:06.239092  PCI: 00:1f.3 subsystem <- 1028/9dc8
 1634 12:29:06.241367  PCI: 00:1f.3 cmd <- 02
 1635 12:29:06.245400  PCI: 00:1f.4 subsystem <- 1028/9da3
 1636 12:29:06.247236  PCI: 00:1f.4 cmd <- 03
 1637 12:29:06.251263  PCI: 00:1f.5 subsystem <- 1028/9da4
 1638 12:29:06.251557  
 1639 12:29:06.253768  PCI: 00:1f.5 cmd <- 406
 1640 12:29:06.257861  PCI: 00:1f.6 subsystem <- 1028/15be
 1641 12:29:06.260414  PCI: 00:1f.6 cmd <- 02
 1642 12:29:06.270540  PCI: 01:00.0 cmd <- 02
 1643 12:29:06.274318  PCI: 02:00.0 cmd <- 02
 1644 12:29:06.275776  done.
 1645 12:29:06.281604  BS: BS_DEV_ENABLE times (us): entry 396 run 167049 exit 0
 1646 12:29:06.281902  
 1647 12:29:06.284268  Initializing devices...
 1648 12:29:06.284906  
 1649 12:29:06.286660  Root Device init ...
 1650 12:29:06.290352  Root Device init finished in 2138 usecs
 1651 12:29:06.293501  CPU_CLUSTER: 0 init ...
 1652 12:29:06.297160  CPU_CLUSTER: 0 init finished in 2430 usecs
 1653 12:29:06.301480  PCI: 00:00.0 init ...
 1654 12:29:06.301775  
 1655 12:29:06.304002  CPU TDP: 15 Watts
 1656 12:29:06.306696  CPU PL2 = 51 Watts
 1657 12:29:06.309797  PCI: 00:00.0 init finished in 7035 usecs
 1658 12:29:06.313084  PCI: 00:02.0 init ...
 1659 12:29:06.317221  PCI: 00:02.0 init finished in 2236 usecs
 1660 12:29:06.319174  PCI: 00:04.0 init ...
 1661 12:29:06.323164  PCI: 00:04.0 init finished in 2235 usecs
 1662 12:29:06.323452  
 1663 12:29:06.326273  PCI: 00:08.0 init ...
 1664 12:29:06.330082  PCI: 00:08.0 init finished in 2235 usecs
 1665 12:29:06.333146  PCI: 00:12.0 init ...
 1666 12:29:06.337444  PCI: 00:12.0 init finished in 2235 usecs
 1667 12:29:06.339648  PCI: 00:14.0 init ...
 1668 12:29:06.344138  PCI: 00:14.0 init finished in 2236 usecs
 1669 12:29:06.346481  PCI: 00:14.2 init ...
 1670 12:29:06.350217  PCI: 00:14.2 init finished in 2236 usecs
 1671 12:29:06.350716  
 1672 12:29:06.353451  PCI: 00:14.3 init ...
 1673 12:29:06.357514  PCI: 00:14.3 init finished in 2241 usecs
 1674 12:29:06.360276  PCI: 00:15.0 init ...
 1675 12:29:06.363884  DW I2C bus 0 at 0xd1347000 (400 KHz)
 1676 12:29:06.367915  PCI: 00:15.0 init finished in 5934 usecs
 1677 12:29:06.370164  PCI: 00:15.1 init ...
 1678 12:29:06.370701  
 1679 12:29:06.373928  DW I2C bus 1 at 0xd1348000 (400 KHz)
 1680 12:29:06.374310  
 1681 12:29:06.378027  PCI: 00:15.1 init finished in 5933 usecs
 1682 12:29:06.381113  PCI: 00:16.0 init ...
 1683 12:29:06.385164  PCI: 00:16.0 init finished in 2234 usecs
 1684 12:29:06.387579  PCI: 00:19.0 init ...
 1685 12:29:06.391720  DW I2C bus 4 at 0xd134a000 (400 KHz)
 1686 12:29:06.395548  PCI: 00:19.0 init finished in 5923 usecs
 1687 12:29:06.398416  PCI: 00:1c.0 init ...
 1688 12:29:06.401879  Initializing PCH PCIe bridge.
 1689 12:29:06.405594  PCI: 00:1c.0 init finished in 5248 usecs
 1690 12:29:06.408753  PCI: 00:1d.0 init ...
 1691 12:29:06.411772  Initializing PCH PCIe bridge.
 1692 12:29:06.415696  PCI: 00:1d.0 init finished in 5247 usecs
 1693 12:29:06.418697  PCI: 00:1f.0 init ...
 1694 12:29:06.422695  IOAPIC: Initializing IOAPIC at 0xfec00000
 1695 12:29:06.427085  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1696 12:29:06.428623  IOAPIC: ID = 0x02
 1697 12:29:06.431341  IOAPIC: Dumping registers
 1698 12:29:06.434325    reg 0x0000: 0x02000000
 1699 12:29:06.436113    reg 0x0001: 0x00770020
 1700 12:29:06.436470  
 1701 12:29:06.438772    reg 0x0002: 0x00000000
 1702 12:29:06.443590  PCI: 00:1f.0 init finished in 23294 usecs
 1703 12:29:06.445792  PCI: 00:1f.3 init ...
 1704 12:29:06.450781  HDA: codec_mask = 05
 1705 12:29:06.451087  
 1706 12:29:06.454174  HDA: Initializing codec #2
 1707 12:29:06.456975  HDA: codec viddid: 8086280b
 1708 12:29:06.460496  HDA: No verb table entry found
 1709 12:29:06.462318  HDA: Initializing codec #0
 1710 12:29:06.465140  HDA: codec viddid: 10ec0236
 1711 12:29:06.472329  HDA: verb loaded.
 1712 12:29:06.476636  PCI: 00:1f.3 init finished in 28838 usecs
 1713 12:29:06.477411  
 1714 12:29:06.480336  PCI: 00:1f.4 init ...
 1715 12:29:06.483976  PCI: 00:1f.4 init finished in 2245 usecs
 1716 12:29:06.484283  
 1717 12:29:06.486741  PCI: 00:1f.6 init ...
 1718 12:29:06.490756  PCI: 00:1f.6 init finished in 2227 usecs
 1719 12:29:06.501497  PCI: 01:00.0 init ...
 1720 12:29:06.505614  PCI: 01:00.0 init finished in 2235 usecs
 1721 12:29:06.508737  PCI: 02:00.0 init ...
 1722 12:29:06.512167  PCI: 02:00.0 init finished in 2235 usecs
 1723 12:29:06.513051  
 1724 12:29:06.515276  PNP: 0c09.0 init ...
 1725 12:29:06.518661  EC Label      : 00.00.20
 1726 12:29:06.519422  
 1727 12:29:06.522625  EC Revision   : 9ca674bba
 1728 12:29:06.522923  
 1729 12:29:06.526032  EC Model Num  : 08B9
 1730 12:29:06.529847  EC Build Date : 05/10/19
 1731 12:29:06.538677  PNP: 0c09.0 init finished in 21762 usecs
 1732 12:29:06.541439  Devices initialized
 1733 12:29:06.543882  Show all devs... After init.
 1734 12:29:06.546217  Root Device: enabled 1
 1735 12:29:06.549058  CPU_CLUSTER: 0: enabled 1
 1736 12:29:06.551706  DOMAIN: 0000: enabled 1
 1737 12:29:06.553725  APIC: 00: enabled 1
 1738 12:29:06.555959  PCI: 00:00.0: enabled 1
 1739 12:29:06.557941  PCI: 00:02.0: enabled 1
 1740 12:29:06.560255  PCI: 00:04.0: enabled 1
 1741 12:29:06.560552  
 1742 12:29:06.563318  PCI: 00:12.0: enabled 1
 1743 12:29:06.565168  PCI: 00:12.5: enabled 0
 1744 12:29:06.567915  PCI: 00:12.6: enabled 0
 1745 12:29:06.568584  
 1746 12:29:06.571004  PCI: 00:13.0: enabled 0
 1747 12:29:06.572469  PCI: 00:14.0: enabled 1
 1748 12:29:06.575197  PCI: 00:14.1: enabled 0
 1749 12:29:06.577433  PCI: 00:14.3: enabled 1
 1750 12:29:06.580686  PCI: 00:14.5: enabled 0
 1751 12:29:06.583124  PCI: 00:15.0: enabled 1
 1752 12:29:06.584599  PCI: 00:15.1: enabled 1
 1753 12:29:06.584897  
 1754 12:29:06.587658  PCI: 00:15.2: enabled 0
 1755 12:29:06.589721  PCI: 00:15.3: enabled 0
 1756 12:29:06.592136  PCI: 00:16.0: enabled 1
 1757 12:29:06.592428  
 1758 12:29:06.594567  PCI: 00:16.1: enabled 0
 1759 12:29:06.597361  PCI: 00:16.2: enabled 0
 1760 12:29:06.599772  PCI: 00:16.3: enabled 0
 1761 12:29:06.601731  PCI: 00:16.4: enabled 0
 1762 12:29:06.604074  PCI: 00:16.5: enabled 0
 1763 12:29:06.604369  
 1764 12:29:06.607423  PCI: 00:17.0: enabled 1
 1765 12:29:06.609034  PCI: 00:19.0: enabled 1
 1766 12:29:06.612226  PCI: 00:19.1: enabled 0
 1767 12:29:06.613942  PCI: 00:19.2: enabled 1
 1768 12:29:06.616624  PCI: 00:1a.0: enabled 0
 1769 12:29:06.619532  PCI: 00:1c.0: enabled 1
 1770 12:29:06.621890  PCI: 00:1c.1: enabled 0
 1771 12:29:06.624257  PCI: 00:1c.2: enabled 0
 1772 12:29:06.626244  PCI: 00:1c.3: enabled 0
 1773 12:29:06.628522  PCI: 00:1c.4: enabled 0
 1774 12:29:06.628820  
 1775 12:29:06.631050  PCI: 00:1c.5: enabled 0
 1776 12:29:06.633740  PCI: 00:1c.6: enabled 0
 1777 12:29:06.635581  PCI: 00:1c.7: enabled 0
 1778 12:29:06.635882  
 1779 12:29:06.638344  PCI: 00:1d.0: enabled 1
 1780 12:29:06.641044  PCI: 00:1d.1: enabled 0
 1781 12:29:06.641343  
 1782 12:29:06.643016  PCI: 00:1d.2: enabled 0
 1783 12:29:06.643298  
 1784 12:29:06.645474  PCI: 00:1d.3: enabled 0
 1785 12:29:06.646240  
 1786 12:29:06.648054  PCI: 00:1d.4: enabled 0
 1787 12:29:06.650348  PCI: 00:1e.0: enabled 0
 1788 12:29:06.653017  PCI: 00:1e.1: enabled 0
 1789 12:29:06.655567  PCI: 00:1e.2: enabled 0
 1790 12:29:06.657592  PCI: 00:1e.3: enabled 0
 1791 12:29:06.657880  
 1792 12:29:06.660267  PCI: 00:1f.0: enabled 1
 1793 12:29:06.660694  
 1794 12:29:06.662670  PCI: 00:1f.1: enabled 0
 1795 12:29:06.664881  PCI: 00:1f.2: enabled 0
 1796 12:29:06.667708  PCI: 00:1f.3: enabled 1
 1797 12:29:06.669909  PCI: 00:1f.4: enabled 1
 1798 12:29:06.672416  PCI: 00:1f.5: enabled 1
 1799 12:29:06.675285  PCI: 00:1f.6: enabled 1
 1800 12:29:06.677551  USB0 port 0: enabled 1
 1801 12:29:06.679436  I2C: 01:10: enabled 1
 1802 12:29:06.681760  I2C: 01:10: enabled 1
 1803 12:29:06.682065  
 1804 12:29:06.684025  I2C: 01:34: enabled 1
 1805 12:29:06.684325  
 1806 12:29:06.686445  I2C: 02:2c: enabled 1
 1807 12:29:06.687989  I2C: 03:50: enabled 1
 1808 12:29:06.688506  
 1809 12:29:06.691022  PNP: 0c09.0: enabled 1
 1810 12:29:06.693018  USB2 port 0: enabled 1
 1811 12:29:06.695785  USB2 port 1: enabled 1
 1812 12:29:06.698173  USB2 port 2: enabled 1
 1813 12:29:06.700347  USB2 port 4: enabled 1
 1814 12:29:06.702916  USB2 port 5: enabled 1
 1815 12:29:06.705115  USB2 port 6: enabled 1
 1816 12:29:06.707384  USB2 port 7: enabled 1
 1817 12:29:06.709801  USB2 port 8: enabled 1
 1818 12:29:06.711442  USB2 port 9: enabled 1
 1819 12:29:06.711727  
 1820 12:29:06.714545  USB3 port 0: enabled 1
 1821 12:29:06.716334  USB3 port 1: enabled 1
 1822 12:29:06.716618  
 1823 12:29:06.718789  USB3 port 2: enabled 1
 1824 12:29:06.720941  USB3 port 3: enabled 1
 1825 12:29:06.721765  
 1826 12:29:06.723649  USB3 port 4: enabled 1
 1827 12:29:06.725804  APIC: 02: enabled 1
 1828 12:29:06.727990  PCI: 00:08.0: enabled 1
 1829 12:29:06.730050  PCI: 00:14.2: enabled 1
 1830 12:29:06.732651  PCI: 01:00.0: enabled 1
 1831 12:29:06.732958  
 1832 12:29:06.734996  PCI: 02:00.0: enabled 1
 1833 12:29:06.740174  Disabling ACPI via APMC:
 1834 12:29:06.742176  done.
 1835 12:29:06.747117  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
 1836 12:29:06.751078  ELOG: NV offset 0x1bf0000 size 0x4000
 1837 12:29:06.751384  
 1838 12:29:06.758741  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1839 12:29:06.765316  ELOG: Event(17) added with size 13 at 2022-12-01 12:29:06 UTC
 1840 12:29:06.770218  POST: Unexpected post code in previous boot: 0x75
 1841 12:29:06.776113  ELOG: Event(A3) added with size 11 at 2022-12-01 12:29:06 UTC
 1842 12:29:06.776467  
 1843 12:29:06.782999  ELOG: Event(A6) added with size 13 at 2022-12-01 12:29:06 UTC
 1844 12:29:06.789211  ELOG: Event(92) added with size 9 at 2022-12-01 12:29:06 UTC
 1845 12:29:06.795310  ELOG: Event(93) added with size 9 at 2022-12-01 12:29:06 UTC
 1846 12:29:06.801597  ELOG: Event(9A) added with size 9 at 2022-12-01 12:29:06 UTC
 1847 12:29:06.808328  ELOG: Event(9E) added with size 10 at 2022-12-01 12:29:06 UTC
 1848 12:29:06.814235  ELOG: Event(9F) added with size 14 at 2022-12-01 12:29:06 UTC
 1849 12:29:06.820170  BS: BS_DEV_INIT times (us): entry 0 run 453470 exit 78876
 1850 12:29:06.826738  ELOG: Event(A1) added with size 10 at 2022-12-01 12:29:06 UTC
 1851 12:29:06.834761  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1852 12:29:06.840971  ELOG: Event(A0) added with size 9 at 2022-12-01 12:29:06 UTC
 1853 12:29:06.844743  elog_add_boot_reason: Logged dev mode boot
 1854 12:29:06.847063  Finalize devices...
 1855 12:29:06.849058  PCI: 00:17.0 final
 1856 12:29:06.851377  Devices finalized
 1857 12:29:06.856476  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
 1858 12:29:06.861929  BS: BS_POST_DEVICE times (us): entry 24775 run 5935 exit 5370
 1859 12:29:06.862225  
 1860 12:29:06.867696  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
 1861 12:29:06.876367  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
 1862 12:29:06.881022  disable_unused_touchscreen: Disable ACPI0C50
 1863 12:29:06.885194  disable_unused_touchscreen: Enable ELAN900C
 1864 12:29:06.888273  CBFS @ 1d00000 size 300000
 1865 12:29:06.894755  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 1866 12:29:06.897773  CBFS: Locating 'fallback/dsdt.aml'
 1867 12:29:06.898297  
 1868 12:29:06.902063  CBFS: Found @ offset 10b200 size 4448
 1869 12:29:06.905279  CBFS @ 1d00000 size 300000
 1870 12:29:06.910781  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 1871 12:29:06.911175  
 1872 12:29:06.914504  CBFS: Locating 'fallback/slic'
 1873 12:29:06.915208  
 1874 12:29:06.919653  CBFS: 'fallback/slic' not found.
 1875 12:29:06.923615  ACPI: Writing ACPI tables at 89c0f000.
 1876 12:29:06.924974  ACPI:    * FACS
 1877 12:29:06.926462  ACPI:    * DSDT
 1878 12:29:06.930113  Ramoops buffer: 0x100000@0x89b0e000.
 1879 12:29:06.930856  
 1880 12:29:06.935409  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
 1881 12:29:06.939562  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
 1882 12:29:06.943456  ACPI:    * FADT
 1883 12:29:06.944375  SCI is IRQ9
 1884 12:29:06.944679  
 1885 12:29:06.948294  ACPI: added table 1/32, length now 40
 1886 12:29:06.948752  
 1887 12:29:06.949910  ACPI:     * SSDT
 1888 12:29:06.954448  Found 1 CPU(s) with 2 core(s) each.
 1889 12:29:06.958225  Error: Could not locate 'wifi_sar' in VPD.
 1890 12:29:06.962706  Error: failed from getting SAR limits!
 1891 12:29:06.965941  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
 1892 12:29:06.969902  dw_i2c: bad counts. hcnt = -14 lcnt = 30
 1893 12:29:06.974683  dw_i2c: bad counts. hcnt = -20 lcnt = 40
 1894 12:29:06.978184  dw_i2c: bad counts. hcnt = -18 lcnt = 48
 1895 12:29:06.983425  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
 1896 12:29:06.983977  
 1897 12:29:06.989274  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
 1898 12:29:06.993379  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
 1899 12:29:06.998475  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
 1900 12:29:07.004004  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1901 12:29:07.004542  
 1902 12:29:07.010324  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
 1903 12:29:07.015151  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
 1904 12:29:07.015455  
 1905 12:29:07.021410  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
 1906 12:29:07.026501  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
 1907 12:29:07.026803  
 1908 12:29:07.031223  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
 1909 12:29:07.034803  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
 1910 12:29:07.035365  
 1911 12:29:07.040184  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
 1912 12:29:07.045337  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1913 12:29:07.051068  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1914 12:29:07.051483  
 1915 12:29:07.057346  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
 1916 12:29:07.062774  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1917 12:29:07.069568  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
 1918 12:29:07.073613  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
 1919 12:29:07.074183  
 1920 12:29:07.077625  ACPI: added table 2/32, length now 44
 1921 12:29:07.077944  
 1922 12:29:07.078926  ACPI:    * MCFG
 1923 12:29:07.083408  ACPI: added table 3/32, length now 48
 1924 12:29:07.084702  ACPI:    * TPM2
 1925 12:29:07.087099  TPM2 log created at 89afe000
 1926 12:29:07.091240  ACPI: added table 4/32, length now 52
 1927 12:29:07.092587  ACPI:    * MADT
 1928 12:29:07.094344  SCI is IRQ9
 1929 12:29:07.094648  
 1930 12:29:07.097900  ACPI: added table 5/32, length now 56
 1931 12:29:07.100081  current = 89c14720
 1932 12:29:07.101956  ACPI:    * IGD OpRegion
 1933 12:29:07.102326  
 1934 12:29:07.104664  GMA: Found VBT in CBFS
 1935 12:29:07.104960  
 1936 12:29:07.107658  GMA: Found valid VBT in CBFS
 1937 12:29:07.111549  ACPI: added table 6/32, length now 60
 1938 12:29:07.113215  ACPI:    * HPET
 1939 12:29:07.113839  
 1940 12:29:07.117205  ACPI: added table 7/32, length now 64
 1941 12:29:07.118409  ACPI: done.
 1942 12:29:07.120708  ACPI tables: 30672 bytes.
 1943 12:29:07.121251  
 1944 12:29:07.123611  smbios_write_tables: 89afd000
 1945 12:29:07.123924  
 1946 12:29:07.126682  recv_ec_data: 0x01
 1947 12:29:07.128053  Create SMBIOS type 17
 1948 12:29:07.130738  PCI: 00:14.3 (Intel WiFi)
 1949 12:29:07.133344  SMBIOS tables: 707 bytes.
 1950 12:29:07.137677  Writing table forward entry at 0x00000500
 1951 12:29:07.137985  
 1952 12:29:07.143697  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
 1953 12:29:07.147517  Writing coreboot table at 0x89c33000
 1954 12:29:07.153226   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1955 12:29:07.157378   1. 0000000000001000-000000000009ffff: RAM
 1956 12:29:07.162421   2. 00000000000a0000-00000000000fffff: RESERVED
 1957 12:29:07.163103  
 1958 12:29:07.166667   3. 0000000000100000-0000000089afcfff: RAM
 1959 12:29:07.172319   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
 1960 12:29:07.172850  
 1961 12:29:07.177335   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
 1962 12:29:07.183321   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
 1963 12:29:07.187736   7. 000000008a000000-000000008f7fffff: RESERVED
 1964 12:29:07.188293  
 1965 12:29:07.192999   8. 00000000e0000000-00000000efffffff: RESERVED
 1966 12:29:07.197211   9. 00000000fc000000-00000000fc000fff: RESERVED
 1967 12:29:07.202886  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1968 12:29:07.207047  11. 00000000fed10000-00000000fed17fff: RESERVED
 1969 12:29:07.211644  12. 00000000fed80000-00000000fed83fff: RESERVED
 1970 12:29:07.216722  13. 00000000feda0000-00000000feda1fff: RESERVED
 1971 12:29:07.217222  
 1972 12:29:07.221248  14. 0000000100000000-000000016e7fffff: RAM
 1973 12:29:07.225255  Graphics framebuffer located at 0xc0000000
 1974 12:29:07.225552  
 1975 12:29:07.227673  Passing 6 GPIOs to payload:
 1976 12:29:07.233604              NAME |       PORT | POLARITY |     VALUE
 1977 12:29:07.237941     write protect | 0x000000dc |     high |      high
 1978 12:29:07.238294  
 1979 12:29:07.244276          recovery | 0x000000d5 |      low |      high
 1980 12:29:07.249049               lid |  undefined |     high |      high
 1981 12:29:07.249474  
 1982 12:29:07.254163             power |  undefined |     high |       low
 1983 12:29:07.259474             oprom |  undefined |     high |       low
 1984 12:29:07.264820          EC in RW |  undefined |     high |       low
 1985 12:29:07.266692  recv_ec_data: 0x01
 1986 12:29:07.267999  SKU ID: 3
 1987 12:29:07.270762  CBFS @ 1d00000 size 300000
 1988 12:29:07.277559  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 1989 12:29:07.283713  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum d61e
 1990 12:29:07.286183  coreboot table: 1484 bytes.
 1991 12:29:07.289232  IMD ROOT    0. 89fff000 00001000
 1992 12:29:07.292476  IMD SMALL   1. 89ffe000 00001000
 1993 12:29:07.292780  
 1994 12:29:07.295770  FSP MEMORY  2. 89d0e000 002f0000
 1995 12:29:07.299665  CONSOLE     3. 89cee000 00020000
 1996 12:29:07.302651  TIME STAMP  4. 89ced000 00000910
 1997 12:29:07.305508  VBOOT WORK  5. 89cea000 00003000
 1998 12:29:07.305823  
 1999 12:29:07.309545  VBOOT       6. 89ce9000 00000c0c
 2000 12:29:07.312704  MRC DATA    7. 89ce7000 000018f0
 2001 12:29:07.313404  
 2002 12:29:07.315703  ROMSTG STCK 8. 89ce6000 00000400
 2003 12:29:07.319264  AFTER CAR   9. 89cdc000 0000a000
 2004 12:29:07.322515  RAMSTAGE   10. 89c80000 0005c000
 2005 12:29:07.323090  
 2006 12:29:07.326557  REFCODE    11. 89c4b000 00035000
 2007 12:29:07.329755  SMM BACKUP 12. 89c3b000 00010000
 2008 12:29:07.332608  COREBOOT   13. 89c33000 00008000
 2009 12:29:07.333240  
 2010 12:29:07.339532  ACPI       14. 89c0f000 00024000
 2011 12:29:07.339627  ACPI GNVS  15. 89c0e000 00001000
 2012 12:29:07.341936  RAMOOPS    16. 89b0e000 00100000
 2013 12:29:07.342480  
 2014 12:29:07.345479  TPM2 TCGLOG17. 89afe000 00010000
 2015 12:29:07.349324  SMBIOS     18. 89afd000 00000800
 2016 12:29:07.350610  IMD small region:
 2017 12:29:07.354446    IMD ROOT    0. 89ffec00 00000400
 2018 12:29:07.357843    FSP RUNTIME 1. 89ffebe0 00000004
 2019 12:29:07.358411  
 2020 12:29:07.361453    POWER STATE 2. 89ffeba0 00000040
 2021 12:29:07.361765  
 2022 12:29:07.364734    ROMSTAGE    3. 89ffeb80 00000004
 2023 12:29:07.365407  
 2024 12:29:07.368401    MEM INFO    4. 89ffe9c0 000001a9
 2025 12:29:07.371881    VPD         5. 89ffe980 00000031
 2026 12:29:07.375812    COREBOOTFWD 6. 89ffe940 00000028
 2027 12:29:07.378496  MTRR: Physical address space:
 2028 12:29:07.384640  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 2029 12:29:07.390471  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 2030 12:29:07.396914  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
 2031 12:29:07.397511  
 2032 12:29:07.402935  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
 2033 12:29:07.403368  
 2034 12:29:07.409430  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 2035 12:29:07.415485  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 2036 12:29:07.421780  0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
 2037 12:29:07.425786  MTRR: Fixed MSR 0x250 0x0606060606060606
 2038 12:29:07.430616  MTRR: Fixed MSR 0x258 0x0606060606060606
 2039 12:29:07.434578  MTRR: Fixed MSR 0x259 0x0000000000000000
 2040 12:29:07.438176  MTRR: Fixed MSR 0x268 0x0606060606060606
 2041 12:29:07.442433  MTRR: Fixed MSR 0x269 0x0606060606060606
 2042 12:29:07.446281  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2043 12:29:07.446592  
 2044 12:29:07.450861  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2045 12:29:07.454552  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2046 12:29:07.458427  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2047 12:29:07.462965  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2048 12:29:07.467098  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2049 12:29:07.469650  call enable_fixed_mtrr()
 2050 12:29:07.473420  CPU physical address size: 39 bits
 2051 12:29:07.473904  
 2052 12:29:07.477486  MTRR: default type WB/UC MTRR counts: 7/6.
 2053 12:29:07.477792  
 2054 12:29:07.481654  MTRR: UC selected as default type.
 2055 12:29:07.487299  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 2056 12:29:07.493585  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
 2057 12:29:07.499512  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
 2058 12:29:07.505740  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
 2059 12:29:07.506111  
 2060 12:29:07.512424  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 2061 12:29:07.518205  MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
 2062 12:29:07.518603  
 2063 12:29:07.519018  
 2064 12:29:07.520715  MTRR check
 2065 12:29:07.522522  Fixed MTRRs   : Enabled
 2066 12:29:07.522800  
 2067 12:29:07.524919  Variable MTRRs: Enabled
 2068 12:29:07.525222  
 2069 12:29:07.525307  
 2070 12:29:07.528828  MTRR: Fixed MSR 0x250 0x0606060606060606
 2071 12:29:07.529133  
 2072 12:29:07.533349  MTRR: Fixed MSR 0x258 0x0606060606060606
 2073 12:29:07.537354  MTRR: Fixed MSR 0x259 0x0000000000000000
 2074 12:29:07.541367  MTRR: Fixed MSR 0x268 0x0606060606060606
 2075 12:29:07.545635  MTRR: Fixed MSR 0x269 0x0606060606060606
 2076 12:29:07.549565  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2077 12:29:07.553524  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2078 12:29:07.553832  
 2079 12:29:07.557664  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2080 12:29:07.562014  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2081 12:29:07.562620  
 2082 12:29:07.565706  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2083 12:29:07.570193  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2084 12:29:07.576665  BS: BS_WRITE_TABLES times (us): entry 17194 run 490088 exit 150010
 2085 12:29:07.579603  call enable_fixed_mtrr()
 2086 12:29:07.582304  CBFS @ 1d00000 size 300000
 2087 12:29:07.588118  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 2088 12:29:07.591488  CPU physical address size: 39 bits
 2089 12:29:07.595496  CBFS: Locating 'fallback/payload'
 2090 12:29:07.599925  CBFS: Found @ offset 1cf4c0 size 3a954
 2091 12:29:07.604628  Checking segment from ROM address 0xffecf4f8
 2092 12:29:07.608733  Checking segment from ROM address 0xffecf514
 2093 12:29:07.613148  Loading segment from ROM address 0xffecf4f8
 2094 12:29:07.613715  
 2095 12:29:07.615982    code (compression=0)
 2096 12:29:07.624310    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
 2097 12:29:07.632442  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
 2098 12:29:07.632928  
 2099 12:29:07.635373  it's not compressed!
 2100 12:29:07.716384  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
 2101 12:29:07.716747  
 2102 12:29:07.723669  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
 2103 12:29:07.731997  Loading segment from ROM address 0xffecf514
 2104 12:29:07.734524    Entry Point 0x30100018
 2105 12:29:07.736269  Loaded segments
 2106 12:29:07.745838  Finalizing chipset.
 2107 12:29:07.747627  Finalizing SMM.
 2108 12:29:07.753359  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 159338 exit 11537
 2109 12:29:07.756923  mp_park_aps done after 0 msecs.
 2110 12:29:07.757221  
 2111 12:29:07.761537  Jumping to boot code at 30100018(89c33000)
 2112 12:29:07.761852  
 2113 12:29:07.769929  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
 2114 12:29:07.770052  
 2115 12:29:07.770132  
 2116 12:29:07.770410  
 2117 12:29:07.770492  
 2118 12:29:07.773569  Starting depthcharge on sarien...
 2119 12:29:07.773665  
 2120 12:29:07.774400  end: 2.2.3 depthcharge-start (duration 00:00:27) [common]
 2121 12:29:07.774520  start: 2.2.4 bootloader-commands (timeout 00:04:33) [common]
 2122 12:29:07.774617  Setting prompt string to ['sarien:']
 2123 12:29:07.774706  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:33)
 2124 12:29:07.781224  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2125 12:29:07.781924  
 2126 12:29:07.788889  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2127 12:29:07.789181  
 2128 12:29:07.796984  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
 2129 12:29:07.797134  
 2130 12:29:07.799345  BIOS MMAP details:
 2131 12:29:07.799449  
 2132 12:29:07.802186  IFD Base Offset  : 0x1000000
 2133 12:29:07.802291  
 2134 12:29:07.804391  IFD End Offset   : 0x2000000
 2135 12:29:07.804670  
 2136 12:29:07.807845  MMAP Size        : 0x1000000
 2137 12:29:07.807963  
 2138 12:29:07.810219  MMAP Start       : 0xff000000
 2139 12:29:07.810498  
 2140 12:29:07.817699  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
 2141 12:29:07.817849  
 2142 12:29:07.824112  Failed to find BH720 with VID/DID 1217:8620
 2143 12:29:07.824825  
 2144 12:29:07.828824  New NVMe Controller 0x3214e050 @ 00:1d:04
 2145 12:29:07.828946  
 2146 12:29:07.832670  New NVMe Controller 0x3214e118 @ 00:1d:00
 2147 12:29:07.833292  
 2148 12:29:07.838654  The GBB signature is at 0x30000014 and is:  24 47 42 42
 2149 12:29:07.838938  
 2150 12:29:07.844858  Wipe memory regions:
 2151 12:29:07.844953  
 2152 12:29:07.848393  	[0x00000000001000, 0x000000000a0000)
 2153 12:29:07.848488  
 2154 12:29:07.852404  	[0x00000000100000, 0x00000030000000)
 2155 12:29:07.852684  
 2156 12:29:07.938235  	[0x00000032751910, 0x00000089afd000)
 2157 12:29:07.938576  
 2158 12:29:08.093020  	[0x00000100000000, 0x0000016e800000)
 2159 12:29:08.093174  
 2160 12:29:08.864317  R8152: Initializing
 2161 12:29:08.864480  
 2162 12:29:08.867226  Version 6 (ocp_data = 5c30)
 2163 12:29:08.867326  
 2164 12:29:08.870276  R8152: Done initializing
 2165 12:29:08.870384  
 2166 12:29:08.872528  Adding net device
 2167 12:29:08.872811  
 2168 12:29:08.878339  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38
 2169 12:29:08.878433  
 2170 12:29:08.878509  
 2171 12:29:08.878581  
 2172 12:29:08.879590  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2174 12:29:08.980324  sarien: tftpboot 192.168.201.1 8193654/tftp-deploy-siz69mjx/kernel/bzImage 8193654/tftp-deploy-siz69mjx/kernel/cmdline 8193654/tftp-deploy-siz69mjx/ramdisk/ramdisk.cpio.gz
 2175 12:29:08.980510  Setting prompt string to 'Starting kernel'
 2176 12:29:08.980615  Setting prompt string to ['Starting kernel']
 2177 12:29:08.980726  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2178 12:29:08.980852  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:32)
 2179 12:29:08.981894  tftpboot 192.168.201.1 8193654/tftp-deploy-siz69mjx/kernel/bzImage 8193654/tftp-deploy-siz69mjx/kernel/cmdline 8193654/tftp-deploy-siz69mjx/ramdisk/ramdisk.cpio.gz
 2180 12:29:08.982025  
 2181 12:29:08.983645  Waiting for link
 2182 12:29:08.983750  
 2183 12:29:09.183947  done.
 2184 12:29:09.184310  
 2185 12:29:09.186860  MAC: 00:24:32:30:77:df
 2186 12:29:09.186956  
 2187 12:29:09.190286  Sending DHCP discover... done.
 2188 12:29:09.190383  
 2189 12:29:09.193065  Waiting for reply... done.
 2190 12:29:09.193161  
 2191 12:29:09.195777  Sending DHCP request... done.
 2192 12:29:09.195875  
 2193 12:29:09.198659  Waiting for reply... done.
 2194 12:29:09.198750  
 2195 12:29:09.200888  My ip is 192.168.201.221
 2196 12:29:09.200980  
 2197 12:29:09.204307  The DHCP server ip is 192.168.201.1
 2198 12:29:09.204409  
 2199 12:29:09.209593  TFTP server IP predefined by user: 192.168.201.1
 2200 12:29:09.209691  
 2201 12:29:09.216083  Bootfile predefined by user: 8193654/tftp-deploy-siz69mjx/kernel/bzImage
 2202 12:29:09.216370  
 2203 12:29:09.220035  Sending tftp read request... done.
 2204 12:29:09.220131  
 2205 12:29:09.223419  Waiting for the transfer... 
 2206 12:29:09.223924  
 2207 12:29:09.688438  00000000 ################################################################
 2208 12:29:09.688998  
 2209 12:29:10.164076  00080000 ################################################################
 2210 12:29:10.164645  
 2211 12:29:10.634049  00100000 ################################################################
 2212 12:29:10.634214  
 2213 12:29:11.129758  00180000 ################################################################
 2214 12:29:11.129934  
 2215 12:29:11.612737  00200000 ################################################################
 2216 12:29:11.613323  
 2217 12:29:12.110097  00280000 ################################################################
 2218 12:29:12.110722  
 2219 12:29:12.601532  00300000 ################################################################
 2220 12:29:12.602222  
 2221 12:29:13.065053  00380000 ################################################################
 2222 12:29:13.065201  
 2223 12:29:13.527608  00400000 ################################################################
 2224 12:29:13.528057  
 2225 12:29:13.991989  00480000 ################################################################
 2226 12:29:13.992592  
 2227 12:29:14.471966  00500000 ################################################################
 2228 12:29:14.472622  
 2229 12:29:14.957284  00580000 ################################################################
 2230 12:29:14.957661  
 2231 12:29:15.443770  00600000 ################################################################
 2232 12:29:15.444144  
 2233 12:29:15.786435  00680000 ############################################## done.
 2234 12:29:15.786810  
 2235 12:29:15.790087  The bootfile was 7188368 bytes long.
 2236 12:29:15.790180  
 2237 12:29:15.793653  Sending tftp read request... done.
 2238 12:29:15.793750  
 2239 12:29:15.796592  Waiting for the transfer... 
 2240 12:29:15.796684  
 2241 12:29:16.304030  00000000 ################################################################
 2242 12:29:16.304412  
 2243 12:29:16.819992  00080000 ################################################################
 2244 12:29:16.820780  
 2245 12:29:17.334453  00100000 ################################################################
 2246 12:29:17.334601  
 2247 12:29:17.858486  00180000 ################################################################
 2248 12:29:17.858944  
 2249 12:29:18.372930  00200000 ################################################################
 2250 12:29:18.373328  
 2251 12:29:18.895358  00280000 ################################################################
 2252 12:29:18.895768  
 2253 12:29:19.413542  00300000 ################################################################
 2254 12:29:19.413691  
 2255 12:29:19.930724  00380000 ################################################################
 2256 12:29:19.931123  
 2257 12:29:20.452482  00400000 ################################################################
 2258 12:29:20.452639  
 2259 12:29:20.977651  00480000 ################################################################
 2260 12:29:20.978119  
 2261 12:29:21.534874  00500000 ################################################################
 2262 12:29:21.535295  
 2263 12:29:22.134240  00580000 ################################################################
 2264 12:29:22.134723  
 2265 12:29:22.724927  00600000 ################################################################
 2266 12:29:22.725397  
 2267 12:29:23.320420  00680000 ################################################################
 2268 12:29:23.320983  
 2269 12:29:23.918042  00700000 ################################################################
 2270 12:29:23.919228  
 2271 12:29:24.521503  00780000 ################################################################
 2272 12:29:24.522035  
 2273 12:29:24.709063  00800000 #################### done.
 2274 12:29:24.709610  
 2275 12:29:24.712468  Sending tftp read request... done.
 2276 12:29:24.712882  
 2277 12:29:24.715160  Waiting for the transfer... 
 2278 12:29:24.715548  
 2279 12:29:24.717170  00000000 # done.
 2280 12:29:24.717557  
 2281 12:29:24.725798  Command line loaded dynamically from TFTP file: 8193654/tftp-deploy-siz69mjx/kernel/cmdline
 2282 12:29:24.726236  
 2283 12:29:24.743664  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2284 12:29:24.744106  
 2285 12:29:24.750164  Shutting down all USB controllers.
 2286 12:29:24.750598  
 2287 12:29:24.752921  Removing current net device
 2288 12:29:24.753298  
 2289 12:29:24.756669  EC: exit firmware mode
 2290 12:29:24.756948  
 2291 12:29:24.759447  Finalizing coreboot
 2292 12:29:24.759767  
 2293 12:29:24.765469  Exiting depthcharge with code 4 at timestamp: 23908055
 2294 12:29:24.765566  
 2295 12:29:24.765646  
 2296 12:29:24.766924  Starting kernel ...
 2297 12:29:24.767014  
 2298 12:29:24.767422  end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
 2299 12:29:24.767538  start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
 2300 12:29:24.767624  Setting prompt string to ['Linux version [0-9]']
 2301 12:29:24.767704  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2302 12:29:24.767783  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2303 12:29:24.767998  
 2304 12:29:24.768081  
 2305 12:29:24.768153  
 2307 12:33:40.767810  end: 2.2.5 auto-login-action (duration 00:04:16) [common]
 2309 12:33:40.768052  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
 2311 12:33:40.768228  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2314 12:33:40.768514  end: 2 depthcharge-action (duration 00:05:00) [common]
 2316 12:33:40.768760  Cleaning after the job
 2317 12:33:40.768893  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193654/tftp-deploy-siz69mjx/ramdisk
 2318 12:33:40.769608  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193654/tftp-deploy-siz69mjx/kernel
 2319 12:33:40.770198  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193654/tftp-deploy-siz69mjx/modules
 2320 12:33:40.770402  start: 5.1 power-off (timeout 00:00:30) [common]
 2321 12:33:40.770579  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=off'
 2322 12:33:40.792012  >> Command sent successfully.

 2323 12:33:40.794157  Returned 0 in 0 seconds
 2324 12:33:40.894912  end: 5.1 power-off (duration 00:00:00) [common]
 2326 12:33:40.895273  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2327 12:33:40.895540  Listened to connection for namespace 'common' for up to 1s
 2328 12:33:41.899809  Finalising connection for namespace 'common'
 2329 12:33:41.900565  Disconnecting from shell: Finalise
 2330 12:33:42.001765  end: 5.2 read-feedback (duration 00:00:01) [common]
 2331 12:33:42.001938  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8193654
 2332 12:33:42.007401  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8193654
 2333 12:33:42.007588  JobError: Your job cannot terminate cleanly.