Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:29:18.161122 lava-dispatcher, installed at version: 2022.10
2 12:29:18.161303 start: 0 validate
3 12:29:18.161433 Start time: 2022-12-01 12:29:18.161427+00:00 (UTC)
4 12:29:18.161561 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:29:18.161692 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221125.0%2Famd64%2Finitrd.cpio.gz exists
6 12:29:18.453904 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:29:18.454082 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:29:18.744015 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:29:18.744178 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221125.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:29:19.032875 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:29:19.033030 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:29:19.319260 validate duration: 1.16
14 12:29:19.319552 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:29:19.319667 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:29:19.319757 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:29:19.319856 Not decompressing ramdisk as can be used compressed.
18 12:29:19.319945 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221125.0/amd64/initrd.cpio.gz
19 12:29:19.320010 saving as /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/ramdisk/initrd.cpio.gz
20 12:29:19.320075 total size: 5431607 (5MB)
21 12:29:19.321185 progress 0% (0MB)
22 12:29:19.322709 progress 5% (0MB)
23 12:29:19.324052 progress 10% (0MB)
24 12:29:19.325464 progress 15% (0MB)
25 12:29:19.326966 progress 20% (1MB)
26 12:29:19.328283 progress 25% (1MB)
27 12:29:19.329629 progress 30% (1MB)
28 12:29:19.331087 progress 35% (1MB)
29 12:29:19.332444 progress 40% (2MB)
30 12:29:19.333789 progress 45% (2MB)
31 12:29:19.335099 progress 50% (2MB)
32 12:29:19.336552 progress 55% (2MB)
33 12:29:19.337892 progress 60% (3MB)
34 12:29:19.339197 progress 65% (3MB)
35 12:29:19.340648 progress 70% (3MB)
36 12:29:19.342035 progress 75% (3MB)
37 12:29:19.343364 progress 80% (4MB)
38 12:29:19.344675 progress 85% (4MB)
39 12:29:19.346171 progress 90% (4MB)
40 12:29:19.347471 progress 95% (4MB)
41 12:29:19.348830 progress 100% (5MB)
42 12:29:19.349119 5MB downloaded in 0.03s (178.38MB/s)
43 12:29:19.349278 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:29:19.349518 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:29:19.349610 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:29:19.349698 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:29:19.349805 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:29:19.349872 saving as /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/kernel/bzImage
50 12:29:19.349934 total size: 7188368 (6MB)
51 12:29:19.349997 No compression specified
52 12:29:19.351048 progress 0% (0MB)
53 12:29:19.352950 progress 5% (0MB)
54 12:29:19.354771 progress 10% (0MB)
55 12:29:19.356633 progress 15% (1MB)
56 12:29:19.358475 progress 20% (1MB)
57 12:29:19.360265 progress 25% (1MB)
58 12:29:19.362101 progress 30% (2MB)
59 12:29:19.363888 progress 35% (2MB)
60 12:29:19.365659 progress 40% (2MB)
61 12:29:19.367425 progress 45% (3MB)
62 12:29:19.369250 progress 50% (3MB)
63 12:29:19.371019 progress 55% (3MB)
64 12:29:19.372830 progress 60% (4MB)
65 12:29:19.374587 progress 65% (4MB)
66 12:29:19.376369 progress 70% (4MB)
67 12:29:19.378167 progress 75% (5MB)
68 12:29:19.380032 progress 80% (5MB)
69 12:29:19.381870 progress 85% (5MB)
70 12:29:19.383687 progress 90% (6MB)
71 12:29:19.385490 progress 95% (6MB)
72 12:29:19.387263 progress 100% (6MB)
73 12:29:19.387464 6MB downloaded in 0.04s (182.68MB/s)
74 12:29:19.387616 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:29:19.387868 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:29:19.387959 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:29:19.388050 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:29:19.388159 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221125.0/amd64/full.rootfs.tar.xz
80 12:29:19.388230 saving as /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/nfsrootfs/full.rootfs.tar
81 12:29:19.388293 total size: 133311584 (127MB)
82 12:29:19.388354 Using unxz to decompress xz
83 12:29:19.391681 progress 0% (0MB)
84 12:29:19.733858 progress 5% (6MB)
85 12:29:20.102365 progress 10% (12MB)
86 12:29:20.400432 progress 15% (19MB)
87 12:29:20.606931 progress 20% (25MB)
88 12:29:20.866334 progress 25% (31MB)
89 12:29:21.225158 progress 30% (38MB)
90 12:29:21.588158 progress 35% (44MB)
91 12:29:21.999572 progress 40% (50MB)
92 12:29:22.393268 progress 45% (57MB)
93 12:29:22.758760 progress 50% (63MB)
94 12:29:23.138674 progress 55% (69MB)
95 12:29:23.514497 progress 60% (76MB)
96 12:29:23.885354 progress 65% (82MB)
97 12:29:24.258850 progress 70% (89MB)
98 12:29:24.636123 progress 75% (95MB)
99 12:29:25.084015 progress 80% (101MB)
100 12:29:25.538007 progress 85% (108MB)
101 12:29:25.817785 progress 90% (114MB)
102 12:29:26.166642 progress 95% (120MB)
103 12:29:26.567658 progress 100% (127MB)
104 12:29:26.573012 127MB downloaded in 7.18s (17.70MB/s)
105 12:29:26.573283 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:29:26.573548 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:29:26.573639 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:29:26.573728 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:29:26.573843 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:29:26.573910 saving as /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/modules/modules.tar
112 12:29:26.573971 total size: 54724 (0MB)
113 12:29:26.574033 Using unxz to decompress xz
114 12:29:26.577075 progress 59% (0MB)
115 12:29:26.577480 progress 100% (0MB)
116 12:29:26.580916 0MB downloaded in 0.01s (7.52MB/s)
117 12:29:26.581139 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:29:26.581398 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:29:26.581493 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 12:29:26.581605 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 12:29:27.820591 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8193655/extract-nfsrootfs-w5ljo8l2
123 12:29:27.820819 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:29:27.820924 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 12:29:27.821126 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u
126 12:29:27.821227 makedir: /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin
127 12:29:27.821310 makedir: /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/tests
128 12:29:27.821407 makedir: /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/results
129 12:29:27.821536 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-add-keys
130 12:29:27.821714 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-add-sources
131 12:29:27.821845 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-background-process-start
132 12:29:27.821959 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-background-process-stop
133 12:29:27.822085 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-common-functions
134 12:29:27.822193 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-echo-ipv4
135 12:29:27.822300 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-install-packages
136 12:29:27.822405 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-installed-packages
137 12:29:27.822510 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-os-build
138 12:29:27.822616 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-probe-channel
139 12:29:27.822722 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-probe-ip
140 12:29:27.822827 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-target-ip
141 12:29:27.822932 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-target-mac
142 12:29:27.823038 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-target-storage
143 12:29:27.823147 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-test-case
144 12:29:27.823255 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-test-event
145 12:29:27.823361 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-test-feedback
146 12:29:27.823468 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-test-raise
147 12:29:27.823573 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-test-reference
148 12:29:27.823678 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-test-runner
149 12:29:27.823783 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-test-set
150 12:29:27.823887 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-test-shell
151 12:29:27.823994 Updating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-install-packages (oe)
152 12:29:27.824104 Updating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/bin/lava-installed-packages (oe)
153 12:29:27.824200 Creating /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/environment
154 12:29:27.824285 LAVA metadata
155 12:29:27.824350 - LAVA_JOB_ID=8193655
156 12:29:27.824413 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:29:27.824509 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 12:29:27.824573 skipped lava-vland-overlay
159 12:29:27.824649 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:29:27.824936 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 12:29:27.825003 skipped lava-multinode-overlay
162 12:29:27.825094 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:29:27.825176 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 12:29:27.825250 Loading test definitions
165 12:29:27.825338 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 12:29:27.825409 Using /lava-8193655 at stage 0
167 12:29:27.825658 uuid=8193655_1.5.2.3.1 testdef=None
168 12:29:27.825748 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:29:27.825836 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 12:29:27.826300 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:29:27.826527 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 12:29:27.827140 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:29:27.827378 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 12:29:27.827906 runner path: /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/0/tests/0_dmesg test_uuid 8193655_1.5.2.3.1
177 12:29:27.828052 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:29:27.828283 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 12:29:27.828417 Using /lava-8193655 at stage 1
181 12:29:27.828650 uuid=8193655_1.5.2.3.5 testdef=None
182 12:29:27.828769 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:29:27.828870 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 12:29:27.829304 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:29:27.829527 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 12:29:27.830085 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:29:27.830318 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 12:29:27.830887 runner path: /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/1/tests/1_bootrr test_uuid 8193655_1.5.2.3.5
191 12:29:27.831026 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:29:27.831234 Creating lava-test-runner.conf files
194 12:29:27.831298 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/0 for stage 0
195 12:29:27.831378 - 0_dmesg
196 12:29:27.831451 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193655/lava-overlay-nl4lc06u/lava-8193655/1 for stage 1
197 12:29:27.831532 - 1_bootrr
198 12:29:27.831622 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:29:27.831708 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 12:29:27.837262 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:29:27.837366 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 12:29:27.837454 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:29:27.837543 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:29:27.837647 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 12:29:27.942522 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:29:27.942861 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 12:29:27.942986 extracting modules file /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8193655/extract-nfsrootfs-w5ljo8l2
208 12:29:27.947205 extracting modules file /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8193655/extract-overlay-ramdisk-dr24ukew/ramdisk
209 12:29:27.951193 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:29:27.951321 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 12:29:27.951410 [common] Applying overlay to NFS
212 12:29:27.951485 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8193655/compress-overlay-2m5yduwb/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8193655/extract-nfsrootfs-w5ljo8l2
213 12:29:27.955297 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:29:27.955410 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 12:29:27.955503 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:29:27.955592 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 12:29:27.955675 Building ramdisk /var/lib/lava/dispatcher/tmp/8193655/extract-overlay-ramdisk-dr24ukew/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8193655/extract-overlay-ramdisk-dr24ukew/ramdisk
218 12:29:27.990416 >> 24582 blocks
219 12:29:28.482947 rename /var/lib/lava/dispatcher/tmp/8193655/extract-overlay-ramdisk-dr24ukew/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/ramdisk/ramdisk.cpio.gz
220 12:29:28.483349 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:29:28.483483 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 12:29:28.483589 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 12:29:28.483686 No mkimage arch provided, not using FIT.
224 12:29:28.483779 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:29:28.483871 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:29:28.483972 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:29:28.484069 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 12:29:28.484149 No LXC device requested
229 12:29:28.484261 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:29:28.484359 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 12:29:28.484444 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:29:28.484519 Checking files for TFTP limit of 4294967296 bytes.
233 12:29:28.484952 end: 1 tftp-deploy (duration 00:00:09) [common]
234 12:29:28.485078 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:29:28.485204 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:29:28.485349 substitutions:
237 12:29:28.485421 - {DTB}: None
238 12:29:28.485491 - {INITRD}: 8193655/tftp-deploy-jziwgso_/ramdisk/ramdisk.cpio.gz
239 12:29:28.485553 - {KERNEL}: 8193655/tftp-deploy-jziwgso_/kernel/bzImage
240 12:29:28.485613 - {LAVA_MAC}: None
241 12:29:28.485674 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8193655/extract-nfsrootfs-w5ljo8l2
242 12:29:28.485733 - {NFS_SERVER_IP}: 192.168.201.1
243 12:29:28.485790 - {PRESEED_CONFIG}: None
244 12:29:28.485851 - {PRESEED_LOCAL}: None
245 12:29:28.485907 - {RAMDISK}: 8193655/tftp-deploy-jziwgso_/ramdisk/ramdisk.cpio.gz
246 12:29:28.485964 - {ROOT_PART}: None
247 12:29:28.486022 - {ROOT}: None
248 12:29:28.486078 - {SERVER_IP}: 192.168.201.1
249 12:29:28.486133 - {TEE}: None
250 12:29:28.486191 Parsed boot commands:
251 12:29:28.486246 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:29:28.486403 Parsed boot commands: tftpboot 192.168.201.1 8193655/tftp-deploy-jziwgso_/kernel/bzImage 8193655/tftp-deploy-jziwgso_/kernel/cmdline 8193655/tftp-deploy-jziwgso_/ramdisk/ramdisk.cpio.gz
253 12:29:28.486496 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:29:28.486593 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:29:28.486693 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:29:28.486786 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:29:28.486856 Not connected, no need to disconnect.
258 12:29:28.486937 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:29:28.487024 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:29:28.487096 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
261 12:29:28.489718 Setting prompt string to ['lava-test: # ']
262 12:29:28.490015 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:29:28.490120 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:29:28.490225 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:29:28.490315 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:29:28.490497 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
267 12:29:28.509671 >> Command sent successfully.
268 12:29:28.511724 Returned 0 in 0 seconds
269 12:29:28.612474 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:29:28.612833 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:29:28.612939 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:29:28.613022 Setting prompt string to 'Starting depthcharge on Helios...'
274 12:29:28.613091 Changing prompt to 'Starting depthcharge on Helios...'
275 12:29:28.613194 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
276 12:29:28.613470 [Enter `^Ec?' for help]
277 12:29:35.254965
278 12:29:35.255241
279 12:29:35.264739 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
280 12:29:35.268114 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
281 12:29:35.274979 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
282 12:29:35.278130 CPU: AES supported, TXT NOT supported, VT supported
283 12:29:35.284764 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
284 12:29:35.288122 PCH: device id 0284 (rev 00) is Cometlake-U Premium
285 12:29:35.294537 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
286 12:29:35.298298 VBOOT: Loading verstage.
287 12:29:35.301638 FMAP: Found "FLASH" version 1.1 at 0xc04000.
288 12:29:35.308006 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
289 12:29:35.311155 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 12:29:35.314397 CBFS @ c08000 size 3f8000
291 12:29:35.321420 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
292 12:29:35.324580 CBFS: Locating 'fallback/verstage'
293 12:29:35.327597 CBFS: Found @ offset 10fb80 size 1072c
294 12:29:35.331265
295 12:29:35.331499
296 12:29:35.341480 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
297 12:29:35.355953 Probing TPM: . done!
298 12:29:35.359127 TPM ready after 0 ms
299 12:29:35.362351 Connected to device vid:did:rid of 1ae0:0028:00
300 12:29:35.373069 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
301 12:29:35.376173 Initialized TPM device CR50 revision 0
302 12:29:35.417107 tlcl_send_startup: Startup return code is 0
303 12:29:35.417379 TPM: setup succeeded
304 12:29:35.429806 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
305 12:29:35.433571 Chrome EC: UHEPI supported
306 12:29:35.436647 Phase 1
307 12:29:35.439930 FMAP: area GBB found @ c05000 (12288 bytes)
308 12:29:35.446856 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
309 12:29:35.450007 Phase 2
310 12:29:35.450301 Phase 3
311 12:29:35.453234 FMAP: area GBB found @ c05000 (12288 bytes)
312 12:29:35.459729 VB2:vb2_report_dev_firmware() This is developer signed firmware
313 12:29:35.466190 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 12:29:35.469444 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 12:29:35.476376 VB2:vb2_verify_keyblock() Checking keyblock signature...
316 12:29:35.492161 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 12:29:35.495501 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
318 12:29:35.502586 VB2:vb2_verify_fw_preamble() Verifying preamble.
319 12:29:35.506413 Phase 4
320 12:29:35.509499 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
321 12:29:35.516506 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
322 12:29:35.519647
323 12:29:35.696205 VB2:vb2_rsa_verify_digest() Digest check failed!
324 12:29:35.699429 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
325 12:29:35.702659
326 12:29:35.703146 Saving nvdata
327 12:29:35.706295 Reboot requested (10020007)
328 12:29:35.709603 board_reset() called!
329 12:29:35.710073 full_reset() called!
330 12:29:40.222281
331 12:29:40.222426
332 12:29:40.232580 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
333 12:29:40.235795 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
334 12:29:40.242144 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
335 12:29:40.245824 CPU: AES supported, TXT NOT supported, VT supported
336 12:29:40.252165 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
337 12:29:40.255238 PCH: device id 0284 (rev 00) is Cometlake-U Premium
338 12:29:40.262251 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
339 12:29:40.265469 VBOOT: Loading verstage.
340 12:29:40.268546 FMAP: Found "FLASH" version 1.1 at 0xc04000.
341 12:29:40.274887 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
342 12:29:40.281758 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
343 12:29:40.281844 CBFS @ c08000 size 3f8000
344 12:29:40.288557 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
345 12:29:40.291838 CBFS: Locating 'fallback/verstage'
346 12:29:40.295018 CBFS: Found @ offset 10fb80 size 1072c
347 12:29:40.299417
348 12:29:40.299502
349 12:29:40.308867 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
350 12:29:40.323465 Probing TPM: . done!
351 12:29:40.326655 TPM ready after 0 ms
352 12:29:40.329817 Connected to device vid:did:rid of 1ae0:0028:00
353 12:29:40.340460 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
354 12:29:40.343443 Initialized TPM device CR50 revision 0
355 12:29:40.384356 tlcl_send_startup: Startup return code is 0
356 12:29:40.384452 TPM: setup succeeded
357 12:29:40.397119 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
358 12:29:40.401487 Chrome EC: UHEPI supported
359 12:29:40.404603 Phase 1
360 12:29:40.407794 FMAP: area GBB found @ c05000 (12288 bytes)
361 12:29:40.414625 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
362 12:29:40.421050 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
363 12:29:40.424208 Recovery requested (1009000e)
364 12:29:40.430317 Saving nvdata
365 12:29:40.436119 tlcl_extend: response is 0
366 12:29:40.444827 tlcl_extend: response is 0
367 12:29:40.452231 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 12:29:40.455319 CBFS @ c08000 size 3f8000
369 12:29:40.461746 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 12:29:40.464986 CBFS: Locating 'fallback/romstage'
371 12:29:40.468243 CBFS: Found @ offset 80 size 145fc
372 12:29:40.471840 Accumulated console time in verstage 98 ms
373 12:29:40.471924
374 12:29:40.471990
375 12:29:40.484583 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
376 12:29:40.491210 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
377 12:29:40.494265 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
378 12:29:40.498106 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
379 12:29:40.501361
380 12:29:40.504566 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
381 12:29:40.507764 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
382 12:29:40.510875 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
383 12:29:40.514089 TCO_STS: 0000 0000
384 12:29:40.517230 GEN_PMCON: e0015238 00000200
385 12:29:40.520997 GBLRST_CAUSE: 00000000 00000000
386 12:29:40.521081 prev_sleep_state 5
387 12:29:40.524288
388 12:29:40.527397 Boot Count incremented to 39742
389 12:29:40.530660 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
390 12:29:40.533838 CBFS @ c08000 size 3f8000
391 12:29:40.540280 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
392 12:29:40.543418 CBFS: Locating 'fspm.bin'
393 12:29:40.547217 CBFS: Found @ offset 5ffc0 size 71000
394 12:29:40.550220 Chrome EC: UHEPI supported
395 12:29:40.557076 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
396 12:29:40.561495 Probing TPM: done!
397 12:29:40.567903 Connected to device vid:did:rid of 1ae0:0028:00
398 12:29:40.578197 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
399 12:29:40.583844 Initialized TPM device CR50 revision 0
400 12:29:40.592937 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
401 12:29:40.599804 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
402 12:29:40.602750 MRC cache found, size 1948
403 12:29:40.605933 bootmode is set to: 2
404 12:29:40.609772 PRMRR disabled by config.
405 12:29:40.609856 SPD INDEX = 1
406 12:29:40.612888
407 12:29:40.616029 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 12:29:40.619283 CBFS @ c08000 size 3f8000
409 12:29:40.625630 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 12:29:40.625717 CBFS: Locating 'spd.bin'
411 12:29:40.628916 CBFS: Found @ offset 5fb80 size 400
412 12:29:40.632551 SPD: module type is LPDDR3
413 12:29:40.635763 SPD: module part is
414 12:29:40.642596 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 12:29:40.645899 SPD: device width 4 bits, bus width 8 bits
416 12:29:40.648885 SPD: module size is 4096 MB (per channel)
417 12:29:40.652489 memory slot: 0 configuration done.
418 12:29:40.655541 memory slot: 2 configuration done.
419 12:29:40.707557 CBMEM:
420 12:29:40.710662 IMD: root @ 99fff000 254 entries.
421 12:29:40.714466 IMD: root @ 99ffec00 62 entries.
422 12:29:40.717690 External stage cache:
423 12:29:40.720755 IMD: root @ 9abff000 254 entries.
424 12:29:40.724018 IMD: root @ 9abfec00 62 entries.
425 12:29:40.731278 Chrome EC: clear events_b mask to 0x0000000020004000
426 12:29:40.743951 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 12:29:40.754244 tlcl_write: response is 0
428 12:29:40.765975 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 12:29:40.772460 MRC: TPM MRC hash updated successfully.
430 12:29:40.772545 2 DIMMs found
431 12:29:40.775732 SMM Memory Map
432 12:29:40.778823 SMRAM : 0x9a000000 0x1000000
433 12:29:40.782001 Subregion 0: 0x9a000000 0xa00000
434 12:29:40.785726 Subregion 1: 0x9aa00000 0x200000
435 12:29:40.788992 Subregion 2: 0x9ac00000 0x400000
436 12:29:40.792098 top_of_ram = 0x9a000000
437 12:29:40.795146 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 12:29:40.802103 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 12:29:40.805192 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 12:29:40.812166 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 12:29:40.815253 CBFS @ c08000 size 3f8000
442 12:29:40.818500 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 12:29:40.821624 CBFS: Locating 'fallback/postcar'
444 12:29:40.828587 CBFS: Found @ offset 107000 size 4b44
445 12:29:40.834865 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 12:29:40.844412 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 12:29:40.848136 Processing 180 relocs. Offset value of 0x97c0c000
448 12:29:40.856515 Accumulated console time in romstage 286 ms
449 12:29:40.856600
450 12:29:40.856666
451 12:29:40.866249 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 12:29:40.873148 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 12:29:40.875879 CBFS @ c08000 size 3f8000
454 12:29:40.882753 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 12:29:40.885743 CBFS: Locating 'fallback/ramstage'
456 12:29:40.888982 CBFS: Found @ offset 43380 size 1b9e8
457 12:29:40.895855 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 12:29:40.927887 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 12:29:40.931742 Processing 3976 relocs. Offset value of 0x98db0000
460 12:29:40.934925
461 12:29:40.938142 Accumulated console time in postcar 52 ms
462 12:29:40.938257
463 12:29:40.938342
464 12:29:40.947963 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 12:29:40.954360 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 12:29:40.957915 WARNING: RO_VPD is uninitialized or empty.
467 12:29:40.961152 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 12:29:40.967420 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 12:29:40.967506 Normal boot.
470 12:29:40.974313 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 12:29:40.977492 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 12:29:40.980639 CBFS @ c08000 size 3f8000
473 12:29:40.987681 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 12:29:40.990971 CBFS: Locating 'cpu_microcode_blob.bin'
475 12:29:40.994113 CBFS: Found @ offset 14700 size 2ec00
476 12:29:40.997250 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 12:29:41.000407 Skip microcode update
478 12:29:41.007294 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 12:29:41.007379 CBFS @ c08000 size 3f8000
480 12:29:41.010406
481 12:29:41.013617 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
482 12:29:41.016671 CBFS: Locating 'fsps.bin'
483 12:29:41.020467 CBFS: Found @ offset d1fc0 size 35000
484 12:29:41.046781 Detected 4 core, 8 thread CPU.
485 12:29:41.049821 Setting up SMI for CPU
486 12:29:41.053146 IED base = 0x9ac00000
487 12:29:41.053230 IED size = 0x00400000
488 12:29:41.056215 Will perform SMM setup.
489 12:29:41.063098 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
490 12:29:41.069436 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
491 12:29:41.073131 Processing 16 relocs. Offset value of 0x00030000
492 12:29:41.076337
493 12:29:41.076422 Attempting to start 7 APs
494 12:29:41.082501 Waiting for 10ms after sending INIT.
495 12:29:41.096021 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
496 12:29:41.096111 done.
497 12:29:41.099226 AP: slot 6 apic_id 6.
498 12:29:41.102980 AP: slot 7 apic_id 7.
499 12:29:41.106135 Waiting for 2nd SIPI to complete...done.
500 12:29:41.109346 AP: slot 5 apic_id 5.
501 12:29:41.109432 AP: slot 2 apic_id 4.
502 12:29:41.112436 AP: slot 4 apic_id 2.
503 12:29:41.115719 AP: slot 1 apic_id 3.
504 12:29:41.122444 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
505 12:29:41.128951 Processing 13 relocs. Offset value of 0x00038000
506 12:29:41.135239 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
507 12:29:41.139013 Installing SMM handler to 0x9a000000
508 12:29:41.145334 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
509 12:29:41.152134 Processing 658 relocs. Offset value of 0x9a010000
510 12:29:41.158516 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
511 12:29:41.161650 Processing 13 relocs. Offset value of 0x9a008000
512 12:29:41.165255
513 12:29:41.168423 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
514 12:29:41.174782 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
515 12:29:41.181790 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
516 12:29:41.184952 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
517 12:29:41.191800 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
518 12:29:41.198087 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
519 12:29:41.205048 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
520 12:29:41.211199 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
521 12:29:41.214338 Clearing SMI status registers
522 12:29:41.214424 SMI_STS: PM1
523 12:29:41.218145 PM1_STS: PWRBTN
524 12:29:41.218230 TCO_STS: SECOND_TO
525 12:29:41.221222 New SMBASE 0x9a000000
526 12:29:41.224245 In relocation handler: CPU 0
527 12:29:41.227471 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
528 12:29:41.234553 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 12:29:41.234640 Relocation complete.
530 12:29:41.237661 New SMBASE 0x99fff400
531 12:29:41.240892 In relocation handler: CPU 3
532 12:29:41.244181 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
533 12:29:41.250559 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 12:29:41.250646 Relocation complete.
535 12:29:41.253706 New SMBASE 0x99ffe400
536 12:29:41.256988 In relocation handler: CPU 7
537 12:29:41.260632 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
538 12:29:41.266801 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 12:29:41.266887 Relocation complete.
540 12:29:41.270725 New SMBASE 0x99ffe800
541 12:29:41.273916 In relocation handler: CPU 6
542 12:29:41.277061 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
543 12:29:41.283533 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 12:29:41.283619 Relocation complete.
545 12:29:41.286797 New SMBASE 0x99fffc00
546 12:29:41.289900 In relocation handler: CPU 1
547 12:29:41.293187 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
548 12:29:41.299590 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 12:29:41.299675 Relocation complete.
550 12:29:41.303331 New SMBASE 0x99fff000
551 12:29:41.306462 In relocation handler: CPU 4
552 12:29:41.309673 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
553 12:29:41.316177 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 12:29:41.316263 Relocation complete.
555 12:29:41.319238 New SMBASE 0x99ffec00
556 12:29:41.322975 In relocation handler: CPU 5
557 12:29:41.326234 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
558 12:29:41.332457 Writing SMRR. base = 0x9a000006, mask=0xff000800
559 12:29:41.332545 Relocation complete.
560 12:29:41.335626 New SMBASE 0x99fff800
561 12:29:41.339416 In relocation handler: CPU 2
562 12:29:41.342727 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
563 12:29:41.349082 Writing SMRR. base = 0x9a000006, mask=0xff000800
564 12:29:41.349170 Relocation complete.
565 12:29:41.352032 Initializing CPU #0
566 12:29:41.355766 CPU: vendor Intel device 806ec
567 12:29:41.359054 CPU: family 06, model 8e, stepping 0c
568 12:29:41.362203 Clearing out pending MCEs
569 12:29:41.365326 Setting up local APIC...
570 12:29:41.365413 apic_id: 0x00 done.
571 12:29:41.368541 Turbo is available but hidden
572 12:29:41.372216 Turbo is available and visible
573 12:29:41.375345 VMX status: enabled
574 12:29:41.378583 IA32_FEATURE_CONTROL status: locked
575 12:29:41.381742 Skip microcode update
576 12:29:41.381828 CPU #0 initialized
577 12:29:41.385598 Initializing CPU #3
578 12:29:41.385684 Initializing CPU #6
579 12:29:41.388861 Initializing CPU #7
580 12:29:41.391913 CPU: vendor Intel device 806ec
581 12:29:41.395025 CPU: family 06, model 8e, stepping 0c
582 12:29:41.398215 CPU: vendor Intel device 806ec
583 12:29:41.402011 CPU: family 06, model 8e, stepping 0c
584 12:29:41.405111 Initializing CPU #1
585 12:29:41.405197 Initializing CPU #4
586 12:29:41.408275 CPU: vendor Intel device 806ec
587 12:29:41.415145 CPU: family 06, model 8e, stepping 0c
588 12:29:41.418324 CPU: vendor Intel device 806ec
589 12:29:41.421520 CPU: family 06, model 8e, stepping 0c
590 12:29:41.421607 Clearing out pending MCEs
591 12:29:41.424668 Clearing out pending MCEs
592 12:29:41.427790 Setting up local APIC...
593 12:29:41.431671 Clearing out pending MCEs
594 12:29:41.434797 Clearing out pending MCEs
595 12:29:41.434882 Setting up local APIC...
596 12:29:41.438004 Initializing CPU #5
597 12:29:41.441145 Initializing CPU #2
598 12:29:41.444382 CPU: vendor Intel device 806ec
599 12:29:41.448442 CPU: family 06, model 8e, stepping 0c
600 12:29:41.448528 apic_id: 0x07 done.
601 12:29:41.451310 Setting up local APIC...
602 12:29:41.454453 Clearing out pending MCEs
603 12:29:41.457565 CPU: vendor Intel device 806ec
604 12:29:41.461363 CPU: family 06, model 8e, stepping 0c
605 12:29:41.464357 Setting up local APIC...
606 12:29:41.467407 Setting up local APIC...
607 12:29:41.467492 Clearing out pending MCEs
608 12:29:41.471044 apic_id: 0x05 done.
609 12:29:41.474187 Setting up local APIC...
610 12:29:41.474273 VMX status: enabled
611 12:29:41.477228 apic_id: 0x06 done.
612 12:29:41.481044 IA32_FEATURE_CONTROL status: locked
613 12:29:41.484275 VMX status: enabled
614 12:29:41.484360 Skip microcode update
615 12:29:41.487460 apic_id: 0x03 done.
616 12:29:41.490688 apic_id: 0x02 done.
617 12:29:41.490773 VMX status: enabled
618 12:29:41.494328 VMX status: enabled
619 12:29:41.497579 IA32_FEATURE_CONTROL status: locked
620 12:29:41.500756 IA32_FEATURE_CONTROL status: locked
621 12:29:41.503957 Skip microcode update
622 12:29:41.507059 Skip microcode update
623 12:29:41.507144 CPU #1 initialized
624 12:29:41.510680 CPU #4 initialized
625 12:29:41.513841 IA32_FEATURE_CONTROL status: locked
626 12:29:41.513926 CPU #7 initialized
627 12:29:41.517020 Skip microcode update
628 12:29:41.520227 VMX status: enabled
629 12:29:41.520312 apic_id: 0x04 done.
630 12:29:41.523969 IA32_FEATURE_CONTROL status: locked
631 12:29:41.527215 VMX status: enabled
632 12:29:41.530419 Skip microcode update
633 12:29:41.533533 IA32_FEATURE_CONTROL status: locked
634 12:29:41.533619 CPU #5 initialized
635 12:29:41.536759 Skip microcode update
636 12:29:41.540022 CPU #6 initialized
637 12:29:41.540141 CPU #2 initialized
638 12:29:41.543331 CPU: vendor Intel device 806ec
639 12:29:41.546557 CPU: family 06, model 8e, stepping 0c
640 12:29:41.549678 Clearing out pending MCEs
641 12:29:41.553424 Setting up local APIC...
642 12:29:41.556489 apic_id: 0x01 done.
643 12:29:41.556574 VMX status: enabled
644 12:29:41.559776 IA32_FEATURE_CONTROL status: locked
645 12:29:41.562859 Skip microcode update
646 12:29:41.566606 CPU #3 initialized
647 12:29:41.569775 bsp_do_flight_plan done after 461 msecs.
648 12:29:41.572897 CPU: frequency set to 4200 MHz
649 12:29:41.572981 Enabling SMIs.
650 12:29:41.575954 Locking SMM.
651 12:29:41.590503 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
652 12:29:41.593655 CBFS @ c08000 size 3f8000
653 12:29:41.600467 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
654 12:29:41.600553 CBFS: Locating 'vbt.bin'
655 12:29:41.603655 CBFS: Found @ offset 5f5c0 size 499
656 12:29:41.610501 Found a VBT of 4608 bytes after decompression
657 12:29:41.796854 Display FSP Version Info HOB
658 12:29:41.800521 Reference Code - CPU = 9.0.1e.30
659 12:29:41.803623 uCode Version = 0.0.0.ca
660 12:29:41.806637 TXT ACM version = ff.ff.ff.ffff
661 12:29:41.809920 Display FSP Version Info HOB
662 12:29:41.813156 Reference Code - ME = 9.0.1e.30
663 12:29:41.816864 MEBx version = 0.0.0.0
664 12:29:41.819882 ME Firmware Version = Consumer SKU
665 12:29:41.822996 Display FSP Version Info HOB
666 12:29:41.826840 Reference Code - CML PCH = 9.0.1e.30
667 12:29:41.829764 PCH-CRID Status = Disabled
668 12:29:41.832714 PCH-CRID Original Value = ff.ff.ff.ffff
669 12:29:41.836085 PCH-CRID New Value = ff.ff.ff.ffff
670 12:29:41.839681 OPROM - RST - RAID = ff.ff.ff.ffff
671 12:29:41.842904 ChipsetInit Base Version = ff.ff.ff.ffff
672 12:29:41.845955 ChipsetInit Oem Version = ff.ff.ff.ffff
673 12:29:41.849100 Display FSP Version Info HOB
674 12:29:41.855530 Reference Code - SA - System Agent = 9.0.1e.30
675 12:29:41.859197 Reference Code - MRC = 0.7.1.6c
676 12:29:41.862283 SA - PCIe Version = 9.0.1e.30
677 12:29:41.865526 SA-CRID Status = Disabled
678 12:29:41.868607 SA-CRID Original Value = 0.0.0.c
679 12:29:41.868683 SA-CRID New Value = 0.0.0.c
680 12:29:41.871845 OPROM - VBIOS = ff.ff.ff.ffff
681 12:29:41.875528 RTC Init
682 12:29:41.878592 Set power on after power failure.
683 12:29:41.878686 Disabling Deep S3
684 12:29:41.882360 Disabling Deep S3
685 12:29:41.885431 Disabling Deep S4
686 12:29:41.885505 Disabling Deep S4
687 12:29:41.888395 Disabling Deep S5
688 12:29:41.888471 Disabling Deep S5
689 12:29:41.895462 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 197 exit 1
690 12:29:41.898724 Enumerating buses...
691 12:29:41.901874 Show all devs... Before device enumeration.
692 12:29:41.905059 Root Device: enabled 1
693 12:29:41.908253 CPU_CLUSTER: 0: enabled 1
694 12:29:41.908338 DOMAIN: 0000: enabled 1
695 12:29:41.911430 APIC: 00: enabled 1
696 12:29:41.914618 PCI: 00:00.0: enabled 1
697 12:29:41.914703 PCI: 00:02.0: enabled 1
698 12:29:41.918228 PCI: 00:04.0: enabled 0
699 12:29:41.921281 PCI: 00:05.0: enabled 0
700 12:29:41.924877 PCI: 00:12.0: enabled 1
701 12:29:41.924963 PCI: 00:12.5: enabled 0
702 12:29:41.928077 PCI: 00:12.6: enabled 0
703 12:29:41.931255 PCI: 00:14.0: enabled 1
704 12:29:41.934305 PCI: 00:14.1: enabled 0
705 12:29:41.934428 PCI: 00:14.3: enabled 1
706 12:29:41.937387 PCI: 00:14.5: enabled 0
707 12:29:41.941094 PCI: 00:15.0: enabled 1
708 12:29:41.944367 PCI: 00:15.1: enabled 1
709 12:29:41.944443 PCI: 00:15.2: enabled 0
710 12:29:41.947450 PCI: 00:15.3: enabled 0
711 12:29:41.950721 PCI: 00:16.0: enabled 1
712 12:29:41.953914 PCI: 00:16.1: enabled 0
713 12:29:41.953987 PCI: 00:16.2: enabled 0
714 12:29:41.957037 PCI: 00:16.3: enabled 0
715 12:29:41.960926 PCI: 00:16.4: enabled 0
716 12:29:41.964036 PCI: 00:16.5: enabled 0
717 12:29:41.964115 PCI: 00:17.0: enabled 1
718 12:29:41.967288 PCI: 00:19.0: enabled 1
719 12:29:41.970183 PCI: 00:19.1: enabled 0
720 12:29:41.973283 PCI: 00:19.2: enabled 0
721 12:29:41.973372 PCI: 00:1a.0: enabled 0
722 12:29:41.977032 PCI: 00:1c.0: enabled 0
723 12:29:41.980186 PCI: 00:1c.1: enabled 0
724 12:29:41.983338 PCI: 00:1c.2: enabled 0
725 12:29:41.983420 PCI: 00:1c.3: enabled 0
726 12:29:41.986432 PCI: 00:1c.4: enabled 0
727 12:29:41.990177 PCI: 00:1c.5: enabled 0
728 12:29:41.993273 PCI: 00:1c.6: enabled 0
729 12:29:41.993345 PCI: 00:1c.7: enabled 0
730 12:29:41.996480 PCI: 00:1d.0: enabled 1
731 12:29:41.999858 PCI: 00:1d.1: enabled 0
732 12:29:41.999928 PCI: 00:1d.2: enabled 0
733 12:29:42.002903
734 12:29:42.002974 PCI: 00:1d.3: enabled 0
735 12:29:42.006805 PCI: 00:1d.4: enabled 0
736 12:29:42.009838 PCI: 00:1d.5: enabled 1
737 12:29:42.009909 PCI: 00:1e.0: enabled 1
738 12:29:42.013252 PCI: 00:1e.1: enabled 0
739 12:29:42.015855 PCI: 00:1e.2: enabled 1
740 12:29:42.019511 PCI: 00:1e.3: enabled 1
741 12:29:42.019582 PCI: 00:1f.0: enabled 1
742 12:29:42.022519 PCI: 00:1f.1: enabled 1
743 12:29:42.026297 PCI: 00:1f.2: enabled 1
744 12:29:42.029444 PCI: 00:1f.3: enabled 1
745 12:29:42.029526 PCI: 00:1f.4: enabled 1
746 12:29:42.032574 PCI: 00:1f.5: enabled 1
747 12:29:42.035715 PCI: 00:1f.6: enabled 0
748 12:29:42.038948 USB0 port 0: enabled 1
749 12:29:42.039028 I2C: 00:15: enabled 1
750 12:29:42.042010 I2C: 00:5d: enabled 1
751 12:29:42.045774 GENERIC: 0.0: enabled 1
752 12:29:42.045851 I2C: 00:1a: enabled 1
753 12:29:42.048958 I2C: 00:38: enabled 1
754 12:29:42.052195 I2C: 00:39: enabled 1
755 12:29:42.052265 I2C: 00:3a: enabled 1
756 12:29:42.055341 I2C: 00:3b: enabled 1
757 12:29:42.058497 PCI: 00:00.0: enabled 1
758 12:29:42.058570 SPI: 00: enabled 1
759 12:29:42.061710 SPI: 01: enabled 1
760 12:29:42.065459 PNP: 0c09.0: enabled 1
761 12:29:42.068594 USB2 port 0: enabled 1
762 12:29:42.068679 USB2 port 1: enabled 1
763 12:29:42.071775 USB2 port 2: enabled 0
764 12:29:42.075018 USB2 port 3: enabled 0
765 12:29:42.075103 USB2 port 5: enabled 0
766 12:29:42.078113 USB2 port 6: enabled 1
767 12:29:42.081418 USB2 port 9: enabled 1
768 12:29:42.081503 USB3 port 0: enabled 1
769 12:29:42.085105
770 12:29:42.085190 USB3 port 1: enabled 1
771 12:29:42.088251 USB3 port 2: enabled 1
772 12:29:42.091499 USB3 port 3: enabled 1
773 12:29:42.091584 USB3 port 4: enabled 0
774 12:29:42.094757 APIC: 03: enabled 1
775 12:29:42.097899 APIC: 04: enabled 1
776 12:29:42.097983 APIC: 01: enabled 1
777 12:29:42.101112 APIC: 02: enabled 1
778 12:29:42.101197 APIC: 05: enabled 1
779 12:29:42.104294 APIC: 06: enabled 1
780 12:29:42.107467 APIC: 07: enabled 1
781 12:29:42.107552 Compare with tree...
782 12:29:42.111342 Root Device: enabled 1
783 12:29:42.114454 CPU_CLUSTER: 0: enabled 1
784 12:29:42.117635 APIC: 00: enabled 1
785 12:29:42.117720 APIC: 03: enabled 1
786 12:29:42.120820 APIC: 04: enabled 1
787 12:29:42.123950 APIC: 01: enabled 1
788 12:29:42.124029 APIC: 02: enabled 1
789 12:29:42.127513 APIC: 05: enabled 1
790 12:29:42.130827 APIC: 06: enabled 1
791 12:29:42.130912 APIC: 07: enabled 1
792 12:29:42.133860 DOMAIN: 0000: enabled 1
793 12:29:42.137154 PCI: 00:00.0: enabled 1
794 12:29:42.140861 PCI: 00:02.0: enabled 1
795 12:29:42.143962 PCI: 00:04.0: enabled 0
796 12:29:42.144046 PCI: 00:05.0: enabled 0
797 12:29:42.147116 PCI: 00:12.0: enabled 1
798 12:29:42.150330 PCI: 00:12.5: enabled 0
799 12:29:42.153424 PCI: 00:12.6: enabled 0
800 12:29:42.156698 PCI: 00:14.0: enabled 1
801 12:29:42.156821 USB0 port 0: enabled 1
802 12:29:42.159969 USB2 port 0: enabled 1
803 12:29:42.163765 USB2 port 1: enabled 1
804 12:29:42.166809 USB2 port 2: enabled 0
805 12:29:42.170132 USB2 port 3: enabled 0
806 12:29:42.170232 USB2 port 5: enabled 0
807 12:29:42.173222
808 12:29:42.173307 USB2 port 6: enabled 1
809 12:29:42.177086 USB2 port 9: enabled 1
810 12:29:42.180104 USB3 port 0: enabled 1
811 12:29:42.183189 USB3 port 1: enabled 1
812 12:29:42.186802 USB3 port 2: enabled 1
813 12:29:42.186890 USB3 port 3: enabled 1
814 12:29:42.190003
815 12:29:42.190088 USB3 port 4: enabled 0
816 12:29:42.193286 PCI: 00:14.1: enabled 0
817 12:29:42.196525 PCI: 00:14.3: enabled 1
818 12:29:42.199673 PCI: 00:14.5: enabled 0
819 12:29:42.202837 PCI: 00:15.0: enabled 1
820 12:29:42.202922 I2C: 00:15: enabled 1
821 12:29:42.205947 PCI: 00:15.1: enabled 1
822 12:29:42.209119 I2C: 00:5d: enabled 1
823 12:29:42.212363 GENERIC: 0.0: enabled 1
824 12:29:42.215972 PCI: 00:15.2: enabled 0
825 12:29:42.216056 PCI: 00:15.3: enabled 0
826 12:29:42.219227 PCI: 00:16.0: enabled 1
827 12:29:42.222316 PCI: 00:16.1: enabled 0
828 12:29:42.225950 PCI: 00:16.2: enabled 0
829 12:29:42.229054 PCI: 00:16.3: enabled 0
830 12:29:42.229139 PCI: 00:16.4: enabled 0
831 12:29:42.232206 PCI: 00:16.5: enabled 0
832 12:29:42.235417 PCI: 00:17.0: enabled 1
833 12:29:42.239046 PCI: 00:19.0: enabled 1
834 12:29:42.242193 I2C: 00:1a: enabled 1
835 12:29:42.242277 I2C: 00:38: enabled 1
836 12:29:42.245145 I2C: 00:39: enabled 1
837 12:29:42.249054 I2C: 00:3a: enabled 1
838 12:29:42.252272 I2C: 00:3b: enabled 1
839 12:29:42.252357 PCI: 00:19.1: enabled 0
840 12:29:42.255416 PCI: 00:19.2: enabled 0
841 12:29:42.258622 PCI: 00:1a.0: enabled 0
842 12:29:42.261866 PCI: 00:1c.0: enabled 0
843 12:29:42.264903 PCI: 00:1c.1: enabled 0
844 12:29:42.264987 PCI: 00:1c.2: enabled 0
845 12:29:42.268120 PCI: 00:1c.3: enabled 0
846 12:29:42.271949 PCI: 00:1c.4: enabled 0
847 12:29:42.275060 PCI: 00:1c.5: enabled 0
848 12:29:42.278308 PCI: 00:1c.6: enabled 0
849 12:29:42.278392 PCI: 00:1c.7: enabled 0
850 12:29:42.281388 PCI: 00:1d.0: enabled 1
851 12:29:42.284616 PCI: 00:1d.1: enabled 0
852 12:29:42.288226 PCI: 00:1d.2: enabled 0
853 12:29:42.291449 PCI: 00:1d.3: enabled 0
854 12:29:42.291533 PCI: 00:1d.4: enabled 0
855 12:29:42.294421 PCI: 00:1d.5: enabled 1
856 12:29:42.298261 PCI: 00:00.0: enabled 1
857 12:29:42.301417 PCI: 00:1e.0: enabled 1
858 12:29:42.304665 PCI: 00:1e.1: enabled 0
859 12:29:42.304757 PCI: 00:1e.2: enabled 1
860 12:29:42.307809 SPI: 00: enabled 1
861 12:29:42.310935 PCI: 00:1e.3: enabled 1
862 12:29:42.314072 SPI: 01: enabled 1
863 12:29:42.314157 PCI: 00:1f.0: enabled 1
864 12:29:42.317202 PNP: 0c09.0: enabled 1
865 12:29:42.321086 PCI: 00:1f.1: enabled 1
866 12:29:42.324317 PCI: 00:1f.2: enabled 1
867 12:29:42.327440 PCI: 00:1f.3: enabled 1
868 12:29:42.327525 PCI: 00:1f.4: enabled 1
869 12:29:42.330544 PCI: 00:1f.5: enabled 1
870 12:29:42.333786 PCI: 00:1f.6: enabled 0
871 12:29:42.336903 Root Device scanning...
872 12:29:42.340657 scan_static_bus for Root Device
873 12:29:42.343816 CPU_CLUSTER: 0 enabled
874 12:29:42.343901 DOMAIN: 0000 enabled
875 12:29:42.347156 DOMAIN: 0000 scanning...
876 12:29:42.349983 PCI: pci_scan_bus for bus 00
877 12:29:42.353126 PCI: 00:00.0 [8086/0000] ops
878 12:29:42.356418 PCI: 00:00.0 [8086/9b61] enabled
879 12:29:42.360186 PCI: 00:02.0 [8086/0000] bus ops
880 12:29:42.363372 PCI: 00:02.0 [8086/9b41] enabled
881 12:29:42.366655 PCI: 00:04.0 [8086/1903] disabled
882 12:29:42.369799 PCI: 00:08.0 [8086/1911] enabled
883 12:29:42.372939 PCI: 00:12.0 [8086/02f9] enabled
884 12:29:42.376021 PCI: 00:14.0 [8086/0000] bus ops
885 12:29:42.379300 PCI: 00:14.0 [8086/02ed] enabled
886 12:29:42.383123 PCI: 00:14.2 [8086/02ef] enabled
887 12:29:42.386105 PCI: 00:14.3 [8086/02f0] enabled
888 12:29:42.389195 PCI: 00:15.0 [8086/0000] bus ops
889 12:29:42.392960 PCI: 00:15.0 [8086/02e8] enabled
890 12:29:42.396194 PCI: 00:15.1 [8086/0000] bus ops
891 12:29:42.399341 PCI: 00:15.1 [8086/02e9] enabled
892 12:29:42.402472 PCI: 00:16.0 [8086/0000] ops
893 12:29:42.405764 PCI: 00:16.0 [8086/02e0] enabled
894 12:29:42.408989 PCI: 00:17.0 [8086/0000] ops
895 12:29:42.412576 PCI: 00:17.0 [8086/02d3] enabled
896 12:29:42.415814 PCI: 00:19.0 [8086/0000] bus ops
897 12:29:42.418906 PCI: 00:19.0 [8086/02c5] enabled
898 12:29:42.422143 PCI: 00:1d.0 [8086/0000] bus ops
899 12:29:42.425263 PCI: 00:1d.0 [8086/02b0] enabled
900 12:29:42.432156 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 12:29:42.435446 PCI: 00:1e.0 [8086/0000] ops
902 12:29:42.438696 PCI: 00:1e.0 [8086/02a8] enabled
903 12:29:42.441939 PCI: 00:1e.2 [8086/0000] bus ops
904 12:29:42.444986 PCI: 00:1e.2 [8086/02aa] enabled
905 12:29:42.448106 PCI: 00:1e.3 [8086/0000] bus ops
906 12:29:42.451697 PCI: 00:1e.3 [8086/02ab] enabled
907 12:29:42.454794 PCI: 00:1f.0 [8086/0000] bus ops
908 12:29:42.457899 PCI: 00:1f.0 [8086/0284] enabled
909 12:29:42.464995 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 12:29:42.468132 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 12:29:42.471174 PCI: 00:1f.3 [8086/0000] bus ops
912 12:29:42.474356 PCI: 00:1f.3 [8086/02c8] enabled
913 12:29:42.478086 PCI: 00:1f.4 [8086/0000] bus ops
914 12:29:42.481221 PCI: 00:1f.4 [8086/02a3] enabled
915 12:29:42.484521 PCI: 00:1f.5 [8086/0000] bus ops
916 12:29:42.487609 PCI: 00:1f.5 [8086/02a4] enabled
917 12:29:42.490626 PCI: Leftover static devices:
918 12:29:42.493848 PCI: 00:05.0
919 12:29:42.493934 PCI: 00:12.5
920 12:29:42.497233 PCI: 00:12.6
921 12:29:42.497321 PCI: 00:14.1
922 12:29:42.497387 PCI: 00:14.5
923 12:29:42.500666 PCI: 00:15.2
924 12:29:42.500757 PCI: 00:15.3
925 12:29:42.503836 PCI: 00:16.1
926 12:29:42.503921 PCI: 00:16.2
927 12:29:42.503987 PCI: 00:16.3
928 12:29:42.506954
929 12:29:42.507039 PCI: 00:16.4
930 12:29:42.507106 PCI: 00:16.5
931 12:29:42.510809 PCI: 00:19.1
932 12:29:42.510896 PCI: 00:19.2
933 12:29:42.513896 PCI: 00:1a.0
934 12:29:42.513980 PCI: 00:1c.0
935 12:29:42.514045 PCI: 00:1c.1
936 12:29:42.517109 PCI: 00:1c.2
937 12:29:42.517193 PCI: 00:1c.3
938 12:29:42.520551 PCI: 00:1c.4
939 12:29:42.520636 PCI: 00:1c.5
940 12:29:42.523566 PCI: 00:1c.6
941 12:29:42.523650 PCI: 00:1c.7
942 12:29:42.523716 PCI: 00:1d.1
943 12:29:42.526675 PCI: 00:1d.2
944 12:29:42.526761 PCI: 00:1d.3
945 12:29:42.529859 PCI: 00:1d.4
946 12:29:42.529944 PCI: 00:1d.5
947 12:29:42.530023 PCI: 00:1e.1
948 12:29:42.532912 PCI: 00:1f.1
949 12:29:42.532996 PCI: 00:1f.2
950 12:29:42.536447 PCI: 00:1f.6
951 12:29:42.539715 PCI: Check your devicetree.cb.
952 12:29:42.539799 PCI: 00:02.0 scanning...
953 12:29:42.546668 scan_generic_bus for PCI: 00:02.0
954 12:29:42.549870 scan_generic_bus for PCI: 00:02.0 done
955 12:29:42.552999 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
956 12:29:42.556042 PCI: 00:14.0 scanning...
957 12:29:42.559841 scan_static_bus for PCI: 00:14.0
958 12:29:42.562929 USB0 port 0 enabled
959 12:29:42.566152 USB0 port 0 scanning...
960 12:29:42.569441 scan_static_bus for USB0 port 0
961 12:29:42.569526 USB2 port 0 enabled
962 12:29:42.572614 USB2 port 1 enabled
963 12:29:42.575821 USB2 port 2 disabled
964 12:29:42.575905 USB2 port 3 disabled
965 12:29:42.579032 USB2 port 5 disabled
966 12:29:42.582834 USB2 port 6 enabled
967 12:29:42.582918 USB2 port 9 enabled
968 12:29:42.585982 USB3 port 0 enabled
969 12:29:42.586066 USB3 port 1 enabled
970 12:29:42.589113 USB3 port 2 enabled
971 12:29:42.592386 USB3 port 3 enabled
972 12:29:42.592471 USB3 port 4 disabled
973 12:29:42.595897 USB2 port 0 scanning...
974 12:29:42.599071 scan_static_bus for USB2 port 0
975 12:29:42.602226 scan_static_bus for USB2 port 0 done
976 12:29:42.608561 scan_bus: scanning of bus USB2 port 0 took 9699 usecs
977 12:29:42.611863 USB2 port 1 scanning...
978 12:29:42.615561 scan_static_bus for USB2 port 1
979 12:29:42.618735 scan_static_bus for USB2 port 1 done
980 12:29:42.622029 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
981 12:29:42.625259 USB2 port 6 scanning...
982 12:29:42.628350 scan_static_bus for USB2 port 6
983 12:29:42.631482 scan_static_bus for USB2 port 6 done
984 12:29:42.638351 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
985 12:29:42.641403 USB2 port 9 scanning...
986 12:29:42.645242 scan_static_bus for USB2 port 9
987 12:29:42.647714 scan_static_bus for USB2 port 9 done
988 12:29:42.654586 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
989 12:29:42.654667 USB3 port 0 scanning...
990 12:29:42.657740 scan_static_bus for USB3 port 0
991 12:29:42.664583 scan_static_bus for USB3 port 0 done
992 12:29:42.667757 scan_bus: scanning of bus USB3 port 0 took 9698 usecs
993 12:29:42.670978 USB3 port 1 scanning...
994 12:29:42.674221 scan_static_bus for USB3 port 1
995 12:29:42.677350 scan_static_bus for USB3 port 1 done
996 12:29:42.683695 scan_bus: scanning of bus USB3 port 1 took 9704 usecs
997 12:29:42.686895 USB3 port 2 scanning...
998 12:29:42.690604 scan_static_bus for USB3 port 2
999 12:29:42.693659 scan_static_bus for USB3 port 2 done
1000 12:29:42.696805 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
1001 12:29:42.699978 USB3 port 3 scanning...
1002 12:29:42.703747 scan_static_bus for USB3 port 3
1003 12:29:42.706925 scan_static_bus for USB3 port 3 done
1004 12:29:42.713366 scan_bus: scanning of bus USB3 port 3 took 9697 usecs
1005 12:29:42.716527 scan_static_bus for USB0 port 0 done
1006 12:29:42.723429 scan_bus: scanning of bus USB0 port 0 took 155359 usecs
1007 12:29:42.726545 scan_static_bus for PCI: 00:14.0 done
1008 12:29:42.732863 scan_bus: scanning of bus PCI: 00:14.0 took 172974 usecs
1009 12:29:42.732948 PCI: 00:15.0 scanning...
1010 12:29:42.736617 scan_generic_bus for PCI: 00:15.0
1011 12:29:42.740359
1012 12:29:42.743447 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1013 12:29:42.746657 scan_generic_bus for PCI: 00:15.0 done
1014 12:29:42.752956 scan_bus: scanning of bus PCI: 00:15.0 took 14291 usecs
1015 12:29:42.753043 PCI: 00:15.1 scanning...
1016 12:29:42.756219 scan_generic_bus for PCI: 00:15.1
1017 12:29:42.759856
1018 12:29:42.763068 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1019 12:29:42.766263 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1020 12:29:42.769372 scan_generic_bus for PCI: 00:15.1 done
1021 12:29:42.775778 scan_bus: scanning of bus PCI: 00:15.1 took 18601 usecs
1022 12:29:42.779526 PCI: 00:19.0 scanning...
1023 12:29:42.782652 scan_generic_bus for PCI: 00:19.0
1024 12:29:42.785903 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1025 12:29:42.789206 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1026 12:29:42.795406 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1027 12:29:42.799129 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1028 12:29:42.802126 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1029 12:29:42.805281 scan_generic_bus for PCI: 00:19.0 done
1030 12:29:42.812220 scan_bus: scanning of bus PCI: 00:19.0 took 30739 usecs
1031 12:29:42.815450 PCI: 00:1d.0 scanning...
1032 12:29:42.818610 do_pci_scan_bridge for PCI: 00:1d.0
1033 12:29:42.822223 PCI: pci_scan_bus for bus 01
1034 12:29:42.825264 PCI: 01:00.0 [1c5c/1327] enabled
1035 12:29:42.828500 Enabling Common Clock Configuration
1036 12:29:42.831718 L1 Sub-State supported from root port 29
1037 12:29:42.834846 L1 Sub-State Support = 0xf
1038 12:29:42.838537 CommonModeRestoreTime = 0x28
1039 12:29:42.841675 Power On Value = 0x16, Power On Scale = 0x0
1040 12:29:42.844746 ASPM: Enabled L1
1041 12:29:42.851187 scan_bus: scanning of bus PCI: 00:1d.0 took 32777 usecs
1042 12:29:42.851277 PCI: 00:1e.2 scanning...
1043 12:29:42.854932 scan_generic_bus for PCI: 00:1e.2
1044 12:29:42.858061
1045 12:29:42.861176 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1046 12:29:42.864424 scan_generic_bus for PCI: 00:1e.2 done
1047 12:29:42.870808 scan_bus: scanning of bus PCI: 00:1e.2 took 13991 usecs
1048 12:29:42.870886 PCI: 00:1e.3 scanning...
1049 12:29:42.874059 scan_generic_bus for PCI: 00:1e.3
1050 12:29:42.881076 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1051 12:29:42.884320 scan_generic_bus for PCI: 00:1e.3 done
1052 12:29:42.887528 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1053 12:29:42.890515 PCI: 00:1f.0 scanning...
1054 12:29:42.893905 scan_static_bus for PCI: 00:1f.0
1055 12:29:42.897433 PNP: 0c09.0 enabled
1056 12:29:42.900521 scan_static_bus for PCI: 00:1f.0 done
1057 12:29:42.906837 scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs
1058 12:29:42.910373 PCI: 00:1f.3 scanning...
1059 12:29:42.913709 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1060 12:29:42.917063 PCI: 00:1f.4 scanning...
1061 12:29:42.920281 scan_generic_bus for PCI: 00:1f.4
1062 12:29:42.923415 scan_generic_bus for PCI: 00:1f.4 done
1063 12:29:42.929744 scan_bus: scanning of bus PCI: 00:1f.4 took 10185 usecs
1064 12:29:42.933409 PCI: 00:1f.5 scanning...
1065 12:29:42.936482 scan_generic_bus for PCI: 00:1f.5
1066 12:29:42.939541 scan_generic_bus for PCI: 00:1f.5 done
1067 12:29:42.946478 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1068 12:29:42.952803 scan_bus: scanning of bus DOMAIN: 0000 took 604951 usecs
1069 12:29:42.955897 scan_static_bus for Root Device done
1070 12:29:42.959602 scan_bus: scanning of bus Root Device took 624815 usecs
1071 12:29:42.962634
1072 12:29:42.962713 done
1073 12:29:42.965681 Chrome EC: UHEPI supported
1074 12:29:42.972529 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1075 12:29:42.975767 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1076 12:29:42.982031 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1077 12:29:42.989745 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1078 12:29:42.992902 SPI flash protection: WPSW=0 SRP0=1
1079 12:29:42.999042 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1080 12:29:43.002751 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1081 12:29:43.005860 found VGA at PCI: 00:02.0
1082 12:29:43.009105 Setting up VGA for PCI: 00:02.0
1083 12:29:43.015317 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1084 12:29:43.018558 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1085 12:29:43.022403 Allocating resources...
1086 12:29:43.025574 Reading resources...
1087 12:29:43.028804 Root Device read_resources bus 0 link: 0
1088 12:29:43.031899 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1089 12:29:43.038296 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1090 12:29:43.041935 DOMAIN: 0000 read_resources bus 0 link: 0
1091 12:29:43.049454 PCI: 00:14.0 read_resources bus 0 link: 0
1092 12:29:43.052486 USB0 port 0 read_resources bus 0 link: 0
1093 12:29:43.061298 USB0 port 0 read_resources bus 0 link: 0 done
1094 12:29:43.064440 PCI: 00:14.0 read_resources bus 0 link: 0 done
1095 12:29:43.071394 PCI: 00:15.0 read_resources bus 1 link: 0
1096 12:29:43.074743 PCI: 00:15.0 read_resources bus 1 link: 0 done
1097 12:29:43.081612 PCI: 00:15.1 read_resources bus 2 link: 0
1098 12:29:43.084786 PCI: 00:15.1 read_resources bus 2 link: 0 done
1099 12:29:43.092458 PCI: 00:19.0 read_resources bus 3 link: 0
1100 12:29:43.098835 PCI: 00:19.0 read_resources bus 3 link: 0 done
1101 12:29:43.101959 PCI: 00:1d.0 read_resources bus 1 link: 0
1102 12:29:43.108560 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1103 12:29:43.111672 PCI: 00:1e.2 read_resources bus 4 link: 0
1104 12:29:43.118774 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1105 12:29:43.122064 PCI: 00:1e.3 read_resources bus 5 link: 0
1106 12:29:43.128440 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1107 12:29:43.131659 PCI: 00:1f.0 read_resources bus 0 link: 0
1108 12:29:43.137945 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1109 12:29:43.144795 DOMAIN: 0000 read_resources bus 0 link: 0 done
1110 12:29:43.147905 Root Device read_resources bus 0 link: 0 done
1111 12:29:43.151012 Done reading resources.
1112 12:29:43.157577 Show resources in subtree (Root Device)...After reading.
1113 12:29:43.161329 Root Device child on link 0 CPU_CLUSTER: 0
1114 12:29:43.164484 CPU_CLUSTER: 0 child on link 0 APIC: 00
1115 12:29:43.167567 APIC: 00
1116 12:29:43.167651 APIC: 03
1117 12:29:43.170770 APIC: 04
1118 12:29:43.170849 APIC: 01
1119 12:29:43.170914 APIC: 02
1120 12:29:43.173781 APIC: 05
1121 12:29:43.173856 APIC: 06
1122 12:29:43.173917 APIC: 07
1123 12:29:43.180804 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1124 12:29:43.233292 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1125 12:29:43.233586 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1126 12:29:43.233668 PCI: 00:00.0
1127 12:29:43.233756 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1128 12:29:43.234044 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1129 12:29:43.234667 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1130 12:29:43.283622 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1131 12:29:43.283905 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1132 12:29:43.284168 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1133 12:29:43.284429 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1134 12:29:43.285065 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1135 12:29:43.285324 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1136 12:29:43.333543 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1137 12:29:43.333931 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1138 12:29:43.334576 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1139 12:29:43.334899 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1140 12:29:43.335164
1141 12:29:43.335233 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1142 12:29:43.341496 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1143 12:29:43.351356 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1144 12:29:43.351436 PCI: 00:02.0
1145 12:29:43.361361 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1146 12:29:43.374064 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1147 12:29:43.381034 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1148 12:29:43.384271 PCI: 00:04.0
1149 12:29:43.384344 PCI: 00:08.0
1150 12:29:43.394278 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 12:29:43.397377 PCI: 00:12.0
1152 12:29:43.406685 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1153 12:29:43.410469 PCI: 00:14.0 child on link 0 USB0 port 0
1154 12:29:43.420643 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 12:29:43.423279 USB0 port 0 child on link 0 USB2 port 0
1156 12:29:43.426529 USB2 port 0
1157 12:29:43.426606 USB2 port 1
1158 12:29:43.429756
1159 12:29:43.429836 USB2 port 2
1160 12:29:43.432897 USB2 port 3
1161 12:29:43.432973 USB2 port 5
1162 12:29:43.436653 USB2 port 6
1163 12:29:43.436733 USB2 port 9
1164 12:29:43.439796 USB3 port 0
1165 12:29:43.439871 USB3 port 1
1166 12:29:43.442924 USB3 port 2
1167 12:29:43.443011 USB3 port 3
1168 12:29:43.446138 USB3 port 4
1169 12:29:43.446217 PCI: 00:14.2
1170 12:29:43.456223 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 12:29:43.465584 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 12:29:43.468878 PCI: 00:14.3
1173 12:29:43.479041 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 12:29:43.482248 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 12:29:43.492025 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 12:29:43.494898 I2C: 01:15
1177 12:29:43.499029 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 12:29:43.508301 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 12:29:43.511391 I2C: 02:5d
1180 12:29:43.511465 GENERIC: 0.0
1181 12:29:43.515216 PCI: 00:16.0
1182 12:29:43.524446 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 12:29:43.524541 PCI: 00:17.0
1184 12:29:43.534158 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 12:29:43.544286 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 12:29:43.550562 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 12:29:43.560663 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 12:29:43.567331 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 12:29:43.576964 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 12:29:43.580064 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 12:29:43.590261 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:29:43.593470 I2C: 03:1a
1193 12:29:43.593552 I2C: 03:38
1194 12:29:43.596620 I2C: 03:39
1195 12:29:43.596694 I2C: 03:3a
1196 12:29:43.599841 I2C: 03:3b
1197 12:29:43.603131 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 12:29:43.613366 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 12:29:43.622855 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 12:29:43.632958 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 12:29:43.633042 PCI: 01:00.0
1202 12:29:43.642294 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 12:29:43.646135 PCI: 00:1e.0
1204 12:29:43.655505 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 12:29:43.665523 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 12:29:43.668731 PCI: 00:1e.2 child on link 0 SPI: 00
1207 12:29:43.678783 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 12:29:43.681872 SPI: 00
1209 12:29:43.684968 PCI: 00:1e.3 child on link 0 SPI: 01
1210 12:29:43.695047 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:29:43.695134 SPI: 01
1212 12:29:43.701202 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 12:29:43.707922 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 12:29:43.717759 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 12:29:43.720934 PNP: 0c09.0
1216 12:29:43.727819 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 12:29:43.731004 PCI: 00:1f.3
1218 12:29:43.740465 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 12:29:43.750524 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 12:29:43.750614 PCI: 00:1f.4
1221 12:29:43.759945 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 12:29:43.769999 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 12:29:43.773198 PCI: 00:1f.5
1224 12:29:43.783143 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 12:29:43.789453 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 12:29:43.792625 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 12:29:43.802754 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 12:29:43.805912 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 12:29:43.808899 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 12:29:43.812654 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 12:29:43.815756 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 12:29:43.822132 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 12:29:43.829003 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 12:29:43.835270 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 12:29:43.845339 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 12:29:43.851818 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 12:29:43.854959 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 12:29:43.864882 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 12:29:43.868101 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 12:29:43.874406 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 12:29:43.878271 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 12:29:43.884541 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 12:29:43.887647 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 12:29:43.893981 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 12:29:43.897209 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 12:29:43.904067 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 12:29:43.907239 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 12:29:43.910493 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 12:29:43.913608
1250 12:29:43.916776 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1251 12:29:43.920567 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1252 12:29:43.926933 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1253 12:29:43.930078 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1254 12:29:43.936365 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1255 12:29:43.939640 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1256 12:29:43.946528 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1257 12:29:43.949649 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1258 12:29:43.956056 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1259 12:29:43.959113 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1260 12:29:43.966114 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1261 12:29:43.969382 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1262 12:29:43.975459 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1263 12:29:43.982452 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1264 12:29:43.985694
1265 12:29:43.988860 avoid_fixed_resources: DOMAIN: 0000
1266 12:29:43.992113 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1267 12:29:43.998370 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1268 12:29:44.008576 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1269 12:29:44.015002 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1270 12:29:44.021330 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1271 12:29:44.031443 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1272 12:29:44.037857 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1273 12:29:44.044165 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1274 12:29:44.054144 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1275 12:29:44.060439 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1276 12:29:44.067238 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1277 12:29:44.073552 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1278 12:29:44.076798 Setting resources...
1279 12:29:44.083062 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1280 12:29:44.086814 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1281 12:29:44.090064 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1282 12:29:44.093200
1283 12:29:44.096255 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1284 12:29:44.099414 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1285 12:29:44.106313 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1286 12:29:44.112522 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1287 12:29:44.119057 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1288 12:29:44.125797 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1289 12:29:44.132115 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1290 12:29:44.135846 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1291 12:29:44.142216 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1292 12:29:44.145415 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1293 12:29:44.151739 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1294 12:29:44.155448 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1295 12:29:44.161795 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1296 12:29:44.164937 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1297 12:29:44.168467 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1298 12:29:44.171819
1299 12:29:44.175028 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1300 12:29:44.178317 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1301 12:29:44.184683 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1302 12:29:44.187715 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1303 12:29:44.194646 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1304 12:29:44.197803 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1305 12:29:44.204214 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1306 12:29:44.207375 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1307 12:29:44.214214 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1308 12:29:44.217370 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1309 12:29:44.223617 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1310 12:29:44.227293 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1311 12:29:44.233851 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1312 12:29:44.236974 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1313 12:29:44.246584 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1314 12:29:44.253317 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1315 12:29:44.259872 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1316 12:29:44.266819 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1317 12:29:44.273124 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1318 12:29:44.279418 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1319 12:29:44.282563 Root Device assign_resources, bus 0 link: 0
1320 12:29:44.285979
1321 12:29:44.289668 DOMAIN: 0000 assign_resources, bus 0 link: 0
1322 12:29:44.299350 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1323 12:29:44.305801 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1324 12:29:44.312772 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1325 12:29:44.315929
1326 12:29:44.322169 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1327 12:29:44.331809 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1328 12:29:44.338134 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1329 12:29:44.341820 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 12:29:44.348222 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 12:29:44.355109 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1332 12:29:44.364779 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1333 12:29:44.371004 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1334 12:29:44.381129 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1335 12:29:44.384253 PCI: 00:15.0 assign_resources, bus 1 link: 0
1336 12:29:44.391201 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 12:29:44.397619 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1338 12:29:44.404010 PCI: 00:15.1 assign_resources, bus 2 link: 0
1339 12:29:44.407074 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 12:29:44.417038 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1341 12:29:44.423963 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1342 12:29:44.430299 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1343 12:29:44.440282 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1344 12:29:44.446464 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1345 12:29:44.453398 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1346 12:29:44.456625
1347 12:29:44.462932 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 12:29:44.469224 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 12:29:44.475842 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 12:29:44.479040 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 12:29:44.488918 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 12:29:44.499124 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 12:29:44.505566 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 12:29:44.512034 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 12:29:44.518395 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 12:29:44.525321 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 12:29:44.531576 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 12:29:44.541444 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 12:29:44.544572 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 12:29:44.550927 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 12:29:44.557814 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 12:29:44.561099 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 12:29:44.567297 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 12:29:44.571070 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 12:29:44.577833 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 12:29:44.580472 LPC: Trying to open IO window from 800 size 1ff
1367 12:29:44.590341 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 12:29:44.596655 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 12:29:44.606870 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 12:29:44.613231 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 12:29:44.619559 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 12:29:44.623331 Root Device assign_resources, bus 0 link: 0
1373 12:29:44.626507 Done setting resources.
1374 12:29:44.633005 Show resources in subtree (Root Device)...After assigning values.
1375 12:29:44.636141 Root Device child on link 0 CPU_CLUSTER: 0
1376 12:29:44.642935 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 12:29:44.643020 APIC: 00
1378 12:29:44.643086 APIC: 03
1379 12:29:44.646150 APIC: 04
1380 12:29:44.646235 APIC: 01
1381 12:29:44.649308 APIC: 02
1382 12:29:44.649393 APIC: 05
1383 12:29:44.649458 APIC: 06
1384 12:29:44.652510 APIC: 07
1385 12:29:44.655822 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 12:29:44.665801 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 12:29:44.675187 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 12:29:44.678853 PCI: 00:00.0
1389 12:29:44.688296 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 12:29:44.698199 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 12:29:44.708300 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 12:29:44.714707 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 12:29:44.724921 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 12:29:44.734509 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 12:29:44.744387 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 12:29:44.753911 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 12:29:44.764044 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 12:29:44.770410 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 12:29:44.780353 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 12:29:44.789974 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 12:29:44.799677 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 12:29:44.809309 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 12:29:44.819396 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 12:29:44.829469 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 12:29:44.829557 PCI: 00:02.0
1406 12:29:44.842221 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 12:29:44.852279 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 12:29:44.861870 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 12:29:44.861955 PCI: 00:04.0
1410 12:29:44.865056 PCI: 00:08.0
1411 12:29:44.875148 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 12:29:44.875233 PCI: 00:12.0
1413 12:29:44.885091 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 12:29:44.891307 PCI: 00:14.0 child on link 0 USB0 port 0
1415 12:29:44.900885 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 12:29:44.904028 USB0 port 0 child on link 0 USB2 port 0
1417 12:29:44.907822 USB2 port 0
1418 12:29:44.907906 USB2 port 1
1419 12:29:44.910983 USB2 port 2
1420 12:29:44.911067 USB2 port 3
1421 12:29:44.914252 USB2 port 5
1422 12:29:44.917437 USB2 port 6
1423 12:29:44.917521 USB2 port 9
1424 12:29:44.920591 USB3 port 0
1425 12:29:44.920675 USB3 port 1
1426 12:29:44.923907 USB3 port 2
1427 12:29:44.923990 USB3 port 3
1428 12:29:44.926938 USB3 port 4
1429 12:29:44.927022 PCI: 00:14.2
1430 12:29:44.936637 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 12:29:44.950034 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 12:29:44.950121 PCI: 00:14.3
1433 12:29:44.959598 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 12:29:44.965907 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 12:29:44.976014 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 12:29:44.976101 I2C: 01:15
1437 12:29:44.982805 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 12:29:44.992280 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 12:29:44.992371 I2C: 02:5d
1440 12:29:44.995564 GENERIC: 0.0
1441 12:29:44.995650 PCI: 00:16.0
1442 12:29:45.005680 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 12:29:45.008879 PCI: 00:17.0
1444 12:29:45.018438 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 12:29:45.028538 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 12:29:45.037905 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 12:29:45.047854 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 12:29:45.054790 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 12:29:45.064235 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 12:29:45.067407
1451 12:29:45.070607 PCI: 00:19.0 child on link 0 I2C: 03:1a
1452 12:29:45.080839 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1453 12:29:45.080926 I2C: 03:1a
1454 12:29:45.083886 I2C: 03:38
1455 12:29:45.083968 I2C: 03:39
1456 12:29:45.087002 I2C: 03:3a
1457 12:29:45.087092 I2C: 03:3b
1458 12:29:45.093887 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1459 12:29:45.103468 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1460 12:29:45.113526 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1461 12:29:45.123030 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1462 12:29:45.123124 PCI: 01:00.0
1463 12:29:45.136284 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1464 12:29:45.136372 PCI: 00:1e.0
1465 12:29:45.148941 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1466 12:29:45.159104 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1467 12:29:45.162248 PCI: 00:1e.2 child on link 0 SPI: 00
1468 12:29:45.172545 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1469 12:29:45.172639 SPI: 00
1470 12:29:45.178643 PCI: 00:1e.3 child on link 0 SPI: 01
1471 12:29:45.188477 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1472 12:29:45.188571 SPI: 01
1473 12:29:45.194873 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1474 12:29:45.201193 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1475 12:29:45.211405 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1476 12:29:45.211493 PNP: 0c09.0
1477 12:29:45.220839 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 12:29:45.224059 PCI: 00:1f.3
1479 12:29:45.234267 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1480 12:29:45.244214 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1481 12:29:45.244303 PCI: 00:1f.4
1482 12:29:45.254274 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1483 12:29:45.263634 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1484 12:29:45.266900 PCI: 00:1f.5
1485 12:29:45.276968 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1486 12:29:45.280069 Done allocating resources.
1487 12:29:45.283293 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1488 12:29:45.286454
1489 12:29:45.286541 Enabling resources...
1490 12:29:45.293857 PCI: 00:00.0 subsystem <- 8086/9b61
1491 12:29:45.293945 PCI: 00:00.0 cmd <- 06
1492 12:29:45.297023 PCI: 00:02.0 subsystem <- 8086/9b41
1493 12:29:45.300248 PCI: 00:02.0 cmd <- 03
1494 12:29:45.303259 PCI: 00:08.0 cmd <- 06
1495 12:29:45.306512 PCI: 00:12.0 subsystem <- 8086/02f9
1496 12:29:45.309682 PCI: 00:12.0 cmd <- 02
1497 12:29:45.313552 PCI: 00:14.0 subsystem <- 8086/02ed
1498 12:29:45.316626 PCI: 00:14.0 cmd <- 02
1499 12:29:45.319813 PCI: 00:14.2 cmd <- 02
1500 12:29:45.323017 PCI: 00:14.3 subsystem <- 8086/02f0
1501 12:29:45.326179 PCI: 00:14.3 cmd <- 02
1502 12:29:45.329404 PCI: 00:15.0 subsystem <- 8086/02e8
1503 12:29:45.329492 PCI: 00:15.0 cmd <- 02
1504 12:29:45.332484
1505 12:29:45.336261 PCI: 00:15.1 subsystem <- 8086/02e9
1506 12:29:45.336348 PCI: 00:15.1 cmd <- 02
1507 12:29:45.342758 PCI: 00:16.0 subsystem <- 8086/02e0
1508 12:29:45.342846 PCI: 00:16.0 cmd <- 02
1509 12:29:45.345969 PCI: 00:17.0 subsystem <- 8086/02d3
1510 12:29:45.349033 PCI: 00:17.0 cmd <- 03
1511 12:29:45.352851 PCI: 00:19.0 subsystem <- 8086/02c5
1512 12:29:45.355918 PCI: 00:19.0 cmd <- 02
1513 12:29:45.359072 PCI: 00:1d.0 bridge ctrl <- 0013
1514 12:29:45.362197 PCI: 00:1d.0 subsystem <- 8086/02b0
1515 12:29:45.365351 PCI: 00:1d.0 cmd <- 06
1516 12:29:45.368578 PCI: 00:1e.0 subsystem <- 8086/02a8
1517 12:29:45.371927 PCI: 00:1e.0 cmd <- 06
1518 12:29:45.375619 PCI: 00:1e.2 subsystem <- 8086/02aa
1519 12:29:45.378767 PCI: 00:1e.2 cmd <- 06
1520 12:29:45.381931 PCI: 00:1e.3 subsystem <- 8086/02ab
1521 12:29:45.385068 PCI: 00:1e.3 cmd <- 02
1522 12:29:45.388198 PCI: 00:1f.0 subsystem <- 8086/0284
1523 12:29:45.391876 PCI: 00:1f.0 cmd <- 407
1524 12:29:45.394882 PCI: 00:1f.3 subsystem <- 8086/02c8
1525 12:29:45.398234 PCI: 00:1f.3 cmd <- 02
1526 12:29:45.401315 PCI: 00:1f.4 subsystem <- 8086/02a3
1527 12:29:45.404552 PCI: 00:1f.4 cmd <- 03
1528 12:29:45.407787 PCI: 00:1f.5 subsystem <- 8086/02a4
1529 12:29:45.407874 PCI: 00:1f.5 cmd <- 406
1530 12:29:45.411490
1531 12:29:45.418464 PCI: 01:00.0 cmd <- 02
1532 12:29:45.424205 done.
1533 12:29:45.434933 ME: Version: 14.0.39.1367
1534 12:29:45.441330 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 10
1535 12:29:45.444501 Initializing devices...
1536 12:29:45.444587 Root Device init ...
1537 12:29:45.451504 Chrome EC: Set SMI mask to 0x0000000000000000
1538 12:29:45.457770 Chrome EC: clear events_b mask to 0x0000000000000000
1539 12:29:45.460995 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1540 12:29:45.467283 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1541 12:29:45.474354 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1542 12:29:45.477456 Chrome EC: Set WAKE mask to 0x0000000000000000
1543 12:29:45.483832 Root Device init finished in 35170 usecs
1544 12:29:45.486911 CPU_CLUSTER: 0 init ...
1545 12:29:45.490543 CPU_CLUSTER: 0 init finished in 2449 usecs
1546 12:29:45.495452 PCI: 00:00.0 init ...
1547 12:29:45.498775 CPU TDP: 15 Watts
1548 12:29:45.501936 CPU PL2 = 64 Watts
1549 12:29:45.505153 PCI: 00:00.0 init finished in 7083 usecs
1550 12:29:45.508847 PCI: 00:02.0 init ...
1551 12:29:45.511994 PCI: 00:02.0 init finished in 2254 usecs
1552 12:29:45.515291 PCI: 00:08.0 init ...
1553 12:29:45.518474 PCI: 00:08.0 init finished in 2252 usecs
1554 12:29:45.521628 PCI: 00:12.0 init ...
1555 12:29:45.524755 PCI: 00:12.0 init finished in 2253 usecs
1556 12:29:45.528186 PCI: 00:14.0 init ...
1557 12:29:45.531399 PCI: 00:14.0 init finished in 2253 usecs
1558 12:29:45.534552 PCI: 00:14.2 init ...
1559 12:29:45.538293 PCI: 00:14.2 init finished in 2245 usecs
1560 12:29:45.541451 PCI: 00:14.3 init ...
1561 12:29:45.544597 PCI: 00:14.3 init finished in 2271 usecs
1562 12:29:45.547764 PCI: 00:15.0 init ...
1563 12:29:45.551518 DW I2C bus 0 at 0xd121f000 (400 KHz)
1564 12:29:45.557764 PCI: 00:15.0 init finished in 5971 usecs
1565 12:29:45.557851 PCI: 00:15.1 init ...
1566 12:29:45.564184 DW I2C bus 1 at 0xd1220000 (400 KHz)
1567 12:29:45.567621 PCI: 00:15.1 init finished in 5978 usecs
1568 12:29:45.570892 PCI: 00:16.0 init ...
1569 12:29:45.574098 PCI: 00:16.0 init finished in 2254 usecs
1570 12:29:45.577201 PCI: 00:19.0 init ...
1571 12:29:45.580910 DW I2C bus 4 at 0xd1222000 (400 KHz)
1572 12:29:45.584070 PCI: 00:19.0 init finished in 5979 usecs
1573 12:29:45.587150 PCI: 00:1d.0 init ...
1574 12:29:45.590240 Initializing PCH PCIe bridge.
1575 12:29:45.593848 PCI: 00:1d.0 init finished in 5286 usecs
1576 12:29:45.597950 PCI: 00:1f.0 init ...
1577 12:29:45.600880 IOAPIC: Initializing IOAPIC at 0xfec00000
1578 12:29:45.607305 IOAPIC: Bootstrap Processor Local APIC = 0x00
1579 12:29:45.607390 IOAPIC: ID = 0x02
1580 12:29:45.610439 IOAPIC: Dumping registers
1581 12:29:45.614201 reg 0x0000: 0x02000000
1582 12:29:45.617408 reg 0x0001: 0x00770020
1583 12:29:45.620465 reg 0x0002: 0x00000000
1584 12:29:45.623755 PCI: 00:1f.0 init finished in 23542 usecs
1585 12:29:45.626870 PCI: 00:1f.4 init ...
1586 12:29:45.630106 PCI: 00:1f.4 init finished in 2263 usecs
1587 12:29:45.641996 PCI: 01:00.0 init ...
1588 12:29:45.645101 PCI: 01:00.0 init finished in 2252 usecs
1589 12:29:45.649643 PNP: 0c09.0 init ...
1590 12:29:45.652691 Google Chrome EC uptime: 11.099 seconds
1591 12:29:45.655995
1592 12:29:45.658992 Google Chrome AP resets since EC boot: 0
1593 12:29:45.662747 Google Chrome most recent AP reset causes:
1594 12:29:45.669132 Google Chrome EC reset flags at last EC boot: reset-pin
1595 12:29:45.672277 PNP: 0c09.0 init finished in 20627 usecs
1596 12:29:45.675496 Devices initialized
1597 12:29:45.678641 Show all devs... After init.
1598 12:29:45.678725 Root Device: enabled 1
1599 12:29:45.681939 CPU_CLUSTER: 0: enabled 1
1600 12:29:45.685326 DOMAIN: 0000: enabled 1
1601 12:29:45.688298 APIC: 00: enabled 1
1602 12:29:45.688383 PCI: 00:00.0: enabled 1
1603 12:29:45.691518 PCI: 00:02.0: enabled 1
1604 12:29:45.695123 PCI: 00:04.0: enabled 0
1605 12:29:45.698354 PCI: 00:05.0: enabled 0
1606 12:29:45.698439 PCI: 00:12.0: enabled 1
1607 12:29:45.701526 PCI: 00:12.5: enabled 0
1608 12:29:45.704572 PCI: 00:12.6: enabled 0
1609 12:29:45.708404 PCI: 00:14.0: enabled 1
1610 12:29:45.708495 PCI: 00:14.1: enabled 0
1611 12:29:45.711600 PCI: 00:14.3: enabled 1
1612 12:29:45.714822 PCI: 00:14.5: enabled 0
1613 12:29:45.714906 PCI: 00:15.0: enabled 1
1614 12:29:45.717987
1615 12:29:45.718071 PCI: 00:15.1: enabled 1
1616 12:29:45.721140 PCI: 00:15.2: enabled 0
1617 12:29:45.724200 PCI: 00:15.3: enabled 0
1618 12:29:45.724284 PCI: 00:16.0: enabled 1
1619 12:29:45.727408
1620 12:29:45.727493 PCI: 00:16.1: enabled 0
1621 12:29:45.731244 PCI: 00:16.2: enabled 0
1622 12:29:45.734417 PCI: 00:16.3: enabled 0
1623 12:29:45.734502 PCI: 00:16.4: enabled 0
1624 12:29:45.737548 PCI: 00:16.5: enabled 0
1625 12:29:45.740783 PCI: 00:17.0: enabled 1
1626 12:29:45.743914 PCI: 00:19.0: enabled 1
1627 12:29:45.743999 PCI: 00:19.1: enabled 0
1628 12:29:45.747120 PCI: 00:19.2: enabled 0
1629 12:29:45.750314 PCI: 00:1a.0: enabled 0
1630 12:29:45.753593 PCI: 00:1c.0: enabled 0
1631 12:29:45.753677 PCI: 00:1c.1: enabled 0
1632 12:29:45.756849 PCI: 00:1c.2: enabled 0
1633 12:29:45.760641 PCI: 00:1c.3: enabled 0
1634 12:29:45.763765 PCI: 00:1c.4: enabled 0
1635 12:29:45.763849 PCI: 00:1c.5: enabled 0
1636 12:29:45.766964 PCI: 00:1c.6: enabled 0
1637 12:29:45.770142 PCI: 00:1c.7: enabled 0
1638 12:29:45.773322 PCI: 00:1d.0: enabled 1
1639 12:29:45.773407 PCI: 00:1d.1: enabled 0
1640 12:29:45.776545 PCI: 00:1d.2: enabled 0
1641 12:29:45.779813 PCI: 00:1d.3: enabled 0
1642 12:29:45.783469 PCI: 00:1d.4: enabled 0
1643 12:29:45.783554 PCI: 00:1d.5: enabled 0
1644 12:29:45.786632 PCI: 00:1e.0: enabled 1
1645 12:29:45.789687 PCI: 00:1e.1: enabled 0
1646 12:29:45.792889 PCI: 00:1e.2: enabled 1
1647 12:29:45.792973 PCI: 00:1e.3: enabled 1
1648 12:29:45.796013 PCI: 00:1f.0: enabled 1
1649 12:29:45.799755 PCI: 00:1f.1: enabled 0
1650 12:29:45.802811 PCI: 00:1f.2: enabled 0
1651 12:29:45.802896 PCI: 00:1f.3: enabled 1
1652 12:29:45.806146 PCI: 00:1f.4: enabled 1
1653 12:29:45.809200 PCI: 00:1f.5: enabled 1
1654 12:29:45.812458 PCI: 00:1f.6: enabled 0
1655 12:29:45.812542 USB0 port 0: enabled 1
1656 12:29:45.816121 I2C: 01:15: enabled 1
1657 12:29:45.819358 I2C: 02:5d: enabled 1
1658 12:29:45.819444 GENERIC: 0.0: enabled 1
1659 12:29:45.822485 I2C: 03:1a: enabled 1
1660 12:29:45.825639 I2C: 03:38: enabled 1
1661 12:29:45.825724 I2C: 03:39: enabled 1
1662 12:29:45.829294 I2C: 03:3a: enabled 1
1663 12:29:45.832448 I2C: 03:3b: enabled 1
1664 12:29:45.835692 PCI: 00:00.0: enabled 1
1665 12:29:45.835778 SPI: 00: enabled 1
1666 12:29:45.838803 SPI: 01: enabled 1
1667 12:29:45.838888 PNP: 0c09.0: enabled 1
1668 12:29:45.842006 USB2 port 0: enabled 1
1669 12:29:45.845257 USB2 port 1: enabled 1
1670 12:29:45.848253 USB2 port 2: enabled 0
1671 12:29:45.848338 USB2 port 3: enabled 0
1672 12:29:45.851541 USB2 port 5: enabled 0
1673 12:29:45.855395 USB2 port 6: enabled 1
1674 12:29:45.855480 USB2 port 9: enabled 1
1675 12:29:45.858665 USB3 port 0: enabled 1
1676 12:29:45.861826 USB3 port 1: enabled 1
1677 12:29:45.865024 USB3 port 2: enabled 1
1678 12:29:45.865110 USB3 port 3: enabled 1
1679 12:29:45.868146 USB3 port 4: enabled 0
1680 12:29:45.871365 APIC: 03: enabled 1
1681 12:29:45.871451 APIC: 04: enabled 1
1682 12:29:45.874427 APIC: 01: enabled 1
1683 12:29:45.874512 APIC: 02: enabled 1
1684 12:29:45.878268
1685 12:29:45.878354 APIC: 05: enabled 1
1686 12:29:45.881421 APIC: 06: enabled 1
1687 12:29:45.881506 APIC: 07: enabled 1
1688 12:29:45.884604 PCI: 00:08.0: enabled 1
1689 12:29:45.887705 PCI: 00:14.2: enabled 1
1690 12:29:45.890854 PCI: 01:00.0: enabled 1
1691 12:29:45.894690 Disabling ACPI via APMC:
1692 12:29:45.894775 done.
1693 12:29:45.901052 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1694 12:29:45.904232 ELOG: NV offset 0xaf0000 size 0x4000
1695 12:29:45.911001 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1696 12:29:45.917907 ELOG: Event(17) added with size 13 at 2022-12-01 12:29:45 UTC
1697 12:29:45.924219 ELOG: Event(16) added with size 11 at 2022-12-01 12:29:45 UTC
1698 12:29:45.927300 Erasing flash addr af0000 + 4 KiB
1699 12:29:45.995990 POST: Unexpected post code in previous boot: 0x73
1700 12:29:46.002595 ELOG: Event(A3) added with size 11 at 2022-12-01 12:29:46 UTC
1701 12:29:46.009379 ELOG: Event(A6) added with size 13 at 2022-12-01 12:29:46 UTC
1702 12:29:46.015744 ELOG: Event(92) added with size 9 at 2022-12-01 12:29:46 UTC
1703 12:29:46.022062 ELOG: Event(93) added with size 9 at 2022-12-01 12:29:46 UTC
1704 12:29:46.028413 ELOG: Event(9A) added with size 9 at 2022-12-01 12:29:46 UTC
1705 12:29:46.035168 ELOG: Event(9E) added with size 10 at 2022-12-01 12:29:46 UTC
1706 12:29:46.038365 ELOG: Event(9F) added with size 14 at 2022-12-01 12:29:46 UTC
1707 12:29:46.041648
1708 12:29:46.044892 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 60
1709 12:29:46.051347 ELOG: Event(A1) added with size 10 at 2022-12-01 12:29:46 UTC
1710 12:29:46.061433 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1711 12:29:46.068181 ELOG: Event(A0) added with size 9 at 2022-12-01 12:29:46 UTC
1712 12:29:46.071333 elog_add_boot_reason: Logged dev mode boot
1713 12:29:46.074522 Finalize devices...
1714 12:29:46.074608 PCI: 00:17.0 final
1715 12:29:46.077657 Devices finalized
1716 12:29:46.080917 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1717 12:29:46.087192 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1718 12:29:46.090945 ME: HFSTS1 : 0x90000245
1719 12:29:46.094115 ME: HFSTS2 : 0x3B850126
1720 12:29:46.100429 ME: HFSTS3 : 0x00000020
1721 12:29:46.103570 ME: HFSTS4 : 0x00004800
1722 12:29:46.107209 ME: HFSTS5 : 0x00000000
1723 12:29:46.110294 ME: HFSTS6 : 0x40400006
1724 12:29:46.113882 ME: Manufacturing Mode : NO
1725 12:29:46.117044 ME: FW Partition Table : OK
1726 12:29:46.120133 ME: Bringup Loader Failure : NO
1727 12:29:46.123177 ME: Firmware Init Complete : YES
1728 12:29:46.126360
1729 12:29:46.130066 ME: Boot Options Present : NO
1730 12:29:46.133198 ME: Update In Progress : NO
1731 12:29:46.136344 ME: D0i3 Support : YES
1732 12:29:46.139513 ME: Low Power State Enabled : NO
1733 12:29:46.142725 ME: CPU Replaced : NO
1734 12:29:46.146420 ME: CPU Replacement Valid : YES
1735 12:29:46.149620 ME: Current Working State : 5
1736 12:29:46.152668 ME: Current Operation State : 1
1737 12:29:46.156001 ME: Current Operation Mode : 0
1738 12:29:46.159023 ME: Error Code : 0
1739 12:29:46.162198 ME: CPU Debug Disabled : YES
1740 12:29:46.165924 ME: TXT Support : NO
1741 12:29:46.168877 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1742 12:29:46.175168 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1743 12:29:46.178945 CBFS @ c08000 size 3f8000
1744 12:29:46.182062 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1745 12:29:46.185347
1746 12:29:46.188513 CBFS: Locating 'fallback/dsdt.aml'
1747 12:29:46.191716 CBFS: Found @ offset 10bb80 size 3fa5
1748 12:29:46.195413 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1749 12:29:46.198572 CBFS @ c08000 size 3f8000
1750 12:29:46.204981 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1751 12:29:46.208010 CBFS: Locating 'fallback/slic'
1752 12:29:46.211789 CBFS: 'fallback/slic' not found.
1753 12:29:46.214880
1754 12:29:46.217987 ACPI: Writing ACPI tables at 99b3e000.
1755 12:29:46.218074 ACPI: * FACS
1756 12:29:46.221799 ACPI: * DSDT
1757 12:29:46.224967 Ramoops buffer: 0x100000@0x99a3d000.
1758 12:29:46.228092 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1759 12:29:46.234382 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1760 12:29:46.238189 Google Chrome EC: version:
1761 12:29:46.241279 ro: helios_v2.0.2659-56403530b
1762 12:29:46.244540 rw: helios_v2.0.2849-c41de27e7d
1763 12:29:46.244628 running image: 1
1764 12:29:46.248988 ACPI: * FADT
1765 12:29:46.249074 SCI is IRQ9
1766 12:29:46.255301 ACPI: added table 1/32, length now 40
1767 12:29:46.255389 ACPI: * SSDT
1768 12:29:46.258985 Found 1 CPU(s) with 8 core(s) each.
1769 12:29:46.262259 Error: Could not locate 'wifi_sar' in VPD.
1770 12:29:46.265433
1771 12:29:46.268597 Checking CBFS for default SAR values
1772 12:29:46.271915 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1773 12:29:46.274909 CBFS @ c08000 size 3f8000
1774 12:29:46.281850 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1775 12:29:46.285080 CBFS: Locating 'wifi_sar_defaults.hex'
1776 12:29:46.288285 CBFS: Found @ offset 5fac0 size 77
1777 12:29:46.291632 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1778 12:29:46.298304 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1779 12:29:46.301431 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1780 12:29:46.307848 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1781 12:29:46.310847 failed to find key in VPD: dsm_calib_r0_0
1782 12:29:46.320975 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1783 12:29:46.324128 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1784 12:29:46.327261
1785 12:29:46.330993 failed to find key in VPD: dsm_calib_r0_1
1786 12:29:46.337229 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1787 12:29:46.343495 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1788 12:29:46.346859 failed to find key in VPD: dsm_calib_r0_2
1789 12:29:46.356937 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1790 12:29:46.363396 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1791 12:29:46.366534 failed to find key in VPD: dsm_calib_r0_3
1792 12:29:46.376344 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1793 12:29:46.379411 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1794 12:29:46.386324 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1795 12:29:46.389676 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1796 12:29:46.392768 EC returned error result code 1
1797 12:29:46.396646 EC returned error result code 1
1798 12:29:46.400034 EC returned error result code 1
1799 12:29:46.406740 PS2K: Bad resp from EC. Vivaldi disabled!
1800 12:29:46.409953 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1801 12:29:46.416040 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1802 12:29:46.422740 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1803 12:29:46.425907 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1804 12:29:46.432868 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1805 12:29:46.439091 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1806 12:29:46.445379 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1807 12:29:46.448589 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1808 12:29:46.455670 ACPI: added table 2/32, length now 44
1809 12:29:46.455755 ACPI: * MCFG
1810 12:29:46.458839 ACPI: added table 3/32, length now 48
1811 12:29:46.461946 ACPI: * TPM2
1812 12:29:46.465308 TPM2 log created at 99a2d000
1813 12:29:46.468401 ACPI: added table 4/32, length now 52
1814 12:29:46.468487 ACPI: * MADT
1815 12:29:46.471506 SCI is IRQ9
1816 12:29:46.475176 ACPI: added table 5/32, length now 56
1817 12:29:46.475262 current = 99b43ac0
1818 12:29:46.478169 ACPI: * DMAR
1819 12:29:46.482038 ACPI: added table 6/32, length now 60
1820 12:29:46.484676 ACPI: * IGD OpRegion
1821 12:29:46.488446 GMA: Found VBT in CBFS
1822 12:29:46.488532 GMA: Found valid VBT in CBFS
1823 12:29:46.494881 ACPI: added table 7/32, length now 64
1824 12:29:46.494966 ACPI: * HPET
1825 12:29:46.497998 ACPI: added table 8/32, length now 68
1826 12:29:46.501303 ACPI: done.
1827 12:29:46.501389 ACPI tables: 31744 bytes.
1828 12:29:46.505083 smbios_write_tables: 99a2c000
1829 12:29:46.508119 EC returned error result code 3
1830 12:29:46.511277
1831 12:29:46.514898 Couldn't obtain OEM name from CBI
1832 12:29:46.514984 Create SMBIOS type 17
1833 12:29:46.518093 PCI: 00:00.0 (Intel Cannonlake)
1834 12:29:46.521309 PCI: 00:14.3 (Intel WiFi)
1835 12:29:46.524414 SMBIOS tables: 939 bytes.
1836 12:29:46.527583 Writing table forward entry at 0x00000500
1837 12:29:46.533989 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1838 12:29:46.537855 Writing coreboot table at 0x99b62000
1839 12:29:46.543983 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1840 12:29:46.547082 1. 0000000000001000-000000000009ffff: RAM
1841 12:29:46.554147 2. 00000000000a0000-00000000000fffff: RESERVED
1842 12:29:46.557344 3. 0000000000100000-0000000099a2bfff: RAM
1843 12:29:46.563616 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1844 12:29:46.566801 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1845 12:29:46.573074 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1846 12:29:46.579908 7. 000000009a000000-000000009f7fffff: RESERVED
1847 12:29:46.583036 8. 00000000e0000000-00000000efffffff: RESERVED
1848 12:29:46.590075 9. 00000000fc000000-00000000fc000fff: RESERVED
1849 12:29:46.593255 10. 00000000fe000000-00000000fe00ffff: RESERVED
1850 12:29:46.599627 11. 00000000fed10000-00000000fed17fff: RESERVED
1851 12:29:46.602875 12. 00000000fed80000-00000000fed83fff: RESERVED
1852 12:29:46.606585 13. 00000000fed90000-00000000fed91fff: RESERVED
1853 12:29:46.612767 14. 00000000feda0000-00000000feda1fff: RESERVED
1854 12:29:46.615874 15. 0000000100000000-000000045e7fffff: RAM
1855 12:29:46.619604 Graphics framebuffer located at 0xc0000000
1856 12:29:46.622730 Passing 5 GPIOs to payload:
1857 12:29:46.629538 NAME | PORT | POLARITY | VALUE
1858 12:29:46.635874 write protect | undefined | high | low
1859 12:29:46.638955 lid | undefined | high | high
1860 12:29:46.645342 power | undefined | high | low
1861 12:29:46.648545 oprom | undefined | high | low
1862 12:29:46.654950 EC in RW | 0x000000cb | high | low
1863 12:29:46.655032 Board ID: 4
1864 12:29:46.662041 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1865 12:29:46.665200 CBFS @ c08000 size 3f8000
1866 12:29:46.668390 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1867 12:29:46.671499
1868 12:29:46.675177 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1869 12:29:46.678371 coreboot table: 1492 bytes.
1870 12:29:46.681425 IMD ROOT 0. 99fff000 00001000
1871 12:29:46.684442 IMD SMALL 1. 99ffe000 00001000
1872 12:29:46.688195 FSP MEMORY 2. 99c4e000 003b0000
1873 12:29:46.691311 CONSOLE 3. 99c2e000 00020000
1874 12:29:46.694494 FMAP 4. 99c2d000 0000054e
1875 12:29:46.697667 TIME STAMP 5. 99c2c000 00000910
1876 12:29:46.700906 VBOOT WORK 6. 99c18000 00014000
1877 12:29:46.704109 MRC DATA 7. 99c16000 00001958
1878 12:29:46.707315 ROMSTG STCK 8. 99c15000 00001000
1879 12:29:46.711095 AFTER CAR 9. 99c0b000 0000a000
1880 12:29:46.714325 RAMSTAGE 10. 99baf000 0005c000
1881 12:29:46.717425 REFCODE 11. 99b7a000 00035000
1882 12:29:46.720479 SMM BACKUP 12. 99b6a000 00010000
1883 12:29:46.724232 COREBOOT 13. 99b62000 00008000
1884 12:29:46.727269
1885 12:29:46.730402 ACPI 14. 99b3e000 00024000
1886 12:29:46.733630 ACPI GNVS 15. 99b3d000 00001000
1887 12:29:46.736641 RAMOOPS 16. 99a3d000 00100000
1888 12:29:46.740388 TPM2 TCGLOG17. 99a2d000 00010000
1889 12:29:46.743628 SMBIOS 18. 99a2c000 00000800
1890 12:29:46.743714 IMD small region:
1891 12:29:46.746805 IMD ROOT 0. 99ffec00 00000400
1892 12:29:46.749894 FSP RUNTIME 1. 99ffebe0 00000004
1893 12:29:46.753070 EC HOSTEVENT 2. 99ffebc0 00000008
1894 12:29:46.756935 POWER STATE 3. 99ffeb80 00000040
1895 12:29:46.760007
1896 12:29:46.763118 ROMSTAGE 4. 99ffeb60 00000004
1897 12:29:46.766309 MEM INFO 5. 99ffe9a0 000001b9
1898 12:29:46.769483 VPD 6. 99ffe920 0000006c
1899 12:29:46.772595 MTRR: Physical address space:
1900 12:29:46.779697 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1901 12:29:46.782687 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1902 12:29:46.785911
1903 12:29:46.788942 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1904 12:29:46.795916 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1905 12:29:46.802346 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1906 12:29:46.808674 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1907 12:29:46.815627 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1908 12:29:46.818728 MTRR: Fixed MSR 0x250 0x0606060606060606
1909 12:29:46.824998 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 12:29:46.828116 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 12:29:46.831780 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 12:29:46.834890 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 12:29:46.841111 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 12:29:46.844267 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 12:29:46.847486 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 12:29:46.851223 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 12:29:46.857578 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 12:29:46.860702 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 12:29:46.864038 call enable_fixed_mtrr()
1920 12:29:46.867111 CPU physical address size: 39 bits
1921 12:29:46.871006 MTRR: default type WB/UC MTRR counts: 6/8.
1922 12:29:46.874076 MTRR: WB selected as default type.
1923 12:29:46.880374 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1924 12:29:46.886674 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1925 12:29:46.893360 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1926 12:29:46.899708 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1927 12:29:46.906953 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1928 12:29:46.913274 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1929 12:29:46.916445 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:29:46.922708 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:29:46.926445 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:29:46.929563 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:29:46.932651 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:29:46.939490 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:29:46.942924 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:29:46.945911 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:29:46.949063 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:29:46.955971 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:29:46.959243 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:29:46.959329
1941 12:29:46.959398 MTRR check
1942 12:29:46.962449 Fixed MTRRs : Enabled
1943 12:29:46.965380 Variable MTRRs: Enabled
1944 12:29:46.965465
1945 12:29:46.968543 call enable_fixed_mtrr()
1946 12:29:46.971703 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1947 12:29:46.975547 CPU physical address size: 39 bits
1948 12:29:46.981892 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1949 12:29:46.984890 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 12:29:46.988447 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 12:29:46.991708
1952 12:29:46.994862 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 12:29:46.997980 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 12:29:47.001232 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 12:29:47.007746 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 12:29:47.010835 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 12:29:47.014619 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 12:29:47.017690 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 12:29:47.023982 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 12:29:47.027756 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 12:29:47.030902 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 12:29:47.034032 call enable_fixed_mtrr()
1963 12:29:47.037208 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 12:29:47.040281 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 12:29:47.047178 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 12:29:47.050388 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 12:29:47.053614 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 12:29:47.056553 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 12:29:47.063542 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 12:29:47.066788 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 12:29:47.069930 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 12:29:47.073001 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 12:29:47.079411 CPU physical address size: 39 bits
1974 12:29:47.079490 call enable_fixed_mtrr()
1975 12:29:47.083104
1976 12:29:47.086214 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 12:29:47.089253 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 12:29:47.092448 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 12:29:47.096103 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 12:29:47.099252
1981 12:29:47.102446 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 12:29:47.105681 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 12:29:47.108754 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 12:29:47.115859 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 12:29:47.119163 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 12:29:47.122085 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 12:29:47.125414 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 12:29:47.128435 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 12:29:47.131621
1990 12:29:47.135271 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 12:29:47.138480 call enable_fixed_mtrr()
1992 12:29:47.141647 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 12:29:47.144762 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 12:29:47.148096 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 12:29:47.154997 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 12:29:47.158140 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 12:29:47.161276 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 12:29:47.164569 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 12:29:47.170940 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 12:29:47.174699 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 12:29:47.177864 CPU physical address size: 39 bits
2002 12:29:47.181061 call enable_fixed_mtrr()
2003 12:29:47.184265 CBFS @ c08000 size 3f8000
2004 12:29:47.187338 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2005 12:29:47.194170 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 12:29:47.197318 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 12:29:47.200487 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 12:29:47.203668 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 12:29:47.210638 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 12:29:47.213871 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 12:29:47.217018 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 12:29:47.220316 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 12:29:47.226603 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 12:29:47.230257 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 12:29:47.233329 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 12:29:47.240262 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 12:29:47.240349 call enable_fixed_mtrr()
2018 12:29:47.246495 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 12:29:47.249773 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 12:29:47.252949 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 12:29:47.256162 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 12:29:47.262471 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 12:29:47.265649 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 12:29:47.268848 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 12:29:47.272048 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 12:29:47.278865 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 12:29:47.282053 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 12:29:47.285159 CPU physical address size: 39 bits
2029 12:29:47.288841 call enable_fixed_mtrr()
2030 12:29:47.292025 CBFS: Locating 'fallback/payload'
2031 12:29:47.295088 CPU physical address size: 39 bits
2032 12:29:47.298281 CPU physical address size: 39 bits
2033 12:29:47.302053 CBFS: Found @ offset 1c96c0 size 3f798
2034 12:29:47.305245 CPU physical address size: 39 bits
2035 12:29:47.311639 Checking segment from ROM address 0xffdd16f8
2036 12:29:47.314771 Checking segment from ROM address 0xffdd1714
2037 12:29:47.318006 Loading segment from ROM address 0xffdd16f8
2038 12:29:47.321745 code (compression=0)
2039 12:29:47.331241 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2040 12:29:47.338335 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2041 12:29:47.341193 it's not compressed!
2042 12:29:47.433296 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2043 12:29:47.439653 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2044 12:29:47.443412 Loading segment from ROM address 0xffdd1714
2045 12:29:47.446576 Entry Point 0x30000000
2046 12:29:47.449617 Loaded segments
2047 12:29:47.455257 Finalizing chipset.
2048 12:29:47.459055 Finalizing SMM.
2049 12:29:47.462225 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2050 12:29:47.465429 mp_park_aps done after 0 msecs.
2051 12:29:47.471996 Jumping to boot code at 30000000(99b62000)
2052 12:29:47.478314 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2053 12:29:47.478400
2054 12:29:47.478468
2055 12:29:47.478530
2056 12:29:47.482013 Starting depthcharge on Helios...
2057 12:29:47.482099
2058 12:29:47.482431 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2059 12:29:47.482537 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2060 12:29:47.482622 Setting prompt string to ['hatch:']
2061 12:29:47.482702 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2062 12:29:47.491791 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2063 12:29:47.491878
2064 12:29:47.497801 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2065 12:29:47.497889
2066 12:29:47.504629 board_setup: Info: eMMC controller not present; skipping
2067 12:29:47.504715
2068 12:29:47.507849 New NVMe Controller 0x30053ac0 @ 00:1d:00
2069 12:29:47.507936
2070 12:29:47.514365 board_setup: Info: SDHCI controller not present; skipping
2071 12:29:47.514450
2072 12:29:47.520683 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2073 12:29:47.520820
2074 12:29:47.520905 Wipe memory regions:
2075 12:29:47.520975
2076 12:29:47.527569 [0x00000000001000, 0x000000000a0000)
2077 12:29:47.527655
2078 12:29:47.530648 [0x00000000100000, 0x00000030000000)
2079 12:29:47.530734
2080 12:29:47.597677 [0x00000030657430, 0x00000099a2c000)
2081 12:29:47.597780
2082 12:29:47.738264 [0x00000100000000, 0x0000045e800000)
2083 12:29:47.738400
2084 12:29:49.120841 R8152: Initializing
2085 12:29:49.120994
2086 12:29:49.123933 Version 9 (ocp_data = 6010)
2087 12:29:49.124018
2088 12:29:49.128395 R8152: Done initializing
2089 12:29:49.128480
2090 12:29:49.131345 Adding net device
2091 12:29:49.131429
2092 12:29:49.614596 R8152: Initializing
2093 12:29:49.615106
2094 12:29:49.618153 Version 6 (ocp_data = 5c30)
2095 12:29:49.618623
2096 12:29:49.621150 R8152: Done initializing
2097 12:29:49.621512
2098 12:29:49.627647 net_add_device: Attemp to include the same device
2099 12:29:49.628084
2100 12:29:49.634645 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2101 12:29:49.635227
2102 12:29:49.635596
2103 12:29:49.635911
2104 12:29:49.636657 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2106 12:29:49.738227 hatch: tftpboot 192.168.201.1 8193655/tftp-deploy-jziwgso_/kernel/bzImage 8193655/tftp-deploy-jziwgso_/kernel/cmdline 8193655/tftp-deploy-jziwgso_/ramdisk/ramdisk.cpio.gz
2107 12:29:49.738374 Setting prompt string to 'Starting kernel'
2108 12:29:49.738451 Setting prompt string to ['Starting kernel']
2109 12:29:49.738520 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2110 12:29:49.738595 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2111 12:29:49.742937 tftpboot 192.168.201.1 8193655/tftp-deploy-jziwgso_/kernel/bzImoy-jziwgso_/kernel/cmdline 8193655/tftp-deploy-jziwgso_/ramdisk/ramdisk.cpio.gz
2112 12:29:49.743020
2113 12:29:49.743085 Waiting for link
2114 12:29:49.743144
2115 12:29:49.943668 done.
2116 12:29:49.943803
2117 12:29:49.943872 MAC: 00:24:32:50:19:be
2118 12:29:49.943934
2119 12:29:49.946845 Sending DHCP discover... done.
2120 12:29:49.946931
2121 12:29:49.950550 Waiting for reply... done.
2122 12:29:49.950633
2123 12:29:49.953105 Sending DHCP request... done.
2124 12:29:49.953191
2125 12:29:49.956696 Waiting for reply... done.
2126 12:29:49.956822
2127 12:29:49.959983 My ip is 192.168.201.15
2128 12:29:49.960068
2129 12:29:49.963682 The DHCP server ip is 192.168.201.1
2130 12:29:49.963766
2131 12:29:49.966781 TFTP server IP predefined by user: 192.168.201.1
2132 12:29:49.966866
2133 12:29:49.973089 Bootfile predefined by user: 8193655/tftp-deploy-jziwgso_/kernel/bzImage
2134 12:29:49.973175
2135 12:29:49.979580 Sending tftp read request... done.
2136 12:29:49.979665
2137 12:29:49.983309 Waiting for the transfer...
2138 12:29:49.983394
2139 12:29:50.532456 00000000 ################################################################
2140 12:29:50.532598
2141 12:29:51.094831 00080000 ################################################################
2142 12:29:51.094985
2143 12:29:51.645451 00100000 ################################################################
2144 12:29:51.645607
2145 12:29:52.195661 00180000 ################################################################
2146 12:29:52.195817
2147 12:29:52.756777 00200000 ################################################################
2148 12:29:52.756940
2149 12:29:53.318646 00280000 ################################################################
2150 12:29:53.318794
2151 12:29:53.884888 00300000 ################################################################
2152 12:29:53.885036
2153 12:29:54.434454 00380000 ################################################################
2154 12:29:54.434600
2155 12:29:54.966930 00400000 ################################################################
2156 12:29:54.967080
2157 12:29:55.496577 00480000 ################################################################
2158 12:29:55.496734
2159 12:29:56.042231 00500000 ################################################################
2160 12:29:56.042384
2161 12:29:56.625036 00580000 ################################################################
2162 12:29:56.625618
2163 12:29:57.195273 00600000 ################################################################
2164 12:29:57.195427
2165 12:29:57.602390 00680000 ############################################## done.
2166 12:29:57.602538
2167 12:29:57.605429 The bootfile was 7188368 bytes long.
2168 12:29:57.605522
2169 12:29:57.609117 Sending tftp read request... done.
2170 12:29:57.609203
2171 12:29:57.612230 Waiting for the transfer...
2172 12:29:57.612317
2173 12:29:58.162335 00000000 ################################################################
2174 12:29:58.162486
2175 12:29:58.696733 00080000 ################################################################
2176 12:29:58.696883
2177 12:29:59.232954 00100000 ################################################################
2178 12:29:59.233104
2179 12:29:59.785822 00180000 ################################################################
2180 12:29:59.785974
2181 12:30:00.321322 00200000 ################################################################
2182 12:30:00.321473
2183 12:30:00.845129 00280000 ################################################################
2184 12:30:00.845299
2185 12:30:01.377103 00300000 ################################################################
2186 12:30:01.377256
2187 12:30:01.907075 00380000 ################################################################
2188 12:30:01.907232
2189 12:30:02.441752 00400000 ################################################################
2190 12:30:02.441894
2191 12:30:02.965176 00480000 ################################################################
2192 12:30:02.965322
2193 12:30:03.229973 00500000 ################################ done.
2194 12:30:03.230114
2195 12:30:03.232951 Sending tftp read request... done.
2196 12:30:03.233038
2197 12:30:03.235990 Waiting for the transfer...
2198 12:30:03.236078
2199 12:30:03.236146 00000000 # done.
2200 12:30:03.236210
2201 12:30:03.246324 Command line loaded dynamically from TFTP file: 8193655/tftp-deploy-jziwgso_/kernel/cmdline
2202 12:30:03.246412
2203 12:30:03.272130 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8193655/extract-nfsrootfs-w5ljo8l2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2204 12:30:03.272227
2205 12:30:03.278931 ec_init(0): CrosEC protocol v3 supported (256, 256)
2206 12:30:03.279018
2207 12:30:03.285216 Shutting down all USB controllers.
2208 12:30:03.285302
2209 12:30:03.285370 Removing current net device
2210 12:30:03.285433
2211 12:30:03.289612 Finalizing coreboot
2212 12:30:03.289699
2213 12:30:03.296002 Exiting depthcharge with code 4 at timestamp: 23219008
2214 12:30:03.296088
2215 12:30:03.296156
2216 12:30:03.296219 Starting kernel ...
2217 12:30:03.296281
2218 12:30:03.296339
2219 12:30:03.296396
2220 12:30:03.296758 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2221 12:30:03.296860 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2222 12:30:03.296939 Setting prompt string to ['Linux version [0-9]']
2223 12:30:03.297010 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2224 12:30:03.297079 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2226 12:34:28.297571 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2228 12:34:28.298478 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2230 12:34:28.299156 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2233 12:34:28.300300 end: 2 depthcharge-action (duration 00:05:00) [common]
2235 12:34:28.301311 Cleaning after the job
2236 12:34:28.301691 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/ramdisk
2237 12:34:28.303398 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/kernel
2238 12:34:28.305395 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/nfsrootfs
2239 12:34:28.365554 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193655/tftp-deploy-jziwgso_/modules
2240 12:34:28.365857 start: 5.1 power-off (timeout 00:00:30) [common]
2241 12:34:28.366027 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2242 12:34:28.385795 >> Command sent successfully.
2243 12:34:28.387751 Returned 0 in 0 seconds
2244 12:34:28.488836 end: 5.1 power-off (duration 00:00:00) [common]
2246 12:34:28.490012 start: 5.2 read-feedback (timeout 00:10:00) [common]
2247 12:34:28.490915 Listened to connection for namespace 'common' for up to 1s
2248 12:34:29.492817 Finalising connection for namespace 'common'
2249 12:34:29.492994 Disconnecting from shell: Finalise
2250 12:34:29.593737 end: 5.2 read-feedback (duration 00:00:01) [common]
2251 12:34:29.593922 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8193655
2252 12:34:29.687733 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8193655
2253 12:34:29.687910 JobError: Your job cannot terminate cleanly.