Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:28:36.798309 lava-dispatcher, installed at version: 2022.10
2 12:28:36.798493 start: 0 validate
3 12:28:36.798621 Start time: 2022-12-01 12:28:36.798614+00:00 (UTC)
4 12:28:36.798744 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:28:36.798870 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221125.0%2Famd64%2Finitrd.cpio.gz exists
6 12:28:37.094032 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:28:37.094772 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:28:37.390957 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:28:37.391656 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221125.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:28:37.684999 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:28:37.685761 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:28:37.986254 validate duration: 1.19
14 12:28:37.987592 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:28:37.988195 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:28:37.988699 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:28:37.989237 Not decompressing ramdisk as can be used compressed.
18 12:28:37.989771 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221125.0/amd64/initrd.cpio.gz
19 12:28:37.990143 saving as /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/ramdisk/initrd.cpio.gz
20 12:28:37.990486 total size: 5431607 (5MB)
21 12:28:37.997824 progress 0% (0MB)
22 12:28:38.005822 progress 5% (0MB)
23 12:28:38.013333 progress 10% (0MB)
24 12:28:38.018343 progress 15% (0MB)
25 12:28:38.022545 progress 20% (1MB)
26 12:28:38.025768 progress 25% (1MB)
27 12:28:38.028649 progress 30% (1MB)
28 12:28:38.031432 progress 35% (1MB)
29 12:28:38.033817 progress 40% (2MB)
30 12:28:38.036008 progress 45% (2MB)
31 12:28:38.038135 progress 50% (2MB)
32 12:28:38.040204 progress 55% (2MB)
33 12:28:38.042053 progress 60% (3MB)
34 12:28:38.043787 progress 65% (3MB)
35 12:28:38.045606 progress 70% (3MB)
36 12:28:38.047218 progress 75% (3MB)
37 12:28:38.048798 progress 80% (4MB)
38 12:28:38.050276 progress 85% (4MB)
39 12:28:38.051956 progress 90% (4MB)
40 12:28:38.053404 progress 95% (4MB)
41 12:28:38.054780 progress 100% (5MB)
42 12:28:38.055053 5MB downloaded in 0.06s (80.22MB/s)
43 12:28:38.055215 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:28:38.055466 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:28:38.055558 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:28:38.055649 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:28:38.055757 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:28:38.055831 saving as /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/kernel/bzImage
50 12:28:38.055893 total size: 7188368 (6MB)
51 12:28:38.055956 No compression specified
52 12:28:40.063818 progress 0% (0MB)
53 12:28:40.069140 progress 5% (0MB)
54 12:28:40.075688 progress 10% (0MB)
55 12:28:40.081120 progress 15% (1MB)
56 12:28:40.088028 progress 20% (1MB)
57 12:28:40.093663 progress 25% (1MB)
58 12:28:40.100286 progress 30% (2MB)
59 12:28:40.106814 progress 35% (2MB)
60 12:28:40.112019 progress 40% (2MB)
61 12:28:40.117966 progress 45% (3MB)
62 12:28:40.127579 progress 50% (3MB)
63 12:28:40.137189 progress 55% (3MB)
64 12:28:40.149621 progress 60% (4MB)
65 12:28:40.177825 progress 65% (4MB)
66 12:28:40.203839 progress 70% (4MB)
67 12:28:40.224042 progress 75% (5MB)
68 12:28:40.246689 progress 80% (5MB)
69 12:28:40.275914 progress 85% (5MB)
70 12:28:40.299425 progress 90% (6MB)
71 12:28:40.314373 progress 95% (6MB)
72 12:28:40.334537 progress 100% (6MB)
73 12:28:40.334755 6MB downloaded in 2.28s (3.01MB/s)
74 12:28:40.334913 end: 1.2.1 http-download (duration 00:00:02) [common]
76 12:28:40.335152 end: 1.2 download-retry (duration 00:00:02) [common]
77 12:28:40.335242 start: 1.3 download-retry (timeout 00:09:58) [common]
78 12:28:40.335332 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 12:28:40.335440 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221125.0/amd64/full.rootfs.tar.xz
80 12:28:40.335509 saving as /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/nfsrootfs/full.rootfs.tar
81 12:28:40.335572 total size: 133311584 (127MB)
82 12:28:40.335634 Using unxz to decompress xz
83 12:28:40.352384 progress 0% (0MB)
84 12:28:40.694897 progress 5% (6MB)
85 12:28:41.055702 progress 10% (12MB)
86 12:28:41.344667 progress 15% (19MB)
87 12:28:41.545431 progress 20% (25MB)
88 12:28:41.798425 progress 25% (31MB)
89 12:28:42.146961 progress 30% (38MB)
90 12:28:42.495326 progress 35% (44MB)
91 12:28:42.893855 progress 40% (50MB)
92 12:28:43.276215 progress 45% (57MB)
93 12:28:43.637274 progress 50% (63MB)
94 12:28:44.015383 progress 55% (69MB)
95 12:28:44.384762 progress 60% (76MB)
96 12:28:44.752374 progress 65% (82MB)
97 12:28:45.119957 progress 70% (89MB)
98 12:28:45.479180 progress 75% (95MB)
99 12:28:45.906972 progress 80% (101MB)
100 12:28:46.338025 progress 85% (108MB)
101 12:28:46.608388 progress 90% (114MB)
102 12:28:46.944743 progress 95% (120MB)
103 12:28:47.331542 progress 100% (127MB)
104 12:28:47.336869 127MB downloaded in 7.00s (18.16MB/s)
105 12:28:47.337136 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:28:47.337390 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:28:47.337484 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:28:47.337624 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:28:47.337739 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:28:47.337807 saving as /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/modules/modules.tar
112 12:28:47.337867 total size: 54724 (0MB)
113 12:28:47.337926 Using unxz to decompress xz
114 12:28:47.343553 progress 59% (0MB)
115 12:28:47.343912 progress 100% (0MB)
116 12:28:47.347357 0MB downloaded in 0.01s (5.50MB/s)
117 12:28:47.347566 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:28:47.347815 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:28:47.347906 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 12:28:47.347999 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 12:28:48.573960 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8193669/extract-nfsrootfs-hwfgsun0
123 12:28:48.574183 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:28:48.574304 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 12:28:48.574454 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66
126 12:28:48.574571 makedir: /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin
127 12:28:48.574668 makedir: /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/tests
128 12:28:48.574790 makedir: /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/results
129 12:28:48.574916 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-add-keys
130 12:28:48.575060 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-add-sources
131 12:28:48.575190 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-background-process-start
132 12:28:48.575318 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-background-process-stop
133 12:28:48.575444 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-common-functions
134 12:28:48.575569 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-echo-ipv4
135 12:28:48.575695 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-install-packages
136 12:28:48.575820 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-installed-packages
137 12:28:48.575945 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-os-build
138 12:28:48.576070 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-probe-channel
139 12:28:48.576194 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-probe-ip
140 12:28:48.576319 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-target-ip
141 12:28:48.576446 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-target-mac
142 12:28:48.576571 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-target-storage
143 12:28:48.576699 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-test-case
144 12:28:48.576825 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-test-event
145 12:28:48.576948 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-test-feedback
146 12:28:48.577073 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-test-raise
147 12:28:48.577196 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-test-reference
148 12:28:48.577321 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-test-runner
149 12:28:48.577447 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-test-set
150 12:28:48.577784 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-test-shell
151 12:28:48.577912 Updating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-install-packages (oe)
152 12:28:48.578041 Updating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/bin/lava-installed-packages (oe)
153 12:28:48.578152 Creating /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/environment
154 12:28:48.578250 LAVA metadata
155 12:28:48.578324 - LAVA_JOB_ID=8193669
156 12:28:48.578403 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:28:48.578521 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 12:28:48.578593 skipped lava-vland-overlay
159 12:28:48.578691 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:28:48.578789 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 12:28:48.578858 skipped lava-multinode-overlay
162 12:28:48.578956 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:28:48.579052 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 12:28:48.579135 Loading test definitions
165 12:28:48.579246 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
166 12:28:48.579329 Using /lava-8193669 at stage 0
167 12:28:48.579605 uuid=8193669_1.5.2.3.1 testdef=None
168 12:28:48.579704 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:28:48.579807 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
170 12:28:48.580285 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:28:48.580539 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
173 12:28:48.581111 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:28:48.581374 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
176 12:28:48.581971 runner path: /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/0/tests/0_dmesg test_uuid 8193669_1.5.2.3.1
177 12:28:48.582133 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:28:48.582395 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
180 12:28:48.582479 Using /lava-8193669 at stage 1
181 12:28:48.582743 uuid=8193669_1.5.2.3.5 testdef=None
182 12:28:48.582842 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:28:48.582945 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
184 12:28:48.583392 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:28:48.583641 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
187 12:28:48.584215 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:28:48.584478 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
190 12:28:48.585028 runner path: /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/1/tests/1_bootrr test_uuid 8193669_1.5.2.3.5
191 12:28:48.585180 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:28:48.585408 Creating lava-test-runner.conf files
194 12:28:48.585525 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/0 for stage 0
195 12:28:48.585659 - 0_dmesg
196 12:28:48.585745 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193669/lava-overlay-giuh8w66/lava-8193669/1 for stage 1
197 12:28:48.585846 - 1_bootrr
198 12:28:48.585952 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:28:48.586053 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
200 12:28:48.591534 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:28:48.591646 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
202 12:28:48.591747 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:28:48.591848 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:28:48.591950 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
205 12:28:48.692909 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:28:48.693262 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
207 12:28:48.693394 extracting modules file /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8193669/extract-nfsrootfs-hwfgsun0
208 12:28:48.697474 extracting modules file /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8193669/extract-overlay-ramdisk-9aiapcqr/ramdisk
209 12:28:48.701332 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:28:48.701451 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
211 12:28:48.701580 [common] Applying overlay to NFS
212 12:28:48.701664 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8193669/compress-overlay-c9dqaezc/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8193669/extract-nfsrootfs-hwfgsun0
213 12:28:48.705310 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:28:48.705429 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
215 12:28:48.705575 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:28:48.705683 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
217 12:28:48.705774 Building ramdisk /var/lib/lava/dispatcher/tmp/8193669/extract-overlay-ramdisk-9aiapcqr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8193669/extract-overlay-ramdisk-9aiapcqr/ramdisk
218 12:28:48.738546 >> 24582 blocks
219 12:28:49.213799 rename /var/lib/lava/dispatcher/tmp/8193669/extract-overlay-ramdisk-9aiapcqr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/ramdisk/ramdisk.cpio.gz
220 12:28:49.214216 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:28:49.214347 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
222 12:28:49.214465 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
223 12:28:49.214579 No mkimage arch provided, not using FIT.
224 12:28:49.214683 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:28:49.214781 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:28:49.214902 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:28:49.215011 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
228 12:28:49.215099 No LXC device requested
229 12:28:49.215201 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:28:49.215306 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
231 12:28:49.215404 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:28:49.215484 Checking files for TFTP limit of 4294967296 bytes.
233 12:28:49.215882 end: 1 tftp-deploy (duration 00:00:11) [common]
234 12:28:49.216002 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:28:49.216110 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:28:49.216248 substitutions:
237 12:28:49.216323 - {DTB}: None
238 12:28:49.216403 - {INITRD}: 8193669/tftp-deploy-xj_e7o4g/ramdisk/ramdisk.cpio.gz
239 12:28:49.216481 - {KERNEL}: 8193669/tftp-deploy-xj_e7o4g/kernel/bzImage
240 12:28:49.216559 - {LAVA_MAC}: None
241 12:28:49.216635 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8193669/extract-nfsrootfs-hwfgsun0
242 12:28:49.216710 - {NFS_SERVER_IP}: 192.168.201.1
243 12:28:49.216784 - {PRESEED_CONFIG}: None
244 12:28:49.216857 - {PRESEED_LOCAL}: None
245 12:28:49.216931 - {RAMDISK}: 8193669/tftp-deploy-xj_e7o4g/ramdisk/ramdisk.cpio.gz
246 12:28:49.217005 - {ROOT_PART}: None
247 12:28:49.217078 - {ROOT}: None
248 12:28:49.217151 - {SERVER_IP}: 192.168.201.1
249 12:28:49.217224 - {TEE}: None
250 12:28:49.217297 Parsed boot commands:
251 12:28:49.217368 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:28:49.217587 Parsed boot commands: tftpboot 192.168.201.1 8193669/tftp-deploy-xj_e7o4g/kernel/bzImage 8193669/tftp-deploy-xj_e7o4g/kernel/cmdline 8193669/tftp-deploy-xj_e7o4g/ramdisk/ramdisk.cpio.gz
253 12:28:49.217694 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:28:49.217802 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:28:49.217913 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:28:49.218022 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:28:49.218103 Not connected, no need to disconnect.
258 12:28:49.218201 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:28:49.218302 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:28:49.218382 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
261 12:28:49.221127 Setting prompt string to ['lava-test: # ']
262 12:28:49.221410 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:28:49.221569 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:28:49.221685 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:28:49.221791 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:28:49.221976 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
267 12:28:49.240393 >> Command sent successfully.
268 12:28:49.242326 Returned 0 in 0 seconds
269 12:28:49.343578 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:28:49.345171 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:28:49.345769 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:28:49.346272 Setting prompt string to 'Starting depthcharge on Voema...'
274 12:28:49.346671 Changing prompt to 'Starting depthcharge on Voema...'
275 12:28:49.347134 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 12:28:49.348457 [Enter `^Ec?' for help]
277 12:28:56.926671
278 12:28:56.927327
279 12:28:56.936697 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 12:28:56.940048 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
281 12:28:56.943309
282 12:28:56.946756 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
283 12:28:56.950244 CPU: AES supported, TXT NOT supported, VT supported
284 12:28:56.956859 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
285 12:28:56.960564 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
286 12:28:56.967267 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
287 12:28:56.970922 VBOOT: Loading verstage.
288 12:28:56.974318 FMAP: Found "FLASH" version 1.1 at 0x1804000.
289 12:28:56.980439 FMAP: base = 0x0 size = 0x2000000 #areas = 32
290 12:28:56.984107 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 12:28:56.994181 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
292 12:28:57.000406 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
293 12:28:57.000985
294 12:28:57.001514
295 12:28:57.011377 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
296 12:28:57.027308 Probing TPM: . done!
297 12:28:57.030618 TPM ready after 0 ms
298 12:28:57.034132 Connected to device vid:did:rid of 1ae0:0028:00
299 12:28:57.046010 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
300 12:28:57.052362 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
301 12:28:57.056383 Initialized TPM device CR50 revision 0
302 12:28:57.111488 tlcl_send_startup: Startup return code is 0
303 12:28:57.112060 TPM: setup succeeded
304 12:28:57.127240 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
305 12:28:57.142732 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 12:28:57.154073 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
307 12:28:57.164171 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 12:28:57.167595 Chrome EC: UHEPI supported
309 12:28:57.171424 Phase 1
310 12:28:57.174646 FMAP: area GBB found @ 1805000 (458752 bytes)
311 12:28:57.184356 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
312 12:28:57.190921 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
313 12:28:57.197513 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
314 12:28:57.204322 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
315 12:28:57.207436 Recovery requested (1009000e)
316 12:28:57.210854 TPM: Extending digest for VBOOT: boot mode into PCR 0
317 12:28:57.222491 tlcl_extend: response is 0
318 12:28:57.229134 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
319 12:28:57.239558 tlcl_extend: response is 0
320 12:28:57.245725 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
321 12:28:57.252209 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
322 12:28:57.258796 BS: verstage times (exec / console): total (unknown) / 142 ms
323 12:28:57.259387
324 12:28:57.259777
325 12:28:57.271880 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
326 12:28:57.278776 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
327 12:28:57.281943 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
328 12:28:57.285198 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
329 12:28:57.291800 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
330 12:28:57.295416 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
331 12:28:57.298444 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
332 12:28:57.301808 TCO_STS: 0000 0000
333 12:28:57.305191 GEN_PMCON: d0015038 00002200
334 12:28:57.308132 GBLRST_CAUSE: 00000000 00000000
335 12:28:57.311198 HPR_CAUSE0: 00000000
336 12:28:57.311684 prev_sleep_state 5
337 12:28:57.314939 Boot Count incremented to 10480
338 12:28:57.321330 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
339 12:28:57.328355 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
340 12:28:57.338138 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
341 12:28:57.344682 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
342 12:28:57.348224 Chrome EC: UHEPI supported
343 12:28:57.354654 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
344 12:28:57.365699 Probing TPM: done!
345 12:28:57.372375 Connected to device vid:did:rid of 1ae0:0028:00
346 12:28:57.382061 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
347 12:28:57.385915 Initialized TPM device CR50 revision 0
348 12:28:57.400436 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
349 12:28:57.407555 MRC: Hash idx 0x100b comparison successful.
350 12:28:57.410348 MRC cache found, size faa8
351 12:28:57.410838 bootmode is set to: 2
352 12:28:57.413965 SPD index = 2
353 12:28:57.420120 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
354 12:28:57.423818 SPD: module type is LPDDR4X
355 12:28:57.426970 SPD: module part number is MT53D1G64D4NW-046
356 12:28:57.433450 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
357 12:28:57.437332 SPD: device width 16 bits, bus width 16 bits
358 12:28:57.443369 SPD: module size is 2048 MB (per channel)
359 12:28:57.872575 CBMEM:
360 12:28:57.875475 IMD: root @ 0x76fff000 254 entries.
361 12:28:57.878707 IMD: root @ 0x76ffec00 62 entries.
362 12:28:57.882052 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
363 12:28:57.888845 FMAP: area RW_VPD found @ f35000 (8192 bytes)
364 12:28:57.892152 External stage cache:
365 12:28:57.895575 IMD: root @ 0x7b3ff000 254 entries.
366 12:28:57.898348 IMD: root @ 0x7b3fec00 62 entries.
367 12:28:57.913854 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
368 12:28:57.920266 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
369 12:28:57.927335 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
370 12:28:57.940672 MRC: 'RECOVERY_MRC_CACHE' does not need update.
371 12:28:57.947559 cse_lite: Skip switching to RW in the recovery path
372 12:28:57.948166 8 DIMMs found
373 12:28:57.948559 SMM Memory Map
374 12:28:57.950121 SMRAM : 0x7b000000 0x800000
375 12:28:57.953577
376 12:28:57.957058 Subregion 0: 0x7b000000 0x200000
377 12:28:57.960482 Subregion 1: 0x7b200000 0x200000
378 12:28:57.964070 Subregion 2: 0x7b400000 0x400000
379 12:28:57.964653 top_of_ram = 0x77000000
380 12:28:57.970556 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 12:28:57.977069 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 12:28:57.980036 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
383 12:28:57.986530 MTRR Range: Start=ff000000 End=0 (Size 1000000)
384 12:28:57.993248 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
385 12:28:57.999765 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
386 12:28:58.010379 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
387 12:28:58.013633 Processing 211 relocs. Offset value of 0x74c0b000
388 12:28:58.016661
389 12:28:58.022755 BS: romstage times (exec / console): total (unknown) / 277 ms
390 12:28:58.029985
391 12:28:58.030577
392 12:28:58.036710 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
393 12:28:58.043576 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
394 12:28:58.050807 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
395 12:28:58.057167 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
396 12:28:58.066552 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
397 12:28:58.073263 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
398 12:28:58.116139 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
399 12:28:58.122383 Processing 5008 relocs. Offset value of 0x75d98000
400 12:28:58.125554 BS: postcar times (exec / console): total (unknown) / 59 ms
401 12:28:58.126064
402 12:28:58.128947
403 12:28:58.129444
404 12:28:58.139088 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
405 12:28:58.139680 Normal boot
406 12:28:58.142405 FW_CONFIG value is 0x804c02
407 12:28:58.146360 PCI: 00:07.0 disabled by fw_config
408 12:28:58.148752 PCI: 00:07.1 disabled by fw_config
409 12:28:58.152649 PCI: 00:0d.2 disabled by fw_config
410 12:28:58.155879 PCI: 00:1c.7 disabled by fw_config
411 12:28:58.162354 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 12:28:58.169131 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 12:28:58.172283 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:28:58.175974 GENERIC: 0.0 disabled by fw_config
415 12:28:58.182299 GENERIC: 1.0 disabled by fw_config
416 12:28:58.185473 fw_config match found: DB_USB=USB3_ACTIVE
417 12:28:58.188715 fw_config match found: DB_USB=USB3_ACTIVE
418 12:28:58.192414 fw_config match found: DB_USB=USB3_ACTIVE
419 12:28:58.198740 fw_config match found: DB_USB=USB3_ACTIVE
420 12:28:58.201878 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 12:28:58.209315 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 12:28:58.218584 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
423 12:28:58.224757 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
424 12:28:58.228124 microcode: sig=0x806c1 pf=0x80 revision=0x86
425 12:28:58.235805 microcode: Update skipped, already up-to-date
426 12:28:58.241600 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
427 12:28:58.269376 Detected 4 core, 8 thread CPU.
428 12:28:58.272699 Setting up SMI for CPU
429 12:28:58.275886 IED base = 0x7b400000
430 12:28:58.276469 IED size = 0x00400000
431 12:28:58.279779
432 12:28:58.280358 Will perform SMM setup.
433 12:28:58.285643 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
434 12:28:58.292433 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 12:28:58.299063 Processing 16 relocs. Offset value of 0x00030000
436 12:28:58.302151 Attempting to start 7 APs
437 12:28:58.305327 Waiting for 10ms after sending INIT.
438 12:28:58.321136 Waiting for 1st SIPI to complete...done.
439 12:28:58.321748 AP: slot 1 apic_id 1.
440 12:28:58.328383 Waiting for 2nd SIPI to complete...done.
441 12:28:58.328880 AP: slot 2 apic_id 3.
442 12:28:58.330972 AP: slot 6 apic_id 2.
443 12:28:58.334381 AP: slot 7 apic_id 6.
444 12:28:58.334867 AP: slot 3 apic_id 7.
445 12:28:58.337640 AP: slot 4 apic_id 5.
446 12:28:58.341376 AP: slot 5 apic_id 4.
447 12:28:58.347973 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 12:28:58.355041 Processing 13 relocs. Offset value of 0x00038000
449 12:28:58.355627 Unable to locate Global NVS
450 12:28:58.357981
451 12:28:58.364817 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 12:28:58.367998 Installing permanent SMM handler to 0x7b000000
453 12:28:58.378364 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 12:28:58.381267 Processing 794 relocs. Offset value of 0x7b010000
455 12:28:58.391003 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 12:28:58.394152 Processing 13 relocs. Offset value of 0x7b008000
457 12:28:58.400496 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 12:28:58.407515 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 12:28:58.410342 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 12:28:58.417004 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 12:28:58.423608 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 12:28:58.430069 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 12:28:58.436910 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 12:28:58.440183 Unable to locate Global NVS
465 12:28:58.447355 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 12:28:58.449842 Clearing SMI status registers
467 12:28:58.450330 SMI_STS: PM1
468 12:28:58.453583
469 12:28:58.454176 PM1_STS: PWRBTN
470 12:28:58.460031 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
471 12:28:58.463801 In relocation handler: CPU 0
472 12:28:58.466531 New SMBASE=0x7b000000 IEDBASE=0x7b400000
473 12:28:58.473359 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 12:28:58.476940 Relocation complete.
475 12:28:58.483478 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
476 12:28:58.486340 In relocation handler: CPU 1
477 12:28:58.489589 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
478 12:28:58.493523 Relocation complete.
479 12:28:58.499491 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
480 12:28:58.503090 In relocation handler: CPU 6
481 12:28:58.506140 New SMBASE=0x7affe800 IEDBASE=0x7b400000
482 12:28:58.509362 Writing SMRR. base = 0x7b000006, mask=0xff800c00
483 12:28:58.512825 Relocation complete.
484 12:28:58.519406 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
485 12:28:58.523116 In relocation handler: CPU 3
486 12:28:58.525868 New SMBASE=0x7afff400 IEDBASE=0x7b400000
487 12:28:58.529069 Relocation complete.
488 12:28:58.535704 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
489 12:28:58.539109 In relocation handler: CPU 7
490 12:28:58.542466 New SMBASE=0x7affe400 IEDBASE=0x7b400000
491 12:28:58.549079 Writing SMRR. base = 0x7b000006, mask=0xff800c00
492 12:28:58.549579 Relocation complete.
493 12:28:58.552438
494 12:28:58.558906 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
495 12:28:58.562908 In relocation handler: CPU 4
496 12:28:58.565442 New SMBASE=0x7afff000 IEDBASE=0x7b400000
497 12:28:58.565960 Relocation complete.
498 12:28:58.575618 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
499 12:28:58.576203 In relocation handler: CPU 5
500 12:28:58.579071
501 12:28:58.582152 New SMBASE=0x7affec00 IEDBASE=0x7b400000
502 12:28:58.585537 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 12:28:58.588707 Relocation complete.
504 12:28:58.595306 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
505 12:28:58.599031 In relocation handler: CPU 2
506 12:28:58.602028 New SMBASE=0x7afff800 IEDBASE=0x7b400000
507 12:28:58.605159 Relocation complete.
508 12:28:58.605768 Initializing CPU #0
509 12:28:58.609009 CPU: vendor Intel device 806c1
510 12:28:58.615488 CPU: family 06, model 8c, stepping 01
511 12:28:58.616223 Clearing out pending MCEs
512 12:28:58.618523 Setting up local APIC...
513 12:28:58.622016 apic_id: 0x00 done.
514 12:28:58.625084 Turbo is available but hidden
515 12:28:58.628636 Turbo is available and visible
516 12:28:58.632050 microcode: Update skipped, already up-to-date
517 12:28:58.635692 CPU #0 initialized
518 12:28:58.636281 Initializing CPU #1
519 12:28:58.638175 Initializing CPU #7
520 12:28:58.641805 Initializing CPU #3
521 12:28:58.645415 CPU: vendor Intel device 806c1
522 12:28:58.648311 CPU: family 06, model 8c, stepping 01
523 12:28:58.652058 CPU: vendor Intel device 806c1
524 12:28:58.655819 CPU: family 06, model 8c, stepping 01
525 12:28:58.658559 Clearing out pending MCEs
526 12:28:58.659174 Initializing CPU #2
527 12:28:58.661639 Initializing CPU #6
528 12:28:58.664874 CPU: vendor Intel device 806c1
529 12:28:58.667935 CPU: family 06, model 8c, stepping 01
530 12:28:58.671965 CPU: vendor Intel device 806c1
531 12:28:58.675140 CPU: family 06, model 8c, stepping 01
532 12:28:58.677962 Clearing out pending MCEs
533 12:28:58.681781 Clearing out pending MCEs
534 12:28:58.682416 Setting up local APIC...
535 12:28:58.684995
536 12:28:58.685619 Clearing out pending MCEs
537 12:28:58.687820 Setting up local APIC...
538 12:28:58.691843 apic_id: 0x03 done.
539 12:28:58.692423 Setting up local APIC...
540 12:28:58.694503 Initializing CPU #4
541 12:28:58.698224 Initializing CPU #5
542 12:28:58.701667 CPU: vendor Intel device 806c1
543 12:28:58.704937 CPU: family 06, model 8c, stepping 01
544 12:28:58.705431 apic_id: 0x06 done.
545 12:28:58.708086 CPU: vendor Intel device 806c1
546 12:28:58.712223 CPU: family 06, model 8c, stepping 01
547 12:28:58.715134 Clearing out pending MCEs
548 12:28:58.718394 Clearing out pending MCEs
549 12:28:58.721628 Setting up local APIC...
550 12:28:58.722208 apic_id: 0x02 done.
551 12:28:58.728183 microcode: Update skipped, already up-to-date
552 12:28:58.731621 microcode: Update skipped, already up-to-date
553 12:28:58.734831 CPU #2 initialized
554 12:28:58.735322 CPU #6 initialized
555 12:28:58.741457 microcode: Update skipped, already up-to-date
556 12:28:58.741985 Setting up local APIC...
557 12:28:58.745449
558 12:28:58.746082 CPU: vendor Intel device 806c1
559 12:28:58.752161 CPU: family 06, model 8c, stepping 01
560 12:28:58.752752 Clearing out pending MCEs
561 12:28:58.754631 apic_id: 0x05 done.
562 12:28:58.757814 Setting up local APIC...
563 12:28:58.758300 apic_id: 0x07 done.
564 12:28:58.761575 CPU #7 initialized
565 12:28:58.764787 microcode: Update skipped, already up-to-date
566 12:28:58.771266 microcode: Update skipped, already up-to-date
567 12:28:58.771871 apic_id: 0x04 done.
568 12:28:58.774212
569 12:28:58.774699 CPU #4 initialized
570 12:28:58.777781 microcode: Update skipped, already up-to-date
571 12:28:58.781876 Setting up local APIC...
572 12:28:58.784303 CPU #3 initialized
573 12:28:58.784889 CPU #5 initialized
574 12:28:58.787576 apic_id: 0x01 done.
575 12:28:58.790941 microcode: Update skipped, already up-to-date
576 12:28:58.794794 CPU #1 initialized
577 12:28:58.797818 bsp_do_flight_plan done after 468 msecs.
578 12:28:58.801150 CPU: frequency set to 4400 MHz
579 12:28:58.804248 Enabling SMIs.
580 12:28:58.810910 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
581 12:28:58.826199 SATAXPCIE1 indicates PCIe NVMe is present
582 12:28:58.829041 Probing TPM: done!
583 12:28:58.832321 Connected to device vid:did:rid of 1ae0:0028:00
584 12:28:58.843598 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
585 12:28:58.847113 Initialized TPM device CR50 revision 0
586 12:28:58.850319 Enabling S0i3.4
587 12:28:58.856411 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
588 12:28:58.859882 Found a VBT of 8704 bytes after decompression
589 12:28:58.866164 cse_lite: CSE RO boot. HybridStorageMode disabled
590 12:28:58.872934 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
591 12:28:58.948180 FSPS returned 0
592 12:28:58.951442 Executing Phase 1 of FspMultiPhaseSiInit
593 12:28:58.961527 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
594 12:28:58.964420 port C0 DISC req: usage 1 usb3 1 usb2 5
595 12:28:58.968394 Raw Buffer output 0 00000511
596 12:28:58.971652 Raw Buffer output 1 00000000
597 12:28:58.975075 pmc_send_ipc_cmd succeeded
598 12:28:58.978727 port C1 DISC req: usage 1 usb3 2 usb2 3
599 12:28:58.981608
600 12:28:58.982197 Raw Buffer output 0 00000321
601 12:28:58.985090 Raw Buffer output 1 00000000
602 12:28:58.989136 pmc_send_ipc_cmd succeeded
603 12:28:58.994124 Detected 4 core, 8 thread CPU.
604 12:28:58.997514 Detected 4 core, 8 thread CPU.
605 12:28:59.197578 Display FSP Version Info HOB
606 12:28:59.201015 Reference Code - CPU = a.0.4c.31
607 12:28:59.204321 uCode Version = 0.0.0.86
608 12:28:59.207341 TXT ACM version = ff.ff.ff.ffff
609 12:28:59.210593 Reference Code - ME = a.0.4c.31
610 12:28:59.213820 MEBx version = 0.0.0.0
611 12:28:59.216962 ME Firmware Version = Consumer SKU
612 12:28:59.220619 Reference Code - PCH = a.0.4c.31
613 12:28:59.223894 PCH-CRID Status = Disabled
614 12:28:59.226915 PCH-CRID Original Value = ff.ff.ff.ffff
615 12:28:59.230764 PCH-CRID New Value = ff.ff.ff.ffff
616 12:28:59.233612 OPROM - RST - RAID = ff.ff.ff.ffff
617 12:28:59.237052 PCH Hsio Version = 4.0.0.0
618 12:28:59.240454 Reference Code - SA - System Agent = a.0.4c.31
619 12:28:59.243508 Reference Code - MRC = 2.0.0.1
620 12:28:59.246969 SA - PCIe Version = a.0.4c.31
621 12:28:59.250193 SA-CRID Status = Disabled
622 12:28:59.253833 SA-CRID Original Value = 0.0.0.1
623 12:28:59.257474 SA-CRID New Value = 0.0.0.1
624 12:28:59.260054 OPROM - VBIOS = ff.ff.ff.ffff
625 12:28:59.263663 IO Manageability Engine FW Version = 11.1.4.0
626 12:28:59.266710 PHY Build Version = 0.0.0.e0
627 12:28:59.269915 Thunderbolt(TM) FW Version = 0.0.0.0
628 12:28:59.277206 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 12:28:59.280756 ITSS IRQ Polarities Before:
630 12:28:59.281364 IPC0: 0xffffffff
631 12:28:59.284347 IPC1: 0xffffffff
632 12:28:59.284924 IPC2: 0xffffffff
633 12:28:59.287651 IPC3: 0xffffffff
634 12:28:59.290699 ITSS IRQ Polarities After:
635 12:28:59.291181 IPC0: 0xffffffff
636 12:28:59.293811 IPC1: 0xffffffff
637 12:28:59.294293 IPC2: 0xffffffff
638 12:28:59.297456 IPC3: 0xffffffff
639 12:28:59.300658 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 12:28:59.313944 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 12:28:59.323590 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 12:28:59.336699 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 12:28:59.343346 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
644 12:28:59.343850 Enumerating buses...
645 12:28:59.350166 Show all devs... Before device enumeration.
646 12:28:59.350809 Root Device: enabled 1
647 12:28:59.353244 DOMAIN: 0000: enabled 1
648 12:28:59.356715 CPU_CLUSTER: 0: enabled 1
649 12:28:59.360205 PCI: 00:00.0: enabled 1
650 12:28:59.360810 PCI: 00:02.0: enabled 1
651 12:28:59.364199 PCI: 00:04.0: enabled 1
652 12:28:59.366660 PCI: 00:05.0: enabled 1
653 12:28:59.370269 PCI: 00:06.0: enabled 0
654 12:28:59.370854 PCI: 00:07.0: enabled 0
655 12:28:59.374357 PCI: 00:07.1: enabled 0
656 12:28:59.376607 PCI: 00:07.2: enabled 0
657 12:28:59.379988 PCI: 00:07.3: enabled 0
658 12:28:59.380462 PCI: 00:08.0: enabled 1
659 12:28:59.383334 PCI: 00:09.0: enabled 0
660 12:28:59.386323 PCI: 00:0a.0: enabled 0
661 12:28:59.390365 PCI: 00:0d.0: enabled 1
662 12:28:59.391006 PCI: 00:0d.1: enabled 0
663 12:28:59.393005 PCI: 00:0d.2: enabled 0
664 12:28:59.396581 PCI: 00:0d.3: enabled 0
665 12:28:59.400300 PCI: 00:0e.0: enabled 0
666 12:28:59.400871 PCI: 00:10.2: enabled 1
667 12:28:59.403102 PCI: 00:10.6: enabled 0
668 12:28:59.406642 PCI: 00:10.7: enabled 0
669 12:28:59.407221 PCI: 00:12.0: enabled 0
670 12:28:59.410254
671 12:28:59.410835 PCI: 00:12.6: enabled 0
672 12:28:59.413073 PCI: 00:13.0: enabled 0
673 12:28:59.416133 PCI: 00:14.0: enabled 1
674 12:28:59.416606 PCI: 00:14.1: enabled 0
675 12:28:59.419410 PCI: 00:14.2: enabled 1
676 12:28:59.423208 PCI: 00:14.3: enabled 1
677 12:28:59.425992 PCI: 00:15.0: enabled 1
678 12:28:59.426463 PCI: 00:15.1: enabled 1
679 12:28:59.429597 PCI: 00:15.2: enabled 1
680 12:28:59.432680 PCI: 00:15.3: enabled 1
681 12:28:59.436208 PCI: 00:16.0: enabled 1
682 12:28:59.436683 PCI: 00:16.1: enabled 0
683 12:28:59.439533 PCI: 00:16.2: enabled 0
684 12:28:59.442696 PCI: 00:16.3: enabled 0
685 12:28:59.445935 PCI: 00:16.4: enabled 0
686 12:28:59.446415 PCI: 00:16.5: enabled 0
687 12:28:59.449809 PCI: 00:17.0: enabled 1
688 12:28:59.452642 PCI: 00:19.0: enabled 0
689 12:28:59.455776 PCI: 00:19.1: enabled 1
690 12:28:59.456251 PCI: 00:19.2: enabled 0
691 12:28:59.459168 PCI: 00:1c.0: enabled 1
692 12:28:59.462251 PCI: 00:1c.1: enabled 0
693 12:28:59.465859 PCI: 00:1c.2: enabled 0
694 12:28:59.466441 PCI: 00:1c.3: enabled 0
695 12:28:59.469547 PCI: 00:1c.4: enabled 0
696 12:28:59.472590 PCI: 00:1c.5: enabled 0
697 12:28:59.473204 PCI: 00:1c.6: enabled 1
698 12:28:59.476030 PCI: 00:1c.7: enabled 0
699 12:28:59.479236 PCI: 00:1d.0: enabled 1
700 12:28:59.482421 PCI: 00:1d.1: enabled 0
701 12:28:59.483000 PCI: 00:1d.2: enabled 1
702 12:28:59.485739 PCI: 00:1d.3: enabled 0
703 12:28:59.488995 PCI: 00:1e.0: enabled 1
704 12:28:59.492277 PCI: 00:1e.1: enabled 0
705 12:28:59.492862 PCI: 00:1e.2: enabled 1
706 12:28:59.496141 PCI: 00:1e.3: enabled 1
707 12:28:59.498993 PCI: 00:1f.0: enabled 1
708 12:28:59.502669 PCI: 00:1f.1: enabled 0
709 12:28:59.503251 PCI: 00:1f.2: enabled 1
710 12:28:59.505807 PCI: 00:1f.3: enabled 1
711 12:28:59.508682 PCI: 00:1f.4: enabled 0
712 12:28:59.512496 PCI: 00:1f.5: enabled 1
713 12:28:59.513074 PCI: 00:1f.6: enabled 0
714 12:28:59.515658 PCI: 00:1f.7: enabled 0
715 12:28:59.518750 APIC: 00: enabled 1
716 12:28:59.519337 GENERIC: 0.0: enabled 1
717 12:28:59.522000 GENERIC: 0.0: enabled 1
718 12:28:59.525458 GENERIC: 1.0: enabled 1
719 12:28:59.528444 GENERIC: 0.0: enabled 1
720 12:28:59.528917 GENERIC: 1.0: enabled 1
721 12:28:59.531717 USB0 port 0: enabled 1
722 12:28:59.534981 GENERIC: 0.0: enabled 1
723 12:28:59.538788 USB0 port 0: enabled 1
724 12:28:59.539264 GENERIC: 0.0: enabled 1
725 12:28:59.542035 I2C: 00:1a: enabled 1
726 12:28:59.545196 I2C: 00:31: enabled 1
727 12:28:59.545707 I2C: 00:32: enabled 1
728 12:28:59.548641 I2C: 00:10: enabled 1
729 12:28:59.551569 I2C: 00:15: enabled 1
730 12:28:59.552045 GENERIC: 0.0: enabled 0
731 12:28:59.555230 GENERIC: 1.0: enabled 0
732 12:28:59.558350 GENERIC: 0.0: enabled 1
733 12:28:59.558928 SPI: 00: enabled 1
734 12:28:59.561335 SPI: 00: enabled 1
735 12:28:59.564965 PNP: 0c09.0: enabled 1
736 12:28:59.565588 GENERIC: 0.0: enabled 1
737 12:28:59.568514
738 12:28:59.569000 USB3 port 0: enabled 1
739 12:28:59.571719 USB3 port 1: enabled 1
740 12:28:59.575283 USB3 port 2: enabled 0
741 12:28:59.575864 USB3 port 3: enabled 0
742 12:28:59.578313 USB2 port 0: enabled 0
743 12:28:59.581382 USB2 port 1: enabled 1
744 12:28:59.581994 USB2 port 2: enabled 1
745 12:28:59.584539
746 12:28:59.585018 USB2 port 3: enabled 0
747 12:28:59.587823 USB2 port 4: enabled 1
748 12:28:59.591237 USB2 port 5: enabled 0
749 12:28:59.591833 USB2 port 6: enabled 0
750 12:28:59.594719 USB2 port 7: enabled 0
751 12:28:59.598175 USB2 port 8: enabled 0
752 12:28:59.598766 USB2 port 9: enabled 0
753 12:28:59.601395 USB3 port 0: enabled 0
754 12:28:59.604904 USB3 port 1: enabled 1
755 12:28:59.607817 USB3 port 2: enabled 0
756 12:28:59.608417 USB3 port 3: enabled 0
757 12:28:59.611156 GENERIC: 0.0: enabled 1
758 12:28:59.614378 GENERIC: 1.0: enabled 1
759 12:28:59.614973 APIC: 01: enabled 1
760 12:28:59.617576 APIC: 03: enabled 1
761 12:28:59.620869 APIC: 07: enabled 1
762 12:28:59.621462 APIC: 05: enabled 1
763 12:28:59.624185 APIC: 04: enabled 1
764 12:28:59.624775 APIC: 02: enabled 1
765 12:28:59.627914
766 12:28:59.628605 APIC: 06: enabled 1
767 12:28:59.630831 Compare with tree...
768 12:28:59.631318 Root Device: enabled 1
769 12:28:59.633881 DOMAIN: 0000: enabled 1
770 12:28:59.637425 PCI: 00:00.0: enabled 1
771 12:28:59.640572 PCI: 00:02.0: enabled 1
772 12:28:59.644116 PCI: 00:04.0: enabled 1
773 12:28:59.644715 GENERIC: 0.0: enabled 1
774 12:28:59.647116 PCI: 00:05.0: enabled 1
775 12:28:59.650800 PCI: 00:06.0: enabled 0
776 12:28:59.653901 PCI: 00:07.0: enabled 0
777 12:28:59.657543 GENERIC: 0.0: enabled 1
778 12:28:59.658154 PCI: 00:07.1: enabled 0
779 12:28:59.660390
780 12:28:59.660917 GENERIC: 1.0: enabled 1
781 12:28:59.664161 PCI: 00:07.2: enabled 0
782 12:28:59.667039 GENERIC: 0.0: enabled 1
783 12:28:59.670689 PCI: 00:07.3: enabled 0
784 12:28:59.673842 GENERIC: 1.0: enabled 1
785 12:28:59.674425 PCI: 00:08.0: enabled 1
786 12:28:59.677651 PCI: 00:09.0: enabled 0
787 12:28:59.680298 PCI: 00:0a.0: enabled 0
788 12:28:59.684046 PCI: 00:0d.0: enabled 1
789 12:28:59.686929 USB0 port 0: enabled 1
790 12:28:59.687411 USB3 port 0: enabled 1
791 12:28:59.690281 USB3 port 1: enabled 1
792 12:28:59.693672 USB3 port 2: enabled 0
793 12:28:59.696959 USB3 port 3: enabled 0
794 12:28:59.700574 PCI: 00:0d.1: enabled 0
795 12:28:59.701158 PCI: 00:0d.2: enabled 0
796 12:28:59.703700
797 12:28:59.704277 GENERIC: 0.0: enabled 1
798 12:28:59.707164 PCI: 00:0d.3: enabled 0
799 12:28:59.710339 PCI: 00:0e.0: enabled 0
800 12:28:59.713817 PCI: 00:10.2: enabled 1
801 12:28:59.714486 PCI: 00:10.6: enabled 0
802 12:28:59.717168 PCI: 00:10.7: enabled 0
803 12:28:59.720202 PCI: 00:12.0: enabled 0
804 12:28:59.723930 PCI: 00:12.6: enabled 0
805 12:28:59.726659 PCI: 00:13.0: enabled 0
806 12:28:59.727149 PCI: 00:14.0: enabled 1
807 12:28:59.730094 USB0 port 0: enabled 1
808 12:28:59.733049 USB2 port 0: enabled 0
809 12:28:59.736307 USB2 port 1: enabled 1
810 12:28:59.739980 USB2 port 2: enabled 1
811 12:28:59.742881 USB2 port 3: enabled 0
812 12:28:59.743373 USB2 port 4: enabled 1
813 12:28:59.746774 USB2 port 5: enabled 0
814 12:28:59.749783 USB2 port 6: enabled 0
815 12:28:59.753199 USB2 port 7: enabled 0
816 12:28:59.756261 USB2 port 8: enabled 0
817 12:28:59.759980 USB2 port 9: enabled 0
818 12:28:59.760466 USB3 port 0: enabled 0
819 12:28:59.762633 USB3 port 1: enabled 1
820 12:28:59.766004 USB3 port 2: enabled 0
821 12:28:59.769615 USB3 port 3: enabled 0
822 12:28:59.773756 PCI: 00:14.1: enabled 0
823 12:28:59.774347 PCI: 00:14.2: enabled 1
824 12:28:59.776163
825 12:28:59.776753 PCI: 00:14.3: enabled 1
826 12:28:59.779586 GENERIC: 0.0: enabled 1
827 12:28:59.783323 PCI: 00:15.0: enabled 1
828 12:28:59.786219 I2C: 00:1a: enabled 1
829 12:28:59.786812 I2C: 00:31: enabled 1
830 12:28:59.789218 I2C: 00:32: enabled 1
831 12:28:59.793031 PCI: 00:15.1: enabled 1
832 12:28:59.796341 I2C: 00:10: enabled 1
833 12:28:59.799055 PCI: 00:15.2: enabled 1
834 12:28:59.799645 PCI: 00:15.3: enabled 1
835 12:28:59.803476 PCI: 00:16.0: enabled 1
836 12:28:59.805676 PCI: 00:16.1: enabled 0
837 12:28:59.809107 PCI: 00:16.2: enabled 0
838 12:28:59.812705 PCI: 00:16.3: enabled 0
839 12:28:59.813297 PCI: 00:16.4: enabled 0
840 12:28:59.815627 PCI: 00:16.5: enabled 0
841 12:28:59.819074 PCI: 00:17.0: enabled 1
842 12:28:59.822031 PCI: 00:19.0: enabled 0
843 12:28:59.825914 PCI: 00:19.1: enabled 1
844 12:28:59.826505 I2C: 00:15: enabled 1
845 12:28:59.829000 PCI: 00:19.2: enabled 0
846 12:28:59.832377 PCI: 00:1d.0: enabled 1
847 12:28:59.835340 GENERIC: 0.0: enabled 1
848 12:28:59.838959 PCI: 00:1e.0: enabled 1
849 12:28:59.839434 PCI: 00:1e.1: enabled 0
850 12:28:59.842652 PCI: 00:1e.2: enabled 1
851 12:28:59.845319 SPI: 00: enabled 1
852 12:28:59.849138 PCI: 00:1e.3: enabled 1
853 12:28:59.849771 SPI: 00: enabled 1
854 12:28:59.852009 PCI: 00:1f.0: enabled 1
855 12:28:59.855593 PNP: 0c09.0: enabled 1
856 12:28:59.858475 PCI: 00:1f.1: enabled 0
857 12:28:59.858956 PCI: 00:1f.2: enabled 1
858 12:28:59.862175
859 12:28:59.862697 GENERIC: 0.0: enabled 1
860 12:28:59.865239 GENERIC: 0.0: enabled 1
861 12:28:59.868555 GENERIC: 1.0: enabled 1
862 12:28:59.872011 PCI: 00:1f.3: enabled 1
863 12:28:59.875258 PCI: 00:1f.4: enabled 0
864 12:28:59.875875 PCI: 00:1f.5: enabled 1
865 12:28:59.914340 PCI: 00:1f.6: enabled 0
866 12:28:59.915054 PCI: 00:1f.7: enabled 0
867 12:28:59.915441 CPU_CLUSTER: 0: enabled 1
868 12:28:59.915796 APIC: 00: enabled 1
869 12:28:59.916135 APIC: 01: enabled 1
870 12:28:59.916874 APIC: 03: enabled 1
871 12:28:59.917250 APIC: 07: enabled 1
872 12:28:59.917625 APIC: 05: enabled 1
873 12:28:59.917961 APIC: 04: enabled 1
874 12:28:59.918309 APIC: 02: enabled 1
875 12:28:59.918625 APIC: 06: enabled 1
876 12:28:59.918937 Root Device scanning...
877 12:28:59.919247 scan_static_bus for Root Device
878 12:28:59.919557 DOMAIN: 0000 enabled
879 12:28:59.919865 CPU_CLUSTER: 0 enabled
880 12:28:59.920524 DOMAIN: 0000 scanning...
881 12:28:59.920867 PCI: pci_scan_bus for bus 00
882 12:28:59.921783 PCI: 00:00.0 [8086/0000] ops
883 12:28:59.925238 PCI: 00:00.0 [8086/9a12] enabled
884 12:28:59.928485 PCI: 00:02.0 [8086/0000] bus ops
885 12:28:59.931805 PCI: 00:02.0 [8086/9a40] enabled
886 12:28:59.935416 PCI: 00:04.0 [8086/0000] bus ops
887 12:28:59.938399 PCI: 00:04.0 [8086/9a03] enabled
888 12:28:59.941681 PCI: 00:05.0 [8086/9a19] enabled
889 12:28:59.945738 PCI: 00:07.0 [0000/0000] hidden
890 12:28:59.949394 PCI: 00:08.0 [8086/9a11] enabled
891 12:28:59.953600 PCI: 00:0a.0 [8086/9a0d] disabled
892 12:28:59.956457 PCI: 00:0d.0 [8086/0000] bus ops
893 12:28:59.960215 PCI: 00:0d.0 [8086/9a13] enabled
894 12:28:59.963403 PCI: 00:14.0 [8086/0000] bus ops
895 12:28:59.966152 PCI: 00:14.0 [8086/a0ed] enabled
896 12:28:59.970120 PCI: 00:14.2 [8086/a0ef] enabled
897 12:28:59.972949 PCI: 00:14.3 [8086/0000] bus ops
898 12:28:59.976125 PCI: 00:14.3 [8086/a0f0] enabled
899 12:28:59.980033 PCI: 00:15.0 [8086/0000] bus ops
900 12:28:59.983538 PCI: 00:15.0 [8086/a0e8] enabled
901 12:28:59.986233 PCI: 00:15.1 [8086/0000] bus ops
902 12:28:59.990162 PCI: 00:15.1 [8086/a0e9] enabled
903 12:28:59.992914 PCI: 00:15.2 [8086/0000] bus ops
904 12:28:59.996201 PCI: 00:15.2 [8086/a0ea] enabled
905 12:28:59.999457 PCI: 00:15.3 [8086/0000] bus ops
906 12:29:00.002763 PCI: 00:15.3 [8086/a0eb] enabled
907 12:29:00.006254 PCI: 00:16.0 [8086/0000] ops
908 12:29:00.008980 PCI: 00:16.0 [8086/a0e0] enabled
909 12:29:00.016226 PCI: Static device PCI: 00:17.0 not found, disabling it.
910 12:29:00.019202 PCI: 00:19.0 [8086/0000] bus ops
911 12:29:00.022294 PCI: 00:19.0 [8086/a0c5] disabled
912 12:29:00.025774 PCI: 00:19.1 [8086/0000] bus ops
913 12:29:00.029294 PCI: 00:19.1 [8086/a0c6] enabled
914 12:29:00.032322 PCI: 00:1d.0 [8086/0000] bus ops
915 12:29:00.035752 PCI: 00:1d.0 [8086/a0b0] enabled
916 12:29:00.039584 PCI: 00:1e.0 [8086/0000] ops
917 12:29:00.042165 PCI: 00:1e.0 [8086/a0a8] enabled
918 12:29:00.045400 PCI: 00:1e.2 [8086/0000] bus ops
919 12:29:00.048519 PCI: 00:1e.2 [8086/a0aa] enabled
920 12:29:00.051915 PCI: 00:1e.3 [8086/0000] bus ops
921 12:29:00.055503 PCI: 00:1e.3 [8086/a0ab] enabled
922 12:29:00.058543 PCI: 00:1f.0 [8086/0000] bus ops
923 12:29:00.061879 PCI: 00:1f.0 [8086/a087] enabled
924 12:29:00.062656 RTC Init
925 12:29:00.065162 Set power on after power failure.
926 12:29:00.068496 Disabling Deep S3
927 12:29:00.068990 Disabling Deep S3
928 12:29:00.071705 Disabling Deep S4
929 12:29:00.074947 Disabling Deep S4
930 12:29:00.075423 Disabling Deep S5
931 12:29:00.078511 Disabling Deep S5
932 12:29:00.081969 PCI: 00:1f.2 [0000/0000] hidden
933 12:29:00.085382 PCI: 00:1f.3 [8086/0000] bus ops
934 12:29:00.089354 PCI: 00:1f.3 [8086/a0c8] enabled
935 12:29:00.091559 PCI: 00:1f.5 [8086/0000] bus ops
936 12:29:00.094737 PCI: 00:1f.5 [8086/a0a4] enabled
937 12:29:00.098383 PCI: Leftover static devices:
938 12:29:00.098968 PCI: 00:10.2
939 12:29:00.099351 PCI: 00:10.6
940 12:29:00.101607 PCI: 00:10.7
941 12:29:00.102085 PCI: 00:06.0
942 12:29:00.105254 PCI: 00:07.1
943 12:29:00.105877 PCI: 00:07.2
944 12:29:00.108269 PCI: 00:07.3
945 12:29:00.108848 PCI: 00:09.0
946 12:29:00.109223 PCI: 00:0d.1
947 12:29:00.111482 PCI: 00:0d.2
948 12:29:00.112061 PCI: 00:0d.3
949 12:29:00.114738 PCI: 00:0e.0
950 12:29:00.115276 PCI: 00:12.0
951 12:29:00.115655 PCI: 00:12.6
952 12:29:00.118392 PCI: 00:13.0
953 12:29:00.118977 PCI: 00:14.1
954 12:29:00.121542 PCI: 00:16.1
955 12:29:00.122126 PCI: 00:16.2
956 12:29:00.124801 PCI: 00:16.3
957 12:29:00.125381 PCI: 00:16.4
958 12:29:00.125794 PCI: 00:16.5
959 12:29:00.127939 PCI: 00:17.0
960 12:29:00.128519 PCI: 00:19.2
961 12:29:00.131297 PCI: 00:1e.1
962 12:29:00.131784 PCI: 00:1f.1
963 12:29:00.132158 PCI: 00:1f.4
964 12:29:00.134527 PCI: 00:1f.6
965 12:29:00.135027 PCI: 00:1f.7
966 12:29:00.137995 PCI: Check your devicetree.cb.
967 12:29:00.141308 PCI: 00:02.0 scanning...
968 12:29:00.144530 scan_generic_bus for PCI: 00:02.0
969 12:29:00.147462 scan_generic_bus for PCI: 00:02.0 done
970 12:29:00.154148 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
971 12:29:00.154748 PCI: 00:04.0 scanning...
972 12:29:00.158142 scan_generic_bus for PCI: 00:04.0
973 12:29:00.161298
974 12:29:00.161910 GENERIC: 0.0 enabled
975 12:29:00.167605 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
976 12:29:00.171010 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
977 12:29:00.174388 PCI: 00:0d.0 scanning...
978 12:29:00.177746 scan_static_bus for PCI: 00:0d.0
979 12:29:00.181013 USB0 port 0 enabled
980 12:29:00.184674 USB0 port 0 scanning...
981 12:29:00.187467 scan_static_bus for USB0 port 0
982 12:29:00.188046 USB3 port 0 enabled
983 12:29:00.191202 USB3 port 1 enabled
984 12:29:00.194401 USB3 port 2 disabled
985 12:29:00.195011 USB3 port 3 disabled
986 12:29:00.197610 USB3 port 0 scanning...
987 12:29:00.200940 scan_static_bus for USB3 port 0
988 12:29:00.204307 scan_static_bus for USB3 port 0 done
989 12:29:00.207963 scan_bus: bus USB3 port 0 finished in 6 msecs
990 12:29:00.210991
991 12:29:00.211576 USB3 port 1 scanning...
992 12:29:00.214037 scan_static_bus for USB3 port 1
993 12:29:00.217562 scan_static_bus for USB3 port 1 done
994 12:29:00.224186 scan_bus: bus USB3 port 1 finished in 6 msecs
995 12:29:00.227275 scan_static_bus for USB0 port 0 done
996 12:29:00.230588 scan_bus: bus USB0 port 0 finished in 43 msecs
997 12:29:00.233843 scan_static_bus for PCI: 00:0d.0 done
998 12:29:00.240467 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
999 12:29:00.243940 PCI: 00:14.0 scanning...
1000 12:29:00.246952 scan_static_bus for PCI: 00:14.0
1001 12:29:00.247458 USB0 port 0 enabled
1002 12:29:00.249974 USB0 port 0 scanning...
1003 12:29:00.253698 scan_static_bus for USB0 port 0
1004 12:29:00.257121 USB2 port 0 disabled
1005 12:29:00.257774 USB2 port 1 enabled
1006 12:29:00.260382 USB2 port 2 enabled
1007 12:29:00.263818 USB2 port 3 disabled
1008 12:29:00.264291 USB2 port 4 enabled
1009 12:29:00.266873 USB2 port 5 disabled
1010 12:29:00.270004 USB2 port 6 disabled
1011 12:29:00.270487 USB2 port 7 disabled
1012 12:29:00.273674 USB2 port 8 disabled
1013 12:29:00.276723 USB2 port 9 disabled
1014 12:29:00.277231 USB3 port 0 disabled
1015 12:29:00.279795 USB3 port 1 enabled
1016 12:29:00.283320 USB3 port 2 disabled
1017 12:29:00.284061 USB3 port 3 disabled
1018 12:29:00.287553 USB2 port 1 scanning...
1019 12:29:00.290257 scan_static_bus for USB2 port 1
1020 12:29:00.293418 scan_static_bus for USB2 port 1 done
1021 12:29:00.296659 scan_bus: bus USB2 port 1 finished in 6 msecs
1022 12:29:00.300004 USB2 port 2 scanning...
1023 12:29:00.303226 scan_static_bus for USB2 port 2
1024 12:29:00.306399 scan_static_bus for USB2 port 2 done
1025 12:29:00.313232 scan_bus: bus USB2 port 2 finished in 6 msecs
1026 12:29:00.313857 USB2 port 4 scanning...
1027 12:29:00.316691 scan_static_bus for USB2 port 4
1028 12:29:00.323400 scan_static_bus for USB2 port 4 done
1029 12:29:00.326808 scan_bus: bus USB2 port 4 finished in 6 msecs
1030 12:29:00.330011 USB3 port 1 scanning...
1031 12:29:00.333349 scan_static_bus for USB3 port 1
1032 12:29:00.336990 scan_static_bus for USB3 port 1 done
1033 12:29:00.339747 scan_bus: bus USB3 port 1 finished in 6 msecs
1034 12:29:00.343228 scan_static_bus for USB0 port 0 done
1035 12:29:00.349823 scan_bus: bus USB0 port 0 finished in 93 msecs
1036 12:29:00.352965 scan_static_bus for PCI: 00:14.0 done
1037 12:29:00.356853 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1038 12:29:00.359901 PCI: 00:14.3 scanning...
1039 12:29:00.362953 scan_static_bus for PCI: 00:14.3
1040 12:29:00.366102 GENERIC: 0.0 enabled
1041 12:29:00.369838 scan_static_bus for PCI: 00:14.3 done
1042 12:29:00.373599 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1043 12:29:00.376421 PCI: 00:15.0 scanning...
1044 12:29:00.379305 scan_static_bus for PCI: 00:15.0
1045 12:29:00.382705 I2C: 00:1a enabled
1046 12:29:00.386089 I2C: 00:31 enabled
1047 12:29:00.386613 I2C: 00:32 enabled
1048 12:29:00.389318 scan_static_bus for PCI: 00:15.0 done
1049 12:29:00.395809 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1050 12:29:00.396404 PCI: 00:15.1 scanning...
1051 12:29:00.399746
1052 12:29:00.402235 scan_static_bus for PCI: 00:15.1
1053 12:29:00.402712 I2C: 00:10 enabled
1054 12:29:00.405951 scan_static_bus for PCI: 00:15.1 done
1055 12:29:00.412527 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1056 12:29:00.415501 PCI: 00:15.2 scanning...
1057 12:29:00.419042 scan_static_bus for PCI: 00:15.2
1058 12:29:00.422639 scan_static_bus for PCI: 00:15.2 done
1059 12:29:00.426011 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1060 12:29:00.429139 PCI: 00:15.3 scanning...
1061 12:29:00.432120 scan_static_bus for PCI: 00:15.3
1062 12:29:00.435311 scan_static_bus for PCI: 00:15.3 done
1063 12:29:00.441630 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1064 12:29:00.442223 PCI: 00:19.1 scanning...
1065 12:29:00.445543 scan_static_bus for PCI: 00:19.1
1066 12:29:00.448488 I2C: 00:15 enabled
1067 12:29:00.452333 scan_static_bus for PCI: 00:19.1 done
1068 12:29:00.458693 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1069 12:29:00.459262 PCI: 00:1d.0 scanning...
1070 12:29:00.465094 do_pci_scan_bridge for PCI: 00:1d.0
1071 12:29:00.465613 PCI: pci_scan_bus for bus 01
1072 12:29:00.469192 PCI: 01:00.0 [15b7/5009] enabled
1073 12:29:00.471807 GENERIC: 0.0 enabled
1074 12:29:00.475515 Enabling Common Clock Configuration
1075 12:29:00.481865 L1 Sub-State supported from root port 29
1076 12:29:00.482460 L1 Sub-State Support = 0x5
1077 12:29:00.485005 CommonModeRestoreTime = 0x28
1078 12:29:00.491653 Power On Value = 0x16, Power On Scale = 0x0
1079 12:29:00.492230 ASPM: Enabled L1
1080 12:29:00.494781 PCIe: Max_Payload_Size adjusted to 128
1081 12:29:00.502028 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1082 12:29:00.504742 PCI: 00:1e.2 scanning...
1083 12:29:00.507999 scan_generic_bus for PCI: 00:1e.2
1084 12:29:00.508597 SPI: 00 enabled
1085 12:29:00.514796 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1086 12:29:00.518023 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1087 12:29:00.521280 PCI: 00:1e.3 scanning...
1088 12:29:00.524370 scan_generic_bus for PCI: 00:1e.3
1089 12:29:00.528082 SPI: 00 enabled
1090 12:29:00.534921 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1091 12:29:00.538192 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1092 12:29:00.541744 PCI: 00:1f.0 scanning...
1093 12:29:00.545531 scan_static_bus for PCI: 00:1f.0
1094 12:29:00.546116 PNP: 0c09.0 enabled
1095 12:29:00.548246 PNP: 0c09.0 scanning...
1096 12:29:00.551602 scan_static_bus for PNP: 0c09.0
1097 12:29:00.554841 scan_static_bus for PNP: 0c09.0 done
1098 12:29:00.561311 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1099 12:29:00.564746 scan_static_bus for PCI: 00:1f.0 done
1100 12:29:00.568448 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1101 12:29:00.571535 PCI: 00:1f.2 scanning...
1102 12:29:00.575017 scan_static_bus for PCI: 00:1f.2
1103 12:29:00.578040 GENERIC: 0.0 enabled
1104 12:29:00.581682 GENERIC: 0.0 scanning...
1105 12:29:00.584718 scan_static_bus for GENERIC: 0.0
1106 12:29:00.585336 GENERIC: 0.0 enabled
1107 12:29:00.587709 GENERIC: 1.0 enabled
1108 12:29:00.591255 scan_static_bus for GENERIC: 0.0 done
1109 12:29:00.597954 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1110 12:29:00.601360 scan_static_bus for PCI: 00:1f.2 done
1111 12:29:00.604855 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1112 12:29:00.607571 PCI: 00:1f.3 scanning...
1113 12:29:00.611532 scan_static_bus for PCI: 00:1f.3
1114 12:29:00.614357 scan_static_bus for PCI: 00:1f.3 done
1115 12:29:00.621978 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1116 12:29:00.622562 PCI: 00:1f.5 scanning...
1117 12:29:00.624457 scan_generic_bus for PCI: 00:1f.5
1118 12:29:00.631872 scan_generic_bus for PCI: 00:1f.5 done
1119 12:29:00.634072 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1120 12:29:00.640782 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1121 12:29:00.643946 scan_static_bus for Root Device done
1122 12:29:00.647296 scan_bus: bus Root Device finished in 736 msecs
1123 12:29:00.647894 done
1124 12:29:00.654013 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1125 12:29:00.657167 Chrome EC: UHEPI supported
1126 12:29:00.663826 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1127 12:29:00.670460 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1128 12:29:00.674327 SPI flash protection: WPSW=0 SRP0=1
1129 12:29:00.677372 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1130 12:29:00.684223 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1131 12:29:00.686683 found VGA at PCI: 00:02.0
1132 12:29:00.689984 Setting up VGA for PCI: 00:02.0
1133 12:29:00.696725 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1134 12:29:00.700294 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1135 12:29:00.703689 Allocating resources...
1136 12:29:00.704268 Reading resources...
1137 12:29:00.707006
1138 12:29:00.710680 Root Device read_resources bus 0 link: 0
1139 12:29:00.713336 DOMAIN: 0000 read_resources bus 0 link: 0
1140 12:29:00.720159 PCI: 00:04.0 read_resources bus 1 link: 0
1141 12:29:00.723379 PCI: 00:04.0 read_resources bus 1 link: 0 done
1142 12:29:00.730017 PCI: 00:0d.0 read_resources bus 0 link: 0
1143 12:29:00.733312 USB0 port 0 read_resources bus 0 link: 0
1144 12:29:00.739952 USB0 port 0 read_resources bus 0 link: 0 done
1145 12:29:00.743596 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1146 12:29:00.746021 PCI: 00:14.0 read_resources bus 0 link: 0
1147 12:29:00.753131 USB0 port 0 read_resources bus 0 link: 0
1148 12:29:00.756525 USB0 port 0 read_resources bus 0 link: 0 done
1149 12:29:00.763265 PCI: 00:14.0 read_resources bus 0 link: 0 done
1150 12:29:00.766489 PCI: 00:14.3 read_resources bus 0 link: 0
1151 12:29:00.773368 PCI: 00:14.3 read_resources bus 0 link: 0 done
1152 12:29:00.777208 PCI: 00:15.0 read_resources bus 0 link: 0
1153 12:29:00.783428 PCI: 00:15.0 read_resources bus 0 link: 0 done
1154 12:29:00.786478 PCI: 00:15.1 read_resources bus 0 link: 0
1155 12:29:00.793353 PCI: 00:15.1 read_resources bus 0 link: 0 done
1156 12:29:00.796449 PCI: 00:19.1 read_resources bus 0 link: 0
1157 12:29:00.803962 PCI: 00:19.1 read_resources bus 0 link: 0 done
1158 12:29:00.807108 PCI: 00:1d.0 read_resources bus 1 link: 0
1159 12:29:00.813619 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1160 12:29:00.816613 PCI: 00:1e.2 read_resources bus 2 link: 0
1161 12:29:00.823168 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1162 12:29:00.826763 PCI: 00:1e.3 read_resources bus 3 link: 0
1163 12:29:00.833674 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1164 12:29:00.836486 PCI: 00:1f.0 read_resources bus 0 link: 0
1165 12:29:00.844220 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1166 12:29:00.846712 PCI: 00:1f.2 read_resources bus 0 link: 0
1167 12:29:00.849766 GENERIC: 0.0 read_resources bus 0 link: 0
1168 12:29:00.856996 GENERIC: 0.0 read_resources bus 0 link: 0 done
1169 12:29:00.860641 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1170 12:29:00.867255 DOMAIN: 0000 read_resources bus 0 link: 0 done
1171 12:29:00.871030 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1172 12:29:00.877252 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1173 12:29:00.880703 Root Device read_resources bus 0 link: 0 done
1174 12:29:00.884071 Done reading resources.
1175 12:29:00.890257 Show resources in subtree (Root Device)...After reading.
1176 12:29:00.893980 Root Device child on link 0 DOMAIN: 0000
1177 12:29:00.897105 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1178 12:29:00.907384 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1179 12:29:00.917233 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1180 12:29:00.920630 PCI: 00:00.0
1181 12:29:00.930389 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1182 12:29:00.936587 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1183 12:29:00.946784 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1184 12:29:00.956616 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1185 12:29:00.967154 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1186 12:29:00.976567 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1187 12:29:00.987293 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1188 12:29:00.993617 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1189 12:29:01.003589 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1190 12:29:01.013208 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1191 12:29:01.023266 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1192 12:29:01.033131 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1193 12:29:01.043315 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1194 12:29:01.049675 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1195 12:29:01.059491 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1196 12:29:01.069149 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1197 12:29:01.079407 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1198 12:29:01.090204 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1199 12:29:01.099118 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1200 12:29:01.108925 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1201 12:29:01.109525 PCI: 00:02.0
1202 12:29:01.119395 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1203 12:29:01.128844 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1204 12:29:01.139097 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1205 12:29:01.142160 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1206 12:29:01.151776 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1207 12:29:01.155790 GENERIC: 0.0
1208 12:29:01.156386 PCI: 00:05.0
1209 12:29:01.165086 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1210 12:29:01.172012 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1211 12:29:01.172589 GENERIC: 0.0
1212 12:29:01.175237 PCI: 00:08.0
1213 12:29:01.185117 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:29:01.185757 PCI: 00:0a.0
1215 12:29:01.191268 PCI: 00:0d.0 child on link 0 USB0 port 0
1216 12:29:01.201397 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1217 12:29:01.204718 USB0 port 0 child on link 0 USB3 port 0
1218 12:29:01.207864 USB3 port 0
1219 12:29:01.208445 USB3 port 1
1220 12:29:01.211867 USB3 port 2
1221 12:29:01.212447 USB3 port 3
1222 12:29:01.214744 PCI: 00:14.0 child on link 0 USB0 port 0
1223 12:29:01.217671
1224 12:29:01.228675 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1225 12:29:01.231260 USB0 port 0 child on link 0 USB2 port 0
1226 12:29:01.231846 USB2 port 0
1227 12:29:01.234169 USB2 port 1
1228 12:29:01.234647 USB2 port 2
1229 12:29:01.237950 USB2 port 3
1230 12:29:01.241269 USB2 port 4
1231 12:29:01.241787 USB2 port 5
1232 12:29:01.244325 USB2 port 6
1233 12:29:01.244801 USB2 port 7
1234 12:29:01.247667 USB2 port 8
1235 12:29:01.248247 USB2 port 9
1236 12:29:01.251022 USB3 port 0
1237 12:29:01.251601 USB3 port 1
1238 12:29:01.254735 USB3 port 2
1239 12:29:01.255212 USB3 port 3
1240 12:29:01.257677 PCI: 00:14.2
1241 12:29:01.267364 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 12:29:01.277661 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1243 12:29:01.281065 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1244 12:29:01.290813 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 12:29:01.293892 GENERIC: 0.0
1246 12:29:01.297833 PCI: 00:15.0 child on link 0 I2C: 00:1a
1247 12:29:01.307500 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1248 12:29:01.310932 I2C: 00:1a
1249 12:29:01.311516 I2C: 00:31
1250 12:29:01.311892 I2C: 00:32
1251 12:29:01.314055
1252 12:29:01.316930 PCI: 00:15.1 child on link 0 I2C: 00:10
1253 12:29:01.327034 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 12:29:01.327618 I2C: 00:10
1255 12:29:01.330183 PCI: 00:15.2
1256 12:29:01.340419 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:29:01.340994 PCI: 00:15.3
1258 12:29:01.350319 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 12:29:01.353137 PCI: 00:16.0
1260 12:29:01.363022 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 12:29:01.363606 PCI: 00:19.0
1262 12:29:01.370077 PCI: 00:19.1 child on link 0 I2C: 00:15
1263 12:29:01.379697 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 12:29:01.380268 I2C: 00:15
1265 12:29:01.386167 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1266 12:29:01.393064 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1267 12:29:01.402995 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1268 12:29:01.412669 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1269 12:29:01.413254 GENERIC: 0.0
1270 12:29:01.415976 PCI: 01:00.0
1271 12:29:01.425775 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 12:29:01.435658 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1273 12:29:01.436244 PCI: 00:1e.0
1274 12:29:01.438863
1275 12:29:01.449264 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1276 12:29:01.452836 PCI: 00:1e.2 child on link 0 SPI: 00
1277 12:29:01.462179 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1278 12:29:01.465614 SPI: 00
1279 12:29:01.468764 PCI: 00:1e.3 child on link 0 SPI: 00
1280 12:29:01.478284 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1281 12:29:01.478775 SPI: 00
1282 12:29:01.482409 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1283 12:29:01.492165 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1284 12:29:01.495238 PNP: 0c09.0
1285 12:29:01.501512 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1286 12:29:01.507953 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1287 12:29:01.514839 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1288 12:29:01.525170 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1289 12:29:01.531520 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1290 12:29:01.532117 GENERIC: 0.0
1291 12:29:01.534297 GENERIC: 1.0
1292 12:29:01.534781 PCI: 00:1f.3
1293 12:29:01.544961 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1294 12:29:01.554556 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1295 12:29:01.558041 PCI: 00:1f.5
1296 12:29:01.568076 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1297 12:29:01.570802 CPU_CLUSTER: 0 child on link 0 APIC: 00
1298 12:29:01.571281 APIC: 00
1299 12:29:01.574846 APIC: 01
1300 12:29:01.575386 APIC: 03
1301 12:29:01.575794 APIC: 07
1302 12:29:01.577354 APIC: 05
1303 12:29:01.577866 APIC: 04
1304 12:29:01.580912 APIC: 02
1305 12:29:01.581532 APIC: 06
1306 12:29:01.587803 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1307 12:29:01.594232 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1308 12:29:01.600884 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1309 12:29:01.607402 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1310 12:29:01.610489 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1311 12:29:01.614002 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1312 12:29:01.620582 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1313 12:29:01.630987 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1314 12:29:01.637717 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1315 12:29:01.643874 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1316 12:29:01.650376 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1317 12:29:01.656937 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1318 12:29:01.666796 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1319 12:29:01.673519 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1320 12:29:01.676682 DOMAIN: 0000: Resource ranges:
1321 12:29:01.679986 * Base: 1000, Size: 800, Tag: 100
1322 12:29:01.683541 * Base: 1900, Size: e700, Tag: 100
1323 12:29:01.690038 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1324 12:29:01.696515 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1325 12:29:01.703158 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1326 12:29:01.709855 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1327 12:29:01.716065 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1328 12:29:01.726392 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1329 12:29:01.732728 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1330 12:29:01.739568 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1331 12:29:01.749689 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1332 12:29:01.755788 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1333 12:29:01.762442 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1334 12:29:01.766361
1335 12:29:01.772181 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1336 12:29:01.779189 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1337 12:29:01.785891 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1338 12:29:01.788938
1339 12:29:01.795816 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1340 12:29:01.801783 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1341 12:29:01.808631 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1342 12:29:01.811907
1343 12:29:01.818604 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1344 12:29:01.824846 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1345 12:29:01.835310 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1346 12:29:01.841360 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1347 12:29:01.848783 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1348 12:29:01.858783 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1349 12:29:01.865190 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1350 12:29:01.871520 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1351 12:29:01.875170 DOMAIN: 0000: Resource ranges:
1352 12:29:01.877679 * Base: 7fc00000, Size: 40400000, Tag: 200
1353 12:29:01.881151
1354 12:29:01.885157 * Base: d0000000, Size: 28000000, Tag: 200
1355 12:29:01.888155 * Base: fa000000, Size: 1000000, Tag: 200
1356 12:29:01.890978 * Base: fb001000, Size: 2fff000, Tag: 200
1357 12:29:01.897672 * Base: fe010000, Size: 2e000, Tag: 200
1358 12:29:01.901462 * Base: fe03f000, Size: d41000, Tag: 200
1359 12:29:01.904355 * Base: fed88000, Size: 8000, Tag: 200
1360 12:29:01.907857 * Base: fed93000, Size: d000, Tag: 200
1361 12:29:01.914001 * Base: feda2000, Size: 1e000, Tag: 200
1362 12:29:01.917871 * Base: fede0000, Size: 1220000, Tag: 200
1363 12:29:01.920788 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1364 12:29:01.930841 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1365 12:29:01.937403 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1366 12:29:01.943962 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1367 12:29:01.950875 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1368 12:29:01.957009 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1369 12:29:01.964172 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1370 12:29:01.970284 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1371 12:29:01.976795 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1372 12:29:01.983445 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1373 12:29:01.989932 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1374 12:29:01.997014 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1375 12:29:02.003089 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1376 12:29:02.010408 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1377 12:29:02.016771 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1378 12:29:02.023562 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1379 12:29:02.029796 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1380 12:29:02.036483 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1381 12:29:02.043069 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1382 12:29:02.049696 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1383 12:29:02.056288 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1384 12:29:02.062746 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1385 12:29:02.069582 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1386 12:29:02.076611 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1387 12:29:02.083013 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1388 12:29:02.086195 PCI: 00:1d.0: Resource ranges:
1389 12:29:02.092280 * Base: 7fc00000, Size: 100000, Tag: 200
1390 12:29:02.098977 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1391 12:29:02.105673 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1392 12:29:02.112267 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1393 12:29:02.118789 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1394 12:29:02.125646 Root Device assign_resources, bus 0 link: 0
1395 12:29:02.128787 DOMAIN: 0000 assign_resources, bus 0 link: 0
1396 12:29:02.138665 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1397 12:29:02.145063 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1398 12:29:02.155191 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1399 12:29:02.161777 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1400 12:29:02.165146 PCI: 00:04.0 assign_resources, bus 1 link: 0
1401 12:29:02.171967 PCI: 00:04.0 assign_resources, bus 1 link: 0
1402 12:29:02.178063 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1403 12:29:02.188036 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1404 12:29:02.194685 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1405 12:29:02.201240 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1406 12:29:02.204295 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1407 12:29:02.214653 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1408 12:29:02.217726 PCI: 00:14.0 assign_resources, bus 0 link: 0
1409 12:29:02.220821 PCI: 00:14.0 assign_resources, bus 0 link: 0
1410 12:29:02.231063 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1411 12:29:02.237631 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1412 12:29:02.247658 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1413 12:29:02.250661 PCI: 00:14.3 assign_resources, bus 0 link: 0
1414 12:29:02.257465 PCI: 00:14.3 assign_resources, bus 0 link: 0
1415 12:29:02.264145 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1416 12:29:02.267285 PCI: 00:15.0 assign_resources, bus 0 link: 0
1417 12:29:02.270644
1418 12:29:02.274250 PCI: 00:15.0 assign_resources, bus 0 link: 0
1419 12:29:02.280568 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1420 12:29:02.286745 PCI: 00:15.1 assign_resources, bus 0 link: 0
1421 12:29:02.290184 PCI: 00:15.1 assign_resources, bus 0 link: 0
1422 12:29:02.300026 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1423 12:29:02.306468 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1424 12:29:02.316550 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1425 12:29:02.323010 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1426 12:29:02.329736 PCI: 00:19.1 assign_resources, bus 0 link: 0
1427 12:29:02.332925 PCI: 00:19.1 assign_resources, bus 0 link: 0
1428 12:29:02.343335 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1429 12:29:02.353189 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1430 12:29:02.359145 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1431 12:29:02.365836 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1432 12:29:02.372959 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1433 12:29:02.383129 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1434 12:29:02.386256 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1435 12:29:02.396013 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1436 12:29:02.398785 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1437 12:29:02.402321 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1438 12:29:02.412128 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1439 12:29:02.415934 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1440 12:29:02.421786 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1441 12:29:02.425326 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1442 12:29:02.432264 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1443 12:29:02.435350 LPC: Trying to open IO window from 800 size 1ff
1444 12:29:02.445447 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1445 12:29:02.451839 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1446 12:29:02.458415 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1447 12:29:02.465329 DOMAIN: 0000 assign_resources, bus 0 link: 0
1448 12:29:02.468440 Root Device assign_resources, bus 0 link: 0
1449 12:29:02.471721 Done setting resources.
1450 12:29:02.478065 Show resources in subtree (Root Device)...After assigning values.
1451 12:29:02.481971 Root Device child on link 0 DOMAIN: 0000
1452 12:29:02.488349 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1453 12:29:02.494601 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1454 12:29:02.504756 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1455 12:29:02.507666 PCI: 00:00.0
1456 12:29:02.518345 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1457 12:29:02.527912 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1458 12:29:02.538099 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1459 12:29:02.543926 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1460 12:29:02.554015 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1461 12:29:02.563689 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1462 12:29:02.574329 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1463 12:29:02.583639 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1464 12:29:02.593764 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1465 12:29:02.600367 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1466 12:29:02.610047 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1467 12:29:02.619939 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1468 12:29:02.629796 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1469 12:29:02.639764 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1470 12:29:02.646363 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1471 12:29:02.656307 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1472 12:29:02.665994 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1473 12:29:02.675897 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1474 12:29:02.685974 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1475 12:29:02.696064 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1476 12:29:02.699013 PCI: 00:02.0
1477 12:29:02.709383 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1478 12:29:02.719155 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1479 12:29:02.728896 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1480 12:29:02.732456 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1481 12:29:02.742112 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1482 12:29:02.745283 GENERIC: 0.0
1483 12:29:02.745809 PCI: 00:05.0
1484 12:29:02.758866 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1485 12:29:02.762304 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1486 12:29:02.762791 GENERIC: 0.0
1487 12:29:02.765034 PCI: 00:08.0
1488 12:29:02.775165 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1489 12:29:02.778387 PCI: 00:0a.0
1490 12:29:02.782110 PCI: 00:0d.0 child on link 0 USB0 port 0
1491 12:29:02.791210 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1492 12:29:02.794938 USB0 port 0 child on link 0 USB3 port 0
1493 12:29:02.798404 USB3 port 0
1494 12:29:02.801401 USB3 port 1
1495 12:29:02.802016 USB3 port 2
1496 12:29:02.805129 USB3 port 3
1497 12:29:02.807548 PCI: 00:14.0 child on link 0 USB0 port 0
1498 12:29:02.818071 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1499 12:29:02.820820 USB0 port 0 child on link 0 USB2 port 0
1500 12:29:02.824169 USB2 port 0
1501 12:29:02.824651 USB2 port 1
1502 12:29:02.827712 USB2 port 2
1503 12:29:02.831149 USB2 port 3
1504 12:29:02.831626 USB2 port 4
1505 12:29:02.834959 USB2 port 5
1506 12:29:02.835650 USB2 port 6
1507 12:29:02.837820 USB2 port 7
1508 12:29:02.838332 USB2 port 8
1509 12:29:02.840905 USB2 port 9
1510 12:29:02.841379 USB3 port 0
1511 12:29:02.844293 USB3 port 1
1512 12:29:02.844844 USB3 port 2
1513 12:29:02.847555 USB3 port 3
1514 12:29:02.848060 PCI: 00:14.2
1515 12:29:02.857832 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1516 12:29:02.860923
1517 12:29:02.870669 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1518 12:29:02.874061 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1519 12:29:02.883946 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1520 12:29:02.887385 GENERIC: 0.0
1521 12:29:02.890531 PCI: 00:15.0 child on link 0 I2C: 00:1a
1522 12:29:02.901045 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1523 12:29:02.904198 I2C: 00:1a
1524 12:29:02.904677 I2C: 00:31
1525 12:29:02.905051 I2C: 00:32
1526 12:29:02.907051
1527 12:29:02.910638 PCI: 00:15.1 child on link 0 I2C: 00:10
1528 12:29:02.920775 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1529 12:29:02.921363 I2C: 00:10
1530 12:29:02.923692 PCI: 00:15.2
1531 12:29:02.934354 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1532 12:29:02.936525 PCI: 00:15.3
1533 12:29:02.946574 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1534 12:29:02.947159 PCI: 00:16.0
1535 12:29:02.956759 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1536 12:29:02.960174 PCI: 00:19.0
1537 12:29:02.963396 PCI: 00:19.1 child on link 0 I2C: 00:15
1538 12:29:02.973372 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1539 12:29:02.976382 I2C: 00:15
1540 12:29:02.979457 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1541 12:29:02.989644 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1542 12:29:02.999640 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1543 12:29:03.013051 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1544 12:29:03.013657 GENERIC: 0.0
1545 12:29:03.016112 PCI: 01:00.0
1546 12:29:03.026137 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1547 12:29:03.035848 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1548 12:29:03.036477 PCI: 00:1e.0
1549 12:29:03.048605 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1550 12:29:03.052149 PCI: 00:1e.2 child on link 0 SPI: 00
1551 12:29:03.062250 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1552 12:29:03.065400 SPI: 00
1553 12:29:03.068673 PCI: 00:1e.3 child on link 0 SPI: 00
1554 12:29:03.078374 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1555 12:29:03.079005 SPI: 00
1556 12:29:03.085466 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1557 12:29:03.092186 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1558 12:29:03.095634 PNP: 0c09.0
1559 12:29:03.101852 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1560 12:29:03.108632 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1561 12:29:03.118392 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1562 12:29:03.124437 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1563 12:29:03.131132 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1564 12:29:03.131615 GENERIC: 0.0
1565 12:29:03.134379 GENERIC: 1.0
1566 12:29:03.134855 PCI: 00:1f.3
1567 12:29:03.147994 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1568 12:29:03.157571 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1569 12:29:03.158157 PCI: 00:1f.5
1570 12:29:03.167711 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1571 12:29:03.174535 CPU_CLUSTER: 0 child on link 0 APIC: 00
1572 12:29:03.175159 APIC: 00
1573 12:29:03.175545 APIC: 01
1574 12:29:03.177920
1575 12:29:03.178399 APIC: 03
1576 12:29:03.178777 APIC: 07
1577 12:29:03.181294 APIC: 05
1578 12:29:03.181922 APIC: 04
1579 12:29:03.182300 APIC: 02
1580 12:29:03.184150 APIC: 06
1581 12:29:03.187374 Done allocating resources.
1582 12:29:03.193934 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1583 12:29:03.197315 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1584 12:29:03.200898 Configure GPIOs for I2S audio on UP4.
1585 12:29:03.208538 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1586 12:29:03.211972 Enabling resources...
1587 12:29:03.215339 PCI: 00:00.0 subsystem <- 8086/9a12
1588 12:29:03.218391 PCI: 00:00.0 cmd <- 06
1589 12:29:03.221465 PCI: 00:02.0 subsystem <- 8086/9a40
1590 12:29:03.224892 PCI: 00:02.0 cmd <- 03
1591 12:29:03.228690 PCI: 00:04.0 subsystem <- 8086/9a03
1592 12:29:03.231304 PCI: 00:04.0 cmd <- 02
1593 12:29:03.234998 PCI: 00:05.0 subsystem <- 8086/9a19
1594 12:29:03.235489 PCI: 00:05.0 cmd <- 02
1595 12:29:03.241630 PCI: 00:08.0 subsystem <- 8086/9a11
1596 12:29:03.242226 PCI: 00:08.0 cmd <- 06
1597 12:29:03.244670 PCI: 00:0d.0 subsystem <- 8086/9a13
1598 12:29:03.247906 PCI: 00:0d.0 cmd <- 02
1599 12:29:03.251320 PCI: 00:14.0 subsystem <- 8086/a0ed
1600 12:29:03.254972 PCI: 00:14.0 cmd <- 02
1601 12:29:03.258237 PCI: 00:14.2 subsystem <- 8086/a0ef
1602 12:29:03.261451 PCI: 00:14.2 cmd <- 02
1603 12:29:03.264549 PCI: 00:14.3 subsystem <- 8086/a0f0
1604 12:29:03.268031 PCI: 00:14.3 cmd <- 02
1605 12:29:03.271084 PCI: 00:15.0 subsystem <- 8086/a0e8
1606 12:29:03.274757 PCI: 00:15.0 cmd <- 02
1607 12:29:03.277837 PCI: 00:15.1 subsystem <- 8086/a0e9
1608 12:29:03.281595 PCI: 00:15.1 cmd <- 02
1609 12:29:03.284161 PCI: 00:15.2 subsystem <- 8086/a0ea
1610 12:29:03.284648 PCI: 00:15.2 cmd <- 02
1611 12:29:03.291434 PCI: 00:15.3 subsystem <- 8086/a0eb
1612 12:29:03.292032 PCI: 00:15.3 cmd <- 02
1613 12:29:03.294338 PCI: 00:16.0 subsystem <- 8086/a0e0
1614 12:29:03.298389 PCI: 00:16.0 cmd <- 02
1615 12:29:03.301212 PCI: 00:19.1 subsystem <- 8086/a0c6
1616 12:29:03.304789 PCI: 00:19.1 cmd <- 02
1617 12:29:03.307866 PCI: 00:1d.0 bridge ctrl <- 0013
1618 12:29:03.310931 PCI: 00:1d.0 subsystem <- 8086/a0b0
1619 12:29:03.314399 PCI: 00:1d.0 cmd <- 06
1620 12:29:03.317641 PCI: 00:1e.0 subsystem <- 8086/a0a8
1621 12:29:03.320545 PCI: 00:1e.0 cmd <- 06
1622 12:29:03.324130 PCI: 00:1e.2 subsystem <- 8086/a0aa
1623 12:29:03.327512 PCI: 00:1e.2 cmd <- 06
1624 12:29:03.331128 PCI: 00:1e.3 subsystem <- 8086/a0ab
1625 12:29:03.334240 PCI: 00:1e.3 cmd <- 02
1626 12:29:03.337890 PCI: 00:1f.0 subsystem <- 8086/a087
1627 12:29:03.338491 PCI: 00:1f.0 cmd <- 407
1628 12:29:03.344003 PCI: 00:1f.3 subsystem <- 8086/a0c8
1629 12:29:03.344582 PCI: 00:1f.3 cmd <- 02
1630 12:29:03.347676 PCI: 00:1f.5 subsystem <- 8086/a0a4
1631 12:29:03.351565 PCI: 00:1f.5 cmd <- 406
1632 12:29:03.355706 PCI: 01:00.0 cmd <- 02
1633 12:29:03.360133 done.
1634 12:29:03.363662 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1635 12:29:03.367006 Initializing devices...
1636 12:29:03.370231 Root Device init
1637 12:29:03.373592 Chrome EC: Set SMI mask to 0x0000000000000000
1638 12:29:03.380538 Chrome EC: clear events_b mask to 0x0000000000000000
1639 12:29:03.387396 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1640 12:29:03.394383 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1641 12:29:03.401179 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1642 12:29:03.403893 Chrome EC: Set WAKE mask to 0x0000000000000000
1643 12:29:03.407019
1644 12:29:03.410156 fw_config match found: DB_USB=USB3_ACTIVE
1645 12:29:03.416655 Configure Right Type-C port orientation for retimer
1646 12:29:03.420210 Root Device init finished in 46 msecs
1647 12:29:03.423376 PCI: 00:00.0 init
1648 12:29:03.426635 CPU TDP = 9 Watts
1649 12:29:03.427235 CPU PL1 = 9 Watts
1650 12:29:03.430219 CPU PL2 = 40 Watts
1651 12:29:03.430806 CPU PL4 = 83 Watts
1652 12:29:03.436941 PCI: 00:00.0 init finished in 8 msecs
1653 12:29:03.437563 PCI: 00:02.0 init
1654 12:29:03.440059 GMA: Found VBT in CBFS
1655 12:29:03.443489 GMA: Found valid VBT in CBFS
1656 12:29:03.449395 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1657 12:29:03.456381 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1658 12:29:03.459400 PCI: 00:02.0 init finished in 18 msecs
1659 12:29:03.462946 PCI: 00:05.0 init
1660 12:29:03.465739 PCI: 00:05.0 init finished in 0 msecs
1661 12:29:03.469878 PCI: 00:08.0 init
1662 12:29:03.472752 PCI: 00:08.0 init finished in 0 msecs
1663 12:29:03.476029 PCI: 00:14.0 init
1664 12:29:03.479883 PCI: 00:14.0 init finished in 0 msecs
1665 12:29:03.480348 PCI: 00:14.2 init
1666 12:29:03.482764
1667 12:29:03.486057 PCI: 00:14.2 init finished in 0 msecs
1668 12:29:03.486636 PCI: 00:15.0 init
1669 12:29:03.489431 I2C bus 0 version 0x3230302a
1670 12:29:03.493013 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1671 12:29:03.499795 PCI: 00:15.0 init finished in 6 msecs
1672 12:29:03.500363 PCI: 00:15.1 init
1673 12:29:03.502767 I2C bus 1 version 0x3230302a
1674 12:29:03.506088 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1675 12:29:03.509103 PCI: 00:15.1 init finished in 6 msecs
1676 12:29:03.512496 PCI: 00:15.2 init
1677 12:29:03.515958 I2C bus 2 version 0x3230302a
1678 12:29:03.519601 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1679 12:29:03.522870 PCI: 00:15.2 init finished in 6 msecs
1680 12:29:03.525635 PCI: 00:15.3 init
1681 12:29:03.529257 I2C bus 3 version 0x3230302a
1682 12:29:03.532675 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1683 12:29:03.536202 PCI: 00:15.3 init finished in 6 msecs
1684 12:29:03.539070 PCI: 00:16.0 init
1685 12:29:03.542480 PCI: 00:16.0 init finished in 0 msecs
1686 12:29:03.546021 PCI: 00:19.1 init
1687 12:29:03.546604 I2C bus 5 version 0x3230302a
1688 12:29:03.552592 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1689 12:29:03.555592 PCI: 00:19.1 init finished in 6 msecs
1690 12:29:03.556065 PCI: 00:1d.0 init
1691 12:29:03.558632 Initializing PCH PCIe bridge.
1692 12:29:03.561805 PCI: 00:1d.0 init finished in 3 msecs
1693 12:29:03.567132 PCI: 00:1f.0 init
1694 12:29:03.570092 IOAPIC: Initializing IOAPIC at 0xfec00000
1695 12:29:03.576712 IOAPIC: Bootstrap Processor Local APIC = 0x00
1696 12:29:03.577265 IOAPIC: ID = 0x02
1697 12:29:03.579941 IOAPIC: Dumping registers
1698 12:29:03.583214 reg 0x0000: 0x02000000
1699 12:29:03.586731 reg 0x0001: 0x00770020
1700 12:29:03.587305 reg 0x0002: 0x00000000
1701 12:29:03.593183 PCI: 00:1f.0 init finished in 21 msecs
1702 12:29:03.593778 PCI: 00:1f.2 init
1703 12:29:03.596138 Disabling ACPI via APMC.
1704 12:29:03.599908 APMC done.
1705 12:29:03.603224 PCI: 00:1f.2 init finished in 5 msecs
1706 12:29:03.615458 PCI: 01:00.0 init
1707 12:29:03.618319 PCI: 01:00.0 init finished in 0 msecs
1708 12:29:03.621282 PNP: 0c09.0 init
1709 12:29:03.625175 Google Chrome EC uptime: 8.251 seconds
1710 12:29:03.631225 Google Chrome AP resets since EC boot: 1
1711 12:29:03.634898 Google Chrome most recent AP reset causes:
1712 12:29:03.638058 0.452: 32775 shutdown: entering G3
1713 12:29:03.645044 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1714 12:29:03.647641 PNP: 0c09.0 init finished in 22 msecs
1715 12:29:03.653329 Devices initialized
1716 12:29:03.656971 Show all devs... After init.
1717 12:29:03.660316 Root Device: enabled 1
1718 12:29:03.660889 DOMAIN: 0000: enabled 1
1719 12:29:03.663501 CPU_CLUSTER: 0: enabled 1
1720 12:29:03.666567 PCI: 00:00.0: enabled 1
1721 12:29:03.670352 PCI: 00:02.0: enabled 1
1722 12:29:03.670932 PCI: 00:04.0: enabled 1
1723 12:29:03.674418 PCI: 00:05.0: enabled 1
1724 12:29:03.676976 PCI: 00:06.0: enabled 0
1725 12:29:03.680183 PCI: 00:07.0: enabled 0
1726 12:29:03.680679 PCI: 00:07.1: enabled 0
1727 12:29:03.683464 PCI: 00:07.2: enabled 0
1728 12:29:03.687174 PCI: 00:07.3: enabled 0
1729 12:29:03.690130 PCI: 00:08.0: enabled 1
1730 12:29:03.690707 PCI: 00:09.0: enabled 0
1731 12:29:03.693527 PCI: 00:0a.0: enabled 0
1732 12:29:03.696812 PCI: 00:0d.0: enabled 1
1733 12:29:03.699941 PCI: 00:0d.1: enabled 0
1734 12:29:03.700519 PCI: 00:0d.2: enabled 0
1735 12:29:03.703424 PCI: 00:0d.3: enabled 0
1736 12:29:03.706931 PCI: 00:0e.0: enabled 0
1737 12:29:03.709985 PCI: 00:10.2: enabled 1
1738 12:29:03.710565 PCI: 00:10.6: enabled 0
1739 12:29:03.713000 PCI: 00:10.7: enabled 0
1740 12:29:03.716363 PCI: 00:12.0: enabled 0
1741 12:29:03.716947 PCI: 00:12.6: enabled 0
1742 12:29:03.719631
1743 12:29:03.720106 PCI: 00:13.0: enabled 0
1744 12:29:03.722807 PCI: 00:14.0: enabled 1
1745 12:29:03.726704 PCI: 00:14.1: enabled 0
1746 12:29:03.727283 PCI: 00:14.2: enabled 1
1747 12:29:03.729764 PCI: 00:14.3: enabled 1
1748 12:29:03.732781 PCI: 00:15.0: enabled 1
1749 12:29:03.736845 PCI: 00:15.1: enabled 1
1750 12:29:03.737434 PCI: 00:15.2: enabled 1
1751 12:29:03.739729 PCI: 00:15.3: enabled 1
1752 12:29:03.743061 PCI: 00:16.0: enabled 1
1753 12:29:03.746042 PCI: 00:16.1: enabled 0
1754 12:29:03.746517 PCI: 00:16.2: enabled 0
1755 12:29:03.749618 PCI: 00:16.3: enabled 0
1756 12:29:03.753449 PCI: 00:16.4: enabled 0
1757 12:29:03.756218 PCI: 00:16.5: enabled 0
1758 12:29:03.756692 PCI: 00:17.0: enabled 0
1759 12:29:03.759257 PCI: 00:19.0: enabled 0
1760 12:29:03.762641 PCI: 00:19.1: enabled 1
1761 12:29:03.763156 PCI: 00:19.2: enabled 0
1762 12:29:03.765777
1763 12:29:03.766254 PCI: 00:1c.0: enabled 1
1764 12:29:03.769304 PCI: 00:1c.1: enabled 0
1765 12:29:03.772777 PCI: 00:1c.2: enabled 0
1766 12:29:03.773341 PCI: 00:1c.3: enabled 0
1767 12:29:03.775885 PCI: 00:1c.4: enabled 0
1768 12:29:03.779565 PCI: 00:1c.5: enabled 0
1769 12:29:03.782395 PCI: 00:1c.6: enabled 1
1770 12:29:03.782866 PCI: 00:1c.7: enabled 0
1771 12:29:03.786072 PCI: 00:1d.0: enabled 1
1772 12:29:03.789142 PCI: 00:1d.1: enabled 0
1773 12:29:03.792605 PCI: 00:1d.2: enabled 1
1774 12:29:03.793173 PCI: 00:1d.3: enabled 0
1775 12:29:03.796112 PCI: 00:1e.0: enabled 1
1776 12:29:03.799330 PCI: 00:1e.1: enabled 0
1777 12:29:03.802397 PCI: 00:1e.2: enabled 1
1778 12:29:03.802969 PCI: 00:1e.3: enabled 1
1779 12:29:03.805867 PCI: 00:1f.0: enabled 1
1780 12:29:03.809161 PCI: 00:1f.1: enabled 0
1781 12:29:03.812333 PCI: 00:1f.2: enabled 1
1782 12:29:03.812903 PCI: 00:1f.3: enabled 1
1783 12:29:03.815541 PCI: 00:1f.4: enabled 0
1784 12:29:03.819355 PCI: 00:1f.5: enabled 1
1785 12:29:03.822379 PCI: 00:1f.6: enabled 0
1786 12:29:03.823074 PCI: 00:1f.7: enabled 0
1787 12:29:03.825394 APIC: 00: enabled 1
1788 12:29:03.828455 GENERIC: 0.0: enabled 1
1789 12:29:03.828853 GENERIC: 0.0: enabled 1
1790 12:29:03.831889 GENERIC: 1.0: enabled 1
1791 12:29:03.835333 GENERIC: 0.0: enabled 1
1792 12:29:03.838493 GENERIC: 1.0: enabled 1
1793 12:29:03.839072 USB0 port 0: enabled 1
1794 12:29:03.841865 GENERIC: 0.0: enabled 1
1795 12:29:03.845603 USB0 port 0: enabled 1
1796 12:29:03.846187 GENERIC: 0.0: enabled 1
1797 12:29:03.848367 I2C: 00:1a: enabled 1
1798 12:29:03.851694 I2C: 00:31: enabled 1
1799 12:29:03.852188 I2C: 00:32: enabled 1
1800 12:29:03.855531
1801 12:29:03.856032 I2C: 00:10: enabled 1
1802 12:29:03.858329 I2C: 00:15: enabled 1
1803 12:29:03.862237 GENERIC: 0.0: enabled 0
1804 12:29:03.862827 GENERIC: 1.0: enabled 0
1805 12:29:03.865214 GENERIC: 0.0: enabled 1
1806 12:29:03.868400 SPI: 00: enabled 1
1807 12:29:03.868870 SPI: 00: enabled 1
1808 12:29:03.871628 PNP: 0c09.0: enabled 1
1809 12:29:03.875181 GENERIC: 0.0: enabled 1
1810 12:29:03.875658 USB3 port 0: enabled 1
1811 12:29:03.878222 USB3 port 1: enabled 1
1812 12:29:03.881843 USB3 port 2: enabled 0
1813 12:29:03.885067 USB3 port 3: enabled 0
1814 12:29:03.885677 USB2 port 0: enabled 0
1815 12:29:03.888546 USB2 port 1: enabled 1
1816 12:29:03.891729 USB2 port 2: enabled 1
1817 12:29:03.892297 USB2 port 3: enabled 0
1818 12:29:03.894940 USB2 port 4: enabled 1
1819 12:29:03.898147 USB2 port 5: enabled 0
1820 12:29:03.901508 USB2 port 6: enabled 0
1821 12:29:03.902075 USB2 port 7: enabled 0
1822 12:29:03.904842 USB2 port 8: enabled 0
1823 12:29:03.908444 USB2 port 9: enabled 0
1824 12:29:03.909011 USB3 port 0: enabled 0
1825 12:29:03.911533 USB3 port 1: enabled 1
1826 12:29:03.914887 USB3 port 2: enabled 0
1827 12:29:03.915496 USB3 port 3: enabled 0
1828 12:29:03.917978
1829 12:29:03.918581 GENERIC: 0.0: enabled 1
1830 12:29:03.921384 GENERIC: 1.0: enabled 1
1831 12:29:03.924425 APIC: 01: enabled 1
1832 12:29:03.924907 APIC: 03: enabled 1
1833 12:29:03.927889 APIC: 07: enabled 1
1834 12:29:03.928368 APIC: 05: enabled 1
1835 12:29:03.930994
1836 12:29:03.931470 APIC: 04: enabled 1
1837 12:29:03.934080 APIC: 02: enabled 1
1838 12:29:03.934555 APIC: 06: enabled 1
1839 12:29:03.937866 PCI: 01:00.0: enabled 1
1840 12:29:03.944474 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1841 12:29:03.947677 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1842 12:29:03.950938 ELOG: NV offset 0xf30000 size 0x1000
1843 12:29:03.958999 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1844 12:29:03.965560 ELOG: Event(17) added with size 13 at 2022-12-01 12:29:03 UTC
1845 12:29:03.972701 ELOG: Event(16) added with size 11 at 2022-12-01 12:29:03 UTC
1846 12:29:03.975725 Erasing flash addr f30000 + 4 KiB
1847 12:29:04.032302 ELOG: Event(92) added with size 9 at 2022-12-01 12:29:04 UTC
1848 12:29:04.038557 ELOG: Event(93) added with size 9 at 2022-12-01 12:29:04 UTC
1849 12:29:04.045103 ELOG: Event(9E) added with size 10 at 2022-12-01 12:29:04 UTC
1850 12:29:04.051891 ELOG: Event(9F) added with size 14 at 2022-12-01 12:29:04 UTC
1851 12:29:04.057966 BS: BS_DEV_INIT exit times (exec / console): 45 / 55 ms
1852 12:29:04.064675 ELOG: Event(A1) added with size 10 at 2022-12-01 12:29:04 UTC
1853 12:29:04.071302 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1854 12:29:04.078083 ELOG: Event(A0) added with size 9 at 2022-12-01 12:29:04 UTC
1855 12:29:04.081175 elog_add_boot_reason: Logged dev mode boot
1856 12:29:04.088157 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1857 12:29:04.091510 Finalize devices...
1858 12:29:04.092093 Devices finalized
1859 12:29:04.097758 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1860 12:29:04.101570 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1861 12:29:04.108237 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1862 12:29:04.111484 ME: HFSTS1 : 0x80030055
1863 12:29:04.117799 ME: HFSTS2 : 0x30280116
1864 12:29:04.121725 ME: HFSTS3 : 0x00000050
1865 12:29:04.128214 ME: HFSTS4 : 0x00004000
1866 12:29:04.130990 ME: HFSTS5 : 0x00000000
1867 12:29:04.134622 ME: HFSTS6 : 0x40400006
1868 12:29:04.137523 ME: Manufacturing Mode : YES
1869 12:29:04.140855 ME: SPI Protection Mode Enabled : NO
1870 12:29:04.144229
1871 12:29:04.147813 ME: FW Partition Table : OK
1872 12:29:04.150707 ME: Bringup Loader Failure : NO
1873 12:29:04.154070 ME: Firmware Init Complete : NO
1874 12:29:04.157217 ME: Boot Options Present : NO
1875 12:29:04.160918 ME: Update In Progress : NO
1876 12:29:04.164321 ME: D0i3 Support : YES
1877 12:29:04.167366 ME: Low Power State Enabled : NO
1878 12:29:04.170421 ME: CPU Replaced : YES
1879 12:29:04.174060
1880 12:29:04.177312 ME: CPU Replacement Valid : YES
1881 12:29:04.181213 ME: Current Working State : 5
1882 12:29:04.184164 ME: Current Operation State : 1
1883 12:29:04.187205 ME: Current Operation Mode : 3
1884 12:29:04.190777 ME: Error Code : 0
1885 12:29:04.194116 ME: Enhanced Debug Mode : NO
1886 12:29:04.197453 ME: CPU Debug Disabled : YES
1887 12:29:04.200873 ME: TXT Support : NO
1888 12:29:04.207656 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1889 12:29:04.217095 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1890 12:29:04.220658 CBFS: 'fallback/slic' not found.
1891 12:29:04.223751 ACPI: Writing ACPI tables at 76b01000.
1892 12:29:04.224243 ACPI: * FACS
1893 12:29:04.227601 ACPI: * DSDT
1894 12:29:04.230632 Ramoops buffer: 0x100000@0x76a00000.
1895 12:29:04.233440 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1896 12:29:04.240510 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1897 12:29:04.243447 Google Chrome EC: version:
1898 12:29:04.246635 ro: voema_v2.0.10114-a447f03e46
1899 12:29:04.249975 rw: voema_v2.0.10114-a447f03e46
1900 12:29:04.253784 running image: 2
1901 12:29:04.260008 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1902 12:29:04.263053 ACPI: * FADT
1903 12:29:04.263537 SCI is IRQ9
1904 12:29:04.266898 ACPI: added table 1/32, length now 40
1905 12:29:04.270439 ACPI: * SSDT
1906 12:29:04.273440 Found 1 CPU(s) with 8 core(s) each.
1907 12:29:04.276189 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1908 12:29:04.279488 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1909 12:29:04.282937
1910 12:29:04.286359 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1911 12:29:04.289765 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1912 12:29:04.296544 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1913 12:29:04.299711 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1914 12:29:04.302896
1915 12:29:04.306059 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1916 12:29:04.312923 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1917 12:29:04.319572 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1918 12:29:04.322543 \_SB.PCI0.RP09: Added StorageD3Enable property
1919 12:29:04.326136 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1920 12:29:04.332540 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1921 12:29:04.339383 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1922 12:29:04.342764 PS2K: Passing 80 keymaps to kernel
1923 12:29:04.348944 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1924 12:29:04.355335 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1925 12:29:04.361964 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1926 12:29:04.369070 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1927 12:29:04.375262 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1928 12:29:04.382010 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1929 12:29:04.389226 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1930 12:29:04.395658 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1931 12:29:04.398636 ACPI: added table 2/32, length now 44
1932 12:29:04.402200 ACPI: * MCFG
1933 12:29:04.405356 ACPI: added table 3/32, length now 48
1934 12:29:04.405976 ACPI: * TPM2
1935 12:29:04.408754 TPM2 log created at 0x769f0000
1936 12:29:04.411921 ACPI: added table 4/32, length now 52
1937 12:29:04.415310 ACPI: * MADT
1938 12:29:04.415793 SCI is IRQ9
1939 12:29:04.418903 ACPI: added table 5/32, length now 56
1940 12:29:04.421940 current = 76b09850
1941 12:29:04.422421 ACPI: * DMAR
1942 12:29:04.429160 ACPI: added table 6/32, length now 60
1943 12:29:04.431824 ACPI: added table 7/32, length now 64
1944 12:29:04.432409 ACPI: * HPET
1945 12:29:04.435490 ACPI: added table 8/32, length now 68
1946 12:29:04.438536 ACPI: done.
1947 12:29:04.442409 ACPI tables: 35216 bytes.
1948 12:29:04.442991 smbios_write_tables: 769ef000
1949 12:29:04.445366 EC returned error result code 3
1950 12:29:04.448564 Couldn't obtain OEM name from CBI
1951 12:29:04.453310 Create SMBIOS type 16
1952 12:29:04.456862 Create SMBIOS type 17
1953 12:29:04.460521 GENERIC: 0.0 (WIFI Device)
1954 12:29:04.461107 SMBIOS tables: 1734 bytes.
1955 12:29:04.463836
1956 12:29:04.466849 Writing table forward entry at 0x00000500
1957 12:29:04.473383 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1958 12:29:04.476649 Writing coreboot table at 0x76b25000
1959 12:29:04.483607 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1960 12:29:04.486929 1. 0000000000001000-000000000009ffff: RAM
1961 12:29:04.490066 2. 00000000000a0000-00000000000fffff: RESERVED
1962 12:29:04.497267 3. 0000000000100000-00000000769eefff: RAM
1963 12:29:04.500015 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1964 12:29:04.506995 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1965 12:29:04.513198 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1966 12:29:04.517002 7. 0000000077000000-000000007fbfffff: RESERVED
1967 12:29:04.523069 8. 00000000c0000000-00000000cfffffff: RESERVED
1968 12:29:04.526411 9. 00000000f8000000-00000000f9ffffff: RESERVED
1969 12:29:04.530132 10. 00000000fb000000-00000000fb000fff: RESERVED
1970 12:29:04.536814 11. 00000000fe000000-00000000fe00ffff: RESERVED
1971 12:29:04.540342 12. 00000000fed80000-00000000fed87fff: RESERVED
1972 12:29:04.546497 13. 00000000fed90000-00000000fed92fff: RESERVED
1973 12:29:04.549558 14. 00000000feda0000-00000000feda1fff: RESERVED
1974 12:29:04.556950 15. 00000000fedc0000-00000000feddffff: RESERVED
1975 12:29:04.559464 16. 0000000100000000-00000004803fffff: RAM
1976 12:29:04.563006 Passing 4 GPIOs to payload:
1977 12:29:04.566314 NAME | PORT | POLARITY | VALUE
1978 12:29:04.573075 lid | undefined | high | high
1979 12:29:04.580090 power | undefined | high | low
1980 12:29:04.582925 oprom | undefined | high | low
1981 12:29:04.589546 EC in RW | 0x000000e5 | high | high
1982 12:29:04.595934 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1983 12:29:04.599048 coreboot table: 1576 bytes.
1984 12:29:04.602964 IMD ROOT 0. 0x76fff000 0x00001000
1985 12:29:04.605871 IMD SMALL 1. 0x76ffe000 0x00001000
1986 12:29:04.609060 FSP MEMORY 2. 0x76c4e000 0x003b0000
1987 12:29:04.612365 VPD 3. 0x76c4d000 0x00000367
1988 12:29:04.615891 RO MCACHE 4. 0x76c4c000 0x00000fdc
1989 12:29:04.619356 CONSOLE 5. 0x76c2c000 0x00020000
1990 12:29:04.622921 FMAP 6. 0x76c2b000 0x00000578
1991 12:29:04.629047 TIME STAMP 7. 0x76c2a000 0x00000910
1992 12:29:04.632462 VBOOT WORK 8. 0x76c16000 0x00014000
1993 12:29:04.635765 ROMSTG STCK 9. 0x76c15000 0x00001000
1994 12:29:04.639016 AFTER CAR 10. 0x76c0a000 0x0000b000
1995 12:29:04.642395 RAMSTAGE 11. 0x76b97000 0x00073000
1996 12:29:04.645700 REFCODE 12. 0x76b42000 0x00055000
1997 12:29:04.648705 SMM BACKUP 13. 0x76b32000 0x00010000
1998 12:29:04.652073 4f444749 14. 0x76b30000 0x00002000
1999 12:29:04.655118
2000 12:29:04.658260 EXT VBT15. 0x76b2d000 0x0000219f
2001 12:29:04.661591 COREBOOT 16. 0x76b25000 0x00008000
2002 12:29:04.665178 ACPI 17. 0x76b01000 0x00024000
2003 12:29:04.668932 ACPI GNVS 18. 0x76b00000 0x00001000
2004 12:29:04.671730 RAMOOPS 19. 0x76a00000 0x00100000
2005 12:29:04.675092 TPM2 TCGLOG20. 0x769f0000 0x00010000
2006 12:29:04.678275 SMBIOS 21. 0x769ef000 0x00000800
2007 12:29:04.681373 IMD small region:
2008 12:29:04.685075 IMD ROOT 0. 0x76ffec00 0x00000400
2009 12:29:04.688506 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2010 12:29:04.691682 POWER STATE 2. 0x76ffeb80 0x00000044
2011 12:29:04.698442 ROMSTAGE 3. 0x76ffeb60 0x00000004
2012 12:29:04.701888 MEM INFO 4. 0x76ffe980 0x000001e0
2013 12:29:04.708441 BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms
2014 12:29:04.709024 MTRR: Physical address space:
2015 12:29:04.711324
2016 12:29:04.715067 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2017 12:29:04.721578 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2018 12:29:04.728401 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2019 12:29:04.734903 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2020 12:29:04.741046 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2021 12:29:04.748264 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2022 12:29:04.754619 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
2023 12:29:04.757303 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 12:29:04.760506 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 12:29:04.764059 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 12:29:04.767490
2027 12:29:04.770940 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:29:04.774008 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:29:04.777098 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:29:04.780937 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:29:04.787555 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:29:04.790337 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:29:04.793895 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:29:04.797835 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:29:04.802776 call enable_fixed_mtrr()
2036 12:29:04.806347 CPU physical address size: 39 bits
2037 12:29:04.812524 MTRR: default type WB/UC MTRR counts: 6/7.
2038 12:29:04.816322 MTRR: WB selected as default type.
2039 12:29:04.822585 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2040 12:29:04.825397 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2041 12:29:04.833023 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2042 12:29:04.838788 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2043 12:29:04.845574 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2044 12:29:04.852447 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2045 12:29:04.856151
2046 12:29:04.856677 MTRR check
2047 12:29:04.859069 Fixed MTRRs : Enabled
2048 12:29:04.859552 Variable MTRRs: Enabled
2049 12:29:04.859933
2050 12:29:04.866060 MTRR: Fixed MSR 0x250 0x0606060606060606
2051 12:29:04.869089 MTRR: Fixed MSR 0x258 0x0606060606060606
2052 12:29:04.872782 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 12:29:04.876025 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 12:29:04.882830 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 12:29:04.885564 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 12:29:04.889000 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 12:29:04.892376 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 12:29:04.899273 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 12:29:04.902183 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 12:29:04.906159 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 12:29:04.912690 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2062 12:29:04.916631 call enable_fixed_mtrr()
2063 12:29:04.919737 Checking cr50 for pending updates
2064 12:29:04.924053 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 12:29:04.926720 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 12:29:04.933834 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 12:29:04.936981 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 12:29:04.940297 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 12:29:04.943608 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 12:29:04.946606 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 12:29:04.953213 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 12:29:04.956402 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 12:29:04.959879 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 12:29:04.963618 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 12:29:04.969735 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 12:29:04.973182 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 12:29:04.979998 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 12:29:04.982990 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 12:29:04.986873 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 12:29:04.989910 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 12:29:04.996817 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 12:29:04.997433 call enable_fixed_mtrr()
2083 12:29:05.003056 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 12:29:05.006395 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 12:29:05.010433 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 12:29:05.012729 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 12:29:05.017745 CPU physical address size: 39 bits
2088 12:29:05.024300 call enable_fixed_mtrr()
2089 12:29:05.027440 MTRR: Fixed MSR 0x250 0x0606060606060606
2090 12:29:05.031568 MTRR: Fixed MSR 0x250 0x0606060606060606
2091 12:29:05.038198 MTRR: Fixed MSR 0x258 0x0606060606060606
2092 12:29:05.041722 MTRR: Fixed MSR 0x259 0x0000000000000000
2093 12:29:05.044251 MTRR: Fixed MSR 0x268 0x0606060606060606
2094 12:29:05.047772 MTRR: Fixed MSR 0x269 0x0606060606060606
2095 12:29:05.051514 MTRR: Fixed MSR 0x26a 0x0606060606060606
2096 12:29:05.057288 MTRR: Fixed MSR 0x26b 0x0606060606060606
2097 12:29:05.060599 MTRR: Fixed MSR 0x26c 0x0606060606060606
2098 12:29:05.064055 MTRR: Fixed MSR 0x26d 0x0606060606060606
2099 12:29:05.067237 MTRR: Fixed MSR 0x26e 0x0606060606060606
2100 12:29:05.073938 MTRR: Fixed MSR 0x26f 0x0606060606060606
2101 12:29:05.080533 MTRR: Fixed MSR 0x258 0x0606060606060606
2102 12:29:05.083863 MTRR: Fixed MSR 0x259 0x0000000000000000
2103 12:29:05.086990 MTRR: Fixed MSR 0x268 0x0606060606060606
2104 12:29:05.090326 MTRR: Fixed MSR 0x269 0x0606060606060606
2105 12:29:05.093539 MTRR: Fixed MSR 0x26a 0x0606060606060606
2106 12:29:05.097002
2107 12:29:05.100466 MTRR: Fixed MSR 0x26b 0x0606060606060606
2108 12:29:05.104266 MTRR: Fixed MSR 0x26c 0x0606060606060606
2109 12:29:05.107264 MTRR: Fixed MSR 0x26d 0x0606060606060606
2110 12:29:05.110386 MTRR: Fixed MSR 0x26e 0x0606060606060606
2111 12:29:05.116633 MTRR: Fixed MSR 0x26f 0x0606060606060606
2112 12:29:05.120020 call enable_fixed_mtrr()
2113 12:29:05.123298 call enable_fixed_mtrr()
2114 12:29:05.126879 MTRR: Fixed MSR 0x250 0x0606060606060606
2115 12:29:05.130177 MTRR: Fixed MSR 0x250 0x0606060606060606
2116 12:29:05.136757 MTRR: Fixed MSR 0x258 0x0606060606060606
2117 12:29:05.140334 MTRR: Fixed MSR 0x259 0x0000000000000000
2118 12:29:05.142984 MTRR: Fixed MSR 0x268 0x0606060606060606
2119 12:29:05.146553 MTRR: Fixed MSR 0x269 0x0606060606060606
2120 12:29:05.150035 MTRR: Fixed MSR 0x26a 0x0606060606060606
2121 12:29:05.152944
2122 12:29:05.156349 MTRR: Fixed MSR 0x26b 0x0606060606060606
2123 12:29:05.159407 MTRR: Fixed MSR 0x26c 0x0606060606060606
2124 12:29:05.162614 MTRR: Fixed MSR 0x26d 0x0606060606060606
2125 12:29:05.165992 MTRR: Fixed MSR 0x26e 0x0606060606060606
2126 12:29:05.169572
2127 12:29:05.172680 MTRR: Fixed MSR 0x26f 0x0606060606060606
2128 12:29:05.179439 MTRR: Fixed MSR 0x258 0x0606060606060606
2129 12:29:05.182920 MTRR: Fixed MSR 0x259 0x0000000000000000
2130 12:29:05.186391 MTRR: Fixed MSR 0x268 0x0606060606060606
2131 12:29:05.189250 MTRR: Fixed MSR 0x269 0x0606060606060606
2132 12:29:05.193128 MTRR: Fixed MSR 0x26a 0x0606060606060606
2133 12:29:05.196290
2134 12:29:05.199298 MTRR: Fixed MSR 0x26b 0x0606060606060606
2135 12:29:05.202615 MTRR: Fixed MSR 0x26c 0x0606060606060606
2136 12:29:05.206163 MTRR: Fixed MSR 0x26d 0x0606060606060606
2137 12:29:05.209225 MTRR: Fixed MSR 0x26e 0x0606060606060606
2138 12:29:05.216063 MTRR: Fixed MSR 0x26f 0x0606060606060606
2139 12:29:05.219198 call enable_fixed_mtrr()
2140 12:29:05.222244 call enable_fixed_mtrr()
2141 12:29:05.226095 CPU physical address size: 39 bits
2142 12:29:05.229284 Reading cr50 TPM mode
2143 12:29:05.232778 CPU physical address size: 39 bits
2144 12:29:05.235960 CPU physical address size: 39 bits
2145 12:29:05.238793 CPU physical address size: 39 bits
2146 12:29:05.242509 CPU physical address size: 39 bits
2147 12:29:05.247768 CPU physical address size: 39 bits
2148 12:29:05.254043 BS: BS_PAYLOAD_LOAD entry times (exec / console): 315 / 6 ms
2149 12:29:05.263699 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2150 12:29:05.267305 Checking segment from ROM address 0xffc02b38
2151 12:29:05.270527 Checking segment from ROM address 0xffc02b54
2152 12:29:05.277173 Loading segment from ROM address 0xffc02b38
2153 12:29:05.277809 code (compression=0)
2154 12:29:05.286776 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2155 12:29:05.297088 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2156 12:29:05.297766 it's not compressed!
2157 12:29:05.437962 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2158 12:29:05.444123 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2159 12:29:05.451050 Loading segment from ROM address 0xffc02b54
2160 12:29:05.454462 Entry Point 0x30000000
2161 12:29:05.455035 Loaded segments
2162 12:29:05.460614 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2163 12:29:05.505901 Finalizing chipset.
2164 12:29:05.509447 Finalizing SMM.
2165 12:29:05.510147 APMC done.
2166 12:29:05.515845 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2167 12:29:05.518979 mp_park_aps done after 0 msecs.
2168 12:29:05.522376 Jumping to boot code at 0x30000000(0x76b25000)
2169 12:29:05.532734 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2170 12:29:05.533327
2171 12:29:05.533856
2172 12:29:05.535859
2173 12:29:05.536462 Starting depthcharge on Voema...
2174 12:29:05.537714 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2175 12:29:05.538364 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2176 12:29:05.538920 Setting prompt string to ['volteer:']
2177 12:29:05.539449 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2178 12:29:05.540363
2179 12:29:05.545758 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2180 12:29:05.546353
2181 12:29:05.552478 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2182 12:29:05.553072
2183 12:29:05.558815 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2184 12:29:05.559392
2185 12:29:05.562003 Failed to find eMMC card reader
2186 12:29:05.562489
2187 12:29:05.566446 Wipe memory regions:
2188 12:29:05.566933
2189 12:29:05.569058 [0x00000000001000, 0x000000000a0000)
2190 12:29:05.569696
2191 12:29:05.571726 [0x00000000100000, 0x00000030000000)
2192 12:29:05.572215
2193 12:29:05.611358 [0x00000032662db0, 0x000000769ef000)
2194 12:29:05.611946
2195 12:29:05.664540 [0x00000100000000, 0x00000480400000)
2196 12:29:05.665156
2197 12:29:06.305356 ec_init: CrosEC protocol v3 supported (256, 256)
2198 12:29:06.306143
2199 12:29:06.737959 R8152: Initializing
2200 12:29:06.738545
2201 12:29:06.741315 Version 6 (ocp_data = 5c30)
2202 12:29:06.742045
2203 12:29:06.744536 R8152: Done initializing
2204 12:29:06.745114
2205 12:29:06.747766 Adding net device
2206 12:29:06.748245
2207 12:29:07.053332 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2208 12:29:07.054066
2209 12:29:07.054512
2210 12:29:07.054874
2211 12:29:07.057092 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2213 12:29:07.159252 volteer: tftpboot 192.168.201.1 8193669/tftp-deploy-xj_e7o4g/kernel/bzImage 8193669/tftp-deploy-xj_e7o4g/kernel/cmdline 8193669/tftp-deploy-xj_e7o4g/ramdisk/ramdisk.cpio.gz
2214 12:29:07.159937 Setting prompt string to 'Starting kernel'
2215 12:29:07.160459 Setting prompt string to ['Starting kernel']
2216 12:29:07.160844 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2217 12:29:07.161242 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2218 12:29:07.165521 tftpboot 192.168.201.1 8193669/tftp-deploy-xj_e7o4g/kernel/bzImoy-xj_e7o4g/kernel/cmdline 8193669/tftp-deploy-xj_e7o4g/ramdisk/ramdisk.cpio.gz
2219 12:29:07.166027
2220 12:29:07.166406 Waiting for link
2221 12:29:07.166761
2222 12:29:07.368592 done.
2223 12:29:07.369221
2224 12:29:07.369668 MAC: 00:24:32:30:7a:04
2225 12:29:07.370189
2226 12:29:07.371842 Sending DHCP discover... done.
2227 12:29:07.372326
2228 12:29:07.375124 Waiting for reply... done.
2229 12:29:07.375661
2230 12:29:07.378683 Sending DHCP request... done.
2231 12:29:07.379166
2232 12:29:07.385592 Waiting for reply... done.
2233 12:29:07.386178
2234 12:29:07.386563 My ip is 192.168.201.22
2235 12:29:07.386917
2236 12:29:07.388303 The DHCP server ip is 192.168.201.1
2237 12:29:07.388791
2238 12:29:07.395052 TFTP server IP predefined by user: 192.168.201.1
2239 12:29:07.395654
2240 12:29:07.401770 Bootfile predefined by user: 8193669/tftp-deploy-xj_e7o4g/kernel/bzImage
2241 12:29:07.402352
2242 12:29:07.405290 Sending tftp read request... done.
2243 12:29:07.405928
2244 12:29:07.412000 Waiting for the transfer...
2245 12:29:07.412576
2246 12:29:08.122894 00000000 ################################################################
2247 12:29:08.123495
2248 12:29:08.844482 00080000 ################################################################
2249 12:29:08.845065
2250 12:29:09.563125 00100000 ################################################################
2251 12:29:09.563764
2252 12:29:10.270832 00180000 ################################################################
2253 12:29:10.271436
2254 12:29:11.001522 00200000 ################################################################
2255 12:29:11.002074
2256 12:29:11.725315 00280000 ################################################################
2257 12:29:11.725890
2258 12:29:12.432004 00300000 ################################################################
2259 12:29:12.432610
2260 12:29:13.143886 00380000 ################################################################
2261 12:29:13.144499
2262 12:29:13.842248 00400000 ################################################################
2263 12:29:13.842983
2264 12:29:14.556301 00480000 ################################################################
2265 12:29:14.556936
2266 12:29:15.248648 00500000 ################################################################
2267 12:29:15.249169
2268 12:29:15.942641 00580000 ################################################################
2269 12:29:15.943240
2270 12:29:16.645375 00600000 ################################################################
2271 12:29:16.645988
2272 12:29:17.112120 00680000 ############################################## done.
2273 12:29:17.112267
2274 12:29:17.115373 The bootfile was 7188368 bytes long.
2275 12:29:17.115471
2276 12:29:17.118632 Sending tftp read request... done.
2277 12:29:17.118716
2278 12:29:17.121612 Waiting for the transfer...
2279 12:29:17.121697
2280 12:29:17.810368 00000000 ################################################################
2281 12:29:17.810946
2282 12:29:18.466327 00080000 ################################################################
2283 12:29:18.466470
2284 12:29:19.018588 00100000 ################################################################
2285 12:29:19.018747
2286 12:29:19.559994 00180000 ################################################################
2287 12:29:19.560156
2288 12:29:20.113696 00200000 ################################################################
2289 12:29:20.113854
2290 12:29:20.667457 00280000 ################################################################
2291 12:29:20.667599
2292 12:29:21.246684 00300000 ################################################################
2293 12:29:21.246848
2294 12:29:21.833406 00380000 ################################################################
2295 12:29:21.833589
2296 12:29:22.422611 00400000 ################################################################
2297 12:29:22.422764
2298 12:29:23.010600 00480000 ################################################################
2299 12:29:23.010751
2300 12:29:23.304282 00500000 ################################ done.
2301 12:29:23.304436
2302 12:29:23.307932 Sending tftp read request... done.
2303 12:29:23.308018
2304 12:29:23.310849 Waiting for the transfer...
2305 12:29:23.310933
2306 12:29:23.310999 00000000 # done.
2307 12:29:23.311061
2308 12:29:23.320972 Command line loaded dynamically from TFTP file: 8193669/tftp-deploy-xj_e7o4g/kernel/cmdline
2309 12:29:23.321085
2310 12:29:23.343897 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8193669/extract-nfsrootfs-hwfgsun0,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2311 12:29:23.343992
2312 12:29:23.347063 Shutting down all USB controllers.
2313 12:29:23.350345
2314 12:29:23.350429 Removing current net device
2315 12:29:23.350494
2316 12:29:23.353459 Finalizing coreboot
2317 12:29:23.353585
2318 12:29:23.360453 Exiting depthcharge with code 4 at timestamp: 26460405
2319 12:29:23.360538
2320 12:29:23.360604
2321 12:29:23.360666 Starting kernel ...
2322 12:29:23.360723
2323 12:29:23.360780
2324 12:29:23.360835
2325 12:29:23.361188 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2326 12:29:23.361285 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2327 12:29:23.361360 Setting prompt string to ['Linux version [0-9]']
2328 12:29:23.361430 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2329 12:29:23.361505 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2331 12:33:49.361586 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2333 12:33:49.361797 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2335 12:33:49.361955 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2338 12:33:49.362209 end: 2 depthcharge-action (duration 00:05:00) [common]
2340 12:33:49.362430 Cleaning after the job
2341 12:33:49.362515 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/ramdisk
2342 12:33:49.362985 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/kernel
2343 12:33:49.363520 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/nfsrootfs
2344 12:33:49.396021 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193669/tftp-deploy-xj_e7o4g/modules
2345 12:33:49.396327 start: 5.1 power-off (timeout 00:00:30) [common]
2346 12:33:49.396492 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2347 12:33:49.417354 >> Command sent successfully.
2348 12:33:49.419588 Returned 0 in 0 seconds
2349 12:33:49.520337 end: 5.1 power-off (duration 00:00:00) [common]
2351 12:33:49.520657 start: 5.2 read-feedback (timeout 00:10:00) [common]
2352 12:33:49.520893 Listened to connection for namespace 'common' for up to 1s
2353 12:33:50.525674 Finalising connection for namespace 'common'
2354 12:33:50.526284 Disconnecting from shell: Finalise
2355 12:33:50.627398 end: 5.2 read-feedback (duration 00:00:01) [common]
2356 12:33:50.627548 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8193669
2357 12:33:50.722511 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8193669
2358 12:33:50.722689 JobError: Your job cannot terminate cleanly.