Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 12:28:37.537291 lava-dispatcher, installed at version: 2022.10
2 12:28:37.537479 start: 0 validate
3 12:28:37.537642 Start time: 2022-12-01 12:28:37.537635+00:00 (UTC)
4 12:28:37.537757 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:28:37.537877 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221125.0%2Famd64%2Finitrd.cpio.gz exists
6 12:28:37.830114 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:28:37.830824 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:28:39.841812 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:28:39.842493 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221125.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:28:40.137841 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:28:40.138006 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip71-rt41%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:28:40.140903 validate duration: 2.60
14 12:28:40.141152 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:28:40.141254 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:28:40.141342 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:28:40.141442 Not decompressing ramdisk as can be used compressed.
18 12:28:40.141523 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221125.0/amd64/initrd.cpio.gz
19 12:28:40.141587 saving as /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/ramdisk/initrd.cpio.gz
20 12:28:40.141648 total size: 5431595 (5MB)
21 12:28:40.145078 progress 0% (0MB)
22 12:28:40.151959 progress 5% (0MB)
23 12:28:40.158054 progress 10% (0MB)
24 12:28:40.165783 progress 15% (0MB)
25 12:28:40.176931 progress 20% (1MB)
26 12:28:40.183969 progress 25% (1MB)
27 12:28:40.193412 progress 30% (1MB)
28 12:28:40.204205 progress 35% (1MB)
29 12:28:40.213012 progress 40% (2MB)
30 12:28:40.221097 progress 45% (2MB)
31 12:28:40.230504 progress 50% (2MB)
32 12:28:40.240296 progress 55% (2MB)
33 12:28:40.249507 progress 60% (3MB)
34 12:28:40.258512 progress 65% (3MB)
35 12:28:40.267135 progress 70% (3MB)
36 12:28:40.276344 progress 75% (3MB)
37 12:28:40.285734 progress 80% (4MB)
38 12:28:40.293795 progress 85% (4MB)
39 12:28:40.304356 progress 90% (4MB)
40 12:28:40.312785 progress 95% (4MB)
41 12:28:40.321243 progress 100% (5MB)
42 12:28:40.321515 5MB downloaded in 0.18s (28.80MB/s)
43 12:28:40.321671 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:28:40.321921 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:28:40.322010 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:28:40.322100 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:28:40.322208 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:28:40.322279 saving as /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/kernel/bzImage
50 12:28:40.322343 total size: 7188368 (6MB)
51 12:28:40.322404 No compression specified
52 12:28:40.337728 progress 0% (0MB)
53 12:28:40.365818 progress 5% (0MB)
54 12:28:40.380906 progress 10% (0MB)
55 12:28:40.394986 progress 15% (1MB)
56 12:28:40.409016 progress 20% (1MB)
57 12:28:40.423246 progress 25% (1MB)
58 12:28:40.435834 progress 30% (2MB)
59 12:28:40.449616 progress 35% (2MB)
60 12:28:40.464238 progress 40% (2MB)
61 12:28:40.478430 progress 45% (3MB)
62 12:28:40.493088 progress 50% (3MB)
63 12:28:40.504513 progress 55% (3MB)
64 12:28:40.525531 progress 60% (4MB)
65 12:28:40.547847 progress 65% (4MB)
66 12:28:40.562821 progress 70% (4MB)
67 12:28:40.577062 progress 75% (5MB)
68 12:28:40.592479 progress 80% (5MB)
69 12:28:40.612299 progress 85% (5MB)
70 12:28:40.632503 progress 90% (6MB)
71 12:28:40.658293 progress 95% (6MB)
72 12:28:40.678253 progress 100% (6MB)
73 12:28:40.678505 6MB downloaded in 0.36s (19.25MB/s)
74 12:28:40.678664 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:28:40.678944 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:28:40.679039 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:28:40.679126 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:28:40.679235 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221125.0/amd64/full.rootfs.tar.xz
80 12:28:40.679302 saving as /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/nfsrootfs/full.rootfs.tar
81 12:28:40.679366 total size: 123582912 (117MB)
82 12:28:40.679450 Using unxz to decompress xz
83 12:28:40.695795 progress 0% (0MB)
84 12:28:41.150038 progress 5% (5MB)
85 12:28:41.604757 progress 10% (11MB)
86 12:28:42.064216 progress 15% (17MB)
87 12:28:42.530841 progress 20% (23MB)
88 12:28:42.864590 progress 25% (29MB)
89 12:28:43.209531 progress 30% (35MB)
90 12:28:43.474289 progress 35% (41MB)
91 12:28:43.652662 progress 40% (47MB)
92 12:28:44.016303 progress 45% (53MB)
93 12:28:44.378066 progress 50% (58MB)
94 12:28:44.717499 progress 55% (64MB)
95 12:28:45.071258 progress 60% (70MB)
96 12:28:45.404350 progress 65% (76MB)
97 12:28:45.785024 progress 70% (82MB)
98 12:28:46.185672 progress 75% (88MB)
99 12:28:46.598407 progress 80% (94MB)
100 12:28:46.717845 progress 85% (100MB)
101 12:28:46.880280 progress 90% (106MB)
102 12:28:47.207208 progress 95% (111MB)
103 12:28:47.572433 progress 100% (117MB)
104 12:28:47.578029 117MB downloaded in 6.90s (17.08MB/s)
105 12:28:47.578294 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:28:47.578553 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:28:47.578642 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:28:47.578729 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:28:47.578836 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip71-rt41/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:28:47.578933 saving as /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/modules/modules.tar
112 12:28:47.579009 total size: 54724 (0MB)
113 12:28:47.579072 Using unxz to decompress xz
114 12:28:47.584084 progress 59% (0MB)
115 12:28:47.584465 progress 100% (0MB)
116 12:28:47.587960 0MB downloaded in 0.01s (5.84MB/s)
117 12:28:47.588183 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:28:47.588440 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:28:47.588534 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 12:28:47.588627 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 12:28:49.299743 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8193656/extract-nfsrootfs-_rs2kkei
123 12:28:49.299946 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:28:49.300048 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 12:28:49.300184 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6
126 12:28:49.300284 makedir: /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin
127 12:28:49.300367 makedir: /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/tests
128 12:28:49.300453 makedir: /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/results
129 12:28:49.300549 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-add-keys
130 12:28:49.300677 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-add-sources
131 12:28:49.300790 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-background-process-start
132 12:28:49.300902 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-background-process-stop
133 12:28:49.301012 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-common-functions
134 12:28:49.301122 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-echo-ipv4
135 12:28:49.301232 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-install-packages
136 12:28:49.301342 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-installed-packages
137 12:28:49.301450 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-os-build
138 12:28:49.301557 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-probe-channel
139 12:28:49.301700 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-probe-ip
140 12:28:49.301808 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-target-ip
141 12:28:49.301915 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-target-mac
142 12:28:49.302023 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-target-storage
143 12:28:49.302134 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-test-case
144 12:28:49.302243 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-test-event
145 12:28:49.302350 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-test-feedback
146 12:28:49.302456 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-test-raise
147 12:28:49.302562 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-test-reference
148 12:28:49.302669 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-test-runner
149 12:28:49.302776 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-test-set
150 12:28:49.303065 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-test-shell
151 12:28:49.303179 Updating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-install-packages (oe)
152 12:28:49.303299 Updating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/bin/lava-installed-packages (oe)
153 12:28:49.303396 Creating /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/environment
154 12:28:49.303483 LAVA metadata
155 12:28:49.303555 - LAVA_JOB_ID=8193656
156 12:28:49.303652 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:28:49.303750 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 12:28:49.303814 skipped lava-vland-overlay
159 12:28:49.303889 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:28:49.303971 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 12:28:49.304032 skipped lava-multinode-overlay
162 12:28:49.304105 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:28:49.304184 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 12:28:49.304254 Loading test definitions
165 12:28:49.304341 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 12:28:49.304412 Using /lava-8193656 at stage 0
167 12:28:49.304504 Fetching tests from https://github.com/kernelci/test-definitions
168 12:28:49.304581 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/0/tests/0_ltp-ipc'
169 12:28:53.420234 Running '/usr/bin/git checkout kernelci.org
170 12:28:53.559840 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 12:28:53.560568 uuid=8193656_1.5.2.3.1 testdef=None
172 12:28:53.560764 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 12:28:53.561007 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 12:28:53.561779 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 12:28:53.562008 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 12:28:53.563019 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 12:28:53.563260 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 12:28:53.564193 runner path: /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/0/tests/0_ltp-ipc test_uuid 8193656_1.5.2.3.1
182 12:28:53.564283 SKIPFILE='skipfile-lkft.yaml'
183 12:28:53.564346 SKIP_INSTALL='true'
184 12:28:53.564405 TST_CMDFILES='ipc'
185 12:28:53.564536 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 12:28:53.564745 Creating lava-test-runner.conf files
188 12:28:53.564807 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8193656/lava-overlay-dyxndfh6/lava-8193656/0 for stage 0
189 12:28:53.564888 - 0_ltp-ipc
190 12:28:53.564981 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
191 12:28:53.565068 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
192 12:29:00.869450 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 12:29:00.869609 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
194 12:29:00.869703 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 12:29:00.869804 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
196 12:29:00.869895 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
197 12:29:00.970581 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 12:29:00.970946 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
199 12:29:00.971071 extracting modules file /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8193656/extract-nfsrootfs-_rs2kkei
200 12:29:00.975340 extracting modules file /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8193656/extract-overlay-ramdisk-zvz7e066/ramdisk
201 12:29:00.979272 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 12:29:00.979378 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
203 12:29:00.979461 [common] Applying overlay to NFS
204 12:29:00.979531 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8193656/compress-overlay-0m3_nn1l/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8193656/extract-nfsrootfs-_rs2kkei
205 12:29:01.430574 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 12:29:01.430736 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
207 12:29:01.430833 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 12:29:01.430950 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
209 12:29:01.431054 Building ramdisk /var/lib/lava/dispatcher/tmp/8193656/extract-overlay-ramdisk-zvz7e066/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8193656/extract-overlay-ramdisk-zvz7e066/ramdisk
210 12:29:01.463655 >> 24582 blocks
211 12:29:01.923841 rename /var/lib/lava/dispatcher/tmp/8193656/extract-overlay-ramdisk-zvz7e066/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/ramdisk/ramdisk.cpio.gz
212 12:29:01.924231 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 12:29:01.924351 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
214 12:29:01.924444 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
215 12:29:01.924539 No mkimage arch provided, not using FIT.
216 12:29:01.924631 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 12:29:01.924710 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 12:29:01.924806 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 12:29:01.924896 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
220 12:29:01.924974 No LXC device requested
221 12:29:01.925056 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 12:29:01.925142 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
223 12:29:01.925224 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 12:29:01.925296 Checking files for TFTP limit of 4294967296 bytes.
225 12:29:01.925671 end: 1 tftp-deploy (duration 00:00:22) [common]
226 12:29:01.925777 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 12:29:01.925911 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 12:29:01.926035 substitutions:
229 12:29:01.926102 - {DTB}: None
230 12:29:01.926166 - {INITRD}: 8193656/tftp-deploy-zyb_zyzi/ramdisk/ramdisk.cpio.gz
231 12:29:01.926227 - {KERNEL}: 8193656/tftp-deploy-zyb_zyzi/kernel/bzImage
232 12:29:01.926284 - {LAVA_MAC}: None
233 12:29:01.926341 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8193656/extract-nfsrootfs-_rs2kkei
234 12:29:01.926399 - {NFS_SERVER_IP}: 192.168.201.1
235 12:29:01.926455 - {PRESEED_CONFIG}: None
236 12:29:01.926510 - {PRESEED_LOCAL}: None
237 12:29:01.926565 - {RAMDISK}: 8193656/tftp-deploy-zyb_zyzi/ramdisk/ramdisk.cpio.gz
238 12:29:01.926620 - {ROOT_PART}: None
239 12:29:01.926675 - {ROOT}: None
240 12:29:01.926729 - {SERVER_IP}: 192.168.201.1
241 12:29:01.926783 - {TEE}: None
242 12:29:01.926839 Parsed boot commands:
243 12:29:01.926918 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 12:29:01.927085 Parsed boot commands: tftpboot 192.168.201.1 8193656/tftp-deploy-zyb_zyzi/kernel/bzImage 8193656/tftp-deploy-zyb_zyzi/kernel/cmdline 8193656/tftp-deploy-zyb_zyzi/ramdisk/ramdisk.cpio.gz
245 12:29:01.927173 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 12:29:01.927257 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 12:29:01.927348 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 12:29:01.927452 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 12:29:01.927533 Not connected, no need to disconnect.
250 12:29:01.927610 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 12:29:01.927691 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 12:29:01.927757 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
253 12:29:01.930596 Setting prompt string to ['lava-test: # ']
254 12:29:01.930949 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 12:29:01.931065 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 12:29:01.931166 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 12:29:01.931258 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 12:29:01.931429 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
259 12:29:01.950298 >> Command sent successfully.
260 12:29:01.952215 Returned 0 in 0 seconds
261 12:29:02.053441 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 12:29:02.054743 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 12:29:02.055248 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 12:29:02.055664 Setting prompt string to 'Starting depthcharge on Voema...'
266 12:29:02.055978 Changing prompt to 'Starting depthcharge on Voema...'
267 12:29:02.056313 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 12:29:02.057421 [Enter `^Ec?' for help]
269 12:29:09.786224
270 12:29:09.786374
271 12:29:09.796650 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 12:29:09.799581 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
273 12:29:09.806735 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 12:29:09.809699 CPU: AES supported, TXT NOT supported, VT supported
275 12:29:09.816262 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 12:29:09.819648 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 12:29:09.822917
278 12:29:09.826534 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
279 12:29:09.829728 VBOOT: Loading verstage.
280 12:29:09.833047 FMAP: Found "FLASH" version 1.1 at 0x1804000.
281 12:29:09.839688 FMAP: base = 0x0 size = 0x2000000 #areas = 32
282 12:29:09.843051 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 12:29:09.853419 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
284 12:29:09.860019 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
285 12:29:09.860105
286 12:29:09.860172
287 12:29:09.873393 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
288 12:29:09.886991 Probing TPM: . done!
289 12:29:09.890268 TPM ready after 0 ms
290 12:29:09.893749 Connected to device vid:did:rid of 1ae0:0028:00
291 12:29:09.904748 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
292 12:29:09.911951 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
293 12:29:09.914857 Initialized TPM device CR50 revision 0
294 12:29:09.966450 tlcl_send_startup: Startup return code is 0
295 12:29:09.966555 TPM: setup succeeded
296 12:29:09.981725 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
297 12:29:09.996158 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
298 12:29:10.008933 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
299 12:29:10.019108 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
300 12:29:10.023066 Chrome EC: UHEPI supported
301 12:29:10.026806 Phase 1
302 12:29:10.029728 FMAP: area GBB found @ 1805000 (458752 bytes)
303 12:29:10.039642 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
304 12:29:10.046685 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
305 12:29:10.053366 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
306 12:29:10.059609 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
307 12:29:10.062537 Recovery requested (1009000e)
308 12:29:10.066211 TPM: Extending digest for VBOOT: boot mode into PCR 0
309 12:29:10.077784 tlcl_extend: response is 0
310 12:29:10.084296 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
311 12:29:10.094115 tlcl_extend: response is 0
312 12:29:10.100962 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
313 12:29:10.107982 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
314 12:29:10.114373 BS: verstage times (exec / console): total (unknown) / 142 ms
315 12:29:10.114471
316 12:29:10.114554
317 12:29:10.127807 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
318 12:29:10.134624 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
319 12:29:10.137518 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
320 12:29:10.141125 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
321 12:29:10.147207 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
322 12:29:10.150718 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
323 12:29:10.154118 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
324 12:29:10.157404 TCO_STS: 0000 0000
325 12:29:10.160625 GEN_PMCON: d0015038 00002200
326 12:29:10.164100 GBLRST_CAUSE: 00000000 00000000
327 12:29:10.164172 HPR_CAUSE0: 00000000
328 12:29:10.166976 prev_sleep_state 5
329 12:29:10.170438 Boot Count incremented to 12691
330 12:29:10.177050 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
331 12:29:10.183918 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
332 12:29:10.190312 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
333 12:29:10.197173 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
334 12:29:10.201833 Chrome EC: UHEPI supported
335 12:29:10.208486 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 12:29:10.221249 Probing TPM: done!
337 12:29:10.228881 Connected to device vid:did:rid of 1ae0:0028:00
338 12:29:10.236230 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
339 12:29:10.246586 Initialized TPM device CR50 revision 0
340 12:29:10.256126 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
341 12:29:10.263126 MRC: Hash idx 0x100b comparison successful.
342 12:29:10.266462 MRC cache found, size faa8
343 12:29:10.266537 bootmode is set to: 2
344 12:29:10.269384 SPD index = 0
345 12:29:10.276274 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
346 12:29:10.279251 SPD: module type is LPDDR4X
347 12:29:10.282641 SPD: module part number is MT53E512M64D4NW-046
348 12:29:10.289554 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
349 12:29:10.292692 SPD: device width 16 bits, bus width 16 bits
350 12:29:10.299253 SPD: module size is 1024 MB (per channel)
351 12:29:10.730406 CBMEM:
352 12:29:10.733935 IMD: root @ 0x76fff000 254 entries.
353 12:29:10.737399 IMD: root @ 0x76ffec00 62 entries.
354 12:29:10.740871 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
355 12:29:10.747276 FMAP: area RW_VPD found @ f35000 (8192 bytes)
356 12:29:10.750630 External stage cache:
357 12:29:10.753658 IMD: root @ 0x7b3ff000 254 entries.
358 12:29:10.757194 IMD: root @ 0x7b3fec00 62 entries.
359 12:29:10.772148 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
360 12:29:10.778944 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
361 12:29:10.785621 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
362 12:29:10.799721 MRC: 'RECOVERY_MRC_CACHE' does not need update.
363 12:29:10.803178 cse_lite: Skip switching to RW in the recovery path
364 12:29:10.806615
365 12:29:10.806702 8 DIMMs found
366 12:29:10.806773 SMM Memory Map
367 12:29:10.810100 SMRAM : 0x7b000000 0x800000
368 12:29:10.813943 Subregion 0: 0x7b000000 0x200000
369 12:29:10.816756 Subregion 1: 0x7b200000 0x200000
370 12:29:10.820235 Subregion 2: 0x7b400000 0x400000
371 12:29:10.823649 top_of_ram = 0x77000000
372 12:29:10.830191 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
373 12:29:10.833595 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
374 12:29:10.839880 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
375 12:29:10.843621 MTRR Range: Start=ff000000 End=0 (Size 1000000)
376 12:29:10.853294 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
377 12:29:10.859831 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
378 12:29:10.870100 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
379 12:29:10.873009 Processing 211 relocs. Offset value of 0x74c0b000
380 12:29:10.882593 BS: romstage times (exec / console): total (unknown) / 277 ms
381 12:29:10.888506
382 12:29:10.888591
383 12:29:10.898023 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
384 12:29:10.901832 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 12:29:10.911334 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
386 12:29:10.917984 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
387 12:29:10.924878 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
388 12:29:10.931270 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
389 12:29:10.978877 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
390 12:29:10.985263 Processing 5008 relocs. Offset value of 0x75d98000
391 12:29:10.988212 BS: postcar times (exec / console): total (unknown) / 59 ms
392 12:29:10.988298
393 12:29:10.991784
394 12:29:10.991869
395 12:29:11.002237 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
396 12:29:11.002324 Normal boot
397 12:29:11.005828 FW_CONFIG value is 0x804c02
398 12:29:11.008690 PCI: 00:07.0 disabled by fw_config
399 12:29:11.012294 PCI: 00:07.1 disabled by fw_config
400 12:29:11.015561 PCI: 00:0d.2 disabled by fw_config
401 12:29:11.018549 PCI: 00:1c.7 disabled by fw_config
402 12:29:11.025348 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
403 12:29:11.032240 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
404 12:29:11.035800 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
405 12:29:11.038788 GENERIC: 0.0 disabled by fw_config
406 12:29:11.041871 GENERIC: 1.0 disabled by fw_config
407 12:29:11.048911 fw_config match found: DB_USB=USB3_ACTIVE
408 12:29:11.051838 fw_config match found: DB_USB=USB3_ACTIVE
409 12:29:11.055502 fw_config match found: DB_USB=USB3_ACTIVE
410 12:29:11.058800 fw_config match found: DB_USB=USB3_ACTIVE
411 12:29:11.061808
412 12:29:11.065341 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
413 12:29:11.072129 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
414 12:29:11.082005 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
415 12:29:11.088144 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
416 12:29:11.091506 microcode: sig=0x806c1 pf=0x80 revision=0x86
417 12:29:11.098173 microcode: Update skipped, already up-to-date
418 12:29:11.105052 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
419 12:29:11.132066 Detected 4 core, 8 thread CPU.
420 12:29:11.135698 Setting up SMI for CPU
421 12:29:11.138686 IED base = 0x7b400000
422 12:29:11.138770 IED size = 0x00400000
423 12:29:11.142056 Will perform SMM setup.
424 12:29:11.148586 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
425 12:29:11.155361 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
426 12:29:11.162301 Processing 16 relocs. Offset value of 0x00030000
427 12:29:11.165416 Attempting to start 7 APs
428 12:29:11.168994 Waiting for 10ms after sending INIT.
429 12:29:11.184119 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
430 12:29:11.184204 done.
431 12:29:11.187718 AP: slot 7 apic_id 4.
432 12:29:11.190768 AP: slot 6 apic_id 2.
433 12:29:11.190852 AP: slot 2 apic_id 3.
434 12:29:11.194552 AP: slot 4 apic_id 7.
435 12:29:11.197586 AP: slot 5 apic_id 6.
436 12:29:11.201037 Waiting for 2nd SIPI to complete...done.
437 12:29:11.204008 AP: slot 3 apic_id 5.
438 12:29:11.210845 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
439 12:29:11.217386 Processing 13 relocs. Offset value of 0x00038000
440 12:29:11.217472 Unable to locate Global NVS
441 12:29:11.220584
442 12:29:11.227239 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
443 12:29:11.230623 Installing permanent SMM handler to 0x7b000000
444 12:29:11.240912 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
445 12:29:11.243901 Processing 794 relocs. Offset value of 0x7b010000
446 12:29:11.254404 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
447 12:29:11.257223 Processing 13 relocs. Offset value of 0x7b008000
448 12:29:11.263737 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
449 12:29:11.270333 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
450 12:29:11.273957 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
451 12:29:11.280261 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
452 12:29:11.286948 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
453 12:29:11.293724 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
454 12:29:11.300494 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
455 12:29:11.300579 Unable to locate Global NVS
456 12:29:11.310417 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
457 12:29:11.313668 Clearing SMI status registers
458 12:29:11.313753 SMI_STS: PM1
459 12:29:11.317194 PM1_STS: PWRBTN
460 12:29:11.323324 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
461 12:29:11.327296 In relocation handler: CPU 0
462 12:29:11.330143 New SMBASE=0x7b000000 IEDBASE=0x7b400000
463 12:29:11.337056 Writing SMRR. base = 0x7b000006, mask=0xff800c00
464 12:29:11.337142 Relocation complete.
465 12:29:11.346830 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
466 12:29:11.346953 In relocation handler: CPU 1
467 12:29:11.353305 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
468 12:29:11.353391 Relocation complete.
469 12:29:11.363335 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
470 12:29:11.363421 In relocation handler: CPU 7
471 12:29:11.369834 New SMBASE=0x7affe400 IEDBASE=0x7b400000
472 12:29:11.373349 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 12:29:11.376686 Relocation complete.
474 12:29:11.383221 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
475 12:29:11.387070 In relocation handler: CPU 3
476 12:29:11.389906 New SMBASE=0x7afff400 IEDBASE=0x7b400000
477 12:29:11.393841 Relocation complete.
478 12:29:11.400097 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
479 12:29:11.403054 In relocation handler: CPU 6
480 12:29:11.407012 New SMBASE=0x7affe800 IEDBASE=0x7b400000
481 12:29:11.413008 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 12:29:11.413093 Relocation complete.
483 12:29:11.420037 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
484 12:29:11.422940 In relocation handler: CPU 2
485 12:29:11.429734 New SMBASE=0x7afff800 IEDBASE=0x7b400000
486 12:29:11.429820 Relocation complete.
487 12:29:11.436600 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
488 12:29:11.440102 In relocation handler: CPU 4
489 12:29:11.443020 New SMBASE=0x7afff000 IEDBASE=0x7b400000
490 12:29:11.446048
491 12:29:11.446134 Relocation complete.
492 12:29:11.453622 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
493 12:29:11.456023 In relocation handler: CPU 5
494 12:29:11.459720 New SMBASE=0x7affec00 IEDBASE=0x7b400000
495 12:29:11.466085 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 12:29:11.469782 Relocation complete.
497 12:29:11.469866 Initializing CPU #0
498 12:29:11.473649 CPU: vendor Intel device 806c1
499 12:29:11.477151 CPU: family 06, model 8c, stepping 01
500 12:29:11.480722 Clearing out pending MCEs
501 12:29:11.484010 Setting up local APIC...
502 12:29:11.484096 apic_id: 0x00 done.
503 12:29:11.487535 Turbo is available but hidden
504 12:29:11.490631 Turbo is available and visible
505 12:29:11.497037 microcode: Update skipped, already up-to-date
506 12:29:11.497115 CPU #0 initialized
507 12:29:11.500478 Initializing CPU #1
508 12:29:11.500549 Initializing CPU #5
509 12:29:11.503909 Initializing CPU #4
510 12:29:11.507140 CPU: vendor Intel device 806c1
511 12:29:11.510260 CPU: family 06, model 8c, stepping 01
512 12:29:11.513590 CPU: vendor Intel device 806c1
513 12:29:11.517100 CPU: family 06, model 8c, stepping 01
514 12:29:11.520481 Clearing out pending MCEs
515 12:29:11.523384 Clearing out pending MCEs
516 12:29:11.526774 Setting up local APIC...
517 12:29:11.526863 Initializing CPU #7
518 12:29:11.530205 Initializing CPU #3
519 12:29:11.533481 CPU: vendor Intel device 806c1
520 12:29:11.537123 CPU: family 06, model 8c, stepping 01
521 12:29:11.540373 CPU: vendor Intel device 806c1
522 12:29:11.543463 CPU: family 06, model 8c, stepping 01
523 12:29:11.547026 Clearing out pending MCEs
524 12:29:11.549997 Clearing out pending MCEs
525 12:29:11.550070 Setting up local APIC...
526 12:29:11.553612 Setting up local APIC...
527 12:29:11.556797 apic_id: 0x07 done.
528 12:29:11.556869 apic_id: 0x06 done.
529 12:29:11.563373 microcode: Update skipped, already up-to-date
530 12:29:11.566837 microcode: Update skipped, already up-to-date
531 12:29:11.570298 CPU #4 initialized
532 12:29:11.570369 CPU #5 initialized
533 12:29:11.573534 Initializing CPU #6
534 12:29:11.576973 Initializing CPU #2
535 12:29:11.579924 CPU: vendor Intel device 806c1
536 12:29:11.582900 CPU: family 06, model 8c, stepping 01
537 12:29:11.586415 CPU: vendor Intel device 806c1
538 12:29:11.589923 CPU: family 06, model 8c, stepping 01
539 12:29:11.593207 Clearing out pending MCEs
540 12:29:11.596804 CPU: vendor Intel device 806c1
541 12:29:11.599685 CPU: family 06, model 8c, stepping 01
542 12:29:11.603140 Setting up local APIC...
543 12:29:11.603214 apic_id: 0x04 done.
544 12:29:11.606616 Setting up local APIC...
545 12:29:11.609581 Clearing out pending MCEs
546 12:29:11.609655 apic_id: 0x02 done.
547 12:29:11.613260 Setting up local APIC...
548 12:29:11.616190 apic_id: 0x05 done.
549 12:29:11.619736 microcode: Update skipped, already up-to-date
550 12:29:11.626400 microcode: Update skipped, already up-to-date
551 12:29:11.626478 CPU #7 initialized
552 12:29:11.629300 CPU #3 initialized
553 12:29:11.633051 microcode: Update skipped, already up-to-date
554 12:29:11.636644 apic_id: 0x03 done.
555 12:29:11.636715 CPU #6 initialized
556 12:29:11.642849 microcode: Update skipped, already up-to-date
557 12:29:11.646525 Clearing out pending MCEs
558 12:29:11.646596 CPU #2 initialized
559 12:29:11.649489 Setting up local APIC...
560 12:29:11.653006 apic_id: 0x01 done.
561 12:29:11.656430 microcode: Update skipped, already up-to-date
562 12:29:11.659317 CPU #1 initialized
563 12:29:11.662766 bsp_do_flight_plan done after 457 msecs.
564 12:29:11.666438 CPU: frequency set to 4000 MHz
565 12:29:11.666507 Enabling SMIs.
566 12:29:11.672868 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
567 12:29:11.689470 SATAXPCIE1 indicates PCIe NVMe is present
568 12:29:11.692614 Probing TPM: done!
569 12:29:11.696216 Connected to device vid:did:rid of 1ae0:0028:00
570 12:29:11.706555 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
571 12:29:11.709865 Initialized TPM device CR50 revision 0
572 12:29:11.713332 Enabling S0i3.4
573 12:29:11.719984 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
574 12:29:11.723778 Found a VBT of 8704 bytes after decompression
575 12:29:11.729655 cse_lite: CSE RO boot. HybridStorageMode disabled
576 12:29:11.736410 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
577 12:29:11.812251 FSPS returned 0
578 12:29:11.815486 Executing Phase 1 of FspMultiPhaseSiInit
579 12:29:11.825265 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
580 12:29:11.828933 port C0 DISC req: usage 1 usb3 1 usb2 5
581 12:29:11.831995 Raw Buffer output 0 00000511
582 12:29:11.835134 Raw Buffer output 1 00000000
583 12:29:11.839345 pmc_send_ipc_cmd succeeded
584 12:29:11.842649 port C1 DISC req: usage 1 usb3 2 usb2 3
585 12:29:11.845706
586 12:29:11.845779 Raw Buffer output 0 00000321
587 12:29:11.849130 Raw Buffer output 1 00000000
588 12:29:11.853409 pmc_send_ipc_cmd succeeded
589 12:29:11.858725 Detected 4 core, 8 thread CPU.
590 12:29:11.861581 Detected 4 core, 8 thread CPU.
591 12:29:12.095358 Display FSP Version Info HOB
592 12:29:12.098513 Reference Code - CPU = a.0.4c.31
593 12:29:12.101895 uCode Version = 0.0.0.86
594 12:29:12.105448 TXT ACM version = ff.ff.ff.ffff
595 12:29:12.108738 Reference Code - ME = a.0.4c.31
596 12:29:12.112237 MEBx version = 0.0.0.0
597 12:29:12.115684 ME Firmware Version = Consumer SKU
598 12:29:12.118550 Reference Code - PCH = a.0.4c.31
599 12:29:12.121893 PCH-CRID Status = Disabled
600 12:29:12.125459 PCH-CRID Original Value = ff.ff.ff.ffff
601 12:29:12.128920 PCH-CRID New Value = ff.ff.ff.ffff
602 12:29:12.131769 OPROM - RST - RAID = ff.ff.ff.ffff
603 12:29:12.135227 PCH Hsio Version = 4.0.0.0
604 12:29:12.138795 Reference Code - SA - System Agent = a.0.4c.31
605 12:29:12.141667 Reference Code - MRC = 2.0.0.1
606 12:29:12.145118 SA - PCIe Version = a.0.4c.31
607 12:29:12.148576 SA-CRID Status = Disabled
608 12:29:12.152236 SA-CRID Original Value = 0.0.0.1
609 12:29:12.155374 SA-CRID New Value = 0.0.0.1
610 12:29:12.158326 OPROM - VBIOS = ff.ff.ff.ffff
611 12:29:12.161854 IO Manageability Engine FW Version = 11.1.4.0
612 12:29:12.165259 PHY Build Version = 0.0.0.e0
613 12:29:12.168803 Thunderbolt(TM) FW Version = 0.0.0.0
614 12:29:12.175254 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
615 12:29:12.178662 ITSS IRQ Polarities Before:
616 12:29:12.178734 IPC0: 0xffffffff
617 12:29:12.182199 IPC1: 0xffffffff
618 12:29:12.182272 IPC2: 0xffffffff
619 12:29:12.185054 IPC3: 0xffffffff
620 12:29:12.188745 ITSS IRQ Polarities After:
621 12:29:12.188813 IPC0: 0xffffffff
622 12:29:12.191600 IPC1: 0xffffffff
623 12:29:12.191667 IPC2: 0xffffffff
624 12:29:12.195165 IPC3: 0xffffffff
625 12:29:12.198790 Found PCIe Root Port #9 at PCI: 00:1d.0.
626 12:29:12.211759 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
627 12:29:12.221722 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
628 12:29:12.234994 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
629 12:29:12.242065 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
630 12:29:12.242146 Enumerating buses...
631 12:29:12.248561 Show all devs... Before device enumeration.
632 12:29:12.248640 Root Device: enabled 1
633 12:29:12.251403 DOMAIN: 0000: enabled 1
634 12:29:12.254755 CPU_CLUSTER: 0: enabled 1
635 12:29:12.258509 PCI: 00:00.0: enabled 1
636 12:29:12.258587 PCI: 00:02.0: enabled 1
637 12:29:12.262110 PCI: 00:04.0: enabled 1
638 12:29:12.265121 PCI: 00:05.0: enabled 1
639 12:29:12.268727 PCI: 00:06.0: enabled 0
640 12:29:12.268796 PCI: 00:07.0: enabled 0
641 12:29:12.271607 PCI: 00:07.1: enabled 0
642 12:29:12.275088 PCI: 00:07.2: enabled 0
643 12:29:12.278122 PCI: 00:07.3: enabled 0
644 12:29:12.278192 PCI: 00:08.0: enabled 1
645 12:29:12.281758 PCI: 00:09.0: enabled 0
646 12:29:12.284905 PCI: 00:0a.0: enabled 0
647 12:29:12.288015 PCI: 00:0d.0: enabled 1
648 12:29:12.288085 PCI: 00:0d.1: enabled 0
649 12:29:12.291625 PCI: 00:0d.2: enabled 0
650 12:29:12.295176 PCI: 00:0d.3: enabled 0
651 12:29:12.295252 PCI: 00:0e.0: enabled 0
652 12:29:12.298078 PCI: 00:10.2: enabled 1
653 12:29:12.301371 PCI: 00:10.6: enabled 0
654 12:29:12.304979 PCI: 00:10.7: enabled 0
655 12:29:12.305059 PCI: 00:12.0: enabled 0
656 12:29:12.307972 PCI: 00:12.6: enabled 0
657 12:29:12.311678 PCI: 00:13.0: enabled 0
658 12:29:12.315099 PCI: 00:14.0: enabled 1
659 12:29:12.315184 PCI: 00:14.1: enabled 0
660 12:29:12.318155 PCI: 00:14.2: enabled 1
661 12:29:12.321481 PCI: 00:14.3: enabled 1
662 12:29:12.324720 PCI: 00:15.0: enabled 1
663 12:29:12.324800 PCI: 00:15.1: enabled 1
664 12:29:12.327780 PCI: 00:15.2: enabled 1
665 12:29:12.331345 PCI: 00:15.3: enabled 1
666 12:29:12.331427 PCI: 00:16.0: enabled 1
667 12:29:12.334809
668 12:29:12.334931 PCI: 00:16.1: enabled 0
669 12:29:12.338086 PCI: 00:16.2: enabled 0
670 12:29:12.341618 PCI: 00:16.3: enabled 0
671 12:29:12.341700 PCI: 00:16.4: enabled 0
672 12:29:12.344965 PCI: 00:16.5: enabled 0
673 12:29:12.348064 PCI: 00:17.0: enabled 1
674 12:29:12.351534 PCI: 00:19.0: enabled 0
675 12:29:12.351616 PCI: 00:19.1: enabled 1
676 12:29:12.354885 PCI: 00:19.2: enabled 0
677 12:29:12.358078 PCI: 00:1c.0: enabled 1
678 12:29:12.361515 PCI: 00:1c.1: enabled 0
679 12:29:12.361602 PCI: 00:1c.2: enabled 0
680 12:29:12.364404 PCI: 00:1c.3: enabled 0
681 12:29:12.367921 PCI: 00:1c.4: enabled 0
682 12:29:12.371540 PCI: 00:1c.5: enabled 0
683 12:29:12.371613 PCI: 00:1c.6: enabled 1
684 12:29:12.375035 PCI: 00:1c.7: enabled 0
685 12:29:12.377673 PCI: 00:1d.0: enabled 1
686 12:29:12.377743 PCI: 00:1d.1: enabled 0
687 12:29:12.381369 PCI: 00:1d.2: enabled 1
688 12:29:12.385004 PCI: 00:1d.3: enabled 0
689 12:29:12.387711 PCI: 00:1e.0: enabled 1
690 12:29:12.387781 PCI: 00:1e.1: enabled 0
691 12:29:12.391310 PCI: 00:1e.2: enabled 1
692 12:29:12.394527 PCI: 00:1e.3: enabled 1
693 12:29:12.398220 PCI: 00:1f.0: enabled 1
694 12:29:12.398290 PCI: 00:1f.1: enabled 0
695 12:29:12.401010 PCI: 00:1f.2: enabled 1
696 12:29:12.404558 PCI: 00:1f.3: enabled 1
697 12:29:12.407991 PCI: 00:1f.4: enabled 0
698 12:29:12.408066 PCI: 00:1f.5: enabled 1
699 12:29:12.411315 PCI: 00:1f.6: enabled 0
700 12:29:12.414251 PCI: 00:1f.7: enabled 0
701 12:29:12.414319 APIC: 00: enabled 1
702 12:29:12.418067 GENERIC: 0.0: enabled 1
703 12:29:12.421043 GENERIC: 0.0: enabled 1
704 12:29:12.424492 GENERIC: 1.0: enabled 1
705 12:29:12.424569 GENERIC: 0.0: enabled 1
706 12:29:12.428038 GENERIC: 1.0: enabled 1
707 12:29:12.431099 USB0 port 0: enabled 1
708 12:29:12.431171 GENERIC: 0.0: enabled 1
709 12:29:12.434527
710 12:29:12.434599 USB0 port 0: enabled 1
711 12:29:12.438074 GENERIC: 0.0: enabled 1
712 12:29:12.441238 I2C: 00:1a: enabled 1
713 12:29:12.441306 I2C: 00:31: enabled 1
714 12:29:12.444452 I2C: 00:32: enabled 1
715 12:29:12.447447 I2C: 00:10: enabled 1
716 12:29:12.447518 I2C: 00:15: enabled 1
717 12:29:12.451019 GENERIC: 0.0: enabled 0
718 12:29:12.454478 GENERIC: 1.0: enabled 0
719 12:29:12.457689 GENERIC: 0.0: enabled 1
720 12:29:12.457764 SPI: 00: enabled 1
721 12:29:12.460678 SPI: 00: enabled 1
722 12:29:12.460750 PNP: 0c09.0: enabled 1
723 12:29:12.464332 GENERIC: 0.0: enabled 1
724 12:29:12.467688 USB3 port 0: enabled 1
725 12:29:12.471423 USB3 port 1: enabled 1
726 12:29:12.471493 USB3 port 2: enabled 0
727 12:29:12.474091 USB3 port 3: enabled 0
728 12:29:12.477598 USB2 port 0: enabled 0
729 12:29:12.477668 USB2 port 1: enabled 1
730 12:29:12.480981 USB2 port 2: enabled 1
731 12:29:12.484837 USB2 port 3: enabled 0
732 12:29:12.484911 USB2 port 4: enabled 1
733 12:29:12.487576
734 12:29:12.487647 USB2 port 5: enabled 0
735 12:29:12.490715 USB2 port 6: enabled 0
736 12:29:12.494224 USB2 port 7: enabled 0
737 12:29:12.494298 USB2 port 8: enabled 0
738 12:29:12.497318 USB2 port 9: enabled 0
739 12:29:12.500787 USB3 port 0: enabled 0
740 12:29:12.500859 USB3 port 1: enabled 1
741 12:29:12.504600 USB3 port 2: enabled 0
742 12:29:12.507460 USB3 port 3: enabled 0
743 12:29:12.511051 GENERIC: 0.0: enabled 1
744 12:29:12.511124 GENERIC: 1.0: enabled 1
745 12:29:12.514271 APIC: 01: enabled 1
746 12:29:12.517504 APIC: 03: enabled 1
747 12:29:12.517576 APIC: 05: enabled 1
748 12:29:12.520937 APIC: 07: enabled 1
749 12:29:12.521018 APIC: 06: enabled 1
750 12:29:12.524151 APIC: 02: enabled 1
751 12:29:12.527487 APIC: 04: enabled 1
752 12:29:12.527560 Compare with tree...
753 12:29:12.531126 Root Device: enabled 1
754 12:29:12.533969 DOMAIN: 0000: enabled 1
755 12:29:12.537501 PCI: 00:00.0: enabled 1
756 12:29:12.537584 PCI: 00:02.0: enabled 1
757 12:29:12.540556 PCI: 00:04.0: enabled 1
758 12:29:12.544650 GENERIC: 0.0: enabled 1
759 12:29:12.547209 PCI: 00:05.0: enabled 1
760 12:29:12.550907 PCI: 00:06.0: enabled 0
761 12:29:12.551003 PCI: 00:07.0: enabled 0
762 12:29:12.554064 GENERIC: 0.0: enabled 1
763 12:29:12.557523 PCI: 00:07.1: enabled 0
764 12:29:12.560674 GENERIC: 1.0: enabled 1
765 12:29:12.563836 PCI: 00:07.2: enabled 0
766 12:29:12.563918 GENERIC: 0.0: enabled 1
767 12:29:12.567419 PCI: 00:07.3: enabled 0
768 12:29:12.570560 GENERIC: 1.0: enabled 1
769 12:29:12.573679 PCI: 00:08.0: enabled 1
770 12:29:12.577577 PCI: 00:09.0: enabled 0
771 12:29:12.577659 PCI: 00:0a.0: enabled 0
772 12:29:12.580576 PCI: 00:0d.0: enabled 1
773 12:29:12.584058 USB0 port 0: enabled 1
774 12:29:12.587301 USB3 port 0: enabled 1
775 12:29:12.590752 USB3 port 1: enabled 1
776 12:29:12.590823 USB3 port 2: enabled 0
777 12:29:12.594264 USB3 port 3: enabled 0
778 12:29:12.597351 PCI: 00:0d.1: enabled 0
779 12:29:12.600480 PCI: 00:0d.2: enabled 0
780 12:29:12.603811 GENERIC: 0.0: enabled 1
781 12:29:12.603883 PCI: 00:0d.3: enabled 0
782 12:29:12.607529
783 12:29:12.607604 PCI: 00:0e.0: enabled 0
784 12:29:12.610792 PCI: 00:10.2: enabled 1
785 12:29:12.613815 PCI: 00:10.6: enabled 0
786 12:29:12.617285 PCI: 00:10.7: enabled 0
787 12:29:12.617356 PCI: 00:12.0: enabled 0
788 12:29:12.620365 PCI: 00:12.6: enabled 0
789 12:29:12.624011 PCI: 00:13.0: enabled 0
790 12:29:12.627220 PCI: 00:14.0: enabled 1
791 12:29:12.630505 USB0 port 0: enabled 1
792 12:29:12.630579 USB2 port 0: enabled 0
793 12:29:12.634104 USB2 port 1: enabled 1
794 12:29:12.636852 USB2 port 2: enabled 1
795 12:29:12.640355 USB2 port 3: enabled 0
796 12:29:12.643650 USB2 port 4: enabled 1
797 12:29:12.647301 USB2 port 5: enabled 0
798 12:29:12.647373 USB2 port 6: enabled 0
799 12:29:12.650712 USB2 port 7: enabled 0
800 12:29:12.653580 USB2 port 8: enabled 0
801 12:29:12.657242 USB2 port 9: enabled 0
802 12:29:12.660143 USB3 port 0: enabled 0
803 12:29:12.663418 USB3 port 1: enabled 1
804 12:29:12.663489 USB3 port 2: enabled 0
805 12:29:12.667020 USB3 port 3: enabled 0
806 12:29:12.670587 PCI: 00:14.1: enabled 0
807 12:29:12.673583 PCI: 00:14.2: enabled 1
808 12:29:12.677059 PCI: 00:14.3: enabled 1
809 12:29:12.677130 GENERIC: 0.0: enabled 1
810 12:29:12.680483 PCI: 00:15.0: enabled 1
811 12:29:12.683667 I2C: 00:1a: enabled 1
812 12:29:12.686900 I2C: 00:31: enabled 1
813 12:29:12.686974 I2C: 00:32: enabled 1
814 12:29:12.690470 PCI: 00:15.1: enabled 1
815 12:29:12.694005 I2C: 00:10: enabled 1
816 12:29:12.696780 PCI: 00:15.2: enabled 1
817 12:29:12.700378 PCI: 00:15.3: enabled 1
818 12:29:12.700450 PCI: 00:16.0: enabled 1
819 12:29:12.703314 PCI: 00:16.1: enabled 0
820 12:29:12.706857 PCI: 00:16.2: enabled 0
821 12:29:12.710465 PCI: 00:16.3: enabled 0
822 12:29:12.713479 PCI: 00:16.4: enabled 0
823 12:29:12.713552 PCI: 00:16.5: enabled 0
824 12:29:12.717836 PCI: 00:17.0: enabled 1
825 12:29:12.721596 PCI: 00:19.0: enabled 0
826 12:29:12.721673 PCI: 00:19.1: enabled 1
827 12:29:12.724479 I2C: 00:15: enabled 1
828 12:29:12.727834 PCI: 00:19.2: enabled 0
829 12:29:12.731205 PCI: 00:1d.0: enabled 1
830 12:29:12.734606 GENERIC: 0.0: enabled 1
831 12:29:12.734680 PCI: 00:1e.0: enabled 1
832 12:29:12.737763 PCI: 00:1e.1: enabled 0
833 12:29:12.740824 PCI: 00:1e.2: enabled 1
834 12:29:12.744325 SPI: 00: enabled 1
835 12:29:12.744396 PCI: 00:1e.3: enabled 1
836 12:29:12.747617 SPI: 00: enabled 1
837 12:29:12.751180 PCI: 00:1f.0: enabled 1
838 12:29:12.754145 PNP: 0c09.0: enabled 1
839 12:29:12.805943 PCI: 00:1f.1: enabled 0
840 12:29:12.806027 PCI: 00:1f.2: enabled 1
841 12:29:12.806092 GENERIC: 0.0: enabled 1
842 12:29:12.806342 GENERIC: 0.0: enabled 1
843 12:29:12.806411 GENERIC: 1.0: enabled 1
844 12:29:12.807262 PCI: 00:1f.3: enabled 1
845 12:29:12.807328 PCI: 00:1f.4: enabled 0
846 12:29:12.807570 PCI: 00:1f.5: enabled 1
847 12:29:12.807633 PCI: 00:1f.6: enabled 0
848 12:29:12.807693 PCI: 00:1f.7: enabled 0
849 12:29:12.807939 CPU_CLUSTER: 0: enabled 1
850 12:29:12.808001 APIC: 00: enabled 1
851 12:29:12.808242 APIC: 01: enabled 1
852 12:29:12.808305 APIC: 03: enabled 1
853 12:29:12.808361 APIC: 05: enabled 1
854 12:29:12.808419 APIC: 07: enabled 1
855 12:29:12.808475 APIC: 06: enabled 1
856 12:29:12.808529 APIC: 02: enabled 1
857 12:29:12.808855 APIC: 04: enabled 1
858 12:29:12.808917 Root Device scanning...
859 12:29:12.856327 scan_static_bus for Root Device
860 12:29:12.856437 DOMAIN: 0000 enabled
861 12:29:12.856526 CPU_CLUSTER: 0 enabled
862 12:29:12.856803 DOMAIN: 0000 scanning...
863 12:29:12.856876 PCI: pci_scan_bus for bus 00
864 12:29:12.856955 PCI: 00:00.0 [8086/0000] ops
865 12:29:12.857036 PCI: 00:00.0 [8086/9a12] enabled
866 12:29:12.857113 PCI: 00:02.0 [8086/0000] bus ops
867 12:29:12.857194 PCI: 00:02.0 [8086/9a40] enabled
868 12:29:12.857466 PCI: 00:04.0 [8086/0000] bus ops
869 12:29:12.857537 PCI: 00:04.0 [8086/9a03] enabled
870 12:29:12.857614 PCI: 00:05.0 [8086/9a19] enabled
871 12:29:12.857692 PCI: 00:07.0 [0000/0000] hidden
872 12:29:12.857765 PCI: 00:08.0 [8086/9a11] enabled
873 12:29:12.857838 PCI: 00:0a.0 [8086/9a0d] disabled
874 12:29:12.858100 PCI: 00:0d.0 [8086/0000] bus ops
875 12:29:12.906743 PCI: 00:0d.0 [8086/9a13] enabled
876 12:29:12.906833 PCI: 00:14.0 [8086/0000] bus ops
877 12:29:12.907154 PCI: 00:14.0 [8086/a0ed] enabled
878 12:29:12.907228 PCI: 00:14.2 [8086/a0ef] enabled
879 12:29:12.907309 PCI: 00:14.3 [8086/0000] bus ops
880 12:29:12.907390 PCI: 00:14.3 [8086/a0f0] enabled
881 12:29:12.907738 PCI: 00:15.0 [8086/0000] bus ops
882 12:29:12.907811 PCI: 00:15.0 [8086/a0e8] enabled
883 12:29:12.908265 PCI: 00:15.1 [8086/0000] bus ops
884 12:29:12.908341 PCI: 00:15.1 [8086/a0e9] enabled
885 12:29:12.908947 PCI: 00:15.2 [8086/0000] bus ops
886 12:29:12.909020 PCI: 00:15.2 [8086/a0ea] enabled
887 12:29:12.909599 PCI: 00:15.3 [8086/0000] bus ops
888 12:29:12.909675 PCI: 00:15.3 [8086/a0eb] enabled
889 12:29:12.910290 PCI: 00:16.0 [8086/0000] ops
890 12:29:12.910362 PCI: 00:16.0 [8086/a0e0] enabled
891 12:29:12.924756 PCI: Static device PCI: 00:17.0 not found, disabling it.
892 12:29:12.925056 PCI: 00:19.0 [8086/0000] bus ops
893 12:29:12.925131 PCI: 00:19.0 [8086/a0c5] disabled
894 12:29:12.928263 PCI: 00:19.1 [8086/0000] bus ops
895 12:29:12.928340 PCI: 00:19.1 [8086/a0c6] enabled
896 12:29:12.931606 PCI: 00:1d.0 [8086/0000] bus ops
897 12:29:12.934455 PCI: 00:1d.0 [8086/a0b0] enabled
898 12:29:12.937843 PCI: 00:1e.0 [8086/0000] ops
899 12:29:12.941342 PCI: 00:1e.0 [8086/a0a8] enabled
900 12:29:12.944401 PCI: 00:1e.2 [8086/0000] bus ops
901 12:29:12.947694 PCI: 00:1e.2 [8086/a0aa] enabled
902 12:29:12.951313 PCI: 00:1e.3 [8086/0000] bus ops
903 12:29:12.954511 PCI: 00:1e.3 [8086/a0ab] enabled
904 12:29:12.957880 PCI: 00:1f.0 [8086/0000] bus ops
905 12:29:12.961455 PCI: 00:1f.0 [8086/a087] enabled
906 12:29:12.961539 RTC Init
907 12:29:12.964410 Set power on after power failure.
908 12:29:12.967933 Disabling Deep S3
909 12:29:12.968017 Disabling Deep S3
910 12:29:12.971118 Disabling Deep S4
911 12:29:12.971202 Disabling Deep S4
912 12:29:12.974639 Disabling Deep S5
913 12:29:12.974722 Disabling Deep S5
914 12:29:12.977610 PCI: 00:1f.2 [0000/0000] hidden
915 12:29:12.981105 PCI: 00:1f.3 [8086/0000] bus ops
916 12:29:12.984482 PCI: 00:1f.3 [8086/a0c8] enabled
917 12:29:12.987718 PCI: 00:1f.5 [8086/0000] bus ops
918 12:29:12.991191 PCI: 00:1f.5 [8086/a0a4] enabled
919 12:29:12.994597 PCI: Leftover static devices:
920 12:29:12.997561 PCI: 00:10.2
921 12:29:12.997646 PCI: 00:10.6
922 12:29:13.001274 PCI: 00:10.7
923 12:29:13.001359 PCI: 00:06.0
924 12:29:13.001425 PCI: 00:07.1
925 12:29:13.004699 PCI: 00:07.2
926 12:29:13.004788 PCI: 00:07.3
927 12:29:13.007745 PCI: 00:09.0
928 12:29:13.007829 PCI: 00:0d.1
929 12:29:13.007895 PCI: 00:0d.2
930 12:29:13.011285
931 12:29:13.011369 PCI: 00:0d.3
932 12:29:13.011435 PCI: 00:0e.0
933 12:29:13.014351 PCI: 00:12.0
934 12:29:13.014435 PCI: 00:12.6
935 12:29:13.017814 PCI: 00:13.0
936 12:29:13.017899 PCI: 00:14.1
937 12:29:13.017964 PCI: 00:16.1
938 12:29:13.020894 PCI: 00:16.2
939 12:29:13.020979 PCI: 00:16.3
940 12:29:13.024246 PCI: 00:16.4
941 12:29:13.024331 PCI: 00:16.5
942 12:29:13.024396 PCI: 00:17.0
943 12:29:13.027830 PCI: 00:19.2
944 12:29:13.027915 PCI: 00:1e.1
945 12:29:13.031244 PCI: 00:1f.1
946 12:29:13.031328 PCI: 00:1f.4
947 12:29:13.031394 PCI: 00:1f.6
948 12:29:13.034527
949 12:29:13.034612 PCI: 00:1f.7
950 12:29:13.037908 PCI: Check your devicetree.cb.
951 12:29:13.040749 PCI: 00:02.0 scanning...
952 12:29:13.044489 scan_generic_bus for PCI: 00:02.0
953 12:29:13.047326 scan_generic_bus for PCI: 00:02.0 done
954 12:29:13.050827 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 12:29:13.054159 PCI: 00:04.0 scanning...
956 12:29:13.057705 scan_generic_bus for PCI: 00:04.0
957 12:29:13.061120 GENERIC: 0.0 enabled
958 12:29:13.067465 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 12:29:13.070657 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 12:29:13.073971 PCI: 00:0d.0 scanning...
961 12:29:13.077611 scan_static_bus for PCI: 00:0d.0
962 12:29:13.081107 USB0 port 0 enabled
963 12:29:13.081190 USB0 port 0 scanning...
964 12:29:13.083985 scan_static_bus for USB0 port 0
965 12:29:13.087541 USB3 port 0 enabled
966 12:29:13.090867 USB3 port 1 enabled
967 12:29:13.090989 USB3 port 2 disabled
968 12:29:13.094609 USB3 port 3 disabled
969 12:29:13.097685 USB3 port 0 scanning...
970 12:29:13.101091 scan_static_bus for USB3 port 0
971 12:29:13.104360 scan_static_bus for USB3 port 0 done
972 12:29:13.107914 scan_bus: bus USB3 port 0 finished in 6 msecs
973 12:29:13.110845 USB3 port 1 scanning...
974 12:29:13.114272 scan_static_bus for USB3 port 1
975 12:29:13.117261 scan_static_bus for USB3 port 1 done
976 12:29:13.120776 scan_bus: bus USB3 port 1 finished in 6 msecs
977 12:29:13.127331 scan_static_bus for USB0 port 0 done
978 12:29:13.130794 scan_bus: bus USB0 port 0 finished in 43 msecs
979 12:29:13.134054 scan_static_bus for PCI: 00:0d.0 done
980 12:29:13.140644 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 12:29:13.140729 PCI: 00:14.0 scanning...
982 12:29:13.143688 scan_static_bus for PCI: 00:14.0
983 12:29:13.147380 USB0 port 0 enabled
984 12:29:13.150936 USB0 port 0 scanning...
985 12:29:13.153906 scan_static_bus for USB0 port 0
986 12:29:13.153990 USB2 port 0 disabled
987 12:29:13.157451 USB2 port 1 enabled
988 12:29:13.160431 USB2 port 2 enabled
989 12:29:13.160515 USB2 port 3 disabled
990 12:29:13.164100 USB2 port 4 enabled
991 12:29:13.167059 USB2 port 5 disabled
992 12:29:13.167143 USB2 port 6 disabled
993 12:29:13.170319 USB2 port 7 disabled
994 12:29:13.170403 USB2 port 8 disabled
995 12:29:13.173931
996 12:29:13.174015 USB2 port 9 disabled
997 12:29:13.177388 USB3 port 0 disabled
998 12:29:13.177472 USB3 port 1 enabled
999 12:29:13.180869 USB3 port 2 disabled
1000 12:29:13.184045 USB3 port 3 disabled
1001 12:29:13.184128 USB2 port 1 scanning...
1002 12:29:13.187370 scan_static_bus for USB2 port 1
1003 12:29:13.194153 scan_static_bus for USB2 port 1 done
1004 12:29:13.197024 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 12:29:13.200685 USB2 port 2 scanning...
1006 12:29:13.203646 scan_static_bus for USB2 port 2
1007 12:29:13.207371 scan_static_bus for USB2 port 2 done
1008 12:29:13.210770 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 12:29:13.213608 USB2 port 4 scanning...
1010 12:29:13.216896 scan_static_bus for USB2 port 4
1011 12:29:13.220340 scan_static_bus for USB2 port 4 done
1012 12:29:13.227057 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 12:29:13.227141 USB3 port 1 scanning...
1014 12:29:13.230181 scan_static_bus for USB3 port 1
1015 12:29:13.233540 scan_static_bus for USB3 port 1 done
1016 12:29:13.240244 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 12:29:13.243732 scan_static_bus for USB0 port 0 done
1018 12:29:13.246754 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 12:29:13.249971 scan_static_bus for PCI: 00:14.0 done
1020 12:29:13.253596
1021 12:29:13.256545 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1022 12:29:13.260176 PCI: 00:14.3 scanning...
1023 12:29:13.263485 scan_static_bus for PCI: 00:14.3
1024 12:29:13.263569 GENERIC: 0.0 enabled
1025 12:29:13.269989 scan_static_bus for PCI: 00:14.3 done
1026 12:29:13.273261 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1027 12:29:13.276748 PCI: 00:15.0 scanning...
1028 12:29:13.279794 scan_static_bus for PCI: 00:15.0
1029 12:29:13.279878 I2C: 00:1a enabled
1030 12:29:13.283117 I2C: 00:31 enabled
1031 12:29:13.286666 I2C: 00:32 enabled
1032 12:29:13.289845 scan_static_bus for PCI: 00:15.0 done
1033 12:29:13.293291 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1034 12:29:13.297482 PCI: 00:15.1 scanning...
1035 12:29:13.301071 scan_static_bus for PCI: 00:15.1
1036 12:29:13.301155 I2C: 00:10 enabled
1037 12:29:13.304340 scan_static_bus for PCI: 00:15.1 done
1038 12:29:13.311150 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1039 12:29:13.314705 PCI: 00:15.2 scanning...
1040 12:29:13.317482 scan_static_bus for PCI: 00:15.2
1041 12:29:13.320793 scan_static_bus for PCI: 00:15.2 done
1042 12:29:13.324176 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1043 12:29:13.327479 PCI: 00:15.3 scanning...
1044 12:29:13.331227 scan_static_bus for PCI: 00:15.3
1045 12:29:13.334277 scan_static_bus for PCI: 00:15.3 done
1046 12:29:13.340678 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1047 12:29:13.340762 PCI: 00:19.1 scanning...
1048 12:29:13.344058 scan_static_bus for PCI: 00:19.1
1049 12:29:13.347627 I2C: 00:15 enabled
1050 12:29:13.350967 scan_static_bus for PCI: 00:19.1 done
1051 12:29:13.357989 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1052 12:29:13.358073 PCI: 00:1d.0 scanning...
1053 12:29:13.363998 do_pci_scan_bridge for PCI: 00:1d.0
1054 12:29:13.364082 PCI: pci_scan_bus for bus 01
1055 12:29:13.367573 PCI: 01:00.0 [1c5c/174a] enabled
1056 12:29:13.371065 GENERIC: 0.0 enabled
1057 12:29:13.373949 Enabling Common Clock Configuration
1058 12:29:13.381004 L1 Sub-State supported from root port 29
1059 12:29:13.381088 L1 Sub-State Support = 0xf
1060 12:29:13.384410 CommonModeRestoreTime = 0x28
1061 12:29:13.391164 Power On Value = 0x16, Power On Scale = 0x0
1062 12:29:13.391252 ASPM: Enabled L1
1063 12:29:13.394487 PCIe: Max_Payload_Size adjusted to 128
1064 12:29:13.400689 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1065 12:29:13.400788 PCI: 00:1e.2 scanning...
1066 12:29:13.404023 scan_generic_bus for PCI: 00:1e.2
1067 12:29:13.408101
1068 12:29:13.408187 SPI: 00 enabled
1069 12:29:13.414441 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1070 12:29:13.417954 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1071 12:29:13.420768 PCI: 00:1e.3 scanning...
1072 12:29:13.424384 scan_generic_bus for PCI: 00:1e.3
1073 12:29:13.427484 SPI: 00 enabled
1074 12:29:13.430948 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1075 12:29:13.437457 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1076 12:29:13.440947 PCI: 00:1f.0 scanning...
1077 12:29:13.444521 scan_static_bus for PCI: 00:1f.0
1078 12:29:13.444605 PNP: 0c09.0 enabled
1079 12:29:13.447939 PNP: 0c09.0 scanning...
1080 12:29:13.450704 scan_static_bus for PNP: 0c09.0
1081 12:29:13.454004 scan_static_bus for PNP: 0c09.0 done
1082 12:29:13.460613 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1083 12:29:13.464001 scan_static_bus for PCI: 00:1f.0 done
1084 12:29:13.467855 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1085 12:29:13.470617 PCI: 00:1f.2 scanning...
1086 12:29:13.473699 scan_static_bus for PCI: 00:1f.2
1087 12:29:13.477503 GENERIC: 0.0 enabled
1088 12:29:13.477587 GENERIC: 0.0 scanning...
1089 12:29:13.480714
1090 12:29:13.483874 scan_static_bus for GENERIC: 0.0
1091 12:29:13.483959 GENERIC: 0.0 enabled
1092 12:29:13.487184 GENERIC: 1.0 enabled
1093 12:29:13.490908 scan_static_bus for GENERIC: 0.0 done
1094 12:29:13.493704 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1095 12:29:13.500745 scan_static_bus for PCI: 00:1f.2 done
1096 12:29:13.503531 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1097 12:29:13.507063 PCI: 00:1f.3 scanning...
1098 12:29:13.510538 scan_static_bus for PCI: 00:1f.3
1099 12:29:13.513575 scan_static_bus for PCI: 00:1f.3 done
1100 12:29:13.516976 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1101 12:29:13.520111 PCI: 00:1f.5 scanning...
1102 12:29:13.523676 scan_generic_bus for PCI: 00:1f.5
1103 12:29:13.530241 scan_generic_bus for PCI: 00:1f.5 done
1104 12:29:13.533527 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1105 12:29:13.537254 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1106 12:29:13.543808 scan_static_bus for Root Device done
1107 12:29:13.546858 scan_bus: bus Root Device finished in 737 msecs
1108 12:29:13.546980 done
1109 12:29:13.553774 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1110 12:29:13.556804 Chrome EC: UHEPI supported
1111 12:29:13.563501 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1112 12:29:13.570143 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1113 12:29:13.573203 SPI flash protection: WPSW=0 SRP0=0
1114 12:29:13.579937 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1115 12:29:13.583719 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1116 12:29:13.586809 found VGA at PCI: 00:02.0
1117 12:29:13.589825 Setting up VGA for PCI: 00:02.0
1118 12:29:13.596623 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1119 12:29:13.600028 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1120 12:29:13.603669 Allocating resources...
1121 12:29:13.606540 Reading resources...
1122 12:29:13.610149 Root Device read_resources bus 0 link: 0
1123 12:29:13.613991 DOMAIN: 0000 read_resources bus 0 link: 0
1124 12:29:13.619786 PCI: 00:04.0 read_resources bus 1 link: 0
1125 12:29:13.623577 PCI: 00:04.0 read_resources bus 1 link: 0 done
1126 12:29:13.630387 PCI: 00:0d.0 read_resources bus 0 link: 0
1127 12:29:13.633750 USB0 port 0 read_resources bus 0 link: 0
1128 12:29:13.640291 USB0 port 0 read_resources bus 0 link: 0 done
1129 12:29:13.643784 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1130 12:29:13.646821 PCI: 00:14.0 read_resources bus 0 link: 0
1131 12:29:13.653945 USB0 port 0 read_resources bus 0 link: 0
1132 12:29:13.656981 USB0 port 0 read_resources bus 0 link: 0 done
1133 12:29:13.663716 PCI: 00:14.0 read_resources bus 0 link: 0 done
1134 12:29:13.667430 PCI: 00:14.3 read_resources bus 0 link: 0
1135 12:29:13.673913 PCI: 00:14.3 read_resources bus 0 link: 0 done
1136 12:29:13.677465 PCI: 00:15.0 read_resources bus 0 link: 0
1137 12:29:13.684465 PCI: 00:15.0 read_resources bus 0 link: 0 done
1138 12:29:13.687335 PCI: 00:15.1 read_resources bus 0 link: 0
1139 12:29:13.694007 PCI: 00:15.1 read_resources bus 0 link: 0 done
1140 12:29:13.697518 PCI: 00:19.1 read_resources bus 0 link: 0
1141 12:29:13.704159 PCI: 00:19.1 read_resources bus 0 link: 0 done
1142 12:29:13.707419 PCI: 00:1d.0 read_resources bus 1 link: 0
1143 12:29:13.713930 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1144 12:29:13.718018 PCI: 00:1e.2 read_resources bus 2 link: 0
1145 12:29:13.724366 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1146 12:29:13.727223 PCI: 00:1e.3 read_resources bus 3 link: 0
1147 12:29:13.734633 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1148 12:29:13.737167 PCI: 00:1f.0 read_resources bus 0 link: 0
1149 12:29:13.744395 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1150 12:29:13.747312 PCI: 00:1f.2 read_resources bus 0 link: 0
1151 12:29:13.750948 GENERIC: 0.0 read_resources bus 0 link: 0
1152 12:29:13.757580 GENERIC: 0.0 read_resources bus 0 link: 0 done
1153 12:29:13.761620 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1154 12:29:13.768646 DOMAIN: 0000 read_resources bus 0 link: 0 done
1155 12:29:13.771789 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1156 12:29:13.778354 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1157 12:29:13.781585 Root Device read_resources bus 0 link: 0 done
1158 12:29:13.785047 Done reading resources.
1159 12:29:13.791831 Show resources in subtree (Root Device)...After reading.
1160 12:29:13.794978 Root Device child on link 0 DOMAIN: 0000
1161 12:29:13.797920 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1162 12:29:13.808233 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1163 12:29:13.817830 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1164 12:29:13.821235 PCI: 00:00.0
1165 12:29:13.830958 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1166 12:29:13.838126 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1167 12:29:13.847857 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1168 12:29:13.857682 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1169 12:29:13.867507 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1170 12:29:13.877368 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1171 12:29:13.888150 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1172 12:29:13.894376 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1173 12:29:13.904004 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1174 12:29:13.914248 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1175 12:29:13.923642 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1176 12:29:13.934361 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1177 12:29:13.940356 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1178 12:29:13.943937
1179 12:29:13.950982 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1180 12:29:13.960597 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1181 12:29:13.971051 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1182 12:29:13.980740 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1183 12:29:13.990337 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1184 12:29:13.997205 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1185 12:29:14.000575
1186 12:29:14.006793 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1187 12:29:14.010151 PCI: 00:02.0
1188 12:29:14.020190 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1189 12:29:14.029961 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1190 12:29:14.040367 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1191 12:29:14.043524 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1192 12:29:14.053108 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1193 12:29:14.057044 GENERIC: 0.0
1194 12:29:14.057518 PCI: 00:05.0
1195 12:29:14.066750 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1196 12:29:14.073868 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1197 12:29:14.074448 GENERIC: 0.0
1198 12:29:14.077003 PCI: 00:08.0
1199 12:29:14.086787 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 12:29:14.087378 PCI: 00:0a.0
1201 12:29:14.089842 PCI: 00:0d.0 child on link 0 USB0 port 0
1202 12:29:14.099922 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1203 12:29:14.106595 USB0 port 0 child on link 0 USB3 port 0
1204 12:29:14.107183 USB3 port 0
1205 12:29:14.110061 USB3 port 1
1206 12:29:14.110532 USB3 port 2
1207 12:29:14.112991 USB3 port 3
1208 12:29:14.116585 PCI: 00:14.0 child on link 0 USB0 port 0
1209 12:29:14.126955 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1210 12:29:14.133183 USB0 port 0 child on link 0 USB2 port 0
1211 12:29:14.133763 USB2 port 0
1212 12:29:14.136534 USB2 port 1
1213 12:29:14.137021 USB2 port 2
1214 12:29:14.140248 USB2 port 3
1215 12:29:14.140823 USB2 port 4
1216 12:29:14.143266 USB2 port 5
1217 12:29:14.143847 USB2 port 6
1218 12:29:14.146430 USB2 port 7
1219 12:29:14.146931 USB2 port 8
1220 12:29:14.149962 USB2 port 9
1221 12:29:14.150435 USB3 port 0
1222 12:29:14.153640 USB3 port 1
1223 12:29:14.154217 USB3 port 2
1224 12:29:14.156761 USB3 port 3
1225 12:29:14.157234 PCI: 00:14.2
1226 12:29:14.166512 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 12:29:14.176620 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1228 12:29:14.183104 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1229 12:29:14.192868 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 12:29:14.193438 GENERIC: 0.0
1231 12:29:14.200144 PCI: 00:15.0 child on link 0 I2C: 00:1a
1232 12:29:14.209927 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 12:29:14.210527 I2C: 00:1a
1234 12:29:14.213187 I2C: 00:31
1235 12:29:14.213813 I2C: 00:32
1236 12:29:14.216431 PCI: 00:15.1 child on link 0 I2C: 00:10
1237 12:29:14.226449 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 12:29:14.229364 I2C: 00:10
1239 12:29:14.229976 PCI: 00:15.2
1240 12:29:14.240166 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1241 12:29:14.242868 PCI: 00:15.3
1242 12:29:14.253044 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:29:14.253626 PCI: 00:16.0
1244 12:29:14.262800 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 12:29:14.265850 PCI: 00:19.0
1246 12:29:14.269236 PCI: 00:19.1 child on link 0 I2C: 00:15
1247 12:29:14.279725 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1248 12:29:14.283240 I2C: 00:15
1249 12:29:14.285952 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1250 12:29:14.296062 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1251 12:29:14.303432 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1252 12:29:14.306018
1253 12:29:14.312840 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1254 12:29:14.316514 GENERIC: 0.0
1255 12:29:14.317097 PCI: 01:00.0
1256 12:29:14.325725 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1257 12:29:14.335886 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1258 12:29:14.346063 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1259 12:29:14.346661 PCI: 00:1e.0
1260 12:29:14.359504 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1261 12:29:14.362257 PCI: 00:1e.2 child on link 0 SPI: 00
1262 12:29:14.372219 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 12:29:14.372813 SPI: 00
1264 12:29:14.379212 PCI: 00:1e.3 child on link 0 SPI: 00
1265 12:29:14.389091 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 12:29:14.389678 SPI: 00
1267 12:29:14.392438 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1268 12:29:14.402141 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1269 12:29:14.402810 PNP: 0c09.0
1270 12:29:14.412195 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1271 12:29:14.415816 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1272 12:29:14.425607 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1273 12:29:14.435623 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1274 12:29:14.438840 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1275 12:29:14.442404 GENERIC: 0.0
1276 12:29:14.443017 GENERIC: 1.0
1277 12:29:14.445542
1278 12:29:14.446114 PCI: 00:1f.3
1279 12:29:14.455284 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 12:29:14.465140 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 12:29:14.468767 PCI: 00:1f.5
1282 12:29:14.475455 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 12:29:14.482979 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 12:29:14.483556 APIC: 00
1285 12:29:14.483935 APIC: 01
1286 12:29:14.485380 APIC: 03
1287 12:29:14.485860 APIC: 05
1288 12:29:14.486233 APIC: 07
1289 12:29:14.488330
1290 12:29:14.488811 APIC: 06
1291 12:29:14.489183 APIC: 02
1292 12:29:14.491965 APIC: 04
1293 12:29:14.498404 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1294 12:29:14.505276 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1295 12:29:14.511925 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1296 12:29:14.515863 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1297 12:29:14.522228 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1298 12:29:14.525174 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1299 12:29:14.528796 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1300 12:29:14.535014 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1301 12:29:14.544928 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1302 12:29:14.552015 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1303 12:29:14.558222 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1304 12:29:14.565009 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1305 12:29:14.571682 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1306 12:29:14.578312 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1307 12:29:14.581291
1308 12:29:14.588144 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1309 12:29:14.591605 DOMAIN: 0000: Resource ranges:
1310 12:29:14.594752 * Base: 1000, Size: 800, Tag: 100
1311 12:29:14.598413 * Base: 1900, Size: e700, Tag: 100
1312 12:29:14.604634 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1313 12:29:14.611353 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1314 12:29:14.618303 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1315 12:29:14.624717 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1316 12:29:14.630990 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1317 12:29:14.640961 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1318 12:29:14.647741 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1319 12:29:14.654232 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1320 12:29:14.664272 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1321 12:29:14.671027 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1322 12:29:14.677472 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1323 12:29:14.684454 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1324 12:29:14.687656
1325 12:29:14.694288 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1326 12:29:14.700820 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1327 12:29:14.707560 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1328 12:29:14.717419 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1329 12:29:14.723830 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1330 12:29:14.730924 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1331 12:29:14.741214 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1332 12:29:14.748080 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1333 12:29:14.754321 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1334 12:29:14.764261 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1335 12:29:14.770948 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1336 12:29:14.777053 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1337 12:29:14.786807 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1338 12:29:14.790756 DOMAIN: 0000: Resource ranges:
1339 12:29:14.793643 * Base: 7fc00000, Size: 40400000, Tag: 200
1340 12:29:14.797159 * Base: d0000000, Size: 28000000, Tag: 200
1341 12:29:14.803874 * Base: fa000000, Size: 1000000, Tag: 200
1342 12:29:14.806569 * Base: fb001000, Size: 2fff000, Tag: 200
1343 12:29:14.810209 * Base: fe010000, Size: 2e000, Tag: 200
1344 12:29:14.813572 * Base: fe03f000, Size: d41000, Tag: 200
1345 12:29:14.819971 * Base: fed88000, Size: 8000, Tag: 200
1346 12:29:14.823557 * Base: fed93000, Size: d000, Tag: 200
1347 12:29:14.827012 * Base: feda2000, Size: 1e000, Tag: 200
1348 12:29:14.829993 * Base: fede0000, Size: 1220000, Tag: 200
1349 12:29:14.836803 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1350 12:29:14.843431 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1351 12:29:14.850579 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1352 12:29:14.856637 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1353 12:29:14.863376 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1354 12:29:14.870684 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1355 12:29:14.876720 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1356 12:29:14.883204 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1357 12:29:14.889932 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1358 12:29:14.897135 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1359 12:29:14.903157 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1360 12:29:14.909811 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1361 12:29:14.916507 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1362 12:29:14.922872 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1363 12:29:14.929701 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1364 12:29:14.936540 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1365 12:29:14.942861 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1366 12:29:14.949799 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1367 12:29:14.956376 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1368 12:29:14.963745 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1369 12:29:14.969349 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1370 12:29:14.976087 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1371 12:29:14.982702 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1372 12:29:14.989638 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1373 12:29:14.999221 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1374 12:29:15.002707 PCI: 00:1d.0: Resource ranges:
1375 12:29:15.006151 * Base: 7fc00000, Size: 100000, Tag: 200
1376 12:29:15.012398 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1377 12:29:15.019487 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1378 12:29:15.025949 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1379 12:29:15.032412 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1380 12:29:15.042492 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1381 12:29:15.045689 Root Device assign_resources, bus 0 link: 0
1382 12:29:15.049069 DOMAIN: 0000 assign_resources, bus 0 link: 0
1383 12:29:15.058800 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1384 12:29:15.065934 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1385 12:29:15.075872 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1386 12:29:15.082474 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1387 12:29:15.089091 PCI: 00:04.0 assign_resources, bus 1 link: 0
1388 12:29:15.091998 PCI: 00:04.0 assign_resources, bus 1 link: 0
1389 12:29:15.098551 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1390 12:29:15.101998
1391 12:29:15.108374 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1392 12:29:15.115067 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1393 12:29:15.118469
1394 12:29:15.121875 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1395 12:29:15.125630 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1396 12:29:15.134851 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1397 12:29:15.138813 PCI: 00:14.0 assign_resources, bus 0 link: 0
1398 12:29:15.145328 PCI: 00:14.0 assign_resources, bus 0 link: 0
1399 12:29:15.151991 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1400 12:29:15.158461 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1401 12:29:15.168275 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1402 12:29:15.171839 PCI: 00:14.3 assign_resources, bus 0 link: 0
1403 12:29:15.178827 PCI: 00:14.3 assign_resources, bus 0 link: 0
1404 12:29:15.184995 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1405 12:29:15.188453 PCI: 00:15.0 assign_resources, bus 0 link: 0
1406 12:29:15.191393
1407 12:29:15.195254 PCI: 00:15.0 assign_resources, bus 0 link: 0
1408 12:29:15.201362 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1409 12:29:15.208077 PCI: 00:15.1 assign_resources, bus 0 link: 0
1410 12:29:15.211661 PCI: 00:15.1 assign_resources, bus 0 link: 0
1411 12:29:15.221502 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1412 12:29:15.228219 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1413 12:29:15.237943 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1414 12:29:15.245097 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1415 12:29:15.248394 PCI: 00:19.1 assign_resources, bus 0 link: 0
1416 12:29:15.251228
1417 12:29:15.254863 PCI: 00:19.1 assign_resources, bus 0 link: 0
1418 12:29:15.264844 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1419 12:29:15.274662 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1420 12:29:15.281093 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1421 12:29:15.284355 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1422 12:29:15.294806 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1423 12:29:15.301555 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1424 12:29:15.311500 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1425 12:29:15.314223 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1426 12:29:15.324162 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1427 12:29:15.327725 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1428 12:29:15.330822 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1429 12:29:15.340790 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1430 12:29:15.344307 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1431 12:29:15.350842 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1432 12:29:15.354573 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1433 12:29:15.360897 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1434 12:29:15.364559 LPC: Trying to open IO window from 800 size 1ff
1435 12:29:15.374018 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1436 12:29:15.381344 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1437 12:29:15.387214 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1438 12:29:15.394253 DOMAIN: 0000 assign_resources, bus 0 link: 0
1439 12:29:15.397382 Root Device assign_resources, bus 0 link: 0
1440 12:29:15.400606 Done setting resources.
1441 12:29:15.407376 Show resources in subtree (Root Device)...After assigning values.
1442 12:29:15.411057 Root Device child on link 0 DOMAIN: 0000
1443 12:29:15.417196 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1444 12:29:15.423890 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1445 12:29:15.433601 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1446 12:29:15.437127 PCI: 00:00.0
1447 12:29:15.447121 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1448 12:29:15.457305 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1449 12:29:15.464033 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1450 12:29:15.473740 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1451 12:29:15.483590 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1452 12:29:15.493694 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1453 12:29:15.503414 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1454 12:29:15.513365 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1455 12:29:15.520187 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1456 12:29:15.530202 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1457 12:29:15.540389 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1458 12:29:15.550332 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1459 12:29:15.559787 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1460 12:29:15.566724 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1461 12:29:15.576476 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1462 12:29:15.586316 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1463 12:29:15.596743 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1464 12:29:15.606653 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1465 12:29:15.616397 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1466 12:29:15.626915 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1467 12:29:15.627555 PCI: 00:02.0
1468 12:29:15.636196 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1469 12:29:15.649232 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1470 12:29:15.656167 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1471 12:29:15.663010 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1472 12:29:15.673221 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1473 12:29:15.673767 GENERIC: 0.0
1474 12:29:15.676168 PCI: 00:05.0
1475 12:29:15.685900 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1476 12:29:15.689670 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1477 12:29:15.693059 GENERIC: 0.0
1478 12:29:15.693493 PCI: 00:08.0
1479 12:29:15.706112 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1480 12:29:15.706546 PCI: 00:0a.0
1481 12:29:15.709146 PCI: 00:0d.0 child on link 0 USB0 port 0
1482 12:29:15.719600 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1483 12:29:15.722432
1484 12:29:15.726118 USB0 port 0 child on link 0 USB3 port 0
1485 12:29:15.726550 USB3 port 0
1486 12:29:15.729513 USB3 port 1
1487 12:29:15.729989 USB3 port 2
1488 12:29:15.732535 USB3 port 3
1489 12:29:15.735829 PCI: 00:14.0 child on link 0 USB0 port 0
1490 12:29:15.745756 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1491 12:29:15.752200 USB0 port 0 child on link 0 USB2 port 0
1492 12:29:15.752643 USB2 port 0
1493 12:29:15.755939 USB2 port 1
1494 12:29:15.756368 USB2 port 2
1495 12:29:15.758950 USB2 port 3
1496 12:29:15.759386 USB2 port 4
1497 12:29:15.762447 USB2 port 5
1498 12:29:15.762877 USB2 port 6
1499 12:29:15.766110 USB2 port 7
1500 12:29:15.766637 USB2 port 8
1501 12:29:15.769023
1502 12:29:15.769450 USB2 port 9
1503 12:29:15.772621 USB3 port 0
1504 12:29:15.773126 USB3 port 1
1505 12:29:15.776098 USB3 port 2
1506 12:29:15.776527 USB3 port 3
1507 12:29:15.779398 PCI: 00:14.2
1508 12:29:15.789057 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1509 12:29:15.799406 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1510 12:29:15.802262 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1511 12:29:15.812177 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1512 12:29:15.815639 GENERIC: 0.0
1513 12:29:15.819096 PCI: 00:15.0 child on link 0 I2C: 00:1a
1514 12:29:15.829047 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1515 12:29:15.832005 I2C: 00:1a
1516 12:29:15.832320 I2C: 00:31
1517 12:29:15.835546 I2C: 00:32
1518 12:29:15.838746 PCI: 00:15.1 child on link 0 I2C: 00:10
1519 12:29:15.849140 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1520 12:29:15.852080 I2C: 00:10
1521 12:29:15.852392 PCI: 00:15.2
1522 12:29:15.861983 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1523 12:29:15.865736 PCI: 00:15.3
1524 12:29:15.875690 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1525 12:29:15.876093 PCI: 00:16.0
1526 12:29:15.884990 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1527 12:29:15.888541 PCI: 00:19.0
1528 12:29:15.891864 PCI: 00:19.1 child on link 0 I2C: 00:15
1529 12:29:15.902140 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1530 12:29:15.905099 I2C: 00:15
1531 12:29:15.908731 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1532 12:29:15.918473 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1533 12:29:15.928394 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1534 12:29:15.941904 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1535 12:29:15.942284 GENERIC: 0.0
1536 12:29:15.944739 PCI: 01:00.0
1537 12:29:15.954829 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1538 12:29:15.965187 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1539 12:29:15.975129 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1540 12:29:15.978141 PCI: 00:1e.0
1541 12:29:15.988011 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1542 12:29:15.991606 PCI: 00:1e.2 child on link 0 SPI: 00
1543 12:29:16.001361 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1544 12:29:16.004680 SPI: 00
1545 12:29:16.008271 PCI: 00:1e.3 child on link 0 SPI: 00
1546 12:29:16.018487 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1547 12:29:16.018804 SPI: 00
1548 12:29:16.024503 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1549 12:29:16.031880 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1550 12:29:16.034636 PNP: 0c09.0
1551 12:29:16.041028 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1552 12:29:16.044366
1553 12:29:16.047819 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1554 12:29:16.057962 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1555 12:29:16.064598 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1556 12:29:16.071219 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1557 12:29:16.071532 GENERIC: 0.0
1558 12:29:16.074719 GENERIC: 1.0
1559 12:29:16.075075 PCI: 00:1f.3
1560 12:29:16.087707 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1561 12:29:16.097686 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1562 12:29:16.097997 PCI: 00:1f.5
1563 12:29:16.107847 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1564 12:29:16.114052 CPU_CLUSTER: 0 child on link 0 APIC: 00
1565 12:29:16.114360 APIC: 00
1566 12:29:16.114602 APIC: 01
1567 12:29:16.117433 APIC: 03
1568 12:29:16.117740 APIC: 05
1569 12:29:16.120625 APIC: 07
1570 12:29:16.120948 APIC: 06
1571 12:29:16.121206 APIC: 02
1572 12:29:16.124638 APIC: 04
1573 12:29:16.127256 Done allocating resources.
1574 12:29:16.130735 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1575 12:29:16.137338 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1576 12:29:16.140695 Configure GPIOs for I2S audio on UP4.
1577 12:29:16.148761 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1578 12:29:16.151671 Enabling resources...
1579 12:29:16.155173 PCI: 00:00.0 subsystem <- 8086/9a12
1580 12:29:16.158618 PCI: 00:00.0 cmd <- 06
1581 12:29:16.162345 PCI: 00:02.0 subsystem <- 8086/9a40
1582 12:29:16.165353 PCI: 00:02.0 cmd <- 03
1583 12:29:16.168729 PCI: 00:04.0 subsystem <- 8086/9a03
1584 12:29:16.169034 PCI: 00:04.0 cmd <- 02
1585 12:29:16.171809
1586 12:29:16.174992 PCI: 00:05.0 subsystem <- 8086/9a19
1587 12:29:16.175402 PCI: 00:05.0 cmd <- 02
1588 12:29:16.181852 PCI: 00:08.0 subsystem <- 8086/9a11
1589 12:29:16.182251 PCI: 00:08.0 cmd <- 06
1590 12:29:16.184980 PCI: 00:0d.0 subsystem <- 8086/9a13
1591 12:29:16.188194 PCI: 00:0d.0 cmd <- 02
1592 12:29:16.191758 PCI: 00:14.0 subsystem <- 8086/a0ed
1593 12:29:16.194697 PCI: 00:14.0 cmd <- 02
1594 12:29:16.198260 PCI: 00:14.2 subsystem <- 8086/a0ef
1595 12:29:16.201916 PCI: 00:14.2 cmd <- 02
1596 12:29:16.204579 PCI: 00:14.3 subsystem <- 8086/a0f0
1597 12:29:16.207932 PCI: 00:14.3 cmd <- 02
1598 12:29:16.211093 PCI: 00:15.0 subsystem <- 8086/a0e8
1599 12:29:16.214411 PCI: 00:15.0 cmd <- 02
1600 12:29:16.217945 PCI: 00:15.1 subsystem <- 8086/a0e9
1601 12:29:16.221030 PCI: 00:15.1 cmd <- 02
1602 12:29:16.224460 PCI: 00:15.2 subsystem <- 8086/a0ea
1603 12:29:16.224783 PCI: 00:15.2 cmd <- 02
1604 12:29:16.231086 PCI: 00:15.3 subsystem <- 8086/a0eb
1605 12:29:16.231386 PCI: 00:15.3 cmd <- 02
1606 12:29:16.234434 PCI: 00:16.0 subsystem <- 8086/a0e0
1607 12:29:16.238007 PCI: 00:16.0 cmd <- 02
1608 12:29:16.240962 PCI: 00:19.1 subsystem <- 8086/a0c6
1609 12:29:16.244317 PCI: 00:19.1 cmd <- 02
1610 12:29:16.247746 PCI: 00:1d.0 bridge ctrl <- 0013
1611 12:29:16.251576 PCI: 00:1d.0 subsystem <- 8086/a0b0
1612 12:29:16.254334 PCI: 00:1d.0 cmd <- 06
1613 12:29:16.257330 PCI: 00:1e.0 subsystem <- 8086/a0a8
1614 12:29:16.261286 PCI: 00:1e.0 cmd <- 06
1615 12:29:16.264155 PCI: 00:1e.2 subsystem <- 8086/a0aa
1616 12:29:16.267832 PCI: 00:1e.2 cmd <- 06
1617 12:29:16.270781 PCI: 00:1e.3 subsystem <- 8086/a0ab
1618 12:29:16.274152 PCI: 00:1e.3 cmd <- 02
1619 12:29:16.277570 PCI: 00:1f.0 subsystem <- 8086/a087
1620 12:29:16.277973 PCI: 00:1f.0 cmd <- 407
1621 12:29:16.284292 PCI: 00:1f.3 subsystem <- 8086/a0c8
1622 12:29:16.284643 PCI: 00:1f.3 cmd <- 02
1623 12:29:16.287816 PCI: 00:1f.5 subsystem <- 8086/a0a4
1624 12:29:16.290749 PCI: 00:1f.5 cmd <- 406
1625 12:29:16.295841 PCI: 01:00.0 cmd <- 02
1626 12:29:16.300527 done.
1627 12:29:16.303922 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1628 12:29:16.307210 Initializing devices...
1629 12:29:16.309993 Root Device init
1630 12:29:16.313667 Chrome EC: Set SMI mask to 0x0000000000000000
1631 12:29:16.320014 Chrome EC: clear events_b mask to 0x0000000000000000
1632 12:29:16.326878 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1633 12:29:16.330491 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1634 12:29:16.336951 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1635 12:29:16.343188 Chrome EC: Set WAKE mask to 0x0000000000000000
1636 12:29:16.346727 fw_config match found: DB_USB=USB3_ACTIVE
1637 12:29:16.353119 Configure Right Type-C port orientation for retimer
1638 12:29:16.356612 Root Device init finished in 43 msecs
1639 12:29:16.359835 PCI: 00:00.0 init
1640 12:29:16.363487 CPU TDP = 9 Watts
1641 12:29:16.363785 CPU PL1 = 9 Watts
1642 12:29:16.366667 CPU PL2 = 40 Watts
1643 12:29:16.370074 CPU PL4 = 83 Watts
1644 12:29:16.373148 PCI: 00:00.0 init finished in 8 msecs
1645 12:29:16.373447 PCI: 00:02.0 init
1646 12:29:16.376688 GMA: Found VBT in CBFS
1647 12:29:16.380051 GMA: Found valid VBT in CBFS
1648 12:29:16.386625 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1649 12:29:16.392917 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1650 12:29:16.396702 PCI: 00:02.0 init finished in 18 msecs
1651 12:29:16.399938 PCI: 00:05.0 init
1652 12:29:16.402963 PCI: 00:05.0 init finished in 0 msecs
1653 12:29:16.406808 PCI: 00:08.0 init
1654 12:29:16.409460 PCI: 00:08.0 init finished in 0 msecs
1655 12:29:16.412880 PCI: 00:14.0 init
1656 12:29:16.416395 PCI: 00:14.0 init finished in 0 msecs
1657 12:29:16.419541 PCI: 00:14.2 init
1658 12:29:16.423130 PCI: 00:14.2 init finished in 0 msecs
1659 12:29:16.423514 PCI: 00:15.0 init
1660 12:29:16.426283 I2C bus 0 version 0x3230302a
1661 12:29:16.429420 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1662 12:29:16.436330 PCI: 00:15.0 init finished in 6 msecs
1663 12:29:16.436822 PCI: 00:15.1 init
1664 12:29:16.439381 I2C bus 1 version 0x3230302a
1665 12:29:16.442549 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1666 12:29:16.446081 PCI: 00:15.1 init finished in 6 msecs
1667 12:29:16.449290 PCI: 00:15.2 init
1668 12:29:16.452816 I2C bus 2 version 0x3230302a
1669 12:29:16.456251 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1670 12:29:16.459239 PCI: 00:15.2 init finished in 6 msecs
1671 12:29:16.462657 PCI: 00:15.3 init
1672 12:29:16.465973 I2C bus 3 version 0x3230302a
1673 12:29:16.469438 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1674 12:29:16.472978 PCI: 00:15.3 init finished in 6 msecs
1675 12:29:16.476043 PCI: 00:16.0 init
1676 12:29:16.479418 PCI: 00:16.0 init finished in 0 msecs
1677 12:29:16.482735 PCI: 00:19.1 init
1678 12:29:16.483095 I2C bus 5 version 0x3230302a
1679 12:29:16.489463 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1680 12:29:16.492486 PCI: 00:19.1 init finished in 6 msecs
1681 12:29:16.492754 PCI: 00:1d.0 init
1682 12:29:16.495931 Initializing PCH PCIe bridge.
1683 12:29:16.499361 PCI: 00:1d.0 init finished in 3 msecs
1684 12:29:16.503641 PCI: 00:1f.0 init
1685 12:29:16.506945 IOAPIC: Initializing IOAPIC at 0xfec00000
1686 12:29:16.514145 IOAPIC: Bootstrap Processor Local APIC = 0x00
1687 12:29:16.514447 IOAPIC: ID = 0x02
1688 12:29:16.516834 IOAPIC: Dumping registers
1689 12:29:16.520216 reg 0x0000: 0x02000000
1690 12:29:16.523493 reg 0x0001: 0x00770020
1691 12:29:16.523706 reg 0x0002: 0x00000000
1692 12:29:16.530274 PCI: 00:1f.0 init finished in 21 msecs
1693 12:29:16.530554 PCI: 00:1f.2 init
1694 12:29:16.533636 Disabling ACPI via APMC.
1695 12:29:16.537087 APMC done.
1696 12:29:16.539991 PCI: 00:1f.2 init finished in 5 msecs
1697 12:29:16.551828 PCI: 01:00.0 init
1698 12:29:16.555631 PCI: 01:00.0 init finished in 0 msecs
1699 12:29:16.558464 PNP: 0c09.0 init
1700 12:29:16.561994 Google Chrome EC uptime: 8.405 seconds
1701 12:29:16.568352 Google Chrome AP resets since EC boot: 1
1702 12:29:16.571876 Google Chrome most recent AP reset causes:
1703 12:29:16.575372 0.349: 32775 shutdown: entering G3
1704 12:29:16.581937 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1705 12:29:16.584885 PNP: 0c09.0 init finished in 22 msecs
1706 12:29:16.590647 Devices initialized
1707 12:29:16.594263 Show all devs... After init.
1708 12:29:16.597434 Root Device: enabled 1
1709 12:29:16.597857 DOMAIN: 0000: enabled 1
1710 12:29:16.600981 CPU_CLUSTER: 0: enabled 1
1711 12:29:16.604173 PCI: 00:00.0: enabled 1
1712 12:29:16.607730 PCI: 00:02.0: enabled 1
1713 12:29:16.608054 PCI: 00:04.0: enabled 1
1714 12:29:16.610698 PCI: 00:05.0: enabled 1
1715 12:29:16.613565 PCI: 00:06.0: enabled 0
1716 12:29:16.617188 PCI: 00:07.0: enabled 0
1717 12:29:16.617431 PCI: 00:07.1: enabled 0
1718 12:29:16.620363 PCI: 00:07.2: enabled 0
1719 12:29:16.624020 PCI: 00:07.3: enabled 0
1720 12:29:16.627111 PCI: 00:08.0: enabled 1
1721 12:29:16.627438 PCI: 00:09.0: enabled 0
1722 12:29:16.630302 PCI: 00:0a.0: enabled 0
1723 12:29:16.633802 PCI: 00:0d.0: enabled 1
1724 12:29:16.634041 PCI: 00:0d.1: enabled 0
1725 12:29:16.636880
1726 12:29:16.637120 PCI: 00:0d.2: enabled 0
1727 12:29:16.640779 PCI: 00:0d.3: enabled 0
1728 12:29:16.643673 PCI: 00:0e.0: enabled 0
1729 12:29:16.643910 PCI: 00:10.2: enabled 1
1730 12:29:16.646941 PCI: 00:10.6: enabled 0
1731 12:29:16.650766 PCI: 00:10.7: enabled 0
1732 12:29:16.654038 PCI: 00:12.0: enabled 0
1733 12:29:16.654363 PCI: 00:12.6: enabled 0
1734 12:29:16.657093 PCI: 00:13.0: enabled 0
1735 12:29:16.660916 PCI: 00:14.0: enabled 1
1736 12:29:16.663641 PCI: 00:14.1: enabled 0
1737 12:29:16.663886 PCI: 00:14.2: enabled 1
1738 12:29:16.667172 PCI: 00:14.3: enabled 1
1739 12:29:16.670317 PCI: 00:15.0: enabled 1
1740 12:29:16.674042 PCI: 00:15.1: enabled 1
1741 12:29:16.674354 PCI: 00:15.2: enabled 1
1742 12:29:16.677366 PCI: 00:15.3: enabled 1
1743 12:29:16.680192 PCI: 00:16.0: enabled 1
1744 12:29:16.680436 PCI: 00:16.1: enabled 0
1745 12:29:16.683647 PCI: 00:16.2: enabled 0
1746 12:29:16.687039 PCI: 00:16.3: enabled 0
1747 12:29:16.690377 PCI: 00:16.4: enabled 0
1748 12:29:16.690693 PCI: 00:16.5: enabled 0
1749 12:29:16.693803 PCI: 00:17.0: enabled 0
1750 12:29:16.696767 PCI: 00:19.0: enabled 0
1751 12:29:16.700520 PCI: 00:19.1: enabled 1
1752 12:29:16.700946 PCI: 00:19.2: enabled 0
1753 12:29:16.703479 PCI: 00:1c.0: enabled 1
1754 12:29:16.706860 PCI: 00:1c.1: enabled 0
1755 12:29:16.710354 PCI: 00:1c.2: enabled 0
1756 12:29:16.710657 PCI: 00:1c.3: enabled 0
1757 12:29:16.713617 PCI: 00:1c.4: enabled 0
1758 12:29:16.716488 PCI: 00:1c.5: enabled 0
1759 12:29:16.716717 PCI: 00:1c.6: enabled 1
1760 12:29:16.720330
1761 12:29:16.720515 PCI: 00:1c.7: enabled 0
1762 12:29:16.723181 PCI: 00:1d.0: enabled 1
1763 12:29:16.726798 PCI: 00:1d.1: enabled 0
1764 12:29:16.727040 PCI: 00:1d.2: enabled 1
1765 12:29:16.730520 PCI: 00:1d.3: enabled 0
1766 12:29:16.733383 PCI: 00:1e.0: enabled 1
1767 12:29:16.736474 PCI: 00:1e.1: enabled 0
1768 12:29:16.736643 PCI: 00:1e.2: enabled 1
1769 12:29:16.739793 PCI: 00:1e.3: enabled 1
1770 12:29:16.743258 PCI: 00:1f.0: enabled 1
1771 12:29:16.746591 PCI: 00:1f.1: enabled 0
1772 12:29:16.746745 PCI: 00:1f.2: enabled 1
1773 12:29:16.750254 PCI: 00:1f.3: enabled 1
1774 12:29:16.753129 PCI: 00:1f.4: enabled 0
1775 12:29:16.756642 PCI: 00:1f.5: enabled 1
1776 12:29:16.756795 PCI: 00:1f.6: enabled 0
1777 12:29:16.759902 PCI: 00:1f.7: enabled 0
1778 12:29:16.763041 APIC: 00: enabled 1
1779 12:29:16.763196 GENERIC: 0.0: enabled 1
1780 12:29:16.766568 GENERIC: 0.0: enabled 1
1781 12:29:16.769776 GENERIC: 1.0: enabled 1
1782 12:29:16.772940 GENERIC: 0.0: enabled 1
1783 12:29:16.773094 GENERIC: 1.0: enabled 1
1784 12:29:16.777292 USB0 port 0: enabled 1
1785 12:29:16.779785 GENERIC: 0.0: enabled 1
1786 12:29:16.779979 USB0 port 0: enabled 1
1787 12:29:16.782868 GENERIC: 0.0: enabled 1
1788 12:29:16.786283 I2C: 00:1a: enabled 1
1789 12:29:16.790322 I2C: 00:31: enabled 1
1790 12:29:16.790564 I2C: 00:32: enabled 1
1791 12:29:16.793338 I2C: 00:10: enabled 1
1792 12:29:16.796886 I2C: 00:15: enabled 1
1793 12:29:16.797128 GENERIC: 0.0: enabled 0
1794 12:29:16.800544 GENERIC: 1.0: enabled 0
1795 12:29:16.803241 GENERIC: 0.0: enabled 1
1796 12:29:16.803438 SPI: 00: enabled 1
1797 12:29:16.806335 SPI: 00: enabled 1
1798 12:29:16.809417 PNP: 0c09.0: enabled 1
1799 12:29:16.809626 GENERIC: 0.0: enabled 1
1800 12:29:16.812887 USB3 port 0: enabled 1
1801 12:29:16.816579 USB3 port 1: enabled 1
1802 12:29:16.816830 USB3 port 2: enabled 0
1803 12:29:16.820129
1804 12:29:16.820519 USB3 port 3: enabled 0
1805 12:29:16.823182 USB2 port 0: enabled 0
1806 12:29:16.826311 USB2 port 1: enabled 1
1807 12:29:16.826713 USB2 port 2: enabled 1
1808 12:29:16.830364 USB2 port 3: enabled 0
1809 12:29:16.833229 USB2 port 4: enabled 1
1810 12:29:16.833652 USB2 port 5: enabled 0
1811 12:29:16.836711 USB2 port 6: enabled 0
1812 12:29:16.839707 USB2 port 7: enabled 0
1813 12:29:16.843173 USB2 port 8: enabled 0
1814 12:29:16.843636 USB2 port 9: enabled 0
1815 12:29:16.846299 USB3 port 0: enabled 0
1816 12:29:16.849741 USB3 port 1: enabled 1
1817 12:29:16.850144 USB3 port 2: enabled 0
1818 12:29:16.853511 USB3 port 3: enabled 0
1819 12:29:16.856553 GENERIC: 0.0: enabled 1
1820 12:29:16.859481 GENERIC: 1.0: enabled 1
1821 12:29:16.859881 APIC: 01: enabled 1
1822 12:29:16.863575 APIC: 03: enabled 1
1823 12:29:16.863916 APIC: 05: enabled 1
1824 12:29:16.866200 APIC: 07: enabled 1
1825 12:29:16.869920 APIC: 06: enabled 1
1826 12:29:16.870140 APIC: 02: enabled 1
1827 12:29:16.872709 APIC: 04: enabled 1
1828 12:29:16.876267 PCI: 01:00.0: enabled 1
1829 12:29:16.879825 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1830 12:29:16.886251 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1831 12:29:16.889983 ELOG: NV offset 0xf30000 size 0x1000
1832 12:29:16.896026 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1833 12:29:16.903371 ELOG: Event(17) added with size 13 at 2022-12-01 12:29:16 UTC
1834 12:29:16.909513 ELOG: Event(92) added with size 9 at 2022-12-01 12:29:16 UTC
1835 12:29:16.916330 ELOG: Event(93) added with size 9 at 2022-12-01 12:29:16 UTC
1836 12:29:16.922821 ELOG: Event(16) added with size 11 at 2022-12-01 12:29:16 UTC
1837 12:29:16.926084 Erasing flash addr f30000 + 4 KiB
1838 12:29:16.981458 ELOG: Event(9E) added with size 10 at 2022-12-01 12:29:16 UTC
1839 12:29:16.987755 ELOG: Event(9F) added with size 14 at 2022-12-01 12:29:16 UTC
1840 12:29:16.994840 BS: BS_DEV_INIT exit times (exec / console): 30 / 55 ms
1841 12:29:17.001478 ELOG: Event(A1) added with size 10 at 2022-12-01 12:29:16 UTC
1842 12:29:17.007754 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1843 12:29:17.011358 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1844 12:29:17.014399 Finalize devices...
1845 12:29:17.017639 Devices finalized
1846 12:29:17.021156 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1847 12:29:17.028126 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1848 12:29:17.034435 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1849 12:29:17.037384 ME: HFSTS1 : 0x80030055
1850 12:29:17.041030 ME: HFSTS2 : 0x30280116
1851 12:29:17.047411 ME: HFSTS3 : 0x00000050
1852 12:29:17.051355 ME: HFSTS4 : 0x00004000
1853 12:29:17.054098 ME: HFSTS5 : 0x00000000
1854 12:29:17.060677 ME: HFSTS6 : 0x00400006
1855 12:29:17.064151 ME: Manufacturing Mode : YES
1856 12:29:17.067742 ME: SPI Protection Mode Enabled : NO
1857 12:29:17.070631 ME: FW Partition Table : OK
1858 12:29:17.074235 ME: Bringup Loader Failure : NO
1859 12:29:17.077246 ME: Firmware Init Complete : NO
1860 12:29:17.083902 ME: Boot Options Present : NO
1861 12:29:17.087191 ME: Update In Progress : NO
1862 12:29:17.090402 ME: D0i3 Support : YES
1863 12:29:17.094004 ME: Low Power State Enabled : NO
1864 12:29:17.097394 ME: CPU Replaced : YES
1865 12:29:17.100456 ME: CPU Replacement Valid : YES
1866 12:29:17.104041 ME: Current Working State : 5
1867 12:29:17.107009 ME: Current Operation State : 1
1868 12:29:17.110400 ME: Current Operation Mode : 3
1869 12:29:17.117011 ME: Error Code : 0
1870 12:29:17.120818 ME: Enhanced Debug Mode : NO
1871 12:29:17.123602 ME: CPU Debug Disabled : YES
1872 12:29:17.127316 ME: TXT Support : NO
1873 12:29:17.133469 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1874 12:29:17.140668 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1875 12:29:17.144065 CBFS: 'fallback/slic' not found.
1876 12:29:17.146836 ACPI: Writing ACPI tables at 76b01000.
1877 12:29:17.150867 ACPI: * FACS
1878 12:29:17.151058 ACPI: * DSDT
1879 12:29:17.153528 Ramoops buffer: 0x100000@0x76a00000.
1880 12:29:17.160318 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1881 12:29:17.163932 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1882 12:29:17.167153 Google Chrome EC: version:
1883 12:29:17.170201 ro: voema_v2.0.7540-147f8d37d1
1884 12:29:17.173943 rw: voema_v2.0.7540-147f8d37d1
1885 12:29:17.177710 running image: 2
1886 12:29:17.183396 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1887 12:29:17.187081 ACPI: * FADT
1888 12:29:17.187322 SCI is IRQ9
1889 12:29:17.190748 ACPI: added table 1/32, length now 40
1890 12:29:17.193597 ACPI: * SSDT
1891 12:29:17.196674 Found 1 CPU(s) with 8 core(s) each.
1892 12:29:17.200416 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1893 12:29:17.206992 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1894 12:29:17.210335 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1895 12:29:17.213340 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1896 12:29:17.220346 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1897 12:29:17.226682 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1898 12:29:17.230233 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1899 12:29:17.236848 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1900 12:29:17.242951 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1901 12:29:17.246342 \_SB.PCI0.RP09: Added StorageD3Enable property
1902 12:29:17.249815 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1903 12:29:17.256474 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1904 12:29:17.263570 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1905 12:29:17.266396 PS2K: Passing 80 keymaps to kernel
1906 12:29:17.273434 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1907 12:29:17.279586 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1908 12:29:17.286772 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1909 12:29:17.293316 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1910 12:29:17.299693 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1911 12:29:17.306640 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1912 12:29:17.313204 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1913 12:29:17.319601 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1914 12:29:17.322818 ACPI: added table 2/32, length now 44
1915 12:29:17.323058 ACPI: * MCFG
1916 12:29:17.330032 ACPI: added table 3/32, length now 48
1917 12:29:17.330344 ACPI: * TPM2
1918 12:29:17.333286 TPM2 log created at 0x769f0000
1919 12:29:17.336134 ACPI: added table 4/32, length now 52
1920 12:29:17.339431 ACPI: * MADT
1921 12:29:17.339685 SCI is IRQ9
1922 12:29:17.342942 ACPI: added table 5/32, length now 56
1923 12:29:17.346300 current = 76b09850
1924 12:29:17.346716 ACPI: * DMAR
1925 12:29:17.349536 ACPI: added table 6/32, length now 60
1926 12:29:17.356529 ACPI: added table 7/32, length now 64
1927 12:29:17.357080 ACPI: * HPET
1928 12:29:17.359561 ACPI: added table 8/32, length now 68
1929 12:29:17.362830 ACPI: done.
1930 12:29:17.363315 ACPI tables: 35216 bytes.
1931 12:29:17.366419 smbios_write_tables: 769ef000
1932 12:29:17.370062 EC returned error result code 3
1933 12:29:17.372862 Couldn't obtain OEM name from CBI
1934 12:29:17.376492 Create SMBIOS type 16
1935 12:29:17.379887 Create SMBIOS type 17
1936 12:29:17.383093 GENERIC: 0.0 (WIFI Device)
1937 12:29:17.383671 SMBIOS tables: 1750 bytes.
1938 12:29:17.390040 Writing table forward entry at 0x00000500
1939 12:29:17.396310 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1940 12:29:17.400004 Writing coreboot table at 0x76b25000
1941 12:29:17.406471 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1942 12:29:17.409893 1. 0000000000001000-000000000009ffff: RAM
1943 12:29:17.413164 2. 00000000000a0000-00000000000fffff: RESERVED
1944 12:29:17.419886 3. 0000000000100000-00000000769eefff: RAM
1945 12:29:17.422733 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1946 12:29:17.429671 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1947 12:29:17.436235 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1948 12:29:17.439892 7. 0000000077000000-000000007fbfffff: RESERVED
1949 12:29:17.442757 8. 00000000c0000000-00000000cfffffff: RESERVED
1950 12:29:17.449263 9. 00000000f8000000-00000000f9ffffff: RESERVED
1951 12:29:17.452762 10. 00000000fb000000-00000000fb000fff: RESERVED
1952 12:29:17.459469 11. 00000000fe000000-00000000fe00ffff: RESERVED
1953 12:29:17.462956 12. 00000000fed80000-00000000fed87fff: RESERVED
1954 12:29:17.469713 13. 00000000fed90000-00000000fed92fff: RESERVED
1955 12:29:17.472705 14. 00000000feda0000-00000000feda1fff: RESERVED
1956 12:29:17.479282 15. 00000000fedc0000-00000000feddffff: RESERVED
1957 12:29:17.482528 16. 0000000100000000-00000002803fffff: RAM
1958 12:29:17.485583 Passing 4 GPIOs to payload:
1959 12:29:17.489089 NAME | PORT | POLARITY | VALUE
1960 12:29:17.495899 lid | undefined | high | high
1961 12:29:17.499168 power | undefined | high | low
1962 12:29:17.505587 oprom | undefined | high | low
1963 12:29:17.512065 EC in RW | 0x000000e5 | high | high
1964 12:29:17.519296 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum cc14
1965 12:29:17.519556 coreboot table: 1576 bytes.
1966 12:29:17.525730 IMD ROOT 0. 0x76fff000 0x00001000
1967 12:29:17.529220 IMD SMALL 1. 0x76ffe000 0x00001000
1968 12:29:17.532634 FSP MEMORY 2. 0x76c4e000 0x003b0000
1969 12:29:17.535630 VPD 3. 0x76c4d000 0x00000367
1970 12:29:17.538800 RO MCACHE 4. 0x76c4c000 0x00000fdc
1971 12:29:17.542481 CONSOLE 5. 0x76c2c000 0x00020000
1972 12:29:17.546259 FMAP 6. 0x76c2b000 0x00000578
1973 12:29:17.548609 TIME STAMP 7. 0x76c2a000 0x00000910
1974 12:29:17.552120 VBOOT WORK 8. 0x76c16000 0x00014000
1975 12:29:17.558617 ROMSTG STCK 9. 0x76c15000 0x00001000
1976 12:29:17.562005 AFTER CAR 10. 0x76c0a000 0x0000b000
1977 12:29:17.565335 RAMSTAGE 11. 0x76b97000 0x00073000
1978 12:29:17.568626 REFCODE 12. 0x76b42000 0x00055000
1979 12:29:17.572355 SMM BACKUP 13. 0x76b32000 0x00010000
1980 12:29:17.575818 4f444749 14. 0x76b30000 0x00002000
1981 12:29:17.578905 EXT VBT15. 0x76b2d000 0x0000219f
1982 12:29:17.582481 COREBOOT 16. 0x76b25000 0x00008000
1983 12:29:17.585734 ACPI 17. 0x76b01000 0x00024000
1984 12:29:17.592337 ACPI GNVS 18. 0x76b00000 0x00001000
1985 12:29:17.595919 RAMOOPS 19. 0x76a00000 0x00100000
1986 12:29:17.599269 TPM2 TCGLOG20. 0x769f0000 0x00010000
1987 12:29:17.602706 SMBIOS 21. 0x769ef000 0x00000800
1988 12:29:17.603063 IMD small region:
1989 12:29:17.609252 IMD ROOT 0. 0x76ffec00 0x00000400
1990 12:29:17.613271 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1991 12:29:17.616190 POWER STATE 2. 0x76ffeb80 0x00000044
1992 12:29:17.619665 ROMSTAGE 3. 0x76ffeb60 0x00000004
1993 12:29:17.622638 MEM INFO 4. 0x76ffe980 0x000001e0
1994 12:29:17.630079 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1995 12:29:17.632809 MTRR: Physical address space:
1996 12:29:17.638968 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1997 12:29:17.645668 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1998 12:29:17.652426 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1999 12:29:17.659423 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2000 12:29:17.662773 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2001 12:29:17.668875 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2002 12:29:17.675576 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2003 12:29:17.678812 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 12:29:17.685840 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 12:29:17.689436 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 12:29:17.692615 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 12:29:17.695621 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 12:29:17.702208 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 12:29:17.705395 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 12:29:17.708789 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 12:29:17.712225 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 12:29:17.718864 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 12:29:17.722564 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 12:29:17.725492 call enable_fixed_mtrr()
2015 12:29:17.728817 CPU physical address size: 39 bits
2016 12:29:17.732174 MTRR: default type WB/UC MTRR counts: 6/6.
2017 12:29:17.735264 MTRR: UC selected as default type.
2018 12:29:17.742177 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2019 12:29:17.749341 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2020 12:29:17.755688 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2021 12:29:17.761897 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2022 12:29:17.768863 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2023 12:29:17.775139 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2024 12:29:17.778442 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 12:29:17.785417 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 12:29:17.788383 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 12:29:17.792234 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:29:17.795497 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:29:17.798538 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:29:17.805244 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:29:17.808702 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:29:17.811836 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:29:17.814823 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:29:17.821562 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:29:17.822141
2036 12:29:17.822526 MTRR check
2037 12:29:17.825065 call enable_fixed_mtrr()
2038 12:29:17.828302 Fixed MTRRs : Enabled
2039 12:29:17.831375 Variable MTRRs: Enabled
2040 12:29:17.831858
2041 12:29:17.834831 CPU physical address size: 39 bits
2042 12:29:17.841983 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2043 12:29:17.845084 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 12:29:17.848160 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 12:29:17.855053 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 12:29:17.857942 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 12:29:17.861537 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 12:29:17.864727 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 12:29:17.871522 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 12:29:17.874939 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 12:29:17.878001 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 12:29:17.881392 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 12:29:17.884669 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 12:29:17.891445 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 12:29:17.894341 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 12:29:17.897820 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 12:29:17.901322
2058 12:29:17.904274 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 12:29:17.907587 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 12:29:17.911365 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 12:29:17.914410 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 12:29:17.921237 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 12:29:17.924877 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 12:29:17.927893 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 12:29:17.931316 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 12:29:17.935651 call enable_fixed_mtrr()
2067 12:29:17.938450 call enable_fixed_mtrr()
2068 12:29:17.941861 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 12:29:17.945200 MTRR: Fixed MSR 0x250 0x0606060606060606
2070 12:29:17.952321 MTRR: Fixed MSR 0x258 0x0606060606060606
2071 12:29:17.955439 MTRR: Fixed MSR 0x259 0x0000000000000000
2072 12:29:17.958407 MTRR: Fixed MSR 0x268 0x0606060606060606
2073 12:29:17.961678 MTRR: Fixed MSR 0x269 0x0606060606060606
2074 12:29:17.968808 MTRR: Fixed MSR 0x26a 0x0606060606060606
2075 12:29:17.971981 MTRR: Fixed MSR 0x26b 0x0606060606060606
2076 12:29:17.975589 MTRR: Fixed MSR 0x26c 0x0606060606060606
2077 12:29:17.978452 MTRR: Fixed MSR 0x26d 0x0606060606060606
2078 12:29:17.981782 MTRR: Fixed MSR 0x26e 0x0606060606060606
2079 12:29:17.985775
2080 12:29:17.988517 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 12:29:17.991880 MTRR: Fixed MSR 0x258 0x0606060606060606
2082 12:29:17.995089 call enable_fixed_mtrr()
2083 12:29:17.998347 MTRR: Fixed MSR 0x259 0x0000000000000000
2084 12:29:18.001773 MTRR: Fixed MSR 0x268 0x0606060606060606
2085 12:29:18.005552
2086 12:29:18.008257 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 12:29:18.011671 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 12:29:18.015420 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 12:29:18.018197 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 12:29:18.025538 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 12:29:18.028200 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 12:29:18.031861 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 12:29:18.035635 CPU physical address size: 39 bits
2094 12:29:18.041937 call enable_fixed_mtrr()
2095 12:29:18.044919 MTRR: Fixed MSR 0x250 0x0606060606060606
2096 12:29:18.048701 MTRR: Fixed MSR 0x250 0x0606060606060606
2097 12:29:18.051738 MTRR: Fixed MSR 0x258 0x0606060606060606
2098 12:29:18.054792 MTRR: Fixed MSR 0x259 0x0000000000000000
2099 12:29:18.058662
2100 12:29:18.062059 MTRR: Fixed MSR 0x268 0x0606060606060606
2101 12:29:18.064886 MTRR: Fixed MSR 0x269 0x0606060606060606
2102 12:29:18.068292 MTRR: Fixed MSR 0x26a 0x0606060606060606
2103 12:29:18.071836 MTRR: Fixed MSR 0x26b 0x0606060606060606
2104 12:29:18.078296 MTRR: Fixed MSR 0x26c 0x0606060606060606
2105 12:29:18.082129 MTRR: Fixed MSR 0x26d 0x0606060606060606
2106 12:29:18.084776 MTRR: Fixed MSR 0x26e 0x0606060606060606
2107 12:29:18.087988 MTRR: Fixed MSR 0x26f 0x0606060606060606
2108 12:29:18.095835 MTRR: Fixed MSR 0x258 0x0606060606060606
2109 12:29:18.096414 call enable_fixed_mtrr()
2110 12:29:18.102204 MTRR: Fixed MSR 0x259 0x0000000000000000
2111 12:29:18.105968 MTRR: Fixed MSR 0x268 0x0606060606060606
2112 12:29:18.109083 MTRR: Fixed MSR 0x269 0x0606060606060606
2113 12:29:18.112218 MTRR: Fixed MSR 0x26a 0x0606060606060606
2114 12:29:18.119037 MTRR: Fixed MSR 0x26b 0x0606060606060606
2115 12:29:18.122785 MTRR: Fixed MSR 0x26c 0x0606060606060606
2116 12:29:18.125836 MTRR: Fixed MSR 0x26d 0x0606060606060606
2117 12:29:18.129276 MTRR: Fixed MSR 0x26e 0x0606060606060606
2118 12:29:18.135547 MTRR: Fixed MSR 0x26f 0x0606060606060606
2119 12:29:18.138671 CPU physical address size: 39 bits
2120 12:29:18.142266 call enable_fixed_mtrr()
2121 12:29:18.145732 CPU physical address size: 39 bits
2122 12:29:18.149243 CPU physical address size: 39 bits
2123 12:29:18.152246 CPU physical address size: 39 bits
2124 12:29:18.155616 Checking cr50 for pending updates
2125 12:29:18.159410
2126 12:29:18.160027 CPU physical address size: 39 bits
2127 12:29:18.164623 Reading cr50 TPM mode
2128 12:29:18.175023 BS: BS_PAYLOAD_LOAD entry times (exec / console): 322 / 6 ms
2129 12:29:18.185254 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2130 12:29:18.187841 Checking segment from ROM address 0xffc02b38
2131 12:29:18.191939 Checking segment from ROM address 0xffc02b54
2132 12:29:18.198579 Loading segment from ROM address 0xffc02b38
2133 12:29:18.199192 code (compression=0)
2134 12:29:18.208361 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2135 12:29:18.215206 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2136 12:29:18.218108 it's not compressed!
2137 12:29:18.357301 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2138 12:29:18.364486 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2139 12:29:18.370868 Loading segment from ROM address 0xffc02b54
2140 12:29:18.371524 Entry Point 0x30000000
2141 12:29:18.374485 Loaded segments
2142 12:29:18.380348 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2143 12:29:18.423807 Finalizing chipset.
2144 12:29:18.426871 Finalizing SMM.
2145 12:29:18.427480 APMC done.
2146 12:29:18.433841 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2147 12:29:18.436811 mp_park_aps done after 0 msecs.
2148 12:29:18.440186 Jumping to boot code at 0x30000000(0x76b25000)
2149 12:29:18.450213 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2150 12:29:18.450788
2151 12:29:18.451232
2152 12:29:18.451595
2153 12:29:18.453724 Starting depthcharge on Voema...
2154 12:29:18.454228
2155 12:29:18.455364 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2156 12:29:18.455965 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2157 12:29:18.456455 Setting prompt string to ['volteer:']
2158 12:29:18.456901 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2159 12:29:18.463649 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2160 12:29:18.464249
2161 12:29:18.469843 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2162 12:29:18.470330
2163 12:29:18.473301 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2164 12:29:18.476879
2165 12:29:18.480389 Failed to find eMMC card reader
2166 12:29:18.480976
2167 12:29:18.481356 Wipe memory regions:
2168 12:29:18.481708
2169 12:29:18.486386 [0x00000000001000, 0x000000000a0000)
2170 12:29:18.486868
2171 12:29:18.490175 [0x00000000100000, 0x00000030000000)
2172 12:29:18.490749
2173 12:29:18.518858 [0x00000032662db0, 0x000000769ef000)
2174 12:29:18.519457
2175 12:29:18.558378 [0x00000100000000, 0x00000280400000)
2176 12:29:18.558987
2177 12:29:18.763635 ec_init: CrosEC protocol v3 supported (256, 256)
2178 12:29:18.764205
2179 12:29:18.770815 update_port_state: port C0 state: usb enable 1 mux conn 0
2180 12:29:18.771422
2181 12:29:18.780393 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2182 12:29:18.780966
2183 12:29:18.787204 pmc_check_ipc_sts: STS_BUSY done after 1570 us
2184 12:29:18.787775
2185 12:29:18.790777 send_conn_disc_msg: pmc_send_cmd succeeded
2186 12:29:18.791385
2187 12:29:19.222987 R8152: Initializing
2188 12:29:19.223557
2189 12:29:19.225754 Version 6 (ocp_data = 5c30)
2190 12:29:19.226223
2191 12:29:19.228701 R8152: Done initializing
2192 12:29:19.229174
2193 12:29:19.232233 Adding net device
2194 12:29:19.232806
2195 12:29:19.538461 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2196 12:29:19.539071
2197 12:29:19.539457
2198 12:29:19.539809
2199 12:29:19.541665 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2201 12:29:19.643474 volteer: tftpboot 192.168.201.1 8193656/tftp-deploy-zyb_zyzi/kernel/bzImage 8193656/tftp-deploy-zyb_zyzi/kernel/cmdline 8193656/tftp-deploy-zyb_zyzi/ramdisk/ramdisk.cpio.gz
2202 12:29:19.644162 Setting prompt string to 'Starting kernel'
2203 12:29:19.644571 Setting prompt string to ['Starting kernel']
2204 12:29:19.644945 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2205 12:29:19.645437 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2206 12:29:19.649371 tftpboot 192.168.201.1 8193656/tftp-deploy-zyb_zyzi/kernel/bzImoy-zyb_zyzi/kernel/cmdline 8193656/tftp-deploy-zyb_zyzi/ramdisk/ramdisk.cpio.gz
2207 12:29:19.649890
2208 12:29:19.650433 Waiting for link
2209 12:29:19.650803
2210 12:29:19.852721 done.
2211 12:29:19.853373
2212 12:29:19.853821 MAC: 00:24:32:30:7d:bc
2213 12:29:19.854532
2214 12:29:19.855806 Sending DHCP discover... done.
2215 12:29:19.856333
2216 12:29:19.858957 Waiting for reply... done.
2217 12:29:19.859534
2218 12:29:19.862266 Sending DHCP request... done.
2219 12:29:19.862741
2220 12:29:19.870053 Waiting for reply... done.
2221 12:29:19.870614
2222 12:29:19.871033 My ip is 192.168.201.22
2223 12:29:19.871394
2224 12:29:19.873150 The DHCP server ip is 192.168.201.1
2225 12:29:19.876408
2226 12:29:19.879822 TFTP server IP predefined by user: 192.168.201.1
2227 12:29:19.880300
2228 12:29:19.886356 Bootfile predefined by user: 8193656/tftp-deploy-zyb_zyzi/kernel/bzImage
2229 12:29:19.886969
2230 12:29:19.890000 Sending tftp read request... done.
2231 12:29:19.890577
2232 12:29:19.896673 Waiting for the transfer...
2233 12:29:19.897151
2234 12:29:20.601763 00000000 ################################################################
2235 12:29:20.602347
2236 12:29:21.306145 00080000 ################################################################
2237 12:29:21.306708
2238 12:29:22.025120 00100000 ################################################################
2239 12:29:22.025685
2240 12:29:22.746539 00180000 ################################################################
2241 12:29:22.747116
2242 12:29:23.462444 00200000 ################################################################
2243 12:29:23.463064
2244 12:29:24.180651 00280000 ################################################################
2245 12:29:24.181196
2246 12:29:24.894646 00300000 ################################################################
2247 12:29:24.895243
2248 12:29:25.618993 00380000 ################################################################
2249 12:29:25.619537
2250 12:29:26.331467 00400000 ################################################################
2251 12:29:26.331997
2252 12:29:27.045970 00480000 ################################################################
2253 12:29:27.046524
2254 12:29:27.760353 00500000 ################################################################
2255 12:29:27.760926
2256 12:29:28.474557 00580000 ################################################################
2257 12:29:28.475186
2258 12:29:29.194108 00600000 ################################################################
2259 12:29:29.194637
2260 12:29:29.679206 00680000 ############################################## done.
2261 12:29:29.679376
2262 12:29:29.682957 The bootfile was 7188368 bytes long.
2263 12:29:29.683076
2264 12:29:29.686535 Sending tftp read request... done.
2265 12:29:29.686709
2266 12:29:29.689170 Waiting for the transfer...
2267 12:29:29.689289
2268 12:29:30.360579 00000000 ################################################################
2269 12:29:30.361113
2270 12:29:31.067238 00080000 ################################################################
2271 12:29:31.067791
2272 12:29:31.763750 00100000 ################################################################
2273 12:29:31.764276
2274 12:29:32.446143 00180000 ################################################################
2275 12:29:32.446736
2276 12:29:33.133268 00200000 ################################################################
2277 12:29:33.133800
2278 12:29:33.841151 00280000 ################################################################
2279 12:29:33.841682
2280 12:29:34.558281 00300000 ################################################################
2281 12:29:34.558829
2282 12:29:35.260401 00380000 ################################################################
2283 12:29:35.260941
2284 12:29:35.963180 00400000 ################################################################
2285 12:29:35.963750
2286 12:29:36.668002 00480000 ################################################################
2287 12:29:36.668607
2288 12:29:37.005771 00500000 ################################ done.
2289 12:29:37.006316
2290 12:29:37.008848 Sending tftp read request... done.
2291 12:29:37.009331
2292 12:29:37.011944 Waiting for the transfer...
2293 12:29:37.012415
2294 12:29:37.012797 00000000 # done.
2295 12:29:37.013124
2296 12:29:37.021986 Command line loaded dynamically from TFTP file: 8193656/tftp-deploy-zyb_zyzi/kernel/cmdline
2297 12:29:37.022419
2298 12:29:37.041907 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8193656/extract-nfsrootfs-_rs2kkei,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2299 12:29:37.042441
2300 12:29:37.045374 Shutting down all USB controllers.
2301 12:29:37.045807
2302 12:29:37.048466 Removing current net device
2303 12:29:37.048993
2304 12:29:37.051781 Finalizing coreboot
2305 12:29:37.052209
2306 12:29:37.058403 Exiting depthcharge with code 4 at timestamp: 27309896
2307 12:29:37.058961
2308 12:29:37.059311
2309 12:29:37.059627 Starting kernel ...
2310 12:29:37.059929
2311 12:29:37.060220
2312 12:29:37.060506
2313 12:29:37.061614 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2314 12:29:37.062090 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2315 12:29:37.062460 Setting prompt string to ['Linux version [0-9]']
2316 12:29:37.062803 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2317 12:29:37.063190 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2319 12:34:02.062995 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2321 12:34:02.064010 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2323 12:34:02.064799 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2326 12:34:02.066125 end: 2 depthcharge-action (duration 00:05:00) [common]
2328 12:34:02.067266 Cleaning after the job
2329 12:34:02.067383 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/ramdisk
2330 12:34:02.067838 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/kernel
2331 12:34:02.068365 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/nfsrootfs
2332 12:34:02.115867 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8193656/tftp-deploy-zyb_zyzi/modules
2333 12:34:02.116179 start: 4.1 power-off (timeout 00:00:30) [common]
2334 12:34:02.116347 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2335 12:34:02.135772 >> Command sent successfully.
2336 12:34:02.137639 Returned 0 in 0 seconds
2337 12:34:02.238798 end: 4.1 power-off (duration 00:00:00) [common]
2339 12:34:02.240281 start: 4.2 read-feedback (timeout 00:10:00) [common]
2340 12:34:02.241363 Listened to connection for namespace 'common' for up to 1s
2341 12:34:03.243667 Finalising connection for namespace 'common'
2342 12:34:03.244353 Disconnecting from shell: Finalise
2343 12:34:03.345770 end: 4.2 read-feedback (duration 00:00:01) [common]
2344 12:34:03.346324 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8193656
2345 12:34:03.535206 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8193656
2346 12:34:03.535404 JobError: Your job cannot terminate cleanly.