Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 05:02:52.723950 lava-dispatcher, installed at version: 2022.11
2 05:02:52.724158 start: 0 validate
3 05:02:52.724305 Start time: 2023-02-07 05:02:52.724295+00:00 (UTC)
4 05:02:52.724458 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:02:52.724602 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230203.0%2Fx86%2Frootfs.cpio.gz exists
6 05:02:53.016610 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:02:53.016792 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:02:53.305316 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:02:53.305503 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
10 05:02:53.594574 validate duration: 0.87
12 05:02:53.594883 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 05:02:53.595005 start: 1.1 download-retry (timeout 00:10:00) [common]
14 05:02:53.595106 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 05:02:53.595219 Not decompressing ramdisk as can be used compressed.
16 05:02:53.595313 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230203.0/x86/rootfs.cpio.gz
17 05:02:53.595390 saving as /var/lib/lava/dispatcher/tmp/9043132/tftp-deploy-jhx6tyfq/ramdisk/rootfs.cpio.gz
18 05:02:53.595460 total size: 8423718 (8MB)
19 05:02:53.596622 progress 0% (0MB)
20 05:02:53.598916 progress 5% (0MB)
21 05:02:53.601244 progress 10% (0MB)
22 05:02:53.603629 progress 15% (1MB)
23 05:02:53.605951 progress 20% (1MB)
24 05:02:53.608281 progress 25% (2MB)
25 05:02:53.610612 progress 30% (2MB)
26 05:02:53.612755 progress 35% (2MB)
27 05:02:53.615068 progress 40% (3MB)
28 05:02:53.617394 progress 45% (3MB)
29 05:02:53.619671 progress 50% (4MB)
30 05:02:53.621947 progress 55% (4MB)
31 05:02:53.624216 progress 60% (4MB)
32 05:02:53.626492 progress 65% (5MB)
33 05:02:53.628655 progress 70% (5MB)
34 05:02:53.630947 progress 75% (6MB)
35 05:02:53.633242 progress 80% (6MB)
36 05:02:53.635512 progress 85% (6MB)
37 05:02:53.637817 progress 90% (7MB)
38 05:02:53.640088 progress 95% (7MB)
39 05:02:53.642376 progress 100% (8MB)
40 05:02:53.642564 8MB downloaded in 0.05s (170.57MB/s)
41 05:02:53.642731 end: 1.1.1 http-download (duration 00:00:00) [common]
43 05:02:53.643015 end: 1.1 download-retry (duration 00:00:00) [common]
44 05:02:53.643116 start: 1.2 download-retry (timeout 00:10:00) [common]
45 05:02:53.643214 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 05:02:53.643333 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
47 05:02:53.643409 saving as /var/lib/lava/dispatcher/tmp/9043132/tftp-deploy-jhx6tyfq/kernel/bzImage
48 05:02:53.643479 total size: 7704464 (7MB)
49 05:02:53.643548 No compression specified
50 05:02:55.642534 progress 0% (0MB)
51 05:02:55.644812 progress 5% (0MB)
52 05:02:55.647082 progress 10% (0MB)
53 05:02:55.649338 progress 15% (1MB)
54 05:02:55.651585 progress 20% (1MB)
55 05:02:55.653675 progress 25% (1MB)
56 05:02:55.655921 progress 30% (2MB)
57 05:02:55.658177 progress 35% (2MB)
58 05:02:55.660427 progress 40% (2MB)
59 05:02:55.662465 progress 45% (3MB)
60 05:02:55.664682 progress 50% (3MB)
61 05:02:55.666895 progress 55% (4MB)
62 05:02:55.669120 progress 60% (4MB)
63 05:02:55.671203 progress 65% (4MB)
64 05:02:55.673328 progress 70% (5MB)
65 05:02:55.675440 progress 75% (5MB)
66 05:02:55.677560 progress 80% (5MB)
67 05:02:55.679504 progress 85% (6MB)
68 05:02:55.681622 progress 90% (6MB)
69 05:02:55.683735 progress 95% (7MB)
70 05:02:55.685867 progress 100% (7MB)
71 05:02:55.686055 7MB downloaded in 2.04s (3.60MB/s)
72 05:02:55.686219 end: 1.2.1 http-download (duration 00:00:02) [common]
74 05:02:55.686486 end: 1.2 download-retry (duration 00:00:02) [common]
75 05:02:55.686587 start: 1.3 download-retry (timeout 00:09:58) [common]
76 05:02:55.686684 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 05:02:55.686803 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
78 05:02:55.686882 saving as /var/lib/lava/dispatcher/tmp/9043132/tftp-deploy-jhx6tyfq/modules/modules.tar
79 05:02:55.686950 total size: 55964 (0MB)
80 05:02:55.687019 Using unxz to decompress xz
81 05:02:55.690307 progress 58% (0MB)
82 05:02:55.690720 progress 100% (0MB)
83 05:02:55.694560 0MB downloaded in 0.01s (7.02MB/s)
84 05:02:55.694822 end: 1.3.1 http-download (duration 00:00:00) [common]
86 05:02:55.695137 end: 1.3 download-retry (duration 00:00:00) [common]
87 05:02:55.695250 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 05:02:55.695369 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 05:02:55.695469 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 05:02:55.695573 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 05:02:55.695776 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog
92 05:02:55.695907 makedir: /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin
93 05:02:55.696006 makedir: /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/tests
94 05:02:55.696098 makedir: /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/results
95 05:02:55.696227 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-add-keys
96 05:02:55.696383 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-add-sources
97 05:02:55.696538 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-background-process-start
98 05:02:55.696680 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-background-process-stop
99 05:02:55.696809 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-common-functions
100 05:02:55.696951 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-echo-ipv4
101 05:02:55.697081 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-install-packages
102 05:02:55.697221 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-installed-packages
103 05:02:55.697351 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-os-build
104 05:02:55.697485 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-probe-channel
105 05:02:55.697621 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-probe-ip
106 05:02:55.697751 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-target-ip
107 05:02:55.697886 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-target-mac
108 05:02:55.698012 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-target-storage
109 05:02:55.698152 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-test-case
110 05:02:55.698279 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-test-event
111 05:02:55.698415 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-test-feedback
112 05:02:55.698543 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-test-raise
113 05:02:55.698685 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-test-reference
114 05:02:55.698811 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-test-runner
115 05:02:55.698953 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-test-set
116 05:02:55.699078 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-test-shell
117 05:02:55.699220 Updating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-install-packages (oe)
118 05:02:55.699357 Updating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/bin/lava-installed-packages (oe)
119 05:02:55.699477 Creating /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/environment
120 05:02:55.699579 LAVA metadata
121 05:02:55.699676 - LAVA_JOB_ID=9043132
122 05:02:55.699755 - LAVA_DISPATCHER_IP=192.168.201.1
123 05:02:55.699884 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 05:02:55.699962 skipped lava-vland-overlay
125 05:02:55.700053 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 05:02:55.700152 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 05:02:55.700224 skipped lava-multinode-overlay
128 05:02:55.700311 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 05:02:55.700405 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 05:02:55.700500 Loading test definitions
131 05:02:55.700608 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 05:02:55.700692 Using /lava-9043132 at stage 0
133 05:02:55.700987 uuid=9043132_1.4.2.3.1 testdef=None
134 05:02:55.701093 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 05:02:55.701197 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 05:02:55.701792 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 05:02:55.702073 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 05:02:55.702777 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 05:02:55.703076 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 05:02:55.703733 runner path: /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/0/tests/0_dmesg test_uuid 9043132_1.4.2.3.1
143 05:02:55.703906 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 05:02:55.704184 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 05:02:55.704281 Using /lava-9043132 at stage 1
147 05:02:55.704586 uuid=9043132_1.4.2.3.5 testdef=None
148 05:02:55.704689 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 05:02:55.704802 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 05:02:55.705334 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 05:02:55.705608 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 05:02:55.706299 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 05:02:55.706633 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 05:02:55.707267 runner path: /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/1/tests/1_bootrr test_uuid 9043132_1.4.2.3.5
157 05:02:55.707429 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 05:02:55.707686 Creating lava-test-runner.conf files
160 05:02:55.707762 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/0 for stage 0
161 05:02:55.707857 - 0_dmesg
162 05:02:55.707942 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9043132/lava-overlay-n5wcgrog/lava-9043132/1 for stage 1
163 05:02:55.708036 - 1_bootrr
164 05:02:55.708139 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 05:02:55.708237 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 05:02:55.715150 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 05:02:55.715280 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 05:02:55.715384 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 05:02:55.715482 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 05:02:55.715580 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 05:02:55.918143 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 05:02:55.918507 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 05:02:55.918632 extracting modules file /var/lib/lava/dispatcher/tmp/9043132/tftp-deploy-jhx6tyfq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9043132/extract-overlay-ramdisk-zcp1y5p4/ramdisk
174 05:02:55.923479 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 05:02:55.923607 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 05:02:55.923703 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9043132/compress-overlay-8ym431cb/overlay-1.4.2.4.tar.gz to ramdisk
177 05:02:55.923786 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9043132/compress-overlay-8ym431cb/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9043132/extract-overlay-ramdisk-zcp1y5p4/ramdisk
178 05:02:55.928172 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 05:02:55.928294 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 05:02:55.928399 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 05:02:55.928513 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 05:02:55.928602 Building ramdisk /var/lib/lava/dispatcher/tmp/9043132/extract-overlay-ramdisk-zcp1y5p4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9043132/extract-overlay-ramdisk-zcp1y5p4/ramdisk
183 05:02:55.999985 >> 48168 blocks
184 05:02:56.822810 rename /var/lib/lava/dispatcher/tmp/9043132/extract-overlay-ramdisk-zcp1y5p4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9043132/tftp-deploy-jhx6tyfq/ramdisk/ramdisk.cpio.gz
185 05:02:56.823242 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 05:02:56.823384 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 05:02:56.823514 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 05:02:56.823622 No mkimage arch provided, not using FIT.
189 05:02:56.823722 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 05:02:56.823822 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 05:02:56.823932 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 05:02:56.824045 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 05:02:56.824132 No LXC device requested
194 05:02:56.824231 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 05:02:56.824330 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 05:02:56.824430 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 05:02:56.824516 Checking files for TFTP limit of 4294967296 bytes.
198 05:02:56.824939 end: 1 tftp-deploy (duration 00:00:03) [common]
199 05:02:56.825057 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 05:02:56.825165 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 05:02:56.825307 substitutions:
202 05:02:56.825384 - {DTB}: None
203 05:02:56.825460 - {INITRD}: 9043132/tftp-deploy-jhx6tyfq/ramdisk/ramdisk.cpio.gz
204 05:02:56.825530 - {KERNEL}: 9043132/tftp-deploy-jhx6tyfq/kernel/bzImage
205 05:02:56.825598 - {LAVA_MAC}: None
206 05:02:56.825664 - {PRESEED_CONFIG}: None
207 05:02:56.825730 - {PRESEED_LOCAL}: None
208 05:02:56.825795 - {RAMDISK}: 9043132/tftp-deploy-jhx6tyfq/ramdisk/ramdisk.cpio.gz
209 05:02:56.825860 - {ROOT_PART}: None
210 05:02:56.825924 - {ROOT}: None
211 05:02:56.825988 - {SERVER_IP}: 192.168.201.1
212 05:02:56.826053 - {TEE}: None
213 05:02:56.826131 Parsed boot commands:
214 05:02:56.826198 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 05:02:56.826395 Parsed boot commands: tftpboot 192.168.201.1 9043132/tftp-deploy-jhx6tyfq/kernel/bzImage 9043132/tftp-deploy-jhx6tyfq/kernel/cmdline 9043132/tftp-deploy-jhx6tyfq/ramdisk/ramdisk.cpio.gz
216 05:02:56.826526 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 05:02:56.826634 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 05:02:56.826747 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 05:02:56.826851 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 05:02:56.826935 Not connected, no need to disconnect.
221 05:02:56.827026 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 05:02:56.827120 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 05:02:56.827198 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
224 05:02:56.830089 Setting prompt string to ['lava-test: # ']
225 05:02:56.830423 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 05:02:56.830586 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 05:02:56.830703 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 05:02:56.830810 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 05:02:56.831013 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
230 05:03:06.173969 >> Command sent successfully.
231 05:03:06.176172 Returned 0 in 9 seconds
232 05:03:06.276573 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 05:03:06.277173 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 05:03:06.277289 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 05:03:06.277392 Setting prompt string to 'Starting depthcharge on Helios...'
237 05:03:06.277467 Changing prompt to 'Starting depthcharge on Helios...'
238 05:03:06.277544 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 05:03:06.277826 [Enter `^Ec?' for help]
240 05:03:06.277917
241 05:03:06.277994
242 05:03:06.278065 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 05:03:06.278140 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 05:03:06.278209 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 05:03:06.278275 CPU: AES supported, TXT NOT supported, VT supported
246 05:03:06.278341 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 05:03:06.278408 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 05:03:06.278473 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 05:03:06.278537 VBOOT: Loading verstage.
250 05:03:06.278602 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 05:03:06.278668 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 05:03:06.278733 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 05:03:06.278797 CBFS @ c08000 size 3f8000
254 05:03:06.278861 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 05:03:06.278926 CBFS: Locating 'fallback/verstage'
256 05:03:06.278990 CBFS: Found @ offset 10fb80 size 1072c
257 05:03:06.279054
258 05:03:06.279117
259 05:03:06.279180 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 05:03:06.279245 Probing TPM: . done!
261 05:03:06.279309 TPM ready after 0 ms
262 05:03:06.279374 Connected to device vid:did:rid of 1ae0:0028:00
263 05:03:06.279438 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
264 05:03:06.279505 Initialized TPM device CR50 revision 0
265 05:03:06.279570 tlcl_send_startup: Startup return code is 0
266 05:03:06.279633 TPM: setup succeeded
267 05:03:06.279697 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 05:03:06.279775 Chrome EC: UHEPI supported
269 05:03:06.279840 Phase 1
270 05:03:06.279904 FMAP: area GBB found @ c05000 (12288 bytes)
271 05:03:06.279970 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 05:03:06.280034 Phase 2
273 05:03:06.280096 Phase 3
274 05:03:06.280160 FMAP: area GBB found @ c05000 (12288 bytes)
275 05:03:06.280225 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 05:03:06.280289 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
277 05:03:06.280353 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
278 05:03:06.280424 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 05:03:06.280490 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
280 05:03:06.280554 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
281 05:03:06.280618 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 05:03:06.280681 Phase 4
283 05:03:06.280744 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
284 05:03:06.280808 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 05:03:06.280873 VB2:vb2_rsa_verify_digest() Digest check failed!
286 05:03:06.280937 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 05:03:06.281000 Saving nvdata
288 05:03:06.281064 Reboot requested (10020007)
289 05:03:06.281127 board_reset() called!
290 05:03:06.281189 full_reset() called!
291 05:03:09.856043
292 05:03:09.856199
293 05:03:09.866493 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 05:03:09.869481 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 05:03:09.876058 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 05:03:09.879158 CPU: AES supported, TXT NOT supported, VT supported
297 05:03:09.886248 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 05:03:09.889535 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 05:03:09.896345 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 05:03:09.899525 VBOOT: Loading verstage.
301 05:03:09.902636 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 05:03:09.909191 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 05:03:09.916285 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 05:03:09.916380 CBFS @ c08000 size 3f8000
305 05:03:09.922548 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 05:03:09.925718 CBFS: Locating 'fallback/verstage'
307 05:03:09.928888 CBFS: Found @ offset 10fb80 size 1072c
308 05:03:09.933417
309 05:03:09.933516
310 05:03:09.943367 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 05:03:09.957576 Probing TPM: . done!
312 05:03:09.960593 TPM ready after 0 ms
313 05:03:09.963977 Connected to device vid:did:rid of 1ae0:0028:00
314 05:03:09.974299 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
315 05:03:09.977967 Initialized TPM device CR50 revision 0
316 05:03:10.020987 tlcl_send_startup: Startup return code is 0
317 05:03:10.021101 TPM: setup succeeded
318 05:03:10.033735 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 05:03:10.037656 Chrome EC: UHEPI supported
320 05:03:10.040831 Phase 1
321 05:03:10.044147 FMAP: area GBB found @ c05000 (12288 bytes)
322 05:03:10.051253 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 05:03:10.057869 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 05:03:10.060968 Recovery requested (1009000e)
325 05:03:10.066764 Saving nvdata
326 05:03:10.072749 tlcl_extend: response is 0
327 05:03:10.081760 tlcl_extend: response is 0
328 05:03:10.088723 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 05:03:10.091963 CBFS @ c08000 size 3f8000
330 05:03:10.098400 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 05:03:10.101832 CBFS: Locating 'fallback/romstage'
332 05:03:10.105567 CBFS: Found @ offset 80 size 145fc
333 05:03:10.108672 Accumulated console time in verstage 98 ms
334 05:03:10.108759
335 05:03:10.108844
336 05:03:10.121415 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 05:03:10.128253 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 05:03:10.131319 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 05:03:10.135138 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 05:03:10.141531 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 05:03:10.144710 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 05:03:10.147978 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 05:03:10.151162 TCO_STS: 0000 0000
344 05:03:10.154988 GEN_PMCON: e0015238 00000200
345 05:03:10.158219 GBLRST_CAUSE: 00000000 00000000
346 05:03:10.158311 prev_sleep_state 5
347 05:03:10.161657 Boot Count incremented to 44382
348 05:03:10.168121 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 05:03:10.171906 CBFS @ c08000 size 3f8000
350 05:03:10.177998 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 05:03:10.178096 CBFS: Locating 'fspm.bin'
352 05:03:10.184758 CBFS: Found @ offset 5ffc0 size 71000
353 05:03:10.187833 Chrome EC: UHEPI supported
354 05:03:10.194799 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 05:03:10.198209 Probing TPM: done!
356 05:03:10.204893 Connected to device vid:did:rid of 1ae0:0028:00
357 05:03:10.215049 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
358 05:03:10.221339 Initialized TPM device CR50 revision 0
359 05:03:10.229977 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 05:03:10.240246 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 05:03:10.240347 MRC cache found, size 1948
362 05:03:10.243488 bootmode is set to: 2
363 05:03:10.246546 PRMRR disabled by config.
364 05:03:10.249782 SPD INDEX = 1
365 05:03:10.253083 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 05:03:10.256229 CBFS @ c08000 size 3f8000
367 05:03:10.263467 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 05:03:10.263561 CBFS: Locating 'spd.bin'
369 05:03:10.266741 CBFS: Found @ offset 5fb80 size 400
370 05:03:10.269389 SPD: module type is LPDDR3
371 05:03:10.273185 SPD: module part is
372 05:03:10.279765 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 05:03:10.282825 SPD: device width 4 bits, bus width 8 bits
374 05:03:10.285910 SPD: module size is 4096 MB (per channel)
375 05:03:10.289245 memory slot: 0 configuration done.
376 05:03:10.292484 memory slot: 2 configuration done.
377 05:03:10.344338 CBMEM:
378 05:03:10.347656 IMD: root @ 99fff000 254 entries.
379 05:03:10.350900 IMD: root @ 99ffec00 62 entries.
380 05:03:10.354834 External stage cache:
381 05:03:10.358090 IMD: root @ 9abff000 254 entries.
382 05:03:10.361250 IMD: root @ 9abfec00 62 entries.
383 05:03:10.364517 Chrome EC: clear events_b mask to 0x0000000020004000
384 05:03:10.380311 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 05:03:10.393881 tlcl_write: response is 0
386 05:03:10.402781 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 05:03:10.409202 MRC: TPM MRC hash updated successfully.
388 05:03:10.409291 2 DIMMs found
389 05:03:10.412539 SMM Memory Map
390 05:03:10.416182 SMRAM : 0x9a000000 0x1000000
391 05:03:10.419407 Subregion 0: 0x9a000000 0xa00000
392 05:03:10.422627 Subregion 1: 0x9aa00000 0x200000
393 05:03:10.425883 Subregion 2: 0x9ac00000 0x400000
394 05:03:10.429145 top_of_ram = 0x9a000000
395 05:03:10.432341 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 05:03:10.439058 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 05:03:10.442289 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 05:03:10.449120 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 05:03:10.452438 CBFS @ c08000 size 3f8000
400 05:03:10.455457 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 05:03:10.459385 CBFS: Locating 'fallback/postcar'
402 05:03:10.465631 CBFS: Found @ offset 107000 size 4b44
403 05:03:10.468868 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 05:03:10.481290 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 05:03:10.484457 Processing 180 relocs. Offset value of 0x97c0c000
406 05:03:10.492800 Accumulated console time in romstage 286 ms
407 05:03:10.492887
408 05:03:10.492970
409 05:03:10.503185 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 05:03:10.509711 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 05:03:10.512997 CBFS @ c08000 size 3f8000
412 05:03:10.519341 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 05:03:10.522610 CBFS: Locating 'fallback/ramstage'
414 05:03:10.525708 CBFS: Found @ offset 43380 size 1b9e8
415 05:03:10.532871 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 05:03:10.564600 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 05:03:10.567849 Processing 3976 relocs. Offset value of 0x98db0000
418 05:03:10.574808 Accumulated console time in postcar 52 ms
419 05:03:10.574899
420 05:03:10.574986
421 05:03:10.584564 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 05:03:10.591670 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 05:03:10.594754 WARNING: RO_VPD is uninitialized or empty.
424 05:03:10.597954 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 05:03:10.604289 FMAP: area RW_VPD found @ af8000 (8192 bytes)
426 05:03:10.604388 Normal boot.
427 05:03:10.611141 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 05:03:10.614516 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 05:03:10.617743 CBFS @ c08000 size 3f8000
430 05:03:10.624730 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 05:03:10.627899 CBFS: Locating 'cpu_microcode_blob.bin'
432 05:03:10.631241 CBFS: Found @ offset 14700 size 2ec00
433 05:03:10.634472 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 05:03:10.637562 Skip microcode update
435 05:03:10.644389 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 05:03:10.644488 CBFS @ c08000 size 3f8000
437 05:03:10.650684 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 05:03:10.654414 CBFS: Locating 'fsps.bin'
439 05:03:10.657658 CBFS: Found @ offset d1fc0 size 35000
440 05:03:10.682875 Detected 4 core, 8 thread CPU.
441 05:03:10.685993 Setting up SMI for CPU
442 05:03:10.689726 IED base = 0x9ac00000
443 05:03:10.689816 IED size = 0x00400000
444 05:03:10.692897 Will perform SMM setup.
445 05:03:10.699306 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 05:03:10.706406 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 05:03:10.709612 Processing 16 relocs. Offset value of 0x00030000
448 05:03:10.713410 Attempting to start 7 APs
449 05:03:10.716450 Waiting for 10ms after sending INIT.
450 05:03:10.733032 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
451 05:03:10.733192 done.
452 05:03:10.736298 AP: slot 3 apic_id 3.
453 05:03:10.739553 AP: slot 2 apic_id 2.
454 05:03:10.742678 Waiting for 2nd SIPI to complete...done.
455 05:03:10.745843 AP: slot 5 apic_id 5.
456 05:03:10.745928 AP: slot 4 apic_id 4.
457 05:03:10.749569 AP: slot 6 apic_id 7.
458 05:03:10.752924 AP: slot 7 apic_id 6.
459 05:03:10.759370 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 05:03:10.766253 Processing 13 relocs. Offset value of 0x00038000
461 05:03:10.772815 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 05:03:10.776172 Installing SMM handler to 0x9a000000
463 05:03:10.782397 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 05:03:10.788999 Processing 658 relocs. Offset value of 0x9a010000
465 05:03:10.795977 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 05:03:10.799214 Processing 13 relocs. Offset value of 0x9a008000
467 05:03:10.805554 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 05:03:10.812139 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 05:03:10.818986 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 05:03:10.822184 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 05:03:10.828484 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 05:03:10.835657 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 05:03:10.838724 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 05:03:10.845200 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 05:03:10.848909 Clearing SMI status registers
476 05:03:10.852024 SMI_STS: PM1
477 05:03:10.852108 PM1_STS: PWRBTN
478 05:03:10.855287 TCO_STS: SECOND_TO
479 05:03:10.859235 New SMBASE 0x9a000000
480 05:03:10.862248 In relocation handler: CPU 0
481 05:03:10.865638 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 05:03:10.868868 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 05:03:10.872361 Relocation complete.
484 05:03:10.875441 New SMBASE 0x99fffc00
485 05:03:10.878760 In relocation handler: CPU 1
486 05:03:10.881870 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
487 05:03:10.885277 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 05:03:10.889137 Relocation complete.
489 05:03:10.892510 New SMBASE 0x99ffe400
490 05:03:10.892626 In relocation handler: CPU 7
491 05:03:10.898662 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
492 05:03:10.901864 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 05:03:10.905548 Relocation complete.
494 05:03:10.908752 New SMBASE 0x99ffec00
495 05:03:10.908840 In relocation handler: CPU 5
496 05:03:10.915301 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
497 05:03:10.918438 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 05:03:10.921803 Relocation complete.
499 05:03:10.921886 New SMBASE 0x99fff000
500 05:03:10.925071 In relocation handler: CPU 4
501 05:03:10.931908 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
502 05:03:10.935134 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 05:03:10.938264 Relocation complete.
504 05:03:10.938344 New SMBASE 0x99fff400
505 05:03:10.941780 In relocation handler: CPU 3
506 05:03:10.948285 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
507 05:03:10.951391 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 05:03:10.954904 Relocation complete.
509 05:03:10.954990 New SMBASE 0x99fff800
510 05:03:10.958130 In relocation handler: CPU 2
511 05:03:10.961866 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
512 05:03:10.968320 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 05:03:10.971626 Relocation complete.
514 05:03:10.971706 New SMBASE 0x99ffe800
515 05:03:10.975097 In relocation handler: CPU 6
516 05:03:10.978149 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
517 05:03:10.984814 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 05:03:10.988086 Relocation complete.
519 05:03:10.988170 Initializing CPU #0
520 05:03:10.991467 CPU: vendor Intel device 806ec
521 05:03:10.994695 CPU: family 06, model 8e, stepping 0c
522 05:03:10.998308 Clearing out pending MCEs
523 05:03:11.001442 Setting up local APIC...
524 05:03:11.001521 apic_id: 0x00 done.
525 05:03:11.004913 Turbo is available but hidden
526 05:03:11.008038 Turbo is available and visible
527 05:03:11.011172 VMX status: enabled
528 05:03:11.014427 IA32_FEATURE_CONTROL status: locked
529 05:03:11.018280 Skip microcode update
530 05:03:11.018364 CPU #0 initialized
531 05:03:11.021281 Initializing CPU #1
532 05:03:11.024452 Initializing CPU #4
533 05:03:11.024530 Initializing CPU #5
534 05:03:11.027746 CPU: vendor Intel device 806ec
535 05:03:11.031544 CPU: family 06, model 8e, stepping 0c
536 05:03:11.034249 CPU: vendor Intel device 806ec
537 05:03:11.037827 CPU: family 06, model 8e, stepping 0c
538 05:03:11.041585 Clearing out pending MCEs
539 05:03:11.044637 Clearing out pending MCEs
540 05:03:11.047716 Setting up local APIC...
541 05:03:11.047796 Initializing CPU #3
542 05:03:11.051228 Initializing CPU #2
543 05:03:11.054352 CPU: vendor Intel device 806ec
544 05:03:11.058040 CPU: family 06, model 8e, stepping 0c
545 05:03:11.061181 CPU: vendor Intel device 806ec
546 05:03:11.064314 CPU: family 06, model 8e, stepping 0c
547 05:03:11.067468 Clearing out pending MCEs
548 05:03:11.071271 Clearing out pending MCEs
549 05:03:11.071350 Setting up local APIC...
550 05:03:11.074574 CPU: vendor Intel device 806ec
551 05:03:11.081038 CPU: family 06, model 8e, stepping 0c
552 05:03:11.081127 Clearing out pending MCEs
553 05:03:11.084297 apic_id: 0x04 done.
554 05:03:11.087372 Setting up local APIC...
555 05:03:11.087460 apic_id: 0x03 done.
556 05:03:11.090892 Setting up local APIC...
557 05:03:11.094656 Initializing CPU #7
558 05:03:11.094753 Initializing CPU #6
559 05:03:11.097872 CPU: vendor Intel device 806ec
560 05:03:11.101175 CPU: family 06, model 8e, stepping 0c
561 05:03:11.104184 CPU: vendor Intel device 806ec
562 05:03:11.110962 CPU: family 06, model 8e, stepping 0c
563 05:03:11.111082 Clearing out pending MCEs
564 05:03:11.114169 Clearing out pending MCEs
565 05:03:11.117764 Setting up local APIC...
566 05:03:11.120728 VMX status: enabled
567 05:03:11.120829 apic_id: 0x02 done.
568 05:03:11.123915 IA32_FEATURE_CONTROL status: locked
569 05:03:11.127263 VMX status: enabled
570 05:03:11.130911 Skip microcode update
571 05:03:11.134108 IA32_FEATURE_CONTROL status: locked
572 05:03:11.134204 CPU #3 initialized
573 05:03:11.137698 Skip microcode update
574 05:03:11.140902 Setting up local APIC...
575 05:03:11.140998 apic_id: 0x07 done.
576 05:03:11.143902 Setting up local APIC...
577 05:03:11.147691 CPU #2 initialized
578 05:03:11.147788 apic_id: 0x05 done.
579 05:03:11.150523 VMX status: enabled
580 05:03:11.153775 VMX status: enabled
581 05:03:11.157514 IA32_FEATURE_CONTROL status: locked
582 05:03:11.160525 IA32_FEATURE_CONTROL status: locked
583 05:03:11.160621 Skip microcode update
584 05:03:11.163713 Skip microcode update
585 05:03:11.167566 CPU #4 initialized
586 05:03:11.167662 apic_id: 0x01 done.
587 05:03:11.170505 apic_id: 0x06 done.
588 05:03:11.173818 VMX status: enabled
589 05:03:11.173914 VMX status: enabled
590 05:03:11.176954 IA32_FEATURE_CONTROL status: locked
591 05:03:11.180310 IA32_FEATURE_CONTROL status: locked
592 05:03:11.184111 Skip microcode update
593 05:03:11.187570 Skip microcode update
594 05:03:11.187667 CPU #6 initialized
595 05:03:11.190190 CPU #7 initialized
596 05:03:11.193572 VMX status: enabled
597 05:03:11.193668 CPU #5 initialized
598 05:03:11.197471 IA32_FEATURE_CONTROL status: locked
599 05:03:11.200506 Skip microcode update
600 05:03:11.203897 CPU #1 initialized
601 05:03:11.207015 bsp_do_flight_plan done after 461 msecs.
602 05:03:11.210349 CPU: frequency set to 4200 MHz
603 05:03:11.210446 Enabling SMIs.
604 05:03:11.213332 Locking SMM.
605 05:03:11.227249 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 05:03:11.230285 CBFS @ c08000 size 3f8000
607 05:03:11.236679 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 05:03:11.236783 CBFS: Locating 'vbt.bin'
609 05:03:11.243265 CBFS: Found @ offset 5f5c0 size 499
610 05:03:11.247197 Found a VBT of 4608 bytes after decompression
611 05:03:11.429770 Display FSP Version Info HOB
612 05:03:11.432913 Reference Code - CPU = 9.0.1e.30
613 05:03:11.436187 uCode Version = 0.0.0.ca
614 05:03:11.439652 TXT ACM version = ff.ff.ff.ffff
615 05:03:11.443534 Display FSP Version Info HOB
616 05:03:11.446762 Reference Code - ME = 9.0.1e.30
617 05:03:11.449822 MEBx version = 0.0.0.0
618 05:03:11.452800 ME Firmware Version = Consumer SKU
619 05:03:11.455990 Display FSP Version Info HOB
620 05:03:11.459951 Reference Code - CML PCH = 9.0.1e.30
621 05:03:11.462971 PCH-CRID Status = Disabled
622 05:03:11.466531 PCH-CRID Original Value = ff.ff.ff.ffff
623 05:03:11.469706 PCH-CRID New Value = ff.ff.ff.ffff
624 05:03:11.472821 OPROM - RST - RAID = ff.ff.ff.ffff
625 05:03:11.476048 ChipsetInit Base Version = ff.ff.ff.ffff
626 05:03:11.479229 ChipsetInit Oem Version = ff.ff.ff.ffff
627 05:03:11.483310 Display FSP Version Info HOB
628 05:03:11.489977 Reference Code - SA - System Agent = 9.0.1e.30
629 05:03:11.492992 Reference Code - MRC = 0.7.1.6c
630 05:03:11.493090 SA - PCIe Version = 9.0.1e.30
631 05:03:11.496256 SA-CRID Status = Disabled
632 05:03:11.499772 SA-CRID Original Value = 0.0.0.c
633 05:03:11.502750 SA-CRID New Value = 0.0.0.c
634 05:03:11.505939 OPROM - VBIOS = ff.ff.ff.ffff
635 05:03:11.509320 RTC Init
636 05:03:11.513151 Set power on after power failure.
637 05:03:11.513248 Disabling Deep S3
638 05:03:11.516351 Disabling Deep S3
639 05:03:11.516455 Disabling Deep S4
640 05:03:11.519363 Disabling Deep S4
641 05:03:11.519460 Disabling Deep S5
642 05:03:11.522586 Disabling Deep S5
643 05:03:11.529523 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 193 exit 1
644 05:03:11.529622 Enumerating buses...
645 05:03:11.535968 Show all devs... Before device enumeration.
646 05:03:11.536065 Root Device: enabled 1
647 05:03:11.539033 CPU_CLUSTER: 0: enabled 1
648 05:03:11.542766 DOMAIN: 0000: enabled 1
649 05:03:11.546124 APIC: 00: enabled 1
650 05:03:11.546222 PCI: 00:00.0: enabled 1
651 05:03:11.549344 PCI: 00:02.0: enabled 1
652 05:03:11.552541 PCI: 00:04.0: enabled 0
653 05:03:11.552638 PCI: 00:05.0: enabled 0
654 05:03:11.555634 PCI: 00:12.0: enabled 1
655 05:03:11.559308 PCI: 00:12.5: enabled 0
656 05:03:11.562756 PCI: 00:12.6: enabled 0
657 05:03:11.562863 PCI: 00:14.0: enabled 1
658 05:03:11.565926 PCI: 00:14.1: enabled 0
659 05:03:11.568787 PCI: 00:14.3: enabled 1
660 05:03:11.572739 PCI: 00:14.5: enabled 0
661 05:03:11.572836 PCI: 00:15.0: enabled 1
662 05:03:11.576154 PCI: 00:15.1: enabled 1
663 05:03:11.579204 PCI: 00:15.2: enabled 0
664 05:03:11.582298 PCI: 00:15.3: enabled 0
665 05:03:11.582396 PCI: 00:16.0: enabled 1
666 05:03:11.585634 PCI: 00:16.1: enabled 0
667 05:03:11.589561 PCI: 00:16.2: enabled 0
668 05:03:11.589658 PCI: 00:16.3: enabled 0
669 05:03:11.592275 PCI: 00:16.4: enabled 0
670 05:03:11.595986 PCI: 00:16.5: enabled 0
671 05:03:11.599344 PCI: 00:17.0: enabled 1
672 05:03:11.599441 PCI: 00:19.0: enabled 1
673 05:03:11.602561 PCI: 00:19.1: enabled 0
674 05:03:11.605982 PCI: 00:19.2: enabled 0
675 05:03:11.609023 PCI: 00:1a.0: enabled 0
676 05:03:11.609120 PCI: 00:1c.0: enabled 0
677 05:03:11.612169 PCI: 00:1c.1: enabled 0
678 05:03:11.615870 PCI: 00:1c.2: enabled 0
679 05:03:11.619128 PCI: 00:1c.3: enabled 0
680 05:03:11.619225 PCI: 00:1c.4: enabled 0
681 05:03:11.622356 PCI: 00:1c.5: enabled 0
682 05:03:11.625343 PCI: 00:1c.6: enabled 0
683 05:03:11.625439 PCI: 00:1c.7: enabled 0
684 05:03:11.628662 PCI: 00:1d.0: enabled 1
685 05:03:11.631977 PCI: 00:1d.1: enabled 0
686 05:03:11.635120 PCI: 00:1d.2: enabled 0
687 05:03:11.635217 PCI: 00:1d.3: enabled 0
688 05:03:11.638958 PCI: 00:1d.4: enabled 0
689 05:03:11.642210 PCI: 00:1d.5: enabled 1
690 05:03:11.645368 PCI: 00:1e.0: enabled 1
691 05:03:11.645465 PCI: 00:1e.1: enabled 0
692 05:03:11.648461 PCI: 00:1e.2: enabled 1
693 05:03:11.651781 PCI: 00:1e.3: enabled 1
694 05:03:11.655580 PCI: 00:1f.0: enabled 1
695 05:03:11.655678 PCI: 00:1f.1: enabled 1
696 05:03:11.658790 PCI: 00:1f.2: enabled 1
697 05:03:11.661717 PCI: 00:1f.3: enabled 1
698 05:03:11.661814 PCI: 00:1f.4: enabled 1
699 05:03:11.664916 PCI: 00:1f.5: enabled 1
700 05:03:11.668538 PCI: 00:1f.6: enabled 0
701 05:03:11.671841 USB0 port 0: enabled 1
702 05:03:11.671938 I2C: 00:15: enabled 1
703 05:03:11.675220 I2C: 00:5d: enabled 1
704 05:03:11.678377 GENERIC: 0.0: enabled 1
705 05:03:11.678474 I2C: 00:1a: enabled 1
706 05:03:11.681503 I2C: 00:38: enabled 1
707 05:03:11.684773 I2C: 00:39: enabled 1
708 05:03:11.684870 I2C: 00:3a: enabled 1
709 05:03:11.688185 I2C: 00:3b: enabled 1
710 05:03:11.691721 PCI: 00:00.0: enabled 1
711 05:03:11.691819 SPI: 00: enabled 1
712 05:03:11.695005 SPI: 01: enabled 1
713 05:03:11.698424 PNP: 0c09.0: enabled 1
714 05:03:11.698521 USB2 port 0: enabled 1
715 05:03:11.701748 USB2 port 1: enabled 1
716 05:03:11.705112 USB2 port 2: enabled 0
717 05:03:11.708166 USB2 port 3: enabled 0
718 05:03:11.708262 USB2 port 5: enabled 0
719 05:03:11.711235 USB2 port 6: enabled 1
720 05:03:11.714522 USB2 port 9: enabled 1
721 05:03:11.714628 USB3 port 0: enabled 1
722 05:03:11.717889 USB3 port 1: enabled 1
723 05:03:11.721536 USB3 port 2: enabled 1
724 05:03:11.724797 USB3 port 3: enabled 1
725 05:03:11.724895 USB3 port 4: enabled 0
726 05:03:11.727935 APIC: 01: enabled 1
727 05:03:11.728033 APIC: 02: enabled 1
728 05:03:11.731146 APIC: 03: enabled 1
729 05:03:11.734896 APIC: 04: enabled 1
730 05:03:11.734992 APIC: 05: enabled 1
731 05:03:11.738152 APIC: 07: enabled 1
732 05:03:11.741480 APIC: 06: enabled 1
733 05:03:11.741576 Compare with tree...
734 05:03:11.744449 Root Device: enabled 1
735 05:03:11.747869 CPU_CLUSTER: 0: enabled 1
736 05:03:11.747965 APIC: 00: enabled 1
737 05:03:11.751091 APIC: 01: enabled 1
738 05:03:11.754560 APIC: 02: enabled 1
739 05:03:11.754657 APIC: 03: enabled 1
740 05:03:11.757793 APIC: 04: enabled 1
741 05:03:11.760895 APIC: 05: enabled 1
742 05:03:11.760994 APIC: 07: enabled 1
743 05:03:11.764887 APIC: 06: enabled 1
744 05:03:11.767575 DOMAIN: 0000: enabled 1
745 05:03:11.771311 PCI: 00:00.0: enabled 1
746 05:03:11.771414 PCI: 00:02.0: enabled 1
747 05:03:11.774305 PCI: 00:04.0: enabled 0
748 05:03:11.777680 PCI: 00:05.0: enabled 0
749 05:03:11.780849 PCI: 00:12.0: enabled 1
750 05:03:11.784790 PCI: 00:12.5: enabled 0
751 05:03:11.784925 PCI: 00:12.6: enabled 0
752 05:03:11.787857 PCI: 00:14.0: enabled 1
753 05:03:11.790990 USB0 port 0: enabled 1
754 05:03:11.794437 USB2 port 0: enabled 1
755 05:03:11.797765 USB2 port 1: enabled 1
756 05:03:11.797868 USB2 port 2: enabled 0
757 05:03:11.800891 USB2 port 3: enabled 0
758 05:03:11.804044 USB2 port 5: enabled 0
759 05:03:11.807249 USB2 port 6: enabled 1
760 05:03:11.811051 USB2 port 9: enabled 1
761 05:03:11.814286 USB3 port 0: enabled 1
762 05:03:11.814385 USB3 port 1: enabled 1
763 05:03:11.817624 USB3 port 2: enabled 1
764 05:03:11.820890 USB3 port 3: enabled 1
765 05:03:11.823899 USB3 port 4: enabled 0
766 05:03:11.827671 PCI: 00:14.1: enabled 0
767 05:03:11.827771 PCI: 00:14.3: enabled 1
768 05:03:11.831020 PCI: 00:14.5: enabled 0
769 05:03:11.834361 PCI: 00:15.0: enabled 1
770 05:03:11.837334 I2C: 00:15: enabled 1
771 05:03:11.840581 PCI: 00:15.1: enabled 1
772 05:03:11.840680 I2C: 00:5d: enabled 1
773 05:03:11.844439 GENERIC: 0.0: enabled 1
774 05:03:11.847163 PCI: 00:15.2: enabled 0
775 05:03:11.850628 PCI: 00:15.3: enabled 0
776 05:03:11.854056 PCI: 00:16.0: enabled 1
777 05:03:11.854162 PCI: 00:16.1: enabled 0
778 05:03:11.857177 PCI: 00:16.2: enabled 0
779 05:03:11.860398 PCI: 00:16.3: enabled 0
780 05:03:11.864005 PCI: 00:16.4: enabled 0
781 05:03:11.867512 PCI: 00:16.5: enabled 0
782 05:03:11.867620 PCI: 00:17.0: enabled 1
783 05:03:11.870601 PCI: 00:19.0: enabled 1
784 05:03:11.873668 I2C: 00:1a: enabled 1
785 05:03:11.877432 I2C: 00:38: enabled 1
786 05:03:11.877533 I2C: 00:39: enabled 1
787 05:03:11.880657 I2C: 00:3a: enabled 1
788 05:03:11.883968 I2C: 00:3b: enabled 1
789 05:03:11.887406 PCI: 00:19.1: enabled 0
790 05:03:11.890096 PCI: 00:19.2: enabled 0
791 05:03:11.890193 PCI: 00:1a.0: enabled 0
792 05:03:11.893781 PCI: 00:1c.0: enabled 0
793 05:03:11.897014 PCI: 00:1c.1: enabled 0
794 05:03:11.900392 PCI: 00:1c.2: enabled 0
795 05:03:11.903532 PCI: 00:1c.3: enabled 0
796 05:03:11.903630 PCI: 00:1c.4: enabled 0
797 05:03:11.906800 PCI: 00:1c.5: enabled 0
798 05:03:11.910087 PCI: 00:1c.6: enabled 0
799 05:03:11.913459 PCI: 00:1c.7: enabled 0
800 05:03:11.913556 PCI: 00:1d.0: enabled 1
801 05:03:11.916548 PCI: 00:1d.1: enabled 0
802 05:03:11.919802 PCI: 00:1d.2: enabled 0
803 05:03:11.923928 PCI: 00:1d.3: enabled 0
804 05:03:11.926495 PCI: 00:1d.4: enabled 0
805 05:03:11.926592 PCI: 00:1d.5: enabled 1
806 05:03:11.930064 PCI: 00:00.0: enabled 1
807 05:03:11.933562 PCI: 00:1e.0: enabled 1
808 05:03:11.936867 PCI: 00:1e.1: enabled 0
809 05:03:11.939814 PCI: 00:1e.2: enabled 1
810 05:03:11.939919 SPI: 00: enabled 1
811 05:03:11.943161 PCI: 00:1e.3: enabled 1
812 05:03:11.946255 SPI: 01: enabled 1
813 05:03:11.949905 PCI: 00:1f.0: enabled 1
814 05:03:11.950004 PNP: 0c09.0: enabled 1
815 05:03:11.953398 PCI: 00:1f.1: enabled 1
816 05:03:11.956368 PCI: 00:1f.2: enabled 1
817 05:03:11.959484 PCI: 00:1f.3: enabled 1
818 05:03:11.962896 PCI: 00:1f.4: enabled 1
819 05:03:11.962993 PCI: 00:1f.5: enabled 1
820 05:03:11.966581 PCI: 00:1f.6: enabled 0
821 05:03:11.969958 Root Device scanning...
822 05:03:11.973108 scan_static_bus for Root Device
823 05:03:11.976114 CPU_CLUSTER: 0 enabled
824 05:03:11.976211 DOMAIN: 0000 enabled
825 05:03:11.979972 DOMAIN: 0000 scanning...
826 05:03:11.983335 PCI: pci_scan_bus for bus 00
827 05:03:11.986769 PCI: 00:00.0 [8086/0000] ops
828 05:03:11.989705 PCI: 00:00.0 [8086/9b61] enabled
829 05:03:11.992979 PCI: 00:02.0 [8086/0000] bus ops
830 05:03:11.996297 PCI: 00:02.0 [8086/9b41] enabled
831 05:03:11.999528 PCI: 00:04.0 [8086/1903] disabled
832 05:03:12.002612 PCI: 00:08.0 [8086/1911] enabled
833 05:03:12.006153 PCI: 00:12.0 [8086/02f9] enabled
834 05:03:12.009300 PCI: 00:14.0 [8086/0000] bus ops
835 05:03:12.012716 PCI: 00:14.0 [8086/02ed] enabled
836 05:03:12.016376 PCI: 00:14.2 [8086/02ef] enabled
837 05:03:12.019616 PCI: 00:14.3 [8086/02f0] enabled
838 05:03:12.022869 PCI: 00:15.0 [8086/0000] bus ops
839 05:03:12.026018 PCI: 00:15.0 [8086/02e8] enabled
840 05:03:12.029379 PCI: 00:15.1 [8086/0000] bus ops
841 05:03:12.032495 PCI: 00:15.1 [8086/02e9] enabled
842 05:03:12.036305 PCI: 00:16.0 [8086/0000] ops
843 05:03:12.039066 PCI: 00:16.0 [8086/02e0] enabled
844 05:03:12.042877 PCI: 00:17.0 [8086/0000] ops
845 05:03:12.046430 PCI: 00:17.0 [8086/02d3] enabled
846 05:03:12.049305 PCI: 00:19.0 [8086/0000] bus ops
847 05:03:12.052360 PCI: 00:19.0 [8086/02c5] enabled
848 05:03:12.055670 PCI: 00:1d.0 [8086/0000] bus ops
849 05:03:12.059592 PCI: 00:1d.0 [8086/02b0] enabled
850 05:03:12.065830 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 05:03:12.065930 PCI: 00:1e.0 [8086/0000] ops
852 05:03:12.068989 PCI: 00:1e.0 [8086/02a8] enabled
853 05:03:12.072799 PCI: 00:1e.2 [8086/0000] bus ops
854 05:03:12.075833 PCI: 00:1e.2 [8086/02aa] enabled
855 05:03:12.078982 PCI: 00:1e.3 [8086/0000] bus ops
856 05:03:12.082233 PCI: 00:1e.3 [8086/02ab] enabled
857 05:03:12.085320 PCI: 00:1f.0 [8086/0000] bus ops
858 05:03:12.089319 PCI: 00:1f.0 [8086/0284] enabled
859 05:03:12.095839 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 05:03:12.102179 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 05:03:12.105527 PCI: 00:1f.3 [8086/0000] bus ops
862 05:03:12.108845 PCI: 00:1f.3 [8086/02c8] enabled
863 05:03:12.112051 PCI: 00:1f.4 [8086/0000] bus ops
864 05:03:12.115305 PCI: 00:1f.4 [8086/02a3] enabled
865 05:03:12.118421 PCI: 00:1f.5 [8086/0000] bus ops
866 05:03:12.122271 PCI: 00:1f.5 [8086/02a4] enabled
867 05:03:12.125335 PCI: Leftover static devices:
868 05:03:12.125434 PCI: 00:05.0
869 05:03:12.128655 PCI: 00:12.5
870 05:03:12.128754 PCI: 00:12.6
871 05:03:12.128838 PCI: 00:14.1
872 05:03:12.131734 PCI: 00:14.5
873 05:03:12.131832 PCI: 00:15.2
874 05:03:12.134952 PCI: 00:15.3
875 05:03:12.135050 PCI: 00:16.1
876 05:03:12.135137 PCI: 00:16.2
877 05:03:12.138278 PCI: 00:16.3
878 05:03:12.138376 PCI: 00:16.4
879 05:03:12.141596 PCI: 00:16.5
880 05:03:12.141694 PCI: 00:19.1
881 05:03:12.145371 PCI: 00:19.2
882 05:03:12.145469 PCI: 00:1a.0
883 05:03:12.145546 PCI: 00:1c.0
884 05:03:12.148651 PCI: 00:1c.1
885 05:03:12.148749 PCI: 00:1c.2
886 05:03:12.151698 PCI: 00:1c.3
887 05:03:12.151796 PCI: 00:1c.4
888 05:03:12.151873 PCI: 00:1c.5
889 05:03:12.155557 PCI: 00:1c.6
890 05:03:12.155688 PCI: 00:1c.7
891 05:03:12.158709 PCI: 00:1d.1
892 05:03:12.158806 PCI: 00:1d.2
893 05:03:12.158883 PCI: 00:1d.3
894 05:03:12.162095 PCI: 00:1d.4
895 05:03:12.162193 PCI: 00:1d.5
896 05:03:12.165008 PCI: 00:1e.1
897 05:03:12.165106 PCI: 00:1f.1
898 05:03:12.168220 PCI: 00:1f.2
899 05:03:12.168318 PCI: 00:1f.6
900 05:03:12.172288 PCI: Check your devicetree.cb.
901 05:03:12.175265 PCI: 00:02.0 scanning...
902 05:03:12.178410 scan_generic_bus for PCI: 00:02.0
903 05:03:12.181606 scan_generic_bus for PCI: 00:02.0 done
904 05:03:12.188130 scan_bus: scanning of bus PCI: 00:02.0 took 10173 usecs
905 05:03:12.188228 PCI: 00:14.0 scanning...
906 05:03:12.191963 scan_static_bus for PCI: 00:14.0
907 05:03:12.194634 USB0 port 0 enabled
908 05:03:12.198419 USB0 port 0 scanning...
909 05:03:12.201275 scan_static_bus for USB0 port 0
910 05:03:12.205140 USB2 port 0 enabled
911 05:03:12.205238 USB2 port 1 enabled
912 05:03:12.208288 USB2 port 2 disabled
913 05:03:12.208386 USB2 port 3 disabled
914 05:03:12.211627 USB2 port 5 disabled
915 05:03:12.214786 USB2 port 6 enabled
916 05:03:12.214887 USB2 port 9 enabled
917 05:03:12.218314 USB3 port 0 enabled
918 05:03:12.221238 USB3 port 1 enabled
919 05:03:12.221336 USB3 port 2 enabled
920 05:03:12.224985 USB3 port 3 enabled
921 05:03:12.225083 USB3 port 4 disabled
922 05:03:12.228181 USB2 port 0 scanning...
923 05:03:12.231437 scan_static_bus for USB2 port 0
924 05:03:12.234644 scan_static_bus for USB2 port 0 done
925 05:03:12.241802 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
926 05:03:12.244902 USB2 port 1 scanning...
927 05:03:12.248136 scan_static_bus for USB2 port 1
928 05:03:12.251403 scan_static_bus for USB2 port 1 done
929 05:03:12.254490 scan_bus: scanning of bus USB2 port 1 took 9687 usecs
930 05:03:12.257658 USB2 port 6 scanning...
931 05:03:12.261541 scan_static_bus for USB2 port 6
932 05:03:12.264690 scan_static_bus for USB2 port 6 done
933 05:03:12.270989 scan_bus: scanning of bus USB2 port 6 took 9701 usecs
934 05:03:12.274227 USB2 port 9 scanning...
935 05:03:12.277994 scan_static_bus for USB2 port 9
936 05:03:12.281133 scan_static_bus for USB2 port 9 done
937 05:03:12.284261 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
938 05:03:12.288230 USB3 port 0 scanning...
939 05:03:12.291150 scan_static_bus for USB3 port 0
940 05:03:12.294527 scan_static_bus for USB3 port 0 done
941 05:03:12.301354 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
942 05:03:12.304721 USB3 port 1 scanning...
943 05:03:12.307980 scan_static_bus for USB3 port 1
944 05:03:12.311209 scan_static_bus for USB3 port 1 done
945 05:03:12.317590 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
946 05:03:12.317689 USB3 port 2 scanning...
947 05:03:12.320996 scan_static_bus for USB3 port 2
948 05:03:12.324136 scan_static_bus for USB3 port 2 done
949 05:03:12.330570 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
950 05:03:12.333990 USB3 port 3 scanning...
951 05:03:12.337632 scan_static_bus for USB3 port 3
952 05:03:12.341129 scan_static_bus for USB3 port 3 done
953 05:03:12.347460 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
954 05:03:12.350827 scan_static_bus for USB0 port 0 done
955 05:03:12.354131 scan_bus: scanning of bus USB0 port 0 took 155260 usecs
956 05:03:12.357259 scan_static_bus for PCI: 00:14.0 done
957 05:03:12.364223 scan_bus: scanning of bus PCI: 00:14.0 took 172873 usecs
958 05:03:12.367040 PCI: 00:15.0 scanning...
959 05:03:12.370695 scan_generic_bus for PCI: 00:15.0
960 05:03:12.374157 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 05:03:12.377340 scan_generic_bus for PCI: 00:15.0 done
962 05:03:12.383587 scan_bus: scanning of bus PCI: 00:15.0 took 14283 usecs
963 05:03:12.387343 PCI: 00:15.1 scanning...
964 05:03:12.390635 scan_generic_bus for PCI: 00:15.1
965 05:03:12.394055 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 05:03:12.400575 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 05:03:12.403698 scan_generic_bus for PCI: 00:15.1 done
968 05:03:12.407056 scan_bus: scanning of bus PCI: 00:15.1 took 18599 usecs
969 05:03:12.410251 PCI: 00:19.0 scanning...
970 05:03:12.413380 scan_generic_bus for PCI: 00:19.0
971 05:03:12.420054 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 05:03:12.423284 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 05:03:12.426932 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 05:03:12.430140 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 05:03:12.433290 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 05:03:12.440545 scan_generic_bus for PCI: 00:19.0 done
977 05:03:12.443659 scan_bus: scanning of bus PCI: 00:19.0 took 30697 usecs
978 05:03:12.447067 PCI: 00:1d.0 scanning...
979 05:03:12.450141 do_pci_scan_bridge for PCI: 00:1d.0
980 05:03:12.453343 PCI: pci_scan_bus for bus 01
981 05:03:12.456395 PCI: 01:00.0 [1c5c/1327] enabled
982 05:03:12.460325 Enabling Common Clock Configuration
983 05:03:12.466776 L1 Sub-State supported from root port 29
984 05:03:12.466875 L1 Sub-State Support = 0xf
985 05:03:12.469860 CommonModeRestoreTime = 0x28
986 05:03:12.476968 Power On Value = 0x16, Power On Scale = 0x0
987 05:03:12.477070 ASPM: Enabled L1
988 05:03:12.483099 scan_bus: scanning of bus PCI: 00:1d.0 took 32766 usecs
989 05:03:12.486217 PCI: 00:1e.2 scanning...
990 05:03:12.489476 scan_generic_bus for PCI: 00:1e.2
991 05:03:12.492727 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 05:03:12.496561 scan_generic_bus for PCI: 00:1e.2 done
993 05:03:12.502972 scan_bus: scanning of bus PCI: 00:1e.2 took 13998 usecs
994 05:03:12.506507 PCI: 00:1e.3 scanning...
995 05:03:12.509728 scan_generic_bus for PCI: 00:1e.3
996 05:03:12.513096 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 05:03:12.516134 scan_generic_bus for PCI: 00:1e.3 done
998 05:03:12.522658 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
999 05:03:12.522757 PCI: 00:1f.0 scanning...
1000 05:03:12.525767 scan_static_bus for PCI: 00:1f.0
1001 05:03:12.529122 PNP: 0c09.0 enabled
1002 05:03:12.532318 scan_static_bus for PCI: 00:1f.0 done
1003 05:03:12.539432 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1004 05:03:12.542691 PCI: 00:1f.3 scanning...
1005 05:03:12.545843 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1006 05:03:12.549413 PCI: 00:1f.4 scanning...
1007 05:03:12.552271 scan_generic_bus for PCI: 00:1f.4
1008 05:03:12.555676 scan_generic_bus for PCI: 00:1f.4 done
1009 05:03:12.562613 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1010 05:03:12.565792 PCI: 00:1f.5 scanning...
1011 05:03:12.569224 scan_generic_bus for PCI: 00:1f.5
1012 05:03:12.572106 scan_generic_bus for PCI: 00:1f.5 done
1013 05:03:12.578791 scan_bus: scanning of bus PCI: 00:1f.5 took 10180 usecs
1014 05:03:12.585773 scan_bus: scanning of bus DOMAIN: 0000 took 604694 usecs
1015 05:03:12.588824 scan_static_bus for Root Device done
1016 05:03:12.592165 scan_bus: scanning of bus Root Device took 624549 usecs
1017 05:03:12.595565 done
1018 05:03:12.599290 Chrome EC: UHEPI supported
1019 05:03:12.605985 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 05:03:12.609123 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 05:03:12.615541 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 05:03:12.622833 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 05:03:12.626152 SPI flash protection: WPSW=0 SRP0=0
1024 05:03:12.632557 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 05:03:12.635853 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 3
1026 05:03:12.639133 found VGA at PCI: 00:02.0
1027 05:03:12.642644 Setting up VGA for PCI: 00:02.0
1028 05:03:12.649244 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 05:03:12.652461 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 05:03:12.655546 Allocating resources...
1031 05:03:12.659342 Reading resources...
1032 05:03:12.662562 Root Device read_resources bus 0 link: 0
1033 05:03:12.665742 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 05:03:12.672803 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 05:03:12.675977 DOMAIN: 0000 read_resources bus 0 link: 0
1036 05:03:12.683295 PCI: 00:14.0 read_resources bus 0 link: 0
1037 05:03:12.686499 USB0 port 0 read_resources bus 0 link: 0
1038 05:03:12.694013 USB0 port 0 read_resources bus 0 link: 0 done
1039 05:03:12.697259 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 05:03:12.704938 PCI: 00:15.0 read_resources bus 1 link: 0
1041 05:03:12.708260 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 05:03:12.714644 PCI: 00:15.1 read_resources bus 2 link: 0
1043 05:03:12.718498 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 05:03:12.725680 PCI: 00:19.0 read_resources bus 3 link: 0
1045 05:03:12.732855 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 05:03:12.735985 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 05:03:12.742275 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 05:03:12.746073 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 05:03:12.752437 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 05:03:12.755678 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 05:03:12.762792 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 05:03:12.765958 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 05:03:12.771940 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 05:03:12.779149 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 05:03:12.782003 Root Device read_resources bus 0 link: 0 done
1056 05:03:12.785248 Done reading resources.
1057 05:03:12.788545 Show resources in subtree (Root Device)...After reading.
1058 05:03:12.795474 Root Device child on link 0 CPU_CLUSTER: 0
1059 05:03:12.798686 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 05:03:12.798782 APIC: 00
1061 05:03:12.801829 APIC: 01
1062 05:03:12.801926 APIC: 02
1063 05:03:12.805158 APIC: 03
1064 05:03:12.805254 APIC: 04
1065 05:03:12.805330 APIC: 05
1066 05:03:12.808833 APIC: 07
1067 05:03:12.808930 APIC: 06
1068 05:03:12.812479 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 05:03:12.821951 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 05:03:12.874837 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 05:03:12.875701 PCI: 00:00.0
1072 05:03:12.875993 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 05:03:12.876077 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 05:03:12.876336 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 05:03:12.876604 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 05:03:12.925008 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 05:03:12.925504 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 05:03:12.925593 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 05:03:12.926056 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 05:03:12.926324 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 05:03:12.964930 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 05:03:12.965252 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 05:03:12.965347 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 05:03:12.965424 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 05:03:12.968769 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 05:03:12.975665 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 05:03:12.985372 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 05:03:12.985469 PCI: 00:02.0
1089 05:03:12.995531 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 05:03:13.005379 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 05:03:13.014970 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 05:03:13.015067 PCI: 00:04.0
1093 05:03:13.018298 PCI: 00:08.0
1094 05:03:13.028259 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 05:03:13.028357 PCI: 00:12.0
1096 05:03:13.038386 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 05:03:13.045487 PCI: 00:14.0 child on link 0 USB0 port 0
1098 05:03:13.054837 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 05:03:13.058201 USB0 port 0 child on link 0 USB2 port 0
1100 05:03:13.058297 USB2 port 0
1101 05:03:13.061511 USB2 port 1
1102 05:03:13.061607 USB2 port 2
1103 05:03:13.065332 USB2 port 3
1104 05:03:13.068275 USB2 port 5
1105 05:03:13.068373 USB2 port 6
1106 05:03:13.071597 USB2 port 9
1107 05:03:13.071692 USB3 port 0
1108 05:03:13.074688 USB3 port 1
1109 05:03:13.074785 USB3 port 2
1110 05:03:13.078541 USB3 port 3
1111 05:03:13.078637 USB3 port 4
1112 05:03:13.081720 PCI: 00:14.2
1113 05:03:13.091218 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 05:03:13.101299 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 05:03:13.101396 PCI: 00:14.3
1116 05:03:13.111205 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 05:03:13.117610 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 05:03:13.128103 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 05:03:13.128201 I2C: 01:15
1120 05:03:13.131191 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 05:03:13.141205 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 05:03:13.144429 I2C: 02:5d
1123 05:03:13.144517 GENERIC: 0.0
1124 05:03:13.147570 PCI: 00:16.0
1125 05:03:13.157274 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 05:03:13.157362 PCI: 00:17.0
1127 05:03:13.167612 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 05:03:13.177739 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 05:03:13.184286 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 05:03:13.194049 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 05:03:13.201133 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 05:03:13.210623 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 05:03:13.213928 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 05:03:13.223939 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 05:03:13.227252 I2C: 03:1a
1136 05:03:13.227335 I2C: 03:38
1137 05:03:13.231077 I2C: 03:39
1138 05:03:13.231164 I2C: 03:3a
1139 05:03:13.233789 I2C: 03:3b
1140 05:03:13.237544 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 05:03:13.247032 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 05:03:13.254127 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 05:03:13.264028 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 05:03:13.267062 PCI: 01:00.0
1145 05:03:13.277290 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 05:03:13.277378 PCI: 00:1e.0
1147 05:03:13.290430 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 05:03:13.299910 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 05:03:13.303641 PCI: 00:1e.2 child on link 0 SPI: 00
1150 05:03:13.313324 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 05:03:13.313416 SPI: 00
1152 05:03:13.316589 PCI: 00:1e.3 child on link 0 SPI: 01
1153 05:03:13.326485 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 05:03:13.329752 SPI: 01
1155 05:03:13.333574 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 05:03:13.343389 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 05:03:13.349671 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 05:03:13.352828 PNP: 0c09.0
1159 05:03:13.363249 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 05:03:13.363381 PCI: 00:1f.3
1161 05:03:13.373148 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 05:03:13.383022 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 05:03:13.386396 PCI: 00:1f.4
1164 05:03:13.392563 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 05:03:13.402323 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 05:03:13.405605 PCI: 00:1f.5
1167 05:03:13.415983 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 05:03:13.422589 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 05:03:13.425810 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 05:03:13.435650 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 05:03:13.438809 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 05:03:13.442105 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 05:03:13.445413 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 05:03:13.449133 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 05:03:13.455485 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 05:03:13.462180 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 05:03:13.468932 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 05:03:13.478494 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 05:03:13.485184 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 05:03:13.488419 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 05:03:13.498551 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 05:03:13.501642 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 05:03:13.504989 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 05:03:13.511687 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 05:03:13.514915 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 05:03:13.521309 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 05:03:13.524624 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 05:03:13.531588 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 05:03:13.534906 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 05:03:13.541364 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 05:03:13.544417 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 05:03:13.551337 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 05:03:13.554988 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 05:03:13.561489 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 05:03:13.564819 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 05:03:13.568136 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 05:03:13.574281 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 05:03:13.578121 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 05:03:13.584368 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 05:03:13.587687 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 05:03:13.594125 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 05:03:13.598077 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 05:03:13.604319 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 05:03:13.607377 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 05:03:13.617670 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 05:03:13.620693 avoid_fixed_resources: DOMAIN: 0000
1207 05:03:13.627292 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 05:03:13.630760 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 05:03:13.641295 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 05:03:13.647755 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 05:03:13.654223 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 05:03:13.663912 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 05:03:13.670665 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 05:03:13.677452 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 05:03:13.686923 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 05:03:13.693897 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 05:03:13.700235 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 05:03:13.707062 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 05:03:13.710169 Setting resources...
1220 05:03:13.716674 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 05:03:13.720538 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 05:03:13.723858 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 05:03:13.730250 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 05:03:13.733139 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 05:03:13.740260 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 05:03:13.743556 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 05:03:13.749964 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 05:03:13.760247 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 05:03:13.763462 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 05:03:13.769742 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 05:03:13.772933 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 05:03:13.779863 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 05:03:13.783076 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 05:03:13.789922 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 05:03:13.793173 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 05:03:13.799687 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 05:03:13.802626 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 05:03:13.809766 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 05:03:13.812949 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 05:03:13.816354 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 05:03:13.822725 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 05:03:13.825978 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 05:03:13.832380 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 05:03:13.835903 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 05:03:13.843111 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 05:03:13.846352 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 05:03:13.852328 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 05:03:13.855921 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 05:03:13.862239 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 05:03:13.865645 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 05:03:13.872718 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 05:03:13.879034 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 05:03:13.885743 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 05:03:13.892266 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 05:03:13.902037 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 05:03:13.905176 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 05:03:13.912550 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 05:03:13.918876 Root Device assign_resources, bus 0 link: 0
1259 05:03:13.922020 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 05:03:13.931891 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 05:03:13.939044 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 05:03:13.945554 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 05:03:13.955604 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 05:03:13.962067 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 05:03:13.971952 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 05:03:13.975086 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 05:03:13.982001 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 05:03:13.988358 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 05:03:13.998605 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 05:03:14.004922 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 05:03:14.014840 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 05:03:14.018622 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 05:03:14.021727 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 05:03:14.031504 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 05:03:14.035047 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 05:03:14.041792 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 05:03:14.048580 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 05:03:14.058111 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 05:03:14.064481 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 05:03:14.071406 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 05:03:14.081086 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 05:03:14.087480 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 05:03:14.094566 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 05:03:14.104196 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 05:03:14.107492 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 05:03:14.114245 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 05:03:14.120553 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 05:03:14.130380 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 05:03:14.140839 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 05:03:14.143935 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 05:03:14.150659 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 05:03:14.157384 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 05:03:14.163449 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 05:03:14.173738 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 05:03:14.176796 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 05:03:14.183657 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 05:03:14.190305 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 05:03:14.193335 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 05:03:14.200424 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 05:03:14.203612 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 05:03:14.210189 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 05:03:14.213789 LPC: Trying to open IO window from 800 size 1ff
1303 05:03:14.223960 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 05:03:14.230310 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 05:03:14.239939 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 05:03:14.246597 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 05:03:14.253131 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 05:03:14.256804 Root Device assign_resources, bus 0 link: 0
1309 05:03:14.260158 Done setting resources.
1310 05:03:14.266671 Show resources in subtree (Root Device)...After assigning values.
1311 05:03:14.269689 Root Device child on link 0 CPU_CLUSTER: 0
1312 05:03:14.272900 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 05:03:14.276251 APIC: 00
1314 05:03:14.276345 APIC: 01
1315 05:03:14.279393 APIC: 02
1316 05:03:14.279488 APIC: 03
1317 05:03:14.279562 APIC: 04
1318 05:03:14.282606 APIC: 05
1319 05:03:14.282700 APIC: 07
1320 05:03:14.282774 APIC: 06
1321 05:03:14.289593 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 05:03:14.299532 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 05:03:14.309516 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 05:03:14.312821 PCI: 00:00.0
1325 05:03:14.319001 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 05:03:14.329098 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 05:03:14.338789 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 05:03:14.349160 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 05:03:14.358855 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 05:03:14.369182 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 05:03:14.375809 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 05:03:14.385276 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 05:03:14.395527 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 05:03:14.405201 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 05:03:14.414997 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 05:03:14.424968 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 05:03:14.431890 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 05:03:14.441577 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 05:03:14.451583 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 05:03:14.461035 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 05:03:14.461135 PCI: 00:02.0
1342 05:03:14.474755 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 05:03:14.484328 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 05:03:14.494566 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 05:03:14.494663 PCI: 00:04.0
1346 05:03:14.497751 PCI: 00:08.0
1347 05:03:14.507342 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 05:03:14.507435 PCI: 00:12.0
1349 05:03:14.517468 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 05:03:14.523732 PCI: 00:14.0 child on link 0 USB0 port 0
1351 05:03:14.534139 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 05:03:14.537302 USB0 port 0 child on link 0 USB2 port 0
1353 05:03:14.540338 USB2 port 0
1354 05:03:14.540443 USB2 port 1
1355 05:03:14.543869 USB2 port 2
1356 05:03:14.543964 USB2 port 3
1357 05:03:14.547108 USB2 port 5
1358 05:03:14.547204 USB2 port 6
1359 05:03:14.550260 USB2 port 9
1360 05:03:14.550356 USB3 port 0
1361 05:03:14.553858 USB3 port 1
1362 05:03:14.556809 USB3 port 2
1363 05:03:14.556905 USB3 port 3
1364 05:03:14.560617 USB3 port 4
1365 05:03:14.560713 PCI: 00:14.2
1366 05:03:14.570493 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 05:03:14.580093 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 05:03:14.583361 PCI: 00:14.3
1369 05:03:14.593663 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 05:03:14.596735 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 05:03:14.606764 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 05:03:14.609930 I2C: 01:15
1373 05:03:14.613295 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 05:03:14.623484 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 05:03:14.626800 I2C: 02:5d
1376 05:03:14.626885 GENERIC: 0.0
1377 05:03:14.629727 PCI: 00:16.0
1378 05:03:14.639471 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 05:03:14.639563 PCI: 00:17.0
1380 05:03:14.653115 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 05:03:14.662898 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 05:03:14.669363 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 05:03:14.679001 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 05:03:14.688746 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 05:03:14.698767 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 05:03:14.702468 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 05:03:14.712190 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 05:03:14.715408 I2C: 03:1a
1389 05:03:14.715499 I2C: 03:38
1390 05:03:14.718719 I2C: 03:39
1391 05:03:14.718808 I2C: 03:3a
1392 05:03:14.722340 I2C: 03:3b
1393 05:03:14.725453 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 05:03:14.735147 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 05:03:14.745000 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 05:03:14.755162 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 05:03:14.758669 PCI: 01:00.0
1398 05:03:14.768639 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 05:03:14.768746 PCI: 00:1e.0
1400 05:03:14.781367 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 05:03:14.791747 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 05:03:14.794964 PCI: 00:1e.2 child on link 0 SPI: 00
1403 05:03:14.804397 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 05:03:14.804500 SPI: 00
1405 05:03:14.811277 PCI: 00:1e.3 child on link 0 SPI: 01
1406 05:03:14.821102 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 05:03:14.821205 SPI: 01
1408 05:03:14.824641 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 05:03:14.834722 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 05:03:14.844220 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 05:03:14.844332 PNP: 0c09.0
1412 05:03:14.854606 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 05:03:14.854705 PCI: 00:1f.3
1414 05:03:14.867411 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 05:03:14.877209 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 05:03:14.877310 PCI: 00:1f.4
1417 05:03:14.887513 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 05:03:14.897013 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 05:03:14.900384 PCI: 00:1f.5
1420 05:03:14.910327 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 05:03:14.910427 Done allocating resources.
1422 05:03:14.917229 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 05:03:14.920364 Enabling resources...
1424 05:03:14.923545 PCI: 00:00.0 subsystem <- 8086/9b61
1425 05:03:14.926722 PCI: 00:00.0 cmd <- 06
1426 05:03:14.930464 PCI: 00:02.0 subsystem <- 8086/9b41
1427 05:03:14.933783 PCI: 00:02.0 cmd <- 03
1428 05:03:14.936866 PCI: 00:08.0 cmd <- 06
1429 05:03:14.940736 PCI: 00:12.0 subsystem <- 8086/02f9
1430 05:03:14.944021 PCI: 00:12.0 cmd <- 02
1431 05:03:14.946614 PCI: 00:14.0 subsystem <- 8086/02ed
1432 05:03:14.950444 PCI: 00:14.0 cmd <- 02
1433 05:03:14.950542 PCI: 00:14.2 cmd <- 02
1434 05:03:14.956920 PCI: 00:14.3 subsystem <- 8086/02f0
1435 05:03:14.957018 PCI: 00:14.3 cmd <- 02
1436 05:03:14.960123 PCI: 00:15.0 subsystem <- 8086/02e8
1437 05:03:14.963524 PCI: 00:15.0 cmd <- 02
1438 05:03:14.966733 PCI: 00:15.1 subsystem <- 8086/02e9
1439 05:03:14.970145 PCI: 00:15.1 cmd <- 02
1440 05:03:14.973284 PCI: 00:16.0 subsystem <- 8086/02e0
1441 05:03:14.976482 PCI: 00:16.0 cmd <- 02
1442 05:03:14.979710 PCI: 00:17.0 subsystem <- 8086/02d3
1443 05:03:14.982930 PCI: 00:17.0 cmd <- 03
1444 05:03:14.986134 PCI: 00:19.0 subsystem <- 8086/02c5
1445 05:03:14.989397 PCI: 00:19.0 cmd <- 02
1446 05:03:14.993205 PCI: 00:1d.0 bridge ctrl <- 0013
1447 05:03:14.996262 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 05:03:14.999596 PCI: 00:1d.0 cmd <- 06
1449 05:03:15.002842 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 05:03:15.005949 PCI: 00:1e.0 cmd <- 06
1451 05:03:15.009553 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 05:03:15.009643 PCI: 00:1e.2 cmd <- 06
1453 05:03:15.015929 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 05:03:15.016021 PCI: 00:1e.3 cmd <- 02
1455 05:03:15.019545 PCI: 00:1f.0 subsystem <- 8086/0284
1456 05:03:15.022812 PCI: 00:1f.0 cmd <- 407
1457 05:03:15.026035 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 05:03:15.029225 PCI: 00:1f.3 cmd <- 02
1459 05:03:15.032895 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 05:03:15.036270 PCI: 00:1f.4 cmd <- 03
1461 05:03:15.039358 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 05:03:15.042429 PCI: 00:1f.5 cmd <- 406
1463 05:03:15.051490 PCI: 01:00.0 cmd <- 02
1464 05:03:15.056298 done.
1465 05:03:15.068543 ME: Version: 14.0.39.1367
1466 05:03:15.075088 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1467 05:03:15.078285 Initializing devices...
1468 05:03:15.078373 Root Device init ...
1469 05:03:15.084382 Chrome EC: Set SMI mask to 0x0000000000000000
1470 05:03:15.088179 Chrome EC: clear events_b mask to 0x0000000000000000
1471 05:03:15.095088 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 05:03:15.101475 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 05:03:15.108259 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 05:03:15.111300 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 05:03:15.114384 Root Device init finished in 35198 usecs
1476 05:03:15.118185 CPU_CLUSTER: 0 init ...
1477 05:03:15.125012 CPU_CLUSTER: 0 init finished in 2448 usecs
1478 05:03:15.128824 PCI: 00:00.0 init ...
1479 05:03:15.132446 CPU TDP: 15 Watts
1480 05:03:15.135633 CPU PL2 = 64 Watts
1481 05:03:15.138933 PCI: 00:00.0 init finished in 7084 usecs
1482 05:03:15.142553 PCI: 00:02.0 init ...
1483 05:03:15.145311 PCI: 00:02.0 init finished in 2253 usecs
1484 05:03:15.149150 PCI: 00:08.0 init ...
1485 05:03:15.152296 PCI: 00:08.0 init finished in 2253 usecs
1486 05:03:15.155233 PCI: 00:12.0 init ...
1487 05:03:15.159100 PCI: 00:12.0 init finished in 2253 usecs
1488 05:03:15.162331 PCI: 00:14.0 init ...
1489 05:03:15.165382 PCI: 00:14.0 init finished in 2253 usecs
1490 05:03:15.168841 PCI: 00:14.2 init ...
1491 05:03:15.171871 PCI: 00:14.2 init finished in 2252 usecs
1492 05:03:15.175076 PCI: 00:14.3 init ...
1493 05:03:15.178849 PCI: 00:14.3 init finished in 2273 usecs
1494 05:03:15.182286 PCI: 00:15.0 init ...
1495 05:03:15.185283 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 05:03:15.188479 PCI: 00:15.0 init finished in 5977 usecs
1497 05:03:15.192279 PCI: 00:15.1 init ...
1498 05:03:15.195753 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 05:03:15.202108 PCI: 00:15.1 init finished in 5979 usecs
1500 05:03:15.202205 PCI: 00:16.0 init ...
1501 05:03:15.208192 PCI: 00:16.0 init finished in 2254 usecs
1502 05:03:15.211906 PCI: 00:19.0 init ...
1503 05:03:15.215148 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 05:03:15.218422 PCI: 00:19.0 init finished in 5977 usecs
1505 05:03:15.222054 PCI: 00:1d.0 init ...
1506 05:03:15.225248 Initializing PCH PCIe bridge.
1507 05:03:15.228343 PCI: 00:1d.0 init finished in 5278 usecs
1508 05:03:15.231454 PCI: 00:1f.0 init ...
1509 05:03:15.235072 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 05:03:15.241549 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 05:03:15.241647 IOAPIC: ID = 0x02
1512 05:03:15.244553 IOAPIC: Dumping registers
1513 05:03:15.248181 reg 0x0000: 0x02000000
1514 05:03:15.251353 reg 0x0001: 0x00770020
1515 05:03:15.251448 reg 0x0002: 0x00000000
1516 05:03:15.257916 PCI: 00:1f.0 init finished in 23547 usecs
1517 05:03:15.261084 PCI: 00:1f.4 init ...
1518 05:03:15.264285 PCI: 00:1f.4 init finished in 2262 usecs
1519 05:03:15.274980 PCI: 01:00.0 init ...
1520 05:03:15.278738 PCI: 01:00.0 init finished in 2245 usecs
1521 05:03:15.282515 PNP: 0c09.0 init ...
1522 05:03:15.286313 Google Chrome EC uptime: 11.066 seconds
1523 05:03:15.292924 Google Chrome AP resets since EC boot: 0
1524 05:03:15.295930 Google Chrome most recent AP reset causes:
1525 05:03:15.302822 Google Chrome EC reset flags at last EC boot: reset-pin
1526 05:03:15.306156 PNP: 0c09.0 init finished in 20578 usecs
1527 05:03:15.309236 Devices initialized
1528 05:03:15.309337 Show all devs... After init.
1529 05:03:15.312606 Root Device: enabled 1
1530 05:03:15.316260 CPU_CLUSTER: 0: enabled 1
1531 05:03:15.319332 DOMAIN: 0000: enabled 1
1532 05:03:15.319432 APIC: 00: enabled 1
1533 05:03:15.322317 PCI: 00:00.0: enabled 1
1534 05:03:15.325595 PCI: 00:02.0: enabled 1
1535 05:03:15.329329 PCI: 00:04.0: enabled 0
1536 05:03:15.329430 PCI: 00:05.0: enabled 0
1537 05:03:15.332265 PCI: 00:12.0: enabled 1
1538 05:03:15.335465 PCI: 00:12.5: enabled 0
1539 05:03:15.335566 PCI: 00:12.6: enabled 0
1540 05:03:15.339089 PCI: 00:14.0: enabled 1
1541 05:03:15.342307 PCI: 00:14.1: enabled 0
1542 05:03:15.345547 PCI: 00:14.3: enabled 1
1543 05:03:15.345648 PCI: 00:14.5: enabled 0
1544 05:03:15.349373 PCI: 00:15.0: enabled 1
1545 05:03:15.352428 PCI: 00:15.1: enabled 1
1546 05:03:15.355634 PCI: 00:15.2: enabled 0
1547 05:03:15.355734 PCI: 00:15.3: enabled 0
1548 05:03:15.358887 PCI: 00:16.0: enabled 1
1549 05:03:15.362188 PCI: 00:16.1: enabled 0
1550 05:03:15.365433 PCI: 00:16.2: enabled 0
1551 05:03:15.365532 PCI: 00:16.3: enabled 0
1552 05:03:15.369174 PCI: 00:16.4: enabled 0
1553 05:03:15.372358 PCI: 00:16.5: enabled 0
1554 05:03:15.375705 PCI: 00:17.0: enabled 1
1555 05:03:15.375804 PCI: 00:19.0: enabled 1
1556 05:03:15.378978 PCI: 00:19.1: enabled 0
1557 05:03:15.382250 PCI: 00:19.2: enabled 0
1558 05:03:15.385192 PCI: 00:1a.0: enabled 0
1559 05:03:15.385290 PCI: 00:1c.0: enabled 0
1560 05:03:15.388294 PCI: 00:1c.1: enabled 0
1561 05:03:15.391635 PCI: 00:1c.2: enabled 0
1562 05:03:15.391743 PCI: 00:1c.3: enabled 0
1563 05:03:15.395290 PCI: 00:1c.4: enabled 0
1564 05:03:15.398600 PCI: 00:1c.5: enabled 0
1565 05:03:15.401619 PCI: 00:1c.6: enabled 0
1566 05:03:15.401727 PCI: 00:1c.7: enabled 0
1567 05:03:15.404820 PCI: 00:1d.0: enabled 1
1568 05:03:15.408280 PCI: 00:1d.1: enabled 0
1569 05:03:15.411600 PCI: 00:1d.2: enabled 0
1570 05:03:15.411696 PCI: 00:1d.3: enabled 0
1571 05:03:15.415053 PCI: 00:1d.4: enabled 0
1572 05:03:15.418565 PCI: 00:1d.5: enabled 0
1573 05:03:15.421704 PCI: 00:1e.0: enabled 1
1574 05:03:15.421790 PCI: 00:1e.1: enabled 0
1575 05:03:15.424684 PCI: 00:1e.2: enabled 1
1576 05:03:15.427993 PCI: 00:1e.3: enabled 1
1577 05:03:15.431305 PCI: 00:1f.0: enabled 1
1578 05:03:15.431390 PCI: 00:1f.1: enabled 0
1579 05:03:15.434800 PCI: 00:1f.2: enabled 0
1580 05:03:15.437967 PCI: 00:1f.3: enabled 1
1581 05:03:15.438058 PCI: 00:1f.4: enabled 1
1582 05:03:15.441132 PCI: 00:1f.5: enabled 1
1583 05:03:15.444931 PCI: 00:1f.6: enabled 0
1584 05:03:15.447775 USB0 port 0: enabled 1
1585 05:03:15.447858 I2C: 01:15: enabled 1
1586 05:03:15.450986 I2C: 02:5d: enabled 1
1587 05:03:15.454252 GENERIC: 0.0: enabled 1
1588 05:03:15.454335 I2C: 03:1a: enabled 1
1589 05:03:15.458211 I2C: 03:38: enabled 1
1590 05:03:15.461201 I2C: 03:39: enabled 1
1591 05:03:15.461281 I2C: 03:3a: enabled 1
1592 05:03:15.464322 I2C: 03:3b: enabled 1
1593 05:03:15.467567 PCI: 00:00.0: enabled 1
1594 05:03:15.467645 SPI: 00: enabled 1
1595 05:03:15.471295 SPI: 01: enabled 1
1596 05:03:15.474117 PNP: 0c09.0: enabled 1
1597 05:03:15.474199 USB2 port 0: enabled 1
1598 05:03:15.477690 USB2 port 1: enabled 1
1599 05:03:15.480722 USB2 port 2: enabled 0
1600 05:03:15.483951 USB2 port 3: enabled 0
1601 05:03:15.484029 USB2 port 5: enabled 0
1602 05:03:15.487314 USB2 port 6: enabled 1
1603 05:03:15.491025 USB2 port 9: enabled 1
1604 05:03:15.491102 USB3 port 0: enabled 1
1605 05:03:15.494184 USB3 port 1: enabled 1
1606 05:03:15.497348 USB3 port 2: enabled 1
1607 05:03:15.500501 USB3 port 3: enabled 1
1608 05:03:15.500582 USB3 port 4: enabled 0
1609 05:03:15.504205 APIC: 01: enabled 1
1610 05:03:15.504291 APIC: 02: enabled 1
1611 05:03:15.507274 APIC: 03: enabled 1
1612 05:03:15.510576 APIC: 04: enabled 1
1613 05:03:15.510655 APIC: 05: enabled 1
1614 05:03:15.514080 APIC: 07: enabled 1
1615 05:03:15.517290 APIC: 06: enabled 1
1616 05:03:15.517372 PCI: 00:08.0: enabled 1
1617 05:03:15.520759 PCI: 00:14.2: enabled 1
1618 05:03:15.523868 PCI: 01:00.0: enabled 1
1619 05:03:15.527668 Disabling ACPI via APMC:
1620 05:03:15.530814 done.
1621 05:03:15.534040 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 05:03:15.537452 ELOG: NV offset 0xaf0000 size 0x4000
1623 05:03:15.544102 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 05:03:15.550918 ELOG: Event(17) added with size 13 at 2023-02-07 05:03:12 UTC
1625 05:03:15.557833 ELOG: Event(92) added with size 9 at 2023-02-07 05:03:12 UTC
1626 05:03:15.564170 ELOG: Event(93) added with size 9 at 2023-02-07 05:03:12 UTC
1627 05:03:15.570972 ELOG: Event(9A) added with size 9 at 2023-02-07 05:03:12 UTC
1628 05:03:15.577333 ELOG: Event(9E) added with size 10 at 2023-02-07 05:03:12 UTC
1629 05:03:15.583806 ELOG: Event(9F) added with size 14 at 2023-02-07 05:03:12 UTC
1630 05:03:15.590239 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1631 05:03:15.597081 ELOG: Event(A1) added with size 10 at 2023-02-07 05:03:12 UTC
1632 05:03:15.603322 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1633 05:03:15.610286 ELOG: Event(A0) added with size 9 at 2023-02-07 05:03:12 UTC
1634 05:03:15.613755 elog_add_boot_reason: Logged dev mode boot
1635 05:03:15.616495 Finalize devices...
1636 05:03:15.620168 PCI: 00:17.0 final
1637 05:03:15.620255 Devices finalized
1638 05:03:15.626284 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1639 05:03:15.629823 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1640 05:03:15.636178 ME: HFSTS1 : 0x90000245
1641 05:03:15.639832 ME: HFSTS2 : 0x3B850126
1642 05:03:15.643015 ME: HFSTS3 : 0x00000020
1643 05:03:15.646161 ME: HFSTS4 : 0x00004800
1644 05:03:15.649940 ME: HFSTS5 : 0x00000000
1645 05:03:15.656121 ME: HFSTS6 : 0x40400006
1646 05:03:15.659465 ME: Manufacturing Mode : NO
1647 05:03:15.663435 ME: FW Partition Table : OK
1648 05:03:15.666530 ME: Bringup Loader Failure : NO
1649 05:03:15.669299 ME: Firmware Init Complete : YES
1650 05:03:15.672891 ME: Boot Options Present : NO
1651 05:03:15.675997 ME: Update In Progress : NO
1652 05:03:15.679238 ME: D0i3 Support : YES
1653 05:03:15.682672 ME: Low Power State Enabled : NO
1654 05:03:15.686346 ME: CPU Replaced : NO
1655 05:03:15.689617 ME: CPU Replacement Valid : YES
1656 05:03:15.692768 ME: Current Working State : 5
1657 05:03:15.696134 ME: Current Operation State : 1
1658 05:03:15.699010 ME: Current Operation Mode : 0
1659 05:03:15.703030 ME: Error Code : 0
1660 05:03:15.705922 ME: CPU Debug Disabled : YES
1661 05:03:15.709218 ME: TXT Support : NO
1662 05:03:15.712385 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1663 05:03:15.718681 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1664 05:03:15.722388 CBFS @ c08000 size 3f8000
1665 05:03:15.728621 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1666 05:03:15.732327 CBFS: Locating 'fallback/dsdt.aml'
1667 05:03:15.735684 CBFS: Found @ offset 10bb80 size 3fa5
1668 05:03:15.739198 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1669 05:03:15.742507 CBFS @ c08000 size 3f8000
1670 05:03:15.748851 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1671 05:03:15.751752 CBFS: Locating 'fallback/slic'
1672 05:03:15.755495 CBFS: 'fallback/slic' not found.
1673 05:03:15.762361 ACPI: Writing ACPI tables at 99b3e000.
1674 05:03:15.762458 ACPI: * FACS
1675 05:03:15.765521 ACPI: * DSDT
1676 05:03:15.768647 Ramoops buffer: 0x100000@0x99a3d000.
1677 05:03:15.771732 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1678 05:03:15.778648 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1679 05:03:15.781950 Google Chrome EC: version:
1680 05:03:15.785203 ro: helios_v2.0.2659-56403530b
1681 05:03:15.788521 rw: helios_v2.0.2849-c41de27e7d
1682 05:03:15.788617 running image: 1
1683 05:03:15.792940 ACPI: * FADT
1684 05:03:15.793037 SCI is IRQ9
1685 05:03:15.799444 ACPI: added table 1/32, length now 40
1686 05:03:15.799550 ACPI: * SSDT
1687 05:03:15.802575 Found 1 CPU(s) with 8 core(s) each.
1688 05:03:15.806339 Error: Could not locate 'wifi_sar' in VPD.
1689 05:03:15.812696 Checking CBFS for default SAR values
1690 05:03:15.815772 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1691 05:03:15.819528 CBFS @ c08000 size 3f8000
1692 05:03:15.825823 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1693 05:03:15.829032 CBFS: Locating 'wifi_sar_defaults.hex'
1694 05:03:15.832685 CBFS: Found @ offset 5fac0 size 77
1695 05:03:15.835908 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1696 05:03:15.842696 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1697 05:03:15.845552 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1698 05:03:15.852647 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1699 05:03:15.855677 failed to find key in VPD: dsm_calib_r0_0
1700 05:03:15.865934 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1701 05:03:15.869056 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1702 05:03:15.872371 failed to find key in VPD: dsm_calib_r0_1
1703 05:03:15.881917 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1704 05:03:15.888426 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1705 05:03:15.891782 failed to find key in VPD: dsm_calib_r0_2
1706 05:03:15.901926 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1707 05:03:15.905247 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1708 05:03:15.911880 failed to find key in VPD: dsm_calib_r0_3
1709 05:03:15.918324 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1710 05:03:15.925070 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1711 05:03:15.928123 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1712 05:03:15.931717 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1713 05:03:15.935417 EC returned error result code 1
1714 05:03:15.939310 EC returned error result code 1
1715 05:03:15.943026 EC returned error result code 1
1716 05:03:15.949978 PS2K: Bad resp from EC. Vivaldi disabled!
1717 05:03:15.953104 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1718 05:03:15.960038 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1719 05:03:15.966360 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1720 05:03:15.969951 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1721 05:03:15.976427 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1722 05:03:15.982937 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1723 05:03:15.989806 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1724 05:03:15.993074 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1725 05:03:15.999571 ACPI: added table 2/32, length now 44
1726 05:03:15.999668 ACPI: * MCFG
1727 05:03:16.002612 ACPI: added table 3/32, length now 48
1728 05:03:16.005997 ACPI: * TPM2
1729 05:03:16.009194 TPM2 log created at 99a2d000
1730 05:03:16.012836 ACPI: added table 4/32, length now 52
1731 05:03:16.012932 ACPI: * MADT
1732 05:03:16.015965 SCI is IRQ9
1733 05:03:16.019255 ACPI: added table 5/32, length now 56
1734 05:03:16.019351 current = 99b43ac0
1735 05:03:16.022462 ACPI: * DMAR
1736 05:03:16.026081 ACPI: added table 6/32, length now 60
1737 05:03:16.029159 ACPI: * IGD OpRegion
1738 05:03:16.029256 GMA: Found VBT in CBFS
1739 05:03:16.032947 GMA: Found valid VBT in CBFS
1740 05:03:16.035996 ACPI: added table 7/32, length now 64
1741 05:03:16.038836 ACPI: * HPET
1742 05:03:16.042205 ACPI: added table 8/32, length now 68
1743 05:03:16.046107 ACPI: done.
1744 05:03:16.046212 ACPI tables: 31744 bytes.
1745 05:03:16.049597 smbios_write_tables: 99a2c000
1746 05:03:16.052490 EC returned error result code 3
1747 05:03:16.056239 Couldn't obtain OEM name from CBI
1748 05:03:16.059249 Create SMBIOS type 17
1749 05:03:16.062370 PCI: 00:00.0 (Intel Cannonlake)
1750 05:03:16.066240 PCI: 00:14.3 (Intel WiFi)
1751 05:03:16.069258 SMBIOS tables: 939 bytes.
1752 05:03:16.072341 Writing table forward entry at 0x00000500
1753 05:03:16.079366 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1754 05:03:16.082600 Writing coreboot table at 0x99b62000
1755 05:03:16.088744 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1756 05:03:16.092085 1. 0000000000001000-000000000009ffff: RAM
1757 05:03:16.095235 2. 00000000000a0000-00000000000fffff: RESERVED
1758 05:03:16.102187 3. 0000000000100000-0000000099a2bfff: RAM
1759 05:03:16.108403 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1760 05:03:16.111784 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1761 05:03:16.118729 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1762 05:03:16.122038 7. 000000009a000000-000000009f7fffff: RESERVED
1763 05:03:16.128499 8. 00000000e0000000-00000000efffffff: RESERVED
1764 05:03:16.131984 9. 00000000fc000000-00000000fc000fff: RESERVED
1765 05:03:16.138815 10. 00000000fe000000-00000000fe00ffff: RESERVED
1766 05:03:16.141823 11. 00000000fed10000-00000000fed17fff: RESERVED
1767 05:03:16.144898 12. 00000000fed80000-00000000fed83fff: RESERVED
1768 05:03:16.151862 13. 00000000fed90000-00000000fed91fff: RESERVED
1769 05:03:16.155021 14. 00000000feda0000-00000000feda1fff: RESERVED
1770 05:03:16.161512 15. 0000000100000000-000000045e7fffff: RAM
1771 05:03:16.164809 Graphics framebuffer located at 0xc0000000
1772 05:03:16.168298 Passing 5 GPIOs to payload:
1773 05:03:16.171452 NAME | PORT | POLARITY | VALUE
1774 05:03:16.178363 write protect | undefined | high | low
1775 05:03:16.184830 lid | undefined | high | high
1776 05:03:16.188132 power | undefined | high | low
1777 05:03:16.195095 oprom | undefined | high | low
1778 05:03:16.198400 EC in RW | 0x000000cb | high | low
1779 05:03:16.201469 Board ID: 4
1780 05:03:16.204548 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1781 05:03:16.208226 CBFS @ c08000 size 3f8000
1782 05:03:16.214592 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1783 05:03:16.221521 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1784 05:03:16.221615 coreboot table: 1492 bytes.
1785 05:03:16.224613 IMD ROOT 0. 99fff000 00001000
1786 05:03:16.227816 IMD SMALL 1. 99ffe000 00001000
1787 05:03:16.231076 FSP MEMORY 2. 99c4e000 003b0000
1788 05:03:16.234597 CONSOLE 3. 99c2e000 00020000
1789 05:03:16.237805 FMAP 4. 99c2d000 0000054e
1790 05:03:16.241205 TIME STAMP 5. 99c2c000 00000910
1791 05:03:16.244393 VBOOT WORK 6. 99c18000 00014000
1792 05:03:16.247678 MRC DATA 7. 99c16000 00001958
1793 05:03:16.251303 ROMSTG STCK 8. 99c15000 00001000
1794 05:03:16.254570 AFTER CAR 9. 99c0b000 0000a000
1795 05:03:16.258235 RAMSTAGE 10. 99baf000 0005c000
1796 05:03:16.261234 REFCODE 11. 99b7a000 00035000
1797 05:03:16.264197 SMM BACKUP 12. 99b6a000 00010000
1798 05:03:16.268025 COREBOOT 13. 99b62000 00008000
1799 05:03:16.271159 ACPI 14. 99b3e000 00024000
1800 05:03:16.274751 ACPI GNVS 15. 99b3d000 00001000
1801 05:03:16.277917 RAMOOPS 16. 99a3d000 00100000
1802 05:03:16.281394 TPM2 TCGLOG17. 99a2d000 00010000
1803 05:03:16.287831 SMBIOS 18. 99a2c000 00000800
1804 05:03:16.287922 IMD small region:
1805 05:03:16.290940 IMD ROOT 0. 99ffec00 00000400
1806 05:03:16.294214 FSP RUNTIME 1. 99ffebe0 00000004
1807 05:03:16.297332 EC HOSTEVENT 2. 99ffebc0 00000008
1808 05:03:16.300749 POWER STATE 3. 99ffeb80 00000040
1809 05:03:16.304291 ROMSTAGE 4. 99ffeb60 00000004
1810 05:03:16.307437 MEM INFO 5. 99ffe9a0 000001b9
1811 05:03:16.313950 VPD 6. 99ffe920 0000006c
1812 05:03:16.314043 MTRR: Physical address space:
1813 05:03:16.320867 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1814 05:03:16.327086 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1815 05:03:16.334129 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1816 05:03:16.340529 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1817 05:03:16.347387 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1818 05:03:16.353626 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1819 05:03:16.360152 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1820 05:03:16.363830 MTRR: Fixed MSR 0x250 0x0606060606060606
1821 05:03:16.367399 MTRR: Fixed MSR 0x258 0x0606060606060606
1822 05:03:16.370398 MTRR: Fixed MSR 0x259 0x0000000000000000
1823 05:03:16.376544 MTRR: Fixed MSR 0x268 0x0606060606060606
1824 05:03:16.380540 MTRR: Fixed MSR 0x269 0x0606060606060606
1825 05:03:16.383582 MTRR: Fixed MSR 0x26a 0x0606060606060606
1826 05:03:16.386950 MTRR: Fixed MSR 0x26b 0x0606060606060606
1827 05:03:16.393218 MTRR: Fixed MSR 0x26c 0x0606060606060606
1828 05:03:16.396958 MTRR: Fixed MSR 0x26d 0x0606060606060606
1829 05:03:16.400209 MTRR: Fixed MSR 0x26e 0x0606060606060606
1830 05:03:16.403421 MTRR: Fixed MSR 0x26f 0x0606060606060606
1831 05:03:16.406667 call enable_fixed_mtrr()
1832 05:03:16.410309 CPU physical address size: 39 bits
1833 05:03:16.416623 MTRR: default type WB/UC MTRR counts: 6/8.
1834 05:03:16.420295 MTRR: WB selected as default type.
1835 05:03:16.426538 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1836 05:03:16.429943 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1837 05:03:16.436710 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1838 05:03:16.443445 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1839 05:03:16.449771 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1840 05:03:16.456627 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1841 05:03:16.459780 MTRR: Fixed MSR 0x250 0x0606060606060606
1842 05:03:16.466013 MTRR: Fixed MSR 0x258 0x0606060606060606
1843 05:03:16.469639 MTRR: Fixed MSR 0x259 0x0000000000000000
1844 05:03:16.472722 MTRR: Fixed MSR 0x268 0x0606060606060606
1845 05:03:16.476398 MTRR: Fixed MSR 0x269 0x0606060606060606
1846 05:03:16.482945 MTRR: Fixed MSR 0x26a 0x0606060606060606
1847 05:03:16.485829 MTRR: Fixed MSR 0x26b 0x0606060606060606
1848 05:03:16.489249 MTRR: Fixed MSR 0x26c 0x0606060606060606
1849 05:03:16.493141 MTRR: Fixed MSR 0x26d 0x0606060606060606
1850 05:03:16.499511 MTRR: Fixed MSR 0x26e 0x0606060606060606
1851 05:03:16.502641 MTRR: Fixed MSR 0x26f 0x0606060606060606
1852 05:03:16.502769
1853 05:03:16.502852 MTRR check
1854 05:03:16.506097 call enable_fixed_mtrr()
1855 05:03:16.509292 Fixed MTRRs : Enabled
1856 05:03:16.513030 Variable MTRRs: Enabled
1857 05:03:16.513117
1858 05:03:16.516247 CPU physical address size: 39 bits
1859 05:03:16.519388 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1860 05:03:16.525625 MTRR: Fixed MSR 0x250 0x0606060606060606
1861 05:03:16.528903 MTRR: Fixed MSR 0x258 0x0606060606060606
1862 05:03:16.532054 MTRR: Fixed MSR 0x259 0x0000000000000000
1863 05:03:16.535848 MTRR: Fixed MSR 0x268 0x0606060606060606
1864 05:03:16.542013 MTRR: Fixed MSR 0x269 0x0606060606060606
1865 05:03:16.545734 MTRR: Fixed MSR 0x26a 0x0606060606060606
1866 05:03:16.548611 MTRR: Fixed MSR 0x26b 0x0606060606060606
1867 05:03:16.551949 MTRR: Fixed MSR 0x26c 0x0606060606060606
1868 05:03:16.558802 MTRR: Fixed MSR 0x26d 0x0606060606060606
1869 05:03:16.562111 MTRR: Fixed MSR 0x26e 0x0606060606060606
1870 05:03:16.565591 MTRR: Fixed MSR 0x26f 0x0606060606060606
1871 05:03:16.568681 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 05:03:16.571764 call enable_fixed_mtrr()
1873 05:03:16.575561 MTRR: Fixed MSR 0x258 0x0606060606060606
1874 05:03:16.582033 MTRR: Fixed MSR 0x259 0x0000000000000000
1875 05:03:16.585025 MTRR: Fixed MSR 0x268 0x0606060606060606
1876 05:03:16.588371 MTRR: Fixed MSR 0x269 0x0606060606060606
1877 05:03:16.591899 MTRR: Fixed MSR 0x26a 0x0606060606060606
1878 05:03:16.598440 MTRR: Fixed MSR 0x26b 0x0606060606060606
1879 05:03:16.601824 MTRR: Fixed MSR 0x26c 0x0606060606060606
1880 05:03:16.604753 MTRR: Fixed MSR 0x26d 0x0606060606060606
1881 05:03:16.608294 MTRR: Fixed MSR 0x26e 0x0606060606060606
1882 05:03:16.614940 MTRR: Fixed MSR 0x26f 0x0606060606060606
1883 05:03:16.618162 CPU physical address size: 39 bits
1884 05:03:16.621961 call enable_fixed_mtrr()
1885 05:03:16.624995 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1886 05:03:16.628084 CPU physical address size: 39 bits
1887 05:03:16.631269 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 05:03:16.638192 MTRR: Fixed MSR 0x258 0x0606060606060606
1889 05:03:16.641383 MTRR: Fixed MSR 0x259 0x0000000000000000
1890 05:03:16.644473 MTRR: Fixed MSR 0x268 0x0606060606060606
1891 05:03:16.648194 MTRR: Fixed MSR 0x269 0x0606060606060606
1892 05:03:16.654343 MTRR: Fixed MSR 0x26a 0x0606060606060606
1893 05:03:16.657547 MTRR: Fixed MSR 0x26b 0x0606060606060606
1894 05:03:16.661242 MTRR: Fixed MSR 0x26c 0x0606060606060606
1895 05:03:16.664666 MTRR: Fixed MSR 0x26d 0x0606060606060606
1896 05:03:16.671563 MTRR: Fixed MSR 0x26e 0x0606060606060606
1897 05:03:16.674430 MTRR: Fixed MSR 0x26f 0x0606060606060606
1898 05:03:16.677498 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 05:03:16.680693 call enable_fixed_mtrr()
1900 05:03:16.684423 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 05:03:16.687646 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 05:03:16.694586 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 05:03:16.697840 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 05:03:16.701016 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 05:03:16.704254 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 05:03:16.710746 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 05:03:16.713832 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 05:03:16.717085 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 05:03:16.720453 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 05:03:16.724091 CPU physical address size: 39 bits
1911 05:03:16.727354 call enable_fixed_mtrr()
1912 05:03:16.734331 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 05:03:16.737454 MTRR: Fixed MSR 0x258 0x0606060606060606
1914 05:03:16.740541 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 05:03:16.743973 MTRR: Fixed MSR 0x268 0x0606060606060606
1916 05:03:16.747080 MTRR: Fixed MSR 0x269 0x0606060606060606
1917 05:03:16.753881 MTRR: Fixed MSR 0x26a 0x0606060606060606
1918 05:03:16.757039 MTRR: Fixed MSR 0x26b 0x0606060606060606
1919 05:03:16.760229 MTRR: Fixed MSR 0x26c 0x0606060606060606
1920 05:03:16.763823 MTRR: Fixed MSR 0x26d 0x0606060606060606
1921 05:03:16.769911 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 05:03:16.773490 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 05:03:16.776648 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 05:03:16.780140 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 05:03:16.786524 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 05:03:16.790528 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 05:03:16.793462 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 05:03:16.796804 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 05:03:16.803196 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 05:03:16.806438 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 05:03:16.810223 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 05:03:16.812983 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 05:03:16.819661 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 05:03:16.822955 call enable_fixed_mtrr()
1935 05:03:16.826089 CPU physical address size: 39 bits
1936 05:03:16.829838 CPU physical address size: 39 bits
1937 05:03:16.833110 call enable_fixed_mtrr()
1938 05:03:16.833204 CBFS @ c08000 size 3f8000
1939 05:03:16.839219 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1940 05:03:16.842427 CBFS: Locating 'fallback/payload'
1941 05:03:16.846192 CPU physical address size: 39 bits
1942 05:03:16.849093 CBFS: Found @ offset 1c96c0 size 3f798
1943 05:03:16.856085 Checking segment from ROM address 0xffdd16f8
1944 05:03:16.859427 Checking segment from ROM address 0xffdd1714
1945 05:03:16.862529 Loading segment from ROM address 0xffdd16f8
1946 05:03:16.865636 code (compression=0)
1947 05:03:16.875909 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1948 05:03:16.882452 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1949 05:03:16.885796 it's not compressed!
1950 05:03:16.977360 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1951 05:03:16.984083 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1952 05:03:16.987712 Loading segment from ROM address 0xffdd1714
1953 05:03:16.990977 Entry Point 0x30000000
1954 05:03:16.994331 Loaded segments
1955 05:03:16.999895 Finalizing chipset.
1956 05:03:17.003229 Finalizing SMM.
1957 05:03:17.006400 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1958 05:03:17.009548 mp_park_aps done after 0 msecs.
1959 05:03:17.016136 Jumping to boot code at 30000000(99b62000)
1960 05:03:17.022950 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1961 05:03:17.023044
1962 05:03:17.023129
1963 05:03:17.023201
1964 05:03:17.026237 Starting depthcharge on Helios...
1965 05:03:17.026326
1966 05:03:17.026688 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1967 05:03:17.026809 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1968 05:03:17.026904 Setting prompt string to ['hatch:']
1969 05:03:17.027036 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
1970 05:03:17.036271 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1971 05:03:17.036370
1972 05:03:17.042479 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1973 05:03:17.042575
1974 05:03:17.049138 board_setup: Info: eMMC controller not present; skipping
1975 05:03:17.049232
1976 05:03:17.052518 New NVMe Controller 0x30053ac0 @ 00:1d:00
1977 05:03:17.052602
1978 05:03:17.059236 board_setup: Info: SDHCI controller not present; skipping
1979 05:03:17.059327
1980 05:03:17.065460 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1981 05:03:17.065551
1982 05:03:17.065626 Wipe memory regions:
1983 05:03:17.065703
1984 05:03:17.068709 [0x00000000001000, 0x000000000a0000)
1985 05:03:17.068796
1986 05:03:17.072735 [0x00000000100000, 0x00000030000000)
1987 05:03:17.138984
1988 05:03:17.142072 [0x00000030657430, 0x00000099a2c000)
1989 05:03:17.289050
1990 05:03:17.292084 [0x00000100000000, 0x0000045e800000)
1991 05:03:18.749193
1992 05:03:18.749354 R8152: Initializing
1993 05:03:18.749446
1994 05:03:18.752323 Version 9 (ocp_data = 6010)
1995 05:03:18.756122
1996 05:03:18.756209 R8152: Done initializing
1997 05:03:18.756292
1998 05:03:18.759945 Adding net device
1999 05:03:19.242573
2000 05:03:19.242746 R8152: Initializing
2001 05:03:19.242828
2002 05:03:19.245816 Version 6 (ocp_data = 5c30)
2003 05:03:19.245909
2004 05:03:19.249218 R8152: Done initializing
2005 05:03:19.249301
2006 05:03:19.252365 net_add_device: Attemp to include the same device
2007 05:03:19.255597
2008 05:03:19.262772 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2009 05:03:19.262862
2010 05:03:19.262936
2011 05:03:19.263007
2012 05:03:19.263309 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2014 05:03:19.364043 hatch: tftpboot 192.168.201.1 9043132/tftp-deploy-jhx6tyfq/kernel/bzImage 9043132/tftp-deploy-jhx6tyfq/kernel/cmdline 9043132/tftp-deploy-jhx6tyfq/ramdisk/ramdisk.cpio.gz
2015 05:03:19.364207 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2016 05:03:19.364308 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2017 05:03:19.368324 tftpboot 192.168.201.1 9043132/tftp-deploy-jhx6tyfq/kernel/bzImoy-jhx6tyfq/kernel/cmdline 9043132/tftp-deploy-jhx6tyfq/ramdisk/ramdisk.cpio.gz
2018 05:03:19.368440
2019 05:03:19.368521 Waiting for link
2020 05:03:19.569343
2021 05:03:19.569489 done.
2022 05:03:19.569577
2023 05:03:19.569652 MAC: 00:24:32:50:1a:59
2024 05:03:19.569721
2025 05:03:19.572341 Sending DHCP discover... done.
2026 05:03:19.572429
2027 05:03:19.575458 Waiting for reply... done.
2028 05:03:19.575544
2029 05:03:19.579179 Sending DHCP request... done.
2030 05:03:19.579264
2031 05:03:19.582410 Waiting for reply... done.
2032 05:03:19.582490
2033 05:03:19.585616 My ip is 192.168.201.14
2034 05:03:19.585702
2035 05:03:19.588930 The DHCP server ip is 192.168.201.1
2036 05:03:19.589013
2037 05:03:19.592087 TFTP server IP predefined by user: 192.168.201.1
2038 05:03:19.592167
2039 05:03:19.598824 Bootfile predefined by user: 9043132/tftp-deploy-jhx6tyfq/kernel/bzImage
2040 05:03:19.598915
2041 05:03:19.602907 Sending tftp read request... done.
2042 05:03:19.602990
2043 05:03:19.608781 Waiting for the transfer...
2044 05:03:19.608873
2045 05:03:20.285557 00000000 ################################################################
2046 05:03:20.286109
2047 05:03:20.992677 00080000 ################################################################
2048 05:03:20.993232
2049 05:03:21.697876 00100000 ################################################################
2050 05:03:21.698422
2051 05:03:22.395465 00180000 ################################################################
2052 05:03:22.395996
2053 05:03:23.090785 00200000 ################################################################
2054 05:03:23.091314
2055 05:03:23.789270 00280000 ################################################################
2056 05:03:23.789818
2057 05:03:24.440977 00300000 ################################################################
2058 05:03:24.441544
2059 05:03:25.135146 00380000 ################################################################
2060 05:03:25.135714
2061 05:03:25.833872 00400000 ################################################################
2062 05:03:25.834418
2063 05:03:26.529853 00480000 ################################################################
2064 05:03:26.530416
2065 05:03:27.230576 00500000 ################################################################
2066 05:03:27.231125
2067 05:03:27.946807 00580000 ################################################################
2068 05:03:27.947342
2069 05:03:28.661845 00600000 ################################################################
2070 05:03:28.662417
2071 05:03:29.345036 00680000 ################################################################
2072 05:03:29.345196
2073 05:03:29.800225 00700000 ############################################# done.
2074 05:03:29.800778
2075 05:03:29.803200 The bootfile was 7704464 bytes long.
2076 05:03:29.803643
2077 05:03:29.806567 Sending tftp read request... done.
2078 05:03:29.807100
2079 05:03:29.809566 Waiting for the transfer...
2080 05:03:29.810070
2081 05:03:30.479631 00000000 ################################################################
2082 05:03:30.480340
2083 05:03:31.139331 00080000 ################################################################
2084 05:03:31.139732
2085 05:03:31.727174 00100000 ################################################################
2086 05:03:31.727325
2087 05:03:32.309536 00180000 ################################################################
2088 05:03:32.309689
2089 05:03:32.906648 00200000 ################################################################
2090 05:03:32.907185
2091 05:03:33.531927 00280000 ################################################################
2092 05:03:33.532485
2093 05:03:34.158535 00300000 ################################################################
2094 05:03:34.159105
2095 05:03:34.748839 00380000 ################################################################
2096 05:03:34.748994
2097 05:03:35.308986 00400000 ################################################################
2098 05:03:35.309137
2099 05:03:35.873044 00480000 ################################################################
2100 05:03:35.873195
2101 05:03:36.569407 00500000 ################################################################
2102 05:03:36.569981
2103 05:03:37.274482 00580000 ################################################################
2104 05:03:37.274998
2105 05:03:37.911094 00600000 ################################################################
2106 05:03:37.911630
2107 05:03:38.564330 00680000 ################################################################
2108 05:03:38.564881
2109 05:03:39.210713 00700000 ################################################################
2110 05:03:39.211255
2111 05:03:39.851681 00780000 ################################################################
2112 05:03:39.851834
2113 05:03:40.042779 00800000 ###################### done.
2114 05:03:40.042929
2115 05:03:40.045859 Sending tftp read request... done.
2116 05:03:40.045958
2117 05:03:40.049125 Waiting for the transfer...
2118 05:03:40.049222
2119 05:03:40.049298 00000000 # done.
2120 05:03:40.049372
2121 05:03:40.059079 Command line loaded dynamically from TFTP file: 9043132/tftp-deploy-jhx6tyfq/kernel/cmdline
2122 05:03:40.059178
2123 05:03:40.075819 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2124 05:03:40.075920
2125 05:03:40.082587 ec_init(0): CrosEC protocol v3 supported (256, 256)
2126 05:03:40.086913
2127 05:03:40.089722 Shutting down all USB controllers.
2128 05:03:40.089819
2129 05:03:40.089894 Removing current net device
2130 05:03:40.093644
2131 05:03:40.093744 Finalizing coreboot
2132 05:03:40.093822
2133 05:03:40.099933 Exiting depthcharge with code 4 at timestamp: 30430237
2134 05:03:40.100037
2135 05:03:40.100114
2136 05:03:40.100186 Starting kernel ...
2137 05:03:40.100255
2138 05:03:40.100649 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2139 05:03:40.100757 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2140 05:03:40.100843 Setting prompt string to ['Linux version [0-9]']
2141 05:03:40.100924 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2142 05:03:40.101003 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2143 05:03:40.103193
2145 05:07:57.101004 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2147 05:07:57.101236 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2149 05:07:57.101401 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2152 05:07:57.101716 end: 2 depthcharge-action (duration 00:05:00) [common]
2154 05:07:57.102016 Cleaning after the job
2155 05:07:57.102114 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9043132/tftp-deploy-jhx6tyfq/ramdisk
2156 05:07:57.102840 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9043132/tftp-deploy-jhx6tyfq/kernel
2157 05:07:57.103396 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9043132/tftp-deploy-jhx6tyfq/modules
2158 05:07:57.103600 start: 5.1 power-off (timeout 00:00:30) [common]
2159 05:07:57.103771 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2160 05:07:59.283092 >> Command sent successfully.
2161 05:07:59.285592 Returned 0 in 2 seconds
2162 05:07:59.386259 end: 5.1 power-off (duration 00:00:02) [common]
2164 05:07:59.386587 start: 5.2 read-feedback (timeout 00:09:58) [common]
2165 05:07:59.386849 Listened to connection for namespace 'common' for up to 1s
2167 05:07:59.387256 Listened to connection for namespace 'common' for up to 1s
2168 05:08:00.391829 Finalising connection for namespace 'common'
2169 05:08:00.392024 Disconnecting from shell: Finalise
2170 05:08:00.392114
2171 05:08:00.492884 end: 5.2 read-feedback (duration 00:00:01) [common]
2172 05:08:00.493032 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9043132
2173 05:08:00.498289 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9043132
2174 05:08:00.498432 JobError: Your job cannot terminate cleanly.