Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 05:02:56.326995 lava-dispatcher, installed at version: 2022.11
2 05:02:56.327167 start: 0 validate
3 05:02:56.327289 Start time: 2023-02-07 05:02:56.327282+00:00 (UTC)
4 05:02:56.327413 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:02:56.327538 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230203.0%2Fx86%2Frootfs.cpio.gz exists
6 05:02:56.330822 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:02:56.330941 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:02:57.334813 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:02:57.335533 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
10 05:02:57.340604 validate duration: 1.01
12 05:02:57.340910 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 05:02:57.341018 start: 1.1 download-retry (timeout 00:10:00) [common]
14 05:02:57.341114 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 05:02:57.341221 Not decompressing ramdisk as can be used compressed.
16 05:02:57.341399 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230203.0/x86/rootfs.cpio.gz
17 05:02:57.341467 saving as /var/lib/lava/dispatcher/tmp/9043155/tftp-deploy-3v342tx1/ramdisk/rootfs.cpio.gz
18 05:02:57.341528 total size: 8423718 (8MB)
19 05:02:57.344030 progress 0% (0MB)
20 05:02:57.354331 progress 5% (0MB)
21 05:02:57.365340 progress 10% (0MB)
22 05:02:57.376063 progress 15% (1MB)
23 05:02:57.387591 progress 20% (1MB)
24 05:02:57.398819 progress 25% (2MB)
25 05:02:57.410131 progress 30% (2MB)
26 05:02:57.419115 progress 35% (2MB)
27 05:02:57.429079 progress 40% (3MB)
28 05:02:57.440400 progress 45% (3MB)
29 05:02:57.450078 progress 50% (4MB)
30 05:02:57.461340 progress 55% (4MB)
31 05:02:57.473153 progress 60% (4MB)
32 05:02:57.482871 progress 65% (5MB)
33 05:02:57.492655 progress 70% (5MB)
34 05:02:57.503610 progress 75% (6MB)
35 05:02:57.517444 progress 80% (6MB)
36 05:02:57.541358 progress 85% (6MB)
37 05:02:57.567757 progress 90% (7MB)
38 05:02:57.594214 progress 95% (7MB)
39 05:02:57.617073 progress 100% (8MB)
40 05:02:57.617486 8MB downloaded in 0.28s (29.11MB/s)
41 05:02:57.617842 end: 1.1.1 http-download (duration 00:00:00) [common]
43 05:02:57.618433 end: 1.1 download-retry (duration 00:00:00) [common]
44 05:02:57.618624 start: 1.2 download-retry (timeout 00:10:00) [common]
45 05:02:57.618811 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 05:02:57.619024 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
47 05:02:57.619177 saving as /var/lib/lava/dispatcher/tmp/9043155/tftp-deploy-3v342tx1/kernel/bzImage
48 05:02:57.619310 total size: 7704464 (7MB)
49 05:02:57.619439 No compression specified
50 05:02:57.638772 progress 0% (0MB)
51 05:02:57.660383 progress 5% (0MB)
52 05:02:57.688079 progress 10% (0MB)
53 05:02:57.715770 progress 15% (1MB)
54 05:02:57.748479 progress 20% (1MB)
55 05:02:57.772899 progress 25% (1MB)
56 05:02:57.795546 progress 30% (2MB)
57 05:02:57.816780 progress 35% (2MB)
58 05:02:57.834297 progress 40% (2MB)
59 05:02:57.853550 progress 45% (3MB)
60 05:02:57.873020 progress 50% (3MB)
61 05:02:57.891584 progress 55% (4MB)
62 05:02:57.908125 progress 60% (4MB)
63 05:02:57.925685 progress 65% (4MB)
64 05:02:57.949491 progress 70% (5MB)
65 05:02:57.970775 progress 75% (5MB)
66 05:02:57.997458 progress 80% (5MB)
67 05:02:58.020933 progress 85% (6MB)
68 05:02:58.042401 progress 90% (6MB)
69 05:02:58.055198 progress 95% (7MB)
70 05:02:58.067113 progress 100% (7MB)
71 05:02:58.067315 7MB downloaded in 0.45s (16.40MB/s)
72 05:02:58.067485 end: 1.2.1 http-download (duration 00:00:00) [common]
74 05:02:58.067767 end: 1.2 download-retry (duration 00:00:00) [common]
75 05:02:58.067874 start: 1.3 download-retry (timeout 00:09:59) [common]
76 05:02:58.067980 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 05:02:58.068102 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
78 05:02:58.068181 saving as /var/lib/lava/dispatcher/tmp/9043155/tftp-deploy-3v342tx1/modules/modules.tar
79 05:02:58.068262 total size: 55964 (0MB)
80 05:02:58.068342 Using unxz to decompress xz
81 05:02:58.084945 progress 58% (0MB)
82 05:02:58.085350 progress 100% (0MB)
83 05:02:58.088833 0MB downloaded in 0.02s (2.60MB/s)
84 05:02:58.089077 end: 1.3.1 http-download (duration 00:00:00) [common]
86 05:02:58.089383 end: 1.3 download-retry (duration 00:00:00) [common]
87 05:02:58.089497 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 05:02:58.089617 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 05:02:58.089725 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 05:02:58.089831 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 05:02:58.090017 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0
92 05:02:58.090146 makedir: /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin
93 05:02:58.090246 makedir: /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/tests
94 05:02:58.090347 makedir: /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/results
95 05:02:58.090474 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-add-keys
96 05:02:58.090623 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-add-sources
97 05:02:58.090761 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-background-process-start
98 05:02:58.090896 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-background-process-stop
99 05:02:58.091029 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-common-functions
100 05:02:58.091159 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-echo-ipv4
101 05:02:58.091291 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-install-packages
102 05:02:58.091423 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-installed-packages
103 05:02:58.091551 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-os-build
104 05:02:58.091681 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-probe-channel
105 05:02:58.091856 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-probe-ip
106 05:02:58.091986 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-target-ip
107 05:02:58.092116 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-target-mac
108 05:02:58.092247 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-target-storage
109 05:02:58.092382 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-test-case
110 05:02:58.092514 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-test-event
111 05:02:58.092646 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-test-feedback
112 05:02:58.092775 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-test-raise
113 05:02:58.092909 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-test-reference
114 05:02:58.093040 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-test-runner
115 05:02:58.093171 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-test-set
116 05:02:58.093302 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-test-shell
117 05:02:58.093436 Updating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-install-packages (oe)
118 05:02:58.093571 Updating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/bin/lava-installed-packages (oe)
119 05:02:58.093688 Creating /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/environment
120 05:02:58.093794 LAVA metadata
121 05:02:58.093876 - LAVA_JOB_ID=9043155
122 05:02:58.093958 - LAVA_DISPATCHER_IP=192.168.201.1
123 05:02:58.094084 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 05:02:58.094156 skipped lava-vland-overlay
125 05:02:58.094259 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 05:02:58.094360 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 05:02:58.094433 skipped lava-multinode-overlay
128 05:02:58.094534 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 05:02:58.094637 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 05:02:58.094727 Loading test definitions
131 05:02:58.094847 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 05:02:58.094936 Using /lava-9043155 at stage 0
133 05:02:58.095229 uuid=9043155_1.4.2.3.1 testdef=None
134 05:02:58.095330 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 05:02:58.095442 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 05:02:58.096019 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 05:02:58.096288 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 05:02:58.096905 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 05:02:58.097180 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 05:02:58.097753 runner path: /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/0/tests/0_dmesg test_uuid 9043155_1.4.2.3.1
143 05:02:58.097943 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 05:02:58.098187 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 05:02:58.098264 Using /lava-9043155 at stage 1
147 05:02:58.098514 uuid=9043155_1.4.2.3.5 testdef=None
148 05:02:58.098608 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 05:02:58.098699 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 05:02:58.099154 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 05:02:58.099385 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 05:02:58.100013 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 05:02:58.100255 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 05:02:58.100809 runner path: /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/1/tests/1_bootrr test_uuid 9043155_1.4.2.3.5
157 05:02:58.100952 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 05:02:58.101172 Creating lava-test-runner.conf files
160 05:02:58.101238 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/0 for stage 0
161 05:02:58.101322 - 0_dmesg
162 05:02:58.101399 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9043155/lava-overlay-h4h3epe0/lava-9043155/1 for stage 1
163 05:02:58.101484 - 1_bootrr
164 05:02:58.101576 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 05:02:58.101666 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 05:02:58.107942 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 05:02:58.108054 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 05:02:58.108147 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 05:02:58.108240 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 05:02:58.108330 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 05:02:58.295378 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 05:02:58.295735 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 05:02:58.295892 extracting modules file /var/lib/lava/dispatcher/tmp/9043155/tftp-deploy-3v342tx1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9043155/extract-overlay-ramdisk-bo11g641/ramdisk
174 05:02:58.300747 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 05:02:58.300887 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 05:02:58.301015 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9043155/compress-overlay-mgnztv8o/overlay-1.4.2.4.tar.gz to ramdisk
177 05:02:58.301126 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9043155/compress-overlay-mgnztv8o/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9043155/extract-overlay-ramdisk-bo11g641/ramdisk
178 05:02:58.305244 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 05:02:58.305364 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 05:02:58.305457 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 05:02:58.305553 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 05:02:58.305636 Building ramdisk /var/lib/lava/dispatcher/tmp/9043155/extract-overlay-ramdisk-bo11g641/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9043155/extract-overlay-ramdisk-bo11g641/ramdisk
183 05:02:58.370828 >> 48168 blocks
184 05:02:59.190887 rename /var/lib/lava/dispatcher/tmp/9043155/extract-overlay-ramdisk-bo11g641/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9043155/tftp-deploy-3v342tx1/ramdisk/ramdisk.cpio.gz
185 05:02:59.191304 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 05:02:59.191422 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 05:02:59.191524 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 05:02:59.191620 No mkimage arch provided, not using FIT.
189 05:02:59.191751 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 05:02:59.191840 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 05:02:59.191946 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 05:02:59.192041 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 05:02:59.192123 No LXC device requested
194 05:02:59.192204 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 05:02:59.192291 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 05:02:59.192382 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 05:02:59.192459 Checking files for TFTP limit of 4294967296 bytes.
198 05:02:59.192853 end: 1 tftp-deploy (duration 00:00:02) [common]
199 05:02:59.192964 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 05:02:59.193065 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 05:02:59.193199 substitutions:
202 05:02:59.193270 - {DTB}: None
203 05:02:59.193339 - {INITRD}: 9043155/tftp-deploy-3v342tx1/ramdisk/ramdisk.cpio.gz
204 05:02:59.193402 - {KERNEL}: 9043155/tftp-deploy-3v342tx1/kernel/bzImage
205 05:02:59.193464 - {LAVA_MAC}: None
206 05:02:59.193524 - {PRESEED_CONFIG}: None
207 05:02:59.193583 - {PRESEED_LOCAL}: None
208 05:02:59.193642 - {RAMDISK}: 9043155/tftp-deploy-3v342tx1/ramdisk/ramdisk.cpio.gz
209 05:02:59.193700 - {ROOT_PART}: None
210 05:02:59.193759 - {ROOT}: None
211 05:02:59.193817 - {SERVER_IP}: 192.168.201.1
212 05:02:59.193875 - {TEE}: None
213 05:02:59.193933 Parsed boot commands:
214 05:02:59.193990 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 05:02:59.194141 Parsed boot commands: tftpboot 192.168.201.1 9043155/tftp-deploy-3v342tx1/kernel/bzImage 9043155/tftp-deploy-3v342tx1/kernel/cmdline 9043155/tftp-deploy-3v342tx1/ramdisk/ramdisk.cpio.gz
216 05:02:59.194236 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 05:02:59.194329 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 05:02:59.194427 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 05:02:59.194517 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 05:02:59.194589 Not connected, no need to disconnect.
221 05:02:59.194667 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 05:02:59.194753 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 05:02:59.194822 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
224 05:02:59.197691 Setting prompt string to ['lava-test: # ']
225 05:02:59.197983 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 05:02:59.198091 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 05:02:59.198192 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 05:02:59.198285 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 05:02:59.198699 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
230 05:03:08.523656 >> Command sent successfully.
231 05:03:08.531803 Returned 0 in 9 seconds
232 05:03:08.633420 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 05:03:08.634984 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 05:03:08.635516 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 05:03:08.636016 Setting prompt string to 'Starting depthcharge on Voema...'
237 05:03:08.636375 Changing prompt to 'Starting depthcharge on Voema...'
238 05:03:08.636736 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 05:03:08.638056 [Enter `^Ec?' for help]
240 05:03:08.638618
241 05:03:08.639114
242 05:03:08.639470 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 05:03:08.639880 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 05:03:08.640234 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 05:03:08.640563 CPU: AES supported, TXT NOT supported, VT supported
246 05:03:08.640881 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 05:03:08.641196 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 05:03:08.641507 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 05:03:08.641878 VBOOT: Loading verstage.
250 05:03:08.642197 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 05:03:08.642507 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 05:03:08.642813 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 05:03:08.643118 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 05:03:08.643429 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 05:03:08.643760
256 05:03:08.644067
257 05:03:08.644369 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 05:03:08.644676 Probing TPM: . done!
259 05:03:08.644974 TPM ready after 0 ms
260 05:03:08.645276 Connected to device vid:did:rid of 1ae0:0028:00
261 05:03:08.645578 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 05:03:08.645895 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 05:03:08.646198 Initialized TPM device CR50 revision 0
264 05:03:08.646503 tlcl_send_startup: Startup return code is 0
265 05:03:08.646806 TPM: setup succeeded
266 05:03:08.647108 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 05:03:08.647411 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 05:03:08.647745 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 05:03:08.648068 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 05:03:08.648367 Chrome EC: UHEPI supported
271 05:03:08.648664 Phase 1
272 05:03:08.648962 FMAP: area GBB found @ 1805000 (458752 bytes)
273 05:03:08.649264 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 05:03:08.649567 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 05:03:08.649870 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 05:03:08.650169 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 05:03:08.650468 Recovery requested (1009000e)
278 05:03:08.650765 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 05:03:08.651067 tlcl_extend: response is 0
280 05:03:08.651366 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 05:03:08.651666 tlcl_extend: response is 0
282 05:03:08.652017 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 05:03:08.652322 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 05:03:08.652630 BS: verstage times (exec / console): total (unknown) / 142 ms
285 05:03:08.652930
286 05:03:08.653223
287 05:03:08.653602 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 05:03:08.653926 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 05:03:08.654230 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 05:03:08.654711 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 05:03:08.655077 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 05:03:08.655388 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 05:03:08.655718 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 05:03:08.656084 TCO_STS: 0000 0000
295 05:03:08.656390 GEN_PMCON: d0015038 00002200
296 05:03:08.656692 GBLRST_CAUSE: 00000000 00000000
297 05:03:08.656990 HPR_CAUSE0: 00000000
298 05:03:08.657284 prev_sleep_state 5
299 05:03:08.657646 Boot Count incremented to 15360
300 05:03:08.657980 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 05:03:08.658298 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 05:03:08.658598 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 05:03:08.658899 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 05:03:08.659200 Chrome EC: UHEPI supported
305 05:03:08.659869 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 05:03:08.660221 Probing TPM: done!
307 05:03:08.661453 Connected to device vid:did:rid of 1ae0:0028:00
308 05:03:08.671834 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
309 05:03:08.678705 Initialized TPM device CR50 revision 0
310 05:03:08.688993 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 05:03:08.695329 MRC: Hash idx 0x100b comparison successful.
312 05:03:08.698527 MRC cache found, size faa8
313 05:03:08.698760 bootmode is set to: 2
314 05:03:08.701627 SPD index = 0
315 05:03:08.709044 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 05:03:08.711598 SPD: module type is LPDDR4X
317 05:03:08.714893 SPD: module part number is MT53E512M64D4NW-046
318 05:03:08.721581 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 05:03:08.728234 SPD: device width 16 bits, bus width 16 bits
320 05:03:08.731527 SPD: module size is 1024 MB (per channel)
321 05:03:09.164068 CBMEM:
322 05:03:09.167315 IMD: root @ 0x76fff000 254 entries.
323 05:03:09.170557 IMD: root @ 0x76ffec00 62 entries.
324 05:03:09.173942 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 05:03:09.180479 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 05:03:09.184181 External stage cache:
327 05:03:09.187184 IMD: root @ 0x7b3ff000 254 entries.
328 05:03:09.190310 IMD: root @ 0x7b3fec00 62 entries.
329 05:03:09.206075 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 05:03:09.212573 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 05:03:09.218704 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 05:03:09.233104 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 05:03:09.236594 cse_lite: Skip switching to RW in the recovery path
334 05:03:09.240332 8 DIMMs found
335 05:03:09.240783 SMM Memory Map
336 05:03:09.243989 SMRAM : 0x7b000000 0x800000
337 05:03:09.247870 Subregion 0: 0x7b000000 0x200000
338 05:03:09.250984 Subregion 1: 0x7b200000 0x200000
339 05:03:09.253731 Subregion 2: 0x7b400000 0x400000
340 05:03:09.257111 top_of_ram = 0x77000000
341 05:03:09.263660 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 05:03:09.267120 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 05:03:09.273850 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 05:03:09.277249 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 05:03:09.286554 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 05:03:09.293295 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 05:03:09.303335 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 05:03:09.306853 Processing 211 relocs. Offset value of 0x74c0b000
349 05:03:09.315851 BS: romstage times (exec / console): total (unknown) / 277 ms
350 05:03:09.322267
351 05:03:09.322678
352 05:03:09.332203 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 05:03:09.335056 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 05:03:09.345094 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 05:03:09.352078 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 05:03:09.358527 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 05:03:09.365215 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 05:03:09.412393 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 05:03:09.418721 Processing 5008 relocs. Offset value of 0x75d98000
360 05:03:09.422196 BS: postcar times (exec / console): total (unknown) / 59 ms
361 05:03:09.425395
362 05:03:09.425837
363 05:03:09.435440 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 05:03:09.436086 Normal boot
365 05:03:09.438944 FW_CONFIG value is 0x804c02
366 05:03:09.442288 PCI: 00:07.0 disabled by fw_config
367 05:03:09.445488 PCI: 00:07.1 disabled by fw_config
368 05:03:09.448553 PCI: 00:0d.2 disabled by fw_config
369 05:03:09.451972 PCI: 00:1c.7 disabled by fw_config
370 05:03:09.458854 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 05:03:09.465573 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 05:03:09.468732 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 05:03:09.472063 GENERIC: 0.0 disabled by fw_config
374 05:03:09.475423 GENERIC: 1.0 disabled by fw_config
375 05:03:09.482247 fw_config match found: DB_USB=USB3_ACTIVE
376 05:03:09.485125 fw_config match found: DB_USB=USB3_ACTIVE
377 05:03:09.488663 fw_config match found: DB_USB=USB3_ACTIVE
378 05:03:09.495385 fw_config match found: DB_USB=USB3_ACTIVE
379 05:03:09.498614 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 05:03:09.505141 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 05:03:09.514877 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 05:03:09.521419 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 05:03:09.525217 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 05:03:09.531307 microcode: Update skipped, already up-to-date
385 05:03:09.537987 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 05:03:09.565863 Detected 4 core, 8 thread CPU.
387 05:03:09.568606 Setting up SMI for CPU
388 05:03:09.572103 IED base = 0x7b400000
389 05:03:09.572430 IED size = 0x00400000
390 05:03:09.575336 Will perform SMM setup.
391 05:03:09.582629 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 05:03:09.588601 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 05:03:09.595769 Processing 16 relocs. Offset value of 0x00030000
394 05:03:09.599138 Attempting to start 7 APs
395 05:03:09.601694 Waiting for 10ms after sending INIT.
396 05:03:09.617919 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 05:03:09.618382 done.
398 05:03:09.620949 AP: slot 3 apic_id 2.
399 05:03:09.624163 AP: slot 6 apic_id 3.
400 05:03:09.624634 AP: slot 7 apic_id 5.
401 05:03:09.627886 AP: slot 4 apic_id 4.
402 05:03:09.631000 Waiting for 2nd SIPI to complete...done.
403 05:03:09.634404 AP: slot 5 apic_id 6.
404 05:03:09.638004 AP: slot 2 apic_id 7.
405 05:03:09.644268 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 05:03:09.650996 Processing 13 relocs. Offset value of 0x00038000
407 05:03:09.651441 Unable to locate Global NVS
408 05:03:09.660848 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 05:03:09.664668 Installing permanent SMM handler to 0x7b000000
410 05:03:09.674359 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 05:03:09.677561 Processing 794 relocs. Offset value of 0x7b010000
412 05:03:09.687088 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 05:03:09.690819 Processing 13 relocs. Offset value of 0x7b008000
414 05:03:09.697336 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 05:03:09.704038 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 05:03:09.707682 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 05:03:09.714398 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 05:03:09.720472 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 05:03:09.727001 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 05:03:09.733790 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 05:03:09.734240 Unable to locate Global NVS
422 05:03:09.743844 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 05:03:09.747491 Clearing SMI status registers
424 05:03:09.748060 SMI_STS: PM1
425 05:03:09.750242 PM1_STS: PWRBTN
426 05:03:09.756955 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 05:03:09.760130 In relocation handler: CPU 0
428 05:03:09.763597 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 05:03:09.769932 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 05:03:09.770395 Relocation complete.
431 05:03:09.779854 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 05:03:09.783249 In relocation handler: CPU 1
433 05:03:09.786919 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 05:03:09.787377 Relocation complete.
435 05:03:09.796864 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
436 05:03:09.799810 In relocation handler: CPU 2
437 05:03:09.802801 New SMBASE=0x7afff800 IEDBASE=0x7b400000
438 05:03:09.803229 Relocation complete.
439 05:03:09.812748 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
440 05:03:09.816154 In relocation handler: CPU 5
441 05:03:09.819468 New SMBASE=0x7affec00 IEDBASE=0x7b400000
442 05:03:09.822703 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 05:03:09.826472 Relocation complete.
444 05:03:09.833348 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
445 05:03:09.835854 In relocation handler: CPU 3
446 05:03:09.839221 New SMBASE=0x7afff400 IEDBASE=0x7b400000
447 05:03:09.846187 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 05:03:09.846641 Relocation complete.
449 05:03:09.855973 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
450 05:03:09.856426 In relocation handler: CPU 6
451 05:03:09.862265 New SMBASE=0x7affe800 IEDBASE=0x7b400000
452 05:03:09.862720 Relocation complete.
453 05:03:09.872621 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
454 05:03:09.873079 In relocation handler: CPU 7
455 05:03:09.878934 New SMBASE=0x7affe400 IEDBASE=0x7b400000
456 05:03:09.879395 Relocation complete.
457 05:03:09.888557 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
458 05:03:09.888880 In relocation handler: CPU 4
459 05:03:09.895353 New SMBASE=0x7afff000 IEDBASE=0x7b400000
460 05:03:09.898671 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 05:03:09.901966 Relocation complete.
462 05:03:09.902207 Initializing CPU #0
463 05:03:09.905908 CPU: vendor Intel device 806c1
464 05:03:09.909407 CPU: family 06, model 8c, stepping 01
465 05:03:09.912657 Clearing out pending MCEs
466 05:03:09.916561 Setting up local APIC...
467 05:03:09.919218 apic_id: 0x00 done.
468 05:03:09.922367 Turbo is available but hidden
469 05:03:09.925918 Turbo is available and visible
470 05:03:09.928782 microcode: Update skipped, already up-to-date
471 05:03:09.932614 CPU #0 initialized
472 05:03:09.932806 Initializing CPU #3
473 05:03:09.935553 Initializing CPU #5
474 05:03:09.938829 CPU: vendor Intel device 806c1
475 05:03:09.942227 CPU: family 06, model 8c, stepping 01
476 05:03:09.946011 Initializing CPU #6
477 05:03:09.946223 Clearing out pending MCEs
478 05:03:09.948732 CPU: vendor Intel device 806c1
479 05:03:09.952455 CPU: family 06, model 8c, stepping 01
480 05:03:09.955643 Setting up local APIC...
481 05:03:09.959113 Initializing CPU #7
482 05:03:09.959297 Initializing CPU #4
483 05:03:09.962263 CPU: vendor Intel device 806c1
484 05:03:09.968810 CPU: family 06, model 8c, stepping 01
485 05:03:09.969004 CPU: vendor Intel device 806c1
486 05:03:09.975521 CPU: family 06, model 8c, stepping 01
487 05:03:09.975731 Clearing out pending MCEs
488 05:03:09.978853 Clearing out pending MCEs
489 05:03:09.982300 Setting up local APIC...
490 05:03:09.985356 apic_id: 0x02 done.
491 05:03:09.985549 Clearing out pending MCEs
492 05:03:09.988570 Setting up local APIC...
493 05:03:09.991859 Initializing CPU #2
494 05:03:09.995483 CPU: vendor Intel device 806c1
495 05:03:09.999000 CPU: family 06, model 8c, stepping 01
496 05:03:10.001797 apic_id: 0x04 done.
497 05:03:10.001991 apic_id: 0x05 done.
498 05:03:10.008382 microcode: Update skipped, already up-to-date
499 05:03:10.012177 microcode: Update skipped, already up-to-date
500 05:03:10.015135 CPU #4 initialized
501 05:03:10.015328 CPU #7 initialized
502 05:03:10.018562 CPU: vendor Intel device 806c1
503 05:03:10.022061 CPU: family 06, model 8c, stepping 01
504 05:03:10.025449 Initializing CPU #1
505 05:03:10.028677 microcode: Update skipped, already up-to-date
506 05:03:10.031954 Setting up local APIC...
507 05:03:10.035311 Clearing out pending MCEs
508 05:03:10.038365 CPU: vendor Intel device 806c1
509 05:03:10.041917 CPU: family 06, model 8c, stepping 01
510 05:03:10.044749 apic_id: 0x03 done.
511 05:03:10.044942 CPU #3 initialized
512 05:03:10.048488 microcode: Update skipped, already up-to-date
513 05:03:10.051839 Setting up local APIC...
514 05:03:10.055212 CPU #6 initialized
515 05:03:10.058533 Clearing out pending MCEs
516 05:03:10.058731 apic_id: 0x06 done.
517 05:03:10.061512 Clearing out pending MCEs
518 05:03:10.065178 microcode: Update skipped, already up-to-date
519 05:03:10.068460 Setting up local APIC...
520 05:03:10.071855 Setting up local APIC...
521 05:03:10.075199 apic_id: 0x07 done.
522 05:03:10.075396 CPU #5 initialized
523 05:03:10.082344 microcode: Update skipped, already up-to-date
524 05:03:10.082539 apic_id: 0x01 done.
525 05:03:10.085150 CPU #2 initialized
526 05:03:10.087930 microcode: Update skipped, already up-to-date
527 05:03:10.091283 CPU #1 initialized
528 05:03:10.094758 bsp_do_flight_plan done after 459 msecs.
529 05:03:10.098274 CPU: frequency set to 4000 MHz
530 05:03:10.101485 Enabling SMIs.
531 05:03:10.108069 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 05:03:10.122496 SATAXPCIE1 indicates PCIe NVMe is present
533 05:03:10.125800 Probing TPM: done!
534 05:03:10.129163 Connected to device vid:did:rid of 1ae0:0028:00
535 05:03:10.139967 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
536 05:03:10.143281 Initialized TPM device CR50 revision 0
537 05:03:10.146617 Enabling S0i3.4
538 05:03:10.153218 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 05:03:10.156409 Found a VBT of 8704 bytes after decompression
540 05:03:10.163319 cse_lite: CSE RO boot. HybridStorageMode disabled
541 05:03:10.169712 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 05:03:10.243734 FSPS returned 0
543 05:03:10.247134 Executing Phase 1 of FspMultiPhaseSiInit
544 05:03:10.257113 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 05:03:10.259887 port C0 DISC req: usage 1 usb3 1 usb2 5
546 05:03:10.263704 Raw Buffer output 0 00000511
547 05:03:10.266784 Raw Buffer output 1 00000000
548 05:03:10.270784 pmc_send_ipc_cmd succeeded
549 05:03:10.277150 port C1 DISC req: usage 1 usb3 2 usb2 3
550 05:03:10.277389 Raw Buffer output 0 00000321
551 05:03:10.280585 Raw Buffer output 1 00000000
552 05:03:10.284601 pmc_send_ipc_cmd succeeded
553 05:03:10.290069 Detected 4 core, 8 thread CPU.
554 05:03:10.293659 Detected 4 core, 8 thread CPU.
555 05:03:10.527361 Display FSP Version Info HOB
556 05:03:10.530968 Reference Code - CPU = a.0.4c.31
557 05:03:10.534189 uCode Version = 0.0.0.86
558 05:03:10.537047 TXT ACM version = ff.ff.ff.ffff
559 05:03:10.540442 Reference Code - ME = a.0.4c.31
560 05:03:10.543935 MEBx version = 0.0.0.0
561 05:03:10.547208 ME Firmware Version = Consumer SKU
562 05:03:10.550727 Reference Code - PCH = a.0.4c.31
563 05:03:10.553600 PCH-CRID Status = Disabled
564 05:03:10.557329 PCH-CRID Original Value = ff.ff.ff.ffff
565 05:03:10.560369 PCH-CRID New Value = ff.ff.ff.ffff
566 05:03:10.563539 OPROM - RST - RAID = ff.ff.ff.ffff
567 05:03:10.567099 PCH Hsio Version = 4.0.0.0
568 05:03:10.570392 Reference Code - SA - System Agent = a.0.4c.31
569 05:03:10.574216 Reference Code - MRC = 2.0.0.1
570 05:03:10.577098 SA - PCIe Version = a.0.4c.31
571 05:03:10.580358 SA-CRID Status = Disabled
572 05:03:10.583525 SA-CRID Original Value = 0.0.0.1
573 05:03:10.586903 SA-CRID New Value = 0.0.0.1
574 05:03:10.590398 OPROM - VBIOS = ff.ff.ff.ffff
575 05:03:10.593821 IO Manageability Engine FW Version = 11.1.4.0
576 05:03:10.597038 PHY Build Version = 0.0.0.e0
577 05:03:10.600458 Thunderbolt(TM) FW Version = 0.0.0.0
578 05:03:10.606946 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 05:03:10.610289 ITSS IRQ Polarities Before:
580 05:03:10.610744 IPC0: 0xffffffff
581 05:03:10.613244 IPC1: 0xffffffff
582 05:03:10.613732 IPC2: 0xffffffff
583 05:03:10.616535 IPC3: 0xffffffff
584 05:03:10.620342 ITSS IRQ Polarities After:
585 05:03:10.620838 IPC0: 0xffffffff
586 05:03:10.623431 IPC1: 0xffffffff
587 05:03:10.623927 IPC2: 0xffffffff
588 05:03:10.626861 IPC3: 0xffffffff
589 05:03:10.630422 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 05:03:10.643188 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 05:03:10.653286 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 05:03:10.666120 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 05:03:10.673187 BS: BS_DEV_INIT_CHIPS run times (exec / console): 324 / 236 ms
594 05:03:10.676600 Enumerating buses...
595 05:03:10.679720 Show all devs... Before device enumeration.
596 05:03:10.682635 Root Device: enabled 1
597 05:03:10.683088 DOMAIN: 0000: enabled 1
598 05:03:10.685984 CPU_CLUSTER: 0: enabled 1
599 05:03:10.689261 PCI: 00:00.0: enabled 1
600 05:03:10.692528 PCI: 00:02.0: enabled 1
601 05:03:10.692987 PCI: 00:04.0: enabled 1
602 05:03:10.696167 PCI: 00:05.0: enabled 1
603 05:03:10.699376 PCI: 00:06.0: enabled 0
604 05:03:10.702699 PCI: 00:07.0: enabled 0
605 05:03:10.703228 PCI: 00:07.1: enabled 0
606 05:03:10.706157 PCI: 00:07.2: enabled 0
607 05:03:10.709055 PCI: 00:07.3: enabled 0
608 05:03:10.712490 PCI: 00:08.0: enabled 1
609 05:03:10.712947 PCI: 00:09.0: enabled 0
610 05:03:10.715946 PCI: 00:0a.0: enabled 0
611 05:03:10.719113 PCI: 00:0d.0: enabled 1
612 05:03:10.722848 PCI: 00:0d.1: enabled 0
613 05:03:10.723302 PCI: 00:0d.2: enabled 0
614 05:03:10.726196 PCI: 00:0d.3: enabled 0
615 05:03:10.729485 PCI: 00:0e.0: enabled 0
616 05:03:10.732561 PCI: 00:10.2: enabled 1
617 05:03:10.733021 PCI: 00:10.6: enabled 0
618 05:03:10.735789 PCI: 00:10.7: enabled 0
619 05:03:10.739008 PCI: 00:12.0: enabled 0
620 05:03:10.739462 PCI: 00:12.6: enabled 0
621 05:03:10.742409 PCI: 00:13.0: enabled 0
622 05:03:10.745803 PCI: 00:14.0: enabled 1
623 05:03:10.748816 PCI: 00:14.1: enabled 0
624 05:03:10.749271 PCI: 00:14.2: enabled 1
625 05:03:10.752403 PCI: 00:14.3: enabled 1
626 05:03:10.755802 PCI: 00:15.0: enabled 1
627 05:03:10.759136 PCI: 00:15.1: enabled 1
628 05:03:10.759584 PCI: 00:15.2: enabled 1
629 05:03:10.762185 PCI: 00:15.3: enabled 1
630 05:03:10.765748 PCI: 00:16.0: enabled 1
631 05:03:10.769062 PCI: 00:16.1: enabled 0
632 05:03:10.769532 PCI: 00:16.2: enabled 0
633 05:03:10.772441 PCI: 00:16.3: enabled 0
634 05:03:10.775859 PCI: 00:16.4: enabled 0
635 05:03:10.778880 PCI: 00:16.5: enabled 0
636 05:03:10.779466 PCI: 00:17.0: enabled 1
637 05:03:10.782117 PCI: 00:19.0: enabled 0
638 05:03:10.785244 PCI: 00:19.1: enabled 1
639 05:03:10.788667 PCI: 00:19.2: enabled 0
640 05:03:10.789266 PCI: 00:1c.0: enabled 1
641 05:03:10.792121 PCI: 00:1c.1: enabled 0
642 05:03:10.795496 PCI: 00:1c.2: enabled 0
643 05:03:10.795965 PCI: 00:1c.3: enabled 0
644 05:03:10.798614 PCI: 00:1c.4: enabled 0
645 05:03:10.802279 PCI: 00:1c.5: enabled 0
646 05:03:10.805328 PCI: 00:1c.6: enabled 1
647 05:03:10.805943 PCI: 00:1c.7: enabled 0
648 05:03:10.808661 PCI: 00:1d.0: enabled 1
649 05:03:10.811916 PCI: 00:1d.1: enabled 0
650 05:03:10.815602 PCI: 00:1d.2: enabled 1
651 05:03:10.816191 PCI: 00:1d.3: enabled 0
652 05:03:10.818381 PCI: 00:1e.0: enabled 1
653 05:03:10.821745 PCI: 00:1e.1: enabled 0
654 05:03:10.825125 PCI: 00:1e.2: enabled 1
655 05:03:10.825682 PCI: 00:1e.3: enabled 1
656 05:03:10.828748 PCI: 00:1f.0: enabled 1
657 05:03:10.831540 PCI: 00:1f.1: enabled 0
658 05:03:10.835145 PCI: 00:1f.2: enabled 1
659 05:03:10.835384 PCI: 00:1f.3: enabled 1
660 05:03:10.838000 PCI: 00:1f.4: enabled 0
661 05:03:10.841688 PCI: 00:1f.5: enabled 1
662 05:03:10.841961 PCI: 00:1f.6: enabled 0
663 05:03:10.845040 PCI: 00:1f.7: enabled 0
664 05:03:10.848330 APIC: 00: enabled 1
665 05:03:10.851276 GENERIC: 0.0: enabled 1
666 05:03:10.851537 GENERIC: 0.0: enabled 1
667 05:03:10.854820 GENERIC: 1.0: enabled 1
668 05:03:10.858060 GENERIC: 0.0: enabled 1
669 05:03:10.861350 GENERIC: 1.0: enabled 1
670 05:03:10.861610 USB0 port 0: enabled 1
671 05:03:10.864548 GENERIC: 0.0: enabled 1
672 05:03:10.867764 USB0 port 0: enabled 1
673 05:03:10.867963 GENERIC: 0.0: enabled 1
674 05:03:10.871179 I2C: 00:1a: enabled 1
675 05:03:10.874693 I2C: 00:31: enabled 1
676 05:03:10.874890 I2C: 00:32: enabled 1
677 05:03:10.878329 I2C: 00:10: enabled 1
678 05:03:10.881189 I2C: 00:15: enabled 1
679 05:03:10.884519 GENERIC: 0.0: enabled 0
680 05:03:10.884766 GENERIC: 1.0: enabled 0
681 05:03:10.887939 GENERIC: 0.0: enabled 1
682 05:03:10.891202 SPI: 00: enabled 1
683 05:03:10.891400 SPI: 00: enabled 1
684 05:03:10.894442 PNP: 0c09.0: enabled 1
685 05:03:10.897667 GENERIC: 0.0: enabled 1
686 05:03:10.897864 USB3 port 0: enabled 1
687 05:03:10.901494 USB3 port 1: enabled 1
688 05:03:10.904334 USB3 port 2: enabled 0
689 05:03:10.908077 USB3 port 3: enabled 0
690 05:03:10.908545 USB2 port 0: enabled 0
691 05:03:10.911369 USB2 port 1: enabled 1
692 05:03:10.914231 USB2 port 2: enabled 1
693 05:03:10.914684 USB2 port 3: enabled 0
694 05:03:10.917566 USB2 port 4: enabled 1
695 05:03:10.921085 USB2 port 5: enabled 0
696 05:03:10.921540 USB2 port 6: enabled 0
697 05:03:10.924666 USB2 port 7: enabled 0
698 05:03:10.927771 USB2 port 8: enabled 0
699 05:03:10.930705 USB2 port 9: enabled 0
700 05:03:10.931161 USB3 port 0: enabled 0
701 05:03:10.934106 USB3 port 1: enabled 1
702 05:03:10.937293 USB3 port 2: enabled 0
703 05:03:10.937749 USB3 port 3: enabled 0
704 05:03:10.940532 GENERIC: 0.0: enabled 1
705 05:03:10.944444 GENERIC: 1.0: enabled 1
706 05:03:10.947826 APIC: 01: enabled 1
707 05:03:10.948283 APIC: 07: enabled 1
708 05:03:10.950989 APIC: 02: enabled 1
709 05:03:10.951314 APIC: 04: enabled 1
710 05:03:10.953755 APIC: 06: enabled 1
711 05:03:10.957087 APIC: 03: enabled 1
712 05:03:10.957433 APIC: 05: enabled 1
713 05:03:10.960437 Compare with tree...
714 05:03:10.963805 Root Device: enabled 1
715 05:03:10.964203 DOMAIN: 0000: enabled 1
716 05:03:10.967234 PCI: 00:00.0: enabled 1
717 05:03:10.970592 PCI: 00:02.0: enabled 1
718 05:03:10.974115 PCI: 00:04.0: enabled 1
719 05:03:10.977423 GENERIC: 0.0: enabled 1
720 05:03:10.977825 PCI: 00:05.0: enabled 1
721 05:03:10.980762 PCI: 00:06.0: enabled 0
722 05:03:10.984050 PCI: 00:07.0: enabled 0
723 05:03:10.987096 GENERIC: 0.0: enabled 1
724 05:03:10.990436 PCI: 00:07.1: enabled 0
725 05:03:10.990763 GENERIC: 1.0: enabled 1
726 05:03:10.993677 PCI: 00:07.2: enabled 0
727 05:03:10.996856 GENERIC: 0.0: enabled 1
728 05:03:11.000283 PCI: 00:07.3: enabled 0
729 05:03:11.004040 GENERIC: 1.0: enabled 1
730 05:03:11.007580 PCI: 00:08.0: enabled 1
731 05:03:11.008038 PCI: 00:09.0: enabled 0
732 05:03:11.010310 PCI: 00:0a.0: enabled 0
733 05:03:11.013852 PCI: 00:0d.0: enabled 1
734 05:03:11.016589 USB0 port 0: enabled 1
735 05:03:11.019991 USB3 port 0: enabled 1
736 05:03:11.020311 USB3 port 1: enabled 1
737 05:03:11.023288 USB3 port 2: enabled 0
738 05:03:11.026545 USB3 port 3: enabled 0
739 05:03:11.029611 PCI: 00:0d.1: enabled 0
740 05:03:11.033414 PCI: 00:0d.2: enabled 0
741 05:03:11.033885 GENERIC: 0.0: enabled 1
742 05:03:11.036501 PCI: 00:0d.3: enabled 0
743 05:03:11.040021 PCI: 00:0e.0: enabled 0
744 05:03:11.043419 PCI: 00:10.2: enabled 1
745 05:03:11.046518 PCI: 00:10.6: enabled 0
746 05:03:11.046970 PCI: 00:10.7: enabled 0
747 05:03:11.050103 PCI: 00:12.0: enabled 0
748 05:03:11.053324 PCI: 00:12.6: enabled 0
749 05:03:11.056590 PCI: 00:13.0: enabled 0
750 05:03:11.059738 PCI: 00:14.0: enabled 1
751 05:03:11.060193 USB0 port 0: enabled 1
752 05:03:11.063057 USB2 port 0: enabled 0
753 05:03:11.066422 USB2 port 1: enabled 1
754 05:03:11.069721 USB2 port 2: enabled 1
755 05:03:11.073177 USB2 port 3: enabled 0
756 05:03:11.076424 USB2 port 4: enabled 1
757 05:03:11.076881 USB2 port 5: enabled 0
758 05:03:11.079755 USB2 port 6: enabled 0
759 05:03:11.083403 USB2 port 7: enabled 0
760 05:03:11.086481 USB2 port 8: enabled 0
761 05:03:11.089714 USB2 port 9: enabled 0
762 05:03:11.092998 USB3 port 0: enabled 0
763 05:03:11.093460 USB3 port 1: enabled 1
764 05:03:11.096221 USB3 port 2: enabled 0
765 05:03:11.099573 USB3 port 3: enabled 0
766 05:03:11.102885 PCI: 00:14.1: enabled 0
767 05:03:11.106246 PCI: 00:14.2: enabled 1
768 05:03:11.106970 PCI: 00:14.3: enabled 1
769 05:03:11.109473 GENERIC: 0.0: enabled 1
770 05:03:11.112844 PCI: 00:15.0: enabled 1
771 05:03:11.116548 I2C: 00:1a: enabled 1
772 05:03:11.119446 I2C: 00:31: enabled 1
773 05:03:11.119934 I2C: 00:32: enabled 1
774 05:03:11.122691 PCI: 00:15.1: enabled 1
775 05:03:11.126054 I2C: 00:10: enabled 1
776 05:03:11.129171 PCI: 00:15.2: enabled 1
777 05:03:11.132392 PCI: 00:15.3: enabled 1
778 05:03:11.132816 PCI: 00:16.0: enabled 1
779 05:03:11.135740 PCI: 00:16.1: enabled 0
780 05:03:11.139119 PCI: 00:16.2: enabled 0
781 05:03:11.142358 PCI: 00:16.3: enabled 0
782 05:03:11.142715 PCI: 00:16.4: enabled 0
783 05:03:11.146215 PCI: 00:16.5: enabled 0
784 05:03:11.149069 PCI: 00:17.0: enabled 1
785 05:03:11.152812 PCI: 00:19.0: enabled 0
786 05:03:11.153178 PCI: 00:19.1: enabled 1
787 05:03:11.156360 I2C: 00:15: enabled 1
788 05:03:11.159770 PCI: 00:19.2: enabled 0
789 05:03:11.163179 PCI: 00:1d.0: enabled 1
790 05:03:11.166376 GENERIC: 0.0: enabled 1
791 05:03:11.166711 PCI: 00:1e.0: enabled 1
792 05:03:11.216508 PCI: 00:1e.1: enabled 0
793 05:03:11.216994 PCI: 00:1e.2: enabled 1
794 05:03:11.217448 SPI: 00: enabled 1
795 05:03:11.217875 PCI: 00:1e.3: enabled 1
796 05:03:11.218302 SPI: 00: enabled 1
797 05:03:11.219088 PCI: 00:1f.0: enabled 1
798 05:03:11.219474 PNP: 0c09.0: enabled 1
799 05:03:11.219932 PCI: 00:1f.1: enabled 0
800 05:03:11.220355 PCI: 00:1f.2: enabled 1
801 05:03:11.220757 GENERIC: 0.0: enabled 1
802 05:03:11.221156 GENERIC: 0.0: enabled 1
803 05:03:11.221549 GENERIC: 1.0: enabled 1
804 05:03:11.221940 PCI: 00:1f.3: enabled 1
805 05:03:11.222328 PCI: 00:1f.4: enabled 0
806 05:03:11.222717 PCI: 00:1f.5: enabled 1
807 05:03:11.223105 PCI: 00:1f.6: enabled 0
808 05:03:11.223862 PCI: 00:1f.7: enabled 0
809 05:03:11.224232 CPU_CLUSTER: 0: enabled 1
810 05:03:11.224644 APIC: 00: enabled 1
811 05:03:11.268452 APIC: 01: enabled 1
812 05:03:11.268978 APIC: 07: enabled 1
813 05:03:11.269468 APIC: 02: enabled 1
814 05:03:11.270247 APIC: 04: enabled 1
815 05:03:11.270641 APIC: 06: enabled 1
816 05:03:11.271083 APIC: 03: enabled 1
817 05:03:11.271513 APIC: 05: enabled 1
818 05:03:11.271961 Root Device scanning...
819 05:03:11.272396 scan_static_bus for Root Device
820 05:03:11.272805 DOMAIN: 0000 enabled
821 05:03:11.273217 CPU_CLUSTER: 0 enabled
822 05:03:11.273633 DOMAIN: 0000 scanning...
823 05:03:11.274028 PCI: pci_scan_bus for bus 00
824 05:03:11.274788 PCI: 00:00.0 [8086/0000] ops
825 05:03:11.275172 PCI: 00:00.0 [8086/9a12] enabled
826 05:03:11.275578 PCI: 00:02.0 [8086/0000] bus ops
827 05:03:11.276011 PCI: 00:02.0 [8086/9a40] enabled
828 05:03:11.276408 PCI: 00:04.0 [8086/0000] bus ops
829 05:03:11.318521 PCI: 00:04.0 [8086/9a03] enabled
830 05:03:11.319051 PCI: 00:05.0 [8086/9a19] enabled
831 05:03:11.319898 PCI: 00:07.0 [0000/0000] hidden
832 05:03:11.320303 PCI: 00:08.0 [8086/9a11] enabled
833 05:03:11.320733 PCI: 00:0a.0 [8086/9a0d] disabled
834 05:03:11.321146 PCI: 00:0d.0 [8086/0000] bus ops
835 05:03:11.321554 PCI: 00:0d.0 [8086/9a13] enabled
836 05:03:11.321951 PCI: 00:14.0 [8086/0000] bus ops
837 05:03:11.322704 PCI: 00:14.0 [8086/a0ed] enabled
838 05:03:11.323076 PCI: 00:14.2 [8086/a0ef] enabled
839 05:03:11.323483 PCI: 00:14.3 [8086/0000] bus ops
840 05:03:11.323927 PCI: 00:14.3 [8086/a0f0] enabled
841 05:03:11.324327 PCI: 00:15.0 [8086/0000] bus ops
842 05:03:11.324731 PCI: 00:15.0 [8086/a0e8] enabled
843 05:03:11.325147 PCI: 00:15.1 [8086/0000] bus ops
844 05:03:11.338037 PCI: 00:15.1 [8086/a0e9] enabled
845 05:03:11.338498 PCI: 00:15.2 [8086/0000] bus ops
846 05:03:11.338856 PCI: 00:15.2 [8086/a0ea] enabled
847 05:03:11.339191 PCI: 00:15.3 [8086/0000] bus ops
848 05:03:11.339512 PCI: 00:15.3 [8086/a0eb] enabled
849 05:03:11.339859 PCI: 00:16.0 [8086/0000] ops
850 05:03:11.341176 PCI: 00:16.0 [8086/a0e0] enabled
851 05:03:11.344672 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 05:03:11.347976 PCI: 00:19.0 [8086/0000] bus ops
853 05:03:11.351342 PCI: 00:19.0 [8086/a0c5] disabled
854 05:03:11.354743 PCI: 00:19.1 [8086/0000] bus ops
855 05:03:11.357997 PCI: 00:19.1 [8086/a0c6] enabled
856 05:03:11.361393 PCI: 00:1d.0 [8086/0000] bus ops
857 05:03:11.364212 PCI: 00:1d.0 [8086/a0b0] enabled
858 05:03:11.367769 PCI: 00:1e.0 [8086/0000] ops
859 05:03:11.370569 PCI: 00:1e.0 [8086/a0a8] enabled
860 05:03:11.374407 PCI: 00:1e.2 [8086/0000] bus ops
861 05:03:11.377656 PCI: 00:1e.2 [8086/a0aa] enabled
862 05:03:11.380726 PCI: 00:1e.3 [8086/0000] bus ops
863 05:03:11.384155 PCI: 00:1e.3 [8086/a0ab] enabled
864 05:03:11.387000 PCI: 00:1f.0 [8086/0000] bus ops
865 05:03:11.390453 PCI: 00:1f.0 [8086/a087] enabled
866 05:03:11.393673 RTC Init
867 05:03:11.397031 Set power on after power failure.
868 05:03:11.397353 Disabling Deep S3
869 05:03:11.400462 Disabling Deep S3
870 05:03:11.403762 Disabling Deep S4
871 05:03:11.404115 Disabling Deep S4
872 05:03:11.406934 Disabling Deep S5
873 05:03:11.407345 Disabling Deep S5
874 05:03:11.410355 PCI: 00:1f.2 [0000/0000] hidden
875 05:03:11.413754 PCI: 00:1f.3 [8086/0000] bus ops
876 05:03:11.416822 PCI: 00:1f.3 [8086/a0c8] enabled
877 05:03:11.420589 PCI: 00:1f.5 [8086/0000] bus ops
878 05:03:11.423654 PCI: 00:1f.5 [8086/a0a4] enabled
879 05:03:11.426900 PCI: Leftover static devices:
880 05:03:11.430074 PCI: 00:10.2
881 05:03:11.430502 PCI: 00:10.6
882 05:03:11.430848 PCI: 00:10.7
883 05:03:11.433535 PCI: 00:06.0
884 05:03:11.434001 PCI: 00:07.1
885 05:03:11.436803 PCI: 00:07.2
886 05:03:11.437281 PCI: 00:07.3
887 05:03:11.440011 PCI: 00:09.0
888 05:03:11.440480 PCI: 00:0d.1
889 05:03:11.440846 PCI: 00:0d.2
890 05:03:11.443538 PCI: 00:0d.3
891 05:03:11.444164 PCI: 00:0e.0
892 05:03:11.446763 PCI: 00:12.0
893 05:03:11.447211 PCI: 00:12.6
894 05:03:11.447586 PCI: 00:13.0
895 05:03:11.450495 PCI: 00:14.1
896 05:03:11.451050 PCI: 00:16.1
897 05:03:11.453351 PCI: 00:16.2
898 05:03:11.453799 PCI: 00:16.3
899 05:03:11.456713 PCI: 00:16.4
900 05:03:11.457357 PCI: 00:16.5
901 05:03:11.457733 PCI: 00:17.0
902 05:03:11.460099 PCI: 00:19.2
903 05:03:11.460546 PCI: 00:1e.1
904 05:03:11.463638 PCI: 00:1f.1
905 05:03:11.464114 PCI: 00:1f.4
906 05:03:11.464639 PCI: 00:1f.6
907 05:03:11.466654 PCI: 00:1f.7
908 05:03:11.469442 PCI: Check your devicetree.cb.
909 05:03:11.473015 PCI: 00:02.0 scanning...
910 05:03:11.476572 scan_generic_bus for PCI: 00:02.0
911 05:03:11.479802 scan_generic_bus for PCI: 00:02.0 done
912 05:03:11.483060 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 05:03:11.486606 PCI: 00:04.0 scanning...
914 05:03:11.489717 scan_generic_bus for PCI: 00:04.0
915 05:03:11.492909 GENERIC: 0.0 enabled
916 05:03:11.499361 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 05:03:11.502606 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 05:03:11.505913 PCI: 00:0d.0 scanning...
919 05:03:11.509256 scan_static_bus for PCI: 00:0d.0
920 05:03:11.512657 USB0 port 0 enabled
921 05:03:11.512857 USB0 port 0 scanning...
922 05:03:11.515885 scan_static_bus for USB0 port 0
923 05:03:11.519185 USB3 port 0 enabled
924 05:03:11.522763 USB3 port 1 enabled
925 05:03:11.522902 USB3 port 2 disabled
926 05:03:11.525496 USB3 port 3 disabled
927 05:03:11.528879 USB3 port 0 scanning...
928 05:03:11.532969 scan_static_bus for USB3 port 0
929 05:03:11.536011 scan_static_bus for USB3 port 0 done
930 05:03:11.539299 scan_bus: bus USB3 port 0 finished in 6 msecs
931 05:03:11.542576 USB3 port 1 scanning...
932 05:03:11.545813 scan_static_bus for USB3 port 1
933 05:03:11.549009 scan_static_bus for USB3 port 1 done
934 05:03:11.555578 scan_bus: bus USB3 port 1 finished in 6 msecs
935 05:03:11.559128 scan_static_bus for USB0 port 0 done
936 05:03:11.562522 scan_bus: bus USB0 port 0 finished in 43 msecs
937 05:03:11.565792 scan_static_bus for PCI: 00:0d.0 done
938 05:03:11.572310 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 05:03:11.572810 PCI: 00:14.0 scanning...
940 05:03:11.575639 scan_static_bus for PCI: 00:14.0
941 05:03:11.578939 USB0 port 0 enabled
942 05:03:11.582085 USB0 port 0 scanning...
943 05:03:11.585377 scan_static_bus for USB0 port 0
944 05:03:11.588675 USB2 port 0 disabled
945 05:03:11.589128 USB2 port 1 enabled
946 05:03:11.592599 USB2 port 2 enabled
947 05:03:11.593049 USB2 port 3 disabled
948 05:03:11.595326 USB2 port 4 enabled
949 05:03:11.598804 USB2 port 5 disabled
950 05:03:11.599257 USB2 port 6 disabled
951 05:03:11.602069 USB2 port 7 disabled
952 05:03:11.605361 USB2 port 8 disabled
953 05:03:11.605812 USB2 port 9 disabled
954 05:03:11.608674 USB3 port 0 disabled
955 05:03:11.611932 USB3 port 1 enabled
956 05:03:11.612387 USB3 port 2 disabled
957 05:03:11.615401 USB3 port 3 disabled
958 05:03:11.618562 USB2 port 1 scanning...
959 05:03:11.621582 scan_static_bus for USB2 port 1
960 05:03:11.624915 scan_static_bus for USB2 port 1 done
961 05:03:11.628283 scan_bus: bus USB2 port 1 finished in 6 msecs
962 05:03:11.631582 USB2 port 2 scanning...
963 05:03:11.635068 scan_static_bus for USB2 port 2
964 05:03:11.638446 scan_static_bus for USB2 port 2 done
965 05:03:11.644680 scan_bus: bus USB2 port 2 finished in 6 msecs
966 05:03:11.645131 USB2 port 4 scanning...
967 05:03:11.648146 scan_static_bus for USB2 port 4
968 05:03:11.651265 scan_static_bus for USB2 port 4 done
969 05:03:11.657858 scan_bus: bus USB2 port 4 finished in 6 msecs
970 05:03:11.661141 USB3 port 1 scanning...
971 05:03:11.664545 scan_static_bus for USB3 port 1
972 05:03:11.667814 scan_static_bus for USB3 port 1 done
973 05:03:11.671143 scan_bus: bus USB3 port 1 finished in 6 msecs
974 05:03:11.674434 scan_static_bus for USB0 port 0 done
975 05:03:11.681280 scan_bus: bus USB0 port 0 finished in 93 msecs
976 05:03:11.684498 scan_static_bus for PCI: 00:14.0 done
977 05:03:11.688052 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
978 05:03:11.691155 PCI: 00:14.3 scanning...
979 05:03:11.694559 scan_static_bus for PCI: 00:14.3
980 05:03:11.697605 GENERIC: 0.0 enabled
981 05:03:11.701291 scan_static_bus for PCI: 00:14.3 done
982 05:03:11.704415 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 05:03:11.707417 PCI: 00:15.0 scanning...
984 05:03:11.710782 scan_static_bus for PCI: 00:15.0
985 05:03:11.714120 I2C: 00:1a enabled
986 05:03:11.714695 I2C: 00:31 enabled
987 05:03:11.717364 I2C: 00:32 enabled
988 05:03:11.720601 scan_static_bus for PCI: 00:15.0 done
989 05:03:11.727772 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
990 05:03:11.728352 PCI: 00:15.1 scanning...
991 05:03:11.731230 scan_static_bus for PCI: 00:15.1
992 05:03:11.734648 I2C: 00:10 enabled
993 05:03:11.737889 scan_static_bus for PCI: 00:15.1 done
994 05:03:11.741376 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 05:03:11.744483 PCI: 00:15.2 scanning...
996 05:03:11.747605 scan_static_bus for PCI: 00:15.2
997 05:03:11.750946 scan_static_bus for PCI: 00:15.2 done
998 05:03:11.757440 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 05:03:11.760908 PCI: 00:15.3 scanning...
1000 05:03:11.764112 scan_static_bus for PCI: 00:15.3
1001 05:03:11.767469 scan_static_bus for PCI: 00:15.3 done
1002 05:03:11.770826 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 05:03:11.773762 PCI: 00:19.1 scanning...
1004 05:03:11.777211 scan_static_bus for PCI: 00:19.1
1005 05:03:11.780231 I2C: 00:15 enabled
1006 05:03:11.783700 scan_static_bus for PCI: 00:19.1 done
1007 05:03:11.787021 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 05:03:11.790458 PCI: 00:1d.0 scanning...
1009 05:03:11.793839 do_pci_scan_bridge for PCI: 00:1d.0
1010 05:03:11.796978 PCI: pci_scan_bus for bus 01
1011 05:03:11.800227 PCI: 01:00.0 [1c5c/174a] enabled
1012 05:03:11.803506 GENERIC: 0.0 enabled
1013 05:03:11.807161 Enabling Common Clock Configuration
1014 05:03:11.809988 L1 Sub-State supported from root port 29
1015 05:03:11.813607 L1 Sub-State Support = 0xf
1016 05:03:11.816499 CommonModeRestoreTime = 0x28
1017 05:03:11.820438 Power On Value = 0x16, Power On Scale = 0x0
1018 05:03:11.823188 ASPM: Enabled L1
1019 05:03:11.826563 PCIe: Max_Payload_Size adjusted to 128
1020 05:03:11.833320 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 05:03:11.833517 PCI: 00:1e.2 scanning...
1022 05:03:11.836630 scan_generic_bus for PCI: 00:1e.2
1023 05:03:11.839864 SPI: 00 enabled
1024 05:03:11.846286 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 05:03:11.849911 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 05:03:11.853260 PCI: 00:1e.3 scanning...
1027 05:03:11.856453 scan_generic_bus for PCI: 00:1e.3
1028 05:03:11.859510 SPI: 00 enabled
1029 05:03:11.862773 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 05:03:11.869292 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 05:03:11.872549 PCI: 00:1f.0 scanning...
1032 05:03:11.875788 scan_static_bus for PCI: 00:1f.0
1033 05:03:11.875953 PNP: 0c09.0 enabled
1034 05:03:11.879336 PNP: 0c09.0 scanning...
1035 05:03:11.882592 scan_static_bus for PNP: 0c09.0
1036 05:03:11.885907 scan_static_bus for PNP: 0c09.0 done
1037 05:03:11.892194 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 05:03:11.895656 scan_static_bus for PCI: 00:1f.0 done
1039 05:03:11.899271 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 05:03:11.902220 PCI: 00:1f.2 scanning...
1041 05:03:11.905561 scan_static_bus for PCI: 00:1f.2
1042 05:03:11.908932 GENERIC: 0.0 enabled
1043 05:03:11.911921 GENERIC: 0.0 scanning...
1044 05:03:11.914999 scan_static_bus for GENERIC: 0.0
1045 05:03:11.915142 GENERIC: 0.0 enabled
1046 05:03:11.918283 GENERIC: 1.0 enabled
1047 05:03:11.922247 scan_static_bus for GENERIC: 0.0 done
1048 05:03:11.928789 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 05:03:11.931591 scan_static_bus for PCI: 00:1f.2 done
1050 05:03:11.935006 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 05:03:11.938372 PCI: 00:1f.3 scanning...
1052 05:03:11.941521 scan_static_bus for PCI: 00:1f.3
1053 05:03:11.945374 scan_static_bus for PCI: 00:1f.3 done
1054 05:03:11.951231 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 05:03:11.951335 PCI: 00:1f.5 scanning...
1056 05:03:11.958013 scan_generic_bus for PCI: 00:1f.5
1057 05:03:11.961493 scan_generic_bus for PCI: 00:1f.5 done
1058 05:03:11.965009 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 05:03:11.971204 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 05:03:11.974400 scan_static_bus for Root Device done
1061 05:03:11.977612 scan_bus: bus Root Device finished in 736 msecs
1062 05:03:11.980904 done
1063 05:03:11.984107 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 05:03:11.987730 Chrome EC: UHEPI supported
1065 05:03:11.994415 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 05:03:12.001100 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 05:03:12.003942 SPI flash protection: WPSW=0 SRP0=0
1068 05:03:12.010966 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 05:03:12.014267 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 05:03:12.017263 found VGA at PCI: 00:02.0
1071 05:03:12.020682 Setting up VGA for PCI: 00:02.0
1072 05:03:12.027529 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 05:03:12.030722 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 05:03:12.034093 Allocating resources...
1075 05:03:12.037861 Reading resources...
1076 05:03:12.040502 Root Device read_resources bus 0 link: 0
1077 05:03:12.043967 DOMAIN: 0000 read_resources bus 0 link: 0
1078 05:03:12.050497 PCI: 00:04.0 read_resources bus 1 link: 0
1079 05:03:12.053720 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 05:03:12.060537 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 05:03:12.063847 USB0 port 0 read_resources bus 0 link: 0
1082 05:03:12.070664 USB0 port 0 read_resources bus 0 link: 0 done
1083 05:03:12.073452 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 05:03:12.080110 PCI: 00:14.0 read_resources bus 0 link: 0
1085 05:03:12.083570 USB0 port 0 read_resources bus 0 link: 0
1086 05:03:12.090234 USB0 port 0 read_resources bus 0 link: 0 done
1087 05:03:12.093481 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 05:03:12.100427 PCI: 00:14.3 read_resources bus 0 link: 0
1089 05:03:12.103215 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 05:03:12.109859 PCI: 00:15.0 read_resources bus 0 link: 0
1091 05:03:12.113115 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 05:03:12.119640 PCI: 00:15.1 read_resources bus 0 link: 0
1093 05:03:12.122984 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 05:03:12.129976 PCI: 00:19.1 read_resources bus 0 link: 0
1095 05:03:12.133366 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 05:03:12.140125 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 05:03:12.142826 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 05:03:12.150120 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 05:03:12.153369 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 05:03:12.159979 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 05:03:12.163355 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 05:03:12.170228 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 05:03:12.173091 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 05:03:12.179831 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 05:03:12.182831 GENERIC: 0.0 read_resources bus 0 link: 0
1106 05:03:12.189626 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 05:03:12.193072 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 05:03:12.198972 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 05:03:12.202421 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 05:03:12.208981 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 05:03:12.212558 Root Device read_resources bus 0 link: 0 done
1112 05:03:12.215881 Done reading resources.
1113 05:03:12.222432 Show resources in subtree (Root Device)...After reading.
1114 05:03:12.226040 Root Device child on link 0 DOMAIN: 0000
1115 05:03:12.228775 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 05:03:12.238896 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 05:03:12.248501 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 05:03:12.251753 PCI: 00:00.0
1119 05:03:12.261905 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 05:03:12.268621 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 05:03:12.278400 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 05:03:12.288498 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 05:03:12.298170 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 05:03:12.308271 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 05:03:12.314855 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 05:03:12.324864 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 05:03:12.335104 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 05:03:12.345260 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 05:03:12.354644 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 05:03:12.364489 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 05:03:12.371411 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 05:03:12.381068 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 05:03:12.391489 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 05:03:12.401332 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 05:03:12.410951 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 05:03:12.420955 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 05:03:12.427661 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 05:03:12.437730 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 05:03:12.441156 PCI: 00:02.0
1140 05:03:12.450804 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 05:03:12.461000 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 05:03:12.470727 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 05:03:12.473984 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 05:03:12.484232 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 05:03:12.487393 GENERIC: 0.0
1146 05:03:12.487482 PCI: 00:05.0
1147 05:03:12.497082 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 05:03:12.503735 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 05:03:12.503824 GENERIC: 0.0
1150 05:03:12.507202 PCI: 00:08.0
1151 05:03:12.517298 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 05:03:12.517390 PCI: 00:0a.0
1153 05:03:12.520492 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 05:03:12.530794 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 05:03:12.536917 USB0 port 0 child on link 0 USB3 port 0
1156 05:03:12.537004 USB3 port 0
1157 05:03:12.540383 USB3 port 1
1158 05:03:12.540469 USB3 port 2
1159 05:03:12.543681 USB3 port 3
1160 05:03:12.547240 PCI: 00:14.0 child on link 0 USB0 port 0
1161 05:03:12.556621 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 05:03:12.563127 USB0 port 0 child on link 0 USB2 port 0
1163 05:03:12.563213 USB2 port 0
1164 05:03:12.566920 USB2 port 1
1165 05:03:12.567008 USB2 port 2
1166 05:03:12.569707 USB2 port 3
1167 05:03:12.569793 USB2 port 4
1168 05:03:12.572951 USB2 port 5
1169 05:03:12.573037 USB2 port 6
1170 05:03:12.576179 USB2 port 7
1171 05:03:12.579983 USB2 port 8
1172 05:03:12.580068 USB2 port 9
1173 05:03:12.583290 USB3 port 0
1174 05:03:12.583375 USB3 port 1
1175 05:03:12.586329 USB3 port 2
1176 05:03:12.586415 USB3 port 3
1177 05:03:12.589890 PCI: 00:14.2
1178 05:03:12.599377 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 05:03:12.609613 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 05:03:12.612938 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 05:03:12.622592 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 05:03:12.625858 GENERIC: 0.0
1183 05:03:12.629065 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 05:03:12.639015 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 05:03:12.639103 I2C: 00:1a
1186 05:03:12.642520 I2C: 00:31
1187 05:03:12.642607 I2C: 00:32
1188 05:03:12.649348 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 05:03:12.658932 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 05:03:12.659025 I2C: 00:10
1191 05:03:12.662298 PCI: 00:15.2
1192 05:03:12.672238 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 05:03:12.672329 PCI: 00:15.3
1194 05:03:12.682086 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 05:03:12.685433 PCI: 00:16.0
1196 05:03:12.695510 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 05:03:12.695600 PCI: 00:19.0
1198 05:03:12.698816 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 05:03:12.708772 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 05:03:12.711941 I2C: 00:15
1201 05:03:12.715473 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 05:03:12.724853 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 05:03:12.734744 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 05:03:12.744842 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 05:03:12.744932 GENERIC: 0.0
1206 05:03:12.748593 PCI: 01:00.0
1207 05:03:12.758041 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 05:03:12.768183 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 05:03:12.774557 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 05:03:12.777876 PCI: 00:1e.0
1211 05:03:12.787685 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 05:03:12.790941 PCI: 00:1e.2 child on link 0 SPI: 00
1213 05:03:12.801025 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 05:03:12.804721 SPI: 00
1215 05:03:12.807860 PCI: 00:1e.3 child on link 0 SPI: 00
1216 05:03:12.817580 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 05:03:12.817668 SPI: 00
1218 05:03:12.824496 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 05:03:12.830811 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 05:03:12.834512 PNP: 0c09.0
1221 05:03:12.843985 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 05:03:12.847436 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 05:03:12.857326 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 05:03:12.867327 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 05:03:12.870852 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 05:03:12.873897 GENERIC: 0.0
1227 05:03:12.873985 GENERIC: 1.0
1228 05:03:12.877168 PCI: 00:1f.3
1229 05:03:12.886963 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 05:03:12.897100 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 05:03:12.897189 PCI: 00:1f.5
1232 05:03:12.906718 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 05:03:12.909992 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 05:03:12.913144 APIC: 00
1235 05:03:12.913231 APIC: 01
1236 05:03:12.913302 APIC: 07
1237 05:03:12.916928 APIC: 02
1238 05:03:12.917015 APIC: 04
1239 05:03:12.919680 APIC: 06
1240 05:03:12.919789 APIC: 03
1241 05:03:12.919860 APIC: 05
1242 05:03:12.930203 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 05:03:12.932838 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 05:03:12.939796 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 05:03:12.946496 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 05:03:12.950076 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 05:03:12.956126 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 05:03:12.959467 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 05:03:12.966106 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 05:03:12.972616 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 05:03:12.983005 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 05:03:12.989729 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 05:03:12.995934 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 05:03:13.002542 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 05:03:13.009364 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 05:03:13.019313 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 05:03:13.022585 DOMAIN: 0000: Resource ranges:
1258 05:03:13.025876 * Base: 1000, Size: 800, Tag: 100
1259 05:03:13.029099 * Base: 1900, Size: e700, Tag: 100
1260 05:03:13.032281 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 05:03:13.039162 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 05:03:13.045286 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 05:03:13.055406 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 05:03:13.062213 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 05:03:13.068452 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 05:03:13.078522 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 05:03:13.085148 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 05:03:13.091648 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 05:03:13.101857 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 05:03:13.108622 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 05:03:13.114958 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 05:03:13.124945 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 05:03:13.131264 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 05:03:13.138072 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 05:03:13.147619 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 05:03:13.154275 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 05:03:13.161293 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 05:03:13.170895 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 05:03:13.178150 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 05:03:13.184123 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 05:03:13.194057 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 05:03:13.200854 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 05:03:13.207734 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 05:03:13.217598 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 05:03:13.220509 DOMAIN: 0000: Resource ranges:
1286 05:03:13.223820 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 05:03:13.227368 * Base: d0000000, Size: 28000000, Tag: 200
1288 05:03:13.233880 * Base: fa000000, Size: 1000000, Tag: 200
1289 05:03:13.237289 * Base: fb001000, Size: 2fff000, Tag: 200
1290 05:03:13.240697 * Base: fe010000, Size: 2e000, Tag: 200
1291 05:03:13.247459 * Base: fe03f000, Size: d41000, Tag: 200
1292 05:03:13.250245 * Base: fed88000, Size: 8000, Tag: 200
1293 05:03:13.253535 * Base: fed93000, Size: d000, Tag: 200
1294 05:03:13.256941 * Base: feda2000, Size: 1e000, Tag: 200
1295 05:03:13.260396 * Base: fede0000, Size: 1220000, Tag: 200
1296 05:03:13.266768 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 05:03:13.273484 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 05:03:13.280193 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 05:03:13.286777 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 05:03:13.293203 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 05:03:13.300365 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 05:03:13.306522 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 05:03:13.312971 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 05:03:13.319683 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 05:03:13.326772 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 05:03:13.332878 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 05:03:13.339887 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 05:03:13.346346 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 05:03:13.352599 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 05:03:13.359382 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 05:03:13.366120 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 05:03:13.372441 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 05:03:13.378963 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 05:03:13.386018 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 05:03:13.392414 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 05:03:13.399067 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 05:03:13.405848 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 05:03:13.412791 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 05:03:13.418840 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 05:03:13.428651 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 05:03:13.431998 PCI: 00:1d.0: Resource ranges:
1322 05:03:13.435315 * Base: 7fc00000, Size: 100000, Tag: 200
1323 05:03:13.442177 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 05:03:13.448775 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 05:03:13.455166 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 05:03:13.464901 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 05:03:13.471892 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 05:03:13.475443 Root Device assign_resources, bus 0 link: 0
1329 05:03:13.481937 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 05:03:13.488505 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 05:03:13.498304 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 05:03:13.504824 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 05:03:13.514454 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 05:03:13.517790 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 05:03:13.521115 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 05:03:13.531307 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 05:03:13.537611 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 05:03:13.547496 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 05:03:13.550833 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 05:03:13.557335 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 05:03:13.563893 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 05:03:13.570964 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 05:03:13.573875 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 05:03:13.583650 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 05:03:13.590553 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 05:03:13.597292 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 05:03:13.603926 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 05:03:13.607222 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 05:03:13.617128 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 05:03:13.620468 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 05:03:13.626806 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 05:03:13.633384 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 05:03:13.636606 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 05:03:13.643245 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 05:03:13.649964 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 05:03:13.659815 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 05:03:13.666170 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 05:03:13.676114 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 05:03:13.679637 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 05:03:13.685881 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 05:03:13.692823 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 05:03:13.702768 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 05:03:13.712464 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 05:03:13.715576 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 05:03:13.726033 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 05:03:13.732509 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 05:03:13.739316 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 05:03:13.745504 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 05:03:13.752085 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 05:03:13.758651 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 05:03:13.762174 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 05:03:13.771682 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 05:03:13.774992 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 05:03:13.781698 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 05:03:13.785271 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 05:03:13.789060 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 05:03:13.794924 LPC: Trying to open IO window from 800 size 1ff
1378 05:03:13.801561 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 05:03:13.811561 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 05:03:13.818324 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 05:03:13.824758 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 05:03:13.828129 Root Device assign_resources, bus 0 link: 0
1383 05:03:13.831760 Done setting resources.
1384 05:03:13.838383 Show resources in subtree (Root Device)...After assigning values.
1385 05:03:13.841094 Root Device child on link 0 DOMAIN: 0000
1386 05:03:13.848268 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 05:03:13.854417 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 05:03:13.864324 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 05:03:13.867747 PCI: 00:00.0
1390 05:03:13.877802 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 05:03:13.887319 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 05:03:13.894444 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 05:03:13.904285 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 05:03:13.913893 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 05:03:13.923898 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 05:03:13.933832 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 05:03:13.943578 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 05:03:13.950272 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 05:03:13.960291 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 05:03:13.970432 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 05:03:13.980122 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 05:03:13.990265 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 05:03:13.996942 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 05:03:14.006407 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 05:03:14.016821 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 05:03:14.027272 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 05:03:14.036450 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 05:03:14.046786 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 05:03:14.056125 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 05:03:14.056213 PCI: 00:02.0
1411 05:03:14.066669 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 05:03:14.079376 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 05:03:14.086135 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 05:03:14.092501 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 05:03:14.102330 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 05:03:14.105855 GENERIC: 0.0
1417 05:03:14.105945 PCI: 00:05.0
1418 05:03:14.115848 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 05:03:14.122103 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 05:03:14.122189 GENERIC: 0.0
1421 05:03:14.125979 PCI: 00:08.0
1422 05:03:14.135891 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 05:03:14.135984 PCI: 00:0a.0
1424 05:03:14.141900 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 05:03:14.151902 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 05:03:14.155425 USB0 port 0 child on link 0 USB3 port 0
1427 05:03:14.158819 USB3 port 0
1428 05:03:14.158907 USB3 port 1
1429 05:03:14.161647 USB3 port 2
1430 05:03:14.161734 USB3 port 3
1431 05:03:14.168457 PCI: 00:14.0 child on link 0 USB0 port 0
1432 05:03:14.178629 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 05:03:14.181702 USB0 port 0 child on link 0 USB2 port 0
1434 05:03:14.185025 USB2 port 0
1435 05:03:14.185112 USB2 port 1
1436 05:03:14.188376 USB2 port 2
1437 05:03:14.188464 USB2 port 3
1438 05:03:14.191954 USB2 port 4
1439 05:03:14.192042 USB2 port 5
1440 05:03:14.194759 USB2 port 6
1441 05:03:14.194846 USB2 port 7
1442 05:03:14.198371 USB2 port 8
1443 05:03:14.198458 USB2 port 9
1444 05:03:14.201573 USB3 port 0
1445 05:03:14.204811 USB3 port 1
1446 05:03:14.204901 USB3 port 2
1447 05:03:14.208086 USB3 port 3
1448 05:03:14.208174 PCI: 00:14.2
1449 05:03:14.217911 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 05:03:14.228105 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 05:03:14.234888 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 05:03:14.244526 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 05:03:14.244614 GENERIC: 0.0
1454 05:03:14.250945 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 05:03:14.261103 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 05:03:14.261195 I2C: 00:1a
1457 05:03:14.264479 I2C: 00:31
1458 05:03:14.264565 I2C: 00:32
1459 05:03:14.270662 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 05:03:14.281002 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 05:03:14.281093 I2C: 00:10
1462 05:03:14.284343 PCI: 00:15.2
1463 05:03:14.294053 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 05:03:14.294143 PCI: 00:15.3
1465 05:03:14.304304 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 05:03:14.307144 PCI: 00:16.0
1467 05:03:14.316958 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 05:03:14.320501 PCI: 00:19.0
1469 05:03:14.323607 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 05:03:14.334149 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 05:03:14.334239 I2C: 00:15
1472 05:03:14.340087 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 05:03:14.350119 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 05:03:14.360470 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 05:03:14.369934 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 05:03:14.374272 GENERIC: 0.0
1477 05:03:14.374360 PCI: 01:00.0
1478 05:03:14.386422 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 05:03:14.396498 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 05:03:14.406082 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 05:03:14.406173 PCI: 00:1e.0
1482 05:03:14.419680 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 05:03:14.422952 PCI: 00:1e.2 child on link 0 SPI: 00
1484 05:03:14.432990 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 05:03:14.433079 SPI: 00
1486 05:03:14.439375 PCI: 00:1e.3 child on link 0 SPI: 00
1487 05:03:14.449402 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 05:03:14.449497 SPI: 00
1489 05:03:14.455920 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 05:03:14.462862 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 05:03:14.465764 PNP: 0c09.0
1492 05:03:14.472299 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 05:03:14.478981 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 05:03:14.489828 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 05:03:14.495586 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 05:03:14.502034 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 05:03:14.502123 GENERIC: 0.0
1498 05:03:14.505627 GENERIC: 1.0
1499 05:03:14.505716 PCI: 00:1f.3
1500 05:03:14.515674 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 05:03:14.528565 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 05:03:14.528656 PCI: 00:1f.5
1503 05:03:14.538320 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 05:03:14.545174 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 05:03:14.545264 APIC: 00
1506 05:03:14.545352 APIC: 01
1507 05:03:14.548370 APIC: 07
1508 05:03:14.548458 APIC: 02
1509 05:03:14.551673 APIC: 04
1510 05:03:14.551796 APIC: 06
1511 05:03:14.551884 APIC: 03
1512 05:03:14.554871 APIC: 05
1513 05:03:14.554959 Done allocating resources.
1514 05:03:14.561574 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 05:03:14.568354 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 05:03:14.571269 Configure GPIOs for I2S audio on UP4.
1517 05:03:14.578949 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 05:03:14.582169 Enabling resources...
1519 05:03:14.585741 PCI: 00:00.0 subsystem <- 8086/9a12
1520 05:03:14.589506 PCI: 00:00.0 cmd <- 06
1521 05:03:14.592409 PCI: 00:02.0 subsystem <- 8086/9a40
1522 05:03:14.595680 PCI: 00:02.0 cmd <- 03
1523 05:03:14.599038 PCI: 00:04.0 subsystem <- 8086/9a03
1524 05:03:14.602223 PCI: 00:04.0 cmd <- 02
1525 05:03:14.605045 PCI: 00:05.0 subsystem <- 8086/9a19
1526 05:03:14.605134 PCI: 00:05.0 cmd <- 02
1527 05:03:14.612320 PCI: 00:08.0 subsystem <- 8086/9a11
1528 05:03:14.612409 PCI: 00:08.0 cmd <- 06
1529 05:03:14.615657 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 05:03:14.618876 PCI: 00:0d.0 cmd <- 02
1531 05:03:14.622276 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 05:03:14.625135 PCI: 00:14.0 cmd <- 02
1533 05:03:14.628455 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 05:03:14.631914 PCI: 00:14.2 cmd <- 02
1535 05:03:14.635357 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 05:03:14.638679 PCI: 00:14.3 cmd <- 02
1537 05:03:14.641732 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 05:03:14.644888 PCI: 00:15.0 cmd <- 02
1539 05:03:14.648293 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 05:03:14.651657 PCI: 00:15.1 cmd <- 02
1541 05:03:14.654982 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 05:03:14.655070 PCI: 00:15.2 cmd <- 02
1543 05:03:14.662258 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 05:03:14.662347 PCI: 00:15.3 cmd <- 02
1545 05:03:14.664988 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 05:03:14.668442 PCI: 00:16.0 cmd <- 02
1547 05:03:14.671662 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 05:03:14.674979 PCI: 00:19.1 cmd <- 02
1549 05:03:14.678320 PCI: 00:1d.0 bridge ctrl <- 0013
1550 05:03:14.681576 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 05:03:14.684901 PCI: 00:1d.0 cmd <- 06
1552 05:03:14.688306 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 05:03:14.691629 PCI: 00:1e.0 cmd <- 06
1554 05:03:14.694918 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 05:03:14.698382 PCI: 00:1e.2 cmd <- 06
1556 05:03:14.701653 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 05:03:14.704848 PCI: 00:1e.3 cmd <- 02
1558 05:03:14.708041 PCI: 00:1f.0 subsystem <- 8086/a087
1559 05:03:14.708130 PCI: 00:1f.0 cmd <- 407
1560 05:03:14.715061 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 05:03:14.715151 PCI: 00:1f.3 cmd <- 02
1562 05:03:14.718370 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 05:03:14.721644 PCI: 00:1f.5 cmd <- 406
1564 05:03:14.726647 PCI: 01:00.0 cmd <- 02
1565 05:03:14.730962 done.
1566 05:03:14.734335 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 05:03:14.737355 Initializing devices...
1568 05:03:14.740845 Root Device init
1569 05:03:14.744373 Chrome EC: Set SMI mask to 0x0000000000000000
1570 05:03:14.750928 Chrome EC: clear events_b mask to 0x0000000000000000
1571 05:03:14.757141 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 05:03:14.760470 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 05:03:14.767315 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 05:03:14.773818 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 05:03:14.777157 fw_config match found: DB_USB=USB3_ACTIVE
1576 05:03:14.783837 Configure Right Type-C port orientation for retimer
1577 05:03:14.787281 Root Device init finished in 42 msecs
1578 05:03:14.790540 PCI: 00:00.0 init
1579 05:03:14.793919 CPU TDP = 9 Watts
1580 05:03:14.794010 CPU PL1 = 9 Watts
1581 05:03:14.797198 CPU PL2 = 40 Watts
1582 05:03:14.797298 CPU PL4 = 83 Watts
1583 05:03:14.800126 PCI: 00:00.0 init finished in 8 msecs
1584 05:03:14.803556 PCI: 00:02.0 init
1585 05:03:14.807124 GMA: Found VBT in CBFS
1586 05:03:14.810634 GMA: Found valid VBT in CBFS
1587 05:03:14.813656 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 05:03:14.823562 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 05:03:14.826903 PCI: 00:02.0 init finished in 18 msecs
1590 05:03:14.830152 PCI: 00:05.0 init
1591 05:03:14.833508 PCI: 00:05.0 init finished in 0 msecs
1592 05:03:14.837059 PCI: 00:08.0 init
1593 05:03:14.840148 PCI: 00:08.0 init finished in 0 msecs
1594 05:03:14.843668 PCI: 00:14.0 init
1595 05:03:14.846723 PCI: 00:14.0 init finished in 0 msecs
1596 05:03:14.846812 PCI: 00:14.2 init
1597 05:03:14.849934 PCI: 00:14.2 init finished in 0 msecs
1598 05:03:14.853674 PCI: 00:15.0 init
1599 05:03:14.857135 I2C bus 0 version 0x3230302a
1600 05:03:14.860426 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 05:03:14.863735 PCI: 00:15.0 init finished in 6 msecs
1602 05:03:14.867028 PCI: 00:15.1 init
1603 05:03:14.870142 I2C bus 1 version 0x3230302a
1604 05:03:14.873589 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 05:03:14.876923 PCI: 00:15.1 init finished in 6 msecs
1606 05:03:14.880363 PCI: 00:15.2 init
1607 05:03:14.883660 I2C bus 2 version 0x3230302a
1608 05:03:14.886941 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 05:03:14.890434 PCI: 00:15.2 init finished in 6 msecs
1610 05:03:14.893274 PCI: 00:15.3 init
1611 05:03:14.893361 I2C bus 3 version 0x3230302a
1612 05:03:14.900125 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 05:03:14.903610 PCI: 00:15.3 init finished in 6 msecs
1614 05:03:14.903702 PCI: 00:16.0 init
1615 05:03:14.910262 PCI: 00:16.0 init finished in 0 msecs
1616 05:03:14.910349 PCI: 00:19.1 init
1617 05:03:14.913074 I2C bus 5 version 0x3230302a
1618 05:03:14.916493 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 05:03:14.919664 PCI: 00:19.1 init finished in 6 msecs
1620 05:03:14.923071 PCI: 00:1d.0 init
1621 05:03:14.926386 Initializing PCH PCIe bridge.
1622 05:03:14.929862 PCI: 00:1d.0 init finished in 3 msecs
1623 05:03:14.933142 PCI: 00:1f.0 init
1624 05:03:14.936483 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 05:03:14.943177 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 05:03:14.943275 IOAPIC: ID = 0x02
1627 05:03:14.946398 IOAPIC: Dumping registers
1628 05:03:14.949913 reg 0x0000: 0x02000000
1629 05:03:14.952711 reg 0x0001: 0x00770020
1630 05:03:14.952796 reg 0x0002: 0x00000000
1631 05:03:14.959803 PCI: 00:1f.0 init finished in 21 msecs
1632 05:03:14.959888 PCI: 00:1f.2 init
1633 05:03:14.963254 Disabling ACPI via APMC.
1634 05:03:14.968053 APMC done.
1635 05:03:14.971122 PCI: 00:1f.2 init finished in 6 msecs
1636 05:03:14.983114 PCI: 01:00.0 init
1637 05:03:14.986445 PCI: 01:00.0 init finished in 0 msecs
1638 05:03:14.989731 PNP: 0c09.0 init
1639 05:03:14.993177 Google Chrome EC uptime: 8.404 seconds
1640 05:03:14.999729 Google Chrome AP resets since EC boot: 1
1641 05:03:15.003239 Google Chrome most recent AP reset causes:
1642 05:03:15.006623 0.348: 32775 shutdown: entering G3
1643 05:03:15.013157 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 05:03:15.016430 PNP: 0c09.0 init finished in 22 msecs
1645 05:03:15.021781 Devices initialized
1646 05:03:15.025069 Show all devs... After init.
1647 05:03:15.028927 Root Device: enabled 1
1648 05:03:15.029013 DOMAIN: 0000: enabled 1
1649 05:03:15.031620 CPU_CLUSTER: 0: enabled 1
1650 05:03:15.035402 PCI: 00:00.0: enabled 1
1651 05:03:15.038744 PCI: 00:02.0: enabled 1
1652 05:03:15.038830 PCI: 00:04.0: enabled 1
1653 05:03:15.041709 PCI: 00:05.0: enabled 1
1654 05:03:15.045077 PCI: 00:06.0: enabled 0
1655 05:03:15.048261 PCI: 00:07.0: enabled 0
1656 05:03:15.048348 PCI: 00:07.1: enabled 0
1657 05:03:15.051635 PCI: 00:07.2: enabled 0
1658 05:03:15.055150 PCI: 00:07.3: enabled 0
1659 05:03:15.058116 PCI: 00:08.0: enabled 1
1660 05:03:15.058201 PCI: 00:09.0: enabled 0
1661 05:03:15.061791 PCI: 00:0a.0: enabled 0
1662 05:03:15.064954 PCI: 00:0d.0: enabled 1
1663 05:03:15.068575 PCI: 00:0d.1: enabled 0
1664 05:03:15.068660 PCI: 00:0d.2: enabled 0
1665 05:03:15.071791 PCI: 00:0d.3: enabled 0
1666 05:03:15.074899 PCI: 00:0e.0: enabled 0
1667 05:03:15.074985 PCI: 00:10.2: enabled 1
1668 05:03:15.078142 PCI: 00:10.6: enabled 0
1669 05:03:15.081401 PCI: 00:10.7: enabled 0
1670 05:03:15.084729 PCI: 00:12.0: enabled 0
1671 05:03:15.084814 PCI: 00:12.6: enabled 0
1672 05:03:15.088168 PCI: 00:13.0: enabled 0
1673 05:03:15.091389 PCI: 00:14.0: enabled 1
1674 05:03:15.094887 PCI: 00:14.1: enabled 0
1675 05:03:15.094972 PCI: 00:14.2: enabled 1
1676 05:03:15.098227 PCI: 00:14.3: enabled 1
1677 05:03:15.101683 PCI: 00:15.0: enabled 1
1678 05:03:15.104940 PCI: 00:15.1: enabled 1
1679 05:03:15.105025 PCI: 00:15.2: enabled 1
1680 05:03:15.108007 PCI: 00:15.3: enabled 1
1681 05:03:15.111135 PCI: 00:16.0: enabled 1
1682 05:03:15.114438 PCI: 00:16.1: enabled 0
1683 05:03:15.114539 PCI: 00:16.2: enabled 0
1684 05:03:15.117994 PCI: 00:16.3: enabled 0
1685 05:03:15.121310 PCI: 00:16.4: enabled 0
1686 05:03:15.121394 PCI: 00:16.5: enabled 0
1687 05:03:15.124469 PCI: 00:17.0: enabled 0
1688 05:03:15.127847 PCI: 00:19.0: enabled 0
1689 05:03:15.131239 PCI: 00:19.1: enabled 1
1690 05:03:15.131323 PCI: 00:19.2: enabled 0
1691 05:03:15.134517 PCI: 00:1c.0: enabled 1
1692 05:03:15.138026 PCI: 00:1c.1: enabled 0
1693 05:03:15.140868 PCI: 00:1c.2: enabled 0
1694 05:03:15.140953 PCI: 00:1c.3: enabled 0
1695 05:03:15.144784 PCI: 00:1c.4: enabled 0
1696 05:03:15.147562 PCI: 00:1c.5: enabled 0
1697 05:03:15.151143 PCI: 00:1c.6: enabled 1
1698 05:03:15.151228 PCI: 00:1c.7: enabled 0
1699 05:03:15.154355 PCI: 00:1d.0: enabled 1
1700 05:03:15.157842 PCI: 00:1d.1: enabled 0
1701 05:03:15.161091 PCI: 00:1d.2: enabled 1
1702 05:03:15.161176 PCI: 00:1d.3: enabled 0
1703 05:03:15.164364 PCI: 00:1e.0: enabled 1
1704 05:03:15.167719 PCI: 00:1e.1: enabled 0
1705 05:03:15.171263 PCI: 00:1e.2: enabled 1
1706 05:03:15.171376 PCI: 00:1e.3: enabled 1
1707 05:03:15.173861 PCI: 00:1f.0: enabled 1
1708 05:03:15.177132 PCI: 00:1f.1: enabled 0
1709 05:03:15.177217 PCI: 00:1f.2: enabled 1
1710 05:03:15.180656 PCI: 00:1f.3: enabled 1
1711 05:03:15.184445 PCI: 00:1f.4: enabled 0
1712 05:03:15.187672 PCI: 00:1f.5: enabled 1
1713 05:03:15.187815 PCI: 00:1f.6: enabled 0
1714 05:03:15.190472 PCI: 00:1f.7: enabled 0
1715 05:03:15.193890 APIC: 00: enabled 1
1716 05:03:15.197410 GENERIC: 0.0: enabled 1
1717 05:03:15.197497 GENERIC: 0.0: enabled 1
1718 05:03:15.200779 GENERIC: 1.0: enabled 1
1719 05:03:15.204002 GENERIC: 0.0: enabled 1
1720 05:03:15.204090 GENERIC: 1.0: enabled 1
1721 05:03:15.207510 USB0 port 0: enabled 1
1722 05:03:15.210334 GENERIC: 0.0: enabled 1
1723 05:03:15.213740 USB0 port 0: enabled 1
1724 05:03:15.213828 GENERIC: 0.0: enabled 1
1725 05:03:15.217269 I2C: 00:1a: enabled 1
1726 05:03:15.220285 I2C: 00:31: enabled 1
1727 05:03:15.220373 I2C: 00:32: enabled 1
1728 05:03:15.223662 I2C: 00:10: enabled 1
1729 05:03:15.226874 I2C: 00:15: enabled 1
1730 05:03:15.226962 GENERIC: 0.0: enabled 0
1731 05:03:15.230176 GENERIC: 1.0: enabled 0
1732 05:03:15.233641 GENERIC: 0.0: enabled 1
1733 05:03:15.236857 SPI: 00: enabled 1
1734 05:03:15.236942 SPI: 00: enabled 1
1735 05:03:15.240319 PNP: 0c09.0: enabled 1
1736 05:03:15.243453 GENERIC: 0.0: enabled 1
1737 05:03:15.243538 USB3 port 0: enabled 1
1738 05:03:15.246956 USB3 port 1: enabled 1
1739 05:03:15.250386 USB3 port 2: enabled 0
1740 05:03:15.250471 USB3 port 3: enabled 0
1741 05:03:15.253660 USB2 port 0: enabled 0
1742 05:03:15.256806 USB2 port 1: enabled 1
1743 05:03:15.260189 USB2 port 2: enabled 1
1744 05:03:15.260275 USB2 port 3: enabled 0
1745 05:03:15.263332 USB2 port 4: enabled 1
1746 05:03:15.266770 USB2 port 5: enabled 0
1747 05:03:15.266856 USB2 port 6: enabled 0
1748 05:03:15.269969 USB2 port 7: enabled 0
1749 05:03:15.272997 USB2 port 8: enabled 0
1750 05:03:15.276425 USB2 port 9: enabled 0
1751 05:03:15.276510 USB3 port 0: enabled 0
1752 05:03:15.280225 USB3 port 1: enabled 1
1753 05:03:15.283276 USB3 port 2: enabled 0
1754 05:03:15.283361 USB3 port 3: enabled 0
1755 05:03:15.286592 GENERIC: 0.0: enabled 1
1756 05:03:15.289630 GENERIC: 1.0: enabled 1
1757 05:03:15.289715 APIC: 01: enabled 1
1758 05:03:15.293046 APIC: 07: enabled 1
1759 05:03:15.296566 APIC: 02: enabled 1
1760 05:03:15.296652 APIC: 04: enabled 1
1761 05:03:15.299933 APIC: 06: enabled 1
1762 05:03:15.303279 APIC: 03: enabled 1
1763 05:03:15.303370 APIC: 05: enabled 1
1764 05:03:15.306491 PCI: 01:00.0: enabled 1
1765 05:03:15.312825 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1766 05:03:15.315980 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 05:03:15.319382 ELOG: NV offset 0xf30000 size 0x1000
1768 05:03:15.327310 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 05:03:15.333808 ELOG: Event(17) added with size 13 at 2023-02-07 05:03:14 UTC
1770 05:03:15.340086 ELOG: Event(92) added with size 9 at 2023-02-07 05:03:14 UTC
1771 05:03:15.347269 ELOG: Event(93) added with size 9 at 2023-02-07 05:03:14 UTC
1772 05:03:15.353275 ELOG: Event(9E) added with size 10 at 2023-02-07 05:03:14 UTC
1773 05:03:15.360144 ELOG: Event(9F) added with size 14 at 2023-02-07 05:03:14 UTC
1774 05:03:15.366827 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 05:03:15.373339 ELOG: Event(A1) added with size 10 at 2023-02-07 05:03:14 UTC
1776 05:03:15.376802 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1777 05:03:15.383326 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1778 05:03:15.386557 Finalize devices...
1779 05:03:15.386679 Devices finalized
1780 05:03:15.393081 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1781 05:03:15.399583 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1782 05:03:15.402820 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1783 05:03:15.409518 ME: HFSTS1 : 0x80030055
1784 05:03:15.412816 ME: HFSTS2 : 0x30280116
1785 05:03:15.416069 ME: HFSTS3 : 0x00000050
1786 05:03:15.423516 ME: HFSTS4 : 0x00004000
1787 05:03:15.425898 ME: HFSTS5 : 0x00000000
1788 05:03:15.432903 ME: HFSTS6 : 0x00400006
1789 05:03:15.436115 ME: Manufacturing Mode : YES
1790 05:03:15.439306 ME: SPI Protection Mode Enabled : NO
1791 05:03:15.442690 ME: FW Partition Table : OK
1792 05:03:15.445988 ME: Bringup Loader Failure : NO
1793 05:03:15.449368 ME: Firmware Init Complete : NO
1794 05:03:15.452529 ME: Boot Options Present : NO
1795 05:03:15.456126 ME: Update In Progress : NO
1796 05:03:15.462679 ME: D0i3 Support : YES
1797 05:03:15.466011 ME: Low Power State Enabled : NO
1798 05:03:15.469272 ME: CPU Replaced : YES
1799 05:03:15.472611 ME: CPU Replacement Valid : YES
1800 05:03:15.475998 ME: Current Working State : 5
1801 05:03:15.478844 ME: Current Operation State : 1
1802 05:03:15.482555 ME: Current Operation Mode : 3
1803 05:03:15.485474 ME: Error Code : 0
1804 05:03:15.488756 ME: Enhanced Debug Mode : NO
1805 05:03:15.495668 ME: CPU Debug Disabled : YES
1806 05:03:15.499005 ME: TXT Support : NO
1807 05:03:15.505510 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1808 05:03:15.512418 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1809 05:03:15.515222 CBFS: 'fallback/slic' not found.
1810 05:03:15.518446 ACPI: Writing ACPI tables at 76b01000.
1811 05:03:15.521800 ACPI: * FACS
1812 05:03:15.521886 ACPI: * DSDT
1813 05:03:15.525799 Ramoops buffer: 0x100000@0x76a00000.
1814 05:03:15.532103 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1815 05:03:15.535342 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1816 05:03:15.538574 Google Chrome EC: version:
1817 05:03:15.542041 ro: voema_v2.0.7540-147f8d37d1
1818 05:03:15.545389 rw: voema_v2.0.7540-147f8d37d1
1819 05:03:15.548280 running image: 2
1820 05:03:15.554951 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1821 05:03:15.558230 ACPI: * FADT
1822 05:03:15.558317 SCI is IRQ9
1823 05:03:15.561536 ACPI: added table 1/32, length now 40
1824 05:03:15.564861 ACPI: * SSDT
1825 05:03:15.568668 Found 1 CPU(s) with 8 core(s) each.
1826 05:03:15.572151 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1827 05:03:15.578229 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1828 05:03:15.581629 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1829 05:03:15.584951 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1830 05:03:15.591617 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1831 05:03:15.598366 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1832 05:03:15.601707 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1833 05:03:15.607763 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1834 05:03:15.614546 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1835 05:03:15.618064 \_SB.PCI0.RP09: Added StorageD3Enable property
1836 05:03:15.621548 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1837 05:03:15.627647 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1838 05:03:15.634833 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1839 05:03:15.637625 PS2K: Passing 80 keymaps to kernel
1840 05:03:15.644556 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1841 05:03:15.651233 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1842 05:03:15.657529 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1843 05:03:15.664325 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1844 05:03:15.670947 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1845 05:03:15.677797 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1846 05:03:15.684233 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1847 05:03:15.690722 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1848 05:03:15.694404 ACPI: added table 2/32, length now 44
1849 05:03:15.694491 ACPI: * MCFG
1850 05:03:15.697616 ACPI: added table 3/32, length now 48
1851 05:03:15.701127 ACPI: * TPM2
1852 05:03:15.704236 TPM2 log created at 0x769f0000
1853 05:03:15.707596 ACPI: added table 4/32, length now 52
1854 05:03:15.710562 ACPI: * MADT
1855 05:03:15.710649 SCI is IRQ9
1856 05:03:15.714034 ACPI: added table 5/32, length now 56
1857 05:03:15.717484 current = 76b09850
1858 05:03:15.717571 ACPI: * DMAR
1859 05:03:15.720748 ACPI: added table 6/32, length now 60
1860 05:03:15.723662 ACPI: added table 7/32, length now 64
1861 05:03:15.727589 ACPI: * HPET
1862 05:03:15.730654 ACPI: added table 8/32, length now 68
1863 05:03:15.733813 ACPI: done.
1864 05:03:15.733899 ACPI tables: 35216 bytes.
1865 05:03:15.737321 smbios_write_tables: 769ef000
1866 05:03:15.740487 EC returned error result code 3
1867 05:03:15.743418 Couldn't obtain OEM name from CBI
1868 05:03:15.748507 Create SMBIOS type 16
1869 05:03:15.751734 Create SMBIOS type 17
1870 05:03:15.755206 GENERIC: 0.0 (WIFI Device)
1871 05:03:15.758650 SMBIOS tables: 1750 bytes.
1872 05:03:15.761786 Writing table forward entry at 0x00000500
1873 05:03:15.768744 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1874 05:03:15.771515 Writing coreboot table at 0x76b25000
1875 05:03:15.778110 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1876 05:03:15.781479 1. 0000000000001000-000000000009ffff: RAM
1877 05:03:15.785227 2. 00000000000a0000-00000000000fffff: RESERVED
1878 05:03:15.791909 3. 0000000000100000-00000000769eefff: RAM
1879 05:03:15.795158 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1880 05:03:15.801499 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1881 05:03:15.808406 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1882 05:03:15.811297 7. 0000000077000000-000000007fbfffff: RESERVED
1883 05:03:15.818550 8. 00000000c0000000-00000000cfffffff: RESERVED
1884 05:03:15.821773 9. 00000000f8000000-00000000f9ffffff: RESERVED
1885 05:03:15.825078 10. 00000000fb000000-00000000fb000fff: RESERVED
1886 05:03:15.831471 11. 00000000fe000000-00000000fe00ffff: RESERVED
1887 05:03:15.834724 12. 00000000fed80000-00000000fed87fff: RESERVED
1888 05:03:15.841186 13. 00000000fed90000-00000000fed92fff: RESERVED
1889 05:03:15.844497 14. 00000000feda0000-00000000feda1fff: RESERVED
1890 05:03:15.851290 15. 00000000fedc0000-00000000feddffff: RESERVED
1891 05:03:15.854726 16. 0000000100000000-00000002803fffff: RAM
1892 05:03:15.858114 Passing 4 GPIOs to payload:
1893 05:03:15.860952 NAME | PORT | POLARITY | VALUE
1894 05:03:15.867807 lid | undefined | high | high
1895 05:03:15.874414 power | undefined | high | low
1896 05:03:15.877835 oprom | undefined | high | low
1897 05:03:15.884341 EC in RW | 0x000000e5 | high | high
1898 05:03:15.891050 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e056
1899 05:03:15.894297 coreboot table: 1576 bytes.
1900 05:03:15.897516 IMD ROOT 0. 0x76fff000 0x00001000
1901 05:03:15.900737 IMD SMALL 1. 0x76ffe000 0x00001000
1902 05:03:15.904115 FSP MEMORY 2. 0x76c4e000 0x003b0000
1903 05:03:15.907332 VPD 3. 0x76c4d000 0x00000367
1904 05:03:15.910762 RO MCACHE 4. 0x76c4c000 0x00000fdc
1905 05:03:15.913942 CONSOLE 5. 0x76c2c000 0x00020000
1906 05:03:15.917408 FMAP 6. 0x76c2b000 0x00000578
1907 05:03:15.923775 TIME STAMP 7. 0x76c2a000 0x00000910
1908 05:03:15.927168 VBOOT WORK 8. 0x76c16000 0x00014000
1909 05:03:15.930298 ROMSTG STCK 9. 0x76c15000 0x00001000
1910 05:03:15.933971 AFTER CAR 10. 0x76c0a000 0x0000b000
1911 05:03:15.937482 RAMSTAGE 11. 0x76b97000 0x00073000
1912 05:03:15.940065 REFCODE 12. 0x76b42000 0x00055000
1913 05:03:15.943886 SMM BACKUP 13. 0x76b32000 0x00010000
1914 05:03:15.950318 4f444749 14. 0x76b30000 0x00002000
1915 05:03:15.953727 EXT VBT15. 0x76b2d000 0x0000219f
1916 05:03:15.956895 COREBOOT 16. 0x76b25000 0x00008000
1917 05:03:15.960313 ACPI 17. 0x76b01000 0x00024000
1918 05:03:15.963661 ACPI GNVS 18. 0x76b00000 0x00001000
1919 05:03:15.967172 RAMOOPS 19. 0x76a00000 0x00100000
1920 05:03:15.969928 TPM2 TCGLOG20. 0x769f0000 0x00010000
1921 05:03:15.973313 SMBIOS 21. 0x769ef000 0x00000800
1922 05:03:15.976518 IMD small region:
1923 05:03:15.979950 IMD ROOT 0. 0x76ffec00 0x00000400
1924 05:03:15.983025 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1925 05:03:15.987494 POWER STATE 2. 0x76ffeb80 0x00000044
1926 05:03:15.993233 ROMSTAGE 3. 0x76ffeb60 0x00000004
1927 05:03:15.996560 MEM INFO 4. 0x76ffe980 0x000001e0
1928 05:03:16.002920 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1929 05:03:16.006321 MTRR: Physical address space:
1930 05:03:16.009758 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1931 05:03:16.016049 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1932 05:03:16.022771 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1933 05:03:16.029738 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1934 05:03:16.036677 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1935 05:03:16.042878 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1936 05:03:16.049508 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1937 05:03:16.052895 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 05:03:16.056383 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 05:03:16.059663 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 05:03:16.066021 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 05:03:16.069443 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 05:03:16.072799 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 05:03:16.076144 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 05:03:16.082762 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 05:03:16.086049 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 05:03:16.089099 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 05:03:16.092377 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 05:03:16.096459 call enable_fixed_mtrr()
1949 05:03:16.099940 CPU physical address size: 39 bits
1950 05:03:16.106454 MTRR: default type WB/UC MTRR counts: 6/6.
1951 05:03:16.109830 MTRR: UC selected as default type.
1952 05:03:16.116418 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1953 05:03:16.120206 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1954 05:03:16.126327 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1955 05:03:16.133263 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1956 05:03:16.139936 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1957 05:03:16.146404 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1958 05:03:16.152968 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 05:03:16.156348 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 05:03:16.159593 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 05:03:16.162960 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 05:03:16.169601 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 05:03:16.172419 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 05:03:16.175892 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 05:03:16.179091 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 05:03:16.185665 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 05:03:16.188995 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 05:03:16.192501 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 05:03:16.192588
1970 05:03:16.195797 MTRR check
1971 05:03:16.198784 call enable_fixed_mtrr()
1972 05:03:16.198873 Fixed MTRRs : Enabled
1973 05:03:16.202204 Variable MTRRs: Enabled
1974 05:03:16.202292
1975 05:03:16.205188 CPU physical address size: 39 bits
1976 05:03:16.212532 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1977 05:03:16.215812 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 05:03:16.222451 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 05:03:16.225835 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 05:03:16.229271 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 05:03:16.232614 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 05:03:16.238860 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 05:03:16.242095 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 05:03:16.245360 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 05:03:16.249111 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 05:03:16.255816 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 05:03:16.258706 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 05:03:16.262067 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 05:03:16.268758 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 05:03:16.268845 call enable_fixed_mtrr()
1991 05:03:16.275322 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 05:03:16.278683 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 05:03:16.281978 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 05:03:16.285333 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 05:03:16.291922 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 05:03:16.295782 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 05:03:16.298774 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 05:03:16.302066 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 05:03:16.308699 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 05:03:16.312140 CPU physical address size: 39 bits
2001 05:03:16.315295 call enable_fixed_mtrr()
2002 05:03:16.318764 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 05:03:16.325347 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 05:03:16.328341 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 05:03:16.331854 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 05:03:16.334985 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 05:03:16.338364 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 05:03:16.345299 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 05:03:16.348057 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 05:03:16.351877 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 05:03:16.355281 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 05:03:16.361904 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 05:03:16.364636 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 05:03:16.367916 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 05:03:16.371240 call enable_fixed_mtrr()
2016 05:03:16.375202 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 05:03:16.381372 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 05:03:16.384670 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 05:03:16.388041 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 05:03:16.391416 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 05:03:16.398238 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 05:03:16.401044 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 05:03:16.404847 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 05:03:16.407600 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 05:03:16.411907 CPU physical address size: 39 bits
2026 05:03:16.418562 call enable_fixed_mtrr()
2027 05:03:16.421878 CPU physical address size: 39 bits
2028 05:03:16.425741 Checking cr50 for pending updates
2029 05:03:16.425828 CPU physical address size: 39 bits
2030 05:03:16.433266 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 05:03:16.436582 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 05:03:16.439974 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 05:03:16.443540 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 05:03:16.446706 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 05:03:16.452867 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 05:03:16.456080 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 05:03:16.459431 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 05:03:16.462848 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 05:03:16.469322 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 05:03:16.472865 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 05:03:16.475865 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 05:03:16.483148 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 05:03:16.483240 call enable_fixed_mtrr()
2044 05:03:16.489797 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 05:03:16.492922 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 05:03:16.496243 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 05:03:16.499558 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 05:03:16.506003 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 05:03:16.509607 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 05:03:16.512761 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 05:03:16.516645 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 05:03:16.522617 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 05:03:16.525858 CPU physical address size: 39 bits
2054 05:03:16.529379 call enable_fixed_mtrr()
2055 05:03:16.533094 Reading cr50 TPM mode
2056 05:03:16.536517 CPU physical address size: 39 bits
2057 05:03:16.542871 BS: BS_PAYLOAD_LOAD entry times (exec / console): 317 / 6 ms
2058 05:03:16.549593 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2059 05:03:16.556246 Checking segment from ROM address 0xffc02b38
2060 05:03:16.559554 Checking segment from ROM address 0xffc02b54
2061 05:03:16.562710 Loading segment from ROM address 0xffc02b38
2062 05:03:16.566091 code (compression=0)
2063 05:03:16.575959 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2064 05:03:16.583110 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2065 05:03:16.585944 it's not compressed!
2066 05:03:16.724420 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2067 05:03:16.731179 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2068 05:03:16.737862 Loading segment from ROM address 0xffc02b54
2069 05:03:16.741290 Entry Point 0x30000000
2070 05:03:16.741375 Loaded segments
2071 05:03:16.747654 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2072 05:03:16.790477 Finalizing chipset.
2073 05:03:16.793828 Finalizing SMM.
2074 05:03:16.793915 APMC done.
2075 05:03:16.800514 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2076 05:03:16.803760 mp_park_aps done after 0 msecs.
2077 05:03:16.806854 Jumping to boot code at 0x30000000(0x76b25000)
2078 05:03:16.816798 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2079 05:03:16.816885
2080 05:03:16.816959
2081 05:03:16.820041
2082 05:03:16.820128 Starting depthcharge on Voema...
2083 05:03:16.820544 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2084 05:03:16.820664 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2085 05:03:16.820758 Setting prompt string to ['volteer:']
2086 05:03:16.820836 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2087 05:03:16.823465
2088 05:03:16.830160 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2089 05:03:16.830265
2090 05:03:16.836698 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2091 05:03:16.836786
2092 05:03:16.843428 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2093 05:03:16.843515
2094 05:03:16.847031 Failed to find eMMC card reader
2095 05:03:16.847117
2096 05:03:16.847185 Wipe memory regions:
2097 05:03:16.850135
2098 05:03:16.853305 [0x00000000001000, 0x000000000a0000)
2099 05:03:16.853392
2100 05:03:16.856512 [0x00000000100000, 0x00000030000000)
2101 05:03:16.881986
2102 05:03:16.885383 [0x00000032662db0, 0x000000769ef000)
2103 05:03:16.921314
2104 05:03:16.924526 [0x00000100000000, 0x00000280400000)
2105 05:03:17.123135
2106 05:03:17.126295 ec_init: CrosEC protocol v3 supported (256, 256)
2107 05:03:17.126388
2108 05:03:17.133023 update_port_state: port C0 state: usb enable 1 mux conn 0
2109 05:03:17.133115
2110 05:03:17.142800 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2111 05:03:17.142892
2112 05:03:17.146557 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2113 05:03:17.146647
2114 05:03:17.152461 send_conn_disc_msg: pmc_send_cmd succeeded
2115 05:03:17.582525
2116 05:03:17.582683 R8152: Initializing
2117 05:03:17.582781
2118 05:03:17.585830 Version 6 (ocp_data = 5c30)
2119 05:03:17.585921
2120 05:03:17.588712 R8152: Done initializing
2121 05:03:17.588806
2122 05:03:17.592033 Adding net device
2123 05:03:17.894416
2124 05:03:17.897875 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2125 05:03:17.897974
2126 05:03:17.898064
2127 05:03:17.898147
2128 05:03:17.900951 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2130 05:03:18.001753 volteer: tftpboot 192.168.201.1 9043155/tftp-deploy-3v342tx1/kernel/bzImage 9043155/tftp-deploy-3v342tx1/kernel/cmdline 9043155/tftp-deploy-3v342tx1/ramdisk/ramdisk.cpio.gz
2131 05:03:18.001898 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 05:03:18.002003 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2133 05:03:18.006323 tftpboot 192.168.201.1 9043155/tftp-deploy-3v342tx1/kernel/bzImay-3v342tx1/kernel/cmdline 9043155/tftp-deploy-3v342tx1/ramdisk/ramdisk.cpio.gz
2134 05:03:18.006417
2135 05:03:18.006506 Waiting for link
2136 05:03:18.209212
2137 05:03:18.209367 done.
2138 05:03:18.209464
2139 05:03:18.209549 MAC: 00:24:32:30:79:42
2140 05:03:18.209633
2141 05:03:18.212559 Sending DHCP discover... done.
2142 05:03:18.212651
2143 05:03:18.216311 Waiting for reply... done.
2144 05:03:18.216392
2145 05:03:18.219452 Sending DHCP request... done.
2146 05:03:18.219542
2147 05:03:18.226014 Waiting for reply... done.
2148 05:03:18.226104
2149 05:03:18.226193 My ip is 192.168.201.13
2150 05:03:18.226277
2151 05:03:18.229131 The DHCP server ip is 192.168.201.1
2152 05:03:18.229221
2153 05:03:18.235456 TFTP server IP predefined by user: 192.168.201.1
2154 05:03:18.235547
2155 05:03:18.242059 Bootfile predefined by user: 9043155/tftp-deploy-3v342tx1/kernel/bzImage
2156 05:03:18.242151
2157 05:03:18.245298 Sending tftp read request... done.
2158 05:03:18.245388
2159 05:03:18.248668 Waiting for the transfer...
2160 05:03:18.248759
2161 05:03:18.812395 00000000 ################################################################
2162 05:03:18.812536
2163 05:03:19.355097 00080000 ################################################################
2164 05:03:19.355236
2165 05:03:19.887726 00100000 ################################################################
2166 05:03:19.887896
2167 05:03:20.445228 00180000 ################################################################
2168 05:03:20.445378
2169 05:03:20.986922 00200000 ################################################################
2170 05:03:20.987082
2171 05:03:21.567142 00280000 ################################################################
2172 05:03:21.567299
2173 05:03:22.172444 00300000 ################################################################
2174 05:03:22.172602
2175 05:03:22.715860 00380000 ################################################################
2176 05:03:22.716015
2177 05:03:23.307405 00400000 ################################################################
2178 05:03:23.307559
2179 05:03:23.889471 00480000 ################################################################
2180 05:03:23.889634
2181 05:03:24.500222 00500000 ################################################################
2182 05:03:24.500388
2183 05:03:25.114791 00580000 ################################################################
2184 05:03:25.114947
2185 05:03:25.700193 00600000 ################################################################
2186 05:03:25.700345
2187 05:03:26.282510 00680000 ################################################################
2188 05:03:26.282665
2189 05:03:26.671458 00700000 ############################################# done.
2190 05:03:26.671629
2191 05:03:26.674539 The bootfile was 7704464 bytes long.
2192 05:03:26.674635
2193 05:03:26.677840 Sending tftp read request... done.
2194 05:03:26.677942
2195 05:03:26.681163 Waiting for the transfer...
2196 05:03:26.681265
2197 05:03:27.325011 00000000 ################################################################
2198 05:03:27.325576
2199 05:03:27.946422 00080000 ################################################################
2200 05:03:27.946583
2201 05:03:28.540749 00100000 ################################################################
2202 05:03:28.540903
2203 05:03:29.152099 00180000 ################################################################
2204 05:03:29.152241
2205 05:03:29.741697 00200000 ################################################################
2206 05:03:29.741880
2207 05:03:30.335583 00280000 ################################################################
2208 05:03:30.335767
2209 05:03:30.905906 00300000 ################################################################
2210 05:03:30.906056
2211 05:03:31.517017 00380000 ################################################################
2212 05:03:31.517173
2213 05:03:32.093637 00400000 ################################################################
2214 05:03:32.093791
2215 05:03:32.718510 00480000 ################################################################
2216 05:03:32.718662
2217 05:03:33.330883 00500000 ################################################################
2218 05:03:33.331037
2219 05:03:33.907514 00580000 ################################################################
2220 05:03:33.907656
2221 05:03:34.454518 00600000 ################################################################
2222 05:03:34.454669
2223 05:03:35.006682 00680000 ################################################################
2224 05:03:35.006826
2225 05:03:35.552970 00700000 ################################################################
2226 05:03:35.553115
2227 05:03:36.114490 00780000 ################################################################
2228 05:03:36.114632
2229 05:03:36.308731 00800000 ###################### done.
2230 05:03:36.308874
2231 05:03:36.312231 Sending tftp read request... done.
2232 05:03:36.312341
2233 05:03:36.315154 Waiting for the transfer...
2234 05:03:36.315242
2235 05:03:36.315312 00000000 # done.
2236 05:03:36.315378
2237 05:03:36.324937 Command line loaded dynamically from TFTP file: 9043155/tftp-deploy-3v342tx1/kernel/cmdline
2238 05:03:36.325026
2239 05:03:36.338237 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2240 05:03:36.342399
2241 05:03:36.345724 Shutting down all USB controllers.
2242 05:03:36.345836
2243 05:03:36.345925 Removing current net device
2244 05:03:36.346006
2245 05:03:36.349310 Finalizing coreboot
2246 05:03:36.349439
2247 05:03:36.355887 Exiting depthcharge with code 4 at timestamp: 28175729
2248 05:03:36.356068
2249 05:03:36.356175
2250 05:03:36.356270 Starting kernel ...
2251 05:03:36.356363
2252 05:03:36.356484
2253 05:03:36.357014 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2254 05:03:36.357179 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2255 05:03:36.357304 Setting prompt string to ['Linux version [0-9]']
2256 05:03:36.357435 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2257 05:03:36.357621 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2259 05:07:59.357920 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2261 05:07:59.358952 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2263 05:07:59.359798 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2266 05:07:59.361036 end: 2 depthcharge-action (duration 00:05:00) [common]
2268 05:07:59.361883 Cleaning after the job
2269 05:07:59.362185 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9043155/tftp-deploy-3v342tx1/ramdisk
2270 05:07:59.364347 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9043155/tftp-deploy-3v342tx1/kernel
2271 05:07:59.366370 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9043155/tftp-deploy-3v342tx1/modules
2272 05:07:59.367245 start: 5.1 power-off (timeout 00:00:30) [common]
2273 05:07:59.367995 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2274 05:08:01.573873 >> Command sent successfully.
2275 05:08:01.576049 Returned 0 in 2 seconds
2276 05:08:01.677244 end: 5.1 power-off (duration 00:00:02) [common]
2278 05:08:01.678993 start: 5.2 read-feedback (timeout 00:09:58) [common]
2279 05:08:01.680299 Listened to connection for namespace 'common' for up to 1s
2280 05:08:02.683813 Finalising connection for namespace 'common'
2281 05:08:02.684015 Disconnecting from shell: Finalise
2282 05:08:02.684107
2283 05:08:02.785083 end: 5.2 read-feedback (duration 00:00:01) [common]
2284 05:08:02.785652 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9043155
2285 05:08:02.810445 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9043155
2286 05:08:02.811072 JobError: Your job cannot terminate cleanly.