Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 13:42:35.679804 lava-dispatcher, installed at version: 2023.05.1
2 13:42:35.680011 start: 0 validate
3 13:42:35.680131 Start time: 2023-06-07 13:42:35.680124+00:00 (UTC)
4 13:42:35.680243 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:42:35.680374 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 13:42:35.954582 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:42:35.955401 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:42:38.966206 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:42:38.967010 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:42:39.244881 validate duration: 3.56
12 13:42:39.246225 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:42:39.246766 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:42:39.247286 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:42:39.247919 Not decompressing ramdisk as can be used compressed.
16 13:42:39.248410 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 13:42:39.248771 saving as /var/lib/lava/dispatcher/tmp/10624661/tftp-deploy-bbtrtni1/ramdisk/rootfs.cpio.gz
18 13:42:39.249113 total size: 8430069 (8MB)
19 13:42:39.774493 progress 0% (0MB)
20 13:42:39.779768 progress 5% (0MB)
21 13:42:39.782067 progress 10% (0MB)
22 13:42:39.784313 progress 15% (1MB)
23 13:42:39.786490 progress 20% (1MB)
24 13:42:39.788682 progress 25% (2MB)
25 13:42:39.790845 progress 30% (2MB)
26 13:42:39.793120 progress 35% (2MB)
27 13:42:39.795138 progress 40% (3MB)
28 13:42:39.797337 progress 45% (3MB)
29 13:42:39.799478 progress 50% (4MB)
30 13:42:39.801696 progress 55% (4MB)
31 13:42:39.803813 progress 60% (4MB)
32 13:42:39.805967 progress 65% (5MB)
33 13:42:39.808127 progress 70% (5MB)
34 13:42:39.810082 progress 75% (6MB)
35 13:42:39.812257 progress 80% (6MB)
36 13:42:39.814388 progress 85% (6MB)
37 13:42:39.816720 progress 90% (7MB)
38 13:42:39.818852 progress 95% (7MB)
39 13:42:39.821055 progress 100% (8MB)
40 13:42:39.821194 8MB downloaded in 0.57s (14.05MB/s)
41 13:42:39.821372 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:42:39.821612 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:42:39.821697 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:42:39.821783 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:42:39.821944 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:42:39.822016 saving as /var/lib/lava/dispatcher/tmp/10624661/tftp-deploy-bbtrtni1/kernel/bzImage
48 13:42:39.822076 total size: 7884688 (7MB)
49 13:42:39.822134 No compression specified
50 13:42:39.823183 progress 0% (0MB)
51 13:42:39.825304 progress 5% (0MB)
52 13:42:39.827299 progress 10% (0MB)
53 13:42:39.829354 progress 15% (1MB)
54 13:42:39.831343 progress 20% (1MB)
55 13:42:39.833396 progress 25% (1MB)
56 13:42:39.835384 progress 30% (2MB)
57 13:42:39.837440 progress 35% (2MB)
58 13:42:39.839429 progress 40% (3MB)
59 13:42:39.841469 progress 45% (3MB)
60 13:42:39.843459 progress 50% (3MB)
61 13:42:39.845488 progress 55% (4MB)
62 13:42:39.847510 progress 60% (4MB)
63 13:42:39.849530 progress 65% (4MB)
64 13:42:39.851496 progress 70% (5MB)
65 13:42:39.853503 progress 75% (5MB)
66 13:42:39.855473 progress 80% (6MB)
67 13:42:39.857517 progress 85% (6MB)
68 13:42:39.859514 progress 90% (6MB)
69 13:42:39.861598 progress 95% (7MB)
70 13:42:39.863570 progress 100% (7MB)
71 13:42:39.863768 7MB downloaded in 0.04s (180.37MB/s)
72 13:42:39.863967 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:42:39.864191 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:42:39.864281 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:42:39.864364 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:42:39.864488 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:42:39.864555 saving as /var/lib/lava/dispatcher/tmp/10624661/tftp-deploy-bbtrtni1/modules/modules.tar
79 13:42:39.864614 total size: 253384 (0MB)
80 13:42:39.864672 Using unxz to decompress xz
81 13:42:39.868440 progress 12% (0MB)
82 13:42:39.868816 progress 25% (0MB)
83 13:42:39.869117 progress 38% (0MB)
84 13:42:39.870515 progress 51% (0MB)
85 13:42:39.872341 progress 64% (0MB)
86 13:42:39.873982 progress 77% (0MB)
87 13:42:39.875907 progress 90% (0MB)
88 13:42:39.877644 progress 100% (0MB)
89 13:42:39.883077 0MB downloaded in 0.02s (13.09MB/s)
90 13:42:39.883336 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:42:39.883627 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:42:39.883723 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 13:42:39.883820 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 13:42:39.883961 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:42:39.884045 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 13:42:39.884242 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei
98 13:42:39.884364 makedir: /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin
99 13:42:39.884464 makedir: /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/tests
100 13:42:39.884557 makedir: /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/results
101 13:42:39.884664 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-add-keys
102 13:42:39.884800 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-add-sources
103 13:42:39.884925 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-background-process-start
104 13:42:39.885051 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-background-process-stop
105 13:42:39.885171 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-common-functions
106 13:42:39.885291 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-echo-ipv4
107 13:42:39.885411 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-install-packages
108 13:42:39.885560 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-installed-packages
109 13:42:39.885749 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-os-build
110 13:42:39.885867 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-probe-channel
111 13:42:39.885994 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-probe-ip
112 13:42:39.886113 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-target-ip
113 13:42:39.886231 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-target-mac
114 13:42:39.886348 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-target-storage
115 13:42:39.886469 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-test-case
116 13:42:39.886587 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-test-event
117 13:42:39.886706 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-test-feedback
118 13:42:39.886823 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-test-raise
119 13:42:39.886946 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-test-reference
120 13:42:39.887064 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-test-runner
121 13:42:39.887183 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-test-set
122 13:42:39.887302 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-test-shell
123 13:42:39.887423 Updating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-install-packages (oe)
124 13:42:39.887595 Updating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/bin/lava-installed-packages (oe)
125 13:42:39.887713 Creating /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/environment
126 13:42:39.887819 LAVA metadata
127 13:42:39.887952 - LAVA_JOB_ID=10624661
128 13:42:39.888017 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:42:39.888118 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 13:42:39.888188 skipped lava-vland-overlay
131 13:42:39.888259 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:42:39.888340 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 13:42:39.888401 skipped lava-multinode-overlay
134 13:42:39.888471 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:42:39.888550 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 13:42:39.888625 Loading test definitions
137 13:42:39.888714 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 13:42:39.888788 Using /lava-10624661 at stage 0
139 13:42:39.889088 uuid=10624661_1.4.2.3.1 testdef=None
140 13:42:39.889175 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:42:39.889260 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 13:42:39.889797 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:42:39.890017 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 13:42:39.890648 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:42:39.890873 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 13:42:39.891503 runner path: /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/0/tests/0_dmesg test_uuid 10624661_1.4.2.3.1
149 13:42:39.891670 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:42:39.891953 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 13:42:39.892026 Using /lava-10624661 at stage 1
153 13:42:39.892309 uuid=10624661_1.4.2.3.5 testdef=None
154 13:42:39.892396 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 13:42:39.892479 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 13:42:39.892927 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 13:42:39.893141 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 13:42:39.893843 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 13:42:39.894065 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 13:42:39.894675 runner path: /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/1/tests/1_bootrr test_uuid 10624661_1.4.2.3.5
163 13:42:39.894819 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 13:42:39.895016 Creating lava-test-runner.conf files
166 13:42:39.895077 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/0 for stage 0
167 13:42:39.895162 - 0_dmesg
168 13:42:39.895237 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624661/lava-overlay-06ve_fei/lava-10624661/1 for stage 1
169 13:42:39.895325 - 1_bootrr
170 13:42:39.895419 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 13:42:39.895515 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 13:42:39.903823 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 13:42:39.903982 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 13:42:39.904067 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 13:42:39.904153 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 13:42:39.904239 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 13:42:40.142455 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 13:42:40.142888 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 13:42:40.143046 extracting modules file /var/lib/lava/dispatcher/tmp/10624661/tftp-deploy-bbtrtni1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624661/extract-overlay-ramdisk-etrtkqtw/ramdisk
180 13:42:40.163209 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 13:42:40.163378 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 13:42:40.163505 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624661/compress-overlay-2sj17v6h/overlay-1.4.2.4.tar.gz to ramdisk
183 13:42:40.163608 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624661/compress-overlay-2sj17v6h/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624661/extract-overlay-ramdisk-etrtkqtw/ramdisk
184 13:42:40.176985 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 13:42:40.177140 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 13:42:40.177272 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 13:42:40.177393 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 13:42:40.177513 Building ramdisk /var/lib/lava/dispatcher/tmp/10624661/extract-overlay-ramdisk-etrtkqtw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624661/extract-overlay-ramdisk-etrtkqtw/ramdisk
189 13:42:40.298977 >> 49827 blocks
190 13:42:41.130453 rename /var/lib/lava/dispatcher/tmp/10624661/extract-overlay-ramdisk-etrtkqtw/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624661/tftp-deploy-bbtrtni1/ramdisk/ramdisk.cpio.gz
191 13:42:41.130880 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 13:42:41.131003 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 13:42:41.131102 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 13:42:41.131195 No mkimage arch provided, not using FIT.
195 13:42:41.131286 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 13:42:41.131371 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 13:42:41.131479 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 13:42:41.131569 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 13:42:41.131645 No LXC device requested
200 13:42:41.131724 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 13:42:41.131810 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 13:42:41.131934 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 13:42:41.132004 Checking files for TFTP limit of 4294967296 bytes.
204 13:42:41.132392 end: 1 tftp-deploy (duration 00:00:02) [common]
205 13:42:41.132496 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 13:42:41.132585 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 13:42:41.132707 substitutions:
208 13:42:41.132771 - {DTB}: None
209 13:42:41.132831 - {INITRD}: 10624661/tftp-deploy-bbtrtni1/ramdisk/ramdisk.cpio.gz
210 13:42:41.132888 - {KERNEL}: 10624661/tftp-deploy-bbtrtni1/kernel/bzImage
211 13:42:41.132943 - {LAVA_MAC}: None
212 13:42:41.132997 - {PRESEED_CONFIG}: None
213 13:42:41.133051 - {PRESEED_LOCAL}: None
214 13:42:41.133103 - {RAMDISK}: 10624661/tftp-deploy-bbtrtni1/ramdisk/ramdisk.cpio.gz
215 13:42:41.133157 - {ROOT_PART}: None
216 13:42:41.133209 - {ROOT}: None
217 13:42:41.133261 - {SERVER_IP}: 192.168.201.1
218 13:42:41.133312 - {TEE}: None
219 13:42:41.133364 Parsed boot commands:
220 13:42:41.133416 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 13:42:41.133584 Parsed boot commands: tftpboot 192.168.201.1 10624661/tftp-deploy-bbtrtni1/kernel/bzImage 10624661/tftp-deploy-bbtrtni1/kernel/cmdline 10624661/tftp-deploy-bbtrtni1/ramdisk/ramdisk.cpio.gz
222 13:42:41.133670 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 13:42:41.133753 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 13:42:41.133856 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 13:42:41.133945 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 13:42:41.134013 Not connected, no need to disconnect.
227 13:42:41.134086 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 13:42:41.134272 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 13:42:41.134339 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
230 13:42:41.137752 Setting prompt string to ['lava-test: # ']
231 13:42:41.138085 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 13:42:41.138193 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 13:42:41.138295 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 13:42:41.138387 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 13:42:41.138577 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
236 13:42:46.273077 >> Command sent successfully.
237 13:42:46.275445 Returned 0 in 5 seconds
238 13:42:46.375838 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 13:42:46.376230 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 13:42:46.376330 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 13:42:46.376419 Setting prompt string to 'Starting depthcharge on Voema...'
243 13:42:46.376488 Changing prompt to 'Starting depthcharge on Voema...'
244 13:42:46.376554 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 13:42:46.376804 [Enter `^Ec?' for help]
246 13:42:47.979559
247 13:42:47.979721
248 13:42:47.989479 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 13:42:47.993482 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 13:42:47.999752 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 13:42:48.003411 CPU: AES supported, TXT NOT supported, VT supported
252 13:42:48.009637 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 13:42:48.015990 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 13:42:48.019400 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 13:42:48.022685 VBOOT: Loading verstage.
256 13:42:48.026167 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 13:42:48.032563 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 13:42:48.036184 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 13:42:48.046554 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 13:42:48.053367 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 13:42:48.053452
262 13:42:48.053517
263 13:42:48.067176 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 13:42:48.080295 Probing TPM: . done!
265 13:42:48.083265 TPM ready after 0 ms
266 13:42:48.086931 Connected to device vid:did:rid of 1ae0:0028:00
267 13:42:48.098265 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
268 13:42:48.104997 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 13:42:48.108130 Initialized TPM device CR50 revision 0
270 13:42:48.161181 tlcl_send_startup: Startup return code is 0
271 13:42:48.161326 TPM: setup succeeded
272 13:42:48.176355 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 13:42:48.190327 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 13:42:48.203266 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 13:42:48.213734 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 13:42:48.217340 Chrome EC: UHEPI supported
277 13:42:48.221396 Phase 1
278 13:42:48.224223 FMAP: area GBB found @ 1805000 (458752 bytes)
279 13:42:48.233709 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 13:42:48.240448 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 13:42:48.247378 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 13:42:48.253876 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 13:42:48.257257 Recovery requested (1009000e)
284 13:42:48.260651 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 13:42:48.272322 tlcl_extend: response is 0
286 13:42:48.279103 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 13:42:48.288841 tlcl_extend: response is 0
288 13:42:48.295769 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 13:42:48.302156 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 13:42:48.308917 BS: verstage times (exec / console): total (unknown) / 142 ms
291 13:42:48.309006
292 13:42:48.309073
293 13:42:48.321914 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 13:42:48.328716 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 13:42:48.331741 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 13:42:48.335283 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 13:42:48.341993 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 13:42:48.345079 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 13:42:48.348670 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 13:42:48.351689 TCO_STS: 0000 0000
301 13:42:48.355320 GEN_PMCON: d0015038 00002200
302 13:42:48.358231 GBLRST_CAUSE: 00000000 00000000
303 13:42:48.358314 HPR_CAUSE0: 00000000
304 13:42:48.361592 prev_sleep_state 5
305 13:42:48.365100 Boot Count incremented to 20436
306 13:42:48.371736 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 13:42:48.378350 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 13:42:48.385440 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 13:42:48.392444 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 13:42:48.396249 Chrome EC: UHEPI supported
311 13:42:48.402924 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 13:42:48.416137 Probing TPM: done!
313 13:42:48.422084 Connected to device vid:did:rid of 1ae0:0028:00
314 13:42:48.433481 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
315 13:42:48.440995 Initialized TPM device CR50 revision 0
316 13:42:48.450795 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 13:42:48.458399 MRC: Hash idx 0x100b comparison successful.
318 13:42:48.461472 MRC cache found, size faa8
319 13:42:48.461572 bootmode is set to: 2
320 13:42:48.464286 SPD index = 0
321 13:42:48.470791 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 13:42:48.473870 SPD: module type is LPDDR4X
323 13:42:48.477123 SPD: module part number is MT53E512M64D4NW-046
324 13:42:48.484159 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 13:42:48.487428 SPD: device width 16 bits, bus width 16 bits
326 13:42:48.494013 SPD: module size is 1024 MB (per channel)
327 13:42:48.925233 CBMEM:
328 13:42:48.929778 IMD: root @ 0x76fff000 254 entries.
329 13:42:48.932211 IMD: root @ 0x76ffec00 62 entries.
330 13:42:48.935201 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 13:42:48.942010 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 13:42:48.945378 External stage cache:
333 13:42:48.948517 IMD: root @ 0x7b3ff000 254 entries.
334 13:42:48.951838 IMD: root @ 0x7b3fec00 62 entries.
335 13:42:48.967087 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 13:42:48.973956 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 13:42:48.980431 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 13:42:48.994401 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 13:42:49.001409 cse_lite: Skip switching to RW in the recovery path
340 13:42:49.001545 8 DIMMs found
341 13:42:49.001615 SMM Memory Map
342 13:42:49.005012 SMRAM : 0x7b000000 0x800000
343 13:42:49.011582 Subregion 0: 0x7b000000 0x200000
344 13:42:49.011705 Subregion 1: 0x7b200000 0x200000
345 13:42:49.014811 Subregion 2: 0x7b400000 0x400000
346 13:42:49.018422 top_of_ram = 0x77000000
347 13:42:49.025107 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 13:42:49.028540 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 13:42:49.034778 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 13:42:49.038796 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 13:42:49.048391 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 13:42:49.054796 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 13:42:49.064900 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 13:42:49.068287 Processing 211 relocs. Offset value of 0x74c0b000
355 13:42:49.077335 BS: romstage times (exec / console): total (unknown) / 277 ms
356 13:42:49.083292
357 13:42:49.083377
358 13:42:49.093574 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 13:42:49.096527 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 13:42:49.106617 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 13:42:49.113216 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 13:42:49.119791 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 13:42:49.126770 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 13:42:49.173334 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 13:42:49.180364 Processing 5008 relocs. Offset value of 0x75d98000
366 13:42:49.183191 BS: postcar times (exec / console): total (unknown) / 59 ms
367 13:42:49.186360
368 13:42:49.186442
369 13:42:49.196696 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 13:42:49.196780 Normal boot
371 13:42:49.199638 FW_CONFIG value is 0x804c02
372 13:42:49.202976 PCI: 00:07.0 disabled by fw_config
373 13:42:49.206444 PCI: 00:07.1 disabled by fw_config
374 13:42:49.209892 PCI: 00:0d.2 disabled by fw_config
375 13:42:49.213584 PCI: 00:1c.7 disabled by fw_config
376 13:42:49.219761 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 13:42:49.226827 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 13:42:49.229712 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 13:42:49.233051 GENERIC: 0.0 disabled by fw_config
380 13:42:49.236506 GENERIC: 1.0 disabled by fw_config
381 13:42:49.243140 fw_config match found: DB_USB=USB3_ACTIVE
382 13:42:49.246257 fw_config match found: DB_USB=USB3_ACTIVE
383 13:42:49.249958 fw_config match found: DB_USB=USB3_ACTIVE
384 13:42:49.256486 fw_config match found: DB_USB=USB3_ACTIVE
385 13:42:49.260083 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 13:42:49.266396 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 13:42:49.276253 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 13:42:49.282945 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 13:42:49.286331 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 13:42:49.292994 microcode: Update skipped, already up-to-date
391 13:42:49.299787 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 13:42:49.327030 Detected 4 core, 8 thread CPU.
393 13:42:49.330180 Setting up SMI for CPU
394 13:42:49.333598 IED base = 0x7b400000
395 13:42:49.333680 IED size = 0x00400000
396 13:42:49.337059 Will perform SMM setup.
397 13:42:49.344276 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 13:42:49.349867 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 13:42:49.356566 Processing 16 relocs. Offset value of 0x00030000
400 13:42:49.360099 Attempting to start 7 APs
401 13:42:49.363198 Waiting for 10ms after sending INIT.
402 13:42:49.378930 Waiting for 1st SIPI to complete...done.
403 13:42:49.379011 AP: slot 1 apic_id 1.
404 13:42:49.386140 Waiting for 2nd SIPI to complete...done.
405 13:42:49.386220 AP: slot 2 apic_id 7.
406 13:42:49.389426 AP: slot 5 apic_id 6.
407 13:42:49.392926 AP: slot 4 apic_id 4.
408 13:42:49.393005 AP: slot 7 apic_id 5.
409 13:42:49.395728 AP: slot 6 apic_id 3.
410 13:42:49.398983 AP: slot 3 apic_id 2.
411 13:42:49.406090 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 13:42:49.412498 Processing 13 relocs. Offset value of 0x00038000
413 13:42:49.412577 Unable to locate Global NVS
414 13:42:49.422388 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 13:42:49.425789 Installing permanent SMM handler to 0x7b000000
416 13:42:49.435573 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 13:42:49.438745 Processing 794 relocs. Offset value of 0x7b010000
418 13:42:49.448958 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 13:42:49.451896 Processing 13 relocs. Offset value of 0x7b008000
420 13:42:49.459129 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 13:42:49.465635 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 13:42:49.468715 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 13:42:49.475497 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 13:42:49.481809 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 13:42:49.489002 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 13:42:49.495182 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 13:42:49.495263 Unable to locate Global NVS
428 13:42:49.501776 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 13:42:49.507165 Clearing SMI status registers
430 13:42:49.510104 SMI_STS: PM1
431 13:42:49.510184 PM1_STS: PWRBTN
432 13:42:49.520716 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 13:42:49.520796 In relocation handler: CPU 0
434 13:42:49.527231 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 13:42:49.530029 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 13:42:49.533475 Relocation complete.
437 13:42:49.540203 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 13:42:49.543383 In relocation handler: CPU 1
439 13:42:49.547491 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 13:42:49.550323 Relocation complete.
441 13:42:49.557092 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 13:42:49.560549 In relocation handler: CPU 3
443 13:42:49.563216 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 13:42:49.569976 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 13:42:49.570056 Relocation complete.
446 13:42:49.576864 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
447 13:42:49.579704 In relocation handler: CPU 5
448 13:42:49.586800 New SMBASE=0x7affec00 IEDBASE=0x7b400000
449 13:42:49.590141 Writing SMRR. base = 0x7b000006, mask=0xff800c00
450 13:42:49.593302 Relocation complete.
451 13:42:49.600086 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
452 13:42:49.603107 In relocation handler: CPU 2
453 13:42:49.606645 New SMBASE=0x7afff800 IEDBASE=0x7b400000
454 13:42:49.609926 Relocation complete.
455 13:42:49.616266 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
456 13:42:49.619987 In relocation handler: CPU 6
457 13:42:49.622991 New SMBASE=0x7affe800 IEDBASE=0x7b400000
458 13:42:49.626513 Relocation complete.
459 13:42:49.633103 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
460 13:42:49.636475 In relocation handler: CPU 7
461 13:42:49.640042 New SMBASE=0x7affe400 IEDBASE=0x7b400000
462 13:42:49.640124 Relocation complete.
463 13:42:49.650188 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
464 13:42:49.653322 In relocation handler: CPU 4
465 13:42:49.656881 New SMBASE=0x7afff000 IEDBASE=0x7b400000
466 13:42:49.659856 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 13:42:49.663228 Relocation complete.
468 13:42:49.666446 Initializing CPU #0
469 13:42:49.670025 CPU: vendor Intel device 806c1
470 13:42:49.673298 CPU: family 06, model 8c, stepping 01
471 13:42:49.673382 Clearing out pending MCEs
472 13:42:49.676392 Setting up local APIC...
473 13:42:49.679874 apic_id: 0x00 done.
474 13:42:49.683293 Turbo is available but hidden
475 13:42:49.687183 Turbo is available and visible
476 13:42:49.690886 microcode: Update skipped, already up-to-date
477 13:42:49.694335 CPU #0 initialized
478 13:42:49.694417 Initializing CPU #2
479 13:42:49.697576 Initializing CPU #5
480 13:42:49.697657 Initializing CPU #7
481 13:42:49.700613 Initializing CPU #4
482 13:42:49.704009 CPU: vendor Intel device 806c1
483 13:42:49.707521 CPU: family 06, model 8c, stepping 01
484 13:42:49.710550 CPU: vendor Intel device 806c1
485 13:42:49.713968 CPU: family 06, model 8c, stepping 01
486 13:42:49.718041 Clearing out pending MCEs
487 13:42:49.720567 Clearing out pending MCEs
488 13:42:49.723870 Setting up local APIC...
489 13:42:49.723965 Initializing CPU #3
490 13:42:49.727481 Initializing CPU #6
491 13:42:49.730743 CPU: vendor Intel device 806c1
492 13:42:49.734324 CPU: family 06, model 8c, stepping 01
493 13:42:49.737265 CPU: vendor Intel device 806c1
494 13:42:49.740635 CPU: family 06, model 8c, stepping 01
495 13:42:49.744026 Clearing out pending MCEs
496 13:42:49.747208 Clearing out pending MCEs
497 13:42:49.747290 Setting up local APIC...
498 13:42:49.750901 CPU: vendor Intel device 806c1
499 13:42:49.754143 CPU: family 06, model 8c, stepping 01
500 13:42:49.756943 CPU: vendor Intel device 806c1
501 13:42:49.761595 CPU: family 06, model 8c, stepping 01
502 13:42:49.763628 Initializing CPU #1
503 13:42:49.767289 Clearing out pending MCEs
504 13:42:49.770979 Clearing out pending MCEs
505 13:42:49.771060 Setting up local APIC...
506 13:42:49.773603 Setting up local APIC...
507 13:42:49.777718 apic_id: 0x07 done.
508 13:42:49.780384 Setting up local APIC...
509 13:42:49.780465 Setting up local APIC...
510 13:42:49.783599 apic_id: 0x05 done.
511 13:42:49.787137 apic_id: 0x04 done.
512 13:42:49.790198 microcode: Update skipped, already up-to-date
513 13:42:49.793929 microcode: Update skipped, already up-to-date
514 13:42:49.797514 CPU #7 initialized
515 13:42:49.800337 CPU #4 initialized
516 13:42:49.800418 apic_id: 0x02 done.
517 13:42:49.803695 apic_id: 0x03 done.
518 13:42:49.807089 microcode: Update skipped, already up-to-date
519 13:42:49.813407 microcode: Update skipped, already up-to-date
520 13:42:49.813488 CPU #3 initialized
521 13:42:49.817520 CPU #6 initialized
522 13:42:49.820972 microcode: Update skipped, already up-to-date
523 13:42:49.823958 apic_id: 0x06 done.
524 13:42:49.824039 CPU #2 initialized
525 13:42:49.830679 microcode: Update skipped, already up-to-date
526 13:42:49.834108 CPU: vendor Intel device 806c1
527 13:42:49.836778 CPU: family 06, model 8c, stepping 01
528 13:42:49.840367 Clearing out pending MCEs
529 13:42:49.840458 CPU #5 initialized
530 13:42:49.843266 Setting up local APIC...
531 13:42:49.846839 apic_id: 0x01 done.
532 13:42:49.850098 microcode: Update skipped, already up-to-date
533 13:42:49.853613 CPU #1 initialized
534 13:42:49.856713 bsp_do_flight_plan done after 468 msecs.
535 13:42:49.860130 CPU: frequency set to 4000 MHz
536 13:42:49.860217 Enabling SMIs.
537 13:42:49.867185 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 13:42:49.884187 SATAXPCIE1 indicates PCIe NVMe is present
539 13:42:49.887450 Probing TPM: done!
540 13:42:49.890773 Connected to device vid:did:rid of 1ae0:0028:00
541 13:42:49.901517 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
542 13:42:49.904976 Initialized TPM device CR50 revision 0
543 13:42:49.908142 Enabling S0i3.4
544 13:42:49.914965 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 13:42:49.917926 Found a VBT of 8704 bytes after decompression
546 13:42:49.924630 cse_lite: CSE RO boot. HybridStorageMode disabled
547 13:42:49.931307 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 13:42:50.008349 FSPS returned 0
549 13:42:50.011938 Executing Phase 1 of FspMultiPhaseSiInit
550 13:42:50.021753 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 13:42:50.024741 port C0 DISC req: usage 1 usb3 1 usb2 5
552 13:42:50.028417 Raw Buffer output 0 00000511
553 13:42:50.031832 Raw Buffer output 1 00000000
554 13:42:50.035398 pmc_send_ipc_cmd succeeded
555 13:42:50.042577 port C1 DISC req: usage 1 usb3 2 usb2 3
556 13:42:50.043073 Raw Buffer output 0 00000321
557 13:42:50.044903 Raw Buffer output 1 00000000
558 13:42:50.049316 pmc_send_ipc_cmd succeeded
559 13:42:50.054690 Detected 4 core, 8 thread CPU.
560 13:42:50.058307 Detected 4 core, 8 thread CPU.
561 13:42:50.291703 Display FSP Version Info HOB
562 13:42:50.295415 Reference Code - CPU = a.0.4c.31
563 13:42:50.298692 uCode Version = 0.0.0.86
564 13:42:50.301899 TXT ACM version = ff.ff.ff.ffff
565 13:42:50.305227 Reference Code - ME = a.0.4c.31
566 13:42:50.308695 MEBx version = 0.0.0.0
567 13:42:50.311503 ME Firmware Version = Consumer SKU
568 13:42:50.314871 Reference Code - PCH = a.0.4c.31
569 13:42:50.318136 PCH-CRID Status = Disabled
570 13:42:50.321813 PCH-CRID Original Value = ff.ff.ff.ffff
571 13:42:50.324970 PCH-CRID New Value = ff.ff.ff.ffff
572 13:42:50.328055 OPROM - RST - RAID = ff.ff.ff.ffff
573 13:42:50.331379 PCH Hsio Version = 4.0.0.0
574 13:42:50.334725 Reference Code - SA - System Agent = a.0.4c.31
575 13:42:50.338363 Reference Code - MRC = 2.0.0.1
576 13:42:50.341830 SA - PCIe Version = a.0.4c.31
577 13:42:50.344621 SA-CRID Status = Disabled
578 13:42:50.348459 SA-CRID Original Value = 0.0.0.1
579 13:42:50.351569 SA-CRID New Value = 0.0.0.1
580 13:42:50.355067 OPROM - VBIOS = ff.ff.ff.ffff
581 13:42:50.358652 IO Manageability Engine FW Version = 11.1.4.0
582 13:42:50.362271 PHY Build Version = 0.0.0.e0
583 13:42:50.365511 Thunderbolt(TM) FW Version = 0.0.0.0
584 13:42:50.371555 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 13:42:50.375091 ITSS IRQ Polarities Before:
586 13:42:50.375579 IPC0: 0xffffffff
587 13:42:50.378218 IPC1: 0xffffffff
588 13:42:50.378737 IPC2: 0xffffffff
589 13:42:50.382001 IPC3: 0xffffffff
590 13:42:50.385000 ITSS IRQ Polarities After:
591 13:42:50.385488 IPC0: 0xffffffff
592 13:42:50.388315 IPC1: 0xffffffff
593 13:42:50.388707 IPC2: 0xffffffff
594 13:42:50.391602 IPC3: 0xffffffff
595 13:42:50.394771 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 13:42:50.408551 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 13:42:50.418260 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 13:42:50.431544 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 13:42:50.438319 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 13:42:50.438844 Enumerating buses...
601 13:42:50.445273 Show all devs... Before device enumeration.
602 13:42:50.445797 Root Device: enabled 1
603 13:42:50.448457 DOMAIN: 0000: enabled 1
604 13:42:50.451291 CPU_CLUSTER: 0: enabled 1
605 13:42:50.454656 PCI: 00:00.0: enabled 1
606 13:42:50.455084 PCI: 00:02.0: enabled 1
607 13:42:50.457891 PCI: 00:04.0: enabled 1
608 13:42:50.461730 PCI: 00:05.0: enabled 1
609 13:42:50.465392 PCI: 00:06.0: enabled 0
610 13:42:50.465912 PCI: 00:07.0: enabled 0
611 13:42:50.468097 PCI: 00:07.1: enabled 0
612 13:42:50.471763 PCI: 00:07.2: enabled 0
613 13:42:50.475302 PCI: 00:07.3: enabled 0
614 13:42:50.475818 PCI: 00:08.0: enabled 1
615 13:42:50.478117 PCI: 00:09.0: enabled 0
616 13:42:50.481589 PCI: 00:0a.0: enabled 0
617 13:42:50.482109 PCI: 00:0d.0: enabled 1
618 13:42:50.484615 PCI: 00:0d.1: enabled 0
619 13:42:50.488093 PCI: 00:0d.2: enabled 0
620 13:42:50.491663 PCI: 00:0d.3: enabled 0
621 13:42:50.492218 PCI: 00:0e.0: enabled 0
622 13:42:50.494972 PCI: 00:10.2: enabled 1
623 13:42:50.498322 PCI: 00:10.6: enabled 0
624 13:42:50.501651 PCI: 00:10.7: enabled 0
625 13:42:50.502165 PCI: 00:12.0: enabled 0
626 13:42:50.504822 PCI: 00:12.6: enabled 0
627 13:42:50.508223 PCI: 00:13.0: enabled 0
628 13:42:50.511376 PCI: 00:14.0: enabled 1
629 13:42:50.511796 PCI: 00:14.1: enabled 0
630 13:42:50.514420 PCI: 00:14.2: enabled 1
631 13:42:50.518093 PCI: 00:14.3: enabled 1
632 13:42:50.521427 PCI: 00:15.0: enabled 1
633 13:42:50.521813 PCI: 00:15.1: enabled 1
634 13:42:50.524478 PCI: 00:15.2: enabled 1
635 13:42:50.527827 PCI: 00:15.3: enabled 1
636 13:42:50.528243 PCI: 00:16.0: enabled 1
637 13:42:50.531342 PCI: 00:16.1: enabled 0
638 13:42:50.534797 PCI: 00:16.2: enabled 0
639 13:42:50.538032 PCI: 00:16.3: enabled 0
640 13:42:50.538536 PCI: 00:16.4: enabled 0
641 13:42:50.541988 PCI: 00:16.5: enabled 0
642 13:42:50.544318 PCI: 00:17.0: enabled 1
643 13:42:50.547694 PCI: 00:19.0: enabled 0
644 13:42:50.548257 PCI: 00:19.1: enabled 1
645 13:42:50.551118 PCI: 00:19.2: enabled 0
646 13:42:50.554101 PCI: 00:1c.0: enabled 1
647 13:42:50.557958 PCI: 00:1c.1: enabled 0
648 13:42:50.558444 PCI: 00:1c.2: enabled 0
649 13:42:50.560956 PCI: 00:1c.3: enabled 0
650 13:42:50.564270 PCI: 00:1c.4: enabled 0
651 13:42:50.564656 PCI: 00:1c.5: enabled 0
652 13:42:50.567706 PCI: 00:1c.6: enabled 1
653 13:42:50.571116 PCI: 00:1c.7: enabled 0
654 13:42:50.574582 PCI: 00:1d.0: enabled 1
655 13:42:50.575063 PCI: 00:1d.1: enabled 0
656 13:42:50.578071 PCI: 00:1d.2: enabled 1
657 13:42:50.581092 PCI: 00:1d.3: enabled 0
658 13:42:50.584363 PCI: 00:1e.0: enabled 1
659 13:42:50.584754 PCI: 00:1e.1: enabled 0
660 13:42:50.587696 PCI: 00:1e.2: enabled 1
661 13:42:50.591188 PCI: 00:1e.3: enabled 1
662 13:42:50.594681 PCI: 00:1f.0: enabled 1
663 13:42:50.595167 PCI: 00:1f.1: enabled 0
664 13:42:50.597611 PCI: 00:1f.2: enabled 1
665 13:42:50.601036 PCI: 00:1f.3: enabled 1
666 13:42:50.604202 PCI: 00:1f.4: enabled 0
667 13:42:50.604587 PCI: 00:1f.5: enabled 1
668 13:42:50.607465 PCI: 00:1f.6: enabled 0
669 13:42:50.611116 PCI: 00:1f.7: enabled 0
670 13:42:50.611608 APIC: 00: enabled 1
671 13:42:50.614586 GENERIC: 0.0: enabled 1
672 13:42:50.617699 GENERIC: 0.0: enabled 1
673 13:42:50.620649 GENERIC: 1.0: enabled 1
674 13:42:50.621043 GENERIC: 0.0: enabled 1
675 13:42:50.624410 GENERIC: 1.0: enabled 1
676 13:42:50.627500 USB0 port 0: enabled 1
677 13:42:50.627908 GENERIC: 0.0: enabled 1
678 13:42:50.631288 USB0 port 0: enabled 1
679 13:42:50.634358 GENERIC: 0.0: enabled 1
680 13:42:50.637525 I2C: 00:1a: enabled 1
681 13:42:50.637915 I2C: 00:31: enabled 1
682 13:42:50.640888 I2C: 00:32: enabled 1
683 13:42:50.644179 I2C: 00:10: enabled 1
684 13:42:50.644565 I2C: 00:15: enabled 1
685 13:42:50.647428 GENERIC: 0.0: enabled 0
686 13:42:50.650827 GENERIC: 1.0: enabled 0
687 13:42:50.651328 GENERIC: 0.0: enabled 1
688 13:42:50.654270 SPI: 00: enabled 1
689 13:42:50.657536 SPI: 00: enabled 1
690 13:42:50.658027 PNP: 0c09.0: enabled 1
691 13:42:50.660869 GENERIC: 0.0: enabled 1
692 13:42:50.664111 USB3 port 0: enabled 1
693 13:42:50.664608 USB3 port 1: enabled 1
694 13:42:50.667773 USB3 port 2: enabled 0
695 13:42:50.671162 USB3 port 3: enabled 0
696 13:42:50.673836 USB2 port 0: enabled 0
697 13:42:50.674221 USB2 port 1: enabled 1
698 13:42:50.677945 USB2 port 2: enabled 1
699 13:42:50.681046 USB2 port 3: enabled 0
700 13:42:50.681528 USB2 port 4: enabled 1
701 13:42:50.684200 USB2 port 5: enabled 0
702 13:42:50.687704 USB2 port 6: enabled 0
703 13:42:50.690830 USB2 port 7: enabled 0
704 13:42:50.691318 USB2 port 8: enabled 0
705 13:42:50.693842 USB2 port 9: enabled 0
706 13:42:50.697539 USB3 port 0: enabled 0
707 13:42:50.697925 USB3 port 1: enabled 1
708 13:42:50.701028 USB3 port 2: enabled 0
709 13:42:50.704038 USB3 port 3: enabled 0
710 13:42:50.704519 GENERIC: 0.0: enabled 1
711 13:42:50.708032 GENERIC: 1.0: enabled 1
712 13:42:50.711263 APIC: 01: enabled 1
713 13:42:50.711778 APIC: 07: enabled 1
714 13:42:50.714376 APIC: 02: enabled 1
715 13:42:50.718103 APIC: 04: enabled 1
716 13:42:50.718618 APIC: 06: enabled 1
717 13:42:50.721141 APIC: 03: enabled 1
718 13:42:50.724468 APIC: 05: enabled 1
719 13:42:50.724986 Compare with tree...
720 13:42:50.727704 Root Device: enabled 1
721 13:42:50.731042 DOMAIN: 0000: enabled 1
722 13:42:50.731564 PCI: 00:00.0: enabled 1
723 13:42:50.734304 PCI: 00:02.0: enabled 1
724 13:42:50.737217 PCI: 00:04.0: enabled 1
725 13:42:50.741021 GENERIC: 0.0: enabled 1
726 13:42:50.743927 PCI: 00:05.0: enabled 1
727 13:42:50.744351 PCI: 00:06.0: enabled 0
728 13:42:50.747715 PCI: 00:07.0: enabled 0
729 13:42:50.750985 GENERIC: 0.0: enabled 1
730 13:42:50.754251 PCI: 00:07.1: enabled 0
731 13:42:50.757354 GENERIC: 1.0: enabled 1
732 13:42:50.757793 PCI: 00:07.2: enabled 0
733 13:42:50.760494 GENERIC: 0.0: enabled 1
734 13:42:50.763783 PCI: 00:07.3: enabled 0
735 13:42:50.767356 GENERIC: 1.0: enabled 1
736 13:42:50.770795 PCI: 00:08.0: enabled 1
737 13:42:50.771312 PCI: 00:09.0: enabled 0
738 13:42:50.774176 PCI: 00:0a.0: enabled 0
739 13:42:50.777715 PCI: 00:0d.0: enabled 1
740 13:42:50.780715 USB0 port 0: enabled 1
741 13:42:50.784236 USB3 port 0: enabled 1
742 13:42:50.787673 USB3 port 1: enabled 1
743 13:42:50.788235 USB3 port 2: enabled 0
744 13:42:50.790731 USB3 port 3: enabled 0
745 13:42:50.794033 PCI: 00:0d.1: enabled 0
746 13:42:50.797317 PCI: 00:0d.2: enabled 0
747 13:42:50.801040 GENERIC: 0.0: enabled 1
748 13:42:50.801558 PCI: 00:0d.3: enabled 0
749 13:42:50.804319 PCI: 00:0e.0: enabled 0
750 13:42:50.807348 PCI: 00:10.2: enabled 1
751 13:42:50.810725 PCI: 00:10.6: enabled 0
752 13:42:50.813564 PCI: 00:10.7: enabled 0
753 13:42:50.813986 PCI: 00:12.0: enabled 0
754 13:42:50.817245 PCI: 00:12.6: enabled 0
755 13:42:50.820758 PCI: 00:13.0: enabled 0
756 13:42:50.824212 PCI: 00:14.0: enabled 1
757 13:42:50.824733 USB0 port 0: enabled 1
758 13:42:50.827325 USB2 port 0: enabled 0
759 13:42:50.831327 USB2 port 1: enabled 1
760 13:42:50.834932 USB2 port 2: enabled 1
761 13:42:50.837043 USB2 port 3: enabled 0
762 13:42:50.841035 USB2 port 4: enabled 1
763 13:42:50.841552 USB2 port 5: enabled 0
764 13:42:50.844227 USB2 port 6: enabled 0
765 13:42:50.847452 USB2 port 7: enabled 0
766 13:42:50.850580 USB2 port 8: enabled 0
767 13:42:50.853877 USB2 port 9: enabled 0
768 13:42:50.857094 USB3 port 0: enabled 0
769 13:42:50.857522 USB3 port 1: enabled 1
770 13:42:50.860439 USB3 port 2: enabled 0
771 13:42:50.864158 USB3 port 3: enabled 0
772 13:42:50.867361 PCI: 00:14.1: enabled 0
773 13:42:50.870499 PCI: 00:14.2: enabled 1
774 13:42:50.871023 PCI: 00:14.3: enabled 1
775 13:42:50.873802 GENERIC: 0.0: enabled 1
776 13:42:50.877058 PCI: 00:15.0: enabled 1
777 13:42:50.880552 I2C: 00:1a: enabled 1
778 13:42:50.883679 I2C: 00:31: enabled 1
779 13:42:50.884135 I2C: 00:32: enabled 1
780 13:42:50.887188 PCI: 00:15.1: enabled 1
781 13:42:50.890834 I2C: 00:10: enabled 1
782 13:42:50.894091 PCI: 00:15.2: enabled 1
783 13:42:50.894615 PCI: 00:15.3: enabled 1
784 13:42:50.896921 PCI: 00:16.0: enabled 1
785 13:42:50.900587 PCI: 00:16.1: enabled 0
786 13:42:50.904258 PCI: 00:16.2: enabled 0
787 13:42:50.907189 PCI: 00:16.3: enabled 0
788 13:42:50.907711 PCI: 00:16.4: enabled 0
789 13:42:50.910668 PCI: 00:16.5: enabled 0
790 13:42:50.913634 PCI: 00:17.0: enabled 1
791 13:42:50.917479 PCI: 00:19.0: enabled 0
792 13:42:50.920376 PCI: 00:19.1: enabled 1
793 13:42:50.920897 I2C: 00:15: enabled 1
794 13:42:50.923901 PCI: 00:19.2: enabled 0
795 13:42:50.927551 PCI: 00:1d.0: enabled 1
796 13:42:50.930548 GENERIC: 0.0: enabled 1
797 13:42:50.934461 PCI: 00:1e.0: enabled 1
798 13:42:50.934984 PCI: 00:1e.1: enabled 0
799 13:42:50.937807 PCI: 00:1e.2: enabled 1
800 13:42:50.941194 SPI: 00: enabled 1
801 13:42:50.941617 PCI: 00:1e.3: enabled 1
802 13:42:50.944554 SPI: 00: enabled 1
803 13:42:50.995185 PCI: 00:1f.0: enabled 1
804 13:42:50.995721 PNP: 0c09.0: enabled 1
805 13:42:50.996116 PCI: 00:1f.1: enabled 0
806 13:42:50.996438 PCI: 00:1f.2: enabled 1
807 13:42:50.996742 GENERIC: 0.0: enabled 1
808 13:42:50.997363 GENERIC: 0.0: enabled 1
809 13:42:50.997728 GENERIC: 1.0: enabled 1
810 13:42:50.998057 PCI: 00:1f.3: enabled 1
811 13:42:50.998346 PCI: 00:1f.4: enabled 0
812 13:42:50.998633 PCI: 00:1f.5: enabled 1
813 13:42:50.998919 PCI: 00:1f.6: enabled 0
814 13:42:50.999201 PCI: 00:1f.7: enabled 0
815 13:42:50.999482 CPU_CLUSTER: 0: enabled 1
816 13:42:50.999760 APIC: 00: enabled 1
817 13:42:51.000077 APIC: 01: enabled 1
818 13:42:51.000419 APIC: 07: enabled 1
819 13:42:51.000714 APIC: 02: enabled 1
820 13:42:51.000993 APIC: 04: enabled 1
821 13:42:51.001268 APIC: 06: enabled 1
822 13:42:51.001541 APIC: 03: enabled 1
823 13:42:51.041308 APIC: 05: enabled 1
824 13:42:51.041837 Root Device scanning...
825 13:42:51.042175 scan_static_bus for Root Device
826 13:42:51.042491 DOMAIN: 0000 enabled
827 13:42:51.042793 CPU_CLUSTER: 0 enabled
828 13:42:51.043398 DOMAIN: 0000 scanning...
829 13:42:51.043724 PCI: pci_scan_bus for bus 00
830 13:42:51.044119 PCI: 00:00.0 [8086/0000] ops
831 13:42:51.044425 PCI: 00:00.0 [8086/9a12] enabled
832 13:42:51.044715 PCI: 00:02.0 [8086/0000] bus ops
833 13:42:51.045001 PCI: 00:02.0 [8086/9a40] enabled
834 13:42:51.045345 PCI: 00:04.0 [8086/0000] bus ops
835 13:42:51.045642 PCI: 00:04.0 [8086/9a03] enabled
836 13:42:51.045926 PCI: 00:05.0 [8086/9a19] enabled
837 13:42:51.046203 PCI: 00:07.0 [0000/0000] hidden
838 13:42:51.047326 PCI: 00:08.0 [8086/9a11] enabled
839 13:42:51.047749 PCI: 00:0a.0 [8086/9a0d] disabled
840 13:42:51.049477 PCI: 00:0d.0 [8086/0000] bus ops
841 13:42:51.053209 PCI: 00:0d.0 [8086/9a13] enabled
842 13:42:51.056345 PCI: 00:14.0 [8086/0000] bus ops
843 13:42:51.059578 PCI: 00:14.0 [8086/a0ed] enabled
844 13:42:51.063157 PCI: 00:14.2 [8086/a0ef] enabled
845 13:42:51.066958 PCI: 00:14.3 [8086/0000] bus ops
846 13:42:51.070042 PCI: 00:14.3 [8086/a0f0] enabled
847 13:42:51.073155 PCI: 00:15.0 [8086/0000] bus ops
848 13:42:51.079094 PCI: 00:15.0 [8086/a0e8] enabled
849 13:42:51.083252 PCI: 00:15.1 [8086/0000] bus ops
850 13:42:51.085872 PCI: 00:15.1 [8086/a0e9] enabled
851 13:42:51.089312 PCI: 00:15.2 [8086/0000] bus ops
852 13:42:51.092932 PCI: 00:15.2 [8086/a0ea] enabled
853 13:42:51.095997 PCI: 00:15.3 [8086/0000] bus ops
854 13:42:51.099544 PCI: 00:15.3 [8086/a0eb] enabled
855 13:42:51.100107 PCI: 00:16.0 [8086/0000] ops
856 13:42:51.102975 PCI: 00:16.0 [8086/a0e0] enabled
857 13:42:51.109143 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 13:42:51.112608 PCI: 00:19.0 [8086/0000] bus ops
859 13:42:51.116412 PCI: 00:19.0 [8086/a0c5] disabled
860 13:42:51.119383 PCI: 00:19.1 [8086/0000] bus ops
861 13:42:51.122814 PCI: 00:19.1 [8086/a0c6] enabled
862 13:42:51.126199 PCI: 00:1d.0 [8086/0000] bus ops
863 13:42:51.129480 PCI: 00:1d.0 [8086/a0b0] enabled
864 13:42:51.132731 PCI: 00:1e.0 [8086/0000] ops
865 13:42:51.136164 PCI: 00:1e.0 [8086/a0a8] enabled
866 13:42:51.139180 PCI: 00:1e.2 [8086/0000] bus ops
867 13:42:51.142566 PCI: 00:1e.2 [8086/a0aa] enabled
868 13:42:51.146138 PCI: 00:1e.3 [8086/0000] bus ops
869 13:42:51.149260 PCI: 00:1e.3 [8086/a0ab] enabled
870 13:42:51.152196 PCI: 00:1f.0 [8086/0000] bus ops
871 13:42:51.155884 PCI: 00:1f.0 [8086/a087] enabled
872 13:42:51.159033 RTC Init
873 13:42:51.162058 Set power on after power failure.
874 13:42:51.162492 Disabling Deep S3
875 13:42:51.165733 Disabling Deep S3
876 13:42:51.166159 Disabling Deep S4
877 13:42:51.168766 Disabling Deep S4
878 13:42:51.169188 Disabling Deep S5
879 13:42:51.172496 Disabling Deep S5
880 13:42:51.175142 PCI: 00:1f.2 [0000/0000] hidden
881 13:42:51.178868 PCI: 00:1f.3 [8086/0000] bus ops
882 13:42:51.182450 PCI: 00:1f.3 [8086/a0c8] enabled
883 13:42:51.185550 PCI: 00:1f.5 [8086/0000] bus ops
884 13:42:51.188714 PCI: 00:1f.5 [8086/a0a4] enabled
885 13:42:51.191824 PCI: Leftover static devices:
886 13:42:51.192286 PCI: 00:10.2
887 13:42:51.195146 PCI: 00:10.6
888 13:42:51.195568 PCI: 00:10.7
889 13:42:51.198329 PCI: 00:06.0
890 13:42:51.198752 PCI: 00:07.1
891 13:42:51.199086 PCI: 00:07.2
892 13:42:51.202226 PCI: 00:07.3
893 13:42:51.202760 PCI: 00:09.0
894 13:42:51.205626 PCI: 00:0d.1
895 13:42:51.206159 PCI: 00:0d.2
896 13:42:51.206502 PCI: 00:0d.3
897 13:42:51.208458 PCI: 00:0e.0
898 13:42:51.208884 PCI: 00:12.0
899 13:42:51.212287 PCI: 00:12.6
900 13:42:51.212815 PCI: 00:13.0
901 13:42:51.215135 PCI: 00:14.1
902 13:42:51.215561 PCI: 00:16.1
903 13:42:51.215939 PCI: 00:16.2
904 13:42:51.218757 PCI: 00:16.3
905 13:42:51.219287 PCI: 00:16.4
906 13:42:51.222202 PCI: 00:16.5
907 13:42:51.222769 PCI: 00:17.0
908 13:42:51.223131 PCI: 00:19.2
909 13:42:51.225321 PCI: 00:1e.1
910 13:42:51.225745 PCI: 00:1f.1
911 13:42:51.228489 PCI: 00:1f.4
912 13:42:51.229027 PCI: 00:1f.6
913 13:42:51.231877 PCI: 00:1f.7
914 13:42:51.232376 PCI: Check your devicetree.cb.
915 13:42:51.235087 PCI: 00:02.0 scanning...
916 13:42:51.238797 scan_generic_bus for PCI: 00:02.0
917 13:42:51.245120 scan_generic_bus for PCI: 00:02.0 done
918 13:42:51.249001 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 13:42:51.251320 PCI: 00:04.0 scanning...
920 13:42:51.255010 scan_generic_bus for PCI: 00:04.0
921 13:42:51.255532 GENERIC: 0.0 enabled
922 13:42:51.261462 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 13:42:51.268191 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 13:42:51.271534 PCI: 00:0d.0 scanning...
925 13:42:51.274759 scan_static_bus for PCI: 00:0d.0
926 13:42:51.275171 USB0 port 0 enabled
927 13:42:51.278048 USB0 port 0 scanning...
928 13:42:51.281381 scan_static_bus for USB0 port 0
929 13:42:51.284697 USB3 port 0 enabled
930 13:42:51.285110 USB3 port 1 enabled
931 13:42:51.287875 USB3 port 2 disabled
932 13:42:51.291259 USB3 port 3 disabled
933 13:42:51.291673 USB3 port 0 scanning...
934 13:42:51.294762 scan_static_bus for USB3 port 0
935 13:42:51.298484 scan_static_bus for USB3 port 0 done
936 13:42:51.304777 scan_bus: bus USB3 port 0 finished in 6 msecs
937 13:42:51.307503 USB3 port 1 scanning...
938 13:42:51.311445 scan_static_bus for USB3 port 1
939 13:42:51.314623 scan_static_bus for USB3 port 1 done
940 13:42:51.317723 scan_bus: bus USB3 port 1 finished in 6 msecs
941 13:42:51.320963 scan_static_bus for USB0 port 0 done
942 13:42:51.327878 scan_bus: bus USB0 port 0 finished in 43 msecs
943 13:42:51.330850 scan_static_bus for PCI: 00:0d.0 done
944 13:42:51.334441 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 13:42:51.338297 PCI: 00:14.0 scanning...
946 13:42:51.340847 scan_static_bus for PCI: 00:14.0
947 13:42:51.344657 USB0 port 0 enabled
948 13:42:51.345164 USB0 port 0 scanning...
949 13:42:51.347767 scan_static_bus for USB0 port 0
950 13:42:51.351414 USB2 port 0 disabled
951 13:42:51.354334 USB2 port 1 enabled
952 13:42:51.354751 USB2 port 2 enabled
953 13:42:51.358068 USB2 port 3 disabled
954 13:42:51.360979 USB2 port 4 enabled
955 13:42:51.361489 USB2 port 5 disabled
956 13:42:51.364249 USB2 port 6 disabled
957 13:42:51.367542 USB2 port 7 disabled
958 13:42:51.368079 USB2 port 8 disabled
959 13:42:51.371458 USB2 port 9 disabled
960 13:42:51.371993 USB3 port 0 disabled
961 13:42:51.374407 USB3 port 1 enabled
962 13:42:51.377701 USB3 port 2 disabled
963 13:42:51.378209 USB3 port 3 disabled
964 13:42:51.380946 USB2 port 1 scanning...
965 13:42:51.384535 scan_static_bus for USB2 port 1
966 13:42:51.387616 scan_static_bus for USB2 port 1 done
967 13:42:51.394118 scan_bus: bus USB2 port 1 finished in 6 msecs
968 13:42:51.394533 USB2 port 2 scanning...
969 13:42:51.397506 scan_static_bus for USB2 port 2
970 13:42:51.403920 scan_static_bus for USB2 port 2 done
971 13:42:51.407529 scan_bus: bus USB2 port 2 finished in 6 msecs
972 13:42:51.411136 USB2 port 4 scanning...
973 13:42:51.413877 scan_static_bus for USB2 port 4
974 13:42:51.417063 scan_static_bus for USB2 port 4 done
975 13:42:51.420808 scan_bus: bus USB2 port 4 finished in 6 msecs
976 13:42:51.424567 USB3 port 1 scanning...
977 13:42:51.427723 scan_static_bus for USB3 port 1
978 13:42:51.430909 scan_static_bus for USB3 port 1 done
979 13:42:51.437683 scan_bus: bus USB3 port 1 finished in 6 msecs
980 13:42:51.440641 scan_static_bus for USB0 port 0 done
981 13:42:51.444224 scan_bus: bus USB0 port 0 finished in 93 msecs
982 13:42:51.447590 scan_static_bus for PCI: 00:14.0 done
983 13:42:51.453830 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 13:42:51.454345 PCI: 00:14.3 scanning...
985 13:42:51.458516 scan_static_bus for PCI: 00:14.3
986 13:42:51.461264 GENERIC: 0.0 enabled
987 13:42:51.464299 scan_static_bus for PCI: 00:14.3 done
988 13:42:51.471012 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 13:42:51.471540 PCI: 00:15.0 scanning...
990 13:42:51.477772 scan_static_bus for PCI: 00:15.0
991 13:42:51.478291 I2C: 00:1a enabled
992 13:42:51.481065 I2C: 00:31 enabled
993 13:42:51.481586 I2C: 00:32 enabled
994 13:42:51.484367 scan_static_bus for PCI: 00:15.0 done
995 13:42:51.491052 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
996 13:42:51.494212 PCI: 00:15.1 scanning...
997 13:42:51.497201 scan_static_bus for PCI: 00:15.1
998 13:42:51.497628 I2C: 00:10 enabled
999 13:42:51.500568 scan_static_bus for PCI: 00:15.1 done
1000 13:42:51.507458 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 13:42:51.510492 PCI: 00:15.2 scanning...
1002 13:42:51.513853 scan_static_bus for PCI: 00:15.2
1003 13:42:51.517711 scan_static_bus for PCI: 00:15.2 done
1004 13:42:51.521445 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 13:42:51.524611 PCI: 00:15.3 scanning...
1006 13:42:51.527993 scan_static_bus for PCI: 00:15.3
1007 13:42:51.530968 scan_static_bus for PCI: 00:15.3 done
1008 13:42:51.534336 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 13:42:51.538143 PCI: 00:19.1 scanning...
1010 13:42:51.541013 scan_static_bus for PCI: 00:19.1
1011 13:42:51.544366 I2C: 00:15 enabled
1012 13:42:51.548082 scan_static_bus for PCI: 00:19.1 done
1013 13:42:51.550823 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 13:42:51.554447 PCI: 00:1d.0 scanning...
1015 13:42:51.558484 do_pci_scan_bridge for PCI: 00:1d.0
1016 13:42:51.560996 PCI: pci_scan_bus for bus 01
1017 13:42:51.564201 PCI: 01:00.0 [1c5c/174a] enabled
1018 13:42:51.567814 GENERIC: 0.0 enabled
1019 13:42:51.571090 Enabling Common Clock Configuration
1020 13:42:51.574099 L1 Sub-State supported from root port 29
1021 13:42:51.577707 L1 Sub-State Support = 0xf
1022 13:42:51.580965 CommonModeRestoreTime = 0x28
1023 13:42:51.584691 Power On Value = 0x16, Power On Scale = 0x0
1024 13:42:51.587651 ASPM: Enabled L1
1025 13:42:51.590683 PCIe: Max_Payload_Size adjusted to 128
1026 13:42:51.597519 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 13:42:51.598026 PCI: 00:1e.2 scanning...
1028 13:42:51.604192 scan_generic_bus for PCI: 00:1e.2
1029 13:42:51.604703 SPI: 00 enabled
1030 13:42:51.610684 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 13:42:51.613418 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 13:42:51.616690 PCI: 00:1e.3 scanning...
1033 13:42:51.620797 scan_generic_bus for PCI: 00:1e.3
1034 13:42:51.623774 SPI: 00 enabled
1035 13:42:51.627091 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 13:42:51.633501 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 13:42:51.637080 PCI: 00:1f.0 scanning...
1038 13:42:51.640488 scan_static_bus for PCI: 00:1f.0
1039 13:42:51.641006 PNP: 0c09.0 enabled
1040 13:42:51.643765 PNP: 0c09.0 scanning...
1041 13:42:51.647266 scan_static_bus for PNP: 0c09.0
1042 13:42:51.650558 scan_static_bus for PNP: 0c09.0 done
1043 13:42:51.656884 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 13:42:51.660495 scan_static_bus for PCI: 00:1f.0 done
1045 13:42:51.663785 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 13:42:51.667123 PCI: 00:1f.2 scanning...
1047 13:42:51.670466 scan_static_bus for PCI: 00:1f.2
1048 13:42:51.673621 GENERIC: 0.0 enabled
1049 13:42:51.674131 GENERIC: 0.0 scanning...
1050 13:42:51.677597 scan_static_bus for GENERIC: 0.0
1051 13:42:51.680765 GENERIC: 0.0 enabled
1052 13:42:51.683957 GENERIC: 1.0 enabled
1053 13:42:51.686840 scan_static_bus for GENERIC: 0.0 done
1054 13:42:51.690558 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 13:42:51.697183 scan_static_bus for PCI: 00:1f.2 done
1056 13:42:51.700746 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 13:42:51.703610 PCI: 00:1f.3 scanning...
1058 13:42:51.706947 scan_static_bus for PCI: 00:1f.3
1059 13:42:51.710528 scan_static_bus for PCI: 00:1f.3 done
1060 13:42:51.713265 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 13:42:51.716725 PCI: 00:1f.5 scanning...
1062 13:42:51.720761 scan_generic_bus for PCI: 00:1f.5
1063 13:42:51.723611 scan_generic_bus for PCI: 00:1f.5 done
1064 13:42:51.729944 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 13:42:51.733343 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 13:42:51.736860 scan_static_bus for Root Device done
1067 13:42:51.743363 scan_bus: bus Root Device finished in 736 msecs
1068 13:42:51.743889 done
1069 13:42:51.749975 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 13:42:51.753385 Chrome EC: UHEPI supported
1071 13:42:51.760360 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 13:42:51.766777 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 13:42:51.770292 SPI flash protection: WPSW=0 SRP0=0
1074 13:42:51.773206 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 13:42:51.779923 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 13:42:51.783286 found VGA at PCI: 00:02.0
1077 13:42:51.786617 Setting up VGA for PCI: 00:02.0
1078 13:42:51.789788 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 13:42:51.796580 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 13:42:51.799490 Allocating resources...
1081 13:42:51.800043 Reading resources...
1082 13:42:51.802967 Root Device read_resources bus 0 link: 0
1083 13:42:51.809589 DOMAIN: 0000 read_resources bus 0 link: 0
1084 13:42:51.813049 PCI: 00:04.0 read_resources bus 1 link: 0
1085 13:42:51.819887 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 13:42:51.823542 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 13:42:51.829718 USB0 port 0 read_resources bus 0 link: 0
1088 13:42:51.832836 USB0 port 0 read_resources bus 0 link: 0 done
1089 13:42:51.839538 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 13:42:51.842878 PCI: 00:14.0 read_resources bus 0 link: 0
1091 13:42:51.845938 USB0 port 0 read_resources bus 0 link: 0
1092 13:42:51.853828 USB0 port 0 read_resources bus 0 link: 0 done
1093 13:42:51.856543 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 13:42:51.864073 PCI: 00:14.3 read_resources bus 0 link: 0
1095 13:42:51.867241 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 13:42:51.873979 PCI: 00:15.0 read_resources bus 0 link: 0
1097 13:42:51.877087 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 13:42:51.883762 PCI: 00:15.1 read_resources bus 0 link: 0
1099 13:42:51.887288 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 13:42:51.894313 PCI: 00:19.1 read_resources bus 0 link: 0
1101 13:42:51.897828 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 13:42:51.904124 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 13:42:51.907619 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 13:42:51.914343 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 13:42:51.917408 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 13:42:51.924359 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 13:42:51.927462 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 13:42:51.934024 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 13:42:51.938276 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 13:42:51.941141 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 13:42:51.947405 GENERIC: 0.0 read_resources bus 0 link: 0
1112 13:42:51.950848 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 13:42:51.957885 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 13:42:51.964456 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 13:42:51.967733 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 13:42:51.970891 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 13:42:51.977970 Root Device read_resources bus 0 link: 0 done
1118 13:42:51.981106 Done reading resources.
1119 13:42:51.984255 Show resources in subtree (Root Device)...After reading.
1120 13:42:51.991139 Root Device child on link 0 DOMAIN: 0000
1121 13:42:51.994260 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 13:42:52.004724 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 13:42:52.014198 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 13:42:52.014730 PCI: 00:00.0
1125 13:42:52.024705 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 13:42:52.034004 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 13:42:52.044219 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 13:42:52.054202 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 13:42:52.060303 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 13:42:52.070896 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 13:42:52.080681 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 13:42:52.090890 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 13:42:52.100768 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 13:42:52.110091 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 13:42:52.117160 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 13:42:52.126809 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 13:42:52.137167 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 13:42:52.147408 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 13:42:52.156812 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 13:42:52.163694 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 13:42:52.173434 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 13:42:52.183567 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 13:42:52.193155 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 13:42:52.203982 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 13:42:52.204499 PCI: 00:02.0
1146 13:42:52.216729 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 13:42:52.226201 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 13:42:52.233156 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 13:42:52.239696 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 13:42:52.249970 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 13:42:52.250487 GENERIC: 0.0
1152 13:42:52.252748 PCI: 00:05.0
1153 13:42:52.263146 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 13:42:52.266367 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 13:42:52.270141 GENERIC: 0.0
1156 13:42:52.270583 PCI: 00:08.0
1157 13:42:52.279539 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 13:42:52.283449 PCI: 00:0a.0
1159 13:42:52.286237 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 13:42:52.296384 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 13:42:52.299641 USB0 port 0 child on link 0 USB3 port 0
1162 13:42:52.302864 USB3 port 0
1163 13:42:52.303276 USB3 port 1
1164 13:42:52.306078 USB3 port 2
1165 13:42:52.306490 USB3 port 3
1166 13:42:52.312666 PCI: 00:14.0 child on link 0 USB0 port 0
1167 13:42:52.322543 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 13:42:52.325694 USB0 port 0 child on link 0 USB2 port 0
1169 13:42:52.329281 USB2 port 0
1170 13:42:52.329362 USB2 port 1
1171 13:42:52.332765 USB2 port 2
1172 13:42:52.332845 USB2 port 3
1173 13:42:52.335969 USB2 port 4
1174 13:42:52.336049 USB2 port 5
1175 13:42:52.339586 USB2 port 6
1176 13:42:52.339666 USB2 port 7
1177 13:42:52.342626 USB2 port 8
1178 13:42:52.342706 USB2 port 9
1179 13:42:52.345873 USB3 port 0
1180 13:42:52.345954 USB3 port 1
1181 13:42:52.349262 USB3 port 2
1182 13:42:52.349342 USB3 port 3
1183 13:42:52.352350 PCI: 00:14.2
1184 13:42:52.362580 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 13:42:52.372595 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 13:42:52.375616 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 13:42:52.385878 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 13:42:52.388847 GENERIC: 0.0
1189 13:42:52.392371 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 13:42:52.402231 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 13:42:52.405386 I2C: 00:1a
1192 13:42:52.405469 I2C: 00:31
1193 13:42:52.408949 I2C: 00:32
1194 13:42:52.412230 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 13:42:52.422185 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 13:42:52.422266 I2C: 00:10
1197 13:42:52.425869 PCI: 00:15.2
1198 13:42:52.435628 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 13:42:52.435710 PCI: 00:15.3
1200 13:42:52.445723 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 13:42:52.448896 PCI: 00:16.0
1202 13:42:52.458828 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 13:42:52.458916 PCI: 00:19.0
1204 13:42:52.465452 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 13:42:52.475361 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 13:42:52.475545 I2C: 00:15
1207 13:42:52.478889 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 13:42:52.488738 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 13:42:52.498434 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 13:42:52.509194 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 13:42:52.509583 GENERIC: 0.0
1212 13:42:52.512256 PCI: 01:00.0
1213 13:42:52.522470 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 13:42:52.532210 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 13:42:52.539201 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 13:42:52.542223 PCI: 00:1e.0
1217 13:42:52.552407 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 13:42:52.556189 PCI: 00:1e.2 child on link 0 SPI: 00
1219 13:42:52.565377 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 13:42:52.569079 SPI: 00
1221 13:42:52.572055 PCI: 00:1e.3 child on link 0 SPI: 00
1222 13:42:52.582332 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 13:42:52.582852 SPI: 00
1224 13:42:52.588735 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 13:42:52.595674 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 13:42:52.598556 PNP: 0c09.0
1227 13:42:52.608496 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 13:42:52.611800 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 13:42:52.622028 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 13:42:52.628724 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 13:42:52.635449 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 13:42:52.636017 GENERIC: 0.0
1233 13:42:52.638930 GENERIC: 1.0
1234 13:42:52.639445 PCI: 00:1f.3
1235 13:42:52.648806 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 13:42:52.661802 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 13:42:52.662321 PCI: 00:1f.5
1238 13:42:52.671626 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 13:42:52.674883 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 13:42:52.675291 APIC: 00
1241 13:42:52.678686 APIC: 01
1242 13:42:52.679193 APIC: 07
1243 13:42:52.681602 APIC: 02
1244 13:42:52.682102 APIC: 04
1245 13:42:52.682427 APIC: 06
1246 13:42:52.684540 APIC: 03
1247 13:42:52.684948 APIC: 05
1248 13:42:52.691566 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 13:42:52.698172 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 13:42:52.704922 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 13:42:52.711334 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 13:42:52.714869 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 13:42:52.717874 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 13:42:52.724948 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 13:42:52.731156 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 13:42:52.738171 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 13:42:52.745331 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 13:42:52.754809 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 13:42:52.758216 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 13:42:52.767690 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 13:42:52.774656 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 13:42:52.781147 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 13:42:52.784563 DOMAIN: 0000: Resource ranges:
1264 13:42:52.788353 * Base: 1000, Size: 800, Tag: 100
1265 13:42:52.791663 * Base: 1900, Size: e700, Tag: 100
1266 13:42:52.798040 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 13:42:52.804389 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 13:42:52.811023 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 13:42:52.817733 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 13:42:52.827662 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 13:42:52.833951 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 13:42:52.840669 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 13:42:52.850889 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 13:42:52.857127 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 13:42:52.864435 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 13:42:52.874501 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 13:42:52.881082 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 13:42:52.887568 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 13:42:52.897654 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 13:42:52.903750 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 13:42:52.910886 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 13:42:52.920766 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 13:42:52.927239 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 13:42:52.934076 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 13:42:52.944250 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 13:42:52.950607 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 13:42:52.957147 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 13:42:52.963805 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 13:42:52.974204 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 13:42:52.980410 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 13:42:52.983700 DOMAIN: 0000: Resource ranges:
1292 13:42:52.986925 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 13:42:52.993386 * Base: d0000000, Size: 28000000, Tag: 200
1294 13:42:52.996946 * Base: fa000000, Size: 1000000, Tag: 200
1295 13:42:53.000469 * Base: fb001000, Size: 2fff000, Tag: 200
1296 13:42:53.006925 * Base: fe010000, Size: 2e000, Tag: 200
1297 13:42:53.010496 * Base: fe03f000, Size: d41000, Tag: 200
1298 13:42:53.013970 * Base: fed88000, Size: 8000, Tag: 200
1299 13:42:53.016813 * Base: fed93000, Size: d000, Tag: 200
1300 13:42:53.020259 * Base: feda2000, Size: 1e000, Tag: 200
1301 13:42:53.026724 * Base: fede0000, Size: 1220000, Tag: 200
1302 13:42:53.030980 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 13:42:53.036956 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 13:42:53.043291 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 13:42:53.050105 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 13:42:53.056485 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 13:42:53.063376 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 13:42:53.070673 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 13:42:53.077083 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 13:42:53.083639 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 13:42:53.089938 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 13:42:53.096916 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 13:42:53.103095 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 13:42:53.110079 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 13:42:53.116809 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 13:42:53.123436 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 13:42:53.130220 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 13:42:53.136333 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 13:42:53.143214 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 13:42:53.149746 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 13:42:53.156136 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 13:42:53.163097 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 13:42:53.169584 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 13:42:53.176148 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 13:42:53.186329 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 13:42:53.193041 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 13:42:53.196106 PCI: 00:1d.0: Resource ranges:
1328 13:42:53.200007 * Base: 7fc00000, Size: 100000, Tag: 200
1329 13:42:53.206638 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 13:42:53.213208 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 13:42:53.219267 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 13:42:53.229477 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 13:42:53.236179 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 13:42:53.239523 Root Device assign_resources, bus 0 link: 0
1335 13:42:53.246253 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 13:42:53.252183 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 13:42:53.262798 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 13:42:53.269378 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 13:42:53.279024 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 13:42:53.282727 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 13:42:53.285588 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 13:42:53.296040 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 13:42:53.302071 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 13:42:53.312105 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 13:42:53.315583 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 13:42:53.321925 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 13:42:53.328423 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 13:42:53.331883 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 13:42:53.339051 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 13:42:53.345394 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 13:42:53.356351 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 13:42:53.361939 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 13:42:53.368074 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 13:42:53.372154 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 13:42:53.381920 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 13:42:53.385146 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 13:42:53.388448 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 13:42:53.398575 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 13:42:53.401143 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 13:42:53.408489 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 13:42:53.414439 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 13:42:53.424315 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 13:42:53.431541 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 13:42:53.441068 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 13:42:53.444436 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 13:42:53.447513 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 13:42:53.457634 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 13:42:53.467401 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 13:42:53.477647 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 13:42:53.480606 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 13:42:53.487571 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 13:42:53.497958 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 13:42:53.503748 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 13:42:53.510664 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 13:42:53.517391 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 13:42:53.523884 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 13:42:53.527715 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 13:42:53.533681 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 13:42:53.541153 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 13:42:53.543923 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 13:42:53.550106 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 13:42:53.553281 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 13:42:53.561063 LPC: Trying to open IO window from 800 size 1ff
1384 13:42:53.567227 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 13:42:53.577140 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 13:42:53.583155 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 13:42:53.586634 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 13:42:53.593606 Root Device assign_resources, bus 0 link: 0
1389 13:42:53.597040 Done setting resources.
1390 13:42:53.603469 Show resources in subtree (Root Device)...After assigning values.
1391 13:42:53.607143 Root Device child on link 0 DOMAIN: 0000
1392 13:42:53.610612 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 13:42:53.620261 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 13:42:53.630153 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 13:42:53.630715 PCI: 00:00.0
1396 13:42:53.640090 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 13:42:53.649764 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 13:42:53.659648 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 13:42:53.670107 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 13:42:53.679874 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 13:42:53.686583 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 13:42:53.696294 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 13:42:53.706287 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 13:42:53.716356 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 13:42:53.726808 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 13:42:53.736724 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 13:42:53.743196 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 13:42:53.752627 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 13:42:53.763287 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 13:42:53.772850 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 13:42:53.782720 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 13:42:53.792742 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 13:42:53.799288 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 13:42:53.809136 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 13:42:53.819490 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 13:42:53.822447 PCI: 00:02.0
1417 13:42:53.832837 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 13:42:53.842451 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 13:42:53.852633 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 13:42:53.856016 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 13:42:53.865761 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 13:42:53.869022 GENERIC: 0.0
1423 13:42:53.869479 PCI: 00:05.0
1424 13:42:53.882403 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 13:42:53.885478 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 13:42:53.885941 GENERIC: 0.0
1427 13:42:53.888655 PCI: 00:08.0
1428 13:42:53.898602 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 13:42:53.901919 PCI: 00:0a.0
1430 13:42:53.905970 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 13:42:53.915473 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 13:42:53.918945 USB0 port 0 child on link 0 USB3 port 0
1433 13:42:53.922283 USB3 port 0
1434 13:42:53.922883 USB3 port 1
1435 13:42:53.925654 USB3 port 2
1436 13:42:53.926209 USB3 port 3
1437 13:42:53.932452 PCI: 00:14.0 child on link 0 USB0 port 0
1438 13:42:53.941977 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 13:42:53.945272 USB0 port 0 child on link 0 USB2 port 0
1440 13:42:53.948748 USB2 port 0
1441 13:42:53.949309 USB2 port 1
1442 13:42:53.952162 USB2 port 2
1443 13:42:53.952727 USB2 port 3
1444 13:42:53.955543 USB2 port 4
1445 13:42:53.956050 USB2 port 5
1446 13:42:53.958971 USB2 port 6
1447 13:42:53.962265 USB2 port 7
1448 13:42:53.962727 USB2 port 8
1449 13:42:53.965766 USB2 port 9
1450 13:42:53.966330 USB3 port 0
1451 13:42:53.968813 USB3 port 1
1452 13:42:53.969317 USB3 port 2
1453 13:42:53.972014 USB3 port 3
1454 13:42:53.972471 PCI: 00:14.2
1455 13:42:53.982058 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 13:42:53.992117 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 13:42:53.998826 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 13:42:54.008539 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 13:42:54.009098 GENERIC: 0.0
1460 13:42:54.015211 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 13:42:54.025346 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 13:42:54.025926 I2C: 00:1a
1463 13:42:54.028923 I2C: 00:31
1464 13:42:54.029491 I2C: 00:32
1465 13:42:54.035218 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 13:42:54.045172 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 13:42:54.045746 I2C: 00:10
1468 13:42:54.048657 PCI: 00:15.2
1469 13:42:54.058358 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 13:42:54.058930 PCI: 00:15.3
1471 13:42:54.068235 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 13:42:54.071760 PCI: 00:16.0
1473 13:42:54.081624 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 13:42:54.082194 PCI: 00:19.0
1475 13:42:54.088720 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 13:42:54.098556 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 13:42:54.099125 I2C: 00:15
1478 13:42:54.105113 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 13:42:54.114621 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 13:42:54.124643 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 13:42:54.134924 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 13:42:54.138084 GENERIC: 0.0
1483 13:42:54.138565 PCI: 01:00.0
1484 13:42:54.148400 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 13:42:54.161173 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 13:42:54.171590 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 13:42:54.172205 PCI: 00:1e.0
1488 13:42:54.184747 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 13:42:54.188016 PCI: 00:1e.2 child on link 0 SPI: 00
1490 13:42:54.197951 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 13:42:54.198516 SPI: 00
1492 13:42:54.200858 PCI: 00:1e.3 child on link 0 SPI: 00
1493 13:42:54.214359 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 13:42:54.214914 SPI: 00
1495 13:42:54.218216 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 13:42:54.227752 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 13:42:54.228351 PNP: 0c09.0
1498 13:42:54.237412 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 13:42:54.240785 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 13:42:54.250870 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 13:42:54.261033 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 13:42:54.263941 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 13:42:54.267563 GENERIC: 0.0
1504 13:42:54.271159 GENERIC: 1.0
1505 13:42:54.271718 PCI: 00:1f.3
1506 13:42:54.280804 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 13:42:54.290639 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 13:42:54.294268 PCI: 00:1f.5
1509 13:42:54.304278 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 13:42:54.307544 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 13:42:54.310723 APIC: 00
1512 13:42:54.311281 APIC: 01
1513 13:42:54.311652 APIC: 07
1514 13:42:54.314179 APIC: 02
1515 13:42:54.314742 APIC: 04
1516 13:42:54.315109 APIC: 06
1517 13:42:54.317345 APIC: 03
1518 13:42:54.317954 APIC: 05
1519 13:42:54.320873 Done allocating resources.
1520 13:42:54.327299 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 13:42:54.334460 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 13:42:54.336991 Configure GPIOs for I2S audio on UP4.
1523 13:42:54.344192 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 13:42:54.347719 Enabling resources...
1525 13:42:54.350323 PCI: 00:00.0 subsystem <- 8086/9a12
1526 13:42:54.353679 PCI: 00:00.0 cmd <- 06
1527 13:42:54.357005 PCI: 00:02.0 subsystem <- 8086/9a40
1528 13:42:54.357465 PCI: 00:02.0 cmd <- 03
1529 13:42:54.363876 PCI: 00:04.0 subsystem <- 8086/9a03
1530 13:42:54.364434 PCI: 00:04.0 cmd <- 02
1531 13:42:54.367074 PCI: 00:05.0 subsystem <- 8086/9a19
1532 13:42:54.370689 PCI: 00:05.0 cmd <- 02
1533 13:42:54.373995 PCI: 00:08.0 subsystem <- 8086/9a11
1534 13:42:54.377072 PCI: 00:08.0 cmd <- 06
1535 13:42:54.380517 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 13:42:54.384139 PCI: 00:0d.0 cmd <- 02
1537 13:42:54.387184 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 13:42:54.390599 PCI: 00:14.0 cmd <- 02
1539 13:42:54.393472 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 13:42:54.397036 PCI: 00:14.2 cmd <- 02
1541 13:42:54.400785 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 13:42:54.404316 PCI: 00:14.3 cmd <- 02
1543 13:42:54.407560 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 13:42:54.408162 PCI: 00:15.0 cmd <- 02
1545 13:42:54.414368 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 13:42:54.414920 PCI: 00:15.1 cmd <- 02
1547 13:42:54.416856 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 13:42:54.420242 PCI: 00:15.2 cmd <- 02
1549 13:42:54.423753 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 13:42:54.427055 PCI: 00:15.3 cmd <- 02
1551 13:42:54.430153 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 13:42:54.433560 PCI: 00:16.0 cmd <- 02
1553 13:42:54.436745 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 13:42:54.440407 PCI: 00:19.1 cmd <- 02
1555 13:42:54.443532 PCI: 00:1d.0 bridge ctrl <- 0013
1556 13:42:54.446828 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 13:42:54.449873 PCI: 00:1d.0 cmd <- 06
1558 13:42:54.453192 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 13:42:54.456598 PCI: 00:1e.0 cmd <- 06
1560 13:42:54.459607 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 13:42:54.460099 PCI: 00:1e.2 cmd <- 06
1562 13:42:54.466621 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 13:42:54.467177 PCI: 00:1e.3 cmd <- 02
1564 13:42:54.469828 PCI: 00:1f.0 subsystem <- 8086/a087
1565 13:42:54.473264 PCI: 00:1f.0 cmd <- 407
1566 13:42:54.476534 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 13:42:54.479886 PCI: 00:1f.3 cmd <- 02
1568 13:42:54.483302 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 13:42:54.486530 PCI: 00:1f.5 cmd <- 406
1570 13:42:54.490923 PCI: 01:00.0 cmd <- 02
1571 13:42:54.495286 done.
1572 13:42:54.498798 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 13:42:54.501964 Initializing devices...
1574 13:42:54.504748 Root Device init
1575 13:42:54.508491 Chrome EC: Set SMI mask to 0x0000000000000000
1576 13:42:54.515115 Chrome EC: clear events_b mask to 0x0000000000000000
1577 13:42:54.522190 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 13:42:54.525499 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 13:42:54.532390 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 13:42:54.538846 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 13:42:54.545817 fw_config match found: DB_USB=USB3_ACTIVE
1582 13:42:54.549415 Configure Right Type-C port orientation for retimer
1583 13:42:54.552186 Root Device init finished in 45 msecs
1584 13:42:54.555737 PCI: 00:00.0 init
1585 13:42:54.559092 CPU TDP = 9 Watts
1586 13:42:54.559568 CPU PL1 = 9 Watts
1587 13:42:54.562436 CPU PL2 = 40 Watts
1588 13:42:54.565741 CPU PL4 = 83 Watts
1589 13:42:54.568750 PCI: 00:00.0 init finished in 8 msecs
1590 13:42:54.569233 PCI: 00:02.0 init
1591 13:42:54.572168 GMA: Found VBT in CBFS
1592 13:42:54.576170 GMA: Found valid VBT in CBFS
1593 13:42:54.582337 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 13:42:54.589670 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 13:42:54.592051 PCI: 00:02.0 init finished in 18 msecs
1596 13:42:54.595914 PCI: 00:05.0 init
1597 13:42:54.598804 PCI: 00:05.0 init finished in 0 msecs
1598 13:42:54.602189 PCI: 00:08.0 init
1599 13:42:54.605674 PCI: 00:08.0 init finished in 0 msecs
1600 13:42:54.609335 PCI: 00:14.0 init
1601 13:42:54.612301 PCI: 00:14.0 init finished in 0 msecs
1602 13:42:54.615418 PCI: 00:14.2 init
1603 13:42:54.618554 PCI: 00:14.2 init finished in 0 msecs
1604 13:42:54.622168 PCI: 00:15.0 init
1605 13:42:54.622727 I2C bus 0 version 0x3230302a
1606 13:42:54.628805 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 13:42:54.632549 PCI: 00:15.0 init finished in 6 msecs
1608 13:42:54.633100 PCI: 00:15.1 init
1609 13:42:54.635550 I2C bus 1 version 0x3230302a
1610 13:42:54.638722 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 13:42:54.645272 PCI: 00:15.1 init finished in 6 msecs
1612 13:42:54.645727 PCI: 00:15.2 init
1613 13:42:54.648777 I2C bus 2 version 0x3230302a
1614 13:42:54.651620 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 13:42:54.655464 PCI: 00:15.2 init finished in 6 msecs
1616 13:42:54.658743 PCI: 00:15.3 init
1617 13:42:54.661997 I2C bus 3 version 0x3230302a
1618 13:42:54.665255 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 13:42:54.668364 PCI: 00:15.3 init finished in 6 msecs
1620 13:42:54.672096 PCI: 00:16.0 init
1621 13:42:54.675054 PCI: 00:16.0 init finished in 0 msecs
1622 13:42:54.678437 PCI: 00:19.1 init
1623 13:42:54.682232 I2C bus 5 version 0x3230302a
1624 13:42:54.685836 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 13:42:54.688761 PCI: 00:19.1 init finished in 6 msecs
1626 13:42:54.689233 PCI: 00:1d.0 init
1627 13:42:54.691897 Initializing PCH PCIe bridge.
1628 13:42:54.698296 PCI: 00:1d.0 init finished in 3 msecs
1629 13:42:54.698762 PCI: 00:1f.0 init
1630 13:42:54.705054 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 13:42:54.708721 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 13:42:54.712136 IOAPIC: ID = 0x02
1633 13:42:54.712685 IOAPIC: Dumping registers
1634 13:42:54.715290 reg 0x0000: 0x02000000
1635 13:42:54.718597 reg 0x0001: 0x00770020
1636 13:42:54.721953 reg 0x0002: 0x00000000
1637 13:42:54.725039 PCI: 00:1f.0 init finished in 21 msecs
1638 13:42:54.728461 PCI: 00:1f.2 init
1639 13:42:54.729013 Disabling ACPI via APMC.
1640 13:42:54.733607 APMC done.
1641 13:42:54.736109 PCI: 00:1f.2 init finished in 5 msecs
1642 13:42:54.748136 PCI: 01:00.0 init
1643 13:42:54.751547 PCI: 01:00.0 init finished in 0 msecs
1644 13:42:54.755053 PNP: 0c09.0 init
1645 13:42:54.758032 Google Chrome EC uptime: 8.360 seconds
1646 13:42:54.764442 Google Chrome AP resets since EC boot: 1
1647 13:42:54.768374 Google Chrome most recent AP reset causes:
1648 13:42:54.771771 0.347: 32775 shutdown: entering G3
1649 13:42:54.778308 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 13:42:54.780985 PNP: 0c09.0 init finished in 22 msecs
1651 13:42:54.787040 Devices initialized
1652 13:42:54.790723 Show all devs... After init.
1653 13:42:54.793447 Root Device: enabled 1
1654 13:42:54.793902 DOMAIN: 0000: enabled 1
1655 13:42:54.797410 CPU_CLUSTER: 0: enabled 1
1656 13:42:54.800051 PCI: 00:00.0: enabled 1
1657 13:42:54.803991 PCI: 00:02.0: enabled 1
1658 13:42:54.804545 PCI: 00:04.0: enabled 1
1659 13:42:54.807200 PCI: 00:05.0: enabled 1
1660 13:42:54.810652 PCI: 00:06.0: enabled 0
1661 13:42:54.813924 PCI: 00:07.0: enabled 0
1662 13:42:54.814478 PCI: 00:07.1: enabled 0
1663 13:42:54.816916 PCI: 00:07.2: enabled 0
1664 13:42:54.820260 PCI: 00:07.3: enabled 0
1665 13:42:54.823925 PCI: 00:08.0: enabled 1
1666 13:42:54.824384 PCI: 00:09.0: enabled 0
1667 13:42:54.826741 PCI: 00:0a.0: enabled 0
1668 13:42:54.830378 PCI: 00:0d.0: enabled 1
1669 13:42:54.833915 PCI: 00:0d.1: enabled 0
1670 13:42:54.834476 PCI: 00:0d.2: enabled 0
1671 13:42:54.837036 PCI: 00:0d.3: enabled 0
1672 13:42:54.840586 PCI: 00:0e.0: enabled 0
1673 13:42:54.841145 PCI: 00:10.2: enabled 1
1674 13:42:54.843629 PCI: 00:10.6: enabled 0
1675 13:42:54.846782 PCI: 00:10.7: enabled 0
1676 13:42:54.850662 PCI: 00:12.0: enabled 0
1677 13:42:54.851118 PCI: 00:12.6: enabled 0
1678 13:42:54.853286 PCI: 00:13.0: enabled 0
1679 13:42:54.856604 PCI: 00:14.0: enabled 1
1680 13:42:54.860155 PCI: 00:14.1: enabled 0
1681 13:42:54.860611 PCI: 00:14.2: enabled 1
1682 13:42:54.863472 PCI: 00:14.3: enabled 1
1683 13:42:54.867117 PCI: 00:15.0: enabled 1
1684 13:42:54.869996 PCI: 00:15.1: enabled 1
1685 13:42:54.870553 PCI: 00:15.2: enabled 1
1686 13:42:54.873811 PCI: 00:15.3: enabled 1
1687 13:42:54.876785 PCI: 00:16.0: enabled 1
1688 13:42:54.877240 PCI: 00:16.1: enabled 0
1689 13:42:54.879911 PCI: 00:16.2: enabled 0
1690 13:42:54.883529 PCI: 00:16.3: enabled 0
1691 13:42:54.887069 PCI: 00:16.4: enabled 0
1692 13:42:54.887615 PCI: 00:16.5: enabled 0
1693 13:42:54.890092 PCI: 00:17.0: enabled 0
1694 13:42:54.893118 PCI: 00:19.0: enabled 0
1695 13:42:54.896283 PCI: 00:19.1: enabled 1
1696 13:42:54.896736 PCI: 00:19.2: enabled 0
1697 13:42:54.900479 PCI: 00:1c.0: enabled 1
1698 13:42:54.903206 PCI: 00:1c.1: enabled 0
1699 13:42:54.906759 PCI: 00:1c.2: enabled 0
1700 13:42:54.907317 PCI: 00:1c.3: enabled 0
1701 13:42:54.910314 PCI: 00:1c.4: enabled 0
1702 13:42:54.913403 PCI: 00:1c.5: enabled 0
1703 13:42:54.916506 PCI: 00:1c.6: enabled 1
1704 13:42:54.917065 PCI: 00:1c.7: enabled 0
1705 13:42:54.920055 PCI: 00:1d.0: enabled 1
1706 13:42:54.922856 PCI: 00:1d.1: enabled 0
1707 13:42:54.923542 PCI: 00:1d.2: enabled 1
1708 13:42:54.926108 PCI: 00:1d.3: enabled 0
1709 13:42:54.929909 PCI: 00:1e.0: enabled 1
1710 13:42:54.933096 PCI: 00:1e.1: enabled 0
1711 13:42:54.933651 PCI: 00:1e.2: enabled 1
1712 13:42:54.936870 PCI: 00:1e.3: enabled 1
1713 13:42:54.940269 PCI: 00:1f.0: enabled 1
1714 13:42:54.942818 PCI: 00:1f.1: enabled 0
1715 13:42:54.943273 PCI: 00:1f.2: enabled 1
1716 13:42:54.946728 PCI: 00:1f.3: enabled 1
1717 13:42:54.949751 PCI: 00:1f.4: enabled 0
1718 13:42:54.953337 PCI: 00:1f.5: enabled 1
1719 13:42:54.953888 PCI: 00:1f.6: enabled 0
1720 13:42:54.956803 PCI: 00:1f.7: enabled 0
1721 13:42:54.959682 APIC: 00: enabled 1
1722 13:42:54.960419 GENERIC: 0.0: enabled 1
1723 13:42:54.962955 GENERIC: 0.0: enabled 1
1724 13:42:54.966065 GENERIC: 1.0: enabled 1
1725 13:42:54.970348 GENERIC: 0.0: enabled 1
1726 13:42:54.970906 GENERIC: 1.0: enabled 1
1727 13:42:54.972529 USB0 port 0: enabled 1
1728 13:42:54.976416 GENERIC: 0.0: enabled 1
1729 13:42:54.976962 USB0 port 0: enabled 1
1730 13:42:54.979311 GENERIC: 0.0: enabled 1
1731 13:42:54.982714 I2C: 00:1a: enabled 1
1732 13:42:54.986070 I2C: 00:31: enabled 1
1733 13:42:54.986533 I2C: 00:32: enabled 1
1734 13:42:54.989309 I2C: 00:10: enabled 1
1735 13:42:54.992811 I2C: 00:15: enabled 1
1736 13:42:54.993313 GENERIC: 0.0: enabled 0
1737 13:42:54.995918 GENERIC: 1.0: enabled 0
1738 13:42:54.999240 GENERIC: 0.0: enabled 1
1739 13:42:54.999700 SPI: 00: enabled 1
1740 13:42:55.003255 SPI: 00: enabled 1
1741 13:42:55.006338 PNP: 0c09.0: enabled 1
1742 13:42:55.006892 GENERIC: 0.0: enabled 1
1743 13:42:55.009438 USB3 port 0: enabled 1
1744 13:42:55.012854 USB3 port 1: enabled 1
1745 13:42:55.015908 USB3 port 2: enabled 0
1746 13:42:55.016363 USB3 port 3: enabled 0
1747 13:42:55.019678 USB2 port 0: enabled 0
1748 13:42:55.022851 USB2 port 1: enabled 1
1749 13:42:55.023402 USB2 port 2: enabled 1
1750 13:42:55.026009 USB2 port 3: enabled 0
1751 13:42:55.029639 USB2 port 4: enabled 1
1752 13:42:55.030188 USB2 port 5: enabled 0
1753 13:42:55.032479 USB2 port 6: enabled 0
1754 13:42:55.036271 USB2 port 7: enabled 0
1755 13:42:55.039519 USB2 port 8: enabled 0
1756 13:42:55.040096 USB2 port 9: enabled 0
1757 13:42:55.042596 USB3 port 0: enabled 0
1758 13:42:55.046032 USB3 port 1: enabled 1
1759 13:42:55.046577 USB3 port 2: enabled 0
1760 13:42:55.049181 USB3 port 3: enabled 0
1761 13:42:55.052565 GENERIC: 0.0: enabled 1
1762 13:42:55.056748 GENERIC: 1.0: enabled 1
1763 13:42:55.057203 APIC: 01: enabled 1
1764 13:42:55.059387 APIC: 07: enabled 1
1765 13:42:55.059929 APIC: 02: enabled 1
1766 13:42:55.062875 APIC: 04: enabled 1
1767 13:42:55.066171 APIC: 06: enabled 1
1768 13:42:55.066624 APIC: 03: enabled 1
1769 13:42:55.069295 APIC: 05: enabled 1
1770 13:42:55.072373 PCI: 01:00.0: enabled 1
1771 13:42:55.075884 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1772 13:42:55.083045 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 13:42:55.085881 ELOG: NV offset 0xf30000 size 0x1000
1774 13:42:55.092641 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 13:42:55.099378 ELOG: Event(17) added with size 13 at 2023-06-07 13:42:53 UTC
1776 13:42:55.105409 ELOG: Event(92) added with size 9 at 2023-06-07 13:42:53 UTC
1777 13:42:55.112164 ELOG: Event(93) added with size 9 at 2023-06-07 13:42:53 UTC
1778 13:42:55.119128 ELOG: Event(9E) added with size 10 at 2023-06-07 13:42:53 UTC
1779 13:42:55.125812 ELOG: Event(9F) added with size 14 at 2023-06-07 13:42:53 UTC
1780 13:42:55.132623 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 13:42:55.135477 ELOG: Event(A1) added with size 10 at 2023-06-07 13:42:53 UTC
1782 13:42:55.145964 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1783 13:42:55.152328 ELOG: Event(A0) added with size 9 at 2023-06-07 13:42:53 UTC
1784 13:42:55.155515 elog_add_boot_reason: Logged dev mode boot
1785 13:42:55.162227 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1786 13:42:55.162840 Finalize devices...
1787 13:42:55.165522 Devices finalized
1788 13:42:55.172406 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1789 13:42:55.175892 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1790 13:42:55.181673 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1791 13:42:55.184963 ME: HFSTS1 : 0x80030055
1792 13:42:55.191566 ME: HFSTS2 : 0x30280116
1793 13:42:55.195232 ME: HFSTS3 : 0x00000050
1794 13:42:55.198590 ME: HFSTS4 : 0x00004000
1795 13:42:55.204938 ME: HFSTS5 : 0x00000000
1796 13:42:55.208894 ME: HFSTS6 : 0x00400006
1797 13:42:55.212006 ME: Manufacturing Mode : YES
1798 13:42:55.215083 ME: SPI Protection Mode Enabled : NO
1799 13:42:55.218450 ME: FW Partition Table : OK
1800 13:42:55.225129 ME: Bringup Loader Failure : NO
1801 13:42:55.228132 ME: Firmware Init Complete : NO
1802 13:42:55.231809 ME: Boot Options Present : NO
1803 13:42:55.235363 ME: Update In Progress : NO
1804 13:42:55.239186 ME: D0i3 Support : YES
1805 13:42:55.241944 ME: Low Power State Enabled : NO
1806 13:42:55.245108 ME: CPU Replaced : YES
1807 13:42:55.248493 ME: CPU Replacement Valid : YES
1808 13:42:55.255085 ME: Current Working State : 5
1809 13:42:55.258488 ME: Current Operation State : 1
1810 13:42:55.261768 ME: Current Operation Mode : 3
1811 13:42:55.264805 ME: Error Code : 0
1812 13:42:55.268395 ME: Enhanced Debug Mode : NO
1813 13:42:55.271938 ME: CPU Debug Disabled : YES
1814 13:42:55.275387 ME: TXT Support : NO
1815 13:42:55.281289 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1816 13:42:55.287963 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1817 13:42:55.291255 CBFS: 'fallback/slic' not found.
1818 13:42:55.294515 ACPI: Writing ACPI tables at 76b01000.
1819 13:42:55.297980 ACPI: * FACS
1820 13:42:55.298439 ACPI: * DSDT
1821 13:42:55.304838 Ramoops buffer: 0x100000@0x76a00000.
1822 13:42:55.308430 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1823 13:42:55.311086 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1824 13:42:55.315698 Google Chrome EC: version:
1825 13:42:55.318713 ro: voema_v2.0.7540-147f8d37d1
1826 13:42:55.322281 rw: voema_v2.0.7540-147f8d37d1
1827 13:42:55.325405 running image: 2
1828 13:42:55.332162 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1829 13:42:55.335557 ACPI: * FADT
1830 13:42:55.336063 SCI is IRQ9
1831 13:42:55.338506 ACPI: added table 1/32, length now 40
1832 13:42:55.342416 ACPI: * SSDT
1833 13:42:55.345585 Found 1 CPU(s) with 8 core(s) each.
1834 13:42:55.348569 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1835 13:42:55.355088 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1836 13:42:55.359267 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1837 13:42:55.361806 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1838 13:42:55.368470 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1839 13:42:55.375253 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1840 13:42:55.378798 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1841 13:42:55.385006 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1842 13:42:55.391633 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1843 13:42:55.395174 \_SB.PCI0.RP09: Added StorageD3Enable property
1844 13:42:55.398348 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1845 13:42:55.404735 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1846 13:42:55.411960 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1847 13:42:55.415164 PS2K: Passing 80 keymaps to kernel
1848 13:42:55.421530 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1849 13:42:55.428738 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1850 13:42:55.435062 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1851 13:42:55.441582 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1852 13:42:55.448388 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1853 13:42:55.454973 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1854 13:42:55.461478 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1855 13:42:55.468285 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1856 13:42:55.471436 ACPI: added table 2/32, length now 44
1857 13:42:55.474972 ACPI: * MCFG
1858 13:42:55.478250 ACPI: added table 3/32, length now 48
1859 13:42:55.478806 ACPI: * TPM2
1860 13:42:55.481316 TPM2 log created at 0x769f0000
1861 13:42:55.485153 ACPI: added table 4/32, length now 52
1862 13:42:55.488225 ACPI: * MADT
1863 13:42:55.488750 SCI is IRQ9
1864 13:42:55.491374 ACPI: added table 5/32, length now 56
1865 13:42:55.494824 current = 76b09850
1866 13:42:55.495283 ACPI: * DMAR
1867 13:42:55.501100 ACPI: added table 6/32, length now 60
1868 13:42:55.504423 ACPI: added table 7/32, length now 64
1869 13:42:55.504841 ACPI: * HPET
1870 13:42:55.507903 ACPI: added table 8/32, length now 68
1871 13:42:55.511137 ACPI: done.
1872 13:42:55.514554 ACPI tables: 35216 bytes.
1873 13:42:55.514995 smbios_write_tables: 769ef000
1874 13:42:55.517851 EC returned error result code 3
1875 13:42:55.521114 Couldn't obtain OEM name from CBI
1876 13:42:55.525208 Create SMBIOS type 16
1877 13:42:55.528275 Create SMBIOS type 17
1878 13:42:55.531735 GENERIC: 0.0 (WIFI Device)
1879 13:42:55.532299 SMBIOS tables: 1750 bytes.
1880 13:42:55.538324 Writing table forward entry at 0x00000500
1881 13:42:55.544938 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1882 13:42:55.548655 Writing coreboot table at 0x76b25000
1883 13:42:55.554855 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1884 13:42:55.557943 1. 0000000000001000-000000000009ffff: RAM
1885 13:42:55.561544 2. 00000000000a0000-00000000000fffff: RESERVED
1886 13:42:55.568090 3. 0000000000100000-00000000769eefff: RAM
1887 13:42:55.570988 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1888 13:42:55.577932 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1889 13:42:55.584637 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1890 13:42:55.587741 7. 0000000077000000-000000007fbfffff: RESERVED
1891 13:42:55.591250 8. 00000000c0000000-00000000cfffffff: RESERVED
1892 13:42:55.597665 9. 00000000f8000000-00000000f9ffffff: RESERVED
1893 13:42:55.600995 10. 00000000fb000000-00000000fb000fff: RESERVED
1894 13:42:55.607538 11. 00000000fe000000-00000000fe00ffff: RESERVED
1895 13:42:55.610922 12. 00000000fed80000-00000000fed87fff: RESERVED
1896 13:42:55.617791 13. 00000000fed90000-00000000fed92fff: RESERVED
1897 13:42:55.620943 14. 00000000feda0000-00000000feda1fff: RESERVED
1898 13:42:55.627590 15. 00000000fedc0000-00000000feddffff: RESERVED
1899 13:42:55.630894 16. 0000000100000000-00000002803fffff: RAM
1900 13:42:55.634146 Passing 4 GPIOs to payload:
1901 13:42:55.637464 NAME | PORT | POLARITY | VALUE
1902 13:42:55.644522 lid | undefined | high | high
1903 13:42:55.647310 power | undefined | high | low
1904 13:42:55.654011 oprom | undefined | high | low
1905 13:42:55.661100 EC in RW | 0x000000e5 | high | high
1906 13:42:55.667228 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 6ab5
1907 13:42:55.667329 coreboot table: 1576 bytes.
1908 13:42:55.674485 IMD ROOT 0. 0x76fff000 0x00001000
1909 13:42:55.677244 IMD SMALL 1. 0x76ffe000 0x00001000
1910 13:42:55.680634 FSP MEMORY 2. 0x76c4e000 0x003b0000
1911 13:42:55.683958 VPD 3. 0x76c4d000 0x00000367
1912 13:42:55.687251 RO MCACHE 4. 0x76c4c000 0x00000fdc
1913 13:42:55.690490 CONSOLE 5. 0x76c2c000 0x00020000
1914 13:42:55.694330 FMAP 6. 0x76c2b000 0x00000578
1915 13:42:55.697480 TIME STAMP 7. 0x76c2a000 0x00000910
1916 13:42:55.701225 VBOOT WORK 8. 0x76c16000 0x00014000
1917 13:42:55.707140 ROMSTG STCK 9. 0x76c15000 0x00001000
1918 13:42:55.710948 AFTER CAR 10. 0x76c0a000 0x0000b000
1919 13:42:55.714246 RAMSTAGE 11. 0x76b97000 0x00073000
1920 13:42:55.717590 REFCODE 12. 0x76b42000 0x00055000
1921 13:42:55.721479 SMM BACKUP 13. 0x76b32000 0x00010000
1922 13:42:55.724445 4f444749 14. 0x76b30000 0x00002000
1923 13:42:55.727496 EXT VBT15. 0x76b2d000 0x0000219f
1924 13:42:55.730731 COREBOOT 16. 0x76b25000 0x00008000
1925 13:42:55.734041 ACPI 17. 0x76b01000 0x00024000
1926 13:42:55.740465 ACPI GNVS 18. 0x76b00000 0x00001000
1927 13:42:55.743746 RAMOOPS 19. 0x76a00000 0x00100000
1928 13:42:55.747256 TPM2 TCGLOG20. 0x769f0000 0x00010000
1929 13:42:55.750991 SMBIOS 21. 0x769ef000 0x00000800
1930 13:42:55.751070 IMD small region:
1931 13:42:55.757500 IMD ROOT 0. 0x76ffec00 0x00000400
1932 13:42:55.760546 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1933 13:42:55.763800 POWER STATE 2. 0x76ffeb80 0x00000044
1934 13:42:55.767407 ROMSTAGE 3. 0x76ffeb60 0x00000004
1935 13:42:55.770772 MEM INFO 4. 0x76ffe980 0x000001e0
1936 13:42:55.777389 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1937 13:42:55.780939 MTRR: Physical address space:
1938 13:42:55.787688 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1939 13:42:55.794832 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1940 13:42:55.800747 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1941 13:42:55.807435 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1942 13:42:55.810624 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1943 13:42:55.817648 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1944 13:42:55.824462 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1945 13:42:55.827386 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 13:42:55.833910 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 13:42:55.837390 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 13:42:55.841006 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 13:42:55.843982 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 13:42:55.851226 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 13:42:55.853868 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 13:42:55.857098 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 13:42:55.860932 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 13:42:55.867828 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 13:42:55.870902 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 13:42:55.874031 call enable_fixed_mtrr()
1957 13:42:55.877350 CPU physical address size: 39 bits
1958 13:42:55.880745 MTRR: default type WB/UC MTRR counts: 6/6.
1959 13:42:55.883981 MTRR: UC selected as default type.
1960 13:42:55.890676 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1961 13:42:55.897232 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1962 13:42:55.903939 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1963 13:42:55.910512 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1964 13:42:55.916946 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1965 13:42:55.923740 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1966 13:42:55.927055 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 13:42:55.933475 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 13:42:55.937273 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 13:42:55.940215 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 13:42:55.943756 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 13:42:55.950370 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 13:42:55.953589 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 13:42:55.956923 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 13:42:55.959905 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 13:42:55.963557 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 13:42:55.970130 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 13:42:55.973691 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 13:42:55.976624 call enable_fixed_mtrr()
1979 13:42:55.979952 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 13:42:55.983587 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 13:42:55.990222 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 13:42:55.993379 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 13:42:55.996506 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 13:42:56.000255 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 13:42:56.006763 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 13:42:56.010220 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 13:42:56.013672 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 13:42:56.016395 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 13:42:56.020800 CPU physical address size: 39 bits
1990 13:42:56.027557 call enable_fixed_mtrr()
1991 13:42:56.030878 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 13:42:56.034558 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 13:42:56.037455 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 13:42:56.043821 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 13:42:56.047152 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 13:42:56.051018 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 13:42:56.053763 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 13:42:56.057485 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 13:42:56.064116 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 13:42:56.066945 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 13:42:56.070461 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 13:42:56.073529 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 13:42:56.081723 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 13:42:56.082268 call enable_fixed_mtrr()
2005 13:42:56.088282 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 13:42:56.091621 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 13:42:56.094789 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 13:42:56.098081 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 13:42:56.104651 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 13:42:56.108459 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 13:42:56.111272 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 13:42:56.115028 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 13:42:56.121186 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 13:42:56.124396 CPU physical address size: 39 bits
2015 13:42:56.127740 call enable_fixed_mtrr()
2016 13:42:56.131326 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 13:42:56.134614 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 13:42:56.141553 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 13:42:56.144937 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 13:42:56.148244 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 13:42:56.151380 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 13:42:56.157838 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 13:42:56.160778 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 13:42:56.164484 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 13:42:56.167999 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 13:42:56.174367 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 13:42:56.177678 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 13:42:56.181072 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 13:42:56.187589 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 13:42:56.190874 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 13:42:56.193933 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 13:42:56.197883 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 13:42:56.204609 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 13:42:56.207306 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 13:42:56.210992 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 13:42:56.214155 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 13:42:56.217545 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 13:42:56.224789 call enable_fixed_mtrr()
2039 13:42:56.225296 call enable_fixed_mtrr()
2040 13:42:56.227538 CPU physical address size: 39 bits
2041 13:42:56.227977
2042 13:42:56.231015 MTRR check
2043 13:42:56.234009 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 13:42:56.237165 Fixed MTRRs : Enabled
2045 13:42:56.240748 Variable MTRRs: Enabled
2046 13:42:56.241463
2047 13:42:56.244562 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 13:42:56.247410 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 13:42:56.251150 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 13:42:56.257575 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 13:42:56.261330 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 13:42:56.264142 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 13:42:56.267105 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 13:42:56.270935 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 13:42:56.277424 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 13:42:56.280503 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 13:42:56.287641 BS: BS_WRITE_TABLES exit times (exec / console): 311 / 150 ms
2058 13:42:56.291351 call enable_fixed_mtrr()
2059 13:42:56.294362 Checking cr50 for pending updates
2060 13:42:56.298193 CPU physical address size: 39 bits
2061 13:42:56.301728 CPU physical address size: 39 bits
2062 13:42:56.305060 CPU physical address size: 39 bits
2063 13:42:56.308223 CPU physical address size: 39 bits
2064 13:42:56.312354 Reading cr50 TPM mode
2065 13:42:56.320969 BS: BS_PAYLOAD_LOAD entry times (exec / console): 22 / 6 ms
2066 13:42:56.330678 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2067 13:42:56.334386 Checking segment from ROM address 0xffc02b38
2068 13:42:56.337461 Checking segment from ROM address 0xffc02b54
2069 13:42:56.344159 Loading segment from ROM address 0xffc02b38
2070 13:42:56.344712 code (compression=0)
2071 13:42:56.353845 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2072 13:42:56.360877 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2073 13:42:56.364388 it's not compressed!
2074 13:42:56.503421 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2075 13:42:56.509964 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2076 13:42:56.516487 Loading segment from ROM address 0xffc02b54
2077 13:42:56.517034 Entry Point 0x30000000
2078 13:42:56.520136 Loaded segments
2079 13:42:56.526848 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2080 13:42:56.569615 Finalizing chipset.
2081 13:42:56.573383 Finalizing SMM.
2082 13:42:56.573934 APMC done.
2083 13:42:56.579668 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2084 13:42:56.583381 mp_park_aps done after 0 msecs.
2085 13:42:56.586331 Jumping to boot code at 0x30000000(0x76b25000)
2086 13:42:56.596203 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2087 13:42:56.596828
2088 13:42:56.597197
2089 13:42:56.597563
2090 13:42:56.599204 Starting depthcharge on Voema...
2091 13:42:56.599698
2092 13:42:56.600935 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2093 13:42:56.601494 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2094 13:42:56.602102 Setting prompt string to ['volteer:']
2095 13:42:56.602728 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2096 13:42:56.609349 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2097 13:42:56.609878
2098 13:42:56.615951 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2099 13:42:56.616428
2100 13:42:56.619357 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2101 13:42:56.623373
2102 13:42:56.623958 Failed to find eMMC card reader
2103 13:42:56.624336
2104 13:42:56.626798 Wipe memory regions:
2105 13:42:56.627261
2106 13:42:56.630484 [0x00000000001000, 0x000000000a0000)
2107 13:42:56.631038
2108 13:42:56.633450 [0x00000000100000, 0x00000030000000)
2109 13:42:56.661188
2110 13:42:56.663983 [0x00000032662db0, 0x000000769ef000)
2111 13:42:56.699809
2112 13:42:56.702775 [0x00000100000000, 0x00000280400000)
2113 13:42:56.903068
2114 13:42:56.906378 ec_init: CrosEC protocol v3 supported (256, 256)
2115 13:42:56.906466
2116 13:42:56.912984 update_port_state: port C0 state: usb enable 1 mux conn 0
2117 13:42:56.913093
2118 13:42:56.922833 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2119 13:42:56.922931
2120 13:42:56.929367 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2121 13:42:56.929455
2122 13:42:56.932912 send_conn_disc_msg: pmc_send_cmd succeeded
2123 13:42:57.366560
2124 13:42:57.366704 R8152: Initializing
2125 13:42:57.366769
2126 13:42:57.370082 Version 9 (ocp_data = 6010)
2127 13:42:57.370160
2128 13:42:57.373246 R8152: Done initializing
2129 13:42:57.373320
2130 13:42:57.376404 Adding net device
2131 13:42:57.678217
2132 13:42:57.681506 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2133 13:42:57.681594
2134 13:42:57.681658
2135 13:42:57.681715
2136 13:42:57.685288 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 13:42:57.785653 volteer: tftpboot 192.168.201.1 10624661/tftp-deploy-bbtrtni1/kernel/bzImage 10624661/tftp-deploy-bbtrtni1/kernel/cmdline 10624661/tftp-deploy-bbtrtni1/ramdisk/ramdisk.cpio.gz
2139 13:42:57.785849 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2140 13:42:57.785979 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2141 13:42:57.790483 tftpboot 192.168.201.1 10624661/tftp-deploy-bbtrtni1/kernel/bzIploy-bbtrtni1/kernel/cmdline 10624661/tftp-deploy-bbtrtni1/ramdisk/ramdisk.cpio.gz
2142 13:42:57.790569
2143 13:42:57.790646 Waiting for link
2144 13:42:57.994706
2145 13:42:57.994867 done.
2146 13:42:57.994948
2147 13:42:57.995021 MAC: 00:e0:4c:71:a6:42
2148 13:42:57.995108
2149 13:42:57.998080 Sending DHCP discover... done.
2150 13:42:57.998163
2151 13:42:58.001395 Waiting for reply... done.
2152 13:42:58.001494
2153 13:42:58.004954 Sending DHCP request... done.
2154 13:42:58.005049
2155 13:42:58.008118 Waiting for reply... done.
2156 13:42:58.008198
2157 13:42:58.011469 My ip is 192.168.201.18
2158 13:42:58.011549
2159 13:42:58.014558 The DHCP server ip is 192.168.201.1
2160 13:42:58.014639
2161 13:42:58.018221 TFTP server IP predefined by user: 192.168.201.1
2162 13:42:58.018301
2163 13:42:58.024602 Bootfile predefined by user: 10624661/tftp-deploy-bbtrtni1/kernel/bzImage
2164 13:42:58.024683
2165 13:42:58.027729 Sending tftp read request... done.
2166 13:42:58.027809
2167 13:42:58.034524 Waiting for the transfer...
2168 13:42:58.034673
2169 13:42:58.331746 00000000 ################################################################
2170 13:42:58.331918
2171 13:42:58.624621 00080000 ################################################################
2172 13:42:58.624792
2173 13:42:58.917979 00100000 ################################################################
2174 13:42:58.918136
2175 13:42:59.209045 00180000 ################################################################
2176 13:42:59.209195
2177 13:42:59.499633 00200000 ################################################################
2178 13:42:59.499799
2179 13:42:59.783776 00280000 ################################################################
2180 13:42:59.783937
2181 13:43:00.072110 00300000 ################################################################
2182 13:43:00.072299
2183 13:43:00.360297 00380000 ################################################################
2184 13:43:00.360442
2185 13:43:00.612640 00400000 ################################################################
2186 13:43:00.612789
2187 13:43:00.865359 00480000 ################################################################
2188 13:43:00.865519
2189 13:43:01.122551 00500000 ################################################################
2190 13:43:01.122682
2191 13:43:01.371762 00580000 ################################################################
2192 13:43:01.371952
2193 13:43:01.626993 00600000 ################################################################
2194 13:43:01.627131
2195 13:43:01.887758 00680000 ################################################################
2196 13:43:01.887912
2197 13:43:02.147633 00700000 ################################################################
2198 13:43:02.147782
2199 13:43:02.156716 00780000 ### done.
2200 13:43:02.156801
2201 13:43:02.159769 The bootfile was 7884688 bytes long.
2202 13:43:02.159878
2203 13:43:02.162961 Sending tftp read request... done.
2204 13:43:02.163044
2205 13:43:02.166895 Waiting for the transfer...
2206 13:43:02.166976
2207 13:43:02.434715 00000000 ################################################################
2208 13:43:02.434852
2209 13:43:02.684013 00080000 ################################################################
2210 13:43:02.684150
2211 13:43:02.939111 00100000 ################################################################
2212 13:43:02.939245
2213 13:43:03.190550 00180000 ################################################################
2214 13:43:03.190681
2215 13:43:03.448820 00200000 ################################################################
2216 13:43:03.448994
2217 13:43:03.700118 00280000 ################################################################
2218 13:43:03.700267
2219 13:43:03.951656 00300000 ################################################################
2220 13:43:03.951836
2221 13:43:04.220153 00380000 ################################################################
2222 13:43:04.220293
2223 13:43:04.478032 00400000 ################################################################
2224 13:43:04.478203
2225 13:43:04.725428 00480000 ################################################################
2226 13:43:04.725564
2227 13:43:04.975859 00500000 ################################################################
2228 13:43:04.975985
2229 13:43:05.218521 00580000 ################################################################
2230 13:43:05.218651
2231 13:43:05.456699 00600000 ################################################################
2232 13:43:05.456834
2233 13:43:05.715475 00680000 ################################################################
2234 13:43:05.715615
2235 13:43:05.963247 00700000 ################################################################
2236 13:43:05.963411
2237 13:43:06.215792 00780000 ################################################################
2238 13:43:06.215969
2239 13:43:06.423538 00800000 ##################################################### done.
2240 13:43:06.423669
2241 13:43:06.426715 Sending tftp read request... done.
2242 13:43:06.426792
2243 13:43:06.426854 Waiting for the transfer...
2244 13:43:06.430162
2245 13:43:06.430239 00000000 # done.
2246 13:43:06.430304
2247 13:43:06.440113 Command line loaded dynamically from TFTP file: 10624661/tftp-deploy-bbtrtni1/kernel/cmdline
2248 13:43:06.440196
2249 13:43:06.453109 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2250 13:43:06.456483
2251 13:43:06.459688 Shutting down all USB controllers.
2252 13:43:06.459796
2253 13:43:06.459924 Removing current net device
2254 13:43:06.460007
2255 13:43:06.463366 Finalizing coreboot
2256 13:43:06.463468
2257 13:43:06.469644 Exiting depthcharge with code 4 at timestamp: 18525225
2258 13:43:06.469728
2259 13:43:06.469812
2260 13:43:06.469891 Starting kernel ...
2261 13:43:06.469967
2262 13:43:06.470043
2263 13:43:06.470619 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2264 13:43:06.470748 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2265 13:43:06.470855 Setting prompt string to ['Linux version [0-9]']
2266 13:43:06.470958 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2267 13:43:06.471060 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2269 13:47:41.471891 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2271 13:47:41.473620 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2273 13:47:41.474966 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2276 13:47:41.476131 end: 2 depthcharge-action (duration 00:05:00) [common]
2278 13:47:41.476339 Cleaning after the job
2279 13:47:41.476425 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624661/tftp-deploy-bbtrtni1/ramdisk
2280 13:47:41.477583 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624661/tftp-deploy-bbtrtni1/kernel
2281 13:47:41.478622 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624661/tftp-deploy-bbtrtni1/modules
2282 13:47:41.478943 start: 5.1 power-off (timeout 00:00:30) [common]
2283 13:47:41.479096 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2284 13:47:41.561718 >> Command sent successfully.
2285 13:47:41.573139 Returned 0 in 0 seconds
2286 13:47:41.674425 end: 5.1 power-off (duration 00:00:00) [common]
2288 13:47:41.675984 start: 5.2 read-feedback (timeout 00:10:00) [common]
2289 13:47:41.677270 Listened to connection for namespace 'common' for up to 1s
2290 13:47:42.677904 Finalising connection for namespace 'common'
2291 13:47:42.678587 Disconnecting from shell: Finalise
2292 13:47:42.678997
2293 13:47:42.780219 end: 5.2 read-feedback (duration 00:00:01) [common]
2294 13:47:42.780852 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624661
2295 13:47:42.797664 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624661
2296 13:47:42.797798 JobError: Your job cannot terminate cleanly.