Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 13:42:57.732137 lava-dispatcher, installed at version: 2023.05.1
2 13:42:57.732352 start: 0 validate
3 13:42:57.732484 Start time: 2023-06-07 13:42:57.732475+00:00 (UTC)
4 13:42:57.732612 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:42:57.732779 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:42:58.001374 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:42:58.001560 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:43:01.505760 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:43:01.505999 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:43:01.507393 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:43:01.507579 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:43:02.510804 validate duration: 4.78
14 13:43:02.511171 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:43:02.511302 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:43:02.511467 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:43:02.511628 Not decompressing ramdisk as can be used compressed.
18 13:43:02.511744 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
19 13:43:02.511847 saving as /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/ramdisk/initrd.cpio.gz
20 13:43:02.511967 total size: 5671546 (5MB)
21 13:43:02.513582 progress 0% (0MB)
22 13:43:02.515291 progress 5% (0MB)
23 13:43:02.517000 progress 10% (0MB)
24 13:43:02.518498 progress 15% (0MB)
25 13:43:02.520197 progress 20% (1MB)
26 13:43:02.521913 progress 25% (1MB)
27 13:43:02.523489 progress 30% (1MB)
28 13:43:02.525143 progress 35% (1MB)
29 13:43:02.526812 progress 40% (2MB)
30 13:43:02.528350 progress 45% (2MB)
31 13:43:02.530026 progress 50% (2MB)
32 13:43:02.531743 progress 55% (3MB)
33 13:43:02.533181 progress 60% (3MB)
34 13:43:02.534815 progress 65% (3MB)
35 13:43:02.536499 progress 70% (3MB)
36 13:43:02.537960 progress 75% (4MB)
37 13:43:02.539679 progress 80% (4MB)
38 13:43:02.541350 progress 85% (4MB)
39 13:43:02.542842 progress 90% (4MB)
40 13:43:02.544511 progress 95% (5MB)
41 13:43:02.546160 progress 100% (5MB)
42 13:43:02.546306 5MB downloaded in 0.03s (157.53MB/s)
43 13:43:02.546507 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:43:02.546907 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:43:02.547043 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:43:02.547157 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:43:02.547335 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:43:02.547415 saving as /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/kernel/bzImage
50 13:43:02.547477 total size: 7884688 (7MB)
51 13:43:02.547554 No compression specified
52 13:43:02.548695 progress 0% (0MB)
53 13:43:02.551017 progress 5% (0MB)
54 13:43:02.553242 progress 10% (0MB)
55 13:43:02.555494 progress 15% (1MB)
56 13:43:02.557679 progress 20% (1MB)
57 13:43:02.559952 progress 25% (1MB)
58 13:43:02.562129 progress 30% (2MB)
59 13:43:02.564400 progress 35% (2MB)
60 13:43:02.566607 progress 40% (3MB)
61 13:43:02.568892 progress 45% (3MB)
62 13:43:02.571166 progress 50% (3MB)
63 13:43:02.573356 progress 55% (4MB)
64 13:43:02.575591 progress 60% (4MB)
65 13:43:02.577792 progress 65% (4MB)
66 13:43:02.579974 progress 70% (5MB)
67 13:43:02.582141 progress 75% (5MB)
68 13:43:02.584394 progress 80% (6MB)
69 13:43:02.586623 progress 85% (6MB)
70 13:43:02.588849 progress 90% (6MB)
71 13:43:02.591079 progress 95% (7MB)
72 13:43:02.593325 progress 100% (7MB)
73 13:43:02.593548 7MB downloaded in 0.05s (163.24MB/s)
74 13:43:02.593738 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:43:02.594098 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:43:02.594215 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:43:02.594343 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:43:02.594521 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
80 13:43:02.594622 saving as /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/nfsrootfs/full.rootfs.tar
81 13:43:02.594712 total size: 125914312 (120MB)
82 13:43:02.594789 Using unxz to decompress xz
83 13:43:02.598547 progress 0% (0MB)
84 13:43:03.091766 progress 5% (6MB)
85 13:43:03.598953 progress 10% (12MB)
86 13:43:04.092138 progress 15% (18MB)
87 13:43:04.590369 progress 20% (24MB)
88 13:43:04.933046 progress 25% (30MB)
89 13:43:05.286490 progress 30% (36MB)
90 13:43:05.555180 progress 35% (42MB)
91 13:43:05.753172 progress 40% (48MB)
92 13:43:06.117625 progress 45% (54MB)
93 13:43:06.487096 progress 50% (60MB)
94 13:43:06.825862 progress 55% (66MB)
95 13:43:07.184248 progress 60% (72MB)
96 13:43:07.523456 progress 65% (78MB)
97 13:43:07.917387 progress 70% (84MB)
98 13:43:08.346586 progress 75% (90MB)
99 13:43:08.766033 progress 80% (96MB)
100 13:43:08.858028 progress 85% (102MB)
101 13:43:09.021858 progress 90% (108MB)
102 13:43:09.372117 progress 95% (114MB)
103 13:43:09.756531 progress 100% (120MB)
104 13:43:09.762381 120MB downloaded in 7.17s (16.75MB/s)
105 13:43:09.762765 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:43:09.763227 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:43:09.763385 start: 1.4 download-retry (timeout 00:09:53) [common]
109 13:43:09.763535 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 13:43:09.763746 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:43:09.763870 saving as /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/modules/modules.tar
112 13:43:09.763984 total size: 253384 (0MB)
113 13:43:09.764102 Using unxz to decompress xz
114 13:43:09.768808 progress 12% (0MB)
115 13:43:09.769378 progress 25% (0MB)
116 13:43:09.769757 progress 38% (0MB)
117 13:43:09.770903 progress 51% (0MB)
118 13:43:09.772859 progress 64% (0MB)
119 13:43:09.774667 progress 77% (0MB)
120 13:43:09.776851 progress 90% (0MB)
121 13:43:09.778708 progress 100% (0MB)
122 13:43:09.784774 0MB downloaded in 0.02s (11.63MB/s)
123 13:43:09.785049 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:43:09.785322 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:43:09.785419 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 13:43:09.785519 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 13:43:12.555814 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10624690/extract-nfsrootfs-6mq8mg_k
129 13:43:12.556042 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 13:43:12.556155 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 13:43:12.556333 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2
132 13:43:12.556466 makedir: /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin
133 13:43:12.556569 makedir: /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/tests
134 13:43:12.556668 makedir: /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/results
135 13:43:12.556774 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-add-keys
136 13:43:12.556920 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-add-sources
137 13:43:12.557049 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-background-process-start
138 13:43:12.557177 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-background-process-stop
139 13:43:12.557302 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-common-functions
140 13:43:12.557428 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-echo-ipv4
141 13:43:12.557555 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-install-packages
142 13:43:12.557679 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-installed-packages
143 13:43:12.557805 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-os-build
144 13:43:12.557929 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-probe-channel
145 13:43:12.558055 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-probe-ip
146 13:43:12.558178 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-target-ip
147 13:43:12.558306 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-target-mac
148 13:43:12.558429 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-target-storage
149 13:43:12.558555 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-test-case
150 13:43:12.558679 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-test-event
151 13:43:12.558802 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-test-feedback
152 13:43:12.558925 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-test-raise
153 13:43:12.559048 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-test-reference
154 13:43:12.559172 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-test-runner
155 13:43:12.559295 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-test-set
156 13:43:12.559439 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-test-shell
157 13:43:12.559564 Updating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-install-packages (oe)
158 13:43:12.559712 Updating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/bin/lava-installed-packages (oe)
159 13:43:12.559841 Creating /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/environment
160 13:43:12.559941 LAVA metadata
161 13:43:12.560014 - LAVA_JOB_ID=10624690
162 13:43:12.560080 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:43:12.560186 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 13:43:12.560254 skipped lava-vland-overlay
165 13:43:12.560331 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:43:12.560414 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 13:43:12.560475 skipped lava-multinode-overlay
168 13:43:12.560549 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:43:12.560629 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 13:43:12.560703 Loading test definitions
171 13:43:12.560792 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 13:43:12.560864 Using /lava-10624690 at stage 0
173 13:43:12.560957 Fetching tests from https://github.com/kernelci/test-definitions
174 13:43:12.561036 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/0/tests/0_ltp-ipc'
175 13:43:17.805547 Running '/usr/bin/git checkout kernelci.org
176 13:43:17.951457 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
177 13:43:17.952215 uuid=10624690_1.5.2.3.1 testdef=None
178 13:43:17.952369 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
180 13:43:17.952621 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
181 13:43:17.953443 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 13:43:17.953677 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
184 13:43:17.954725 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 13:43:17.954960 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
187 13:43:17.956011 runner path: /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/0/tests/0_ltp-ipc test_uuid 10624690_1.5.2.3.1
188 13:43:17.956100 SKIPFILE='skipfile-lkft.yaml'
189 13:43:17.956164 SKIP_INSTALL='true'
190 13:43:17.956222 TST_CMDFILES='ipc'
191 13:43:17.956360 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 13:43:17.956563 Creating lava-test-runner.conf files
194 13:43:17.956627 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624690/lava-overlay-8dzp2gw2/lava-10624690/0 for stage 0
195 13:43:17.956715 - 0_ltp-ipc
196 13:43:17.956818 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
197 13:43:17.956909 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
198 13:43:25.621628 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 13:43:25.621787 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
200 13:43:25.621902 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 13:43:25.622027 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
202 13:43:25.622139 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
203 13:43:25.764642 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 13:43:25.765045 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
205 13:43:25.765181 extracting modules file /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624690/extract-nfsrootfs-6mq8mg_k
206 13:43:25.779256 extracting modules file /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624690/extract-overlay-ramdisk-6o9n4exf/ramdisk
207 13:43:25.794070 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 13:43:25.794215 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
209 13:43:25.794317 [common] Applying overlay to NFS
210 13:43:25.794401 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624690/compress-overlay-l9ulob4t/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624690/extract-nfsrootfs-6mq8mg_k
211 13:43:26.712459 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 13:43:26.712630 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
213 13:43:26.712749 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 13:43:26.712859 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
215 13:43:26.712954 Building ramdisk /var/lib/lava/dispatcher/tmp/10624690/extract-overlay-ramdisk-6o9n4exf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624690/extract-overlay-ramdisk-6o9n4exf/ramdisk
216 13:43:26.785466 >> 27217 blocks
217 13:43:27.359128 rename /var/lib/lava/dispatcher/tmp/10624690/extract-overlay-ramdisk-6o9n4exf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/ramdisk/ramdisk.cpio.gz
218 13:43:27.359608 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 13:43:27.359766 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
220 13:43:27.359880 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
221 13:43:27.359991 No mkimage arch provided, not using FIT.
222 13:43:27.360093 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 13:43:27.360191 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 13:43:27.360313 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
225 13:43:27.360445 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
226 13:43:27.360561 No LXC device requested
227 13:43:27.360685 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 13:43:27.360816 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
229 13:43:27.360910 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 13:43:27.360995 Checking files for TFTP limit of 4294967296 bytes.
231 13:43:27.361524 end: 1 tftp-deploy (duration 00:00:25) [common]
232 13:43:27.361672 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 13:43:27.361802 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 13:43:27.361984 substitutions:
235 13:43:27.362089 - {DTB}: None
236 13:43:27.362189 - {INITRD}: 10624690/tftp-deploy-d2m3l8ct/ramdisk/ramdisk.cpio.gz
237 13:43:27.362287 - {KERNEL}: 10624690/tftp-deploy-d2m3l8ct/kernel/bzImage
238 13:43:27.362384 - {LAVA_MAC}: None
239 13:43:27.362480 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10624690/extract-nfsrootfs-6mq8mg_k
240 13:43:27.362578 - {NFS_SERVER_IP}: 192.168.201.1
241 13:43:27.362674 - {PRESEED_CONFIG}: None
242 13:43:27.362768 - {PRESEED_LOCAL}: None
243 13:43:27.362862 - {RAMDISK}: 10624690/tftp-deploy-d2m3l8ct/ramdisk/ramdisk.cpio.gz
244 13:43:27.362956 - {ROOT_PART}: None
245 13:43:27.363050 - {ROOT}: None
246 13:43:27.363144 - {SERVER_IP}: 192.168.201.1
247 13:43:27.363236 - {TEE}: None
248 13:43:27.363333 Parsed boot commands:
249 13:43:27.363425 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 13:43:27.363658 Parsed boot commands: tftpboot 192.168.201.1 10624690/tftp-deploy-d2m3l8ct/kernel/bzImage 10624690/tftp-deploy-d2m3l8ct/kernel/cmdline 10624690/tftp-deploy-d2m3l8ct/ramdisk/ramdisk.cpio.gz
251 13:43:27.363784 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 13:43:27.363914 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 13:43:27.364050 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 13:43:27.364181 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 13:43:27.364285 Not connected, no need to disconnect.
256 13:43:27.364404 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 13:43:27.364532 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 13:43:27.364635 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
259 13:43:27.368322 Setting prompt string to ['lava-test: # ']
260 13:43:27.368702 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 13:43:27.368830 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 13:43:27.368942 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 13:43:27.369054 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 13:43:27.369247 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
265 13:43:32.506381 >> Command sent successfully.
266 13:43:32.508785 Returned 0 in 5 seconds
267 13:43:32.609279 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 13:43:32.609991 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 13:43:32.610272 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 13:43:32.610506 Setting prompt string to 'Starting depthcharge on Helios...'
272 13:43:32.610693 Changing prompt to 'Starting depthcharge on Helios...'
273 13:43:32.610903 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 13:43:32.611571 [Enter `^Ec?' for help]
275 13:43:33.231013
276 13:43:33.231711
277 13:43:33.241041 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 13:43:33.244260 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 13:43:33.250449 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 13:43:33.254045 CPU: AES supported, TXT NOT supported, VT supported
281 13:43:33.260607 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 13:43:33.264556 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 13:43:33.270656 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 13:43:33.273749 VBOOT: Loading verstage.
285 13:43:33.276959 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 13:43:33.284000 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 13:43:33.287148 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 13:43:33.290384 CBFS @ c08000 size 3f8000
289 13:43:33.297032 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 13:43:33.300291 CBFS: Locating 'fallback/verstage'
291 13:43:33.303422 CBFS: Found @ offset 10fb80 size 1072c
292 13:43:33.307424
293 13:43:33.307874
294 13:43:33.317306 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 13:43:33.331599 Probing TPM: . done!
296 13:43:33.334929 TPM ready after 0 ms
297 13:43:33.338156 Connected to device vid:did:rid of 1ae0:0028:00
298 13:43:33.348659 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
299 13:43:33.351916 Initialized TPM device CR50 revision 0
300 13:43:33.396359 tlcl_send_startup: Startup return code is 0
301 13:43:33.396912 TPM: setup succeeded
302 13:43:33.409193 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 13:43:33.412724 Chrome EC: UHEPI supported
304 13:43:33.415883 Phase 1
305 13:43:33.419416 FMAP: area GBB found @ c05000 (12288 bytes)
306 13:43:33.426150 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 13:43:33.426800 Phase 2
308 13:43:33.429445 Phase 3
309 13:43:33.432606 FMAP: area GBB found @ c05000 (12288 bytes)
310 13:43:33.439161 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 13:43:33.445780 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
312 13:43:33.449923 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
313 13:43:33.455901 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 13:43:33.471337 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
315 13:43:33.474244 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
316 13:43:33.481179 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 13:43:33.485545 Phase 4
318 13:43:33.488811 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
319 13:43:33.494981 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 13:43:33.674811 VB2:vb2_rsa_verify_digest() Digest check failed!
321 13:43:33.681890 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 13:43:33.682012 Saving nvdata
323 13:43:33.685125 Reboot requested (10020007)
324 13:43:33.688278 board_reset() called!
325 13:43:33.688374 full_reset() called!
326 13:43:38.197459
327 13:43:38.197622
328 13:43:38.207234 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 13:43:38.210614 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 13:43:38.217127 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 13:43:38.220384 CPU: AES supported, TXT NOT supported, VT supported
332 13:43:38.227320 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 13:43:38.230075 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 13:43:38.237244 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 13:43:38.240343 VBOOT: Loading verstage.
336 13:43:38.243431 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 13:43:38.250282 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 13:43:38.253450 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 13:43:38.257459 CBFS @ c08000 size 3f8000
340 13:43:38.263481 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 13:43:38.266793 CBFS: Locating 'fallback/verstage'
342 13:43:38.270148 CBFS: Found @ offset 10fb80 size 1072c
343 13:43:38.274009
344 13:43:38.274114
345 13:43:38.283601 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 13:43:38.298143 Probing TPM: . done!
347 13:43:38.301905 TPM ready after 0 ms
348 13:43:38.305202 Connected to device vid:did:rid of 1ae0:0028:00
349 13:43:38.315140 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
350 13:43:38.318400 Initialized TPM device CR50 revision 0
351 13:43:38.363138 tlcl_send_startup: Startup return code is 0
352 13:43:38.363287 TPM: setup succeeded
353 13:43:38.376320 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 13:43:38.379666 Chrome EC: UHEPI supported
355 13:43:38.383064 Phase 1
356 13:43:38.386625 FMAP: area GBB found @ c05000 (12288 bytes)
357 13:43:38.392731 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 13:43:38.399952 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 13:43:38.403240 Recovery requested (1009000e)
360 13:43:38.408638 Saving nvdata
361 13:43:38.414738 tlcl_extend: response is 0
362 13:43:38.423889 tlcl_extend: response is 0
363 13:43:38.430676 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 13:43:38.433788 CBFS @ c08000 size 3f8000
365 13:43:38.440351 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 13:43:38.443736 CBFS: Locating 'fallback/romstage'
367 13:43:38.446980 CBFS: Found @ offset 80 size 145fc
368 13:43:38.450298 Accumulated console time in verstage 98 ms
369 13:43:38.450380
370 13:43:38.450444
371 13:43:38.463466 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 13:43:38.470278 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 13:43:38.473270 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 13:43:38.477106 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 13:43:38.483657 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
376 13:43:38.486989 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 13:43:38.490108 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
378 13:43:38.493339 TCO_STS: 0000 0000
379 13:43:38.496649 GEN_PMCON: e0015238 00000200
380 13:43:38.499923 GBLRST_CAUSE: 00000000 00000000
381 13:43:38.500007 prev_sleep_state 5
382 13:43:38.503222 Boot Count incremented to 58159
383 13:43:38.510641 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 13:43:38.513811 CBFS @ c08000 size 3f8000
385 13:43:38.520307 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 13:43:38.520391 CBFS: Locating 'fspm.bin'
387 13:43:38.526807 CBFS: Found @ offset 5ffc0 size 71000
388 13:43:38.530258 Chrome EC: UHEPI supported
389 13:43:38.536879 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 13:43:38.540155 Probing TPM: done!
391 13:43:38.546662 Connected to device vid:did:rid of 1ae0:0028:00
392 13:43:38.556750 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
393 13:43:38.562480 Initialized TPM device CR50 revision 0
394 13:43:38.571750 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 13:43:38.578103 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 13:43:38.581876 MRC cache found, size 1948
397 13:43:38.584944 bootmode is set to: 2
398 13:43:38.587976 PRMRR disabled by config.
399 13:43:38.588097 SPD INDEX = 1
400 13:43:38.594728 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 13:43:38.597866 CBFS @ c08000 size 3f8000
402 13:43:38.605224 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 13:43:38.605309 CBFS: Locating 'spd.bin'
404 13:43:38.608508 CBFS: Found @ offset 5fb80 size 400
405 13:43:38.611833 SPD: module type is LPDDR3
406 13:43:38.614733 SPD: module part is
407 13:43:38.621708 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 13:43:38.624887 SPD: device width 4 bits, bus width 8 bits
409 13:43:38.628045 SPD: module size is 4096 MB (per channel)
410 13:43:38.631310 memory slot: 0 configuration done.
411 13:43:38.634623 memory slot: 2 configuration done.
412 13:43:38.686391 CBMEM:
413 13:43:38.689531 IMD: root @ 99fff000 254 entries.
414 13:43:38.692759 IMD: root @ 99ffec00 62 entries.
415 13:43:38.695950 External stage cache:
416 13:43:38.699892 IMD: root @ 9abff000 254 entries.
417 13:43:38.703005 IMD: root @ 9abfec00 62 entries.
418 13:43:38.706149 Chrome EC: clear events_b mask to 0x0000000020004000
419 13:43:38.722333 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 13:43:38.735727 tlcl_write: response is 0
421 13:43:38.744398 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 13:43:38.751525 MRC: TPM MRC hash updated successfully.
423 13:43:38.751642 2 DIMMs found
424 13:43:38.754638 SMM Memory Map
425 13:43:38.757943 SMRAM : 0x9a000000 0x1000000
426 13:43:38.761285 Subregion 0: 0x9a000000 0xa00000
427 13:43:38.764876 Subregion 1: 0x9aa00000 0x200000
428 13:43:38.767745 Subregion 2: 0x9ac00000 0x400000
429 13:43:38.770896 top_of_ram = 0x9a000000
430 13:43:38.774344 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 13:43:38.780880 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 13:43:38.784676 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 13:43:38.791070 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 13:43:38.794186 CBFS @ c08000 size 3f8000
435 13:43:38.797839 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 13:43:38.801158 CBFS: Locating 'fallback/postcar'
437 13:43:38.807796 CBFS: Found @ offset 107000 size 4b44
438 13:43:38.810878 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 13:43:38.823768 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 13:43:38.826995 Processing 180 relocs. Offset value of 0x97c0c000
441 13:43:38.835484 Accumulated console time in romstage 286 ms
442 13:43:38.835567
443 13:43:38.835655
444 13:43:38.845267 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 13:43:38.851868 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 13:43:38.855211 CBFS @ c08000 size 3f8000
447 13:43:38.858591 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 13:43:38.865146 CBFS: Locating 'fallback/ramstage'
449 13:43:38.868440 CBFS: Found @ offset 43380 size 1b9e8
450 13:43:38.874924 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 13:43:38.907036 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 13:43:38.910103 Processing 3976 relocs. Offset value of 0x98db0000
453 13:43:38.917073 Accumulated console time in postcar 52 ms
454 13:43:38.917154
455 13:43:38.917218
456 13:43:38.926939 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 13:43:38.933913 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 13:43:38.937092 WARNING: RO_VPD is uninitialized or empty.
459 13:43:38.940232 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 13:43:38.947317 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 13:43:38.947424 Normal boot.
462 13:43:38.953825 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 13:43:38.956749 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 13:43:38.960172 CBFS @ c08000 size 3f8000
465 13:43:38.966822 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 13:43:38.970013 CBFS: Locating 'cpu_microcode_blob.bin'
467 13:43:38.973201 CBFS: Found @ offset 14700 size 2ec00
468 13:43:38.976583 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 13:43:38.979799 Skip microcode update
470 13:43:38.986458 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 13:43:38.986541 CBFS @ c08000 size 3f8000
472 13:43:38.993099 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 13:43:38.996950 CBFS: Locating 'fsps.bin'
474 13:43:39.000104 CBFS: Found @ offset d1fc0 size 35000
475 13:43:39.025430 Detected 4 core, 8 thread CPU.
476 13:43:39.028844 Setting up SMI for CPU
477 13:43:39.032123 IED base = 0x9ac00000
478 13:43:39.032204 IED size = 0x00400000
479 13:43:39.035354 Will perform SMM setup.
480 13:43:39.041932 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 13:43:39.048322 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 13:43:39.051457 Processing 16 relocs. Offset value of 0x00030000
483 13:43:39.055454 Attempting to start 7 APs
484 13:43:39.058615 Waiting for 10ms after sending INIT.
485 13:43:39.074819 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
486 13:43:39.074905 done.
487 13:43:39.078176 AP: slot 6 apic_id 7.
488 13:43:39.081341 AP: slot 3 apic_id 6.
489 13:43:39.084633 Waiting for 2nd SIPI to complete...done.
490 13:43:39.087912 AP: slot 4 apic_id 2.
491 13:43:39.087994 AP: slot 1 apic_id 3.
492 13:43:39.091220 AP: slot 7 apic_id 5.
493 13:43:39.094676 AP: slot 5 apic_id 4.
494 13:43:39.101591 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 13:43:39.107828 Processing 13 relocs. Offset value of 0x00038000
496 13:43:39.111492 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 13:43:39.117757 Installing SMM handler to 0x9a000000
498 13:43:39.124867 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 13:43:39.127944 Processing 658 relocs. Offset value of 0x9a010000
500 13:43:39.138263 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 13:43:39.141047 Processing 13 relocs. Offset value of 0x9a008000
502 13:43:39.148175 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 13:43:39.154584 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 13:43:39.157640 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 13:43:39.164458 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 13:43:39.170870 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 13:43:39.177571 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 13:43:39.180844 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 13:43:39.187690 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 13:43:39.190825 Clearing SMI status registers
511 13:43:39.194076 SMI_STS: PM1
512 13:43:39.194158 PM1_STS: PWRBTN
513 13:43:39.197471 TCO_STS: SECOND_TO
514 13:43:39.200804 New SMBASE 0x9a000000
515 13:43:39.204162 In relocation handler: CPU 0
516 13:43:39.207404 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 13:43:39.210840 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 13:43:39.214417 Relocation complete.
519 13:43:39.217358 New SMBASE 0x99fff800
520 13:43:39.217466 In relocation handler: CPU 2
521 13:43:39.224331 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
522 13:43:39.227313 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 13:43:39.231155 Relocation complete.
524 13:43:39.234211 New SMBASE 0x99fff000
525 13:43:39.234293 In relocation handler: CPU 4
526 13:43:39.241119 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
527 13:43:39.244393 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 13:43:39.247894 Relocation complete.
529 13:43:39.247967 New SMBASE 0x99fffc00
530 13:43:39.251192 In relocation handler: CPU 1
531 13:43:39.257706 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
532 13:43:39.260743 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 13:43:39.263939 Relocation complete.
534 13:43:39.264021 New SMBASE 0x99ffec00
535 13:43:39.267655 In relocation handler: CPU 5
536 13:43:39.270929 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
537 13:43:39.277687 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 13:43:39.280968 Relocation complete.
539 13:43:39.281074 New SMBASE 0x99ffe400
540 13:43:39.284256 In relocation handler: CPU 7
541 13:43:39.287577 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
542 13:43:39.293899 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 13:43:39.297385 Relocation complete.
544 13:43:39.297507 New SMBASE 0x99fff400
545 13:43:39.300645 In relocation handler: CPU 3
546 13:43:39.304015 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
547 13:43:39.310550 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 13:43:39.310667 Relocation complete.
549 13:43:39.313929 New SMBASE 0x99ffe800
550 13:43:39.317085 In relocation handler: CPU 6
551 13:43:39.320438 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
552 13:43:39.327253 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 13:43:39.327398 Relocation complete.
554 13:43:39.330392 Initializing CPU #0
555 13:43:39.333621 CPU: vendor Intel device 806ec
556 13:43:39.336783 CPU: family 06, model 8e, stepping 0c
557 13:43:39.340679 Clearing out pending MCEs
558 13:43:39.343861 Setting up local APIC...
559 13:43:39.343962 apic_id: 0x00 done.
560 13:43:39.347187 Turbo is available but hidden
561 13:43:39.350483 Turbo is available and visible
562 13:43:39.353692 VMX status: enabled
563 13:43:39.357013 IA32_FEATURE_CONTROL status: locked
564 13:43:39.360183 Skip microcode update
565 13:43:39.360287 CPU #0 initialized
566 13:43:39.363662 Initializing CPU #2
567 13:43:39.366762 Initializing CPU #5
568 13:43:39.366866 Initializing CPU #7
569 13:43:39.370429 CPU: vendor Intel device 806ec
570 13:43:39.373657 CPU: family 06, model 8e, stepping 0c
571 13:43:39.376910 CPU: vendor Intel device 806ec
572 13:43:39.380282 CPU: family 06, model 8e, stepping 0c
573 13:43:39.383639 Clearing out pending MCEs
574 13:43:39.386946 Clearing out pending MCEs
575 13:43:39.390296 Setting up local APIC...
576 13:43:39.390395 Initializing CPU #1
577 13:43:39.393576 Initializing CPU #4
578 13:43:39.396616 CPU: vendor Intel device 806ec
579 13:43:39.399775 CPU: family 06, model 8e, stepping 0c
580 13:43:39.403732 CPU: vendor Intel device 806ec
581 13:43:39.406455 CPU: family 06, model 8e, stepping 0c
582 13:43:39.409887 Clearing out pending MCEs
583 13:43:39.413098 Clearing out pending MCEs
584 13:43:39.413199 Setting up local APIC...
585 13:43:39.416462 apic_id: 0x04 done.
586 13:43:39.419647 Setting up local APIC...
587 13:43:39.423594 CPU: vendor Intel device 806ec
588 13:43:39.426741 CPU: family 06, model 8e, stepping 0c
589 13:43:39.429790 Clearing out pending MCEs
590 13:43:39.429890 VMX status: enabled
591 13:43:39.433446 apic_id: 0x05 done.
592 13:43:39.436675 IA32_FEATURE_CONTROL status: locked
593 13:43:39.439820 VMX status: enabled
594 13:43:39.439922 Skip microcode update
595 13:43:39.443588 IA32_FEATURE_CONTROL status: locked
596 13:43:39.446448 CPU #5 initialized
597 13:43:39.449587 Skip microcode update
598 13:43:39.449688 Initializing CPU #3
599 13:43:39.453352 Initializing CPU #6
600 13:43:39.456657 CPU: vendor Intel device 806ec
601 13:43:39.459817 CPU: family 06, model 8e, stepping 0c
602 13:43:39.463096 CPU: vendor Intel device 806ec
603 13:43:39.466539 CPU: family 06, model 8e, stepping 0c
604 13:43:39.469827 Clearing out pending MCEs
605 13:43:39.472930 Clearing out pending MCEs
606 13:43:39.473035 Setting up local APIC...
607 13:43:39.476493 CPU #7 initialized
608 13:43:39.479790 Setting up local APIC...
609 13:43:39.482862 Setting up local APIC...
610 13:43:39.482962 apic_id: 0x01 done.
611 13:43:39.486599 apic_id: 0x07 done.
612 13:43:39.486700 apic_id: 0x06 done.
613 13:43:39.489853 VMX status: enabled
614 13:43:39.492595 VMX status: enabled
615 13:43:39.495881 IA32_FEATURE_CONTROL status: locked
616 13:43:39.499615 IA32_FEATURE_CONTROL status: locked
617 13:43:39.502879 Skip microcode update
618 13:43:39.502957 Skip microcode update
619 13:43:39.506150 CPU #6 initialized
620 13:43:39.506252 CPU #3 initialized
621 13:43:39.509468 VMX status: enabled
622 13:43:39.512867 Setting up local APIC...
623 13:43:39.516038 IA32_FEATURE_CONTROL status: locked
624 13:43:39.519191 apic_id: 0x03 done.
625 13:43:39.519302 apic_id: 0x02 done.
626 13:43:39.522407 VMX status: enabled
627 13:43:39.522508 VMX status: enabled
628 13:43:39.529693 IA32_FEATURE_CONTROL status: locked
629 13:43:39.532274 IA32_FEATURE_CONTROL status: locked
630 13:43:39.532353 Skip microcode update
631 13:43:39.535575 Skip microcode update
632 13:43:39.539206 CPU #1 initialized
633 13:43:39.539309 CPU #4 initialized
634 13:43:39.542136 Skip microcode update
635 13:43:39.542236 CPU #2 initialized
636 13:43:39.548933 bsp_do_flight_plan done after 461 msecs.
637 13:43:39.552519 CPU: frequency set to 4200 MHz
638 13:43:39.552594 Enabling SMIs.
639 13:43:39.555591 Locking SMM.
640 13:43:39.568830 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 13:43:39.572190 CBFS @ c08000 size 3f8000
642 13:43:39.578742 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 13:43:39.578821 CBFS: Locating 'vbt.bin'
644 13:43:39.585090 CBFS: Found @ offset 5f5c0 size 499
645 13:43:39.588833 Found a VBT of 4608 bytes after decompression
646 13:43:39.774471 Display FSP Version Info HOB
647 13:43:39.777555 Reference Code - CPU = 9.0.1e.30
648 13:43:39.781390 uCode Version = 0.0.0.ca
649 13:43:39.784738 TXT ACM version = ff.ff.ff.ffff
650 13:43:39.787460 Display FSP Version Info HOB
651 13:43:39.791307 Reference Code - ME = 9.0.1e.30
652 13:43:39.793994 MEBx version = 0.0.0.0
653 13:43:39.797384 ME Firmware Version = Consumer SKU
654 13:43:39.801114 Display FSP Version Info HOB
655 13:43:39.804287 Reference Code - CML PCH = 9.0.1e.30
656 13:43:39.807304 PCH-CRID Status = Disabled
657 13:43:39.810732 PCH-CRID Original Value = ff.ff.ff.ffff
658 13:43:39.814388 PCH-CRID New Value = ff.ff.ff.ffff
659 13:43:39.817529 OPROM - RST - RAID = ff.ff.ff.ffff
660 13:43:39.820701 ChipsetInit Base Version = ff.ff.ff.ffff
661 13:43:39.823869 ChipsetInit Oem Version = ff.ff.ff.ffff
662 13:43:39.827295 Display FSP Version Info HOB
663 13:43:39.833876 Reference Code - SA - System Agent = 9.0.1e.30
664 13:43:39.837883 Reference Code - MRC = 0.7.1.6c
665 13:43:39.837994 SA - PCIe Version = 9.0.1e.30
666 13:43:39.840436 SA-CRID Status = Disabled
667 13:43:39.843822 SA-CRID Original Value = 0.0.0.c
668 13:43:39.847058 SA-CRID New Value = 0.0.0.c
669 13:43:39.850515 OPROM - VBIOS = ff.ff.ff.ffff
670 13:43:39.854203 RTC Init
671 13:43:39.857600 Set power on after power failure.
672 13:43:39.857704 Disabling Deep S3
673 13:43:39.860708 Disabling Deep S3
674 13:43:39.860808 Disabling Deep S4
675 13:43:39.864020 Disabling Deep S4
676 13:43:39.864140 Disabling Deep S5
677 13:43:39.867172 Disabling Deep S5
678 13:43:39.873530 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
679 13:43:39.873640 Enumerating buses...
680 13:43:39.880468 Show all devs... Before device enumeration.
681 13:43:39.880575 Root Device: enabled 1
682 13:43:39.883612 CPU_CLUSTER: 0: enabled 1
683 13:43:39.886791 DOMAIN: 0000: enabled 1
684 13:43:39.890335 APIC: 00: enabled 1
685 13:43:39.890434 PCI: 00:00.0: enabled 1
686 13:43:39.893509 PCI: 00:02.0: enabled 1
687 13:43:39.896798 PCI: 00:04.0: enabled 0
688 13:43:39.900252 PCI: 00:05.0: enabled 0
689 13:43:39.900356 PCI: 00:12.0: enabled 1
690 13:43:39.903551 PCI: 00:12.5: enabled 0
691 13:43:39.906695 PCI: 00:12.6: enabled 0
692 13:43:39.906801 PCI: 00:14.0: enabled 1
693 13:43:39.910274 PCI: 00:14.1: enabled 0
694 13:43:39.913256 PCI: 00:14.3: enabled 1
695 13:43:39.917022 PCI: 00:14.5: enabled 0
696 13:43:39.917122 PCI: 00:15.0: enabled 1
697 13:43:39.920057 PCI: 00:15.1: enabled 1
698 13:43:39.923743 PCI: 00:15.2: enabled 0
699 13:43:39.927149 PCI: 00:15.3: enabled 0
700 13:43:39.927246 PCI: 00:16.0: enabled 1
701 13:43:39.930277 PCI: 00:16.1: enabled 0
702 13:43:39.933530 PCI: 00:16.2: enabled 0
703 13:43:39.936873 PCI: 00:16.3: enabled 0
704 13:43:39.936978 PCI: 00:16.4: enabled 0
705 13:43:39.940164 PCI: 00:16.5: enabled 0
706 13:43:39.943438 PCI: 00:17.0: enabled 1
707 13:43:39.946592 PCI: 00:19.0: enabled 1
708 13:43:39.946696 PCI: 00:19.1: enabled 0
709 13:43:39.950067 PCI: 00:19.2: enabled 0
710 13:43:39.953329 PCI: 00:1a.0: enabled 0
711 13:43:39.953436 PCI: 00:1c.0: enabled 0
712 13:43:39.956518 PCI: 00:1c.1: enabled 0
713 13:43:39.959611 PCI: 00:1c.2: enabled 0
714 13:43:39.962964 PCI: 00:1c.3: enabled 0
715 13:43:39.963067 PCI: 00:1c.4: enabled 0
716 13:43:39.966891 PCI: 00:1c.5: enabled 0
717 13:43:39.969945 PCI: 00:1c.6: enabled 0
718 13:43:39.973210 PCI: 00:1c.7: enabled 0
719 13:43:39.973313 PCI: 00:1d.0: enabled 1
720 13:43:39.976310 PCI: 00:1d.1: enabled 0
721 13:43:39.980160 PCI: 00:1d.2: enabled 0
722 13:43:39.983231 PCI: 00:1d.3: enabled 0
723 13:43:39.983362 PCI: 00:1d.4: enabled 0
724 13:43:39.986373 PCI: 00:1d.5: enabled 1
725 13:43:39.989559 PCI: 00:1e.0: enabled 1
726 13:43:39.989698 PCI: 00:1e.1: enabled 0
727 13:43:39.993254 PCI: 00:1e.2: enabled 1
728 13:43:39.996471 PCI: 00:1e.3: enabled 1
729 13:43:39.999764 PCI: 00:1f.0: enabled 1
730 13:43:39.999867 PCI: 00:1f.1: enabled 1
731 13:43:40.003004 PCI: 00:1f.2: enabled 1
732 13:43:40.006259 PCI: 00:1f.3: enabled 1
733 13:43:40.009667 PCI: 00:1f.4: enabled 1
734 13:43:40.009773 PCI: 00:1f.5: enabled 1
735 13:43:40.012907 PCI: 00:1f.6: enabled 0
736 13:43:40.016246 USB0 port 0: enabled 1
737 13:43:40.016320 I2C: 00:15: enabled 1
738 13:43:40.020043 I2C: 00:5d: enabled 1
739 13:43:40.022917 GENERIC: 0.0: enabled 1
740 13:43:40.025921 I2C: 00:1a: enabled 1
741 13:43:40.026023 I2C: 00:38: enabled 1
742 13:43:40.029571 I2C: 00:39: enabled 1
743 13:43:40.032505 I2C: 00:3a: enabled 1
744 13:43:40.032575 I2C: 00:3b: enabled 1
745 13:43:40.036231 PCI: 00:00.0: enabled 1
746 13:43:40.039491 SPI: 00: enabled 1
747 13:43:40.039586 SPI: 01: enabled 1
748 13:43:40.042709 PNP: 0c09.0: enabled 1
749 13:43:40.046054 USB2 port 0: enabled 1
750 13:43:40.046150 USB2 port 1: enabled 1
751 13:43:40.049387 USB2 port 2: enabled 0
752 13:43:40.052644 USB2 port 3: enabled 0
753 13:43:40.052722 USB2 port 5: enabled 0
754 13:43:40.055971 USB2 port 6: enabled 1
755 13:43:40.059217 USB2 port 9: enabled 1
756 13:43:40.059314 USB3 port 0: enabled 1
757 13:43:40.062357 USB3 port 1: enabled 1
758 13:43:40.065758 USB3 port 2: enabled 1
759 13:43:40.069662 USB3 port 3: enabled 1
760 13:43:40.069763 USB3 port 4: enabled 0
761 13:43:40.072964 APIC: 03: enabled 1
762 13:43:40.076091 APIC: 01: enabled 1
763 13:43:40.076193 APIC: 06: enabled 1
764 13:43:40.079207 APIC: 02: enabled 1
765 13:43:40.079284 APIC: 04: enabled 1
766 13:43:40.082440 APIC: 07: enabled 1
767 13:43:40.086112 APIC: 05: enabled 1
768 13:43:40.086215 Compare with tree...
769 13:43:40.089297 Root Device: enabled 1
770 13:43:40.092436 CPU_CLUSTER: 0: enabled 1
771 13:43:40.092510 APIC: 00: enabled 1
772 13:43:40.095678 APIC: 03: enabled 1
773 13:43:40.099290 APIC: 01: enabled 1
774 13:43:40.099427 APIC: 06: enabled 1
775 13:43:40.102467 APIC: 02: enabled 1
776 13:43:40.105679 APIC: 04: enabled 1
777 13:43:40.109265 APIC: 07: enabled 1
778 13:43:40.109368 APIC: 05: enabled 1
779 13:43:40.112384 DOMAIN: 0000: enabled 1
780 13:43:40.115601 PCI: 00:00.0: enabled 1
781 13:43:40.119436 PCI: 00:02.0: enabled 1
782 13:43:40.119507 PCI: 00:04.0: enabled 0
783 13:43:40.122743 PCI: 00:05.0: enabled 0
784 13:43:40.125945 PCI: 00:12.0: enabled 1
785 13:43:40.129230 PCI: 00:12.5: enabled 0
786 13:43:40.129307 PCI: 00:12.6: enabled 0
787 13:43:40.132310 PCI: 00:14.0: enabled 1
788 13:43:40.135933 USB0 port 0: enabled 1
789 13:43:40.138928 USB2 port 0: enabled 1
790 13:43:40.142653 USB2 port 1: enabled 1
791 13:43:40.145685 USB2 port 2: enabled 0
792 13:43:40.145789 USB2 port 3: enabled 0
793 13:43:40.148855 USB2 port 5: enabled 0
794 13:43:40.152081 USB2 port 6: enabled 1
795 13:43:40.155418 USB2 port 9: enabled 1
796 13:43:40.158792 USB3 port 0: enabled 1
797 13:43:40.158890 USB3 port 1: enabled 1
798 13:43:40.162004 USB3 port 2: enabled 1
799 13:43:40.165251 USB3 port 3: enabled 1
800 13:43:40.169058 USB3 port 4: enabled 0
801 13:43:40.172379 PCI: 00:14.1: enabled 0
802 13:43:40.175699 PCI: 00:14.3: enabled 1
803 13:43:40.175788 PCI: 00:14.5: enabled 0
804 13:43:40.178975 PCI: 00:15.0: enabled 1
805 13:43:40.182193 I2C: 00:15: enabled 1
806 13:43:40.185389 PCI: 00:15.1: enabled 1
807 13:43:40.185471 I2C: 00:5d: enabled 1
808 13:43:40.188430 GENERIC: 0.0: enabled 1
809 13:43:40.192198 PCI: 00:15.2: enabled 0
810 13:43:40.195595 PCI: 00:15.3: enabled 0
811 13:43:40.198548 PCI: 00:16.0: enabled 1
812 13:43:40.198629 PCI: 00:16.1: enabled 0
813 13:43:40.201702 PCI: 00:16.2: enabled 0
814 13:43:40.205654 PCI: 00:16.3: enabled 0
815 13:43:40.208553 PCI: 00:16.4: enabled 0
816 13:43:40.211982 PCI: 00:16.5: enabled 0
817 13:43:40.212073 PCI: 00:17.0: enabled 1
818 13:43:40.215235 PCI: 00:19.0: enabled 1
819 13:43:40.218721 I2C: 00:1a: enabled 1
820 13:43:40.221979 I2C: 00:38: enabled 1
821 13:43:40.222062 I2C: 00:39: enabled 1
822 13:43:40.225109 I2C: 00:3a: enabled 1
823 13:43:40.228323 I2C: 00:3b: enabled 1
824 13:43:40.231651 PCI: 00:19.1: enabled 0
825 13:43:40.234972 PCI: 00:19.2: enabled 0
826 13:43:40.235052 PCI: 00:1a.0: enabled 0
827 13:43:40.238103 PCI: 00:1c.0: enabled 0
828 13:43:40.241870 PCI: 00:1c.1: enabled 0
829 13:43:40.244846 PCI: 00:1c.2: enabled 0
830 13:43:40.247937 PCI: 00:1c.3: enabled 0
831 13:43:40.248013 PCI: 00:1c.4: enabled 0
832 13:43:40.251884 PCI: 00:1c.5: enabled 0
833 13:43:40.255011 PCI: 00:1c.6: enabled 0
834 13:43:40.258190 PCI: 00:1c.7: enabled 0
835 13:43:40.261431 PCI: 00:1d.0: enabled 1
836 13:43:40.261507 PCI: 00:1d.1: enabled 0
837 13:43:40.264860 PCI: 00:1d.2: enabled 0
838 13:43:40.268172 PCI: 00:1d.3: enabled 0
839 13:43:40.271444 PCI: 00:1d.4: enabled 0
840 13:43:40.274873 PCI: 00:1d.5: enabled 1
841 13:43:40.274954 PCI: 00:00.0: enabled 1
842 13:43:40.278005 PCI: 00:1e.0: enabled 1
843 13:43:40.281277 PCI: 00:1e.1: enabled 0
844 13:43:40.284668 PCI: 00:1e.2: enabled 1
845 13:43:40.284738 SPI: 00: enabled 1
846 13:43:40.287813 PCI: 00:1e.3: enabled 1
847 13:43:40.290917 SPI: 01: enabled 1
848 13:43:40.294673 PCI: 00:1f.0: enabled 1
849 13:43:40.297766 PNP: 0c09.0: enabled 1
850 13:43:40.297842 PCI: 00:1f.1: enabled 1
851 13:43:40.300802 PCI: 00:1f.2: enabled 1
852 13:43:40.304523 PCI: 00:1f.3: enabled 1
853 13:43:40.307585 PCI: 00:1f.4: enabled 1
854 13:43:40.307656 PCI: 00:1f.5: enabled 1
855 13:43:40.310690 PCI: 00:1f.6: enabled 0
856 13:43:40.314398 Root Device scanning...
857 13:43:40.317650 scan_static_bus for Root Device
858 13:43:40.320894 CPU_CLUSTER: 0 enabled
859 13:43:40.320969 DOMAIN: 0000 enabled
860 13:43:40.324157 DOMAIN: 0000 scanning...
861 13:43:40.327552 PCI: pci_scan_bus for bus 00
862 13:43:40.330597 PCI: 00:00.0 [8086/0000] ops
863 13:43:40.333898 PCI: 00:00.0 [8086/9b61] enabled
864 13:43:40.337233 PCI: 00:02.0 [8086/0000] bus ops
865 13:43:40.340668 PCI: 00:02.0 [8086/9b41] enabled
866 13:43:40.343724 PCI: 00:04.0 [8086/1903] disabled
867 13:43:40.347111 PCI: 00:08.0 [8086/1911] enabled
868 13:43:40.350674 PCI: 00:12.0 [8086/02f9] enabled
869 13:43:40.353993 PCI: 00:14.0 [8086/0000] bus ops
870 13:43:40.357643 PCI: 00:14.0 [8086/02ed] enabled
871 13:43:40.360808 PCI: 00:14.2 [8086/02ef] enabled
872 13:43:40.363804 PCI: 00:14.3 [8086/02f0] enabled
873 13:43:40.367440 PCI: 00:15.0 [8086/0000] bus ops
874 13:43:40.370794 PCI: 00:15.0 [8086/02e8] enabled
875 13:43:40.374103 PCI: 00:15.1 [8086/0000] bus ops
876 13:43:40.377461 PCI: 00:15.1 [8086/02e9] enabled
877 13:43:40.380162 PCI: 00:16.0 [8086/0000] ops
878 13:43:40.383545 PCI: 00:16.0 [8086/02e0] enabled
879 13:43:40.386823 PCI: 00:17.0 [8086/0000] ops
880 13:43:40.390233 PCI: 00:17.0 [8086/02d3] enabled
881 13:43:40.393486 PCI: 00:19.0 [8086/0000] bus ops
882 13:43:40.397256 PCI: 00:19.0 [8086/02c5] enabled
883 13:43:40.400635 PCI: 00:1d.0 [8086/0000] bus ops
884 13:43:40.403897 PCI: 00:1d.0 [8086/02b0] enabled
885 13:43:40.410068 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 13:43:40.413696 PCI: 00:1e.0 [8086/0000] ops
887 13:43:40.416974 PCI: 00:1e.0 [8086/02a8] enabled
888 13:43:40.420551 PCI: 00:1e.2 [8086/0000] bus ops
889 13:43:40.423689 PCI: 00:1e.2 [8086/02aa] enabled
890 13:43:40.427145 PCI: 00:1e.3 [8086/0000] bus ops
891 13:43:40.430221 PCI: 00:1e.3 [8086/02ab] enabled
892 13:43:40.433340 PCI: 00:1f.0 [8086/0000] bus ops
893 13:43:40.437232 PCI: 00:1f.0 [8086/0284] enabled
894 13:43:40.440595 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 13:43:40.446895 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 13:43:40.450067 PCI: 00:1f.3 [8086/0000] bus ops
897 13:43:40.453332 PCI: 00:1f.3 [8086/02c8] enabled
898 13:43:40.456619 PCI: 00:1f.4 [8086/0000] bus ops
899 13:43:40.459825 PCI: 00:1f.4 [8086/02a3] enabled
900 13:43:40.463529 PCI: 00:1f.5 [8086/0000] bus ops
901 13:43:40.466628 PCI: 00:1f.5 [8086/02a4] enabled
902 13:43:40.469843 PCI: Leftover static devices:
903 13:43:40.469945 PCI: 00:05.0
904 13:43:40.473583 PCI: 00:12.5
905 13:43:40.473694 PCI: 00:12.6
906 13:43:40.476899 PCI: 00:14.1
907 13:43:40.476997 PCI: 00:14.5
908 13:43:40.477127 PCI: 00:15.2
909 13:43:40.480188 PCI: 00:15.3
910 13:43:40.480305 PCI: 00:16.1
911 13:43:40.483515 PCI: 00:16.2
912 13:43:40.483613 PCI: 00:16.3
913 13:43:40.483703 PCI: 00:16.4
914 13:43:40.486844 PCI: 00:16.5
915 13:43:40.486939 PCI: 00:19.1
916 13:43:40.490201 PCI: 00:19.2
917 13:43:40.490296 PCI: 00:1a.0
918 13:43:40.490397 PCI: 00:1c.0
919 13:43:40.493658 PCI: 00:1c.1
920 13:43:40.493762 PCI: 00:1c.2
921 13:43:40.496692 PCI: 00:1c.3
922 13:43:40.496796 PCI: 00:1c.4
923 13:43:40.499813 PCI: 00:1c.5
924 13:43:40.499896 PCI: 00:1c.6
925 13:43:40.499985 PCI: 00:1c.7
926 13:43:40.503182 PCI: 00:1d.1
927 13:43:40.503276 PCI: 00:1d.2
928 13:43:40.506664 PCI: 00:1d.3
929 13:43:40.506770 PCI: 00:1d.4
930 13:43:40.506862 PCI: 00:1d.5
931 13:43:40.509881 PCI: 00:1e.1
932 13:43:40.509976 PCI: 00:1f.1
933 13:43:40.513133 PCI: 00:1f.2
934 13:43:40.513237 PCI: 00:1f.6
935 13:43:40.516290 PCI: Check your devicetree.cb.
936 13:43:40.519987 PCI: 00:02.0 scanning...
937 13:43:40.523151 scan_generic_bus for PCI: 00:02.0
938 13:43:40.526169 scan_generic_bus for PCI: 00:02.0 done
939 13:43:40.532979 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
940 13:43:40.533086 PCI: 00:14.0 scanning...
941 13:43:40.536811 scan_static_bus for PCI: 00:14.0
942 13:43:40.539985 USB0 port 0 enabled
943 13:43:40.543262 USB0 port 0 scanning...
944 13:43:40.546614 scan_static_bus for USB0 port 0
945 13:43:40.549848 USB2 port 0 enabled
946 13:43:40.549921 USB2 port 1 enabled
947 13:43:40.553023 USB2 port 2 disabled
948 13:43:40.553101 USB2 port 3 disabled
949 13:43:40.556416 USB2 port 5 disabled
950 13:43:40.559612 USB2 port 6 enabled
951 13:43:40.559712 USB2 port 9 enabled
952 13:43:40.562927 USB3 port 0 enabled
953 13:43:40.566209 USB3 port 1 enabled
954 13:43:40.566309 USB3 port 2 enabled
955 13:43:40.569968 USB3 port 3 enabled
956 13:43:40.570071 USB3 port 4 disabled
957 13:43:40.573084 USB2 port 0 scanning...
958 13:43:40.576094 scan_static_bus for USB2 port 0
959 13:43:40.579972 scan_static_bus for USB2 port 0 done
960 13:43:40.586402 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
961 13:43:40.589776 USB2 port 1 scanning...
962 13:43:40.592962 scan_static_bus for USB2 port 1
963 13:43:40.596294 scan_static_bus for USB2 port 1 done
964 13:43:40.599532 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
965 13:43:40.602822 USB2 port 6 scanning...
966 13:43:40.606007 scan_static_bus for USB2 port 6
967 13:43:40.609454 scan_static_bus for USB2 port 6 done
968 13:43:40.616002 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
969 13:43:40.619396 USB2 port 9 scanning...
970 13:43:40.622421 scan_static_bus for USB2 port 9
971 13:43:40.626126 scan_static_bus for USB2 port 9 done
972 13:43:40.633011 scan_bus: scanning of bus USB2 port 9 took 9692 usecs
973 13:43:40.633093 USB3 port 0 scanning...
974 13:43:40.636115 scan_static_bus for USB3 port 0
975 13:43:40.639276 scan_static_bus for USB3 port 0 done
976 13:43:40.646167 scan_bus: scanning of bus USB3 port 0 took 9706 usecs
977 13:43:40.649282 USB3 port 1 scanning...
978 13:43:40.652644 scan_static_bus for USB3 port 1
979 13:43:40.655950 scan_static_bus for USB3 port 1 done
980 13:43:40.662784 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
981 13:43:40.662866 USB3 port 2 scanning...
982 13:43:40.666168 scan_static_bus for USB3 port 2
983 13:43:40.669654 scan_static_bus for USB3 port 2 done
984 13:43:40.676021 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
985 13:43:40.679075 USB3 port 3 scanning...
986 13:43:40.682108 scan_static_bus for USB3 port 3
987 13:43:40.685918 scan_static_bus for USB3 port 3 done
988 13:43:40.692484 scan_bus: scanning of bus USB3 port 3 took 9705 usecs
989 13:43:40.695673 scan_static_bus for USB0 port 0 done
990 13:43:40.698864 scan_bus: scanning of bus USB0 port 0 took 155378 usecs
991 13:43:40.705473 scan_static_bus for PCI: 00:14.0 done
992 13:43:40.709308 scan_bus: scanning of bus PCI: 00:14.0 took 172982 usecs
993 13:43:40.712529 PCI: 00:15.0 scanning...
994 13:43:40.715803 scan_generic_bus for PCI: 00:15.0
995 13:43:40.719205 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 13:43:40.725194 scan_generic_bus for PCI: 00:15.0 done
997 13:43:40.729195 scan_bus: scanning of bus PCI: 00:15.0 took 14289 usecs
998 13:43:40.732210 PCI: 00:15.1 scanning...
999 13:43:40.735222 scan_generic_bus for PCI: 00:15.1
1000 13:43:40.738893 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 13:43:40.745652 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 13:43:40.748816 scan_generic_bus for PCI: 00:15.1 done
1003 13:43:40.752180 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
1004 13:43:40.755126 PCI: 00:19.0 scanning...
1005 13:43:40.758469 scan_generic_bus for PCI: 00:19.0
1006 13:43:40.765405 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 13:43:40.768831 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 13:43:40.772081 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 13:43:40.775476 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 13:43:40.778733 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 13:43:40.785545 scan_generic_bus for PCI: 00:19.0 done
1012 13:43:40.788874 scan_bus: scanning of bus PCI: 00:19.0 took 30726 usecs
1013 13:43:40.791728 PCI: 00:1d.0 scanning...
1014 13:43:40.795534 do_pci_scan_bridge for PCI: 00:1d.0
1015 13:43:40.798228 PCI: pci_scan_bus for bus 01
1016 13:43:40.802068 PCI: 01:00.0 [1c5c/1327] enabled
1017 13:43:40.805313 Enabling Common Clock Configuration
1018 13:43:40.811517 L1 Sub-State supported from root port 29
1019 13:43:40.811595 L1 Sub-State Support = 0xf
1020 13:43:40.815481 CommonModeRestoreTime = 0x28
1021 13:43:40.822297 Power On Value = 0x16, Power On Scale = 0x0
1022 13:43:40.822389 ASPM: Enabled L1
1023 13:43:40.828177 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1024 13:43:40.831596 PCI: 00:1e.2 scanning...
1025 13:43:40.835320 scan_generic_bus for PCI: 00:1e.2
1026 13:43:40.838547 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 13:43:40.841771 scan_generic_bus for PCI: 00:1e.2 done
1028 13:43:40.847983 scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
1029 13:43:40.848065 PCI: 00:1e.3 scanning...
1030 13:43:40.854933 scan_generic_bus for PCI: 00:1e.3
1031 13:43:40.858117 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 13:43:40.861872 scan_generic_bus for PCI: 00:1e.3 done
1033 13:43:40.864985 scan_bus: scanning of bus PCI: 00:1e.3 took 13998 usecs
1034 13:43:40.868199 PCI: 00:1f.0 scanning...
1035 13:43:40.872082 scan_static_bus for PCI: 00:1f.0
1036 13:43:40.875308 PNP: 0c09.0 enabled
1037 13:43:40.878522 scan_static_bus for PCI: 00:1f.0 done
1038 13:43:40.885236 scan_bus: scanning of bus PCI: 00:1f.0 took 12071 usecs
1039 13:43:40.888624 PCI: 00:1f.3 scanning...
1040 13:43:40.891730 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1041 13:43:40.894812 PCI: 00:1f.4 scanning...
1042 13:43:40.898649 scan_generic_bus for PCI: 00:1f.4
1043 13:43:40.901810 scan_generic_bus for PCI: 00:1f.4 done
1044 13:43:40.908214 scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs
1045 13:43:40.911647 PCI: 00:1f.5 scanning...
1046 13:43:40.914936 scan_generic_bus for PCI: 00:1f.5
1047 13:43:40.918166 scan_generic_bus for PCI: 00:1f.5 done
1048 13:43:40.924780 scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
1049 13:43:40.931547 scan_bus: scanning of bus DOMAIN: 0000 took 604892 usecs
1050 13:43:40.934907 scan_static_bus for Root Device done
1051 13:43:40.938111 scan_bus: scanning of bus Root Device took 624786 usecs
1052 13:43:40.941168 done
1053 13:43:40.941244 Chrome EC: UHEPI supported
1054 13:43:40.947867 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 13:43:40.954868 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 13:43:40.960994 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 13:43:40.967821 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 13:43:40.971109 SPI flash protection: WPSW=0 SRP0=1
1059 13:43:40.978104 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 13:43:40.980952 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1061 13:43:40.984318 found VGA at PCI: 00:02.0
1062 13:43:40.987620 Setting up VGA for PCI: 00:02.0
1063 13:43:40.994034 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 13:43:40.997637 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 13:43:41.000920 Allocating resources...
1066 13:43:41.001003 Reading resources...
1067 13:43:41.007636 Root Device read_resources bus 0 link: 0
1068 13:43:41.010750 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 13:43:41.017152 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 13:43:41.021063 DOMAIN: 0000 read_resources bus 0 link: 0
1071 13:43:41.027563 PCI: 00:14.0 read_resources bus 0 link: 0
1072 13:43:41.030225 USB0 port 0 read_resources bus 0 link: 0
1073 13:43:41.038972 USB0 port 0 read_resources bus 0 link: 0 done
1074 13:43:41.041994 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 13:43:41.049805 PCI: 00:15.0 read_resources bus 1 link: 0
1076 13:43:41.052917 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 13:43:41.059567 PCI: 00:15.1 read_resources bus 2 link: 0
1078 13:43:41.062602 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 13:43:41.070012 PCI: 00:19.0 read_resources bus 3 link: 0
1080 13:43:41.076754 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 13:43:41.079903 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 13:43:41.086827 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 13:43:41.089909 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 13:43:41.096455 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 13:43:41.099831 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 13:43:41.106646 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 13:43:41.109911 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 13:43:41.116598 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 13:43:41.123151 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 13:43:41.126418 Root Device read_resources bus 0 link: 0 done
1091 13:43:41.129666 Done reading resources.
1092 13:43:41.136330 Show resources in subtree (Root Device)...After reading.
1093 13:43:41.139792 Root Device child on link 0 CPU_CLUSTER: 0
1094 13:43:41.142798 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 13:43:41.146121 APIC: 00
1096 13:43:41.146194 APIC: 03
1097 13:43:41.146253 APIC: 01
1098 13:43:41.149331 APIC: 06
1099 13:43:41.149406 APIC: 02
1100 13:43:41.149464 APIC: 04
1101 13:43:41.152411 APIC: 07
1102 13:43:41.152479 APIC: 05
1103 13:43:41.158965 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 13:43:41.212219 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 13:43:41.212778 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 13:43:41.213033 PCI: 00:00.0
1107 13:43:41.213279 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 13:43:41.213545 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 13:43:41.214008 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 13:43:41.237886 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 13:43:41.238166 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 13:43:41.238427 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 13:43:41.245161 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 13:43:41.254899 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 13:43:41.261554 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 13:43:41.271550 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 13:43:41.281024 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 13:43:41.290979 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 13:43:41.301182 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 13:43:41.310971 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 13:43:41.317499 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 13:43:41.327908 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 13:43:41.330979 PCI: 00:02.0
1124 13:43:41.341253 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 13:43:41.351139 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 13:43:41.357591 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 13:43:41.360683 PCI: 00:04.0
1128 13:43:41.360760 PCI: 00:08.0
1129 13:43:41.371297 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 13:43:41.374543 PCI: 00:12.0
1131 13:43:41.384191 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 13:43:41.387418 PCI: 00:14.0 child on link 0 USB0 port 0
1133 13:43:41.397533 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 13:43:41.404027 USB0 port 0 child on link 0 USB2 port 0
1135 13:43:41.404110 USB2 port 0
1136 13:43:41.407340 USB2 port 1
1137 13:43:41.407443 USB2 port 2
1138 13:43:41.410451 USB2 port 3
1139 13:43:41.410530 USB2 port 5
1140 13:43:41.413653 USB2 port 6
1141 13:43:41.413757 USB2 port 9
1142 13:43:41.417459 USB3 port 0
1143 13:43:41.417535 USB3 port 1
1144 13:43:41.420542 USB3 port 2
1145 13:43:41.420619 USB3 port 3
1146 13:43:41.423621 USB3 port 4
1147 13:43:41.423696 PCI: 00:14.2
1148 13:43:41.433808 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 13:43:41.443968 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 13:43:41.447067 PCI: 00:14.3
1151 13:43:41.457061 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 13:43:41.460207 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 13:43:41.470093 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 13:43:41.473294 I2C: 01:15
1155 13:43:41.476671 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 13:43:41.486482 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 13:43:41.486567 I2C: 02:5d
1158 13:43:41.489649 GENERIC: 0.0
1159 13:43:41.489732 PCI: 00:16.0
1160 13:43:41.500223 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 13:43:41.503384 PCI: 00:17.0
1162 13:43:41.512853 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 13:43:41.520002 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 13:43:41.529737 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 13:43:41.536062 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 13:43:41.546096 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 13:43:41.556251 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 13:43:41.559587 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 13:43:41.569666 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 13:43:41.569751 I2C: 03:1a
1171 13:43:41.573038 I2C: 03:38
1172 13:43:41.573121 I2C: 03:39
1173 13:43:41.576546 I2C: 03:3a
1174 13:43:41.576629 I2C: 03:3b
1175 13:43:41.583227 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 13:43:41.589272 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 13:43:41.599257 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 13:43:41.609195 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 13:43:41.609299 PCI: 01:00.0
1180 13:43:41.619386 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 13:43:41.622556 PCI: 00:1e.0
1182 13:43:41.632678 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 13:43:41.642312 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 13:43:41.648650 PCI: 00:1e.2 child on link 0 SPI: 00
1185 13:43:41.658540 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 13:43:41.658640 SPI: 00
1187 13:43:41.661841 PCI: 00:1e.3 child on link 0 SPI: 01
1188 13:43:41.672168 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 13:43:41.675559 SPI: 01
1190 13:43:41.678811 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 13:43:41.685345 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 13:43:41.695308 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 13:43:41.698618 PNP: 0c09.0
1194 13:43:41.705069 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 13:43:41.708747 PCI: 00:1f.3
1196 13:43:41.718639 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 13:43:41.728053 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 13:43:41.728133 PCI: 00:1f.4
1199 13:43:41.738187 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 13:43:41.748011 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 13:43:41.751781 PCI: 00:1f.5
1202 13:43:41.758118 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 13:43:41.764925 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 13:43:41.771496 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 13:43:41.777859 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 13:43:41.781166 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 13:43:41.784504 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 13:43:41.787838 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 13:43:41.791109 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 13:43:41.801172 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 13:43:41.807785 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 13:43:41.814210 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 13:43:41.824401 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 13:43:41.830901 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 13:43:41.834562 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 13:43:41.841120 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 13:43:41.847943 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 13:43:41.850537 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 13:43:41.853855 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 13:43:41.860709 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 13:43:41.863954 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 13:43:41.870618 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 13:43:41.873930 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 13:43:41.880744 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 13:43:41.883856 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 13:43:41.890607 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 13:43:41.893823 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 13:43:41.900438 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 13:43:41.903786 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 13:43:41.910188 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 13:43:41.913502 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 13:43:41.920647 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 13:43:41.923798 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 13:43:41.926876 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 13:43:41.933658 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 13:43:41.936738 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 13:43:41.943585 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 13:43:41.946869 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 13:43:41.953669 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 13:43:41.960229 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 13:43:41.963560 avoid_fixed_resources: DOMAIN: 0000
1242 13:43:41.970107 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 13:43:41.976895 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 13:43:41.983194 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 13:43:41.993597 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 13:43:41.999643 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 13:43:42.006678 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 13:43:42.016613 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 13:43:42.023129 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 13:43:42.029470 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 13:43:42.039657 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 13:43:42.045795 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 13:43:42.052821 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 13:43:42.055983 Setting resources...
1255 13:43:42.059133 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 13:43:42.065775 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 13:43:42.068980 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 13:43:42.072197 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 13:43:42.075610 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 13:43:42.082645 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 13:43:42.089334 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 13:43:42.095409 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 13:43:42.101926 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 13:43:42.108674 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 13:43:42.111891 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 13:43:42.118534 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 13:43:42.121909 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 13:43:42.128704 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 13:43:42.131661 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 13:43:42.138724 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 13:43:42.141850 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 13:43:42.148570 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 13:43:42.151677 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 13:43:42.158429 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 13:43:42.161798 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 13:43:42.168305 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 13:43:42.171585 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 13:43:42.178072 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 13:43:42.181450 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 13:43:42.184606 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 13:43:42.191308 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 13:43:42.194403 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 13:43:42.201514 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 13:43:42.204510 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 13:43:42.211077 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 13:43:42.214340 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 13:43:42.224366 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 13:43:42.230846 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 13:43:42.237484 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 13:43:42.244297 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 13:43:42.250594 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 13:43:42.257579 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 13:43:42.260638 Root Device assign_resources, bus 0 link: 0
1294 13:43:42.266898 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 13:43:42.273880 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 13:43:42.283542 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 13:43:42.290219 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 13:43:42.300213 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 13:43:42.307068 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 13:43:42.316642 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 13:43:42.319962 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 13:43:42.326614 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 13:43:42.333223 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 13:43:42.339804 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 13:43:42.350256 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 13:43:42.356749 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 13:43:42.363649 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 13:43:42.366617 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 13:43:42.376647 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 13:43:42.380237 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 13:43:42.383502 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 13:43:42.393968 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 13:43:42.400578 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 13:43:42.410672 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 13:43:42.416666 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 13:43:42.423320 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 13:43:42.433256 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 13:43:42.440114 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 13:43:42.446534 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 13:43:42.453192 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 13:43:42.456593 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 13:43:42.466966 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 13:43:42.476849 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 13:43:42.483165 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 13:43:42.486348 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 13:43:42.496484 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 13:43:42.499819 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 13:43:42.509712 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 13:43:42.516312 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 13:43:42.522933 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 13:43:42.526170 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 13:43:42.536486 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 13:43:42.539785 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 13:43:42.543080 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 13:43:42.549439 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 13:43:42.552694 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 13:43:42.559871 LPC: Trying to open IO window from 800 size 1ff
1338 13:43:42.565874 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 13:43:42.576145 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 13:43:42.582515 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 13:43:42.592624 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 13:43:42.595796 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 13:43:42.602652 Root Device assign_resources, bus 0 link: 0
1344 13:43:42.602750 Done setting resources.
1345 13:43:42.609212 Show resources in subtree (Root Device)...After assigning values.
1346 13:43:42.615691 Root Device child on link 0 CPU_CLUSTER: 0
1347 13:43:42.618843 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 13:43:42.618940 APIC: 00
1349 13:43:42.622757 APIC: 03
1350 13:43:42.622855 APIC: 01
1351 13:43:42.622944 APIC: 06
1352 13:43:42.625840 APIC: 02
1353 13:43:42.625919 APIC: 04
1354 13:43:42.629019 APIC: 07
1355 13:43:42.629092 APIC: 05
1356 13:43:42.632499 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 13:43:42.642603 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 13:43:42.652627 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 13:43:42.655800 PCI: 00:00.0
1360 13:43:42.665570 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 13:43:42.675524 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 13:43:42.685283 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 13:43:42.692086 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 13:43:42.701493 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 13:43:42.711335 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 13:43:42.721838 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 13:43:42.731703 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 13:43:42.741745 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 13:43:42.748180 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 13:43:42.757840 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 13:43:42.767719 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 13:43:42.777510 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 13:43:42.787952 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 13:43:42.797284 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 13:43:42.804136 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 13:43:42.807747 PCI: 00:02.0
1377 13:43:42.817289 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 13:43:42.826851 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 13:43:42.837225 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 13:43:42.840520 PCI: 00:04.0
1381 13:43:42.840601 PCI: 00:08.0
1382 13:43:42.850723 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 13:43:42.853651 PCI: 00:12.0
1384 13:43:42.863337 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 13:43:42.866761 PCI: 00:14.0 child on link 0 USB0 port 0
1386 13:43:42.876852 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 13:43:42.883489 USB0 port 0 child on link 0 USB2 port 0
1388 13:43:42.883571 USB2 port 0
1389 13:43:42.886760 USB2 port 1
1390 13:43:42.886841 USB2 port 2
1391 13:43:42.889971 USB2 port 3
1392 13:43:42.890068 USB2 port 5
1393 13:43:42.893311 USB2 port 6
1394 13:43:42.893392 USB2 port 9
1395 13:43:42.896637 USB3 port 0
1396 13:43:42.896718 USB3 port 1
1397 13:43:42.899961 USB3 port 2
1398 13:43:42.900057 USB3 port 3
1399 13:43:42.903510 USB3 port 4
1400 13:43:42.903591 PCI: 00:14.2
1401 13:43:42.916373 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 13:43:42.926349 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 13:43:42.926432 PCI: 00:14.3
1404 13:43:42.936196 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 13:43:42.943125 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 13:43:42.952984 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 13:43:42.953075 I2C: 01:15
1408 13:43:42.956196 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 13:43:42.969583 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 13:43:42.969682 I2C: 02:5d
1411 13:43:42.973018 GENERIC: 0.0
1412 13:43:42.973100 PCI: 00:16.0
1413 13:43:42.982806 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 13:43:42.986142 PCI: 00:17.0
1415 13:43:42.995803 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 13:43:43.005592 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 13:43:43.015726 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 13:43:43.022283 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 13:43:43.032127 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 13:43:43.042289 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 13:43:43.048721 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 13:43:43.058398 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 13:43:43.058516 I2C: 03:1a
1424 13:43:43.061704 I2C: 03:38
1425 13:43:43.061792 I2C: 03:39
1426 13:43:43.065296 I2C: 03:3a
1427 13:43:43.065378 I2C: 03:3b
1428 13:43:43.068279 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 13:43:43.078209 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 13:43:43.088096 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 13:43:43.098014 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 13:43:43.101279 PCI: 01:00.0
1433 13:43:43.111237 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 13:43:43.114593 PCI: 00:1e.0
1435 13:43:43.124650 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 13:43:43.134801 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 13:43:43.138017 PCI: 00:1e.2 child on link 0 SPI: 00
1438 13:43:43.147554 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 13:43:43.150804 SPI: 00
1440 13:43:43.154217 PCI: 00:1e.3 child on link 0 SPI: 01
1441 13:43:43.164443 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 13:43:43.164560 SPI: 01
1443 13:43:43.170627 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 13:43:43.177470 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 13:43:43.187287 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 13:43:43.190498 PNP: 0c09.0
1447 13:43:43.197217 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 13:43:43.200364 PCI: 00:1f.3
1449 13:43:43.210219 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 13:43:43.220155 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 13:43:43.223311 PCI: 00:1f.4
1452 13:43:43.230199 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 13:43:43.240040 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 13:43:43.243194 PCI: 00:1f.5
1455 13:43:43.253364 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 13:43:43.256977 Done allocating resources.
1457 13:43:43.260038 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 13:43:43.263997 Enabling resources...
1459 13:43:43.270185 PCI: 00:00.0 subsystem <- 8086/9b61
1460 13:43:43.270265 PCI: 00:00.0 cmd <- 06
1461 13:43:43.273556 PCI: 00:02.0 subsystem <- 8086/9b41
1462 13:43:43.277270 PCI: 00:02.0 cmd <- 03
1463 13:43:43.280323 PCI: 00:08.0 cmd <- 06
1464 13:43:43.283910 PCI: 00:12.0 subsystem <- 8086/02f9
1465 13:43:43.287224 PCI: 00:12.0 cmd <- 02
1466 13:43:43.290488 PCI: 00:14.0 subsystem <- 8086/02ed
1467 13:43:43.293799 PCI: 00:14.0 cmd <- 02
1468 13:43:43.293901 PCI: 00:14.2 cmd <- 02
1469 13:43:43.300420 PCI: 00:14.3 subsystem <- 8086/02f0
1470 13:43:43.300530 PCI: 00:14.3 cmd <- 02
1471 13:43:43.303755 PCI: 00:15.0 subsystem <- 8086/02e8
1472 13:43:43.307613 PCI: 00:15.0 cmd <- 02
1473 13:43:43.310954 PCI: 00:15.1 subsystem <- 8086/02e9
1474 13:43:43.313749 PCI: 00:15.1 cmd <- 02
1475 13:43:43.317084 PCI: 00:16.0 subsystem <- 8086/02e0
1476 13:43:43.320929 PCI: 00:16.0 cmd <- 02
1477 13:43:43.324073 PCI: 00:17.0 subsystem <- 8086/02d3
1478 13:43:43.327560 PCI: 00:17.0 cmd <- 03
1479 13:43:43.330670 PCI: 00:19.0 subsystem <- 8086/02c5
1480 13:43:43.333836 PCI: 00:19.0 cmd <- 02
1481 13:43:43.337013 PCI: 00:1d.0 bridge ctrl <- 0013
1482 13:43:43.340729 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 13:43:43.343931 PCI: 00:1d.0 cmd <- 06
1484 13:43:43.347244 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 13:43:43.350301 PCI: 00:1e.0 cmd <- 06
1486 13:43:43.353417 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 13:43:43.353500 PCI: 00:1e.2 cmd <- 06
1488 13:43:43.360526 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 13:43:43.360608 PCI: 00:1e.3 cmd <- 02
1490 13:43:43.363771 PCI: 00:1f.0 subsystem <- 8086/0284
1491 13:43:43.366670 PCI: 00:1f.0 cmd <- 407
1492 13:43:43.370718 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 13:43:43.373350 PCI: 00:1f.3 cmd <- 02
1494 13:43:43.377080 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 13:43:43.380240 PCI: 00:1f.4 cmd <- 03
1496 13:43:43.383315 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 13:43:43.387154 PCI: 00:1f.5 cmd <- 406
1498 13:43:43.395609 PCI: 01:00.0 cmd <- 02
1499 13:43:43.400350 done.
1500 13:43:43.413209 ME: Version: 14.0.39.1367
1501 13:43:43.419819 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1502 13:43:43.423104 Initializing devices...
1503 13:43:43.423181 Root Device init ...
1504 13:43:43.430170 Chrome EC: Set SMI mask to 0x0000000000000000
1505 13:43:43.433537 Chrome EC: clear events_b mask to 0x0000000000000000
1506 13:43:43.440041 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 13:43:43.446826 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 13:43:43.453105 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 13:43:43.456737 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 13:43:43.459907 Root Device init finished in 35214 usecs
1511 13:43:43.463229 CPU_CLUSTER: 0 init ...
1512 13:43:43.469643 CPU_CLUSTER: 0 init finished in 2447 usecs
1513 13:43:43.474540 PCI: 00:00.0 init ...
1514 13:43:43.477812 CPU TDP: 15 Watts
1515 13:43:43.480930 CPU PL2 = 64 Watts
1516 13:43:43.484058 PCI: 00:00.0 init finished in 7074 usecs
1517 13:43:43.487129 PCI: 00:02.0 init ...
1518 13:43:43.490628 PCI: 00:02.0 init finished in 2254 usecs
1519 13:43:43.494271 PCI: 00:08.0 init ...
1520 13:43:43.497248 PCI: 00:08.0 init finished in 2252 usecs
1521 13:43:43.500466 PCI: 00:12.0 init ...
1522 13:43:43.503973 PCI: 00:12.0 init finished in 2251 usecs
1523 13:43:43.507067 PCI: 00:14.0 init ...
1524 13:43:43.510607 PCI: 00:14.0 init finished in 2252 usecs
1525 13:43:43.513684 PCI: 00:14.2 init ...
1526 13:43:43.516963 PCI: 00:14.2 init finished in 2253 usecs
1527 13:43:43.520298 PCI: 00:14.3 init ...
1528 13:43:43.523636 PCI: 00:14.3 init finished in 2269 usecs
1529 13:43:43.526925 PCI: 00:15.0 init ...
1530 13:43:43.530907 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 13:43:43.533456 PCI: 00:15.0 init finished in 5978 usecs
1532 13:43:43.537273 PCI: 00:15.1 init ...
1533 13:43:43.540597 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 13:43:43.546915 PCI: 00:15.1 init finished in 5971 usecs
1535 13:43:43.547040 PCI: 00:16.0 init ...
1536 13:43:43.553278 PCI: 00:16.0 init finished in 2253 usecs
1537 13:43:43.557183 PCI: 00:19.0 init ...
1538 13:43:43.559888 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 13:43:43.563685 PCI: 00:19.0 init finished in 5976 usecs
1540 13:43:43.566884 PCI: 00:1d.0 init ...
1541 13:43:43.570272 Initializing PCH PCIe bridge.
1542 13:43:43.573481 PCI: 00:1d.0 init finished in 5286 usecs
1543 13:43:43.576795 PCI: 00:1f.0 init ...
1544 13:43:43.579946 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 13:43:43.586587 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 13:43:43.586691 IOAPIC: ID = 0x02
1547 13:43:43.589947 IOAPIC: Dumping registers
1548 13:43:43.593105 reg 0x0000: 0x02000000
1549 13:43:43.596183 reg 0x0001: 0x00770020
1550 13:43:43.596265 reg 0x0002: 0x00000000
1551 13:43:43.603132 PCI: 00:1f.0 init finished in 23557 usecs
1552 13:43:43.606263 PCI: 00:1f.4 init ...
1553 13:43:43.609541 PCI: 00:1f.4 init finished in 2263 usecs
1554 13:43:43.620708 PCI: 01:00.0 init ...
1555 13:43:43.624035 PCI: 01:00.0 init finished in 2252 usecs
1556 13:43:43.627982 PNP: 0c09.0 init ...
1557 13:43:43.631190 Google Chrome EC uptime: 11.095 seconds
1558 13:43:43.637870 Google Chrome AP resets since EC boot: 0
1559 13:43:43.640940 Google Chrome most recent AP reset causes:
1560 13:43:43.647671 Google Chrome EC reset flags at last EC boot: reset-pin
1561 13:43:43.650966 PNP: 0c09.0 init finished in 20571 usecs
1562 13:43:43.654206 Devices initialized
1563 13:43:43.654317 Show all devs... After init.
1564 13:43:43.658082 Root Device: enabled 1
1565 13:43:43.661193 CPU_CLUSTER: 0: enabled 1
1566 13:43:43.664255 DOMAIN: 0000: enabled 1
1567 13:43:43.664362 APIC: 00: enabled 1
1568 13:43:43.667818 PCI: 00:00.0: enabled 1
1569 13:43:43.670983 PCI: 00:02.0: enabled 1
1570 13:43:43.674246 PCI: 00:04.0: enabled 0
1571 13:43:43.674348 PCI: 00:05.0: enabled 0
1572 13:43:43.677666 PCI: 00:12.0: enabled 1
1573 13:43:43.680881 PCI: 00:12.5: enabled 0
1574 13:43:43.680998 PCI: 00:12.6: enabled 0
1575 13:43:43.684142 PCI: 00:14.0: enabled 1
1576 13:43:43.688088 PCI: 00:14.1: enabled 0
1577 13:43:43.691043 PCI: 00:14.3: enabled 1
1578 13:43:43.691148 PCI: 00:14.5: enabled 0
1579 13:43:43.694178 PCI: 00:15.0: enabled 1
1580 13:43:43.697345 PCI: 00:15.1: enabled 1
1581 13:43:43.700661 PCI: 00:15.2: enabled 0
1582 13:43:43.700748 PCI: 00:15.3: enabled 0
1583 13:43:43.703779 PCI: 00:16.0: enabled 1
1584 13:43:43.707603 PCI: 00:16.1: enabled 0
1585 13:43:43.710685 PCI: 00:16.2: enabled 0
1586 13:43:43.710768 PCI: 00:16.3: enabled 0
1587 13:43:43.713709 PCI: 00:16.4: enabled 0
1588 13:43:43.717616 PCI: 00:16.5: enabled 0
1589 13:43:43.721034 PCI: 00:17.0: enabled 1
1590 13:43:43.721120 PCI: 00:19.0: enabled 1
1591 13:43:43.724179 PCI: 00:19.1: enabled 0
1592 13:43:43.727569 PCI: 00:19.2: enabled 0
1593 13:43:43.727652 PCI: 00:1a.0: enabled 0
1594 13:43:43.730785 PCI: 00:1c.0: enabled 0
1595 13:43:43.734077 PCI: 00:1c.1: enabled 0
1596 13:43:43.737380 PCI: 00:1c.2: enabled 0
1597 13:43:43.737462 PCI: 00:1c.3: enabled 0
1598 13:43:43.740558 PCI: 00:1c.4: enabled 0
1599 13:43:43.743912 PCI: 00:1c.5: enabled 0
1600 13:43:43.747126 PCI: 00:1c.6: enabled 0
1601 13:43:43.747238 PCI: 00:1c.7: enabled 0
1602 13:43:43.750420 PCI: 00:1d.0: enabled 1
1603 13:43:43.753567 PCI: 00:1d.1: enabled 0
1604 13:43:43.756755 PCI: 00:1d.2: enabled 0
1605 13:43:43.756869 PCI: 00:1d.3: enabled 0
1606 13:43:43.760067 PCI: 00:1d.4: enabled 0
1607 13:43:43.763458 PCI: 00:1d.5: enabled 0
1608 13:43:43.763561 PCI: 00:1e.0: enabled 1
1609 13:43:43.767335 PCI: 00:1e.1: enabled 0
1610 13:43:43.770412 PCI: 00:1e.2: enabled 1
1611 13:43:43.773507 PCI: 00:1e.3: enabled 1
1612 13:43:43.773591 PCI: 00:1f.0: enabled 1
1613 13:43:43.776832 PCI: 00:1f.1: enabled 0
1614 13:43:43.779900 PCI: 00:1f.2: enabled 0
1615 13:43:43.783374 PCI: 00:1f.3: enabled 1
1616 13:43:43.783460 PCI: 00:1f.4: enabled 1
1617 13:43:43.786519 PCI: 00:1f.5: enabled 1
1618 13:43:43.790433 PCI: 00:1f.6: enabled 0
1619 13:43:43.793705 USB0 port 0: enabled 1
1620 13:43:43.793788 I2C: 01:15: enabled 1
1621 13:43:43.796884 I2C: 02:5d: enabled 1
1622 13:43:43.800094 GENERIC: 0.0: enabled 1
1623 13:43:43.800179 I2C: 03:1a: enabled 1
1624 13:43:43.803432 I2C: 03:38: enabled 1
1625 13:43:43.806704 I2C: 03:39: enabled 1
1626 13:43:43.806788 I2C: 03:3a: enabled 1
1627 13:43:43.809744 I2C: 03:3b: enabled 1
1628 13:43:43.813054 PCI: 00:00.0: enabled 1
1629 13:43:43.813151 SPI: 00: enabled 1
1630 13:43:43.816874 SPI: 01: enabled 1
1631 13:43:43.819995 PNP: 0c09.0: enabled 1
1632 13:43:43.820075 USB2 port 0: enabled 1
1633 13:43:43.823231 USB2 port 1: enabled 1
1634 13:43:43.826509 USB2 port 2: enabled 0
1635 13:43:43.826599 USB2 port 3: enabled 0
1636 13:43:43.829786 USB2 port 5: enabled 0
1637 13:43:43.832969 USB2 port 6: enabled 1
1638 13:43:43.836271 USB2 port 9: enabled 1
1639 13:43:43.836349 USB3 port 0: enabled 1
1640 13:43:43.839565 USB3 port 1: enabled 1
1641 13:43:43.842774 USB3 port 2: enabled 1
1642 13:43:43.842865 USB3 port 3: enabled 1
1643 13:43:43.846609 USB3 port 4: enabled 0
1644 13:43:43.849818 APIC: 03: enabled 1
1645 13:43:43.849901 APIC: 01: enabled 1
1646 13:43:43.853177 APIC: 06: enabled 1
1647 13:43:43.856607 APIC: 02: enabled 1
1648 13:43:43.856690 APIC: 04: enabled 1
1649 13:43:43.859805 APIC: 07: enabled 1
1650 13:43:43.859887 APIC: 05: enabled 1
1651 13:43:43.863152 PCI: 00:08.0: enabled 1
1652 13:43:43.866561 PCI: 00:14.2: enabled 1
1653 13:43:43.869608 PCI: 01:00.0: enabled 1
1654 13:43:43.873259 Disabling ACPI via APMC:
1655 13:43:43.873355 done.
1656 13:43:43.879522 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 13:43:43.883226 ELOG: NV offset 0xaf0000 size 0x4000
1658 13:43:43.889972 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 13:43:43.896175 ELOG: Event(17) added with size 13 at 2023-06-07 13:43:32 UTC
1660 13:43:43.902799 POST: Unexpected post code in previous boot: 0x73
1661 13:43:43.909747 ELOG: Event(A3) added with size 11 at 2023-06-07 13:43:32 UTC
1662 13:43:43.916348 ELOG: Event(A6) added with size 13 at 2023-06-07 13:43:32 UTC
1663 13:43:43.922964 ELOG: Event(92) added with size 9 at 2023-06-07 13:43:32 UTC
1664 13:43:43.926193 ELOG: Event(93) added with size 9 at 2023-06-07 13:43:32 UTC
1665 13:43:43.932487 ELOG: Event(9A) added with size 9 at 2023-06-07 13:43:32 UTC
1666 13:43:43.939018 ELOG: Event(9E) added with size 10 at 2023-06-07 13:43:32 UTC
1667 13:43:43.946174 ELOG: Event(9F) added with size 14 at 2023-06-07 13:43:32 UTC
1668 13:43:43.952811 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1669 13:43:43.959216 ELOG: Event(A1) added with size 10 at 2023-06-07 13:43:32 UTC
1670 13:43:43.965873 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1671 13:43:43.972536 ELOG: Event(A0) added with size 9 at 2023-06-07 13:43:32 UTC
1672 13:43:43.975659 elog_add_boot_reason: Logged dev mode boot
1673 13:43:43.978822 Finalize devices...
1674 13:43:43.982517 PCI: 00:17.0 final
1675 13:43:43.982624 Devices finalized
1676 13:43:43.988595 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1677 13:43:43.992395 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1678 13:43:43.998559 ME: HFSTS1 : 0x90000245
1679 13:43:44.002291 ME: HFSTS2 : 0x3B850126
1680 13:43:44.005525 ME: HFSTS3 : 0x00000020
1681 13:43:44.008878 ME: HFSTS4 : 0x00004800
1682 13:43:44.015516 ME: HFSTS5 : 0x00000000
1683 13:43:44.018877 ME: HFSTS6 : 0x40400006
1684 13:43:44.022059 ME: Manufacturing Mode : NO
1685 13:43:44.025228 ME: FW Partition Table : OK
1686 13:43:44.028536 ME: Bringup Loader Failure : NO
1687 13:43:44.032003 ME: Firmware Init Complete : YES
1688 13:43:44.035152 ME: Boot Options Present : NO
1689 13:43:44.038515 ME: Update In Progress : NO
1690 13:43:44.041758 ME: D0i3 Support : YES
1691 13:43:44.045054 ME: Low Power State Enabled : NO
1692 13:43:44.048524 ME: CPU Replaced : NO
1693 13:43:44.051636 ME: CPU Replacement Valid : YES
1694 13:43:44.054900 ME: Current Working State : 5
1695 13:43:44.058229 ME: Current Operation State : 1
1696 13:43:44.061493 ME: Current Operation Mode : 0
1697 13:43:44.064670 ME: Error Code : 0
1698 13:43:44.068567 ME: CPU Debug Disabled : YES
1699 13:43:44.071881 ME: TXT Support : NO
1700 13:43:44.075108 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1701 13:43:44.081656 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1702 13:43:44.084949 CBFS @ c08000 size 3f8000
1703 13:43:44.091621 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1704 13:43:44.094812 CBFS: Locating 'fallback/dsdt.aml'
1705 13:43:44.097881 CBFS: Found @ offset 10bb80 size 3fa5
1706 13:43:44.101505 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 13:43:44.104557 CBFS @ c08000 size 3f8000
1708 13:43:44.111208 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 13:43:44.114324 CBFS: Locating 'fallback/slic'
1710 13:43:44.118205 CBFS: 'fallback/slic' not found.
1711 13:43:44.124767 ACPI: Writing ACPI tables at 99b3e000.
1712 13:43:44.124850 ACPI: * FACS
1713 13:43:44.128006 ACPI: * DSDT
1714 13:43:44.131129 Ramoops buffer: 0x100000@0x99a3d000.
1715 13:43:44.134427 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1716 13:43:44.141110 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1717 13:43:44.144229 Google Chrome EC: version:
1718 13:43:44.147457 ro: helios_v2.0.2659-56403530b
1719 13:43:44.150636 rw: helios_v2.0.2849-c41de27e7d
1720 13:43:44.150714 running image: 1
1721 13:43:44.155240 ACPI: * FADT
1722 13:43:44.155355 SCI is IRQ9
1723 13:43:44.161685 ACPI: added table 1/32, length now 40
1724 13:43:44.161768 ACPI: * SSDT
1725 13:43:44.165021 Found 1 CPU(s) with 8 core(s) each.
1726 13:43:44.168244 Error: Could not locate 'wifi_sar' in VPD.
1727 13:43:44.174879 Checking CBFS for default SAR values
1728 13:43:44.178219 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1729 13:43:44.182071 CBFS @ c08000 size 3f8000
1730 13:43:44.188060 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1731 13:43:44.191388 CBFS: Locating 'wifi_sar_defaults.hex'
1732 13:43:44.195061 CBFS: Found @ offset 5fac0 size 77
1733 13:43:44.198649 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1734 13:43:44.204921 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1735 13:43:44.208632 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1736 13:43:44.214748 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1737 13:43:44.218059 failed to find key in VPD: dsm_calib_r0_0
1738 13:43:44.227867 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1739 13:43:44.231766 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1740 13:43:44.235041 failed to find key in VPD: dsm_calib_r0_1
1741 13:43:44.244610 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1742 13:43:44.251073 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1743 13:43:44.254955 failed to find key in VPD: dsm_calib_r0_2
1744 13:43:44.264518 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1745 13:43:44.267629 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1746 13:43:44.274841 failed to find key in VPD: dsm_calib_r0_3
1747 13:43:44.280964 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1748 13:43:44.287445 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1749 13:43:44.290869 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1750 13:43:44.294217 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1751 13:43:44.298324 EC returned error result code 1
1752 13:43:44.302228 EC returned error result code 1
1753 13:43:44.306066 EC returned error result code 1
1754 13:43:44.312282 PS2K: Bad resp from EC. Vivaldi disabled!
1755 13:43:44.316027 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1756 13:43:44.322356 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1757 13:43:44.328948 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1758 13:43:44.332120 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1759 13:43:44.338791 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1760 13:43:44.345173 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1761 13:43:44.351699 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1762 13:43:44.355250 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1763 13:43:44.361680 ACPI: added table 2/32, length now 44
1764 13:43:44.361784 ACPI: * MCFG
1765 13:43:44.365530 ACPI: added table 3/32, length now 48
1766 13:43:44.368731 ACPI: * TPM2
1767 13:43:44.371942 TPM2 log created at 99a2d000
1768 13:43:44.375231 ACPI: added table 4/32, length now 52
1769 13:43:44.375354 ACPI: * MADT
1770 13:43:44.378505 SCI is IRQ9
1771 13:43:44.381842 ACPI: added table 5/32, length now 56
1772 13:43:44.381942 current = 99b43ac0
1773 13:43:44.385138 ACPI: * DMAR
1774 13:43:44.388284 ACPI: added table 6/32, length now 60
1775 13:43:44.391538 ACPI: * IGD OpRegion
1776 13:43:44.391614 GMA: Found VBT in CBFS
1777 13:43:44.394882 GMA: Found valid VBT in CBFS
1778 13:43:44.398278 ACPI: added table 7/32, length now 64
1779 13:43:44.401536 ACPI: * HPET
1780 13:43:44.404733 ACPI: added table 8/32, length now 68
1781 13:43:44.404831 ACPI: done.
1782 13:43:44.408588 ACPI tables: 31744 bytes.
1783 13:43:44.411904 smbios_write_tables: 99a2c000
1784 13:43:44.415113 EC returned error result code 3
1785 13:43:44.418207 Couldn't obtain OEM name from CBI
1786 13:43:44.421918 Create SMBIOS type 17
1787 13:43:44.425202 PCI: 00:00.0 (Intel Cannonlake)
1788 13:43:44.428327 PCI: 00:14.3 (Intel WiFi)
1789 13:43:44.431663 SMBIOS tables: 939 bytes.
1790 13:43:44.435407 Writing table forward entry at 0x00000500
1791 13:43:44.441941 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1792 13:43:44.445071 Writing coreboot table at 0x99b62000
1793 13:43:44.451495 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1794 13:43:44.454943 1. 0000000000001000-000000000009ffff: RAM
1795 13:43:44.457919 2. 00000000000a0000-00000000000fffff: RESERVED
1796 13:43:44.464861 3. 0000000000100000-0000000099a2bfff: RAM
1797 13:43:44.471785 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1798 13:43:44.475031 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1799 13:43:44.481783 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1800 13:43:44.484970 7. 000000009a000000-000000009f7fffff: RESERVED
1801 13:43:44.491486 8. 00000000e0000000-00000000efffffff: RESERVED
1802 13:43:44.494859 9. 00000000fc000000-00000000fc000fff: RESERVED
1803 13:43:44.501341 10. 00000000fe000000-00000000fe00ffff: RESERVED
1804 13:43:44.504790 11. 00000000fed10000-00000000fed17fff: RESERVED
1805 13:43:44.507796 12. 00000000fed80000-00000000fed83fff: RESERVED
1806 13:43:44.514720 13. 00000000fed90000-00000000fed91fff: RESERVED
1807 13:43:44.517905 14. 00000000feda0000-00000000feda1fff: RESERVED
1808 13:43:44.524745 15. 0000000100000000-000000045e7fffff: RAM
1809 13:43:44.527983 Graphics framebuffer located at 0xc0000000
1810 13:43:44.530941 Passing 5 GPIOs to payload:
1811 13:43:44.534075 NAME | PORT | POLARITY | VALUE
1812 13:43:44.541131 write protect | undefined | high | low
1813 13:43:44.544546 lid | undefined | high | high
1814 13:43:44.550927 power | undefined | high | low
1815 13:43:44.557303 oprom | undefined | high | low
1816 13:43:44.561096 EC in RW | 0x000000cb | high | low
1817 13:43:44.564220 Board ID: 4
1818 13:43:44.567264 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1819 13:43:44.570695 CBFS @ c08000 size 3f8000
1820 13:43:44.577301 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1821 13:43:44.584224 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1822 13:43:44.584822 coreboot table: 1492 bytes.
1823 13:43:44.587930 IMD ROOT 0. 99fff000 00001000
1824 13:43:44.591259 IMD SMALL 1. 99ffe000 00001000
1825 13:43:44.594004 FSP MEMORY 2. 99c4e000 003b0000
1826 13:43:44.597288 CONSOLE 3. 99c2e000 00020000
1827 13:43:44.600612 FMAP 4. 99c2d000 0000054e
1828 13:43:44.603939 TIME STAMP 5. 99c2c000 00000910
1829 13:43:44.607232 VBOOT WORK 6. 99c18000 00014000
1830 13:43:44.610727 MRC DATA 7. 99c16000 00001958
1831 13:43:44.614494 ROMSTG STCK 8. 99c15000 00001000
1832 13:43:44.617705 AFTER CAR 9. 99c0b000 0000a000
1833 13:43:44.621063 RAMSTAGE 10. 99baf000 0005c000
1834 13:43:44.624427 REFCODE 11. 99b7a000 00035000
1835 13:43:44.627601 SMM BACKUP 12. 99b6a000 00010000
1836 13:43:44.630545 COREBOOT 13. 99b62000 00008000
1837 13:43:44.634511 ACPI 14. 99b3e000 00024000
1838 13:43:44.637671 ACPI GNVS 15. 99b3d000 00001000
1839 13:43:44.640934 RAMOOPS 16. 99a3d000 00100000
1840 13:43:44.644282 TPM2 TCGLOG17. 99a2d000 00010000
1841 13:43:44.647782 SMBIOS 18. 99a2c000 00000800
1842 13:43:44.650949 IMD small region:
1843 13:43:44.653983 IMD ROOT 0. 99ffec00 00000400
1844 13:43:44.657123 FSP RUNTIME 1. 99ffebe0 00000004
1845 13:43:44.660573 EC HOSTEVENT 2. 99ffebc0 00000008
1846 13:43:44.663751 POWER STATE 3. 99ffeb80 00000040
1847 13:43:44.667688 ROMSTAGE 4. 99ffeb60 00000004
1848 13:43:44.670471 MEM INFO 5. 99ffe9a0 000001b9
1849 13:43:44.674190 VPD 6. 99ffe920 0000006c
1850 13:43:44.677478 MTRR: Physical address space:
1851 13:43:44.683872 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1852 13:43:44.690645 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1853 13:43:44.696814 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1854 13:43:44.703814 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1855 13:43:44.710732 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1856 13:43:44.717071 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1857 13:43:44.723268 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1858 13:43:44.726519 MTRR: Fixed MSR 0x250 0x0606060606060606
1859 13:43:44.730369 MTRR: Fixed MSR 0x258 0x0606060606060606
1860 13:43:44.733941 MTRR: Fixed MSR 0x259 0x0000000000000000
1861 13:43:44.740305 MTRR: Fixed MSR 0x268 0x0606060606060606
1862 13:43:44.743610 MTRR: Fixed MSR 0x269 0x0606060606060606
1863 13:43:44.746991 MTRR: Fixed MSR 0x26a 0x0606060606060606
1864 13:43:44.750185 MTRR: Fixed MSR 0x26b 0x0606060606060606
1865 13:43:44.753081 MTRR: Fixed MSR 0x26c 0x0606060606060606
1866 13:43:44.760040 MTRR: Fixed MSR 0x26d 0x0606060606060606
1867 13:43:44.763125 MTRR: Fixed MSR 0x26e 0x0606060606060606
1868 13:43:44.766376 MTRR: Fixed MSR 0x26f 0x0606060606060606
1869 13:43:44.769719 call enable_fixed_mtrr()
1870 13:43:44.773079 CPU physical address size: 39 bits
1871 13:43:44.779942 MTRR: default type WB/UC MTRR counts: 6/8.
1872 13:43:44.783004 MTRR: WB selected as default type.
1873 13:43:44.786197 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1874 13:43:44.793026 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1875 13:43:44.799855 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1876 13:43:44.805901 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1877 13:43:44.812444 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1878 13:43:44.818942 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1879 13:43:44.822354 MTRR: Fixed MSR 0x250 0x0606060606060606
1880 13:43:44.829446 MTRR: Fixed MSR 0x258 0x0606060606060606
1881 13:43:44.832606 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 13:43:44.835911 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 13:43:44.839271 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 13:43:44.845914 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 13:43:44.849350 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 13:43:44.852518 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 13:43:44.855811 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 13:43:44.862634 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 13:43:44.865904 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 13:43:44.866388
1891 13:43:44.866721 MTRR check
1892 13:43:44.869039 call enable_fixed_mtrr()
1893 13:43:44.872302 Fixed MTRRs : Enabled
1894 13:43:44.875668 Variable MTRRs: Enabled
1895 13:43:44.876100
1896 13:43:44.878843 CPU physical address size: 39 bits
1897 13:43:44.882235 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1898 13:43:44.888772 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 13:43:44.892007 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 13:43:44.895827 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 13:43:44.898713 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 13:43:44.905394 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 13:43:44.908924 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 13:43:44.912046 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 13:43:44.915458 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 13:43:44.922312 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 13:43:44.925627 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 13:43:44.928903 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 13:43:44.932011 MTRR: Fixed MSR 0x250 0x0606060606060606
1910 13:43:44.935071 call enable_fixed_mtrr()
1911 13:43:44.938160 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 13:43:44.944890 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 13:43:44.947989 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 13:43:44.951252 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 13:43:44.954604 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 13:43:44.961240 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 13:43:44.965075 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 13:43:44.968320 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 13:43:44.971570 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 13:43:44.974545 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 13:43:44.981849 CPU physical address size: 39 bits
1922 13:43:44.984954 call enable_fixed_mtrr()
1923 13:43:44.988132 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1924 13:43:44.991315 CPU physical address size: 39 bits
1925 13:43:44.994546 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 13:43:45.001237 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 13:43:45.004645 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 13:43:45.008168 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 13:43:45.011187 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 13:43:45.017879 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 13:43:45.021028 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 13:43:45.024462 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 13:43:45.027730 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 13:43:45.031222 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 13:43:45.037388 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 13:43:45.040628 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 13:43:45.044545 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 13:43:45.047881 call enable_fixed_mtrr()
1939 13:43:45.050949 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 13:43:45.054181 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 13:43:45.060921 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 13:43:45.064205 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 13:43:45.067518 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 13:43:45.070942 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 13:43:45.077445 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 13:43:45.080958 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 13:43:45.084004 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 13:43:45.087417 CPU physical address size: 39 bits
1949 13:43:45.091198 call enable_fixed_mtrr()
1950 13:43:45.094122 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 13:43:45.100935 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 13:43:45.104312 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 13:43:45.107587 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 13:43:45.110869 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 13:43:45.114035 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 13:43:45.120646 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 13:43:45.123705 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 13:43:45.127355 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 13:43:45.130573 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 13:43:45.137235 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 13:43:45.140529 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 13:43:45.143959 call enable_fixed_mtrr()
1963 13:43:45.147261 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 13:43:45.150824 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 13:43:45.154160 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 13:43:45.160592 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 13:43:45.163896 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 13:43:45.167295 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 13:43:45.170672 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 13:43:45.176650 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 13:43:45.179847 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 13:43:45.183815 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 13:43:45.186974 CPU physical address size: 39 bits
1974 13:43:45.190753 call enable_fixed_mtrr()
1975 13:43:45.193896 CPU physical address size: 39 bits
1976 13:43:45.196769 CPU physical address size: 39 bits
1977 13:43:45.200617 CBFS @ c08000 size 3f8000
1978 13:43:45.206580 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1979 13:43:45.210506 CBFS: Locating 'fallback/payload'
1980 13:43:45.214007 CBFS: Found @ offset 1c96c0 size 3f798
1981 13:43:45.220238 Checking segment from ROM address 0xffdd16f8
1982 13:43:45.223709 Checking segment from ROM address 0xffdd1714
1983 13:43:45.226738 Loading segment from ROM address 0xffdd16f8
1984 13:43:45.229831 code (compression=0)
1985 13:43:45.239865 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1986 13:43:45.246428 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1987 13:43:45.249593 it's not compressed!
1988 13:43:45.341251 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1989 13:43:45.347951 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1990 13:43:45.351075 Loading segment from ROM address 0xffdd1714
1991 13:43:45.354301 Entry Point 0x30000000
1992 13:43:45.358050 Loaded segments
1993 13:43:45.363921 Finalizing chipset.
1994 13:43:45.367084 Finalizing SMM.
1995 13:43:45.370443 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1996 13:43:45.373602 mp_park_aps done after 0 msecs.
1997 13:43:45.380132 Jumping to boot code at 30000000(99b62000)
1998 13:43:45.386818 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1999 13:43:45.387420
2000 13:43:45.387784
2001 13:43:45.388134
2002 13:43:45.390222 Starting depthcharge on Helios...
2003 13:43:45.390639
2004 13:43:45.391732 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2005 13:43:45.392215 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2006 13:43:45.392628 Setting prompt string to ['hatch:']
2007 13:43:45.393020 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2008 13:43:45.400048 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2009 13:43:45.400829
2010 13:43:45.406614 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2011 13:43:45.407377
2012 13:43:45.413045 board_setup: Info: eMMC controller not present; skipping
2013 13:43:45.413473
2014 13:43:45.416228 New NVMe Controller 0x30053ac0 @ 00:1d:00
2015 13:43:45.416654
2016 13:43:45.422791 board_setup: Info: SDHCI controller not present; skipping
2017 13:43:45.423214
2018 13:43:45.429760 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2019 13:43:45.430198
2020 13:43:45.430823 Wipe memory regions:
2021 13:43:45.431217
2022 13:43:45.433306 [0x00000000001000, 0x000000000a0000)
2023 13:43:45.433814
2024 13:43:45.436487 [0x00000000100000, 0x00000030000000)
2025 13:43:45.502889
2026 13:43:45.505938 [0x00000030657430, 0x00000099a2c000)
2027 13:43:45.643144
2028 13:43:45.646224 [0x00000100000000, 0x0000045e800000)
2029 13:43:47.028680
2030 13:43:47.029168 R8152: Initializing
2031 13:43:47.029501
2032 13:43:47.031910 Version 9 (ocp_data = 6010)
2033 13:43:47.036643
2034 13:43:47.037137 R8152: Done initializing
2035 13:43:47.037488
2036 13:43:47.039823 Adding net device
2037 13:43:47.522516
2038 13:43:47.523024 R8152: Initializing
2039 13:43:47.523390
2040 13:43:47.525853 Version 6 (ocp_data = 5c30)
2041 13:43:47.526273
2042 13:43:47.529234 R8152: Done initializing
2043 13:43:47.529841
2044 13:43:47.532277 net_add_device: Attemp to include the same device
2045 13:43:47.535995
2046 13:43:47.543172 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2047 13:43:47.543635
2048 13:43:47.543988
2049 13:43:47.544315
2050 13:43:47.545061 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2052 13:43:47.646154 hatch: tftpboot 192.168.201.1 10624690/tftp-deploy-d2m3l8ct/kernel/bzImage 10624690/tftp-deploy-d2m3l8ct/kernel/cmdline 10624690/tftp-deploy-d2m3l8ct/ramdisk/ramdisk.cpio.gz
2053 13:43:47.646869 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2054 13:43:47.647468 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2055 13:43:47.651585 tftpboot 192.168.201.1 10624690/tftp-deploy-d2m3l8ct/kernel/bzImaploy-d2m3l8ct/kernel/cmdline 10624690/tftp-deploy-d2m3l8ct/ramdisk/ramdisk.cpio.gz
2056 13:43:47.652004
2057 13:43:47.652406 Waiting for link
2058 13:43:47.852399
2059 13:43:47.852989 done.
2060 13:43:47.853363
2061 13:43:47.853702 MAC: 00:24:32:50:19:be
2062 13:43:47.854024
2063 13:43:47.855586 Sending DHCP discover... done.
2064 13:43:47.856184
2065 13:43:47.859176 Waiting for reply... done.
2066 13:43:47.859716
2067 13:43:47.863237 Sending DHCP request... done.
2068 13:43:47.863704
2069 13:43:47.873463 Waiting for reply... done.
2070 13:43:47.873882
2071 13:43:47.874210 My ip is 192.168.201.15
2072 13:43:47.874517
2073 13:43:47.877280 The DHCP server ip is 192.168.201.1
2074 13:43:47.880619
2075 13:43:47.883761 TFTP server IP predefined by user: 192.168.201.1
2076 13:43:47.884177
2077 13:43:47.890204 Bootfile predefined by user: 10624690/tftp-deploy-d2m3l8ct/kernel/bzImage
2078 13:43:47.890621
2079 13:43:47.893473 Sending tftp read request... done.
2080 13:43:47.893975
2081 13:43:47.902039 Waiting for the transfer...
2082 13:43:47.902566
2083 13:43:48.497558 00000000 ################################################################
2084 13:43:48.498050
2085 13:43:49.157924 00080000 ################################################################
2086 13:43:49.158416
2087 13:43:49.823689 00100000 ################################################################
2088 13:43:49.824184
2089 13:43:50.475193 00180000 ################################################################
2090 13:43:50.475729
2091 13:43:51.037101 00200000 ################################################################
2092 13:43:51.037239
2093 13:43:51.587925 00280000 ################################################################
2094 13:43:51.588087
2095 13:43:52.132822 00300000 ################################################################
2096 13:43:52.132965
2097 13:43:52.665850 00380000 ################################################################
2098 13:43:52.665988
2099 13:43:53.199801 00400000 ################################################################
2100 13:43:53.199933
2101 13:43:53.722806 00480000 ################################################################
2102 13:43:53.722937
2103 13:43:54.271865 00500000 ################################################################
2104 13:43:54.272010
2105 13:43:54.821041 00580000 ################################################################
2106 13:43:54.821201
2107 13:43:55.347283 00600000 ################################################################
2108 13:43:55.347478
2109 13:43:55.910455 00680000 ################################################################
2110 13:43:55.910590
2111 13:43:56.489019 00700000 ################################################################
2112 13:43:56.489159
2113 13:43:56.512756 00780000 ### done.
2114 13:43:56.512848
2115 13:43:56.516351 The bootfile was 7884688 bytes long.
2116 13:43:56.516434
2117 13:43:56.519383 Sending tftp read request... done.
2118 13:43:56.519466
2119 13:43:56.522969 Waiting for the transfer...
2120 13:43:56.523051
2121 13:43:57.082229 00000000 ################################################################
2122 13:43:57.082367
2123 13:43:57.651505 00080000 ################################################################
2124 13:43:57.651646
2125 13:43:58.196957 00100000 ################################################################
2126 13:43:58.197095
2127 13:43:58.752242 00180000 ################################################################
2128 13:43:58.752380
2129 13:43:59.335283 00200000 ################################################################
2130 13:43:59.335454
2131 13:44:00.021187 00280000 ################################################################
2132 13:44:00.021750
2133 13:44:00.730318 00300000 ################################################################
2134 13:44:00.730869
2135 13:44:01.448165 00380000 ################################################################
2136 13:44:01.448671
2137 13:44:02.181935 00400000 ################################################################
2138 13:44:02.182462
2139 13:44:02.904937 00480000 ################################################################
2140 13:44:02.905428
2141 13:44:03.611544 00500000 ################################################################
2142 13:44:03.612039
2143 13:44:03.927725 00580000 ############################# done.
2144 13:44:03.928119
2145 13:44:03.930844 Sending tftp read request... done.
2146 13:44:03.931067
2147 13:44:03.933993 Waiting for the transfer...
2148 13:44:03.934216
2149 13:44:03.934390 00000000 # done.
2150 13:44:03.934556
2151 13:44:03.943667 Command line loaded dynamically from TFTP file: 10624690/tftp-deploy-d2m3l8ct/kernel/cmdline
2152 13:44:03.943842
2153 13:44:03.967152 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10624690/extract-nfsrootfs-6mq8mg_k,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2154 13:44:03.967316
2155 13:44:03.973827 ec_init(0): CrosEC protocol v3 supported (256, 256)
2156 13:44:03.977440
2157 13:44:03.980560 Shutting down all USB controllers.
2158 13:44:03.980708
2159 13:44:03.980779 Removing current net device
2160 13:44:03.984387
2161 13:44:03.984510 Finalizing coreboot
2162 13:44:03.984631
2163 13:44:03.990947 Exiting depthcharge with code 4 at timestamp: 25954480
2164 13:44:03.991039
2165 13:44:03.991109
2166 13:44:03.991174 Starting kernel ...
2167 13:44:03.991237
2168 13:44:03.991300
2169 13:44:03.991695 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2170 13:44:03.991800 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2171 13:44:03.991881 Setting prompt string to ['Linux version [0-9]']
2172 13:44:03.991955 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 13:44:03.992028 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2175 13:48:26.992075 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2177 13:48:26.992273 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2179 13:48:26.992458 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 13:48:26.992754 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 13:48:26.993051 Cleaning after the job
2185 13:48:26.993134 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/ramdisk
2186 13:48:26.993930 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/kernel
2187 13:48:26.994934 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/nfsrootfs
2188 13:48:27.082674 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624690/tftp-deploy-d2m3l8ct/modules
2189 13:48:27.083105 start: 4.1 power-off (timeout 00:00:30) [common]
2190 13:48:27.083270 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2191 13:48:27.157980 >> Command sent successfully.
2192 13:48:27.160475 Returned 0 in 0 seconds
2193 13:48:27.260946 end: 4.1 power-off (duration 00:00:00) [common]
2195 13:48:27.261305 start: 4.2 read-feedback (timeout 00:10:00) [common]
2196 13:48:27.261601 Listened to connection for namespace 'common' for up to 1s
2198 13:48:27.261982 Listened to connection for namespace 'common' for up to 1s
2199 13:48:28.262537 Finalising connection for namespace 'common'
2200 13:48:28.262757 Disconnecting from shell: Finalise
2201 13:48:28.262897
2202 13:48:28.363214 end: 4.2 read-feedback (duration 00:00:01) [common]
2203 13:48:28.363374 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624690
2204 13:48:28.759750 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624690
2205 13:48:28.759951 JobError: Your job cannot terminate cleanly.