Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 13:42:57.756390 lava-dispatcher, installed at version: 2023.05.1
2 13:42:57.756642 start: 0 validate
3 13:42:57.756797 Start time: 2023-06-07 13:42:57.756783+00:00 (UTC)
4 13:42:57.756948 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:42:57.757098 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:42:58.043492 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:42:58.043695 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:42:58.303649 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:42:58.304437 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:43:00.890554 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:43:00.891124 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:43:01.169182 validate duration: 3.41
14 13:43:01.170455 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:43:01.171003 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:43:01.171521 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:43:01.172159 Not decompressing ramdisk as can be used compressed.
18 13:43:01.172635 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
19 13:43:01.173004 saving as /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/ramdisk/initrd.cpio.gz
20 13:43:01.173412 total size: 5671546 (5MB)
21 13:43:01.697813 progress 0% (0MB)
22 13:43:01.706129 progress 5% (0MB)
23 13:43:01.714077 progress 10% (0MB)
24 13:43:01.721143 progress 15% (0MB)
25 13:43:01.727735 progress 20% (1MB)
26 13:43:01.732463 progress 25% (1MB)
27 13:43:01.735943 progress 30% (1MB)
28 13:43:01.739334 progress 35% (1MB)
29 13:43:01.742224 progress 40% (2MB)
30 13:43:01.744730 progress 45% (2MB)
31 13:43:01.747137 progress 50% (2MB)
32 13:43:01.749546 progress 55% (3MB)
33 13:43:01.751482 progress 60% (3MB)
34 13:43:01.753597 progress 65% (3MB)
35 13:43:01.755679 progress 70% (3MB)
36 13:43:01.757380 progress 75% (4MB)
37 13:43:01.759264 progress 80% (4MB)
38 13:43:01.761043 progress 85% (4MB)
39 13:43:01.762608 progress 90% (4MB)
40 13:43:01.764325 progress 95% (5MB)
41 13:43:01.766103 progress 100% (5MB)
42 13:43:01.766224 5MB downloaded in 0.59s (9.12MB/s)
43 13:43:01.766389 end: 1.1.1 http-download (duration 00:00:01) [common]
45 13:43:01.766647 end: 1.1 download-retry (duration 00:00:01) [common]
46 13:43:01.766742 start: 1.2 download-retry (timeout 00:09:59) [common]
47 13:43:01.766834 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 13:43:01.766985 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:43:01.767132 saving as /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/kernel/bzImage
50 13:43:01.767230 total size: 7884688 (7MB)
51 13:43:01.767296 No compression specified
52 13:43:01.768479 progress 0% (0MB)
53 13:43:01.770863 progress 5% (0MB)
54 13:43:01.773195 progress 10% (0MB)
55 13:43:01.775497 progress 15% (1MB)
56 13:43:01.777827 progress 20% (1MB)
57 13:43:01.780171 progress 25% (1MB)
58 13:43:01.782410 progress 30% (2MB)
59 13:43:01.784742 progress 35% (2MB)
60 13:43:01.787130 progress 40% (3MB)
61 13:43:01.789453 progress 45% (3MB)
62 13:43:01.791747 progress 50% (3MB)
63 13:43:01.793995 progress 55% (4MB)
64 13:43:01.796240 progress 60% (4MB)
65 13:43:01.798488 progress 65% (4MB)
66 13:43:01.800730 progress 70% (5MB)
67 13:43:01.802968 progress 75% (5MB)
68 13:43:01.805214 progress 80% (6MB)
69 13:43:01.807455 progress 85% (6MB)
70 13:43:01.809691 progress 90% (6MB)
71 13:43:01.811939 progress 95% (7MB)
72 13:43:01.814198 progress 100% (7MB)
73 13:43:01.814402 7MB downloaded in 0.05s (159.42MB/s)
74 13:43:01.814558 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:43:01.814813 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:43:01.814910 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:43:01.815006 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:43:01.815157 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
80 13:43:01.815238 saving as /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/nfsrootfs/full.rootfs.tar
81 13:43:01.815309 total size: 125914312 (120MB)
82 13:43:01.815378 Using unxz to decompress xz
83 13:43:01.819265 progress 0% (0MB)
84 13:43:02.348824 progress 5% (6MB)
85 13:43:02.900534 progress 10% (12MB)
86 13:43:03.459760 progress 15% (18MB)
87 13:43:04.024569 progress 20% (24MB)
88 13:43:04.400453 progress 25% (30MB)
89 13:43:04.780699 progress 30% (36MB)
90 13:43:05.077607 progress 35% (42MB)
91 13:43:05.298841 progress 40% (48MB)
92 13:43:05.714580 progress 45% (54MB)
93 13:43:06.123602 progress 50% (60MB)
94 13:43:06.508225 progress 55% (66MB)
95 13:43:06.919608 progress 60% (72MB)
96 13:43:07.303622 progress 65% (78MB)
97 13:43:07.751506 progress 70% (84MB)
98 13:43:08.224085 progress 75% (90MB)
99 13:43:08.686202 progress 80% (96MB)
100 13:43:08.790591 progress 85% (102MB)
101 13:43:08.971089 progress 90% (108MB)
102 13:43:09.349882 progress 95% (114MB)
103 13:43:09.772187 progress 100% (120MB)
104 13:43:09.778758 120MB downloaded in 7.96s (15.08MB/s)
105 13:43:09.779088 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:43:09.779381 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:43:09.779491 start: 1.4 download-retry (timeout 00:09:51) [common]
109 13:43:09.779592 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 13:43:09.779761 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:43:09.779842 saving as /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/modules/modules.tar
112 13:43:09.779912 total size: 253384 (0MB)
113 13:43:09.779982 Using unxz to decompress xz
114 13:43:09.783803 progress 12% (0MB)
115 13:43:09.784251 progress 25% (0MB)
116 13:43:09.784512 progress 38% (0MB)
117 13:43:09.786035 progress 51% (0MB)
118 13:43:09.788128 progress 64% (0MB)
119 13:43:09.790044 progress 77% (0MB)
120 13:43:09.792388 progress 90% (0MB)
121 13:43:09.794398 progress 100% (0MB)
122 13:43:09.800863 0MB downloaded in 0.02s (11.54MB/s)
123 13:43:09.801163 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:43:09.801470 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:43:09.801580 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 13:43:09.801688 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 13:43:12.959662 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10624679/extract-nfsrootfs-itodgctc
129 13:43:12.959886 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 13:43:12.960006 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 13:43:12.960188 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv
132 13:43:12.960328 makedir: /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin
133 13:43:12.960439 makedir: /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/tests
134 13:43:12.960546 makedir: /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/results
135 13:43:12.960657 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-add-keys
136 13:43:12.960812 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-add-sources
137 13:43:12.960952 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-background-process-start
138 13:43:12.961091 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-background-process-stop
139 13:43:12.961228 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-common-functions
140 13:43:12.961370 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-echo-ipv4
141 13:43:12.961508 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-install-packages
142 13:43:12.961643 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-installed-packages
143 13:43:12.961779 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-os-build
144 13:43:12.961915 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-probe-channel
145 13:43:12.962050 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-probe-ip
146 13:43:12.962185 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-target-ip
147 13:43:12.962319 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-target-mac
148 13:43:12.962451 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-target-storage
149 13:43:12.962590 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-test-case
150 13:43:12.962728 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-test-event
151 13:43:12.962861 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-test-feedback
152 13:43:12.962995 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-test-raise
153 13:43:12.963129 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-test-reference
154 13:43:12.963263 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-test-runner
155 13:43:12.963396 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-test-set
156 13:43:12.963538 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-test-shell
157 13:43:12.963674 Updating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-install-packages (oe)
158 13:43:13.049768 Updating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/bin/lava-installed-packages (oe)
159 13:43:13.049997 Creating /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/environment
160 13:43:13.050132 LAVA metadata
161 13:43:13.050220 - LAVA_JOB_ID=10624679
162 13:43:13.050295 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:43:13.050427 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
164 13:43:13.050505 skipped lava-vland-overlay
165 13:43:13.050593 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:43:13.050684 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
167 13:43:13.050754 skipped lava-multinode-overlay
168 13:43:13.050836 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:43:13.050923 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
170 13:43:13.051010 Loading test definitions
171 13:43:13.051112 start: 1.5.2.3.1 git-repo-action (timeout 00:09:48) [common]
172 13:43:13.051194 Using /lava-10624679 at stage 0
173 13:43:13.051301 Fetching tests from https://github.com/kernelci/test-definitions
174 13:43:13.051387 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/0/tests/0_ltp-mm'
175 13:43:18.031143 Running '/usr/bin/git checkout kernelci.org
176 13:43:18.076277 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
177 13:43:18.077108 uuid=10624679_1.5.2.3.1 testdef=None
178 13:43:18.077275 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
180 13:43:18.077539 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
181 13:43:18.078427 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 13:43:18.078688 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
184 13:43:18.079881 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 13:43:18.080148 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
187 13:43:18.081252 runner path: /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/0/tests/0_ltp-mm test_uuid 10624679_1.5.2.3.1
188 13:43:18.081349 SKIPFILE='skipfile-lkft.yaml'
189 13:43:18.081420 SKIP_INSTALL='true'
190 13:43:18.081485 TST_CMDFILES='mm'
191 13:43:18.081661 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 13:43:18.081905 Creating lava-test-runner.conf files
194 13:43:18.081991 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624679/lava-overlay-uin3_arv/lava-10624679/0 for stage 0
195 13:43:18.082131 - 0_ltp-mm
196 13:43:18.082245 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
197 13:43:18.082341 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
198 13:43:26.305866 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
199 13:43:26.306040 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
200 13:43:26.306145 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 13:43:26.306262 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
202 13:43:26.306369 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
203 13:43:26.459270 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 13:43:26.459720 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
205 13:43:26.459858 extracting modules file /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624679/extract-nfsrootfs-itodgctc
206 13:43:26.474406 extracting modules file /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624679/extract-overlay-ramdisk-dclivdsv/ramdisk
207 13:43:26.488714 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 13:43:26.488866 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
209 13:43:26.488970 [common] Applying overlay to NFS
210 13:43:26.489049 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624679/compress-overlay-fdzvcwum/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624679/extract-nfsrootfs-itodgctc
211 13:43:27.486128 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 13:43:27.486314 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
213 13:43:27.486422 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 13:43:27.486523 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
215 13:43:27.486613 Building ramdisk /var/lib/lava/dispatcher/tmp/10624679/extract-overlay-ramdisk-dclivdsv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624679/extract-overlay-ramdisk-dclivdsv/ramdisk
216 13:43:27.569154 >> 27217 blocks
217 13:43:28.199246 rename /var/lib/lava/dispatcher/tmp/10624679/extract-overlay-ramdisk-dclivdsv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/ramdisk/ramdisk.cpio.gz
218 13:43:28.199722 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 13:43:28.199855 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
220 13:43:28.199967 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
221 13:43:28.200069 No mkimage arch provided, not using FIT.
222 13:43:28.200166 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 13:43:28.200255 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 13:43:28.200371 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
225 13:43:28.200472 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
226 13:43:28.200560 No LXC device requested
227 13:43:28.200648 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 13:43:28.200744 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
229 13:43:28.200838 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 13:43:28.200919 Checking files for TFTP limit of 4294967296 bytes.
231 13:43:28.201365 end: 1 tftp-deploy (duration 00:00:27) [common]
232 13:43:28.201480 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 13:43:28.201579 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 13:43:28.201716 substitutions:
235 13:43:28.201793 - {DTB}: None
236 13:43:28.201860 - {INITRD}: 10624679/tftp-deploy-dwgtszj1/ramdisk/ramdisk.cpio.gz
237 13:43:28.201927 - {KERNEL}: 10624679/tftp-deploy-dwgtszj1/kernel/bzImage
238 13:43:28.201991 - {LAVA_MAC}: None
239 13:43:28.202052 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10624679/extract-nfsrootfs-itodgctc
240 13:43:28.202115 - {NFS_SERVER_IP}: 192.168.201.1
241 13:43:28.202175 - {PRESEED_CONFIG}: None
242 13:43:28.202234 - {PRESEED_LOCAL}: None
243 13:43:28.202293 - {RAMDISK}: 10624679/tftp-deploy-dwgtszj1/ramdisk/ramdisk.cpio.gz
244 13:43:28.202352 - {ROOT_PART}: None
245 13:43:28.202410 - {ROOT}: None
246 13:43:28.202469 - {SERVER_IP}: 192.168.201.1
247 13:43:28.202528 - {TEE}: None
248 13:43:28.202587 Parsed boot commands:
249 13:43:28.202644 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 13:43:28.202837 Parsed boot commands: tftpboot 192.168.201.1 10624679/tftp-deploy-dwgtszj1/kernel/bzImage 10624679/tftp-deploy-dwgtszj1/kernel/cmdline 10624679/tftp-deploy-dwgtszj1/ramdisk/ramdisk.cpio.gz
251 13:43:28.202934 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 13:43:28.203025 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 13:43:28.203126 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 13:43:28.203217 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 13:43:28.203292 Not connected, no need to disconnect.
256 13:43:28.203372 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 13:43:28.203469 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 13:43:28.203544 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
259 13:43:28.207243 Setting prompt string to ['lava-test: # ']
260 13:43:28.207613 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 13:43:28.207733 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 13:43:28.207844 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 13:43:28.207940 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 13:43:28.208148 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
265 13:43:33.344266 >> Command sent successfully.
266 13:43:33.347022 Returned 0 in 5 seconds
267 13:43:33.447390 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 13:43:33.447760 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 13:43:33.447893 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 13:43:33.447999 Setting prompt string to 'Starting depthcharge on Helios...'
272 13:43:33.448074 Changing prompt to 'Starting depthcharge on Helios...'
273 13:43:33.448151 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 13:43:33.448426 [Enter `^Ec?' for help]
275 13:43:34.069844
276 13:43:34.070005
277 13:43:34.079772 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 13:43:34.083111 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 13:43:34.089353 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 13:43:34.093004 CPU: AES supported, TXT NOT supported, VT supported
281 13:43:34.099580 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 13:43:34.103250 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 13:43:34.109956 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 13:43:34.112982 VBOOT: Loading verstage.
285 13:43:34.116614 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 13:43:34.123186 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 13:43:34.126552 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 13:43:34.129595 CBFS @ c08000 size 3f8000
289 13:43:34.136270 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 13:43:34.139370 CBFS: Locating 'fallback/verstage'
291 13:43:34.142866 CBFS: Found @ offset 10fb80 size 1072c
292 13:43:34.146176
293 13:43:34.146274
294 13:43:34.156333 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 13:43:34.170592 Probing TPM: . done!
296 13:43:34.173747 TPM ready after 0 ms
297 13:43:34.177205 Connected to device vid:did:rid of 1ae0:0028:00
298 13:43:34.187217 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
299 13:43:34.190982 Initialized TPM device CR50 revision 0
300 13:43:34.233112 tlcl_send_startup: Startup return code is 0
301 13:43:34.233245 TPM: setup succeeded
302 13:43:34.245723 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 13:43:34.249398 Chrome EC: UHEPI supported
304 13:43:34.253108 Phase 1
305 13:43:34.256289 FMAP: area GBB found @ c05000 (12288 bytes)
306 13:43:34.263024 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 13:43:34.263123 Phase 2
308 13:43:34.266150 Phase 3
309 13:43:34.269272 FMAP: area GBB found @ c05000 (12288 bytes)
310 13:43:34.276171 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 13:43:34.282825 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
312 13:43:34.286175 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
313 13:43:34.293063 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 13:43:34.308450 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
315 13:43:34.311415 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
316 13:43:34.318488 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 13:43:34.322729 Phase 4
318 13:43:34.325738 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
319 13:43:34.332177 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 13:43:34.511569 VB2:vb2_rsa_verify_digest() Digest check failed!
321 13:43:34.518292 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 13:43:34.518449 Saving nvdata
323 13:43:34.521662 Reboot requested (10020007)
324 13:43:34.525096 board_reset() called!
325 13:43:34.525201 full_reset() called!
326 13:43:39.036202
327 13:43:39.036379
328 13:43:39.046625 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 13:43:39.049839 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 13:43:39.056848 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 13:43:39.059818 CPU: AES supported, TXT NOT supported, VT supported
332 13:43:39.066787 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 13:43:39.069783 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 13:43:39.076618 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 13:43:39.079761 VBOOT: Loading verstage.
336 13:43:39.082965 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 13:43:39.089606 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 13:43:39.093396 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 13:43:39.096576 CBFS @ c08000 size 3f8000
340 13:43:39.102589 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 13:43:39.106053 CBFS: Locating 'fallback/verstage'
342 13:43:39.109718 CBFS: Found @ offset 10fb80 size 1072c
343 13:43:39.112786
344 13:43:39.112881
345 13:43:39.123036 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 13:43:39.137338 Probing TPM: . done!
347 13:43:39.140858 TPM ready after 0 ms
348 13:43:39.143858 Connected to device vid:did:rid of 1ae0:0028:00
349 13:43:39.154217 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
350 13:43:39.158042 Initialized TPM device CR50 revision 0
351 13:43:39.199931 tlcl_send_startup: Startup return code is 0
352 13:43:39.200080 TPM: setup succeeded
353 13:43:39.213016 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 13:43:39.216199 Chrome EC: UHEPI supported
355 13:43:39.220227 Phase 1
356 13:43:39.223251 FMAP: area GBB found @ c05000 (12288 bytes)
357 13:43:39.229808 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 13:43:39.236608 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 13:43:39.239825 Recovery requested (1009000e)
360 13:43:39.245052 Saving nvdata
361 13:43:39.251337 tlcl_extend: response is 0
362 13:43:39.260764 tlcl_extend: response is 0
363 13:43:39.267104 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 13:43:39.270373 CBFS @ c08000 size 3f8000
365 13:43:39.277194 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 13:43:39.280300 CBFS: Locating 'fallback/romstage'
367 13:43:39.284083 CBFS: Found @ offset 80 size 145fc
368 13:43:39.287133 Accumulated console time in verstage 98 ms
369 13:43:39.287235
370 13:43:39.287338
371 13:43:39.300633 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 13:43:39.306841 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 13:43:39.310135 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 13:43:39.313310 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 13:43:39.320076 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
376 13:43:39.323155 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 13:43:39.327051 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
378 13:43:39.330253 TCO_STS: 0000 0000
379 13:43:39.333474 GEN_PMCON: e0015238 00000200
380 13:43:39.336626 GBLRST_CAUSE: 00000000 00000000
381 13:43:39.336725 prev_sleep_state 5
382 13:43:39.340223 Boot Count incremented to 58541
383 13:43:39.346704 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 13:43:39.350640 CBFS @ c08000 size 3f8000
385 13:43:39.357234 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 13:43:39.357332 CBFS: Locating 'fspm.bin'
387 13:43:39.363504 CBFS: Found @ offset 5ffc0 size 71000
388 13:43:39.366725 Chrome EC: UHEPI supported
389 13:43:39.373185 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 13:43:39.377017 Probing TPM: done!
391 13:43:39.383339 Connected to device vid:did:rid of 1ae0:0028:00
392 13:43:39.393655 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
393 13:43:39.399321 Initialized TPM device CR50 revision 0
394 13:43:39.408324 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 13:43:39.414702 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 13:43:39.418647 MRC cache found, size 1948
397 13:43:39.421706 bootmode is set to: 2
398 13:43:39.425051 PRMRR disabled by config.
399 13:43:39.425163 SPD INDEX = 1
400 13:43:39.431595 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 13:43:39.434713 CBFS @ c08000 size 3f8000
402 13:43:39.441401 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 13:43:39.441528 CBFS: Locating 'spd.bin'
404 13:43:39.445071 CBFS: Found @ offset 5fb80 size 400
405 13:43:39.448315 SPD: module type is LPDDR3
406 13:43:39.451565 SPD: module part is
407 13:43:39.458059 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 13:43:39.461760 SPD: device width 4 bits, bus width 8 bits
409 13:43:39.464937 SPD: module size is 4096 MB (per channel)
410 13:43:39.468108 memory slot: 0 configuration done.
411 13:43:39.471312 memory slot: 2 configuration done.
412 13:43:39.522597 CBMEM:
413 13:43:39.526219 IMD: root @ 99fff000 254 entries.
414 13:43:39.529434 IMD: root @ 99ffec00 62 entries.
415 13:43:39.532592 External stage cache:
416 13:43:39.535648 IMD: root @ 9abff000 254 entries.
417 13:43:39.539119 IMD: root @ 9abfec00 62 entries.
418 13:43:39.546036 Chrome EC: clear events_b mask to 0x0000000020004000
419 13:43:39.558826 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 13:43:39.572384 tlcl_write: response is 0
421 13:43:39.580829 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 13:43:39.587369 MRC: TPM MRC hash updated successfully.
423 13:43:39.587501 2 DIMMs found
424 13:43:39.591228 SMM Memory Map
425 13:43:39.594513 SMRAM : 0x9a000000 0x1000000
426 13:43:39.597884 Subregion 0: 0x9a000000 0xa00000
427 13:43:39.601038 Subregion 1: 0x9aa00000 0x200000
428 13:43:39.604138 Subregion 2: 0x9ac00000 0x400000
429 13:43:39.607705 top_of_ram = 0x9a000000
430 13:43:39.611380 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 13:43:39.617523 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 13:43:39.621192 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 13:43:39.627676 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 13:43:39.630603 CBFS @ c08000 size 3f8000
435 13:43:39.634556 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 13:43:39.637613 CBFS: Locating 'fallback/postcar'
437 13:43:39.640803 CBFS: Found @ offset 107000 size 4b44
438 13:43:39.647221 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 13:43:39.659834 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 13:43:39.662964 Processing 180 relocs. Offset value of 0x97c0c000
441 13:43:39.671454 Accumulated console time in romstage 285 ms
442 13:43:39.671558
443 13:43:39.671635
444 13:43:39.681730 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 13:43:39.688179 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 13:43:39.691350 CBFS @ c08000 size 3f8000
447 13:43:39.695168 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 13:43:39.697766 CBFS: Locating 'fallback/ramstage'
449 13:43:39.704535 CBFS: Found @ offset 43380 size 1b9e8
450 13:43:39.711196 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 13:43:39.743172 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 13:43:39.746196 Processing 3976 relocs. Offset value of 0x98db0000
453 13:43:39.752754 Accumulated console time in postcar 52 ms
454 13:43:39.752850
455 13:43:39.752929
456 13:43:39.763015 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 13:43:39.766308 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 13:43:39.773200 WARNING: RO_VPD is uninitialized or empty.
459 13:43:39.776511 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 13:43:39.782914 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 13:43:39.783010 Normal boot.
462 13:43:39.789569 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 13:43:39.793278 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 13:43:39.796491 CBFS @ c08000 size 3f8000
465 13:43:39.803337 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 13:43:39.806441 CBFS: Locating 'cpu_microcode_blob.bin'
467 13:43:39.809868 CBFS: Found @ offset 14700 size 2ec00
468 13:43:39.812958 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 13:43:39.816128 Skip microcode update
470 13:43:39.819834 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 13:43:39.822849 CBFS @ c08000 size 3f8000
472 13:43:39.829634 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 13:43:39.832682 CBFS: Locating 'fsps.bin'
474 13:43:39.836217 CBFS: Found @ offset d1fc0 size 35000
475 13:43:39.861479 Detected 4 core, 8 thread CPU.
476 13:43:39.864588 Setting up SMI for CPU
477 13:43:39.867582 IED base = 0x9ac00000
478 13:43:39.867681 IED size = 0x00400000
479 13:43:39.870887 Will perform SMM setup.
480 13:43:39.877763 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 13:43:39.884579 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 13:43:39.890692 Processing 16 relocs. Offset value of 0x00030000
483 13:43:39.890788 Attempting to start 7 APs
484 13:43:39.897177 Waiting for 10ms after sending INIT.
485 13:43:39.910961 Waiting for 1st SIPI to complete...done.
486 13:43:39.911061 AP: slot 6 apic_id 6.
487 13:43:39.914098 AP: slot 3 apic_id 7.
488 13:43:39.917155 AP: slot 2 apic_id 1.
489 13:43:39.920748 Waiting for 2nd SIPI to complete...done.
490 13:43:39.924099 AP: slot 1 apic_id 2.
491 13:43:39.924198 AP: slot 4 apic_id 3.
492 13:43:39.927724 AP: slot 5 apic_id 4.
493 13:43:39.930564 AP: slot 7 apic_id 5.
494 13:43:39.937265 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 13:43:39.943968 Processing 13 relocs. Offset value of 0x00038000
496 13:43:39.947131 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 13:43:39.954095 Installing SMM handler to 0x9a000000
498 13:43:39.960589 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 13:43:39.964006 Processing 658 relocs. Offset value of 0x9a010000
500 13:43:39.974168 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 13:43:39.977481 Processing 13 relocs. Offset value of 0x9a008000
502 13:43:39.983395 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 13:43:39.990593 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 13:43:39.996992 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 13:43:40.000398 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 13:43:40.006875 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 13:43:40.013553 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 13:43:40.019870 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 13:43:40.023278 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 13:43:40.026834 Clearing SMI status registers
511 13:43:40.030460 SMI_STS: PM1
512 13:43:40.030589 PM1_STS: PWRBTN
513 13:43:40.033456 TCO_STS: SECOND_TO
514 13:43:40.037014 New SMBASE 0x9a000000
515 13:43:40.040420 In relocation handler: CPU 0
516 13:43:40.043971 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 13:43:40.046894 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 13:43:40.050508 Relocation complete.
519 13:43:40.054074 New SMBASE 0x99fff800
520 13:43:40.054164 In relocation handler: CPU 2
521 13:43:40.060052 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
522 13:43:40.063936 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 13:43:40.067004 Relocation complete.
524 13:43:40.067123 New SMBASE 0x99fff400
525 13:43:40.070118 In relocation handler: CPU 3
526 13:43:40.076689 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
527 13:43:40.079995 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 13:43:40.083978 Relocation complete.
529 13:43:40.084086 New SMBASE 0x99ffe800
530 13:43:40.087091 In relocation handler: CPU 6
531 13:43:40.093554 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
532 13:43:40.096793 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 13:43:40.099946 Relocation complete.
534 13:43:40.100041 New SMBASE 0x99fff000
535 13:43:40.103910 In relocation handler: CPU 4
536 13:43:40.107174 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
537 13:43:40.113699 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 13:43:40.117124 Relocation complete.
539 13:43:40.117219 New SMBASE 0x99fffc00
540 13:43:40.120109 In relocation handler: CPU 1
541 13:43:40.123310 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
542 13:43:40.130378 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 13:43:40.130476 Relocation complete.
544 13:43:40.133561 New SMBASE 0x99ffec00
545 13:43:40.137239 In relocation handler: CPU 5
546 13:43:40.140183 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
547 13:43:40.146924 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 13:43:40.147020 Relocation complete.
549 13:43:40.150062 New SMBASE 0x99ffe400
550 13:43:40.153495 In relocation handler: CPU 7
551 13:43:40.157154 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
552 13:43:40.163688 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 13:43:40.163784 Relocation complete.
554 13:43:40.166726 Initializing CPU #0
555 13:43:40.169783 CPU: vendor Intel device 806ec
556 13:43:40.173725 CPU: family 06, model 8e, stepping 0c
557 13:43:40.176840 Clearing out pending MCEs
558 13:43:40.179997 Setting up local APIC...
559 13:43:40.180092 apic_id: 0x00 done.
560 13:43:40.183479 Turbo is available but hidden
561 13:43:40.186655 Turbo is available and visible
562 13:43:40.189909 VMX status: enabled
563 13:43:40.193041 IA32_FEATURE_CONTROL status: locked
564 13:43:40.193136 Skip microcode update
565 13:43:40.196989 CPU #0 initialized
566 13:43:40.200066 Initializing CPU #2
567 13:43:40.200160 Initializing CPU #6
568 13:43:40.203207 Initializing CPU #3
569 13:43:40.207098 CPU: vendor Intel device 806ec
570 13:43:40.210327 CPU: family 06, model 8e, stepping 0c
571 13:43:40.213540 CPU: vendor Intel device 806ec
572 13:43:40.216673 CPU: family 06, model 8e, stepping 0c
573 13:43:40.220076 Clearing out pending MCEs
574 13:43:40.223419 Initializing CPU #4
575 13:43:40.223521 Initializing CPU #1
576 13:43:40.226580 CPU: vendor Intel device 806ec
577 13:43:40.230273 CPU: family 06, model 8e, stepping 0c
578 13:43:40.233490 CPU: vendor Intel device 806ec
579 13:43:40.236689 CPU: family 06, model 8e, stepping 0c
580 13:43:40.240022 Clearing out pending MCEs
581 13:43:40.243016 Clearing out pending MCEs
582 13:43:40.246681 Setting up local APIC...
583 13:43:40.246777 Initializing CPU #7
584 13:43:40.249893 Initializing CPU #5
585 13:43:40.253529 CPU: vendor Intel device 806ec
586 13:43:40.256581 CPU: family 06, model 8e, stepping 0c
587 13:43:40.260144 CPU: vendor Intel device 806ec
588 13:43:40.263130 CPU: family 06, model 8e, stepping 0c
589 13:43:40.266756 Clearing out pending MCEs
590 13:43:40.269726 Clearing out pending MCEs
591 13:43:40.269821 Setting up local APIC...
592 13:43:40.273279 apic_id: 0x03 done.
593 13:43:40.276335 Setting up local APIC...
594 13:43:40.276431 apic_id: 0x05 done.
595 13:43:40.280064 Setting up local APIC...
596 13:43:40.283257 apic_id: 0x02 done.
597 13:43:40.283364 VMX status: enabled
598 13:43:40.286430 VMX status: enabled
599 13:43:40.290039 IA32_FEATURE_CONTROL status: locked
600 13:43:40.293188 IA32_FEATURE_CONTROL status: locked
601 13:43:40.296404 Skip microcode update
602 13:43:40.299841 Clearing out pending MCEs
603 13:43:40.299972 Setting up local APIC...
604 13:43:40.303137 CPU: vendor Intel device 806ec
605 13:43:40.309880 CPU: family 06, model 8e, stepping 0c
606 13:43:40.310027 Clearing out pending MCEs
607 13:43:40.313416 Setting up local APIC...
608 13:43:40.316389 VMX status: enabled
609 13:43:40.316488 apic_id: 0x04 done.
610 13:43:40.319988 IA32_FEATURE_CONTROL status: locked
611 13:43:40.323237 VMX status: enabled
612 13:43:40.326526 Skip microcode update
613 13:43:40.326873 Setting up local APIC...
614 13:43:40.329865 CPU #4 initialized
615 13:43:40.333441 Skip microcode update
616 13:43:40.336606 IA32_FEATURE_CONTROL status: locked
617 13:43:40.337087 CPU #7 initialized
618 13:43:40.339834 Skip microcode update
619 13:43:40.343147 apic_id: 0x06 done.
620 13:43:40.343565 CPU #1 initialized
621 13:43:40.346868 apic_id: 0x07 done.
622 13:43:40.350034 VMX status: enabled
623 13:43:40.350406 VMX status: enabled
624 13:43:40.353405 IA32_FEATURE_CONTROL status: locked
625 13:43:40.356673 CPU #5 initialized
626 13:43:40.357123 apic_id: 0x01 done.
627 13:43:40.363531 IA32_FEATURE_CONTROL status: locked
628 13:43:40.364009 Skip microcode update
629 13:43:40.366441 Skip microcode update
630 13:43:40.366943 CPU #6 initialized
631 13:43:40.370179 CPU #3 initialized
632 13:43:40.373438 VMX status: enabled
633 13:43:40.376984 IA32_FEATURE_CONTROL status: locked
634 13:43:40.377373 Skip microcode update
635 13:43:40.379855 CPU #2 initialized
636 13:43:40.383695 bsp_do_flight_plan done after 461 msecs.
637 13:43:40.386925 CPU: frequency set to 4200 MHz
638 13:43:40.390111 Enabling SMIs.
639 13:43:40.390518 Locking SMM.
640 13:43:40.405258 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 13:43:40.408612 CBFS @ c08000 size 3f8000
642 13:43:40.415111 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 13:43:40.415500 CBFS: Locating 'vbt.bin'
644 13:43:40.418412 CBFS: Found @ offset 5f5c0 size 499
645 13:43:40.424996 Found a VBT of 4608 bytes after decompression
646 13:43:40.606293 Display FSP Version Info HOB
647 13:43:40.609499 Reference Code - CPU = 9.0.1e.30
648 13:43:40.612750 uCode Version = 0.0.0.ca
649 13:43:40.615874 TXT ACM version = ff.ff.ff.ffff
650 13:43:40.619088 Display FSP Version Info HOB
651 13:43:40.622405 Reference Code - ME = 9.0.1e.30
652 13:43:40.625745 MEBx version = 0.0.0.0
653 13:43:40.629226 ME Firmware Version = Consumer SKU
654 13:43:40.632465 Display FSP Version Info HOB
655 13:43:40.635929 Reference Code - CML PCH = 9.0.1e.30
656 13:43:40.639229 PCH-CRID Status = Disabled
657 13:43:40.642338 PCH-CRID Original Value = ff.ff.ff.ffff
658 13:43:40.645590 PCH-CRID New Value = ff.ff.ff.ffff
659 13:43:40.648871 OPROM - RST - RAID = ff.ff.ff.ffff
660 13:43:40.652158 ChipsetInit Base Version = ff.ff.ff.ffff
661 13:43:40.655361 ChipsetInit Oem Version = ff.ff.ff.ffff
662 13:43:40.659468 Display FSP Version Info HOB
663 13:43:40.665793 Reference Code - SA - System Agent = 9.0.1e.30
664 13:43:40.669023 Reference Code - MRC = 0.7.1.6c
665 13:43:40.669399 SA - PCIe Version = 9.0.1e.30
666 13:43:40.672273 SA-CRID Status = Disabled
667 13:43:40.675542 SA-CRID Original Value = 0.0.0.c
668 13:43:40.678798 SA-CRID New Value = 0.0.0.c
669 13:43:40.682575 OPROM - VBIOS = ff.ff.ff.ffff
670 13:43:40.682954 RTC Init
671 13:43:40.689380 Set power on after power failure.
672 13:43:40.689829 Disabling Deep S3
673 13:43:40.692419 Disabling Deep S3
674 13:43:40.692877 Disabling Deep S4
675 13:43:40.696106 Disabling Deep S4
676 13:43:40.696491 Disabling Deep S5
677 13:43:40.699110 Disabling Deep S5
678 13:43:40.705727 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
679 13:43:40.706099 Enumerating buses...
680 13:43:40.711929 Show all devs... Before device enumeration.
681 13:43:40.712298 Root Device: enabled 1
682 13:43:40.715412 CPU_CLUSTER: 0: enabled 1
683 13:43:40.718616 DOMAIN: 0000: enabled 1
684 13:43:40.718754 APIC: 00: enabled 1
685 13:43:40.722402 PCI: 00:00.0: enabled 1
686 13:43:40.725569 PCI: 00:02.0: enabled 1
687 13:43:40.728835 PCI: 00:04.0: enabled 0
688 13:43:40.728930 PCI: 00:05.0: enabled 0
689 13:43:40.732089 PCI: 00:12.0: enabled 1
690 13:43:40.735366 PCI: 00:12.5: enabled 0
691 13:43:40.738582 PCI: 00:12.6: enabled 0
692 13:43:40.738676 PCI: 00:14.0: enabled 1
693 13:43:40.741875 PCI: 00:14.1: enabled 0
694 13:43:40.745063 PCI: 00:14.3: enabled 1
695 13:43:40.748424 PCI: 00:14.5: enabled 0
696 13:43:40.748508 PCI: 00:15.0: enabled 1
697 13:43:40.751685 PCI: 00:15.1: enabled 1
698 13:43:40.755462 PCI: 00:15.2: enabled 0
699 13:43:40.755550 PCI: 00:15.3: enabled 0
700 13:43:40.758737 PCI: 00:16.0: enabled 1
701 13:43:40.761867 PCI: 00:16.1: enabled 0
702 13:43:40.765183 PCI: 00:16.2: enabled 0
703 13:43:40.765303 PCI: 00:16.3: enabled 0
704 13:43:40.768428 PCI: 00:16.4: enabled 0
705 13:43:40.771554 PCI: 00:16.5: enabled 0
706 13:43:40.774778 PCI: 00:17.0: enabled 1
707 13:43:40.774877 PCI: 00:19.0: enabled 1
708 13:43:40.778051 PCI: 00:19.1: enabled 0
709 13:43:40.781337 PCI: 00:19.2: enabled 0
710 13:43:40.785336 PCI: 00:1a.0: enabled 0
711 13:43:40.785453 PCI: 00:1c.0: enabled 0
712 13:43:40.788096 PCI: 00:1c.1: enabled 0
713 13:43:40.791652 PCI: 00:1c.2: enabled 0
714 13:43:40.794819 PCI: 00:1c.3: enabled 0
715 13:43:40.794938 PCI: 00:1c.4: enabled 0
716 13:43:40.797990 PCI: 00:1c.5: enabled 0
717 13:43:40.801757 PCI: 00:1c.6: enabled 0
718 13:43:40.801896 PCI: 00:1c.7: enabled 0
719 13:43:40.804786 PCI: 00:1d.0: enabled 1
720 13:43:40.808184 PCI: 00:1d.1: enabled 0
721 13:43:40.811296 PCI: 00:1d.2: enabled 0
722 13:43:40.811420 PCI: 00:1d.3: enabled 0
723 13:43:40.814451 PCI: 00:1d.4: enabled 0
724 13:43:40.818114 PCI: 00:1d.5: enabled 1
725 13:43:40.821494 PCI: 00:1e.0: enabled 1
726 13:43:40.821596 PCI: 00:1e.1: enabled 0
727 13:43:40.824705 PCI: 00:1e.2: enabled 1
728 13:43:40.827794 PCI: 00:1e.3: enabled 1
729 13:43:40.831065 PCI: 00:1f.0: enabled 1
730 13:43:40.831174 PCI: 00:1f.1: enabled 1
731 13:43:40.834253 PCI: 00:1f.2: enabled 1
732 13:43:40.837532 PCI: 00:1f.3: enabled 1
733 13:43:40.837640 PCI: 00:1f.4: enabled 1
734 13:43:40.841526 PCI: 00:1f.5: enabled 1
735 13:43:40.844737 PCI: 00:1f.6: enabled 0
736 13:43:40.848003 USB0 port 0: enabled 1
737 13:43:40.848103 I2C: 00:15: enabled 1
738 13:43:40.851258 I2C: 00:5d: enabled 1
739 13:43:40.854458 GENERIC: 0.0: enabled 1
740 13:43:40.854577 I2C: 00:1a: enabled 1
741 13:43:40.857470 I2C: 00:38: enabled 1
742 13:43:40.861446 I2C: 00:39: enabled 1
743 13:43:40.861533 I2C: 00:3a: enabled 1
744 13:43:40.864778 I2C: 00:3b: enabled 1
745 13:43:40.868105 PCI: 00:00.0: enabled 1
746 13:43:40.868210 SPI: 00: enabled 1
747 13:43:40.871351 SPI: 01: enabled 1
748 13:43:40.874527 PNP: 0c09.0: enabled 1
749 13:43:40.874623 USB2 port 0: enabled 1
750 13:43:40.877839 USB2 port 1: enabled 1
751 13:43:40.881078 USB2 port 2: enabled 0
752 13:43:40.881172 USB2 port 3: enabled 0
753 13:43:40.884640 USB2 port 5: enabled 0
754 13:43:40.887791 USB2 port 6: enabled 1
755 13:43:40.891060 USB2 port 9: enabled 1
756 13:43:40.891154 USB3 port 0: enabled 1
757 13:43:40.894282 USB3 port 1: enabled 1
758 13:43:40.897470 USB3 port 2: enabled 1
759 13:43:40.897594 USB3 port 3: enabled 1
760 13:43:40.901377 USB3 port 4: enabled 0
761 13:43:40.904403 APIC: 02: enabled 1
762 13:43:40.904511 APIC: 01: enabled 1
763 13:43:40.907604 APIC: 07: enabled 1
764 13:43:40.911231 APIC: 03: enabled 1
765 13:43:40.911329 APIC: 04: enabled 1
766 13:43:40.914586 APIC: 06: enabled 1
767 13:43:40.914672 APIC: 05: enabled 1
768 13:43:40.917718 Compare with tree...
769 13:43:40.920827 Root Device: enabled 1
770 13:43:40.924678 CPU_CLUSTER: 0: enabled 1
771 13:43:40.924773 APIC: 00: enabled 1
772 13:43:40.927857 APIC: 02: enabled 1
773 13:43:40.931006 APIC: 01: enabled 1
774 13:43:40.931100 APIC: 07: enabled 1
775 13:43:40.934255 APIC: 03: enabled 1
776 13:43:40.937711 APIC: 04: enabled 1
777 13:43:40.937806 APIC: 06: enabled 1
778 13:43:40.940851 APIC: 05: enabled 1
779 13:43:40.944204 DOMAIN: 0000: enabled 1
780 13:43:40.947467 PCI: 00:00.0: enabled 1
781 13:43:40.947570 PCI: 00:02.0: enabled 1
782 13:43:40.950879 PCI: 00:04.0: enabled 0
783 13:43:40.954105 PCI: 00:05.0: enabled 0
784 13:43:40.957974 PCI: 00:12.0: enabled 1
785 13:43:40.958097 PCI: 00:12.5: enabled 0
786 13:43:40.961156 PCI: 00:12.6: enabled 0
787 13:43:40.964229 PCI: 00:14.0: enabled 1
788 13:43:40.967777 USB0 port 0: enabled 1
789 13:43:40.971031 USB2 port 0: enabled 1
790 13:43:40.971203 USB2 port 1: enabled 1
791 13:43:40.974222 USB2 port 2: enabled 0
792 13:43:40.977825 USB2 port 3: enabled 0
793 13:43:40.981211 USB2 port 5: enabled 0
794 13:43:40.984820 USB2 port 6: enabled 1
795 13:43:40.988040 USB2 port 9: enabled 1
796 13:43:40.988367 USB3 port 0: enabled 1
797 13:43:40.991414 USB3 port 1: enabled 1
798 13:43:40.994754 USB3 port 2: enabled 1
799 13:43:40.997639 USB3 port 3: enabled 1
800 13:43:41.001351 USB3 port 4: enabled 0
801 13:43:41.001721 PCI: 00:14.1: enabled 0
802 13:43:41.004515 PCI: 00:14.3: enabled 1
803 13:43:41.007497 PCI: 00:14.5: enabled 0
804 13:43:41.011280 PCI: 00:15.0: enabled 1
805 13:43:41.014272 I2C: 00:15: enabled 1
806 13:43:41.014642 PCI: 00:15.1: enabled 1
807 13:43:41.017323 I2C: 00:5d: enabled 1
808 13:43:41.021116 GENERIC: 0.0: enabled 1
809 13:43:41.024260 PCI: 00:15.2: enabled 0
810 13:43:41.027724 PCI: 00:15.3: enabled 0
811 13:43:41.028097 PCI: 00:16.0: enabled 1
812 13:43:41.030630 PCI: 00:16.1: enabled 0
813 13:43:41.034403 PCI: 00:16.2: enabled 0
814 13:43:41.037648 PCI: 00:16.3: enabled 0
815 13:43:41.040854 PCI: 00:16.4: enabled 0
816 13:43:41.041309 PCI: 00:16.5: enabled 0
817 13:43:41.043994 PCI: 00:17.0: enabled 1
818 13:43:41.047153 PCI: 00:19.0: enabled 1
819 13:43:41.050432 I2C: 00:1a: enabled 1
820 13:43:41.050812 I2C: 00:38: enabled 1
821 13:43:41.054377 I2C: 00:39: enabled 1
822 13:43:41.057541 I2C: 00:3a: enabled 1
823 13:43:41.060789 I2C: 00:3b: enabled 1
824 13:43:41.061160 PCI: 00:19.1: enabled 0
825 13:43:41.063960 PCI: 00:19.2: enabled 0
826 13:43:41.067541 PCI: 00:1a.0: enabled 0
827 13:43:41.070839 PCI: 00:1c.0: enabled 0
828 13:43:41.074030 PCI: 00:1c.1: enabled 0
829 13:43:41.074400 PCI: 00:1c.2: enabled 0
830 13:43:41.077146 PCI: 00:1c.3: enabled 0
831 13:43:41.080929 PCI: 00:1c.4: enabled 0
832 13:43:41.083923 PCI: 00:1c.5: enabled 0
833 13:43:41.087321 PCI: 00:1c.6: enabled 0
834 13:43:41.087757 PCI: 00:1c.7: enabled 0
835 13:43:41.090456 PCI: 00:1d.0: enabled 1
836 13:43:41.093724 PCI: 00:1d.1: enabled 0
837 13:43:41.097151 PCI: 00:1d.2: enabled 0
838 13:43:41.100381 PCI: 00:1d.3: enabled 0
839 13:43:41.100923 PCI: 00:1d.4: enabled 0
840 13:43:41.103855 PCI: 00:1d.5: enabled 1
841 13:43:41.107134 PCI: 00:00.0: enabled 1
842 13:43:41.110463 PCI: 00:1e.0: enabled 1
843 13:43:41.113498 PCI: 00:1e.1: enabled 0
844 13:43:41.113884 PCI: 00:1e.2: enabled 1
845 13:43:41.117355 SPI: 00: enabled 1
846 13:43:41.120381 PCI: 00:1e.3: enabled 1
847 13:43:41.123909 SPI: 01: enabled 1
848 13:43:41.124297 PCI: 00:1f.0: enabled 1
849 13:43:41.127125 PNP: 0c09.0: enabled 1
850 13:43:41.130911 PCI: 00:1f.1: enabled 1
851 13:43:41.133963 PCI: 00:1f.2: enabled 1
852 13:43:41.134422 PCI: 00:1f.3: enabled 1
853 13:43:41.136984 PCI: 00:1f.4: enabled 1
854 13:43:41.140417 PCI: 00:1f.5: enabled 1
855 13:43:41.143598 PCI: 00:1f.6: enabled 0
856 13:43:41.147014 Root Device scanning...
857 13:43:41.150097 scan_static_bus for Root Device
858 13:43:41.150497 CPU_CLUSTER: 0 enabled
859 13:43:41.153548 DOMAIN: 0000 enabled
860 13:43:41.157235 DOMAIN: 0000 scanning...
861 13:43:41.160502 PCI: pci_scan_bus for bus 00
862 13:43:41.163783 PCI: 00:00.0 [8086/0000] ops
863 13:43:41.167144 PCI: 00:00.0 [8086/9b61] enabled
864 13:43:41.170364 PCI: 00:02.0 [8086/0000] bus ops
865 13:43:41.173578 PCI: 00:02.0 [8086/9b41] enabled
866 13:43:41.176984 PCI: 00:04.0 [8086/1903] disabled
867 13:43:41.180313 PCI: 00:08.0 [8086/1911] enabled
868 13:43:41.183546 PCI: 00:12.0 [8086/02f9] enabled
869 13:43:41.187436 PCI: 00:14.0 [8086/0000] bus ops
870 13:43:41.190398 PCI: 00:14.0 [8086/02ed] enabled
871 13:43:41.193765 PCI: 00:14.2 [8086/02ef] enabled
872 13:43:41.197377 PCI: 00:14.3 [8086/02f0] enabled
873 13:43:41.200591 PCI: 00:15.0 [8086/0000] bus ops
874 13:43:41.203901 PCI: 00:15.0 [8086/02e8] enabled
875 13:43:41.207183 PCI: 00:15.1 [8086/0000] bus ops
876 13:43:41.210392 PCI: 00:15.1 [8086/02e9] enabled
877 13:43:41.213546 PCI: 00:16.0 [8086/0000] ops
878 13:43:41.216744 PCI: 00:16.0 [8086/02e0] enabled
879 13:43:41.217382 PCI: 00:17.0 [8086/0000] ops
880 13:43:41.220311 PCI: 00:17.0 [8086/02d3] enabled
881 13:43:41.223442 PCI: 00:19.0 [8086/0000] bus ops
882 13:43:41.226955 PCI: 00:19.0 [8086/02c5] enabled
883 13:43:41.230755 PCI: 00:1d.0 [8086/0000] bus ops
884 13:43:41.233481 PCI: 00:1d.0 [8086/02b0] enabled
885 13:43:41.240025 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 13:43:41.243612 PCI: 00:1e.0 [8086/0000] ops
887 13:43:41.246911 PCI: 00:1e.0 [8086/02a8] enabled
888 13:43:41.250416 PCI: 00:1e.2 [8086/0000] bus ops
889 13:43:41.253434 PCI: 00:1e.2 [8086/02aa] enabled
890 13:43:41.256493 PCI: 00:1e.3 [8086/0000] bus ops
891 13:43:41.260309 PCI: 00:1e.3 [8086/02ab] enabled
892 13:43:41.263569 PCI: 00:1f.0 [8086/0000] bus ops
893 13:43:41.266969 PCI: 00:1f.0 [8086/0284] enabled
894 13:43:41.273205 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 13:43:41.276468 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 13:43:41.279725 PCI: 00:1f.3 [8086/0000] bus ops
897 13:43:41.283162 PCI: 00:1f.3 [8086/02c8] enabled
898 13:43:41.287090 PCI: 00:1f.4 [8086/0000] bus ops
899 13:43:41.290241 PCI: 00:1f.4 [8086/02a3] enabled
900 13:43:41.293405 PCI: 00:1f.5 [8086/0000] bus ops
901 13:43:41.296663 PCI: 00:1f.5 [8086/02a4] enabled
902 13:43:41.299883 PCI: Leftover static devices:
903 13:43:41.303417 PCI: 00:05.0
904 13:43:41.303886 PCI: 00:12.5
905 13:43:41.306421 PCI: 00:12.6
906 13:43:41.306854 PCI: 00:14.1
907 13:43:41.307195 PCI: 00:14.5
908 13:43:41.309720 PCI: 00:15.2
909 13:43:41.310116 PCI: 00:15.3
910 13:43:41.312958 PCI: 00:16.1
911 13:43:41.313355 PCI: 00:16.2
912 13:43:41.313671 PCI: 00:16.3
913 13:43:41.316137 PCI: 00:16.4
914 13:43:41.316539 PCI: 00:16.5
915 13:43:41.320049 PCI: 00:19.1
916 13:43:41.320446 PCI: 00:19.2
917 13:43:41.323431 PCI: 00:1a.0
918 13:43:41.323852 PCI: 00:1c.0
919 13:43:41.324169 PCI: 00:1c.1
920 13:43:41.326227 PCI: 00:1c.2
921 13:43:41.326621 PCI: 00:1c.3
922 13:43:41.329533 PCI: 00:1c.4
923 13:43:41.329930 PCI: 00:1c.5
924 13:43:41.330246 PCI: 00:1c.6
925 13:43:41.333143 PCI: 00:1c.7
926 13:43:41.333540 PCI: 00:1d.1
927 13:43:41.336474 PCI: 00:1d.2
928 13:43:41.336891 PCI: 00:1d.3
929 13:43:41.337214 PCI: 00:1d.4
930 13:43:41.339679 PCI: 00:1d.5
931 13:43:41.340078 PCI: 00:1e.1
932 13:43:41.343308 PCI: 00:1f.1
933 13:43:41.343795 PCI: 00:1f.2
934 13:43:41.346112 PCI: 00:1f.6
935 13:43:41.346486 PCI: Check your devicetree.cb.
936 13:43:41.349291 PCI: 00:02.0 scanning...
937 13:43:41.352936 scan_generic_bus for PCI: 00:02.0
938 13:43:41.356816 scan_generic_bus for PCI: 00:02.0 done
939 13:43:41.362933 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
940 13:43:41.366331 PCI: 00:14.0 scanning...
941 13:43:41.369574 scan_static_bus for PCI: 00:14.0
942 13:43:41.372738 USB0 port 0 enabled
943 13:43:41.373137 USB0 port 0 scanning...
944 13:43:41.376497 scan_static_bus for USB0 port 0
945 13:43:41.379820 USB2 port 0 enabled
946 13:43:41.382776 USB2 port 1 enabled
947 13:43:41.383148 USB2 port 2 disabled
948 13:43:41.386653 USB2 port 3 disabled
949 13:43:41.389259 USB2 port 5 disabled
950 13:43:41.389656 USB2 port 6 enabled
951 13:43:41.393208 USB2 port 9 enabled
952 13:43:41.393606 USB3 port 0 enabled
953 13:43:41.396364 USB3 port 1 enabled
954 13:43:41.399618 USB3 port 2 enabled
955 13:43:41.400003 USB3 port 3 enabled
956 13:43:41.402677 USB3 port 4 disabled
957 13:43:41.406537 USB2 port 0 scanning...
958 13:43:41.409866 scan_static_bus for USB2 port 0
959 13:43:41.413260 scan_static_bus for USB2 port 0 done
960 13:43:41.416577 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
961 13:43:41.419893 USB2 port 1 scanning...
962 13:43:41.423261 scan_static_bus for USB2 port 1
963 13:43:41.426253 scan_static_bus for USB2 port 1 done
964 13:43:41.433578 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
965 13:43:41.436725 USB2 port 6 scanning...
966 13:43:41.439763 scan_static_bus for USB2 port 6
967 13:43:41.442811 scan_static_bus for USB2 port 6 done
968 13:43:41.446318 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
969 13:43:41.450182 USB2 port 9 scanning...
970 13:43:41.452959 scan_static_bus for USB2 port 9
971 13:43:41.456320 scan_static_bus for USB2 port 9 done
972 13:43:41.463053 scan_bus: scanning of bus USB2 port 9 took 9694 usecs
973 13:43:41.466471 USB3 port 0 scanning...
974 13:43:41.469894 scan_static_bus for USB3 port 0
975 13:43:41.473057 scan_static_bus for USB3 port 0 done
976 13:43:41.476457 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
977 13:43:41.479616 USB3 port 1 scanning...
978 13:43:41.482879 scan_static_bus for USB3 port 1
979 13:43:41.485925 scan_static_bus for USB3 port 1 done
980 13:43:41.493375 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
981 13:43:41.496346 USB3 port 2 scanning...
982 13:43:41.499794 scan_static_bus for USB3 port 2
983 13:43:41.503065 scan_static_bus for USB3 port 2 done
984 13:43:41.506305 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
985 13:43:41.510182 USB3 port 3 scanning...
986 13:43:41.513004 scan_static_bus for USB3 port 3
987 13:43:41.515921 scan_static_bus for USB3 port 3 done
988 13:43:41.522958 scan_bus: scanning of bus USB3 port 3 took 9690 usecs
989 13:43:41.526185 scan_static_bus for USB0 port 0 done
990 13:43:41.533227 scan_bus: scanning of bus USB0 port 0 took 155356 usecs
991 13:43:41.536381 scan_static_bus for PCI: 00:14.0 done
992 13:43:41.542785 scan_bus: scanning of bus PCI: 00:14.0 took 172966 usecs
993 13:43:41.543329 PCI: 00:15.0 scanning...
994 13:43:41.545672 scan_generic_bus for PCI: 00:15.0
995 13:43:41.553054 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 13:43:41.556161 scan_generic_bus for PCI: 00:15.0 done
997 13:43:41.562462 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
998 13:43:41.563097 PCI: 00:15.1 scanning...
999 13:43:41.566093 scan_generic_bus for PCI: 00:15.1
1000 13:43:41.572466 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 13:43:41.575997 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 13:43:41.579071 scan_generic_bus for PCI: 00:15.1 done
1003 13:43:41.585938 scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
1004 13:43:41.589029 PCI: 00:19.0 scanning...
1005 13:43:41.592627 scan_generic_bus for PCI: 00:19.0
1006 13:43:41.595884 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 13:43:41.599436 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 13:43:41.602950 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 13:43:41.609168 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 13:43:41.613049 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 13:43:41.616146 scan_generic_bus for PCI: 00:19.0 done
1012 13:43:41.622941 scan_bus: scanning of bus PCI: 00:19.0 took 30719 usecs
1013 13:43:41.623521 PCI: 00:1d.0 scanning...
1014 13:43:41.629057 do_pci_scan_bridge for PCI: 00:1d.0
1015 13:43:41.629487 PCI: pci_scan_bus for bus 01
1016 13:43:41.632549 PCI: 01:00.0 [1c5c/1327] enabled
1017 13:43:41.639171 Enabling Common Clock Configuration
1018 13:43:41.642471 L1 Sub-State supported from root port 29
1019 13:43:41.646226 L1 Sub-State Support = 0xf
1020 13:43:41.649548 CommonModeRestoreTime = 0x28
1021 13:43:41.652609 Power On Value = 0x16, Power On Scale = 0x0
1022 13:43:41.653138 ASPM: Enabled L1
1023 13:43:41.659182 scan_bus: scanning of bus PCI: 00:1d.0 took 32778 usecs
1024 13:43:41.662422 PCI: 00:1e.2 scanning...
1025 13:43:41.666354 scan_generic_bus for PCI: 00:1e.2
1026 13:43:41.669456 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 13:43:41.672673 scan_generic_bus for PCI: 00:1e.2 done
1028 13:43:41.679366 scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs
1029 13:43:41.682420 PCI: 00:1e.3 scanning...
1030 13:43:41.685465 scan_generic_bus for PCI: 00:1e.3
1031 13:43:41.689356 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 13:43:41.692413 scan_generic_bus for PCI: 00:1e.3 done
1033 13:43:41.699251 scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs
1034 13:43:41.702396 PCI: 00:1f.0 scanning...
1035 13:43:41.705713 scan_static_bus for PCI: 00:1f.0
1036 13:43:41.706235 PNP: 0c09.0 enabled
1037 13:43:41.708639 scan_static_bus for PCI: 00:1f.0 done
1038 13:43:41.715975 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
1039 13:43:41.718626 PCI: 00:1f.3 scanning...
1040 13:43:41.725562 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1041 13:43:41.726101 PCI: 00:1f.4 scanning...
1042 13:43:41.728833 scan_generic_bus for PCI: 00:1f.4
1043 13:43:41.735596 scan_generic_bus for PCI: 00:1f.4 done
1044 13:43:41.738885 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1045 13:43:41.741998 PCI: 00:1f.5 scanning...
1046 13:43:41.744984 scan_generic_bus for PCI: 00:1f.5
1047 13:43:41.748978 scan_generic_bus for PCI: 00:1f.5 done
1048 13:43:41.755142 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1049 13:43:41.761708 scan_bus: scanning of bus DOMAIN: 0000 took 605029 usecs
1050 13:43:41.765367 scan_static_bus for Root Device done
1051 13:43:41.771510 scan_bus: scanning of bus Root Device took 624897 usecs
1052 13:43:41.771943 done
1053 13:43:41.775153 Chrome EC: UHEPI supported
1054 13:43:41.781708 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 13:43:41.785130 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 13:43:41.791616 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 13:43:41.799153 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 13:43:41.802364 SPI flash protection: WPSW=0 SRP0=0
1059 13:43:41.809223 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 13:43:41.812478 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1061 13:43:41.815426 found VGA at PCI: 00:02.0
1062 13:43:41.818968 Setting up VGA for PCI: 00:02.0
1063 13:43:41.825523 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 13:43:41.828746 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 13:43:41.832670 Allocating resources...
1066 13:43:41.833091 Reading resources...
1067 13:43:41.839214 Root Device read_resources bus 0 link: 0
1068 13:43:41.842542 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 13:43:41.848919 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 13:43:41.852239 DOMAIN: 0000 read_resources bus 0 link: 0
1071 13:43:41.859293 PCI: 00:14.0 read_resources bus 0 link: 0
1072 13:43:41.862409 USB0 port 0 read_resources bus 0 link: 0
1073 13:43:41.870991 USB0 port 0 read_resources bus 0 link: 0 done
1074 13:43:41.873663 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 13:43:41.881038 PCI: 00:15.0 read_resources bus 1 link: 0
1076 13:43:41.884856 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 13:43:41.891083 PCI: 00:15.1 read_resources bus 2 link: 0
1078 13:43:41.894262 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 13:43:41.901702 PCI: 00:19.0 read_resources bus 3 link: 0
1080 13:43:41.908318 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 13:43:41.911795 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 13:43:41.918244 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 13:43:41.921963 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 13:43:41.928641 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 13:43:41.931867 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 13:43:41.938331 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 13:43:41.941618 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 13:43:41.948415 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 13:43:41.955647 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 13:43:41.958973 Root Device read_resources bus 0 link: 0 done
1091 13:43:41.962027 Done reading resources.
1092 13:43:41.965235 Show resources in subtree (Root Device)...After reading.
1093 13:43:41.971534 Root Device child on link 0 CPU_CLUSTER: 0
1094 13:43:41.975011 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 13:43:41.975597 APIC: 00
1096 13:43:41.979506 APIC: 02
1097 13:43:41.980035 APIC: 01
1098 13:43:41.981880 APIC: 07
1099 13:43:41.982301 APIC: 03
1100 13:43:41.982637 APIC: 04
1101 13:43:41.984730 APIC: 06
1102 13:43:41.985152 APIC: 05
1103 13:43:41.988602 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 13:43:41.998684 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 13:43:42.055144 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 13:43:42.055958 PCI: 00:00.0
1107 13:43:42.056489 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 13:43:42.056898 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 13:43:42.057648 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 13:43:42.058013 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 13:43:42.105090 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 13:43:42.105844 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 13:43:42.106625 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 13:43:42.106993 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 13:43:42.107420 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 13:43:42.107795 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 13:43:42.154573 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 13:43:42.155161 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 13:43:42.155899 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 13:43:42.156281 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 13:43:42.156694 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 13:43:42.174815 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 13:43:42.175364 PCI: 00:02.0
1124 13:43:42.175857 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 13:43:42.181561 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 13:43:42.191418 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 13:43:42.192010 PCI: 00:04.0
1128 13:43:42.195127 PCI: 00:08.0
1129 13:43:42.204715 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 13:43:42.205259 PCI: 00:12.0
1131 13:43:42.214763 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 13:43:42.221515 PCI: 00:14.0 child on link 0 USB0 port 0
1133 13:43:42.231590 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 13:43:42.234775 USB0 port 0 child on link 0 USB2 port 0
1135 13:43:42.235315 USB2 port 0
1136 13:43:42.238325 USB2 port 1
1137 13:43:42.241567 USB2 port 2
1138 13:43:42.242003 USB2 port 3
1139 13:43:42.244561 USB2 port 5
1140 13:43:42.244992 USB2 port 6
1141 13:43:42.247607 USB2 port 9
1142 13:43:42.248040 USB3 port 0
1143 13:43:42.251727 USB3 port 1
1144 13:43:42.252259 USB3 port 2
1145 13:43:42.254462 USB3 port 3
1146 13:43:42.254881 USB3 port 4
1147 13:43:42.258074 PCI: 00:14.2
1148 13:43:42.268167 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 13:43:42.277957 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 13:43:42.278489 PCI: 00:14.3
1151 13:43:42.287994 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 13:43:42.291162 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 13:43:42.301467 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 13:43:42.304709 I2C: 01:15
1155 13:43:42.308003 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 13:43:42.318015 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 13:43:42.321095 I2C: 02:5d
1158 13:43:42.321526 GENERIC: 0.0
1159 13:43:42.324163 PCI: 00:16.0
1160 13:43:42.334584 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 13:43:42.335038 PCI: 00:17.0
1162 13:43:42.344058 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 13:43:42.354648 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 13:43:42.360632 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 13:43:42.370737 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 13:43:42.377460 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 13:43:42.387404 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 13:43:42.390684 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 13:43:42.401023 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 13:43:42.404221 I2C: 03:1a
1171 13:43:42.404676 I2C: 03:38
1172 13:43:42.407541 I2C: 03:39
1173 13:43:42.408018 I2C: 03:3a
1174 13:43:42.408397 I2C: 03:3b
1175 13:43:42.414104 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 13:43:42.420772 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 13:43:42.430713 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 13:43:42.440706 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 13:43:42.444405 PCI: 01:00.0
1180 13:43:42.454379 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 13:43:42.454910 PCI: 00:1e.0
1182 13:43:42.464020 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 13:43:42.474024 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 13:43:42.480376 PCI: 00:1e.2 child on link 0 SPI: 00
1185 13:43:42.491340 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 13:43:42.491942 SPI: 00
1187 13:43:42.493978 PCI: 00:1e.3 child on link 0 SPI: 01
1188 13:43:42.503926 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 13:43:42.507136 SPI: 01
1190 13:43:42.510974 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 13:43:42.520851 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 13:43:42.527214 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 13:43:42.530395 PNP: 0c09.0
1194 13:43:42.537264 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 13:43:42.540321 PCI: 00:1f.3
1196 13:43:42.550854 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 13:43:42.560603 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 13:43:42.561147 PCI: 00:1f.4
1199 13:43:42.570488 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 13:43:42.580183 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 13:43:42.583902 PCI: 00:1f.5
1202 13:43:42.590427 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 13:43:42.597187 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 13:43:42.603875 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 13:43:42.610093 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 13:43:42.613951 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 13:43:42.617228 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 13:43:42.620273 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 13:43:42.623464 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 13:43:42.633884 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 13:43:42.640262 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 13:43:42.646726 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 13:43:42.653067 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 13:43:42.663250 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 13:43:42.666492 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 13:43:42.672950 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 13:43:42.676832 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 13:43:42.683059 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 13:43:42.686297 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 13:43:42.692978 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 13:43:42.696621 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 13:43:42.703129 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 13:43:42.706283 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 13:43:42.712934 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 13:43:42.716021 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 13:43:42.722808 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 13:43:42.726360 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 13:43:42.732460 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 13:43:42.736387 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 13:43:42.742955 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 13:43:42.746030 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 13:43:42.749399 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 13:43:42.755967 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 13:43:42.759088 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 13:43:42.765795 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 13:43:42.769241 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 13:43:42.775435 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 13:43:42.778624 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 13:43:42.785220 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 13:43:42.792089 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 13:43:42.795607 avoid_fixed_resources: DOMAIN: 0000
1242 13:43:42.802089 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 13:43:42.808761 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 13:43:42.815121 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 13:43:42.825004 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 13:43:42.831437 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 13:43:42.838301 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 13:43:42.848630 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 13:43:42.855173 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 13:43:42.861305 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 13:43:42.871072 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 13:43:42.877631 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 13:43:42.884547 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 13:43:42.887821 Setting resources...
1255 13:43:42.894789 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 13:43:42.898061 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 13:43:42.901138 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 13:43:42.904274 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 13:43:42.907709 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 13:43:42.914496 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 13:43:42.921151 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 13:43:42.927598 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 13:43:42.934211 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 13:43:42.940764 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 13:43:42.944040 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 13:43:42.951232 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 13:43:42.954386 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 13:43:42.960661 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 13:43:42.963989 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 13:43:42.970873 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 13:43:42.973920 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 13:43:42.980677 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 13:43:42.983667 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 13:43:42.990373 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 13:43:42.993625 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 13:43:43.000184 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 13:43:43.003373 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 13:43:43.007115 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 13:43:43.013381 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 13:43:43.016608 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 13:43:43.023682 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 13:43:43.026952 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 13:43:43.033224 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 13:43:43.036488 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 13:43:43.043464 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 13:43:43.046661 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 13:43:43.053197 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 13:43:43.062925 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 13:43:43.070079 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 13:43:43.076389 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 13:43:43.082969 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 13:43:43.089733 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 13:43:43.092851 Root Device assign_resources, bus 0 link: 0
1294 13:43:43.099308 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 13:43:43.106555 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 13:43:43.116435 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 13:43:43.122832 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 13:43:43.133036 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 13:43:43.139587 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 13:43:43.149172 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 13:43:43.152379 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 13:43:43.155745 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 13:43:43.165712 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 13:43:43.172689 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 13:43:43.182421 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 13:43:43.188960 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 13:43:43.195609 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 13:43:43.199165 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 13:43:43.209128 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 13:43:43.212331 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 13:43:43.215629 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 13:43:43.225514 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 13:43:43.231984 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 13:43:43.242275 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 13:43:43.248832 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 13:43:43.255719 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 13:43:43.265446 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 13:43:43.272058 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 13:43:43.279115 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 13:43:43.285477 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 13:43:43.288696 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 13:43:43.298875 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 13:43:43.308545 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 13:43:43.315177 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 13:43:43.318457 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 13:43:43.328278 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 13:43:43.332100 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 13:43:43.341803 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 13:43:43.348567 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 13:43:43.355139 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 13:43:43.358686 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 13:43:43.368606 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 13:43:43.371905 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 13:43:43.375157 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 13:43:43.382089 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 13:43:43.385135 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 13:43:43.391715 LPC: Trying to open IO window from 800 size 1ff
1338 13:43:43.398586 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 13:43:43.408130 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 13:43:43.414941 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 13:43:43.425232 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 13:43:43.428430 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 13:43:43.431466 Root Device assign_resources, bus 0 link: 0
1344 13:43:43.434800 Done setting resources.
1345 13:43:43.441358 Show resources in subtree (Root Device)...After assigning values.
1346 13:43:43.448425 Root Device child on link 0 CPU_CLUSTER: 0
1347 13:43:43.451557 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 13:43:43.451646 APIC: 00
1349 13:43:43.454771 APIC: 02
1350 13:43:43.454860 APIC: 01
1351 13:43:43.454931 APIC: 07
1352 13:43:43.458514 APIC: 03
1353 13:43:43.458603 APIC: 04
1354 13:43:43.458674 APIC: 06
1355 13:43:43.461482 APIC: 05
1356 13:43:43.465084 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 13:43:43.474688 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 13:43:43.485090 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 13:43:43.488189 PCI: 00:00.0
1360 13:43:43.497729 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 13:43:43.507808 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 13:43:43.514451 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 13:43:43.524340 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 13:43:43.534608 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 13:43:43.544137 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 13:43:43.554455 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 13:43:43.564102 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 13:43:43.571006 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 13:43:43.580800 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 13:43:43.590444 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 13:43:43.600645 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 13:43:43.610705 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 13:43:43.620428 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 13:43:43.629998 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 13:43:43.636486 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 13:43:43.640048 PCI: 00:02.0
1377 13:43:43.649769 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 13:43:43.659952 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 13:43:43.669956 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 13:43:43.673033 PCI: 00:04.0
1381 13:43:43.673126 PCI: 00:08.0
1382 13:43:43.683381 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 13:43:43.686628 PCI: 00:12.0
1384 13:43:43.696625 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 13:43:43.700011 PCI: 00:14.0 child on link 0 USB0 port 0
1386 13:43:43.709789 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 13:43:43.716048 USB0 port 0 child on link 0 USB2 port 0
1388 13:43:43.716140 USB2 port 0
1389 13:43:43.719905 USB2 port 1
1390 13:43:43.719997 USB2 port 2
1391 13:43:43.722840 USB2 port 3
1392 13:43:43.722932 USB2 port 5
1393 13:43:43.726490 USB2 port 6
1394 13:43:43.726582 USB2 port 9
1395 13:43:43.729636 USB3 port 0
1396 13:43:43.729728 USB3 port 1
1397 13:43:43.733074 USB3 port 2
1398 13:43:43.733166 USB3 port 3
1399 13:43:43.736146 USB3 port 4
1400 13:43:43.736238 PCI: 00:14.2
1401 13:43:43.746009 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 13:43:43.759495 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 13:43:43.759588 PCI: 00:14.3
1404 13:43:43.769208 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 13:43:43.773005 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 13:43:43.785932 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 13:43:43.786026 I2C: 01:15
1408 13:43:43.789127 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 13:43:43.798886 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 13:43:43.802695 I2C: 02:5d
1411 13:43:43.802786 GENERIC: 0.0
1412 13:43:43.806050 PCI: 00:16.0
1413 13:43:43.815749 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 13:43:43.818991 PCI: 00:17.0
1415 13:43:43.829058 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 13:43:43.838849 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 13:43:43.848783 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 13:43:43.855143 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 13:43:43.865475 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 13:43:43.875339 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 13:43:43.878545 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 13:43:43.891615 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 13:43:43.891710 I2C: 03:1a
1424 13:43:43.891783 I2C: 03:38
1425 13:43:43.895409 I2C: 03:39
1426 13:43:43.895510 I2C: 03:3a
1427 13:43:43.898060 I2C: 03:3b
1428 13:43:43.901351 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 13:43:43.911463 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 13:43:43.921916 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 13:43:43.931328 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 13:43:43.934955 PCI: 01:00.0
1433 13:43:43.944985 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 13:43:43.945082 PCI: 00:1e.0
1435 13:43:43.957987 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 13:43:43.967761 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 13:43:43.970978 PCI: 00:1e.2 child on link 0 SPI: 00
1438 13:43:43.981137 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 13:43:43.984433 SPI: 00
1440 13:43:43.987754 PCI: 00:1e.3 child on link 0 SPI: 01
1441 13:43:43.997524 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 13:43:43.997618 SPI: 01
1443 13:43:44.004444 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 13:43:44.010770 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 13:43:44.020975 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 13:43:44.021190 PNP: 0c09.0
1447 13:43:44.030640 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 13:43:44.033824 PCI: 00:1f.3
1449 13:43:44.044023 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 13:43:44.053688 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 13:43:44.053919 PCI: 00:1f.4
1452 13:43:44.064087 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 13:43:44.073710 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 13:43:44.076797 PCI: 00:1f.5
1455 13:43:44.087143 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 13:43:44.090426 Done allocating resources.
1457 13:43:44.094017 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 13:43:44.096957 Enabling resources...
1459 13:43:44.099898 PCI: 00:00.0 subsystem <- 8086/9b61
1460 13:43:44.103558 PCI: 00:00.0 cmd <- 06
1461 13:43:44.106616 PCI: 00:02.0 subsystem <- 8086/9b41
1462 13:43:44.110330 PCI: 00:02.0 cmd <- 03
1463 13:43:44.113293 PCI: 00:08.0 cmd <- 06
1464 13:43:44.117097 PCI: 00:12.0 subsystem <- 8086/02f9
1465 13:43:44.120400 PCI: 00:12.0 cmd <- 02
1466 13:43:44.123595 PCI: 00:14.0 subsystem <- 8086/02ed
1467 13:43:44.126723 PCI: 00:14.0 cmd <- 02
1468 13:43:44.126845 PCI: 00:14.2 cmd <- 02
1469 13:43:44.133219 PCI: 00:14.3 subsystem <- 8086/02f0
1470 13:43:44.133322 PCI: 00:14.3 cmd <- 02
1471 13:43:44.137071 PCI: 00:15.0 subsystem <- 8086/02e8
1472 13:43:44.140376 PCI: 00:15.0 cmd <- 02
1473 13:43:44.143408 PCI: 00:15.1 subsystem <- 8086/02e9
1474 13:43:44.146581 PCI: 00:15.1 cmd <- 02
1475 13:43:44.149816 PCI: 00:16.0 subsystem <- 8086/02e0
1476 13:43:44.153648 PCI: 00:16.0 cmd <- 02
1477 13:43:44.156627 PCI: 00:17.0 subsystem <- 8086/02d3
1478 13:43:44.160109 PCI: 00:17.0 cmd <- 03
1479 13:43:44.163115 PCI: 00:19.0 subsystem <- 8086/02c5
1480 13:43:44.166740 PCI: 00:19.0 cmd <- 02
1481 13:43:44.170014 PCI: 00:1d.0 bridge ctrl <- 0013
1482 13:43:44.173243 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 13:43:44.176420 PCI: 00:1d.0 cmd <- 06
1484 13:43:44.179728 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 13:43:44.182990 PCI: 00:1e.0 cmd <- 06
1486 13:43:44.186147 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 13:43:44.186241 PCI: 00:1e.2 cmd <- 06
1488 13:43:44.193102 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 13:43:44.193196 PCI: 00:1e.3 cmd <- 02
1490 13:43:44.196444 PCI: 00:1f.0 subsystem <- 8086/0284
1491 13:43:44.199813 PCI: 00:1f.0 cmd <- 407
1492 13:43:44.203047 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 13:43:44.206665 PCI: 00:1f.3 cmd <- 02
1494 13:43:44.209933 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 13:43:44.213069 PCI: 00:1f.4 cmd <- 03
1496 13:43:44.216610 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 13:43:44.219920 PCI: 00:1f.5 cmd <- 406
1498 13:43:44.228152 PCI: 01:00.0 cmd <- 02
1499 13:43:44.233158 done.
1500 13:43:44.246785 ME: Version: 14.0.39.1367
1501 13:43:44.253580 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1502 13:43:44.256811 Initializing devices...
1503 13:43:44.256920 Root Device init ...
1504 13:43:44.263430 Chrome EC: Set SMI mask to 0x0000000000000000
1505 13:43:44.266410 Chrome EC: clear events_b mask to 0x0000000000000000
1506 13:43:44.273031 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 13:43:44.280030 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 13:43:44.286595 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 13:43:44.289816 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 13:43:44.293073 Root Device init finished in 35256 usecs
1511 13:43:44.296901 CPU_CLUSTER: 0 init ...
1512 13:43:44.303291 CPU_CLUSTER: 0 init finished in 2448 usecs
1513 13:43:44.307818 PCI: 00:00.0 init ...
1514 13:43:44.310951 CPU TDP: 15 Watts
1515 13:43:44.314216 CPU PL2 = 64 Watts
1516 13:43:44.317283 PCI: 00:00.0 init finished in 7080 usecs
1517 13:43:44.321071 PCI: 00:02.0 init ...
1518 13:43:44.324117 PCI: 00:02.0 init finished in 2253 usecs
1519 13:43:44.327295 PCI: 00:08.0 init ...
1520 13:43:44.331035 PCI: 00:08.0 init finished in 2251 usecs
1521 13:43:44.334257 PCI: 00:12.0 init ...
1522 13:43:44.337477 PCI: 00:12.0 init finished in 2251 usecs
1523 13:43:44.340704 PCI: 00:14.0 init ...
1524 13:43:44.343800 PCI: 00:14.0 init finished in 2253 usecs
1525 13:43:44.347052 PCI: 00:14.2 init ...
1526 13:43:44.350877 PCI: 00:14.2 init finished in 2253 usecs
1527 13:43:44.353768 PCI: 00:14.3 init ...
1528 13:43:44.357088 PCI: 00:14.3 init finished in 2272 usecs
1529 13:43:44.360438 PCI: 00:15.0 init ...
1530 13:43:44.364070 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 13:43:44.367166 PCI: 00:15.0 init finished in 5977 usecs
1532 13:43:44.370325 PCI: 00:15.1 init ...
1533 13:43:44.373989 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 13:43:44.376950 PCI: 00:15.1 init finished in 5978 usecs
1535 13:43:44.381099 PCI: 00:16.0 init ...
1536 13:43:44.384457 PCI: 00:16.0 init finished in 2253 usecs
1537 13:43:44.388377 PCI: 00:19.0 init ...
1538 13:43:44.391530 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 13:43:44.397859 PCI: 00:19.0 init finished in 5977 usecs
1540 13:43:44.397957 PCI: 00:1d.0 init ...
1541 13:43:44.401091 Initializing PCH PCIe bridge.
1542 13:43:44.404306 PCI: 00:1d.0 init finished in 5286 usecs
1543 13:43:44.409507 PCI: 00:1f.0 init ...
1544 13:43:44.412937 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 13:43:44.419037 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 13:43:44.419131 IOAPIC: ID = 0x02
1547 13:43:44.422677 IOAPIC: Dumping registers
1548 13:43:44.425731 reg 0x0000: 0x02000000
1549 13:43:44.429383 reg 0x0001: 0x00770020
1550 13:43:44.429477 reg 0x0002: 0x00000000
1551 13:43:44.436192 PCI: 00:1f.0 init finished in 23544 usecs
1552 13:43:44.439287 PCI: 00:1f.4 init ...
1553 13:43:44.443264 PCI: 00:1f.4 init finished in 2262 usecs
1554 13:43:44.454057 PCI: 01:00.0 init ...
1555 13:43:44.457098 PCI: 01:00.0 init finished in 2252 usecs
1556 13:43:44.461029 PNP: 0c09.0 init ...
1557 13:43:44.464882 Google Chrome EC uptime: 11.059 seconds
1558 13:43:44.471189 Google Chrome AP resets since EC boot: 0
1559 13:43:44.474247 Google Chrome most recent AP reset causes:
1560 13:43:44.481391 Google Chrome EC reset flags at last EC boot: reset-pin
1561 13:43:44.484388 PNP: 0c09.0 init finished in 20600 usecs
1562 13:43:44.487734 Devices initialized
1563 13:43:44.490816 Show all devs... After init.
1564 13:43:44.490910 Root Device: enabled 1
1565 13:43:44.494035 CPU_CLUSTER: 0: enabled 1
1566 13:43:44.497861 DOMAIN: 0000: enabled 1
1567 13:43:44.497955 APIC: 00: enabled 1
1568 13:43:44.501094 PCI: 00:00.0: enabled 1
1569 13:43:44.504490 PCI: 00:02.0: enabled 1
1570 13:43:44.507598 PCI: 00:04.0: enabled 0
1571 13:43:44.507693 PCI: 00:05.0: enabled 0
1572 13:43:44.510820 PCI: 00:12.0: enabled 1
1573 13:43:44.513989 PCI: 00:12.5: enabled 0
1574 13:43:44.517757 PCI: 00:12.6: enabled 0
1575 13:43:44.517851 PCI: 00:14.0: enabled 1
1576 13:43:44.520833 PCI: 00:14.1: enabled 0
1577 13:43:44.524167 PCI: 00:14.3: enabled 1
1578 13:43:44.524260 PCI: 00:14.5: enabled 0
1579 13:43:44.527258 PCI: 00:15.0: enabled 1
1580 13:43:44.530787 PCI: 00:15.1: enabled 1
1581 13:43:44.533894 PCI: 00:15.2: enabled 0
1582 13:43:44.533990 PCI: 00:15.3: enabled 0
1583 13:43:44.537154 PCI: 00:16.0: enabled 1
1584 13:43:44.541028 PCI: 00:16.1: enabled 0
1585 13:43:44.544166 PCI: 00:16.2: enabled 0
1586 13:43:44.544271 PCI: 00:16.3: enabled 0
1587 13:43:44.547401 PCI: 00:16.4: enabled 0
1588 13:43:44.550647 PCI: 00:16.5: enabled 0
1589 13:43:44.553818 PCI: 00:17.0: enabled 1
1590 13:43:44.553917 PCI: 00:19.0: enabled 1
1591 13:43:44.557216 PCI: 00:19.1: enabled 0
1592 13:43:44.560298 PCI: 00:19.2: enabled 0
1593 13:43:44.560393 PCI: 00:1a.0: enabled 0
1594 13:43:44.563502 PCI: 00:1c.0: enabled 0
1595 13:43:44.566854 PCI: 00:1c.1: enabled 0
1596 13:43:44.570682 PCI: 00:1c.2: enabled 0
1597 13:43:44.570776 PCI: 00:1c.3: enabled 0
1598 13:43:44.573875 PCI: 00:1c.4: enabled 0
1599 13:43:44.577111 PCI: 00:1c.5: enabled 0
1600 13:43:44.580095 PCI: 00:1c.6: enabled 0
1601 13:43:44.580194 PCI: 00:1c.7: enabled 0
1602 13:43:44.583361 PCI: 00:1d.0: enabled 1
1603 13:43:44.586924 PCI: 00:1d.1: enabled 0
1604 13:43:44.590114 PCI: 00:1d.2: enabled 0
1605 13:43:44.590208 PCI: 00:1d.3: enabled 0
1606 13:43:44.593175 PCI: 00:1d.4: enabled 0
1607 13:43:44.596653 PCI: 00:1d.5: enabled 0
1608 13:43:44.600326 PCI: 00:1e.0: enabled 1
1609 13:43:44.600420 PCI: 00:1e.1: enabled 0
1610 13:43:44.603414 PCI: 00:1e.2: enabled 1
1611 13:43:44.606609 PCI: 00:1e.3: enabled 1
1612 13:43:44.606731 PCI: 00:1f.0: enabled 1
1613 13:43:44.610015 PCI: 00:1f.1: enabled 0
1614 13:43:44.613033 PCI: 00:1f.2: enabled 0
1615 13:43:44.616857 PCI: 00:1f.3: enabled 1
1616 13:43:44.616958 PCI: 00:1f.4: enabled 1
1617 13:43:44.619991 PCI: 00:1f.5: enabled 1
1618 13:43:44.623155 PCI: 00:1f.6: enabled 0
1619 13:43:44.626434 USB0 port 0: enabled 1
1620 13:43:44.626536 I2C: 01:15: enabled 1
1621 13:43:44.629585 I2C: 02:5d: enabled 1
1622 13:43:44.633241 GENERIC: 0.0: enabled 1
1623 13:43:44.633336 I2C: 03:1a: enabled 1
1624 13:43:44.636443 I2C: 03:38: enabled 1
1625 13:43:44.640043 I2C: 03:39: enabled 1
1626 13:43:44.640137 I2C: 03:3a: enabled 1
1627 13:43:44.642969 I2C: 03:3b: enabled 1
1628 13:43:44.646683 PCI: 00:00.0: enabled 1
1629 13:43:44.646777 SPI: 00: enabled 1
1630 13:43:44.649859 SPI: 01: enabled 1
1631 13:43:44.653140 PNP: 0c09.0: enabled 1
1632 13:43:44.653233 USB2 port 0: enabled 1
1633 13:43:44.656411 USB2 port 1: enabled 1
1634 13:43:44.659707 USB2 port 2: enabled 0
1635 13:43:44.663032 USB2 port 3: enabled 0
1636 13:43:44.663125 USB2 port 5: enabled 0
1637 13:43:44.666175 USB2 port 6: enabled 1
1638 13:43:44.669458 USB2 port 9: enabled 1
1639 13:43:44.669550 USB3 port 0: enabled 1
1640 13:43:44.672726 USB3 port 1: enabled 1
1641 13:43:44.675986 USB3 port 2: enabled 1
1642 13:43:44.676078 USB3 port 3: enabled 1
1643 13:43:44.679884 USB3 port 4: enabled 0
1644 13:43:44.683079 APIC: 02: enabled 1
1645 13:43:44.683171 APIC: 01: enabled 1
1646 13:43:44.686211 APIC: 07: enabled 1
1647 13:43:44.689317 APIC: 03: enabled 1
1648 13:43:44.689408 APIC: 04: enabled 1
1649 13:43:44.692540 APIC: 06: enabled 1
1650 13:43:44.696282 APIC: 05: enabled 1
1651 13:43:44.696373 PCI: 00:08.0: enabled 1
1652 13:43:44.699431 PCI: 00:14.2: enabled 1
1653 13:43:44.702528 PCI: 01:00.0: enabled 1
1654 13:43:44.706180 Disabling ACPI via APMC:
1655 13:43:44.709169 done.
1656 13:43:44.712360 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 13:43:44.716245 ELOG: NV offset 0xaf0000 size 0x4000
1658 13:43:44.722599 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 13:43:44.729774 ELOG: Event(17) added with size 13 at 2023-06-07 13:43:42 UTC
1660 13:43:44.735851 ELOG: Event(92) added with size 9 at 2023-06-07 13:43:42 UTC
1661 13:43:44.742742 ELOG: Event(93) added with size 9 at 2023-06-07 13:43:42 UTC
1662 13:43:44.749364 ELOG: Event(9A) added with size 9 at 2023-06-07 13:43:42 UTC
1663 13:43:44.756313 ELOG: Event(9E) added with size 10 at 2023-06-07 13:43:42 UTC
1664 13:43:44.762753 ELOG: Event(16) added with size 11 at 2023-06-07 13:43:42 UTC
1665 13:43:44.766035 Erasing flash addr af0000 + 4 KiB
1666 13:43:44.827596 ELOG: Event(9F) added with size 14 at 2023-06-07 13:43:42 UTC
1667 13:43:44.834603 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 55
1668 13:43:44.840947 ELOG: Event(A1) added with size 10 at 2023-06-07 13:43:42 UTC
1669 13:43:44.847754 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1670 13:43:44.854036 ELOG: Event(A0) added with size 9 at 2023-06-07 13:43:42 UTC
1671 13:43:44.860796 elog_add_boot_reason: Logged dev mode boot
1672 13:43:44.860894 Finalize devices...
1673 13:43:44.863944 PCI: 00:17.0 final
1674 13:43:44.864037 Devices finalized
1675 13:43:44.870444 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1676 13:43:44.874198 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1677 13:43:44.880688 ME: HFSTS1 : 0x90000245
1678 13:43:44.884642 ME: HFSTS2 : 0x3B850126
1679 13:43:44.887647 ME: HFSTS3 : 0x00000020
1680 13:43:44.890873 ME: HFSTS4 : 0x00004800
1681 13:43:44.897808 ME: HFSTS5 : 0x00000000
1682 13:43:44.900938 ME: HFSTS6 : 0x40400006
1683 13:43:44.904213 ME: Manufacturing Mode : NO
1684 13:43:44.907264 ME: FW Partition Table : OK
1685 13:43:44.910549 ME: Bringup Loader Failure : NO
1686 13:43:44.914109 ME: Firmware Init Complete : YES
1687 13:43:44.917112 ME: Boot Options Present : NO
1688 13:43:44.920268 ME: Update In Progress : NO
1689 13:43:44.923849 ME: D0i3 Support : YES
1690 13:43:44.927152 ME: Low Power State Enabled : NO
1691 13:43:44.930442 ME: CPU Replaced : NO
1692 13:43:44.933590 ME: CPU Replacement Valid : YES
1693 13:43:44.937389 ME: Current Working State : 5
1694 13:43:44.940484 ME: Current Operation State : 1
1695 13:43:44.943637 ME: Current Operation Mode : 0
1696 13:43:44.946810 ME: Error Code : 0
1697 13:43:44.950047 ME: CPU Debug Disabled : YES
1698 13:43:44.953362 ME: TXT Support : NO
1699 13:43:44.959964 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1700 13:43:44.963191 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 13:43:44.966970 CBFS @ c08000 size 3f8000
1702 13:43:44.973527 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 13:43:44.976771 CBFS: Locating 'fallback/dsdt.aml'
1704 13:43:44.979976 CBFS: Found @ offset 10bb80 size 3fa5
1705 13:43:44.986527 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 13:43:44.986621 CBFS @ c08000 size 3f8000
1707 13:43:44.992967 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 13:43:44.996442 CBFS: Locating 'fallback/slic'
1709 13:43:45.000239 CBFS: 'fallback/slic' not found.
1710 13:43:45.007273 ACPI: Writing ACPI tables at 99b3e000.
1711 13:43:45.007367 ACPI: * FACS
1712 13:43:45.010509 ACPI: * DSDT
1713 13:43:45.013808 Ramoops buffer: 0x100000@0x99a3d000.
1714 13:43:45.016840 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1715 13:43:45.023804 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1716 13:43:45.026824 Google Chrome EC: version:
1717 13:43:45.029950 ro: helios_v2.0.2659-56403530b
1718 13:43:45.033177 rw: helios_v2.0.2849-c41de27e7d
1719 13:43:45.033280 running image: 1
1720 13:43:45.037608 ACPI: * FADT
1721 13:43:45.037763 SCI is IRQ9
1722 13:43:45.044455 ACPI: added table 1/32, length now 40
1723 13:43:45.044606 ACPI: * SSDT
1724 13:43:45.047639 Found 1 CPU(s) with 8 core(s) each.
1725 13:43:45.050915 Error: Could not locate 'wifi_sar' in VPD.
1726 13:43:45.057306 Checking CBFS for default SAR values
1727 13:43:45.061077 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 13:43:45.064262 CBFS @ c08000 size 3f8000
1729 13:43:45.070456 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 13:43:45.074263 CBFS: Locating 'wifi_sar_defaults.hex'
1731 13:43:45.077508 CBFS: Found @ offset 5fac0 size 77
1732 13:43:45.080685 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1733 13:43:45.086984 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1734 13:43:45.090354 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1735 13:43:45.096968 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1736 13:43:45.100791 failed to find key in VPD: dsm_calib_r0_0
1737 13:43:45.110337 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1738 13:43:45.113574 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1739 13:43:45.116895 failed to find key in VPD: dsm_calib_r0_1
1740 13:43:45.127190 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1741 13:43:45.133465 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1742 13:43:45.137194 failed to find key in VPD: dsm_calib_r0_2
1743 13:43:45.147042 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1744 13:43:45.149992 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1745 13:43:45.157022 failed to find key in VPD: dsm_calib_r0_3
1746 13:43:45.163529 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1747 13:43:45.169762 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1748 13:43:45.173321 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1749 13:43:45.176243 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1750 13:43:45.180579 EC returned error result code 1
1751 13:43:45.184407 EC returned error result code 1
1752 13:43:45.188091 EC returned error result code 1
1753 13:43:45.194541 PS2K: Bad resp from EC. Vivaldi disabled!
1754 13:43:45.198331 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1755 13:43:45.204661 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1756 13:43:45.211102 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1757 13:43:45.214457 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1758 13:43:45.221520 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1759 13:43:45.227370 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1760 13:43:45.234377 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1761 13:43:45.237516 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1762 13:43:45.244122 ACPI: added table 2/32, length now 44
1763 13:43:45.244247 ACPI: * MCFG
1764 13:43:45.247273 ACPI: added table 3/32, length now 48
1765 13:43:45.250540 ACPI: * TPM2
1766 13:43:45.254309 TPM2 log created at 99a2d000
1767 13:43:45.257341 ACPI: added table 4/32, length now 52
1768 13:43:45.257458 ACPI: * MADT
1769 13:43:45.260627 SCI is IRQ9
1770 13:43:45.264449 ACPI: added table 5/32, length now 56
1771 13:43:45.264569 current = 99b43ac0
1772 13:43:45.267516 ACPI: * DMAR
1773 13:43:45.270618 ACPI: added table 6/32, length now 60
1774 13:43:45.273879 ACPI: * IGD OpRegion
1775 13:43:45.273973 GMA: Found VBT in CBFS
1776 13:43:45.277208 GMA: Found valid VBT in CBFS
1777 13:43:45.280910 ACPI: added table 7/32, length now 64
1778 13:43:45.283910 ACPI: * HPET
1779 13:43:45.287411 ACPI: added table 8/32, length now 68
1780 13:43:45.287547 ACPI: done.
1781 13:43:45.290339 ACPI tables: 31744 bytes.
1782 13:43:45.294212 smbios_write_tables: 99a2c000
1783 13:43:45.297295 EC returned error result code 3
1784 13:43:45.301065 Couldn't obtain OEM name from CBI
1785 13:43:45.304270 Create SMBIOS type 17
1786 13:43:45.307414 PCI: 00:00.0 (Intel Cannonlake)
1787 13:43:45.310671 PCI: 00:14.3 (Intel WiFi)
1788 13:43:45.314477 SMBIOS tables: 939 bytes.
1789 13:43:45.317554 Writing table forward entry at 0x00000500
1790 13:43:45.323982 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1791 13:43:45.327186 Writing coreboot table at 0x99b62000
1792 13:43:45.333669 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1793 13:43:45.337450 1. 0000000000001000-000000000009ffff: RAM
1794 13:43:45.340502 2. 00000000000a0000-00000000000fffff: RESERVED
1795 13:43:45.347121 3. 0000000000100000-0000000099a2bfff: RAM
1796 13:43:45.350517 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1797 13:43:45.356835 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1798 13:43:45.363438 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1799 13:43:45.367154 7. 000000009a000000-000000009f7fffff: RESERVED
1800 13:43:45.373502 8. 00000000e0000000-00000000efffffff: RESERVED
1801 13:43:45.376679 9. 00000000fc000000-00000000fc000fff: RESERVED
1802 13:43:45.380020 10. 00000000fe000000-00000000fe00ffff: RESERVED
1803 13:43:45.387005 11. 00000000fed10000-00000000fed17fff: RESERVED
1804 13:43:45.389991 12. 00000000fed80000-00000000fed83fff: RESERVED
1805 13:43:45.396701 13. 00000000fed90000-00000000fed91fff: RESERVED
1806 13:43:45.399891 14. 00000000feda0000-00000000feda1fff: RESERVED
1807 13:43:45.406800 15. 0000000100000000-000000045e7fffff: RAM
1808 13:43:45.410089 Graphics framebuffer located at 0xc0000000
1809 13:43:45.413338 Passing 5 GPIOs to payload:
1810 13:43:45.416472 NAME | PORT | POLARITY | VALUE
1811 13:43:45.423290 write protect | undefined | high | low
1812 13:43:45.426561 lid | undefined | high | high
1813 13:43:45.433093 power | undefined | high | low
1814 13:43:45.439688 oprom | undefined | high | low
1815 13:43:45.442999 EC in RW | 0x000000cb | high | low
1816 13:43:45.446606 Board ID: 4
1817 13:43:45.449652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1818 13:43:45.453224 CBFS @ c08000 size 3f8000
1819 13:43:45.459826 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1820 13:43:45.466328 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1821 13:43:45.466441 coreboot table: 1492 bytes.
1822 13:43:45.469554 IMD ROOT 0. 99fff000 00001000
1823 13:43:45.472847 IMD SMALL 1. 99ffe000 00001000
1824 13:43:45.476494 FSP MEMORY 2. 99c4e000 003b0000
1825 13:43:45.479646 CONSOLE 3. 99c2e000 00020000
1826 13:43:45.482832 FMAP 4. 99c2d000 0000054e
1827 13:43:45.486080 TIME STAMP 5. 99c2c000 00000910
1828 13:43:45.489426 VBOOT WORK 6. 99c18000 00014000
1829 13:43:45.492631 MRC DATA 7. 99c16000 00001958
1830 13:43:45.496297 ROMSTG STCK 8. 99c15000 00001000
1831 13:43:45.499271 AFTER CAR 9. 99c0b000 0000a000
1832 13:43:45.502730 RAMSTAGE 10. 99baf000 0005c000
1833 13:43:45.506374 REFCODE 11. 99b7a000 00035000
1834 13:43:45.509360 SMM BACKUP 12. 99b6a000 00010000
1835 13:43:45.512603 COREBOOT 13. 99b62000 00008000
1836 13:43:45.516002 ACPI 14. 99b3e000 00024000
1837 13:43:45.519246 ACPI GNVS 15. 99b3d000 00001000
1838 13:43:45.522995 RAMOOPS 16. 99a3d000 00100000
1839 13:43:45.526043 TPM2 TCGLOG17. 99a2d000 00010000
1840 13:43:45.529361 SMBIOS 18. 99a2c000 00000800
1841 13:43:45.532549 IMD small region:
1842 13:43:45.535875 IMD ROOT 0. 99ffec00 00000400
1843 13:43:45.539625 FSP RUNTIME 1. 99ffebe0 00000004
1844 13:43:45.542846 EC HOSTEVENT 2. 99ffebc0 00000008
1845 13:43:45.546129 POWER STATE 3. 99ffeb80 00000040
1846 13:43:45.549441 ROMSTAGE 4. 99ffeb60 00000004
1847 13:43:45.552529 MEM INFO 5. 99ffe9a0 000001b9
1848 13:43:45.555678 VPD 6. 99ffe920 0000006c
1849 13:43:45.558765 MTRR: Physical address space:
1850 13:43:45.565550 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1851 13:43:45.572049 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1852 13:43:45.578963 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1853 13:43:45.585255 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1854 13:43:45.591756 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1855 13:43:45.598615 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1856 13:43:45.605415 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1857 13:43:45.608560 MTRR: Fixed MSR 0x250 0x0606060606060606
1858 13:43:45.611672 MTRR: Fixed MSR 0x258 0x0606060606060606
1859 13:43:45.615315 MTRR: Fixed MSR 0x259 0x0000000000000000
1860 13:43:45.621558 MTRR: Fixed MSR 0x268 0x0606060606060606
1861 13:43:45.624789 MTRR: Fixed MSR 0x269 0x0606060606060606
1862 13:43:45.628482 MTRR: Fixed MSR 0x26a 0x0606060606060606
1863 13:43:45.631727 MTRR: Fixed MSR 0x26b 0x0606060606060606
1864 13:43:45.638261 MTRR: Fixed MSR 0x26c 0x0606060606060606
1865 13:43:45.641487 MTRR: Fixed MSR 0x26d 0x0606060606060606
1866 13:43:45.644637 MTRR: Fixed MSR 0x26e 0x0606060606060606
1867 13:43:45.647870 MTRR: Fixed MSR 0x26f 0x0606060606060606
1868 13:43:45.651775 call enable_fixed_mtrr()
1869 13:43:45.655081 CPU physical address size: 39 bits
1870 13:43:45.661263 MTRR: default type WB/UC MTRR counts: 6/8.
1871 13:43:45.664832 MTRR: WB selected as default type.
1872 13:43:45.671539 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1873 13:43:45.674921 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1874 13:43:45.680899 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1875 13:43:45.687983 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1876 13:43:45.694369 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1877 13:43:45.701052 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1878 13:43:45.707559 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 13:43:45.710987 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 13:43:45.714627 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 13:43:45.717482 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 13:43:45.720581 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 13:43:45.727411 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 13:43:45.730570 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 13:43:45.734315 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 13:43:45.737365 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 13:43:45.744061 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 13:43:45.747299 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 13:43:45.747408
1890 13:43:45.747496 MTRR check
1891 13:43:45.750520 Fixed MTRRs : Enabled
1892 13:43:45.753807 Variable MTRRs: Enabled
1893 13:43:45.753896
1894 13:43:45.757176 call enable_fixed_mtrr()
1895 13:43:45.760266 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1896 13:43:45.763625 CPU physical address size: 39 bits
1897 13:43:45.770836 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1898 13:43:45.774357 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 13:43:45.777486 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 13:43:45.783590 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 13:43:45.787291 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 13:43:45.790581 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 13:43:45.793917 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 13:43:45.800066 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 13:43:45.803458 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 13:43:45.807416 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 13:43:45.810524 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 13:43:45.817165 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 13:43:45.820397 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 13:43:45.823430 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 13:43:45.827137 call enable_fixed_mtrr()
1912 13:43:45.830006 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 13:43:45.833637 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 13:43:45.840444 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 13:43:45.843335 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 13:43:45.846665 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 13:43:45.849792 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 13:43:45.856500 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 13:43:45.859721 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 13:43:45.863067 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 13:43:45.866913 CPU physical address size: 39 bits
1922 13:43:45.870110 call enable_fixed_mtrr()
1923 13:43:45.873396 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 13:43:45.876494 CPU physical address size: 39 bits
1925 13:43:45.883099 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 13:43:45.886304 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 13:43:45.890084 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 13:43:45.893089 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 13:43:45.896287 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 13:43:45.903369 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 13:43:45.906393 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 13:43:45.909722 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 13:43:45.912854 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 13:43:45.919696 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 13:43:45.922819 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 13:43:45.926183 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 13:43:45.929255 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 13:43:45.933026 call enable_fixed_mtrr()
1939 13:43:45.936311 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 13:43:45.943157 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 13:43:45.946238 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 13:43:45.949775 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 13:43:45.952852 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 13:43:45.959480 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 13:43:45.962701 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 13:43:45.965840 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 13:43:45.969018 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 13:43:45.972987 CPU physical address size: 39 bits
1949 13:43:45.975635 call enable_fixed_mtrr()
1950 13:43:45.979493 CBFS @ c08000 size 3f8000
1951 13:43:45.985953 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1952 13:43:45.988964 CBFS: Locating 'fallback/payload'
1953 13:43:45.992474 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 13:43:45.995890 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 13:43:46.002625 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 13:43:46.005826 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 13:43:46.008865 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 13:43:46.012151 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 13:43:46.018589 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 13:43:46.021948 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 13:43:46.025579 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 13:43:46.028694 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 13:43:46.035566 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 13:43:46.038553 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 13:43:46.042378 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 13:43:46.045456 call enable_fixed_mtrr()
1967 13:43:46.048977 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 13:43:46.051970 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 13:43:46.058582 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 13:43:46.061718 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 13:43:46.065563 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 13:43:46.068890 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 13:43:46.075334 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 13:43:46.078602 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 13:43:46.081828 CPU physical address size: 39 bits
1976 13:43:46.084980 call enable_fixed_mtrr()
1977 13:43:46.088175 CPU physical address size: 39 bits
1978 13:43:46.091568 CPU physical address size: 39 bits
1979 13:43:46.094796 CBFS: Found @ offset 1c96c0 size 3f798
1980 13:43:46.098467 Checking segment from ROM address 0xffdd16f8
1981 13:43:46.104928 Checking segment from ROM address 0xffdd1714
1982 13:43:46.107947 Loading segment from ROM address 0xffdd16f8
1983 13:43:46.111616 code (compression=0)
1984 13:43:46.117955 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1985 13:43:46.128210 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1986 13:43:46.131260 it's not compressed!
1987 13:43:46.222579 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1988 13:43:46.228953 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1989 13:43:46.232123 Loading segment from ROM address 0xffdd1714
1990 13:43:46.235784 Entry Point 0x30000000
1991 13:43:46.239040 Loaded segments
1992 13:43:46.244398 Finalizing chipset.
1993 13:43:46.248012 Finalizing SMM.
1994 13:43:46.251189 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1995 13:43:46.254455 mp_park_aps done after 0 msecs.
1996 13:43:46.261467 Jumping to boot code at 30000000(99b62000)
1997 13:43:46.267697 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1998 13:43:46.268125
1999 13:43:46.268461
2000 13:43:46.268770
2001 13:43:46.271395 Starting depthcharge on Helios...
2002 13:43:46.271891
2003 13:43:46.273364 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2004 13:43:46.273902 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2005 13:43:46.274517 Setting prompt string to ['hatch:']
2006 13:43:46.275072 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2007 13:43:46.281328 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2008 13:43:46.281999
2009 13:43:46.287679 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2010 13:43:46.288319
2011 13:43:46.294291 board_setup: Info: eMMC controller not present; skipping
2012 13:43:46.294723
2013 13:43:46.297619 New NVMe Controller 0x30053ac0 @ 00:1d:00
2014 13:43:46.298051
2015 13:43:46.304030 board_setup: Info: SDHCI controller not present; skipping
2016 13:43:46.304547
2017 13:43:46.307860 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2018 13:43:46.310887
2019 13:43:46.311312 Wipe memory regions:
2020 13:43:46.311719
2021 13:43:46.314083 [0x00000000001000, 0x000000000a0000)
2022 13:43:46.314513
2023 13:43:46.317234 [0x00000000100000, 0x00000030000000)
2024 13:43:46.383768
2025 13:43:46.386692 [0x00000030657430, 0x00000099a2c000)
2026 13:43:46.533672
2027 13:43:46.536833 [0x00000100000000, 0x0000045e800000)
2028 13:43:47.992064
2029 13:43:47.992215 R8152: Initializing
2030 13:43:47.992288
2031 13:43:47.995788 Version 9 (ocp_data = 6010)
2032 13:43:47.999502
2033 13:43:47.999595 R8152: Done initializing
2034 13:43:47.999670
2035 13:43:48.003402 Adding net device
2036 13:43:48.485669
2037 13:43:48.485827 R8152: Initializing
2038 13:43:48.485907
2039 13:43:48.488838 Version 6 (ocp_data = 5c30)
2040 13:43:48.488936
2041 13:43:48.492321 R8152: Done initializing
2042 13:43:48.492413
2043 13:43:48.495452 net_add_device: Attemp to include the same device
2044 13:43:48.499174
2045 13:43:48.506273 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2046 13:43:48.506365
2047 13:43:48.506437
2048 13:43:48.506504
2049 13:43:48.506796 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2051 13:43:48.607196 hatch: tftpboot 192.168.201.1 10624679/tftp-deploy-dwgtszj1/kernel/bzImage 10624679/tftp-deploy-dwgtszj1/kernel/cmdline 10624679/tftp-deploy-dwgtszj1/ramdisk/ramdisk.cpio.gz
2052 13:43:48.607363 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2053 13:43:48.607489 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2054 13:43:48.611730 tftpboot 192.168.201.1 10624679/tftp-deploy-dwgtszj1/kernel/bzIploy-dwgtszj1/kernel/cmdline 10624679/tftp-deploy-dwgtszj1/ramdisk/ramdisk.cpio.gz
2055 13:43:48.611828
2056 13:43:48.611902 Waiting for link
2057 13:43:48.812437
2058 13:43:48.812583 done.
2059 13:43:48.812657
2060 13:43:48.812727 MAC: 00:24:32:50:1a:59
2061 13:43:48.812794
2062 13:43:48.815559 Sending DHCP discover... done.
2063 13:43:48.815653
2064 13:43:48.818819 Waiting for reply... done.
2065 13:43:48.818913
2066 13:43:48.822374 Sending DHCP request... done.
2067 13:43:48.822469
2068 13:43:48.826045 Waiting for reply... done.
2069 13:43:48.826138
2070 13:43:48.829130 My ip is 192.168.201.14
2071 13:43:48.829223
2072 13:43:48.832054 The DHCP server ip is 192.168.201.1
2073 13:43:48.832148
2074 13:43:48.838815 TFTP server IP predefined by user: 192.168.201.1
2075 13:43:48.838909
2076 13:43:48.845450 Bootfile predefined by user: 10624679/tftp-deploy-dwgtszj1/kernel/bzImage
2077 13:43:48.845545
2078 13:43:48.848888 Sending tftp read request... done.
2079 13:43:48.848982
2080 13:43:48.852001 Waiting for the transfer...
2081 13:43:48.852095
2082 13:43:49.386879 00000000 ################################################################
2083 13:43:49.387026
2084 13:43:49.939504 00080000 ################################################################
2085 13:43:49.939650
2086 13:43:50.477520 00100000 ################################################################
2087 13:43:50.477663
2088 13:43:51.009485 00180000 ################################################################
2089 13:43:51.009629
2090 13:43:51.535441 00200000 ################################################################
2091 13:43:51.535599
2092 13:43:52.055925 00280000 ################################################################
2093 13:43:52.056073
2094 13:43:52.587750 00300000 ################################################################
2095 13:43:52.587901
2096 13:43:53.126039 00380000 ################################################################
2097 13:43:53.126186
2098 13:43:53.651169 00400000 ################################################################
2099 13:43:53.651318
2100 13:43:54.178225 00480000 ################################################################
2101 13:43:54.178411
2102 13:43:54.708558 00500000 ################################################################
2103 13:43:54.708717
2104 13:43:55.223696 00580000 ################################################################
2105 13:43:55.223843
2106 13:43:55.733778 00600000 ################################################################
2107 13:43:55.733922
2108 13:43:56.249013 00680000 ################################################################
2109 13:43:56.249161
2110 13:43:56.766695 00700000 ################################################################
2111 13:43:56.766869
2112 13:43:56.788371 00780000 ### done.
2113 13:43:56.788508
2114 13:43:56.792210 The bootfile was 7884688 bytes long.
2115 13:43:56.792340
2116 13:43:56.795336 Sending tftp read request... done.
2117 13:43:56.795475
2118 13:43:56.798329 Waiting for the transfer...
2119 13:43:56.798422
2120 13:43:57.316982 00000000 ################################################################
2121 13:43:57.317133
2122 13:43:57.840861 00080000 ################################################################
2123 13:43:57.841011
2124 13:43:58.366091 00100000 ################################################################
2125 13:43:58.366239
2126 13:43:58.893459 00180000 ################################################################
2127 13:43:58.893646
2128 13:43:59.417494 00200000 ################################################################
2129 13:43:59.417647
2130 13:43:59.956275 00280000 ################################################################
2131 13:43:59.956427
2132 13:44:00.477233 00300000 ################################################################
2133 13:44:00.477391
2134 13:44:01.024194 00380000 ################################################################
2135 13:44:01.024350
2136 13:44:01.559987 00400000 ################################################################
2137 13:44:01.560146
2138 13:44:02.089160 00480000 ################################################################
2139 13:44:02.089316
2140 13:44:02.607859 00500000 ################################################################
2141 13:44:02.608022
2142 13:44:02.840992 00580000 ############################# done.
2143 13:44:02.841153
2144 13:44:02.844543 Sending tftp read request... done.
2145 13:44:02.844644
2146 13:44:02.847582 Waiting for the transfer...
2147 13:44:02.847673
2148 13:44:02.847750 00000000 # done.
2149 13:44:02.847821
2150 13:44:02.857768 Command line loaded dynamically from TFTP file: 10624679/tftp-deploy-dwgtszj1/kernel/cmdline
2151 13:44:02.857860
2152 13:44:02.881048 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10624679/extract-nfsrootfs-itodgctc,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2153 13:44:02.881147
2154 13:44:02.887578 ec_init(0): CrosEC protocol v3 supported (256, 256)
2155 13:44:02.890898
2156 13:44:02.894063 Shutting down all USB controllers.
2157 13:44:02.894148
2158 13:44:02.894218 Removing current net device
2159 13:44:02.898014
2160 13:44:02.898096 Finalizing coreboot
2161 13:44:02.898170
2162 13:44:02.905027 Exiting depthcharge with code 4 at timestamp: 24018414
2163 13:44:02.905122
2164 13:44:02.905195
2165 13:44:02.905263 Starting kernel ...
2166 13:44:02.905330
2167 13:44:02.905402
2168 13:44:02.905796 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2169 13:44:02.905911 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2170 13:44:02.905997 Setting prompt string to ['Linux version [0-9]']
2171 13:44:02.906075 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 13:44:02.906156 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 13:48:27.906945 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2176 13:48:27.908117 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2178 13:48:27.909027 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2181 13:48:27.910510 end: 2 depthcharge-action (duration 00:05:00) [common]
2183 13:48:27.911706 Cleaning after the job
2184 13:48:27.911839 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/ramdisk
2185 13:48:27.912742 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/kernel
2186 13:48:27.913804 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/nfsrootfs
2187 13:48:28.008355 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624679/tftp-deploy-dwgtszj1/modules
2188 13:48:28.008840 start: 4.1 power-off (timeout 00:00:30) [common]
2189 13:48:28.009029 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2190 13:48:28.089686 >> Command sent successfully.
2191 13:48:28.095699 Returned 0 in 0 seconds
2192 13:48:28.196797 end: 4.1 power-off (duration 00:00:00) [common]
2194 13:48:28.198387 start: 4.2 read-feedback (timeout 00:10:00) [common]
2195 13:48:28.199647 Listened to connection for namespace 'common' for up to 1s
2197 13:48:28.201020 Listened to connection for namespace 'common' for up to 1s
2198 13:48:29.200470 Finalising connection for namespace 'common'
2199 13:48:29.201164 Disconnecting from shell: Finalise
2200 13:48:29.201575