Boot log: asus-C436FA-Flip-hatch

    1 13:48:15.846480  lava-dispatcher, installed at version: 2023.05.1
    2 13:48:15.846675  start: 0 validate
    3 13:48:15.846800  Start time: 2023-06-07 13:48:15.846792+00:00 (UTC)
    4 13:48:15.846912  Using caching service: 'http://localhost/cache/?uri=%s'
    5 13:48:15.847035  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
    6 13:48:16.132661  Using caching service: 'http://localhost/cache/?uri=%s'
    7 13:48:16.133465  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
    8 13:48:16.406314  Using caching service: 'http://localhost/cache/?uri=%s'
    9 13:48:16.407101  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
   10 13:48:18.999823  validate duration: 3.15
   12 13:48:19.000153  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 13:48:19.000249  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 13:48:19.000336  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 13:48:19.000450  Not decompressing ramdisk as can be used compressed.
   16 13:48:19.000532  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
   17 13:48:19.000595  saving as /var/lib/lava/dispatcher/tmp/10624724/tftp-deploy-rqu9_14_/ramdisk/rootfs.cpio.gz
   18 13:48:19.000656  total size: 8430069 (8MB)
   19 13:48:19.537516  progress   0% (0MB)
   20 13:48:19.542167  progress   5% (0MB)
   21 13:48:19.544348  progress  10% (0MB)
   22 13:48:19.546474  progress  15% (1MB)
   23 13:48:19.548636  progress  20% (1MB)
   24 13:48:19.550757  progress  25% (2MB)
   25 13:48:19.552892  progress  30% (2MB)
   26 13:48:19.554999  progress  35% (2MB)
   27 13:48:19.556954  progress  40% (3MB)
   28 13:48:19.559044  progress  45% (3MB)
   29 13:48:19.561152  progress  50% (4MB)
   30 13:48:19.563249  progress  55% (4MB)
   31 13:48:19.565400  progress  60% (4MB)
   32 13:48:19.567525  progress  65% (5MB)
   33 13:48:19.569679  progress  70% (5MB)
   34 13:48:19.571623  progress  75% (6MB)
   35 13:48:19.573786  progress  80% (6MB)
   36 13:48:19.575940  progress  85% (6MB)
   37 13:48:19.578047  progress  90% (7MB)
   38 13:48:19.580207  progress  95% (7MB)
   39 13:48:19.582324  progress 100% (8MB)
   40 13:48:19.582453  8MB downloaded in 0.58s (13.82MB/s)
   41 13:48:19.582599  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 13:48:19.582838  end: 1.1 download-retry (duration 00:00:01) [common]
   44 13:48:19.582922  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 13:48:19.583004  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 13:48:19.583132  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
   47 13:48:19.583203  saving as /var/lib/lava/dispatcher/tmp/10624724/tftp-deploy-rqu9_14_/kernel/bzImage
   48 13:48:19.583262  total size: 8028048 (7MB)
   49 13:48:19.583320  No compression specified
   50 13:48:19.584517  progress   0% (0MB)
   51 13:48:19.586811  progress   5% (0MB)
   52 13:48:19.588868  progress  10% (0MB)
   53 13:48:19.590840  progress  15% (1MB)
   54 13:48:19.592866  progress  20% (1MB)
   55 13:48:19.594991  progress  25% (1MB)
   56 13:48:19.597019  progress  30% (2MB)
   57 13:48:19.598967  progress  35% (2MB)
   58 13:48:19.600961  progress  40% (3MB)
   59 13:48:19.603062  progress  45% (3MB)
   60 13:48:19.605058  progress  50% (3MB)
   61 13:48:19.607039  progress  55% (4MB)
   62 13:48:19.609050  progress  60% (4MB)
   63 13:48:19.611150  progress  65% (5MB)
   64 13:48:19.613157  progress  70% (5MB)
   65 13:48:19.615129  progress  75% (5MB)
   66 13:48:19.617144  progress  80% (6MB)
   67 13:48:19.619272  progress  85% (6MB)
   68 13:48:19.621337  progress  90% (6MB)
   69 13:48:19.623319  progress  95% (7MB)
   70 13:48:19.625363  progress 100% (7MB)
   71 13:48:19.625593  7MB downloaded in 0.04s (180.88MB/s)
   72 13:48:19.625727  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 13:48:19.626014  end: 1.2 download-retry (duration 00:00:00) [common]
   75 13:48:19.626100  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 13:48:19.626188  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 13:48:19.626316  downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
   78 13:48:19.626383  saving as /var/lib/lava/dispatcher/tmp/10624724/tftp-deploy-rqu9_14_/modules/modules.tar
   79 13:48:19.626442  total size: 255828 (0MB)
   80 13:48:19.626500  Using unxz to decompress xz
   81 13:48:19.630147  progress  12% (0MB)
   82 13:48:19.630520  progress  25% (0MB)
   83 13:48:19.630751  progress  38% (0MB)
   84 13:48:19.632130  progress  51% (0MB)
   85 13:48:19.633972  progress  64% (0MB)
   86 13:48:19.635955  progress  76% (0MB)
   87 13:48:19.637832  progress  89% (0MB)
   88 13:48:19.639670  progress 100% (0MB)
   89 13:48:19.645394  0MB downloaded in 0.02s (12.88MB/s)
   90 13:48:19.645639  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 13:48:19.645935  end: 1.3 download-retry (duration 00:00:00) [common]
   93 13:48:19.646030  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 13:48:19.646126  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 13:48:19.646208  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 13:48:19.646291  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 13:48:19.646493  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw
   98 13:48:19.646617  makedir: /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin
   99 13:48:19.646716  makedir: /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/tests
  100 13:48:19.646808  makedir: /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/results
  101 13:48:19.646915  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-add-keys
  102 13:48:19.647050  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-add-sources
  103 13:48:19.647173  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-background-process-start
  104 13:48:19.647298  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-background-process-stop
  105 13:48:19.647419  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-common-functions
  106 13:48:19.647537  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-echo-ipv4
  107 13:48:19.647655  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-install-packages
  108 13:48:19.647772  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-installed-packages
  109 13:48:19.647931  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-os-build
  110 13:48:19.648051  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-probe-channel
  111 13:48:19.648171  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-probe-ip
  112 13:48:19.648289  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-target-ip
  113 13:48:19.648406  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-target-mac
  114 13:48:19.648523  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-target-storage
  115 13:48:19.648644  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-test-case
  116 13:48:19.648763  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-test-event
  117 13:48:19.648879  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-test-feedback
  118 13:48:19.648996  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-test-raise
  119 13:48:19.649118  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-test-reference
  120 13:48:19.649240  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-test-runner
  121 13:48:19.649358  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-test-set
  122 13:48:19.649477  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-test-shell
  123 13:48:19.649597  Updating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-install-packages (oe)
  124 13:48:19.649741  Updating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/bin/lava-installed-packages (oe)
  125 13:48:19.649859  Creating /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/environment
  126 13:48:19.649954  LAVA metadata
  127 13:48:19.650026  - LAVA_JOB_ID=10624724
  128 13:48:19.650090  - LAVA_DISPATCHER_IP=192.168.201.1
  129 13:48:19.650187  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 13:48:19.650255  skipped lava-vland-overlay
  131 13:48:19.650328  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 13:48:19.650408  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 13:48:19.650469  skipped lava-multinode-overlay
  134 13:48:19.650540  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 13:48:19.650619  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 13:48:19.650692  Loading test definitions
  137 13:48:19.650782  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 13:48:19.650854  Using /lava-10624724 at stage 0
  139 13:48:19.651154  uuid=10624724_1.4.2.3.1 testdef=None
  140 13:48:19.651240  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 13:48:19.651324  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 13:48:19.651825  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 13:48:19.652090  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 13:48:19.652697  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 13:48:19.652919  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 13:48:19.653504  runner path: /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/0/tests/0_dmesg test_uuid 10624724_1.4.2.3.1
  149 13:48:19.653651  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 13:48:19.653875  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 13:48:19.653945  Using /lava-10624724 at stage 1
  153 13:48:19.654217  uuid=10624724_1.4.2.3.5 testdef=None
  154 13:48:19.654302  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 13:48:19.654383  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 13:48:19.654825  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 13:48:19.655035  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 13:48:19.655644  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 13:48:19.655889  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 13:48:19.656510  runner path: /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/1/tests/1_bootrr test_uuid 10624724_1.4.2.3.5
  163 13:48:19.656653  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 13:48:19.656855  Creating lava-test-runner.conf files
  166 13:48:19.656916  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/0 for stage 0
  167 13:48:19.657000  - 0_dmesg
  168 13:48:19.657076  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624724/lava-overlay-6srcgotw/lava-10624724/1 for stage 1
  169 13:48:19.657162  - 1_bootrr
  170 13:48:19.657251  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 13:48:19.657334  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 13:48:19.665593  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 13:48:19.665692  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 13:48:19.665776  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 13:48:19.665858  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 13:48:19.665942  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 13:48:19.903331  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 13:48:19.903719  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 13:48:19.903917  extracting modules file /var/lib/lava/dispatcher/tmp/10624724/tftp-deploy-rqu9_14_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624724/extract-overlay-ramdisk-z6rtnz7_/ramdisk
  180 13:48:19.916879  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 13:48:19.916996  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 13:48:19.917080  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624724/compress-overlay-uo07_k72/overlay-1.4.2.4.tar.gz to ramdisk
  183 13:48:19.917155  [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624724/compress-overlay-uo07_k72/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624724/extract-overlay-ramdisk-z6rtnz7_/ramdisk
  184 13:48:19.925550  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 13:48:19.925666  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 13:48:19.925757  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 13:48:19.925849  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 13:48:19.925931  Building ramdisk /var/lib/lava/dispatcher/tmp/10624724/extract-overlay-ramdisk-z6rtnz7_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624724/extract-overlay-ramdisk-z6rtnz7_/ramdisk
  189 13:48:20.057778  >> 49849 blocks

  190 13:48:20.873246  rename /var/lib/lava/dispatcher/tmp/10624724/extract-overlay-ramdisk-z6rtnz7_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624724/tftp-deploy-rqu9_14_/ramdisk/ramdisk.cpio.gz
  191 13:48:20.873663  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 13:48:20.873785  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 13:48:20.873884  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 13:48:20.873979  No mkimage arch provided, not using FIT.
  195 13:48:20.874065  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 13:48:20.874148  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 13:48:20.874264  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 13:48:20.874380  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 13:48:20.874476  No LXC device requested
  200 13:48:20.874555  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 13:48:20.874640  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 13:48:20.874719  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 13:48:20.874787  Checking files for TFTP limit of 4294967296 bytes.
  204 13:48:20.875178  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 13:48:20.875278  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 13:48:20.875362  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 13:48:20.875478  substitutions:
  208 13:48:20.875577  - {DTB}: None
  209 13:48:20.875637  - {INITRD}: 10624724/tftp-deploy-rqu9_14_/ramdisk/ramdisk.cpio.gz
  210 13:48:20.875695  - {KERNEL}: 10624724/tftp-deploy-rqu9_14_/kernel/bzImage
  211 13:48:20.875750  - {LAVA_MAC}: None
  212 13:48:20.875804  - {PRESEED_CONFIG}: None
  213 13:48:20.875884  - {PRESEED_LOCAL}: None
  214 13:48:20.875951  - {RAMDISK}: 10624724/tftp-deploy-rqu9_14_/ramdisk/ramdisk.cpio.gz
  215 13:48:20.876003  - {ROOT_PART}: None
  216 13:48:20.876055  - {ROOT}: None
  217 13:48:20.876106  - {SERVER_IP}: 192.168.201.1
  218 13:48:20.876158  - {TEE}: None
  219 13:48:20.876209  Parsed boot commands:
  220 13:48:20.876260  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 13:48:20.876420  Parsed boot commands: tftpboot 192.168.201.1 10624724/tftp-deploy-rqu9_14_/kernel/bzImage 10624724/tftp-deploy-rqu9_14_/kernel/cmdline 10624724/tftp-deploy-rqu9_14_/ramdisk/ramdisk.cpio.gz
  222 13:48:20.876504  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 13:48:20.876587  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 13:48:20.876679  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 13:48:20.876766  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 13:48:20.876833  Not connected, no need to disconnect.
  227 13:48:20.876905  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 13:48:20.877085  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 13:48:20.877150  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  230 13:48:20.880563  Setting prompt string to ['lava-test: # ']
  231 13:48:20.880877  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 13:48:20.880981  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 13:48:20.881076  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 13:48:20.881160  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 13:48:20.881343  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  236 13:48:26.029435  >> Command sent successfully.

  237 13:48:26.035638  Returned 0 in 5 seconds
  238 13:48:26.136354  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 13:48:26.138222  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 13:48:26.138786  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 13:48:26.139350  Setting prompt string to 'Starting depthcharge on Helios...'
  243 13:48:26.139743  Changing prompt to 'Starting depthcharge on Helios...'
  244 13:48:26.140183  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  245 13:48:26.141418  [Enter `^Ec?' for help]

  246 13:48:26.752923  

  247 13:48:26.753510  

  248 13:48:26.763541  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  249 13:48:26.766621  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  250 13:48:26.772770  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  251 13:48:26.776586  CPU: AES supported, TXT NOT supported, VT supported

  252 13:48:26.783337  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  253 13:48:26.786770  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  254 13:48:26.793287  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  255 13:48:26.796494  VBOOT: Loading verstage.

  256 13:48:26.800367  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  257 13:48:26.806787  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  258 13:48:26.809740  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  259 13:48:26.812500  CBFS @ c08000 size 3f8000

  260 13:48:26.819488  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  261 13:48:26.822857  CBFS: Locating 'fallback/verstage'

  262 13:48:26.826265  CBFS: Found @ offset 10fb80 size 1072c

  263 13:48:26.830135  

  264 13:48:26.830701  

  265 13:48:26.839937  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  266 13:48:26.854516  Probing TPM: . done!

  267 13:48:26.857440  TPM ready after 0 ms

  268 13:48:26.861302  Connected to device vid:did:rid of 1ae0:0028:00

  269 13:48:26.870910  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  270 13:48:26.874627  Initialized TPM device CR50 revision 0

  271 13:48:26.921550  tlcl_send_startup: Startup return code is 0

  272 13:48:26.922139  TPM: setup succeeded

  273 13:48:26.934159  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  274 13:48:26.938446  Chrome EC: UHEPI supported

  275 13:48:26.941835  Phase 1

  276 13:48:26.944676  FMAP: area GBB found @ c05000 (12288 bytes)

  277 13:48:26.951989  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  278 13:48:26.954661  Phase 2

  279 13:48:26.955243  Phase 3

  280 13:48:26.958029  FMAP: area GBB found @ c05000 (12288 bytes)

  281 13:48:26.965056  VB2:vb2_report_dev_firmware() This is developer signed firmware

  282 13:48:26.971786  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  283 13:48:26.975891  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  284 13:48:26.981364  VB2:vb2_verify_keyblock() Checking keyblock signature...

  285 13:48:26.996944  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  286 13:48:27.000329  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  287 13:48:27.006559  VB2:vb2_verify_fw_preamble() Verifying preamble.

  288 13:48:27.011682  Phase 4

  289 13:48:27.014611  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  290 13:48:27.020835  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  291 13:48:27.200443  VB2:vb2_rsa_verify_digest() Digest check failed!

  292 13:48:27.207156  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  293 13:48:27.207729  Saving nvdata

  294 13:48:27.210516  Reboot requested (10020007)

  295 13:48:27.213305  board_reset() called!

  296 13:48:27.213825  full_reset() called!

  297 13:48:31.720259  

  298 13:48:31.720825  

  299 13:48:31.730596  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  300 13:48:31.733362  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  301 13:48:31.740095  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  302 13:48:31.743236  CPU: AES supported, TXT NOT supported, VT supported

  303 13:48:31.750286  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  304 13:48:31.753254  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  305 13:48:31.759783  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  306 13:48:31.763565  VBOOT: Loading verstage.

  307 13:48:31.766542  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  308 13:48:31.773165  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  309 13:48:31.776636  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  310 13:48:31.780093  CBFS @ c08000 size 3f8000

  311 13:48:31.786436  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  312 13:48:31.789494  CBFS: Locating 'fallback/verstage'

  313 13:48:31.793419  CBFS: Found @ offset 10fb80 size 1072c

  314 13:48:31.796850  

  315 13:48:31.797417  

  316 13:48:31.806612  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  317 13:48:31.822522  Probing TPM: . done!

  318 13:48:31.824172  TPM ready after 0 ms

  319 13:48:31.829588  Connected to device vid:did:rid of 1ae0:0028:00

  320 13:48:31.837934  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  321 13:48:31.841362  Initialized TPM device CR50 revision 0

  322 13:48:31.888808  tlcl_send_startup: Startup return code is 0

  323 13:48:31.889383  TPM: setup succeeded

  324 13:48:31.900993  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  325 13:48:31.905044  Chrome EC: UHEPI supported

  326 13:48:31.908097  Phase 1

  327 13:48:31.911451  FMAP: area GBB found @ c05000 (12288 bytes)

  328 13:48:31.918411  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  329 13:48:31.924591  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  330 13:48:31.928054  Recovery requested (1009000e)

  331 13:48:31.934469  Saving nvdata

  332 13:48:31.940267  tlcl_extend: response is 0

  333 13:48:31.949024  tlcl_extend: response is 0

  334 13:48:31.956018  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  335 13:48:31.959098  CBFS @ c08000 size 3f8000

  336 13:48:31.965913  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  337 13:48:31.969179  CBFS: Locating 'fallback/romstage'

  338 13:48:31.972327  CBFS: Found @ offset 80 size 145fc

  339 13:48:31.975775  Accumulated console time in verstage 98 ms

  340 13:48:31.976441  

  341 13:48:31.976829  

  342 13:48:31.988805  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  343 13:48:31.995913  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  344 13:48:31.998810  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  345 13:48:32.001847  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  346 13:48:32.008595  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  347 13:48:32.011984  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  348 13:48:32.014924  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  349 13:48:32.018470  TCO_STS:   0000 0000

  350 13:48:32.021823  GEN_PMCON: e0015238 00000200

  351 13:48:32.025140  GBLRST_CAUSE: 00000000 00000000

  352 13:48:32.025618  prev_sleep_state 5

  353 13:48:32.029019  Boot Count incremented to 63804

  354 13:48:32.035637  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  355 13:48:32.039079  CBFS @ c08000 size 3f8000

  356 13:48:32.045429  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  357 13:48:32.046017  CBFS: Locating 'fspm.bin'

  358 13:48:32.051924  CBFS: Found @ offset 5ffc0 size 71000

  359 13:48:32.055278  Chrome EC: UHEPI supported

  360 13:48:32.062348  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  361 13:48:32.065864  Probing TPM:  done!

  362 13:48:32.072629  Connected to device vid:did:rid of 1ae0:0028:00

  363 13:48:32.082443  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  364 13:48:32.088303  Initialized TPM device CR50 revision 0

  365 13:48:32.097290  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  366 13:48:32.104005  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  367 13:48:32.107348  MRC cache found, size 1948

  368 13:48:32.110494  bootmode is set to: 2

  369 13:48:32.114064  PRMRR disabled by config.

  370 13:48:32.114638  SPD INDEX = 1

  371 13:48:32.120548  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 13:48:32.123805  CBFS @ c08000 size 3f8000

  373 13:48:32.130287  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 13:48:32.130848  CBFS: Locating 'spd.bin'

  375 13:48:32.133564  CBFS: Found @ offset 5fb80 size 400

  376 13:48:32.137077  SPD: module type is LPDDR3

  377 13:48:32.140371  SPD: module part is 

  378 13:48:32.146890  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  379 13:48:32.150648  SPD: device width 4 bits, bus width 8 bits

  380 13:48:32.153590  SPD: module size is 4096 MB (per channel)

  381 13:48:32.157009  memory slot: 0 configuration done.

  382 13:48:32.160338  memory slot: 2 configuration done.

  383 13:48:32.211919  CBMEM:

  384 13:48:32.214978  IMD: root @ 99fff000 254 entries.

  385 13:48:32.218550  IMD: root @ 99ffec00 62 entries.

  386 13:48:32.221647  External stage cache:

  387 13:48:32.225708  IMD: root @ 9abff000 254 entries.

  388 13:48:32.228016  IMD: root @ 9abfec00 62 entries.

  389 13:48:32.231575  Chrome EC: clear events_b mask to 0x0000000020004000

  390 13:48:32.247666  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  391 13:48:32.261334  tlcl_write: response is 0

  392 13:48:32.270209  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  393 13:48:32.276802  MRC: TPM MRC hash updated successfully.

  394 13:48:32.277379  2 DIMMs found

  395 13:48:32.279957  SMM Memory Map

  396 13:48:32.283461  SMRAM       : 0x9a000000 0x1000000

  397 13:48:32.286811   Subregion 0: 0x9a000000 0xa00000

  398 13:48:32.290502   Subregion 1: 0x9aa00000 0x200000

  399 13:48:32.293350   Subregion 2: 0x9ac00000 0x400000

  400 13:48:32.296894  top_of_ram = 0x9a000000

  401 13:48:32.300094  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  402 13:48:32.306662  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  403 13:48:32.309948  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  404 13:48:32.316632  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  405 13:48:32.320413  CBFS @ c08000 size 3f8000

  406 13:48:32.323113  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  407 13:48:32.326653  CBFS: Locating 'fallback/postcar'

  408 13:48:32.333421  CBFS: Found @ offset 107000 size 4b44

  409 13:48:32.336293  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  410 13:48:32.349372  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  411 13:48:32.352333  Processing 180 relocs. Offset value of 0x97c0c000

  412 13:48:32.361134  Accumulated console time in romstage 286 ms

  413 13:48:32.361719  

  414 13:48:32.362100  

  415 13:48:32.371962  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  416 13:48:32.377475  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  417 13:48:32.380980  CBFS @ c08000 size 3f8000

  418 13:48:32.385980  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  419 13:48:32.390683  CBFS: Locating 'fallback/ramstage'

  420 13:48:32.394171  CBFS: Found @ offset 43380 size 1b9e8

  421 13:48:32.400477  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  422 13:48:32.432820  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  423 13:48:32.435961  Processing 3976 relocs. Offset value of 0x98db0000

  424 13:48:32.442607  Accumulated console time in postcar 52 ms

  425 13:48:32.443188  

  426 13:48:32.443569  

  427 13:48:32.452551  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  428 13:48:32.458905  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  429 13:48:32.462832  WARNING: RO_VPD is uninitialized or empty.

  430 13:48:32.465378  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  431 13:48:32.472454  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  432 13:48:32.473044  Normal boot.

  433 13:48:32.478758  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  434 13:48:32.482634  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  435 13:48:32.485367  CBFS @ c08000 size 3f8000

  436 13:48:32.492818  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  437 13:48:32.495921  CBFS: Locating 'cpu_microcode_blob.bin'

  438 13:48:32.498679  CBFS: Found @ offset 14700 size 2ec00

  439 13:48:32.502079  microcode: sig=0x806ec pf=0x4 revision=0xc9

  440 13:48:32.505448  Skip microcode update

  441 13:48:32.512295  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 13:48:32.512879  CBFS @ c08000 size 3f8000

  443 13:48:32.518966  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 13:48:32.522358  CBFS: Locating 'fsps.bin'

  445 13:48:32.525189  CBFS: Found @ offset d1fc0 size 35000

  446 13:48:32.550855  Detected 4 core, 8 thread CPU.

  447 13:48:32.553716  Setting up SMI for CPU

  448 13:48:32.557308  IED base = 0x9ac00000

  449 13:48:32.557785  IED size = 0x00400000

  450 13:48:32.561437  Will perform SMM setup.

  451 13:48:32.566976  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  452 13:48:32.574108  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  453 13:48:32.577319  Processing 16 relocs. Offset value of 0x00030000

  454 13:48:32.580779  Attempting to start 7 APs

  455 13:48:32.583948  Waiting for 10ms after sending INIT.

  456 13:48:32.600605  Waiting for 1st SIPI to complete...done.

  457 13:48:32.601181  AP: slot 2 apic_id 1.

  458 13:48:32.607026  Waiting for 2nd SIPI to complete...done.

  459 13:48:32.607598  AP: slot 6 apic_id 5.

  460 13:48:32.610459  AP: slot 7 apic_id 4.

  461 13:48:32.613739  AP: slot 3 apic_id 7.

  462 13:48:32.614307  AP: slot 5 apic_id 6.

  463 13:48:32.617066  AP: slot 1 apic_id 2.

  464 13:48:32.620472  AP: slot 4 apic_id 3.

  465 13:48:32.627330  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  466 13:48:32.633967  Processing 13 relocs. Offset value of 0x00038000

  467 13:48:32.636745  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  468 13:48:32.643432  Installing SMM handler to 0x9a000000

  469 13:48:32.649957  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  470 13:48:32.656731  Processing 658 relocs. Offset value of 0x9a010000

  471 13:48:32.663248  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  472 13:48:32.666470  Processing 13 relocs. Offset value of 0x9a008000

  473 13:48:32.673118  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  474 13:48:32.680417  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  475 13:48:32.686131  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  476 13:48:32.689663  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  477 13:48:32.696570  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  478 13:48:32.702944  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  479 13:48:32.706527  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  480 13:48:32.712765  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  481 13:48:32.716536  Clearing SMI status registers

  482 13:48:32.720119  SMI_STS: PM1 

  483 13:48:32.720696  PM1_STS: PWRBTN 

  484 13:48:32.723046  TCO_STS: SECOND_TO 

  485 13:48:32.726764  New SMBASE 0x9a000000

  486 13:48:32.730060  In relocation handler: CPU 0

  487 13:48:32.733084  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  488 13:48:32.736791  Writing SMRR. base = 0x9a000006, mask=0xff000800

  489 13:48:32.740100  Relocation complete.

  490 13:48:32.742689  New SMBASE 0x99fff800

  491 13:48:32.746334  In relocation handler: CPU 2

  492 13:48:32.750237  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  493 13:48:32.754443  Writing SMRR. base = 0x9a000006, mask=0xff000800

  494 13:48:32.756474  Relocation complete.

  495 13:48:32.759757  New SMBASE 0x99fff400

  496 13:48:32.760382  In relocation handler: CPU 3

  497 13:48:32.766023  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  498 13:48:32.769562  Writing SMRR. base = 0x9a000006, mask=0xff000800

  499 13:48:32.773221  Relocation complete.

  500 13:48:32.776123  New SMBASE 0x99ffec00

  501 13:48:32.776603  In relocation handler: CPU 5

  502 13:48:32.782542  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  503 13:48:32.786436  Writing SMRR. base = 0x9a000006, mask=0xff000800

  504 13:48:32.789221  Relocation complete.

  505 13:48:32.789693  New SMBASE 0x99ffe800

  506 13:48:32.792432  In relocation handler: CPU 6

  507 13:48:32.799308  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  508 13:48:32.802524  Writing SMRR. base = 0x9a000006, mask=0xff000800

  509 13:48:32.806081  Relocation complete.

  510 13:48:32.806647  New SMBASE 0x99ffe400

  511 13:48:32.809897  In relocation handler: CPU 7

  512 13:48:32.815899  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  513 13:48:32.819234  Writing SMRR. base = 0x9a000006, mask=0xff000800

  514 13:48:32.822567  Relocation complete.

  515 13:48:32.823134  New SMBASE 0x99fff000

  516 13:48:32.825874  In relocation handler: CPU 4

  517 13:48:32.829654  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  518 13:48:32.835719  Writing SMRR. base = 0x9a000006, mask=0xff000800

  519 13:48:32.839196  Relocation complete.

  520 13:48:32.839764  New SMBASE 0x99fffc00

  521 13:48:32.842556  In relocation handler: CPU 1

  522 13:48:32.845609  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  523 13:48:32.852523  Writing SMRR. base = 0x9a000006, mask=0xff000800

  524 13:48:32.855285  Relocation complete.

  525 13:48:32.855881  Initializing CPU #0

  526 13:48:32.858484  CPU: vendor Intel device 806ec

  527 13:48:32.861902  CPU: family 06, model 8e, stepping 0c

  528 13:48:32.865745  Clearing out pending MCEs

  529 13:48:32.868676  Setting up local APIC...

  530 13:48:32.872002   apic_id: 0x00 done.

  531 13:48:32.872572  Turbo is available but hidden

  532 13:48:32.875419  Turbo is available and visible

  533 13:48:32.878801  VMX status: enabled

  534 13:48:32.882053  IA32_FEATURE_CONTROL status: locked

  535 13:48:32.885810  Skip microcode update

  536 13:48:32.886378  CPU #0 initialized

  537 13:48:32.888526  Initializing CPU #2

  538 13:48:32.892270  Initializing CPU #1

  539 13:48:32.892838  Initializing CPU #4

  540 13:48:32.895407  CPU: vendor Intel device 806ec

  541 13:48:32.898528  CPU: family 06, model 8e, stepping 0c

  542 13:48:32.901707  CPU: vendor Intel device 806ec

  543 13:48:32.905195  CPU: family 06, model 8e, stepping 0c

  544 13:48:32.908552  Clearing out pending MCEs

  545 13:48:32.912371  Clearing out pending MCEs

  546 13:48:32.915145  Setting up local APIC...

  547 13:48:32.915618  Initializing CPU #6

  548 13:48:32.918238  Initializing CPU #7

  549 13:48:32.921845  CPU: vendor Intel device 806ec

  550 13:48:32.925073  CPU: family 06, model 8e, stepping 0c

  551 13:48:32.928180  CPU: vendor Intel device 806ec

  552 13:48:32.932205  CPU: family 06, model 8e, stepping 0c

  553 13:48:32.935472  Clearing out pending MCEs

  554 13:48:32.938553  Clearing out pending MCEs

  555 13:48:32.941772  Setting up local APIC...

  556 13:48:32.942249  Setting up local APIC...

  557 13:48:32.944784  Setting up local APIC...

  558 13:48:32.948530   apic_id: 0x03 done.

  559 13:48:32.949098   apic_id: 0x02 done.

  560 13:48:32.951465  VMX status: enabled

  561 13:48:32.954732  VMX status: enabled

  562 13:48:32.957923  IA32_FEATURE_CONTROL status: locked

  563 13:48:32.961250  IA32_FEATURE_CONTROL status: locked

  564 13:48:32.961773  Skip microcode update

  565 13:48:32.964780  Skip microcode update

  566 13:48:32.967825  CPU #4 initialized

  567 13:48:32.968441  CPU #1 initialized

  568 13:48:32.971461  Initializing CPU #3

  569 13:48:32.974519  Initializing CPU #5

  570 13:48:32.978142  CPU: vendor Intel device 806ec

  571 13:48:32.981371  CPU: family 06, model 8e, stepping 0c

  572 13:48:32.984742  CPU: vendor Intel device 806ec

  573 13:48:32.987779  CPU: family 06, model 8e, stepping 0c

  574 13:48:32.991749  Clearing out pending MCEs

  575 13:48:32.992360  CPU: vendor Intel device 806ec

  576 13:48:32.997766  CPU: family 06, model 8e, stepping 0c

  577 13:48:32.998316  Clearing out pending MCEs

  578 13:48:33.001224  Clearing out pending MCEs

  579 13:48:33.004779  Setting up local APIC...

  580 13:48:33.007723  Setting up local APIC...

  581 13:48:33.008333   apic_id: 0x07 done.

  582 13:48:33.010623  Setting up local APIC...

  583 13:48:33.014475   apic_id: 0x01 done.

  584 13:48:33.015049   apic_id: 0x05 done.

  585 13:48:33.018116   apic_id: 0x04 done.

  586 13:48:33.020871  VMX status: enabled

  587 13:48:33.021424  VMX status: enabled

  588 13:48:33.024101  IA32_FEATURE_CONTROL status: locked

  589 13:48:33.030838  IA32_FEATURE_CONTROL status: locked

  590 13:48:33.031412  Skip microcode update

  591 13:48:33.034064  Skip microcode update

  592 13:48:33.034639  CPU #6 initialized

  593 13:48:33.037781  CPU #7 initialized

  594 13:48:33.040563  VMX status: enabled

  595 13:48:33.041136  VMX status: enabled

  596 13:48:33.044301   apic_id: 0x06 done.

  597 13:48:33.047278  IA32_FEATURE_CONTROL status: locked

  598 13:48:33.050878  VMX status: enabled

  599 13:48:33.051446  Skip microcode update

  600 13:48:33.054343  IA32_FEATURE_CONTROL status: locked

  601 13:48:33.057303  CPU #3 initialized

  602 13:48:33.060775  Skip microcode update

  603 13:48:33.063774  IA32_FEATURE_CONTROL status: locked

  604 13:48:33.064277  CPU #5 initialized

  605 13:48:33.067017  Skip microcode update

  606 13:48:33.070682  CPU #2 initialized

  607 13:48:33.073680  bsp_do_flight_plan done after 466 msecs.

  608 13:48:33.077551  CPU: frequency set to 4200 MHz

  609 13:48:33.078124  Enabling SMIs.

  610 13:48:33.080197  Locking SMM.

  611 13:48:33.094723  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  612 13:48:33.097631  CBFS @ c08000 size 3f8000

  613 13:48:33.104708  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  614 13:48:33.105283  CBFS: Locating 'vbt.bin'

  615 13:48:33.107469  CBFS: Found @ offset 5f5c0 size 499

  616 13:48:33.114352  Found a VBT of 4608 bytes after decompression

  617 13:48:33.299519  Display FSP Version Info HOB

  618 13:48:33.303011  Reference Code - CPU = 9.0.1e.30

  619 13:48:33.306201  uCode Version = 0.0.0.ca

  620 13:48:33.309845  TXT ACM version = ff.ff.ff.ffff

  621 13:48:33.312780  Display FSP Version Info HOB

  622 13:48:33.316553  Reference Code - ME = 9.0.1e.30

  623 13:48:33.319250  MEBx version = 0.0.0.0

  624 13:48:33.322678  ME Firmware Version = Consumer SKU

  625 13:48:33.325708  Display FSP Version Info HOB

  626 13:48:33.329181  Reference Code - CML PCH = 9.0.1e.30

  627 13:48:33.333018  PCH-CRID Status = Disabled

  628 13:48:33.336364  PCH-CRID Original Value = ff.ff.ff.ffff

  629 13:48:33.339267  PCH-CRID New Value = ff.ff.ff.ffff

  630 13:48:33.342340  OPROM - RST - RAID = ff.ff.ff.ffff

  631 13:48:33.345940  ChipsetInit Base Version = ff.ff.ff.ffff

  632 13:48:33.349557  ChipsetInit Oem Version = ff.ff.ff.ffff

  633 13:48:33.352392  Display FSP Version Info HOB

  634 13:48:33.358903  Reference Code - SA - System Agent = 9.0.1e.30

  635 13:48:33.362439  Reference Code - MRC = 0.7.1.6c

  636 13:48:33.363011  SA - PCIe Version = 9.0.1e.30

  637 13:48:33.365432  SA-CRID Status = Disabled

  638 13:48:33.369066  SA-CRID Original Value = 0.0.0.c

  639 13:48:33.372930  SA-CRID New Value = 0.0.0.c

  640 13:48:33.375584  OPROM - VBIOS = ff.ff.ff.ffff

  641 13:48:33.379415  RTC Init

  642 13:48:33.381990  Set power on after power failure.

  643 13:48:33.382459  Disabling Deep S3

  644 13:48:33.385303  Disabling Deep S3

  645 13:48:33.385770  Disabling Deep S4

  646 13:48:33.389112  Disabling Deep S4

  647 13:48:33.389737  Disabling Deep S5

  648 13:48:33.392044  Disabling Deep S5

  649 13:48:33.398828  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1

  650 13:48:33.399385  Enumerating buses...

  651 13:48:33.405438  Show all devs... Before device enumeration.

  652 13:48:33.406015  Root Device: enabled 1

  653 13:48:33.408726  CPU_CLUSTER: 0: enabled 1

  654 13:48:33.412379  DOMAIN: 0000: enabled 1

  655 13:48:33.415717  APIC: 00: enabled 1

  656 13:48:33.416231  PCI: 00:00.0: enabled 1

  657 13:48:33.418836  PCI: 00:02.0: enabled 1

  658 13:48:33.422392  PCI: 00:04.0: enabled 0

  659 13:48:33.425389  PCI: 00:05.0: enabled 0

  660 13:48:33.425961  PCI: 00:12.0: enabled 1

  661 13:48:33.428738  PCI: 00:12.5: enabled 0

  662 13:48:33.432102  PCI: 00:12.6: enabled 0

  663 13:48:33.432673  PCI: 00:14.0: enabled 1

  664 13:48:33.436510  PCI: 00:14.1: enabled 0

  665 13:48:33.439250  PCI: 00:14.3: enabled 1

  666 13:48:33.442543  PCI: 00:14.5: enabled 0

  667 13:48:33.443016  PCI: 00:15.0: enabled 1

  668 13:48:33.445105  PCI: 00:15.1: enabled 1

  669 13:48:33.448202  PCI: 00:15.2: enabled 0

  670 13:48:33.451558  PCI: 00:15.3: enabled 0

  671 13:48:33.452060  PCI: 00:16.0: enabled 1

  672 13:48:33.454946  PCI: 00:16.1: enabled 0

  673 13:48:33.459024  PCI: 00:16.2: enabled 0

  674 13:48:33.461770  PCI: 00:16.3: enabled 0

  675 13:48:33.462354  PCI: 00:16.4: enabled 0

  676 13:48:33.464747  PCI: 00:16.5: enabled 0

  677 13:48:33.468377  PCI: 00:17.0: enabled 1

  678 13:48:33.472011  PCI: 00:19.0: enabled 1

  679 13:48:33.472580  PCI: 00:19.1: enabled 0

  680 13:48:33.474942  PCI: 00:19.2: enabled 0

  681 13:48:33.478333  PCI: 00:1a.0: enabled 0

  682 13:48:33.478913  PCI: 00:1c.0: enabled 0

  683 13:48:33.482241  PCI: 00:1c.1: enabled 0

  684 13:48:33.484833  PCI: 00:1c.2: enabled 0

  685 13:48:33.488064  PCI: 00:1c.3: enabled 0

  686 13:48:33.488530  PCI: 00:1c.4: enabled 0

  687 13:48:33.492089  PCI: 00:1c.5: enabled 0

  688 13:48:33.495472  PCI: 00:1c.6: enabled 0

  689 13:48:33.498650  PCI: 00:1c.7: enabled 0

  690 13:48:33.499218  PCI: 00:1d.0: enabled 1

  691 13:48:33.501622  PCI: 00:1d.1: enabled 0

  692 13:48:33.504779  PCI: 00:1d.2: enabled 0

  693 13:48:33.505252  PCI: 00:1d.3: enabled 0

  694 13:48:33.508165  PCI: 00:1d.4: enabled 0

  695 13:48:33.512393  PCI: 00:1d.5: enabled 1

  696 13:48:33.514927  PCI: 00:1e.0: enabled 1

  697 13:48:33.515565  PCI: 00:1e.1: enabled 0

  698 13:48:33.518475  PCI: 00:1e.2: enabled 1

  699 13:48:33.521558  PCI: 00:1e.3: enabled 1

  700 13:48:33.524891  PCI: 00:1f.0: enabled 1

  701 13:48:33.525465  PCI: 00:1f.1: enabled 1

  702 13:48:33.528121  PCI: 00:1f.2: enabled 1

  703 13:48:33.531767  PCI: 00:1f.3: enabled 1

  704 13:48:33.535163  PCI: 00:1f.4: enabled 1

  705 13:48:33.535730  PCI: 00:1f.5: enabled 1

  706 13:48:33.537988  PCI: 00:1f.6: enabled 0

  707 13:48:33.541693  USB0 port 0: enabled 1

  708 13:48:33.542265  I2C: 00:15: enabled 1

  709 13:48:33.544684  I2C: 00:5d: enabled 1

  710 13:48:33.548176  GENERIC: 0.0: enabled 1

  711 13:48:33.548672  I2C: 00:1a: enabled 1

  712 13:48:33.551255  I2C: 00:38: enabled 1

  713 13:48:33.554808  I2C: 00:39: enabled 1

  714 13:48:33.555403  I2C: 00:3a: enabled 1

  715 13:48:33.557931  I2C: 00:3b: enabled 1

  716 13:48:33.561458  PCI: 00:00.0: enabled 1

  717 13:48:33.562031  SPI: 00: enabled 1

  718 13:48:33.564968  SPI: 01: enabled 1

  719 13:48:33.567940  PNP: 0c09.0: enabled 1

  720 13:48:33.568426  USB2 port 0: enabled 1

  721 13:48:33.571954  USB2 port 1: enabled 1

  722 13:48:33.575097  USB2 port 2: enabled 0

  723 13:48:33.578551  USB2 port 3: enabled 0

  724 13:48:33.579120  USB2 port 5: enabled 0

  725 13:48:33.581561  USB2 port 6: enabled 1

  726 13:48:33.584668  USB2 port 9: enabled 1

  727 13:48:33.585135  USB3 port 0: enabled 1

  728 13:48:33.587979  USB3 port 1: enabled 1

  729 13:48:33.591586  USB3 port 2: enabled 1

  730 13:48:33.592209  USB3 port 3: enabled 1

  731 13:48:33.594691  USB3 port 4: enabled 0

  732 13:48:33.598024  APIC: 02: enabled 1

  733 13:48:33.598678  APIC: 01: enabled 1

  734 13:48:33.601362  APIC: 07: enabled 1

  735 13:48:33.604490  APIC: 03: enabled 1

  736 13:48:33.604958  APIC: 06: enabled 1

  737 13:48:33.608581  APIC: 05: enabled 1

  738 13:48:33.609158  APIC: 04: enabled 1

  739 13:48:33.611298  Compare with tree...

  740 13:48:33.614460  Root Device: enabled 1

  741 13:48:33.618031   CPU_CLUSTER: 0: enabled 1

  742 13:48:33.618595    APIC: 00: enabled 1

  743 13:48:33.621382    APIC: 02: enabled 1

  744 13:48:33.624775    APIC: 01: enabled 1

  745 13:48:33.625346    APIC: 07: enabled 1

  746 13:48:33.628111    APIC: 03: enabled 1

  747 13:48:33.631398    APIC: 06: enabled 1

  748 13:48:33.632008    APIC: 05: enabled 1

  749 13:48:33.634930    APIC: 04: enabled 1

  750 13:48:33.638206   DOMAIN: 0000: enabled 1

  751 13:48:33.640911    PCI: 00:00.0: enabled 1

  752 13:48:33.641382    PCI: 00:02.0: enabled 1

  753 13:48:33.644671    PCI: 00:04.0: enabled 0

  754 13:48:33.647991    PCI: 00:05.0: enabled 0

  755 13:48:33.651396    PCI: 00:12.0: enabled 1

  756 13:48:33.654513    PCI: 00:12.5: enabled 0

  757 13:48:33.655085    PCI: 00:12.6: enabled 0

  758 13:48:33.657935    PCI: 00:14.0: enabled 1

  759 13:48:33.661361     USB0 port 0: enabled 1

  760 13:48:33.664506      USB2 port 0: enabled 1

  761 13:48:33.667484      USB2 port 1: enabled 1

  762 13:48:33.668017      USB2 port 2: enabled 0

  763 13:48:33.671090      USB2 port 3: enabled 0

  764 13:48:33.674474      USB2 port 5: enabled 0

  765 13:48:33.677795      USB2 port 6: enabled 1

  766 13:48:33.681645      USB2 port 9: enabled 1

  767 13:48:33.682220      USB3 port 0: enabled 1

  768 13:48:33.684207      USB3 port 1: enabled 1

  769 13:48:33.687729      USB3 port 2: enabled 1

  770 13:48:33.691182      USB3 port 3: enabled 1

  771 13:48:33.694867      USB3 port 4: enabled 0

  772 13:48:33.697387    PCI: 00:14.1: enabled 0

  773 13:48:33.697854    PCI: 00:14.3: enabled 1

  774 13:48:33.701033    PCI: 00:14.5: enabled 0

  775 13:48:33.704132    PCI: 00:15.0: enabled 1

  776 13:48:33.708413     I2C: 00:15: enabled 1

  777 13:48:33.708989    PCI: 00:15.1: enabled 1

  778 13:48:33.711369     I2C: 00:5d: enabled 1

  779 13:48:33.714408     GENERIC: 0.0: enabled 1

  780 13:48:33.717886    PCI: 00:15.2: enabled 0

  781 13:48:33.720704    PCI: 00:15.3: enabled 0

  782 13:48:33.721218    PCI: 00:16.0: enabled 1

  783 13:48:33.724301    PCI: 00:16.1: enabled 0

  784 13:48:33.727546    PCI: 00:16.2: enabled 0

  785 13:48:33.730832    PCI: 00:16.3: enabled 0

  786 13:48:33.734616    PCI: 00:16.4: enabled 0

  787 13:48:33.735194    PCI: 00:16.5: enabled 0

  788 13:48:33.737089    PCI: 00:17.0: enabled 1

  789 13:48:33.740778    PCI: 00:19.0: enabled 1

  790 13:48:33.744409     I2C: 00:1a: enabled 1

  791 13:48:33.746971     I2C: 00:38: enabled 1

  792 13:48:33.747440     I2C: 00:39: enabled 1

  793 13:48:33.751139     I2C: 00:3a: enabled 1

  794 13:48:33.754194     I2C: 00:3b: enabled 1

  795 13:48:33.757229    PCI: 00:19.1: enabled 0

  796 13:48:33.757804    PCI: 00:19.2: enabled 0

  797 13:48:33.760483    PCI: 00:1a.0: enabled 0

  798 13:48:33.764300    PCI: 00:1c.0: enabled 0

  799 13:48:33.767471    PCI: 00:1c.1: enabled 0

  800 13:48:33.770352    PCI: 00:1c.2: enabled 0

  801 13:48:33.770820    PCI: 00:1c.3: enabled 0

  802 13:48:33.773595    PCI: 00:1c.4: enabled 0

  803 13:48:33.776825    PCI: 00:1c.5: enabled 0

  804 13:48:33.780525    PCI: 00:1c.6: enabled 0

  805 13:48:33.783668    PCI: 00:1c.7: enabled 0

  806 13:48:33.784186    PCI: 00:1d.0: enabled 1

  807 13:48:33.787017    PCI: 00:1d.1: enabled 0

  808 13:48:33.790657    PCI: 00:1d.2: enabled 0

  809 13:48:33.793354    PCI: 00:1d.3: enabled 0

  810 13:48:33.796937    PCI: 00:1d.4: enabled 0

  811 13:48:33.797526    PCI: 00:1d.5: enabled 1

  812 13:48:33.800394     PCI: 00:00.0: enabled 1

  813 13:48:33.803697    PCI: 00:1e.0: enabled 1

  814 13:48:33.806814    PCI: 00:1e.1: enabled 0

  815 13:48:33.810504    PCI: 00:1e.2: enabled 1

  816 13:48:33.811237     SPI: 00: enabled 1

  817 13:48:33.813417    PCI: 00:1e.3: enabled 1

  818 13:48:33.816886     SPI: 01: enabled 1

  819 13:48:33.817469    PCI: 00:1f.0: enabled 1

  820 13:48:33.820365     PNP: 0c09.0: enabled 1

  821 13:48:33.823656    PCI: 00:1f.1: enabled 1

  822 13:48:33.826872    PCI: 00:1f.2: enabled 1

  823 13:48:33.830353    PCI: 00:1f.3: enabled 1

  824 13:48:33.830917    PCI: 00:1f.4: enabled 1

  825 13:48:33.833219    PCI: 00:1f.5: enabled 1

  826 13:48:33.836625    PCI: 00:1f.6: enabled 0

  827 13:48:33.840723  Root Device scanning...

  828 13:48:33.843624  scan_static_bus for Root Device

  829 13:48:33.846497  CPU_CLUSTER: 0 enabled

  830 13:48:33.846975  DOMAIN: 0000 enabled

  831 13:48:33.849985  DOMAIN: 0000 scanning...

  832 13:48:33.853620  PCI: pci_scan_bus for bus 00

  833 13:48:33.856507  PCI: 00:00.0 [8086/0000] ops

  834 13:48:33.860261  PCI: 00:00.0 [8086/9b61] enabled

  835 13:48:33.863677  PCI: 00:02.0 [8086/0000] bus ops

  836 13:48:33.866337  PCI: 00:02.0 [8086/9b41] enabled

  837 13:48:33.869530  PCI: 00:04.0 [8086/1903] disabled

  838 13:48:33.873395  PCI: 00:08.0 [8086/1911] enabled

  839 13:48:33.876429  PCI: 00:12.0 [8086/02f9] enabled

  840 13:48:33.879570  PCI: 00:14.0 [8086/0000] bus ops

  841 13:48:33.883045  PCI: 00:14.0 [8086/02ed] enabled

  842 13:48:33.886606  PCI: 00:14.2 [8086/02ef] enabled

  843 13:48:33.890314  PCI: 00:14.3 [8086/02f0] enabled

  844 13:48:33.893362  PCI: 00:15.0 [8086/0000] bus ops

  845 13:48:33.896021  PCI: 00:15.0 [8086/02e8] enabled

  846 13:48:33.900232  PCI: 00:15.1 [8086/0000] bus ops

  847 13:48:33.902809  PCI: 00:15.1 [8086/02e9] enabled

  848 13:48:33.906339  PCI: 00:16.0 [8086/0000] ops

  849 13:48:33.909819  PCI: 00:16.0 [8086/02e0] enabled

  850 13:48:33.913667  PCI: 00:17.0 [8086/0000] ops

  851 13:48:33.916200  PCI: 00:17.0 [8086/02d3] enabled

  852 13:48:33.920426  PCI: 00:19.0 [8086/0000] bus ops

  853 13:48:33.923161  PCI: 00:19.0 [8086/02c5] enabled

  854 13:48:33.927528  PCI: 00:1d.0 [8086/0000] bus ops

  855 13:48:33.929341  PCI: 00:1d.0 [8086/02b0] enabled

  856 13:48:33.933601  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  857 13:48:33.936737  PCI: 00:1e.0 [8086/0000] ops

  858 13:48:33.939585  PCI: 00:1e.0 [8086/02a8] enabled

  859 13:48:33.943278  PCI: 00:1e.2 [8086/0000] bus ops

  860 13:48:33.946456  PCI: 00:1e.2 [8086/02aa] enabled

  861 13:48:33.949754  PCI: 00:1e.3 [8086/0000] bus ops

  862 13:48:33.952694  PCI: 00:1e.3 [8086/02ab] enabled

  863 13:48:33.956490  PCI: 00:1f.0 [8086/0000] bus ops

  864 13:48:33.960060  PCI: 00:1f.0 [8086/0284] enabled

  865 13:48:33.966407  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  866 13:48:33.972637  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  867 13:48:33.976097  PCI: 00:1f.3 [8086/0000] bus ops

  868 13:48:33.979914  PCI: 00:1f.3 [8086/02c8] enabled

  869 13:48:33.982867  PCI: 00:1f.4 [8086/0000] bus ops

  870 13:48:33.985809  PCI: 00:1f.4 [8086/02a3] enabled

  871 13:48:33.989231  PCI: 00:1f.5 [8086/0000] bus ops

  872 13:48:33.992677  PCI: 00:1f.5 [8086/02a4] enabled

  873 13:48:33.995827  PCI: Leftover static devices:

  874 13:48:33.996461  PCI: 00:05.0

  875 13:48:33.996842  PCI: 00:12.5

  876 13:48:33.999173  PCI: 00:12.6

  877 13:48:33.999643  PCI: 00:14.1

  878 13:48:34.002910  PCI: 00:14.5

  879 13:48:34.003487  PCI: 00:15.2

  880 13:48:34.005545  PCI: 00:15.3

  881 13:48:34.006019  PCI: 00:16.1

  882 13:48:34.006416  PCI: 00:16.2

  883 13:48:34.009012  PCI: 00:16.3

  884 13:48:34.009600  PCI: 00:16.4

  885 13:48:34.012304  PCI: 00:16.5

  886 13:48:34.012901  PCI: 00:19.1

  887 13:48:34.013290  PCI: 00:19.2

  888 13:48:34.015622  PCI: 00:1a.0

  889 13:48:34.016134  PCI: 00:1c.0

  890 13:48:34.019699  PCI: 00:1c.1

  891 13:48:34.020331  PCI: 00:1c.2

  892 13:48:34.020722  PCI: 00:1c.3

  893 13:48:34.022509  PCI: 00:1c.4

  894 13:48:34.022982  PCI: 00:1c.5

  895 13:48:34.025718  PCI: 00:1c.6

  896 13:48:34.026301  PCI: 00:1c.7

  897 13:48:34.028620  PCI: 00:1d.1

  898 13:48:34.029095  PCI: 00:1d.2

  899 13:48:34.029472  PCI: 00:1d.3

  900 13:48:34.033108  PCI: 00:1d.4

  901 13:48:34.033690  PCI: 00:1d.5

  902 13:48:34.035360  PCI: 00:1e.1

  903 13:48:34.035832  PCI: 00:1f.1

  904 13:48:34.036266  PCI: 00:1f.2

  905 13:48:34.039088  PCI: 00:1f.6

  906 13:48:34.042552  PCI: Check your devicetree.cb.

  907 13:48:34.045509  PCI: 00:02.0 scanning...

  908 13:48:34.049042  scan_generic_bus for PCI: 00:02.0

  909 13:48:34.052723  scan_generic_bus for PCI: 00:02.0 done

  910 13:48:34.055668  scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs

  911 13:48:34.058736  PCI: 00:14.0 scanning...

  912 13:48:34.062029  scan_static_bus for PCI: 00:14.0

  913 13:48:34.065336  USB0 port 0 enabled

  914 13:48:34.068552  USB0 port 0 scanning...

  915 13:48:34.072056  scan_static_bus for USB0 port 0

  916 13:48:34.072631  USB2 port 0 enabled

  917 13:48:34.075595  USB2 port 1 enabled

  918 13:48:34.078727  USB2 port 2 disabled

  919 13:48:34.079295  USB2 port 3 disabled

  920 13:48:34.082120  USB2 port 5 disabled

  921 13:48:34.085697  USB2 port 6 enabled

  922 13:48:34.086266  USB2 port 9 enabled

  923 13:48:34.088530  USB3 port 0 enabled

  924 13:48:34.089002  USB3 port 1 enabled

  925 13:48:34.092327  USB3 port 2 enabled

  926 13:48:34.095273  USB3 port 3 enabled

  927 13:48:34.095866  USB3 port 4 disabled

  928 13:48:34.098574  USB2 port 0 scanning...

  929 13:48:34.102083  scan_static_bus for USB2 port 0

  930 13:48:34.105139  scan_static_bus for USB2 port 0 done

  931 13:48:34.112202  scan_bus: scanning of bus USB2 port 0 took 9705 usecs

  932 13:48:34.114986  USB2 port 1 scanning...

  933 13:48:34.118789  scan_static_bus for USB2 port 1

  934 13:48:34.121748  scan_static_bus for USB2 port 1 done

  935 13:48:34.125117  scan_bus: scanning of bus USB2 port 1 took 9697 usecs

  936 13:48:34.128121  USB2 port 6 scanning...

  937 13:48:34.131577  scan_static_bus for USB2 port 6

  938 13:48:34.134902  scan_static_bus for USB2 port 6 done

  939 13:48:34.141539  scan_bus: scanning of bus USB2 port 6 took 9706 usecs

  940 13:48:34.145063  USB2 port 9 scanning...

  941 13:48:34.147896  scan_static_bus for USB2 port 9

  942 13:48:34.151996  scan_static_bus for USB2 port 9 done

  943 13:48:34.155156  scan_bus: scanning of bus USB2 port 9 took 9697 usecs

  944 13:48:34.158009  USB3 port 0 scanning...

  945 13:48:34.162230  scan_static_bus for USB3 port 0

  946 13:48:34.165054  scan_static_bus for USB3 port 0 done

  947 13:48:34.172078  scan_bus: scanning of bus USB3 port 0 took 9706 usecs

  948 13:48:34.175181  USB3 port 1 scanning...

  949 13:48:34.178046  scan_static_bus for USB3 port 1

  950 13:48:34.181503  scan_static_bus for USB3 port 1 done

  951 13:48:34.184550  scan_bus: scanning of bus USB3 port 1 took 9704 usecs

  952 13:48:34.188068  USB3 port 2 scanning...

  953 13:48:34.191946  scan_static_bus for USB3 port 2

  954 13:48:34.195041  scan_static_bus for USB3 port 2 done

  955 13:48:34.201286  scan_bus: scanning of bus USB3 port 2 took 9705 usecs

  956 13:48:34.204899  USB3 port 3 scanning...

  957 13:48:34.207976  scan_static_bus for USB3 port 3

  958 13:48:34.211222  scan_static_bus for USB3 port 3 done

  959 13:48:34.214618  scan_bus: scanning of bus USB3 port 3 took 9696 usecs

  960 13:48:34.221072  scan_static_bus for USB0 port 0 done

  961 13:48:34.225008  scan_bus: scanning of bus USB0 port 0 took 155374 usecs

  962 13:48:34.227789  scan_static_bus for PCI: 00:14.0 done

  963 13:48:34.234780  scan_bus: scanning of bus PCI: 00:14.0 took 172993 usecs

  964 13:48:34.237700  PCI: 00:15.0 scanning...

  965 13:48:34.241561  scan_generic_bus for PCI: 00:15.0

  966 13:48:34.244737  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  967 13:48:34.248046  scan_generic_bus for PCI: 00:15.0 done

  968 13:48:34.254405  scan_bus: scanning of bus PCI: 00:15.0 took 14298 usecs

  969 13:48:34.257679  PCI: 00:15.1 scanning...

  970 13:48:34.260825  scan_generic_bus for PCI: 00:15.1

  971 13:48:34.264584  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

  972 13:48:34.267631  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

  973 13:48:34.274757  scan_generic_bus for PCI: 00:15.1 done

  974 13:48:34.277555  scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs

  975 13:48:34.281193  PCI: 00:19.0 scanning...

  976 13:48:34.284707  scan_generic_bus for PCI: 00:19.0

  977 13:48:34.287626  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

  978 13:48:34.294317  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

  979 13:48:34.297640  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

  980 13:48:34.301284  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

  981 13:48:34.304665  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

  982 13:48:34.310743  scan_generic_bus for PCI: 00:19.0 done

  983 13:48:34.314353  scan_bus: scanning of bus PCI: 00:19.0 took 30724 usecs

  984 13:48:34.317049  PCI: 00:1d.0 scanning...

  985 13:48:34.321151  do_pci_scan_bridge for PCI: 00:1d.0

  986 13:48:34.325580  PCI: pci_scan_bus for bus 01

  987 13:48:34.327404  PCI: 01:00.0 [1c5c/1327] enabled

  988 13:48:34.330939  Enabling Common Clock Configuration

  989 13:48:34.333922  L1 Sub-State supported from root port 29

  990 13:48:34.337376  L1 Sub-State Support = 0xf

  991 13:48:34.340774  CommonModeRestoreTime = 0x28

  992 13:48:34.343927  Power On Value = 0x16, Power On Scale = 0x0

  993 13:48:34.347386  ASPM: Enabled L1

  994 13:48:34.353876  scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs

  995 13:48:34.354450  PCI: 00:1e.2 scanning...

  996 13:48:34.361105  scan_generic_bus for PCI: 00:1e.2

  997 13:48:34.363925  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

  998 13:48:34.367081  scan_generic_bus for PCI: 00:1e.2 done

  999 13:48:34.373696  scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs

 1000 13:48:34.374272  PCI: 00:1e.3 scanning...

 1001 13:48:34.377361  scan_generic_bus for PCI: 00:1e.3

 1002 13:48:34.384174  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1003 13:48:34.387111  scan_generic_bus for PCI: 00:1e.3 done

 1004 13:48:34.390201  scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs

 1005 13:48:34.393754  PCI: 00:1f.0 scanning...

 1006 13:48:34.397283  scan_static_bus for PCI: 00:1f.0

 1007 13:48:34.400281  PNP: 0c09.0 enabled

 1008 13:48:34.403752  scan_static_bus for PCI: 00:1f.0 done

 1009 13:48:34.410705  scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs

 1010 13:48:34.411280  PCI: 00:1f.3 scanning...

 1011 13:48:34.417442  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs

 1012 13:48:34.420537  PCI: 00:1f.4 scanning...

 1013 13:48:34.423979  scan_generic_bus for PCI: 00:1f.4

 1014 13:48:34.427479  scan_generic_bus for PCI: 00:1f.4 done

 1015 13:48:34.434342  scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs

 1016 13:48:34.436843  PCI: 00:1f.5 scanning...

 1017 13:48:34.440721  scan_generic_bus for PCI: 00:1f.5

 1018 13:48:34.443625  scan_generic_bus for PCI: 00:1f.5 done

 1019 13:48:34.450177  scan_bus: scanning of bus PCI: 00:1f.5 took 10184 usecs

 1020 13:48:34.453990  scan_bus: scanning of bus DOMAIN: 0000 took 605009 usecs

 1021 13:48:34.457299  scan_static_bus for Root Device done

 1022 13:48:34.464109  scan_bus: scanning of bus Root Device took 624887 usecs

 1023 13:48:34.464581  done

 1024 13:48:34.466762  Chrome EC: UHEPI supported

 1025 13:48:34.474214  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1026 13:48:34.480223  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1027 13:48:34.486953  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1028 13:48:34.493422  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1029 13:48:34.496757  SPI flash protection: WPSW=0 SRP0=0

 1030 13:48:34.499706  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1031 13:48:34.506479  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1032 13:48:34.509765  found VGA at PCI: 00:02.0

 1033 13:48:34.513260  Setting up VGA for PCI: 00:02.0

 1034 13:48:34.516347  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1035 13:48:34.523382  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1036 13:48:34.526091  Allocating resources...

 1037 13:48:34.526651  Reading resources...

 1038 13:48:34.532442  Root Device read_resources bus 0 link: 0

 1039 13:48:34.536480  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1040 13:48:34.542865  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1041 13:48:34.546122  DOMAIN: 0000 read_resources bus 0 link: 0

 1042 13:48:34.552682  PCI: 00:14.0 read_resources bus 0 link: 0

 1043 13:48:34.555818  USB0 port 0 read_resources bus 0 link: 0

 1044 13:48:34.563682  USB0 port 0 read_resources bus 0 link: 0 done

 1045 13:48:34.566977  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1046 13:48:34.575415  PCI: 00:15.0 read_resources bus 1 link: 0

 1047 13:48:34.578382  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1048 13:48:34.585190  PCI: 00:15.1 read_resources bus 2 link: 0

 1049 13:48:34.587587  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1050 13:48:34.595819  PCI: 00:19.0 read_resources bus 3 link: 0

 1051 13:48:34.602070  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1052 13:48:34.606221  PCI: 00:1d.0 read_resources bus 1 link: 0

 1053 13:48:34.612263  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1054 13:48:34.615357  PCI: 00:1e.2 read_resources bus 4 link: 0

 1055 13:48:34.622513  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1056 13:48:34.625438  PCI: 00:1e.3 read_resources bus 5 link: 0

 1057 13:48:34.631565  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1058 13:48:34.635149  PCI: 00:1f.0 read_resources bus 0 link: 0

 1059 13:48:34.642134  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1060 13:48:34.648442  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1061 13:48:34.652543  Root Device read_resources bus 0 link: 0 done

 1062 13:48:34.655446  Done reading resources.

 1063 13:48:34.658415  Show resources in subtree (Root Device)...After reading.

 1064 13:48:34.664694   Root Device child on link 0 CPU_CLUSTER: 0

 1065 13:48:34.668241    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1066 13:48:34.668800     APIC: 00

 1067 13:48:34.672205     APIC: 02

 1068 13:48:34.672675     APIC: 01

 1069 13:48:34.675238     APIC: 07

 1070 13:48:34.675705     APIC: 03

 1071 13:48:34.676130     APIC: 06

 1072 13:48:34.678183     APIC: 05

 1073 13:48:34.678649     APIC: 04

 1074 13:48:34.681271    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1075 13:48:34.735387    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1076 13:48:34.736396    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1077 13:48:34.736864     PCI: 00:00.0

 1078 13:48:34.737432     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1079 13:48:34.737883     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1080 13:48:34.738444     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1081 13:48:34.772856     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1082 13:48:34.773847     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1083 13:48:34.774368     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1084 13:48:34.775053     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1085 13:48:34.778262     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1086 13:48:34.788185     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1087 13:48:34.798020     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1088 13:48:34.804751     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1089 13:48:34.814521     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1090 13:48:34.824802     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1091 13:48:34.834526     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1092 13:48:34.844692     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1093 13:48:34.854589     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1094 13:48:34.855158     PCI: 00:02.0

 1095 13:48:34.864179     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1096 13:48:34.877617     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1097 13:48:34.883905     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1098 13:48:34.887337     PCI: 00:04.0

 1099 13:48:34.887798     PCI: 00:08.0

 1100 13:48:34.897194     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1101 13:48:34.900742     PCI: 00:12.0

 1102 13:48:34.910627     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1103 13:48:34.914079     PCI: 00:14.0 child on link 0 USB0 port 0

 1104 13:48:34.923673     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1105 13:48:34.927379      USB0 port 0 child on link 0 USB2 port 0

 1106 13:48:34.930326       USB2 port 0

 1107 13:48:34.930895       USB2 port 1

 1108 13:48:34.933785       USB2 port 2

 1109 13:48:34.934353       USB2 port 3

 1110 13:48:34.937154       USB2 port 5

 1111 13:48:34.937726       USB2 port 6

 1112 13:48:34.940492       USB2 port 9

 1113 13:48:34.941065       USB3 port 0

 1114 13:48:34.943470       USB3 port 1

 1115 13:48:34.943973       USB3 port 2

 1116 13:48:34.946709       USB3 port 3

 1117 13:48:34.950484       USB3 port 4

 1118 13:48:34.951055     PCI: 00:14.2

 1119 13:48:34.960171     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1120 13:48:34.970392     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1121 13:48:34.973667     PCI: 00:14.3

 1122 13:48:34.983291     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1123 13:48:34.986733     PCI: 00:15.0 child on link 0 I2C: 01:15

 1124 13:48:34.996764     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1125 13:48:34.997239      I2C: 01:15

 1126 13:48:35.004137     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1127 13:48:35.013474     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1128 13:48:35.014048      I2C: 02:5d

 1129 13:48:35.016729      GENERIC: 0.0

 1130 13:48:35.017303     PCI: 00:16.0

 1131 13:48:35.026729     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1132 13:48:35.029828     PCI: 00:17.0

 1133 13:48:35.036770     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1134 13:48:35.046653     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1135 13:48:35.053002     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1136 13:48:35.063465     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1137 13:48:35.073003     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1138 13:48:35.079397     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1139 13:48:35.086173     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1140 13:48:35.096058     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1141 13:48:35.096626      I2C: 03:1a

 1142 13:48:35.097003      I2C: 03:38

 1143 13:48:35.099025      I2C: 03:39

 1144 13:48:35.099493      I2C: 03:3a

 1145 13:48:35.102498      I2C: 03:3b

 1146 13:48:35.106210     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1147 13:48:35.115815     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1148 13:48:35.125759     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1149 13:48:35.135944     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1150 13:48:35.136520      PCI: 01:00.0

 1151 13:48:35.145913      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1152 13:48:35.149091     PCI: 00:1e.0

 1153 13:48:35.159035     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1154 13:48:35.168896     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1155 13:48:35.171789     PCI: 00:1e.2 child on link 0 SPI: 00

 1156 13:48:35.182239     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1157 13:48:35.185173      SPI: 00

 1158 13:48:35.188512     PCI: 00:1e.3 child on link 0 SPI: 01

 1159 13:48:35.198425     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1160 13:48:35.199017      SPI: 01

 1161 13:48:35.201583     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1162 13:48:35.211535     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1163 13:48:35.221819     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1164 13:48:35.222387      PNP: 0c09.0

 1165 13:48:35.231612      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1166 13:48:35.232213     PCI: 00:1f.3

 1167 13:48:35.241973     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1168 13:48:35.251835     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1169 13:48:35.254833     PCI: 00:1f.4

 1170 13:48:35.264712     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1171 13:48:35.274886     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1172 13:48:35.275442     PCI: 00:1f.5

 1173 13:48:35.284890     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1174 13:48:35.291837  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1175 13:48:35.298555  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1176 13:48:35.304346  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1177 13:48:35.308016  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1178 13:48:35.311226  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1179 13:48:35.314479  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1180 13:48:35.317977  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1181 13:48:35.324167  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1182 13:48:35.331039  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1183 13:48:35.341244  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1184 13:48:35.347771  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1185 13:48:35.354304  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1186 13:48:35.357249  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1187 13:48:35.367357  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1188 13:48:35.370499  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1189 13:48:35.377055  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1190 13:48:35.380505  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1191 13:48:35.387198  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1192 13:48:35.390655  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1193 13:48:35.393800  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1194 13:48:35.400511  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1195 13:48:35.403901  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1196 13:48:35.410893  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1197 13:48:35.413520  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1198 13:48:35.420272  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1199 13:48:35.423812  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1200 13:48:35.430219  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1201 13:48:35.433588  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1202 13:48:35.440235  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1203 13:48:35.443116  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1204 13:48:35.450716  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1205 13:48:35.453610  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1206 13:48:35.460178  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1207 13:48:35.462930  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1208 13:48:35.470125  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1209 13:48:35.473285  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1210 13:48:35.477095  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1211 13:48:35.486786  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1212 13:48:35.489552  avoid_fixed_resources: DOMAIN: 0000

 1213 13:48:35.496973  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1214 13:48:35.503159  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1215 13:48:35.509954  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1216 13:48:35.516026  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1217 13:48:35.526182  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1218 13:48:35.532412  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1219 13:48:35.539541  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1220 13:48:35.549435  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1221 13:48:35.555751  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1222 13:48:35.563274  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1223 13:48:35.569040  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1224 13:48:35.579274  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1225 13:48:35.579833  Setting resources...

 1226 13:48:35.586052  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1227 13:48:35.588947  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1228 13:48:35.595587  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1229 13:48:35.598909  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1230 13:48:35.602453  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1231 13:48:35.609204  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1232 13:48:35.615809  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1233 13:48:35.622195  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1234 13:48:35.628698  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1235 13:48:35.635354  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1236 13:48:35.638650  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1237 13:48:35.641977  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1238 13:48:35.648655  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1239 13:48:35.651733  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1240 13:48:35.659711  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1241 13:48:35.661539  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1242 13:48:35.669340  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1243 13:48:35.672101  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1244 13:48:35.678463  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1245 13:48:35.681794  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1246 13:48:35.688129  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1247 13:48:35.691750  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1248 13:48:35.698362  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1249 13:48:35.701973  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1250 13:48:35.708790  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1251 13:48:35.711533  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1252 13:48:35.717945  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1253 13:48:35.721556  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1254 13:48:35.724792  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1255 13:48:35.731434  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1256 13:48:35.734641  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1257 13:48:35.741105  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1258 13:48:35.747695  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1259 13:48:35.754419  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1260 13:48:35.764518  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1261 13:48:35.771380  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1262 13:48:35.774616  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1263 13:48:35.781033  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1264 13:48:35.788124  Root Device assign_resources, bus 0 link: 0

 1265 13:48:35.791831  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1266 13:48:35.801015  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1267 13:48:35.808055  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1268 13:48:35.817885  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1269 13:48:35.824771  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1270 13:48:35.834425  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1271 13:48:35.840835  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1272 13:48:35.844090  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1273 13:48:35.850863  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1274 13:48:35.857953  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1275 13:48:35.867429  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1276 13:48:35.874329  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1277 13:48:35.884142  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1278 13:48:35.888225  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1279 13:48:35.890905  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1280 13:48:35.900912  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1281 13:48:35.904080  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1282 13:48:35.910967  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1283 13:48:35.917759  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1284 13:48:35.927879  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1285 13:48:35.934344  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1286 13:48:35.940782  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1287 13:48:35.951446  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1288 13:48:35.957558  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1289 13:48:35.964220  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1290 13:48:35.973530  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1291 13:48:35.976912  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1292 13:48:35.984557  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1293 13:48:35.991006  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1294 13:48:36.000231  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1295 13:48:36.007633  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1296 13:48:36.014202  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1297 13:48:36.020055  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1298 13:48:36.026527  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1299 13:48:36.033043  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1300 13:48:36.042991  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1301 13:48:36.046829  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1302 13:48:36.052945  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1303 13:48:36.059616  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1304 13:48:36.063286  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1305 13:48:36.069931  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1306 13:48:36.073346  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1307 13:48:36.079682  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1308 13:48:36.082785  LPC: Trying to open IO window from 800 size 1ff

 1309 13:48:36.092771  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1310 13:48:36.099982  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1311 13:48:36.109657  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1312 13:48:36.116104  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1313 13:48:36.123113  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1314 13:48:36.125818  Root Device assign_resources, bus 0 link: 0

 1315 13:48:36.129329  Done setting resources.

 1316 13:48:36.136254  Show resources in subtree (Root Device)...After assigning values.

 1317 13:48:36.139764   Root Device child on link 0 CPU_CLUSTER: 0

 1318 13:48:36.142757    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1319 13:48:36.145886     APIC: 00

 1320 13:48:36.146441     APIC: 02

 1321 13:48:36.149975     APIC: 01

 1322 13:48:36.150530     APIC: 07

 1323 13:48:36.150892     APIC: 03

 1324 13:48:36.153177     APIC: 06

 1325 13:48:36.153731     APIC: 05

 1326 13:48:36.154095     APIC: 04

 1327 13:48:36.158863    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1328 13:48:36.169006    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1329 13:48:36.178971    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1330 13:48:36.182217     PCI: 00:00.0

 1331 13:48:36.192058     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1332 13:48:36.198513     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1333 13:48:36.208202     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1334 13:48:36.218352     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1335 13:48:36.228419     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1336 13:48:36.238240     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1337 13:48:36.244808     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1338 13:48:36.254789     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1339 13:48:36.264785     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1340 13:48:36.274234     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1341 13:48:36.285180     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1342 13:48:36.294453     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1343 13:48:36.301187     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1344 13:48:36.311014     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1345 13:48:36.320724     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1346 13:48:36.330838     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1347 13:48:36.331399     PCI: 00:02.0

 1348 13:48:36.344292     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1349 13:48:36.353626     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1350 13:48:36.363963     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1351 13:48:36.364528     PCI: 00:04.0

 1352 13:48:36.366838     PCI: 00:08.0

 1353 13:48:36.376719     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1354 13:48:36.377308     PCI: 00:12.0

 1355 13:48:36.386898     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1356 13:48:36.393401     PCI: 00:14.0 child on link 0 USB0 port 0

 1357 13:48:36.403396     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1358 13:48:36.406471      USB0 port 0 child on link 0 USB2 port 0

 1359 13:48:36.410489       USB2 port 0

 1360 13:48:36.411052       USB2 port 1

 1361 13:48:36.413116       USB2 port 2

 1362 13:48:36.413674       USB2 port 3

 1363 13:48:36.416767       USB2 port 5

 1364 13:48:36.417331       USB2 port 6

 1365 13:48:36.419768       USB2 port 9

 1366 13:48:36.420380       USB3 port 0

 1367 13:48:36.422978       USB3 port 1

 1368 13:48:36.427016       USB3 port 2

 1369 13:48:36.427580       USB3 port 3

 1370 13:48:36.429814       USB3 port 4

 1371 13:48:36.430370     PCI: 00:14.2

 1372 13:48:36.439928     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1373 13:48:36.449528     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1374 13:48:36.453161     PCI: 00:14.3

 1375 13:48:36.463081     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1376 13:48:36.466544     PCI: 00:15.0 child on link 0 I2C: 01:15

 1377 13:48:36.476091     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1378 13:48:36.479059      I2C: 01:15

 1379 13:48:36.482579     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1380 13:48:36.492468     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1381 13:48:36.495728      I2C: 02:5d

 1382 13:48:36.496314      GENERIC: 0.0

 1383 13:48:36.499314     PCI: 00:16.0

 1384 13:48:36.508946     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1385 13:48:36.509499     PCI: 00:17.0

 1386 13:48:36.519062     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1387 13:48:36.532601     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1388 13:48:36.539101     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1389 13:48:36.548684     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1390 13:48:36.558692     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1391 13:48:36.569520     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1392 13:48:36.571889     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1393 13:48:36.581854     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1394 13:48:36.585183      I2C: 03:1a

 1395 13:48:36.585648      I2C: 03:38

 1396 13:48:36.588694      I2C: 03:39

 1397 13:48:36.589162      I2C: 03:3a

 1398 13:48:36.591565      I2C: 03:3b

 1399 13:48:36.595269     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1400 13:48:36.604643     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1401 13:48:36.614803     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1402 13:48:36.625109     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1403 13:48:36.625681      PCI: 01:00.0

 1404 13:48:36.637905      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1405 13:48:36.638471     PCI: 00:1e.0

 1406 13:48:36.648145     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1407 13:48:36.661168     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1408 13:48:36.664838     PCI: 00:1e.2 child on link 0 SPI: 00

 1409 13:48:36.674461     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1410 13:48:36.675014      SPI: 00

 1411 13:48:36.681719     PCI: 00:1e.3 child on link 0 SPI: 01

 1412 13:48:36.691317     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1413 13:48:36.691919      SPI: 01

 1414 13:48:36.694685     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1415 13:48:36.704325     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1416 13:48:36.714153     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1417 13:48:36.714699      PNP: 0c09.0

 1418 13:48:36.723727      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1419 13:48:36.724312     PCI: 00:1f.3

 1420 13:48:36.733695     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1421 13:48:36.747144     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1422 13:48:36.747708     PCI: 00:1f.4

 1423 13:48:36.757116     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1424 13:48:36.766907     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1425 13:48:36.767487     PCI: 00:1f.5

 1426 13:48:36.780227     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1427 13:48:36.780809  Done allocating resources.

 1428 13:48:36.787994  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1429 13:48:36.790387  Enabling resources...

 1430 13:48:36.793531  PCI: 00:00.0 subsystem <- 8086/9b61

 1431 13:48:36.796520  PCI: 00:00.0 cmd <- 06

 1432 13:48:36.800789  PCI: 00:02.0 subsystem <- 8086/9b41

 1433 13:48:36.803809  PCI: 00:02.0 cmd <- 03

 1434 13:48:36.806846  PCI: 00:08.0 cmd <- 06

 1435 13:48:36.810187  PCI: 00:12.0 subsystem <- 8086/02f9

 1436 13:48:36.813169  PCI: 00:12.0 cmd <- 02

 1437 13:48:36.816264  PCI: 00:14.0 subsystem <- 8086/02ed

 1438 13:48:36.816824  PCI: 00:14.0 cmd <- 02

 1439 13:48:36.820376  PCI: 00:14.2 cmd <- 02

 1440 13:48:36.823122  PCI: 00:14.3 subsystem <- 8086/02f0

 1441 13:48:36.826325  PCI: 00:14.3 cmd <- 02

 1442 13:48:36.829699  PCI: 00:15.0 subsystem <- 8086/02e8

 1443 13:48:36.832955  PCI: 00:15.0 cmd <- 02

 1444 13:48:36.836314  PCI: 00:15.1 subsystem <- 8086/02e9

 1445 13:48:36.839773  PCI: 00:15.1 cmd <- 02

 1446 13:48:36.843524  PCI: 00:16.0 subsystem <- 8086/02e0

 1447 13:48:36.846467  PCI: 00:16.0 cmd <- 02

 1448 13:48:36.849671  PCI: 00:17.0 subsystem <- 8086/02d3

 1449 13:48:36.852825  PCI: 00:17.0 cmd <- 03

 1450 13:48:36.856385  PCI: 00:19.0 subsystem <- 8086/02c5

 1451 13:48:36.859764  PCI: 00:19.0 cmd <- 02

 1452 13:48:36.863152  PCI: 00:1d.0 bridge ctrl <- 0013

 1453 13:48:36.866313  PCI: 00:1d.0 subsystem <- 8086/02b0

 1454 13:48:36.869060  PCI: 00:1d.0 cmd <- 06

 1455 13:48:36.872819  PCI: 00:1e.0 subsystem <- 8086/02a8

 1456 13:48:36.873380  PCI: 00:1e.0 cmd <- 06

 1457 13:48:36.879410  PCI: 00:1e.2 subsystem <- 8086/02aa

 1458 13:48:36.879989  PCI: 00:1e.2 cmd <- 06

 1459 13:48:36.882831  PCI: 00:1e.3 subsystem <- 8086/02ab

 1460 13:48:36.885739  PCI: 00:1e.3 cmd <- 02

 1461 13:48:36.889578  PCI: 00:1f.0 subsystem <- 8086/0284

 1462 13:48:36.892389  PCI: 00:1f.0 cmd <- 407

 1463 13:48:36.895740  PCI: 00:1f.3 subsystem <- 8086/02c8

 1464 13:48:36.899413  PCI: 00:1f.3 cmd <- 02

 1465 13:48:36.902354  PCI: 00:1f.4 subsystem <- 8086/02a3

 1466 13:48:36.906313  PCI: 00:1f.4 cmd <- 03

 1467 13:48:36.909655  PCI: 00:1f.5 subsystem <- 8086/02a4

 1468 13:48:36.912330  PCI: 00:1f.5 cmd <- 406

 1469 13:48:36.920676  PCI: 01:00.0 cmd <- 02

 1470 13:48:36.926280  done.

 1471 13:48:36.940410  ME: Version: 14.0.39.1367

 1472 13:48:36.946227  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13

 1473 13:48:36.949398  Initializing devices...

 1474 13:48:36.949956  Root Device init ...

 1475 13:48:36.955759  Chrome EC: Set SMI mask to 0x0000000000000000

 1476 13:48:36.962346  Chrome EC: clear events_b mask to 0x0000000000000000

 1477 13:48:36.965695  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1478 13:48:36.972815  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1479 13:48:36.978732  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1480 13:48:36.983370  Chrome EC: Set WAKE mask to 0x0000000000000000

 1481 13:48:36.988648  Root Device init finished in 35234 usecs

 1482 13:48:36.989131  CPU_CLUSTER: 0 init ...

 1483 13:48:36.995432  CPU_CLUSTER: 0 init finished in 2450 usecs

 1484 13:48:37.000424  PCI: 00:00.0 init ...

 1485 13:48:37.003747  CPU TDP: 15 Watts

 1486 13:48:37.007418  CPU PL2 = 64 Watts

 1487 13:48:37.010362  PCI: 00:00.0 init finished in 7083 usecs

 1488 13:48:37.013904  PCI: 00:02.0 init ...

 1489 13:48:37.017069  PCI: 00:02.0 init finished in 2255 usecs

 1490 13:48:37.020495  PCI: 00:08.0 init ...

 1491 13:48:37.023558  PCI: 00:08.0 init finished in 2254 usecs

 1492 13:48:37.027180  PCI: 00:12.0 init ...

 1493 13:48:37.030379  PCI: 00:12.0 init finished in 2245 usecs

 1494 13:48:37.033396  PCI: 00:14.0 init ...

 1495 13:48:37.036536  PCI: 00:14.0 init finished in 2252 usecs

 1496 13:48:37.039757  PCI: 00:14.2 init ...

 1497 13:48:37.043483  PCI: 00:14.2 init finished in 2252 usecs

 1498 13:48:37.047003  PCI: 00:14.3 init ...

 1499 13:48:37.049921  PCI: 00:14.3 init finished in 2269 usecs

 1500 13:48:37.053616  PCI: 00:15.0 init ...

 1501 13:48:37.057070  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1502 13:48:37.059928  PCI: 00:15.0 init finished in 5978 usecs

 1503 13:48:37.063298  PCI: 00:15.1 init ...

 1504 13:48:37.066558  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1505 13:48:37.073085  PCI: 00:15.1 init finished in 5979 usecs

 1506 13:48:37.073648  PCI: 00:16.0 init ...

 1507 13:48:37.079625  PCI: 00:16.0 init finished in 2253 usecs

 1508 13:48:37.082656  PCI: 00:19.0 init ...

 1509 13:48:37.086158  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1510 13:48:37.089271  PCI: 00:19.0 init finished in 5978 usecs

 1511 13:48:37.093378  PCI: 00:1d.0 init ...

 1512 13:48:37.096279  Initializing PCH PCIe bridge.

 1513 13:48:37.099311  PCI: 00:1d.0 init finished in 5287 usecs

 1514 13:48:37.103388  PCI: 00:1f.0 init ...

 1515 13:48:37.106329  IOAPIC: Initializing IOAPIC at 0xfec00000

 1516 13:48:37.112864  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1517 13:48:37.113443  IOAPIC: ID = 0x02

 1518 13:48:37.116357  IOAPIC: Dumping registers

 1519 13:48:37.119607    reg 0x0000: 0x02000000

 1520 13:48:37.122728    reg 0x0001: 0x00770020

 1521 13:48:37.123291    reg 0x0002: 0x00000000

 1522 13:48:37.128991  PCI: 00:1f.0 init finished in 23541 usecs

 1523 13:48:37.132654  PCI: 00:1f.4 init ...

 1524 13:48:37.135629  PCI: 00:1f.4 init finished in 2264 usecs

 1525 13:48:37.146583  PCI: 01:00.0 init ...

 1526 13:48:37.149704  PCI: 01:00.0 init finished in 2254 usecs

 1527 13:48:37.154090  PNP: 0c09.0 init ...

 1528 13:48:37.157047  Google Chrome EC uptime: 11.094 seconds

 1529 13:48:37.164056  Google Chrome AP resets since EC boot: 0

 1530 13:48:37.167259  Google Chrome most recent AP reset causes:

 1531 13:48:37.174131  Google Chrome EC reset flags at last EC boot: reset-pin

 1532 13:48:37.177054  PNP: 0c09.0 init finished in 20610 usecs

 1533 13:48:37.180988  Devices initialized

 1534 13:48:37.183628  Show all devs... After init.

 1535 13:48:37.184132  Root Device: enabled 1

 1536 13:48:37.186777  CPU_CLUSTER: 0: enabled 1

 1537 13:48:37.190374  DOMAIN: 0000: enabled 1

 1538 13:48:37.190937  APIC: 00: enabled 1

 1539 13:48:37.193989  PCI: 00:00.0: enabled 1

 1540 13:48:37.196960  PCI: 00:02.0: enabled 1

 1541 13:48:37.200139  PCI: 00:04.0: enabled 0

 1542 13:48:37.200600  PCI: 00:05.0: enabled 0

 1543 13:48:37.203643  PCI: 00:12.0: enabled 1

 1544 13:48:37.207224  PCI: 00:12.5: enabled 0

 1545 13:48:37.210454  PCI: 00:12.6: enabled 0

 1546 13:48:37.211020  PCI: 00:14.0: enabled 1

 1547 13:48:37.213709  PCI: 00:14.1: enabled 0

 1548 13:48:37.217153  PCI: 00:14.3: enabled 1

 1549 13:48:37.217720  PCI: 00:14.5: enabled 0

 1550 13:48:37.220420  PCI: 00:15.0: enabled 1

 1551 13:48:37.223614  PCI: 00:15.1: enabled 1

 1552 13:48:37.226790  PCI: 00:15.2: enabled 0

 1553 13:48:37.227350  PCI: 00:15.3: enabled 0

 1554 13:48:37.230057  PCI: 00:16.0: enabled 1

 1555 13:48:37.234087  PCI: 00:16.1: enabled 0

 1556 13:48:37.236298  PCI: 00:16.2: enabled 0

 1557 13:48:37.236762  PCI: 00:16.3: enabled 0

 1558 13:48:37.240075  PCI: 00:16.4: enabled 0

 1559 13:48:37.243339  PCI: 00:16.5: enabled 0

 1560 13:48:37.246329  PCI: 00:17.0: enabled 1

 1561 13:48:37.246855  PCI: 00:19.0: enabled 1

 1562 13:48:37.250018  PCI: 00:19.1: enabled 0

 1563 13:48:37.253145  PCI: 00:19.2: enabled 0

 1564 13:48:37.256564  PCI: 00:1a.0: enabled 0

 1565 13:48:37.257190  PCI: 00:1c.0: enabled 0

 1566 13:48:37.259723  PCI: 00:1c.1: enabled 0

 1567 13:48:37.262834  PCI: 00:1c.2: enabled 0

 1568 13:48:37.263295  PCI: 00:1c.3: enabled 0

 1569 13:48:37.266211  PCI: 00:1c.4: enabled 0

 1570 13:48:37.270016  PCI: 00:1c.5: enabled 0

 1571 13:48:37.273005  PCI: 00:1c.6: enabled 0

 1572 13:48:37.273568  PCI: 00:1c.7: enabled 0

 1573 13:48:37.276167  PCI: 00:1d.0: enabled 1

 1574 13:48:37.279704  PCI: 00:1d.1: enabled 0

 1575 13:48:37.282859  PCI: 00:1d.2: enabled 0

 1576 13:48:37.283321  PCI: 00:1d.3: enabled 0

 1577 13:48:37.286700  PCI: 00:1d.4: enabled 0

 1578 13:48:37.289893  PCI: 00:1d.5: enabled 0

 1579 13:48:37.292652  PCI: 00:1e.0: enabled 1

 1580 13:48:37.293113  PCI: 00:1e.1: enabled 0

 1581 13:48:37.296828  PCI: 00:1e.2: enabled 1

 1582 13:48:37.299557  PCI: 00:1e.3: enabled 1

 1583 13:48:37.300152  PCI: 00:1f.0: enabled 1

 1584 13:48:37.302816  PCI: 00:1f.1: enabled 0

 1585 13:48:37.306387  PCI: 00:1f.2: enabled 0

 1586 13:48:37.309569  PCI: 00:1f.3: enabled 1

 1587 13:48:37.310133  PCI: 00:1f.4: enabled 1

 1588 13:48:37.312971  PCI: 00:1f.5: enabled 1

 1589 13:48:37.316479  PCI: 00:1f.6: enabled 0

 1590 13:48:37.319534  USB0 port 0: enabled 1

 1591 13:48:37.320145  I2C: 01:15: enabled 1

 1592 13:48:37.322743  I2C: 02:5d: enabled 1

 1593 13:48:37.326286  GENERIC: 0.0: enabled 1

 1594 13:48:37.326855  I2C: 03:1a: enabled 1

 1595 13:48:37.329393  I2C: 03:38: enabled 1

 1596 13:48:37.333105  I2C: 03:39: enabled 1

 1597 13:48:37.333670  I2C: 03:3a: enabled 1

 1598 13:48:37.335875  I2C: 03:3b: enabled 1

 1599 13:48:37.338953  PCI: 00:00.0: enabled 1

 1600 13:48:37.339417  SPI: 00: enabled 1

 1601 13:48:37.342839  SPI: 01: enabled 1

 1602 13:48:37.346205  PNP: 0c09.0: enabled 1

 1603 13:48:37.346772  USB2 port 0: enabled 1

 1604 13:48:37.349120  USB2 port 1: enabled 1

 1605 13:48:37.352670  USB2 port 2: enabled 0

 1606 13:48:37.355452  USB2 port 3: enabled 0

 1607 13:48:37.355952  USB2 port 5: enabled 0

 1608 13:48:37.359771  USB2 port 6: enabled 1

 1609 13:48:37.362610  USB2 port 9: enabled 1

 1610 13:48:37.363167  USB3 port 0: enabled 1

 1611 13:48:37.365749  USB3 port 1: enabled 1

 1612 13:48:37.368795  USB3 port 2: enabled 1

 1613 13:48:37.369277  USB3 port 3: enabled 1

 1614 13:48:37.372236  USB3 port 4: enabled 0

 1615 13:48:37.375439  APIC: 02: enabled 1

 1616 13:48:37.375941  APIC: 01: enabled 1

 1617 13:48:37.378891  APIC: 07: enabled 1

 1618 13:48:37.383199  APIC: 03: enabled 1

 1619 13:48:37.383776  APIC: 06: enabled 1

 1620 13:48:37.385409  APIC: 05: enabled 1

 1621 13:48:37.385902  APIC: 04: enabled 1

 1622 13:48:37.389325  PCI: 00:08.0: enabled 1

 1623 13:48:37.392350  PCI: 00:14.2: enabled 1

 1624 13:48:37.395319  PCI: 01:00.0: enabled 1

 1625 13:48:37.399378  Disabling ACPI via APMC:

 1626 13:48:37.402223  done.

 1627 13:48:37.405791  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1628 13:48:37.409017  ELOG: NV offset 0xaf0000 size 0x4000

 1629 13:48:37.416250  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1630 13:48:37.422739  ELOG: Event(17) added with size 13 at 2023-06-07 13:48:36 UTC

 1631 13:48:37.429309  ELOG: Event(92) added with size 9 at 2023-06-07 13:48:36 UTC

 1632 13:48:37.436250  ELOG: Event(93) added with size 9 at 2023-06-07 13:48:36 UTC

 1633 13:48:37.442335  ELOG: Event(9A) added with size 9 at 2023-06-07 13:48:36 UTC

 1634 13:48:37.449573  ELOG: Event(9E) added with size 10 at 2023-06-07 13:48:36 UTC

 1635 13:48:37.455838  ELOG: Event(9F) added with size 14 at 2023-06-07 13:48:36 UTC

 1636 13:48:37.458566  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1637 13:48:37.466207  ELOG: Event(A1) added with size 10 at 2023-06-07 13:48:36 UTC

 1638 13:48:37.476200  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1639 13:48:37.482555  ELOG: Event(A0) added with size 9 at 2023-06-07 13:48:36 UTC

 1640 13:48:37.485816  elog_add_boot_reason: Logged dev mode boot

 1641 13:48:37.489249  Finalize devices...

 1642 13:48:37.489711  PCI: 00:17.0 final

 1643 13:48:37.492672  Devices finalized

 1644 13:48:37.496044  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1645 13:48:37.502780  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1646 13:48:37.506165  ME: HFSTS1                  : 0x90000245

 1647 13:48:37.509659  ME: HFSTS2                  : 0x3B850126

 1648 13:48:37.516256  ME: HFSTS3                  : 0x00000020

 1649 13:48:37.518956  ME: HFSTS4                  : 0x00004800

 1650 13:48:37.522501  ME: HFSTS5                  : 0x00000000

 1651 13:48:37.525423  ME: HFSTS6                  : 0x40400006

 1652 13:48:37.528665  ME: Manufacturing Mode      : NO

 1653 13:48:37.532243  ME: FW Partition Table      : OK

 1654 13:48:37.535995  ME: Bringup Loader Failure  : NO

 1655 13:48:37.538518  ME: Firmware Init Complete  : YES

 1656 13:48:37.542571  ME: Boot Options Present    : NO

 1657 13:48:37.545435  ME: Update In Progress      : NO

 1658 13:48:37.548797  ME: D0i3 Support            : YES

 1659 13:48:37.552515  ME: Low Power State Enabled : NO

 1660 13:48:37.556295  ME: CPU Replaced            : NO

 1661 13:48:37.558988  ME: CPU Replacement Valid   : YES

 1662 13:48:37.562421  ME: Current Working State   : 5

 1663 13:48:37.565295  ME: Current Operation State : 1

 1664 13:48:37.568540  ME: Current Operation Mode  : 0

 1665 13:48:37.571753  ME: Error Code              : 0

 1666 13:48:37.575239  ME: CPU Debug Disabled      : YES

 1667 13:48:37.578955  ME: TXT Support             : NO

 1668 13:48:37.584932  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1669 13:48:37.591481  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1670 13:48:37.591985  CBFS @ c08000 size 3f8000

 1671 13:48:37.598287  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1672 13:48:37.602005  CBFS: Locating 'fallback/dsdt.aml'

 1673 13:48:37.604868  CBFS: Found @ offset 10bb80 size 3fa5

 1674 13:48:37.611960  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1675 13:48:37.615075  CBFS @ c08000 size 3f8000

 1676 13:48:37.621891  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1677 13:48:37.622452  CBFS: Locating 'fallback/slic'

 1678 13:48:37.626708  CBFS: 'fallback/slic' not found.

 1679 13:48:37.634160  ACPI: Writing ACPI tables at 99b3e000.

 1680 13:48:37.634743  ACPI:    * FACS

 1681 13:48:37.636494  ACPI:    * DSDT

 1682 13:48:37.640281  Ramoops buffer: 0x100000@0x99a3d000.

 1683 13:48:37.643077  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1684 13:48:37.650296  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1685 13:48:37.653336  Google Chrome EC: version:

 1686 13:48:37.656480  	ro: helios_v2.0.2659-56403530b

 1687 13:48:37.660018  	rw: helios_v2.0.2849-c41de27e7d

 1688 13:48:37.660575    running image: 1

 1689 13:48:37.664212  ACPI:    * FADT

 1690 13:48:37.664772  SCI is IRQ9

 1691 13:48:37.670997  ACPI: added table 1/32, length now 40

 1692 13:48:37.671559  ACPI:     * SSDT

 1693 13:48:37.674082  Found 1 CPU(s) with 8 core(s) each.

 1694 13:48:37.677151  Error: Could not locate 'wifi_sar' in VPD.

 1695 13:48:37.683906  Checking CBFS for default SAR values

 1696 13:48:37.687574  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1697 13:48:37.690338  CBFS @ c08000 size 3f8000

 1698 13:48:37.696998  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1699 13:48:37.700154  CBFS: Locating 'wifi_sar_defaults.hex'

 1700 13:48:37.703887  CBFS: Found @ offset 5fac0 size 77

 1701 13:48:37.707212  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1702 13:48:37.714267  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1703 13:48:37.716880  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1704 13:48:37.723396  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1705 13:48:37.727084  failed to find key in VPD: dsm_calib_r0_0

 1706 13:48:37.736451  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1707 13:48:37.739913  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1708 13:48:37.747081  failed to find key in VPD: dsm_calib_r0_1

 1709 13:48:37.753258  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1710 13:48:37.759833  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1711 13:48:37.763302  failed to find key in VPD: dsm_calib_r0_2

 1712 13:48:37.773378  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1713 13:48:37.776002  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1714 13:48:37.783145  failed to find key in VPD: dsm_calib_r0_3

 1715 13:48:37.789282  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1716 13:48:37.795835  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1717 13:48:37.799354  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1718 13:48:37.805925  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1719 13:48:37.809479  EC returned error result code 1

 1720 13:48:37.813180  EC returned error result code 1

 1721 13:48:37.816856  EC returned error result code 1

 1722 13:48:37.819947  PS2K: Bad resp from EC. Vivaldi disabled!

 1723 13:48:37.826925  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1724 13:48:37.833450  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1725 13:48:37.836949  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1726 13:48:37.843351  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1727 13:48:37.846587  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1728 13:48:37.853269  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1729 13:48:37.859775  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1730 13:48:37.866057  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1731 13:48:37.869803  ACPI: added table 2/32, length now 44

 1732 13:48:37.870416  ACPI:    * MCFG

 1733 13:48:37.876362  ACPI: added table 3/32, length now 48

 1734 13:48:37.876928  ACPI:    * TPM2

 1735 13:48:37.879797  TPM2 log created at 99a2d000

 1736 13:48:37.882947  ACPI: added table 4/32, length now 52

 1737 13:48:37.886982  ACPI:    * MADT

 1738 13:48:37.887550  SCI is IRQ9

 1739 13:48:37.889188  ACPI: added table 5/32, length now 56

 1740 13:48:37.892737  current = 99b43ac0

 1741 13:48:37.893201  ACPI:    * DMAR

 1742 13:48:37.896476  ACPI: added table 6/32, length now 60

 1743 13:48:37.899503  ACPI:    * IGD OpRegion

 1744 13:48:37.902450  GMA: Found VBT in CBFS

 1745 13:48:37.906356  GMA: Found valid VBT in CBFS

 1746 13:48:37.909158  ACPI: added table 7/32, length now 64

 1747 13:48:37.909632  ACPI:    * HPET

 1748 13:48:37.912666  ACPI: added table 8/32, length now 68

 1749 13:48:37.915833  ACPI: done.

 1750 13:48:37.918907  ACPI tables: 31744 bytes.

 1751 13:48:37.922290  smbios_write_tables: 99a2c000

 1752 13:48:37.925994  EC returned error result code 3

 1753 13:48:37.928975  Couldn't obtain OEM name from CBI

 1754 13:48:37.933001  Create SMBIOS type 17

 1755 13:48:37.935640  PCI: 00:00.0 (Intel Cannonlake)

 1756 13:48:37.936138  PCI: 00:14.3 (Intel WiFi)

 1757 13:48:37.939107  SMBIOS tables: 939 bytes.

 1758 13:48:37.942553  Writing table forward entry at 0x00000500

 1759 13:48:37.949207  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1760 13:48:37.952636  Writing coreboot table at 0x99b62000

 1761 13:48:37.959289   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1762 13:48:37.962341   1. 0000000000001000-000000000009ffff: RAM

 1763 13:48:37.968743   2. 00000000000a0000-00000000000fffff: RESERVED

 1764 13:48:37.971715   3. 0000000000100000-0000000099a2bfff: RAM

 1765 13:48:37.978805   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1766 13:48:37.982117   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1767 13:48:37.988727   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1768 13:48:37.995384   7. 000000009a000000-000000009f7fffff: RESERVED

 1769 13:48:37.998397   8. 00000000e0000000-00000000efffffff: RESERVED

 1770 13:48:38.005468   9. 00000000fc000000-00000000fc000fff: RESERVED

 1771 13:48:38.008333  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1772 13:48:38.011693  11. 00000000fed10000-00000000fed17fff: RESERVED

 1773 13:48:38.018687  12. 00000000fed80000-00000000fed83fff: RESERVED

 1774 13:48:38.021471  13. 00000000fed90000-00000000fed91fff: RESERVED

 1775 13:48:38.029179  14. 00000000feda0000-00000000feda1fff: RESERVED

 1776 13:48:38.031315  15. 0000000100000000-000000045e7fffff: RAM

 1777 13:48:38.035190  Graphics framebuffer located at 0xc0000000

 1778 13:48:38.038160  Passing 5 GPIOs to payload:

 1779 13:48:38.044891              NAME |       PORT | POLARITY |     VALUE

 1780 13:48:38.048104     write protect |  undefined |     high |       low

 1781 13:48:38.054693               lid |  undefined |     high |      high

 1782 13:48:38.061045             power |  undefined |     high |       low

 1783 13:48:38.064599             oprom |  undefined |     high |       low

 1784 13:48:38.070875          EC in RW | 0x000000cb |     high |       low

 1785 13:48:38.071462  Board ID: 4

 1786 13:48:38.078010  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1787 13:48:38.078571  CBFS @ c08000 size 3f8000

 1788 13:48:38.084243  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1789 13:48:38.091505  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1790 13:48:38.094753  coreboot table: 1492 bytes.

 1791 13:48:38.097395  IMD ROOT    0. 99fff000 00001000

 1792 13:48:38.101542  IMD SMALL   1. 99ffe000 00001000

 1793 13:48:38.103905  FSP MEMORY  2. 99c4e000 003b0000

 1794 13:48:38.107502  CONSOLE     3. 99c2e000 00020000

 1795 13:48:38.110681  FMAP        4. 99c2d000 0000054e

 1796 13:48:38.114121  TIME STAMP  5. 99c2c000 00000910

 1797 13:48:38.117525  VBOOT WORK  6. 99c18000 00014000

 1798 13:48:38.121194  MRC DATA    7. 99c16000 00001958

 1799 13:48:38.124058  ROMSTG STCK 8. 99c15000 00001000

 1800 13:48:38.127123  AFTER CAR   9. 99c0b000 0000a000

 1801 13:48:38.130509  RAMSTAGE   10. 99baf000 0005c000

 1802 13:48:38.134322  REFCODE    11. 99b7a000 00035000

 1803 13:48:38.137591  SMM BACKUP 12. 99b6a000 00010000

 1804 13:48:38.140100  COREBOOT   13. 99b62000 00008000

 1805 13:48:38.143975  ACPI       14. 99b3e000 00024000

 1806 13:48:38.146941  ACPI GNVS  15. 99b3d000 00001000

 1807 13:48:38.150827  RAMOOPS    16. 99a3d000 00100000

 1808 13:48:38.153649  TPM2 TCGLOG17. 99a2d000 00010000

 1809 13:48:38.156933  SMBIOS     18. 99a2c000 00000800

 1810 13:48:38.160233  IMD small region:

 1811 13:48:38.163344    IMD ROOT    0. 99ffec00 00000400

 1812 13:48:38.166834    FSP RUNTIME 1. 99ffebe0 00000004

 1813 13:48:38.169992    EC HOSTEVENT 2. 99ffebc0 00000008

 1814 13:48:38.173460    POWER STATE 3. 99ffeb80 00000040

 1815 13:48:38.176523    ROMSTAGE    4. 99ffeb60 00000004

 1816 13:48:38.180074    MEM INFO    5. 99ffe9a0 000001b9

 1817 13:48:38.183128    VPD         6. 99ffe920 0000006c

 1818 13:48:38.186904  MTRR: Physical address space:

 1819 13:48:38.193195  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1820 13:48:38.199895  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1821 13:48:38.206583  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1822 13:48:38.213047  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1823 13:48:38.219821  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1824 13:48:38.222852  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1825 13:48:38.230221  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1826 13:48:38.235970  MTRR: Fixed MSR 0x250 0x0606060606060606

 1827 13:48:38.239557  MTRR: Fixed MSR 0x258 0x0606060606060606

 1828 13:48:38.242922  MTRR: Fixed MSR 0x259 0x0000000000000000

 1829 13:48:38.245765  MTRR: Fixed MSR 0x268 0x0606060606060606

 1830 13:48:38.252596  MTRR: Fixed MSR 0x269 0x0606060606060606

 1831 13:48:38.255743  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1832 13:48:38.259498  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1833 13:48:38.262595  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1834 13:48:38.269629  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1835 13:48:38.272447  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1836 13:48:38.275811  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1837 13:48:38.279682  call enable_fixed_mtrr()

 1838 13:48:38.282167  CPU physical address size: 39 bits

 1839 13:48:38.286085  MTRR: default type WB/UC MTRR counts: 6/8.

 1840 13:48:38.289359  MTRR: WB selected as default type.

 1841 13:48:38.295566  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1842 13:48:38.302141  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1843 13:48:38.308498  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1844 13:48:38.315102  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1845 13:48:38.322160  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1846 13:48:38.328959  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1847 13:48:38.332616  MTRR: Fixed MSR 0x250 0x0606060606060606

 1848 13:48:38.338898  MTRR: Fixed MSR 0x258 0x0606060606060606

 1849 13:48:38.342910  MTRR: Fixed MSR 0x259 0x0000000000000000

 1850 13:48:38.345121  MTRR: Fixed MSR 0x268 0x0606060606060606

 1851 13:48:38.348104  MTRR: Fixed MSR 0x269 0x0606060606060606

 1852 13:48:38.354536  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1853 13:48:38.357681  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1854 13:48:38.361542  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1855 13:48:38.364268  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1856 13:48:38.367926  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1857 13:48:38.374728  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1858 13:48:38.375293  

 1859 13:48:38.375663  MTRR check

 1860 13:48:38.378381  Fixed MTRRs   : Enabled

 1861 13:48:38.381153  Variable MTRRs: Enabled

 1862 13:48:38.381717  

 1863 13:48:38.384845  call enable_fixed_mtrr()

 1864 13:48:38.388012  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1865 13:48:38.390992  CPU physical address size: 39 bits

 1866 13:48:38.397661  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1867 13:48:38.401001  MTRR: Fixed MSR 0x250 0x0606060606060606

 1868 13:48:38.404723  MTRR: Fixed MSR 0x250 0x0606060606060606

 1869 13:48:38.410763  MTRR: Fixed MSR 0x258 0x0606060606060606

 1870 13:48:38.414547  MTRR: Fixed MSR 0x259 0x0000000000000000

 1871 13:48:38.417236  MTRR: Fixed MSR 0x268 0x0606060606060606

 1872 13:48:38.421628  MTRR: Fixed MSR 0x269 0x0606060606060606

 1873 13:48:38.427950  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1874 13:48:38.430846  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1875 13:48:38.434237  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1876 13:48:38.437182  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1877 13:48:38.440912  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1878 13:48:38.447147  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1879 13:48:38.450958  MTRR: Fixed MSR 0x258 0x0606060606060606

 1880 13:48:38.454593  MTRR: Fixed MSR 0x259 0x0000000000000000

 1881 13:48:38.460681  MTRR: Fixed MSR 0x268 0x0606060606060606

 1882 13:48:38.463492  MTRR: Fixed MSR 0x269 0x0606060606060606

 1883 13:48:38.467086  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1884 13:48:38.470387  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1885 13:48:38.473370  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1886 13:48:38.480587  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1887 13:48:38.484409  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1888 13:48:38.487146  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1889 13:48:38.490537  call enable_fixed_mtrr()

 1890 13:48:38.493375  call enable_fixed_mtrr()

 1891 13:48:38.496425  CPU physical address size: 39 bits

 1892 13:48:38.500017  CPU physical address size: 39 bits

 1893 13:48:38.503599  MTRR: Fixed MSR 0x250 0x0606060606060606

 1894 13:48:38.510219  MTRR: Fixed MSR 0x250 0x0606060606060606

 1895 13:48:38.513664  MTRR: Fixed MSR 0x258 0x0606060606060606

 1896 13:48:38.516828  MTRR: Fixed MSR 0x259 0x0000000000000000

 1897 13:48:38.519816  MTRR: Fixed MSR 0x268 0x0606060606060606

 1898 13:48:38.523140  MTRR: Fixed MSR 0x269 0x0606060606060606

 1899 13:48:38.529960  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1900 13:48:38.533195  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1901 13:48:38.536449  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1902 13:48:38.539775  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1903 13:48:38.547092  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1904 13:48:38.549528  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1905 13:48:38.553373  MTRR: Fixed MSR 0x258 0x0606060606060606

 1906 13:48:38.556244  call enable_fixed_mtrr()

 1907 13:48:38.559997  MTRR: Fixed MSR 0x259 0x0000000000000000

 1908 13:48:38.562735  MTRR: Fixed MSR 0x268 0x0606060606060606

 1909 13:48:38.569757  MTRR: Fixed MSR 0x269 0x0606060606060606

 1910 13:48:38.572642  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1911 13:48:38.575698  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1912 13:48:38.579099  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1913 13:48:38.586353  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1914 13:48:38.589676  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1915 13:48:38.592396  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1916 13:48:38.595931  CPU physical address size: 39 bits

 1917 13:48:38.600019  call enable_fixed_mtrr()

 1918 13:48:38.603282  CBFS @ c08000 size 3f8000

 1919 13:48:38.609758  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1920 13:48:38.613022  CBFS: Locating 'fallback/payload'

 1921 13:48:38.616227  MTRR: Fixed MSR 0x250 0x0606060606060606

 1922 13:48:38.619835  MTRR: Fixed MSR 0x250 0x0606060606060606

 1923 13:48:38.622807  MTRR: Fixed MSR 0x258 0x0606060606060606

 1924 13:48:38.629125  MTRR: Fixed MSR 0x259 0x0000000000000000

 1925 13:48:38.632803  MTRR: Fixed MSR 0x268 0x0606060606060606

 1926 13:48:38.636043  MTRR: Fixed MSR 0x269 0x0606060606060606

 1927 13:48:38.639273  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1928 13:48:38.646326  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1929 13:48:38.649030  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1930 13:48:38.652534  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1931 13:48:38.655731  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1932 13:48:38.659301  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1933 13:48:38.665976  MTRR: Fixed MSR 0x258 0x0606060606060606

 1934 13:48:38.668807  call enable_fixed_mtrr()

 1935 13:48:38.672208  MTRR: Fixed MSR 0x259 0x0000000000000000

 1936 13:48:38.675781  MTRR: Fixed MSR 0x268 0x0606060606060606

 1937 13:48:38.678554  MTRR: Fixed MSR 0x269 0x0606060606060606

 1938 13:48:38.685584  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1939 13:48:38.688655  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1940 13:48:38.691811  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1941 13:48:38.695032  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1942 13:48:38.698539  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1943 13:48:38.705822  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1944 13:48:38.708624  CPU physical address size: 39 bits

 1945 13:48:38.711996  call enable_fixed_mtrr()

 1946 13:48:38.715311  CBFS: Found @ offset 1c96c0 size 3f798

 1947 13:48:38.718636  CPU physical address size: 39 bits

 1948 13:48:38.722748  CPU physical address size: 39 bits

 1949 13:48:38.725669  Checking segment from ROM address 0xffdd16f8

 1950 13:48:38.731730  Checking segment from ROM address 0xffdd1714

 1951 13:48:38.735024  Loading segment from ROM address 0xffdd16f8

 1952 13:48:38.738028    code (compression=0)

 1953 13:48:38.744997    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1954 13:48:38.755270  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1955 13:48:38.758525  it's not compressed!

 1956 13:48:38.848915  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1957 13:48:38.855692  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1958 13:48:38.859282  Loading segment from ROM address 0xffdd1714

 1959 13:48:38.862487    Entry Point 0x30000000

 1960 13:48:38.865534  Loaded segments

 1961 13:48:38.871400  Finalizing chipset.

 1962 13:48:38.874215  Finalizing SMM.

 1963 13:48:38.877612  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1964 13:48:38.881284  mp_park_aps done after 0 msecs.

 1965 13:48:38.887836  Jumping to boot code at 30000000(99b62000)

 1966 13:48:38.894348  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 1967 13:48:38.894950  

 1968 13:48:38.895333  

 1969 13:48:38.895733  

 1970 13:48:38.898707  Starting depthcharge on Helios...

 1971 13:48:38.899174  

 1972 13:48:38.900306  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 1973 13:48:38.900907  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 1974 13:48:38.901396  Setting prompt string to ['hatch:']
 1975 13:48:38.901823  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 1976 13:48:38.907523  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1977 13:48:38.908030  

 1978 13:48:38.914994  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1979 13:48:38.915573  

 1980 13:48:38.920848  board_setup: Info: eMMC controller not present; skipping

 1981 13:48:38.921434  

 1982 13:48:38.924483  New NVMe Controller 0x30053ac0 @ 00:1d:00

 1983 13:48:38.925059  

 1984 13:48:38.930902  board_setup: Info: SDHCI controller not present; skipping

 1985 13:48:38.931475  

 1986 13:48:38.937243  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 1987 13:48:38.937835  

 1988 13:48:38.938214  Wipe memory regions:

 1989 13:48:38.938566  

 1990 13:48:38.940842  	[0x00000000001000, 0x000000000a0000)

 1991 13:48:38.941310  

 1992 13:48:38.943808  	[0x00000000100000, 0x00000030000000)

 1993 13:48:39.010074  

 1994 13:48:39.013207  	[0x00000030657430, 0x00000099a2c000)

 1995 13:48:39.150195  

 1996 13:48:39.153234  	[0x00000100000000, 0x0000045e800000)

 1997 13:48:40.536332  

 1998 13:48:40.536898  R8152: Initializing

 1999 13:48:40.537279  

 2000 13:48:40.539354  Version 9 (ocp_data = 6010)

 2001 13:48:40.543492  

 2002 13:48:40.544104  R8152: Done initializing

 2003 13:48:40.544488  

 2004 13:48:40.546816  Adding net device

 2005 13:48:41.156659  

 2006 13:48:41.157227  R8152: Initializing

 2007 13:48:41.157597  

 2008 13:48:41.159694  Version 6 (ocp_data = 5c30)

 2009 13:48:41.160204  

 2010 13:48:41.162938  R8152: Done initializing

 2011 13:48:41.163064  

 2012 13:48:41.166625  net_add_device: Attemp to include the same device

 2013 13:48:41.169330  

 2014 13:48:41.176712  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2015 13:48:41.176901  

 2016 13:48:41.176991  

 2017 13:48:41.177067  

 2018 13:48:41.177378  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2020 13:48:41.278140  hatch: tftpboot 192.168.201.1 10624724/tftp-deploy-rqu9_14_/kernel/bzImage 10624724/tftp-deploy-rqu9_14_/kernel/cmdline 10624724/tftp-deploy-rqu9_14_/ramdisk/ramdisk.cpio.gz

 2021 13:48:41.278800  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2022 13:48:41.279354  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2023 13:48:41.283880  tftpboot 192.168.201.1 10624724/tftp-deploy-rqu9_14_/kernel/bzImploy-rqu9_14_/kernel/cmdline 10624724/tftp-deploy-rqu9_14_/ramdisk/ramdisk.cpio.gz

 2024 13:48:41.284672  

 2025 13:48:41.285052  Waiting for link

 2026 13:48:41.484807  

 2027 13:48:41.485358  done.

 2028 13:48:41.485725  

 2029 13:48:41.486064  MAC: 00:24:32:50:1a:5f

 2030 13:48:41.486398  

 2031 13:48:41.487956  Sending DHCP discover... done.

 2032 13:48:41.488416  

 2033 13:48:41.491490  Waiting for reply... done.

 2034 13:48:41.491985  

 2035 13:48:41.494643  Sending DHCP request... done.

 2036 13:48:41.495096  

 2037 13:48:41.498360  Waiting for reply... done.

 2038 13:48:41.498921  

 2039 13:48:41.501361  My ip is 192.168.201.21

 2040 13:48:41.501920  

 2041 13:48:41.504573  The DHCP server ip is 192.168.201.1

 2042 13:48:41.505035  

 2043 13:48:41.507797  TFTP server IP predefined by user: 192.168.201.1

 2044 13:48:41.508395  

 2045 13:48:41.514431  Bootfile predefined by user: 10624724/tftp-deploy-rqu9_14_/kernel/bzImage

 2046 13:48:41.514995  

 2047 13:48:41.517472  Sending tftp read request... done.

 2048 13:48:41.521202  

 2049 13:48:41.527763  Waiting for the transfer... 

 2050 13:48:41.528250  

 2051 13:48:42.227595  00000000 ################################################################

 2052 13:48:42.228267  

 2053 13:48:42.942369  00080000 ################################################################

 2054 13:48:42.943038  

 2055 13:48:43.667943  00100000 ################################################################

 2056 13:48:43.668525  

 2057 13:48:44.394620  00180000 ################################################################

 2058 13:48:44.395206  

 2059 13:48:45.109718  00200000 ################################################################

 2060 13:48:45.110313  

 2061 13:48:45.820581  00280000 ################################################################

 2062 13:48:45.821163  

 2063 13:48:46.542049  00300000 ################################################################

 2064 13:48:46.542619  

 2065 13:48:47.260262  00380000 ################################################################

 2066 13:48:47.260819  

 2067 13:48:47.977952  00400000 ################################################################

 2068 13:48:47.978571  

 2069 13:48:48.703652  00480000 ################################################################

 2070 13:48:48.704311  

 2071 13:48:49.446528  00500000 ################################################################

 2072 13:48:49.447094  

 2073 13:48:50.171981  00580000 ################################################################

 2074 13:48:50.172535  

 2075 13:48:50.907460  00600000 ################################################################

 2076 13:48:50.908203  

 2077 13:48:51.621271  00680000 ################################################################

 2078 13:48:51.621854  

 2079 13:48:52.348507  00700000 ################################################################

 2080 13:48:52.349096  

 2081 13:48:52.571526  00780000 #################### done.

 2082 13:48:52.572112  

 2083 13:48:52.575308  The bootfile was 8028048 bytes long.

 2084 13:48:52.575914  

 2085 13:48:52.578561  Sending tftp read request... done.

 2086 13:48:52.579172  

 2087 13:48:52.581308  Waiting for the transfer... 

 2088 13:48:52.581772  

 2089 13:48:53.285340  00000000 ################################################################

 2090 13:48:53.285909  

 2091 13:48:54.003683  00080000 ################################################################

 2092 13:48:54.004346  

 2093 13:48:54.722528  00100000 ################################################################

 2094 13:48:54.723130  

 2095 13:48:55.440077  00180000 ################################################################

 2096 13:48:55.440730  

 2097 13:48:56.156218  00200000 ################################################################

 2098 13:48:56.156829  

 2099 13:48:56.882494  00280000 ################################################################

 2100 13:48:56.883123  

 2101 13:48:57.604607  00300000 ################################################################

 2102 13:48:57.605205  

 2103 13:48:58.311936  00380000 ################################################################

 2104 13:48:58.312522  

 2105 13:48:59.008338  00400000 ################################################################

 2106 13:48:59.008900  

 2107 13:48:59.720553  00480000 ################################################################

 2108 13:48:59.721108  

 2109 13:49:00.461128  00500000 ################################################################

 2110 13:49:00.461760  

 2111 13:49:01.192873  00580000 ################################################################

 2112 13:49:01.193471  

 2113 13:49:01.925427  00600000 ################################################################

 2114 13:49:01.925987  

 2115 13:49:02.644925  00680000 ################################################################

 2116 13:49:02.645483  

 2117 13:49:03.384252  00700000 ################################################################

 2118 13:49:03.384813  

 2119 13:49:04.094974  00780000 ################################################################

 2120 13:49:04.095536  

 2121 13:49:04.681052  00800000 ###################################################### done.

 2122 13:49:04.681687  

 2123 13:49:04.684178  Sending tftp read request... done.

 2124 13:49:04.684654  

 2125 13:49:04.687561  Waiting for the transfer... 

 2126 13:49:04.688065  

 2127 13:49:04.688443  00000000 # done.

 2128 13:49:04.690796  

 2129 13:49:04.697760  Command line loaded dynamically from TFTP file: 10624724/tftp-deploy-rqu9_14_/kernel/cmdline

 2130 13:49:04.698329  

 2131 13:49:04.714264  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2132 13:49:04.717965  

 2133 13:49:04.720534  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2134 13:49:04.726259  

 2135 13:49:04.729272  Shutting down all USB controllers.

 2136 13:49:04.729738  

 2137 13:49:04.730158  Removing current net device

 2138 13:49:04.736975  

 2139 13:49:04.737549  Finalizing coreboot

 2140 13:49:04.737937  

 2141 13:49:04.743413  Exiting depthcharge with code 4 at timestamp: 33225754

 2142 13:49:04.743906  

 2143 13:49:04.744288  

 2144 13:49:04.744633  Starting kernel ...

 2145 13:49:04.745012  

 2146 13:49:04.746299  end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
 2147 13:49:04.746853  start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
 2148 13:49:04.747416  Setting prompt string to ['Linux version [0-9]']
 2149 13:49:04.747900  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2150 13:49:04.748307  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2151 13:49:04.749442  

 2153 13:53:20.747948  end: 2.2.5 auto-login-action (duration 00:04:16) [common]
 2155 13:53:20.749046  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
 2157 13:53:20.750194  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2160 13:53:20.751609  end: 2 depthcharge-action (duration 00:05:00) [common]
 2162 13:53:20.752402  Cleaning after the job
 2163 13:53:20.752488  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624724/tftp-deploy-rqu9_14_/ramdisk
 2164 13:53:20.754214  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624724/tftp-deploy-rqu9_14_/kernel
 2165 13:53:20.755148  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624724/tftp-deploy-rqu9_14_/modules
 2166 13:53:20.755464  start: 5.1 power-off (timeout 00:00:30) [common]
 2167 13:53:20.755615  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2168 13:53:20.838498  >> Command sent successfully.

 2169 13:53:20.849438  Returned 0 in 0 seconds
 2170 13:53:20.950899  end: 5.1 power-off (duration 00:00:00) [common]
 2172 13:53:20.952498  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2173 13:53:20.953764  Listened to connection for namespace 'common' for up to 1s
 2175 13:53:20.955123  Listened to connection for namespace 'common' for up to 1s
 2176 13:53:21.954509  Finalising connection for namespace 'common'
 2177 13:53:21.955194  Disconnecting from shell: Finalise
 2178 13:53:21.955626  
 2179 13:53:22.056781  end: 5.2 read-feedback (duration 00:00:01) [common]
 2180 13:53:22.057423  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624724
 2181 13:53:22.074344  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624724
 2182 13:53:22.074469  JobError: Your job cannot terminate cleanly.