Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 13:43:17.708205 lava-dispatcher, installed at version: 2023.05.1
2 13:43:17.708448 start: 0 validate
3 13:43:17.708606 Start time: 2023-06-07 13:43:17.708598+00:00 (UTC)
4 13:43:17.708743 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:43:17.708898 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 13:43:17.976172 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:43:17.976353 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:43:18.245905 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:43:18.246134 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
10 13:43:21.483433 validate duration: 3.77
12 13:43:21.483841 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:43:21.483974 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:43:21.484097 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:43:21.484254 Not decompressing ramdisk as can be used compressed.
16 13:43:21.484371 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 13:43:21.484469 saving as /var/lib/lava/dispatcher/tmp/10624700/tftp-deploy-h7m8kbxt/ramdisk/rootfs.cpio.gz
18 13:43:21.484565 total size: 8430069 (8MB)
19 13:43:22.013351 progress 0% (0MB)
20 13:43:22.015876 progress 5% (0MB)
21 13:43:22.018275 progress 10% (0MB)
22 13:43:22.020728 progress 15% (1MB)
23 13:43:22.023129 progress 20% (1MB)
24 13:43:22.025654 progress 25% (2MB)
25 13:43:22.028120 progress 30% (2MB)
26 13:43:22.030507 progress 35% (2MB)
27 13:43:22.032758 progress 40% (3MB)
28 13:43:22.035148 progress 45% (3MB)
29 13:43:22.037604 progress 50% (4MB)
30 13:43:22.040034 progress 55% (4MB)
31 13:43:22.042375 progress 60% (4MB)
32 13:43:22.044985 progress 65% (5MB)
33 13:43:22.047732 progress 70% (5MB)
34 13:43:22.049847 progress 75% (6MB)
35 13:43:22.052163 progress 80% (6MB)
36 13:43:22.054433 progress 85% (6MB)
37 13:43:22.056765 progress 90% (7MB)
38 13:43:22.059039 progress 95% (7MB)
39 13:43:22.061408 progress 100% (8MB)
40 13:43:22.061589 8MB downloaded in 0.58s (13.93MB/s)
41 13:43:22.061827 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:43:22.062307 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:43:22.062451 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:43:22.062542 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:43:22.062730 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
47 13:43:22.062835 saving as /var/lib/lava/dispatcher/tmp/10624700/tftp-deploy-h7m8kbxt/kernel/bzImage
48 13:43:22.062949 total size: 8028048 (7MB)
49 13:43:22.063081 No compression specified
50 13:43:22.064606 progress 0% (0MB)
51 13:43:22.066813 progress 5% (0MB)
52 13:43:22.068947 progress 10% (0MB)
53 13:43:22.071088 progress 15% (1MB)
54 13:43:22.073216 progress 20% (1MB)
55 13:43:22.075494 progress 25% (1MB)
56 13:43:22.077591 progress 30% (2MB)
57 13:43:22.080012 progress 35% (2MB)
58 13:43:22.082418 progress 40% (3MB)
59 13:43:22.084982 progress 45% (3MB)
60 13:43:22.087265 progress 50% (3MB)
61 13:43:22.089473 progress 55% (4MB)
62 13:43:22.091705 progress 60% (4MB)
63 13:43:22.094086 progress 65% (5MB)
64 13:43:22.096370 progress 70% (5MB)
65 13:43:22.098689 progress 75% (5MB)
66 13:43:22.100935 progress 80% (6MB)
67 13:43:22.103230 progress 85% (6MB)
68 13:43:22.105364 progress 90% (6MB)
69 13:43:22.107489 progress 95% (7MB)
70 13:43:22.109626 progress 100% (7MB)
71 13:43:22.109877 7MB downloaded in 0.05s (163.16MB/s)
72 13:43:22.110028 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:43:22.110269 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:43:22.110389 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:43:22.110570 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:43:22.110766 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
78 13:43:22.110839 saving as /var/lib/lava/dispatcher/tmp/10624700/tftp-deploy-h7m8kbxt/modules/modules.tar
79 13:43:22.110909 total size: 255828 (0MB)
80 13:43:22.110971 Using unxz to decompress xz
81 13:43:22.114667 progress 12% (0MB)
82 13:43:22.115105 progress 25% (0MB)
83 13:43:22.115458 progress 38% (0MB)
84 13:43:22.116723 progress 51% (0MB)
85 13:43:22.118627 progress 64% (0MB)
86 13:43:22.120570 progress 76% (0MB)
87 13:43:22.122529 progress 89% (0MB)
88 13:43:22.124433 progress 100% (0MB)
89 13:43:22.130211 0MB downloaded in 0.02s (12.64MB/s)
90 13:43:22.130479 end: 1.3.1 http-download (duration 00:00:00) [common]
92 13:43:22.130774 end: 1.3 download-retry (duration 00:00:00) [common]
93 13:43:22.130875 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 13:43:22.131006 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 13:43:22.131122 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 13:43:22.131252 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 13:43:22.131546 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8
98 13:43:22.131690 makedir: /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin
99 13:43:22.131798 makedir: /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/tests
100 13:43:22.131898 makedir: /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/results
101 13:43:22.132022 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-add-keys
102 13:43:22.132179 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-add-sources
103 13:43:22.132310 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-background-process-start
104 13:43:22.132482 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-background-process-stop
105 13:43:22.132732 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-common-functions
106 13:43:22.132940 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-echo-ipv4
107 13:43:22.133114 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-install-packages
108 13:43:22.133243 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-installed-packages
109 13:43:22.133416 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-os-build
110 13:43:22.133555 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-probe-channel
111 13:43:22.133742 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-probe-ip
112 13:43:22.133877 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-target-ip
113 13:43:22.134098 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-target-mac
114 13:43:22.134262 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-target-storage
115 13:43:22.134428 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-test-case
116 13:43:22.134654 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-test-event
117 13:43:22.134845 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-test-feedback
118 13:43:22.135095 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-test-raise
119 13:43:22.135239 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-test-reference
120 13:43:22.135441 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-test-runner
121 13:43:22.135608 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-test-set
122 13:43:22.135777 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-test-shell
123 13:43:22.135945 Updating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-install-packages (oe)
124 13:43:22.136137 Updating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/bin/lava-installed-packages (oe)
125 13:43:22.136301 Creating /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/environment
126 13:43:22.136439 LAVA metadata
127 13:43:22.136544 - LAVA_JOB_ID=10624700
128 13:43:22.136641 - LAVA_DISPATCHER_IP=192.168.201.1
129 13:43:22.136790 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 13:43:22.136961 skipped lava-vland-overlay
131 13:43:22.137079 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 13:43:22.137206 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 13:43:22.137301 skipped lava-multinode-overlay
134 13:43:22.137411 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 13:43:22.137538 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 13:43:22.137647 Loading test definitions
137 13:43:22.137786 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 13:43:22.137895 Using /lava-10624700 at stage 0
139 13:43:22.138340 uuid=10624700_1.4.2.3.1 testdef=None
140 13:43:22.138469 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 13:43:22.138591 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 13:43:22.139413 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 13:43:22.139663 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 13:43:22.140517 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 13:43:22.140771 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 13:43:22.141428 runner path: /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/0/tests/0_dmesg test_uuid 10624700_1.4.2.3.1
149 13:43:22.141643 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 13:43:22.141910 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 13:43:22.142013 Using /lava-10624700 at stage 1
153 13:43:22.142445 uuid=10624700_1.4.2.3.5 testdef=None
154 13:43:22.142566 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 13:43:22.142693 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 13:43:22.143447 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 13:43:22.143807 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 13:43:22.144787 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 13:43:22.145130 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 13:43:22.146005 runner path: /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/1/tests/1_bootrr test_uuid 10624700_1.4.2.3.5
163 13:43:22.146198 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 13:43:22.146442 Creating lava-test-runner.conf files
166 13:43:22.146506 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/0 for stage 0
167 13:43:22.146601 - 0_dmesg
168 13:43:22.146685 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624700/lava-overlay-h4j755i8/lava-10624700/1 for stage 1
169 13:43:22.146781 - 1_bootrr
170 13:43:22.146910 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 13:43:22.147034 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 13:43:22.157304 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 13:43:22.157458 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 13:43:22.157577 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 13:43:22.157698 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 13:43:22.157852 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 13:43:22.407653 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 13:43:22.408048 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 13:43:22.408254 extracting modules file /var/lib/lava/dispatcher/tmp/10624700/tftp-deploy-h7m8kbxt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624700/extract-overlay-ramdisk-yz4l2qry/ramdisk
180 13:43:22.426147 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 13:43:22.426341 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 13:43:22.426477 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624700/compress-overlay-hkpw16uv/overlay-1.4.2.4.tar.gz to ramdisk
183 13:43:22.426583 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624700/compress-overlay-hkpw16uv/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624700/extract-overlay-ramdisk-yz4l2qry/ramdisk
184 13:43:22.438608 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 13:43:22.438776 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 13:43:22.438915 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 13:43:22.439046 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 13:43:22.439167 Building ramdisk /var/lib/lava/dispatcher/tmp/10624700/extract-overlay-ramdisk-yz4l2qry/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624700/extract-overlay-ramdisk-yz4l2qry/ramdisk
189 13:43:22.564122 >> 49849 blocks
190 13:43:23.438611 rename /var/lib/lava/dispatcher/tmp/10624700/extract-overlay-ramdisk-yz4l2qry/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624700/tftp-deploy-h7m8kbxt/ramdisk/ramdisk.cpio.gz
191 13:43:23.439036 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 13:43:23.439191 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 13:43:23.439322 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 13:43:23.439458 No mkimage arch provided, not using FIT.
195 13:43:23.439580 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 13:43:23.439696 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 13:43:23.439837 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 13:43:23.439967 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 13:43:23.440081 No LXC device requested
200 13:43:23.440194 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 13:43:23.440317 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 13:43:23.440446 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 13:43:23.440550 Checking files for TFTP limit of 4294967296 bytes.
204 13:43:23.440991 end: 1 tftp-deploy (duration 00:00:02) [common]
205 13:43:23.441098 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 13:43:23.441188 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 13:43:23.441336 substitutions:
208 13:43:23.441430 - {DTB}: None
209 13:43:23.441526 - {INITRD}: 10624700/tftp-deploy-h7m8kbxt/ramdisk/ramdisk.cpio.gz
210 13:43:23.441616 - {KERNEL}: 10624700/tftp-deploy-h7m8kbxt/kernel/bzImage
211 13:43:23.441708 - {LAVA_MAC}: None
212 13:43:23.441807 - {PRESEED_CONFIG}: None
213 13:43:23.441902 - {PRESEED_LOCAL}: None
214 13:43:23.441993 - {RAMDISK}: 10624700/tftp-deploy-h7m8kbxt/ramdisk/ramdisk.cpio.gz
215 13:43:23.442080 - {ROOT_PART}: None
216 13:43:23.442166 - {ROOT}: None
217 13:43:23.442254 - {SERVER_IP}: 192.168.201.1
218 13:43:23.442339 - {TEE}: None
219 13:43:23.442424 Parsed boot commands:
220 13:43:23.442482 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 13:43:23.442653 Parsed boot commands: tftpboot 192.168.201.1 10624700/tftp-deploy-h7m8kbxt/kernel/bzImage 10624700/tftp-deploy-h7m8kbxt/kernel/cmdline 10624700/tftp-deploy-h7m8kbxt/ramdisk/ramdisk.cpio.gz
222 13:43:23.442744 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 13:43:23.442829 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 13:43:23.442929 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 13:43:23.443050 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 13:43:23.443150 Not connected, no need to disconnect.
227 13:43:23.443265 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 13:43:23.443470 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 13:43:23.443546 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
230 13:43:23.446880 Setting prompt string to ['lava-test: # ']
231 13:43:23.447261 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 13:43:23.447413 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 13:43:23.447552 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 13:43:23.447677 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 13:43:23.448005 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
236 13:43:28.580528 >> Command sent successfully.
237 13:43:28.583056 Returned 0 in 5 seconds
238 13:43:28.683485 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 13:43:28.683927 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 13:43:28.684070 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 13:43:28.684193 Setting prompt string to 'Starting depthcharge on Voema...'
243 13:43:28.684296 Changing prompt to 'Starting depthcharge on Voema...'
244 13:43:28.684394 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 13:43:28.684742 [Enter `^Ec?' for help]
246 13:43:30.246900
247 13:43:30.247082
248 13:43:30.256502 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 13:43:30.259664 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
250 13:43:30.266818 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 13:43:30.270124 CPU: AES supported, TXT NOT supported, VT supported
252 13:43:30.277682 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 13:43:30.280796 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 13:43:30.287198 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 13:43:30.290473 VBOOT: Loading verstage.
256 13:43:30.293914 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 13:43:30.300431 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 13:43:30.303738 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 13:43:30.313391 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 13:43:30.320097 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 13:43:30.320212
262 13:43:30.320312
263 13:43:30.333626 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 13:43:30.347527 Probing TPM: . done!
265 13:43:30.350614 TPM ready after 0 ms
266 13:43:30.353977 Connected to device vid:did:rid of 1ae0:0028:00
267 13:43:30.365005 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
268 13:43:30.371824 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 13:43:30.375015 Initialized TPM device CR50 revision 0
270 13:43:30.430389 tlcl_send_startup: Startup return code is 0
271 13:43:30.430531 TPM: setup succeeded
272 13:43:30.445163 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 13:43:30.458566 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 13:43:30.471687 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 13:43:30.481808 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 13:43:30.485157 Chrome EC: UHEPI supported
277 13:43:30.488560 Phase 1
278 13:43:30.491795 FMAP: area GBB found @ 1805000 (458752 bytes)
279 13:43:30.501508 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 13:43:30.508587 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 13:43:30.515219 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 13:43:30.521832 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 13:43:30.525059 Recovery requested (1009000e)
284 13:43:30.528356 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 13:43:30.540136 tlcl_extend: response is 0
286 13:43:30.546727 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 13:43:30.556681 tlcl_extend: response is 0
288 13:43:30.563299 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 13:43:30.569665 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 13:43:30.576792 BS: verstage times (exec / console): total (unknown) / 142 ms
291 13:43:30.576907
292 13:43:30.577005
293 13:43:30.589468 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 13:43:30.596150 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 13:43:30.599527 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 13:43:30.602892 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 13:43:30.609486 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 13:43:30.612620 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 13:43:30.615770 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 13:43:30.619299 TCO_STS: 0000 0000
301 13:43:30.622633 GEN_PMCON: d0015038 00002200
302 13:43:30.625977 GBLRST_CAUSE: 00000000 00000000
303 13:43:30.629154 HPR_CAUSE0: 00000000
304 13:43:30.629264 prev_sleep_state 5
305 13:43:30.632509 Boot Count incremented to 8604
306 13:43:30.639163 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 13:43:30.645749 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 13:43:30.655719 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 13:43:30.662032 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 13:43:30.665854 Chrome EC: UHEPI supported
311 13:43:30.672163 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 13:43:30.683707 Probing TPM: done!
313 13:43:30.690194 Connected to device vid:did:rid of 1ae0:0028:00
314 13:43:30.700241 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
315 13:43:30.702902 Initialized TPM device CR50 revision 0
316 13:43:30.718296 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 13:43:30.725073 MRC: Hash idx 0x100b comparison successful.
318 13:43:30.727898 MRC cache found, size faa8
319 13:43:30.727982 bootmode is set to: 2
320 13:43:30.731226 SPD index = 2
321 13:43:30.737834 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 13:43:30.741696 SPD: module type is LPDDR4X
323 13:43:30.744690 SPD: module part number is MT53D1G64D4NW-046
324 13:43:30.751082 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
325 13:43:30.754767 SPD: device width 16 bits, bus width 16 bits
326 13:43:30.761744 SPD: module size is 2048 MB (per channel)
327 13:43:31.189293 CBMEM:
328 13:43:31.192270 IMD: root @ 0x76fff000 254 entries.
329 13:43:31.195909 IMD: root @ 0x76ffec00 62 entries.
330 13:43:31.199035 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 13:43:31.205393 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 13:43:31.208966 External stage cache:
333 13:43:31.212118 IMD: root @ 0x7b3ff000 254 entries.
334 13:43:31.215805 IMD: root @ 0x7b3fec00 62 entries.
335 13:43:31.230477 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 13:43:31.237144 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 13:43:31.243700 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 13:43:31.257258 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 13:43:31.263849 cse_lite: Skip switching to RW in the recovery path
340 13:43:31.263947 8 DIMMs found
341 13:43:31.264017 SMM Memory Map
342 13:43:31.270469 SMRAM : 0x7b000000 0x800000
343 13:43:31.273585 Subregion 0: 0x7b000000 0x200000
344 13:43:31.277572 Subregion 1: 0x7b200000 0x200000
345 13:43:31.280763 Subregion 2: 0x7b400000 0x400000
346 13:43:31.280863 top_of_ram = 0x77000000
347 13:43:31.287096 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 13:43:31.293616 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 13:43:31.297317 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 13:43:31.304015 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 13:43:31.310382 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 13:43:31.317198 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 13:43:31.327106 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 13:43:31.333697 Processing 211 relocs. Offset value of 0x74c0b000
355 13:43:31.340832 BS: romstage times (exec / console): total (unknown) / 277 ms
356 13:43:31.346149
357 13:43:31.346381
358 13:43:31.355766 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 13:43:31.359625 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 13:43:31.368994 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 13:43:31.376117 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 13:43:31.382130 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 13:43:31.388663 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 13:43:31.433036 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 13:43:31.439629 Processing 5008 relocs. Offset value of 0x75d98000
366 13:43:31.442884 BS: postcar times (exec / console): total (unknown) / 59 ms
367 13:43:31.445564
368 13:43:31.445649
369 13:43:31.456062 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 13:43:31.456160 Normal boot
371 13:43:31.459333 FW_CONFIG value is 0x804c02
372 13:43:31.462538 PCI: 00:07.0 disabled by fw_config
373 13:43:31.465807 PCI: 00:07.1 disabled by fw_config
374 13:43:31.468986 PCI: 00:0d.2 disabled by fw_config
375 13:43:31.472396 PCI: 00:1c.7 disabled by fw_config
376 13:43:31.478876 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 13:43:31.485671 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 13:43:31.488922 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 13:43:31.492385 GENERIC: 0.0 disabled by fw_config
380 13:43:31.499105 GENERIC: 1.0 disabled by fw_config
381 13:43:31.502304 fw_config match found: DB_USB=USB3_ACTIVE
382 13:43:31.505585 fw_config match found: DB_USB=USB3_ACTIVE
383 13:43:31.508733 fw_config match found: DB_USB=USB3_ACTIVE
384 13:43:31.515628 fw_config match found: DB_USB=USB3_ACTIVE
385 13:43:31.518683 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 13:43:31.525247 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 13:43:31.535842 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 13:43:31.541990 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 13:43:31.545272 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 13:43:31.552078 microcode: Update skipped, already up-to-date
391 13:43:31.558755 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 13:43:31.586261 Detected 4 core, 8 thread CPU.
393 13:43:31.589532 Setting up SMI for CPU
394 13:43:31.592963 IED base = 0x7b400000
395 13:43:31.593076 IED size = 0x00400000
396 13:43:31.596215 Will perform SMM setup.
397 13:43:31.602743 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
398 13:43:31.609383 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 13:43:31.616307 Processing 16 relocs. Offset value of 0x00030000
400 13:43:31.619353 Attempting to start 7 APs
401 13:43:31.622315 Waiting for 10ms after sending INIT.
402 13:43:31.637814 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 13:43:31.637952 done.
404 13:43:31.641284 AP: slot 4 apic_id 5.
405 13:43:31.644509 AP: slot 2 apic_id 3.
406 13:43:31.644595 AP: slot 3 apic_id 7.
407 13:43:31.648246 AP: slot 7 apic_id 6.
408 13:43:31.651709 AP: slot 5 apic_id 4.
409 13:43:31.651795 AP: slot 6 apic_id 2.
410 13:43:31.658181 Waiting for 2nd SIPI to complete...done.
411 13:43:31.664791 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 13:43:31.671303 Processing 13 relocs. Offset value of 0x00038000
413 13:43:31.674614 Unable to locate Global NVS
414 13:43:31.681072 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 13:43:31.684402 Installing permanent SMM handler to 0x7b000000
416 13:43:31.694561 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 13:43:31.697960 Processing 794 relocs. Offset value of 0x7b010000
418 13:43:31.708027 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 13:43:31.711233 Processing 13 relocs. Offset value of 0x7b008000
420 13:43:31.717390 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 13:43:31.724226 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 13:43:31.727821 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 13:43:31.734072 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 13:43:31.741183 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 13:43:31.747441 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 13:43:31.754077 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 13:43:31.754173 Unable to locate Global NVS
428 13:43:31.764115 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 13:43:31.767162 Clearing SMI status registers
430 13:43:31.767287 SMI_STS: PM1
431 13:43:31.771134 PM1_STS: PWRBTN
432 13:43:31.777602 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 13:43:31.780861 In relocation handler: CPU 0
434 13:43:31.784268 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 13:43:31.790506 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 13:43:31.790628 Relocation complete.
437 13:43:31.800756 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 13:43:31.800855 In relocation handler: CPU 1
439 13:43:31.806763 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 13:43:31.806854 Relocation complete.
441 13:43:31.816764 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
442 13:43:31.816889 In relocation handler: CPU 5
443 13:43:31.823634 New SMBASE=0x7affec00 IEDBASE=0x7b400000
444 13:43:31.826714 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 13:43:31.829897 Relocation complete.
446 13:43:31.836725 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
447 13:43:31.839789 In relocation handler: CPU 4
448 13:43:31.843500 New SMBASE=0x7afff000 IEDBASE=0x7b400000
449 13:43:31.846749 Relocation complete.
450 13:43:31.853536 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
451 13:43:31.856832 In relocation handler: CPU 2
452 13:43:31.860078 New SMBASE=0x7afff800 IEDBASE=0x7b400000
453 13:43:31.863283 Relocation complete.
454 13:43:31.869796 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
455 13:43:31.873235 In relocation handler: CPU 6
456 13:43:31.876265 New SMBASE=0x7affe800 IEDBASE=0x7b400000
457 13:43:31.882991 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 13:43:31.883113 Relocation complete.
459 13:43:31.889584 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
460 13:43:31.892884 In relocation handler: CPU 7
461 13:43:31.899902 New SMBASE=0x7affe400 IEDBASE=0x7b400000
462 13:43:31.903198 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 13:43:31.906614 Relocation complete.
464 13:43:31.913169 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
465 13:43:31.915956 In relocation handler: CPU 3
466 13:43:31.919149 New SMBASE=0x7afff400 IEDBASE=0x7b400000
467 13:43:31.922551 Relocation complete.
468 13:43:31.922639 Initializing CPU #0
469 13:43:31.925792 CPU: vendor Intel device 806c1
470 13:43:31.929031 CPU: family 06, model 8c, stepping 01
471 13:43:31.932908 Clearing out pending MCEs
472 13:43:31.935875 Setting up local APIC...
473 13:43:31.939137 apic_id: 0x00 done.
474 13:43:31.942705 Turbo is available but hidden
475 13:43:31.945794 Turbo is available and visible
476 13:43:31.949004 microcode: Update skipped, already up-to-date
477 13:43:31.952741 CPU #0 initialized
478 13:43:31.952826 Initializing CPU #1
479 13:43:31.956074 Initializing CPU #3
480 13:43:31.959225 Initializing CPU #7
481 13:43:31.959336 CPU: vendor Intel device 806c1
482 13:43:31.965817 CPU: family 06, model 8c, stepping 01
483 13:43:31.969108 CPU: vendor Intel device 806c1
484 13:43:31.972326 CPU: family 06, model 8c, stepping 01
485 13:43:31.972436 Initializing CPU #5
486 13:43:31.975525 Initializing CPU #2
487 13:43:31.978824 Initializing CPU #6
488 13:43:31.982557 CPU: vendor Intel device 806c1
489 13:43:31.985923 CPU: family 06, model 8c, stepping 01
490 13:43:31.989207 CPU: vendor Intel device 806c1
491 13:43:31.992346 CPU: family 06, model 8c, stepping 01
492 13:43:31.992452 Initializing CPU #4
493 13:43:31.995712 CPU: vendor Intel device 806c1
494 13:43:31.999074 CPU: family 06, model 8c, stepping 01
495 13:43:32.002867 Clearing out pending MCEs
496 13:43:32.006794 Clearing out pending MCEs
497 13:43:32.006878 Setting up local APIC...
498 13:43:32.010089 Clearing out pending MCEs
499 13:43:32.013512 Clearing out pending MCEs
500 13:43:32.016807 Setting up local APIC...
501 13:43:32.016891 Setting up local APIC...
502 13:43:32.020071 CPU: vendor Intel device 806c1
503 13:43:32.027106 CPU: family 06, model 8c, stepping 01
504 13:43:32.027190 Clearing out pending MCEs
505 13:43:32.030258 Clearing out pending MCEs
506 13:43:32.033363 Setting up local APIC...
507 13:43:32.036683 apic_id: 0x06 done.
508 13:43:32.036767 Setting up local APIC...
509 13:43:32.040492 CPU: vendor Intel device 806c1
510 13:43:32.043630 CPU: family 06, model 8c, stepping 01
511 13:43:32.046852 apic_id: 0x04 done.
512 13:43:32.049877 Setting up local APIC...
513 13:43:32.049962 apic_id: 0x07 done.
514 13:43:32.056739 microcode: Update skipped, already up-to-date
515 13:43:32.060371 microcode: Update skipped, already up-to-date
516 13:43:32.063572 CPU #7 initialized
517 13:43:32.063684 CPU #3 initialized
518 13:43:32.066527 apic_id: 0x03 done.
519 13:43:32.070184 apic_id: 0x02 done.
520 13:43:32.073476 microcode: Update skipped, already up-to-date
521 13:43:32.077006 microcode: Update skipped, already up-to-date
522 13:43:32.080262 CPU #2 initialized
523 13:43:32.083198 CPU #6 initialized
524 13:43:32.083339 Clearing out pending MCEs
525 13:43:32.086460 apic_id: 0x05 done.
526 13:43:32.089791 microcode: Update skipped, already up-to-date
527 13:43:32.096421 microcode: Update skipped, already up-to-date
528 13:43:32.099766 Setting up local APIC...
529 13:43:32.099877 CPU #4 initialized
530 13:43:32.103110 CPU #5 initialized
531 13:43:32.103194 apic_id: 0x01 done.
532 13:43:32.110287 microcode: Update skipped, already up-to-date
533 13:43:32.112997 CPU #1 initialized
534 13:43:32.116838 bsp_do_flight_plan done after 454 msecs.
535 13:43:32.120041 CPU: frequency set to 4400 MHz
536 13:43:32.120159 Enabling SMIs.
537 13:43:32.126242 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
538 13:43:32.142670 SATAXPCIE1 indicates PCIe NVMe is present
539 13:43:32.145914 Probing TPM: done!
540 13:43:32.149862 Connected to device vid:did:rid of 1ae0:0028:00
541 13:43:32.159675 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
542 13:43:32.163368 Initialized TPM device CR50 revision 0
543 13:43:32.166497 Enabling S0i3.4
544 13:43:32.173434 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 13:43:32.176683 Found a VBT of 8704 bytes after decompression
546 13:43:32.182959 cse_lite: CSE RO boot. HybridStorageMode disabled
547 13:43:32.190135 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 13:43:32.264895 FSPS returned 0
549 13:43:32.268532 Executing Phase 1 of FspMultiPhaseSiInit
550 13:43:32.277858 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 13:43:32.281482 port C0 DISC req: usage 1 usb3 1 usb2 5
552 13:43:32.284979 Raw Buffer output 0 00000511
553 13:43:32.288019 Raw Buffer output 1 00000000
554 13:43:32.291726 pmc_send_ipc_cmd succeeded
555 13:43:32.298611 port C1 DISC req: usage 1 usb3 2 usb2 3
556 13:43:32.298717 Raw Buffer output 0 00000321
557 13:43:32.301773 Raw Buffer output 1 00000000
558 13:43:32.306264 pmc_send_ipc_cmd succeeded
559 13:43:32.310885 Detected 4 core, 8 thread CPU.
560 13:43:32.314111 Detected 4 core, 8 thread CPU.
561 13:43:32.515124 Display FSP Version Info HOB
562 13:43:32.518016 Reference Code - CPU = a.0.4c.31
563 13:43:32.521315 uCode Version = 0.0.0.86
564 13:43:32.524687 TXT ACM version = ff.ff.ff.ffff
565 13:43:32.527959 Reference Code - ME = a.0.4c.31
566 13:43:32.531222 MEBx version = 0.0.0.0
567 13:43:32.534543 ME Firmware Version = Consumer SKU
568 13:43:32.538278 Reference Code - PCH = a.0.4c.31
569 13:43:32.541615 PCH-CRID Status = Disabled
570 13:43:32.545039 PCH-CRID Original Value = ff.ff.ff.ffff
571 13:43:32.548249 PCH-CRID New Value = ff.ff.ff.ffff
572 13:43:32.551270 OPROM - RST - RAID = ff.ff.ff.ffff
573 13:43:32.554436 PCH Hsio Version = 4.0.0.0
574 13:43:32.557813 Reference Code - SA - System Agent = a.0.4c.31
575 13:43:32.561115 Reference Code - MRC = 2.0.0.1
576 13:43:32.564491 SA - PCIe Version = a.0.4c.31
577 13:43:32.567952 SA-CRID Status = Disabled
578 13:43:32.571307 SA-CRID Original Value = 0.0.0.1
579 13:43:32.574734 SA-CRID New Value = 0.0.0.1
580 13:43:32.577983 OPROM - VBIOS = ff.ff.ff.ffff
581 13:43:32.581846 IO Manageability Engine FW Version = 11.1.4.0
582 13:43:32.584948 PHY Build Version = 0.0.0.e0
583 13:43:32.588736 Thunderbolt(TM) FW Version = 0.0.0.0
584 13:43:32.595294 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 13:43:32.595453 ITSS IRQ Polarities Before:
586 13:43:32.598614 IPC0: 0xffffffff
587 13:43:32.601940 IPC1: 0xffffffff
588 13:43:32.602097 IPC2: 0xffffffff
589 13:43:32.605629 IPC3: 0xffffffff
590 13:43:32.605828 ITSS IRQ Polarities After:
591 13:43:32.608659 IPC0: 0xffffffff
592 13:43:32.608866 IPC1: 0xffffffff
593 13:43:32.612240 IPC2: 0xffffffff
594 13:43:32.615531 IPC3: 0xffffffff
595 13:43:32.618865 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 13:43:32.629234 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 13:43:32.642286 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 13:43:32.655433 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 13:43:32.662161 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
600 13:43:32.662542 Enumerating buses...
601 13:43:32.668312 Show all devs... Before device enumeration.
602 13:43:32.668685 Root Device: enabled 1
603 13:43:32.671957 DOMAIN: 0000: enabled 1
604 13:43:32.675292 CPU_CLUSTER: 0: enabled 1
605 13:43:32.678420 PCI: 00:00.0: enabled 1
606 13:43:32.678760 PCI: 00:02.0: enabled 1
607 13:43:32.681877 PCI: 00:04.0: enabled 1
608 13:43:32.685063 PCI: 00:05.0: enabled 1
609 13:43:32.688305 PCI: 00:06.0: enabled 0
610 13:43:32.688679 PCI: 00:07.0: enabled 0
611 13:43:32.691951 PCI: 00:07.1: enabled 0
612 13:43:32.695050 PCI: 00:07.2: enabled 0
613 13:43:32.695480 PCI: 00:07.3: enabled 0
614 13:43:32.698750 PCI: 00:08.0: enabled 1
615 13:43:32.701569 PCI: 00:09.0: enabled 0
616 13:43:32.705006 PCI: 00:0a.0: enabled 0
617 13:43:32.705491 PCI: 00:0d.0: enabled 1
618 13:43:32.708293 PCI: 00:0d.1: enabled 0
619 13:43:32.711774 PCI: 00:0d.2: enabled 0
620 13:43:32.714716 PCI: 00:0d.3: enabled 0
621 13:43:32.715115 PCI: 00:0e.0: enabled 0
622 13:43:32.718330 PCI: 00:10.2: enabled 1
623 13:43:32.721519 PCI: 00:10.6: enabled 0
624 13:43:32.724602 PCI: 00:10.7: enabled 0
625 13:43:32.725002 PCI: 00:12.0: enabled 0
626 13:43:32.728535 PCI: 00:12.6: enabled 0
627 13:43:32.731587 PCI: 00:13.0: enabled 0
628 13:43:32.734388 PCI: 00:14.0: enabled 1
629 13:43:32.734800 PCI: 00:14.1: enabled 0
630 13:43:32.738535 PCI: 00:14.2: enabled 1
631 13:43:32.741140 PCI: 00:14.3: enabled 1
632 13:43:32.741542 PCI: 00:15.0: enabled 1
633 13:43:32.744452 PCI: 00:15.1: enabled 1
634 13:43:32.747777 PCI: 00:15.2: enabled 1
635 13:43:32.751562 PCI: 00:15.3: enabled 1
636 13:43:32.751930 PCI: 00:16.0: enabled 1
637 13:43:32.754783 PCI: 00:16.1: enabled 0
638 13:43:32.758185 PCI: 00:16.2: enabled 0
639 13:43:32.761255 PCI: 00:16.3: enabled 0
640 13:43:32.761649 PCI: 00:16.4: enabled 0
641 13:43:32.764374 PCI: 00:16.5: enabled 0
642 13:43:32.767688 PCI: 00:17.0: enabled 1
643 13:43:32.770869 PCI: 00:19.0: enabled 0
644 13:43:32.771236 PCI: 00:19.1: enabled 1
645 13:43:32.774220 PCI: 00:19.2: enabled 0
646 13:43:32.778241 PCI: 00:1c.0: enabled 1
647 13:43:32.780908 PCI: 00:1c.1: enabled 0
648 13:43:32.781278 PCI: 00:1c.2: enabled 0
649 13:43:32.784150 PCI: 00:1c.3: enabled 0
650 13:43:32.787532 PCI: 00:1c.4: enabled 0
651 13:43:32.787899 PCI: 00:1c.5: enabled 0
652 13:43:32.790805 PCI: 00:1c.6: enabled 1
653 13:43:32.794031 PCI: 00:1c.7: enabled 0
654 13:43:32.798026 PCI: 00:1d.0: enabled 1
655 13:43:32.798436 PCI: 00:1d.1: enabled 0
656 13:43:32.801116 PCI: 00:1d.2: enabled 1
657 13:43:32.804106 PCI: 00:1d.3: enabled 0
658 13:43:32.808092 PCI: 00:1e.0: enabled 1
659 13:43:32.808495 PCI: 00:1e.1: enabled 0
660 13:43:32.810898 PCI: 00:1e.2: enabled 1
661 13:43:32.814089 PCI: 00:1e.3: enabled 1
662 13:43:32.817916 PCI: 00:1f.0: enabled 1
663 13:43:32.818320 PCI: 00:1f.1: enabled 0
664 13:43:32.821038 PCI: 00:1f.2: enabled 1
665 13:43:32.824244 PCI: 00:1f.3: enabled 1
666 13:43:32.824648 PCI: 00:1f.4: enabled 0
667 13:43:32.827412 PCI: 00:1f.5: enabled 1
668 13:43:32.830338 PCI: 00:1f.6: enabled 0
669 13:43:32.834231 PCI: 00:1f.7: enabled 0
670 13:43:32.834316 APIC: 00: enabled 1
671 13:43:32.837390 GENERIC: 0.0: enabled 1
672 13:43:32.840616 GENERIC: 0.0: enabled 1
673 13:43:32.843898 GENERIC: 1.0: enabled 1
674 13:43:32.843983 GENERIC: 0.0: enabled 1
675 13:43:32.847261 GENERIC: 1.0: enabled 1
676 13:43:32.850531 USB0 port 0: enabled 1
677 13:43:32.850616 GENERIC: 0.0: enabled 1
678 13:43:32.853979 USB0 port 0: enabled 1
679 13:43:32.857237 GENERIC: 0.0: enabled 1
680 13:43:32.860402 I2C: 00:1a: enabled 1
681 13:43:32.860487 I2C: 00:31: enabled 1
682 13:43:32.863679 I2C: 00:32: enabled 1
683 13:43:32.867435 I2C: 00:10: enabled 1
684 13:43:32.867519 I2C: 00:15: enabled 1
685 13:43:32.870721 GENERIC: 0.0: enabled 0
686 13:43:32.874147 GENERIC: 1.0: enabled 0
687 13:43:32.874233 GENERIC: 0.0: enabled 1
688 13:43:32.877288 SPI: 00: enabled 1
689 13:43:32.880704 SPI: 00: enabled 1
690 13:43:32.880790 PNP: 0c09.0: enabled 1
691 13:43:32.883954 GENERIC: 0.0: enabled 1
692 13:43:32.887149 USB3 port 0: enabled 1
693 13:43:32.887235 USB3 port 1: enabled 1
694 13:43:32.890526 USB3 port 2: enabled 0
695 13:43:32.893807 USB3 port 3: enabled 0
696 13:43:32.897048 USB2 port 0: enabled 0
697 13:43:32.897133 USB2 port 1: enabled 1
698 13:43:32.900355 USB2 port 2: enabled 1
699 13:43:32.903549 USB2 port 3: enabled 0
700 13:43:32.903635 USB2 port 4: enabled 1
701 13:43:32.906693 USB2 port 5: enabled 0
702 13:43:32.910416 USB2 port 6: enabled 0
703 13:43:32.913403 USB2 port 7: enabled 0
704 13:43:32.913489 USB2 port 8: enabled 0
705 13:43:32.917002 USB2 port 9: enabled 0
706 13:43:32.920412 USB3 port 0: enabled 0
707 13:43:32.920497 USB3 port 1: enabled 1
708 13:43:32.923251 USB3 port 2: enabled 0
709 13:43:32.927012 USB3 port 3: enabled 0
710 13:43:32.929976 GENERIC: 0.0: enabled 1
711 13:43:32.930061 GENERIC: 1.0: enabled 1
712 13:43:32.933603 APIC: 01: enabled 1
713 13:43:32.936559 APIC: 03: enabled 1
714 13:43:32.936644 APIC: 07: enabled 1
715 13:43:32.940207 APIC: 05: enabled 1
716 13:43:32.940292 APIC: 04: enabled 1
717 13:43:32.943256 APIC: 02: enabled 1
718 13:43:32.946939 APIC: 06: enabled 1
719 13:43:32.947025 Compare with tree...
720 13:43:32.949997 Root Device: enabled 1
721 13:43:32.953282 DOMAIN: 0000: enabled 1
722 13:43:32.956559 PCI: 00:00.0: enabled 1
723 13:43:32.956644 PCI: 00:02.0: enabled 1
724 13:43:32.959863 PCI: 00:04.0: enabled 1
725 13:43:32.963058 GENERIC: 0.0: enabled 1
726 13:43:32.966790 PCI: 00:05.0: enabled 1
727 13:43:32.970005 PCI: 00:06.0: enabled 0
728 13:43:32.970090 PCI: 00:07.0: enabled 0
729 13:43:32.973248 GENERIC: 0.0: enabled 1
730 13:43:32.976607 PCI: 00:07.1: enabled 0
731 13:43:32.979816 GENERIC: 1.0: enabled 1
732 13:43:32.983224 PCI: 00:07.2: enabled 0
733 13:43:32.983340 GENERIC: 0.0: enabled 1
734 13:43:32.986587 PCI: 00:07.3: enabled 0
735 13:43:32.989826 GENERIC: 1.0: enabled 1
736 13:43:32.993271 PCI: 00:08.0: enabled 1
737 13:43:32.996561 PCI: 00:09.0: enabled 0
738 13:43:32.996646 PCI: 00:0a.0: enabled 0
739 13:43:32.999867 PCI: 00:0d.0: enabled 1
740 13:43:33.003069 USB0 port 0: enabled 1
741 13:43:33.006413 USB3 port 0: enabled 1
742 13:43:33.009570 USB3 port 1: enabled 1
743 13:43:33.009655 USB3 port 2: enabled 0
744 13:43:33.012813 USB3 port 3: enabled 0
745 13:43:33.016454 PCI: 00:0d.1: enabled 0
746 13:43:33.019565 PCI: 00:0d.2: enabled 0
747 13:43:33.022830 GENERIC: 0.0: enabled 1
748 13:43:33.026229 PCI: 00:0d.3: enabled 0
749 13:43:33.026341 PCI: 00:0e.0: enabled 0
750 13:43:33.029375 PCI: 00:10.2: enabled 1
751 13:43:33.033096 PCI: 00:10.6: enabled 0
752 13:43:33.036112 PCI: 00:10.7: enabled 0
753 13:43:33.036193 PCI: 00:12.0: enabled 0
754 13:43:33.039148 PCI: 00:12.6: enabled 0
755 13:43:33.042834 PCI: 00:13.0: enabled 0
756 13:43:33.045838 PCI: 00:14.0: enabled 1
757 13:43:33.049556 USB0 port 0: enabled 1
758 13:43:33.049632 USB2 port 0: enabled 0
759 13:43:33.052520 USB2 port 1: enabled 1
760 13:43:33.055755 USB2 port 2: enabled 1
761 13:43:33.059041 USB2 port 3: enabled 0
762 13:43:33.062364 USB2 port 4: enabled 1
763 13:43:33.065876 USB2 port 5: enabled 0
764 13:43:33.065966 USB2 port 6: enabled 0
765 13:43:33.069161 USB2 port 7: enabled 0
766 13:43:33.072343 USB2 port 8: enabled 0
767 13:43:33.076087 USB2 port 9: enabled 0
768 13:43:33.079452 USB3 port 0: enabled 0
769 13:43:33.082699 USB3 port 1: enabled 1
770 13:43:33.082785 USB3 port 2: enabled 0
771 13:43:33.086100 USB3 port 3: enabled 0
772 13:43:33.089380 PCI: 00:14.1: enabled 0
773 13:43:33.092723 PCI: 00:14.2: enabled 1
774 13:43:33.095890 PCI: 00:14.3: enabled 1
775 13:43:33.095976 GENERIC: 0.0: enabled 1
776 13:43:33.099183 PCI: 00:15.0: enabled 1
777 13:43:33.102510 I2C: 00:1a: enabled 1
778 13:43:33.105762 I2C: 00:31: enabled 1
779 13:43:33.105848 I2C: 00:32: enabled 1
780 13:43:33.109272 PCI: 00:15.1: enabled 1
781 13:43:33.112579 I2C: 00:10: enabled 1
782 13:43:33.115855 PCI: 00:15.2: enabled 1
783 13:43:33.119264 PCI: 00:15.3: enabled 1
784 13:43:33.119372 PCI: 00:16.0: enabled 1
785 13:43:33.122655 PCI: 00:16.1: enabled 0
786 13:43:33.125672 PCI: 00:16.2: enabled 0
787 13:43:33.129453 PCI: 00:16.3: enabled 0
788 13:43:33.132706 PCI: 00:16.4: enabled 0
789 13:43:33.132820 PCI: 00:16.5: enabled 0
790 13:43:33.135678 PCI: 00:17.0: enabled 1
791 13:43:33.138861 PCI: 00:19.0: enabled 0
792 13:43:33.142507 PCI: 00:19.1: enabled 1
793 13:43:33.145510 I2C: 00:15: enabled 1
794 13:43:33.145647 PCI: 00:19.2: enabled 0
795 13:43:33.149314 PCI: 00:1d.0: enabled 1
796 13:43:33.152457 GENERIC: 0.0: enabled 1
797 13:43:33.155460 PCI: 00:1e.0: enabled 1
798 13:43:33.159379 PCI: 00:1e.1: enabled 0
799 13:43:33.159568 PCI: 00:1e.2: enabled 1
800 13:43:33.162258 SPI: 00: enabled 1
801 13:43:33.165602 PCI: 00:1e.3: enabled 1
802 13:43:33.165967 SPI: 00: enabled 1
803 13:43:33.169348 PCI: 00:1f.0: enabled 1
804 13:43:33.173081 PNP: 0c09.0: enabled 1
805 13:43:33.175956 PCI: 00:1f.1: enabled 0
806 13:43:33.179224 PCI: 00:1f.2: enabled 1
807 13:43:33.179665 GENERIC: 0.0: enabled 1
808 13:43:33.182570 GENERIC: 0.0: enabled 1
809 13:43:33.186105 GENERIC: 1.0: enabled 1
810 13:43:33.237834 PCI: 00:1f.3: enabled 1
811 13:43:33.238397 PCI: 00:1f.4: enabled 0
812 13:43:33.239113 PCI: 00:1f.5: enabled 1
813 13:43:33.239514 PCI: 00:1f.6: enabled 0
814 13:43:33.239849 PCI: 00:1f.7: enabled 0
815 13:43:33.240253 CPU_CLUSTER: 0: enabled 1
816 13:43:33.240660 APIC: 00: enabled 1
817 13:43:33.240993 APIC: 01: enabled 1
818 13:43:33.241535 APIC: 03: enabled 1
819 13:43:33.242086 APIC: 07: enabled 1
820 13:43:33.242421 APIC: 05: enabled 1
821 13:43:33.242762 APIC: 04: enabled 1
822 13:43:33.243064 APIC: 02: enabled 1
823 13:43:33.243390 APIC: 06: enabled 1
824 13:43:33.243690 Root Device scanning...
825 13:43:33.244045 scan_static_bus for Root Device
826 13:43:33.244473 DOMAIN: 0000 enabled
827 13:43:33.245006 CPU_CLUSTER: 0 enabled
828 13:43:33.245423 DOMAIN: 0000 scanning...
829 13:43:33.245729 PCI: pci_scan_bus for bus 00
830 13:43:33.269002 PCI: 00:00.0 [8086/0000] ops
831 13:43:33.269483 PCI: 00:00.0 [8086/9a12] enabled
832 13:43:33.270153 PCI: 00:02.0 [8086/0000] bus ops
833 13:43:33.270523 PCI: 00:02.0 [8086/9a40] enabled
834 13:43:33.271032 PCI: 00:04.0 [8086/0000] bus ops
835 13:43:33.271611 PCI: 00:04.0 [8086/9a03] enabled
836 13:43:33.271960 PCI: 00:05.0 [8086/9a19] enabled
837 13:43:33.272278 PCI: 00:07.0 [0000/0000] hidden
838 13:43:33.272589 PCI: 00:08.0 [8086/9a11] enabled
839 13:43:33.272961 PCI: 00:0a.0 [8086/9a0d] disabled
840 13:43:33.273278 PCI: 00:0d.0 [8086/0000] bus ops
841 13:43:33.275984 PCI: 00:0d.0 [8086/9a13] enabled
842 13:43:33.280009 PCI: 00:14.0 [8086/0000] bus ops
843 13:43:33.283028 PCI: 00:14.0 [8086/a0ed] enabled
844 13:43:33.286053 PCI: 00:14.2 [8086/a0ef] enabled
845 13:43:33.289835 PCI: 00:14.3 [8086/0000] bus ops
846 13:43:33.293210 PCI: 00:14.3 [8086/a0f0] enabled
847 13:43:33.296614 PCI: 00:15.0 [8086/0000] bus ops
848 13:43:33.299881 PCI: 00:15.0 [8086/a0e8] enabled
849 13:43:33.302999 PCI: 00:15.1 [8086/0000] bus ops
850 13:43:33.306117 PCI: 00:15.1 [8086/a0e9] enabled
851 13:43:33.309828 PCI: 00:15.2 [8086/0000] bus ops
852 13:43:33.313104 PCI: 00:15.2 [8086/a0ea] enabled
853 13:43:33.316252 PCI: 00:15.3 [8086/0000] bus ops
854 13:43:33.319655 PCI: 00:15.3 [8086/a0eb] enabled
855 13:43:33.323044 PCI: 00:16.0 [8086/0000] ops
856 13:43:33.326536 PCI: 00:16.0 [8086/a0e0] enabled
857 13:43:33.332866 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 13:43:33.335693 PCI: 00:19.0 [8086/0000] bus ops
859 13:43:33.338908 PCI: 00:19.0 [8086/a0c5] disabled
860 13:43:33.342265 PCI: 00:19.1 [8086/0000] bus ops
861 13:43:33.345448 PCI: 00:19.1 [8086/a0c6] enabled
862 13:43:33.348803 PCI: 00:1d.0 [8086/0000] bus ops
863 13:43:33.352120 PCI: 00:1d.0 [8086/a0b0] enabled
864 13:43:33.355776 PCI: 00:1e.0 [8086/0000] ops
865 13:43:33.358799 PCI: 00:1e.0 [8086/a0a8] enabled
866 13:43:33.362160 PCI: 00:1e.2 [8086/0000] bus ops
867 13:43:33.365728 PCI: 00:1e.2 [8086/a0aa] enabled
868 13:43:33.368974 PCI: 00:1e.3 [8086/0000] bus ops
869 13:43:33.372162 PCI: 00:1e.3 [8086/a0ab] enabled
870 13:43:33.375514 PCI: 00:1f.0 [8086/0000] bus ops
871 13:43:33.378927 PCI: 00:1f.0 [8086/a087] enabled
872 13:43:33.379462 RTC Init
873 13:43:33.382259 Set power on after power failure.
874 13:43:33.385372 Disabling Deep S3
875 13:43:33.389207 Disabling Deep S3
876 13:43:33.389709 Disabling Deep S4
877 13:43:33.392150 Disabling Deep S4
878 13:43:33.392731 Disabling Deep S5
879 13:43:33.395306 Disabling Deep S5
880 13:43:33.398344 PCI: 00:1f.2 [0000/0000] hidden
881 13:43:33.402078 PCI: 00:1f.3 [8086/0000] bus ops
882 13:43:33.405168 PCI: 00:1f.3 [8086/a0c8] enabled
883 13:43:33.408655 PCI: 00:1f.5 [8086/0000] bus ops
884 13:43:33.412117 PCI: 00:1f.5 [8086/a0a4] enabled
885 13:43:33.415443 PCI: Leftover static devices:
886 13:43:33.415966 PCI: 00:10.2
887 13:43:33.418772 PCI: 00:10.6
888 13:43:33.419293 PCI: 00:10.7
889 13:43:33.419694 PCI: 00:06.0
890 13:43:33.422199 PCI: 00:07.1
891 13:43:33.422710 PCI: 00:07.2
892 13:43:33.425603 PCI: 00:07.3
893 13:43:33.426097 PCI: 00:09.0
894 13:43:33.428775 PCI: 00:0d.1
895 13:43:33.429290 PCI: 00:0d.2
896 13:43:33.429796 PCI: 00:0d.3
897 13:43:33.432322 PCI: 00:0e.0
898 13:43:33.432835 PCI: 00:12.0
899 13:43:33.434885 PCI: 00:12.6
900 13:43:33.435471 PCI: 00:13.0
901 13:43:33.435971 PCI: 00:14.1
902 13:43:33.438076 PCI: 00:16.1
903 13:43:33.438619 PCI: 00:16.2
904 13:43:33.442009 PCI: 00:16.3
905 13:43:33.442461 PCI: 00:16.4
906 13:43:33.445398 PCI: 00:16.5
907 13:43:33.445864 PCI: 00:17.0
908 13:43:33.446216 PCI: 00:19.2
909 13:43:33.448565 PCI: 00:1e.1
910 13:43:33.448999 PCI: 00:1f.1
911 13:43:33.452003 PCI: 00:1f.4
912 13:43:33.452430 PCI: 00:1f.6
913 13:43:33.452813 PCI: 00:1f.7
914 13:43:33.455312 PCI: Check your devicetree.cb.
915 13:43:33.458514 PCI: 00:02.0 scanning...
916 13:43:33.461669 scan_generic_bus for PCI: 00:02.0
917 13:43:33.464785 scan_generic_bus for PCI: 00:02.0 done
918 13:43:33.471307 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 13:43:33.474285 PCI: 00:04.0 scanning...
920 13:43:33.477947 scan_generic_bus for PCI: 00:04.0
921 13:43:33.478030 GENERIC: 0.0 enabled
922 13:43:33.484314 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 13:43:33.491025 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 13:43:33.491133 PCI: 00:0d.0 scanning...
925 13:43:33.494306 scan_static_bus for PCI: 00:0d.0
926 13:43:33.497487 USB0 port 0 enabled
927 13:43:33.500728 USB0 port 0 scanning...
928 13:43:33.504382 scan_static_bus for USB0 port 0
929 13:43:33.504465 USB3 port 0 enabled
930 13:43:33.507606 USB3 port 1 enabled
931 13:43:33.510703 USB3 port 2 disabled
932 13:43:33.510787 USB3 port 3 disabled
933 13:43:33.514387 USB3 port 0 scanning...
934 13:43:33.517513 scan_static_bus for USB3 port 0
935 13:43:33.520825 scan_static_bus for USB3 port 0 done
936 13:43:33.527498 scan_bus: bus USB3 port 0 finished in 6 msecs
937 13:43:33.527609 USB3 port 1 scanning...
938 13:43:33.530633 scan_static_bus for USB3 port 1
939 13:43:33.537267 scan_static_bus for USB3 port 1 done
940 13:43:33.540588 scan_bus: bus USB3 port 1 finished in 6 msecs
941 13:43:33.543901 scan_static_bus for USB0 port 0 done
942 13:43:33.547214 scan_bus: bus USB0 port 0 finished in 43 msecs
943 13:43:33.553798 scan_static_bus for PCI: 00:0d.0 done
944 13:43:33.557096 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 13:43:33.560481 PCI: 00:14.0 scanning...
946 13:43:33.563775 scan_static_bus for PCI: 00:14.0
947 13:43:33.566884 USB0 port 0 enabled
948 13:43:33.566992 USB0 port 0 scanning...
949 13:43:33.570664 scan_static_bus for USB0 port 0
950 13:43:33.573859 USB2 port 0 disabled
951 13:43:33.577209 USB2 port 1 enabled
952 13:43:33.577319 USB2 port 2 enabled
953 13:43:33.580046 USB2 port 3 disabled
954 13:43:33.580129 USB2 port 4 enabled
955 13:43:33.583933 USB2 port 5 disabled
956 13:43:33.587174 USB2 port 6 disabled
957 13:43:33.587282 USB2 port 7 disabled
958 13:43:33.590266 USB2 port 8 disabled
959 13:43:33.593689 USB2 port 9 disabled
960 13:43:33.593811 USB3 port 0 disabled
961 13:43:33.597200 USB3 port 1 enabled
962 13:43:33.600361 USB3 port 2 disabled
963 13:43:33.600435 USB3 port 3 disabled
964 13:43:33.603510 USB2 port 1 scanning...
965 13:43:33.606800 scan_static_bus for USB2 port 1
966 13:43:33.610576 scan_static_bus for USB2 port 1 done
967 13:43:33.616863 scan_bus: bus USB2 port 1 finished in 6 msecs
968 13:43:33.616971 USB2 port 2 scanning...
969 13:43:33.620226 scan_static_bus for USB2 port 2
970 13:43:33.623260 scan_static_bus for USB2 port 2 done
971 13:43:33.629846 scan_bus: bus USB2 port 2 finished in 6 msecs
972 13:43:33.633069 USB2 port 4 scanning...
973 13:43:33.636417 scan_static_bus for USB2 port 4
974 13:43:33.639752 scan_static_bus for USB2 port 4 done
975 13:43:33.643840 scan_bus: bus USB2 port 4 finished in 6 msecs
976 13:43:33.646271 USB3 port 1 scanning...
977 13:43:33.649696 scan_static_bus for USB3 port 1
978 13:43:33.652908 scan_static_bus for USB3 port 1 done
979 13:43:33.656764 scan_bus: bus USB3 port 1 finished in 6 msecs
980 13:43:33.663246 scan_static_bus for USB0 port 0 done
981 13:43:33.666519 scan_bus: bus USB0 port 0 finished in 93 msecs
982 13:43:33.669688 scan_static_bus for PCI: 00:14.0 done
983 13:43:33.676244 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
984 13:43:33.676347 PCI: 00:14.3 scanning...
985 13:43:33.679311 scan_static_bus for PCI: 00:14.3
986 13:43:33.683114 GENERIC: 0.0 enabled
987 13:43:33.686519 scan_static_bus for PCI: 00:14.3 done
988 13:43:33.692824 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 13:43:33.692935 PCI: 00:15.0 scanning...
990 13:43:33.696396 scan_static_bus for PCI: 00:15.0
991 13:43:33.699703 I2C: 00:1a enabled
992 13:43:33.702787 I2C: 00:31 enabled
993 13:43:33.702862 I2C: 00:32 enabled
994 13:43:33.706583 scan_static_bus for PCI: 00:15.0 done
995 13:43:33.713071 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 13:43:33.716445 PCI: 00:15.1 scanning...
997 13:43:33.719613 scan_static_bus for PCI: 00:15.1
998 13:43:33.719728 I2C: 00:10 enabled
999 13:43:33.722933 scan_static_bus for PCI: 00:15.1 done
1000 13:43:33.729242 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 13:43:33.732469 PCI: 00:15.2 scanning...
1002 13:43:33.735905 scan_static_bus for PCI: 00:15.2
1003 13:43:33.739231 scan_static_bus for PCI: 00:15.2 done
1004 13:43:33.742421 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 13:43:33.745805 PCI: 00:15.3 scanning...
1006 13:43:33.748974 scan_static_bus for PCI: 00:15.3
1007 13:43:33.752341 scan_static_bus for PCI: 00:15.3 done
1008 13:43:33.758946 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 13:43:33.761999 PCI: 00:19.1 scanning...
1010 13:43:33.765479 scan_static_bus for PCI: 00:19.1
1011 13:43:33.765564 I2C: 00:15 enabled
1012 13:43:33.768857 scan_static_bus for PCI: 00:19.1 done
1013 13:43:33.775437 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 13:43:33.778868 PCI: 00:1d.0 scanning...
1015 13:43:33.782064 do_pci_scan_bridge for PCI: 00:1d.0
1016 13:43:33.785212 PCI: pci_scan_bus for bus 01
1017 13:43:33.788936 PCI: 01:00.0 [15b7/5009] enabled
1018 13:43:33.789020 GENERIC: 0.0 enabled
1019 13:43:33.792072 Enabling Common Clock Configuration
1020 13:43:33.798446 L1 Sub-State supported from root port 29
1021 13:43:33.802121 L1 Sub-State Support = 0x5
1022 13:43:33.802227 CommonModeRestoreTime = 0x28
1023 13:43:33.808200 Power On Value = 0x16, Power On Scale = 0x0
1024 13:43:33.808301 ASPM: Enabled L1
1025 13:43:33.811682 PCIe: Max_Payload_Size adjusted to 128
1026 13:43:33.818558 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 13:43:33.821875 PCI: 00:1e.2 scanning...
1028 13:43:33.825150 scan_generic_bus for PCI: 00:1e.2
1029 13:43:33.825226 SPI: 00 enabled
1030 13:43:33.832321 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 13:43:33.835644 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 13:43:33.838702 PCI: 00:1e.3 scanning...
1033 13:43:33.841839 scan_generic_bus for PCI: 00:1e.3
1034 13:43:33.845132 SPI: 00 enabled
1035 13:43:33.851874 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 13:43:33.855060 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 13:43:33.858388 PCI: 00:1f.0 scanning...
1038 13:43:33.861654 scan_static_bus for PCI: 00:1f.0
1039 13:43:33.864845 PNP: 0c09.0 enabled
1040 13:43:33.864920 PNP: 0c09.0 scanning...
1041 13:43:33.868189 scan_static_bus for PNP: 0c09.0
1042 13:43:33.871313 scan_static_bus for PNP: 0c09.0 done
1043 13:43:33.878426 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 13:43:33.881708 scan_static_bus for PCI: 00:1f.0 done
1045 13:43:33.885104 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 13:43:33.887769 PCI: 00:1f.2 scanning...
1047 13:43:33.891700 scan_static_bus for PCI: 00:1f.2
1048 13:43:33.894906 GENERIC: 0.0 enabled
1049 13:43:33.897981 GENERIC: 0.0 scanning...
1050 13:43:33.901218 scan_static_bus for GENERIC: 0.0
1051 13:43:33.901303 GENERIC: 0.0 enabled
1052 13:43:33.904922 GENERIC: 1.0 enabled
1053 13:43:33.908095 scan_static_bus for GENERIC: 0.0 done
1054 13:43:33.914933 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 13:43:33.918030 scan_static_bus for PCI: 00:1f.2 done
1056 13:43:33.921126 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 13:43:33.924860 PCI: 00:1f.3 scanning...
1058 13:43:33.928150 scan_static_bus for PCI: 00:1f.3
1059 13:43:33.931293 scan_static_bus for PCI: 00:1f.3 done
1060 13:43:33.937780 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 13:43:33.937866 PCI: 00:1f.5 scanning...
1062 13:43:33.944258 scan_generic_bus for PCI: 00:1f.5
1063 13:43:33.948095 scan_generic_bus for PCI: 00:1f.5 done
1064 13:43:33.951331 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 13:43:33.957887 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1066 13:43:33.961197 scan_static_bus for Root Device done
1067 13:43:33.964549 scan_bus: bus Root Device finished in 736 msecs
1068 13:43:33.964636 done
1069 13:43:33.971120 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1070 13:43:33.974420 Chrome EC: UHEPI supported
1071 13:43:33.980888 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 13:43:33.987445 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 13:43:33.990747 SPI flash protection: WPSW=0 SRP0=1
1074 13:43:33.994120 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 13:43:34.000871 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 13:43:34.003807 found VGA at PCI: 00:02.0
1077 13:43:34.007571 Setting up VGA for PCI: 00:02.0
1078 13:43:34.013797 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 13:43:34.017551 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 13:43:34.020819 Allocating resources...
1081 13:43:34.020901 Reading resources...
1082 13:43:34.027258 Root Device read_resources bus 0 link: 0
1083 13:43:34.030358 DOMAIN: 0000 read_resources bus 0 link: 0
1084 13:43:34.037236 PCI: 00:04.0 read_resources bus 1 link: 0
1085 13:43:34.040475 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 13:43:34.046792 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 13:43:34.050630 USB0 port 0 read_resources bus 0 link: 0
1088 13:43:34.053824 USB0 port 0 read_resources bus 0 link: 0 done
1089 13:43:34.060910 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 13:43:34.063577 PCI: 00:14.0 read_resources bus 0 link: 0
1091 13:43:34.070765 USB0 port 0 read_resources bus 0 link: 0
1092 13:43:34.074085 USB0 port 0 read_resources bus 0 link: 0 done
1093 13:43:34.080546 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 13:43:34.083938 PCI: 00:14.3 read_resources bus 0 link: 0
1095 13:43:34.090455 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 13:43:34.093714 PCI: 00:15.0 read_resources bus 0 link: 0
1097 13:43:34.100350 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 13:43:34.103636 PCI: 00:15.1 read_resources bus 0 link: 0
1099 13:43:34.110258 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 13:43:34.113398 PCI: 00:19.1 read_resources bus 0 link: 0
1101 13:43:34.120115 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 13:43:34.123197 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 13:43:34.130085 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 13:43:34.133286 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 13:43:34.140260 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 13:43:34.143267 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 13:43:34.150170 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 13:43:34.153487 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 13:43:34.159861 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 13:43:34.163446 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 13:43:34.166192 GENERIC: 0.0 read_resources bus 0 link: 0
1112 13:43:34.173479 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 13:43:34.177340 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 13:43:34.184401 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 13:43:34.187610 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 13:43:34.194160 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 13:43:34.197405 Root Device read_resources bus 0 link: 0 done
1118 13:43:34.200595 Done reading resources.
1119 13:43:34.207136 Show resources in subtree (Root Device)...After reading.
1120 13:43:34.210627 Root Device child on link 0 DOMAIN: 0000
1121 13:43:34.213840 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 13:43:34.224063 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 13:43:34.234149 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 13:43:34.237223 PCI: 00:00.0
1125 13:43:34.247300 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 13:43:34.253685 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 13:43:34.264022 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 13:43:34.273442 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 13:43:34.283263 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 13:43:34.293262 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 13:43:34.303232 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 13:43:34.309856 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 13:43:34.319797 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 13:43:34.329951 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 13:43:34.339932 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 13:43:34.349658 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 13:43:34.359767 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 13:43:34.366629 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 13:43:34.376214 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 13:43:34.385948 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 13:43:34.396396 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 13:43:34.406055 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 13:43:34.416057 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 13:43:34.425920 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 13:43:34.426005 PCI: 00:02.0
1146 13:43:34.435531 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 13:43:34.445594 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 13:43:34.455742 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 13:43:34.458853 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 13:43:34.469174 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 13:43:34.472467 GENERIC: 0.0
1152 13:43:34.472551 PCI: 00:05.0
1153 13:43:34.482160 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 13:43:34.489094 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 13:43:34.489177 GENERIC: 0.0
1156 13:43:34.492465 PCI: 00:08.0
1157 13:43:34.502130 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 13:43:34.502214 PCI: 00:0a.0
1159 13:43:34.508724 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 13:43:34.518609 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 13:43:34.521853 USB0 port 0 child on link 0 USB3 port 0
1162 13:43:34.521936 USB3 port 0
1163 13:43:34.525158 USB3 port 1
1164 13:43:34.525241 USB3 port 2
1165 13:43:34.528576 USB3 port 3
1166 13:43:34.531772 PCI: 00:14.0 child on link 0 USB0 port 0
1167 13:43:34.541561 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 13:43:34.548498 USB0 port 0 child on link 0 USB2 port 0
1169 13:43:34.548582 USB2 port 0
1170 13:43:34.551717 USB2 port 1
1171 13:43:34.551801 USB2 port 2
1172 13:43:34.554841 USB2 port 3
1173 13:43:34.554924 USB2 port 4
1174 13:43:34.558155 USB2 port 5
1175 13:43:34.558238 USB2 port 6
1176 13:43:34.561812 USB2 port 7
1177 13:43:34.561896 USB2 port 8
1178 13:43:34.564907 USB2 port 9
1179 13:43:34.568584 USB3 port 0
1180 13:43:34.568668 USB3 port 1
1181 13:43:34.571904 USB3 port 2
1182 13:43:34.571986 USB3 port 3
1183 13:43:34.574977 PCI: 00:14.2
1184 13:43:34.584610 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 13:43:34.594714 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 13:43:34.597786 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 13:43:34.608303 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 13:43:34.611559 GENERIC: 0.0
1189 13:43:34.614972 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 13:43:34.624877 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 13:43:34.624961 I2C: 00:1a
1192 13:43:34.628031 I2C: 00:31
1193 13:43:34.628114 I2C: 00:32
1194 13:43:34.634679 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 13:43:34.644425 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 13:43:34.644509 I2C: 00:10
1197 13:43:34.647556 PCI: 00:15.2
1198 13:43:34.657807 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 13:43:34.657919 PCI: 00:15.3
1200 13:43:34.667485 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 13:43:34.670720 PCI: 00:16.0
1202 13:43:34.681094 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 13:43:34.681203 PCI: 00:19.0
1204 13:43:34.684121 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 13:43:34.693846 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 13:43:34.697706 I2C: 00:15
1207 13:43:34.700704 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 13:43:34.710798 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 13:43:34.720419 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 13:43:34.730508 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 13:43:34.730588 GENERIC: 0.0
1212 13:43:34.733751 PCI: 01:00.0
1213 13:43:34.743774 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 13:43:34.753673 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1215 13:43:34.753782 PCI: 00:1e.0
1216 13:43:34.766944 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1217 13:43:34.769878 PCI: 00:1e.2 child on link 0 SPI: 00
1218 13:43:34.780482 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 13:43:34.780593 SPI: 00
1220 13:43:34.783300 PCI: 00:1e.3 child on link 0 SPI: 00
1221 13:43:34.793339 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 13:43:34.796702 SPI: 00
1223 13:43:34.799836 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1224 13:43:34.809957 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1225 13:43:34.810044 PNP: 0c09.0
1226 13:43:34.819854 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1227 13:43:34.823103 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1228 13:43:34.833303 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1229 13:43:34.843069 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1230 13:43:34.846403 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1231 13:43:34.849753 GENERIC: 0.0
1232 13:43:34.849836 GENERIC: 1.0
1233 13:43:34.853053 PCI: 00:1f.3
1234 13:43:34.863473 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 13:43:34.873209 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1236 13:43:34.873298 PCI: 00:1f.5
1237 13:43:34.882914 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 13:43:34.886017 CPU_CLUSTER: 0 child on link 0 APIC: 00
1239 13:43:34.889829 APIC: 00
1240 13:43:34.889933 APIC: 01
1241 13:43:34.892913 APIC: 03
1242 13:43:34.892987 APIC: 07
1243 13:43:34.893062 APIC: 05
1244 13:43:34.895892 APIC: 04
1245 13:43:34.895972 APIC: 02
1246 13:43:34.896035 APIC: 06
1247 13:43:34.906233 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1248 13:43:34.912513 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1249 13:43:34.916159 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1250 13:43:34.922569 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1251 13:43:34.925527 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1252 13:43:34.932332 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1253 13:43:34.938769 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1254 13:43:34.945971 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1255 13:43:34.952054 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1256 13:43:34.962203 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1257 13:43:34.968702 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1258 13:43:34.975419 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1259 13:43:34.982005 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1260 13:43:34.988864 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1261 13:43:34.992075 DOMAIN: 0000: Resource ranges:
1262 13:43:34.995092 * Base: 1000, Size: 800, Tag: 100
1263 13:43:34.998802 * Base: 1900, Size: e700, Tag: 100
1264 13:43:35.005532 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1265 13:43:35.011809 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1266 13:43:35.018795 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1267 13:43:35.025328 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1268 13:43:35.035162 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1269 13:43:35.041847 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1270 13:43:35.048262 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1271 13:43:35.058185 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1272 13:43:35.064777 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1273 13:43:35.071686 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1274 13:43:35.081516 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1275 13:43:35.088072 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1276 13:43:35.094564 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1277 13:43:35.104992 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1278 13:43:35.112016 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1279 13:43:35.118014 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1280 13:43:35.127932 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1281 13:43:35.134524 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1282 13:43:35.141542 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1283 13:43:35.150979 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1284 13:43:35.157615 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1285 13:43:35.164313 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1286 13:43:35.174805 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1287 13:43:35.181486 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1288 13:43:35.187905 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1289 13:43:35.191117 DOMAIN: 0000: Resource ranges:
1290 13:43:35.198117 * Base: 7fc00000, Size: 40400000, Tag: 200
1291 13:43:35.200870 * Base: d0000000, Size: 28000000, Tag: 200
1292 13:43:35.204065 * Base: fa000000, Size: 1000000, Tag: 200
1293 13:43:35.210553 * Base: fb001000, Size: 2fff000, Tag: 200
1294 13:43:35.214457 * Base: fe010000, Size: 2e000, Tag: 200
1295 13:43:35.217340 * Base: fe03f000, Size: d41000, Tag: 200
1296 13:43:35.221172 * Base: fed88000, Size: 8000, Tag: 200
1297 13:43:35.224210 * Base: fed93000, Size: d000, Tag: 200
1298 13:43:35.230954 * Base: feda2000, Size: 1e000, Tag: 200
1299 13:43:35.234205 * Base: fede0000, Size: 1220000, Tag: 200
1300 13:43:35.237185 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1301 13:43:35.247297 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1302 13:43:35.254151 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1303 13:43:35.260298 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1304 13:43:35.267392 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1305 13:43:35.273930 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1306 13:43:35.280435 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1307 13:43:35.287085 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1308 13:43:35.293559 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1309 13:43:35.300415 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1310 13:43:35.306983 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1311 13:43:35.313607 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1312 13:43:35.320353 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1313 13:43:35.326818 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1314 13:43:35.333679 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1315 13:43:35.339995 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1316 13:43:35.346864 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1317 13:43:35.353186 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1318 13:43:35.360052 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1319 13:43:35.366332 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1320 13:43:35.373038 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1321 13:43:35.379624 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1322 13:43:35.386706 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1323 13:43:35.393198 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1324 13:43:35.399856 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1325 13:43:35.402905 PCI: 00:1d.0: Resource ranges:
1326 13:43:35.406120 * Base: 7fc00000, Size: 100000, Tag: 200
1327 13:43:35.413371 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1328 13:43:35.420116 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1329 13:43:35.429570 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1330 13:43:35.436111 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1331 13:43:35.439650 Root Device assign_resources, bus 0 link: 0
1332 13:43:35.446598 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 13:43:35.452804 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1334 13:43:35.462614 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1335 13:43:35.469646 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1336 13:43:35.479312 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1337 13:43:35.482642 PCI: 00:04.0 assign_resources, bus 1 link: 0
1338 13:43:35.489132 PCI: 00:04.0 assign_resources, bus 1 link: 0
1339 13:43:35.495677 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1340 13:43:35.505375 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1341 13:43:35.512584 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1342 13:43:35.515758 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1343 13:43:35.522270 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1344 13:43:35.528499 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1345 13:43:35.535054 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 13:43:35.538453 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 13:43:35.548635 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1348 13:43:35.554887 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1349 13:43:35.565193 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1350 13:43:35.568458 PCI: 00:14.3 assign_resources, bus 0 link: 0
1351 13:43:35.571714 PCI: 00:14.3 assign_resources, bus 0 link: 0
1352 13:43:35.581939 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1353 13:43:35.585053 PCI: 00:15.0 assign_resources, bus 0 link: 0
1354 13:43:35.591480 PCI: 00:15.0 assign_resources, bus 0 link: 0
1355 13:43:35.598056 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1356 13:43:35.601560 PCI: 00:15.1 assign_resources, bus 0 link: 0
1357 13:43:35.608053 PCI: 00:15.1 assign_resources, bus 0 link: 0
1358 13:43:35.614618 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1359 13:43:35.624437 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1360 13:43:35.631025 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1361 13:43:35.640947 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1362 13:43:35.644117 PCI: 00:19.1 assign_resources, bus 0 link: 0
1363 13:43:35.650951 PCI: 00:19.1 assign_resources, bus 0 link: 0
1364 13:43:35.657871 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1365 13:43:35.667350 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 13:43:35.677578 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1367 13:43:35.680784 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 13:43:35.690529 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1369 13:43:35.697364 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1370 13:43:35.703823 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 13:43:35.710242 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1372 13:43:35.713619 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 13:43:35.720623 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1374 13:43:35.727153 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1375 13:43:35.733802 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 13:43:35.736825 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1377 13:43:35.743476 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 13:43:35.746598 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1379 13:43:35.753222 LPC: Trying to open IO window from 800 size 1ff
1380 13:43:35.760050 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1381 13:43:35.770114 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1382 13:43:35.776526 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1383 13:43:35.779513 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 13:43:35.786663 Root Device assign_resources, bus 0 link: 0
1385 13:43:35.789712 Done setting resources.
1386 13:43:35.796254 Show resources in subtree (Root Device)...After assigning values.
1387 13:43:35.799908 Root Device child on link 0 DOMAIN: 0000
1388 13:43:35.803108 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1389 13:43:35.812781 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1390 13:43:35.823432 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1391 13:43:35.823516 PCI: 00:00.0
1392 13:43:35.833223 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1393 13:43:35.842630 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1394 13:43:35.853148 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1395 13:43:35.862447 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1396 13:43:35.872381 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1397 13:43:35.879284 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1398 13:43:35.888913 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1399 13:43:35.898910 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1400 13:43:35.909006 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1401 13:43:35.918641 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1402 13:43:35.929079 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1403 13:43:35.935311 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1404 13:43:35.945111 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1405 13:43:35.955126 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1406 13:43:35.965059 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1407 13:43:35.975286 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1408 13:43:35.985095 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1409 13:43:35.991743 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1410 13:43:36.001457 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1411 13:43:36.011760 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1412 13:43:36.014853 PCI: 00:02.0
1413 13:43:36.025144 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1414 13:43:36.034923 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1415 13:43:36.044764 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1416 13:43:36.047977 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1417 13:43:36.057901 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1418 13:43:36.061840 GENERIC: 0.0
1419 13:43:36.061946 PCI: 00:05.0
1420 13:43:36.074816 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1421 13:43:36.078065 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1422 13:43:36.081242 GENERIC: 0.0
1423 13:43:36.081344 PCI: 00:08.0
1424 13:43:36.091497 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1425 13:43:36.094474 PCI: 00:0a.0
1426 13:43:36.097981 PCI: 00:0d.0 child on link 0 USB0 port 0
1427 13:43:36.107713 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1428 13:43:36.110930 USB0 port 0 child on link 0 USB3 port 0
1429 13:43:36.114600 USB3 port 0
1430 13:43:36.117799 USB3 port 1
1431 13:43:36.117889 USB3 port 2
1432 13:43:36.120898 USB3 port 3
1433 13:43:36.124209 PCI: 00:14.0 child on link 0 USB0 port 0
1434 13:43:36.134444 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1435 13:43:36.137627 USB0 port 0 child on link 0 USB2 port 0
1436 13:43:36.140902 USB2 port 0
1437 13:43:36.140984 USB2 port 1
1438 13:43:36.144205 USB2 port 2
1439 13:43:36.147638 USB2 port 3
1440 13:43:36.147722 USB2 port 4
1441 13:43:36.151016 USB2 port 5
1442 13:43:36.151098 USB2 port 6
1443 13:43:36.154054 USB2 port 7
1444 13:43:36.154162 USB2 port 8
1445 13:43:36.157518 USB2 port 9
1446 13:43:36.157600 USB3 port 0
1447 13:43:36.160884 USB3 port 1
1448 13:43:36.160967 USB3 port 2
1449 13:43:36.164110 USB3 port 3
1450 13:43:36.164193 PCI: 00:14.2
1451 13:43:36.177378 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1452 13:43:36.187112 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1453 13:43:36.190376 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1454 13:43:36.200403 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1455 13:43:36.203678 GENERIC: 0.0
1456 13:43:36.206884 PCI: 00:15.0 child on link 0 I2C: 00:1a
1457 13:43:36.216926 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1458 13:43:36.220180 I2C: 00:1a
1459 13:43:36.220262 I2C: 00:31
1460 13:43:36.220328 I2C: 00:32
1461 13:43:36.226852 PCI: 00:15.1 child on link 0 I2C: 00:10
1462 13:43:36.237031 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1463 13:43:36.237128 I2C: 00:10
1464 13:43:36.240116 PCI: 00:15.2
1465 13:43:36.250246 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1466 13:43:36.253503 PCI: 00:15.3
1467 13:43:36.263096 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1468 13:43:36.263179 PCI: 00:16.0
1469 13:43:36.273565 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1470 13:43:36.276956 PCI: 00:19.0
1471 13:43:36.280222 PCI: 00:19.1 child on link 0 I2C: 00:15
1472 13:43:36.289944 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1473 13:43:36.293307 I2C: 00:15
1474 13:43:36.296371 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1475 13:43:36.306335 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1476 13:43:36.316340 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1477 13:43:36.329550 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1478 13:43:36.329642 GENERIC: 0.0
1479 13:43:36.332523 PCI: 01:00.0
1480 13:43:36.342718 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1481 13:43:36.352960 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1482 13:43:36.353045 PCI: 00:1e.0
1483 13:43:36.365818 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 13:43:36.369104 PCI: 00:1e.2 child on link 0 SPI: 00
1485 13:43:36.379532 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 13:43:36.379617 SPI: 00
1487 13:43:36.386033 PCI: 00:1e.3 child on link 0 SPI: 00
1488 13:43:36.395775 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 13:43:36.395861 SPI: 00
1490 13:43:36.399027 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 13:43:36.408773 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 13:43:36.412130 PNP: 0c09.0
1493 13:43:36.419004 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 13:43:36.425909 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 13:43:36.432435 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 13:43:36.442062 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 13:43:36.448768 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 13:43:36.448851 GENERIC: 0.0
1499 13:43:36.451972 GENERIC: 1.0
1500 13:43:36.452055 PCI: 00:1f.3
1501 13:43:36.462088 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 13:43:36.472454 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 13:43:36.475785 PCI: 00:1f.5
1504 13:43:36.484952 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 13:43:36.488326 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 13:43:36.491672 APIC: 00
1507 13:43:36.491755 APIC: 01
1508 13:43:36.494935 APIC: 03
1509 13:43:36.495018 APIC: 07
1510 13:43:36.495083 APIC: 05
1511 13:43:36.498248 APIC: 04
1512 13:43:36.498330 APIC: 02
1513 13:43:36.498396 APIC: 06
1514 13:43:36.501422 Done allocating resources.
1515 13:43:36.508468 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1516 13:43:36.515250 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 13:43:36.518572 Configure GPIOs for I2S audio on UP4.
1518 13:43:36.524820 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 13:43:36.528495 Enabling resources...
1520 13:43:36.531614 PCI: 00:00.0 subsystem <- 8086/9a12
1521 13:43:36.534842 PCI: 00:00.0 cmd <- 06
1522 13:43:36.538143 PCI: 00:02.0 subsystem <- 8086/9a40
1523 13:43:36.541414 PCI: 00:02.0 cmd <- 03
1524 13:43:36.544538 PCI: 00:04.0 subsystem <- 8086/9a03
1525 13:43:36.547718 PCI: 00:04.0 cmd <- 02
1526 13:43:36.551334 PCI: 00:05.0 subsystem <- 8086/9a19
1527 13:43:36.551442 PCI: 00:05.0 cmd <- 02
1528 13:43:36.557832 PCI: 00:08.0 subsystem <- 8086/9a11
1529 13:43:36.557917 PCI: 00:08.0 cmd <- 06
1530 13:43:36.561067 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 13:43:36.564661 PCI: 00:0d.0 cmd <- 02
1532 13:43:36.567645 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 13:43:36.571258 PCI: 00:14.0 cmd <- 02
1534 13:43:36.574638 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 13:43:36.577871 PCI: 00:14.2 cmd <- 02
1536 13:43:36.581185 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 13:43:36.584536 PCI: 00:14.3 cmd <- 02
1538 13:43:36.587851 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 13:43:36.591091 PCI: 00:15.0 cmd <- 02
1540 13:43:36.593862 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 13:43:36.597867 PCI: 00:15.1 cmd <- 02
1542 13:43:36.600959 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 13:43:36.601042 PCI: 00:15.2 cmd <- 02
1544 13:43:36.607308 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 13:43:36.607427 PCI: 00:15.3 cmd <- 02
1546 13:43:36.610780 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 13:43:36.614049 PCI: 00:16.0 cmd <- 02
1548 13:43:36.617294 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 13:43:36.621116 PCI: 00:19.1 cmd <- 02
1550 13:43:36.624412 PCI: 00:1d.0 bridge ctrl <- 0013
1551 13:43:36.627672 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 13:43:36.630461 PCI: 00:1d.0 cmd <- 06
1553 13:43:36.634047 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 13:43:36.637087 PCI: 00:1e.0 cmd <- 06
1555 13:43:36.640670 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 13:43:36.643847 PCI: 00:1e.2 cmd <- 06
1557 13:43:36.647129 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 13:43:36.650518 PCI: 00:1e.3 cmd <- 02
1559 13:43:36.653675 PCI: 00:1f.0 subsystem <- 8086/a087
1560 13:43:36.653757 PCI: 00:1f.0 cmd <- 407
1561 13:43:36.660909 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 13:43:36.660993 PCI: 00:1f.3 cmd <- 02
1563 13:43:36.664078 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 13:43:36.667309 PCI: 00:1f.5 cmd <- 406
1565 13:43:36.671716 PCI: 01:00.0 cmd <- 02
1566 13:43:36.676662 done.
1567 13:43:36.679721 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 13:43:36.682936 Initializing devices...
1569 13:43:36.686170 Root Device init
1570 13:43:36.689448 Chrome EC: Set SMI mask to 0x0000000000000000
1571 13:43:36.696106 Chrome EC: clear events_b mask to 0x0000000000000000
1572 13:43:36.702762 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 13:43:36.706127 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 13:43:36.713159 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 13:43:36.719902 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 13:43:36.723153 fw_config match found: DB_USB=USB3_ACTIVE
1577 13:43:36.729391 Configure Right Type-C port orientation for retimer
1578 13:43:36.732509 Root Device init finished in 43 msecs
1579 13:43:36.736296 PCI: 00:00.0 init
1580 13:43:36.739514 CPU TDP = 9 Watts
1581 13:43:36.739616 CPU PL1 = 9 Watts
1582 13:43:36.742589 CPU PL2 = 40 Watts
1583 13:43:36.745693 CPU PL4 = 83 Watts
1584 13:43:36.749267 PCI: 00:00.0 init finished in 8 msecs
1585 13:43:36.749361 PCI: 00:02.0 init
1586 13:43:36.752355 GMA: Found VBT in CBFS
1587 13:43:36.755742 GMA: Found valid VBT in CBFS
1588 13:43:36.762636 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 13:43:36.768951 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 13:43:36.772718 PCI: 00:02.0 init finished in 18 msecs
1591 13:43:36.775947 PCI: 00:05.0 init
1592 13:43:36.779251 PCI: 00:05.0 init finished in 0 msecs
1593 13:43:36.782355 PCI: 00:08.0 init
1594 13:43:36.785416 PCI: 00:08.0 init finished in 0 msecs
1595 13:43:36.789265 PCI: 00:14.0 init
1596 13:43:36.792396 PCI: 00:14.0 init finished in 0 msecs
1597 13:43:36.795644 PCI: 00:14.2 init
1598 13:43:36.798825 PCI: 00:14.2 init finished in 0 msecs
1599 13:43:36.798900 PCI: 00:15.0 init
1600 13:43:36.802143 I2C bus 0 version 0x3230302a
1601 13:43:36.808891 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 13:43:36.811869 PCI: 00:15.0 init finished in 6 msecs
1603 13:43:36.811946 PCI: 00:15.1 init
1604 13:43:36.815249 I2C bus 1 version 0x3230302a
1605 13:43:36.818645 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 13:43:36.821892 PCI: 00:15.1 init finished in 6 msecs
1607 13:43:36.825832 PCI: 00:15.2 init
1608 13:43:36.828489 I2C bus 2 version 0x3230302a
1609 13:43:36.832281 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 13:43:36.835558 PCI: 00:15.2 init finished in 6 msecs
1611 13:43:36.838726 PCI: 00:15.3 init
1612 13:43:36.841786 I2C bus 3 version 0x3230302a
1613 13:43:36.845453 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 13:43:36.848706 PCI: 00:15.3 init finished in 6 msecs
1615 13:43:36.851846 PCI: 00:16.0 init
1616 13:43:36.855452 PCI: 00:16.0 init finished in 0 msecs
1617 13:43:36.858640 PCI: 00:19.1 init
1618 13:43:36.858715 I2C bus 5 version 0x3230302a
1619 13:43:36.865045 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 13:43:36.868267 PCI: 00:19.1 init finished in 6 msecs
1621 13:43:36.868367 PCI: 00:1d.0 init
1622 13:43:36.871538 Initializing PCH PCIe bridge.
1623 13:43:36.875372 PCI: 00:1d.0 init finished in 3 msecs
1624 13:43:36.879731 PCI: 00:1f.0 init
1625 13:43:36.883005 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 13:43:36.889500 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 13:43:36.889583 IOAPIC: ID = 0x02
1628 13:43:36.892667 IOAPIC: Dumping registers
1629 13:43:36.895887 reg 0x0000: 0x02000000
1630 13:43:36.899150 reg 0x0001: 0x00770020
1631 13:43:36.899233 reg 0x0002: 0x00000000
1632 13:43:36.905829 PCI: 00:1f.0 init finished in 21 msecs
1633 13:43:36.905933 PCI: 00:1f.2 init
1634 13:43:36.909139 Disabling ACPI via APMC.
1635 13:43:36.913823 APMC done.
1636 13:43:36.917716 PCI: 00:1f.2 init finished in 6 msecs
1637 13:43:36.929101 PCI: 01:00.0 init
1638 13:43:36.932421 PCI: 01:00.0 init finished in 0 msecs
1639 13:43:36.935700 PNP: 0c09.0 init
1640 13:43:36.942802 Google Chrome EC uptime: 8.286 seconds
1641 13:43:36.946063 Google Chrome AP resets since EC boot: 1
1642 13:43:36.949153 Google Chrome most recent AP reset causes:
1643 13:43:36.952842 0.453: 32775 shutdown: entering G3
1644 13:43:36.959075 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1645 13:43:36.962351 PNP: 0c09.0 init finished in 24 msecs
1646 13:43:36.969376 Devices initialized
1647 13:43:36.972661 Show all devs... After init.
1648 13:43:36.975939 Root Device: enabled 1
1649 13:43:36.976022 DOMAIN: 0000: enabled 1
1650 13:43:36.979165 CPU_CLUSTER: 0: enabled 1
1651 13:43:36.982292 PCI: 00:00.0: enabled 1
1652 13:43:36.986031 PCI: 00:02.0: enabled 1
1653 13:43:36.986115 PCI: 00:04.0: enabled 1
1654 13:43:36.989363 PCI: 00:05.0: enabled 1
1655 13:43:36.992688 PCI: 00:06.0: enabled 0
1656 13:43:36.995911 PCI: 00:07.0: enabled 0
1657 13:43:36.996013 PCI: 00:07.1: enabled 0
1658 13:43:36.999183 PCI: 00:07.2: enabled 0
1659 13:43:37.002497 PCI: 00:07.3: enabled 0
1660 13:43:37.005828 PCI: 00:08.0: enabled 1
1661 13:43:37.005907 PCI: 00:09.0: enabled 0
1662 13:43:37.009152 PCI: 00:0a.0: enabled 0
1663 13:43:37.012437 PCI: 00:0d.0: enabled 1
1664 13:43:37.015694 PCI: 00:0d.1: enabled 0
1665 13:43:37.015765 PCI: 00:0d.2: enabled 0
1666 13:43:37.019026 PCI: 00:0d.3: enabled 0
1667 13:43:37.022086 PCI: 00:0e.0: enabled 0
1668 13:43:37.022169 PCI: 00:10.2: enabled 1
1669 13:43:37.025373 PCI: 00:10.6: enabled 0
1670 13:43:37.028701 PCI: 00:10.7: enabled 0
1671 13:43:37.032036 PCI: 00:12.0: enabled 0
1672 13:43:37.032120 PCI: 00:12.6: enabled 0
1673 13:43:37.036037 PCI: 00:13.0: enabled 0
1674 13:43:37.038669 PCI: 00:14.0: enabled 1
1675 13:43:37.042690 PCI: 00:14.1: enabled 0
1676 13:43:37.042773 PCI: 00:14.2: enabled 1
1677 13:43:37.045343 PCI: 00:14.3: enabled 1
1678 13:43:37.049109 PCI: 00:15.0: enabled 1
1679 13:43:37.052291 PCI: 00:15.1: enabled 1
1680 13:43:37.052375 PCI: 00:15.2: enabled 1
1681 13:43:37.055491 PCI: 00:15.3: enabled 1
1682 13:43:37.059524 PCI: 00:16.0: enabled 1
1683 13:43:37.059608 PCI: 00:16.1: enabled 0
1684 13:43:37.061978 PCI: 00:16.2: enabled 0
1685 13:43:37.065821 PCI: 00:16.3: enabled 0
1686 13:43:37.068816 PCI: 00:16.4: enabled 0
1687 13:43:37.068899 PCI: 00:16.5: enabled 0
1688 13:43:37.072223 PCI: 00:17.0: enabled 0
1689 13:43:37.075472 PCI: 00:19.0: enabled 0
1690 13:43:37.078789 PCI: 00:19.1: enabled 1
1691 13:43:37.078891 PCI: 00:19.2: enabled 0
1692 13:43:37.082041 PCI: 00:1c.0: enabled 1
1693 13:43:37.085121 PCI: 00:1c.1: enabled 0
1694 13:43:37.088327 PCI: 00:1c.2: enabled 0
1695 13:43:37.088403 PCI: 00:1c.3: enabled 0
1696 13:43:37.092245 PCI: 00:1c.4: enabled 0
1697 13:43:37.095582 PCI: 00:1c.5: enabled 0
1698 13:43:37.098757 PCI: 00:1c.6: enabled 1
1699 13:43:37.098840 PCI: 00:1c.7: enabled 0
1700 13:43:37.101877 PCI: 00:1d.0: enabled 1
1701 13:43:37.105132 PCI: 00:1d.1: enabled 0
1702 13:43:37.105218 PCI: 00:1d.2: enabled 1
1703 13:43:37.108898 PCI: 00:1d.3: enabled 0
1704 13:43:37.112239 PCI: 00:1e.0: enabled 1
1705 13:43:37.115530 PCI: 00:1e.1: enabled 0
1706 13:43:37.115613 PCI: 00:1e.2: enabled 1
1707 13:43:37.118512 PCI: 00:1e.3: enabled 1
1708 13:43:37.121807 PCI: 00:1f.0: enabled 1
1709 13:43:37.124894 PCI: 00:1f.1: enabled 0
1710 13:43:37.124976 PCI: 00:1f.2: enabled 1
1711 13:43:37.128251 PCI: 00:1f.3: enabled 1
1712 13:43:37.132126 PCI: 00:1f.4: enabled 0
1713 13:43:37.134835 PCI: 00:1f.5: enabled 1
1714 13:43:37.134917 PCI: 00:1f.6: enabled 0
1715 13:43:37.138150 PCI: 00:1f.7: enabled 0
1716 13:43:37.141388 APIC: 00: enabled 1
1717 13:43:37.141471 GENERIC: 0.0: enabled 1
1718 13:43:37.144768 GENERIC: 0.0: enabled 1
1719 13:43:37.148037 GENERIC: 1.0: enabled 1
1720 13:43:37.151469 GENERIC: 0.0: enabled 1
1721 13:43:37.151553 GENERIC: 1.0: enabled 1
1722 13:43:37.154590 USB0 port 0: enabled 1
1723 13:43:37.157986 GENERIC: 0.0: enabled 1
1724 13:43:37.161753 USB0 port 0: enabled 1
1725 13:43:37.161836 GENERIC: 0.0: enabled 1
1726 13:43:37.164834 I2C: 00:1a: enabled 1
1727 13:43:37.167911 I2C: 00:31: enabled 1
1728 13:43:37.167994 I2C: 00:32: enabled 1
1729 13:43:37.171765 I2C: 00:10: enabled 1
1730 13:43:37.174756 I2C: 00:15: enabled 1
1731 13:43:37.174839 GENERIC: 0.0: enabled 0
1732 13:43:37.177832 GENERIC: 1.0: enabled 0
1733 13:43:37.181660 GENERIC: 0.0: enabled 1
1734 13:43:37.181743 SPI: 00: enabled 1
1735 13:43:37.184917 SPI: 00: enabled 1
1736 13:43:37.188264 PNP: 0c09.0: enabled 1
1737 13:43:37.188347 GENERIC: 0.0: enabled 1
1738 13:43:37.191481 USB3 port 0: enabled 1
1739 13:43:37.194674 USB3 port 1: enabled 1
1740 13:43:37.197903 USB3 port 2: enabled 0
1741 13:43:37.198015 USB3 port 3: enabled 0
1742 13:43:37.201606 USB2 port 0: enabled 0
1743 13:43:37.204704 USB2 port 1: enabled 1
1744 13:43:37.204787 USB2 port 2: enabled 1
1745 13:43:37.207981 USB2 port 3: enabled 0
1746 13:43:37.211266 USB2 port 4: enabled 1
1747 13:43:37.215053 USB2 port 5: enabled 0
1748 13:43:37.215134 USB2 port 6: enabled 0
1749 13:43:37.218183 USB2 port 7: enabled 0
1750 13:43:37.221309 USB2 port 8: enabled 0
1751 13:43:37.221393 USB2 port 9: enabled 0
1752 13:43:37.224593 USB3 port 0: enabled 0
1753 13:43:37.227787 USB3 port 1: enabled 1
1754 13:43:37.227870 USB3 port 2: enabled 0
1755 13:43:37.231195 USB3 port 3: enabled 0
1756 13:43:37.234390 GENERIC: 0.0: enabled 1
1757 13:43:37.237749 GENERIC: 1.0: enabled 1
1758 13:43:37.237826 APIC: 01: enabled 1
1759 13:43:37.241098 APIC: 03: enabled 1
1760 13:43:37.241181 APIC: 07: enabled 1
1761 13:43:37.244366 APIC: 05: enabled 1
1762 13:43:37.247805 APIC: 04: enabled 1
1763 13:43:37.247886 APIC: 02: enabled 1
1764 13:43:37.251022 APIC: 06: enabled 1
1765 13:43:37.254284 PCI: 01:00.0: enabled 1
1766 13:43:37.258121 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1767 13:43:37.264538 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1768 13:43:37.267729 ELOG: NV offset 0xf30000 size 0x1000
1769 13:43:37.274505 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1770 13:43:37.280919 ELOG: Event(17) added with size 13 at 2023-06-07 13:43:25 UTC
1771 13:43:37.287897 ELOG: Event(92) added with size 9 at 2023-06-07 13:43:25 UTC
1772 13:43:37.294324 ELOG: Event(93) added with size 9 at 2023-06-07 13:43:25 UTC
1773 13:43:37.301016 ELOG: Event(9E) added with size 10 at 2023-06-07 13:43:25 UTC
1774 13:43:37.307602 ELOG: Event(9F) added with size 14 at 2023-06-07 13:43:25 UTC
1775 13:43:37.313670 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1776 13:43:37.320353 ELOG: Event(A1) added with size 10 at 2023-06-07 13:43:25 UTC
1777 13:43:37.327681 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1778 13:43:37.334130 ELOG: Event(A0) added with size 9 at 2023-06-07 13:43:25 UTC
1779 13:43:37.336919 elog_add_boot_reason: Logged dev mode boot
1780 13:43:37.343579 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1781 13:43:37.343664 Finalize devices...
1782 13:43:37.347467 Devices finalized
1783 13:43:37.353994 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1784 13:43:37.357218 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1785 13:43:37.363232 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1786 13:43:37.367121 ME: HFSTS1 : 0x80030055
1787 13:43:37.373378 ME: HFSTS2 : 0x30280116
1788 13:43:37.376600 ME: HFSTS3 : 0x00000050
1789 13:43:37.379656 ME: HFSTS4 : 0x00004000
1790 13:43:37.386616 ME: HFSTS5 : 0x00000000
1791 13:43:37.389740 ME: HFSTS6 : 0x40400006
1792 13:43:37.393278 ME: Manufacturing Mode : YES
1793 13:43:37.396613 ME: SPI Protection Mode Enabled : NO
1794 13:43:37.402999 ME: FW Partition Table : OK
1795 13:43:37.406499 ME: Bringup Loader Failure : NO
1796 13:43:37.409737 ME: Firmware Init Complete : NO
1797 13:43:37.412962 ME: Boot Options Present : NO
1798 13:43:37.416563 ME: Update In Progress : NO
1799 13:43:37.419635 ME: D0i3 Support : YES
1800 13:43:37.422738 ME: Low Power State Enabled : NO
1801 13:43:37.426467 ME: CPU Replaced : YES
1802 13:43:37.432906 ME: CPU Replacement Valid : YES
1803 13:43:37.436076 ME: Current Working State : 5
1804 13:43:37.439881 ME: Current Operation State : 1
1805 13:43:37.443056 ME: Current Operation Mode : 3
1806 13:43:37.446299 ME: Error Code : 0
1807 13:43:37.449691 ME: Enhanced Debug Mode : NO
1808 13:43:37.452983 ME: CPU Debug Disabled : YES
1809 13:43:37.456327 ME: TXT Support : NO
1810 13:43:37.462778 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1811 13:43:37.469582 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1812 13:43:37.473083 CBFS: 'fallback/slic' not found.
1813 13:43:37.479735 ACPI: Writing ACPI tables at 76b01000.
1814 13:43:37.479816 ACPI: * FACS
1815 13:43:37.482775 ACPI: * DSDT
1816 13:43:37.486228 Ramoops buffer: 0x100000@0x76a00000.
1817 13:43:37.489374 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1818 13:43:37.496154 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1819 13:43:37.499672 Google Chrome EC: version:
1820 13:43:37.502481 ro: voema_v2.0.10114-a447f03e46
1821 13:43:37.505843 rw: voema_v2.0.10132-7b2059e3bc
1822 13:43:37.505926 running image: 2
1823 13:43:37.512416 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1824 13:43:37.517100 ACPI: * FADT
1825 13:43:37.517183 SCI is IRQ9
1826 13:43:37.524014 ACPI: added table 1/32, length now 40
1827 13:43:37.524099 ACPI: * SSDT
1828 13:43:37.527229 Found 1 CPU(s) with 8 core(s) each.
1829 13:43:37.533980 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1830 13:43:37.537759 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1831 13:43:37.540282 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1832 13:43:37.543979 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1833 13:43:37.550406 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1834 13:43:37.557064 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1835 13:43:37.560239 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1836 13:43:37.566712 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1837 13:43:37.573865 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1838 13:43:37.577134 \_SB.PCI0.RP09: Added StorageD3Enable property
1839 13:43:37.583828 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1840 13:43:37.586874 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1841 13:43:37.594276 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1842 13:43:37.596703 PS2K: Passing 80 keymaps to kernel
1843 13:43:37.603529 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1844 13:43:37.610451 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1845 13:43:37.617149 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1846 13:43:37.623808 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1847 13:43:37.630172 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1848 13:43:37.636589 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1849 13:43:37.643520 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1850 13:43:37.649859 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1851 13:43:37.653066 ACPI: added table 2/32, length now 44
1852 13:43:37.656861 ACPI: * MCFG
1853 13:43:37.660044 ACPI: added table 3/32, length now 48
1854 13:43:37.660163 ACPI: * TPM2
1855 13:43:37.663334 TPM2 log created at 0x769f0000
1856 13:43:37.666505 ACPI: added table 4/32, length now 52
1857 13:43:37.669749 ACPI: * MADT
1858 13:43:37.669856 SCI is IRQ9
1859 13:43:37.673017 ACPI: added table 5/32, length now 56
1860 13:43:37.676390 current = 76b09850
1861 13:43:37.676494 ACPI: * DMAR
1862 13:43:37.682954 ACPI: added table 6/32, length now 60
1863 13:43:37.686137 ACPI: added table 7/32, length now 64
1864 13:43:37.686239 ACPI: * HPET
1865 13:43:37.689570 ACPI: added table 8/32, length now 68
1866 13:43:37.693262 ACPI: done.
1867 13:43:37.696563 ACPI tables: 35216 bytes.
1868 13:43:37.696663 smbios_write_tables: 769ef000
1869 13:43:37.699595 EC returned error result code 3
1870 13:43:37.703257 Couldn't obtain OEM name from CBI
1871 13:43:37.708375 Create SMBIOS type 16
1872 13:43:37.711214 Create SMBIOS type 17
1873 13:43:37.714868 GENERIC: 0.0 (WIFI Device)
1874 13:43:37.717818 SMBIOS tables: 1734 bytes.
1875 13:43:37.721008 Writing table forward entry at 0x00000500
1876 13:43:37.727497 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1877 13:43:37.731249 Writing coreboot table at 0x76b25000
1878 13:43:37.737733 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1879 13:43:37.740939 1. 0000000000001000-000000000009ffff: RAM
1880 13:43:37.744360 2. 00000000000a0000-00000000000fffff: RESERVED
1881 13:43:37.750911 3. 0000000000100000-00000000769eefff: RAM
1882 13:43:37.754040 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1883 13:43:37.761304 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1884 13:43:37.767693 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1885 13:43:37.770944 7. 0000000077000000-000000007fbfffff: RESERVED
1886 13:43:37.777677 8. 00000000c0000000-00000000cfffffff: RESERVED
1887 13:43:37.780998 9. 00000000f8000000-00000000f9ffffff: RESERVED
1888 13:43:37.784301 10. 00000000fb000000-00000000fb000fff: RESERVED
1889 13:43:37.790910 11. 00000000fe000000-00000000fe00ffff: RESERVED
1890 13:43:37.794140 12. 00000000fed80000-00000000fed87fff: RESERVED
1891 13:43:37.800527 13. 00000000fed90000-00000000fed92fff: RESERVED
1892 13:43:37.803769 14. 00000000feda0000-00000000feda1fff: RESERVED
1893 13:43:37.810846 15. 00000000fedc0000-00000000feddffff: RESERVED
1894 13:43:37.813857 16. 0000000100000000-00000004803fffff: RAM
1895 13:43:37.817078 Passing 4 GPIOs to payload:
1896 13:43:37.820719 NAME | PORT | POLARITY | VALUE
1897 13:43:37.826883 lid | undefined | high | high
1898 13:43:37.833524 power | undefined | high | low
1899 13:43:37.837337 oprom | undefined | high | low
1900 13:43:37.843863 EC in RW | 0x000000e5 | high | high
1901 13:43:37.850375 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1902 13:43:37.853778 coreboot table: 1576 bytes.
1903 13:43:37.857006 IMD ROOT 0. 0x76fff000 0x00001000
1904 13:43:37.860370 IMD SMALL 1. 0x76ffe000 0x00001000
1905 13:43:37.863527 FSP MEMORY 2. 0x76c4e000 0x003b0000
1906 13:43:37.866611 VPD 3. 0x76c4d000 0x00000367
1907 13:43:37.870303 RO MCACHE 4. 0x76c4c000 0x00000fdc
1908 13:43:37.873661 CONSOLE 5. 0x76c2c000 0x00020000
1909 13:43:37.876892 FMAP 6. 0x76c2b000 0x00000578
1910 13:43:37.883445 TIME STAMP 7. 0x76c2a000 0x00000910
1911 13:43:37.886896 VBOOT WORK 8. 0x76c16000 0x00014000
1912 13:43:37.890267 ROMSTG STCK 9. 0x76c15000 0x00001000
1913 13:43:37.893592 AFTER CAR 10. 0x76c0a000 0x0000b000
1914 13:43:37.896871 RAMSTAGE 11. 0x76b97000 0x00073000
1915 13:43:37.900004 REFCODE 12. 0x76b42000 0x00055000
1916 13:43:37.903256 SMM BACKUP 13. 0x76b32000 0x00010000
1917 13:43:37.906493 4f444749 14. 0x76b30000 0x00002000
1918 13:43:37.909781 EXT VBT15. 0x76b2d000 0x0000219f
1919 13:43:37.916500 COREBOOT 16. 0x76b25000 0x00008000
1920 13:43:37.919610 ACPI 17. 0x76b01000 0x00024000
1921 13:43:37.922898 ACPI GNVS 18. 0x76b00000 0x00001000
1922 13:43:37.926755 RAMOOPS 19. 0x76a00000 0x00100000
1923 13:43:37.929909 TPM2 TCGLOG20. 0x769f0000 0x00010000
1924 13:43:37.933121 SMBIOS 21. 0x769ef000 0x00000800
1925 13:43:37.936462 IMD small region:
1926 13:43:37.939716 IMD ROOT 0. 0x76ffec00 0x00000400
1927 13:43:37.942823 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1928 13:43:37.946041 POWER STATE 2. 0x76ffeb80 0x00000044
1929 13:43:37.953249 ROMSTAGE 3. 0x76ffeb60 0x00000004
1930 13:43:37.955931 MEM INFO 4. 0x76ffe980 0x000001e0
1931 13:43:37.959793 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1932 13:43:37.962956 MTRR: Physical address space:
1933 13:43:37.969389 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1934 13:43:37.975776 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1935 13:43:37.982942 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1936 13:43:37.989964 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1937 13:43:37.996292 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1938 13:43:38.002739 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1939 13:43:38.009352 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1940 13:43:38.012520 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 13:43:38.015710 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 13:43:38.019529 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 13:43:38.026082 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 13:43:38.029377 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 13:43:38.032440 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 13:43:38.035681 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 13:43:38.038851 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 13:43:38.045962 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 13:43:38.048942 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 13:43:38.052212 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 13:43:38.056842 call enable_fixed_mtrr()
1952 13:43:38.060119 CPU physical address size: 39 bits
1953 13:43:38.066610 MTRR: default type WB/UC MTRR counts: 6/7.
1954 13:43:38.069883 MTRR: WB selected as default type.
1955 13:43:38.076774 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 13:43:38.079998 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 13:43:38.086493 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 13:43:38.093174 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1959 13:43:38.099740 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1960 13:43:38.106313 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1961 13:43:38.113514 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 13:43:38.116948 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 13:43:38.120128 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 13:43:38.123294 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 13:43:38.130158 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 13:43:38.133377 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 13:43:38.136347 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 13:43:38.140165 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 13:43:38.146844 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 13:43:38.150035 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 13:43:38.153135 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 13:43:38.153233
1973 13:43:38.157109 MTRR check
1974 13:43:38.160861 call enable_fixed_mtrr()
1975 13:43:38.160964 Fixed MTRRs : Enabled
1976 13:43:38.163495 Variable MTRRs: Enabled
1977 13:43:38.163596
1978 13:43:38.166707 CPU physical address size: 39 bits
1979 13:43:38.174562 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
1980 13:43:38.177703 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 13:43:38.184331 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 13:43:38.187756 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 13:43:38.191653 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 13:43:38.194958 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 13:43:38.201347 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 13:43:38.204745 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 13:43:38.208058 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 13:43:38.211337 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 13:43:38.217978 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 13:43:38.221203 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 13:43:38.224378 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 13:43:38.231534 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 13:43:38.234858 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 13:43:38.238060 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 13:43:38.241226 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 13:43:38.247982 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 13:43:38.251769 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 13:43:38.254838 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 13:43:38.258039 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 13:43:38.264890 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 13:43:38.268249 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 13:43:38.271717 call enable_fixed_mtrr()
2003 13:43:38.274915 call enable_fixed_mtrr()
2004 13:43:38.278075 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 13:43:38.281352 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 13:43:38.288273 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 13:43:38.291315 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 13:43:38.294470 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 13:43:38.297657 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 13:43:38.300808 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 13:43:38.307526 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 13:43:38.310877 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 13:43:38.314774 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 13:43:38.317920 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 13:43:38.324519 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 13:43:38.327667 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 13:43:38.331009 call enable_fixed_mtrr()
2018 13:43:38.334319 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 13:43:38.341062 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 13:43:38.344359 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 13:43:38.347843 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 13:43:38.350928 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 13:43:38.357735 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 13:43:38.360807 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 13:43:38.363908 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 13:43:38.367741 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 13:43:38.371944 CPU physical address size: 39 bits
2028 13:43:38.378542 call enable_fixed_mtrr()
2029 13:43:38.381825 CPU physical address size: 39 bits
2030 13:43:38.385162 CPU physical address size: 39 bits
2031 13:43:38.391652 CPU physical address size: 39 bits
2032 13:43:38.396941 Checking cr50 for pending updates
2033 13:43:38.397050 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 13:43:38.400719 MTRR: Fixed MSR 0x250 0x0606060606060606
2035 13:43:38.406993 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 13:43:38.410815 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 13:43:38.413440 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 13:43:38.417421 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 13:43:38.423442 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 13:43:38.426842 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 13:43:38.430182 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 13:43:38.433942 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 13:43:38.440529 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 13:43:38.443958 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 13:43:38.450535 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 13:43:38.453789 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 13:43:38.456962 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 13:43:38.460218 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 13:43:38.466710 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 13:43:38.470397 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 13:43:38.473367 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 13:43:38.476589 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 13:43:38.483228 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 13:43:38.486362 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 13:43:38.490179 call enable_fixed_mtrr()
2056 13:43:38.493540 call enable_fixed_mtrr()
2057 13:43:38.497384 Reading cr50 TPM mode
2058 13:43:38.497496 CPU physical address size: 39 bits
2059 13:43:38.504676 CPU physical address size: 39 bits
2060 13:43:38.511480 BS: BS_PAYLOAD_LOAD entry times (exec / console): 318 / 6 ms
2061 13:43:38.517854 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2062 13:43:38.521118 Checking segment from ROM address 0xffc02b38
2063 13:43:38.527690 Checking segment from ROM address 0xffc02b54
2064 13:43:38.531150 Loading segment from ROM address 0xffc02b38
2065 13:43:38.534438 code (compression=0)
2066 13:43:38.540860 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2067 13:43:38.550921 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2068 13:43:38.551029 it's not compressed!
2069 13:43:38.692974 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2070 13:43:38.699197 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2071 13:43:38.706363 Loading segment from ROM address 0xffc02b54
2072 13:43:38.709610 Entry Point 0x30000000
2073 13:43:38.709712 Loaded segments
2074 13:43:38.716088 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2075 13:43:38.761504 Finalizing chipset.
2076 13:43:38.764638 Finalizing SMM.
2077 13:43:38.764743 APMC done.
2078 13:43:38.771081 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2079 13:43:38.774441 mp_park_aps done after 0 msecs.
2080 13:43:38.777748 Jumping to boot code at 0x30000000(0x76b25000)
2081 13:43:38.788122 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2082 13:43:38.788207
2083 13:43:38.788273
2084 13:43:38.791157
2085 13:43:38.791258 Starting depthcharge on Voema...
2086 13:43:38.791668 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2087 13:43:38.791777 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2088 13:43:38.791872 Setting prompt string to ['volteer:']
2089 13:43:38.791951 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2090 13:43:38.794330
2091 13:43:38.801177 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2092 13:43:38.801256
2093 13:43:38.807943 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2094 13:43:38.808078
2095 13:43:38.814219 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2096 13:43:38.814308
2097 13:43:38.817480 Failed to find eMMC card reader
2098 13:43:38.817566
2099 13:43:38.817632 Wipe memory regions:
2100 13:43:38.821236
2101 13:43:38.824028 [0x00000000001000, 0x000000000a0000)
2102 13:43:38.824107
2103 13:43:38.827256 [0x00000000100000, 0x00000030000000)
2104 13:43:38.861332
2105 13:43:38.864678 [0x00000032662db0, 0x000000769ef000)
2106 13:43:38.913029
2107 13:43:38.916117 [0x00000100000000, 0x00000480400000)
2108 13:43:39.524676
2109 13:43:39.527756 ec_init: CrosEC protocol v3 supported (256, 256)
2110 13:43:39.959906
2111 13:43:39.960066 R8152: Initializing
2112 13:43:39.960140
2113 13:43:39.963190 Version 6 (ocp_data = 5c30)
2114 13:43:39.963313
2115 13:43:39.966406 R8152: Done initializing
2116 13:43:39.966483
2117 13:43:39.969504 Adding net device
2118 13:43:40.271011
2119 13:43:40.274174 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2120 13:43:40.274267
2121 13:43:40.274332
2122 13:43:40.274392
2123 13:43:40.277707 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 13:43:40.378058 volteer: tftpboot 192.168.201.1 10624700/tftp-deploy-h7m8kbxt/kernel/bzImage 10624700/tftp-deploy-h7m8kbxt/kernel/cmdline 10624700/tftp-deploy-h7m8kbxt/ramdisk/ramdisk.cpio.gz
2126 13:43:40.378221 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2127 13:43:40.378327 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2128 13:43:40.383006 tftpboot 192.168.201.1 10624700/tftp-deploy-h7m8kbxt/kernel/bzIploy-h7m8kbxt/kernel/cmdline 10624700/tftp-deploy-h7m8kbxt/ramdisk/ramdisk.cpio.gz
2129 13:43:40.383143
2130 13:43:40.383211 Waiting for link
2131 13:43:40.586654
2132 13:43:40.586788 done.
2133 13:43:40.586868
2134 13:43:40.586932 MAC: 00:24:32:30:7e:22
2135 13:43:40.586994
2136 13:43:40.589993 Sending DHCP discover... done.
2137 13:43:40.590109
2138 13:43:40.593135 Waiting for reply... done.
2139 13:43:40.593246
2140 13:43:40.596377 Sending DHCP request... done.
2141 13:43:40.596495
2142 13:43:40.599717 Waiting for reply... done.
2143 13:43:40.599824
2144 13:43:40.603008 My ip is 192.168.201.21
2145 13:43:40.603121
2146 13:43:40.606176 The DHCP server ip is 192.168.201.1
2147 13:43:40.606281
2148 13:43:40.609551 TFTP server IP predefined by user: 192.168.201.1
2149 13:43:40.609664
2150 13:43:40.616213 Bootfile predefined by user: 10624700/tftp-deploy-h7m8kbxt/kernel/bzImage
2151 13:43:40.616322
2152 13:43:40.619635 Sending tftp read request... done.
2153 13:43:40.622604
2154 13:43:40.626898 Waiting for the transfer...
2155 13:43:40.627009
2156 13:43:41.158520 00000000 ################################################################
2157 13:43:41.158680
2158 13:43:41.698128 00080000 ################################################################
2159 13:43:41.698289
2160 13:43:42.263982 00100000 ################################################################
2161 13:43:42.264115
2162 13:43:42.828407 00180000 ################################################################
2163 13:43:42.828567
2164 13:43:43.350475 00200000 ################################################################
2165 13:43:43.350612
2166 13:43:43.876614 00280000 ################################################################
2167 13:43:43.876755
2168 13:43:44.407491 00300000 ################################################################
2169 13:43:44.407624
2170 13:43:45.066443 00380000 ################################################################
2171 13:43:45.067082
2172 13:43:45.743523 00400000 ################################################################
2173 13:43:45.743665
2174 13:43:46.362449 00480000 ################################################################
2175 13:43:46.362950
2176 13:43:47.039891 00500000 ################################################################
2177 13:43:47.040564
2178 13:43:47.737993 00580000 ################################################################
2179 13:43:47.738491
2180 13:43:48.344035 00600000 ################################################################
2181 13:43:48.344557
2182 13:43:49.001446 00680000 ################################################################
2183 13:43:49.001986
2184 13:43:49.659569 00700000 ################################################################
2185 13:43:49.660164
2186 13:43:49.868628 00780000 #################### done.
2187 13:43:49.868768
2188 13:43:49.871797 The bootfile was 8028048 bytes long.
2189 13:43:49.871883
2190 13:43:49.875040 Sending tftp read request... done.
2191 13:43:49.875126
2192 13:43:49.878518 Waiting for the transfer...
2193 13:43:49.878609
2194 13:43:50.520211 00000000 ################################################################
2195 13:43:50.520352
2196 13:43:51.081208 00080000 ################################################################
2197 13:43:51.081374
2198 13:43:51.614980 00100000 ################################################################
2199 13:43:51.615119
2200 13:43:52.168618 00180000 ################################################################
2201 13:43:52.168800
2202 13:43:52.719543 00200000 ################################################################
2203 13:43:52.719679
2204 13:43:53.265271 00280000 ################################################################
2205 13:43:53.265410
2206 13:43:53.803070 00300000 ################################################################
2207 13:43:53.803204
2208 13:43:54.352985 00380000 ################################################################
2209 13:43:54.353124
2210 13:43:54.901236 00400000 ################################################################
2211 13:43:54.901380
2212 13:43:55.431565 00480000 ################################################################
2213 13:43:55.431706
2214 13:43:55.990745 00500000 ################################################################
2215 13:43:55.990881
2216 13:43:56.572500 00580000 ################################################################
2217 13:43:56.572637
2218 13:43:57.134805 00600000 ################################################################
2219 13:43:57.134938
2220 13:43:57.703321 00680000 ################################################################
2221 13:43:57.703495
2222 13:43:58.268901 00700000 ################################################################
2223 13:43:58.269038
2224 13:43:58.833844 00780000 ################################################################
2225 13:43:58.833980
2226 13:43:59.317834 00800000 ######################################################## done.
2227 13:43:59.317972
2228 13:43:59.321586 Sending tftp read request... done.
2229 13:43:59.321673
2230 13:43:59.324883 Waiting for the transfer...
2231 13:43:59.324993
2232 13:43:59.328023 00000000 # done.
2233 13:43:59.328128
2234 13:43:59.334700 Command line loaded dynamically from TFTP file: 10624700/tftp-deploy-h7m8kbxt/kernel/cmdline
2235 13:43:59.334784
2236 13:43:59.347758 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2237 13:43:59.353295
2238 13:43:59.356457 Shutting down all USB controllers.
2239 13:43:59.356539
2240 13:43:59.356602 Removing current net device
2241 13:43:59.356662
2242 13:43:59.359736 Finalizing coreboot
2243 13:43:59.359817
2244 13:43:59.366145 Exiting depthcharge with code 4 at timestamp: 29146307
2245 13:43:59.366227
2246 13:43:59.366292
2247 13:43:59.366352 Starting kernel ...
2248 13:43:59.366409
2249 13:43:59.366465
2250 13:43:59.366830 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2251 13:43:59.366928 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2252 13:43:59.367001 Setting prompt string to ['Linux version [0-9]']
2253 13:43:59.367097 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2254 13:43:59.367197 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2256 13:48:23.367202 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2258 13:48:23.367543 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2260 13:48:23.367793 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2263 13:48:23.368204 end: 2 depthcharge-action (duration 00:05:00) [common]
2265 13:48:23.368445 Cleaning after the job
2266 13:48:23.368531 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624700/tftp-deploy-h7m8kbxt/ramdisk
2267 13:48:23.369647 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624700/tftp-deploy-h7m8kbxt/kernel
2268 13:48:23.370610 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624700/tftp-deploy-h7m8kbxt/modules
2269 13:48:23.370930 start: 5.1 power-off (timeout 00:00:30) [common]
2270 13:48:23.371089 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2271 13:48:23.446677 >> Command sent successfully.
2272 13:48:23.448993 Returned 0 in 0 seconds
2273 13:48:23.549401 end: 5.1 power-off (duration 00:00:00) [common]
2275 13:48:23.549730 start: 5.2 read-feedback (timeout 00:10:00) [common]
2276 13:48:23.550029 Listened to connection for namespace 'common' for up to 1s
2277 13:48:24.550964 Finalising connection for namespace 'common'
2278 13:48:24.551136 Disconnecting from shell: Finalise
2279 13:48:24.551219
2280 13:48:24.651558 end: 5.2 read-feedback (duration 00:00:01) [common]
2281 13:48:24.651786 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624700
2282 13:48:24.665391 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624700
2283 13:48:24.665541 JobError: Your job cannot terminate cleanly.