Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 13:43:17.858747 lava-dispatcher, installed at version: 2023.05.1
2 13:43:17.858969 start: 0 validate
3 13:43:17.859112 Start time: 2023-06-07 13:43:17.859104+00:00 (UTC)
4 13:43:17.859246 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:43:17.859387 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:43:18.127974 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:43:18.128191 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:43:18.394252 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:43:18.394450 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:43:23.788821 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:43:23.789003 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
12 13:43:24.056306 validate duration: 6.20
14 13:43:24.056579 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:43:24.056698 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:43:24.056794 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:43:24.056925 Not decompressing ramdisk as can be used compressed.
18 13:43:24.057020 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/initrd.cpio.gz
19 13:43:24.057092 saving as /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/ramdisk/initrd.cpio.gz
20 13:43:24.057159 total size: 5432865 (5MB)
21 13:43:24.585449 progress 0% (0MB)
22 13:43:24.587241 progress 5% (0MB)
23 13:43:24.588823 progress 10% (0MB)
24 13:43:24.590362 progress 15% (0MB)
25 13:43:24.592106 progress 20% (1MB)
26 13:43:24.593660 progress 25% (1MB)
27 13:43:24.595208 progress 30% (1MB)
28 13:43:24.596900 progress 35% (1MB)
29 13:43:24.598418 progress 40% (2MB)
30 13:43:24.599935 progress 45% (2MB)
31 13:43:24.601470 progress 50% (2MB)
32 13:43:24.603151 progress 55% (2MB)
33 13:43:24.604665 progress 60% (3MB)
34 13:43:24.606170 progress 65% (3MB)
35 13:43:24.607864 progress 70% (3MB)
36 13:43:24.609364 progress 75% (3MB)
37 13:43:24.610880 progress 80% (4MB)
38 13:43:24.612394 progress 85% (4MB)
39 13:43:24.614068 progress 90% (4MB)
40 13:43:24.615576 progress 95% (4MB)
41 13:43:24.617095 progress 100% (5MB)
42 13:43:24.617326 5MB downloaded in 0.56s (9.25MB/s)
43 13:43:24.617484 end: 1.1.1 http-download (duration 00:00:01) [common]
45 13:43:24.617757 end: 1.1 download-retry (duration 00:00:01) [common]
46 13:43:24.617853 start: 1.2 download-retry (timeout 00:09:59) [common]
47 13:43:24.617947 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 13:43:24.618084 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
49 13:43:24.618160 saving as /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/kernel/bzImage
50 13:43:24.618229 total size: 8028048 (7MB)
51 13:43:24.618295 No compression specified
52 13:43:24.619473 progress 0% (0MB)
53 13:43:24.621823 progress 5% (0MB)
54 13:43:24.624176 progress 10% (0MB)
55 13:43:24.626465 progress 15% (1MB)
56 13:43:24.628760 progress 20% (1MB)
57 13:43:24.631226 progress 25% (1MB)
58 13:43:24.633515 progress 30% (2MB)
59 13:43:24.635798 progress 35% (2MB)
60 13:43:24.638081 progress 40% (3MB)
61 13:43:24.640537 progress 45% (3MB)
62 13:43:24.642796 progress 50% (3MB)
63 13:43:24.645053 progress 55% (4MB)
64 13:43:24.647290 progress 60% (4MB)
65 13:43:24.649716 progress 65% (5MB)
66 13:43:24.651945 progress 70% (5MB)
67 13:43:24.654186 progress 75% (5MB)
68 13:43:24.656427 progress 80% (6MB)
69 13:43:24.658846 progress 85% (6MB)
70 13:43:24.661119 progress 90% (6MB)
71 13:43:24.663335 progress 95% (7MB)
72 13:43:24.665633 progress 100% (7MB)
73 13:43:24.665900 7MB downloaded in 0.05s (160.62MB/s)
74 13:43:24.666053 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:43:24.666306 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:43:24.666402 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:43:24.666500 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:43:24.666649 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/full.rootfs.tar.xz
80 13:43:24.666766 saving as /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/nfsrootfs/full.rootfs.tar
81 13:43:24.666837 total size: 133381488 (127MB)
82 13:43:24.666904 Using unxz to decompress xz
83 13:43:24.670719 progress 0% (0MB)
84 13:43:25.044005 progress 5% (6MB)
85 13:43:25.432503 progress 10% (12MB)
86 13:43:25.747079 progress 15% (19MB)
87 13:43:25.953976 progress 20% (25MB)
88 13:43:26.225873 progress 25% (31MB)
89 13:43:26.632441 progress 30% (38MB)
90 13:43:27.035409 progress 35% (44MB)
91 13:43:27.510103 progress 40% (50MB)
92 13:43:27.974401 progress 45% (57MB)
93 13:43:28.402487 progress 50% (63MB)
94 13:43:28.841669 progress 55% (69MB)
95 13:43:29.270930 progress 60% (76MB)
96 13:43:29.696194 progress 65% (82MB)
97 13:43:30.132898 progress 70% (89MB)
98 13:43:30.558829 progress 75% (95MB)
99 13:43:31.089085 progress 80% (101MB)
100 13:43:31.602468 progress 85% (108MB)
101 13:43:31.923912 progress 90% (114MB)
102 13:43:32.332213 progress 95% (120MB)
103 13:43:32.772561 progress 100% (127MB)
104 13:43:32.778543 127MB downloaded in 8.11s (15.68MB/s)
105 13:43:32.778864 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:43:32.779155 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:43:32.779257 start: 1.4 download-retry (timeout 00:09:51) [common]
109 13:43:32.779356 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 13:43:32.779525 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
111 13:43:32.779606 saving as /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/modules/modules.tar
112 13:43:32.779675 total size: 255828 (0MB)
113 13:43:32.779745 Using unxz to decompress xz
114 13:43:32.783514 progress 12% (0MB)
115 13:43:32.783939 progress 25% (0MB)
116 13:43:32.784192 progress 38% (0MB)
117 13:43:32.785662 progress 51% (0MB)
118 13:43:32.787759 progress 64% (0MB)
119 13:43:32.789818 progress 76% (0MB)
120 13:43:32.791907 progress 89% (0MB)
121 13:43:32.793957 progress 100% (0MB)
122 13:43:32.800485 0MB downloaded in 0.02s (11.73MB/s)
123 13:43:32.800747 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:43:32.801034 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:43:32.801140 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 13:43:32.801248 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 13:43:35.048876 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10624722/extract-nfsrootfs-vq71h39m
129 13:43:35.049099 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 13:43:35.049214 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 13:43:35.049402 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4
132 13:43:35.049551 makedir: /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin
133 13:43:35.049676 makedir: /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/tests
134 13:43:35.049783 makedir: /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/results
135 13:43:35.049893 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-add-keys
136 13:43:35.050073 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-add-sources
137 13:43:35.050222 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-background-process-start
138 13:43:35.050359 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-background-process-stop
139 13:43:35.050503 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-common-functions
140 13:43:35.050646 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-echo-ipv4
141 13:43:35.050780 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-install-packages
142 13:43:35.050917 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-installed-packages
143 13:43:35.051049 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-os-build
144 13:43:35.051181 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-probe-channel
145 13:43:35.051339 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-probe-ip
146 13:43:35.051613 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-target-ip
147 13:43:35.051774 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-target-mac
148 13:43:35.051923 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-target-storage
149 13:43:35.052064 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-test-case
150 13:43:35.052197 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-test-event
151 13:43:35.052330 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-test-feedback
152 13:43:35.052463 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-test-raise
153 13:43:35.052615 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-test-reference
154 13:43:35.052750 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-test-runner
155 13:43:35.052892 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-test-set
156 13:43:35.053053 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-test-shell
157 13:43:35.053197 Updating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-install-packages (oe)
158 13:43:35.053389 Updating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/bin/lava-installed-packages (oe)
159 13:43:35.053543 Creating /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/environment
160 13:43:35.053649 LAVA metadata
161 13:43:35.053726 - LAVA_JOB_ID=10624722
162 13:43:35.053796 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:43:35.053921 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 13:43:35.053994 skipped lava-vland-overlay
165 13:43:35.054076 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:43:35.054161 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 13:43:35.054227 skipped lava-multinode-overlay
168 13:43:35.054306 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:43:35.054390 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 13:43:35.054476 Loading test definitions
171 13:43:35.054589 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 13:43:35.054667 Using /lava-10624722 at stage 0
173 13:43:35.054981 uuid=10624722_1.5.2.3.1 testdef=None
174 13:43:35.055077 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 13:43:35.055177 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 13:43:35.055778 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 13:43:35.056058 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 13:43:35.056777 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 13:43:35.057038 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 13:43:35.057758 runner path: /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/0/tests/0_dmesg test_uuid 10624722_1.5.2.3.1
183 13:43:35.057935 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 13:43:35.058180 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 13:43:35.058257 Using /lava-10624722 at stage 1
187 13:43:35.058599 uuid=10624722_1.5.2.3.5 testdef=None
188 13:43:35.058695 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 13:43:35.058796 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 13:43:35.059319 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 13:43:35.059585 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 13:43:35.060293 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 13:43:35.060553 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 13:43:35.061237 runner path: /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/1/tests/1_bootrr test_uuid 10624722_1.5.2.3.5
197 13:43:35.061423 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 13:43:35.061655 Creating lava-test-runner.conf files
200 13:43:35.061724 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/0 for stage 0
201 13:43:35.061819 - 0_dmesg
202 13:43:35.061903 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624722/lava-overlay-fpsf59n4/lava-10624722/1 for stage 1
203 13:43:35.062000 - 1_bootrr
204 13:43:35.062110 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 13:43:35.062203 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 13:43:35.070666 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 13:43:35.070782 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 13:43:35.070894 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 13:43:35.070998 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 13:43:35.071094 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 13:43:35.215509 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 13:43:35.215901 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 13:43:35.216035 extracting modules file /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624722/extract-nfsrootfs-vq71h39m
214 13:43:35.230504 extracting modules file /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624722/extract-overlay-ramdisk-kowvav2p/ramdisk
215 13:43:35.244803 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 13:43:35.244949 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 13:43:35.245048 [common] Applying overlay to NFS
218 13:43:35.245127 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624722/compress-overlay-8w8bq6eu/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624722/extract-nfsrootfs-vq71h39m
219 13:43:35.253797 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 13:43:35.253923 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 13:43:35.254022 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 13:43:35.254124 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 13:43:35.254212 Building ramdisk /var/lib/lava/dispatcher/tmp/10624722/extract-overlay-ramdisk-kowvav2p/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624722/extract-overlay-ramdisk-kowvav2p/ramdisk
224 13:43:35.326487 >> 26221 blocks
225 13:43:35.947475 rename /var/lib/lava/dispatcher/tmp/10624722/extract-overlay-ramdisk-kowvav2p/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/ramdisk/ramdisk.cpio.gz
226 13:43:35.947925 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 13:43:35.948061 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 13:43:35.948170 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 13:43:35.948271 No mkimage arch provided, not using FIT.
230 13:43:35.948369 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 13:43:35.948464 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 13:43:35.948578 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 13:43:35.948679 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 13:43:35.948765 No LXC device requested
235 13:43:35.948855 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 13:43:35.948953 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 13:43:35.949048 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 13:43:35.949131 Checking files for TFTP limit of 4294967296 bytes.
239 13:43:35.949564 end: 1 tftp-deploy (duration 00:00:12) [common]
240 13:43:35.949680 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 13:43:35.949781 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 13:43:35.949921 substitutions:
243 13:43:35.949999 - {DTB}: None
244 13:43:35.950069 - {INITRD}: 10624722/tftp-deploy-m1w3kqel/ramdisk/ramdisk.cpio.gz
245 13:43:35.950137 - {KERNEL}: 10624722/tftp-deploy-m1w3kqel/kernel/bzImage
246 13:43:35.950204 - {LAVA_MAC}: None
247 13:43:35.950268 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10624722/extract-nfsrootfs-vq71h39m
248 13:43:35.950333 - {NFS_SERVER_IP}: 192.168.201.1
249 13:43:35.950396 - {PRESEED_CONFIG}: None
250 13:43:35.950459 - {PRESEED_LOCAL}: None
251 13:43:35.950521 - {RAMDISK}: 10624722/tftp-deploy-m1w3kqel/ramdisk/ramdisk.cpio.gz
252 13:43:35.950584 - {ROOT_PART}: None
253 13:43:35.950646 - {ROOT}: None
254 13:43:35.950708 - {SERVER_IP}: 192.168.201.1
255 13:43:35.950769 - {TEE}: None
256 13:43:35.950845 Parsed boot commands:
257 13:43:35.950907 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 13:43:35.951097 Parsed boot commands: tftpboot 192.168.201.1 10624722/tftp-deploy-m1w3kqel/kernel/bzImage 10624722/tftp-deploy-m1w3kqel/kernel/cmdline 10624722/tftp-deploy-m1w3kqel/ramdisk/ramdisk.cpio.gz
259 13:43:35.951197 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 13:43:35.951293 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 13:43:35.951398 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 13:43:35.951504 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 13:43:35.951586 Not connected, no need to disconnect.
264 13:43:35.951671 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 13:43:35.951767 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 13:43:35.951841 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-2'
267 13:43:35.955323 Setting prompt string to ['lava-test: # ']
268 13:43:35.955699 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 13:43:35.955820 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 13:43:35.955925 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 13:43:35.956029 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 13:43:35.956236 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=reboot'
273 13:43:41.100352 >> Command sent successfully.
274 13:43:41.109868 Returned 0 in 5 seconds
275 13:43:41.211083 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 13:43:41.212809 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 13:43:41.213443 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 13:43:41.213955 Setting prompt string to 'Starting depthcharge on Magolor...'
280 13:43:41.214362 Changing prompt to 'Starting depthcharge on Magolor...'
281 13:43:41.214814 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
282 13:43:41.216446 [Enter `^Ec?' for help]
283 13:43:42.372701
284 13:43:42.373243
285 13:43:42.380504 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
286 13:43:42.387023 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
287 13:43:42.390314 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
288 13:43:42.394348 CPU: AES supported, TXT NOT supported, VT supported
289 13:43:42.400669 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
290 13:43:42.404250 PCH: device id 4d87 (rev 01) is Jasperlake Super
291 13:43:42.411203 IGD: device id 4e55 (rev 01) is Jasperlake GT4
292 13:43:42.414388 VBOOT: Loading verstage.
293 13:43:42.417801 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 13:43:42.424129 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
295 13:43:42.427843 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 13:43:42.435215 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
297 13:43:42.435733
298 13:43:42.436163
299 13:43:42.444921 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
300 13:43:42.460772 Probing TPM: . done!
301 13:43:42.464483 TPM ready after 0 ms
302 13:43:42.467345 Connected to device vid:did:rid of 1ae0:0028:00
303 13:43:42.478221 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
304 13:43:42.486565 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 13:43:42.536987 Initialized TPM device CR50 revision 0
306 13:43:42.555372 tlcl_send_startup: Startup return code is 0
307 13:43:42.555947 TPM: setup succeeded
308 13:43:42.565506 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 13:43:42.579257 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 13:43:42.594360 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 13:43:42.604664 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 13:43:42.607802 Chrome EC: UHEPI supported
313 13:43:42.611104 Phase 1
314 13:43:42.614769 FMAP: area GBB found @ c05000 (12288 bytes)
315 13:43:42.621190 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
316 13:43:42.628121 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
317 13:43:42.631418 Recovery requested (1009000e)
318 13:43:42.640575 TPM: Extending digest for VBOOT: boot mode into PCR 0
319 13:43:42.646922 tlcl_extend: response is 0
320 13:43:42.653373 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
321 13:43:42.662910 tlcl_extend: response is 0
322 13:43:42.669747 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
323 13:43:42.672697 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
324 13:43:42.679682 BS: verstage times (exec / console): total (unknown) / 124 ms
325 13:43:42.680192
326 13:43:42.682838
327 13:43:42.693245 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
328 13:43:42.699220 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
329 13:43:42.702786 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 13:43:42.706161 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
331 13:43:42.712699 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 13:43:42.716453 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
333 13:43:42.719631 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
334 13:43:42.722740 TCO_STS: 0000 0001
335 13:43:42.726502 GEN_PMCON: d0015038 00002200
336 13:43:42.729492 GBLRST_CAUSE: 00000000 00000000
337 13:43:42.729971 prev_sleep_state 5
338 13:43:42.732790 Boot Count incremented to 3389
339 13:43:42.739902 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 13:43:42.743178 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
341 13:43:42.747248 Chrome EC: UHEPI supported
342 13:43:42.753352 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
343 13:43:42.759992 Probing TPM: done!
344 13:43:42.766715 Connected to device vid:did:rid of 1ae0:0028:00
345 13:43:42.777104 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
346 13:43:42.784118 Initialized TPM device CR50 revision 0
347 13:43:42.794102 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 13:43:42.801104 MRC: Hash idx 0x100b comparison successful.
349 13:43:42.804237 MRC cache found, size 5458
350 13:43:42.804332 bootmode is set to: 2
351 13:43:42.807301 SPD INDEX = 0
352 13:43:42.810788 CBFS: Found 'spd.bin' @0x40c40 size 0x600
353 13:43:42.814060 SPD: module type is LPDDR4X
354 13:43:42.821090 SPD: module part number is MT53E512M32D2NP-046 WT:E
355 13:43:42.827235 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
356 13:43:42.831053 SPD: device width 16 bits, bus width 32 bits
357 13:43:42.834183 SPD: module size is 4096 MB (per channel)
358 13:43:42.837339 meminit_channels: DRAM half-populated
359 13:43:42.920831 CBMEM:
360 13:43:42.924123 IMD: root @ 0x76fff000 254 entries.
361 13:43:42.927286 IMD: root @ 0x76ffec00 62 entries.
362 13:43:42.930502 FMAP: area RO_VPD found @ c00000 (16384 bytes)
363 13:43:42.937221 WARNING: RO_VPD is uninitialized or empty.
364 13:43:42.941087 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
365 13:43:42.944324 External stage cache:
366 13:43:42.947435 IMD: root @ 0x7b3ff000 254 entries.
367 13:43:42.950734 IMD: root @ 0x7b3fec00 62 entries.
368 13:43:42.961135 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
369 13:43:42.967395 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 13:43:42.974173 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
371 13:43:42.982762 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 13:43:42.985768 cse_lite: Skip switching to RW in the recovery path
373 13:43:42.989459 1 DIMMs found
374 13:43:42.989559 SMM Memory Map
375 13:43:42.992624 SMRAM : 0x7b000000 0x800000
376 13:43:42.995713 Subregion 0: 0x7b000000 0x200000
377 13:43:42.999148 Subregion 1: 0x7b200000 0x200000
378 13:43:43.005477 Subregion 2: 0x7b400000 0x400000
379 13:43:43.005573 top_of_ram = 0x77000000
380 13:43:43.012361 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 13:43:43.018845 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 13:43:43.022591 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 13:43:43.029080 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
384 13:43:43.032145 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
385 13:43:43.044481 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
386 13:43:43.050887 Processing 188 relocs. Offset value of 0x74c0e000
387 13:43:43.057464 BS: romstage times (exec / console): total (unknown) / 256 ms
388 13:43:43.062646
389 13:43:43.062740
390 13:43:43.072316 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
391 13:43:43.079071 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 13:43:43.082084 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
393 13:43:43.088796 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
394 13:43:43.144924 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
395 13:43:43.151452 Processing 4805 relocs. Offset value of 0x75da8000
396 13:43:43.155004 BS: postcar times (exec / console): total (unknown) / 42 ms
397 13:43:43.158047
398 13:43:43.158141
399 13:43:43.168065 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
400 13:43:43.168163 Normal boot
401 13:43:43.171774 EC returned error result code 3
402 13:43:43.175410 FW_CONFIG value is 0x204
403 13:43:43.178806 GENERIC: 0.0 disabled by fw_config
404 13:43:43.185139 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
405 13:43:43.188705 I2C: 00:10 disabled by fw_config
406 13:43:43.192320 I2C: 00:10 disabled by fw_config
407 13:43:43.195425 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 13:43:43.202175 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
409 13:43:43.206131 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
410 13:43:43.209299 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
411 13:43:43.216593 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
412 13:43:43.219638 I2C: 00:10 disabled by fw_config
413 13:43:43.226473 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
414 13:43:43.232998 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
415 13:43:43.236304 I2C: 00:1a disabled by fw_config
416 13:43:43.239499 I2C: 00:1a disabled by fw_config
417 13:43:43.243147 fw_config match found: AUDIO_AMP=UNPROVISIONED
418 13:43:43.249795 fw_config match found: AUDIO_AMP=UNPROVISIONED
419 13:43:43.252771 GENERIC: 0.0 disabled by fw_config
420 13:43:43.256023 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 13:43:43.262451 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
422 13:43:43.266383 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
423 13:43:43.272324 microcode: Update skipped, already up-to-date
424 13:43:43.275650 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
425 13:43:43.303959 Detected 2 core, 2 thread CPU.
426 13:43:43.307592 Setting up SMI for CPU
427 13:43:43.310803 IED base = 0x7b400000
428 13:43:43.310896 IED size = 0x00400000
429 13:43:43.314280 Will perform SMM setup.
430 13:43:43.317411 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
431 13:43:43.327403 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
432 13:43:43.330626 Processing 16 relocs. Offset value of 0x00030000
433 13:43:43.334302 Attempting to start 1 APs
434 13:43:43.337493 Waiting for 10ms after sending INIT.
435 13:43:43.353884 Waiting for 1st SIPI to complete...done.
436 13:43:43.354006 AP: slot 1 apic_id 2.
437 13:43:43.360917 Waiting for 2nd SIPI to complete...done.
438 13:43:43.367433 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
439 13:43:43.374225 Processing 13 relocs. Offset value of 0x00038000
440 13:43:43.374320 Unable to locate Global NVS
441 13:43:43.383596 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
442 13:43:43.387433 Installing permanent SMM handler to 0x7b000000
443 13:43:43.397074 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
444 13:43:43.400193 Processing 704 relocs. Offset value of 0x7b010000
445 13:43:43.410299 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
446 13:43:43.413373 Processing 13 relocs. Offset value of 0x7b008000
447 13:43:43.420451 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
448 13:43:43.423581 Unable to locate Global NVS
449 13:43:43.430049 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
450 13:43:43.433237 Clearing SMI status registers
451 13:43:43.433331 SMI_STS: PM1
452 13:43:43.437197 PM1_STS: PWRBTN
453 13:43:43.437290 TCO_STS: INTRD_DET
454 13:43:43.440448 GPE0 STD STS:
455 13:43:43.446789 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 13:43:43.449888 In relocation handler: CPU 0
457 13:43:43.453731 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 13:43:43.459877 Writing SMRR. base = 0x7b000006, mask=0xff800800
459 13:43:43.459971 Relocation complete.
460 13:43:43.466582 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 13:43:43.469862 In relocation handler: CPU 1
462 13:43:43.476859 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 13:43:43.480201 Writing SMRR. base = 0x7b000006, mask=0xff800800
464 13:43:43.483361 Relocation complete.
465 13:43:43.483464 Initializing CPU #0
466 13:43:43.486576 CPU: vendor Intel device 906c0
467 13:43:43.489771 CPU: family 06, model 9c, stepping 00
468 13:43:43.493591 Clearing out pending MCEs
469 13:43:43.496820 Setting up local APIC...
470 13:43:43.499912 apic_id: 0x00 done.
471 13:43:43.503116 Turbo is available but hidden
472 13:43:43.506864 Turbo is available and visible
473 13:43:43.509800 microcode: Update skipped, already up-to-date
474 13:43:43.512858 CPU #0 initialized
475 13:43:43.512952 Initializing CPU #1
476 13:43:43.516497 CPU: vendor Intel device 906c0
477 13:43:43.519586 CPU: family 06, model 9c, stepping 00
478 13:43:43.523230 Clearing out pending MCEs
479 13:43:43.526643 Setting up local APIC...
480 13:43:43.529862 apic_id: 0x02 done.
481 13:43:43.533035 microcode: Update skipped, already up-to-date
482 13:43:43.536214 CPU #1 initialized
483 13:43:43.539442 bsp_do_flight_plan done after 175 msecs.
484 13:43:43.543378 CPU: frequency set to 2800 MHz
485 13:43:43.543479 Enabling SMIs.
486 13:43:43.549632 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
487 13:43:43.560353 Probing TPM: done!
488 13:43:43.566868 Connected to device vid:did:rid of 1ae0:0028:00
489 13:43:43.576648 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
490 13:43:43.579852 Initialized TPM device CR50 revision 0
491 13:43:43.583550 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
492 13:43:43.590688 Found a VBT of 7680 bytes after decompression
493 13:43:43.596875 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
494 13:43:43.632864 Detected 2 core, 2 thread CPU.
495 13:43:43.636113 Detected 2 core, 2 thread CPU.
496 13:43:43.997890 Display FSP Version Info HOB
497 13:43:44.000868 Reference Code - CPU = 8.7.22.30
498 13:43:44.004092 uCode Version = 24.0.0.1f
499 13:43:44.007961 TXT ACM version = ff.ff.ff.ffff
500 13:43:44.011523 Reference Code - ME = 8.7.22.30
501 13:43:44.014110 MEBx version = 0.0.0.0
502 13:43:44.017392 ME Firmware Version = Consumer SKU
503 13:43:44.020610 Reference Code - PCH = 8.7.22.30
504 13:43:44.024353 PCH-CRID Status = Disabled
505 13:43:44.027652 PCH-CRID Original Value = ff.ff.ff.ffff
506 13:43:44.031040 PCH-CRID New Value = ff.ff.ff.ffff
507 13:43:44.034073 OPROM - RST - RAID = ff.ff.ff.ffff
508 13:43:44.037332 PCH Hsio Version = 4.0.0.0
509 13:43:44.041203 Reference Code - SA - System Agent = 8.7.22.30
510 13:43:44.044344 Reference Code - MRC = 0.0.4.68
511 13:43:44.047354 SA - PCIe Version = 8.7.22.30
512 13:43:44.050451 SA-CRID Status = Disabled
513 13:43:44.053907 SA-CRID Original Value = 0.0.0.0
514 13:43:44.057402 SA-CRID New Value = 0.0.0.0
515 13:43:44.061096 OPROM - VBIOS = ff.ff.ff.ffff
516 13:43:44.064278 IO Manageability Engine FW Version = ff.ff.ff.ffff
517 13:43:44.067462 PHY Build Version = ff.ff.ff.ffff
518 13:43:44.070760 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
519 13:43:44.077161 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
520 13:43:44.080990 ITSS IRQ Polarities Before:
521 13:43:44.084255 IPC0: 0xffffffff
522 13:43:44.084385 IPC1: 0xffffffff
523 13:43:44.087492 IPC2: 0xffffffff
524 13:43:44.087614 IPC3: 0xffffffff
525 13:43:44.090848 ITSS IRQ Polarities After:
526 13:43:44.094017 IPC0: 0xffffffff
527 13:43:44.094162 IPC1: 0xffffffff
528 13:43:44.097670 IPC2: 0xffffffff
529 13:43:44.097776 IPC3: 0xffffffff
530 13:43:44.110489 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
531 13:43:44.117351 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
532 13:43:44.117485 Enumerating buses...
533 13:43:44.123810 Show all devs... Before device enumeration.
534 13:43:44.123907 Root Device: enabled 1
535 13:43:44.127029 CPU_CLUSTER: 0: enabled 1
536 13:43:44.130252 DOMAIN: 0000: enabled 1
537 13:43:44.133453 PCI: 00:00.0: enabled 1
538 13:43:44.133556 PCI: 00:02.0: enabled 1
539 13:43:44.137329 PCI: 00:04.0: enabled 1
540 13:43:44.140569 PCI: 00:05.0: enabled 1
541 13:43:44.143656 PCI: 00:09.0: enabled 0
542 13:43:44.143762 PCI: 00:12.6: enabled 0
543 13:43:44.146981 PCI: 00:14.0: enabled 1
544 13:43:44.150104 PCI: 00:14.1: enabled 0
545 13:43:44.153819 PCI: 00:14.2: enabled 0
546 13:43:44.153933 PCI: 00:14.3: enabled 1
547 13:43:44.156854 PCI: 00:14.5: enabled 1
548 13:43:44.160414 PCI: 00:15.0: enabled 1
549 13:43:44.163376 PCI: 00:15.1: enabled 1
550 13:43:44.163497 PCI: 00:15.2: enabled 1
551 13:43:44.167117 PCI: 00:15.3: enabled 1
552 13:43:44.170186 PCI: 00:16.0: enabled 1
553 13:43:44.170318 PCI: 00:16.1: enabled 0
554 13:43:44.173464 PCI: 00:16.4: enabled 0
555 13:43:44.176580 PCI: 00:16.5: enabled 0
556 13:43:44.179911 PCI: 00:17.0: enabled 0
557 13:43:44.179997 PCI: 00:19.0: enabled 1
558 13:43:44.183963 PCI: 00:19.1: enabled 0
559 13:43:44.187010 PCI: 00:19.2: enabled 1
560 13:43:44.190226 PCI: 00:1a.0: enabled 1
561 13:43:44.190341 PCI: 00:1c.0: enabled 0
562 13:43:44.193402 PCI: 00:1c.1: enabled 0
563 13:43:44.196579 PCI: 00:1c.2: enabled 0
564 13:43:44.199983 PCI: 00:1c.3: enabled 0
565 13:43:44.200074 PCI: 00:1c.4: enabled 0
566 13:43:44.203258 PCI: 00:1c.5: enabled 0
567 13:43:44.206369 PCI: 00:1c.6: enabled 0
568 13:43:44.210105 PCI: 00:1c.7: enabled 1
569 13:43:44.210219 PCI: 00:1e.0: enabled 0
570 13:43:44.213216 PCI: 00:1e.1: enabled 0
571 13:43:44.216888 PCI: 00:1e.2: enabled 1
572 13:43:44.216981 PCI: 00:1e.3: enabled 0
573 13:43:44.220149 PCI: 00:1f.0: enabled 1
574 13:43:44.223259 PCI: 00:1f.1: enabled 1
575 13:43:44.226472 PCI: 00:1f.2: enabled 1
576 13:43:44.226606 PCI: 00:1f.3: enabled 1
577 13:43:44.230024 PCI: 00:1f.4: enabled 0
578 13:43:44.233290 PCI: 00:1f.5: enabled 1
579 13:43:44.236762 PCI: 00:1f.7: enabled 0
580 13:43:44.236855 GENERIC: 0.0: enabled 1
581 13:43:44.239774 GENERIC: 0.0: enabled 1
582 13:43:44.243001 USB0 port 0: enabled 1
583 13:43:44.243090 GENERIC: 0.0: enabled 1
584 13:43:44.246275 I2C: 00:2c: enabled 1
585 13:43:44.250021 I2C: 00:15: enabled 1
586 13:43:44.253146 GENERIC: 0.0: enabled 0
587 13:43:44.253239 I2C: 00:15: enabled 1
588 13:43:44.256357 I2C: 00:10: enabled 0
589 13:43:44.259333 I2C: 00:10: enabled 0
590 13:43:44.259458 I2C: 00:2c: enabled 1
591 13:43:44.263020 I2C: 00:40: enabled 1
592 13:43:44.266130 I2C: 00:10: enabled 1
593 13:43:44.266263 I2C: 00:39: enabled 1
594 13:43:44.269663 I2C: 00:36: enabled 1
595 13:43:44.272686 I2C: 00:10: enabled 0
596 13:43:44.272796 I2C: 00:0c: enabled 1
597 13:43:44.276408 I2C: 00:50: enabled 1
598 13:43:44.279466 I2C: 00:1a: enabled 1
599 13:43:44.279562 I2C: 00:1a: enabled 0
600 13:43:44.282973 I2C: 00:1a: enabled 0
601 13:43:44.286299 I2C: 00:28: enabled 1
602 13:43:44.286385 I2C: 00:29: enabled 1
603 13:43:44.289504 PCI: 00:00.0: enabled 1
604 13:43:44.292847 SPI: 00: enabled 1
605 13:43:44.292942 PNP: 0c09.0: enabled 1
606 13:43:44.295918 GENERIC: 0.0: enabled 0
607 13:43:44.299722 USB2 port 0: enabled 1
608 13:43:44.302954 USB2 port 1: enabled 1
609 13:43:44.303049 USB2 port 2: enabled 1
610 13:43:44.306121 USB2 port 3: enabled 1
611 13:43:44.309347 USB2 port 4: enabled 0
612 13:43:44.309441 USB2 port 5: enabled 1
613 13:43:44.312609 USB2 port 6: enabled 0
614 13:43:44.315667 USB2 port 7: enabled 1
615 13:43:44.319369 USB3 port 0: enabled 1
616 13:43:44.319494 USB3 port 1: enabled 1
617 13:43:44.322624 USB3 port 2: enabled 1
618 13:43:44.325645 USB3 port 3: enabled 1
619 13:43:44.325750 APIC: 00: enabled 1
620 13:43:44.329310 APIC: 02: enabled 1
621 13:43:44.332505 Compare with tree...
622 13:43:44.332600 Root Device: enabled 1
623 13:43:44.335713 CPU_CLUSTER: 0: enabled 1
624 13:43:44.338993 APIC: 00: enabled 1
625 13:43:44.339089 APIC: 02: enabled 1
626 13:43:44.342288 DOMAIN: 0000: enabled 1
627 13:43:44.346035 PCI: 00:00.0: enabled 1
628 13:43:44.349280 PCI: 00:02.0: enabled 1
629 13:43:44.352376 PCI: 00:04.0: enabled 1
630 13:43:44.352481 GENERIC: 0.0: enabled 1
631 13:43:44.355477 PCI: 00:05.0: enabled 1
632 13:43:44.359372 GENERIC: 0.0: enabled 1
633 13:43:44.362411 PCI: 00:09.0: enabled 0
634 13:43:44.365703 PCI: 00:12.6: enabled 0
635 13:43:44.365806 PCI: 00:14.0: enabled 1
636 13:43:44.369203 USB0 port 0: enabled 1
637 13:43:44.372370 USB2 port 0: enabled 1
638 13:43:44.375390 USB2 port 1: enabled 1
639 13:43:44.379070 USB2 port 2: enabled 1
640 13:43:44.379195 USB2 port 3: enabled 1
641 13:43:44.382075 USB2 port 4: enabled 0
642 13:43:44.385314 USB2 port 5: enabled 1
643 13:43:44.388489 USB2 port 6: enabled 0
644 13:43:44.391777 USB2 port 7: enabled 1
645 13:43:44.395186 USB3 port 0: enabled 1
646 13:43:44.395280 USB3 port 1: enabled 1
647 13:43:44.398797 USB3 port 2: enabled 1
648 13:43:44.402124 USB3 port 3: enabled 1
649 13:43:44.405361 PCI: 00:14.1: enabled 0
650 13:43:44.408537 PCI: 00:14.2: enabled 0
651 13:43:44.408631 PCI: 00:14.3: enabled 1
652 13:43:44.411869 GENERIC: 0.0: enabled 1
653 13:43:44.415652 PCI: 00:14.5: enabled 1
654 13:43:44.418672 PCI: 00:15.0: enabled 1
655 13:43:44.421757 I2C: 00:2c: enabled 1
656 13:43:44.421864 I2C: 00:15: enabled 1
657 13:43:44.425322 PCI: 00:15.1: enabled 1
658 13:43:44.428914 PCI: 00:15.2: enabled 1
659 13:43:44.432110 GENERIC: 0.0: enabled 0
660 13:43:44.432204 I2C: 00:15: enabled 1
661 13:43:44.435249 I2C: 00:10: enabled 0
662 13:43:44.438961 I2C: 00:10: enabled 0
663 13:43:44.442187 I2C: 00:2c: enabled 1
664 13:43:44.445342 I2C: 00:40: enabled 1
665 13:43:44.445437 I2C: 00:10: enabled 1
666 13:43:44.448606 I2C: 00:39: enabled 1
667 13:43:44.451779 PCI: 00:15.3: enabled 1
668 13:43:44.454988 I2C: 00:36: enabled 1
669 13:43:44.455084 I2C: 00:10: enabled 0
670 13:43:44.458664 I2C: 00:0c: enabled 1
671 13:43:44.462564 I2C: 00:50: enabled 1
672 13:43:44.466347 PCI: 00:16.0: enabled 1
673 13:43:44.466457 PCI: 00:16.1: enabled 0
674 13:43:44.470095 PCI: 00:16.4: enabled 0
675 13:43:44.473287 PCI: 00:16.5: enabled 0
676 13:43:44.473388 PCI: 00:17.0: enabled 0
677 13:43:44.476337 PCI: 00:19.0: enabled 1
678 13:43:44.479820 I2C: 00:1a: enabled 1
679 13:43:44.483346 I2C: 00:1a: enabled 0
680 13:43:44.486353 I2C: 00:1a: enabled 0
681 13:43:44.486449 I2C: 00:28: enabled 1
682 13:43:44.489809 I2C: 00:29: enabled 1
683 13:43:44.493098 PCI: 00:19.1: enabled 0
684 13:43:44.496238 PCI: 00:19.2: enabled 1
685 13:43:44.496333 PCI: 00:1a.0: enabled 1
686 13:43:44.500067 PCI: 00:1e.0: enabled 0
687 13:43:44.503319 PCI: 00:1e.1: enabled 0
688 13:43:44.506559 PCI: 00:1e.2: enabled 1
689 13:43:44.506655 SPI: 00: enabled 1
690 13:43:44.509629 PCI: 00:1e.3: enabled 0
691 13:43:44.512940 PCI: 00:1f.0: enabled 1
692 13:43:44.516088 PNP: 0c09.0: enabled 1
693 13:43:44.519904 PCI: 00:1f.1: enabled 1
694 13:43:44.520000 PCI: 00:1f.2: enabled 1
695 13:43:44.523118 PCI: 00:1f.3: enabled 1
696 13:43:44.526225 GENERIC: 0.0: enabled 0
697 13:43:44.529403 PCI: 00:1f.4: enabled 0
698 13:43:44.532987 PCI: 00:1f.5: enabled 1
699 13:43:44.533082 PCI: 00:1f.7: enabled 0
700 13:43:44.536181 Root Device scanning...
701 13:43:44.539385 scan_static_bus for Root Device
702 13:43:44.543176 CPU_CLUSTER: 0 enabled
703 13:43:44.543280 DOMAIN: 0000 enabled
704 13:43:44.546396 DOMAIN: 0000 scanning...
705 13:43:44.549664 PCI: pci_scan_bus for bus 00
706 13:43:44.552915 PCI: 00:00.0 [8086/0000] ops
707 13:43:44.556088 PCI: 00:00.0 [8086/4e22] enabled
708 13:43:44.559358 PCI: 00:02.0 [8086/0000] bus ops
709 13:43:44.563074 PCI: 00:02.0 [8086/4e55] enabled
710 13:43:44.566481 PCI: 00:04.0 [8086/0000] bus ops
711 13:43:44.569711 PCI: 00:04.0 [8086/4e03] enabled
712 13:43:44.573010 PCI: 00:05.0 [8086/0000] bus ops
713 13:43:44.576150 PCI: 00:05.0 [8086/4e19] enabled
714 13:43:44.579195 PCI: 00:08.0 [8086/4e11] enabled
715 13:43:44.583022 PCI: 00:14.0 [8086/0000] bus ops
716 13:43:44.586082 PCI: 00:14.0 [8086/4ded] enabled
717 13:43:44.589658 PCI: 00:14.2 [8086/4def] disabled
718 13:43:44.592822 PCI: 00:14.3 [8086/0000] bus ops
719 13:43:44.596365 PCI: 00:14.3 [8086/4df0] enabled
720 13:43:44.599298 PCI: 00:14.5 [8086/0000] ops
721 13:43:44.602371 PCI: 00:14.5 [8086/4df8] enabled
722 13:43:44.606310 PCI: 00:15.0 [8086/0000] bus ops
723 13:43:44.609541 PCI: 00:15.0 [8086/4de8] enabled
724 13:43:44.612746 PCI: 00:15.1 [8086/0000] bus ops
725 13:43:44.616440 PCI: 00:15.1 [8086/4de9] enabled
726 13:43:44.619589 PCI: 00:15.2 [8086/0000] bus ops
727 13:43:44.622977 PCI: 00:15.2 [8086/4dea] enabled
728 13:43:44.626210 PCI: 00:15.3 [8086/0000] bus ops
729 13:43:44.629186 PCI: 00:15.3 [8086/4deb] enabled
730 13:43:44.633024 PCI: 00:16.0 [8086/0000] ops
731 13:43:44.636070 PCI: 00:16.0 [8086/4de0] enabled
732 13:43:44.639075 PCI: 00:19.0 [8086/0000] bus ops
733 13:43:44.642705 PCI: 00:19.0 [8086/4dc5] enabled
734 13:43:44.645718 PCI: 00:19.2 [8086/0000] ops
735 13:43:44.649481 PCI: 00:19.2 [8086/4dc7] enabled
736 13:43:44.652689 PCI: 00:1a.0 [8086/0000] ops
737 13:43:44.656107 PCI: 00:1a.0 [8086/4dc4] enabled
738 13:43:44.656200 PCI: 00:1e.0 [8086/0000] ops
739 13:43:44.662804 PCI: 00:1e.0 [8086/4da8] disabled
740 13:43:44.665758 PCI: 00:1e.2 [8086/0000] bus ops
741 13:43:44.669070 PCI: 00:1e.2 [8086/4daa] enabled
742 13:43:44.672348 PCI: 00:1f.0 [8086/0000] bus ops
743 13:43:44.675597 PCI: 00:1f.0 [8086/4d87] enabled
744 13:43:44.678758 PCI: Static device PCI: 00:1f.1 not found, disabling it.
745 13:43:44.682654 RTC Init
746 13:43:44.685703 Set power on after power failure.
747 13:43:44.685824 Disabling Deep S3
748 13:43:44.688971 Disabling Deep S3
749 13:43:44.689082 Disabling Deep S4
750 13:43:44.692245 Disabling Deep S4
751 13:43:44.692354 Disabling Deep S5
752 13:43:44.695782 Disabling Deep S5
753 13:43:44.699063 PCI: 00:1f.2 [0000/0000] hidden
754 13:43:44.702094 PCI: 00:1f.3 [8086/0000] bus ops
755 13:43:44.705943 PCI: 00:1f.3 [8086/4dc8] enabled
756 13:43:44.708898 PCI: 00:1f.5 [8086/0000] bus ops
757 13:43:44.712019 PCI: 00:1f.5 [8086/4da4] enabled
758 13:43:44.715382 PCI: Leftover static devices:
759 13:43:44.715561 PCI: 00:12.6
760 13:43:44.719231 PCI: 00:09.0
761 13:43:44.719390 PCI: 00:14.1
762 13:43:44.722311 PCI: 00:16.1
763 13:43:44.722461 PCI: 00:16.4
764 13:43:44.722604 PCI: 00:16.5
765 13:43:44.725494 PCI: 00:17.0
766 13:43:44.725652 PCI: 00:19.1
767 13:43:44.728744 PCI: 00:1e.1
768 13:43:44.728894 PCI: 00:1e.3
769 13:43:44.729028 PCI: 00:1f.1
770 13:43:44.732036 PCI: 00:1f.4
771 13:43:44.732155 PCI: 00:1f.7
772 13:43:44.735618 PCI: Check your devicetree.cb.
773 13:43:44.738746 PCI: 00:02.0 scanning...
774 13:43:44.742032 scan_generic_bus for PCI: 00:02.0
775 13:43:44.745485 scan_generic_bus for PCI: 00:02.0 done
776 13:43:44.752125 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
777 13:43:44.752224 PCI: 00:04.0 scanning...
778 13:43:44.755375 scan_generic_bus for PCI: 00:04.0
779 13:43:44.759256 GENERIC: 0.0 enabled
780 13:43:44.765639 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
781 13:43:44.768894 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
782 13:43:44.772188 PCI: 00:05.0 scanning...
783 13:43:44.775401 scan_generic_bus for PCI: 00:05.0
784 13:43:44.778714 GENERIC: 0.0 enabled
785 13:43:44.785866 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
786 13:43:44.789041 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
787 13:43:44.792230 PCI: 00:14.0 scanning...
788 13:43:44.795463 scan_static_bus for PCI: 00:14.0
789 13:43:44.795557 USB0 port 0 enabled
790 13:43:44.799328 USB0 port 0 scanning...
791 13:43:44.802739 scan_static_bus for USB0 port 0
792 13:43:44.805908 USB2 port 0 enabled
793 13:43:44.806002 USB2 port 1 enabled
794 13:43:44.808985 USB2 port 2 enabled
795 13:43:44.812491 USB2 port 3 enabled
796 13:43:44.812585 USB2 port 4 disabled
797 13:43:44.815466 USB2 port 5 enabled
798 13:43:44.819131 USB2 port 6 disabled
799 13:43:44.819228 USB2 port 7 enabled
800 13:43:44.822044 USB3 port 0 enabled
801 13:43:44.822140 USB3 port 1 enabled
802 13:43:44.825884 USB3 port 2 enabled
803 13:43:44.828965 USB3 port 3 enabled
804 13:43:44.829067 USB2 port 0 scanning...
805 13:43:44.832192 scan_static_bus for USB2 port 0
806 13:43:44.835557 scan_static_bus for USB2 port 0 done
807 13:43:44.841922 scan_bus: bus USB2 port 0 finished in 6 msecs
808 13:43:44.845653 USB2 port 1 scanning...
809 13:43:44.848588 scan_static_bus for USB2 port 1
810 13:43:44.851877 scan_static_bus for USB2 port 1 done
811 13:43:44.855353 scan_bus: bus USB2 port 1 finished in 6 msecs
812 13:43:44.858463 USB2 port 2 scanning...
813 13:43:44.861680 scan_static_bus for USB2 port 2
814 13:43:44.864952 scan_static_bus for USB2 port 2 done
815 13:43:44.868835 scan_bus: bus USB2 port 2 finished in 6 msecs
816 13:43:44.871990 USB2 port 3 scanning...
817 13:43:44.875059 scan_static_bus for USB2 port 3
818 13:43:44.878390 scan_static_bus for USB2 port 3 done
819 13:43:44.885418 scan_bus: bus USB2 port 3 finished in 6 msecs
820 13:43:44.885514 USB2 port 5 scanning...
821 13:43:44.888490 scan_static_bus for USB2 port 5
822 13:43:44.891711 scan_static_bus for USB2 port 5 done
823 13:43:44.898580 scan_bus: bus USB2 port 5 finished in 6 msecs
824 13:43:44.901920 USB2 port 7 scanning...
825 13:43:44.905132 scan_static_bus for USB2 port 7
826 13:43:44.908158 scan_static_bus for USB2 port 7 done
827 13:43:44.911477 scan_bus: bus USB2 port 7 finished in 6 msecs
828 13:43:44.915039 USB3 port 0 scanning...
829 13:43:44.918164 scan_static_bus for USB3 port 0
830 13:43:44.921848 scan_static_bus for USB3 port 0 done
831 13:43:44.924814 scan_bus: bus USB3 port 0 finished in 6 msecs
832 13:43:44.928158 USB3 port 1 scanning...
833 13:43:44.931354 scan_static_bus for USB3 port 1
834 13:43:44.934989 scan_static_bus for USB3 port 1 done
835 13:43:44.941389 scan_bus: bus USB3 port 1 finished in 6 msecs
836 13:43:44.941512 USB3 port 2 scanning...
837 13:43:44.944675 scan_static_bus for USB3 port 2
838 13:43:44.947887 scan_static_bus for USB3 port 2 done
839 13:43:44.954724 scan_bus: bus USB3 port 2 finished in 6 msecs
840 13:43:44.957795 USB3 port 3 scanning...
841 13:43:44.961106 scan_static_bus for USB3 port 3
842 13:43:44.964767 scan_static_bus for USB3 port 3 done
843 13:43:44.967926 scan_bus: bus USB3 port 3 finished in 6 msecs
844 13:43:44.971157 scan_static_bus for USB0 port 0 done
845 13:43:44.977675 scan_bus: bus USB0 port 0 finished in 172 msecs
846 13:43:44.981547 scan_static_bus for PCI: 00:14.0 done
847 13:43:44.984851 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
848 13:43:44.988021 PCI: 00:14.3 scanning...
849 13:43:44.991277 scan_static_bus for PCI: 00:14.3
850 13:43:44.994393 GENERIC: 0.0 enabled
851 13:43:44.998007 scan_static_bus for PCI: 00:14.3 done
852 13:43:45.001146 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
853 13:43:45.004403 PCI: 00:15.0 scanning...
854 13:43:45.007470 scan_static_bus for PCI: 00:15.0
855 13:43:45.011353 I2C: 00:2c enabled
856 13:43:45.011479 I2C: 00:15 enabled
857 13:43:45.014216 scan_static_bus for PCI: 00:15.0 done
858 13:43:45.021009 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
859 13:43:45.023978 PCI: 00:15.1 scanning...
860 13:43:45.027907 scan_static_bus for PCI: 00:15.1
861 13:43:45.031037 scan_static_bus for PCI: 00:15.1 done
862 13:43:45.034109 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
863 13:43:45.037349 PCI: 00:15.2 scanning...
864 13:43:45.041663 scan_static_bus for PCI: 00:15.2
865 13:43:45.045350 GENERIC: 0.0 disabled
866 13:43:45.045462 I2C: 00:15 enabled
867 13:43:45.049360 I2C: 00:10 disabled
868 13:43:45.049455 I2C: 00:10 disabled
869 13:43:45.052550 I2C: 00:2c enabled
870 13:43:45.052645 I2C: 00:40 enabled
871 13:43:45.055740 I2C: 00:10 enabled
872 13:43:45.055834 I2C: 00:39 enabled
873 13:43:45.059426 scan_static_bus for PCI: 00:15.2 done
874 13:43:45.067092 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
875 13:43:45.067189 PCI: 00:15.3 scanning...
876 13:43:45.070091 scan_static_bus for PCI: 00:15.3
877 13:43:45.073393 I2C: 00:36 enabled
878 13:43:45.077196 I2C: 00:10 disabled
879 13:43:45.077290 I2C: 00:0c enabled
880 13:43:45.080327 I2C: 00:50 enabled
881 13:43:45.083509 scan_static_bus for PCI: 00:15.3 done
882 13:43:45.086721 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
883 13:43:45.089991 PCI: 00:19.0 scanning...
884 13:43:45.093282 scan_static_bus for PCI: 00:19.0
885 13:43:45.096595 I2C: 00:1a enabled
886 13:43:45.099937 I2C: 00:1a disabled
887 13:43:45.100031 I2C: 00:1a disabled
888 13:43:45.103483 I2C: 00:28 enabled
889 13:43:45.103578 I2C: 00:29 enabled
890 13:43:45.106929 scan_static_bus for PCI: 00:19.0 done
891 13:43:45.113198 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
892 13:43:45.116523 PCI: 00:1e.2 scanning...
893 13:43:45.119832 scan_generic_bus for PCI: 00:1e.2
894 13:43:45.119926 SPI: 00 enabled
895 13:43:45.126612 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
896 13:43:45.130290 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
897 13:43:45.133290 PCI: 00:1f.0 scanning...
898 13:43:45.136933 scan_static_bus for PCI: 00:1f.0
899 13:43:45.140203 PNP: 0c09.0 enabled
900 13:43:45.143431 PNP: 0c09.0 scanning...
901 13:43:45.146412 scan_static_bus for PNP: 0c09.0
902 13:43:45.149644 scan_static_bus for PNP: 0c09.0 done
903 13:43:45.153388 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
904 13:43:45.156626 scan_static_bus for PCI: 00:1f.0 done
905 13:43:45.163157 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
906 13:43:45.166290 PCI: 00:1f.3 scanning...
907 13:43:45.169559 scan_static_bus for PCI: 00:1f.3
908 13:43:45.169664 GENERIC: 0.0 disabled
909 13:43:45.173123 scan_static_bus for PCI: 00:1f.3 done
910 13:43:45.179674 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
911 13:43:45.182790 PCI: 00:1f.5 scanning...
912 13:43:45.186443 scan_generic_bus for PCI: 00:1f.5
913 13:43:45.189774 scan_generic_bus for PCI: 00:1f.5 done
914 13:43:45.192782 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
915 13:43:45.199757 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
916 13:43:45.203030 scan_static_bus for Root Device done
917 13:43:45.206127 scan_bus: bus Root Device finished in 665 msecs
918 13:43:45.206231 done
919 13:43:45.212736 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1085 ms
920 13:43:45.215905 Chrome EC: UHEPI supported
921 13:43:45.223072 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
922 13:43:45.229672 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
923 13:43:45.232709 SPI flash protection: WPSW=0 SRP0=1
924 13:43:45.235960 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
925 13:43:45.242602 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
926 13:43:45.245733 found VGA at PCI: 00:02.0
927 13:43:45.248962 Setting up VGA for PCI: 00:02.0
928 13:43:45.255772 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
929 13:43:45.259025 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
930 13:43:45.262808 Allocating resources...
931 13:43:45.262903 Reading resources...
932 13:43:45.269177 Root Device read_resources bus 0 link: 0
933 13:43:45.272318 CPU_CLUSTER: 0 read_resources bus 0 link: 0
934 13:43:45.279226 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
935 13:43:45.282355 DOMAIN: 0000 read_resources bus 0 link: 0
936 13:43:45.285399 PCI: 00:04.0 read_resources bus 1 link: 0
937 13:43:45.292663 PCI: 00:04.0 read_resources bus 1 link: 0 done
938 13:43:45.295779 PCI: 00:05.0 read_resources bus 2 link: 0
939 13:43:45.302661 PCI: 00:05.0 read_resources bus 2 link: 0 done
940 13:43:45.305784 PCI: 00:14.0 read_resources bus 0 link: 0
941 13:43:45.309134 USB0 port 0 read_resources bus 0 link: 0
942 13:43:45.317857 USB0 port 0 read_resources bus 0 link: 0 done
943 13:43:45.321074 PCI: 00:14.0 read_resources bus 0 link: 0 done
944 13:43:45.327578 PCI: 00:14.3 read_resources bus 0 link: 0
945 13:43:45.330716 PCI: 00:14.3 read_resources bus 0 link: 0 done
946 13:43:45.390308 PCI: 00:15.0 read_resources bus 0 link: 0
947 13:43:45.390460 PCI: 00:15.0 read_resources bus 0 link: 0 done
948 13:43:45.390913 PCI: 00:15.2 read_resources bus 0 link: 0
949 13:43:45.391190 PCI: 00:15.2 read_resources bus 0 link: 0 done
950 13:43:45.391271 PCI: 00:15.3 read_resources bus 0 link: 0
951 13:43:45.391343 PCI: 00:15.3 read_resources bus 0 link: 0 done
952 13:43:45.391424 PCI: 00:19.0 read_resources bus 0 link: 0
953 13:43:45.391512 PCI: 00:19.0 read_resources bus 0 link: 0 done
954 13:43:45.391579 PCI: 00:1e.2 read_resources bus 3 link: 0
955 13:43:45.391645 PCI: 00:1e.2 read_resources bus 3 link: 0 done
956 13:43:45.391725 PCI: 00:1f.0 read_resources bus 0 link: 0
957 13:43:45.391791 PCI: 00:1f.0 read_resources bus 0 link: 0 done
958 13:43:45.394753 PCI: 00:1f.3 read_resources bus 0 link: 0
959 13:43:45.402095 PCI: 00:1f.3 read_resources bus 0 link: 0 done
960 13:43:45.405242 DOMAIN: 0000 read_resources bus 0 link: 0 done
961 13:43:45.411723 Root Device read_resources bus 0 link: 0 done
962 13:43:45.411817 Done reading resources.
963 13:43:45.418503 Show resources in subtree (Root Device)...After reading.
964 13:43:45.421689 Root Device child on link 0 CPU_CLUSTER: 0
965 13:43:45.428164 CPU_CLUSTER: 0 child on link 0 APIC: 00
966 13:43:45.428294 APIC: 00
967 13:43:45.428370 APIC: 02
968 13:43:45.434803 DOMAIN: 0000 child on link 0 PCI: 00:00.0
969 13:43:45.445162 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
970 13:43:45.451267 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
971 13:43:45.454645 PCI: 00:00.0
972 13:43:45.464717 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
973 13:43:45.474478 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
974 13:43:45.484528 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
975 13:43:45.490862 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
976 13:43:45.501276 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
977 13:43:45.510962 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
978 13:43:45.520805 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
979 13:43:45.530851 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
980 13:43:45.537338 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
981 13:43:45.547637 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
982 13:43:45.557801 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
983 13:43:45.567163 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
984 13:43:45.577418 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
985 13:43:45.584229 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
986 13:43:45.593957 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
987 13:43:45.603767 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
988 13:43:45.613624 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
989 13:43:45.623813 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
990 13:43:45.633958 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
991 13:43:45.634062 PCI: 00:02.0
992 13:43:45.643554 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
993 13:43:45.653462 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
994 13:43:45.663359 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
995 13:43:45.667030 PCI: 00:04.0 child on link 0 GENERIC: 0.0
996 13:43:45.677098 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
997 13:43:45.680477 GENERIC: 0.0
998 13:43:45.683750 PCI: 00:05.0 child on link 0 GENERIC: 0.0
999 13:43:45.693316 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1000 13:43:45.697371 GENERIC: 0.0
1001 13:43:45.697486 PCI: 00:08.0
1002 13:43:45.706559 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1003 13:43:45.710087 PCI: 00:14.0 child on link 0 USB0 port 0
1004 13:43:45.720249 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1005 13:43:45.724463 USB0 port 0 child on link 0 USB2 port 0
1006 13:43:45.728261 USB2 port 0
1007 13:43:45.728421 USB2 port 1
1008 13:43:45.731585 USB2 port 2
1009 13:43:45.731743 USB2 port 3
1010 13:43:45.734569 USB2 port 4
1011 13:43:45.738299 USB2 port 5
1012 13:43:45.738461 USB2 port 6
1013 13:43:45.741717 USB2 port 7
1014 13:43:45.741867 USB3 port 0
1015 13:43:45.744900 USB3 port 1
1016 13:43:45.745058 USB3 port 2
1017 13:43:45.748337 USB3 port 3
1018 13:43:45.748500 PCI: 00:14.2
1019 13:43:45.754778 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1020 13:43:45.764426 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1021 13:43:45.764536 GENERIC: 0.0
1022 13:43:45.767952 PCI: 00:14.5
1023 13:43:45.777778 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1024 13:43:45.781412 PCI: 00:15.0 child on link 0 I2C: 00:2c
1025 13:43:45.791598 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 13:43:45.791698 I2C: 00:2c
1027 13:43:45.794683 I2C: 00:15
1028 13:43:45.794776 PCI: 00:15.1
1029 13:43:45.804505 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1030 13:43:45.811544 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1031 13:43:45.821195 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 13:43:45.821349 GENERIC: 0.0
1033 13:43:45.824374 I2C: 00:15
1034 13:43:45.824458 I2C: 00:10
1035 13:43:45.827960 I2C: 00:10
1036 13:43:45.828052 I2C: 00:2c
1037 13:43:45.828125 I2C: 00:40
1038 13:43:45.830995 I2C: 00:10
1039 13:43:45.831076 I2C: 00:39
1040 13:43:45.837584 PCI: 00:15.3 child on link 0 I2C: 00:36
1041 13:43:45.847429 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1042 13:43:45.847525 I2C: 00:36
1043 13:43:45.851461 I2C: 00:10
1044 13:43:45.851559 I2C: 00:0c
1045 13:43:45.854820 I2C: 00:50
1046 13:43:45.854922 PCI: 00:16.0
1047 13:43:45.864124 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1048 13:43:45.867779 PCI: 00:19.0 child on link 0 I2C: 00:1a
1049 13:43:45.877420 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1050 13:43:45.880857 I2C: 00:1a
1051 13:43:45.880951 I2C: 00:1a
1052 13:43:45.883973 I2C: 00:1a
1053 13:43:45.884065 I2C: 00:28
1054 13:43:45.887695 I2C: 00:29
1055 13:43:45.887785 PCI: 00:19.2
1056 13:43:45.901016 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1057 13:43:45.910763 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1058 13:43:45.910860 PCI: 00:1a.0
1059 13:43:45.920500 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1060 13:43:45.923942 PCI: 00:1e.0
1061 13:43:45.927074 PCI: 00:1e.2 child on link 0 SPI: 00
1062 13:43:45.937828 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1063 13:43:45.938316 SPI: 00
1064 13:43:45.940922 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1065 13:43:45.950613 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1066 13:43:45.954324 PNP: 0c09.0
1067 13:43:45.960958 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1068 13:43:45.964194 PCI: 00:1f.2
1069 13:43:45.973946 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1070 13:43:45.980366 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1071 13:43:45.987402 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1072 13:43:45.997193 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1073 13:43:46.007378 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1074 13:43:46.007829 GENERIC: 0.0
1075 13:43:46.010461 PCI: 00:1f.5
1076 13:43:46.016930 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1077 13:43:46.027051 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1078 13:43:46.034001 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1079 13:43:46.040759 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1080 13:43:46.046905 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1081 13:43:46.053558 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1082 13:43:46.063919 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1083 13:43:46.067205 DOMAIN: 0000: Resource ranges:
1084 13:43:46.070547 * Base: 1000, Size: 800, Tag: 100
1085 13:43:46.073772 * Base: 1900, Size: e700, Tag: 100
1086 13:43:46.077022 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1087 13:43:46.083379 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1088 13:43:46.089851 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1089 13:43:46.099957 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1090 13:43:46.106488 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1091 13:43:46.113247 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1092 13:43:46.123340 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1093 13:43:46.129733 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1094 13:43:46.136753 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1095 13:43:46.146235 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1096 13:43:46.153310 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1097 13:43:46.160054 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1098 13:43:46.166648 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1099 13:43:46.176816 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1100 13:43:46.183243 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1101 13:43:46.189654 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1102 13:43:46.200111 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1103 13:43:46.206197 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1104 13:43:46.213131 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1105 13:43:46.222916 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1106 13:43:46.229782 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1107 13:43:46.236297 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1108 13:43:46.245892 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1109 13:43:46.252732 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1110 13:43:46.255931 DOMAIN: 0000: Resource ranges:
1111 13:43:46.259198 * Base: 7fc00000, Size: 40400000, Tag: 200
1112 13:43:46.266037 * Base: d0000000, Size: 2b000000, Tag: 200
1113 13:43:46.269178 * Base: fb001000, Size: 2fff000, Tag: 200
1114 13:43:46.272824 * Base: fe010000, Size: 22000, Tag: 200
1115 13:43:46.275826 * Base: fe033000, Size: a4d000, Tag: 200
1116 13:43:46.282226 * Base: fea88000, Size: 2f8000, Tag: 200
1117 13:43:46.285513 * Base: fed88000, Size: 8000, Tag: 200
1118 13:43:46.289395 * Base: fed93000, Size: d000, Tag: 200
1119 13:43:46.292648 * Base: feda2000, Size: 125e000, Tag: 200
1120 13:43:46.299166 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1121 13:43:46.306375 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1122 13:43:46.313235 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1123 13:43:46.320083 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1124 13:43:46.326778 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1125 13:43:46.332936 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1126 13:43:46.339913 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1127 13:43:46.346152 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1128 13:43:46.353128 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1129 13:43:46.359441 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1130 13:43:46.366008 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1131 13:43:46.372885 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1132 13:43:46.379556 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1133 13:43:46.386384 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1134 13:43:46.392855 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1135 13:43:46.399341 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1136 13:43:46.406380 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1137 13:43:46.412816 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1138 13:43:46.419601 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1139 13:43:46.425883 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1140 13:43:46.433001 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1141 13:43:46.439212 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1142 13:43:46.446047 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1143 13:43:46.449333 Root Device assign_resources, bus 0 link: 0
1144 13:43:46.455639 DOMAIN: 0000 assign_resources, bus 0 link: 0
1145 13:43:46.462413 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1146 13:43:46.472691 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1147 13:43:46.479207 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1148 13:43:46.485729 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1149 13:43:46.492586 PCI: 00:04.0 assign_resources, bus 1 link: 0
1150 13:43:46.495921 PCI: 00:04.0 assign_resources, bus 1 link: 0
1151 13:43:46.505697 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1152 13:43:46.509037 PCI: 00:05.0 assign_resources, bus 2 link: 0
1153 13:43:46.512155 PCI: 00:05.0 assign_resources, bus 2 link: 0
1154 13:43:46.522341 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1155 13:43:46.528765 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1156 13:43:46.535851 PCI: 00:14.0 assign_resources, bus 0 link: 0
1157 13:43:46.539136 PCI: 00:14.0 assign_resources, bus 0 link: 0
1158 13:43:46.549088 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1159 13:43:46.552203 PCI: 00:14.3 assign_resources, bus 0 link: 0
1160 13:43:46.555188 PCI: 00:14.3 assign_resources, bus 0 link: 0
1161 13:43:46.565465 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1162 13:43:46.572418 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1163 13:43:46.578768 PCI: 00:15.0 assign_resources, bus 0 link: 0
1164 13:43:46.582169 PCI: 00:15.0 assign_resources, bus 0 link: 0
1165 13:43:46.588671 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1166 13:43:46.598357 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1167 13:43:46.602216 PCI: 00:15.2 assign_resources, bus 0 link: 0
1168 13:43:46.608625 PCI: 00:15.2 assign_resources, bus 0 link: 0
1169 13:43:46.615157 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1170 13:43:46.618418 PCI: 00:15.3 assign_resources, bus 0 link: 0
1171 13:43:46.625367 PCI: 00:15.3 assign_resources, bus 0 link: 0
1172 13:43:46.631793 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1173 13:43:46.641867 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1174 13:43:46.645149 PCI: 00:19.0 assign_resources, bus 0 link: 0
1175 13:43:46.648263 PCI: 00:19.0 assign_resources, bus 0 link: 0
1176 13:43:46.658334 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1177 13:43:46.664959 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1178 13:43:46.675072 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1179 13:43:46.678395 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1180 13:43:46.685059 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1181 13:43:46.688066 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1182 13:43:46.691892 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1183 13:43:46.698049 LPC: Trying to open IO window from 800 size 1ff
1184 13:43:46.704568 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1185 13:43:46.715046 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1186 13:43:46.718198 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1187 13:43:46.724589 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1188 13:43:46.731710 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1189 13:43:46.734831 DOMAIN: 0000 assign_resources, bus 0 link: 0
1190 13:43:46.741644 Root Device assign_resources, bus 0 link: 0
1191 13:43:46.742068 Done setting resources.
1192 13:43:46.747948 Show resources in subtree (Root Device)...After assigning values.
1193 13:43:46.754484 Root Device child on link 0 CPU_CLUSTER: 0
1194 13:43:46.758190 CPU_CLUSTER: 0 child on link 0 APIC: 00
1195 13:43:46.758617 APIC: 00
1196 13:43:46.761371 APIC: 02
1197 13:43:46.764517 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1198 13:43:46.774379 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1199 13:43:46.784337 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1200 13:43:46.784783 PCI: 00:00.0
1201 13:43:46.794579 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1202 13:43:46.803994 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1203 13:43:46.814339 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1204 13:43:46.824538 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1205 13:43:46.833861 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1206 13:43:46.840446 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1207 13:43:46.850410 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1208 13:43:46.860857 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1209 13:43:46.870698 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1210 13:43:46.880920 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1211 13:43:46.886865 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1212 13:43:46.896957 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1213 13:43:46.907119 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1214 13:43:46.916966 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1215 13:43:46.927120 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1216 13:43:46.933791 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1217 13:43:46.943864 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1218 13:43:46.953766 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1219 13:43:46.963706 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1220 13:43:46.964159 PCI: 00:02.0
1221 13:43:46.976387 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1222 13:43:46.986812 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1223 13:43:46.996422 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1224 13:43:46.999621 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1225 13:43:47.009441 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1226 13:43:47.013154 GENERIC: 0.0
1227 13:43:47.016196 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1228 13:43:47.025991 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1229 13:43:47.029626 GENERIC: 0.0
1230 13:43:47.029717 PCI: 00:08.0
1231 13:43:47.039377 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1232 13:43:47.046249 PCI: 00:14.0 child on link 0 USB0 port 0
1233 13:43:47.056052 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1234 13:43:47.059153 USB0 port 0 child on link 0 USB2 port 0
1235 13:43:47.062580 USB2 port 0
1236 13:43:47.062672 USB2 port 1
1237 13:43:47.065722 USB2 port 2
1238 13:43:47.065813 USB2 port 3
1239 13:43:47.069688 USB2 port 4
1240 13:43:47.069779 USB2 port 5
1241 13:43:47.072810 USB2 port 6
1242 13:43:47.072928 USB2 port 7
1243 13:43:47.075872 USB3 port 0
1244 13:43:47.075965 USB3 port 1
1245 13:43:47.079042 USB3 port 2
1246 13:43:47.082685 USB3 port 3
1247 13:43:47.082777 PCI: 00:14.2
1248 13:43:47.085677 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1249 13:43:47.099286 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1250 13:43:47.099410 GENERIC: 0.0
1251 13:43:47.102400 PCI: 00:14.5
1252 13:43:47.112558 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1253 13:43:47.115735 PCI: 00:15.0 child on link 0 I2C: 00:2c
1254 13:43:47.125257 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1255 13:43:47.128809 I2C: 00:2c
1256 13:43:47.128902 I2C: 00:15
1257 13:43:47.132512 PCI: 00:15.1
1258 13:43:47.141917 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1259 13:43:47.145735 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1260 13:43:47.155269 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1261 13:43:47.159002 GENERIC: 0.0
1262 13:43:47.159094 I2C: 00:15
1263 13:43:47.162050 I2C: 00:10
1264 13:43:47.162143 I2C: 00:10
1265 13:43:47.162216 I2C: 00:2c
1266 13:43:47.165304 I2C: 00:40
1267 13:43:47.165396 I2C: 00:10
1268 13:43:47.168606 I2C: 00:39
1269 13:43:47.171894 PCI: 00:15.3 child on link 0 I2C: 00:36
1270 13:43:47.181822 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1271 13:43:47.185045 I2C: 00:36
1272 13:43:47.185138 I2C: 00:10
1273 13:43:47.188697 I2C: 00:0c
1274 13:43:47.188789 I2C: 00:50
1275 13:43:47.191954 PCI: 00:16.0
1276 13:43:47.201747 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1277 13:43:47.204994 PCI: 00:19.0 child on link 0 I2C: 00:1a
1278 13:43:47.214801 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1279 13:43:47.218105 I2C: 00:1a
1280 13:43:47.218197 I2C: 00:1a
1281 13:43:47.222043 I2C: 00:1a
1282 13:43:47.222136 I2C: 00:28
1283 13:43:47.225324 I2C: 00:29
1284 13:43:47.225425 PCI: 00:19.2
1285 13:43:47.234723 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1286 13:43:47.248346 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1287 13:43:47.248439 PCI: 00:1a.0
1288 13:43:47.258369 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1289 13:43:47.261561 PCI: 00:1e.0
1290 13:43:47.264546 PCI: 00:1e.2 child on link 0 SPI: 00
1291 13:43:47.274772 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1292 13:43:47.274866 SPI: 00
1293 13:43:47.281098 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1294 13:43:47.288151 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1295 13:43:47.291331 PNP: 0c09.0
1296 13:43:47.297753 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1297 13:43:47.301167 PCI: 00:1f.2
1298 13:43:47.310701 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1299 13:43:47.320791 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1300 13:43:47.324048 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1301 13:43:47.334487 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1302 13:43:47.344375 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1303 13:43:47.347556 GENERIC: 0.0
1304 13:43:47.347648 PCI: 00:1f.5
1305 13:43:47.357279 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1306 13:43:47.360407 Done allocating resources.
1307 13:43:47.367186 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1308 13:43:47.370968 Enabling resources...
1309 13:43:47.374255 PCI: 00:00.0 subsystem <- 8086/4e22
1310 13:43:47.377552 PCI: 00:00.0 cmd <- 06
1311 13:43:47.380670 PCI: 00:02.0 subsystem <- 8086/4e55
1312 13:43:47.383801 PCI: 00:02.0 cmd <- 03
1313 13:43:47.387164 PCI: 00:04.0 subsystem <- 8086/4e03
1314 13:43:47.387255 PCI: 00:04.0 cmd <- 02
1315 13:43:47.390389 PCI: 00:05.0 bridge ctrl <- 0003
1316 13:43:47.397405 PCI: 00:05.0 subsystem <- 8086/4e19
1317 13:43:47.397498 PCI: 00:05.0 cmd <- 02
1318 13:43:47.400713 PCI: 00:08.0 cmd <- 06
1319 13:43:47.404038 PCI: 00:14.0 subsystem <- 8086/4ded
1320 13:43:47.406992 PCI: 00:14.0 cmd <- 02
1321 13:43:47.410661 PCI: 00:14.3 subsystem <- 8086/4df0
1322 13:43:47.413593 PCI: 00:14.3 cmd <- 02
1323 13:43:47.417302 PCI: 00:14.5 subsystem <- 8086/4df8
1324 13:43:47.420515 PCI: 00:14.5 cmd <- 06
1325 13:43:47.423864 PCI: 00:15.0 subsystem <- 8086/4de8
1326 13:43:47.423955 PCI: 00:15.0 cmd <- 02
1327 13:43:47.430156 PCI: 00:15.1 subsystem <- 8086/4de9
1328 13:43:47.430248 PCI: 00:15.1 cmd <- 02
1329 13:43:47.433600 PCI: 00:15.2 subsystem <- 8086/4dea
1330 13:43:47.437422 PCI: 00:15.2 cmd <- 02
1331 13:43:47.440436 PCI: 00:15.3 subsystem <- 8086/4deb
1332 13:43:47.443550 PCI: 00:15.3 cmd <- 02
1333 13:43:47.446671 PCI: 00:16.0 subsystem <- 8086/4de0
1334 13:43:47.450598 PCI: 00:16.0 cmd <- 02
1335 13:43:47.453688 PCI: 00:19.0 subsystem <- 8086/4dc5
1336 13:43:47.456765 PCI: 00:19.0 cmd <- 02
1337 13:43:47.460526 PCI: 00:19.2 subsystem <- 8086/4dc7
1338 13:43:47.463465 PCI: 00:19.2 cmd <- 06
1339 13:43:47.467123 PCI: 00:1a.0 subsystem <- 8086/4dc4
1340 13:43:47.467214 PCI: 00:1a.0 cmd <- 06
1341 13:43:47.473819 PCI: 00:1e.2 subsystem <- 8086/4daa
1342 13:43:47.473911 PCI: 00:1e.2 cmd <- 06
1343 13:43:47.477005 PCI: 00:1f.0 subsystem <- 8086/4d87
1344 13:43:47.480160 PCI: 00:1f.0 cmd <- 407
1345 13:43:47.483433 PCI: 00:1f.3 subsystem <- 8086/4dc8
1346 13:43:47.486692 PCI: 00:1f.3 cmd <- 02
1347 13:43:47.489952 PCI: 00:1f.5 subsystem <- 8086/4da4
1348 13:43:47.493160 PCI: 00:1f.5 cmd <- 406
1349 13:43:47.497012 done.
1350 13:43:47.500334 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1351 13:43:47.503564 Initializing devices...
1352 13:43:47.507318 Root Device init
1353 13:43:47.507410 mainboard: EC init
1354 13:43:47.513420 Chrome EC: Set SMI mask to 0x0000000000000000
1355 13:43:47.517139 Chrome EC: clear events_b mask to 0x0000000000000000
1356 13:43:47.523834 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1357 13:43:47.530110 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1358 13:43:47.537169 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1359 13:43:47.540317 Chrome EC: Set WAKE mask to 0x0000000000000000
1360 13:43:47.543598 Root Device init finished in 35 msecs
1361 13:43:47.547966 PCI: 00:00.0 init
1362 13:43:47.551019 CPU TDP = 6 Watts
1363 13:43:47.551111 CPU PL1 = 7 Watts
1364 13:43:47.554115 CPU PL2 = 12 Watts
1365 13:43:47.558099 PCI: 00:00.0 init finished in 6 msecs
1366 13:43:47.561263 PCI: 00:02.0 init
1367 13:43:47.564392 GMA: Found VBT in CBFS
1368 13:43:47.564484 GMA: Found valid VBT in CBFS
1369 13:43:47.571071 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1370 13:43:47.577854 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1371 13:43:47.584057 PCI: 00:02.0 init finished in 18 msecs
1372 13:43:47.584150 PCI: 00:08.0 init
1373 13:43:47.590849 PCI: 00:08.0 init finished in 0 msecs
1374 13:43:47.590941 PCI: 00:14.0 init
1375 13:43:47.597410 XHCI: Updated LFPS sampling OFF time to 9 ms
1376 13:43:47.601212 PCI: 00:14.0 init finished in 4 msecs
1377 13:43:47.604485 PCI: 00:15.0 init
1378 13:43:47.604576 I2C bus 0 version 0x3230302a
1379 13:43:47.611004 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1380 13:43:47.614101 PCI: 00:15.0 init finished in 6 msecs
1381 13:43:47.614189 PCI: 00:15.1 init
1382 13:43:47.617312 I2C bus 1 version 0x3230302a
1383 13:43:47.621201 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1384 13:43:47.624442 PCI: 00:15.1 init finished in 6 msecs
1385 13:43:47.627536 PCI: 00:15.2 init
1386 13:43:47.631171 I2C bus 2 version 0x3230302a
1387 13:43:47.634152 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1388 13:43:47.637288 PCI: 00:15.2 init finished in 6 msecs
1389 13:43:47.641068 PCI: 00:15.3 init
1390 13:43:47.644361 I2C bus 3 version 0x3230302a
1391 13:43:47.647734 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1392 13:43:47.650967 PCI: 00:15.3 init finished in 6 msecs
1393 13:43:47.654248 PCI: 00:16.0 init
1394 13:43:47.657462 PCI: 00:16.0 init finished in 0 msecs
1395 13:43:47.657557 PCI: 00:19.0 init
1396 13:43:47.660714 I2C bus 4 version 0x3230302a
1397 13:43:47.663937 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1398 13:43:47.667590 PCI: 00:19.0 init finished in 6 msecs
1399 13:43:47.671412 PCI: 00:1a.0 init
1400 13:43:47.674744 PCI: 00:1a.0 init finished in 0 msecs
1401 13:43:47.677780 PCI: 00:1f.0 init
1402 13:43:47.681400 IOAPIC: Initializing IOAPIC at 0xfec00000
1403 13:43:47.688149 IOAPIC: Bootstrap Processor Local APIC = 0x00
1404 13:43:47.688240 IOAPIC: ID = 0x02
1405 13:43:47.691168 IOAPIC: Dumping registers
1406 13:43:47.694809 reg 0x0000: 0x02000000
1407 13:43:47.694899 reg 0x0001: 0x00770020
1408 13:43:47.697674 reg 0x0002: 0x00000000
1409 13:43:47.701152 PCI: 00:1f.0 init finished in 21 msecs
1410 13:43:47.705041 PCI: 00:1f.2 init
1411 13:43:47.708331 Disabling ACPI via APMC.
1412 13:43:47.711655 APMC done.
1413 13:43:47.714915 PCI: 00:1f.2 init finished in 6 msecs
1414 13:43:47.725860 PNP: 0c09.0 init
1415 13:43:47.729553 Google Chrome EC uptime: 6.574 seconds
1416 13:43:47.736019 Google Chrome AP resets since EC boot: 0
1417 13:43:47.739161 Google Chrome most recent AP reset causes:
1418 13:43:47.745542 Google Chrome EC reset flags at last EC boot: reset-pin
1419 13:43:47.749273 PNP: 0c09.0 init finished in 18 msecs
1420 13:43:47.749364 Devices initialized
1421 13:43:47.752516 Show all devs... After init.
1422 13:43:47.755586 Root Device: enabled 1
1423 13:43:47.759357 CPU_CLUSTER: 0: enabled 1
1424 13:43:47.762460 DOMAIN: 0000: enabled 1
1425 13:43:47.762551 PCI: 00:00.0: enabled 1
1426 13:43:47.765829 PCI: 00:02.0: enabled 1
1427 13:43:47.768947 PCI: 00:04.0: enabled 1
1428 13:43:47.769038 PCI: 00:05.0: enabled 1
1429 13:43:47.772079 PCI: 00:09.0: enabled 0
1430 13:43:47.775677 PCI: 00:12.6: enabled 0
1431 13:43:47.778936 PCI: 00:14.0: enabled 1
1432 13:43:47.779027 PCI: 00:14.1: enabled 0
1433 13:43:47.782011 PCI: 00:14.2: enabled 0
1434 13:43:47.785780 PCI: 00:14.3: enabled 1
1435 13:43:47.788857 PCI: 00:14.5: enabled 1
1436 13:43:47.788948 PCI: 00:15.0: enabled 1
1437 13:43:47.792013 PCI: 00:15.1: enabled 1
1438 13:43:47.795674 PCI: 00:15.2: enabled 1
1439 13:43:47.798742 PCI: 00:15.3: enabled 1
1440 13:43:47.798832 PCI: 00:16.0: enabled 1
1441 13:43:47.801819 PCI: 00:16.1: enabled 0
1442 13:43:47.805621 PCI: 00:16.4: enabled 0
1443 13:43:47.808843 PCI: 00:16.5: enabled 0
1444 13:43:47.808933 PCI: 00:17.0: enabled 0
1445 13:43:47.812163 PCI: 00:19.0: enabled 1
1446 13:43:47.815326 PCI: 00:19.1: enabled 0
1447 13:43:47.815452 PCI: 00:19.2: enabled 1
1448 13:43:47.818582 PCI: 00:1a.0: enabled 1
1449 13:43:47.821665 PCI: 00:1c.0: enabled 0
1450 13:43:47.825479 PCI: 00:1c.1: enabled 0
1451 13:43:47.825571 PCI: 00:1c.2: enabled 0
1452 13:43:47.828778 PCI: 00:1c.3: enabled 0
1453 13:43:47.832055 PCI: 00:1c.4: enabled 0
1454 13:43:47.835102 PCI: 00:1c.5: enabled 0
1455 13:43:47.835192 PCI: 00:1c.6: enabled 0
1456 13:43:47.838484 PCI: 00:1c.7: enabled 1
1457 13:43:47.841662 PCI: 00:1e.0: enabled 0
1458 13:43:47.845020 PCI: 00:1e.1: enabled 0
1459 13:43:47.845111 PCI: 00:1e.2: enabled 1
1460 13:43:47.848645 PCI: 00:1e.3: enabled 0
1461 13:43:47.851709 PCI: 00:1f.0: enabled 1
1462 13:43:47.851799 PCI: 00:1f.1: enabled 0
1463 13:43:47.855090 PCI: 00:1f.2: enabled 1
1464 13:43:47.858378 PCI: 00:1f.3: enabled 1
1465 13:43:47.861528 PCI: 00:1f.4: enabled 0
1466 13:43:47.861619 PCI: 00:1f.5: enabled 1
1467 13:43:47.865165 PCI: 00:1f.7: enabled 0
1468 13:43:47.868477 GENERIC: 0.0: enabled 1
1469 13:43:47.871525 GENERIC: 0.0: enabled 1
1470 13:43:47.871615 USB0 port 0: enabled 1
1471 13:43:47.874675 GENERIC: 0.0: enabled 1
1472 13:43:47.878440 I2C: 00:2c: enabled 1
1473 13:43:47.878531 I2C: 00:15: enabled 1
1474 13:43:47.881594 GENERIC: 0.0: enabled 0
1475 13:43:47.884848 I2C: 00:15: enabled 1
1476 13:43:47.884937 I2C: 00:10: enabled 0
1477 13:43:47.888113 I2C: 00:10: enabled 0
1478 13:43:47.891287 I2C: 00:2c: enabled 1
1479 13:43:47.895075 I2C: 00:40: enabled 1
1480 13:43:47.895163 I2C: 00:10: enabled 1
1481 13:43:47.898246 I2C: 00:39: enabled 1
1482 13:43:47.901458 I2C: 00:36: enabled 1
1483 13:43:47.901547 I2C: 00:10: enabled 0
1484 13:43:47.905121 I2C: 00:0c: enabled 1
1485 13:43:47.908323 I2C: 00:50: enabled 1
1486 13:43:47.908412 I2C: 00:1a: enabled 1
1487 13:43:47.911325 I2C: 00:1a: enabled 0
1488 13:43:47.915134 I2C: 00:1a: enabled 0
1489 13:43:47.915222 I2C: 00:28: enabled 1
1490 13:43:47.918483 I2C: 00:29: enabled 1
1491 13:43:47.921690 PCI: 00:00.0: enabled 1
1492 13:43:47.921807 SPI: 00: enabled 1
1493 13:43:47.924880 PNP: 0c09.0: enabled 1
1494 13:43:47.927812 GENERIC: 0.0: enabled 0
1495 13:43:47.927900 USB2 port 0: enabled 1
1496 13:43:47.931254 USB2 port 1: enabled 1
1497 13:43:47.935065 USB2 port 2: enabled 1
1498 13:43:47.935153 USB2 port 3: enabled 1
1499 13:43:47.938019 USB2 port 4: enabled 0
1500 13:43:47.941671 USB2 port 5: enabled 1
1501 13:43:47.944791 USB2 port 6: enabled 0
1502 13:43:47.944880 USB2 port 7: enabled 1
1503 13:43:47.948085 USB3 port 0: enabled 1
1504 13:43:47.951256 USB3 port 1: enabled 1
1505 13:43:47.951344 USB3 port 2: enabled 1
1506 13:43:47.955095 USB3 port 3: enabled 1
1507 13:43:47.958198 APIC: 00: enabled 1
1508 13:43:47.958286 APIC: 02: enabled 1
1509 13:43:47.961209 PCI: 00:08.0: enabled 1
1510 13:43:47.968194 BS: BS_DEV_INIT run times (exec / console): 22 / 438 ms
1511 13:43:47.971290 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1512 13:43:47.974470 ELOG: NV offset 0xbfa000 size 0x1000
1513 13:43:47.982189 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1514 13:43:47.989233 ELOG: Event(17) added with size 13 at 2023-06-07 13:43:45 UTC
1515 13:43:47.995531 ELOG: Event(92) added with size 9 at 2023-06-07 13:43:45 UTC
1516 13:43:48.002465 ELOG: Event(93) added with size 9 at 2023-06-07 13:43:45 UTC
1517 13:43:48.008918 ELOG: Event(9E) added with size 10 at 2023-06-07 13:43:45 UTC
1518 13:43:48.015750 ELOG: Event(9F) added with size 14 at 2023-06-07 13:43:45 UTC
1519 13:43:48.018849 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1520 13:43:48.025885 ELOG: Event(A1) added with size 10 at 2023-06-07 13:43:45 UTC
1521 13:43:48.035852 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1522 13:43:48.042275 ELOG: Event(A0) added with size 9 at 2023-06-07 13:43:45 UTC
1523 13:43:48.045338 elog_add_boot_reason: Logged dev mode boot
1524 13:43:48.052460 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1525 13:43:48.052552 Finalize devices...
1526 13:43:48.055669 Devices finalized
1527 13:43:48.058857 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1528 13:43:48.065715 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1529 13:43:48.071941 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1530 13:43:48.075621 ME: HFSTS1 : 0x80030045
1531 13:43:48.078768 ME: HFSTS2 : 0x30280136
1532 13:43:48.082080 ME: HFSTS3 : 0x00000050
1533 13:43:48.089195 ME: HFSTS4 : 0x00004000
1534 13:43:48.092401 ME: HFSTS5 : 0x00000000
1535 13:43:48.095760 ME: HFSTS6 : 0x40400006
1536 13:43:48.099222 ME: Manufacturing Mode : NO
1537 13:43:48.102191 ME: FW Partition Table : OK
1538 13:43:48.105166 ME: Bringup Loader Failure : NO
1539 13:43:48.108420 ME: Firmware Init Complete : NO
1540 13:43:48.112233 ME: Boot Options Present : NO
1541 13:43:48.115419 ME: Update In Progress : NO
1542 13:43:48.118664 ME: D0i3 Support : YES
1543 13:43:48.121731 ME: Low Power State Enabled : NO
1544 13:43:48.125333 ME: CPU Replaced : YES
1545 13:43:48.128307 ME: CPU Replacement Valid : YES
1546 13:43:48.132079 ME: Current Working State : 5
1547 13:43:48.135287 ME: Current Operation State : 1
1548 13:43:48.139060 ME: Current Operation Mode : 3
1549 13:43:48.142127 ME: Error Code : 0
1550 13:43:48.145429 ME: CPU Debug Disabled : YES
1551 13:43:48.148808 ME: TXT Support : NO
1552 13:43:48.155119 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1553 13:43:48.158284 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1554 13:43:48.165362 ACPI: Writing ACPI tables at 76b27000.
1555 13:43:48.165453 ACPI: * FACS
1556 13:43:48.169214 ACPI: * DSDT
1557 13:43:48.172358 Ramoops buffer: 0x100000@0x76a26000.
1558 13:43:48.175471 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1559 13:43:48.182177 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1560 13:43:48.185288 Google Chrome EC: version:
1561 13:43:48.189063 ro: magolor_1.1.9999-103b6f9
1562 13:43:48.189155 rw: magolor_1.1.9999-103b6f9
1563 13:43:48.192080 running image: 1
1564 13:43:48.198428 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1565 13:43:48.202333 ACPI: * FADT
1566 13:43:48.202429 SCI is IRQ9
1567 13:43:48.205571 ACPI: added table 1/32, length now 40
1568 13:43:48.208629 ACPI: * SSDT
1569 13:43:48.211736 Found 1 CPU(s) with 2 core(s) each.
1570 13:43:48.215104 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1571 13:43:48.222185 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1572 13:43:48.225463 Could not locate 'wifi_sar' in VPD.
1573 13:43:48.228502 Checking CBFS for default SAR values
1574 13:43:48.235932 wifi_sar_defaults.hex has bad len in CBFS
1575 13:43:48.238927 failed from getting SAR limits!
1576 13:43:48.242142 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1577 13:43:48.249032 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1578 13:43:48.252259 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1579 13:43:48.259172 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1580 13:43:48.262507 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1581 13:43:48.268992 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1582 13:43:48.272302 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1583 13:43:48.279191 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1584 13:43:48.285412 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1585 13:43:48.292154 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1586 13:43:48.295305 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1587 13:43:48.302333 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1588 13:43:48.308699 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1589 13:43:48.311871 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1590 13:43:48.315609 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1591 13:43:48.322803 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1592 13:43:48.326654 PS2K: Passing 101 keymaps to kernel
1593 13:43:48.332984 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1594 13:43:48.339411 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1595 13:43:48.343410 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1596 13:43:48.349394 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1597 13:43:48.353173 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1598 13:43:48.359464 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1599 13:43:48.365943 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1600 13:43:48.373078 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1601 13:43:48.376237 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1602 13:43:48.382596 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1603 13:43:48.386472 ACPI: added table 2/32, length now 44
1604 13:43:48.389640 ACPI: * MCFG
1605 13:43:48.392929 ACPI: added table 3/32, length now 48
1606 13:43:48.393021 ACPI: * TPM2
1607 13:43:48.396086 TPM2 log created at 0x76a16000
1608 13:43:48.399207 ACPI: added table 4/32, length now 52
1609 13:43:48.402897 ACPI: * MADT
1610 13:43:48.402988 SCI is IRQ9
1611 13:43:48.406026 ACPI: added table 5/32, length now 56
1612 13:43:48.409335 current = 76b2d580
1613 13:43:48.412557 ACPI: * DMAR
1614 13:43:48.416249 ACPI: added table 6/32, length now 60
1615 13:43:48.419411 ACPI: added table 7/32, length now 64
1616 13:43:48.419515 ACPI: * HPET
1617 13:43:48.422459 ACPI: added table 8/32, length now 68
1618 13:43:48.425780 ACPI: done.
1619 13:43:48.429086 ACPI tables: 26304 bytes.
1620 13:43:48.432796 smbios_write_tables: 76a15000
1621 13:43:48.435994 EC returned error result code 3
1622 13:43:48.439084 Couldn't obtain OEM name from CBI
1623 13:43:48.442380 Create SMBIOS type 16
1624 13:43:48.446199 Create SMBIOS type 17
1625 13:43:48.446291 GENERIC: 0.0 (WIFI Device)
1626 13:43:48.449329 SMBIOS tables: 913 bytes.
1627 13:43:48.452965 Writing table forward entry at 0x00000500
1628 13:43:48.459080 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1629 13:43:48.462287 Writing coreboot table at 0x76b4b000
1630 13:43:48.469259 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1631 13:43:48.475683 1. 0000000000001000-000000000009ffff: RAM
1632 13:43:48.478898 2. 00000000000a0000-00000000000fffff: RESERVED
1633 13:43:48.482723 3. 0000000000100000-0000000076a14fff: RAM
1634 13:43:48.489013 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1635 13:43:48.492754 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1636 13:43:48.498797 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1637 13:43:48.505323 7. 0000000077000000-000000007fbfffff: RESERVED
1638 13:43:48.508753 8. 00000000c0000000-00000000cfffffff: RESERVED
1639 13:43:48.515704 9. 00000000fb000000-00000000fb000fff: RESERVED
1640 13:43:48.518814 10. 00000000fe000000-00000000fe00ffff: RESERVED
1641 13:43:48.521966 11. 00000000fea80000-00000000fea87fff: RESERVED
1642 13:43:48.528922 12. 00000000fed80000-00000000fed87fff: RESERVED
1643 13:43:48.532116 13. 00000000fed90000-00000000fed92fff: RESERVED
1644 13:43:48.538529 14. 00000000feda0000-00000000feda1fff: RESERVED
1645 13:43:48.542244 15. 0000000100000000-00000001803fffff: RAM
1646 13:43:48.545555 Passing 4 GPIOs to payload:
1647 13:43:48.551815 NAME | PORT | POLARITY | VALUE
1648 13:43:48.555695 lid | undefined | high | high
1649 13:43:48.561921 power | undefined | high | low
1650 13:43:48.565110 oprom | undefined | high | low
1651 13:43:48.572029 EC in RW | 0x000000b9 | high | low
1652 13:43:48.578643 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum c096
1653 13:43:48.581806 coreboot table: 1504 bytes.
1654 13:43:48.585096 IMD ROOT 0. 0x76fff000 0x00001000
1655 13:43:48.588989 IMD SMALL 1. 0x76ffe000 0x00001000
1656 13:43:48.592134 FSP MEMORY 2. 0x76c4e000 0x003b0000
1657 13:43:48.595453 CONSOLE 3. 0x76c2e000 0x00020000
1658 13:43:48.598649 FMAP 4. 0x76c2d000 0x00000578
1659 13:43:48.602249 TIME STAMP 5. 0x76c2c000 0x00000910
1660 13:43:48.605255 VBOOT WORK 6. 0x76c18000 0x00014000
1661 13:43:48.612114 ROMSTG STCK 7. 0x76c17000 0x00001000
1662 13:43:48.615091 AFTER CAR 8. 0x76c0d000 0x0000a000
1663 13:43:48.618848 RAMSTAGE 9. 0x76ba7000 0x00066000
1664 13:43:48.621868 REFCODE 10. 0x76b67000 0x00040000
1665 13:43:48.625047 SMM BACKUP 11. 0x76b57000 0x00010000
1666 13:43:48.628670 4f444749 12. 0x76b55000 0x00002000
1667 13:43:48.631868 EXT VBT13. 0x76b53000 0x00001c43
1668 13:43:48.635177 COREBOOT 14. 0x76b4b000 0x00008000
1669 13:43:48.638519 ACPI 15. 0x76b27000 0x00024000
1670 13:43:48.644785 ACPI GNVS 16. 0x76b26000 0x00001000
1671 13:43:48.648431 RAMOOPS 17. 0x76a26000 0x00100000
1672 13:43:48.651562 TPM2 TCGLOG18. 0x76a16000 0x00010000
1673 13:43:48.654922 SMBIOS 19. 0x76a15000 0x00000800
1674 13:43:48.655014 IMD small region:
1675 13:43:48.661741 IMD ROOT 0. 0x76ffec00 0x00000400
1676 13:43:48.665030 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1677 13:43:48.668101 VPD 2. 0x76ffeb60 0x0000006c
1678 13:43:48.671474 POWER STATE 3. 0x76ffeb20 0x00000040
1679 13:43:48.674948 ROMSTAGE 4. 0x76ffeb00 0x00000004
1680 13:43:48.678253 MEM INFO 5. 0x76ffe920 0x000001e0
1681 13:43:48.684761 BS: BS_WRITE_TABLES run times (exec / console): 8 / 517 ms
1682 13:43:48.688085 MTRR: Physical address space:
1683 13:43:48.695079 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1684 13:43:48.701558 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1685 13:43:48.708097 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1686 13:43:48.714668 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1687 13:43:48.721309 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1688 13:43:48.724538 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1689 13:43:48.731435 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1690 13:43:48.738168 MTRR: Fixed MSR 0x250 0x0606060606060606
1691 13:43:48.741459 MTRR: Fixed MSR 0x258 0x0606060606060606
1692 13:43:48.744634 MTRR: Fixed MSR 0x259 0x0000000000000000
1693 13:43:48.747715 MTRR: Fixed MSR 0x268 0x0606060606060606
1694 13:43:48.751319 MTRR: Fixed MSR 0x269 0x0606060606060606
1695 13:43:48.757922 MTRR: Fixed MSR 0x26a 0x0606060606060606
1696 13:43:48.761128 MTRR: Fixed MSR 0x26b 0x0606060606060606
1697 13:43:48.764276 MTRR: Fixed MSR 0x26c 0x0606060606060606
1698 13:43:48.767651 MTRR: Fixed MSR 0x26d 0x0606060606060606
1699 13:43:48.774314 MTRR: Fixed MSR 0x26e 0x0606060606060606
1700 13:43:48.777377 MTRR: Fixed MSR 0x26f 0x0606060606060606
1701 13:43:48.781256 call enable_fixed_mtrr()
1702 13:43:48.784545 CPU physical address size: 39 bits
1703 13:43:48.787744 MTRR: default type WB/UC MTRR counts: 6/5.
1704 13:43:48.791072 MTRR: UC selected as default type.
1705 13:43:48.797528 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1706 13:43:48.803966 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1707 13:43:48.810605 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1708 13:43:48.817710 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1709 13:43:48.824299 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1710 13:43:48.824392
1711 13:43:48.824464 MTRR check
1712 13:43:48.827401 Fixed MTRRs : Enabled
1713 13:43:48.830518 Variable MTRRs: Enabled
1714 13:43:48.830637
1715 13:43:48.834124 MTRR: Fixed MSR 0x250 0x0606060606060606
1716 13:43:48.837190 MTRR: Fixed MSR 0x258 0x0606060606060606
1717 13:43:48.840905 MTRR: Fixed MSR 0x259 0x0000000000000000
1718 13:43:48.847373 MTRR: Fixed MSR 0x268 0x0606060606060606
1719 13:43:48.850417 MTRR: Fixed MSR 0x269 0x0606060606060606
1720 13:43:48.854239 MTRR: Fixed MSR 0x26a 0x0606060606060606
1721 13:43:48.857396 MTRR: Fixed MSR 0x26b 0x0606060606060606
1722 13:43:48.863911 MTRR: Fixed MSR 0x26c 0x0606060606060606
1723 13:43:48.867186 MTRR: Fixed MSR 0x26d 0x0606060606060606
1724 13:43:48.870405 MTRR: Fixed MSR 0x26e 0x0606060606060606
1725 13:43:48.873571 MTRR: Fixed MSR 0x26f 0x0606060606060606
1726 13:43:48.880474 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1727 13:43:48.883699 call enable_fixed_mtrr()
1728 13:43:48.886974 Checking cr50 for pending updates
1729 13:43:48.890977 CPU physical address size: 39 bits
1730 13:43:48.894152 Reading cr50 TPM mode
1731 13:43:48.903691 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1732 13:43:48.910905 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1733 13:43:48.914127 Checking segment from ROM address 0xfff9d5b8
1734 13:43:48.921427 Checking segment from ROM address 0xfff9d5d4
1735 13:43:48.924075 Loading segment from ROM address 0xfff9d5b8
1736 13:43:48.927854 code (compression=0)
1737 13:43:48.934418 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1738 13:43:48.944207 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1739 13:43:48.947332 it's not compressed!
1740 13:43:49.073297 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1741 13:43:49.080163 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1742 13:43:49.086962 Loading segment from ROM address 0xfff9d5d4
1743 13:43:49.090573 Entry Point 0x30000000
1744 13:43:49.090693 Loaded segments
1745 13:43:49.096963 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1746 13:43:49.113185 Finalizing chipset.
1747 13:43:49.116490 Finalizing SMM.
1748 13:43:49.116583 APMC done.
1749 13:43:49.123662 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1750 13:43:49.126945 mp_park_aps done after 0 msecs.
1751 13:43:49.130118 Jumping to boot code at 0x30000000(0x76b4b000)
1752 13:43:49.139838 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1753 13:43:49.139938
1754 13:43:49.140011
1755 13:43:49.140080
1756 13:43:49.143019 Starting depthcharge on Magolor...
1757 13:43:49.143110
1758 13:43:49.143468 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1759 13:43:49.143583 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1760 13:43:49.143677 Setting prompt string to ['dedede:']
1761 13:43:49.143767 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1762 13:43:49.153296 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1763 13:43:49.153390
1764 13:43:49.159783 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1765 13:43:49.159876
1766 13:43:49.162938 fw_config match found: AUDIO_AMP=UNPROVISIONED
1767 13:43:49.163030
1768 13:43:49.166616 Wipe memory regions:
1769 13:43:49.166707
1770 13:43:49.169648 [0x00000000001000, 0x000000000a0000)
1771 13:43:49.169739
1772 13:43:49.172770 [0x00000000100000, 0x00000030000000)
1773 13:43:49.301833
1774 13:43:49.305318 [0x00000031062170, 0x00000076a15000)
1775 13:43:49.474373
1776 13:43:49.477340 [0x00000100000000, 0x00000180400000)
1777 13:43:50.540724
1778 13:43:50.540880 R8152: Initializing
1779 13:43:50.540956
1780 13:43:50.543725 Version 9 (ocp_data = 6010)
1781 13:43:50.543816
1782 13:43:50.547001 R8152: Done initializing
1783 13:43:50.547092
1784 13:43:50.550887 Adding net device
1785 13:43:50.550978
1786 13:43:50.553482 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1787 13:43:50.553573
1788 13:43:50.557366
1789 13:43:50.557459
1790 13:43:50.557751 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1792 13:43:50.658204 dedede: tftpboot 192.168.201.1 10624722/tftp-deploy-m1w3kqel/kernel/bzImage 10624722/tftp-deploy-m1w3kqel/kernel/cmdline 10624722/tftp-deploy-m1w3kqel/ramdisk/ramdisk.cpio.gz
1793 13:43:50.658362 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1794 13:43:50.658453 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1795 13:43:50.662929 tftpboot 192.168.201.1 10624722/tftp-deploy-m1w3kqel/kernel/bzIploy-m1w3kqel/kernel/cmdline 10624722/tftp-deploy-m1w3kqel/ramdisk/ramdisk.cpio.gz
1796 13:43:50.663030
1797 13:43:50.663101 Waiting for link
1798 13:43:50.865221
1799 13:43:50.865358 done.
1800 13:43:50.865430
1801 13:43:50.865497 MAC: 00:e0:4c:78:86:ac
1802 13:43:50.865562
1803 13:43:50.868392 Sending DHCP discover... done.
1804 13:43:50.868503
1805 13:43:50.871656 Waiting for reply... done.
1806 13:43:50.871757
1807 13:43:50.874723 Sending DHCP request... done.
1808 13:43:50.874820
1809 13:43:50.878524 Waiting for reply... done.
1810 13:43:50.878605
1811 13:43:50.881854 My ip is 192.168.201.16
1812 13:43:50.881952
1813 13:43:50.885079 The DHCP server ip is 192.168.201.1
1814 13:43:50.885166
1815 13:43:50.888381 TFTP server IP predefined by user: 192.168.201.1
1816 13:43:50.888465
1817 13:43:50.894853 Bootfile predefined by user: 10624722/tftp-deploy-m1w3kqel/kernel/bzImage
1818 13:43:50.894954
1819 13:43:50.898677 Sending tftp read request... done.
1820 13:43:50.898765
1821 13:43:50.901938 Waiting for the transfer...
1822 13:43:50.905074
1823 13:43:51.181172 00000000 ################################################################
1824 13:43:51.181320
1825 13:43:51.472093 00080000 ################################################################
1826 13:43:51.472236
1827 13:43:51.739044 00100000 ################################################################
1828 13:43:51.739187
1829 13:43:52.019199 00180000 ################################################################
1830 13:43:52.019345
1831 13:43:52.277875 00200000 ################################################################
1832 13:43:52.278022
1833 13:43:52.552941 00280000 ################################################################
1834 13:43:52.553118
1835 13:43:52.824101 00300000 ################################################################
1836 13:43:52.824276
1837 13:43:53.085589 00380000 ################################################################
1838 13:43:53.085766
1839 13:43:53.346855 00400000 ################################################################
1840 13:43:53.347029
1841 13:43:53.612846 00480000 ################################################################
1842 13:43:53.613009
1843 13:43:53.881935 00500000 ################################################################
1844 13:43:53.882112
1845 13:43:54.148312 00580000 ################################################################
1846 13:43:54.148451
1847 13:43:54.411114 00600000 ################################################################
1848 13:43:54.411292
1849 13:43:54.670745 00680000 ################################################################
1850 13:43:54.670921
1851 13:43:54.929712 00700000 ################################################################
1852 13:43:54.929853
1853 13:43:55.012869 00780000 #################### done.
1854 13:43:55.013007
1855 13:43:55.016016 The bootfile was 8028048 bytes long.
1856 13:43:55.016109
1857 13:43:55.019155 Sending tftp read request... done.
1858 13:43:55.019247
1859 13:43:55.022360 Waiting for the transfer...
1860 13:43:55.022451
1861 13:43:55.284389 00000000 ################################################################
1862 13:43:55.284534
1863 13:43:55.547416 00080000 ################################################################
1864 13:43:55.547610
1865 13:43:55.812120 00100000 ################################################################
1866 13:43:55.812266
1867 13:43:56.078714 00180000 ################################################################
1868 13:43:56.078855
1869 13:43:56.326897 00200000 ################################################################
1870 13:43:56.327076
1871 13:43:56.577637 00280000 ################################################################
1872 13:43:56.577809
1873 13:43:56.834267 00300000 ################################################################
1874 13:43:56.834452
1875 13:43:57.104016 00380000 ################################################################
1876 13:43:57.104156
1877 13:43:57.373437 00400000 ################################################################
1878 13:43:57.373581
1879 13:43:57.646264 00480000 ################################################################
1880 13:43:57.646439
1881 13:43:57.893985 00500000 ################################################################ done.
1882 13:43:57.894167
1883 13:43:57.897239 Sending tftp read request... done.
1884 13:43:57.897358
1885 13:43:57.897467 Waiting for the transfer...
1886 13:43:57.900654
1887 13:43:57.900783 00000000 # done.
1888 13:43:57.900892
1889 13:43:57.911037 Command line loaded dynamically from TFTP file: 10624722/tftp-deploy-m1w3kqel/kernel/cmdline
1890 13:43:57.911155
1891 13:43:57.930814 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10624722/extract-nfsrootfs-vq71h39m,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1892 13:43:57.934013
1893 13:43:57.937067 ec_init: CrosEC protocol v3 supported (256, 256)
1894 13:43:57.943367
1895 13:43:57.947014 Shutting down all USB controllers.
1896 13:43:57.947113
1897 13:43:57.947186 Removing current net device
1898 13:43:57.947255
1899 13:43:57.950075 Finalizing coreboot
1900 13:43:57.950166
1901 13:43:57.956445 Exiting depthcharge with code 4 at timestamp: 15621246
1902 13:43:57.956545
1903 13:43:57.956619
1904 13:43:57.956687 Starting kernel ...
1905 13:43:57.956754
1906 13:43:57.956818
1907 13:43:57.957190 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
1908 13:43:57.957301 start: 2.2.5 auto-login-action (timeout 00:04:38) [common]
1909 13:43:57.957388 Setting prompt string to ['Linux version [0-9]']
1910 13:43:57.957465 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1911 13:43:57.957541 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1913 13:48:35.958235 end: 2.2.5 auto-login-action (duration 00:04:38) [common]
1915 13:48:35.959318 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 278 seconds'
1917 13:48:35.960237 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1920 13:48:35.961680 end: 2 depthcharge-action (duration 00:05:00) [common]
1922 13:48:35.962794 Cleaning after the job
1923 13:48:35.962888 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/ramdisk
1924 13:48:35.963826 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/kernel
1925 13:48:35.964850 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/nfsrootfs
1926 13:48:36.026309 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624722/tftp-deploy-m1w3kqel/modules
1927 13:48:36.026796 start: 5.1 power-off (timeout 00:00:30) [common]
1928 13:48:36.026989 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=off'
1929 13:48:36.105901 >> Command sent successfully.
1930 13:48:36.111767 Returned 0 in 0 seconds
1931 13:48:36.212735 end: 5.1 power-off (duration 00:00:00) [common]
1933 13:48:36.214286 start: 5.2 read-feedback (timeout 00:10:00) [common]
1934 13:48:36.215576 Listened to connection for namespace 'common' for up to 1s
1936 13:48:36.216921 Listened to connection for namespace 'common' for up to 1s
1937 13:48:37.215759 Finalising connection for namespace 'common'
1938 13:48:37.216377 Disconnecting from shell: Finalise
1939 13:48:37.216769
1940 13:48:37.317786 end: 5.2 read-feedback (duration 00:00:01) [common]
1941 13:48:37.318389 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624722
1942 13:48:37.627556 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624722
1943 13:48:37.627759 JobError: Your job cannot terminate cleanly.