Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 13:43:14.477417 lava-dispatcher, installed at version: 2023.05.1
2 13:43:14.477626 start: 0 validate
3 13:43:14.477761 Start time: 2023-06-07 13:43:14.477753+00:00 (UTC)
4 13:43:14.477894 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:43:14.478023 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:43:14.747766 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:43:14.748019 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:43:15.017098 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:43:15.017802 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:43:19.815195 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:43:19.816170 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
12 13:43:20.082563 validate duration: 5.60
14 13:43:20.083209 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:43:20.083605 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:43:20.083958 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:43:20.084354 Not decompressing ramdisk as can be used compressed.
18 13:43:20.084591 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/initrd.cpio.gz
19 13:43:20.084772 saving as /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/ramdisk/initrd.cpio.gz
20 13:43:20.084945 total size: 5432865 (5MB)
21 13:43:20.596402 progress 0% (0MB)
22 13:43:20.604799 progress 5% (0MB)
23 13:43:20.612416 progress 10% (0MB)
24 13:43:20.620422 progress 15% (0MB)
25 13:43:20.626259 progress 20% (1MB)
26 13:43:20.630240 progress 25% (1MB)
27 13:43:20.633563 progress 30% (1MB)
28 13:43:20.636864 progress 35% (1MB)
29 13:43:20.639354 progress 40% (2MB)
30 13:43:20.641815 progress 45% (2MB)
31 13:43:20.643956 progress 50% (2MB)
32 13:43:20.646356 progress 55% (2MB)
33 13:43:20.648287 progress 60% (3MB)
34 13:43:20.650195 progress 65% (3MB)
35 13:43:20.652248 progress 70% (3MB)
36 13:43:20.653929 progress 75% (3MB)
37 13:43:20.655601 progress 80% (4MB)
38 13:43:20.657231 progress 85% (4MB)
39 13:43:20.658927 progress 90% (4MB)
40 13:43:20.660444 progress 95% (4MB)
41 13:43:20.661956 progress 100% (5MB)
42 13:43:20.662170 5MB downloaded in 0.58s (8.98MB/s)
43 13:43:20.662321 end: 1.1.1 http-download (duration 00:00:01) [common]
45 13:43:20.662563 end: 1.1 download-retry (duration 00:00:01) [common]
46 13:43:20.662651 start: 1.2 download-retry (timeout 00:09:59) [common]
47 13:43:20.662737 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 13:43:20.662872 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
49 13:43:20.662943 saving as /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/kernel/bzImage
50 13:43:20.663006 total size: 8028048 (7MB)
51 13:43:20.663067 No compression specified
52 13:43:20.664151 progress 0% (0MB)
53 13:43:20.666297 progress 5% (0MB)
54 13:43:20.668353 progress 10% (0MB)
55 13:43:20.670374 progress 15% (1MB)
56 13:43:20.672402 progress 20% (1MB)
57 13:43:20.674585 progress 25% (1MB)
58 13:43:20.676656 progress 30% (2MB)
59 13:43:20.678683 progress 35% (2MB)
60 13:43:20.680753 progress 40% (3MB)
61 13:43:20.682936 progress 45% (3MB)
62 13:43:20.684987 progress 50% (3MB)
63 13:43:20.686975 progress 55% (4MB)
64 13:43:20.689017 progress 60% (4MB)
65 13:43:20.691156 progress 65% (5MB)
66 13:43:20.693195 progress 70% (5MB)
67 13:43:20.695195 progress 75% (5MB)
68 13:43:20.697236 progress 80% (6MB)
69 13:43:20.699421 progress 85% (6MB)
70 13:43:20.701452 progress 90% (6MB)
71 13:43:20.703439 progress 95% (7MB)
72 13:43:20.705495 progress 100% (7MB)
73 13:43:20.705732 7MB downloaded in 0.04s (179.21MB/s)
74 13:43:20.705870 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:43:20.706099 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:43:20.706186 start: 1.3 download-retry (timeout 00:09:59) [common]
78 13:43:20.706275 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 13:43:20.706404 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230527.0/amd64/full.rootfs.tar.xz
80 13:43:20.706475 saving as /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/nfsrootfs/full.rootfs.tar
81 13:43:20.706537 total size: 133381488 (127MB)
82 13:43:20.706598 Using unxz to decompress xz
83 13:43:20.710177 progress 0% (0MB)
84 13:43:21.046871 progress 5% (6MB)
85 13:43:21.399184 progress 10% (12MB)
86 13:43:21.683758 progress 15% (19MB)
87 13:43:21.868291 progress 20% (25MB)
88 13:43:22.110132 progress 25% (31MB)
89 13:43:22.455200 progress 30% (38MB)
90 13:43:22.802115 progress 35% (44MB)
91 13:43:23.206515 progress 40% (50MB)
92 13:43:23.595291 progress 45% (57MB)
93 13:43:23.961518 progress 50% (63MB)
94 13:43:24.338270 progress 55% (69MB)
95 13:43:24.711725 progress 60% (76MB)
96 13:43:25.078568 progress 65% (82MB)
97 13:43:25.447669 progress 70% (89MB)
98 13:43:25.816317 progress 75% (95MB)
99 13:43:26.259097 progress 80% (101MB)
100 13:43:26.694079 progress 85% (108MB)
101 13:43:26.962397 progress 90% (114MB)
102 13:43:27.311112 progress 95% (120MB)
103 13:43:27.706988 progress 100% (127MB)
104 13:43:27.712539 127MB downloaded in 7.01s (18.16MB/s)
105 13:43:27.712825 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:43:27.713092 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:43:27.713184 start: 1.4 download-retry (timeout 00:09:52) [common]
109 13:43:27.713274 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 13:43:27.713436 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
111 13:43:27.713511 saving as /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/modules/modules.tar
112 13:43:27.713575 total size: 255828 (0MB)
113 13:43:27.713640 Using unxz to decompress xz
114 13:43:27.717411 progress 12% (0MB)
115 13:43:27.717826 progress 25% (0MB)
116 13:43:27.718081 progress 38% (0MB)
117 13:43:27.719448 progress 51% (0MB)
118 13:43:27.721467 progress 64% (0MB)
119 13:43:27.723354 progress 76% (0MB)
120 13:43:27.725238 progress 89% (0MB)
121 13:43:27.727008 progress 100% (0MB)
122 13:43:27.733059 0MB downloaded in 0.02s (12.53MB/s)
123 13:43:27.733377 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:43:27.733691 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:43:27.733791 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 13:43:27.733900 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 13:43:29.853131 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10624701/extract-nfsrootfs-hvhpfhne
129 13:43:29.853348 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 13:43:29.853450 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 13:43:29.853632 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac
132 13:43:29.853794 makedir: /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin
133 13:43:29.853900 makedir: /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/tests
134 13:43:29.853999 makedir: /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/results
135 13:43:29.854102 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-add-keys
136 13:43:29.854245 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-add-sources
137 13:43:29.854408 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-background-process-start
138 13:43:29.854553 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-background-process-stop
139 13:43:29.854679 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-common-functions
140 13:43:29.854803 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-echo-ipv4
141 13:43:29.854967 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-install-packages
142 13:43:29.855123 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-installed-packages
143 13:43:29.855277 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-os-build
144 13:43:29.855472 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-probe-channel
145 13:43:29.855600 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-probe-ip
146 13:43:29.855727 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-target-ip
147 13:43:29.855851 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-target-mac
148 13:43:29.855990 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-target-storage
149 13:43:29.856222 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-test-case
150 13:43:29.856347 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-test-event
151 13:43:29.856485 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-test-feedback
152 13:43:29.856652 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-test-raise
153 13:43:29.856776 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-test-reference
154 13:43:29.856904 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-test-runner
155 13:43:29.857043 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-test-set
156 13:43:29.857184 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-test-shell
157 13:43:29.857309 Updating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-install-packages (oe)
158 13:43:29.857459 Updating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/bin/lava-installed-packages (oe)
159 13:43:29.857617 Creating /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/environment
160 13:43:29.857724 LAVA metadata
161 13:43:29.857798 - LAVA_JOB_ID=10624701
162 13:43:29.857864 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:43:29.857972 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 13:43:29.858042 skipped lava-vland-overlay
165 13:43:29.858120 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:43:29.858239 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 13:43:29.858347 skipped lava-multinode-overlay
168 13:43:29.858439 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:43:29.858522 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 13:43:29.858600 Loading test definitions
171 13:43:29.858696 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 13:43:29.858791 Using /lava-10624701 at stage 0
173 13:43:29.859213 uuid=10624701_1.5.2.3.1 testdef=None
174 13:43:29.859309 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 13:43:29.859396 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 13:43:29.859974 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 13:43:29.860274 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 13:43:29.861012 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 13:43:29.861247 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 13:43:29.861964 runner path: /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/0/tests/0_dmesg test_uuid 10624701_1.5.2.3.1
183 13:43:29.862121 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 13:43:29.862350 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 13:43:29.862424 Using /lava-10624701 at stage 1
187 13:43:29.862734 uuid=10624701_1.5.2.3.5 testdef=None
188 13:43:29.862838 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 13:43:29.862925 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 13:43:29.863417 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 13:43:29.863641 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 13:43:29.864379 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 13:43:29.864614 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 13:43:29.865238 runner path: /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/1/tests/1_bootrr test_uuid 10624701_1.5.2.3.5
197 13:43:29.865395 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 13:43:29.865604 Creating lava-test-runner.conf files
200 13:43:29.865669 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/0 for stage 0
201 13:43:29.865763 - 0_dmesg
202 13:43:29.865842 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624701/lava-overlay-pw2pb0ac/lava-10624701/1 for stage 1
203 13:43:29.865932 - 1_bootrr
204 13:43:29.866026 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 13:43:29.866111 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 13:43:29.873712 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 13:43:29.873824 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 13:43:29.873914 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 13:43:29.874003 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 13:43:29.874090 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 13:43:30.006906 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 13:43:30.007269 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 13:43:30.007391 extracting modules file /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624701/extract-nfsrootfs-hvhpfhne
214 13:43:30.021243 extracting modules file /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624701/extract-overlay-ramdisk-yfb2nzp8/ramdisk
215 13:43:30.035820 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 13:43:30.036003 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 13:43:30.036155 [common] Applying overlay to NFS
218 13:43:30.036230 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624701/compress-overlay-9iys0kli/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624701/extract-nfsrootfs-hvhpfhne
219 13:43:30.044292 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 13:43:30.044436 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 13:43:30.044558 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 13:43:30.044677 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 13:43:30.044766 Building ramdisk /var/lib/lava/dispatcher/tmp/10624701/extract-overlay-ramdisk-yfb2nzp8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624701/extract-overlay-ramdisk-yfb2nzp8/ramdisk
224 13:43:30.109822 >> 26221 blocks
225 13:43:30.643407 rename /var/lib/lava/dispatcher/tmp/10624701/extract-overlay-ramdisk-yfb2nzp8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/ramdisk/ramdisk.cpio.gz
226 13:43:30.643853 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 13:43:30.644042 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 13:43:30.644165 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 13:43:30.644268 No mkimage arch provided, not using FIT.
230 13:43:30.644362 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 13:43:30.644450 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 13:43:30.644552 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 13:43:30.644651 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 13:43:30.644734 No LXC device requested
235 13:43:30.644829 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 13:43:30.644919 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 13:43:30.645001 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 13:43:30.645072 Checking files for TFTP limit of 4294967296 bytes.
239 13:43:30.645466 end: 1 tftp-deploy (duration 00:00:11) [common]
240 13:43:30.645574 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 13:43:30.645667 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 13:43:30.645841 substitutions:
243 13:43:30.645946 - {DTB}: None
244 13:43:30.646022 - {INITRD}: 10624701/tftp-deploy-qpny5g5i/ramdisk/ramdisk.cpio.gz
245 13:43:30.646086 - {KERNEL}: 10624701/tftp-deploy-qpny5g5i/kernel/bzImage
246 13:43:30.646147 - {LAVA_MAC}: None
247 13:43:30.646208 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10624701/extract-nfsrootfs-hvhpfhne
248 13:43:30.646274 - {NFS_SERVER_IP}: 192.168.201.1
249 13:43:30.646334 - {PRESEED_CONFIG}: None
250 13:43:30.646392 - {PRESEED_LOCAL}: None
251 13:43:30.646450 - {RAMDISK}: 10624701/tftp-deploy-qpny5g5i/ramdisk/ramdisk.cpio.gz
252 13:43:30.646508 - {ROOT_PART}: None
253 13:43:30.646565 - {ROOT}: None
254 13:43:30.646622 - {SERVER_IP}: 192.168.201.1
255 13:43:30.646678 - {TEE}: None
256 13:43:30.646734 Parsed boot commands:
257 13:43:30.646794 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 13:43:30.646972 Parsed boot commands: tftpboot 192.168.201.1 10624701/tftp-deploy-qpny5g5i/kernel/bzImage 10624701/tftp-deploy-qpny5g5i/kernel/cmdline 10624701/tftp-deploy-qpny5g5i/ramdisk/ramdisk.cpio.gz
259 13:43:30.647064 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 13:43:30.647150 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 13:43:30.647245 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 13:43:30.647344 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 13:43:30.647416 Not connected, no need to disconnect.
264 13:43:30.647493 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 13:43:30.647579 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 13:43:30.647648 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
267 13:43:30.651258 Setting prompt string to ['lava-test: # ']
268 13:43:30.651621 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 13:43:30.651734 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 13:43:30.651851 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 13:43:30.651976 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 13:43:30.652229 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
273 13:43:35.787046 >> Command sent successfully.
274 13:43:35.789711 Returned 0 in 5 seconds
275 13:43:35.890090 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 13:43:35.890420 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 13:43:35.890555 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 13:43:35.890675 Setting prompt string to 'Starting depthcharge on Voema...'
280 13:43:35.890772 Changing prompt to 'Starting depthcharge on Voema...'
281 13:43:35.890871 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 13:43:35.891226 [Enter `^Ec?' for help]
283 13:43:37.494123
284 13:43:37.494292
285 13:43:37.503825 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 13:43:37.507115 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 13:43:37.513619 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 13:43:37.517134 CPU: AES supported, TXT NOT supported, VT supported
289 13:43:37.523975 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 13:43:37.530295 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 13:43:37.533681 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 13:43:37.537230 VBOOT: Loading verstage.
293 13:43:37.540149 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 13:43:37.546750 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 13:43:37.550512 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 13:43:37.560950 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 13:43:37.567705 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 13:43:37.567797
299 13:43:37.567867
300 13:43:37.580582 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 13:43:37.594405 Probing TPM: . done!
302 13:43:37.597841 TPM ready after 0 ms
303 13:43:37.601307 Connected to device vid:did:rid of 1ae0:0028:00
304 13:43:37.612676 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
305 13:43:37.619389 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 13:43:37.622341 Initialized TPM device CR50 revision 0
307 13:43:37.674958 tlcl_send_startup: Startup return code is 0
308 13:43:37.675109 TPM: setup succeeded
309 13:43:37.690889 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 13:43:37.704903 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 13:43:37.717416 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 13:43:37.727534 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 13:43:37.730943 Chrome EC: UHEPI supported
314 13:43:37.734479 Phase 1
315 13:43:37.737895 FMAP: area GBB found @ 1805000 (458752 bytes)
316 13:43:37.747622 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 13:43:37.754273 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 13:43:37.761068 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 13:43:37.767562 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 13:43:37.771050 Recovery requested (1009000e)
321 13:43:37.774359 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 13:43:37.785926 tlcl_extend: response is 0
323 13:43:37.792389 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 13:43:37.802209 tlcl_extend: response is 0
325 13:43:37.808938 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 13:43:37.815721 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 13:43:37.822465 BS: verstage times (exec / console): total (unknown) / 142 ms
328 13:43:37.822547
329 13:43:37.822614
330 13:43:37.835652 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 13:43:37.841987 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 13:43:37.845421 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 13:43:37.848903 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 13:43:37.855632 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 13:43:37.858465 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 13:43:37.862516 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
337 13:43:37.865492 TCO_STS: 0000 0000
338 13:43:37.868396 GEN_PMCON: d0015038 00002200
339 13:43:37.871801 GBLRST_CAUSE: 00000000 00000000
340 13:43:37.875125 HPR_CAUSE0: 00000000
341 13:43:37.875212 prev_sleep_state 5
342 13:43:37.878515 Boot Count incremented to 20162
343 13:43:37.885431 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 13:43:37.891995 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 13:43:37.902007 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 13:43:37.907996 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 13:43:37.912191 Chrome EC: UHEPI supported
348 13:43:37.918082 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 13:43:37.930011 Probing TPM: done!
350 13:43:37.936453 Connected to device vid:did:rid of 1ae0:0028:00
351 13:43:37.946625 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
352 13:43:37.950085 Initialized TPM device CR50 revision 0
353 13:43:37.964855 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 13:43:37.971206 MRC: Hash idx 0x100b comparison successful.
355 13:43:37.974865 MRC cache found, size faa8
356 13:43:37.974984 bootmode is set to: 2
357 13:43:37.977982 SPD index = 0
358 13:43:37.984462 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 13:43:37.987909 SPD: module type is LPDDR4X
360 13:43:37.991187 SPD: module part number is MT53E512M64D4NW-046
361 13:43:37.998061 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 13:43:38.001143 SPD: device width 16 bits, bus width 16 bits
363 13:43:38.007646 SPD: module size is 1024 MB (per channel)
364 13:43:38.439712 CBMEM:
365 13:43:38.442915 IMD: root @ 0x76fff000 254 entries.
366 13:43:38.446215 IMD: root @ 0x76ffec00 62 entries.
367 13:43:38.449316 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 13:43:38.456021 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 13:43:38.459901 External stage cache:
370 13:43:38.462674 IMD: root @ 0x7b3ff000 254 entries.
371 13:43:38.465943 IMD: root @ 0x7b3fec00 62 entries.
372 13:43:38.481034 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 13:43:38.487910 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 13:43:38.494339 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 13:43:38.508773 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 13:43:38.512615 cse_lite: Skip switching to RW in the recovery path
377 13:43:38.516348 8 DIMMs found
378 13:43:38.516444 SMM Memory Map
379 13:43:38.519776 SMRAM : 0x7b000000 0x800000
380 13:43:38.522716 Subregion 0: 0x7b000000 0x200000
381 13:43:38.526389 Subregion 1: 0x7b200000 0x200000
382 13:43:38.529547 Subregion 2: 0x7b400000 0x400000
383 13:43:38.533067 top_of_ram = 0x77000000
384 13:43:38.539086 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 13:43:38.542508 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 13:43:38.549411 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 13:43:38.552652 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 13:43:38.562361 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 13:43:38.568928 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 13:43:38.579247 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 13:43:38.582088 Processing 211 relocs. Offset value of 0x74c0b000
392 13:43:38.591342 BS: romstage times (exec / console): total (unknown) / 277 ms
393 13:43:38.597403
394 13:43:38.597499
395 13:43:38.607243 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 13:43:38.610802 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 13:43:38.620945 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 13:43:38.627261 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 13:43:38.634381 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 13:43:38.640322 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 13:43:38.687617 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 13:43:38.693848 Processing 5008 relocs. Offset value of 0x75d98000
403 13:43:38.697254 BS: postcar times (exec / console): total (unknown) / 59 ms
404 13:43:38.700853
405 13:43:38.700961
406 13:43:38.711132 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 13:43:38.711233 Normal boot
408 13:43:38.714236 FW_CONFIG value is 0x804c02
409 13:43:38.717733 PCI: 00:07.0 disabled by fw_config
410 13:43:38.720987 PCI: 00:07.1 disabled by fw_config
411 13:43:38.724356 PCI: 00:0d.2 disabled by fw_config
412 13:43:38.727866 PCI: 00:1c.7 disabled by fw_config
413 13:43:38.734330 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 13:43:38.741006 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 13:43:38.744365 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 13:43:38.747953 GENERIC: 0.0 disabled by fw_config
417 13:43:38.751078 GENERIC: 1.0 disabled by fw_config
418 13:43:38.757723 fw_config match found: DB_USB=USB3_ACTIVE
419 13:43:38.760977 fw_config match found: DB_USB=USB3_ACTIVE
420 13:43:38.764186 fw_config match found: DB_USB=USB3_ACTIVE
421 13:43:38.767729 fw_config match found: DB_USB=USB3_ACTIVE
422 13:43:38.774095 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 13:43:38.781066 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 13:43:38.787919 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 13:43:38.797592 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 13:43:38.801135 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 13:43:38.807604 microcode: Update skipped, already up-to-date
428 13:43:38.814328 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 13:43:38.841366 Detected 4 core, 8 thread CPU.
430 13:43:38.844159 Setting up SMI for CPU
431 13:43:38.847965 IED base = 0x7b400000
432 13:43:38.848071 IED size = 0x00400000
433 13:43:38.851154 Will perform SMM setup.
434 13:43:38.857368 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 13:43:38.863828 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 13:43:38.870918 Processing 16 relocs. Offset value of 0x00030000
437 13:43:38.874232 Attempting to start 7 APs
438 13:43:38.877069 Waiting for 10ms after sending INIT.
439 13:43:38.893426 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 13:43:38.893546 done.
441 13:43:38.896281 AP: slot 2 apic_id 3.
442 13:43:38.899731 AP: slot 6 apic_id 2.
443 13:43:38.899821 AP: slot 7 apic_id 6.
444 13:43:38.903009 AP: slot 3 apic_id 7.
445 13:43:38.906670 AP: slot 5 apic_id 4.
446 13:43:38.906759 AP: slot 4 apic_id 5.
447 13:43:38.913131 Waiting for 2nd SIPI to complete...done.
448 13:43:38.919973 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 13:43:38.926406 Processing 13 relocs. Offset value of 0x00038000
450 13:43:38.926496 Unable to locate Global NVS
451 13:43:38.936960 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 13:43:38.939556 Installing permanent SMM handler to 0x7b000000
453 13:43:38.946530 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 13:43:38.952860 Processing 794 relocs. Offset value of 0x7b010000
455 13:43:38.959551 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 13:43:38.966467 Processing 13 relocs. Offset value of 0x7b008000
457 13:43:38.973243 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 13:43:38.979944 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 13:43:38.983447 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 13:43:38.990132 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 13:43:38.996609 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 13:43:39.003575 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 13:43:39.006298 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 13:43:39.009642 Unable to locate Global NVS
465 13:43:39.016299 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 13:43:39.020821 Clearing SMI status registers
467 13:43:39.024383 SMI_STS: PM1
468 13:43:39.024470 PM1_STS: PWRBTN
469 13:43:39.034081 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 13:43:39.037493 In relocation handler: CPU 0
471 13:43:39.040491 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 13:43:39.043924 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 13:43:39.047397 Relocation complete.
474 13:43:39.054306 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 13:43:39.057576 In relocation handler: CPU 1
476 13:43:39.060363 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 13:43:39.063787 Relocation complete.
478 13:43:39.070826 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
479 13:43:39.073780 In relocation handler: CPU 2
480 13:43:39.077294 New SMBASE=0x7afff800 IEDBASE=0x7b400000
481 13:43:39.080770 Relocation complete.
482 13:43:39.087275 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
483 13:43:39.090847 In relocation handler: CPU 6
484 13:43:39.093966 New SMBASE=0x7affe800 IEDBASE=0x7b400000
485 13:43:39.100301 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 13:43:39.100430 Relocation complete.
487 13:43:39.107067 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
488 13:43:39.110266 In relocation handler: CPU 5
489 13:43:39.117286 New SMBASE=0x7affec00 IEDBASE=0x7b400000
490 13:43:39.120667 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 13:43:39.123722 Relocation complete.
492 13:43:39.130359 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
493 13:43:39.133986 In relocation handler: CPU 4
494 13:43:39.137434 New SMBASE=0x7afff000 IEDBASE=0x7b400000
495 13:43:39.140766 Relocation complete.
496 13:43:39.147033 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
497 13:43:39.150468 In relocation handler: CPU 7
498 13:43:39.153865 New SMBASE=0x7affe400 IEDBASE=0x7b400000
499 13:43:39.157216 Writing SMRR. base = 0x7b000006, mask=0xff800c00
500 13:43:39.160047 Relocation complete.
501 13:43:39.166738 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
502 13:43:39.170312 In relocation handler: CPU 3
503 13:43:39.174501 New SMBASE=0x7afff400 IEDBASE=0x7b400000
504 13:43:39.177807 Relocation complete.
505 13:43:39.177901 Initializing CPU #0
506 13:43:39.181441 CPU: vendor Intel device 806c1
507 13:43:39.184934 CPU: family 06, model 8c, stepping 01
508 13:43:39.188232 Clearing out pending MCEs
509 13:43:39.191871 Setting up local APIC...
510 13:43:39.194458 apic_id: 0x00 done.
511 13:43:39.198446 Turbo is available but hidden
512 13:43:39.201116 Turbo is available and visible
513 13:43:39.204567 microcode: Update skipped, already up-to-date
514 13:43:39.207780 CPU #0 initialized
515 13:43:39.207913 Initializing CPU #5
516 13:43:39.211096 Initializing CPU #4
517 13:43:39.214531 CPU: vendor Intel device 806c1
518 13:43:39.217878 CPU: family 06, model 8c, stepping 01
519 13:43:39.221221 CPU: vendor Intel device 806c1
520 13:43:39.224558 CPU: family 06, model 8c, stepping 01
521 13:43:39.227994 Clearing out pending MCEs
522 13:43:39.231550 Clearing out pending MCEs
523 13:43:39.231636 Setting up local APIC...
524 13:43:39.234398 Initializing CPU #1
525 13:43:39.238089 Initializing CPU #2
526 13:43:39.238175 Initializing CPU #6
527 13:43:39.240945 CPU: vendor Intel device 806c1
528 13:43:39.244325 CPU: family 06, model 8c, stepping 01
529 13:43:39.247791 Initializing CPU #7
530 13:43:39.251186 Initializing CPU #3
531 13:43:39.251303 CPU: vendor Intel device 806c1
532 13:43:39.257845 CPU: family 06, model 8c, stepping 01
533 13:43:39.261478 CPU: vendor Intel device 806c1
534 13:43:39.264744 CPU: family 06, model 8c, stepping 01
535 13:43:39.267550 Clearing out pending MCEs
536 13:43:39.267636 Clearing out pending MCEs
537 13:43:39.271002 Setting up local APIC...
538 13:43:39.274366 CPU: vendor Intel device 806c1
539 13:43:39.277811 CPU: family 06, model 8c, stepping 01
540 13:43:39.280759 Setting up local APIC...
541 13:43:39.284248 Clearing out pending MCEs
542 13:43:39.287487 Clearing out pending MCEs
543 13:43:39.287569 Setting up local APIC...
544 13:43:39.290985 Setting up local APIC...
545 13:43:39.294536 apic_id: 0x06 done.
546 13:43:39.294642 apic_id: 0x07 done.
547 13:43:39.301364 microcode: Update skipped, already up-to-date
548 13:43:39.304475 microcode: Update skipped, already up-to-date
549 13:43:39.307769 CPU #7 initialized
550 13:43:39.307875 CPU #3 initialized
551 13:43:39.310893 apic_id: 0x05 done.
552 13:43:39.314111 apic_id: 0x04 done.
553 13:43:39.314191 apic_id: 0x02 done.
554 13:43:39.317553 Setting up local APIC...
555 13:43:39.321058 microcode: Update skipped, already up-to-date
556 13:43:39.327475 microcode: Update skipped, already up-to-date
557 13:43:39.327582 CPU #5 initialized
558 13:43:39.330894 CPU #4 initialized
559 13:43:39.334284 CPU: vendor Intel device 806c1
560 13:43:39.337800 CPU: family 06, model 8c, stepping 01
561 13:43:39.341490 microcode: Update skipped, already up-to-date
562 13:43:39.344189 Clearing out pending MCEs
563 13:43:39.347412 apic_id: 0x03 done.
564 13:43:39.347514 CPU #6 initialized
565 13:43:39.354484 microcode: Update skipped, already up-to-date
566 13:43:39.354590 Setting up local APIC...
567 13:43:39.357631 CPU #2 initialized
568 13:43:39.360895 apic_id: 0x01 done.
569 13:43:39.364441 microcode: Update skipped, already up-to-date
570 13:43:39.367972 CPU #1 initialized
571 13:43:39.370900 bsp_do_flight_plan done after 455 msecs.
572 13:43:39.374676 CPU: frequency set to 4000 MHz
573 13:43:39.374764 Enabling SMIs.
574 13:43:39.380927 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 13:43:39.398013 SATAXPCIE1 indicates PCIe NVMe is present
576 13:43:39.401557 Probing TPM: done!
577 13:43:39.404996 Connected to device vid:did:rid of 1ae0:0028:00
578 13:43:39.415358 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
579 13:43:39.419095 Initialized TPM device CR50 revision 0
580 13:43:39.422160 Enabling S0i3.4
581 13:43:39.428812 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 13:43:39.431886 Found a VBT of 8704 bytes after decompression
583 13:43:39.438951 cse_lite: CSE RO boot. HybridStorageMode disabled
584 13:43:39.445294 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 13:43:39.520859 FSPS returned 0
586 13:43:39.524157 Executing Phase 1 of FspMultiPhaseSiInit
587 13:43:39.534082 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 13:43:39.537312 port C0 DISC req: usage 1 usb3 1 usb2 5
589 13:43:39.540791 Raw Buffer output 0 00000511
590 13:43:39.544139 Raw Buffer output 1 00000000
591 13:43:39.547673 pmc_send_ipc_cmd succeeded
592 13:43:39.554476 port C1 DISC req: usage 1 usb3 2 usb2 3
593 13:43:39.554569 Raw Buffer output 0 00000321
594 13:43:39.557942 Raw Buffer output 1 00000000
595 13:43:39.561878 pmc_send_ipc_cmd succeeded
596 13:43:39.567090 Detected 4 core, 8 thread CPU.
597 13:43:39.570401 Detected 4 core, 8 thread CPU.
598 13:43:39.804292 Display FSP Version Info HOB
599 13:43:39.807882 Reference Code - CPU = a.0.4c.31
600 13:43:39.811593 uCode Version = 0.0.0.86
601 13:43:39.814106 TXT ACM version = ff.ff.ff.ffff
602 13:43:39.817530 Reference Code - ME = a.0.4c.31
603 13:43:39.820959 MEBx version = 0.0.0.0
604 13:43:39.824433 ME Firmware Version = Consumer SKU
605 13:43:39.827834 Reference Code - PCH = a.0.4c.31
606 13:43:39.831571 PCH-CRID Status = Disabled
607 13:43:39.834639 PCH-CRID Original Value = ff.ff.ff.ffff
608 13:43:39.838030 PCH-CRID New Value = ff.ff.ff.ffff
609 13:43:39.840960 OPROM - RST - RAID = ff.ff.ff.ffff
610 13:43:39.844293 PCH Hsio Version = 4.0.0.0
611 13:43:39.847682 Reference Code - SA - System Agent = a.0.4c.31
612 13:43:39.851220 Reference Code - MRC = 2.0.0.1
613 13:43:39.854201 SA - PCIe Version = a.0.4c.31
614 13:43:39.857469 SA-CRID Status = Disabled
615 13:43:39.860738 SA-CRID Original Value = 0.0.0.1
616 13:43:39.864263 SA-CRID New Value = 0.0.0.1
617 13:43:39.867844 OPROM - VBIOS = ff.ff.ff.ffff
618 13:43:39.870615 IO Manageability Engine FW Version = 11.1.4.0
619 13:43:39.874033 PHY Build Version = 0.0.0.e0
620 13:43:39.877594 Thunderbolt(TM) FW Version = 0.0.0.0
621 13:43:39.883883 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 13:43:39.887310 ITSS IRQ Polarities Before:
623 13:43:39.887457 IPC0: 0xffffffff
624 13:43:39.890728 IPC1: 0xffffffff
625 13:43:39.890858 IPC2: 0xffffffff
626 13:43:39.894177 IPC3: 0xffffffff
627 13:43:39.897834 ITSS IRQ Polarities After:
628 13:43:39.897917 IPC0: 0xffffffff
629 13:43:39.900774 IPC1: 0xffffffff
630 13:43:39.900850 IPC2: 0xffffffff
631 13:43:39.904233 IPC3: 0xffffffff
632 13:43:39.907728 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 13:43:39.920574 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 13:43:39.931161 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 13:43:39.944268 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 13:43:39.950385 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
637 13:43:39.950523 Enumerating buses...
638 13:43:39.957172 Show all devs... Before device enumeration.
639 13:43:39.960485 Root Device: enabled 1
640 13:43:39.960569 DOMAIN: 0000: enabled 1
641 13:43:39.963508 CPU_CLUSTER: 0: enabled 1
642 13:43:39.966824 PCI: 00:00.0: enabled 1
643 13:43:39.970738 PCI: 00:02.0: enabled 1
644 13:43:39.970831 PCI: 00:04.0: enabled 1
645 13:43:39.973966 PCI: 00:05.0: enabled 1
646 13:43:39.977070 PCI: 00:06.0: enabled 0
647 13:43:39.977179 PCI: 00:07.0: enabled 0
648 13:43:39.980763 PCI: 00:07.1: enabled 0
649 13:43:39.983807 PCI: 00:07.2: enabled 0
650 13:43:39.986778 PCI: 00:07.3: enabled 0
651 13:43:39.986860 PCI: 00:08.0: enabled 1
652 13:43:39.990067 PCI: 00:09.0: enabled 0
653 13:43:39.993615 PCI: 00:0a.0: enabled 0
654 13:43:39.997000 PCI: 00:0d.0: enabled 1
655 13:43:39.997084 PCI: 00:0d.1: enabled 0
656 13:43:40.000384 PCI: 00:0d.2: enabled 0
657 13:43:40.003879 PCI: 00:0d.3: enabled 0
658 13:43:40.006820 PCI: 00:0e.0: enabled 0
659 13:43:40.006906 PCI: 00:10.2: enabled 1
660 13:43:40.010341 PCI: 00:10.6: enabled 0
661 13:43:40.013881 PCI: 00:10.7: enabled 0
662 13:43:40.016954 PCI: 00:12.0: enabled 0
663 13:43:40.017096 PCI: 00:12.6: enabled 0
664 13:43:40.019938 PCI: 00:13.0: enabled 0
665 13:43:40.023919 PCI: 00:14.0: enabled 1
666 13:43:40.024040 PCI: 00:14.1: enabled 0
667 13:43:40.027058 PCI: 00:14.2: enabled 1
668 13:43:40.030383 PCI: 00:14.3: enabled 1
669 13:43:40.033967 PCI: 00:15.0: enabled 1
670 13:43:40.034053 PCI: 00:15.1: enabled 1
671 13:43:40.037131 PCI: 00:15.2: enabled 1
672 13:43:40.040187 PCI: 00:15.3: enabled 1
673 13:43:40.043567 PCI: 00:16.0: enabled 1
674 13:43:40.043652 PCI: 00:16.1: enabled 0
675 13:43:40.046844 PCI: 00:16.2: enabled 0
676 13:43:40.050226 PCI: 00:16.3: enabled 0
677 13:43:40.053566 PCI: 00:16.4: enabled 0
678 13:43:40.053655 PCI: 00:16.5: enabled 0
679 13:43:40.056881 PCI: 00:17.0: enabled 1
680 13:43:40.059895 PCI: 00:19.0: enabled 0
681 13:43:40.060015 PCI: 00:19.1: enabled 1
682 13:43:40.063296 PCI: 00:19.2: enabled 0
683 13:43:40.066930 PCI: 00:1c.0: enabled 1
684 13:43:40.070178 PCI: 00:1c.1: enabled 0
685 13:43:40.070266 PCI: 00:1c.2: enabled 0
686 13:43:40.073318 PCI: 00:1c.3: enabled 0
687 13:43:40.076607 PCI: 00:1c.4: enabled 0
688 13:43:40.080162 PCI: 00:1c.5: enabled 0
689 13:43:40.080249 PCI: 00:1c.6: enabled 1
690 13:43:40.083311 PCI: 00:1c.7: enabled 0
691 13:43:40.086567 PCI: 00:1d.0: enabled 1
692 13:43:40.089916 PCI: 00:1d.1: enabled 0
693 13:43:40.090003 PCI: 00:1d.2: enabled 1
694 13:43:40.093336 PCI: 00:1d.3: enabled 0
695 13:43:40.097074 PCI: 00:1e.0: enabled 1
696 13:43:40.100182 PCI: 00:1e.1: enabled 0
697 13:43:40.100295 PCI: 00:1e.2: enabled 1
698 13:43:40.103409 PCI: 00:1e.3: enabled 1
699 13:43:40.106864 PCI: 00:1f.0: enabled 1
700 13:43:40.106951 PCI: 00:1f.1: enabled 0
701 13:43:40.109775 PCI: 00:1f.2: enabled 1
702 13:43:40.113090 PCI: 00:1f.3: enabled 1
703 13:43:40.116431 PCI: 00:1f.4: enabled 0
704 13:43:40.116519 PCI: 00:1f.5: enabled 1
705 13:43:40.119837 PCI: 00:1f.6: enabled 0
706 13:43:40.123524 PCI: 00:1f.7: enabled 0
707 13:43:40.123612 APIC: 00: enabled 1
708 13:43:40.126860 GENERIC: 0.0: enabled 1
709 13:43:40.130343 GENERIC: 0.0: enabled 1
710 13:43:40.133262 GENERIC: 1.0: enabled 1
711 13:43:40.133350 GENERIC: 0.0: enabled 1
712 13:43:40.136531 GENERIC: 1.0: enabled 1
713 13:43:40.139976 USB0 port 0: enabled 1
714 13:43:40.142990 GENERIC: 0.0: enabled 1
715 13:43:40.143077 USB0 port 0: enabled 1
716 13:43:40.146334 GENERIC: 0.0: enabled 1
717 13:43:40.149723 I2C: 00:1a: enabled 1
718 13:43:40.149810 I2C: 00:31: enabled 1
719 13:43:40.153263 I2C: 00:32: enabled 1
720 13:43:40.156211 I2C: 00:10: enabled 1
721 13:43:40.156311 I2C: 00:15: enabled 1
722 13:43:40.159996 GENERIC: 0.0: enabled 0
723 13:43:40.162814 GENERIC: 1.0: enabled 0
724 13:43:40.165966 GENERIC: 0.0: enabled 1
725 13:43:40.166045 SPI: 00: enabled 1
726 13:43:40.169262 SPI: 00: enabled 1
727 13:43:40.172874 PNP: 0c09.0: enabled 1
728 13:43:40.172954 GENERIC: 0.0: enabled 1
729 13:43:40.176080 USB3 port 0: enabled 1
730 13:43:40.180007 USB3 port 1: enabled 1
731 13:43:40.180127 USB3 port 2: enabled 0
732 13:43:40.182939 USB3 port 3: enabled 0
733 13:43:40.186301 USB2 port 0: enabled 0
734 13:43:40.189360 USB2 port 1: enabled 1
735 13:43:40.189443 USB2 port 2: enabled 1
736 13:43:40.192734 USB2 port 3: enabled 0
737 13:43:40.195833 USB2 port 4: enabled 1
738 13:43:40.195941 USB2 port 5: enabled 0
739 13:43:40.199656 USB2 port 6: enabled 0
740 13:43:40.203086 USB2 port 7: enabled 0
741 13:43:40.203164 USB2 port 8: enabled 0
742 13:43:40.205919 USB2 port 9: enabled 0
743 13:43:40.209272 USB3 port 0: enabled 0
744 13:43:40.212720 USB3 port 1: enabled 1
745 13:43:40.212798 USB3 port 2: enabled 0
746 13:43:40.216125 USB3 port 3: enabled 0
747 13:43:40.219801 GENERIC: 0.0: enabled 1
748 13:43:40.219903 GENERIC: 1.0: enabled 1
749 13:43:40.222955 APIC: 01: enabled 1
750 13:43:40.225931 APIC: 03: enabled 1
751 13:43:40.226046 APIC: 07: enabled 1
752 13:43:40.229466 APIC: 05: enabled 1
753 13:43:40.232736 APIC: 04: enabled 1
754 13:43:40.232841 APIC: 02: enabled 1
755 13:43:40.236252 APIC: 06: enabled 1
756 13:43:40.236329 Compare with tree...
757 13:43:40.239724 Root Device: enabled 1
758 13:43:40.242629 DOMAIN: 0000: enabled 1
759 13:43:40.246083 PCI: 00:00.0: enabled 1
760 13:43:40.246191 PCI: 00:02.0: enabled 1
761 13:43:40.249396 PCI: 00:04.0: enabled 1
762 13:43:40.252950 GENERIC: 0.0: enabled 1
763 13:43:40.256214 PCI: 00:05.0: enabled 1
764 13:43:40.259106 PCI: 00:06.0: enabled 0
765 13:43:40.259211 PCI: 00:07.0: enabled 0
766 13:43:40.262678 GENERIC: 0.0: enabled 1
767 13:43:40.265914 PCI: 00:07.1: enabled 0
768 13:43:40.269451 GENERIC: 1.0: enabled 1
769 13:43:40.272662 PCI: 00:07.2: enabled 0
770 13:43:40.275879 GENERIC: 0.0: enabled 1
771 13:43:40.275997 PCI: 00:07.3: enabled 0
772 13:43:40.279123 GENERIC: 1.0: enabled 1
773 13:43:40.282728 PCI: 00:08.0: enabled 1
774 13:43:40.285842 PCI: 00:09.0: enabled 0
775 13:43:40.289339 PCI: 00:0a.0: enabled 0
776 13:43:40.289431 PCI: 00:0d.0: enabled 1
777 13:43:40.292337 USB0 port 0: enabled 1
778 13:43:40.296104 USB3 port 0: enabled 1
779 13:43:40.299194 USB3 port 1: enabled 1
780 13:43:40.302813 USB3 port 2: enabled 0
781 13:43:40.302902 USB3 port 3: enabled 0
782 13:43:40.305830 PCI: 00:0d.1: enabled 0
783 13:43:40.309367 PCI: 00:0d.2: enabled 0
784 13:43:40.312783 GENERIC: 0.0: enabled 1
785 13:43:40.315811 PCI: 00:0d.3: enabled 0
786 13:43:40.315904 PCI: 00:0e.0: enabled 0
787 13:43:40.319451 PCI: 00:10.2: enabled 1
788 13:43:40.322789 PCI: 00:10.6: enabled 0
789 13:43:40.326176 PCI: 00:10.7: enabled 0
790 13:43:40.329192 PCI: 00:12.0: enabled 0
791 13:43:40.329287 PCI: 00:12.6: enabled 0
792 13:43:40.332425 PCI: 00:13.0: enabled 0
793 13:43:40.335785 PCI: 00:14.0: enabled 1
794 13:43:40.339298 USB0 port 0: enabled 1
795 13:43:40.342790 USB2 port 0: enabled 0
796 13:43:40.342883 USB2 port 1: enabled 1
797 13:43:40.346087 USB2 port 2: enabled 1
798 13:43:40.349481 USB2 port 3: enabled 0
799 13:43:40.352695 USB2 port 4: enabled 1
800 13:43:40.355956 USB2 port 5: enabled 0
801 13:43:40.356091 USB2 port 6: enabled 0
802 13:43:40.359051 USB2 port 7: enabled 0
803 13:43:40.362695 USB2 port 8: enabled 0
804 13:43:40.365902 USB2 port 9: enabled 0
805 13:43:40.369296 USB3 port 0: enabled 0
806 13:43:40.372489 USB3 port 1: enabled 1
807 13:43:40.372594 USB3 port 2: enabled 0
808 13:43:40.375996 USB3 port 3: enabled 0
809 13:43:40.379217 PCI: 00:14.1: enabled 0
810 13:43:40.382568 PCI: 00:14.2: enabled 1
811 13:43:40.385503 PCI: 00:14.3: enabled 1
812 13:43:40.385617 GENERIC: 0.0: enabled 1
813 13:43:40.388877 PCI: 00:15.0: enabled 1
814 13:43:40.392689 I2C: 00:1a: enabled 1
815 13:43:40.395505 I2C: 00:31: enabled 1
816 13:43:40.399132 I2C: 00:32: enabled 1
817 13:43:40.399230 PCI: 00:15.1: enabled 1
818 13:43:40.402289 I2C: 00:10: enabled 1
819 13:43:40.405503 PCI: 00:15.2: enabled 1
820 13:43:40.409281 PCI: 00:15.3: enabled 1
821 13:43:40.409369 PCI: 00:16.0: enabled 1
822 13:43:40.412550 PCI: 00:16.1: enabled 0
823 13:43:40.415992 PCI: 00:16.2: enabled 0
824 13:43:40.420289 PCI: 00:16.3: enabled 0
825 13:43:40.420374 PCI: 00:16.4: enabled 0
826 13:43:40.423449 PCI: 00:16.5: enabled 0
827 13:43:40.426913 PCI: 00:17.0: enabled 1
828 13:43:40.430422 PCI: 00:19.0: enabled 0
829 13:43:40.433167 PCI: 00:19.1: enabled 1
830 13:43:40.433269 I2C: 00:15: enabled 1
831 13:43:40.436650 PCI: 00:19.2: enabled 0
832 13:43:40.439968 PCI: 00:1d.0: enabled 1
833 13:43:40.443674 GENERIC: 0.0: enabled 1
834 13:43:40.443758 PCI: 00:1e.0: enabled 1
835 13:43:40.446855 PCI: 00:1e.1: enabled 0
836 13:43:40.449666 PCI: 00:1e.2: enabled 1
837 13:43:40.453347 SPI: 00: enabled 1
838 13:43:40.456993 PCI: 00:1e.3: enabled 1
839 13:43:40.457115 SPI: 00: enabled 1
840 13:43:40.459785 PCI: 00:1f.0: enabled 1
841 13:43:40.463164 PNP: 0c09.0: enabled 1
842 13:43:40.466688 PCI: 00:1f.1: enabled 0
843 13:43:40.466801 PCI: 00:1f.2: enabled 1
844 13:43:40.517848 GENERIC: 0.0: enabled 1
845 13:43:40.518017 GENERIC: 0.0: enabled 1
846 13:43:40.518314 GENERIC: 1.0: enabled 1
847 13:43:40.518426 PCI: 00:1f.3: enabled 1
848 13:43:40.518529 PCI: 00:1f.4: enabled 0
849 13:43:40.518625 PCI: 00:1f.5: enabled 1
850 13:43:40.518725 PCI: 00:1f.6: enabled 0
851 13:43:40.518831 PCI: 00:1f.7: enabled 0
852 13:43:40.518927 CPU_CLUSTER: 0: enabled 1
853 13:43:40.519021 APIC: 00: enabled 1
854 13:43:40.519110 APIC: 01: enabled 1
855 13:43:40.519206 APIC: 03: enabled 1
856 13:43:40.519326 APIC: 07: enabled 1
857 13:43:40.519421 APIC: 05: enabled 1
858 13:43:40.519530 APIC: 04: enabled 1
859 13:43:40.519623 APIC: 02: enabled 1
860 13:43:40.519712 APIC: 06: enabled 1
861 13:43:40.519803 Root Device scanning...
862 13:43:40.519899 scan_static_bus for Root Device
863 13:43:40.519987 DOMAIN: 0000 enabled
864 13:43:40.569005 CPU_CLUSTER: 0 enabled
865 13:43:40.569171 DOMAIN: 0000 scanning...
866 13:43:40.569542 PCI: pci_scan_bus for bus 00
867 13:43:40.569645 PCI: 00:00.0 [8086/0000] ops
868 13:43:40.569934 PCI: 00:00.0 [8086/9a12] enabled
869 13:43:40.570036 PCI: 00:02.0 [8086/0000] bus ops
870 13:43:40.570525 PCI: 00:02.0 [8086/9a40] enabled
871 13:43:40.570601 PCI: 00:04.0 [8086/0000] bus ops
872 13:43:40.571326 PCI: 00:04.0 [8086/9a03] enabled
873 13:43:40.571428 PCI: 00:05.0 [8086/9a19] enabled
874 13:43:40.571723 PCI: 00:07.0 [0000/0000] hidden
875 13:43:40.571904 PCI: 00:08.0 [8086/9a11] enabled
876 13:43:40.572007 PCI: 00:0a.0 [8086/9a0d] disabled
877 13:43:40.572104 PCI: 00:0d.0 [8086/0000] bus ops
878 13:43:40.572163 PCI: 00:0d.0 [8086/9a13] enabled
879 13:43:40.575315 PCI: 00:14.0 [8086/0000] bus ops
880 13:43:40.575433 PCI: 00:14.0 [8086/a0ed] enabled
881 13:43:40.578635 PCI: 00:14.2 [8086/a0ef] enabled
882 13:43:40.582233 PCI: 00:14.3 [8086/0000] bus ops
883 13:43:40.584960 PCI: 00:14.3 [8086/a0f0] enabled
884 13:43:40.588442 PCI: 00:15.0 [8086/0000] bus ops
885 13:43:40.591782 PCI: 00:15.0 [8086/a0e8] enabled
886 13:43:40.595093 PCI: 00:15.1 [8086/0000] bus ops
887 13:43:40.598634 PCI: 00:15.1 [8086/a0e9] enabled
888 13:43:40.601885 PCI: 00:15.2 [8086/0000] bus ops
889 13:43:40.605268 PCI: 00:15.2 [8086/a0ea] enabled
890 13:43:40.608178 PCI: 00:15.3 [8086/0000] bus ops
891 13:43:40.611570 PCI: 00:15.3 [8086/a0eb] enabled
892 13:43:40.614799 PCI: 00:16.0 [8086/0000] ops
893 13:43:40.618270 PCI: 00:16.0 [8086/a0e0] enabled
894 13:43:40.621559 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 13:43:40.624944 PCI: 00:19.0 [8086/0000] bus ops
896 13:43:40.628058 PCI: 00:19.0 [8086/a0c5] disabled
897 13:43:40.631604 PCI: 00:19.1 [8086/0000] bus ops
898 13:43:40.635063 PCI: 00:19.1 [8086/a0c6] enabled
899 13:43:40.638277 PCI: 00:1d.0 [8086/0000] bus ops
900 13:43:40.641602 PCI: 00:1d.0 [8086/a0b0] enabled
901 13:43:40.644763 PCI: 00:1e.0 [8086/0000] ops
902 13:43:40.648012 PCI: 00:1e.0 [8086/a0a8] enabled
903 13:43:40.651650 PCI: 00:1e.2 [8086/0000] bus ops
904 13:43:40.654943 PCI: 00:1e.2 [8086/a0aa] enabled
905 13:43:40.658486 PCI: 00:1e.3 [8086/0000] bus ops
906 13:43:40.661431 PCI: 00:1e.3 [8086/a0ab] enabled
907 13:43:40.665242 PCI: 00:1f.0 [8086/0000] bus ops
908 13:43:40.668417 PCI: 00:1f.0 [8086/a087] enabled
909 13:43:40.671331 RTC Init
910 13:43:40.674780 Set power on after power failure.
911 13:43:40.674894 Disabling Deep S3
912 13:43:40.678173 Disabling Deep S3
913 13:43:40.678288 Disabling Deep S4
914 13:43:40.681701 Disabling Deep S4
915 13:43:40.685086 Disabling Deep S5
916 13:43:40.685174 Disabling Deep S5
917 13:43:40.688457 PCI: 00:1f.2 [0000/0000] hidden
918 13:43:40.691346 PCI: 00:1f.3 [8086/0000] bus ops
919 13:43:40.694685 PCI: 00:1f.3 [8086/a0c8] enabled
920 13:43:40.698014 PCI: 00:1f.5 [8086/0000] bus ops
921 13:43:40.701508 PCI: 00:1f.5 [8086/a0a4] enabled
922 13:43:40.705000 PCI: Leftover static devices:
923 13:43:40.705109 PCI: 00:10.2
924 13:43:40.707800 PCI: 00:10.6
925 13:43:40.707882 PCI: 00:10.7
926 13:43:40.711530 PCI: 00:06.0
927 13:43:40.711611 PCI: 00:07.1
928 13:43:40.711677 PCI: 00:07.2
929 13:43:40.714784 PCI: 00:07.3
930 13:43:40.714866 PCI: 00:09.0
931 13:43:40.718333 PCI: 00:0d.1
932 13:43:40.718414 PCI: 00:0d.2
933 13:43:40.721191 PCI: 00:0d.3
934 13:43:40.721273 PCI: 00:0e.0
935 13:43:40.721339 PCI: 00:12.0
936 13:43:40.724831 PCI: 00:12.6
937 13:43:40.724912 PCI: 00:13.0
938 13:43:40.727895 PCI: 00:14.1
939 13:43:40.728003 PCI: 00:16.1
940 13:43:40.728108 PCI: 00:16.2
941 13:43:40.731298 PCI: 00:16.3
942 13:43:40.731383 PCI: 00:16.4
943 13:43:40.734860 PCI: 00:16.5
944 13:43:40.734965 PCI: 00:17.0
945 13:43:40.735059 PCI: 00:19.2
946 13:43:40.738044 PCI: 00:1e.1
947 13:43:40.738153 PCI: 00:1f.1
948 13:43:40.741917 PCI: 00:1f.4
949 13:43:40.741999 PCI: 00:1f.6
950 13:43:40.744692 PCI: 00:1f.7
951 13:43:40.744800 PCI: Check your devicetree.cb.
952 13:43:40.748067 PCI: 00:02.0 scanning...
953 13:43:40.751310 scan_generic_bus for PCI: 00:02.0
954 13:43:40.757771 scan_generic_bus for PCI: 00:02.0 done
955 13:43:40.761239 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 13:43:40.764811 PCI: 00:04.0 scanning...
957 13:43:40.767668 scan_generic_bus for PCI: 00:04.0
958 13:43:40.767781 GENERIC: 0.0 enabled
959 13:43:40.774588 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 13:43:40.781385 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 13:43:40.781476 PCI: 00:0d.0 scanning...
962 13:43:40.784917 scan_static_bus for PCI: 00:0d.0
963 13:43:40.788296 USB0 port 0 enabled
964 13:43:40.791173 USB0 port 0 scanning...
965 13:43:40.794578 scan_static_bus for USB0 port 0
966 13:43:40.797863 USB3 port 0 enabled
967 13:43:40.797979 USB3 port 1 enabled
968 13:43:40.801192 USB3 port 2 disabled
969 13:43:40.801288 USB3 port 3 disabled
970 13:43:40.804810 USB3 port 0 scanning...
971 13:43:40.807757 scan_static_bus for USB3 port 0
972 13:43:40.811237 scan_static_bus for USB3 port 0 done
973 13:43:40.818049 scan_bus: bus USB3 port 0 finished in 6 msecs
974 13:43:40.818156 USB3 port 1 scanning...
975 13:43:40.821436 scan_static_bus for USB3 port 1
976 13:43:40.827749 scan_static_bus for USB3 port 1 done
977 13:43:40.830978 scan_bus: bus USB3 port 1 finished in 6 msecs
978 13:43:40.834742 scan_static_bus for USB0 port 0 done
979 13:43:40.837826 scan_bus: bus USB0 port 0 finished in 43 msecs
980 13:43:40.844455 scan_static_bus for PCI: 00:0d.0 done
981 13:43:40.848107 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 13:43:40.851452 PCI: 00:14.0 scanning...
983 13:43:40.854663 scan_static_bus for PCI: 00:14.0
984 13:43:40.854753 USB0 port 0 enabled
985 13:43:40.857905 USB0 port 0 scanning...
986 13:43:40.861050 scan_static_bus for USB0 port 0
987 13:43:40.864936 USB2 port 0 disabled
988 13:43:40.867886 USB2 port 1 enabled
989 13:43:40.867995 USB2 port 2 enabled
990 13:43:40.871284 USB2 port 3 disabled
991 13:43:40.871372 USB2 port 4 enabled
992 13:43:40.874257 USB2 port 5 disabled
993 13:43:40.877800 USB2 port 6 disabled
994 13:43:40.877889 USB2 port 7 disabled
995 13:43:40.881340 USB2 port 8 disabled
996 13:43:40.884517 USB2 port 9 disabled
997 13:43:40.884607 USB3 port 0 disabled
998 13:43:40.888001 USB3 port 1 enabled
999 13:43:40.891144 USB3 port 2 disabled
1000 13:43:40.891266 USB3 port 3 disabled
1001 13:43:40.894404 USB2 port 1 scanning...
1002 13:43:40.898022 scan_static_bus for USB2 port 1
1003 13:43:40.901320 scan_static_bus for USB2 port 1 done
1004 13:43:40.907758 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 13:43:40.907882 USB2 port 2 scanning...
1006 13:43:40.911305 scan_static_bus for USB2 port 2
1007 13:43:40.914678 scan_static_bus for USB2 port 2 done
1008 13:43:40.920843 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 13:43:40.924025 USB2 port 4 scanning...
1010 13:43:40.927600 scan_static_bus for USB2 port 4
1011 13:43:40.931040 scan_static_bus for USB2 port 4 done
1012 13:43:40.934104 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 13:43:40.937513 USB3 port 1 scanning...
1014 13:43:40.940793 scan_static_bus for USB3 port 1
1015 13:43:40.944819 scan_static_bus for USB3 port 1 done
1016 13:43:40.947405 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 13:43:40.950552 scan_static_bus for USB0 port 0 done
1018 13:43:40.957222 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 13:43:40.960680 scan_static_bus for PCI: 00:14.0 done
1020 13:43:40.967406 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 13:43:40.967504 PCI: 00:14.3 scanning...
1022 13:43:40.970530 scan_static_bus for PCI: 00:14.3
1023 13:43:40.973867 GENERIC: 0.0 enabled
1024 13:43:40.977281 scan_static_bus for PCI: 00:14.3 done
1025 13:43:40.984160 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 13:43:40.984249 PCI: 00:15.0 scanning...
1027 13:43:40.987253 scan_static_bus for PCI: 00:15.0
1028 13:43:40.990634 I2C: 00:1a enabled
1029 13:43:40.994715 I2C: 00:31 enabled
1030 13:43:40.994832 I2C: 00:32 enabled
1031 13:43:40.998178 scan_static_bus for PCI: 00:15.0 done
1032 13:43:41.005098 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 13:43:41.005184 PCI: 00:15.1 scanning...
1034 13:43:41.007799 scan_static_bus for PCI: 00:15.1
1035 13:43:41.011270 I2C: 00:10 enabled
1036 13:43:41.014678 scan_static_bus for PCI: 00:15.1 done
1037 13:43:41.021464 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 13:43:41.021572 PCI: 00:15.2 scanning...
1039 13:43:41.024585 scan_static_bus for PCI: 00:15.2
1040 13:43:41.031028 scan_static_bus for PCI: 00:15.2 done
1041 13:43:41.034559 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 13:43:41.038035 PCI: 00:15.3 scanning...
1043 13:43:41.040920 scan_static_bus for PCI: 00:15.3
1044 13:43:41.044239 scan_static_bus for PCI: 00:15.3 done
1045 13:43:41.047543 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 13:43:41.051095 PCI: 00:19.1 scanning...
1047 13:43:41.054339 scan_static_bus for PCI: 00:19.1
1048 13:43:41.057877 I2C: 00:15 enabled
1049 13:43:41.061549 scan_static_bus for PCI: 00:19.1 done
1050 13:43:41.064464 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 13:43:41.067740 PCI: 00:1d.0 scanning...
1052 13:43:41.070910 do_pci_scan_bridge for PCI: 00:1d.0
1053 13:43:41.074359 PCI: pci_scan_bus for bus 01
1054 13:43:41.078214 PCI: 01:00.0 [1c5c/174a] enabled
1055 13:43:41.080944 GENERIC: 0.0 enabled
1056 13:43:41.084389 Enabling Common Clock Configuration
1057 13:43:41.087763 L1 Sub-State supported from root port 29
1058 13:43:41.090732 L1 Sub-State Support = 0xf
1059 13:43:41.094182 CommonModeRestoreTime = 0x28
1060 13:43:41.097615 Power On Value = 0x16, Power On Scale = 0x0
1061 13:43:41.100898 ASPM: Enabled L1
1062 13:43:41.104188 PCIe: Max_Payload_Size adjusted to 128
1063 13:43:41.107759 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 13:43:41.111040 PCI: 00:1e.2 scanning...
1065 13:43:41.114193 scan_generic_bus for PCI: 00:1e.2
1066 13:43:41.117747 SPI: 00 enabled
1067 13:43:41.124416 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 13:43:41.127745 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 13:43:41.131091 PCI: 00:1e.3 scanning...
1070 13:43:41.134007 scan_generic_bus for PCI: 00:1e.3
1071 13:43:41.134115 SPI: 00 enabled
1072 13:43:41.140751 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 13:43:41.147520 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 13:43:41.147630 PCI: 00:1f.0 scanning...
1075 13:43:41.150855 scan_static_bus for PCI: 00:1f.0
1076 13:43:41.154320 PNP: 0c09.0 enabled
1077 13:43:41.157306 PNP: 0c09.0 scanning...
1078 13:43:41.160686 scan_static_bus for PNP: 0c09.0
1079 13:43:41.164000 scan_static_bus for PNP: 0c09.0 done
1080 13:43:41.167274 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 13:43:41.173879 scan_static_bus for PCI: 00:1f.0 done
1082 13:43:41.177455 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 13:43:41.180687 PCI: 00:1f.2 scanning...
1084 13:43:41.183833 scan_static_bus for PCI: 00:1f.2
1085 13:43:41.183966 GENERIC: 0.0 enabled
1086 13:43:41.187658 GENERIC: 0.0 scanning...
1087 13:43:41.190387 scan_static_bus for GENERIC: 0.0
1088 13:43:41.193837 GENERIC: 0.0 enabled
1089 13:43:41.197384 GENERIC: 1.0 enabled
1090 13:43:41.200317 scan_static_bus for GENERIC: 0.0 done
1091 13:43:41.203833 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 13:43:41.207192 scan_static_bus for PCI: 00:1f.2 done
1093 13:43:41.213640 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 13:43:41.217045 PCI: 00:1f.3 scanning...
1095 13:43:41.220540 scan_static_bus for PCI: 00:1f.3
1096 13:43:41.223935 scan_static_bus for PCI: 00:1f.3 done
1097 13:43:41.226944 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 13:43:41.230685 PCI: 00:1f.5 scanning...
1099 13:43:41.233883 scan_generic_bus for PCI: 00:1f.5
1100 13:43:41.236779 scan_generic_bus for PCI: 00:1f.5 done
1101 13:43:41.243511 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 13:43:41.247108 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 13:43:41.250054 scan_static_bus for Root Device done
1104 13:43:41.256783 scan_bus: bus Root Device finished in 737 msecs
1105 13:43:41.256907 done
1106 13:43:41.263730 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 13:43:41.267146 Chrome EC: UHEPI supported
1108 13:43:41.273764 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 13:43:41.280323 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 13:43:41.283329 SPI flash protection: WPSW=0 SRP0=0
1111 13:43:41.286677 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 13:43:41.293700 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 13:43:41.296846 found VGA at PCI: 00:02.0
1114 13:43:41.300435 Setting up VGA for PCI: 00:02.0
1115 13:43:41.303754 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 13:43:41.310502 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 13:43:41.310609 Allocating resources...
1118 13:43:41.313756 Reading resources...
1119 13:43:41.317077 Root Device read_resources bus 0 link: 0
1120 13:43:41.323392 DOMAIN: 0000 read_resources bus 0 link: 0
1121 13:43:41.326889 PCI: 00:04.0 read_resources bus 1 link: 0
1122 13:43:41.333302 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 13:43:41.336677 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 13:43:41.340048 USB0 port 0 read_resources bus 0 link: 0
1125 13:43:41.347635 USB0 port 0 read_resources bus 0 link: 0 done
1126 13:43:41.350535 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 13:43:41.357207 PCI: 00:14.0 read_resources bus 0 link: 0
1128 13:43:41.360919 USB0 port 0 read_resources bus 0 link: 0
1129 13:43:41.367545 USB0 port 0 read_resources bus 0 link: 0 done
1130 13:43:41.370674 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 13:43:41.377458 PCI: 00:14.3 read_resources bus 0 link: 0
1132 13:43:41.380688 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 13:43:41.387330 PCI: 00:15.0 read_resources bus 0 link: 0
1134 13:43:41.390701 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 13:43:41.397038 PCI: 00:15.1 read_resources bus 0 link: 0
1136 13:43:41.400392 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 13:43:41.407210 PCI: 00:19.1 read_resources bus 0 link: 0
1138 13:43:41.410597 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 13:43:41.417495 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 13:43:41.420823 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 13:43:41.427679 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 13:43:41.430675 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 13:43:41.437444 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 13:43:41.440926 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 13:43:41.447105 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 13:43:41.450618 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 13:43:41.454119 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 13:43:41.460711 GENERIC: 0.0 read_resources bus 0 link: 0
1149 13:43:41.463950 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 13:43:41.470872 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 13:43:41.477305 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 13:43:41.480862 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 13:43:41.487176 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 13:43:41.490693 Root Device read_resources bus 0 link: 0 done
1155 13:43:41.493742 Done reading resources.
1156 13:43:41.497212 Show resources in subtree (Root Device)...After reading.
1157 13:43:41.503958 Root Device child on link 0 DOMAIN: 0000
1158 13:43:41.507326 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 13:43:41.517163 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 13:43:41.527486 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 13:43:41.527574 PCI: 00:00.0
1162 13:43:41.537211 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 13:43:41.547251 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 13:43:41.557024 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 13:43:41.567055 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 13:43:41.576961 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 13:43:41.583854 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 13:43:41.593587 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 13:43:41.603580 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 13:43:41.613466 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 13:43:41.623176 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 13:43:41.629991 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 13:43:41.639817 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 13:43:41.649758 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 13:43:41.660021 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 13:43:41.669564 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 13:43:41.679505 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 13:43:41.689609 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 13:43:41.696460 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 13:43:41.705777 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 13:43:41.716138 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 13:43:41.719206 PCI: 00:02.0
1183 13:43:41.729470 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 13:43:41.739164 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 13:43:41.745993 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 13:43:41.751961 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 13:43:41.762008 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 13:43:41.762130 GENERIC: 0.0
1189 13:43:41.765959 PCI: 00:05.0
1190 13:43:41.775057 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 13:43:41.778510 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 13:43:41.781827 GENERIC: 0.0
1193 13:43:41.781944 PCI: 00:08.0
1194 13:43:41.791635 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 13:43:41.795111 PCI: 00:0a.0
1196 13:43:41.798558 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 13:43:41.808614 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 13:43:41.815482 USB0 port 0 child on link 0 USB3 port 0
1199 13:43:41.815576 USB3 port 0
1200 13:43:41.818504 USB3 port 1
1201 13:43:41.818588 USB3 port 2
1202 13:43:41.821963 USB3 port 3
1203 13:43:41.825244 PCI: 00:14.0 child on link 0 USB0 port 0
1204 13:43:41.835000 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 13:43:41.838675 USB0 port 0 child on link 0 USB2 port 0
1206 13:43:41.841747 USB2 port 0
1207 13:43:41.841877 USB2 port 1
1208 13:43:41.844970 USB2 port 2
1209 13:43:41.845072 USB2 port 3
1210 13:43:41.848468 USB2 port 4
1211 13:43:41.851908 USB2 port 5
1212 13:43:41.852023 USB2 port 6
1213 13:43:41.854887 USB2 port 7
1214 13:43:41.854977 USB2 port 8
1215 13:43:41.858335 USB2 port 9
1216 13:43:41.858439 USB3 port 0
1217 13:43:41.861755 USB3 port 1
1218 13:43:41.861876 USB3 port 2
1219 13:43:41.864887 USB3 port 3
1220 13:43:41.865030 PCI: 00:14.2
1221 13:43:41.875325 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 13:43:41.884901 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 13:43:41.891468 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 13:43:41.901747 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 13:43:41.901881 GENERIC: 0.0
1226 13:43:41.905066 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 13:43:41.915036 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 13:43:41.918478 I2C: 00:1a
1229 13:43:41.918588 I2C: 00:31
1230 13:43:41.921762 I2C: 00:32
1231 13:43:41.925096 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 13:43:41.934643 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 13:43:41.938060 I2C: 00:10
1234 13:43:41.938174 PCI: 00:15.2
1235 13:43:41.948164 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 13:43:41.951429 PCI: 00:15.3
1237 13:43:41.961476 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 13:43:41.961595 PCI: 00:16.0
1239 13:43:41.971501 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 13:43:41.974425 PCI: 00:19.0
1241 13:43:41.978251 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 13:43:41.987997 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 13:43:41.988116 I2C: 00:15
1244 13:43:41.994845 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 13:43:42.000996 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 13:43:42.011124 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 13:43:42.021089 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 13:43:42.024437 GENERIC: 0.0
1249 13:43:42.024528 PCI: 01:00.0
1250 13:43:42.034515 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 13:43:42.044334 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 13:43:42.054294 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 13:43:42.054384 PCI: 00:1e.0
1254 13:43:42.067572 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 13:43:42.071158 PCI: 00:1e.2 child on link 0 SPI: 00
1256 13:43:42.080779 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 13:43:42.080869 SPI: 00
1258 13:43:42.083997 PCI: 00:1e.3 child on link 0 SPI: 00
1259 13:43:42.094329 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 13:43:42.097650 SPI: 00
1261 13:43:42.101010 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 13:43:42.110785 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 13:43:42.110876 PNP: 0c09.0
1264 13:43:42.120677 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 13:43:42.124008 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 13:43:42.134154 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 13:43:42.144582 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 13:43:42.147679 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 13:43:42.150722 GENERIC: 0.0
1270 13:43:42.150801 GENERIC: 1.0
1271 13:43:42.153773 PCI: 00:1f.3
1272 13:43:42.163884 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 13:43:42.173842 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 13:43:42.173961 PCI: 00:1f.5
1275 13:43:42.183861 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 13:43:42.187414 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 13:43:42.190500 APIC: 00
1278 13:43:42.190586 APIC: 01
1279 13:43:42.193998 APIC: 03
1280 13:43:42.194083 APIC: 07
1281 13:43:42.194150 APIC: 05
1282 13:43:42.197089 APIC: 04
1283 13:43:42.197173 APIC: 02
1284 13:43:42.197240 APIC: 06
1285 13:43:42.207133 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 13:43:42.210438 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 13:43:42.217286 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 13:43:42.223757 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 13:43:42.227083 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 13:43:42.233831 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 13:43:42.237163 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 13:43:42.243721 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 13:43:42.250315 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 13:43:42.260556 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 13:43:42.266843 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 13:43:42.273533 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 13:43:42.280258 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 13:43:42.286675 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 13:43:42.296818 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 13:43:42.296926 DOMAIN: 0000: Resource ranges:
1301 13:43:42.303595 * Base: 1000, Size: 800, Tag: 100
1302 13:43:42.306949 * Base: 1900, Size: e700, Tag: 100
1303 13:43:42.310237 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 13:43:42.316575 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 13:43:42.323712 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 13:43:42.333590 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 13:43:42.339756 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 13:43:42.346823 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 13:43:42.356731 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 13:43:42.363127 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 13:43:42.369999 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 13:43:42.380201 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 13:43:42.386316 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 13:43:42.393260 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 13:43:42.403052 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 13:43:42.409743 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 13:43:42.416698 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 13:43:42.423066 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 13:43:42.433038 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 13:43:42.439510 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 13:43:42.446082 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 13:43:42.456228 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 13:43:42.462905 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 13:43:42.469421 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 13:43:42.479685 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 13:43:42.486389 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 13:43:42.492628 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 13:43:42.496354 DOMAIN: 0000: Resource ranges:
1329 13:43:42.503206 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 13:43:42.505831 * Base: d0000000, Size: 28000000, Tag: 200
1331 13:43:42.509458 * Base: fa000000, Size: 1000000, Tag: 200
1332 13:43:42.515799 * Base: fb001000, Size: 2fff000, Tag: 200
1333 13:43:42.519293 * Base: fe010000, Size: 2e000, Tag: 200
1334 13:43:42.522843 * Base: fe03f000, Size: d41000, Tag: 200
1335 13:43:42.525957 * Base: fed88000, Size: 8000, Tag: 200
1336 13:43:42.532370 * Base: fed93000, Size: d000, Tag: 200
1337 13:43:42.535911 * Base: feda2000, Size: 1e000, Tag: 200
1338 13:43:42.539328 * Base: fede0000, Size: 1220000, Tag: 200
1339 13:43:42.545777 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 13:43:42.552417 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 13:43:42.559161 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 13:43:42.565569 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 13:43:42.572676 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 13:43:42.579578 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 13:43:42.585873 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 13:43:42.592457 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 13:43:42.599125 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 13:43:42.605526 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 13:43:42.612158 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 13:43:42.618850 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 13:43:42.625392 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 13:43:42.632531 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 13:43:42.639033 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 13:43:42.645691 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 13:43:42.652022 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 13:43:42.658838 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 13:43:42.665161 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 13:43:42.671793 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 13:43:42.678788 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 13:43:42.685367 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 13:43:42.692006 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 13:43:42.698822 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 13:43:42.705198 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 13:43:42.708514 PCI: 00:1d.0: Resource ranges:
1365 13:43:42.711806 * Base: 7fc00000, Size: 100000, Tag: 200
1366 13:43:42.718492 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 13:43:42.725144 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 13:43:42.731732 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 13:43:42.741895 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 13:43:42.748460 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 13:43:42.751645 Root Device assign_resources, bus 0 link: 0
1372 13:43:42.758515 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 13:43:42.765200 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 13:43:42.774917 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 13:43:42.781806 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 13:43:42.792012 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 13:43:42.795289 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 13:43:42.798664 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 13:43:42.808588 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 13:43:42.815317 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 13:43:42.825422 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 13:43:42.828550 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 13:43:42.835456 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 13:43:42.841946 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 13:43:42.845007 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 13:43:42.851962 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 13:43:42.858372 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 13:43:42.868785 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 13:43:42.875671 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 13:43:42.881518 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 13:43:42.885078 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 13:43:42.895372 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 13:43:42.898131 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 13:43:42.901599 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 13:43:42.911611 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 13:43:42.915035 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 13:43:42.921792 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 13:43:42.928341 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 13:43:42.938132 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 13:43:42.944678 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 13:43:42.954532 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 13:43:42.958392 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 13:43:42.961406 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 13:43:42.971482 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 13:43:42.981254 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 13:43:42.987972 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 13:43:42.994653 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 13:43:43.001342 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 13:43:43.011118 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 13:43:43.018125 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 13:43:43.021512 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 13:43:43.031486 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 13:43:43.034888 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 13:43:43.041582 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 13:43:43.048402 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 13:43:43.054865 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 13:43:43.057983 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 13:43:43.061790 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 13:43:43.067793 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 13:43:43.071618 LPC: Trying to open IO window from 800 size 1ff
1421 13:43:43.081107 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 13:43:43.087896 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 13:43:43.098077 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 13:43:43.101388 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 13:43:43.108019 Root Device assign_resources, bus 0 link: 0
1426 13:43:43.108123 Done setting resources.
1427 13:43:43.114262 Show resources in subtree (Root Device)...After assigning values.
1428 13:43:43.117540 Root Device child on link 0 DOMAIN: 0000
1429 13:43:43.124598 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 13:43:43.134319 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 13:43:43.144266 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 13:43:43.144351 PCI: 00:00.0
1433 13:43:43.154113 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 13:43:43.164626 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 13:43:43.174030 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 13:43:43.185720 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 13:43:43.190574 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 13:43:43.200319 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 13:43:43.210387 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 13:43:43.220847 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 13:43:43.230463 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 13:43:43.237440 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 13:43:43.246959 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 13:43:43.257169 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 13:43:43.266874 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 13:43:43.277203 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 13:43:43.283776 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 13:43:43.293314 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 13:43:43.303630 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 13:43:43.313321 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 13:43:43.323163 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 13:43:43.333631 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 13:43:43.333717 PCI: 00:02.0
1454 13:43:43.346700 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 13:43:43.356817 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 13:43:43.366819 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 13:43:43.370060 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 13:43:43.380283 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 13:43:43.383149 GENERIC: 0.0
1460 13:43:43.383234 PCI: 00:05.0
1461 13:43:43.393324 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 13:43:43.400162 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 13:43:43.400247 GENERIC: 0.0
1464 13:43:43.403544 PCI: 00:08.0
1465 13:43:43.413426 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 13:43:43.413511 PCI: 00:0a.0
1467 13:43:43.420134 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 13:43:43.430011 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 13:43:43.433315 USB0 port 0 child on link 0 USB3 port 0
1470 13:43:43.436541 USB3 port 0
1471 13:43:43.436624 USB3 port 1
1472 13:43:43.439633 USB3 port 2
1473 13:43:43.439716 USB3 port 3
1474 13:43:43.443267 PCI: 00:14.0 child on link 0 USB0 port 0
1475 13:43:43.456551 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 13:43:43.459902 USB0 port 0 child on link 0 USB2 port 0
1477 13:43:43.459987 USB2 port 0
1478 13:43:43.463345 USB2 port 1
1479 13:43:43.466729 USB2 port 2
1480 13:43:43.466813 USB2 port 3
1481 13:43:43.469734 USB2 port 4
1482 13:43:43.469817 USB2 port 5
1483 13:43:43.473096 USB2 port 6
1484 13:43:43.473179 USB2 port 7
1485 13:43:43.476682 USB2 port 8
1486 13:43:43.476766 USB2 port 9
1487 13:43:43.479915 USB3 port 0
1488 13:43:43.479998 USB3 port 1
1489 13:43:43.482876 USB3 port 2
1490 13:43:43.482960 USB3 port 3
1491 13:43:43.486467 PCI: 00:14.2
1492 13:43:43.496209 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 13:43:43.506215 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 13:43:43.509448 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 13:43:43.522897 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 13:43:43.522983 GENERIC: 0.0
1497 13:43:43.526308 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 13:43:43.536183 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 13:43:43.539382 I2C: 00:1a
1500 13:43:43.539467 I2C: 00:31
1501 13:43:43.542750 I2C: 00:32
1502 13:43:43.546044 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 13:43:43.555952 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 13:43:43.559312 I2C: 00:10
1505 13:43:43.559397 PCI: 00:15.2
1506 13:43:43.569433 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 13:43:43.572845 PCI: 00:15.3
1508 13:43:43.582768 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 13:43:43.586344 PCI: 00:16.0
1510 13:43:43.595763 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 13:43:43.595846 PCI: 00:19.0
1512 13:43:43.599169 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 13:43:43.612491 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 13:43:43.612574 I2C: 00:15
1515 13:43:43.616122 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 13:43:43.625990 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 13:43:43.639451 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 13:43:43.649585 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 13:43:43.649672 GENERIC: 0.0
1520 13:43:43.652473 PCI: 01:00.0
1521 13:43:43.662394 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 13:43:43.672438 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 13:43:43.682062 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 13:43:43.685443 PCI: 00:1e.0
1525 13:43:43.695895 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 13:43:43.699087 PCI: 00:1e.2 child on link 0 SPI: 00
1527 13:43:43.712092 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 13:43:43.712182 SPI: 00
1529 13:43:43.715757 PCI: 00:1e.3 child on link 0 SPI: 00
1530 13:43:43.725493 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 13:43:43.728963 SPI: 00
1532 13:43:43.732350 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 13:43:43.742411 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 13:43:43.742500 PNP: 0c09.0
1535 13:43:43.752194 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 13:43:43.755530 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 13:43:43.765238 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 13:43:43.775335 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 13:43:43.778635 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 13:43:43.782029 GENERIC: 0.0
1541 13:43:43.782113 GENERIC: 1.0
1542 13:43:43.785566 PCI: 00:1f.3
1543 13:43:43.795467 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 13:43:43.805153 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 13:43:43.805238 PCI: 00:1f.5
1546 13:43:43.818458 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 13:43:43.821705 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 13:43:43.821791 APIC: 00
1549 13:43:43.825045 APIC: 01
1550 13:43:43.825129 APIC: 03
1551 13:43:43.825197 APIC: 07
1552 13:43:43.828663 APIC: 05
1553 13:43:43.828747 APIC: 04
1554 13:43:43.828814 APIC: 02
1555 13:43:43.831991 APIC: 06
1556 13:43:43.835417 Done allocating resources.
1557 13:43:43.841530 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 13:43:43.844872 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 13:43:43.848275 Configure GPIOs for I2S audio on UP4.
1560 13:43:43.856584 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 13:43:43.859788 Enabling resources...
1562 13:43:43.863472 PCI: 00:00.0 subsystem <- 8086/9a12
1563 13:43:43.866889 PCI: 00:00.0 cmd <- 06
1564 13:43:43.869787 PCI: 00:02.0 subsystem <- 8086/9a40
1565 13:43:43.872940 PCI: 00:02.0 cmd <- 03
1566 13:43:43.876503 PCI: 00:04.0 subsystem <- 8086/9a03
1567 13:43:43.879883 PCI: 00:04.0 cmd <- 02
1568 13:43:43.883493 PCI: 00:05.0 subsystem <- 8086/9a19
1569 13:43:43.883603 PCI: 00:05.0 cmd <- 02
1570 13:43:43.889328 PCI: 00:08.0 subsystem <- 8086/9a11
1571 13:43:43.889413 PCI: 00:08.0 cmd <- 06
1572 13:43:43.892774 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 13:43:43.895943 PCI: 00:0d.0 cmd <- 02
1574 13:43:43.899353 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 13:43:43.902766 PCI: 00:14.0 cmd <- 02
1576 13:43:43.905835 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 13:43:43.909405 PCI: 00:14.2 cmd <- 02
1578 13:43:43.912639 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 13:43:43.916985 PCI: 00:14.3 cmd <- 02
1580 13:43:43.919589 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 13:43:43.922993 PCI: 00:15.0 cmd <- 02
1582 13:43:43.926212 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 13:43:43.929336 PCI: 00:15.1 cmd <- 02
1584 13:43:43.932881 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 13:43:43.932965 PCI: 00:15.2 cmd <- 02
1586 13:43:43.939412 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 13:43:43.939496 PCI: 00:15.3 cmd <- 02
1588 13:43:43.942726 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 13:43:43.946205 PCI: 00:16.0 cmd <- 02
1590 13:43:43.949356 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 13:43:43.952860 PCI: 00:19.1 cmd <- 02
1592 13:43:43.955961 PCI: 00:1d.0 bridge ctrl <- 0013
1593 13:43:43.959526 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 13:43:43.963080 PCI: 00:1d.0 cmd <- 06
1595 13:43:43.966437 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 13:43:43.969271 PCI: 00:1e.0 cmd <- 06
1597 13:43:43.973017 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 13:43:43.975566 PCI: 00:1e.2 cmd <- 06
1599 13:43:43.979382 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 13:43:43.979467 PCI: 00:1e.3 cmd <- 02
1601 13:43:43.985842 PCI: 00:1f.0 subsystem <- 8086/a087
1602 13:43:43.985927 PCI: 00:1f.0 cmd <- 407
1603 13:43:43.989321 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 13:43:43.992849 PCI: 00:1f.3 cmd <- 02
1605 13:43:43.996046 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 13:43:43.999203 PCI: 00:1f.5 cmd <- 406
1607 13:43:44.003787 PCI: 01:00.0 cmd <- 02
1608 13:43:44.008685 done.
1609 13:43:44.012024 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 13:43:44.015020 Initializing devices...
1611 13:43:44.018283 Root Device init
1612 13:43:44.021566 Chrome EC: Set SMI mask to 0x0000000000000000
1613 13:43:44.028825 Chrome EC: clear events_b mask to 0x0000000000000000
1614 13:43:44.034729 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 13:43:44.038353 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 13:43:44.045113 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 13:43:44.051656 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 13:43:44.055058 fw_config match found: DB_USB=USB3_ACTIVE
1619 13:43:44.061479 Configure Right Type-C port orientation for retimer
1620 13:43:44.064774 Root Device init finished in 42 msecs
1621 13:43:44.068321 PCI: 00:00.0 init
1622 13:43:44.068406 CPU TDP = 9 Watts
1623 13:43:44.071845 CPU PL1 = 9 Watts
1624 13:43:44.074506 CPU PL2 = 40 Watts
1625 13:43:44.074582 CPU PL4 = 83 Watts
1626 13:43:44.078005 PCI: 00:00.0 init finished in 8 msecs
1627 13:43:44.081240 PCI: 00:02.0 init
1628 13:43:44.084528 GMA: Found VBT in CBFS
1629 13:43:44.087672 GMA: Found valid VBT in CBFS
1630 13:43:44.091159 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 13:43:44.101089 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 13:43:44.104609 PCI: 00:02.0 init finished in 18 msecs
1633 13:43:44.108146 PCI: 00:05.0 init
1634 13:43:44.111025 PCI: 00:05.0 init finished in 0 msecs
1635 13:43:44.111103 PCI: 00:08.0 init
1636 13:43:44.118053 PCI: 00:08.0 init finished in 0 msecs
1637 13:43:44.118133 PCI: 00:14.0 init
1638 13:43:44.124151 PCI: 00:14.0 init finished in 0 msecs
1639 13:43:44.124233 PCI: 00:14.2 init
1640 13:43:44.127835 PCI: 00:14.2 init finished in 0 msecs
1641 13:43:44.131515 PCI: 00:15.0 init
1642 13:43:44.134547 I2C bus 0 version 0x3230302a
1643 13:43:44.137826 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 13:43:44.141185 PCI: 00:15.0 init finished in 6 msecs
1645 13:43:44.144546 PCI: 00:15.1 init
1646 13:43:44.147595 I2C bus 1 version 0x3230302a
1647 13:43:44.150997 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 13:43:44.154508 PCI: 00:15.1 init finished in 6 msecs
1649 13:43:44.157699 PCI: 00:15.2 init
1650 13:43:44.161036 I2C bus 2 version 0x3230302a
1651 13:43:44.164080 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 13:43:44.167774 PCI: 00:15.2 init finished in 6 msecs
1653 13:43:44.167892 PCI: 00:15.3 init
1654 13:43:44.171274 I2C bus 3 version 0x3230302a
1655 13:43:44.174511 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 13:43:44.180853 PCI: 00:15.3 init finished in 6 msecs
1657 13:43:44.180931 PCI: 00:16.0 init
1658 13:43:44.184362 PCI: 00:16.0 init finished in 0 msecs
1659 13:43:44.187998 PCI: 00:19.1 init
1660 13:43:44.191396 I2C bus 5 version 0x3230302a
1661 13:43:44.194817 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 13:43:44.197721 PCI: 00:19.1 init finished in 6 msecs
1663 13:43:44.201660 PCI: 00:1d.0 init
1664 13:43:44.204768 Initializing PCH PCIe bridge.
1665 13:43:44.207680 PCI: 00:1d.0 init finished in 3 msecs
1666 13:43:44.211202 PCI: 00:1f.0 init
1667 13:43:44.214564 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 13:43:44.221594 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 13:43:44.221677 IOAPIC: ID = 0x02
1670 13:43:44.224540 IOAPIC: Dumping registers
1671 13:43:44.228022 reg 0x0000: 0x02000000
1672 13:43:44.228124 reg 0x0001: 0x00770020
1673 13:43:44.230907 reg 0x0002: 0x00000000
1674 13:43:44.237770 PCI: 00:1f.0 init finished in 21 msecs
1675 13:43:44.237855 PCI: 00:1f.2 init
1676 13:43:44.241248 Disabling ACPI via APMC.
1677 13:43:44.244504 APMC done.
1678 13:43:44.247580 PCI: 00:1f.2 init finished in 5 msecs
1679 13:43:44.258872 PCI: 01:00.0 init
1680 13:43:44.261920 PCI: 01:00.0 init finished in 0 msecs
1681 13:43:44.265211 PNP: 0c09.0 init
1682 13:43:44.268995 Google Chrome EC uptime: 8.421 seconds
1683 13:43:44.275359 Google Chrome AP resets since EC boot: 1
1684 13:43:44.279135 Google Chrome most recent AP reset causes:
1685 13:43:44.282129 0.350: 32775 shutdown: entering G3
1686 13:43:44.288568 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 13:43:44.292187 PNP: 0c09.0 init finished in 22 msecs
1688 13:43:44.297519 Devices initialized
1689 13:43:44.300749 Show all devs... After init.
1690 13:43:44.304145 Root Device: enabled 1
1691 13:43:44.304228 DOMAIN: 0000: enabled 1
1692 13:43:44.307591 CPU_CLUSTER: 0: enabled 1
1693 13:43:44.311010 PCI: 00:00.0: enabled 1
1694 13:43:44.313901 PCI: 00:02.0: enabled 1
1695 13:43:44.313980 PCI: 00:04.0: enabled 1
1696 13:43:44.317407 PCI: 00:05.0: enabled 1
1697 13:43:44.320716 PCI: 00:06.0: enabled 0
1698 13:43:44.324089 PCI: 00:07.0: enabled 0
1699 13:43:44.324170 PCI: 00:07.1: enabled 0
1700 13:43:44.327336 PCI: 00:07.2: enabled 0
1701 13:43:44.330845 PCI: 00:07.3: enabled 0
1702 13:43:44.334490 PCI: 00:08.0: enabled 1
1703 13:43:44.334570 PCI: 00:09.0: enabled 0
1704 13:43:44.337375 PCI: 00:0a.0: enabled 0
1705 13:43:44.340904 PCI: 00:0d.0: enabled 1
1706 13:43:44.344179 PCI: 00:0d.1: enabled 0
1707 13:43:44.344252 PCI: 00:0d.2: enabled 0
1708 13:43:44.347558 PCI: 00:0d.3: enabled 0
1709 13:43:44.350790 PCI: 00:0e.0: enabled 0
1710 13:43:44.350893 PCI: 00:10.2: enabled 1
1711 13:43:44.353873 PCI: 00:10.6: enabled 0
1712 13:43:44.357476 PCI: 00:10.7: enabled 0
1713 13:43:44.361130 PCI: 00:12.0: enabled 0
1714 13:43:44.361212 PCI: 00:12.6: enabled 0
1715 13:43:44.364214 PCI: 00:13.0: enabled 0
1716 13:43:44.367466 PCI: 00:14.0: enabled 1
1717 13:43:44.370988 PCI: 00:14.1: enabled 0
1718 13:43:44.371068 PCI: 00:14.2: enabled 1
1719 13:43:44.374120 PCI: 00:14.3: enabled 1
1720 13:43:44.377619 PCI: 00:15.0: enabled 1
1721 13:43:44.380737 PCI: 00:15.1: enabled 1
1722 13:43:44.380815 PCI: 00:15.2: enabled 1
1723 13:43:44.383973 PCI: 00:15.3: enabled 1
1724 13:43:44.387214 PCI: 00:16.0: enabled 1
1725 13:43:44.387292 PCI: 00:16.1: enabled 0
1726 13:43:44.390891 PCI: 00:16.2: enabled 0
1727 13:43:44.394097 PCI: 00:16.3: enabled 0
1728 13:43:44.397191 PCI: 00:16.4: enabled 0
1729 13:43:44.397269 PCI: 00:16.5: enabled 0
1730 13:43:44.400498 PCI: 00:17.0: enabled 0
1731 13:43:44.403939 PCI: 00:19.0: enabled 0
1732 13:43:44.407352 PCI: 00:19.1: enabled 1
1733 13:43:44.407430 PCI: 00:19.2: enabled 0
1734 13:43:44.410752 PCI: 00:1c.0: enabled 1
1735 13:43:44.413598 PCI: 00:1c.1: enabled 0
1736 13:43:44.417115 PCI: 00:1c.2: enabled 0
1737 13:43:44.417192 PCI: 00:1c.3: enabled 0
1738 13:43:44.420693 PCI: 00:1c.4: enabled 0
1739 13:43:44.423778 PCI: 00:1c.5: enabled 0
1740 13:43:44.427031 PCI: 00:1c.6: enabled 1
1741 13:43:44.427108 PCI: 00:1c.7: enabled 0
1742 13:43:44.430370 PCI: 00:1d.0: enabled 1
1743 13:43:44.433614 PCI: 00:1d.1: enabled 0
1744 13:43:44.436899 PCI: 00:1d.2: enabled 1
1745 13:43:44.436982 PCI: 00:1d.3: enabled 0
1746 13:43:44.440354 PCI: 00:1e.0: enabled 1
1747 13:43:44.443467 PCI: 00:1e.1: enabled 0
1748 13:43:44.443572 PCI: 00:1e.2: enabled 1
1749 13:43:44.446941 PCI: 00:1e.3: enabled 1
1750 13:43:44.450229 PCI: 00:1f.0: enabled 1
1751 13:43:44.453507 PCI: 00:1f.1: enabled 0
1752 13:43:44.453585 PCI: 00:1f.2: enabled 1
1753 13:43:44.457027 PCI: 00:1f.3: enabled 1
1754 13:43:44.460237 PCI: 00:1f.4: enabled 0
1755 13:43:44.463425 PCI: 00:1f.5: enabled 1
1756 13:43:44.463506 PCI: 00:1f.6: enabled 0
1757 13:43:44.466524 PCI: 00:1f.7: enabled 0
1758 13:43:44.470181 APIC: 00: enabled 1
1759 13:43:44.470264 GENERIC: 0.0: enabled 1
1760 13:43:44.473316 GENERIC: 0.0: enabled 1
1761 13:43:44.476915 GENERIC: 1.0: enabled 1
1762 13:43:44.480025 GENERIC: 0.0: enabled 1
1763 13:43:44.480147 GENERIC: 1.0: enabled 1
1764 13:43:44.483342 USB0 port 0: enabled 1
1765 13:43:44.486795 GENERIC: 0.0: enabled 1
1766 13:43:44.490160 USB0 port 0: enabled 1
1767 13:43:44.490284 GENERIC: 0.0: enabled 1
1768 13:43:44.493575 I2C: 00:1a: enabled 1
1769 13:43:44.496857 I2C: 00:31: enabled 1
1770 13:43:44.496950 I2C: 00:32: enabled 1
1771 13:43:44.500178 I2C: 00:10: enabled 1
1772 13:43:44.503434 I2C: 00:15: enabled 1
1773 13:43:44.503510 GENERIC: 0.0: enabled 0
1774 13:43:44.506342 GENERIC: 1.0: enabled 0
1775 13:43:44.510099 GENERIC: 0.0: enabled 1
1776 13:43:44.510191 SPI: 00: enabled 1
1777 13:43:44.513496 SPI: 00: enabled 1
1778 13:43:44.516472 PNP: 0c09.0: enabled 1
1779 13:43:44.516569 GENERIC: 0.0: enabled 1
1780 13:43:44.519998 USB3 port 0: enabled 1
1781 13:43:44.523227 USB3 port 1: enabled 1
1782 13:43:44.526755 USB3 port 2: enabled 0
1783 13:43:44.526832 USB3 port 3: enabled 0
1784 13:43:44.530231 USB2 port 0: enabled 0
1785 13:43:44.532980 USB2 port 1: enabled 1
1786 13:43:44.533057 USB2 port 2: enabled 1
1787 13:43:44.536419 USB2 port 3: enabled 0
1788 13:43:44.539837 USB2 port 4: enabled 1
1789 13:43:44.543135 USB2 port 5: enabled 0
1790 13:43:44.543250 USB2 port 6: enabled 0
1791 13:43:44.546388 USB2 port 7: enabled 0
1792 13:43:44.550084 USB2 port 8: enabled 0
1793 13:43:44.550171 USB2 port 9: enabled 0
1794 13:43:44.553343 USB3 port 0: enabled 0
1795 13:43:44.556709 USB3 port 1: enabled 1
1796 13:43:44.556819 USB3 port 2: enabled 0
1797 13:43:44.559971 USB3 port 3: enabled 0
1798 13:43:44.562982 GENERIC: 0.0: enabled 1
1799 13:43:44.566208 GENERIC: 1.0: enabled 1
1800 13:43:44.566324 APIC: 01: enabled 1
1801 13:43:44.569887 APIC: 03: enabled 1
1802 13:43:44.569970 APIC: 07: enabled 1
1803 13:43:44.572970 APIC: 05: enabled 1
1804 13:43:44.576374 APIC: 04: enabled 1
1805 13:43:44.576457 APIC: 02: enabled 1
1806 13:43:44.580115 APIC: 06: enabled 1
1807 13:43:44.583194 PCI: 01:00.0: enabled 1
1808 13:43:44.586257 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1809 13:43:44.592923 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 13:43:44.596232 ELOG: NV offset 0xf30000 size 0x1000
1811 13:43:44.603018 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 13:43:44.609630 ELOG: Event(17) added with size 13 at 2023-06-07 13:43:44 UTC
1813 13:43:44.616322 ELOG: Event(92) added with size 9 at 2023-06-07 13:43:44 UTC
1814 13:43:44.622702 ELOG: Event(93) added with size 9 at 2023-06-07 13:43:44 UTC
1815 13:43:44.629494 ELOG: Event(9E) added with size 10 at 2023-06-07 13:43:44 UTC
1816 13:43:44.636269 ELOG: Event(9F) added with size 14 at 2023-06-07 13:43:44 UTC
1817 13:43:44.642380 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 13:43:44.645768 ELOG: Event(A1) added with size 10 at 2023-06-07 13:43:44 UTC
1819 13:43:44.652832 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1820 13:43:44.659598 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1821 13:43:44.662480 Finalize devices...
1822 13:43:44.662579 Devices finalized
1823 13:43:44.669512 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 13:43:44.676080 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 13:43:44.679334 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 13:43:44.685798 ME: HFSTS1 : 0x80030055
1827 13:43:44.688994 ME: HFSTS2 : 0x30280116
1828 13:43:44.692340 ME: HFSTS3 : 0x00000050
1829 13:43:44.699023 ME: HFSTS4 : 0x00004000
1830 13:43:44.702309 ME: HFSTS5 : 0x00000000
1831 13:43:44.705677 ME: HFSTS6 : 0x00400006
1832 13:43:44.712114 ME: Manufacturing Mode : YES
1833 13:43:44.715875 ME: SPI Protection Mode Enabled : NO
1834 13:43:44.719393 ME: FW Partition Table : OK
1835 13:43:44.722084 ME: Bringup Loader Failure : NO
1836 13:43:44.725393 ME: Firmware Init Complete : NO
1837 13:43:44.728938 ME: Boot Options Present : NO
1838 13:43:44.732273 ME: Update In Progress : NO
1839 13:43:44.735576 ME: D0i3 Support : YES
1840 13:43:44.742221 ME: Low Power State Enabled : NO
1841 13:43:44.745330 ME: CPU Replaced : YES
1842 13:43:44.748792 ME: CPU Replacement Valid : YES
1843 13:43:44.752440 ME: Current Working State : 5
1844 13:43:44.755286 ME: Current Operation State : 1
1845 13:43:44.759137 ME: Current Operation Mode : 3
1846 13:43:44.762162 ME: Error Code : 0
1847 13:43:44.765659 ME: Enhanced Debug Mode : NO
1848 13:43:44.768952 ME: CPU Debug Disabled : YES
1849 13:43:44.775151 ME: TXT Support : NO
1850 13:43:44.778735 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 13:43:44.788547 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 13:43:44.792006 CBFS: 'fallback/slic' not found.
1853 13:43:44.794974 ACPI: Writing ACPI tables at 76b01000.
1854 13:43:44.795060 ACPI: * FACS
1855 13:43:44.798484 ACPI: * DSDT
1856 13:43:44.801777 Ramoops buffer: 0x100000@0x76a00000.
1857 13:43:44.804981 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 13:43:44.811781 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 13:43:44.816054 Google Chrome EC: version:
1860 13:43:44.818884 ro: voema_v2.0.7540-147f8d37d1
1861 13:43:44.822481 rw: voema_v2.0.7540-147f8d37d1
1862 13:43:44.825702 running image: 2
1863 13:43:44.832468 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 13:43:44.835792 ACPI: * FADT
1865 13:43:44.835883 SCI is IRQ9
1866 13:43:44.839135 ACPI: added table 1/32, length now 40
1867 13:43:44.842715 ACPI: * SSDT
1868 13:43:44.845914 Found 1 CPU(s) with 8 core(s) each.
1869 13:43:44.848790 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1870 13:43:44.855803 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1871 13:43:44.858602 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1872 13:43:44.862040 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1873 13:43:44.868674 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1874 13:43:44.875338 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1875 13:43:44.879037 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1876 13:43:44.885267 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1877 13:43:44.891854 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1878 13:43:44.895285 \_SB.PCI0.RP09: Added StorageD3Enable property
1879 13:43:44.898520 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1880 13:43:44.905064 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1881 13:43:44.911835 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1882 13:43:44.915298 PS2K: Passing 80 keymaps to kernel
1883 13:43:44.921838 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1884 13:43:44.928532 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1885 13:43:44.935255 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1886 13:43:44.941916 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1887 13:43:44.948211 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1888 13:43:44.954846 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1889 13:43:44.958744 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1890 13:43:44.965185 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1891 13:43:44.971427 ACPI: added table 2/32, length now 44
1892 13:43:44.971552 ACPI: * MCFG
1893 13:43:44.975097 ACPI: added table 3/32, length now 48
1894 13:43:44.978087 ACPI: * TPM2
1895 13:43:44.981497 TPM2 log created at 0x769f0000
1896 13:43:44.984614 ACPI: added table 4/32, length now 52
1897 13:43:44.984722 ACPI: * MADT
1898 13:43:44.988367 SCI is IRQ9
1899 13:43:44.991267 ACPI: added table 5/32, length now 56
1900 13:43:44.991349 current = 76b09850
1901 13:43:44.994981 ACPI: * DMAR
1902 13:43:44.998074 ACPI: added table 6/32, length now 60
1903 13:43:45.001244 ACPI: added table 7/32, length now 64
1904 13:43:45.005363 ACPI: * HPET
1905 13:43:45.008104 ACPI: added table 8/32, length now 68
1906 13:43:45.008204 ACPI: done.
1907 13:43:45.011212 ACPI tables: 35216 bytes.
1908 13:43:45.014644 smbios_write_tables: 769ef000
1909 13:43:45.018371 EC returned error result code 3
1910 13:43:45.021425 Couldn't obtain OEM name from CBI
1911 13:43:45.024975 Create SMBIOS type 16
1912 13:43:45.027958 Create SMBIOS type 17
1913 13:43:45.028078 GENERIC: 0.0 (WIFI Device)
1914 13:43:45.031286 SMBIOS tables: 1750 bytes.
1915 13:43:45.034699 Writing table forward entry at 0x00000500
1916 13:43:45.041407 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1917 13:43:45.044855 Writing coreboot table at 0x76b25000
1918 13:43:45.051807 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1919 13:43:45.057996 1. 0000000000001000-000000000009ffff: RAM
1920 13:43:45.061397 2. 00000000000a0000-00000000000fffff: RESERVED
1921 13:43:45.064951 3. 0000000000100000-00000000769eefff: RAM
1922 13:43:45.071008 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1923 13:43:45.077768 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1924 13:43:45.081045 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1925 13:43:45.087736 7. 0000000077000000-000000007fbfffff: RESERVED
1926 13:43:45.090884 8. 00000000c0000000-00000000cfffffff: RESERVED
1927 13:43:45.097820 9. 00000000f8000000-00000000f9ffffff: RESERVED
1928 13:43:45.101196 10. 00000000fb000000-00000000fb000fff: RESERVED
1929 13:43:45.107890 11. 00000000fe000000-00000000fe00ffff: RESERVED
1930 13:43:45.110823 12. 00000000fed80000-00000000fed87fff: RESERVED
1931 13:43:45.114533 13. 00000000fed90000-00000000fed92fff: RESERVED
1932 13:43:45.120997 14. 00000000feda0000-00000000feda1fff: RESERVED
1933 13:43:45.124283 15. 00000000fedc0000-00000000feddffff: RESERVED
1934 13:43:45.130834 16. 0000000100000000-00000002803fffff: RAM
1935 13:43:45.130945 Passing 4 GPIOs to payload:
1936 13:43:45.137339 NAME | PORT | POLARITY | VALUE
1937 13:43:45.144303 lid | undefined | high | high
1938 13:43:45.147913 power | undefined | high | low
1939 13:43:45.154117 oprom | undefined | high | low
1940 13:43:45.157948 EC in RW | 0x000000e5 | high | high
1941 13:43:45.163892 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum bbd2
1942 13:43:45.167461 coreboot table: 1576 bytes.
1943 13:43:45.170910 IMD ROOT 0. 0x76fff000 0x00001000
1944 13:43:45.174031 IMD SMALL 1. 0x76ffe000 0x00001000
1945 13:43:45.180928 FSP MEMORY 2. 0x76c4e000 0x003b0000
1946 13:43:45.184017 VPD 3. 0x76c4d000 0x00000367
1947 13:43:45.187394 RO MCACHE 4. 0x76c4c000 0x00000fdc
1948 13:43:45.190813 CONSOLE 5. 0x76c2c000 0x00020000
1949 13:43:45.194586 FMAP 6. 0x76c2b000 0x00000578
1950 13:43:45.197694 TIME STAMP 7. 0x76c2a000 0x00000910
1951 13:43:45.201102 VBOOT WORK 8. 0x76c16000 0x00014000
1952 13:43:45.204294 ROMSTG STCK 9. 0x76c15000 0x00001000
1953 13:43:45.207473 AFTER CAR 10. 0x76c0a000 0x0000b000
1954 13:43:45.214067 RAMSTAGE 11. 0x76b97000 0x00073000
1955 13:43:45.217259 REFCODE 12. 0x76b42000 0x00055000
1956 13:43:45.221050 SMM BACKUP 13. 0x76b32000 0x00010000
1957 13:43:45.224158 4f444749 14. 0x76b30000 0x00002000
1958 13:43:45.227636 EXT VBT15. 0x76b2d000 0x0000219f
1959 13:43:45.230745 COREBOOT 16. 0x76b25000 0x00008000
1960 13:43:45.234100 ACPI 17. 0x76b01000 0x00024000
1961 13:43:45.237676 ACPI GNVS 18. 0x76b00000 0x00001000
1962 13:43:45.241033 RAMOOPS 19. 0x76a00000 0x00100000
1963 13:43:45.247665 TPM2 TCGLOG20. 0x769f0000 0x00010000
1964 13:43:45.251038 SMBIOS 21. 0x769ef000 0x00000800
1965 13:43:45.251154 IMD small region:
1966 13:43:45.253972 IMD ROOT 0. 0x76ffec00 0x00000400
1967 13:43:45.260583 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1968 13:43:45.264417 POWER STATE 2. 0x76ffeb80 0x00000044
1969 13:43:45.267206 ROMSTAGE 3. 0x76ffeb60 0x00000004
1970 13:43:45.270516 MEM INFO 4. 0x76ffe980 0x000001e0
1971 13:43:45.277354 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1972 13:43:45.280860 MTRR: Physical address space:
1973 13:43:45.287417 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1974 13:43:45.294033 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1975 13:43:45.297418 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1976 13:43:45.303922 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1977 13:43:45.310926 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1978 13:43:45.317638 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1979 13:43:45.323713 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1980 13:43:45.327096 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 13:43:45.330314 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 13:43:45.337373 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 13:43:45.340576 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 13:43:45.343538 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 13:43:45.347204 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 13:43:45.353818 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 13:43:45.357060 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 13:43:45.360514 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 13:43:45.363696 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 13:43:45.370321 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 13:43:45.373706 call enable_fixed_mtrr()
1992 13:43:45.376666 CPU physical address size: 39 bits
1993 13:43:45.380018 MTRR: default type WB/UC MTRR counts: 6/6.
1994 13:43:45.383600 MTRR: UC selected as default type.
1995 13:43:45.390251 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1996 13:43:45.396746 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1997 13:43:45.403524 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1998 13:43:45.410119 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1999 13:43:45.417248 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2000 13:43:45.419889 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2001 13:43:45.424436
2002 13:43:45.424524 MTRR check
2003 13:43:45.427782 Fixed MTRRs : Enabled
2004 13:43:45.427911 Variable MTRRs: Enabled
2005 13:43:45.427981
2006 13:43:45.434566 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 13:43:45.437549 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 13:43:45.440895 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 13:43:45.444163 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 13:43:45.450921 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 13:43:45.454796 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 13:43:45.457451 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 13:43:45.460675 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 13:43:45.467269 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 13:43:45.470966 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 13:43:45.474051 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 13:43:45.480968 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2018 13:43:45.484283 call enable_fixed_mtrr()
2019 13:43:45.487605 Checking cr50 for pending updates
2020 13:43:45.491711 CPU physical address size: 39 bits
2021 13:43:45.494925 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 13:43:45.498195 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 13:43:45.501536 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 13:43:45.508185 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 13:43:45.511377 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 13:43:45.515023 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 13:43:45.518291 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 13:43:45.524500 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 13:43:45.527926 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 13:43:45.531504 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 13:43:45.534721 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 13:43:45.541788 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 13:43:45.544902 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 13:43:45.548282 call enable_fixed_mtrr()
2035 13:43:45.551424 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 13:43:45.554892 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 13:43:45.561157 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 13:43:45.564447 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 13:43:45.568172 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 13:43:45.571040 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 13:43:45.577758 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 13:43:45.581167 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 13:43:45.584567 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 13:43:45.588226 CPU physical address size: 39 bits
2045 13:43:45.592284 call enable_fixed_mtrr()
2046 13:43:45.594838 Reading cr50 TPM mode
2047 13:43:45.598926 CPU physical address size: 39 bits
2048 13:43:45.601997 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 13:43:45.605319 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 13:43:45.612194 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 13:43:45.615467 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 13:43:45.618979 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 13:43:45.621770 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 13:43:45.628437 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 13:43:45.631637 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 13:43:45.634925 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 13:43:45.638731 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 13:43:45.642271 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 13:43:45.648292 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 13:43:45.651770 MTRR: Fixed MSR 0x258 0x0606060606060606
2061 13:43:45.655450 call enable_fixed_mtrr()
2062 13:43:45.658677 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 13:43:45.661721 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 13:43:45.668713 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 13:43:45.671699 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 13:43:45.675050 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 13:43:45.678530 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 13:43:45.685036 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 13:43:45.688545 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 13:43:45.692001 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 13:43:45.695223 CPU physical address size: 39 bits
2072 13:43:45.701881 call enable_fixed_mtrr()
2073 13:43:45.705088 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 13:43:45.708427 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 13:43:45.711739 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 13:43:45.718080 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 13:43:45.721594 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 13:43:45.724828 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 13:43:45.728168 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 13:43:45.731720 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 13:43:45.738322 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 13:43:45.741793 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 13:43:45.744916 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 13:43:45.748325 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 13:43:45.755865 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 13:43:45.758821 MTRR: Fixed MSR 0x259 0x0000000000000000
2087 13:43:45.762372 MTRR: Fixed MSR 0x268 0x0606060606060606
2088 13:43:45.765430 MTRR: Fixed MSR 0x269 0x0606060606060606
2089 13:43:45.772338 MTRR: Fixed MSR 0x26a 0x0606060606060606
2090 13:43:45.775781 MTRR: Fixed MSR 0x26b 0x0606060606060606
2091 13:43:45.778740 MTRR: Fixed MSR 0x26c 0x0606060606060606
2092 13:43:45.782446 MTRR: Fixed MSR 0x26d 0x0606060606060606
2093 13:43:45.788789 MTRR: Fixed MSR 0x26e 0x0606060606060606
2094 13:43:45.792496 MTRR: Fixed MSR 0x26f 0x0606060606060606
2095 13:43:45.795566 call enable_fixed_mtrr()
2096 13:43:45.798870 call enable_fixed_mtrr()
2097 13:43:45.802251 CPU physical address size: 39 bits
2098 13:43:45.805539 CPU physical address size: 39 bits
2099 13:43:45.808857 CPU physical address size: 39 bits
2100 13:43:45.815698 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2101 13:43:45.822163 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 13:43:45.828603 Checking segment from ROM address 0xffc02b38
2103 13:43:45.831935 Checking segment from ROM address 0xffc02b54
2104 13:43:45.835266 Loading segment from ROM address 0xffc02b38
2105 13:43:45.838742 code (compression=0)
2106 13:43:45.848698 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 13:43:45.855396 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 13:43:45.858336 it's not compressed!
2109 13:43:45.997362 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 13:43:46.003446 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 13:43:46.010372 Loading segment from ROM address 0xffc02b54
2112 13:43:46.010453 Entry Point 0x30000000
2113 13:43:46.013841 Loaded segments
2114 13:43:46.020120 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2115 13:43:46.063041 Finalizing chipset.
2116 13:43:46.066500 Finalizing SMM.
2117 13:43:46.066605 APMC done.
2118 13:43:46.072923 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 13:43:46.076334 mp_park_aps done after 0 msecs.
2120 13:43:46.079986 Jumping to boot code at 0x30000000(0x76b25000)
2121 13:43:46.089758 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 13:43:46.089900
2123 13:43:46.090002
2124 13:43:46.090105
2125 13:43:46.092736 Starting depthcharge on Voema...
2126 13:43:46.092845
2127 13:43:46.093285 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2128 13:43:46.093427 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2129 13:43:46.093545 Setting prompt string to ['volteer:']
2130 13:43:46.093677 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2131 13:43:46.102952 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 13:43:46.103049
2133 13:43:46.109882 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 13:43:46.109963
2135 13:43:46.112922 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 13:43:46.116733
2137 13:43:46.116809 Failed to find eMMC card reader
2138 13:43:46.116874
2139 13:43:46.120267 Wipe memory regions:
2140 13:43:46.120339
2141 13:43:46.123563 [0x00000000001000, 0x000000000a0000)
2142 13:43:46.123642
2143 13:43:46.126949 [0x00000000100000, 0x00000030000000)
2144 13:43:46.154282
2145 13:43:46.157729 [0x00000032662db0, 0x000000769ef000)
2146 13:43:46.193433
2147 13:43:46.196356 [0x00000100000000, 0x00000280400000)
2148 13:43:46.398772
2149 13:43:46.402564 ec_init: CrosEC protocol v3 supported (256, 256)
2150 13:43:46.402646
2151 13:43:46.408893 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 13:43:46.408979
2153 13:43:46.415283 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 13:43:46.420022
2155 13:43:46.423573 pmc_check_ipc_sts: STS_BUSY done after 1563 us
2156 13:43:46.423656
2157 13:43:46.426929 send_conn_disc_msg: pmc_send_cmd succeeded
2158 13:43:46.860204
2159 13:43:46.860353 R8152: Initializing
2160 13:43:46.860423
2161 13:43:46.863719 Version 6 (ocp_data = 5c30)
2162 13:43:46.863789
2163 13:43:46.867143 R8152: Done initializing
2164 13:43:46.867227
2165 13:43:46.870013 Adding net device
2166 13:43:47.172136
2167 13:43:47.175078 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 13:43:47.175186
2169 13:43:47.175272
2170 13:43:47.175364
2171 13:43:47.178727 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 13:43:47.279094 volteer: tftpboot 192.168.201.1 10624701/tftp-deploy-qpny5g5i/kernel/bzImage 10624701/tftp-deploy-qpny5g5i/kernel/cmdline 10624701/tftp-deploy-qpny5g5i/ramdisk/ramdisk.cpio.gz
2174 13:43:47.279239 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 13:43:47.279323 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 13:43:47.283459 tftpboot 192.168.201.1 10624701/tftp-deploy-qpny5g5i/kernel/bzImloy-qpny5g5i/kernel/cmdline 10624701/tftp-deploy-qpny5g5i/ramdisk/ramdisk.cpio.gz
2177 13:43:47.283572
2178 13:43:47.283706 Waiting for link
2179 13:43:47.488969
2180 13:43:47.489177 done.
2181 13:43:47.489266
2182 13:43:47.489332 MAC: 00:24:32:30:7d:bc
2183 13:43:47.489413
2184 13:43:47.491701 Sending DHCP discover... done.
2185 13:43:47.491804
2186 13:43:47.495209 Waiting for reply... done.
2187 13:43:47.495292
2188 13:43:47.500267 Sending DHCP request... done.
2189 13:43:47.500373
2190 13:43:47.506363 Waiting for reply... done.
2191 13:43:47.506469
2192 13:43:47.506571 My ip is 192.168.201.22
2193 13:43:47.506662
2194 13:43:47.510176 The DHCP server ip is 192.168.201.1
2195 13:43:47.513026
2196 13:43:47.516408 TFTP server IP predefined by user: 192.168.201.1
2197 13:43:47.516508
2198 13:43:47.523235 Bootfile predefined by user: 10624701/tftp-deploy-qpny5g5i/kernel/bzImage
2199 13:43:47.523340
2200 13:43:47.526611 Sending tftp read request... done.
2201 13:43:47.526703
2202 13:43:47.529548 Waiting for the transfer...
2203 13:43:47.529653
2204 13:43:48.055129 00000000 ################################################################
2205 13:43:48.055305
2206 13:43:48.593401 00080000 ################################################################
2207 13:43:48.593576
2208 13:43:49.126322 00100000 ################################################################
2209 13:43:49.126488
2210 13:43:49.664805 00180000 ################################################################
2211 13:43:49.664972
2212 13:43:50.199493 00200000 ################################################################
2213 13:43:50.199632
2214 13:43:50.724156 00280000 ################################################################
2215 13:43:50.724295
2216 13:43:51.250984 00300000 ################################################################
2217 13:43:51.251131
2218 13:43:51.795525 00380000 ################################################################
2219 13:43:51.795666
2220 13:43:52.396872 00400000 ################################################################
2221 13:43:52.397010
2222 13:43:52.986439 00480000 ################################################################
2223 13:43:52.986585
2224 13:43:53.589198 00500000 ################################################################
2225 13:43:53.589332
2226 13:43:54.256338 00580000 ################################################################
2227 13:43:54.256484
2228 13:43:54.878690 00600000 ################################################################
2229 13:43:54.878829
2230 13:43:55.460598 00680000 ################################################################
2231 13:43:55.460764
2232 13:43:56.002788 00700000 ################################################################
2233 13:43:56.002925
2234 13:43:56.198958 00780000 #################### done.
2235 13:43:56.199456
2236 13:43:56.202378 The bootfile was 8028048 bytes long.
2237 13:43:56.202944
2238 13:43:56.205868 Sending tftp read request... done.
2239 13:43:56.206299
2240 13:43:56.209451 Waiting for the transfer...
2241 13:43:56.210001
2242 13:43:56.904109 00000000 ################################################################
2243 13:43:56.904609
2244 13:43:57.579287 00080000 ################################################################
2245 13:43:57.579801
2246 13:43:58.271238 00100000 ################################################################
2247 13:43:58.271752
2248 13:43:58.967347 00180000 ################################################################
2249 13:43:58.967920
2250 13:43:59.695242 00200000 ################################################################
2251 13:43:59.695788
2252 13:44:00.406348 00280000 ################################################################
2253 13:44:00.406859
2254 13:44:01.122198 00300000 ################################################################
2255 13:44:01.122727
2256 13:44:01.650677 00380000 ################################################################
2257 13:44:01.650842
2258 13:44:02.262503 00400000 ################################################################
2259 13:44:02.263055
2260 13:44:02.946262 00480000 ################################################################
2261 13:44:02.946805
2262 13:44:03.582792 00500000 ################################################################
2263 13:44:03.582952
2264 13:44:03.583049 00580000 # done.
2265 13:44:03.583142
2266 13:44:03.586488 Sending tftp read request... done.
2267 13:44:03.586573
2268 13:44:03.589992 Waiting for the transfer...
2269 13:44:03.590077
2270 13:44:03.592814 00000000 # done.
2271 13:44:03.592906
2272 13:44:03.599692 Command line loaded dynamically from TFTP file: 10624701/tftp-deploy-qpny5g5i/kernel/cmdline
2273 13:44:03.599790
2274 13:44:03.619521 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10624701/extract-nfsrootfs-hvhpfhne,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2275 13:44:03.624215
2276 13:44:03.627726 Shutting down all USB controllers.
2277 13:44:03.627904
2278 13:44:03.628066 Removing current net device
2279 13:44:03.628206
2280 13:44:03.630992 Finalizing coreboot
2281 13:44:03.631201
2282 13:44:03.637431 Exiting depthcharge with code 4 at timestamp: 26181765
2283 13:44:03.637679
2284 13:44:03.637876
2285 13:44:03.638061 Starting kernel ...
2286 13:44:03.638238
2287 13:44:03.638408
2288 13:44:03.639103 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2289 13:44:03.639386 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2290 13:44:03.639607 Setting prompt string to ['Linux version [0-9]']
2291 13:44:03.639810 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2292 13:44:03.640011 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2294 13:48:30.639748 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2296 13:48:30.640024 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2298 13:48:30.640280 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2301 13:48:30.640629 end: 2 depthcharge-action (duration 00:05:00) [common]
2303 13:48:30.640897 Cleaning after the job
2304 13:48:30.641008 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/ramdisk
2305 13:48:30.642001 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/kernel
2306 13:48:30.643203 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/nfsrootfs
2307 13:48:30.700837 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624701/tftp-deploy-qpny5g5i/modules
2308 13:48:30.701272 start: 5.1 power-off (timeout 00:00:30) [common]
2309 13:48:30.701445 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2310 13:48:30.778586 >> Command sent successfully.
2311 13:48:30.783067 Returned 0 in 0 seconds
2312 13:48:30.883961 end: 5.1 power-off (duration 00:00:00) [common]
2314 13:48:30.885555 start: 5.2 read-feedback (timeout 00:10:00) [common]
2315 13:48:30.887235 Listened to connection for namespace 'common' for up to 1s
2316 13:48:31.887716 Finalising connection for namespace 'common'
2317 13:48:31.888451 Disconnecting from shell: Finalise
2318 13:48:31.888953
2319 13:48:31.989686 end: 5.2 read-feedback (duration 00:00:01) [common]
2320 13:48:31.989851 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624701
2321 13:48:32.252517 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624701
2322 13:48:32.252718 JobError: Your job cannot terminate cleanly.