Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 13:48:57.948649 lava-dispatcher, installed at version: 2023.05.1
2 13:48:57.948864 start: 0 validate
3 13:48:57.948988 Start time: 2023-06-07 13:48:57.948981+00:00 (UTC)
4 13:48:57.949105 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:48:57.949231 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 13:48:58.216467 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:48:58.216649 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:48:58.483813 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:48:58.483985 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:48:58.751412 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:48:58.751584 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-cip-rt%2Fv4.4.302-cip76-rt44%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
12 13:48:59.019642 validate duration: 1.07
14 13:48:59.019900 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:48:59.019996 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:48:59.020080 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:48:59.020198 Not decompressing ramdisk as can be used compressed.
18 13:48:59.020281 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/initrd.cpio.gz
19 13:48:59.020345 saving as /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/ramdisk/initrd.cpio.gz
20 13:48:59.020404 total size: 5671546 (5MB)
21 13:48:59.021623 progress 0% (0MB)
22 13:48:59.023403 progress 5% (0MB)
23 13:48:59.025103 progress 10% (0MB)
24 13:48:59.026441 progress 15% (0MB)
25 13:48:59.028006 progress 20% (1MB)
26 13:48:59.029556 progress 25% (1MB)
27 13:48:59.030921 progress 30% (1MB)
28 13:48:59.032410 progress 35% (1MB)
29 13:48:59.033975 progress 40% (2MB)
30 13:48:59.035435 progress 45% (2MB)
31 13:48:59.036980 progress 50% (2MB)
32 13:48:59.038462 progress 55% (3MB)
33 13:48:59.039867 progress 60% (3MB)
34 13:48:59.041461 progress 65% (3MB)
35 13:48:59.043000 progress 70% (3MB)
36 13:48:59.044342 progress 75% (4MB)
37 13:48:59.045854 progress 80% (4MB)
38 13:48:59.047423 progress 85% (4MB)
39 13:48:59.048754 progress 90% (4MB)
40 13:48:59.050233 progress 95% (5MB)
41 13:48:59.051770 progress 100% (5MB)
42 13:48:59.051876 5MB downloaded in 0.03s (171.88MB/s)
43 13:48:59.052018 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:48:59.052249 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:48:59.052334 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:48:59.052416 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:48:59.052541 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
49 13:48:59.052609 saving as /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/kernel/bzImage
50 13:48:59.052668 total size: 8028048 (7MB)
51 13:48:59.052726 No compression specified
52 13:48:59.053969 progress 0% (0MB)
53 13:48:59.056210 progress 5% (0MB)
54 13:48:59.058229 progress 10% (0MB)
55 13:48:59.060255 progress 15% (1MB)
56 13:48:59.062271 progress 20% (1MB)
57 13:48:59.064501 progress 25% (1MB)
58 13:48:59.066475 progress 30% (2MB)
59 13:48:59.068470 progress 35% (2MB)
60 13:48:59.070417 progress 40% (3MB)
61 13:48:59.072642 progress 45% (3MB)
62 13:48:59.074620 progress 50% (3MB)
63 13:48:59.076743 progress 55% (4MB)
64 13:48:59.078699 progress 60% (4MB)
65 13:48:59.080921 progress 65% (5MB)
66 13:48:59.082865 progress 70% (5MB)
67 13:48:59.084897 progress 75% (5MB)
68 13:48:59.086873 progress 80% (6MB)
69 13:48:59.089167 progress 85% (6MB)
70 13:48:59.091284 progress 90% (6MB)
71 13:48:59.093368 progress 95% (7MB)
72 13:48:59.095490 progress 100% (7MB)
73 13:48:59.095723 7MB downloaded in 0.04s (177.84MB/s)
74 13:48:59.095895 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:48:59.096118 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:48:59.096203 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:48:59.096285 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:48:59.096417 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230527.0/amd64/full.rootfs.tar.xz
80 13:48:59.096486 saving as /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/nfsrootfs/full.rootfs.tar
81 13:48:59.096545 total size: 125914312 (120MB)
82 13:48:59.096632 Using unxz to decompress xz
83 13:48:59.100528 progress 0% (0MB)
84 13:48:59.571984 progress 5% (6MB)
85 13:49:00.047140 progress 10% (12MB)
86 13:49:00.527235 progress 15% (18MB)
87 13:49:01.019292 progress 20% (24MB)
88 13:49:01.354108 progress 25% (30MB)
89 13:49:01.696991 progress 30% (36MB)
90 13:49:01.965729 progress 35% (42MB)
91 13:49:02.162493 progress 40% (48MB)
92 13:49:02.521576 progress 45% (54MB)
93 13:49:02.881686 progress 50% (60MB)
94 13:49:03.217512 progress 55% (66MB)
95 13:49:03.581977 progress 60% (72MB)
96 13:49:03.915738 progress 65% (78MB)
97 13:49:04.301459 progress 70% (84MB)
98 13:49:04.713849 progress 75% (90MB)
99 13:49:05.136499 progress 80% (96MB)
100 13:49:05.228843 progress 85% (102MB)
101 13:49:05.386732 progress 90% (108MB)
102 13:49:05.718564 progress 95% (114MB)
103 13:49:06.084435 progress 100% (120MB)
104 13:49:06.090108 120MB downloaded in 6.99s (17.17MB/s)
105 13:49:06.090397 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:49:06.090651 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:49:06.090764 start: 1.4 download-retry (timeout 00:09:53) [common]
109 13:49:06.090855 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 13:49:06.091043 downloading http://storage.kernelci.org/cip/linux-4.4.y-cip-rt/v4.4.302-cip76-rt44/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
111 13:49:06.091150 saving as /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/modules/modules.tar
112 13:49:06.091247 total size: 255828 (0MB)
113 13:49:06.091359 Using unxz to decompress xz
114 13:49:06.095310 progress 12% (0MB)
115 13:49:06.095763 progress 25% (0MB)
116 13:49:06.096028 progress 38% (0MB)
117 13:49:06.097368 progress 51% (0MB)
118 13:49:06.099248 progress 64% (0MB)
119 13:49:06.101140 progress 76% (0MB)
120 13:49:06.103008 progress 89% (0MB)
121 13:49:06.104883 progress 100% (0MB)
122 13:49:06.110768 0MB downloaded in 0.02s (12.50MB/s)
123 13:49:06.111009 end: 1.4.1 http-download (duration 00:00:00) [common]
125 13:49:06.111270 end: 1.4 download-retry (duration 00:00:00) [common]
126 13:49:06.111408 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 13:49:06.111508 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 13:49:08.800096 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10624732/extract-nfsrootfs-nn5a4fob
129 13:49:08.800299 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 13:49:08.800403 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 13:49:08.800562 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf
132 13:49:08.800683 makedir: /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin
133 13:49:08.800780 makedir: /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/tests
134 13:49:08.800872 makedir: /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/results
135 13:49:08.800969 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-add-keys
136 13:49:08.801108 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-add-sources
137 13:49:08.801230 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-background-process-start
138 13:49:08.801354 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-background-process-stop
139 13:49:08.801472 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-common-functions
140 13:49:08.801589 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-echo-ipv4
141 13:49:08.801707 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-install-packages
142 13:49:08.801824 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-installed-packages
143 13:49:08.801938 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-os-build
144 13:49:08.802056 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-probe-channel
145 13:49:08.802172 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-probe-ip
146 13:49:08.802290 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-target-ip
147 13:49:08.802405 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-target-mac
148 13:49:08.802522 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-target-storage
149 13:49:08.802641 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-test-case
150 13:49:08.802761 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-test-event
151 13:49:08.802878 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-test-feedback
152 13:49:08.802995 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-test-raise
153 13:49:08.803111 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-test-reference
154 13:49:08.803239 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-test-runner
155 13:49:08.803505 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-test-set
156 13:49:08.803624 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-test-shell
157 13:49:08.803741 Updating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-install-packages (oe)
158 13:49:08.803882 Updating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/bin/lava-installed-packages (oe)
159 13:49:08.803995 Creating /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/environment
160 13:49:08.804085 LAVA metadata
161 13:49:08.804151 - LAVA_JOB_ID=10624732
162 13:49:08.804212 - LAVA_DISPATCHER_IP=192.168.201.1
163 13:49:08.804309 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 13:49:08.804372 skipped lava-vland-overlay
165 13:49:08.804442 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 13:49:08.804517 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 13:49:08.804574 skipped lava-multinode-overlay
168 13:49:08.804642 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 13:49:08.804715 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 13:49:08.804782 Loading test definitions
171 13:49:08.804865 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 13:49:08.804932 Using /lava-10624732 at stage 0
173 13:49:08.805030 Fetching tests from https://github.com/kernelci/test-definitions
174 13:49:08.805102 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/0/tests/0_ltp-timers'
175 13:49:13.206661 Running '/usr/bin/git checkout kernelci.org
176 13:49:13.341473 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
177 13:49:13.342178 uuid=10624732_1.5.2.3.1 testdef=None
178 13:49:13.342335 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
180 13:49:13.342585 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
181 13:49:13.343250 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 13:49:13.343526 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
184 13:49:13.344369 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 13:49:13.344607 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
187 13:49:13.345414 runner path: /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/0/tests/0_ltp-timers test_uuid 10624732_1.5.2.3.1
188 13:49:13.345500 GRP_TEST='TMR'
189 13:49:13.345565 SKIPFILE='skipfile-lkft.yaml'
190 13:49:13.345624 SKIP_INSTALL='true'
191 13:49:13.345681 TST_CMDFILES=''
192 13:49:13.345814 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 13:49:13.346084 Creating lava-test-runner.conf files
195 13:49:13.346186 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624732/lava-overlay-_elzwjvf/lava-10624732/0 for stage 0
196 13:49:13.346315 - 0_ltp-timers
197 13:49:13.346447 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
198 13:49:13.346538 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
199 13:49:20.847217 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
200 13:49:20.847421 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
201 13:49:20.847516 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 13:49:20.847618 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
203 13:49:20.847711 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
204 13:49:20.983797 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 13:49:20.984173 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
206 13:49:20.984299 extracting modules file /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624732/extract-nfsrootfs-nn5a4fob
207 13:49:20.997940 extracting modules file /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624732/extract-overlay-ramdisk-8lefkv9i/ramdisk
208 13:49:21.011321 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 13:49:21.011516 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
210 13:49:21.011611 [common] Applying overlay to NFS
211 13:49:21.011683 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624732/compress-overlay-kc0rbsxa/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624732/extract-nfsrootfs-nn5a4fob
212 13:49:21.919430 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
213 13:49:21.919599 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
214 13:49:21.919691 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 13:49:21.919777 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
216 13:49:21.919861 Building ramdisk /var/lib/lava/dispatcher/tmp/10624732/extract-overlay-ramdisk-8lefkv9i/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624732/extract-overlay-ramdisk-8lefkv9i/ramdisk
217 13:49:21.986554 >> 27239 blocks
218 13:49:22.545080 rename /var/lib/lava/dispatcher/tmp/10624732/extract-overlay-ramdisk-8lefkv9i/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/ramdisk/ramdisk.cpio.gz
219 13:49:22.545538 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 13:49:22.545665 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
221 13:49:22.545763 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
222 13:49:22.545855 No mkimage arch provided, not using FIT.
223 13:49:22.545947 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 13:49:22.546029 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 13:49:22.546130 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
226 13:49:22.546218 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
227 13:49:22.546298 No LXC device requested
228 13:49:22.546376 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 13:49:22.546459 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
230 13:49:22.546539 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 13:49:22.546609 Checking files for TFTP limit of 4294967296 bytes.
232 13:49:22.547001 end: 1 tftp-deploy (duration 00:00:24) [common]
233 13:49:22.547110 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 13:49:22.547215 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 13:49:22.547367 substitutions:
236 13:49:22.547453 - {DTB}: None
237 13:49:22.547516 - {INITRD}: 10624732/tftp-deploy-vck2izkm/ramdisk/ramdisk.cpio.gz
238 13:49:22.547576 - {KERNEL}: 10624732/tftp-deploy-vck2izkm/kernel/bzImage
239 13:49:22.547634 - {LAVA_MAC}: None
240 13:49:22.547691 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10624732/extract-nfsrootfs-nn5a4fob
241 13:49:22.547749 - {NFS_SERVER_IP}: 192.168.201.1
242 13:49:22.547803 - {PRESEED_CONFIG}: None
243 13:49:22.547859 - {PRESEED_LOCAL}: None
244 13:49:22.547912 - {RAMDISK}: 10624732/tftp-deploy-vck2izkm/ramdisk/ramdisk.cpio.gz
245 13:49:22.547966 - {ROOT_PART}: None
246 13:49:22.548019 - {ROOT}: None
247 13:49:22.548071 - {SERVER_IP}: 192.168.201.1
248 13:49:22.548124 - {TEE}: None
249 13:49:22.548177 Parsed boot commands:
250 13:49:22.548228 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 13:49:22.548391 Parsed boot commands: tftpboot 192.168.201.1 10624732/tftp-deploy-vck2izkm/kernel/bzImage 10624732/tftp-deploy-vck2izkm/kernel/cmdline 10624732/tftp-deploy-vck2izkm/ramdisk/ramdisk.cpio.gz
252 13:49:22.548479 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 13:49:22.548558 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 13:49:22.548645 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 13:49:22.548729 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 13:49:22.548794 Not connected, no need to disconnect.
257 13:49:22.548865 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 13:49:22.548943 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 13:49:22.549017 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
260 13:49:22.552575 Setting prompt string to ['lava-test: # ']
261 13:49:22.552915 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 13:49:22.553021 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 13:49:22.553123 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 13:49:22.553231 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 13:49:22.553460 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
266 13:49:27.687466 >> Command sent successfully.
267 13:49:27.690002 Returned 0 in 5 seconds
268 13:49:27.790419 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
270 13:49:27.790765 end: 2.2.2 reset-device (duration 00:00:05) [common]
271 13:49:27.790896 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
272 13:49:27.790991 Setting prompt string to 'Starting depthcharge on Helios...'
273 13:49:27.791058 Changing prompt to 'Starting depthcharge on Helios...'
274 13:49:27.791127 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
275 13:49:27.791421 [Enter `^Ec?' for help]
276 13:49:28.411720
277 13:49:28.411885
278 13:49:28.421483 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
279 13:49:28.424938 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
280 13:49:28.431506 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
281 13:49:28.434951 CPU: AES supported, TXT NOT supported, VT supported
282 13:49:28.441540 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
283 13:49:28.444907 PCH: device id 0284 (rev 00) is Cometlake-U Premium
284 13:49:28.451454 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
285 13:49:28.455058 VBOOT: Loading verstage.
286 13:49:28.458006 FMAP: Found "FLASH" version 1.1 at 0xc04000.
287 13:49:28.465141 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
288 13:49:28.468427 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
289 13:49:28.471209 CBFS @ c08000 size 3f8000
290 13:49:28.478120 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
291 13:49:28.481226 CBFS: Locating 'fallback/verstage'
292 13:49:28.484407 CBFS: Found @ offset 10fb80 size 1072c
293 13:49:28.488574
294 13:49:28.488658
295 13:49:28.498007 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
296 13:49:28.512628 Probing TPM: . done!
297 13:49:28.516004 TPM ready after 0 ms
298 13:49:28.519345 Connected to device vid:did:rid of 1ae0:0028:00
299 13:49:28.529255 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
300 13:49:28.533107 Initialized TPM device CR50 revision 0
301 13:49:28.577131 tlcl_send_startup: Startup return code is 0
302 13:49:28.577282 TPM: setup succeeded
303 13:49:28.590153 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
304 13:49:28.593793 Chrome EC: UHEPI supported
305 13:49:28.597418 Phase 1
306 13:49:28.600564 FMAP: area GBB found @ c05000 (12288 bytes)
307 13:49:28.607269 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
308 13:49:28.610378 Phase 2
309 13:49:28.610486 Phase 3
310 13:49:28.614125 FMAP: area GBB found @ c05000 (12288 bytes)
311 13:49:28.620444 VB2:vb2_report_dev_firmware() This is developer signed firmware
312 13:49:28.627141 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
313 13:49:28.630608 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 13:49:28.637018 VB2:vb2_verify_keyblock() Checking keyblock signature...
315 13:49:28.652957 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 13:49:28.656108 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 13:49:28.662827 VB2:vb2_verify_fw_preamble() Verifying preamble.
318 13:49:28.666648 Phase 4
319 13:49:28.669910 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
320 13:49:28.676876 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
321 13:49:28.856447 VB2:vb2_rsa_verify_digest() Digest check failed!
322 13:49:28.859243 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
323 13:49:28.862705 Saving nvdata
324 13:49:28.866451 Reboot requested (10020007)
325 13:49:28.869851 board_reset() called!
326 13:49:28.869936 full_reset() called!
327 13:49:33.379730
328 13:49:33.380302
329 13:49:33.389312 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
330 13:49:33.392571 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
331 13:49:33.399589 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
332 13:49:33.402191 CPU: AES supported, TXT NOT supported, VT supported
333 13:49:33.409363 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
334 13:49:33.412393 PCH: device id 0284 (rev 00) is Cometlake-U Premium
335 13:49:33.418834 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
336 13:49:33.422218 VBOOT: Loading verstage.
337 13:49:33.426133 FMAP: Found "FLASH" version 1.1 at 0xc04000.
338 13:49:33.432279 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
339 13:49:33.435140 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 13:49:33.438854 CBFS @ c08000 size 3f8000
341 13:49:33.445666 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
342 13:49:33.448772 CBFS: Locating 'fallback/verstage'
343 13:49:33.452125 CBFS: Found @ offset 10fb80 size 1072c
344 13:49:33.455842
345 13:49:33.456024
346 13:49:33.465663 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
347 13:49:33.480136 Probing TPM: . done!
348 13:49:33.483557 TPM ready after 0 ms
349 13:49:33.486778 Connected to device vid:did:rid of 1ae0:0028:00
350 13:49:33.497237 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
351 13:49:33.500792 Initialized TPM device CR50 revision 0
352 13:49:33.545326 tlcl_send_startup: Startup return code is 0
353 13:49:33.545845 TPM: setup succeeded
354 13:49:33.558280 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
355 13:49:33.561713 Chrome EC: UHEPI supported
356 13:49:33.564635 Phase 1
357 13:49:33.568368 FMAP: area GBB found @ c05000 (12288 bytes)
358 13:49:33.574694 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
359 13:49:33.581535 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
360 13:49:33.585379 Recovery requested (1009000e)
361 13:49:33.590389 Saving nvdata
362 13:49:33.596390 tlcl_extend: response is 0
363 13:49:33.605607 tlcl_extend: response is 0
364 13:49:33.612188 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
365 13:49:33.615809 CBFS @ c08000 size 3f8000
366 13:49:33.622297 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
367 13:49:33.625890 CBFS: Locating 'fallback/romstage'
368 13:49:33.628819 CBFS: Found @ offset 80 size 145fc
369 13:49:33.632283 Accumulated console time in verstage 98 ms
370 13:49:33.632780
371 13:49:33.633123
372 13:49:33.645335 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
373 13:49:33.651965 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
374 13:49:33.654966 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
375 13:49:33.658510 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
376 13:49:33.665294 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
377 13:49:33.668892 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
378 13:49:33.672054 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
379 13:49:33.674943 TCO_STS: 0000 0000
380 13:49:33.678890 GEN_PMCON: e0015238 00000200
381 13:49:33.681764 GBLRST_CAUSE: 00000000 00000000
382 13:49:33.681995 prev_sleep_state 5
383 13:49:33.685164 Boot Count incremented to 58160
384 13:49:33.691652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
385 13:49:33.695217 CBFS @ c08000 size 3f8000
386 13:49:33.698853 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
387 13:49:33.701927 CBFS: Locating 'fspm.bin'
388 13:49:33.705928 CBFS: Found @ offset 5ffc0 size 71000
389 13:49:33.709890 Chrome EC: UHEPI supported
390 13:49:33.717278 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
391 13:49:33.722562 Probing TPM: done!
392 13:49:33.729052 Connected to device vid:did:rid of 1ae0:0028:00
393 13:49:33.738822 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
394 13:49:33.744405 Initialized TPM device CR50 revision 0
395 13:49:33.753786 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
396 13:49:33.760611 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
397 13:49:33.763743 MRC cache found, size 1948
398 13:49:33.767159 bootmode is set to: 2
399 13:49:33.770311 PRMRR disabled by config.
400 13:49:33.770746 SPD INDEX = 1
401 13:49:33.777034 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 13:49:33.780062 CBFS @ c08000 size 3f8000
403 13:49:33.787116 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 13:49:33.787583 CBFS: Locating 'spd.bin'
405 13:49:33.790190 CBFS: Found @ offset 5fb80 size 400
406 13:49:33.793504 SPD: module type is LPDDR3
407 13:49:33.796979 SPD: module part is
408 13:49:33.803365 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
409 13:49:33.806903 SPD: device width 4 bits, bus width 8 bits
410 13:49:33.810366 SPD: module size is 4096 MB (per channel)
411 13:49:33.813505 memory slot: 0 configuration done.
412 13:49:33.816569 memory slot: 2 configuration done.
413 13:49:33.867749 CBMEM:
414 13:49:33.871341 IMD: root @ 99fff000 254 entries.
415 13:49:33.874494 IMD: root @ 99ffec00 62 entries.
416 13:49:33.877927 External stage cache:
417 13:49:33.880989 IMD: root @ 9abff000 254 entries.
418 13:49:33.884832 IMD: root @ 9abfec00 62 entries.
419 13:49:33.887686 Chrome EC: clear events_b mask to 0x0000000020004000
420 13:49:33.904197 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 13:49:33.917041 tlcl_write: response is 0
422 13:49:33.925920 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
423 13:49:33.932759 MRC: TPM MRC hash updated successfully.
424 13:49:33.933147 2 DIMMs found
425 13:49:33.936455 SMM Memory Map
426 13:49:33.939567 SMRAM : 0x9a000000 0x1000000
427 13:49:33.942688 Subregion 0: 0x9a000000 0xa00000
428 13:49:33.945833 Subregion 1: 0x9aa00000 0x200000
429 13:49:33.949176 Subregion 2: 0x9ac00000 0x400000
430 13:49:33.952686 top_of_ram = 0x9a000000
431 13:49:33.955876 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
432 13:49:33.962450 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
433 13:49:33.965748 MTRR Range: Start=ff000000 End=0 (Size 1000000)
434 13:49:33.972757 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 13:49:33.975694 CBFS @ c08000 size 3f8000
436 13:49:33.979296 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 13:49:33.982296 CBFS: Locating 'fallback/postcar'
438 13:49:33.989273 CBFS: Found @ offset 107000 size 4b44
439 13:49:33.992637 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
440 13:49:34.005584 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
441 13:49:34.008771 Processing 180 relocs. Offset value of 0x97c0c000
442 13:49:34.016892 Accumulated console time in romstage 286 ms
443 13:49:34.017327
444 13:49:34.017669
445 13:49:34.027031 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
446 13:49:34.033954 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 13:49:34.036787 CBFS @ c08000 size 3f8000
448 13:49:34.039992 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
449 13:49:34.046787 CBFS: Locating 'fallback/ramstage'
450 13:49:34.050022 CBFS: Found @ offset 43380 size 1b9e8
451 13:49:34.056674 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
452 13:49:34.088942 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
453 13:49:34.091948 Processing 3976 relocs. Offset value of 0x98db0000
454 13:49:34.098666 Accumulated console time in postcar 52 ms
455 13:49:34.098915
456 13:49:34.099108
457 13:49:34.108719 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
458 13:49:34.115007 FMAP: area RO_VPD found @ c00000 (16384 bytes)
459 13:49:34.118767 WARNING: RO_VPD is uninitialized or empty.
460 13:49:34.122110 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 13:49:34.128234 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 13:49:34.128558 Normal boot.
463 13:49:34.135259 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
464 13:49:34.138612 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 13:49:34.141927 CBFS @ c08000 size 3f8000
466 13:49:34.148105 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 13:49:34.151609 CBFS: Locating 'cpu_microcode_blob.bin'
468 13:49:34.155065 CBFS: Found @ offset 14700 size 2ec00
469 13:49:34.158288 microcode: sig=0x806ec pf=0x4 revision=0xc9
470 13:49:34.161522 Skip microcode update
471 13:49:34.168117 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 13:49:34.168466 CBFS @ c08000 size 3f8000
473 13:49:34.174774 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 13:49:34.178142 CBFS: Locating 'fsps.bin'
475 13:49:34.182005 CBFS: Found @ offset d1fc0 size 35000
476 13:49:34.206797 Detected 4 core, 8 thread CPU.
477 13:49:34.210346 Setting up SMI for CPU
478 13:49:34.213454 IED base = 0x9ac00000
479 13:49:34.213786 IED size = 0x00400000
480 13:49:34.216411 Will perform SMM setup.
481 13:49:34.223253 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
482 13:49:34.230231 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
483 13:49:34.233277 Processing 16 relocs. Offset value of 0x00030000
484 13:49:34.236939 Attempting to start 7 APs
485 13:49:34.240065 Waiting for 10ms after sending INIT.
486 13:49:34.256467 Waiting for 1st SIPI to complete...done.
487 13:49:34.256593 AP: slot 1 apic_id 3.
488 13:49:34.259710 AP: slot 4 apic_id 2.
489 13:49:34.263266 Waiting for 2nd SIPI to complete...done.
490 13:49:34.266586 AP: slot 2 apic_id 1.
491 13:49:34.269477 AP: slot 5 apic_id 7.
492 13:49:34.269571 AP: slot 3 apic_id 6.
493 13:49:34.273288 AP: slot 7 apic_id 4.
494 13:49:34.275946 AP: slot 6 apic_id 5.
495 13:49:34.283015 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
496 13:49:34.289343 Processing 13 relocs. Offset value of 0x00038000
497 13:49:34.293133 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 13:49:34.299355 Installing SMM handler to 0x9a000000
499 13:49:34.305955 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 13:49:34.309739 Processing 658 relocs. Offset value of 0x9a010000
501 13:49:34.319483 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
502 13:49:34.322520 Processing 13 relocs. Offset value of 0x9a008000
503 13:49:34.329375 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
504 13:49:34.336195 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
505 13:49:34.342795 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
506 13:49:34.346305 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
507 13:49:34.352825 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
508 13:49:34.359598 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
509 13:49:34.363063 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
510 13:49:34.369677 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
511 13:49:34.373166 Clearing SMI status registers
512 13:49:34.376236 SMI_STS: PM1
513 13:49:34.376668 PM1_STS: PWRBTN
514 13:49:34.379742 TCO_STS: SECOND_TO
515 13:49:34.382554 New SMBASE 0x9a000000
516 13:49:34.386259 In relocation handler: CPU 0
517 13:49:34.389495 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
518 13:49:34.392745 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 13:49:34.396157 Relocation complete.
520 13:49:34.399365 New SMBASE 0x99fff800
521 13:49:34.399808 In relocation handler: CPU 2
522 13:49:34.406223 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
523 13:49:34.409543 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 13:49:34.412940 Relocation complete.
525 13:49:34.416271 New SMBASE 0x99fff000
526 13:49:34.416700 In relocation handler: CPU 4
527 13:49:34.422893 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
528 13:49:34.426148 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 13:49:34.429627 Relocation complete.
530 13:49:34.429855 New SMBASE 0x99fffc00
531 13:49:34.432688 In relocation handler: CPU 1
532 13:49:34.439702 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
533 13:49:34.442603 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 13:49:34.446058 Relocation complete.
535 13:49:34.446400 New SMBASE 0x99ffec00
536 13:49:34.449138 In relocation handler: CPU 5
537 13:49:34.452669 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
538 13:49:34.459399 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 13:49:34.462781 Relocation complete.
540 13:49:34.463216 New SMBASE 0x99fff400
541 13:49:34.466047 In relocation handler: CPU 3
542 13:49:34.469604 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
543 13:49:34.475621 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 13:49:34.476057 Relocation complete.
545 13:49:34.479249 New SMBASE 0x99ffe800
546 13:49:34.482857 In relocation handler: CPU 6
547 13:49:34.485960 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
548 13:49:34.492180 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 13:49:34.492355 Relocation complete.
550 13:49:34.495634 New SMBASE 0x99ffe400
551 13:49:34.499080 In relocation handler: CPU 7
552 13:49:34.502364 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
553 13:49:34.509159 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 13:49:34.509291 Relocation complete.
555 13:49:34.512843 Initializing CPU #0
556 13:49:34.515717 CPU: vendor Intel device 806ec
557 13:49:34.519076 CPU: family 06, model 8e, stepping 0c
558 13:49:34.521921 Clearing out pending MCEs
559 13:49:34.525719 Setting up local APIC...
560 13:49:34.525804 apic_id: 0x00 done.
561 13:49:34.528767 Turbo is available but hidden
562 13:49:34.532285 Turbo is available and visible
563 13:49:34.535471 VMX status: enabled
564 13:49:34.538528 IA32_FEATURE_CONTROL status: locked
565 13:49:34.542327 Skip microcode update
566 13:49:34.542413 CPU #0 initialized
567 13:49:34.545543 Initializing CPU #2
568 13:49:34.545642 Initializing CPU #5
569 13:49:34.548431 Initializing CPU #3
570 13:49:34.552019 CPU: vendor Intel device 806ec
571 13:49:34.555237 CPU: family 06, model 8e, stepping 0c
572 13:49:34.558450 CPU: vendor Intel device 806ec
573 13:49:34.562081 CPU: family 06, model 8e, stepping 0c
574 13:49:34.564834 Clearing out pending MCEs
575 13:49:34.568363 Clearing out pending MCEs
576 13:49:34.571520 Setting up local APIC...
577 13:49:34.571637 Initializing CPU #1
578 13:49:34.575191 Initializing CPU #4
579 13:49:34.578148 CPU: vendor Intel device 806ec
580 13:49:34.581943 CPU: family 06, model 8e, stepping 0c
581 13:49:34.584925 CPU: vendor Intel device 806ec
582 13:49:34.588326 CPU: family 06, model 8e, stepping 0c
583 13:49:34.591685 Clearing out pending MCEs
584 13:49:34.594874 Clearing out pending MCEs
585 13:49:34.595313 Setting up local APIC...
586 13:49:34.598227 Initializing CPU #7
587 13:49:34.601532 Initializing CPU #6
588 13:49:34.601971 Setting up local APIC...
589 13:49:34.604866 CPU: vendor Intel device 806ec
590 13:49:34.611719 CPU: family 06, model 8e, stepping 0c
591 13:49:34.612539 Clearing out pending MCEs
592 13:49:34.614462 apic_id: 0x03 done.
593 13:49:34.618216 Setting up local APIC...
594 13:49:34.621430 Setting up local APIC...
595 13:49:34.621736 VMX status: enabled
596 13:49:34.624749 apic_id: 0x02 done.
597 13:49:34.627948 IA32_FEATURE_CONTROL status: locked
598 13:49:34.630883 VMX status: enabled
599 13:49:34.631068 Skip microcode update
600 13:49:34.634493 IA32_FEATURE_CONTROL status: locked
601 13:49:34.637705 CPU #1 initialized
602 13:49:34.641252 Skip microcode update
603 13:49:34.641390 apic_id: 0x06 done.
604 13:49:34.644190 CPU: vendor Intel device 806ec
605 13:49:34.647900 CPU: family 06, model 8e, stepping 0c
606 13:49:34.651139 CPU: vendor Intel device 806ec
607 13:49:34.654177 CPU: family 06, model 8e, stepping 0c
608 13:49:34.657373 Clearing out pending MCEs
609 13:49:34.660661 Clearing out pending MCEs
610 13:49:34.664449 CPU #4 initialized
611 13:49:34.664533 Setting up local APIC...
612 13:49:34.667239 apic_id: 0x07 done.
613 13:49:34.670857 VMX status: enabled
614 13:49:34.670941 VMX status: enabled
615 13:49:34.673769 apic_id: 0x01 done.
616 13:49:34.677328 IA32_FEATURE_CONTROL status: locked
617 13:49:34.680448 IA32_FEATURE_CONTROL status: locked
618 13:49:34.684158 Skip microcode update
619 13:49:34.684241 Skip microcode update
620 13:49:34.687194 CPU #5 initialized
621 13:49:34.690601 CPU #3 initialized
622 13:49:34.690683 apic_id: 0x04 done.
623 13:49:34.693364 Setting up local APIC...
624 13:49:34.697162 VMX status: enabled
625 13:49:34.697245 VMX status: enabled
626 13:49:34.700126 apic_id: 0x05 done.
627 13:49:34.703498 IA32_FEATURE_CONTROL status: locked
628 13:49:34.706799 VMX status: enabled
629 13:49:34.706882 Skip microcode update
630 13:49:34.710112 IA32_FEATURE_CONTROL status: locked
631 13:49:34.713337 CPU #7 initialized
632 13:49:34.716733 Skip microcode update
633 13:49:34.720228 IA32_FEATURE_CONTROL status: locked
634 13:49:34.720332 CPU #6 initialized
635 13:49:34.723440 Skip microcode update
636 13:49:34.726829 CPU #2 initialized
637 13:49:34.730129 bsp_do_flight_plan done after 464 msecs.
638 13:49:34.733497 CPU: frequency set to 4200 MHz
639 13:49:34.733620 Enabling SMIs.
640 13:49:34.736904 Locking SMM.
641 13:49:34.750765 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
642 13:49:34.753638 CBFS @ c08000 size 3f8000
643 13:49:34.760304 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
644 13:49:34.760396 CBFS: Locating 'vbt.bin'
645 13:49:34.763837 CBFS: Found @ offset 5f5c0 size 499
646 13:49:34.770789 Found a VBT of 4608 bytes after decompression
647 13:49:34.956135 Display FSP Version Info HOB
648 13:49:34.959621 Reference Code - CPU = 9.0.1e.30
649 13:49:34.962506 uCode Version = 0.0.0.ca
650 13:49:34.966198 TXT ACM version = ff.ff.ff.ffff
651 13:49:34.969112 Display FSP Version Info HOB
652 13:49:34.972877 Reference Code - ME = 9.0.1e.30
653 13:49:34.975912 MEBx version = 0.0.0.0
654 13:49:34.979279 ME Firmware Version = Consumer SKU
655 13:49:34.982739 Display FSP Version Info HOB
656 13:49:34.985642 Reference Code - CML PCH = 9.0.1e.30
657 13:49:34.989097 PCH-CRID Status = Disabled
658 13:49:34.992729 PCH-CRID Original Value = ff.ff.ff.ffff
659 13:49:34.995565 PCH-CRID New Value = ff.ff.ff.ffff
660 13:49:34.998693 OPROM - RST - RAID = ff.ff.ff.ffff
661 13:49:35.002511 ChipsetInit Base Version = ff.ff.ff.ffff
662 13:49:35.005316 ChipsetInit Oem Version = ff.ff.ff.ffff
663 13:49:35.009137 Display FSP Version Info HOB
664 13:49:35.015357 Reference Code - SA - System Agent = 9.0.1e.30
665 13:49:35.018555 Reference Code - MRC = 0.7.1.6c
666 13:49:35.022002 SA - PCIe Version = 9.0.1e.30
667 13:49:35.022182 SA-CRID Status = Disabled
668 13:49:35.025626 SA-CRID Original Value = 0.0.0.c
669 13:49:35.028417 SA-CRID New Value = 0.0.0.c
670 13:49:35.032050 OPROM - VBIOS = ff.ff.ff.ffff
671 13:49:35.035493 RTC Init
672 13:49:35.038468 Set power on after power failure.
673 13:49:35.038650 Disabling Deep S3
674 13:49:35.042126 Disabling Deep S3
675 13:49:35.042257 Disabling Deep S4
676 13:49:35.045236 Disabling Deep S4
677 13:49:35.048650 Disabling Deep S5
678 13:49:35.048781 Disabling Deep S5
679 13:49:35.055003 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
680 13:49:35.055188 Enumerating buses...
681 13:49:35.061741 Show all devs... Before device enumeration.
682 13:49:35.064861 Root Device: enabled 1
683 13:49:35.064992 CPU_CLUSTER: 0: enabled 1
684 13:49:35.068610 DOMAIN: 0000: enabled 1
685 13:49:35.071705 APIC: 00: enabled 1
686 13:49:35.071887 PCI: 00:00.0: enabled 1
687 13:49:35.075295 PCI: 00:02.0: enabled 1
688 13:49:35.078280 PCI: 00:04.0: enabled 0
689 13:49:35.081725 PCI: 00:05.0: enabled 0
690 13:49:35.082297 PCI: 00:12.0: enabled 1
691 13:49:35.085449 PCI: 00:12.5: enabled 0
692 13:49:35.088999 PCI: 00:12.6: enabled 0
693 13:49:35.092042 PCI: 00:14.0: enabled 1
694 13:49:35.092614 PCI: 00:14.1: enabled 0
695 13:49:35.094944 PCI: 00:14.3: enabled 1
696 13:49:35.098390 PCI: 00:14.5: enabled 0
697 13:49:35.098945 PCI: 00:15.0: enabled 1
698 13:49:35.101389 PCI: 00:15.1: enabled 1
699 13:49:35.105062 PCI: 00:15.2: enabled 0
700 13:49:35.108053 PCI: 00:15.3: enabled 0
701 13:49:35.108362 PCI: 00:16.0: enabled 1
702 13:49:35.111859 PCI: 00:16.1: enabled 0
703 13:49:35.114690 PCI: 00:16.2: enabled 0
704 13:49:35.118391 PCI: 00:16.3: enabled 0
705 13:49:35.118544 PCI: 00:16.4: enabled 0
706 13:49:35.121477 PCI: 00:16.5: enabled 0
707 13:49:35.124847 PCI: 00:17.0: enabled 1
708 13:49:35.128081 PCI: 00:19.0: enabled 1
709 13:49:35.128196 PCI: 00:19.1: enabled 0
710 13:49:35.131294 PCI: 00:19.2: enabled 0
711 13:49:35.135018 PCI: 00:1a.0: enabled 0
712 13:49:35.137850 PCI: 00:1c.0: enabled 0
713 13:49:35.138401 PCI: 00:1c.1: enabled 0
714 13:49:35.141561 PCI: 00:1c.2: enabled 0
715 13:49:35.144885 PCI: 00:1c.3: enabled 0
716 13:49:35.145291 PCI: 00:1c.4: enabled 0
717 13:49:35.147733 PCI: 00:1c.5: enabled 0
718 13:49:35.151795 PCI: 00:1c.6: enabled 0
719 13:49:35.154499 PCI: 00:1c.7: enabled 0
720 13:49:35.154725 PCI: 00:1d.0: enabled 1
721 13:49:35.157967 PCI: 00:1d.1: enabled 0
722 13:49:35.161289 PCI: 00:1d.2: enabled 0
723 13:49:35.164839 PCI: 00:1d.3: enabled 0
724 13:49:35.164922 PCI: 00:1d.4: enabled 0
725 13:49:35.167697 PCI: 00:1d.5: enabled 1
726 13:49:35.171167 PCI: 00:1e.0: enabled 1
727 13:49:35.171250 PCI: 00:1e.1: enabled 0
728 13:49:35.174319 PCI: 00:1e.2: enabled 1
729 13:49:35.178052 PCI: 00:1e.3: enabled 1
730 13:49:35.181147 PCI: 00:1f.0: enabled 1
731 13:49:35.181229 PCI: 00:1f.1: enabled 1
732 13:49:35.184140 PCI: 00:1f.2: enabled 1
733 13:49:35.188082 PCI: 00:1f.3: enabled 1
734 13:49:35.191202 PCI: 00:1f.4: enabled 1
735 13:49:35.191649 PCI: 00:1f.5: enabled 1
736 13:49:35.194775 PCI: 00:1f.6: enabled 0
737 13:49:35.197668 USB0 port 0: enabled 1
738 13:49:35.198095 I2C: 00:15: enabled 1
739 13:49:35.200857 I2C: 00:5d: enabled 1
740 13:49:35.204274 GENERIC: 0.0: enabled 1
741 13:49:35.208028 I2C: 00:1a: enabled 1
742 13:49:35.208450 I2C: 00:38: enabled 1
743 13:49:35.211128 I2C: 00:39: enabled 1
744 13:49:35.214535 I2C: 00:3a: enabled 1
745 13:49:35.214958 I2C: 00:3b: enabled 1
746 13:49:35.217719 PCI: 00:00.0: enabled 1
747 13:49:35.220578 SPI: 00: enabled 1
748 13:49:35.221005 SPI: 01: enabled 1
749 13:49:35.224245 PNP: 0c09.0: enabled 1
750 13:49:35.227208 USB2 port 0: enabled 1
751 13:49:35.227530 USB2 port 1: enabled 1
752 13:49:35.230934 USB2 port 2: enabled 0
753 13:49:35.233873 USB2 port 3: enabled 0
754 13:49:35.234101 USB2 port 5: enabled 0
755 13:49:35.237217 USB2 port 6: enabled 1
756 13:49:35.241073 USB2 port 9: enabled 1
757 13:49:35.244081 USB3 port 0: enabled 1
758 13:49:35.244312 USB3 port 1: enabled 1
759 13:49:35.247444 USB3 port 2: enabled 1
760 13:49:35.250285 USB3 port 3: enabled 1
761 13:49:35.250513 USB3 port 4: enabled 0
762 13:49:35.253553 APIC: 03: enabled 1
763 13:49:35.256801 APIC: 01: enabled 1
764 13:49:35.257028 APIC: 06: enabled 1
765 13:49:35.260008 APIC: 02: enabled 1
766 13:49:35.263575 APIC: 07: enabled 1
767 13:49:35.263657 APIC: 05: enabled 1
768 13:49:35.266969 APIC: 04: enabled 1
769 13:49:35.267050 Compare with tree...
770 13:49:35.270346 Root Device: enabled 1
771 13:49:35.273449 CPU_CLUSTER: 0: enabled 1
772 13:49:35.276615 APIC: 00: enabled 1
773 13:49:35.276698 APIC: 03: enabled 1
774 13:49:35.280259 APIC: 01: enabled 1
775 13:49:35.283151 APIC: 06: enabled 1
776 13:49:35.283233 APIC: 02: enabled 1
777 13:49:35.287128 APIC: 07: enabled 1
778 13:49:35.289902 APIC: 05: enabled 1
779 13:49:35.289984 APIC: 04: enabled 1
780 13:49:35.293389 DOMAIN: 0000: enabled 1
781 13:49:35.296668 PCI: 00:00.0: enabled 1
782 13:49:35.300298 PCI: 00:02.0: enabled 1
783 13:49:35.303687 PCI: 00:04.0: enabled 0
784 13:49:35.304234 PCI: 00:05.0: enabled 0
785 13:49:35.306591 PCI: 00:12.0: enabled 1
786 13:49:35.310084 PCI: 00:12.5: enabled 0
787 13:49:35.313299 PCI: 00:12.6: enabled 0
788 13:49:35.313721 PCI: 00:14.0: enabled 1
789 13:49:35.316473 USB0 port 0: enabled 1
790 13:49:35.319959 USB2 port 0: enabled 1
791 13:49:35.322975 USB2 port 1: enabled 1
792 13:49:35.326659 USB2 port 2: enabled 0
793 13:49:35.329786 USB2 port 3: enabled 0
794 13:49:35.330212 USB2 port 5: enabled 0
795 13:49:35.333111 USB2 port 6: enabled 1
796 13:49:35.336696 USB2 port 9: enabled 1
797 13:49:35.339572 USB3 port 0: enabled 1
798 13:49:35.342714 USB3 port 1: enabled 1
799 13:49:35.346161 USB3 port 2: enabled 1
800 13:49:35.346428 USB3 port 3: enabled 1
801 13:49:35.349177 USB3 port 4: enabled 0
802 13:49:35.352494 PCI: 00:14.1: enabled 0
803 13:49:35.355813 PCI: 00:14.3: enabled 1
804 13:49:35.359130 PCI: 00:14.5: enabled 0
805 13:49:35.359313 PCI: 00:15.0: enabled 1
806 13:49:35.362546 I2C: 00:15: enabled 1
807 13:49:35.366037 PCI: 00:15.1: enabled 1
808 13:49:35.369377 I2C: 00:5d: enabled 1
809 13:49:35.372737 GENERIC: 0.0: enabled 1
810 13:49:35.372920 PCI: 00:15.2: enabled 0
811 13:49:35.375741 PCI: 00:15.3: enabled 0
812 13:49:35.378928 PCI: 00:16.0: enabled 1
813 13:49:35.382188 PCI: 00:16.1: enabled 0
814 13:49:35.385480 PCI: 00:16.2: enabled 0
815 13:49:35.385663 PCI: 00:16.3: enabled 0
816 13:49:35.389227 PCI: 00:16.4: enabled 0
817 13:49:35.392245 PCI: 00:16.5: enabled 0
818 13:49:35.396054 PCI: 00:17.0: enabled 1
819 13:49:35.396237 PCI: 00:19.0: enabled 1
820 13:49:35.399034 I2C: 00:1a: enabled 1
821 13:49:35.402104 I2C: 00:38: enabled 1
822 13:49:35.406008 I2C: 00:39: enabled 1
823 13:49:35.409180 I2C: 00:3a: enabled 1
824 13:49:35.409363 I2C: 00:3b: enabled 1
825 13:49:35.412600 PCI: 00:19.1: enabled 0
826 13:49:35.415176 PCI: 00:19.2: enabled 0
827 13:49:35.418597 PCI: 00:1a.0: enabled 0
828 13:49:35.422078 PCI: 00:1c.0: enabled 0
829 13:49:35.422253 PCI: 00:1c.1: enabled 0
830 13:49:35.425598 PCI: 00:1c.2: enabled 0
831 13:49:35.428694 PCI: 00:1c.3: enabled 0
832 13:49:35.431639 PCI: 00:1c.4: enabled 0
833 13:49:35.431825 PCI: 00:1c.5: enabled 0
834 13:49:35.435403 PCI: 00:1c.6: enabled 0
835 13:49:35.438577 PCI: 00:1c.7: enabled 0
836 13:49:35.441649 PCI: 00:1d.0: enabled 1
837 13:49:35.445396 PCI: 00:1d.1: enabled 0
838 13:49:35.445579 PCI: 00:1d.2: enabled 0
839 13:49:35.448434 PCI: 00:1d.3: enabled 0
840 13:49:35.451904 PCI: 00:1d.4: enabled 0
841 13:49:35.455123 PCI: 00:1d.5: enabled 1
842 13:49:35.458042 PCI: 00:00.0: enabled 1
843 13:49:35.458283 PCI: 00:1e.0: enabled 1
844 13:49:35.461533 PCI: 00:1e.1: enabled 0
845 13:49:35.465097 PCI: 00:1e.2: enabled 1
846 13:49:35.468490 SPI: 00: enabled 1
847 13:49:35.468674 PCI: 00:1e.3: enabled 1
848 13:49:35.471502 SPI: 01: enabled 1
849 13:49:35.474819 PCI: 00:1f.0: enabled 1
850 13:49:35.478312 PNP: 0c09.0: enabled 1
851 13:49:35.481723 PCI: 00:1f.1: enabled 1
852 13:49:35.481906 PCI: 00:1f.2: enabled 1
853 13:49:35.484645 PCI: 00:1f.3: enabled 1
854 13:49:35.488322 PCI: 00:1f.4: enabled 1
855 13:49:35.492022 PCI: 00:1f.5: enabled 1
856 13:49:35.495096 PCI: 00:1f.6: enabled 0
857 13:49:35.495287 Root Device scanning...
858 13:49:35.497923 scan_static_bus for Root Device
859 13:49:35.501964 CPU_CLUSTER: 0 enabled
860 13:49:35.504937 DOMAIN: 0000 enabled
861 13:49:35.505127 DOMAIN: 0000 scanning...
862 13:49:35.508421 PCI: pci_scan_bus for bus 00
863 13:49:35.511806 PCI: 00:00.0 [8086/0000] ops
864 13:49:35.514563 PCI: 00:00.0 [8086/9b61] enabled
865 13:49:35.518050 PCI: 00:02.0 [8086/0000] bus ops
866 13:49:35.521508 PCI: 00:02.0 [8086/9b41] enabled
867 13:49:35.524622 PCI: 00:04.0 [8086/1903] disabled
868 13:49:35.528112 PCI: 00:08.0 [8086/1911] enabled
869 13:49:35.531529 PCI: 00:12.0 [8086/02f9] enabled
870 13:49:35.534637 PCI: 00:14.0 [8086/0000] bus ops
871 13:49:35.537797 PCI: 00:14.0 [8086/02ed] enabled
872 13:49:35.541777 PCI: 00:14.2 [8086/02ef] enabled
873 13:49:35.544709 PCI: 00:14.3 [8086/02f0] enabled
874 13:49:35.547948 PCI: 00:15.0 [8086/0000] bus ops
875 13:49:35.551417 PCI: 00:15.0 [8086/02e8] enabled
876 13:49:35.554400 PCI: 00:15.1 [8086/0000] bus ops
877 13:49:35.557979 PCI: 00:15.1 [8086/02e9] enabled
878 13:49:35.561243 PCI: 00:16.0 [8086/0000] ops
879 13:49:35.564974 PCI: 00:16.0 [8086/02e0] enabled
880 13:49:35.567640 PCI: 00:17.0 [8086/0000] ops
881 13:49:35.571151 PCI: 00:17.0 [8086/02d3] enabled
882 13:49:35.574740 PCI: 00:19.0 [8086/0000] bus ops
883 13:49:35.578097 PCI: 00:19.0 [8086/02c5] enabled
884 13:49:35.580949 PCI: 00:1d.0 [8086/0000] bus ops
885 13:49:35.584408 PCI: 00:1d.0 [8086/02b0] enabled
886 13:49:35.591134 PCI: Static device PCI: 00:1d.5 not found, disabling it.
887 13:49:35.594609 PCI: 00:1e.0 [8086/0000] ops
888 13:49:35.598249 PCI: 00:1e.0 [8086/02a8] enabled
889 13:49:35.601203 PCI: 00:1e.2 [8086/0000] bus ops
890 13:49:35.604130 PCI: 00:1e.2 [8086/02aa] enabled
891 13:49:35.607544 PCI: 00:1e.3 [8086/0000] bus ops
892 13:49:35.611166 PCI: 00:1e.3 [8086/02ab] enabled
893 13:49:35.614270 PCI: 00:1f.0 [8086/0000] bus ops
894 13:49:35.617977 PCI: 00:1f.0 [8086/0284] enabled
895 13:49:35.621060 PCI: Static device PCI: 00:1f.1 not found, disabling it.
896 13:49:35.627656 PCI: Static device PCI: 00:1f.2 not found, disabling it.
897 13:49:35.631175 PCI: 00:1f.3 [8086/0000] bus ops
898 13:49:35.634364 PCI: 00:1f.3 [8086/02c8] enabled
899 13:49:35.637403 PCI: 00:1f.4 [8086/0000] bus ops
900 13:49:35.641094 PCI: 00:1f.4 [8086/02a3] enabled
901 13:49:35.644316 PCI: 00:1f.5 [8086/0000] bus ops
902 13:49:35.647535 PCI: 00:1f.5 [8086/02a4] enabled
903 13:49:35.651074 PCI: Leftover static devices:
904 13:49:35.651229 PCI: 00:05.0
905 13:49:35.654180 PCI: 00:12.5
906 13:49:35.654335 PCI: 00:12.6
907 13:49:35.657393 PCI: 00:14.1
908 13:49:35.657548 PCI: 00:14.5
909 13:49:35.660820 PCI: 00:15.2
910 13:49:35.660975 PCI: 00:15.3
911 13:49:35.661098 PCI: 00:16.1
912 13:49:35.663879 PCI: 00:16.2
913 13:49:35.664053 PCI: 00:16.3
914 13:49:35.667684 PCI: 00:16.4
915 13:49:35.667839 PCI: 00:16.5
916 13:49:35.667960 PCI: 00:19.1
917 13:49:35.670537 PCI: 00:19.2
918 13:49:35.670689 PCI: 00:1a.0
919 13:49:35.674135 PCI: 00:1c.0
920 13:49:35.674288 PCI: 00:1c.1
921 13:49:35.674409 PCI: 00:1c.2
922 13:49:35.677555 PCI: 00:1c.3
923 13:49:35.677707 PCI: 00:1c.4
924 13:49:35.680399 PCI: 00:1c.5
925 13:49:35.680551 PCI: 00:1c.6
926 13:49:35.683878 PCI: 00:1c.7
927 13:49:35.684030 PCI: 00:1d.1
928 13:49:35.684149 PCI: 00:1d.2
929 13:49:35.687259 PCI: 00:1d.3
930 13:49:35.687458 PCI: 00:1d.4
931 13:49:35.690646 PCI: 00:1d.5
932 13:49:35.691070 PCI: 00:1e.1
933 13:49:35.691470 PCI: 00:1f.1
934 13:49:35.693927 PCI: 00:1f.2
935 13:49:35.694349 PCI: 00:1f.6
936 13:49:35.697415 PCI: Check your devicetree.cb.
937 13:49:35.700702 PCI: 00:02.0 scanning...
938 13:49:35.703912 scan_generic_bus for PCI: 00:02.0
939 13:49:35.707585 scan_generic_bus for PCI: 00:02.0 done
940 13:49:35.713743 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
941 13:49:35.717114 PCI: 00:14.0 scanning...
942 13:49:35.720505 scan_static_bus for PCI: 00:14.0
943 13:49:35.720731 USB0 port 0 enabled
944 13:49:35.723513 USB0 port 0 scanning...
945 13:49:35.727048 scan_static_bus for USB0 port 0
946 13:49:35.730714 USB2 port 0 enabled
947 13:49:35.730866 USB2 port 1 enabled
948 13:49:35.733778 USB2 port 2 disabled
949 13:49:35.737371 USB2 port 3 disabled
950 13:49:35.737524 USB2 port 5 disabled
951 13:49:35.740153 USB2 port 6 enabled
952 13:49:35.743974 USB2 port 9 enabled
953 13:49:35.744126 USB3 port 0 enabled
954 13:49:35.746964 USB3 port 1 enabled
955 13:49:35.747116 USB3 port 2 enabled
956 13:49:35.750384 USB3 port 3 enabled
957 13:49:35.753806 USB3 port 4 disabled
958 13:49:35.753958 USB2 port 0 scanning...
959 13:49:35.756843 scan_static_bus for USB2 port 0
960 13:49:35.763477 scan_static_bus for USB2 port 0 done
961 13:49:35.767143 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
962 13:49:35.770271 USB2 port 1 scanning...
963 13:49:35.773439 scan_static_bus for USB2 port 1
964 13:49:35.776881 scan_static_bus for USB2 port 1 done
965 13:49:35.783832 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
966 13:49:35.784261 USB2 port 6 scanning...
967 13:49:35.786873 scan_static_bus for USB2 port 6
968 13:49:35.793479 scan_static_bus for USB2 port 6 done
969 13:49:35.796956 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
970 13:49:35.800190 USB2 port 9 scanning...
971 13:49:35.803594 scan_static_bus for USB2 port 9
972 13:49:35.806896 scan_static_bus for USB2 port 9 done
973 13:49:35.813301 scan_bus: scanning of bus USB2 port 9 took 9694 usecs
974 13:49:35.813485 USB3 port 0 scanning...
975 13:49:35.816820 scan_static_bus for USB3 port 0
976 13:49:35.823914 scan_static_bus for USB3 port 0 done
977 13:49:35.826683 scan_bus: scanning of bus USB3 port 0 took 9752 usecs
978 13:49:35.830224 USB3 port 1 scanning...
979 13:49:35.833814 scan_static_bus for USB3 port 1
980 13:49:35.836966 scan_static_bus for USB3 port 1 done
981 13:49:35.843520 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
982 13:49:35.843703 USB3 port 2 scanning...
983 13:49:35.846886 scan_static_bus for USB3 port 2
984 13:49:35.853660 scan_static_bus for USB3 port 2 done
985 13:49:35.857024 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
986 13:49:35.860214 USB3 port 3 scanning...
987 13:49:35.863314 scan_static_bus for USB3 port 3
988 13:49:35.866956 scan_static_bus for USB3 port 3 done
989 13:49:35.873762 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
990 13:49:35.876709 scan_static_bus for USB0 port 0 done
991 13:49:35.880077 scan_bus: scanning of bus USB0 port 0 took 155401 usecs
992 13:49:35.886511 scan_static_bus for PCI: 00:14.0 done
993 13:49:35.890198 scan_bus: scanning of bus PCI: 00:14.0 took 173028 usecs
994 13:49:35.893590 PCI: 00:15.0 scanning...
995 13:49:35.896838 scan_generic_bus for PCI: 00:15.0
996 13:49:35.900290 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
997 13:49:35.906587 scan_generic_bus for PCI: 00:15.0 done
998 13:49:35.910004 scan_bus: scanning of bus PCI: 00:15.0 took 14286 usecs
999 13:49:35.913431 PCI: 00:15.1 scanning...
1000 13:49:35.916584 scan_generic_bus for PCI: 00:15.1
1001 13:49:35.919845 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1002 13:49:35.926531 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1003 13:49:35.929890 scan_generic_bus for PCI: 00:15.1 done
1004 13:49:35.936573 scan_bus: scanning of bus PCI: 00:15.1 took 18610 usecs
1005 13:49:35.936706 PCI: 00:19.0 scanning...
1006 13:49:35.939414 scan_generic_bus for PCI: 00:19.0
1007 13:49:35.946193 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1008 13:49:35.949875 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1009 13:49:35.952751 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1010 13:49:35.956353 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1011 13:49:35.963027 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1012 13:49:35.966222 scan_generic_bus for PCI: 00:19.0 done
1013 13:49:35.972799 scan_bus: scanning of bus PCI: 00:19.0 took 30731 usecs
1014 13:49:35.972995 PCI: 00:1d.0 scanning...
1015 13:49:35.976010 do_pci_scan_bridge for PCI: 00:1d.0
1016 13:49:35.978995 PCI: pci_scan_bus for bus 01
1017 13:49:35.982743 PCI: 01:00.0 [1c5c/1327] enabled
1018 13:49:35.989497 Enabling Common Clock Configuration
1019 13:49:35.992560 L1 Sub-State supported from root port 29
1020 13:49:35.995667 L1 Sub-State Support = 0xf
1021 13:49:35.999098 CommonModeRestoreTime = 0x28
1022 13:49:36.002357 Power On Value = 0x16, Power On Scale = 0x0
1023 13:49:36.002785 ASPM: Enabled L1
1024 13:49:36.008966 scan_bus: scanning of bus PCI: 00:1d.0 took 32776 usecs
1025 13:49:36.012196 PCI: 00:1e.2 scanning...
1026 13:49:36.015438 scan_generic_bus for PCI: 00:1e.2
1027 13:49:36.018798 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1028 13:49:36.022109 scan_generic_bus for PCI: 00:1e.2 done
1029 13:49:36.028421 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1030 13:49:36.031778 PCI: 00:1e.3 scanning...
1031 13:49:36.035361 scan_generic_bus for PCI: 00:1e.3
1032 13:49:36.038648 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1033 13:49:36.042248 scan_generic_bus for PCI: 00:1e.3 done
1034 13:49:36.048661 scan_bus: scanning of bus PCI: 00:1e.3 took 14004 usecs
1035 13:49:36.051896 PCI: 00:1f.0 scanning...
1036 13:49:36.055218 scan_static_bus for PCI: 00:1f.0
1037 13:49:36.055402 PNP: 0c09.0 enabled
1038 13:49:36.058812 scan_static_bus for PCI: 00:1f.0 done
1039 13:49:36.064809 scan_bus: scanning of bus PCI: 00:1f.0 took 12049 usecs
1040 13:49:36.068194 PCI: 00:1f.3 scanning...
1041 13:49:36.074871 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1042 13:49:36.075063 PCI: 00:1f.4 scanning...
1043 13:49:36.081899 scan_generic_bus for PCI: 00:1f.4
1044 13:49:36.084810 scan_generic_bus for PCI: 00:1f.4 done
1045 13:49:36.088556 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1046 13:49:36.091756 PCI: 00:1f.5 scanning...
1047 13:49:36.094595 scan_generic_bus for PCI: 00:1f.5
1048 13:49:36.098238 scan_generic_bus for PCI: 00:1f.5 done
1049 13:49:36.104990 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1050 13:49:36.111616 scan_bus: scanning of bus DOMAIN: 0000 took 604989 usecs
1051 13:49:36.114539 scan_static_bus for Root Device done
1052 13:49:36.121553 scan_bus: scanning of bus Root Device took 624849 usecs
1053 13:49:36.121725 done
1054 13:49:36.124808 Chrome EC: UHEPI supported
1055 13:49:36.131844 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1056 13:49:36.134940 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1057 13:49:36.141008 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1058 13:49:36.148825 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1059 13:49:36.151872 SPI flash protection: WPSW=0 SRP0=1
1060 13:49:36.158767 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1061 13:49:36.161904 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1062 13:49:36.165486 found VGA at PCI: 00:02.0
1063 13:49:36.168527 Setting up VGA for PCI: 00:02.0
1064 13:49:36.175092 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1065 13:49:36.178741 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1066 13:49:36.181584 Allocating resources...
1067 13:49:36.185424 Reading resources...
1068 13:49:36.188404 Root Device read_resources bus 0 link: 0
1069 13:49:36.192098 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1070 13:49:36.198645 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1071 13:49:36.201811 DOMAIN: 0000 read_resources bus 0 link: 0
1072 13:49:36.208947 PCI: 00:14.0 read_resources bus 0 link: 0
1073 13:49:36.211964 USB0 port 0 read_resources bus 0 link: 0
1074 13:49:36.219814 USB0 port 0 read_resources bus 0 link: 0 done
1075 13:49:36.223402 PCI: 00:14.0 read_resources bus 0 link: 0 done
1076 13:49:36.230696 PCI: 00:15.0 read_resources bus 1 link: 0
1077 13:49:36.233938 PCI: 00:15.0 read_resources bus 1 link: 0 done
1078 13:49:36.240904 PCI: 00:15.1 read_resources bus 2 link: 0
1079 13:49:36.243692 PCI: 00:15.1 read_resources bus 2 link: 0 done
1080 13:49:36.251493 PCI: 00:19.0 read_resources bus 3 link: 0
1081 13:49:36.258063 PCI: 00:19.0 read_resources bus 3 link: 0 done
1082 13:49:36.261469 PCI: 00:1d.0 read_resources bus 1 link: 0
1083 13:49:36.268126 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1084 13:49:36.271553 PCI: 00:1e.2 read_resources bus 4 link: 0
1085 13:49:36.278537 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1086 13:49:36.282024 PCI: 00:1e.3 read_resources bus 5 link: 0
1087 13:49:36.287731 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1088 13:49:36.291499 PCI: 00:1f.0 read_resources bus 0 link: 0
1089 13:49:36.297623 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1090 13:49:36.304200 DOMAIN: 0000 read_resources bus 0 link: 0 done
1091 13:49:36.307986 Root Device read_resources bus 0 link: 0 done
1092 13:49:36.311416 Done reading resources.
1093 13:49:36.314164 Show resources in subtree (Root Device)...After reading.
1094 13:49:36.320889 Root Device child on link 0 CPU_CLUSTER: 0
1095 13:49:36.324560 CPU_CLUSTER: 0 child on link 0 APIC: 00
1096 13:49:36.324644 APIC: 00
1097 13:49:36.328032 APIC: 03
1098 13:49:36.328115 APIC: 01
1099 13:49:36.331243 APIC: 06
1100 13:49:36.331401 APIC: 02
1101 13:49:36.331472 APIC: 07
1102 13:49:36.334211 APIC: 05
1103 13:49:36.334293 APIC: 04
1104 13:49:36.337432 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1105 13:49:36.390955 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1106 13:49:36.391313 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1107 13:49:36.391430 PCI: 00:00.0
1108 13:49:36.392634 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1109 13:49:36.392989 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1110 13:49:36.393818 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1111 13:49:36.419021 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1112 13:49:36.419416 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1113 13:49:36.419497 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1114 13:49:36.426282 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1115 13:49:36.435984 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1116 13:49:36.442587 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1117 13:49:36.452871 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1118 13:49:36.462589 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1119 13:49:36.472120 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1120 13:49:36.482420 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1121 13:49:36.492022 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1122 13:49:36.498881 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1123 13:49:36.508667 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1124 13:49:36.511745 PCI: 00:02.0
1125 13:49:36.522124 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1126 13:49:36.532016 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1127 13:49:36.541756 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1128 13:49:36.541842 PCI: 00:04.0
1129 13:49:36.544849 PCI: 00:08.0
1130 13:49:36.554871 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 13:49:36.554955 PCI: 00:12.0
1132 13:49:36.565056 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1133 13:49:36.568367 PCI: 00:14.0 child on link 0 USB0 port 0
1134 13:49:36.578043 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1135 13:49:36.584836 USB0 port 0 child on link 0 USB2 port 0
1136 13:49:36.584937 USB2 port 0
1137 13:49:36.588051 USB2 port 1
1138 13:49:36.588136 USB2 port 2
1139 13:49:36.591521 USB2 port 3
1140 13:49:36.591604 USB2 port 5
1141 13:49:36.594558 USB2 port 6
1142 13:49:36.594641 USB2 port 9
1143 13:49:36.598403 USB3 port 0
1144 13:49:36.598485 USB3 port 1
1145 13:49:36.601396 USB3 port 2
1146 13:49:36.601479 USB3 port 3
1147 13:49:36.605018 USB3 port 4
1148 13:49:36.608369 PCI: 00:14.2
1149 13:49:36.617711 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1150 13:49:36.627670 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1151 13:49:36.627755 PCI: 00:14.3
1152 13:49:36.637706 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1153 13:49:36.641436 PCI: 00:15.0 child on link 0 I2C: 01:15
1154 13:49:36.651088 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 13:49:36.654136 I2C: 01:15
1156 13:49:36.657949 PCI: 00:15.1 child on link 0 I2C: 02:5d
1157 13:49:36.667352 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 13:49:36.670965 I2C: 02:5d
1159 13:49:36.671048 GENERIC: 0.0
1160 13:49:36.674206 PCI: 00:16.0
1161 13:49:36.684292 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 13:49:36.684377 PCI: 00:17.0
1163 13:49:36.694418 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1164 13:49:36.703773 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1165 13:49:36.710636 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1166 13:49:36.720879 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1167 13:49:36.726829 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1168 13:49:36.737025 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1169 13:49:36.740104 PCI: 00:19.0 child on link 0 I2C: 03:1a
1170 13:49:36.750309 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 13:49:36.753260 I2C: 03:1a
1172 13:49:36.753343 I2C: 03:38
1173 13:49:36.756634 I2C: 03:39
1174 13:49:36.756717 I2C: 03:3a
1175 13:49:36.756782 I2C: 03:3b
1176 13:49:36.763294 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1177 13:49:36.770144 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1178 13:49:36.779829 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1179 13:49:36.789821 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1180 13:49:36.793145 PCI: 01:00.0
1181 13:49:36.803312 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 13:49:36.803435 PCI: 00:1e.0
1183 13:49:36.816725 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1184 13:49:36.826239 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1185 13:49:36.829662 PCI: 00:1e.2 child on link 0 SPI: 00
1186 13:49:36.839581 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 13:49:36.839665 SPI: 00
1188 13:49:36.842647 PCI: 00:1e.3 child on link 0 SPI: 01
1189 13:49:36.852491 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 13:49:36.856201 SPI: 01
1191 13:49:36.859138 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1192 13:49:36.869393 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1193 13:49:36.876022 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1194 13:49:36.879131 PNP: 0c09.0
1195 13:49:36.885848 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1196 13:49:36.889043 PCI: 00:1f.3
1197 13:49:36.899373 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 13:49:36.908905 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1199 13:49:36.912414 PCI: 00:1f.4
1200 13:49:36.918968 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1201 13:49:36.928844 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1202 13:49:36.931845 PCI: 00:1f.5
1203 13:49:36.939053 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1204 13:49:36.945577 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1205 13:49:36.952497 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1206 13:49:36.959142 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1207 13:49:36.962299 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1208 13:49:36.965754 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1209 13:49:36.972725 PCI: 00:17.0 18 * [0x60 - 0x67] io
1210 13:49:36.975314 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1211 13:49:36.981986 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1212 13:49:36.988840 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1213 13:49:36.995289 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1214 13:49:37.005484 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1215 13:49:37.011787 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1216 13:49:37.015280 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1217 13:49:37.021655 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1218 13:49:37.028249 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1219 13:49:37.032478 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1220 13:49:37.038232 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1221 13:49:37.041549 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1222 13:49:37.045294 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1223 13:49:37.051913 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1224 13:49:37.055076 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1225 13:49:37.061787 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1226 13:49:37.064800 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1227 13:49:37.071623 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1228 13:49:37.074732 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1229 13:49:37.081463 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1230 13:49:37.084943 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1231 13:49:37.091478 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1232 13:49:37.094462 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1233 13:49:37.101106 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1234 13:49:37.104802 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1235 13:49:37.111244 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1236 13:49:37.114611 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1237 13:49:37.120935 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1238 13:49:37.124436 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1239 13:49:37.127877 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1240 13:49:37.134166 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1241 13:49:37.144121 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1242 13:49:37.147587 avoid_fixed_resources: DOMAIN: 0000
1243 13:49:37.150940 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1244 13:49:37.157604 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1245 13:49:37.167628 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1246 13:49:37.174348 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1247 13:49:37.180460 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1248 13:49:37.186973 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1249 13:49:37.197303 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1250 13:49:37.203350 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1251 13:49:37.210142 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1252 13:49:37.220554 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1253 13:49:37.227013 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1254 13:49:37.233350 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1255 13:49:37.236811 Setting resources...
1256 13:49:37.243257 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1257 13:49:37.246653 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1258 13:49:37.249919 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1259 13:49:37.253357 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1260 13:49:37.257043 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1261 13:49:37.262867 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1262 13:49:37.269889 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1263 13:49:37.276373 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1264 13:49:37.283268 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1265 13:49:37.289722 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1266 13:49:37.296476 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1267 13:49:37.299649 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1268 13:49:37.302519 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1269 13:49:37.309332 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1270 13:49:37.313022 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1271 13:49:37.319662 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1272 13:49:37.322441 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1273 13:49:37.329379 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1274 13:49:37.332905 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1275 13:49:37.339021 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1276 13:49:37.342325 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1277 13:49:37.349392 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1278 13:49:37.352316 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1279 13:49:37.358946 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1280 13:49:37.362740 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1281 13:49:37.368878 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1282 13:49:37.372027 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1283 13:49:37.378792 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1284 13:49:37.382486 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1285 13:49:37.385759 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1286 13:49:37.392077 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1287 13:49:37.395295 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1288 13:49:37.405676 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1289 13:49:37.411738 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1290 13:49:37.418296 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1291 13:49:37.424953 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1292 13:49:37.431754 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1293 13:49:37.438144 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1294 13:49:37.441433 Root Device assign_resources, bus 0 link: 0
1295 13:49:37.448076 DOMAIN: 0000 assign_resources, bus 0 link: 0
1296 13:49:37.455038 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1297 13:49:37.464802 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1298 13:49:37.472178 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1299 13:49:37.481485 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1300 13:49:37.488070 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1301 13:49:37.497691 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1302 13:49:37.501411 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 13:49:37.507920 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 13:49:37.514677 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1305 13:49:37.521240 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1306 13:49:37.531775 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1307 13:49:37.538242 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1308 13:49:37.544634 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 13:49:37.548312 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 13:49:37.557775 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1311 13:49:37.561554 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 13:49:37.564474 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 13:49:37.574938 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1314 13:49:37.581457 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1315 13:49:37.591059 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1316 13:49:37.597723 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1317 13:49:37.604404 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1318 13:49:37.614671 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1319 13:49:37.621436 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1320 13:49:37.627635 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1321 13:49:37.634304 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 13:49:37.637397 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 13:49:37.647495 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1324 13:49:37.657261 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1325 13:49:37.663902 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1326 13:49:37.667538 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1327 13:49:37.677444 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1328 13:49:37.680903 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1329 13:49:37.690918 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1330 13:49:37.697513 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1331 13:49:37.704069 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 13:49:37.707133 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 13:49:37.716894 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1334 13:49:37.720702 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 13:49:37.723698 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 13:49:37.730991 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 13:49:37.734171 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 13:49:37.741090 LPC: Trying to open IO window from 800 size 1ff
1339 13:49:37.747103 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1340 13:49:37.757013 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1341 13:49:37.763656 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1342 13:49:37.773960 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1343 13:49:37.776939 DOMAIN: 0000 assign_resources, bus 0 link: 0
1344 13:49:37.783449 Root Device assign_resources, bus 0 link: 0
1345 13:49:37.783530 Done setting resources.
1346 13:49:37.790394 Show resources in subtree (Root Device)...After assigning values.
1347 13:49:37.797161 Root Device child on link 0 CPU_CLUSTER: 0
1348 13:49:37.799961 CPU_CLUSTER: 0 child on link 0 APIC: 00
1349 13:49:37.800040 APIC: 00
1350 13:49:37.803516 APIC: 03
1351 13:49:37.803595 APIC: 01
1352 13:49:37.803657 APIC: 06
1353 13:49:37.807149 APIC: 02
1354 13:49:37.807258 APIC: 07
1355 13:49:37.810117 APIC: 05
1356 13:49:37.810196 APIC: 04
1357 13:49:37.813449 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1358 13:49:37.823796 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1359 13:49:37.833393 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1360 13:49:37.836298 PCI: 00:00.0
1361 13:49:37.846231 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1362 13:49:37.856690 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1363 13:49:37.866396 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1364 13:49:37.873281 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1365 13:49:37.882690 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1366 13:49:37.892876 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1367 13:49:37.902793 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1368 13:49:37.912541 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1369 13:49:37.922296 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1370 13:49:37.928870 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1371 13:49:37.939130 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1372 13:49:37.948979 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1373 13:49:37.959060 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1374 13:49:37.968422 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1375 13:49:37.978353 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1376 13:49:37.985269 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1377 13:49:37.988392 PCI: 00:02.0
1378 13:49:37.998422 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1379 13:49:38.008117 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1380 13:49:38.018364 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1381 13:49:38.021905 PCI: 00:04.0
1382 13:49:38.021986 PCI: 00:08.0
1383 13:49:38.031820 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1384 13:49:38.034731 PCI: 00:12.0
1385 13:49:38.044504 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1386 13:49:38.047563 PCI: 00:14.0 child on link 0 USB0 port 0
1387 13:49:38.057921 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1388 13:49:38.064747 USB0 port 0 child on link 0 USB2 port 0
1389 13:49:38.064829 USB2 port 0
1390 13:49:38.067685 USB2 port 1
1391 13:49:38.067767 USB2 port 2
1392 13:49:38.071159 USB2 port 3
1393 13:49:38.071241 USB2 port 5
1394 13:49:38.074258 USB2 port 6
1395 13:49:38.074341 USB2 port 9
1396 13:49:38.077935 USB3 port 0
1397 13:49:38.078017 USB3 port 1
1398 13:49:38.081041 USB3 port 2
1399 13:49:38.081123 USB3 port 3
1400 13:49:38.084654 USB3 port 4
1401 13:49:38.087872 PCI: 00:14.2
1402 13:49:38.097424 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1403 13:49:38.107474 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1404 13:49:38.107557 PCI: 00:14.3
1405 13:49:38.117217 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1406 13:49:38.124286 PCI: 00:15.0 child on link 0 I2C: 01:15
1407 13:49:38.133922 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1408 13:49:38.134007 I2C: 01:15
1409 13:49:38.141070 PCI: 00:15.1 child on link 0 I2C: 02:5d
1410 13:49:38.150692 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1411 13:49:38.150777 I2C: 02:5d
1412 13:49:38.153917 GENERIC: 0.0
1413 13:49:38.154000 PCI: 00:16.0
1414 13:49:38.163609 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1415 13:49:38.167319 PCI: 00:17.0
1416 13:49:38.177604 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1417 13:49:38.187029 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1418 13:49:38.196752 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1419 13:49:38.203270 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1420 13:49:38.213403 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1421 13:49:38.223277 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1422 13:49:38.229906 PCI: 00:19.0 child on link 0 I2C: 03:1a
1423 13:49:38.240380 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1424 13:49:38.240462 I2C: 03:1a
1425 13:49:38.242741 I2C: 03:38
1426 13:49:38.242822 I2C: 03:39
1427 13:49:38.246342 I2C: 03:3a
1428 13:49:38.246423 I2C: 03:3b
1429 13:49:38.249451 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1430 13:49:38.259809 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1431 13:49:38.269623 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1432 13:49:38.279590 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1433 13:49:38.283055 PCI: 01:00.0
1434 13:49:38.292458 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1435 13:49:38.295981 PCI: 00:1e.0
1436 13:49:38.305687 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1437 13:49:38.315650 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1438 13:49:38.319047 PCI: 00:1e.2 child on link 0 SPI: 00
1439 13:49:38.329317 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1440 13:49:38.332540 SPI: 00
1441 13:49:38.335443 PCI: 00:1e.3 child on link 0 SPI: 01
1442 13:49:38.345454 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1443 13:49:38.345536 SPI: 01
1444 13:49:38.352283 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1445 13:49:38.358953 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1446 13:49:38.368616 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1447 13:49:38.371684 PNP: 0c09.0
1448 13:49:38.378674 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1449 13:49:38.381673 PCI: 00:1f.3
1450 13:49:38.391558 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1451 13:49:38.401926 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1452 13:49:38.404948 PCI: 00:1f.4
1453 13:49:38.411474 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1454 13:49:38.421452 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1455 13:49:38.425070 PCI: 00:1f.5
1456 13:49:38.434672 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1457 13:49:38.437779 Done allocating resources.
1458 13:49:38.441490 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1459 13:49:38.444913 Enabling resources...
1460 13:49:38.451690 PCI: 00:00.0 subsystem <- 8086/9b61
1461 13:49:38.451773 PCI: 00:00.0 cmd <- 06
1462 13:49:38.454657 PCI: 00:02.0 subsystem <- 8086/9b41
1463 13:49:38.458205 PCI: 00:02.0 cmd <- 03
1464 13:49:38.461621 PCI: 00:08.0 cmd <- 06
1465 13:49:38.465089 PCI: 00:12.0 subsystem <- 8086/02f9
1466 13:49:38.468095 PCI: 00:12.0 cmd <- 02
1467 13:49:38.471479 PCI: 00:14.0 subsystem <- 8086/02ed
1468 13:49:38.474918 PCI: 00:14.0 cmd <- 02
1469 13:49:38.475000 PCI: 00:14.2 cmd <- 02
1470 13:49:38.481842 PCI: 00:14.3 subsystem <- 8086/02f0
1471 13:49:38.481925 PCI: 00:14.3 cmd <- 02
1472 13:49:38.484900 PCI: 00:15.0 subsystem <- 8086/02e8
1473 13:49:38.488579 PCI: 00:15.0 cmd <- 02
1474 13:49:38.491943 PCI: 00:15.1 subsystem <- 8086/02e9
1475 13:49:38.495202 PCI: 00:15.1 cmd <- 02
1476 13:49:38.498100 PCI: 00:16.0 subsystem <- 8086/02e0
1477 13:49:38.502076 PCI: 00:16.0 cmd <- 02
1478 13:49:38.504863 PCI: 00:17.0 subsystem <- 8086/02d3
1479 13:49:38.508326 PCI: 00:17.0 cmd <- 03
1480 13:49:38.511640 PCI: 00:19.0 subsystem <- 8086/02c5
1481 13:49:38.515009 PCI: 00:19.0 cmd <- 02
1482 13:49:38.518586 PCI: 00:1d.0 bridge ctrl <- 0013
1483 13:49:38.521398 PCI: 00:1d.0 subsystem <- 8086/02b0
1484 13:49:38.524864 PCI: 00:1d.0 cmd <- 06
1485 13:49:38.527956 PCI: 00:1e.0 subsystem <- 8086/02a8
1486 13:49:38.531383 PCI: 00:1e.0 cmd <- 06
1487 13:49:38.534969 PCI: 00:1e.2 subsystem <- 8086/02aa
1488 13:49:38.535052 PCI: 00:1e.2 cmd <- 06
1489 13:49:38.541586 PCI: 00:1e.3 subsystem <- 8086/02ab
1490 13:49:38.541669 PCI: 00:1e.3 cmd <- 02
1491 13:49:38.544631 PCI: 00:1f.0 subsystem <- 8086/0284
1492 13:49:38.548184 PCI: 00:1f.0 cmd <- 407
1493 13:49:38.551208 PCI: 00:1f.3 subsystem <- 8086/02c8
1494 13:49:38.554945 PCI: 00:1f.3 cmd <- 02
1495 13:49:38.558034 PCI: 00:1f.4 subsystem <- 8086/02a3
1496 13:49:38.561459 PCI: 00:1f.4 cmd <- 03
1497 13:49:38.564450 PCI: 00:1f.5 subsystem <- 8086/02a4
1498 13:49:38.567988 PCI: 00:1f.5 cmd <- 406
1499 13:49:38.576395 PCI: 01:00.0 cmd <- 02
1500 13:49:38.581926 done.
1501 13:49:38.594771 ME: Version: 14.0.39.1367
1502 13:49:38.601476 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1503 13:49:38.605010 Initializing devices...
1504 13:49:38.605091 Root Device init ...
1505 13:49:38.611269 Chrome EC: Set SMI mask to 0x0000000000000000
1506 13:49:38.614659 Chrome EC: clear events_b mask to 0x0000000000000000
1507 13:49:38.621406 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1508 13:49:38.627881 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1509 13:49:38.634789 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1510 13:49:38.637659 Chrome EC: Set WAKE mask to 0x0000000000000000
1511 13:49:38.641197 Root Device init finished in 35178 usecs
1512 13:49:38.644668 CPU_CLUSTER: 0 init ...
1513 13:49:38.651308 CPU_CLUSTER: 0 init finished in 2449 usecs
1514 13:49:38.655585 PCI: 00:00.0 init ...
1515 13:49:38.659472 CPU TDP: 15 Watts
1516 13:49:38.662267 CPU PL2 = 64 Watts
1517 13:49:38.665914 PCI: 00:00.0 init finished in 7080 usecs
1518 13:49:38.669139 PCI: 00:02.0 init ...
1519 13:49:38.672469 PCI: 00:02.0 init finished in 2254 usecs
1520 13:49:38.675465 PCI: 00:08.0 init ...
1521 13:49:38.678883 PCI: 00:08.0 init finished in 2253 usecs
1522 13:49:38.682619 PCI: 00:12.0 init ...
1523 13:49:38.685508 PCI: 00:12.0 init finished in 2252 usecs
1524 13:49:38.688701 PCI: 00:14.0 init ...
1525 13:49:38.692264 PCI: 00:14.0 init finished in 2253 usecs
1526 13:49:38.695693 PCI: 00:14.2 init ...
1527 13:49:38.699104 PCI: 00:14.2 init finished in 2253 usecs
1528 13:49:38.702254 PCI: 00:14.3 init ...
1529 13:49:38.705598 PCI: 00:14.3 init finished in 2262 usecs
1530 13:49:38.708985 PCI: 00:15.0 init ...
1531 13:49:38.712334 DW I2C bus 0 at 0xd121f000 (400 KHz)
1532 13:49:38.715533 PCI: 00:15.0 init finished in 5978 usecs
1533 13:49:38.718862 PCI: 00:15.1 init ...
1534 13:49:38.722587 DW I2C bus 1 at 0xd1220000 (400 KHz)
1535 13:49:38.728467 PCI: 00:15.1 init finished in 5980 usecs
1536 13:49:38.728551 PCI: 00:16.0 init ...
1537 13:49:38.734965 PCI: 00:16.0 init finished in 2254 usecs
1538 13:49:38.738571 PCI: 00:19.0 init ...
1539 13:49:38.741738 DW I2C bus 4 at 0xd1222000 (400 KHz)
1540 13:49:38.744834 PCI: 00:19.0 init finished in 5978 usecs
1541 13:49:38.748280 PCI: 00:1d.0 init ...
1542 13:49:38.751765 Initializing PCH PCIe bridge.
1543 13:49:38.754709 PCI: 00:1d.0 init finished in 5276 usecs
1544 13:49:38.758346 PCI: 00:1f.0 init ...
1545 13:49:38.761583 IOAPIC: Initializing IOAPIC at 0xfec00000
1546 13:49:38.768033 IOAPIC: Bootstrap Processor Local APIC = 0x00
1547 13:49:38.768116 IOAPIC: ID = 0x02
1548 13:49:38.771135 IOAPIC: Dumping registers
1549 13:49:38.774794 reg 0x0000: 0x02000000
1550 13:49:38.778336 reg 0x0001: 0x00770020
1551 13:49:38.778419 reg 0x0002: 0x00000000
1552 13:49:38.785092 PCI: 00:1f.0 init finished in 23540 usecs
1553 13:49:38.788059 PCI: 00:1f.4 init ...
1554 13:49:38.791125 PCI: 00:1f.4 init finished in 2262 usecs
1555 13:49:38.801991 PCI: 01:00.0 init ...
1556 13:49:38.805163 PCI: 01:00.0 init finished in 2253 usecs
1557 13:49:38.809625 PNP: 0c09.0 init ...
1558 13:49:38.812981 Google Chrome EC uptime: 11.085 seconds
1559 13:49:38.819625 Google Chrome AP resets since EC boot: 0
1560 13:49:38.822469 Google Chrome most recent AP reset causes:
1561 13:49:38.829057 Google Chrome EC reset flags at last EC boot: reset-pin
1562 13:49:38.832519 PNP: 0c09.0 init finished in 20612 usecs
1563 13:49:38.835992 Devices initialized
1564 13:49:38.839005 Show all devs... After init.
1565 13:49:38.839090 Root Device: enabled 1
1566 13:49:38.842551 CPU_CLUSTER: 0: enabled 1
1567 13:49:38.845741 DOMAIN: 0000: enabled 1
1568 13:49:38.845826 APIC: 00: enabled 1
1569 13:49:38.848947 PCI: 00:00.0: enabled 1
1570 13:49:38.852504 PCI: 00:02.0: enabled 1
1571 13:49:38.855794 PCI: 00:04.0: enabled 0
1572 13:49:38.855880 PCI: 00:05.0: enabled 0
1573 13:49:38.859105 PCI: 00:12.0: enabled 1
1574 13:49:38.862391 PCI: 00:12.5: enabled 0
1575 13:49:38.865927 PCI: 00:12.6: enabled 0
1576 13:49:38.866013 PCI: 00:14.0: enabled 1
1577 13:49:38.868927 PCI: 00:14.1: enabled 0
1578 13:49:38.872772 PCI: 00:14.3: enabled 1
1579 13:49:38.872856 PCI: 00:14.5: enabled 0
1580 13:49:38.875678 PCI: 00:15.0: enabled 1
1581 13:49:38.878636 PCI: 00:15.1: enabled 1
1582 13:49:38.882267 PCI: 00:15.2: enabled 0
1583 13:49:38.882352 PCI: 00:15.3: enabled 0
1584 13:49:38.885314 PCI: 00:16.0: enabled 1
1585 13:49:38.888819 PCI: 00:16.1: enabled 0
1586 13:49:38.892372 PCI: 00:16.2: enabled 0
1587 13:49:38.892456 PCI: 00:16.3: enabled 0
1588 13:49:38.895499 PCI: 00:16.4: enabled 0
1589 13:49:38.899304 PCI: 00:16.5: enabled 0
1590 13:49:38.902113 PCI: 00:17.0: enabled 1
1591 13:49:38.902199 PCI: 00:19.0: enabled 1
1592 13:49:38.905226 PCI: 00:19.1: enabled 0
1593 13:49:38.909003 PCI: 00:19.2: enabled 0
1594 13:49:38.909086 PCI: 00:1a.0: enabled 0
1595 13:49:38.912145 PCI: 00:1c.0: enabled 0
1596 13:49:38.915158 PCI: 00:1c.1: enabled 0
1597 13:49:38.918862 PCI: 00:1c.2: enabled 0
1598 13:49:38.918945 PCI: 00:1c.3: enabled 0
1599 13:49:38.921823 PCI: 00:1c.4: enabled 0
1600 13:49:38.925311 PCI: 00:1c.5: enabled 0
1601 13:49:38.928771 PCI: 00:1c.6: enabled 0
1602 13:49:38.928854 PCI: 00:1c.7: enabled 0
1603 13:49:38.931691 PCI: 00:1d.0: enabled 1
1604 13:49:38.935094 PCI: 00:1d.1: enabled 0
1605 13:49:38.938700 PCI: 00:1d.2: enabled 0
1606 13:49:38.938783 PCI: 00:1d.3: enabled 0
1607 13:49:38.941659 PCI: 00:1d.4: enabled 0
1608 13:49:38.945049 PCI: 00:1d.5: enabled 0
1609 13:49:38.948709 PCI: 00:1e.0: enabled 1
1610 13:49:38.948793 PCI: 00:1e.1: enabled 0
1611 13:49:38.951698 PCI: 00:1e.2: enabled 1
1612 13:49:38.955173 PCI: 00:1e.3: enabled 1
1613 13:49:38.955256 PCI: 00:1f.0: enabled 1
1614 13:49:38.958920 PCI: 00:1f.1: enabled 0
1615 13:49:38.961568 PCI: 00:1f.2: enabled 0
1616 13:49:38.965149 PCI: 00:1f.3: enabled 1
1617 13:49:38.965232 PCI: 00:1f.4: enabled 1
1618 13:49:38.968178 PCI: 00:1f.5: enabled 1
1619 13:49:38.971504 PCI: 00:1f.6: enabled 0
1620 13:49:38.975083 USB0 port 0: enabled 1
1621 13:49:38.975166 I2C: 01:15: enabled 1
1622 13:49:38.977948 I2C: 02:5d: enabled 1
1623 13:49:38.981745 GENERIC: 0.0: enabled 1
1624 13:49:38.981829 I2C: 03:1a: enabled 1
1625 13:49:38.984792 I2C: 03:38: enabled 1
1626 13:49:38.988426 I2C: 03:39: enabled 1
1627 13:49:38.988509 I2C: 03:3a: enabled 1
1628 13:49:38.991621 I2C: 03:3b: enabled 1
1629 13:49:38.994744 PCI: 00:00.0: enabled 1
1630 13:49:38.994856 SPI: 00: enabled 1
1631 13:49:38.997925 SPI: 01: enabled 1
1632 13:49:39.001566 PNP: 0c09.0: enabled 1
1633 13:49:39.001649 USB2 port 0: enabled 1
1634 13:49:39.004480 USB2 port 1: enabled 1
1635 13:49:39.008228 USB2 port 2: enabled 0
1636 13:49:39.008312 USB2 port 3: enabled 0
1637 13:49:39.011293 USB2 port 5: enabled 0
1638 13:49:39.014474 USB2 port 6: enabled 1
1639 13:49:39.018029 USB2 port 9: enabled 1
1640 13:49:39.018112 USB3 port 0: enabled 1
1641 13:49:39.021155 USB3 port 1: enabled 1
1642 13:49:39.024820 USB3 port 2: enabled 1
1643 13:49:39.024904 USB3 port 3: enabled 1
1644 13:49:39.027923 USB3 port 4: enabled 0
1645 13:49:39.031297 APIC: 03: enabled 1
1646 13:49:39.031430 APIC: 01: enabled 1
1647 13:49:39.034344 APIC: 06: enabled 1
1648 13:49:39.037665 APIC: 02: enabled 1
1649 13:49:39.037749 APIC: 07: enabled 1
1650 13:49:39.041201 APIC: 05: enabled 1
1651 13:49:39.041284 APIC: 04: enabled 1
1652 13:49:39.044776 PCI: 00:08.0: enabled 1
1653 13:49:39.047539 PCI: 00:14.2: enabled 1
1654 13:49:39.050841 PCI: 01:00.0: enabled 1
1655 13:49:39.054406 Disabling ACPI via APMC:
1656 13:49:39.054489 done.
1657 13:49:39.061065 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1658 13:49:39.064471 ELOG: NV offset 0xaf0000 size 0x4000
1659 13:49:39.071018 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1660 13:49:39.077613 ELOG: Event(17) added with size 13 at 2023-06-07 13:49:26 UTC
1661 13:49:39.084195 POST: Unexpected post code in previous boot: 0x73
1662 13:49:39.090853 ELOG: Event(A3) added with size 11 at 2023-06-07 13:49:26 UTC
1663 13:49:39.097789 ELOG: Event(A6) added with size 13 at 2023-06-07 13:49:26 UTC
1664 13:49:39.103872 ELOG: Event(92) added with size 9 at 2023-06-07 13:49:26 UTC
1665 13:49:39.110463 ELOG: Event(93) added with size 9 at 2023-06-07 13:49:26 UTC
1666 13:49:39.114250 ELOG: Event(9A) added with size 9 at 2023-06-07 13:49:26 UTC
1667 13:49:39.121050 ELOG: Event(9E) added with size 10 at 2023-06-07 13:49:26 UTC
1668 13:49:39.127160 ELOG: Event(9F) added with size 14 at 2023-06-07 13:49:26 UTC
1669 13:49:39.133871 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1670 13:49:39.140336 ELOG: Event(A1) added with size 10 at 2023-06-07 13:49:26 UTC
1671 13:49:39.147329 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1672 13:49:39.153981 ELOG: Event(A0) added with size 9 at 2023-06-07 13:49:26 UTC
1673 13:49:39.156907 elog_add_boot_reason: Logged dev mode boot
1674 13:49:39.160603 Finalize devices...
1675 13:49:39.163763 PCI: 00:17.0 final
1676 13:49:39.163843 Devices finalized
1677 13:49:39.170011 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1678 13:49:39.173520 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1679 13:49:39.179893 ME: HFSTS1 : 0x90000245
1680 13:49:39.183435 ME: HFSTS2 : 0x3B850126
1681 13:49:39.186605 ME: HFSTS3 : 0x00000020
1682 13:49:39.189979 ME: HFSTS4 : 0x00004800
1683 13:49:39.196669 ME: HFSTS5 : 0x00000000
1684 13:49:39.199757 ME: HFSTS6 : 0x40400006
1685 13:49:39.203760 ME: Manufacturing Mode : NO
1686 13:49:39.206341 ME: FW Partition Table : OK
1687 13:49:39.209674 ME: Bringup Loader Failure : NO
1688 13:49:39.213252 ME: Firmware Init Complete : YES
1689 13:49:39.216443 ME: Boot Options Present : NO
1690 13:49:39.220095 ME: Update In Progress : NO
1691 13:49:39.223059 ME: D0i3 Support : YES
1692 13:49:39.226156 ME: Low Power State Enabled : NO
1693 13:49:39.229324 ME: CPU Replaced : NO
1694 13:49:39.232990 ME: CPU Replacement Valid : YES
1695 13:49:39.236132 ME: Current Working State : 5
1696 13:49:39.239715 ME: Current Operation State : 1
1697 13:49:39.242555 ME: Current Operation Mode : 0
1698 13:49:39.245912 ME: Error Code : 0
1699 13:49:39.249441 ME: CPU Debug Disabled : YES
1700 13:49:39.252928 ME: TXT Support : NO
1701 13:49:39.259458 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1702 13:49:39.262373 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1703 13:49:39.265784 CBFS @ c08000 size 3f8000
1704 13:49:39.272653 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1705 13:49:39.275557 CBFS: Locating 'fallback/dsdt.aml'
1706 13:49:39.279284 CBFS: Found @ offset 10bb80 size 3fa5
1707 13:49:39.285473 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1708 13:49:39.285555 CBFS @ c08000 size 3f8000
1709 13:49:39.291950 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1710 13:49:39.295452 CBFS: Locating 'fallback/slic'
1711 13:49:39.299862 CBFS: 'fallback/slic' not found.
1712 13:49:39.306695 ACPI: Writing ACPI tables at 99b3e000.
1713 13:49:39.306775 ACPI: * FACS
1714 13:49:39.309673 ACPI: * DSDT
1715 13:49:39.313480 Ramoops buffer: 0x100000@0x99a3d000.
1716 13:49:39.316174 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1717 13:49:39.322707 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1718 13:49:39.326297 Google Chrome EC: version:
1719 13:49:39.329603 ro: helios_v2.0.2659-56403530b
1720 13:49:39.332691 rw: helios_v2.0.2849-c41de27e7d
1721 13:49:39.332770 running image: 1
1722 13:49:39.336947 ACPI: * FADT
1723 13:49:39.337026 SCI is IRQ9
1724 13:49:39.343809 ACPI: added table 1/32, length now 40
1725 13:49:39.343889 ACPI: * SSDT
1726 13:49:39.346903 Found 1 CPU(s) with 8 core(s) each.
1727 13:49:39.350347 Error: Could not locate 'wifi_sar' in VPD.
1728 13:49:39.356637 Checking CBFS for default SAR values
1729 13:49:39.360132 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1730 13:49:39.363751 CBFS @ c08000 size 3f8000
1731 13:49:39.370033 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1732 13:49:39.373448 CBFS: Locating 'wifi_sar_defaults.hex'
1733 13:49:39.376388 CBFS: Found @ offset 5fac0 size 77
1734 13:49:39.380059 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1735 13:49:39.386359 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1736 13:49:39.389693 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1737 13:49:39.396709 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1738 13:49:39.399811 failed to find key in VPD: dsm_calib_r0_0
1739 13:49:39.409534 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1740 13:49:39.413259 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1741 13:49:39.416253 failed to find key in VPD: dsm_calib_r0_1
1742 13:49:39.426298 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1743 13:49:39.433018 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1744 13:49:39.436300 failed to find key in VPD: dsm_calib_r0_2
1745 13:49:39.446093 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1746 13:49:39.449154 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1747 13:49:39.456166 failed to find key in VPD: dsm_calib_r0_3
1748 13:49:39.462606 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1749 13:49:39.469786 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1750 13:49:39.472435 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1751 13:49:39.475718 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1752 13:49:39.480014 EC returned error result code 1
1753 13:49:39.483714 EC returned error result code 1
1754 13:49:39.487144 EC returned error result code 1
1755 13:49:39.494203 PS2K: Bad resp from EC. Vivaldi disabled!
1756 13:49:39.497069 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1757 13:49:39.503955 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1758 13:49:39.510767 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1759 13:49:39.514080 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1760 13:49:39.520282 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1761 13:49:39.527031 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1762 13:49:39.533585 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1763 13:49:39.536666 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1764 13:49:39.543520 ACPI: added table 2/32, length now 44
1765 13:49:39.543602 ACPI: * MCFG
1766 13:49:39.547111 ACPI: added table 3/32, length now 48
1767 13:49:39.550160 ACPI: * TPM2
1768 13:49:39.553281 TPM2 log created at 99a2d000
1769 13:49:39.556901 ACPI: added table 4/32, length now 52
1770 13:49:39.556982 ACPI: * MADT
1771 13:49:39.559958 SCI is IRQ9
1772 13:49:39.563782 ACPI: added table 5/32, length now 56
1773 13:49:39.563865 current = 99b43ac0
1774 13:49:39.566613 ACPI: * DMAR
1775 13:49:39.569972 ACPI: added table 6/32, length now 60
1776 13:49:39.573417 ACPI: * IGD OpRegion
1777 13:49:39.573499 GMA: Found VBT in CBFS
1778 13:49:39.576914 GMA: Found valid VBT in CBFS
1779 13:49:39.580221 ACPI: added table 7/32, length now 64
1780 13:49:39.583062 ACPI: * HPET
1781 13:49:39.586457 ACPI: added table 8/32, length now 68
1782 13:49:39.586539 ACPI: done.
1783 13:49:39.589859 ACPI tables: 31744 bytes.
1784 13:49:39.593601 smbios_write_tables: 99a2c000
1785 13:49:39.596712 EC returned error result code 3
1786 13:49:39.599981 Couldn't obtain OEM name from CBI
1787 13:49:39.603313 Create SMBIOS type 17
1788 13:49:39.606611 PCI: 00:00.0 (Intel Cannonlake)
1789 13:49:39.609962 PCI: 00:14.3 (Intel WiFi)
1790 13:49:39.613257 SMBIOS tables: 939 bytes.
1791 13:49:39.616314 Writing table forward entry at 0x00000500
1792 13:49:39.623370 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1793 13:49:39.626417 Writing coreboot table at 0x99b62000
1794 13:49:39.633129 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1795 13:49:39.636521 1. 0000000000001000-000000000009ffff: RAM
1796 13:49:39.639885 2. 00000000000a0000-00000000000fffff: RESERVED
1797 13:49:39.646630 3. 0000000000100000-0000000099a2bfff: RAM
1798 13:49:39.649514 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1799 13:49:39.656560 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1800 13:49:39.662566 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1801 13:49:39.666253 7. 000000009a000000-000000009f7fffff: RESERVED
1802 13:49:39.673181 8. 00000000e0000000-00000000efffffff: RESERVED
1803 13:49:39.675894 9. 00000000fc000000-00000000fc000fff: RESERVED
1804 13:49:39.679333 10. 00000000fe000000-00000000fe00ffff: RESERVED
1805 13:49:39.685921 11. 00000000fed10000-00000000fed17fff: RESERVED
1806 13:49:39.689415 12. 00000000fed80000-00000000fed83fff: RESERVED
1807 13:49:39.695734 13. 00000000fed90000-00000000fed91fff: RESERVED
1808 13:49:39.699139 14. 00000000feda0000-00000000feda1fff: RESERVED
1809 13:49:39.705789 15. 0000000100000000-000000045e7fffff: RAM
1810 13:49:39.709296 Graphics framebuffer located at 0xc0000000
1811 13:49:39.712251 Passing 5 GPIOs to payload:
1812 13:49:39.715705 NAME | PORT | POLARITY | VALUE
1813 13:49:39.722273 write protect | undefined | high | low
1814 13:49:39.725815 lid | undefined | high | high
1815 13:49:39.732140 power | undefined | high | low
1816 13:49:39.738993 oprom | undefined | high | low
1817 13:49:39.742405 EC in RW | 0x000000cb | high | low
1818 13:49:39.745750 Board ID: 4
1819 13:49:39.748744 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1820 13:49:39.752476 CBFS @ c08000 size 3f8000
1821 13:49:39.758648 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1822 13:49:39.765658 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1823 13:49:39.765742 coreboot table: 1492 bytes.
1824 13:49:39.768567 IMD ROOT 0. 99fff000 00001000
1825 13:49:39.772276 IMD SMALL 1. 99ffe000 00001000
1826 13:49:39.775321 FSP MEMORY 2. 99c4e000 003b0000
1827 13:49:39.779073 CONSOLE 3. 99c2e000 00020000
1828 13:49:39.782021 FMAP 4. 99c2d000 0000054e
1829 13:49:39.785323 TIME STAMP 5. 99c2c000 00000910
1830 13:49:39.788676 VBOOT WORK 6. 99c18000 00014000
1831 13:49:39.792479 MRC DATA 7. 99c16000 00001958
1832 13:49:39.795320 ROMSTG STCK 8. 99c15000 00001000
1833 13:49:39.798732 AFTER CAR 9. 99c0b000 0000a000
1834 13:49:39.801793 RAMSTAGE 10. 99baf000 0005c000
1835 13:49:39.805161 REFCODE 11. 99b7a000 00035000
1836 13:49:39.808571 SMM BACKUP 12. 99b6a000 00010000
1837 13:49:39.812221 COREBOOT 13. 99b62000 00008000
1838 13:49:39.815568 ACPI 14. 99b3e000 00024000
1839 13:49:39.818358 ACPI GNVS 15. 99b3d000 00001000
1840 13:49:39.821874 RAMOOPS 16. 99a3d000 00100000
1841 13:49:39.825159 TPM2 TCGLOG17. 99a2d000 00010000
1842 13:49:39.828915 SMBIOS 18. 99a2c000 00000800
1843 13:49:39.832011 IMD small region:
1844 13:49:39.835258 IMD ROOT 0. 99ffec00 00000400
1845 13:49:39.838742 FSP RUNTIME 1. 99ffebe0 00000004
1846 13:49:39.842029 EC HOSTEVENT 2. 99ffebc0 00000008
1847 13:49:39.845567 POWER STATE 3. 99ffeb80 00000040
1848 13:49:39.848606 ROMSTAGE 4. 99ffeb60 00000004
1849 13:49:39.851641 MEM INFO 5. 99ffe9a0 000001b9
1850 13:49:39.855252 VPD 6. 99ffe920 0000006c
1851 13:49:39.858494 MTRR: Physical address space:
1852 13:49:39.865205 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1853 13:49:39.872118 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1854 13:49:39.878218 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1855 13:49:39.884953 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1856 13:49:39.891480 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1857 13:49:39.898199 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1858 13:49:39.901696 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1859 13:49:39.908042 MTRR: Fixed MSR 0x250 0x0606060606060606
1860 13:49:39.911536 MTRR: Fixed MSR 0x258 0x0606060606060606
1861 13:49:39.914790 MTRR: Fixed MSR 0x259 0x0000000000000000
1862 13:49:39.918217 MTRR: Fixed MSR 0x268 0x0606060606060606
1863 13:49:39.924974 MTRR: Fixed MSR 0x269 0x0606060606060606
1864 13:49:39.927930 MTRR: Fixed MSR 0x26a 0x0606060606060606
1865 13:49:39.931276 MTRR: Fixed MSR 0x26b 0x0606060606060606
1866 13:49:39.934827 MTRR: Fixed MSR 0x26c 0x0606060606060606
1867 13:49:39.941594 MTRR: Fixed MSR 0x26d 0x0606060606060606
1868 13:49:39.944362 MTRR: Fixed MSR 0x26e 0x0606060606060606
1869 13:49:39.948325 MTRR: Fixed MSR 0x26f 0x0606060606060606
1870 13:49:39.951336 call enable_fixed_mtrr()
1871 13:49:39.954470 CPU physical address size: 39 bits
1872 13:49:39.957907 MTRR: default type WB/UC MTRR counts: 6/8.
1873 13:49:39.961199 MTRR: WB selected as default type.
1874 13:49:39.967741 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1875 13:49:39.974487 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1876 13:49:39.981309 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1877 13:49:39.987445 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1878 13:49:39.994254 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1879 13:49:40.001042 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1880 13:49:40.004416 MTRR: Fixed MSR 0x250 0x0606060606060606
1881 13:49:40.011274 MTRR: Fixed MSR 0x258 0x0606060606060606
1882 13:49:40.013741 MTRR: Fixed MSR 0x259 0x0000000000000000
1883 13:49:40.017570 MTRR: Fixed MSR 0x268 0x0606060606060606
1884 13:49:40.020688 MTRR: Fixed MSR 0x269 0x0606060606060606
1885 13:49:40.027516 MTRR: Fixed MSR 0x26a 0x0606060606060606
1886 13:49:40.030323 MTRR: Fixed MSR 0x26b 0x0606060606060606
1887 13:49:40.033734 MTRR: Fixed MSR 0x26c 0x0606060606060606
1888 13:49:40.037199 MTRR: Fixed MSR 0x26d 0x0606060606060606
1889 13:49:40.040717 MTRR: Fixed MSR 0x26e 0x0606060606060606
1890 13:49:40.047246 MTRR: Fixed MSR 0x26f 0x0606060606060606
1891 13:49:40.047358
1892 13:49:40.047425 MTRR check
1893 13:49:40.049919 Fixed MTRRs : Enabled
1894 13:49:40.053446 Variable MTRRs: Enabled
1895 13:49:40.053529
1896 13:49:40.057014 call enable_fixed_mtrr()
1897 13:49:40.060069 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1898 13:49:40.063596 CPU physical address size: 39 bits
1899 13:49:40.070452 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1900 13:49:40.073346 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 13:49:40.076623 MTRR: Fixed MSR 0x250 0x0606060606060606
1902 13:49:40.083128 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 13:49:40.086208 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 13:49:40.090003 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 13:49:40.093094 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 13:49:40.099819 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 13:49:40.102843 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 13:49:40.106342 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 13:49:40.109435 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 13:49:40.116526 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 13:49:40.119376 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 13:49:40.122972 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 13:49:40.126340 call enable_fixed_mtrr()
1914 13:49:40.129235 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 13:49:40.132745 MTRR: Fixed MSR 0x268 0x0606060606060606
1916 13:49:40.139166 MTRR: Fixed MSR 0x269 0x0606060606060606
1917 13:49:40.142777 MTRR: Fixed MSR 0x26a 0x0606060606060606
1918 13:49:40.145790 MTRR: Fixed MSR 0x26b 0x0606060606060606
1919 13:49:40.149121 MTRR: Fixed MSR 0x26c 0x0606060606060606
1920 13:49:40.155938 MTRR: Fixed MSR 0x26d 0x0606060606060606
1921 13:49:40.159254 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 13:49:40.162663 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 13:49:40.165834 CPU physical address size: 39 bits
1924 13:49:40.169354 call enable_fixed_mtrr()
1925 13:49:40.172369 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 13:49:40.179041 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 13:49:40.182304 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 13:49:40.185271 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 13:49:40.188903 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 13:49:40.192023 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 13:49:40.198785 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 13:49:40.202189 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 13:49:40.205176 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 13:49:40.208832 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 13:49:40.215300 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 13:49:40.218316 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 13:49:40.221816 call enable_fixed_mtrr()
1938 13:49:40.225271 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 13:49:40.228541 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 13:49:40.231736 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 13:49:40.238101 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 13:49:40.241589 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 13:49:40.245311 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 13:49:40.248351 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 13:49:40.254425 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 13:49:40.257848 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 13:49:40.261187 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 13:49:40.264735 CPU physical address size: 39 bits
1949 13:49:40.268140 call enable_fixed_mtrr()
1950 13:49:40.271031 CPU physical address size: 39 bits
1951 13:49:40.278049 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 13:49:40.281219 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 13:49:40.284312 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 13:49:40.288144 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 13:49:40.291511 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 13:49:40.297990 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 13:49:40.301085 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 13:49:40.304122 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 13:49:40.307204 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 13:49:40.314120 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 13:49:40.317647 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 13:49:40.320649 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 13:49:40.327147 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 13:49:40.330170 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 13:49:40.333706 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 13:49:40.337242 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 13:49:40.340107 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 13:49:40.346737 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 13:49:40.350647 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 13:49:40.353798 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 13:49:40.356926 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 13:49:40.363929 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 13:49:40.366644 call enable_fixed_mtrr()
1974 13:49:40.366727 call enable_fixed_mtrr()
1975 13:49:40.369980 CPU physical address size: 39 bits
1976 13:49:40.373635 CPU physical address size: 39 bits
1977 13:49:40.376840 CBFS @ c08000 size 3f8000
1978 13:49:40.383927 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1979 13:49:40.387055 CPU physical address size: 39 bits
1980 13:49:40.390048 CBFS: Locating 'fallback/payload'
1981 13:49:40.393699 CBFS: Found @ offset 1c96c0 size 3f798
1982 13:49:40.400582 Checking segment from ROM address 0xffdd16f8
1983 13:49:40.403692 Checking segment from ROM address 0xffdd1714
1984 13:49:40.409800 Loading segment from ROM address 0xffdd16f8
1985 13:49:40.409888 code (compression=0)
1986 13:49:40.420054 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1987 13:49:40.426795 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1988 13:49:40.430200 it's not compressed!
1989 13:49:40.522474 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1990 13:49:40.529214 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1991 13:49:40.532397 Loading segment from ROM address 0xffdd1714
1992 13:49:40.535267 Entry Point 0x30000000
1993 13:49:40.538821 Loaded segments
1994 13:49:40.544677 Finalizing chipset.
1995 13:49:40.547485 Finalizing SMM.
1996 13:49:40.550968 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1997 13:49:40.554357 mp_park_aps done after 0 msecs.
1998 13:49:40.561428 Jumping to boot code at 30000000(99b62000)
1999 13:49:40.568078 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2000 13:49:40.568189
2001 13:49:40.568270
2002 13:49:40.568362
2003 13:49:40.570863 Starting depthcharge on Helios...
2004 13:49:40.570947
2005 13:49:40.571311 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2006 13:49:40.571451 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2007 13:49:40.571534 Setting prompt string to ['hatch:']
2008 13:49:40.571614 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2009 13:49:40.580847 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2010 13:49:40.580946
2011 13:49:40.587797 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2012 13:49:40.587911
2013 13:49:40.594073 board_setup: Info: eMMC controller not present; skipping
2014 13:49:40.594176
2015 13:49:40.597675 New NVMe Controller 0x30053ac0 @ 00:1d:00
2016 13:49:40.597761
2017 13:49:40.603891 board_setup: Info: SDHCI controller not present; skipping
2018 13:49:40.603980
2019 13:49:40.607499 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2020 13:49:40.610640
2021 13:49:40.610722 Wipe memory regions:
2022 13:49:40.610790
2023 13:49:40.614052 [0x00000000001000, 0x000000000a0000)
2024 13:49:40.614123
2025 13:49:40.617671 [0x00000000100000, 0x00000030000000)
2026 13:49:40.683663
2027 13:49:40.686372 [0x00000030657430, 0x00000099a2c000)
2028 13:49:40.824019
2029 13:49:40.827212 [0x00000100000000, 0x0000045e800000)
2030 13:49:42.209606
2031 13:49:42.209759 R8152: Initializing
2032 13:49:42.209826
2033 13:49:42.213049 Version 9 (ocp_data = 6010)
2034 13:49:42.217587
2035 13:49:42.217668 R8152: Done initializing
2036 13:49:42.217731
2037 13:49:42.220435 Adding net device
2038 13:49:42.703112
2039 13:49:42.703278 R8152: Initializing
2040 13:49:42.703352
2041 13:49:42.706707 Version 6 (ocp_data = 5c30)
2042 13:49:42.706788
2043 13:49:42.709778 R8152: Done initializing
2044 13:49:42.709858
2045 13:49:42.712861 net_add_device: Attemp to include the same device
2046 13:49:42.716517
2047 13:49:42.723723 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2048 13:49:42.723835
2049 13:49:42.723938
2050 13:49:42.723995
2051 13:49:42.724265 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2053 13:49:42.824581 hatch: tftpboot 192.168.201.1 10624732/tftp-deploy-vck2izkm/kernel/bzImage 10624732/tftp-deploy-vck2izkm/kernel/cmdline 10624732/tftp-deploy-vck2izkm/ramdisk/ramdisk.cpio.gz
2054 13:49:42.824715 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2055 13:49:42.824796 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2056 13:49:42.829232 tftpboot 192.168.201.1 10624732/tftp-deploy-vck2izkm/kernel/bzIploy-vck2izkm/kernel/cmdline 10624732/tftp-deploy-vck2izkm/ramdisk/ramdisk.cpio.gz
2057 13:49:42.829320
2058 13:49:42.829384 Waiting for link
2059 13:49:43.029842
2060 13:49:43.029979 done.
2061 13:49:43.030073
2062 13:49:43.030146 MAC: 00:24:32:50:19:be
2063 13:49:43.030204
2064 13:49:43.033492 Sending DHCP discover... done.
2065 13:49:43.033575
2066 13:49:43.036415 Waiting for reply... done.
2067 13:49:43.036495
2068 13:49:43.039463 Sending DHCP request... done.
2069 13:49:43.039544
2070 13:49:43.043049 Waiting for reply... done.
2071 13:49:43.043130
2072 13:49:43.046559 My ip is 192.168.201.15
2073 13:49:43.046640
2074 13:49:43.049510 The DHCP server ip is 192.168.201.1
2075 13:49:43.049591
2076 13:49:43.053073 TFTP server IP predefined by user: 192.168.201.1
2077 13:49:43.053155
2078 13:49:43.059234 Bootfile predefined by user: 10624732/tftp-deploy-vck2izkm/kernel/bzImage
2079 13:49:43.059315
2080 13:49:43.062542 Sending tftp read request... done.
2081 13:49:43.062622
2082 13:49:43.069968 Waiting for the transfer...
2083 13:49:43.070064
2084 13:49:43.650744 00000000 ################################################################
2085 13:49:43.650890
2086 13:49:44.235400 00080000 ################################################################
2087 13:49:44.235572
2088 13:49:44.783407 00100000 ################################################################
2089 13:49:44.783554
2090 13:49:45.351641 00180000 ################################################################
2091 13:49:45.351797
2092 13:49:45.963362 00200000 ################################################################
2093 13:49:45.963779
2094 13:49:46.658671 00280000 ################################################################
2095 13:49:46.659125
2096 13:49:47.380520 00300000 ################################################################
2097 13:49:47.381118
2098 13:49:48.083770 00380000 ################################################################
2099 13:49:48.084285
2100 13:49:48.795561 00400000 ################################################################
2101 13:49:48.796135
2102 13:49:49.510092 00480000 ################################################################
2103 13:49:49.510658
2104 13:49:50.240532 00500000 ################################################################
2105 13:49:50.241049
2106 13:49:50.941247 00580000 ################################################################
2107 13:49:50.941685
2108 13:49:51.564459 00600000 ################################################################
2109 13:49:51.564991
2110 13:49:52.248641 00680000 ################################################################
2111 13:49:52.249158
2112 13:49:52.940185 00700000 ################################################################
2113 13:49:52.940710
2114 13:49:53.159099 00780000 #################### done.
2115 13:49:53.159635
2116 13:49:53.162674 The bootfile was 8028048 bytes long.
2117 13:49:53.163095
2118 13:49:53.165703 Sending tftp read request... done.
2119 13:49:53.166120
2120 13:49:53.168958 Waiting for the transfer...
2121 13:49:53.169445
2122 13:49:53.863802 00000000 ################################################################
2123 13:49:53.864300
2124 13:49:54.558241 00080000 ################################################################
2125 13:49:54.558739
2126 13:49:55.260812 00100000 ################################################################
2127 13:49:55.261482
2128 13:49:55.956580 00180000 ################################################################
2129 13:49:55.957082
2130 13:49:56.642272 00200000 ################################################################
2131 13:49:56.642775
2132 13:49:57.339919 00280000 ################################################################
2133 13:49:57.340458
2134 13:49:58.002198 00300000 ################################################################
2135 13:49:58.002343
2136 13:49:58.612187 00380000 ################################################################
2137 13:49:58.612334
2138 13:49:59.151147 00400000 ################################################################
2139 13:49:59.151295
2140 13:49:59.684830 00480000 ################################################################
2141 13:49:59.684966
2142 13:50:00.218149 00500000 ################################################################
2143 13:50:00.218321
2144 13:50:00.468534 00580000 ############################## done.
2145 13:50:00.468683
2146 13:50:00.471532 Sending tftp read request... done.
2147 13:50:00.471637
2148 13:50:00.475179 Waiting for the transfer...
2149 13:50:00.475290
2150 13:50:00.475409 00000000 # done.
2151 13:50:00.478120
2152 13:50:00.484771 Command line loaded dynamically from TFTP file: 10624732/tftp-deploy-vck2izkm/kernel/cmdline
2153 13:50:00.484853
2154 13:50:00.508247 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10624732/extract-nfsrootfs-nn5a4fob,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2155 13:50:00.508336
2156 13:50:00.514863 ec_init(0): CrosEC protocol v3 supported (256, 256)
2157 13:50:00.519045
2158 13:50:00.522680 Shutting down all USB controllers.
2159 13:50:00.522755
2160 13:50:00.522823 Removing current net device
2161 13:50:00.526927
2162 13:50:00.527039 Finalizing coreboot
2163 13:50:00.527131
2164 13:50:00.533095 Exiting depthcharge with code 4 at timestamp: 27322685
2165 13:50:00.533171
2166 13:50:00.533245
2167 13:50:00.533308 Starting kernel ...
2168 13:50:00.533366
2169 13:50:00.533422
2170 13:50:00.533798 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2171 13:50:00.533897 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2172 13:50:00.533973 Setting prompt string to ['Linux version [0-9]']
2173 13:50:00.534054 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 13:50:00.534123 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2176 13:54:22.534711 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2178 13:54:22.535705 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2180 13:54:22.536505 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2183 13:54:22.538000 end: 2 depthcharge-action (duration 00:05:00) [common]
2185 13:54:22.539197 Cleaning after the job
2186 13:54:22.539676 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/ramdisk
2187 13:54:22.543439 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/kernel
2188 13:54:22.547895 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/nfsrootfs
2189 13:54:22.658947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624732/tftp-deploy-vck2izkm/modules
2190 13:54:22.659405 start: 4.1 power-off (timeout 00:00:30) [common]
2191 13:54:22.659589 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2192 13:54:22.736430 >> Command sent successfully.
2193 13:54:22.740926 Returned 0 in 0 seconds
2194 13:54:22.841845 end: 4.1 power-off (duration 00:00:00) [common]
2196 13:54:22.843211 start: 4.2 read-feedback (timeout 00:10:00) [common]
2197 13:54:22.844450 Listened to connection for namespace 'common' for up to 1s
2199 13:54:22.845670 Listened to connection for namespace 'common' for up to 1s
2200 13:54:23.845145 Finalising connection for namespace 'common'
2201 13:54:23.845810 Disconnecting from shell: Finalise
2202 13:54:23.846279
2203 13:54:23.947461 end: 4.2 read-feedback (duration 00:00:01) [common]
2204 13:54:23.948081 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624732
2205 13:54:24.376753 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624732
2206 13:54:24.376930 JobError: Your job cannot terminate cleanly.